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[ar71xx] handle PCI_CORE interrupt as well
[openwrt/svn-archive/archive.git]
/
target
/
linux
/
ar71xx
/
files
/
arch
/
mips
/
ar71xx
/
irq.c
diff --git
a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index eda74744183239da1651c65f8f54ed3b86575cc2..c3ba7ec4379de7697634ec81daeb3403fd0604da 100644
(file)
--- a/
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@
-1,7
+1,7
@@
/*
* Atheros AR71xx SoC specific interrupt handling
*
/*
* Atheros AR71xx SoC specific interrupt handling
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008
-2009
Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
@@
-27,7
+27,7
@@
static void ar71xx_pci_irq_dispatch(void)
u32 pending;
pending = ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_STATUS) &
u32 pending;
pending = ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_STATUS) &
- ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE);
+
ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE);
if (pending & PCI_INT_DEV0)
do_IRQ(AR71XX_PCI_IRQ_DEV0);
if (pending & PCI_INT_DEV0)
do_IRQ(AR71XX_PCI_IRQ_DEV0);
@@
-38,6
+38,9
@@
static void ar71xx_pci_irq_dispatch(void)
else if (pending & PCI_INT_DEV2)
do_IRQ(AR71XX_PCI_IRQ_DEV2);
else if (pending & PCI_INT_DEV2)
do_IRQ(AR71XX_PCI_IRQ_DEV2);
+ else if (pending & PCI_INT_CORE)
+ do_IRQ(AR71XX_PCI_IRQ_CORE);
+
else
spurious_interrupt();
}
else
spurious_interrupt();
}
@@
-84,7
+87,6
@@
static void __init ar71xx_pci_irq_init(void)
setup_irq(AR71XX_CPU_IRQ_PCI, &ar71xx_pci_irqaction);
}
setup_irq(AR71XX_CPU_IRQ_PCI, &ar71xx_pci_irqaction);
}
-
#endif /* CONFIG_PCI */
static void ar71xx_gpio_irq_dispatch(void)
#endif /* CONFIG_PCI */
static void ar71xx_gpio_irq_dispatch(void)
@@
-241,6
+243,13
@@
static void __init ar71xx_misc_irq_init(void)
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
}
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
}
+static void ar913x_wmac_irq_dispatch(void)
+{
+ do_IRQ(AR71XX_CPU_IRQ_WMAC);
+}
+
+static void (* ar71xx_ip2_irq_handler)(void) = spurious_interrupt;
+
asmlinkage void plat_irq_dispatch(void)
{
unsigned long pending;
asmlinkage void plat_irq_dispatch(void)
{
unsigned long pending;
@@
-250,10
+259,8
@@
asmlinkage void plat_irq_dispatch(void)
if (pending & STATUSF_IP7)
do_IRQ(AR71XX_CPU_IRQ_TIMER);
if (pending & STATUSF_IP7)
do_IRQ(AR71XX_CPU_IRQ_TIMER);
-#ifdef CONFIG_PCI
else if (pending & STATUSF_IP2)
else if (pending & STATUSF_IP2)
- ar71xx_pci_irq_dispatch();
-#endif
+ ar71xx_ip2_irq_handler();
else if (pending & STATUSF_IP4)
do_IRQ(AR71XX_CPU_IRQ_GE0);
else if (pending & STATUSF_IP4)
do_IRQ(AR71XX_CPU_IRQ_GE0);
@@
-277,9
+284,22
@@
void __init arch_init_irq(void)
ar71xx_misc_irq_init();
ar71xx_misc_irq_init();
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
#ifdef CONFIG_PCI
#ifdef CONFIG_PCI
- ar71xx_pci_irq_init();
+ ar71xx_pci_irq_init();
+ ar71xx_ip2_irq_handler = ar71xx_pci_irq_dispatch;
#endif
#endif
+ break;
+ case AR71XX_SOC_AR9130:
+ case AR71XX_SOC_AR9132:
+ ar71xx_ip2_irq_handler = ar913x_wmac_irq_dispatch;
+ break;
+ default:
+ BUG();
+ }
ar71xx_gpio_irq_init();
}
ar71xx_gpio_irq_init();
}