#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/platform.h>
+static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
+
/*
* OHCI (USB full speed host controller)
*/
static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
static struct platform_device ar71xx_usb_ohci_device = {
.name = "ar71xx-ohci",
- .id = 0,
+ .id = -1,
.resource = ar71xx_usb_ohci_resources,
.num_resources = ARRAY_SIZE(ar71xx_usb_ohci_resources),
.dev = {
static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
static struct platform_device ar71xx_usb_ehci_device = {
.name = "ar71xx-ehci",
- .id = 0,
+ .id = -1,
.resource = ar71xx_usb_ehci_resources,
.num_resources = ARRAY_SIZE(ar71xx_usb_ehci_resources),
.dev = {
}
#endif /* CONFIG_AR71XX_EARLY_SERIAL */
+static struct resource ar71xx_mdio_resources[] = {
+ {
+ .name = "mdio_base",
+ .flags = IORESOURCE_MEM,
+ .start = AR71XX_GE0_BASE + 0x20,
+ .end = AR71XX_GE0_BASE + 0x38 - 1,
+ }
+};
+
+static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
+ .phy_mask = 0xffffffff,
+};
+
+static struct platform_device ar71xx_mdio_device = {
+ .name = "ag71xx-mdio",
+ .id = -1,
+ .resource = ar71xx_mdio_resources,
+ .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
+ .dev = {
+ .platform_data = &ar71xx_mdio_data,
+ },
+};
+
+void __init ar71xx_add_device_mdio(u32 phy_mask)
+{
+ ar71xx_mdio_data.phy_mask = phy_mask;
+ platform_device_register(&ar71xx_mdio_device);
+}
+
+static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
+{
+ void __iomem *base;
+ u32 t;
+
+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
+
+ t = __raw_readl(base + cfg_reg);
+ t &= ~(3 << shift);
+ t |= (2 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ __raw_writel(pll_val, base + pll_reg);
+
+ t |= (3 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ t &= ~(3 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
+ (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
+
+ iounmap(base);
+}
+
+static void ar71xx_set_pll_ge0(u32 val)
+{
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
+ val, AR71XX_ETH0_PLL_SHIFT);
+}
+
+static void ar71xx_set_pll_ge1(u32 val)
+{
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
+ val, AR71XX_ETH1_PLL_SHIFT);
+}
+
+static void ar91xx_set_pll_ge0(u32 val)
+{
+ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
+ val, AR91XX_ETH0_PLL_SHIFT);
+}
+
+static void ar91xx_set_pll_ge1(u32 val)
+{
+ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
+ val, AR91XX_ETH1_PLL_SHIFT);
+}
+
+static void ar71xx_ddr_flush_ge0(void)
+{
+ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
+}
+
+static void ar71xx_ddr_flush_ge1(void)
+{
+ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
+}
+
+static void ar91xx_ddr_flush_ge0(void)
+{
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
+}
+
+static void ar91xx_ddr_flush_ge1(void)
+{
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
+}
+
static struct resource ar71xx_eth0_resources[] = {
{
.name = "mac_base",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE0_BASE,
- .end = AR71XX_GE0_BASE + AR71XX_GE0_SIZE - 1,
+ .end = AR71XX_GE0_BASE + 0x20 - 1,
+ }, {
+ .name = "mac_base2",
+ .flags = IORESOURCE_MEM,
+ .start = AR71XX_GE0_BASE + 0x38,
+ .end = AR71XX_GE0_BASE + 0x200 - 1,
}, {
.name = "mii_ctrl",
.flags = IORESOURCE_MEM,
},
};
-static struct ag71xx_platform_data ar71xx_eth0_data = {
+struct ag71xx_platform_data ar71xx_eth0_data = {
.reset_bit = RESET_MODULE_GE0_MAC,
- .flush_reg = DDR_REG_FLUSH_GE0,
};
static struct platform_device ar71xx_eth0_device = {
.name = "mac_base",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE1_BASE,
- .end = AR71XX_GE1_BASE + AR71XX_GE1_SIZE - 1,
+ .end = AR71XX_GE1_BASE + 0x20 - 1,
+ }, {
+ .name = "mac_base2",
+ .flags = IORESOURCE_MEM,
+ .start = AR71XX_GE1_BASE + 0x38,
+ .end = AR71XX_GE1_BASE + 0x200 - 1,
}, {
.name = "mii_ctrl",
.flags = IORESOURCE_MEM,
},
};
-static struct ag71xx_platform_data ar71xx_eth1_data = {
+struct ag71xx_platform_data ar71xx_eth1_data = {
.reset_bit = RESET_MODULE_GE1_MAC,
- .flush_reg = DDR_REG_FLUSH_GE1,
};
static struct platform_device ar71xx_eth1_device = {
},
};
-void __init ar71xx_add_device_eth(unsigned int id, phy_interface_t phy_if_mode,
- u32 phy_mask)
+static int ar71xx_eth_instance __initdata;
+void __init ar71xx_add_device_eth(unsigned int id)
{
struct platform_device *pdev;
+ struct ag71xx_platform_data *pdata;
switch (id) {
case 0:
- switch (phy_if_mode) {
+ switch (ar71xx_eth0_data.phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
break;
ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
break;
default:
- BUG();
+ printk(KERN_ERR "ar71xx: invalid PHY interface mode "
+ "for eth0\n");
+ return;
}
- ar71xx_eth0_data.phy_if_mode = phy_if_mode;
- ar71xx_eth0_data.phy_mask = phy_mask;
pdev = &ar71xx_eth0_device;
break;
case 1:
- switch (phy_if_mode) {
+ switch (ar71xx_eth1_data.phy_if_mode) {
case PHY_INTERFACE_MODE_RMII:
ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
break;
ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
break;
default:
- BUG();
+ printk(KERN_ERR "ar71xx: invalid PHY interface mode "
+ "for eth1\n");
+ return;
}
- ar71xx_eth1_data.phy_if_mode = phy_if_mode;
- ar71xx_eth1_data.phy_mask = phy_mask;
pdev = &ar71xx_eth1_device;
break;
default:
- pdev = NULL;
+ printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
+ return;
+ }
+
+ pdata = pdev->dev.platform_data;
+
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
+ : ar71xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar71xx_set_pll_ge1
+ : ar71xx_set_pll_ge0;
+ break;
+
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
+ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
+ : ar71xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar71xx_set_pll_ge1
+ : ar71xx_set_pll_ge0;
+ pdata->has_gbit = 1;
+ break;
+
+ case AR71XX_SOC_AR9130:
+ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
+ : ar91xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar91xx_set_pll_ge1
+ : ar91xx_set_pll_ge0;
break;
+
+ case AR71XX_SOC_AR9132:
+ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
+ : ar91xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar91xx_set_pll_ge1
+ : ar91xx_set_pll_ge0;
+ pdata->has_gbit = 1;
+ break;
+
+ default:
+ BUG();
}
- if (pdev)
- platform_device_register(pdev);
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_GMII:
+ case PHY_INTERFACE_MODE_RGMII:
+ if (!pdata->has_gbit) {
+ printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
+ id);
+ return;
+ }
+ /* fallthrough */
+ default:
+ break;
+ }
+
+ memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
+ pdata->mac_addr[5] += ar71xx_eth_instance;
+
+ platform_device_register(pdev);
+ ar71xx_eth_instance++;
}
static struct resource ar71xx_spi_resources[] = {
platform_device_register(&ar71xx_spi_device);
}
-static int __init ar71xx_machine_setup(void)
+void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
+ struct gpio_led *leds)
{
- ar71xx_print_cmdline();
+ struct platform_device *pdev;
+ struct gpio_led_platform_data pdata;
+ struct gpio_led *p;
+ int err;
+
+ p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
+ if (!p)
+ return;
+
+ memcpy(p, leds, num_leds * sizeof(*p));
+ pdev = platform_device_alloc("leds-gpio", id);
+ if (!pdev)
+ goto err_free_leds;
+
+ memset(&pdata, 0, sizeof(pdata));
+ pdata.num_leds = num_leds;
+ pdata.leds = leds;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto err_put_pdev;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto err_put_pdev;
+
+ return;
+
+err_put_pdev:
+ platform_device_put(pdev);
+
+err_free_leds:
+ kfree(p);
+}
+
+void __init ar71xx_add_device_gpio_buttons(int id,
+ unsigned poll_interval,
+ unsigned nbuttons,
+ struct gpio_button *buttons)
+{
+ struct platform_device *pdev;
+ struct gpio_buttons_platform_data pdata;
+ struct gpio_button *p;
+ int err;
+
+ p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
+ if (!p)
+ return;
+
+ memcpy(p, buttons, nbuttons * sizeof(*p));
+
+ pdev = platform_device_alloc("gpio-buttons", id);
+ if (!pdev)
+ goto err_free_buttons;
+
+ memset(&pdata, 0, sizeof(pdata));
+ pdata.poll_interval = poll_interval;
+ pdata.nbuttons = nbuttons;
+ pdata.buttons = p;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto err_put_pdev;
+
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto err_put_pdev;
+
+ return;
+
+err_put_pdev:
+ platform_device_put(pdev);
+
+err_free_buttons:
+ kfree(p);
+}
+
+void __init ar71xx_add_device_wdt(void)
+{
+ platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
+}
+
+void __init ar71xx_set_mac_base(unsigned char *mac)
+{
+ memcpy(ar71xx_mac_base, mac, ETH_ALEN);
+}
+
+void __init ar71xx_parse_mac_addr(char *mac_str)
+{
+ u8 tmp[ETH_ALEN];
+ int t;
+
+ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
+
+ if (t == ETH_ALEN)
+ ar71xx_set_mac_base(tmp);
+ else
+ printk(KERN_DEBUG "ar71xx: failed to parse mac address "
+ "\"%s\"\n", mac_str);
+}
+
+static int __init ar71xx_machine_setup(void)
+{
ar71xx_gpio_init();
ar71xx_add_device_uart();
+ ar71xx_add_device_wdt();
mips_machine_setup();
return 0;
projects / openwrt / svn-archive / archive.git / blobdiff