/*
* Atheros AR71xx SoC specific setup
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
#include <asm/traps.h>
#include <asm/time.h> /* for mips_hpt_frequency */
#include <asm/reboot.h> /* for _machine_{restart,halt} */
+#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
-#include <asm/mach-ar71xx/platform.h>
+
+#include "devices.h"
#define AR71XX_SYS_TYPE_LEN 64
#define AR71XX_BASE_FREQ 40000000
#define AR91XX_BASE_FREQ 5000000
-#define AR71XX_MEM_SIZE_MIN 0x0200000
-#define AR71XX_MEM_SIZE_MAX 0x8000000
-
-unsigned long ar71xx_mach_type;
+enum ar71xx_mach_type ar71xx_mach;
u32 ar71xx_cpu_freq;
EXPORT_SYMBOL_GPL(ar71xx_cpu_freq);
ar71xx_detect_sys_type();
detect_sys_frequency();
+ printk(KERN_INFO
+ "%s, CPU:%u.%03u MHz, AHB:%u.%03u MHz, DDR:%u.%03u MHz\n",
+ ar71xx_sys_type,
+ ar71xx_cpu_freq / 1000000, (ar71xx_cpu_freq / 1000) % 1000,
+ ar71xx_ahb_freq / 1000000, (ar71xx_ahb_freq / 1000) % 1000,
+ ar71xx_ddr_freq / 1000000, (ar71xx_ddr_freq / 1000) % 1000);
+
_machine_restart = ar71xx_restart;
_machine_halt = ar71xx_halt;
pm_power_off = ar71xx_halt;
{
mips_hpt_frequency = ar71xx_cpu_freq / 2;
}
+
+static int __init ar71xx_machine_setup(void)
+{
+ ar71xx_gpio_init();
+
+ ar71xx_add_device_uart();
+ ar71xx_add_device_wdt();
+
+ mips_machine_setup(ar71xx_mach);
+ return 0;
+}
+
+arch_initcall(ar71xx_machine_setup);