ar71xx: fix MII clock settings for various chips, improves ethernet stability on...

[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-eth.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 1e6b8b0a17707ae0ec152ca18c968c221066dc54..bc88a44aa761958e201ceeba398f4bf27a3957fb 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -199,17 +199,25 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
 
        switch (ath79_soc) {
        case ATH79_SOC_AR7240:
+               mdio_data->is_ar7240 = 1;
+               /* fall through */
        case ATH79_SOC_AR7241:
+               mdio_data->builtin_switch = 1;
+               break;
+
        case ATH79_SOC_AR9330:
+               mdio_data->is_ar9330 = 1;
+               /* fall through */
        case ATH79_SOC_AR9331:
-               mdio_data->is_ar7240 = 1;
+               mdio_data->builtin_switch = 1;
                break;
 
        case ATH79_SOC_AR9341:
        case ATH79_SOC_AR9342:
        case ATH79_SOC_AR9344:
                if (id == 1)
-                       mdio_data->is_ar7240 = 1;
+                       mdio_data->builtin_switch = 1;
+               mdio_data->is_ar934x = 1;
                break;
 
        default: