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ar71xx: add ethernet initialization for the AR933X SoCs
[openwrt/svn-archive/archive.git]
/
target
/
linux
/
ar71xx
/
files
/
arch
/
mips
/
include
/
asm
/
mach-ar71xx
/
ar71xx.h
diff --git
a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 84f7c476b50fd136e63446c8778b915f5a77583a..8a86a307da73f76e566760f37ed763eb3d1f7168 100644
(file)
--- a/
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@
-604,6
+604,7
@@
void ar71xx_ddr_flush(u32 reg);
#define AR724X_RESET_REG_RESET_MODULE 0x1c
#define AR724X_RESET_REG_RESET_MODULE 0x1c
+#define AR933X_RESET_REG_RESET_MODULE 0x1c
#define AR933X_RESET_REG_BOOTSTRAP 0xac
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
#define AR933X_RESET_REG_BOOTSTRAP 0xac
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
@@
-668,6
+669,11
@@
void ar71xx_ddr_flush(u32 reg);
#define AR724X_RESET_USB_PHY BIT(4)
#define AR724X_RESET_USBSUS_OVERRIDE BIT(3)
#define AR724X_RESET_USB_PHY BIT(4)
#define AR724X_RESET_USBSUS_OVERRIDE BIT(3)
+#define AR933X_RESET_GE1_MDIO BIT(23)
+#define AR933X_RESET_GE0_MDIO BIT(22)
+#define AR933X_RESET_GE1_MAC BIT(13)
+#define AR933X_RESET_GE0_MAC BIT(9)
+
#define REV_ID_MAJOR_MASK 0xfff0
#define REV_ID_MAJOR_AR71XX 0x00a0
#define REV_ID_MAJOR_AR913X 0x00b0
#define REV_ID_MAJOR_MASK 0xfff0
#define REV_ID_MAJOR_AR71XX 0x00a0
#define REV_ID_MAJOR_AR913X 0x00b0