ar71xx: improve 2.6.36 compatibility. also, instead of adding a forward port patch...

[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / drivers / spi / spi_vsc7385.c

diff --git a/target/linux/ar71xx/files/drivers/spi/spi_vsc7385.c b/target/linux/ar71xx/files/drivers/spi/spi_vsc7385.c
index c270b0f05a9e82720983f9150570c6711fb55be3..c16707ed8ca0955f23a51cfda503cd15bc8f2143 100644 (file)
--- a/target/linux/ar71xx/files/drivers/spi/spi_vsc7385.c
+++ b/target/linux/ar71xx/files/drivers/spi/spi_vsc7385.c
@@ -63,10 +63,11 @@
 #define VSC73XX_MAC_CFG_VLAN_DBLAWR    (1 << 15)
 #define VSC73XX_MAC_CFG_VLAN_AWR       (1 << 14)
 #define VSC73XX_MAC_CFG_100_BASE_T     (1 << 13)
-#define VSC73XX_MAC_CFG_TX_IPG(x)      ((x & 0x1f) << 6)
+#define VSC73XX_MAC_CFG_TX_IPG(x)      (((x) & 0x1f) << 6)
 #define VSC73XX_MAC_CFG_MAC_RX_RST     (1 << 5)
 #define VSC73XX_MAC_CFG_MAC_TX_RST     (1 << 4)
-#define VSC73XX_MAC_CFG_CLK_SEL(x)     ((x & 0x3) << 0)
+#define VSC73XX_MAC_CFG_BIT2           (1 << 2)
+#define VSC73XX_MAC_CFG_CLK_SEL(x)     ((x) & 0x3)
 
 /* ADVPORTM register bits */
 #define VSC73XX_ADVPORTM_IFG_PPM       (1 << 7)
@@ -102,6 +103,13 @@
 #define VSC73XX_ICPU_CTRL_CLK_EN       (1 << 1)
 #define VSC73XX_ICPU_CTRL_SRST         (1 << 0)
 
+#define VSC73XX_ICPU_CHIPID_ID_SHIFT   12
+#define VSC73XX_ICPU_CHIPID_ID_MASK    0xffff
+#define VSC73XX_ICPU_CHIPID_REV_SHIFT  28
+#define VSC73XX_ICPU_CHIPID_REV_MASK   0xf
+#define VSC73XX_ICPU_CHIPID_ID_7385    0x7385
+#define VSC73XX_ICPU_CHIPID_ID_7395    0x7395
+
 #define VSC73XX_CMD_MODE_READ          0
 #define VSC73XX_CMD_MODE_WRITE         1
 #define VSC73XX_CMD_MODE_SHIFT         4
@@ -138,12 +146,10 @@
                                 VSC73XX_MAC_CFG_MAC_RX_RST | \
                                 VSC73XX_MAC_CFG_MAC_TX_RST)
 
-#define VSC7385_MAC_CFG_INIT   (VSC73XX_MAC_CFG_TX_EN | \
+#define VSC73XX_MAC_CFG_INIT   (VSC73XX_MAC_CFG_TX_EN | \
                                 VSC73XX_MAC_CFG_FDX | \
                                 VSC73XX_MAC_CFG_GIGE | \
-                                VSC73XX_MAC_CFG_RX_EN | \
-                                VSC73XX_MAC_CFG_TX_IPG(6) | \
-                                4)
+                                VSC73XX_MAC_CFG_RX_EN)
 
 #define VSC73XX_RESET_DELAY    100
 
@@ -431,6 +437,8 @@ static int vsc7385_upload_ucode(struct vsc7385 *vsc)
 
 static int vsc7385_setup(struct vsc7385 *vsc)
 {
+       struct vsc7385_platform_data *pdata = vsc->pdata;
+       u32 t;
        int err;
 
        err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_SYSTEM, 0,
@@ -454,8 +462,14 @@ static int vsc7385_setup(struct vsc7385 *vsc)
        if (err)
                goto err;
 
+       t = VSC73XX_MAC_CFG_INIT;
+       t |= VSC73XX_MAC_CFG_TX_IPG(pdata->mac_cfg.tx_ipg);
+       t |= VSC73XX_MAC_CFG_CLK_SEL(pdata->mac_cfg.clk_sel);
+       if (pdata->mac_cfg.bit2)
+               t |= VSC73XX_MAC_CFG_BIT2;
+
        err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC,
-                           VSC73XX_MAC_CFG, VSC7385_MAC_CFG_INIT);
+                           VSC73XX_MAC_CFG, t);
        if (err)
                goto err;
 
@@ -494,16 +508,18 @@ static int vsc7385_detect(struct vsc7385 *vsc)
                return err;
        }
 
-       id = (t >> 12) & 0xffff;
+       id = (t >> VSC73XX_ICPU_CHIPID_ID_SHIFT) & VSC73XX_ICPU_CHIPID_ID_MASK;
        switch (id) {
-       case 0x7385:
+       case VSC73XX_ICPU_CHIPID_ID_7385:
+       case VSC73XX_ICPU_CHIPID_ID_7395:
                break;
        default:
                dev_err(&spi->dev, "unsupported chip, id=%04x\n", id);
                return -ENODEV;
        }
 
-       rev = (t >> 28) & 0xf;
+       rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) &
+             VSC73XX_ICPU_CHIPID_REV_MASK;
        dev_info(&spi->dev, "VSC%04X (rev. %d) switch found \n", id, rev);
 
        return 0;