[brcm63xx] make bcm6358 consistend with the other boards naming

[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / files / arch / mips / bcm63xx / cpu.c

diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
index b7c041f60df4b5fd83ad1116f80ad78eecb9eccb..362d109c73ffca9dad75dd1bfc22ddbb2d3feb46 100644 (file)
--- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
+++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
@@ -4,6 +4,7 @@
  * for more details.
  *
  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ *              2009 Florian Fainelli <florian@openwrt.org>
  */
 
 #include <linux/kernel.h>
@@ -20,6 +21,9 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
 const int *bcm63xx_irqs;
 EXPORT_SYMBOL(bcm63xx_irqs);
 
+const unsigned long *bcm63xx_regs_spi;
+EXPORT_SYMBOL(bcm63xx_regs_spi);
+
 static u16 bcm63xx_cpu_id;
 static u16 bcm63xx_cpu_rev;
 static unsigned int bcm63xx_cpu_freq;
@@ -36,6 +40,7 @@ static const unsigned long bcm96338_regs_base[] = {
        [RSET_UART0]            = BCM_6338_UART0_BASE,
        [RSET_GPIO]             = BCM_6338_GPIO_BASE,
        [RSET_SPI]              = BCM_6338_SPI_BASE,
+       [RSET_MEMC]             = BCM_6338_MEMC_BASE,
 };
 
 static const int bcm96338_irqs[] = {
@@ -48,6 +53,21 @@ static const int bcm96338_irqs[] = {
        [IRQ_ENET0_TXDMA]       = BCM_6338_ENET0_TXDMA_IRQ,
 };
 
+static const unsigned long bcm96338_regs_spi[] = {
+       [SPI_CMD]               = SPI_BCM_6338_SPI_CMD,
+       [SPI_INT_STATUS]        = SPI_BCM_6338_SPI_INT_STATUS,
+       [SPI_INT_MASK_ST]       = SPI_BCM_6338_SPI_MASK_INT_ST,
+       [SPI_INT_MASK]          = SPI_BCM_6338_SPI_INT_MASK,
+       [SPI_ST]                = SPI_BCM_6338_SPI_ST,
+       [SPI_CLK_CFG]           = SPI_BCM_6338_SPI_CLK_CFG,
+       [SPI_FILL_BYTE]         = SPI_BCM_6338_SPI_FILL_BYTE,
+       [SPI_MSG_TAIL]          = SPI_BCM_6338_SPI_MSG_TAIL,
+       [SPI_RX_TAIL]           = SPI_BCM_6338_SPI_RX_TAIL,
+       [SPI_MSG_CTL]           = SPI_BCM_6338_SPI_MSG_CTL,
+       [SPI_MSG_DATA]          = SPI_BCM_6338_SPI_MSG_DATA,
+       [SPI_RX_DATA]           = SPI_BCM_6338_SPI_RX_DATA,
+};
+
 /*
  * 6348 register sets and irqs
  */
@@ -89,6 +109,21 @@ static const int bcm96348_irqs[] = {
        [IRQ_PCI]               = BCM_6348_PCI_IRQ,
 };
 
+static const unsigned long bcm96348_regs_spi[] = {
+       [SPI_CMD]               = SPI_BCM_6348_SPI_CMD,
+       [SPI_INT_STATUS]        = SPI_BCM_6348_SPI_INT_STATUS,
+       [SPI_INT_MASK_ST]       = SPI_BCM_6348_SPI_MASK_INT_ST,
+       [SPI_INT_MASK]          = SPI_BCM_6348_SPI_INT_MASK,
+       [SPI_ST]                = SPI_BCM_6348_SPI_ST,
+       [SPI_CLK_CFG]           = SPI_BCM_6348_SPI_CLK_CFG,
+       [SPI_FILL_BYTE]         = SPI_BCM_6348_SPI_FILL_BYTE,
+       [SPI_MSG_TAIL]          = SPI_BCM_6348_SPI_MSG_TAIL,
+       [SPI_RX_TAIL]           = SPI_BCM_6348_SPI_RX_TAIL,
+       [SPI_MSG_CTL]           = SPI_BCM_6348_SPI_MSG_CTL,
+       [SPI_MSG_DATA]          = SPI_BCM_6348_SPI_MSG_DATA,
+       [SPI_RX_DATA]           = SPI_BCM_6348_SPI_RX_DATA,
+};
+
 /*
  * 6358 register sets and irqs
  */
@@ -132,6 +167,21 @@ static const int bcm96358_irqs[] = {
        [IRQ_PCI]               = BCM_6358_PCI_IRQ,
 };
 
+static const unsigned long bcm96358_regs_spi[] = {
+       [SPI_CMD]               = SPI_BCM_6358_SPI_CMD,
+       [SPI_INT_STATUS]        = SPI_BCM_6358_SPI_INT_STATUS,
+       [SPI_INT_MASK_ST]       = SPI_BCM_6358_SPI_MASK_INT_ST,
+       [SPI_INT_MASK]          = SPI_BCM_6358_SPI_INT_MASK,
+       [SPI_ST]                = SPI_BCM_6358_SPI_STATUS,
+       [SPI_CLK_CFG]           = SPI_BCM_6358_SPI_CLK_CFG,
+       [SPI_FILL_BYTE]         = SPI_BCM_6358_SPI_FILL_BYTE,
+       [SPI_MSG_TAIL]          = SPI_BCM_6358_SPI_MSG_TAIL,
+       [SPI_RX_TAIL]           = SPI_BCM_6358_SPI_RX_TAIL,
+       [SPI_MSG_CTL]           = SPI_BCM_6358_MSG_CTL,
+       [SPI_MSG_DATA]          = SPI_BCM_6358_SPI_MSG_DATA,
+       [SPI_RX_DATA]           = SPI_BCM_6358_SPI_RX_DATA,
+};
+
 u16 __bcm63xx_get_cpu_id(void)
 {
        return bcm63xx_cpu_id;
@@ -235,16 +285,19 @@ void __init bcm63xx_cpu_init(void)
                expected_cpu_id = BCM6338_CPU_ID;
                bcm63xx_regs_base = bcm96338_regs_base;
                bcm63xx_irqs = bcm96338_irqs;
+               bcm63xx_regs_spi = bcm96338_regs_spi;
                break;
        case CPU_BCM6348:
                expected_cpu_id = BCM6348_CPU_ID;
                bcm63xx_regs_base = bcm96348_regs_base;
                bcm63xx_irqs = bcm96348_irqs;
+               bcm63xx_regs_spi = bcm96348_regs_spi;
                break;
        case CPU_BCM6358:
                expected_cpu_id = BCM6358_CPU_ID;
                bcm63xx_regs_base = bcm96358_regs_base;
                bcm63xx_irqs = bcm96358_irqs;
+               bcm63xx_regs_spi = bcm96358_regs_spi;
                break;
        }
 
@@ -270,7 +323,7 @@ void __init bcm63xx_cpu_init(void)
 
        printk(KERN_INFO "Detected Broadcom 0x%04x CPU revision %02x\n",
               bcm63xx_cpu_id, bcm63xx_cpu_rev);
-       printk(KERN_INFO "CPU frequency is %u MHz\n",
+       printk(KERN_INFO "CPU frequency is %u Hz\n",
               bcm63xx_cpu_freq);
        printk(KERN_INFO "%uMB of RAM installed\n",
               bcm63xx_memory_size >> 20);