[ifxmips] add register definitions for ebu

[openwrt/svn-archive/archive.git] / target / linux / ifxmips / files / arch / mips / include / asm / mach-ifxmips / ifxmips.h

diff --git a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips.h b/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips.h
index c8cf0aef5c6226b33478f69f9069ebf0875131ec..7d5ae23bee7b7e4f18337af11344a5d9f0429ccd 100644 (file)
--- a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips.h
+++ b/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips.h
@@ -143,7 +143,8 @@
 #define IFXMIPS_EBU_PCC_CON            ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x0090))
 #define IFXMIPS_EBU_PCC_IEN            ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x00A4))
 #define IFXMIPS_EBU_PCC_ISTAT          ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x00A0))
 #define IFXMIPS_EBU_PCC_CON            ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x0090))
 #define IFXMIPS_EBU_PCC_IEN            ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x00A4))
 #define IFXMIPS_EBU_PCC_ISTAT          ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x00A0))

-
+#define IFXMIPS_EBU_BUSCON1     ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x0064))
+#define IFXMIPS_EBU_ADDRSEL1     ((u32 *)(IFXMIPS_EBU_BASE_ADDR + 0x0024))

 
 /*------------ CGU */
 #define IFXMIPS_CGU_BASE_ADDR          (KSEG1 + 0x1F103000)
 
 /*------------ CGU */
 #define IFXMIPS_CGU_BASE_ADDR          (KSEG1 + 0x1F103000)


@@ -223,7 +224,7 @@
 #define MDIO_ACC_READ                  0x40000000
 #define MDIO_ACC_ADDR_MASK             0x1f
 #define MDIO_ACC_ADDR_OFFSET           0x15
 #define MDIO_ACC_READ                  0x40000000
 #define MDIO_ACC_ADDR_MASK             0x1f
 #define MDIO_ACC_ADDR_OFFSET           0x15

-#define MDIO_ACC_REG_MASK              0xff
+#define MDIO_ACC_REG_MASK              0x1f

 #define MDIO_ACC_REG_OFFSET            0x10
 #define MDIO_ACC_VAL_MASK              0xffff
 
 #define MDIO_ACC_REG_OFFSET            0x10
 #define MDIO_ACC_VAL_MASK              0xffff