static struct semaphore port_sem;
/* TODO do we really need this ? return in a define is forbidden by coding style */
-#define DANUBE_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; }
+#define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; }
int
danube_port_reserve_pin (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
+ IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
return 0;
int
danube_port_free_pin (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
+ IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
return 0;
int
danube_port_set_open_drain (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_OD + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_OD);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OD);
return 0;
}
int
danube_port_clear_open_drain (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_OD + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_OD);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OD);
return 0;
}
int
danube_port_set_pudsel (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_PUDSEL + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_PUDSEL);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0;
}
int
danube_port_clear_pudsel (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_PUDSEL + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_PUDSEL);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0;
}
int
danube_port_set_puden (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_PUDEN + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_PUDEN);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0;
}
int
danube_port_clear_puden (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_PUDEN + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_PUDEN);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0;
}
int
danube_port_set_stoff (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_STOFF + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_STOFF);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0;
}
int
danube_port_clear_stoff (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_STOFF + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_STOFF);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0;
}
int
danube_port_set_dir_out (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_DIR + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_DIR);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0;
}
int
danube_port_set_dir_in (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_DIR + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_DIR);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0;
}
int
danube_port_set_output (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_OUT + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_OUT);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0;
}
int
danube_port_clear_output (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_OUT + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_OUT);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0;
}
int
danube_port_get_input (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
+ IFXMIPS_GPIO_SANITY;
- if (readl(DANUBE_GPIO_P0_IN + (port * 0x30)) & (1 << pin))
+ if (readl(IFXMIPS_GPIO_P0_IN + (port * 0x30)) & (1 << pin))
return 0;
else
return 1;
int
danube_port_set_altsel0 (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_ALTSEL0 + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_ALTSEL0);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0;
}
int
danube_port_clear_altsel0 (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_ALTSEL0 + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_ALTSEL0);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0;
}
int
danube_port_set_altsel1 (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_ALTSEL1 + (port * 0x30)) | (1 << pin), DANUBE_GPIO_P0_ALTSEL1);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0;
}
int
danube_port_clear_altsel1 (unsigned int port, unsigned int pin)
{
- DANUBE_GPIO_SANITY;
- writel(readl(DANUBE_GPIO_P0_ALTSEL1 + (port * 0x30)) & ~(1 << pin), DANUBE_GPIO_P0_ALTSEL1);
+ IFXMIPS_GPIO_SANITY;
+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0;
}
len += sprintf (buf + len,
"----------------------------------------\n");
- len += danube_port_read_procmem_helper("P0-OUT", DANUBE_GPIO_P0_OUT, &buf[len]);
- len += danube_port_read_procmem_helper("P1-OUT", DANUBE_GPIO_P1_OUT, &buf[len]);
- len += danube_port_read_procmem_helper("P0-IN ", DANUBE_GPIO_P0_IN, &buf[len]);
- len += danube_port_read_procmem_helper("P1-IN ", DANUBE_GPIO_P1_IN, &buf[len]);
- len += danube_port_read_procmem_helper("P0-DIR", DANUBE_GPIO_P0_DIR, &buf[len]);
- len += danube_port_read_procmem_helper("P1-DIR", DANUBE_GPIO_P1_DIR, &buf[len]);
- len += danube_port_read_procmem_helper("P0-STO ", DANUBE_GPIO_P0_STOFF, &buf[len]);
- len += danube_port_read_procmem_helper("P1-STO ", DANUBE_GPIO_P1_STOFF, &buf[len]);
- len += danube_port_read_procmem_helper("P0-PUDE", DANUBE_GPIO_P0_PUDEN, &buf[len]);
- len += danube_port_read_procmem_helper("P1-PUDE", DANUBE_GPIO_P1_PUDEN, &buf[len]);
- len += danube_port_read_procmem_helper("P0-OD ", DANUBE_GPIO_P0_OD, &buf[len]);
- len += danube_port_read_procmem_helper("P1-OD ", DANUBE_GPIO_P1_OD, &buf[len]);
- len += danube_port_read_procmem_helper("P0-PUDS", DANUBE_GPIO_P0_PUDSEL, &buf[len]);
- len += danube_port_read_procmem_helper("P1-PUDS", DANUBE_GPIO_P1_PUDSEL, &buf[len]);
- len += danube_port_read_procmem_helper("P0-ALT0", DANUBE_GPIO_P0_ALTSEL0, &buf[len]);
- len += danube_port_read_procmem_helper("P1-ALT0", DANUBE_GPIO_P1_ALTSEL0, &buf[len]);
- len += danube_port_read_procmem_helper("P0-ALT1", DANUBE_GPIO_P0_ALTSEL1, &buf[len]);
- len += danube_port_read_procmem_helper("P1-ALT1", DANUBE_GPIO_P1_ALTSEL1, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-OUT", IFXMIPS_GPIO_P0_OUT, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-OUT", IFXMIPS_GPIO_P1_OUT, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-IN ", IFXMIPS_GPIO_P0_IN, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-IN ", IFXMIPS_GPIO_P1_IN, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-DIR", IFXMIPS_GPIO_P0_DIR, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-DIR", IFXMIPS_GPIO_P1_DIR, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-STO ", IFXMIPS_GPIO_P0_STOFF, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-STO ", IFXMIPS_GPIO_P1_STOFF, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-PUDE", IFXMIPS_GPIO_P0_PUDEN, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-PUDE", IFXMIPS_GPIO_P1_PUDEN, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-OD ", IFXMIPS_GPIO_P0_OD, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-OD ", IFXMIPS_GPIO_P1_OD, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-PUDS", IFXMIPS_GPIO_P0_PUDSEL, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-PUDS", IFXMIPS_GPIO_P1_PUDSEL, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-ALT0", IFXMIPS_GPIO_P0_ALTSEL0, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-ALT0", IFXMIPS_GPIO_P1_ALTSEL0, &buf[len]);
+ len += danube_port_read_procmem_helper("P0-ALT1", IFXMIPS_GPIO_P0_ALTSEL1, &buf[len]);
+ len += danube_port_read_procmem_helper("P1-ALT1", IFXMIPS_GPIO_P1_ALTSEL1, &buf[len]);
len = len + sprintf (buf + len, "\n\n");
*eof = 1;
int ret = 0;
volatile struct danube_port_ioctl_parm parm;
- if (_IOC_TYPE (cmd) != DANUBE_PORT_IOC_MAGIC)
+ if (_IOC_TYPE (cmd) != IFXMIPS_PORT_IOC_MAGIC)
return -EINVAL;
if (_IOC_DIR (cmd) & _IOC_WRITE) {
return -EBUSY;
switch (cmd) {
- case DANUBE_PORT_IOCOD:
+ case IFXMIPS_PORT_IOCOD:
if (parm.value == 0x00)
danube_port_clear_open_drain(parm.port, parm.pin);
else
danube_port_set_open_drain(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCPUDSEL:
+ case IFXMIPS_PORT_IOCPUDSEL:
if (parm.value == 0x00)
danube_port_clear_pudsel(parm.port, parm.pin);
else
danube_port_set_pudsel(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCPUDEN:
+ case IFXMIPS_PORT_IOCPUDEN:
if (parm.value == 0x00)
danube_port_clear_puden(parm.port, parm.pin);
else
danube_port_set_puden(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCSTOFF:
+ case IFXMIPS_PORT_IOCSTOFF:
if (parm.value == 0x00)
danube_port_clear_stoff(parm.port, parm.pin);
else
danube_port_set_stoff(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCDIR:
+ case IFXMIPS_PORT_IOCDIR:
if (parm.value == 0x00)
danube_port_set_dir_in(parm.port, parm.pin);
else
danube_port_set_dir_out(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCOUTPUT:
+ case IFXMIPS_PORT_IOCOUTPUT:
if (parm.value == 0x00)
danube_port_clear_output(parm.port, parm.pin);
else
danube_port_set_output(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCALTSEL0:
+ case IFXMIPS_PORT_IOCALTSEL0:
if (parm.value == 0x00)
danube_port_clear_altsel0(parm.port, parm.pin);
else
danube_port_set_altsel0(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCALTSEL1:
+ case IFXMIPS_PORT_IOCALTSEL1:
if (parm.value == 0x00)
danube_port_clear_altsel1(parm.port, parm.pin);
else
danube_port_set_altsel1(parm.port, parm.pin);
break;
- case DANUBE_PORT_IOCINPUT:
+ case IFXMIPS_PORT_IOCINPUT:
parm.value = danube_port_get_input(parm.port, parm.pin);
copy_to_user((void*)arg, (void*)&parm,
sizeof(struct danube_port_ioctl_parm));