danube to ifxmips transition
[openwrt/svn-archive/archive.git] / target / linux / ifxmips / files / include / asm-mips / danube / danube_wdt.h
index 1c31fc9ee2fede5dd06028fd2334da073f924d3f..34833e8ea9dfe87bcda4238d12cffb8a2259f09d 100644 (file)
  *
  */
 
-#ifndef DANUBE_WDT_H
-#define DANUBE_WDT_H
+#ifndef IFXMIPS_WDT_H
+#define IFXMIPS_WDT_H
 
-/* Danube wdt ioctl control */
-#define DANUBE_WDT_IOC_MAGIC                   0xc0
-#define DANUBE_WDT_IOC_START                   _IOW(DANUBE_WDT_IOC_MAGIC, 0, int)
-#define DANUBE_WDT_IOC_STOP                            _IO(DANUBE_WDT_IOC_MAGIC, 1)
-#define DANUBE_WDT_IOC_PING                            _IO(DANUBE_WDT_IOC_MAGIC, 2)
-#define DANUBE_WDT_IOC_SET_PWL                 _IOW(DANUBE_WDT_IOC_MAGIC, 3, int)
-#define DANUBE_WDT_IOC_SET_DSEN                        _IOW(DANUBE_WDT_IOC_MAGIC, 4, int)
-#define DANUBE_WDT_IOC_SET_LPEN                        _IOW(DANUBE_WDT_IOC_MAGIC, 5, int)
-#define DANUBE_WDT_IOC_GET_STATUS              _IOR(DANUBE_WDT_IOC_MAGIC, 6, int)
-#define DANUBE_WDT_IOC_SET_CLKDIV              _IOW(DANUBE_WDT_IOC_MAGIC, 7, int)
+/* IFXMips wdt ioctl control */
+#define IFXMIPS_WDT_IOC_MAGIC                  0xc0
+#define IFXMIPS_WDT_IOC_START                  _IOW(IFXMIPS_WDT_IOC_MAGIC, 0, int)
+#define IFXMIPS_WDT_IOC_STOP                           _IO(IFXMIPS_WDT_IOC_MAGIC, 1)
+#define IFXMIPS_WDT_IOC_PING                           _IO(IFXMIPS_WDT_IOC_MAGIC, 2)
+#define IFXMIPS_WDT_IOC_SET_PWL                        _IOW(IFXMIPS_WDT_IOC_MAGIC, 3, int)
+#define IFXMIPS_WDT_IOC_SET_DSEN                       _IOW(IFXMIPS_WDT_IOC_MAGIC, 4, int)
+#define IFXMIPS_WDT_IOC_SET_LPEN                       _IOW(IFXMIPS_WDT_IOC_MAGIC, 5, int)
+#define IFXMIPS_WDT_IOC_GET_STATUS             _IOR(IFXMIPS_WDT_IOC_MAGIC, 6, int)
+#define IFXMIPS_WDT_IOC_SET_CLKDIV             _IOW(IFXMIPS_WDT_IOC_MAGIC, 7, int)
 
 /* password 1 and 2 */
-#define DANUBE_WDT_PW1                                  0x000000BE
-#define DANUBE_WDT_PW2                                  0x000000DC
+#define IFXMIPS_WDT_PW1                                         0x000000BE
+#define IFXMIPS_WDT_PW2                                         0x000000DC
 
-#define DANUBE_WDT_CLKDIV0_VAL                 1
-#define DANUBE_WDT_CLKDIV1_VAL                 64
-#define DANUBE_WDT_CLKDIV2_VAL                 4096
-#define DANUBE_WDT_CLKDIV3_VAL                 262144
-#define DANUBE_WDT_CLKDIV0                             0
-#define DANUBE_WDT_CLKDIV1                             1
-#define DANUBE_WDT_CLKDIV2                             2
-#define DANUBE_WDT_CLKDIV3                             3
+#define IFXMIPS_WDT_CLKDIV0_VAL                        1
+#define IFXMIPS_WDT_CLKDIV1_VAL                        64
+#define IFXMIPS_WDT_CLKDIV2_VAL                        4096
+#define IFXMIPS_WDT_CLKDIV3_VAL                        262144
+#define IFXMIPS_WDT_CLKDIV0                            0
+#define IFXMIPS_WDT_CLKDIV1                            1
+#define IFXMIPS_WDT_CLKDIV2                            2
+#define IFXMIPS_WDT_CLKDIV3                            3
 
 #endif