/dts-v1/;
-/include/ "rt3050.dtsi"
+#include "rt3050.dtsi"
/ {
compatible = "WL-351", "ralink,rt3052-soc";
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
-
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
};
esw@10110000 {
- ralink,portmap = <0x3f>;
+ mediatek,portmap = <0x3f>;
ralink,fct2 = <0x0002500c>;
/*
* ext phy base addr 31, rx/tx clock skew 0,
gpio-leds {
compatible = "gpio-leds";
+
power {
label = "wl-351:amber:power";
gpios = <&gpio0 8 1>;
};
+
unpopulated {
label = "wl-351:amber:unpopulated";
gpios = <&gpio0 12 1>;
};
+
unpopulated2 {
label = "wl-351:blue:unpopulated";
gpios = <&gpio0 13 1>;
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
+
reset {
label = "reset";
gpios = <&gpio0 10 1>;
linux,code = <0x198>;
};
+
wps {
label = "wps";
gpios = <&gpio0 0 1>;
};
rtl8366rb {
- compatible = "rtl8367rb";
+ compatible = "rtl8366rb";
gpio-sda = <&gpio0 1 0>;
gpio-sck = <&gpio0 2 0>;
};