ramips: remove interrupt coalescing, it is unnecessary with napi polling and could...

[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / ralink_soc_eth.h

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
index e5171b25e33b9f3589432abf7e904a86109077ab..d26acf23d537d7ff53b5f7dcb468258339c9b65c 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
@@ -40,6 +40,7 @@ enum fe_reg {
        FE_REG_FE_INT_STATUS,
        FE_REG_FE_DMA_VID_BASE,
        FE_REG_FE_COUNTER_BASE,
+       FE_REG_FE_RST_GL,
        FE_REG_COUNT
 };
 
@@ -78,8 +79,22 @@ enum fe_reg {
 #define FE_TX_DLY_INT          BIT(1)
 #define FE_RX_DLY_INT          BIT(0)
 
+#define FE_RX_DONE_INT         FE_RX_DONE_INT0
+#define FE_TX_DONE_INT         (FE_TX_DONE_INT0 | FE_TX_DONE_INT1 | \
+                                FE_TX_DONE_INT2 | FE_TX_DONE_INT3)
+
 #define RT5350_RX_DLY_INT      BIT(30)
 #define RT5350_TX_DLY_INT      BIT(28)
+#define RT5350_RX_DONE_INT1    BIT(17)
+#define RT5350_RX_DONE_INT0    BIT(16)
+#define RT5350_TX_DONE_INT3    BIT(3)
+#define RT5350_TX_DONE_INT2    BIT(2)
+#define RT5350_TX_DONE_INT1    BIT(1)
+#define RT5350_TX_DONE_INT0    BIT(0)
+
+#define RT5350_RX_DONE_INT     (RT5350_RX_DONE_INT0 | RT5350_RX_DONE_INT1)
+#define RT5350_TX_DONE_INT     (RT5350_TX_DONE_INT0 | RT5350_TX_DONE_INT1 | \
+                                RT5350_TX_DONE_INT2 | RT5350_TX_DONE_INT3)
 
 /* registers */
 #define FE_FE_OFFSET           0x0000
@@ -125,7 +140,11 @@ enum fe_reg {
 #define FE_CDMA_CSG_CFG                (FE_CDMA_OFFSET + 0x00)
 #define FE_CDMA_SCH_CFG                (FE_CDMA_OFFSET + 0x04)
 
+#ifdef CONFIG_SOC_MT7621
+#define MT7620A_GDMA_OFFSET            0x0500
+#else
 #define MT7620A_GDMA_OFFSET            0x0600
+#endif
 #define        MT7620A_GDMA1_FWD_CFG           (MT7620A_GDMA_OFFSET + 0x00)
 #define MT7620A_FE_GDMA1_SCH_CFG       (MT7620A_GDMA_OFFSET + 0x04)
 #define MT7620A_FE_GDMA1_SHPR_CFG      (MT7620A_GDMA_OFFSET + 0x08)
@@ -294,6 +313,7 @@ struct fe_rx_dma {
 #define TX_DMA_LS0             BIT(30)
 #define TX_DMA_DONE            BIT(31)
 
+#define TX_DMA_INS_VLAN_MT7621 BIT(16)
 #define TX_DMA_INS_VLAN                BIT(7)
 #define TX_DMA_INS_PPPOE       BIT(12)
 #define TX_DMA_QN(_x)          ((_x) << 16)
@@ -361,8 +381,8 @@ struct fe_soc_data
 
        void *swpriv;
        u32 pdma_glo_cfg;
-       u32 rx_dly_int;
-       u32 tx_dly_int;
+       u32 rx_int;
+       u32 tx_int;
        u32 checksum_bit;
        u32 tx_udf_bit;
 };
@@ -426,6 +446,7 @@ struct fe_priv
        int                             link[8];
 
        struct fe_hw_stats              *hw_stats;
+       unsigned long                   vlan_map;
 };
 
 extern const struct of_device_id of_fe_match[];