X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=blobdiff_plain;f=target%2Flinux%2Far7-2.6%2Ffiles%2Farch%2Fmips%2Far7%2Fplatform.c;h=cae35bc2290655b9ef97944baef7698bcd53e104;hp=ea170edc6af4f0ac327d78b527145655d1736b5b;hb=b018311a31d2d2d4fd89ce3e0224ec943c750709;hpb=4d501c979361e4b414902f47ea5ceb903b3bdb78 diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c b/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c index ea170edc6a..cae35bc229 100644 --- a/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c +++ b/target/linux/ar7-2.6/files/arch/mips/ar7/platform.c @@ -32,6 +32,7 @@ #include #include #include +#include #include struct plat_vlynq_data { @@ -89,7 +90,7 @@ static struct resource physmap_flash_resource = { .name = "mem", .flags = IORESOURCE_MEM, .start = 0x10000000, - .end = 0x103fffff, + .end = 0x107fffff, }; static struct resource cpmac_low_res[] = { @@ -251,30 +252,40 @@ static struct platform_device vlynq_high = { * as xscale and, obviously, don't work... */ #if !defined(CONFIG_SERIAL_8250) + +static struct plat_serial8250_port uart0_data = +{ + .mapbase = AR7_REGS_UART0, + .irq = AR7_IRQ_UART0, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, +}; + +static struct plat_serial8250_port uart1_data = +{ + .mapbase = UR8_REGS_UART1, + .irq = AR7_IRQ_UART1, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, +}; + static struct plat_serial8250_port uart_data[] = { - { - .mapbase = AR7_REGS_UART0, - .irq = AR7_IRQ_UART0, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - }, - { - .mapbase = AR7_REGS_UART1, - .irq = AR7_IRQ_UART1, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - }, - { - .flags = 0, - }, + uart0_data, + uart1_data, + { .flags = 0 } +}; + +static struct plat_serial8250_port uart_data_single[] = { + uart0_data, + { .flags = 0 } }; static struct platform_device uart = { .id = 0, .name = "serial8250", - .dev.platform_data = uart_data, + .dev.platform_data = uart_data_single }; #endif @@ -316,12 +327,13 @@ static int __init ar7_register_devices(void) { int res; -#if defined(CONFIG_SERIAL_8250) +#ifdef CONFIG_SERIAL_8250 + static struct uart_port uart_port[2]; memset(uart_port, 0, sizeof(struct uart_port) * 2); - uart_port[0].type = PORT_16750; + uart_port[0].type = PORT_AR7; uart_port[0].line = 0; uart_port[0].irq = AR7_IRQ_UART0; uart_port[0].uartclk = ar7_bus_freq() / 2; @@ -333,24 +345,38 @@ static int __init ar7_register_devices(void) if (res) return res; - uart_port[1].type = PORT_16750; - uart_port[1].line = 1; - uart_port[1].irq = AR7_IRQ_UART1; - uart_port[1].uartclk = ar7_bus_freq() / 2; - uart_port[1].iotype = UPIO_MEM; - uart_port[1].mapbase = AR7_REGS_UART1; - uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); - uart_port[1].regshift = 2; - res = early_serial_setup(&uart_port[1]); - if (res) - return res; -#else + + // Only TNETD73xx have a second serial port + if (ar7_has_second_uart()) { + uart_port[1].type = PORT_AR7; + uart_port[1].line = 1; + uart_port[1].irq = AR7_IRQ_UART1; + uart_port[1].uartclk = ar7_bus_freq() / 2; + uart_port[1].iotype = UPIO_MEM; + uart_port[1].mapbase = UR8_REGS_UART1; + uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); + uart_port[1].regshift = 2; + res = early_serial_setup(&uart_port[1]); + if (res) + return res; + } + +#else // !CONFIG_SERIAL_8250 + uart_data[0].uartclk = ar7_bus_freq() / 2; uart_data[1].uartclk = uart_data[0].uartclk; + + // Only TNETD73xx have a second serial port + if (ar7_has_second_uart()) { + uart.dev.platform_data = uart_data; + } + res = platform_device_register(&uart); if (res) return res; -#endif + +#endif // CONFIG_SERIAL_8250 + res = platform_device_register(&physmap_flash); if (res) return res;