X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=blobdiff_plain;f=target%2Flinux%2Far7%2Fpatches-2.6.22%2F100-board_support.patch;h=c7ea6cc2ae957cc1875aa647c6c65ea245173f47;hp=5989580ee8368778a8382df98b8646518ed3f245;hb=bfe9a8033926d2bdb77052e04320c4db1ca1555c;hpb=5c903cc55c673e5e6eda9c78f51a81b715eb4eec diff --git a/target/linux/ar7/patches-2.6.22/100-board_support.patch b/target/linux/ar7/patches-2.6.22/100-board_support.patch index 5989580ee8..c7ea6cc2ae 100644 --- a/target/linux/ar7/patches-2.6.22/100-board_support.patch +++ b/target/linux/ar7/patches-2.6.22/100-board_support.patch @@ -1,7 +1,7 @@ diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig --- linux-2.6.22/arch/mips/Kconfig 2007-07-09 01:32:17.000000000 +0200 +++ linux-2.6.22.new/arch/mips/Kconfig 2007-07-11 02:34:51.000000000 +0200 -@@ -15,6 +15,20 @@ +@@ -15,6 +15,21 @@ prompt "System type" default SGI_IP22 @@ -17,6 +17,7 @@ diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_KGDB + select SYS_SUPPORTS_LITTLE_ENDIAN ++ select SYS_SUPPORTS_BIG_ENDIAN + select GENERIC_GPIO + config MACH_ALCHEMY @@ -25,37 +26,35 @@ diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c --- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200 +++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200 -@@ -1051,11 +1051,6 @@ - unsigned long exception_handlers[32]; - unsigned long vi_handlers[64]; - --/* -- * As a side effect of the way this is implemented we're limited -- * to interrupt handlers in the address range from -- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ... -- */ - void *set_except_vector(int n, void *addr) - { - unsigned long handler = (unsigned long) addr; -@@ -1063,9 +1058,15 @@ +@@ -1074,11 +1074,23 @@ void *set_except_vector(int n, void *addr) + unsigned long old_handler = exception_handlers[n]; exception_handlers[n] = handler; - if (n == 0 && cpu_has_divec) { +- if (n == 0 && cpu_has_divec) { - *(volatile u32 *)(ebase + 0x200) = 0x08000000 | - (0x03ffffff & (handler >> 2)); - flush_icache_range(ebase + 0x200, ebase + 0x204); -+ /* lui k0, 0x0000 */ -+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16); -+ /* ori k0, 0x0000 */ -+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff); -+ /* jr k0 */ -+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008; -+ /* nop */ -+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000; -+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210); - } +- } ++ if (n == 0 && cpu_has_divec) ++ if ((handler ^ (ebase + 4)) & 0xfc000000) { ++ /* lui k0, 0x0000 */ ++ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16); ++ /* ori k0, 0x0000 */ ++ *(u32 *)(ebase + 0x204) = ++ 0x375a0000 | (handler & 0xffff); ++ /* jr k0 */ ++ *(u32 *)(ebase + 0x208) = 0x03400008; ++ /* nop */ ++ *(u32 *)(ebase + 0x20C) = 0x00000000; ++ flush_icache_range(ebase + 0x200, ebase + 0x210); ++ } else { ++ *(volatile u32 *)(ebase + 0x200) = ++ 0x08000000 | (0x03ffffff & (handler >> 2)); ++ flush_icache_range(ebase + 0x200, ebase + 0x204); ++ } return (void *)old_handler; } + diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile --- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200 +++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200 @@ -73,3 +72,19 @@ diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. # core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ +diff -urN linux-2.6.22.4/include/asm-mips/page.h linux-2.6.22.4.new/include/asm-mips/page.h +--- linux-2.6.22.4/include/asm-mips/page.h 2007-08-21 12:33:06.000000000 +0800 ++++ linux-2.6.22.4.new/include/asm-mips/page.h 2007-09-13 15:13:00.000000000 +0800 +@@ -187,8 +187,10 @@ + #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) +-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) ++#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \ ++ PHYS_OFFSET) ++#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \ ++ PHYS_OFFSET) + + #include + #include