X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Ffiles%2Fdrivers%2Fnet%2Fag71xx%2Fag71xx.h;h=1e0774cda534232915c1a7fd5d7e4f329ad0b131;hp=36b6073aa3816a32b3583d59931fe3f5fbea051b;hb=550a2737317cb725086ddb55c7b2c4ad8874baf1;hpb=e6597c6951755904176714523e1de56bc9680658

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index 36b6073aa3..1e0774cda5 100644
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -1,7 +1,7 @@
 /*
  *  Atheros AR71xx built-in ethernet mac driver
  *
- *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  Based on Atheros' AG7100 driver
@@ -38,7 +38,7 @@
 #define ETH_FCS_LEN	4
 
 #define AG71XX_DRV_NAME		"ag71xx"
-#define AG71XX_DRV_VERSION	"0.5.13"
+#define AG71XX_DRV_VERSION	"0.5.18"
 
 #define AG71XX_NAPI_WEIGHT	64
 #define AG71XX_OOM_REFILL	(1 + HZ/10)
@@ -85,6 +85,7 @@ struct ag71xx_desc {
 #define DESC_MORE	BIT(24)
 #define DESC_PKTLEN_M	0x1fff
 	u32	next;
+	u32	pad;
 };
 
 struct ag71xx_buf {
@@ -227,7 +228,7 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG4_DV		BIT(1)	/* RX_DV Event */
 #define FIFO_CFG4_FC		BIT(2)	/* False Carrier */
 #define FIFO_CFG4_CE		BIT(3)	/* Code Error */
-#define FIFO_CFG4_CRC		BIT(4)	/* CRC error */
+#define FIFO_CFG4_CR		BIT(4)	/* CRC error */
 #define FIFO_CFG4_LM		BIT(5)	/* Length Mismatch */
 #define FIFO_CFG4_LO		BIT(6)	/* Length out of range */
 #define FIFO_CFG4_OK		BIT(7)	/* Packet is OK */
@@ -258,6 +259,8 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG5_VT		BIT(13)	/* VLAN tag detected */
 #define FIFO_CFG5_LE		BIT(14)	/* Long Event */
 #define FIFO_CFG5_FT		BIT(15)	/* Frame Truncated */
+#define FIFO_CFG5_16		BIT(16)	/* unknown */
+#define FIFO_CFG5_17		BIT(17)	/* unknown */
 #define FIFO_CFG5_SF		BIT(18)	/* Short Frame */
 #define FIFO_CFG5_BM		BIT(19)	/* Byte Mode */