X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=blobdiff_plain;f=target%2Flinux%2Fbrcm47xx%2Fpatches-2.6.37%2F150-cpu_fixes.patch;h=eac8fb99a117530755f73a21e560d2d923d14415;hp=d791c7a1fb448161b793904a66982e8d99bc9e22;hb=b3a732d075212bffeb4c50338c3aaa9a3a7d830c;hpb=23aca3d493879f0ca4a6aaaa8c23813b8254234f

diff --git a/target/linux/brcm47xx/patches-2.6.37/150-cpu_fixes.patch b/target/linux/brcm47xx/patches-2.6.37/150-cpu_fixes.patch
index d791c7a1fb..eac8fb99a1 100644
--- a/target/linux/brcm47xx/patches-2.6.37/150-cpu_fixes.patch
+++ b/target/linux/brcm47xx/patches-2.6.37/150-cpu_fixes.patch
@@ -319,7 +319,7 @@
  
 +	/* Check if special workarounds are required */
 +#ifdef CONFIG_BCM47XX
-+	if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) {
++	if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
 +		printk("Enabling BCM4710A0 cache workarounds.\n");
 +		bcm4710 = 1;
 +	} else
@@ -345,7 +345,7 @@
  }
 --- a/arch/mips/mm/tlbex.c
 +++ b/arch/mips/mm/tlbex.c
-@@ -873,6 +873,9 @@ static void __cpuinit build_r4000_tlb_re
+@@ -872,6 +872,9 @@ static void __cpuinit build_r4000_tlb_re
  		/* No need for uasm_i_nop */
  	}
  
@@ -355,7 +355,7 @@
  #ifdef CONFIG_64BIT
  	build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
  #else
-@@ -1323,6 +1326,9 @@ build_r4000_tlbchange_handler_head(u32 *
+@@ -1322,6 +1325,9 @@ build_r4000_tlbchange_handler_head(u32 *
  				   struct uasm_reloc **r, unsigned int pte,
  				   unsigned int ptr)
  {