[ar71xx]: add D-link DGL-5500 A1 support
authorImre Kaloz <kaloz@openwrt.org>
Thu, 27 Nov 2014 14:27:34 +0000 (14:27 +0000)
committerImre Kaloz <kaloz@openwrt.org>
Thu, 27 Nov 2014 14:27:34 +0000 (14:27 +0000)
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
SVN-Revision: 43401

target/linux/ar71xx/base-files/etc/diag.sh
target/linux/ar71xx/base-files/etc/uci-defaults/02_network
target/linux/ar71xx/base-files/lib/ar71xx.sh
target/linux/ar71xx/base-files/lib/preinit/82_patch_ath10k [new file with mode: 0644]
target/linux/ar71xx/base-files/lib/upgrade/platform.sh
target/linux/ar71xx/config-3.14
target/linux/ar71xx/files/arch/mips/ath79/mach-dgl-5500-a1.c [new file with mode: 0644]
target/linux/ar71xx/generic/profiles/d-link.mk
target/linux/ar71xx/image/Makefile
target/linux/ar71xx/patches-3.14/733-MIPS-ath79-add-DGL-5500-A1.patch [new file with mode: 0644]

index e39a2b9..c022013 100755 (executable)
@@ -49,6 +49,7 @@ get_status_led() {
        db120)
                status_led="db120:green:status"
                ;;
+       dgl-5500-a1 |\
        dhp-1565-a1|\
        dir-505-a1 |\
        dir-600-a1 |\
index 3287e6c..e205fd5 100755 (executable)
@@ -248,6 +248,7 @@ wzr-hp-g300nh)
        ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 5t"
        ;;
 
+dgl-5500-a1 |\
 dir-825-c1)
        local mac
        ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
index a802258..483a8de 100755 (executable)
@@ -342,6 +342,9 @@ ar71xx_board_detect() {
        *"DB120 reference board")
                name="db120"
                ;;
+       *"DGL-5500 rev. A1")
+               name="dgl-5500-a1"
+               ;;
        *"DHP-1565 rev. A1")
                name="dhp-1565-a1"
                ;;
diff --git a/target/linux/ar71xx/base-files/lib/preinit/82_patch_ath10k b/target/linux/ar71xx/base-files/lib/preinit/82_patch_ath10k
new file mode 100644 (file)
index 0000000..c5c60ef
--- /dev/null
@@ -0,0 +1,37 @@
+#!/bin/sh
+
+. /lib/functions/system.sh
+. /lib/ar71xx.sh
+
+firmware_file="/lib/firmware/ath10k/QCA988X/hw2.0/firmware-3.bin"
+firmware_md5_orig="5163aa8de591f80b06c77f22e9777473"
+firmware_md5_current="$(md5sum $firmware_file)"
+firmware_md5_current="${firmware_md5_current%% *}"
+
+
+do_patch_ath10k_firmware() {
+       # verify md5sum before patching
+       [ "firmware_md5_orig" != "firmware_md5_current" ] || {
+               return
+       }
+
+       # some boards have bogus mac in otp, patch the default mac in the firmware
+       case $(ar71xx_board_name) in
+               dgl-5500-a1)
+                       local mac
+                       mac=$(mtd_get_mac_ascii nvram wlan1_mac)
+
+                       cp $firmware_file /tmp/ath10k-firmware.bin
+                       macaddr_2bin $mac | dd of=/tmp/ath10k-firmware.bin \
+                               conv=notrunc bs=1 seek=280 count=6
+
+               ;;
+       esac
+       [ -f /tmp/ath10k-firmware.bin ] || {
+               return
+       }
+       cp /tmp/ath10k-firmware.bin $firmware_file
+       rm /tmp/ath10k-firmware.bin
+}
+
+boot_hook_add preinit_main do_patch_ath10k_firmware
index 6a85d01..2e5b0dd 100755 (executable)
@@ -194,6 +194,7 @@ platform_check_image() {
        ap81 | \
        ap83 | \
        ap132 | \
+       dgl-5500-a1 |\
        dhp-1565-a1 |\
        dir-505-a1 | \
        dir-600-a1 | \
index e5086af..9ed184b 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
 CONFIG_ATH79_MACH_CARAMBOLA2=y
 CONFIG_ATH79_MACH_CPE510=y
 CONFIG_ATH79_MACH_DB120=y
+CONFIG_ATH79_MACH_DGL_5500_A1=y
 CONFIG_ATH79_MACH_DHP_1565_A1=y
 CONFIG_ATH79_MACH_DIR_505_A1=y
 CONFIG_ATH79_MACH_DIR_600_A1=y
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dgl-5500-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dgl-5500-a1.c
new file mode 100644 (file)
index 0000000..91b554e
--- /dev/null
@@ -0,0 +1,150 @@
+/*
+ *  D-Link DGL-5500 board support
+ *
+ *  Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define DGL_5500_A1_GPIO_LED_POWER_ORANGE      14
+#define DGL_5500_A1_GPIO_LED_POWER_GREEN       19
+#define DGL_5500_A1_GPIO_LED_PLANET_GREEN      22
+#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE     23
+
+#define DGL_5500_A1_GPIO_BTN_WPS               16
+#define DGL_5500_A1_GPIO_BTN_RESET             17
+
+#define DGL_5500_A1_KEYS_POLL_INTERVAL         20      /* msecs */
+#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL     \
+                                       (3 * DGL_5500_A1_KEYS_POLL_INTERVAL)
+
+#define DGL_5500_A1_WMAC_CALDATA_OFFSET                0x1000
+
+#define DGL_5500_A1_LAN_MAC_OFFSET     0x04
+#define DGL_5500_A1_WAN_MAC_OFFSET     0x16
+
+static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = {
+       {
+               .name           = "d-link:green:power",
+               .gpio           = DGL_5500_A1_GPIO_LED_POWER_GREEN,
+               .active_low     = 1,
+       },
+       {
+               .name           = "d-link:orange:power",
+               .gpio           = DGL_5500_A1_GPIO_LED_POWER_ORANGE,
+               .active_low     = 1,
+       },
+       {
+               .name           = "d-link:green:planet",
+               .gpio           = DGL_5500_A1_GPIO_LED_PLANET_GREEN,
+               .active_low     = 1,
+       },
+       {
+               .name           = "d-link:orange:planet",
+               .gpio           = DGL_5500_A1_GPIO_LED_PLANET_ORANGE,
+               .active_low     = 1,
+       },
+};
+
+static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = {
+       {
+               .desc           = "Reset button",
+               .type           = EV_KEY,
+               .code           = KEY_RESTART,
+               .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DGL_5500_A1_GPIO_BTN_RESET,
+               .active_low     = 1,
+       },
+       {
+               .desc           = "WPS button",
+               .type           = EV_KEY,
+               .code           = KEY_WPS_BUTTON,
+               .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DGL_5500_A1_GPIO_BTN_WPS,
+               .active_low     = 1,
+       },
+};
+
+static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = {
+       /* Use the SGMII interface for the GMAC0 of the AR8327 switch */
+       .mode = AR8327_PAD_MAC_SGMII,
+       .sgmii_delay_en = true,
+};
+
+static struct ar8327_platform_data dgl_5500_a1_ar8327_data = {
+       .pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg,
+       .port0_cfg = {
+               .force_link = 1,
+               .speed = AR8327_PORT_SPEED_1000,
+               .duplex = 1,
+               .txpause = 1,
+               .rxpause = 1,
+       },
+};
+
+static struct mdio_board_info dgl_5500_a1_mdio0_info[] = {
+       {
+               .bus_id = "ag71xx-mdio.0",
+               .phy_addr = 0,
+               .platform_data = &dgl_5500_a1_ar8327_data,
+       },
+};
+
+static void __init dgl_5500_a1_setup(void)
+{
+       u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
+       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+       u8 lan_mac[ETH_ALEN];
+
+       ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac);
+
+       ath79_register_m25p80(NULL);
+
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio),
+                                dgl_5500_a1_leds_gpio);
+       ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(dgl_5500_a1_gpio_keys),
+                                       dgl_5500_a1_gpio_keys);
+
+       ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac);
+
+       ath79_register_mdio(0, 0x0);
+       mdiobus_register_board_info(dgl_5500_a1_mdio0_info,
+                                   ARRAY_SIZE(dgl_5500_a1_mdio0_info));
+
+       ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
+
+       /* GMAC1 is connected to an AR8327N switch via the SMGII interface */
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
+       ath79_eth1_data.phy_mask = BIT(0);
+       ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
+
+       ath79_eth1_pll_data.pll_1000 = 0x03000101;
+
+       ath79_register_eth(1);
+
+       ath79_register_usb();
+       ath79_register_pci();
+}
+
+MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1",
+            dgl_5500_a1_setup);
index 5079af1..0909df5 100644 (file)
@@ -126,3 +126,15 @@ define Profile/DIR835A1/Description
 endef
 
 $(eval $(call Profile,DIR835A1))
+
+
+define Profile/DGL5500A1
+       NAME:=D-Link DGL-5500 rev. A1
+       PACKAGES:=kmod-usb-core kmod-usb2 kmod-ath10k
+endef
+
+define Profile/DIR5500A1/Description
+       Package set optimized for the D-Link DGL-5500 rev. A1.
+endef
+
+$(eval $(call Profile,DGL5500A1))
index 1c78898..c94db14 100644 (file)
@@ -279,6 +279,7 @@ cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,
 cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
 eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
 db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
+dgl_5500_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
 cameo_ap94_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,6208k(firmware),64k(caldata)ro,1600k(unknown)ro,64k@0x7f0000(caldata_copy)
 cameo_ap94_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7808k(firmware),64k(caldata)ro,64k@0x660000(caldata_orig),6208k@0x50000(firmware_orig)
 esr900_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),13248k(rootfs),1024k(manufacture)ro,64k(backup)ro,320k(storage)ro,64k(caldata)ro,14656k@0x40000(firmware)
@@ -448,6 +449,10 @@ Image/Build/CameoAP99/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_ap99_mtd
 Image/Build/CameoAP99=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_ap99_mtdlayout),$(4),65536)
 Image/Build/CameoAP99/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_ap99_mtdlayout))
 
+Image/Build/CameoAP135/buildkernel=$(call MkuImageLzma,$(2),$(3) $(4))
+Image/Build/CameoAP135=$(call Image/Build/Cameo,$(1),$(2),$(3),$(4),$(5),26)
+Image/Build/CameoAP135/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(4))
+
 Image/Build/CameoDB120/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_db120_mtdlayout))
 Image/Build/CameoDB120=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_db120_mtdlayout),$(4),26)
 Image/Build/CameoDB120/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_db120_mtdlayout))
@@ -1160,6 +1165,8 @@ $(eval $(call SingleProfile,CameoAP121,64kraw-nojffs,TEW712BR,tew-712br,TEW-712B
 $(eval $(call SingleProfile,CameoAP121,64kraw-nojffs,DIR601B1,dir-601-b1,TEW-712BR,ttyATH0,115200,"HORNET-RT-DIR601B1-3",2.99.99,"" "NA"))
 $(eval $(call SingleProfile,CameoAP121_8M,64kraw-nojffs,DIR505A1,dir-505-a1,DIR-505-A1,ttyATH0,115200,"HORNET-PACKET-DIR505A1-3",1.99.99,""))
 
+$(eval $(call SingleProfile,CameoAP135,64kraw,DGL5500A1,dgl-5500-a1,DGL-5500-A1,ttyS0,115200,$$(dgl_5500_mtdlayout),"00AP135AR9558-RT-130508-00"))
+
 $(eval $(call SingleProfile,CameoDB120,64kraw,DHP1565A1,dhp-1565-a1,DHP-1565-A1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
 $(eval $(call SingleProfile,CameoDB120,64kraw,DIR825C1,dir-825-c1,DIR-825-C1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
 $(eval $(call SingleProfile,CameoDB120,64kraw,DIR835A1,dir-835-a1,DIR-835-A1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
diff --git a/target/linux/ar71xx/patches-3.14/733-MIPS-ath79-add-DGL-5500-A1.patch b/target/linux/ar71xx/patches-3.14/733-MIPS-ath79-add-DGL-5500-A1.patch
new file mode 100644 (file)
index 0000000..714d9e6
--- /dev/null
@@ -0,0 +1,39 @@
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -40,6 +40,7 @@ enum ath79_mach_type {
+       ATH79_MACH_CPE510,              /* TP-LINK CPE510 */
+       ATH79_MACH_DB120,               /* Atheros DB120 reference board */
+       ATH79_MACH_PB44,                /* Atheros PB44 reference board */
++      ATH79_MACH_DGL_5500_A1,         /* D-link DGL-5500 rev. A1 */
+       ATH79_MACH_DHP_1565_A1,         /* D-Link DHP-1565 rev. A1 */
+       ATH79_MACH_DIR_505_A1,          /* D-Link DIR-505 rev. A1 */
+       ATH79_MACH_DIR_600_A1,          /* D-Link DIR-600 rev. A1 */
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -55,6 +55,7 @@ obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)
+ obj-$(CONFIG_ATH79_MACH_CAP4200AG)    += mach-cap4200ag.o
+ obj-$(CONFIG_ATH79_MACH_CPE510)               += mach-cpe510.o
+ obj-$(CONFIG_ATH79_MACH_DB120)                += mach-db120.o
++obj-$(CONFIG_ATH79_MACH_DGL_5500_A1)  += mach-dgl-5500-a1.o
+ obj-$(CONFIG_ATH79_MACH_DHP_1565_A1)  += mach-dhp-1565-a1.o
+ obj-$(CONFIG_ATH79_MACH_DIR_505_A1)   += mach-dir-505-a1.o
+ obj-$(CONFIG_ATH79_MACH_DIR_600_A1)   += mach-dir-600-a1.o
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -293,6 +293,16 @@ config ATH79_MACH_WPE72
+       select ATH79_DEV_USB
+       select MYLOADER
++config ATH79_MACH_DGL_5500_A1
++      bool "D-Link DGL-5500 A1 support"
++      select SOC_QCA955X
++      select ATH79_DEV_ETH
++      select ATH79_DEV_GPIO_BUTTONS
++      select ATH79_DEV_LEDS_GPIO
++      select ATH79_DEV_M25P80
++      select ATH79_DEV_WMAC
++      select ATH79_DEV_USB
++
+ config ATH79_MACH_DHP_1565_A1
+       bool "D-Link DHP-1565 rev. A1 board support"
+       select SOC_AR934X