ar8216: Fix problem with AR8337 MAC swap handling
authorFelix Fietkau <nbd@openwrt.org>
Sun, 14 Jun 2015 17:43:50 +0000 (17:43 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Sun, 14 Jun 2015 17:43:50 +0000 (17:43 +0000)
AR8337 supports a configuration bit to swap MAC0 and MAC6.
Currently this is set in general if an AR8337 is detected and causes
issues with devices using an AR8334 (internally an AR8337, just
less chip pins).
And it might even cause issues with AR8337-based devices with
different board designs.

Swapping the MAC's however isn't needed for AR8337 in general.
It's just needed in case of certain board designs (affected devices
seem to be based on Atheros reference board AP135/136-010).
Therefore this configuration bit should be moved to platform data.

The patch includes the needed changes to the device initialization
code of affected devices. Hopefully I didn't miss any ..

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 45970

target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
target/linux/generic/files/drivers/net/phy/ar8327.c
target/linux/generic/files/include/linux/ar8216_platform.h

index 2a34b3a2e9ee966a0170aaa04f08e6bc971e2416..d2bc177d73d3f60d719f26376c57d6b25ff2899e 100644 (file)
@@ -97,6 +97,7 @@ static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = {
        .rxclk_delay_en = true,
        .txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
        .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
        .rxclk_delay_en = true,
        .txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
        .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+       .mac06_exchange_en = true,
 };
 
 static struct ar8327_platform_data esr1750_ar8327_data = {
 };
 
 static struct ar8327_platform_data esr1750_ar8327_data = {
index 69d005d795a43ae18a1bb68736f84c7898d51b1e..9e86e9ab3b8c2fbf6f4686b8a5410131b9d84811 100644 (file)
@@ -98,6 +98,7 @@ static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = {
        .rxclk_delay_en = true,
        .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
        .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
        .rxclk_delay_en = true,
        .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
        .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+       .mac06_exchange_en = true,
 };
 
 static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = {
 };
 
 static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = {
index 0ca2e56b0b15cf505074f39ef3ed686b9c56400e..69a73cc6c9dda70b154b5ce9c4ae7b951e42cf30 100644 (file)
@@ -251,6 +251,7 @@ static void __init nbg6716_010_setup(void)
        nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true;
        nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
        nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
        nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true;
        nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
        nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
+       nbg6716_ar8327_pad0_cfg.mac06_exchange_en = true;
 
        /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
        nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
 
        /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
        nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
index 88022e7533f12e89c05d0db0f4cafef78a700947..6a90c6ecb3f882d8f8d2c7dcd29455f5866a3c3e 100644 (file)
@@ -186,6 +186,7 @@ static void __init wlr8100_010_setup(void)
        wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
        wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
        wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
        wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
        wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
        wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
+       wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true;
 
        /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
        wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
 
        /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
        wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
index 07e837e594873077c5ae1f625df361cb7774ea45..a6dd7d8e26aeaef14c7a0a0fa02ac3400e997f75 100644 (file)
@@ -124,6 +124,9 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
                break;
        }
 
                break;
        }
 
+       if (cfg->mac06_exchange_en)
+               t |= AR8337_PAD_MAC06_EXCHANGE_EN;
+
        return t;
 }
 
        return t;
 }
 
@@ -508,9 +511,6 @@ ar8327_hw_config_pdata(struct ar8xxx_priv *priv,
        data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
 
        t = ar8327_get_pad_cfg(pdata->pad0_cfg);
        data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
 
        t = ar8327_get_pad_cfg(pdata->pad0_cfg);
-       if (chip_is_ar8337(priv))
-               t |= AR8337_PAD_MAC06_EXCHANGE_EN;
-
        ar8xxx_write(priv, AR8327_REG_PAD0_MODE, t);
        t = ar8327_get_pad_cfg(pdata->pad5_cfg);
        ar8xxx_write(priv, AR8327_REG_PAD5_MODE, t);
        ar8xxx_write(priv, AR8327_REG_PAD0_MODE, t);
        t = ar8327_get_pad_cfg(pdata->pad5_cfg);
        ar8xxx_write(priv, AR8327_REG_PAD5_MODE, t);
index 4935ad332c40c9b22318b7841c9390f81a744873..d70f11a843aa6014601426eb3a013865175871ac 100644 (file)
@@ -47,6 +47,7 @@ struct ar8327_pad_cfg {
        bool sgmii_delay_en;
        enum ar8327_clk_delay_sel txclk_delay_sel;
        enum ar8327_clk_delay_sel rxclk_delay_sel;
        bool sgmii_delay_en;
        enum ar8327_clk_delay_sel txclk_delay_sel;
        enum ar8327_clk_delay_sel rxclk_delay_sel;
+       bool mac06_exchange_en;
 };
 
 enum ar8327_port_speed {
 };
 
 enum ar8327_port_speed {
@@ -128,4 +129,5 @@ struct ar8327_platform_data {
        const struct ar8327_led_info *leds;
 };
 
        const struct ar8327_led_info *leds;
 };
 
-#endif /* AR8216_PLATFORM_H */
\ No newline at end of file
+#endif /* AR8216_PLATFORM_H */
+