+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mipsel
-BOARD:=adm5120
-BOARDNAME:=ADM5120 (Little Endian)
-FEATURES:=squashfs jffs2 pci usb
-
-LINUX_VERSION:=2.6.22-rc6
-
-define Target/Description
- Build firmware images for Infineon/ADMtek ADM5120 based boards
- (e.g : RouterBoard RB1xx, Compex WP54G-WRT ...)
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-DEFAULT_PACKAGES += admswconfig
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-#!/bin/sh
-# wget2nand
-# This script can be used to download a TGZ file from your build system which
-# contains the files to be installed on the NAND flash on your RB1xx card.
-# The one parameter is the URL of the TGZ file to be downloaded.
-# Licence GPL V2
-# Author david.goodenough@linkchoose.co.uk
-# Based on cf2nand from RB532 support
-. /etc/functions.sh
-
-[ -d /tmp/wget2nand ] && {
- echo "/tmp/wget2nand already exists"
- exit 1
-}
-
-# first get an address for br-lan using udhcpc
-killall udhcpc
-/sbin/udhcpc -i br-lan
-
-# need to find the wget server from the command line
-url=$1
-[ -z "$url" ] && {
- echo "No URL specified for image TGZ"
- echo "Usage : $0 URL"
- exit 1
-}
-
-boot="$(find_mtd_part 'RouterBoard NAND Boot')"
-main="$(find_mtd_part 'rootfs')"
-[ -z "$boot" -o -z "$main" ] && {
- echo "Cannot find NAND Flash partitions"
- exit 1
-}
-
-echo "Erasing filesystem."
-mtd erase Boot 2>/dev/null >/dev/null
-mtd erase Main 2>/dev/null >/dev/null
-
-echo "Mounting $main as new root and $boot as boot partition"
-
-mkdir /tmp/wget2nand/
-mkdir /tmp/wget2nand-boot
-mount -t yaffs2 "$main" /tmp/wget2nand/
-mount -t yaffs2 "$boot" /tmp/wget2nand-boot
-
-echo "Copying filesystem..."
-( wget -O - $url/openwrt-adm5120-2.6-rootfs.tgz) | ( cd /tmp/wget2nand/; tar xvz )
-wget -O /tmp/wget2nand-boot/kernel $url/openwrt-adm5120-2.6-vmlinux.elf
-
-# update the command line on the kernel to boot from the right place
-[ ! -e /sbin/patch-cmdline ] && {
- echo "Cannot find patch-cmdline"
- exit 1
-}
-
-echo "Patching the kernel command line"
-/sbin/patch-cmdline /tmp/wget2nand-boot/kernel "root=/dev/mtdblock1 rootfstype=yaffs2 init=/etc/preinit "
-chmod +x /tmp/wget2nand-boot/kernel
-
-# make sure everything is written before we unmount the partitions
-echo "chmod ugo+x /" > /tmp/wget2nand/etc/uci-defaults/set_root_permission
-sync
-ls /tmp/wget2nand-boot/
-ls /tmp/wget2nand/
-# unmount the partitions and remove the directories into which they were mounted
-umount /tmp/wget2nand-boot
-umount /tmp/wget2nand
-rmdir /tmp/wget2nand-boot
-rmdir /tmp/wget2nand
-
-# all done
-echo "Image written, you can now reboot. Remember to change the boot source to Boot from Nand"
+++ /dev/null
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_ADM5120_HARDWARE_SWAB=y
-CONFIG_ADM5120_NR_UARTS=2
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-# CONFIG_ATM_DRIVERS is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BAYCOM_SER_FDX=m
-CONFIG_BAYCOM_SER_HDX=m
-CONFIG_BINFMT_MISC=m
-CONFIG_BITREVERSE=y
-CONFIG_CIFS_DEBUG2=y
-CONFIG_CIFS_EXPERIMENTAL=y
-CONFIG_CIFS_STATS2=y
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_CIFS_XATTR=y
-CONFIG_CMDLINE="console=ttyS0,115200 rootfs=jffs2,squashfs,yaffs2 init=/etc/preinit"
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-CONFIG_CPU_MIPSR1=y
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_VR41XX is not set
-CONFIG_CRYPTO_SHA1=y
-# CONFIG_DDB5477 is not set
-CONFIG_DEVPORT=y
-# CONFIG_DM9000 is not set
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_ELF_CORE=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_FS_MBCACHE=m
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_ACL=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HID=m
-CONFIG_HWMON=y
-# CONFIG_HWMON_DEBUG_CHIP is not set
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_INPUT=y
-# CONFIG_INPUT_EVDEV is not set
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IRQ_CPU=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_POSIX_ACL=y
-CONFIG_JFFS2_FS_SECURITY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JOLIET is not set
-CONFIG_LEDS_ADM5120=y
-CONFIG_LEDS_ADM5120_DIAG=y
-# CONFIG_LEDS_ADM5120_EXPERIMENTAL is not set
-CONFIG_LEDS_GPIO=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-CONFIG_MII=m
-# CONFIG_MINIX_FS is not set
-CONFIG_MIPS=y
-CONFIG_MIPS_ADM5120=y
-CONFIG_MIPS_ADM5120_ENET=y
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_ADM5120=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-CONFIG_MTD_MYLOADER_PARTS=y
-CONFIG_MTD_NAND=y
-# CONFIG_MTD_NAND_CAFE is not set
-# CONFIG_MTD_NAND_DISKONCHIP is not set
-# CONFIG_MTD_NAND_ECC_SMC is not set
-CONFIG_MTD_NAND_IDS=y
-# CONFIG_MTD_NAND_MUSEUM_IDS is not set
-# CONFIG_MTD_NAND_NANDSIM is not set
-# CONFIG_MTD_NAND_PLATFORM is not set
-CONFIG_MTD_NAND_RB100=y
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_NETDEV_1000 is not set
-CONFIG_NET_KEY=y
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCIPCWATCHDOG is not set
-CONFIG_PCI_ADM5120=y
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_PNPACPI is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_SCSI_WAIT_SCAN=m
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_ADM5120=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_RAW is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_PTSWARM is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_SWARM is not set
-CONFIG_SOFT_WATCHDOG=m
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_USB=y
-# CONFIG_USBPCWATCHDOG is not set
-# CONFIG_USB_ACM is not set
-CONFIG_USB_ADM5120_HCD=y
-# CONFIG_USB_ALI_M5632 is not set
-# CONFIG_USB_AN2720 is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_EHCI_HCD=m
-# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-# CONFIG_USB_EHCI_SPLIT_ISO is not set
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_NET_DM9601 is not set
-# CONFIG_USB_NET_GL620A is not set
-# CONFIG_USB_NET_MCS7830 is not set
-# CONFIG_USB_NET_PLUSB is not set
-# CONFIG_USB_NET_RNDIS_HOST is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_VGASTATE is not set
-CONFIG_VIDEO_V4L1=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_YAFFS_9BYTE_TAGS=y
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_AUTO_YAFFS2=y
-CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-CONFIG_YAFFS_FS=y
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-CONFIG_YAFFS_YAFFS1=y
-CONFIG_YAFFS_YAFFS2=y
-# CONFIG_ZD1211RW is not set
-CONFIG_ZONE_DMA_FLAG=0
+++ /dev/null
-if MIPS_ADM5120
-
-menu "ADM5120 Implementation Options"
-
-config PCI_ADM5120
- bool "Enable PCI support"
- select PCI
- default y
-
-config ADM5120_HARDWARE_SWAB
- bool "Enable hardware accelerated byte-swapping"
- default y
-
-endmenu
-
-endif
+++ /dev/null
-#
-# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel
-#
-
-obj-y := setup.o prom.o irq.o memory.o adm5120_info.o
-obj-y += gpio.o
-obj-y += time.o
-
-EXTRA_AFLAGS := $(CFLAGS)
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/autoconf.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_switch.h>
-#include <asm/mach-adm5120/adm5120_mpmc.h>
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/myloader.h>
-#include <asm/mach-adm5120/routerboot.h>
-#include <asm/mach-adm5120/zynos.h>
-
-extern char *prom_getenv(char *envname);
-/*
- * Globals
- */
-struct adm5120_board adm5120_board;
-EXPORT_SYMBOL_GPL(adm5120_board);
-
-unsigned int adm5120_boot_loader;
-
-unsigned int adm5120_product_code;
-unsigned int adm5120_revision;
-unsigned int adm5120_package;
-unsigned int adm5120_nand_boot;
-unsigned long adm5120_speed;
-unsigned long adm5120_memsize;
-
-/*
- * Locals
- */
-static char *boot_loader_names[BOOT_LOADER_LAST+1] = {
- [BOOT_LOADER_UNKNOWN] = "Unknown",
- [BOOT_LOADER_CFE] = "CFE",
- [BOOT_LOADER_UBOOT] = "U-Boot",
- [BOOT_LOADER_MYLOADER] = "MyLoader",
- [BOOT_LOADER_ROUTERBOOT]= "RouterBOOT",
- [BOOT_LOADER_BOOTBASE] = "Bootbase"
-};
-
-static struct adm5120_board __initdata adm5120_boards[] = {
- /* FIXME: some boards have invalid fields */
- {
- .name = "Cellvision CAS-630/630W",
- .mach_type = MACH_ADM5120_CAS630,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision CAS-670/670W",
- .mach_type = MACH_ADM5120_CAS670,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision CAS-700/700W",
- .mach_type = MACH_ADM5120_CAS700,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision CAS-771/771W",
- .mach_type = MACH_ADM5120_CAS771,
- .has_usb = 0,
- .iface_num = 5,
- .mem_size = (32 << 20),
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision CAS-790",
- .mach_type = MACH_ADM5120_CAS790,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision CAS-861/861W",
- .mach_type = MACH_ADM5120_CAS861,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision NFS-101U/101WU",
- .mach_type = MACH_ADM5120_NFS101U,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Cellvision NFS-202U/202WU",
- .mach_type = MACH_ADM5120_NFS202U,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex NetPassage 27G",
- .mach_type = MACH_ADM5120_NP27G,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex NetPassage 28G",
- .mach_type = MACH_ADM5120_NP28G,
- .has_usb = 0,
- .iface_num = 4,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex NP28G (HotSpot)",
- .mach_type = MACH_ADM5120_NP28GHS,
- .has_usb = 0,
- .iface_num = 4,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex WP54AG",
- .mach_type = MACH_ADM5120_WP54AG,
- .has_usb = 0,
- .iface_num = 2,
- .mem_size = (16 << 20),
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex WP54G",
- .mach_type = MACH_ADM5120_WP54G,
- .has_usb = 0,
- .iface_num = 2,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex WP54G-WRT",
- .mach_type = MACH_ADM5120_WP54G_WRT,
- .has_usb = 0,
- .iface_num = 2,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex WP54G v1C",
- .mach_type = MACH_ADM5120_WP54Gv1C,
- .has_usb = 0,
- .iface_num = 2,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "Compex WPP54AG",
- .mach_type = MACH_ADM5120_WPP54AG,
- .has_usb = 0,
- .iface_num = 2,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Compex WPP54G",
- .mach_type = MACH_ADM5120_WPP54G,
- .has_usb = 0,
- .iface_num = 2,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Edimax BR-6104K",
- .mach_type = MACH_ADM5120_BR6104K,
- .has_usb = 0,
- .iface_num = 5,
- .mem_size = (16 << 20),
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "Infineon EASY 5120",
- .mach_type = MACH_ADM5120_EASY5120,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "Infineon EASY 5120-RT",
- .mach_type = MACH_ADM5120_EASY5120RT,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "Infineon EASY 5120P-ATA",
- .mach_type = MACH_ADM5120_EASY5120PATA,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "Infineon EASY 83000",
- .mach_type = MACH_ADM5120_EASY83000,
- .has_usb = 0,
- .iface_num = 6,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "RouterBOARD 111",
- .mach_type = MACH_ADM5120_RB_111,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 128*1024,
- },
- {
- .name = "RouterBOARD 112",
- .mach_type = MACH_ADM5120_RB_112,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 128*1024,
- },
- {
- .name = "RouterBOARD 133",
- .mach_type = MACH_ADM5120_RB_133,
- .has_usb = 0,
- .iface_num = 3,
- .flash0_size = 128*1024,
- },
- {
- .name = "RouterBOARD 133C",
- .mach_type = MACH_ADM5120_RB_133C,
- .has_usb = 0,
- .iface_num = 1,
- .flash0_size = 128*1024,
- },
- {
- .name = "RouterBOARD 150",
- .mach_type = MACH_ADM5120_RB_150,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 128*1024,
- },
- {
- .name = "RouterBOARD 153",
- .mach_type = MACH_ADM5120_RB_153,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 128*1024,
- },
- {
- .name = "ZyXEL ES-2024A",
- .mach_type = MACH_ADM5120_ES2024A,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2024PWR",
- .mach_type = MACH_ADM5120_ES2024PWR,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2108",
- .mach_type = MACH_ADM5120_ES2108,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2108-F",
- .mach_type = MACH_ADM5120_ES2108F,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2108-G",
- .mach_type = MACH_ADM5120_ES2108G,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2108-LC",
- .mach_type = MACH_ADM5120_ES2108LC,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL ES-2108-PWR",
- .mach_type = MACH_ADM5120_ES2108PWR,
- .has_usb = 0,
- .iface_num = 0,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL HomeSafe 100/100W",
- .mach_type = MACH_ADM5120_HS100,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334",
- .mach_type = MACH_ADM5120_P334,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334U",
- .mach_type = MACH_ADM5120_P334U,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334W",
- .mach_type = MACH_ADM5120_P334W,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 2*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334WH",
- .mach_type = MACH_ADM5120_P334WH,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334WHD",
- .mach_type = MACH_ADM5120_P334WHD,
- .has_usb = 0,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 334WT",
- .mach_type = MACH_ADM5120_P334WT,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 335/335WT",
- .mach_type = MACH_ADM5120_P335,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 335Plus",
- .mach_type = MACH_ADM5120_P335PLUS,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "ZyXEL Prestige 335U",
- .mach_type = MACH_ADM5120_P335U,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- },
- {
- .name = "Unknown ADM5120 board",
- .mach_type = MACH_ADM5120_UNKNOWN,
- .has_usb = 1,
- .iface_num = 5,
- .flash0_size = 4*1024*1024,
- }
-};
-
-#define DUMMY_BOARD() {.mach_type = MACH_ADM5120_UNKNOWN}
-
-struct mylo_board {
- u16 vid;
- u16 did;
- u16 svid;
- u16 sdid;
- unsigned long mach_type;
-};
-
-
-#define MYLO_BOARD(v,d,sv,sd,mt) { .vid = (v), .did = (d), .svid = (sv), \
- .sdid = (sd), .mach_type = (mt) }
-
-#define COMPEX_BOARD(d,mt) MYLO_BOARD(VENID_COMPEX,(d),VENID_COMPEX,(d),(mt))
-
-static struct mylo_board mylo_boards[] __initdata = {
- COMPEX_BOARD(DEVID_COMPEX_NP27G, MACH_ADM5120_NP27G),
- COMPEX_BOARD(DEVID_COMPEX_NP28G, MACH_ADM5120_NP28G),
- COMPEX_BOARD(DEVID_COMPEX_NP28GHS, MACH_ADM5120_NP28GHS),
- COMPEX_BOARD(DEVID_COMPEX_WP54G, MACH_ADM5120_WP54G),
- COMPEX_BOARD(DEVID_COMPEX_WP54Gv1C, MACH_ADM5120_WP54Gv1C),
- COMPEX_BOARD(DEVID_COMPEX_WP54AG, MACH_ADM5120_WP54AG),
- COMPEX_BOARD(DEVID_COMPEX_WPP54G, MACH_ADM5120_WPP54G),
- COMPEX_BOARD(DEVID_COMPEX_WPP54AG, MACH_ADM5120_WPP54AG),
- DUMMY_BOARD()
-};
-
-#define ROUTERBOARD_NAME_LEN 16
-
-struct routerboard {
- unsigned long mach_type;
- char name[ROUTERBOARD_NAME_LEN];
-};
-
-#define ROUTERBOARD(n, mt) { .name = (n), .mach_type = (mt) }
-static struct routerboard routerboards[] __initdata = {
- ROUTERBOARD("111", MACH_ADM5120_RB_111),
- ROUTERBOARD("112", MACH_ADM5120_RB_112),
- ROUTERBOARD("133", MACH_ADM5120_RB_133),
- ROUTERBOARD("133C", MACH_ADM5120_RB_133C),
- ROUTERBOARD("miniROUTER", MACH_ADM5120_RB_150),
- ROUTERBOARD("153", MACH_ADM5120_RB_150),
- DUMMY_BOARD()
-};
-
-struct zynos_board {
- unsigned long mach_type;
- unsigned int vendor_id;
- u16 board_id;
-};
-
-#define ZYNOS_BOARD(vi, bi, mt) { .vendor_id = (vi), .board_id = (bi), \
- .mach_type = (mt) }
-
-#define ZYXEL_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_ZYXEL, bi, mt)
-#define DLINK_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_DLINK, bi, mt)
-#define LUCENT_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_LUCENT, bi, mt)
-
-static struct zynos_board zynos_boards[] __initdata = {
- ZYXEL_BOARD(ZYNOS_BOARD_HS100, MACH_ADM5120_HS100),
- ZYXEL_BOARD(ZYNOS_BOARD_P334, MACH_ADM5120_P334),
- ZYXEL_BOARD(ZYNOS_BOARD_P334U, MACH_ADM5120_P334U),
- ZYXEL_BOARD(ZYNOS_BOARD_P334W, MACH_ADM5120_P334W),
- ZYXEL_BOARD(ZYNOS_BOARD_P334WH, MACH_ADM5120_P334WH),
- ZYXEL_BOARD(ZYNOS_BOARD_P334WHD, MACH_ADM5120_P334WHD),
- ZYXEL_BOARD(ZYNOS_BOARD_P334WT, MACH_ADM5120_P334WT),
- ZYXEL_BOARD(ZYNOS_BOARD_P335, MACH_ADM5120_P335),
- ZYXEL_BOARD(ZYNOS_BOARD_P335PLUS, MACH_ADM5120_P335PLUS),
- ZYXEL_BOARD(ZYNOS_BOARD_P335U, MACH_ADM5120_P335U),
- DUMMY_BOARD()
-};
-
-struct common_board {
- char *name;
- unsigned long mach_type;
-};
-
-#define DEFBOARD(n, mt) { .name = (n), .mach_type = (mt) }
-static struct common_board common_boards[] __initdata = {
- DEFBOARD("CAS-630", MACH_ADM5120_CAS630),
- DEFBOARD("CAS-670", MACH_ADM5120_CAS670),
- DEFBOARD("CAS-700", MACH_ADM5120_CAS700),
- DEFBOARD("CAS-771", MACH_ADM5120_CAS771),
- DEFBOARD("CAS-790", MACH_ADM5120_CAS790),
- DEFBOARD("CAS-861", MACH_ADM5120_CAS861),
- DEFBOARD("NFS-101U", MACH_ADM5120_NFS101U),
- DEFBOARD("NFS-202U", MACH_ADM5120_NFS202U),
- DEFBOARD("EASY 5120", MACH_ADM5120_EASY5120),
- DEFBOARD("EASY 5120-RT", MACH_ADM5120_EASY5120RT),
- DEFBOARD("EASY 5120P-ATA", MACH_ADM5120_EASY5120PATA),
- DEFBOARD("EASY 83000", MACH_ADM5120_EASY83000),
- DEFBOARD("BR-6104K", MACH_ADM5120_BR6104K),
- DEFBOARD("WP54G-WRT", MACH_ADM5120_WP54G_WRT),
- DEFBOARD("P-334WT", MACH_ADM5120_P334WT),
- DEFBOARD("P-335", MACH_ADM5120_P335),
-};
-
-/*
- * Helper routines
- */
-static inline u16 read_le16(void *buf)
-{
- u8 *p;
-
- p = buf;
- return ((u16)p[0] + ((u16)p[1] << 8));
-}
-
-static inline u32 read_le32(void *buf)
-{
- u8 *p;
-
- p = buf;
- return ((u32)p[0] + ((u32)p[1] << 8) + ((u32)p[2] << 16) +
- ((u32)p[3] << 24));
-}
-
-static inline u16 read_be16(void *buf)
-{
- u8 *p;
-
- p = buf;
- return (((u16)p[0] << 8) + (u16)p[1]);
-}
-
-static inline u32 read_be32(void *buf)
-{
- u8 *p;
-
- p = buf;
- return (((u32)p[0] << 24) + ((u32)p[1] << 16) + ((u32)p[2] << 8) +
- ((u32)p[3]));
-}
-
-/*
- * CFE based boards
- */
-#define CFE_EPTSEAL 0x43464531 /* CFE1 is the magic number to recognize CFE
-from other bootloaders */
-
-static int __init cfe_present(void)
-{
- /*
- * This method only works, when we are booted directly from the CFE.
- */
- u32 cfe_handle = (u32) fw_arg0;
- u32 cfe_a1_val = (u32) fw_arg1;
- u32 cfe_entry = (u32) fw_arg2;
- u32 cfe_seal = (u32) fw_arg3;
-
- /* Check for CFE by finding the CFE magic number */
- if (cfe_seal != CFE_EPTSEAL) {
- /* We are not booted from CFE */
- return 0;
- }
-
- /* cfe_a1_val must be 0, because only one CPU present in the ADM5120 */
- if (cfe_a1_val != 0) {
- return 0;
- }
-
- /* The cfe_handle, and the cfe_entry must be kernel mode addresses */
- if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0)) {
- return 0;
- }
-
- return 1;
-}
-
-static unsigned long __init cfe_detect_board(void)
-{
- return MACH_ADM5120_WP54G_WRT;
-}
-
-/*
- * MyLoader based boards
- */
-#define SYS_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F000)
-#define BOARD_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F800)
-#define PART_TABLE_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x10000)
-
-static unsigned long __init myloader_detect_board(void)
-{
- struct mylo_system_params *sysp;
- struct mylo_board_params *boardp;
- struct mylo_partition_table *parts;
- struct mylo_board *board;
- unsigned long ret;
-
- ret = MACH_ADM5120_UNKNOWN;
-
- sysp = (struct mylo_system_params *)(SYS_PARAMS_ADDR);
- boardp = (struct mylo_board_params *)(BOARD_PARAMS_ADDR);
- parts = (struct mylo_partition_table *)(PART_TABLE_ADDR);
-
- /* Check for some magic numbers */
- if ((le32_to_cpu(sysp->magic) != MYLO_MAGIC_SYS_PARAMS) ||
- (le32_to_cpu(boardp->magic) != MYLO_MAGIC_BOARD_PARAMS) ||
- (le32_to_cpu(parts->magic) != MYLO_MAGIC_PARTITIONS))
- goto out;
-
- for (board = mylo_boards; board->mach_type != MACH_ADM5120_UNKNOWN;
- board++) {
- if ((le16_to_cpu(sysp->vid) == board->vid) &&
- (le16_to_cpu(sysp->did) == board->did) &&
- (le16_to_cpu(sysp->svid) == board->svid) &&
- (le16_to_cpu(sysp->sdid) == board->sdid)) {
- ret = board->mach_type;
- break;
- }
- }
-
- /* assume MyLoader as the boot-loader */
- adm5120_boot_loader = BOOT_LOADER_MYLOADER;
-
-out:
- return ret;
-}
-
-/*
- * RouterBOOT based boards
- */
-static int __init routerboot_load_hs(u8 *buf, u16 buflen,
- struct rb_hard_settings *hs)
-{
- u16 id,len;
- u8 *mac;
- int i,j;
-
- if (buflen < 4)
- return -1;
-
- if (read_le32(buf) != RB_MAGIC_HARD)
- return -1;
-
- /* skip magic value */
- buf += 4;
- buflen -= 4;
-
- while (buflen > 2) {
- id = read_le16(buf);
- buf += 2;
- buflen -= 2;
- if (id == RB_ID_TERMINATOR || buflen < 2)
- break;
-
- len = read_le16(buf);
- buf += 2;
- buflen -= 2;
-
- if (buflen < len)
- break;
-
- switch (id) {
- case RB_ID_BIOS_VERSION:
- hs->bios_ver = (char *)buf;
- break;
- case RB_ID_BOARD_NAME:
- hs->name = (char *)buf;
- break;
- case RB_ID_MEMORY_SIZE:
- hs->mem_size = read_le32(buf);
- break;
- case RB_ID_MAC_ADDRESS_COUNT:
- hs->mac_count = read_le32(buf);
- break;
- case RB_ID_MAC_ADDRESS_PACK:
- hs->mac_count = len/RB_MAC_SIZE;
- if (hs->mac_count > RB_MAX_MAC_COUNT)
- hs->mac_count = RB_MAX_MAC_COUNT;
- mac = buf;
- for (i=0; i < hs->mac_count; i++) {
- for (j=0; j < RB_MAC_SIZE; j++)
- hs->macs[i][j] = mac[j];
- mac += RB_MAC_SIZE;
- }
- break;
- }
-
- buf += len;
- buflen -= len;
-
- }
-
- return 0;
-}
-
-#define RB_BS_OFFS 0x14
-#define RB_OFFS_MAX (128*1024)
-
-static unsigned long __init routerboot_detect_board(void)
-{
- struct routerboard *board;
- struct rb_hard_settings hs;
- struct rb_bios_settings *bs;
- u8 *base;
- u32 off,len;
- unsigned long ret;
-
- ret = MACH_ADM5120_UNKNOWN;
-
- base = (u8 *)KSEG1ADDR(ADM5120_SRAM0_BASE);
- bs = (struct rb_bios_settings *)(base + RB_BS_OFFS);
-
- off = read_le32(&bs->hs_offs);
- len = read_le32(&bs->hs_size);
- if (off > RB_OFFS_MAX)
- return ret;
-
- memset(&hs, 0, sizeof(hs));
- if (routerboot_load_hs(base+off, len, &hs) != 0)
- return ret;
-
- /* assume RouterBOOT as the boot-loader */
- adm5120_boot_loader = BOOT_LOADER_ROUTERBOOT;
-
- if (hs.name == NULL)
- return ret;
-
- for (board = routerboards; board->mach_type != MACH_ADM5120_UNKNOWN;
- board++) {
- if (strncmp(board->name, hs.name, strlen(board->name)) == 0) {
- ret = board->mach_type;
- break;
- }
- }
-
- return ret;
-}
-
-/*
- * ZyNOS based boards
- */
-static inline u32 zynos_dbgarea_present(u8 *data)
-{
- u32 t;
-
- t = read_be32(data+5);
- if (t != ZYNOS_MAGIC_DBGAREA1)
- return 0;
-
- t = read_be32(data+9);
- if (t != ZYNOS_MAGIC_DBGAREA2)
- return 0;
-
- return 1;
-}
-
-#define CHECK_VENDOR(n) (strnicmp(vendor,(n),strlen(n)) == 0)
-
-static inline unsigned int zynos_get_vendor_id(struct zynos_board_info *info)
-{
- unsigned char vendor[ZYNOS_NAME_LEN];
- int i;
-
- for (i=0; i<ZYNOS_NAME_LEN; i++)
- vendor[i]=info->vendor[i];
-
- if CHECK_VENDOR(ZYNOS_VENDOR_ZYXEL)
- return ZYNOS_VENDOR_ID_ZYXEL;
-#if 0
- /* TODO: there are no known ADM5120 based boards from other vendors */
- if CHECK_VENDOR(ZYNOS_VENDOR_DLINK)
- return ZYNOS_VENDOR_ID_DLINK;
-
- if CHECK_VENDOR(ZYNOS_VENDOR_LUCENT)
- return ZYNOS_VENDOR_ID_LUCENT;
-
- if CHECK_VENDOR(ZYNOS_VENDOR_NETGEAR)
- return ZYNOS_VENDOR_ID_NETGEAR;
-#endif
-
- return ZYNOS_VENDOR_ID_OTHER;
-}
-
-static inline u16 zynos_get_board_id(struct zynos_board_info *info)
-{
- return read_be16(&info->board_id);
-}
-
-static inline u32 zynos_get_bootext_addr(struct zynos_board_info *info)
-{
- return read_be32(&info->bootext_addr);
-}
-
-
-#define ZYNOS_INFO_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x3F90)
-#define ZYNOS_HDBG_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x4000)
-#define BOOTEXT_ADDR_MIN KSEG1ADDR(ADM5120_SRAM0_BASE)
-#define BOOTEXT_ADDR_MAX (BOOTEXT_ADDR_MIN + (2*1024*1024))
-
-static unsigned long __init zynos_detect_board(void)
-{
- struct zynos_board_info *info;
- struct zynos_board *board;
- unsigned int vendor_id;
- u16 board_id;
- u32 t;
- unsigned long ret;
-
- ret = MACH_ADM5120_UNKNOWN;
- /* check presence of the dbgarea */
- if (zynos_dbgarea_present((u8 *)ZYNOS_HDBG_ADDR) == 0)
- goto out;
-
- info = (struct zynos_board_info *)(ZYNOS_INFO_ADDR);
-
- /* check for a valid BootExt address */
- t = zynos_get_bootext_addr(info);
- if ((t < BOOTEXT_ADDR_MIN) || (t > BOOTEXT_ADDR_MAX))
- goto out;
-
- vendor_id = zynos_get_vendor_id(info);
- board_id = zynos_get_board_id(info);
-
- for (board = zynos_boards; board->mach_type != MACH_ADM5120_UNKNOWN;
- board++) {
- if ((board->vendor_id == vendor_id) &&
- (board->board_id == board_id)) {
- ret = board->mach_type;
- break;
- }
- }
-
- /* assume Bootbase as the boot-loader */
- adm5120_boot_loader = BOOT_LOADER_BOOTBASE;
-
-out:
- return ret;
-}
-
-/*
- * U-Boot based boards
- */
-static int __init uboot_present(void)
-{
- /* FIXME: not yet implemented */
- return 0;
-}
-
-static unsigned long __init uboot_detect_board(void)
-{
- /* FIXME: not yet implemented */
- return MACH_ADM5120_UNKNOWN;
-}
-
-/*
- * Misc boards
- */
-static unsigned long __init prom_detect_board(void)
-{
- char *name;
- unsigned long ret;
- int i;
-
- ret = MACH_ADM5120_UNKNOWN;
- name = prom_getenv("board_name");
- if (name == NULL)
- goto out;
-
- if (*name == '\0')
- goto out;
-
- for (i=0; i<ARRAY_SIZE(common_boards); i++) {
- if (strcmp(common_boards[i].name, name) == 0) {
- ret = common_boards[i].mach_type;
- break;
- }
- }
-
-out:
- return ret;
-}
-
-static void __init adm5120_detect_board(void)
-{
- struct adm5120_board *board;
- unsigned long t;
-
- adm5120_boot_loader = BOOT_LOADER_UNKNOWN;
-
- /* Try to detect board type without bootloader */
- t = routerboot_detect_board();
-
- if (t == MACH_ADM5120_UNKNOWN)
- t = zynos_detect_board();
-
- if (t == MACH_ADM5120_UNKNOWN)
- t = myloader_detect_board();
-
- /* Try to detect bootloader type */
- if (cfe_present()) {
- adm5120_boot_loader = BOOT_LOADER_CFE;
- if (t == MACH_ADM5120_UNKNOWN)
- t = cfe_detect_board();
- } else if (uboot_present()) {
- adm5120_boot_loader = BOOT_LOADER_UBOOT;
- if (t == MACH_ADM5120_UNKNOWN)
- t = uboot_detect_board();
- } else {
- if (t == MACH_ADM5120_UNKNOWN)
- t = prom_detect_board();
- }
-
- for (board = adm5120_boards; board->mach_type != MACH_ADM5120_UNKNOWN;
- board++) {
- if (board->mach_type == t)
- break;
- }
-
- memcpy(&adm5120_board, board, sizeof(adm5120_board));
-}
-
-#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
-#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
-
-/*
- * CPU settings detection
- */
-#define CODE_GET_PC(c) ((c) & CODE_PC_MASK)
-#define CODE_GET_REV(c) (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
-#define CODE_GET_PK(c) (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
-#define CODE_GET_CLKS(c) (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
-#define CODE_GET_NAB(c) (((c) & CODE_NAB) != 0)
-
-static void __init adm5120_detect_cpuinfo(void)
-{
- u32 code;
- u32 clks;
-
- code = SWITCH_READ(SWITCH_REG_CODE);
-
- adm5120_product_code = CODE_GET_PC(code);
- adm5120_revision = CODE_GET_REV(code);
- adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
- ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP;
- adm5120_nand_boot = CODE_GET_NAB(code);
-
- clks = CODE_GET_CLKS(code);
- adm5120_speed = ADM5120_SPEED_175;
- if (clks & 1)
- adm5120_speed += 25000000;
- if (clks & 2)
- adm5120_speed += 50000000;
-}
-
-static void adm5120_ndelay(u32 ns)
-{
- u32 t;
-
- SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
- SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
-
- t = (ns+640) / 640;
- t &= TIMER_PERIOD_MASK;
- SWITCH_WRITE(SWITCH_REG_TIMER, t | TIMER_TE);
-
- /* wait until the timer expires */
- do {
- t = SWITCH_READ(SWITCH_REG_TIMER_INT);
- } while ((t & TIMER_INT_TOS) == 0);
-
- /* leave the timer disabled */
- SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
- SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
-}
-
-#define MPMC_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
-#define MPMC_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
-
-extern void prom_printf(char *, ...);
-#if 1
-# define mem_dbg(f, a...) prom_printf("mem_detect: " f, ## a)
-#else
-# define mem_dbg(f, a...)
-#endif
-
-#define MEM_WR_DELAY 10000 /* 0.01 usec */
-
-static int mem_check_pattern(u8 *addr, unsigned long offs)
-{
- volatile u32 *p1 = (volatile u32 *)addr;
- volatile u32 *p2 = (volatile u32 *)(addr+offs);
- u32 t,u,v;
-
- /* save original value */
- t = *p1;
- u = *p2;
-
- if (t != u)
- return 0;
-
- v = 0x55555555;
- if (u == v)
- v = 0xAAAAAAAA;
-
- mem_dbg("write 0x%08lX to 0x%08lX\n", v, (unsigned long)p1);
-
- *p1 = v;
- mem_dbg("delay %d ns\n", MEM_WR_DELAY);
- adm5120_ndelay(MEM_WR_DELAY);
- u = *p2;
-
- mem_dbg("pattern at 0x%08lX is 0x%08lX\n", (unsigned long)p2, u);
-
- /* restore original value */
- *p1 = t;
-
- return (v == u);
-}
-
-static void __init adm5120_detect_memsize(void)
-{
- u32 memctrl;
- u32 size, maxsize;
- u8 *p;
-
- memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
- switch (memctrl & MEMCTRL_SDRS_MASK) {
- case MEMCTRL_SDRS_4M:
- maxsize = 4 << 20;
- break;
- case MEMCTRL_SDRS_8M:
- maxsize = 8 << 20;
- break;
- case MEMCTRL_SDRS_16M:
- maxsize = 16 << 20;
- break;
- default:
- maxsize = 64 << 20;
- break;
- }
-
- /* disable buffers for both SDRAM banks */
- mem_dbg("disable buffers for both banks\n");
- MPMC_WRITE(MPMC_REG_DC0, MPMC_READ(MPMC_REG_DC0) & ~DC_BE);
- MPMC_WRITE(MPMC_REG_DC1, MPMC_READ(MPMC_REG_DC1) & ~DC_BE);
-
- mem_dbg("checking for %ldMB chip in 1st bank\n", maxsize >> 20);
-
- /* detect size of the 1st SDRAM bank */
- p = (u8 *)KSEG1ADDR(0);
- for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
- if (mem_check_pattern(p, size)) {
- /* mirrored address */
- mem_dbg("mirrored data found at offset 0x%lX\n", size);
- break;
- }
- }
-
- mem_dbg("chip size in 1st bank is %ldMB\n", size >> 20);
- adm5120_memsize = size;
-
- if (size != maxsize)
- /* 2nd bank is not supported */
- goto out;
-
- if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
- /* 2nd bank is disabled */
- goto out;
-
- /*
- * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
- * are missing.
- */
- mem_dbg("check presence of 2nd bank\n");
-
- p = (u8 *)KSEG1ADDR(maxsize+size-4);
- if (mem_check_pattern(p, 0)) {
- adm5120_memsize += size;
- }
-
- if (maxsize != size) {
- /* adjusting MECTRL register */
- memctrl &= ~(MEMCTRL_SDRS_MASK);
- switch (size>>20) {
- case 4:
- memctrl |= MEMCTRL_SDRS_4M;
- break;
- case 8:
- memctrl |= MEMCTRL_SDRS_8M;
- break;
- case 16:
- memctrl |= MEMCTRL_SDRS_16M;
- break;
- default:
- memctrl |= MEMCTRL_SDRS_64M;
- break;
- }
- SWITCH_WRITE(SWITCH_REG_MEMCTRL, memctrl);
- }
-
-out:
- /* reenable buffer for both SDRAM banks */
- mem_dbg("enable buffers for both banks\n");
- MPMC_WRITE(MPMC_REG_DC0, MPMC_READ(MPMC_REG_DC0) | DC_BE);
- MPMC_WRITE(MPMC_REG_DC1, MPMC_READ(MPMC_REG_DC1) | DC_BE);
-
- mem_dbg("%dx%ldMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
- size >>20);
-
- size = adm5120_board_memsize();
- if (size > 0 && size != adm5120_memsize) {
- mem_dbg("wrong memory size detected, board settings will be used\n");
- adm5120_memsize = size;
- }
-}
-
-void __init adm5120_info_show(void)
-{
- /* FIXME: move this somewhere else */
- printk(KERN_INFO "ADM%04X%s revision %d, running at %ldMHz\n",
- adm5120_product_code,
- (adm5120_package == ADM5120_PACKAGE_BGA) ? "" : "P",
- adm5120_revision, (adm5120_speed / 1000000)
- );
- printk(KERN_INFO "Boot loader is: %s\n", boot_loader_names[adm5120_boot_loader]);
- printk(KERN_INFO "Booted from : %s flash\n", adm5120_nand_boot ? "NAND":"NOR");
- printk(KERN_INFO "Board is : %s\n", adm5120_board_name());
- printk(KERN_INFO "Memory size : %ldMB\n", adm5120_memsize >> 20);
-}
-
-void __init adm5120_info_init(void)
-{
- adm5120_detect_cpuinfo();
- adm5120_detect_board();
- adm5120_detect_memsize();
-
- adm5120_info_show();
-}
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 GPIO support
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_switch.h>
-
-typedef void __iomem * gpio_reg_t;
-#define GPIO_READ(r) readl((r))
-#define GPIO_WRITE(v,r) writel((v),(r))
-#define GPIO_REG(r) (gpio_reg_t)(KSEG1ADDR(ADM5120_SWITCH_BASE)+r)
-
-struct adm5120_gpio_line {
- u32 flags;
- const char *label;
-};
-
-#define GPIO_FLAG_VALID 0x01
-#define GPIO_FLAG_USED 0x02
-
-struct led_desc {
- gpio_reg_t reg; /* LED register address */
- u8 iv_shift; /* shift amount for input bit */
- u8 mode_shift; /* shift amount for mode bits */
-};
-
-#define LED_DESC(_port,_led) { \
- .reg = GPIO_REG(SWITCH_REG_PORT0_LED+_port*4), \
- .iv_shift = LED0_IV_SHIFT+_led, \
- .mode_shift = _led*4 \
- }
-
-static struct led_desc led_table[15] = {
- LED_DESC(0, 0), LED_DESC(0, 1), LED_DESC(0, 2),
- LED_DESC(1, 0), LED_DESC(1, 1), LED_DESC(1, 2),
- LED_DESC(2, 0), LED_DESC(2, 1), LED_DESC(2, 2),
- LED_DESC(3, 0), LED_DESC(3, 1), LED_DESC(3, 2),
- LED_DESC(4, 0), LED_DESC(4, 1), LED_DESC(4, 2)
-};
-
-static struct adm5120_gpio_line adm5120_gpio_map[ADM5120_GPIO_COUNT] = {
- [ADM5120_GPIO_PIN0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN2] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN3] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN4] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN5] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN6] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_PIN7] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P0L0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P0L1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P0L2] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P1L0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P1L1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P1L2] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P2L0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P2L1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P2L2] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P3L0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P3L1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P3L2] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P4L0] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P4L1] = {.flags = GPIO_FLAG_VALID},
- [ADM5120_GPIO_P4L2] = {.flags = GPIO_FLAG_VALID}
-};
-
-#define gpio_is_invalid(g) ( \
- (g) > ADM5120_GPIO_MAX || \
- ((adm5120_gpio_map[(g)].flags & GPIO_FLAG_VALID) == 0) \
- )
-
-#define gpio_is_used(g) ((adm5120_gpio_map[(g)].flags & GPIO_FLAG_USED) != 0)
-
-/*
- * Helpers for GPIO lines in GPIO_CONF0 register
- */
-#define PIN_IM(p) ((1 << GPIO_CONF0_IM_SHIFT) << p)
-#define PIN_IV(p) ((1 << GPIO_CONF0_IV_SHIFT) << p)
-#define PIN_OE(p) ((1 << GPIO_CONF0_OE_SHIFT) << p)
-#define PIN_OV(p) ((1 << GPIO_CONF0_OV_SHIFT) << p)
-
-static inline int pins_direction_input(unsigned pin)
-{
- gpio_reg_t *reg;
- u32 t;
-
- reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
-
- t = GPIO_READ(reg);
- t &= ~(PIN_OE(pin));
- t |= PIN_IM(pin);
- GPIO_WRITE(t,reg);
-
- return 0;
-}
-
-static inline int pins_direction_output(unsigned pin, int value)
-{
- gpio_reg_t *reg;
- u32 t;
-
- reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
-
- t = GPIO_READ(reg);
- t &= ~(PIN_IM(pin) | PIN_OV(pin));
- t |= PIN_OE(pin);
-
- if (value)
- t |= PIN_OV(pin);
-
- GPIO_WRITE(t,reg);
-
- return 0;
-}
-
-static inline int pins_get_value(unsigned pin)
-{
- gpio_reg_t *reg;
- u32 t;
-
- reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
-
- t = GPIO_READ(reg);
- if ((t & PIN_IM(pin)) != 0)
- t &= PIN_IV(pin);
- else
- t &= PIN_OV(pin);
-
- return (t) ? 1 : 0;
-}
-
-static inline void pins_set_value(unsigned pin, int value)
-{
- gpio_reg_t *reg;
- u32 t;
-
- reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
-
- t = GPIO_READ(reg);
- if (value == 0)
- t &= ~(PIN_OV(pin));
- else
- t |= PIN_OV(pin);
-
- GPIO_WRITE(t,reg);
-}
-
-/*
- * Helpers for GPIO lines in PORTx_LED registers
- */
-static inline int leds_direction_input(unsigned led)
-{
- gpio_reg_t *reg;
- u32 t;
-
- reg = led_table[led].reg;
- t = GPIO_READ(reg);
- t &= ~(LED_MODE_MASK << led_table[led].mode_shift);
- GPIO_WRITE(t,reg);
-
- return 0;
-}
-
-static inline int leds_direction_output(unsigned led, int value)
-{
- gpio_reg_t *reg;
- u32 t, s;
-
- reg = led_table[led].reg;
- s = led_table[led].mode_shift;
-
- t = GPIO_READ(reg);
- t &= ~(LED_MODE_MASK << s);
- if (value)
- t |= (LED_MODE_OUT_HIGH << s);
- else
- t |= (LED_MODE_OUT_LOW << s);
-
- GPIO_WRITE(t,reg);
-
- return 0;
-}
-
-static inline int leds_get_value(unsigned led)
-{
- gpio_reg_t *reg;
- u32 t, m;
-
- reg = led_table[led].reg;
-
- t = GPIO_READ(reg);
- m = (t >> led_table[led].mode_shift) & LED_MODE_MASK;
- if (m == LED_MODE_INPUT)
- return (t >> led_table[led].iv_shift) & 1;
-
- if (m == LED_MODE_OUT_LOW)
- return 0;
-
- return 1;
-}
-
-static inline void leds_set_value(unsigned led, int value)
-{
- gpio_reg_t *reg;
- u32 s,t;
-
- reg = led_table[led].reg;
- s = led_table[led].mode_shift;
-
- t = GPIO_READ(reg);
- t &= ~(LED_MODE_MASK << s);
- if (value)
- t |= (LED_MODE_OUT_HIGH << s);
- else
- t |= (LED_MODE_OUT_LOW << s);
-
- GPIO_WRITE(t,reg);
-}
-
-/*
- * Main GPIO support routines
- */
-int adm5120_gpio_direction_input(unsigned gpio)
-{
- if (gpio_is_invalid(gpio))
- return -EINVAL;
-
- if (gpio < ADM5120_GPIO_P0L0)
- return pins_direction_input(gpio);
-
- gpio -= ADM5120_GPIO_P0L0;
- return leds_direction_input(gpio);
-}
-
-int adm5120_gpio_direction_output(unsigned gpio, int value)
-{
- if (gpio_is_invalid(gpio))
- return -EINVAL;
-
- if (gpio < ADM5120_GPIO_P0L0)
- return pins_direction_output(gpio, value);
-
- gpio -= ADM5120_GPIO_P0L0;
- return leds_direction_output(gpio, value);
-}
-
-int adm5120_gpio_get_value(unsigned gpio)
-{
- if (gpio < ADM5120_GPIO_P0L0)
- return pins_get_value(gpio);
-
- gpio -= ADM5120_GPIO_P0L0;
- return leds_get_value(gpio);
-}
-
-void adm5120_gpio_set_value(unsigned gpio, int value)
-{
- if (gpio < ADM5120_GPIO_P0L0) {
- pins_set_value(gpio, value);
- return;
- }
-
- gpio -= ADM5120_GPIO_P0L0;
- leds_set_value(gpio, value);
-}
-
-int adm5120_gpio_request(unsigned gpio, const char *label)
-{
- if (gpio_is_invalid(gpio))
- return -EINVAL;
-
- if (gpio_is_used(gpio))
- return -EBUSY;
-
- adm5120_gpio_map[gpio].flags |= GPIO_FLAG_USED;
- adm5120_gpio_map[gpio].label = label;
-
- return 0;
-}
-
-void adm5120_gpio_free(unsigned gpio)
-{
- if (gpio_is_invalid(gpio))
- return;
-
- adm5120_gpio_map[gpio].flags &= ~GPIO_FLAG_USED;
- adm5120_gpio_map[gpio].label = NULL;
-}
-
-int adm5120_gpio_to_irq(unsigned gpio)
-{
- /* FIXME: not yet implemented */
- return -EINVAL;
-}
-
-int adm5120_irq_to_gpio(unsigned irq)
-{
- /* FIXME: not yet implemented */
- return -EINVAL;
-}
-
-static int __init adm5120_gpio_init(void)
-{
- int i;
-
- if (adm5120_package_pqfp()) {
- /* GPIO pins 4-7 are unavailable in ADM5120P */
- for (i=ADM5120_GPIO_PIN4; i<=ADM5120_GPIO_PIN7; i++)
- adm5120_gpio_map[i].flags &= ~GPIO_FLAG_VALID;
- }
-
- return 0;
-}
-
-subsys_initcall(adm5120_gpio_init);
-
-EXPORT_SYMBOL(adm5120_gpio_direction_output);
-EXPORT_SYMBOL(adm5120_gpio_direction_input);
-EXPORT_SYMBOL(adm5120_gpio_get_value);
-EXPORT_SYMBOL(adm5120_gpio_set_value);
-EXPORT_SYMBOL(adm5120_gpio_request);
-EXPORT_SYMBOL(adm5120_gpio_free);
-EXPORT_SYMBOL(adm5120_gpio_to_irq);
-EXPORT_SYMBOL(adm5120_irq_to_gpio);
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 specific interrupt handlers
- *
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/version.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-
-#include <asm/irq.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/bitops.h>
-
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-#define INTC_REG(r) (*(volatile u32 *)(KSEG1ADDR(ADM5120_INTC_BASE) + r))
-
-static void adm5120_intc_irq_unmask(unsigned int irq);
-static void adm5120_intc_irq_mask(unsigned int irq);
-static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type);
-
-static struct irq_chip adm5120_intc_irq_chip = {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
- .name = "INTC",
-#else
- .typename = "INTC",
-#endif
- .unmask = adm5120_intc_irq_unmask,
- .mask = adm5120_intc_irq_mask,
- .mask_ack = adm5120_intc_irq_mask,
- .set_type = adm5120_intc_irq_set_type
-};
-
-static struct irqaction adm5120_intc_irq_action = {
- .handler = no_action,
- .name = "cascade [INTC]"
-};
-
-static void adm5120_intc_irq_unmask(unsigned int irq)
-{
- unsigned long flags;
-
- irq -= ADM5120_INTC_IRQ_BASE;
- local_irq_save(flags);
- INTC_REG(INTC_REG_IRQ_ENABLE) = (1 << irq);
- local_irq_restore(flags);
-}
-
-static void adm5120_intc_irq_mask(unsigned int irq)
-{
- unsigned long flags;
-
- irq -= ADM5120_INTC_IRQ_BASE;
- local_irq_save(flags);
- INTC_REG(INTC_REG_IRQ_DISABLE) = (1 << irq);
- local_irq_restore(flags);
-}
-
-static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type)
-{
- /* TODO: not yet tested */
-#if 1
- unsigned int sense;
- unsigned long mode;
- int err;
-
- err = 0;
- sense = flow_type & (IRQ_TYPE_SENSE_MASK);
- switch (sense) {
- case IRQ_TYPE_NONE:
- case IRQ_TYPE_LEVEL_HIGH:
- break;
- case IRQ_TYPE_LEVEL_LOW:
- switch (irq) {
- case ADM5120_IRQ_GPIO2:
- case ADM5120_IRQ_GPIO4:
- break;
- default:
- err = -EINVAL;
- break;
- }
- break;
- default:
- err = -EINVAL;
- break;
- }
-
- if (err)
- return err;
-
- switch (irq) {
- case ADM5120_IRQ_GPIO2:
- case ADM5120_IRQ_GPIO4:
- mode = INTC_REG(INTC_REG_INT_MODE);
- if (sense == IRQ_TYPE_LEVEL_LOW)
- mode |= (1 << (irq-ADM5120_INTC_IRQ_BASE));
- else
- mode &= (1 << (irq-ADM5120_INTC_IRQ_BASE));
-
- INTC_REG(INTC_REG_INT_MODE) = mode;
- /* fallthrogh */
- default:
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= sense;
- break;
- }
-#endif
- return 0;
-}
-
-static void adm5120_intc_irq_dispatch(void)
-{
- unsigned long status;
- int irq;
-
-#if 1
- /* dispatch only one IRQ at a time */
- status = INTC_REG(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
-
- if (status) {
- irq = ADM5120_INTC_IRQ_BASE+fls(status)-1;
- do_IRQ(irq);
- } else
- spurious_interrupt();
-#else
- status = INTC_REG(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
- if (status) {
- for (irq=ADM5120_INTC_IRQ_BASE; irq <= ADM5120_INTC_IRQ_BASE +
- INTC_IRQ_LAST; irq++, status >>=1) {
- if ((status & 1) == 1)
- do_IRQ(irq);
- }
- } else
- spurious_interrupt();
-#endif
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned long pending;
-
- pending = read_c0_status() & read_c0_cause();
-
- if (pending & STATUSF_IP7)
- do_IRQ(ADM5120_IRQ_COUNTER);
- else if (pending & STATUSF_IP2)
- adm5120_intc_irq_dispatch();
- else
- spurious_interrupt();
-}
-
-#define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
-static void __init adm5120_intc_irq_init(int base)
-{
- int i;
-
- /* disable all interrupts */
- INTC_REG(INTC_REG_IRQ_DISABLE) = INTC_INT_ALL;
- /* setup all interrupts to generate IRQ instead of FIQ */
- INTC_REG(INTC_REG_INT_MODE) = 0;
- /* set active level for all external interrupts to HIGH */
- INTC_REG(INTC_REG_INT_LEVEL) = 0;
- /* disable usage of the TEST_SOURCE register */
- INTC_REG(INTC_REG_IRQ_SOURCE_SELECT) = 0;
-
- for(i=ADM5120_INTC_IRQ_BASE; i <= ADM5120_INTC_IRQ_BASE+INTC_IRQ_LAST;
- i++) {
- irq_desc[i].status = INTC_IRQ_STATUS;
- set_irq_chip_and_handler(i, &adm5120_intc_irq_chip,
- handle_level_irq);
- }
-
- setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
-}
-
-void __init arch_init_irq(void) {
- mips_cpu_irq_init();
- adm5120_intc_irq_init(ADM5120_INTC_IRQ_BASE);
-}
+++ /dev/null
-/*****************************************************************************
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- * Copyright (C) 2003 ADMtek Incorporated.
- * daniell@admtek.com.tw
- * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *****************************************************************************/
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/pfn.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/sections.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm-mips/mips-boards/prom.h>
-
-#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
-
-struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
-
-struct prom_pmemblock * __init prom_getmdesc(void)
-{
- unsigned int memsize;
- char cmdline[CL_SIZE], *ptr;
-
- memsize = adm5120_memsize;
- /* Check the command line for a memsize directive that overrides
- * the physical/default amount */
- strcpy(cmdline, arcs_cmdline);
- ptr = strstr(cmdline, "memsize=");
- if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
- ptr = strstr(ptr, " memsize=");
-
- if (ptr)
- memsize = memparse(ptr + 8, &ptr);
-
- memset(mdesc, 0, sizeof(mdesc));
- mdesc[0].type = BOOT_MEM_RAM;
- mdesc[0].base = CPHYSADDR(PFN_ALIGN(&_end));
- mdesc[0].size = memsize - mdesc[0].base;
-
- return &mdesc[0];
-}
-
-void __init prom_meminit(void)
-{
- struct prom_pmemblock *p;
-
- p = prom_getmdesc();
-
- while (p->size)
- {
- long type;
- unsigned long base, size;
- base = p->base;
- type = p->type,
- size = p->size;
- add_memory_region(base, size, type);
- p++;
- }
-}
-
-void __init prom_free_prom_memory(void)
-{
- /* We do not have to prom memory to free */
-}
+++ /dev/null
-/*****************************************************************************
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- * Copyright (C) 2003 ADMtek Incorporated.
- * daniell@admtek.com.tw
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- *****************************************************************************/
-
-#include <linux/init.h>
-#include <linux/autoconf.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-
-static char **prom_envp = NULL;
-
-void setup_prom_printf(int);
-void prom_printf(char *, ...);
-void prom_meminit(void);
-
-
-#define READCSR(r) *(volatile unsigned long *)(0xB2600000+(r))
-#define WRITECSR(r,v) *(volatile unsigned long *)(0xB2600000+(r)) = v
-
-#define UART_DR_REG 0x00
-#define UART_FR_REG 0x18
-#define UART_TX_FIFO_FULL 0x20
-
-int putPromChar(char c)
-{
- WRITECSR(UART_DR_REG, c);
- while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) );
- return 0;
-}
-
-/*
- * Ugly prom_printf used for debugging
- */
-
-void prom_printf(char *fmt, ...)
-{
- va_list args;
- int l;
- char *p, *buf_end;
- char buf[1024];
-
- va_start(args, fmt);
- l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
- va_end(args);
-
- buf_end = buf + l;
-
- for (p = buf; p < buf_end; p++) {
- /* Crude cr/nl handling is better than none */
- if (*p == '\n')
- putPromChar('\r');
- putPromChar(*p);
- }
-}
-
-char *prom_getenv(char *envname)
-{
- char **env;
- char *ret;
-
- ret = NULL;
-
- if (prom_envp== NULL)
- return NULL;
-
- for (env = prom_envp; *env != NULL; env++) {
- if (strcmp(envname, *env++) == 0) {
- ret = *env;
- break;
- }
- }
-
- return ret;
-}
-
-extern char _image_cmdline;
-/*
- * initialize the prom module.
- */
-void __init prom_init(void)
-{
- char *cmd;
-
- if ((fw_arg2 & 3) == 0) {
- prom_envp = (char **)fw_arg2;
- }
-
- adm5120_info_init();
-
- /* you should these macros defined in include/asm/bootinfo.h */
- mips_machgroup = MACH_GROUP_ADM5120;
- mips_machtype = adm5120_board.mach_type;
-
- /* init command line, register a default kernel command line */
- cmd = &_image_cmdline + 8;
- if( strlen(cmd) > 0) strcpy( &(arcs_cmdline[0]), cmd);
- else strcpy(&(arcs_cmdline[0]), CONFIG_CMDLINE);
-
- /* init memory map */
- prom_meminit();
-}
+++ /dev/null
-/*
- * Copyright (C) ADMtek Incorporated.
- * Creator : daniell@admtek.com.tw
- * Copyright 1999, 2000 MIPS Technologies, Inc.
- * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
- * Copyright (C) 2007 OpenWrt.org
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-
-#include <asm/reboot.h>
-#include <asm/io.h>
-#include <asm/time.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-extern void adm5120_time_init(void) __init;
-
-#define ADM5120_SOFTRESET 0x12000004
-
-void adm5120_restart(char *command)
-{
- *(u32*)KSEG1ADDR(ADM5120_SOFTRESET)=1;
-}
-
-
-void adm5120_halt(void)
-{
- printk(KERN_NOTICE "\n** You can safely turn off the power\n");
- while (1);
-}
-
-
-void adm5120_power_off(void)
-{
- adm5120_halt();
-}
-
-void __init plat_mem_setup(void)
-{
- printk(KERN_INFO "ADM5120 board setup\n");
-
- board_time_init = adm5120_time_init;
-
- _machine_restart = adm5120_restart;
- _machine_halt = adm5120_halt;
- pm_power_off = adm5120_power_off;
-
- set_io_port_base(KSEG1);
-}
-
-const char *get_system_type(void)
-{
- return adm5120_board_name();
-}
-
-static struct resource adm5120_hcd_resources[] = {
- [0] = {
- .start = ADM5120_USBC_BASE,
- .end = ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = ADM5120_IRQ_USBC,
- .end = ADM5120_IRQ_USBC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device adm5120hcd_device = {
- .name = "adm5120-hcd",
- .id = -1,
- .num_resources = ARRAY_SIZE(adm5120_hcd_resources),
- .resource = adm5120_hcd_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &adm5120hcd_device,
-};
-
-static int __init adm5120_init(void)
-{
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-subsys_initcall(adm5120_init);
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 specific hooks for MIPS CPU Counter/Compare timer
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This file was based on: arch/mips/gt64120/wrppmc/time.c
- * Original author: Mark.Zhan
- * Copyright (C) 1996, 1997, 2004 by Ralf Baechle
- * Copyright (C) 2006, Wind River System Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-
-#include <asm/irq.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-void __init adm5120_time_init(void)
-{
- mips_hpt_frequency = adm5120_speed / 2;
-}
-
-void __init plat_timer_setup(struct irqaction *irq)
-{
- clear_c0_status(ST0_BEV);
-
- /* Install ISR for CPU Counter interrupt */
- setup_irq(ADM5120_IRQ_COUNTER, irq);
-}
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 specific PCI fixups
- *
- * Copyright (C) ADMtek Incorporated.
- * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/autoconf.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/pci_ids.h>
-#include <linux/pci_regs.h>
-
-#include <asm/delay.h>
-#include <asm/bootinfo.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-struct adm5120_pci_irq {
- u8 slot;
- u8 func;
- u8 pin;
- unsigned irq;
-};
-
-#define PCIIRQ(s,f,p,i) { \
- .slot = (s), \
- .func = (f), \
- .pin = (p), \
- .irq = (i) \
- }
-
-static struct adm5120_pci_irq default_pci_irqs[] __initdata = {
- PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
-};
-
-static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
- PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
- PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
- PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
-};
-
-static struct adm5120_pci_irq cas771_pci_irqs[] __initdata = {
- PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
- PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI1),
- PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
-};
-
-static struct adm5120_pci_irq np28g_pci_irqs[] __initdata = {
- PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
- PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI0),
- PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI1),
- PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
-};
-
-#define GETMAP(n) do { \
- nr_irqs = ARRAY_SIZE(n ## _pci_irqs); \
- p = n ## _pci_irqs; \
- } while (0)
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- struct adm5120_pci_irq *p;
- int nr_irqs;
- int i;
- int irq;
-
- irq = -1;
- if (slot < 1 || slot > 3) {
- printk(KERN_ALERT "PCI: slot number %u is not supported\n",
- slot);
- goto out;
- }
-
- GETMAP(default);
-
- switch (mips_machtype) {
- case MACH_ADM5120_RB_111:
- case MACH_ADM5120_RB_112:
- case MACH_ADM5120_RB_133:
- case MACH_ADM5120_RB_133C:
- case MACH_ADM5120_RB_153:
- GETMAP(rb1xx);
- break;
- case MACH_ADM5120_NP28G:
- GETMAP(np28g);
- break;
- case MACH_ADM5120_P335:
- case MACH_ADM5120_P334WT:
- /* using default mapping */
- break;
- case MACH_ADM5120_CAS771:
- GETMAP(cas771);
- break;
-
- case MACH_ADM5120_NP27G:
- case MACH_ADM5120_NP28GHS:
- case MACH_ADM5120_WP54AG:
- case MACH_ADM5120_WP54G:
- case MACH_ADM5120_WP54G_WRT:
- case MACH_ADM5120_WPP54AG:
- case MACH_ADM5120_WPP54G:
- default:
- printk(KERN_ALERT "PCI: irq map is unknown for %s, using "
- "defaults.\n", adm5120_board_name());
- break;
- }
-
- for (i=0; i<nr_irqs; i++, p++) {
- if ((p->slot == slot) && (PCI_FUNC(dev->devfn) == p->func) &&
- (p->pin == pin)) {
- irq = p->irq;
- break;
- }
- }
-
- if (irq < 0) {
- printk(KERN_ALERT "PCI: no irq found for %s pin:%u\n",
- pci_name(dev), pin);
- } else {
- printk(KERN_INFO "PCI: mapping irq for %s pin:%u, irq:%d\n",
- pci_name(dev), pin, irq);
- }
-
-out:
- return irq;
-}
-
-static void adm5120_pci_fixup(struct pci_dev *dev)
-{
- if (dev->devfn != 0)
- return;
-
- /* setup COMMAND register */
- pci_write_config_word(dev, PCI_COMMAND,
- (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER));
-
- /* setup CACHE_LINE_SIZE register */
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
-
- /* setting up BARS */
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ADMTEK, PCI_DEVICE_ID_ADMTEK_ADM5120,
- adm5120_pci_fixup);
-
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 specific PCI operations
- *
- * Copyright (C) ADMtek Incorporated.
- * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-
-#include <asm/mach-adm5120/adm5120_defs.h>
-
-#define DEBUG 0
-#if DEBUG
-#define DBG(f, ...) printk(f, ## __VA_ARGS__ )
-#else
-#define DBG(f, ...)
-#endif
-
-#define PCI_ENABLE 0x80000000
-
-static inline void write_cfgaddr(u32 addr)
-{
- *(volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR) = (addr | PCI_ENABLE);
-}
-
-static inline void write_cfgdata(u32 data)
-{
- *(volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA) = data;
-
-}
-
-static inline u32 read_cfgdata(void)
-{
- return (*(volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA));
-}
-
-static inline u32 mkaddr(struct pci_bus *bus, unsigned int devfn, int where)
-{
- return (((bus->number & 0xFF) << 16) | ((devfn & 0xFF) << 8) | \
- (where & 0xFC));
-}
-
-static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 *val)
-{
- u32 data;
-
- write_cfgaddr(mkaddr(bus,devfn,where));
- data = read_cfgdata();
-
- DBG("PCI: cfg_read %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
- bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, data);
-
- switch (size) {
- case 1:
- if (where & 1)
- data >>= 8;
- if (where & 2)
- data >>= 16;
- data &= 0xFF;
- break;
- case 2:
- if (where & 2)
- data >>= 16;
- data &= 0xFFFF;
- break;
- }
-
- *val = data;
- DBG(", 0x%08X returned\n", data);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- u32 data;
- int s;
-
- write_cfgaddr(mkaddr(bus,devfn,where));
- data = read_cfgdata();
-
- DBG("PCI: cfg_write %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
- bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, data);
-
- switch (size) {
- case 1:
- s = ((where & 3) << 3);
- data &= ~(0xFF << s);
- data |= ((val & 0xFF) << s);
- break;
- case 2:
- s = ((where & 2) << 4);
- data &= ~(0xFFFF << s);
- data |= ((val & 0xFFFF) << s);
- break;
- case 4:
- data = val;
- break;
- }
-
- write_cfgdata(data);
- DBG(", 0x%08X written\n", data);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops adm5120_pci_ops = {
- .read = pci_config_read,
- .write = pci_config_write,
-};
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 PCI Host Controller driver
- *
- * Copyright (C) ADMtek Incorporated.
- * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-extern struct pci_ops adm5120_pci_ops;
-
-static struct resource pci_io_resource = {
- .name = "ADM5120 PCI I/O",
- .start = ADM5120_PCIIO_BASE,
- .end = ADM5120_PCICFG_ADDR-1,
- .flags = IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource = {
- .name = "ADM5120 PCI MEM",
- .start = ADM5120_PCIMEM_BASE,
- .end = ADM5120_PCIIO_BASE-1,
- .flags = IORESOURCE_MEM
-};
-
-static struct pci_controller adm5120_controller = {
- .pci_ops = &adm5120_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
-};
-
-static int __init adm5120_pci_setup(void)
-{
- int pci_bios;
-
- pci_bios = adm5120_has_pci();
-
- printk("adm5120: system has %sPCI BIOS\n", pci_bios ? "" : "no ");
- if (pci_bios == 0)
- return -1;
-
- /* Avoid ISA compat ranges. */
- PCIBIOS_MIN_IO = 0x00000000;
- PCIBIOS_MIN_MEM = 0x00000000;
-
- /* Set I/O resource limits. */
- ioport_resource.end = 0x1fffffff;
- iomem_resource.end = 0xffffffff;
-
- register_pci_controller(&adm5120_controller);
- return 0;
-}
-
-arch_initcall(adm5120_pci_setup);
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 GPIO LED devices
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-#include <linux/err.h>
-
-#include <linux/gpio_leds.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-
-#include <asm/mach-adm5120/adm5120_info.h>
-
-#define NUM_LEDS_MAX 23
-
-#define ADM5120_GPIO_xxxx 0x100 /* an unknown pin */
-
-struct mach_data {
- unsigned long machtype;
- unsigned count;
- struct gpio_led_platform_data *data;
-};
-
-struct adm5120_leddev {
- struct platform_device pdev;
- struct gpio_led_platform_data pdata;
-};
-
-static int led_count = 0;
-static struct adm5120_leddev *led_devs[NUM_LEDS_MAX];
-
-#define LED_ARRAY(n) \
-static struct gpio_led_platform_data \
-n ## _leds [] __initdata =
-
-#define LED_DATA(n,t,g,off,on) { \
- .name = (n), \
- .trigger = (t), \
- .gpio = (g), \
- .value_off = (off), \
- .value_on = (on) \
- }
-
-#define LED_STD(g,n,t) LED_DATA((n),(t),(g), 0, 1)
-#define LED_INV(g,n,t) LED_DATA((n),(t),(g), 1, 0)
-
-/*
- * ZyXEL boards
- */
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
-LED_ARRAY(p334) { /* FIXME: untested */
- LED_INV(ADM5120_GPIO_xxxx, "power", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "lan1", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "lan2", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "lan3", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "lan4", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "wan", NULL ),
-};
-#endif
-
-LED_ARRAY(p334wt) {
- LED_INV(ADM5120_GPIO_PIN2, "power", NULL ),
- LED_INV(ADM5120_GPIO_P3L0, "lan1", NULL ),
- LED_INV(ADM5120_GPIO_P2L0, "lan2", NULL ),
- LED_INV(ADM5120_GPIO_P1L0, "lan3", NULL ),
- LED_INV(ADM5120_GPIO_P0L0, "lan4", NULL ),
- LED_INV(ADM5120_GPIO_P4L0, "wan", NULL ),
- LED_INV(ADM5120_GPIO_P4L2, "wlan", NULL ),
- LED_INV(ADM5120_GPIO_P2L2, "otist", NULL ),
- LED_INV(ADM5120_GPIO_P1L2, "hidden", NULL ),
-};
-
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
-LED_ARRAY(p335) { /* FIXME: untested */
- LED_INV(ADM5120_GPIO_PIN2, "power", NULL ),
- LED_INV(ADM5120_GPIO_P3L0, "lan1", NULL ),
- LED_INV(ADM5120_GPIO_P2L0, "lan2", NULL ),
- LED_INV(ADM5120_GPIO_P1L0, "lan3", NULL ),
- LED_INV(ADM5120_GPIO_P0L0, "lan4", NULL ),
- LED_INV(ADM5120_GPIO_P4L0, "wan", NULL ),
- LED_INV(ADM5120_GPIO_P4L2, "wlan", NULL ),
- LED_INV(ADM5120_GPIO_P2L2, "otist", NULL ),
- LED_INV(ADM5120_GPIO_xxxx, "usb", NULL ),
-};
-#endif
-
-/*
- * Mikrotik boards
- */
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
-LED_ARRAY(rb100) { /* FIXME: untested */
- LED_STD(ADM5120_GPIO_PIN6, "power", NULL ),
- LED_STD(ADM5120_GPIO_PIN3, "user", NULL ),
-};
-#endif
-
-/*
- * Compex boards
- */
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
-LED_ARRAY(np27g) { /* FIXME: untested */
- LED_STD(ADM5120_GPIO_xxxx, "lan1", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "lan2", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "lan3", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "lan4", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "wan_cond", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "wlan", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "wan_act", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb1", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb2", NULL ),
- LED_INV(ADM5120_GPIO_PIN2, "power", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "diag", NULL ),
-};
-#endif
-
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
-LED_ARRAY(np28g) { /* FIXME: untested */
- LED_STD(ADM5120_GPIO_xxxx, "lan1", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "lan2", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "lan3", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "wan", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "wlan", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb1", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb2", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb3", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "usb4", NULL ),
- LED_INV(ADM5120_GPIO_PIN2, "power", NULL ),
- LED_STD(ADM5120_GPIO_xxxx, "diag", NULL ),
-};
-#endif
-
-LED_ARRAY(wp54g) {
- LED_INV(ADM5120_GPIO_PIN2, "diag", NULL ),
- LED_INV(ADM5120_GPIO_PIN6, "wlan", NULL ),
- LED_INV(ADM5120_GPIO_PIN7, "wan", NULL ),
- LED_INV(ADM5120_GPIO_P0L0, "lan1", NULL ),
- LED_INV(ADM5120_GPIO_P1L0, "lan2", NULL ),
-};
-
-LED_ARRAY(unknown) {
-#if defined(CONFIG_LEDS_ADM5120_DIAG)
- LED_STD(ADM5120_GPIO_PIN0, "gpio0", NULL ),
- LED_STD(ADM5120_GPIO_PIN1, "gpio1", NULL ),
- LED_STD(ADM5120_GPIO_PIN2, "gpio2", NULL ),
- LED_STD(ADM5120_GPIO_PIN3, "gpio3", NULL ),
- LED_STD(ADM5120_GPIO_PIN4, "gpio4", NULL ),
- LED_STD(ADM5120_GPIO_PIN5, "gpio5", NULL ),
- LED_STD(ADM5120_GPIO_PIN6, "gpio6", NULL ),
- LED_STD(ADM5120_GPIO_PIN7, "gpio7", NULL ),
- LED_STD(ADM5120_GPIO_P0L0, "port0led0", NULL ),
- LED_STD(ADM5120_GPIO_P0L1, "port0led1", NULL ),
- LED_STD(ADM5120_GPIO_P0L2, "port0led2", NULL ),
- LED_STD(ADM5120_GPIO_P1L0, "port1led0", NULL ),
- LED_STD(ADM5120_GPIO_P1L1, "port1led1", NULL ),
- LED_STD(ADM5120_GPIO_P1L2, "port1led2", NULL ),
- LED_STD(ADM5120_GPIO_P2L0, "port2led0", NULL ),
- LED_STD(ADM5120_GPIO_P2L1, "port2led1", NULL ),
- LED_STD(ADM5120_GPIO_P2L2, "port2led2", NULL ),
- LED_STD(ADM5120_GPIO_P3L0, "port3led0", NULL ),
- LED_STD(ADM5120_GPIO_P3L1, "port3led1", NULL ),
- LED_STD(ADM5120_GPIO_P3L2, "port3led2", NULL ),
- LED_STD(ADM5120_GPIO_P4L0, "port4led0", NULL ),
- LED_STD(ADM5120_GPIO_P4L1, "port4led1", NULL ),
- LED_STD(ADM5120_GPIO_P4L2, "port4led2", NULL ),
-#endif
-};
-
-#define MACH_DATA(m, n) { \
- .machtype = (m), \
- .count = ARRAY_SIZE(n ## _leds), \
- .data = n ## _leds \
-}
-
-static struct mach_data machines[] __initdata = {
- MACH_DATA(MACH_ADM5120_UNKNOWN, unknown),
- MACH_DATA(MACH_ADM5120_P334WT, p334wt),
- MACH_DATA(MACH_ADM5120_WP54AG, wp54g),
- MACH_DATA(MACH_ADM5120_WP54G, wp54g),
- MACH_DATA(MACH_ADM5120_WP54G_WRT, wp54g),
- MACH_DATA(MACH_ADM5120_WPP54AG, wp54g),
- MACH_DATA(MACH_ADM5120_WPP54G, wp54g),
-#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
- MACH_DATA(MACH_ADM5120_P334, p334),
- MACH_DATA(MACH_ADM5120_P335, p335),
- MACH_DATA(MACH_ADM5120_RB_111, rb100),
- MACH_DATA(MACH_ADM5120_RB_112, rb100),
- MACH_DATA(MACH_ADM5120_NP27G, np27g),
- MACH_DATA(MACH_ADM5120_NP28G, np28g),
- MACH_DATA(MACH_ADM5120_NP28GHS, np28g),
-#endif
-};
-
-static struct adm5120_leddev * __init
-create_leddev(struct gpio_led_platform_data *data)
-{
- struct adm5120_leddev *p;
-
- p = kzalloc(sizeof(*p), GFP_KERNEL);
- if (p == NULL)
- return NULL;
-
- memcpy(&p->pdata, data, sizeof(p->pdata));
- p->pdev.dev.platform_data = &p->pdata;
-
- return p;
-}
-
-static void
-destroy_leddev(struct adm5120_leddev *led)
-{
- if (led)
- kfree(led);
-}
-
-static struct mach_data * __init
-adm5120_leds_findmach(unsigned long machtype)
-{
- struct mach_data *mach;
- int i;
-
- mach = NULL;
- for (i=0; i<ARRAY_SIZE(machines); i++) {
- if (machines[i].machtype == machtype) {
- mach = &machines[i];
- break;
- }
- };
-
-#if defined(CONFIG_LEDS_ADM5120_DIAG)
- if (mach == NULL)
- mach = machines;
-#endif
-
- return mach;
-}
-
-static int __init
-adm5120_leds_init(void)
-{
- struct mach_data *mach;
- int i, ret;
-
- if (mips_machgroup != MACH_GROUP_ADM5120) {
- ret = -EINVAL;
- goto err;
- }
-
- mach = adm5120_leds_findmach(mips_machtype);
- if (mach == NULL) {
- /* the board is not yet supported */
- ret = -EINVAL;
- goto err;
- }
-
- for (i=0; i < mach->count; i++) {
- led_devs[i] = create_leddev(&mach->data[i]);
- if (led_devs[i] == NULL) {
- ret = -ENOMEM;
- goto err_destroy;
- }
- led_devs[i]->pdev.name = "gpio-led";
- led_devs[i]->pdev.id = i;
- }
-
- for (i=0; i < mach->count; i++) {
- ret = platform_device_register(&led_devs[i]->pdev);
- if (ret)
- goto err_unregister;
- }
-
- led_count = mach->count;
- return 0;
-
-err_unregister:
- for (i--; i>=0; i--)
- platform_device_unregister(&led_devs[i]->pdev);
-
-err_destroy:
- for (i=0; i<led_count; i++)
- destroy_leddev(led_devs[i]);
-err:
- return ret;
-}
-
-static void __exit
-adm5120_leds_exit(void)
-{
- int i;
-
- for (i=0; i < led_count; i++) {
- platform_device_unregister(&led_devs[i]->pdev);
- destroy_leddev(led_devs[i]);
- }
-}
-
-module_init(adm5120_leds_init);
-module_exit(adm5120_leds_exit);
-
-MODULE_AUTHOR("Gabor Juhos <juhosg@freemail.hu>");
-MODULE_DESCRIPTION(DRV_DESC);
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-/*
- * $Id$
- *
- * Driver for LEDs connected to GPIO lines
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This file was derived from:
- * /drivers/led/leds-s3c24xx.c
- * (c) 2006 Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-#include <linux/err.h>
-
-#include <linux/gpio_leds.h>
-
-#include <asm/io.h>
-#include <asm/gpio.h>
-
-#define DRV_NAME "gpio-led"
-#define DRV_DESC "GPIO LEDs driver"
-
-struct gpio_led_device {
- struct led_classdev cdev;
- struct gpio_led_platform_data *pdata;
-};
-
-static inline struct gpio_led_device *pdev_to_led(struct platform_device *dev)
-{
- return platform_get_drvdata(dev);
-}
-
-static inline struct gpio_led_device *class_to_led(struct led_classdev *led_cdev)
-{
- return container_of(led_cdev, struct gpio_led_device, cdev);
-}
-
-static void gpio_led_set(struct led_classdev *led_cdev,
- enum led_brightness brightness)
-{
- struct gpio_led_device *led;
- struct gpio_led_platform_data *pdata;
-
- led = class_to_led(led_cdev);
- pdata = led->pdata;
-
- switch (brightness) {
- case LED_OFF:
- gpio_direction_output(pdata->gpio, pdata->value_off);
- break;
- default:
- gpio_direction_output(pdata->gpio, pdata->value_on);
- break;
- }
-}
-
-static int __devinit gpio_led_probe(struct platform_device *dev)
-{
- struct gpio_led_platform_data *pdata;
- struct gpio_led_device *led;
- int ret;
-
- pdata = dev->dev.platform_data;
- if (pdata == NULL) {
- dev_err(&dev->dev, "no platform data, id=%d\n", dev->id);
- ret = -EINVAL;
- goto err;
- }
-
- if (pdata->name == NULL) {
- dev_err(&dev->dev, "no led name specified\n");
- ret = -EINVAL;
- goto err;
- }
-
- ret = gpio_request(pdata->gpio, pdata->name);
- if (ret) {
- dev_err(&dev->dev, "gpio_request failed\n");
- goto err;
- }
-
- led = kzalloc(sizeof(*led), GFP_KERNEL);
- if (led == NULL) {
- dev_err(&dev->dev, "no memory for device");
- ret = -ENOMEM;
- goto err_free_gpio;
- }
-
- platform_set_drvdata(dev, led);
- led->pdata = pdata;
- led->cdev.name = pdata->name;
- led->cdev.brightness_set = gpio_led_set;
-#ifdef CONFIG_LEDS_TRIGGERS
- led->cdev.default_trigger = pdata->trigger;
-#endif
-
- ret = led_classdev_register(&dev->dev, &led->cdev);
- if (ret < 0) {
- dev_err(&dev->dev, "led_classdev_register failed");
- goto err_free_led;
- }
-
- return 0;
-
-err_free_led:
- kfree(led);
-err_free_gpio:
- gpio_free(pdata->gpio);
-err:
- return ret;
-}
-
-static int __devexit gpio_led_remove(struct platform_device *dev)
-{
- struct gpio_led_device *led;
- struct gpio_led_platform_data *pdata;
-
- pdata = dev->dev.platform_data;
-
- led = pdev_to_led(dev);
- led_classdev_unregister(&led->cdev);
- kfree(led);
-
- gpio_free(pdata->gpio);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int gpio_led_suspend(struct platform_device *dev,
- pm_message_t state)
-{
- struct gpio_led_device *led;
-
- led = pdev_to_led(dev);
- led_classdev_suspend(&led->cdev);
-
- return 0;
-}
-
-static int gpio_led_resume(struct platform_device *dev)
-{
- struct gpio_led_device *led;
-
- led = pdev_to_led(dev);
- led_classdev_resume(&led->cdev);
-
- return 0;
-}
-#endif /* CONFIG_PM */
-
-static struct platform_driver gpio_led_driver = {
- .probe = gpio_led_probe,
- .remove = __devexit_p(gpio_led_remove),
-#ifdef CONFIG_PM
- .suspend = gpio_led_suspend,
- .resume = gpio_led_resume,
-#endif
- .driver = {
- .name = DRV_NAME,
- .owner = THIS_MODULE,
- },
-};
-
-static int __init gpio_led_init(void)
-{
- int ret;
-
- ret = platform_driver_register(&gpio_led_driver);
- if (ret)
- printk(KERN_ALERT DRV_DESC " register failed\n");
- else
- printk(KERN_INFO DRV_DESC " registered\n");
-
- return ret;
-}
-
-static void __exit gpio_led_exit(void)
-{
- platform_driver_unregister(&gpio_led_driver);
-}
-
-module_init(gpio_led_init);
-module_exit(gpio_led_exit);
-
-MODULE_AUTHOR("Gabor Juhos <juhosg@freemail.hu>");
-MODULE_DESCRIPTION(DRV_DESC);
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
- * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
- * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
- *
- * original functions for finding root filesystem from Mike Baker
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Copyright 2001-2003, Broadcom Corporation
- * All Rights Reserved.
- *
- * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
- * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
- * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
- *
- * Flash mapping for ADM5120 boards
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/wait.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/sched.h>
-#ifdef CONFIG_MTD_PARTITIONS
-#include <linux/mtd/partitions.h>
-#endif
-#include <linux/squashfs_fs.h>
-#include <linux/jffs2.h>
-#include <linux/crc32.h>
-#include <asm/io.h>
-#include <asm/mach-adm5120/myloader.h>
-#include <asm/mach-adm5120/adm5120_info.h>
-
-extern int parse_myloader_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- unsigned long origin);
-
-/* Macros for switching flash bank
- ADM5120 only support 2MB flash address space
- so GPIO5 is used as A20
- */
-#define GPIO_IO ((volatile unsigned long *)0xb20000b8)
-#define FLASH_A20_GPIO 5
-#define FLASH_BOUNDARY 0x200000
-
-
-#define TRX_MAGIC 0x30524448 /* "HDR0" */
-#define TRX_VERSION 1
-#define TRX_MAX_LEN 0x3A0000
-#define TRX_NO_HEADER 1 /* Do not write TRX header */
-#define TRX_GZ_FILES 0x2 /* Contains up to TRX_MAX_OFFSET individual gzip files */
-#define TRX_MAX_OFFSET 3
-
-struct trx_header {
- u32 magic; /* "HDR0" */
- u32 len; /* Length of file including header */
- u32 crc32; /* 32-bit CRC from flag_version to end of file */
- u32 flag_version; /* 0:15 flags, 16:31 version */
- u32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */
-};
-
-#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y))
-#define NVRAM_SPACE 0x8000
-#define WINDOW_ADDR 0x1fc00000
-#define WINDOW_SIZE 0x400000
-#define BUSWIDTH 2
-
-static struct mtd_info *adm5120_mtd;
-
-static struct map_info adm5120_map = {
- name: "adm5120 physically mapped flash",
- size: WINDOW_SIZE,
- bankwidth: BUSWIDTH,
- phys: WINDOW_ADDR,
-};
-
-#ifdef CONFIG_MTD_PARTITIONS
-
-static struct mtd_partition adm5120_cfe_parts[] = {
- { name: "cfe", offset: 0, size: 0, mask_flags: MTD_WRITEABLE, },
- { name: "linux", offset: 0, size: 0, },
- { name: "rootfs", offset: 0, size: 0, },
- { name: "nvram", offset: 0, size: 0, },
- { name: NULL, },
-};
-
-
-static void flash_switch_bank(unsigned long addr)
-{
- unsigned long val;
-
- /* Set GPIO as output */
- val = *GPIO_IO | (1 << (FLASH_A20_GPIO+16));
- if ( addr & FLASH_BOUNDARY ) {
- val |= 1 << (FLASH_A20_GPIO + 24);
- } else {
- val &= ~(1 << (FLASH_A20_GPIO + 24));
- }
- *GPIO_IO = val;
-}
-
-static map_word adm5120_map_read(struct map_info *map, unsigned long ofs)
-{
- flash_switch_bank(ofs);
- return inline_map_read(map, ofs);
-}
-
-static void adm5120_map_write(struct map_info *map, const map_word datum, unsigned long ofs)
-{
- flash_switch_bank(ofs);
- inline_map_write(map, datum, ofs);
-}
-
-static void adm5120_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
-{
- ssize_t tmp;
-
- if (from < FLASH_BOUNDARY) {
- tmp = (len < (FLASH_BOUNDARY - from)) ? len : (FLASH_BOUNDARY - from);
- flash_switch_bank(0);
- inline_map_copy_from(map, to, from, tmp);
- to = (void *)((char *)to + tmp);
- from += tmp;
- len -= tmp;
- }
- if (len > 0) {
- flash_switch_bank(FLASH_BOUNDARY);
- inline_map_copy_from(map, to, from, len);
- }
-
-}
-
-static int __init
-find_cfe_size(struct mtd_info *mtd, size_t size)
-{
- struct trx_header *trx;
- unsigned char buf[512];
- int off;
- size_t len;
- int blocksize;
-
- trx = (struct trx_header *) buf;
-
- blocksize = mtd->erasesize;
- if (blocksize < 0x10000)
- blocksize = 0x10000;
-
- for (off = (128*1024); off < size; off += blocksize) {
- memset(buf, 0xe5, sizeof(buf));
-
- /*
- * Read into buffer
- */
- if (mtd->read(mtd, off, sizeof(buf), &len, buf) ||
- len != sizeof(buf))
- continue;
-
- /* found a TRX header */
- if (le32_to_cpu(trx->magic) == TRX_MAGIC) {
- goto found;
- }
- }
-
- printk(KERN_NOTICE
- "%s: Couldn't find bootloader size\n",
- mtd->name);
- return -1;
-
- found:
- printk(KERN_NOTICE "bootloader size: %d\n", off);
- return off;
-
-}
-
-/*
- * Copied from mtdblock.c
- *
- * Cache stuff...
- *
- * Since typical flash erasable sectors are much larger than what Linux's
- * buffer cache can handle, we must implement read-modify-write on flash
- * sectors for each block write requests. To avoid over-erasing flash sectors
- * and to speed things up, we locally cache a whole flash sector while it is
- * being written to until a different sector is required.
- */
-
-static void erase_callback(struct erase_info *done)
-{
- wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
- wake_up(wait_q);
-}
-
-static int erase_write (struct mtd_info *mtd, unsigned long pos,
- int len, const char *buf)
-{
- struct erase_info erase;
- DECLARE_WAITQUEUE(wait, current);
- wait_queue_head_t wait_q;
- size_t retlen;
- int ret;
-
- /*
- * First, let's erase the flash block.
- */
-
- init_waitqueue_head(&wait_q);
- erase.mtd = mtd;
- erase.callback = erase_callback;
- erase.addr = pos;
- erase.len = len;
- erase.priv = (u_long)&wait_q;
-
- set_current_state(TASK_INTERRUPTIBLE);
- add_wait_queue(&wait_q, &wait);
-
- ret = mtd->erase(mtd, &erase);
- if (ret) {
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&wait_q, &wait);
- printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
- "on \"%s\" failed\n",
- pos, len, mtd->name);
- return ret;
- }
-
- schedule(); /* Wait for erase to finish. */
- remove_wait_queue(&wait_q, &wait);
-
- /*
- * Next, writhe data to flash.
- */
-
- ret = mtd->write (mtd, pos, len, &retlen, buf);
- if (ret)
- return ret;
- if (retlen != len)
- return -EIO;
- return 0;
-}
-
-
-
-
-static int __init
-find_root(struct mtd_info *mtd, size_t size, struct mtd_partition *part)
-{
- struct trx_header trx, *trx2;
- unsigned char buf[512], *block;
- int off, blocksize;
- u32 i, crc = ~0;
- size_t len;
- struct squashfs_super_block *sb = (struct squashfs_super_block *) buf;
-
- blocksize = mtd->erasesize;
- if (blocksize < 0x10000)
- blocksize = 0x10000;
-
- for (off = (128*1024); off < size; off += blocksize) {
- memset(&trx, 0xe5, sizeof(trx));
-
- /*
- * Read into buffer
- */
- if (mtd->read(mtd, off, sizeof(trx), &len, (char *) &trx) ||
- len != sizeof(trx))
- continue;
-
- /* found a TRX header */
- if (le32_to_cpu(trx.magic) == TRX_MAGIC) {
- part->offset = le32_to_cpu(trx.offsets[2]) ? :
- le32_to_cpu(trx.offsets[1]);
- part->size = le32_to_cpu(trx.len);
-
- part->size -= part->offset;
- part->offset += off;
-
- goto found;
- }
- }
-
- printk(KERN_NOTICE
- "%s: Couldn't find root filesystem\n",
- mtd->name);
- return -1;
-
- found:
- if (part->size == 0)
- return 0;
-
- if (mtd->read(mtd, part->offset, sizeof(buf), &len, buf) || len != sizeof(buf))
- return 0;
-
- /* Move the fs outside of the trx */
- part->size = 0;
-
- if (trx.len != part->offset + part->size - off) {
- /* Update the trx offsets and length */
- trx.len = part->offset + part->size - off;
-
- /* Update the trx crc32 */
- for (i = (u32) &(((struct trx_header *)NULL)->flag_version); i <= trx.len; i += sizeof(buf)) {
- if (mtd->read(mtd, off + i, sizeof(buf), &len, buf) || len != sizeof(buf))
- return 0;
- crc = crc32_le(crc, buf, min(sizeof(buf), trx.len - i));
- }
- trx.crc32 = crc;
-
- /* read first eraseblock from the trx */
- block = kmalloc(mtd->erasesize, GFP_KERNEL);
- trx2 = (struct trx_header *) block;
- if (mtd->read(mtd, off, mtd->erasesize, &len, block) || len != mtd->erasesize) {
- printk("Error accessing the first trx eraseblock\n");
- return 0;
- }
-
- printk("Updating TRX offsets and length:\n");
- printk("old trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx2->offsets[0], trx2->offsets[1], trx2->offsets[2], trx2->len, trx2->crc32);
- printk("new trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx.offsets[0], trx.offsets[1], trx.offsets[2], trx.len, trx.crc32);
-
- /* Write updated trx header to the flash */
- memcpy(block, &trx, sizeof(trx));
- if (mtd->unlock)
- mtd->unlock(mtd, off, mtd->erasesize);
- erase_write(mtd, off, mtd->erasesize, block);
- if (mtd->sync)
- mtd->sync(mtd);
- kfree(block);
- printk("Done\n");
- }
-
- return part->size;
-}
-
-struct mtd_partition * __init
-init_mtd_partitions(struct mtd_info *mtd, size_t size)
-{
- int cfe_size;
-
- if ((cfe_size = find_cfe_size(mtd,size)) < 0)
- return NULL;
-
- /* boot loader */
- adm5120_cfe_parts[0].offset = 0;
- adm5120_cfe_parts[0].size = cfe_size;
-
- /* nvram */
- if (cfe_size != 384 * 1024) {
- adm5120_cfe_parts[3].offset = size - ROUNDUP(NVRAM_SPACE, mtd->erasesize);
- adm5120_cfe_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize);
- } else {
- /* nvram (old 128kb config partition on netgear wgt634u) */
- adm5120_cfe_parts[3].offset = adm5120_cfe_parts[0].size;
- adm5120_cfe_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize);
- }
-
- /* linux (kernel and rootfs) */
- if (cfe_size != 384 * 1024) {
- adm5120_cfe_parts[1].offset = adm5120_cfe_parts[0].size;
- adm5120_cfe_parts[1].size = adm5120_cfe_parts[3].offset -
- adm5120_cfe_parts[1].offset;
- } else {
- /* do not count the elf loader, which is on one block */
- adm5120_cfe_parts[1].offset = adm5120_cfe_parts[0].size +
- adm5120_cfe_parts[3].size + mtd->erasesize;
- adm5120_cfe_parts[1].size = size -
- adm5120_cfe_parts[0].size -
- (2*adm5120_cfe_parts[3].size) -
- mtd->erasesize;
- }
-
- /* find and size rootfs */
- find_root(mtd,size,&adm5120_cfe_parts[2]);
- adm5120_cfe_parts[2].size = size - adm5120_cfe_parts[2].offset - adm5120_cfe_parts[3].size;
-
- return adm5120_cfe_parts;
-}
-#endif
-
-int __init init_adm5120_map(void)
-{
- size_t size;
- int ret = 0;
-#if defined (CONFIG_MTD_PARTITIONS) || (CONFIG_MTD_MYLOADER_PARTS)
- struct mtd_partition *parts;
- int i, parsed_nr_parts = 0;
-#endif
- printk("adm5120 : flash init : 0x%08x 0x%08x\n", WINDOW_ADDR, adm5120_board.flash0_size);
- adm5120_map.virt = ioremap_nocache(WINDOW_ADDR, adm5120_board.flash0_size);
-
- if (!adm5120_map.virt) {
- printk("Failed to ioremap\n");
- return -EIO;
- }
- simple_map_init(&adm5120_map);
- adm5120_map.read = adm5120_map_read;
- adm5120_map.write = adm5120_map_write;
- adm5120_map.copy_from = adm5120_map_copy_from;
-
- if (!(adm5120_mtd = do_map_probe("cfi_probe", &adm5120_map))) {
- printk("Failed to do_map_probe\n");
- iounmap((void *)adm5120_map.virt);
- return -ENXIO;
- }
-
- adm5120_mtd->owner = THIS_MODULE;
-
- size = adm5120_mtd->size;
-
- printk(KERN_NOTICE "Flash device: 0x%x at 0x%x\n", size, WINDOW_ADDR);
-
-#ifdef CONFIG_MTD_PARTITIONS
-
- if (adm5120_boot_loader == BOOT_LOADER_CFE)
- {
- printk(KERN_NOTICE "adm5120 : using CFE flash mapping\n");
- parts = init_mtd_partitions(adm5120_mtd, size);
-
- for (i = 0; parts[i].name; i++);
- ret = add_mtd_partitions(adm5120_mtd, parts, i);
-
- if (ret) {
- printk(KERN_ERR "Flash: add_mtd_partitions failed\n");
- goto fail;
- }
- }
-#endif
-#ifdef CONFIG_MTD_MYLOADER_PARTS
- if (adm5120_boot_loader == BOOT_LOADER_MYLOADER)
- {
- printk(KERN_NOTICE "adm5120 : using MyLoader flash mapping\n");
- char *part_type;
-
- if (parsed_nr_parts == 0) {
- ret = parse_myloader_partitions(adm5120_mtd, &parts, 0);
-
- if (ret > 0) {
- part_type ="MyLoader";
- parsed_nr_parts = ret;
- }
- }
- ret = add_mtd_partitions(adm5120_mtd, parts, parsed_nr_parts);
-
- if (ret) {
- printk(KERN_ERR "Flash: add_mtd_partitions failed\n");
- goto fail;
- }
- }
-#endif
- return 0;
-
- fail:
- if (adm5120_mtd)
- map_destroy(adm5120_mtd);
- if (adm5120_map.virt)
- iounmap((void *)adm5120_map.virt);
- adm5120_map.virt = 0;
- return ret;
-}
-
-void __exit cleanup_adm5120_map(void)
-{
-#ifdef CONFIG_MTD_PARTITIONS
- del_mtd_partitions(adm5120_mtd);
-#endif
- map_destroy(adm5120_mtd);
- iounmap((void *)adm5120_map.virt);
-}
-
-module_init(init_adm5120_map);
-module_exit(cleanup_adm5120_map);
+++ /dev/null
-/*
- * Parse MyLoader-style flash partition tables and produce a Linux partition
- * array to match.
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This file was based on drivers/mtd/redboot.c
- * Author: Red Hat, Inc. - David Woodhouse <dwmw2@cambridge.redhat.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/vmalloc.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#include <linux/byteorder/generic.h>
-#include <asm/mach-adm5120/myloader.h>
-
-#define NAME_LEN_MAX 20
-#define NAME_MYLOADER "MyLoader"
-#define NAME_PARTITION_TABLE "Partition Table"
-#define BLOCK_LEN_MIN 0x10000
-
-int parse_myloader_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- unsigned long origin)
-{
- struct mylo_partition_table *tab;
- struct mylo_partition *part;
- struct mtd_partition *mtd_parts;
- struct mtd_partition *mtd_part;
- int num_parts;
- int ret, i;
- size_t retlen;
- size_t parts_len;
- char *names;
- unsigned long offset;
- unsigned long blocklen;
-
- tab = vmalloc(sizeof(*tab));
- if (!tab) {
- return -ENOMEM;
- goto out;
- }
-
- blocklen = master->erasesize;
- if (blocklen < BLOCK_LEN_MIN)
- blocklen = BLOCK_LEN_MIN;
-
- /* Partition Table is always located on the second erase block */
- offset = blocklen;
- printk(KERN_NOTICE "Searching for MyLoader partition table "
- "in %s at offset 0x%lx\n", master->name, offset);
-
- ret = master->read(master, offset, sizeof(*tab), &retlen,
- (void *)tab);
-
- if (ret)
- goto out;
-
- if (retlen != sizeof(*tab)) {
- ret = -EIO;
- goto out_free_buf;
- }
-
- /* Check for Partition Table magic number */
- if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) {
- printk(KERN_NOTICE "No MyLoader partition table detected "
- "in %s\n", master->name);
- ret = 0;
- goto out_free_buf;
- }
-
- /* The MyLoader and the Partition Table is always present */
- num_parts = 2;
-
- /* Detect number of used partitions */
- for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
- part = &tab->partitions[i];
-
- if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
- continue;
-
- num_parts++;
- }
-
-
- mtd_parts = kzalloc((num_parts*sizeof(*mtd_part) + num_parts*NAME_LEN_MAX),
- GFP_KERNEL);
-
- if (!mtd_parts) {
- ret = -ENOMEM;
- goto out_free_buf;
- }
-
- mtd_part = mtd_parts;
- names = (char *)&mtd_parts[num_parts];
-
- strncpy(names, NAME_MYLOADER, NAME_LEN_MAX-1);
- mtd_part->name = names;
- mtd_part->offset = 0;
- mtd_part->size = blocklen;
- mtd_part++;
- names += NAME_LEN_MAX;
-
- strncpy(names, NAME_PARTITION_TABLE, NAME_LEN_MAX-1);
- mtd_part->name = names;
- mtd_part->offset = blocklen;
- mtd_part->size = blocklen;
- mtd_part++;
- names += NAME_LEN_MAX;
-
- for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
- part = &tab->partitions[i];
-
- if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
- continue;
-
- sprintf(names, "partition%d", i);
- mtd_part->name = names;
- mtd_part->offset = le32_to_cpu(part->addr);
- mtd_part->size = le32_to_cpu(part->size);
- mtd_part++;
- names += NAME_LEN_MAX;
- }
-
- *pparts = mtd_parts;
- ret = num_parts;
-
-out_free_buf:
- vfree(tab);
-out:
- return ret;
-}
-
-static struct mtd_part_parser mylo_mtd_parser = {
- .owner = THIS_MODULE,
- .parse_fn = parse_myloader_partitions,
- .name = NAME_MYLOADER,
-};
-
-static int __init mylo_mtd_parser_init(void)
-{
- return register_mtd_parser(&mylo_mtd_parser);
-}
-
-static void __exit mylo_mtd_parser_exit(void)
-{
- deregister_mtd_parser(&mylo_mtd_parser);
-}
-
-module_init(mylo_mtd_parser_init);
-module_exit(mylo_mtd_parser_exit);
-
-MODULE_AUTHOR("Gabor Juhos <juhosg@freemail.hu>");
-MODULE_DESCRIPTION("Parsing code for MyLoader partition tables");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*==============================================================================*/
-/* rbmipsnand.c */
-/* This module is derived from the 2.4 driver shipped by Microtik for their */
-/* Routerboard 1xx and 5xx series boards. It provides support for the built in */
-/* NAND flash on the Routerboard 1xx series boards for Linux 2.6.19+. */
-/* Licence: Original Microtik code seems not to have a licence. */
-/* Rewritten code all GPL V2. */
-/* Copyright(C) 2007 david.goodenough@linkchoose.co.uk (for rewriten code) */
-/*==============================================================================*/
-
-#include <linux/init.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/delay.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/bootinfo.h>
-
-#define SMEM1_BASE 0x10000000 // from ADM5120 documentation
-#define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(SMEM1_BASE) + x)))
-
-#define NAND_RW_REG 0x0 //data register
-#define NAND_SET_CEn 0x1 //CE# low
-#define NAND_CLR_CEn 0x2 //CE# high
-#define NAND_CLR_CLE 0x3 //CLE low
-#define NAND_SET_CLE 0x4 //CLE high
-#define NAND_CLR_ALE 0x5 //ALE low
-#define NAND_SET_ALE 0x6 //ALE high
-#define NAND_SET_SPn 0x7 //SP# low (use spare area)
-#define NAND_CLR_SPn 0x8 //SP# high (do not use spare area)
-#define NAND_SET_WPn 0x9 //WP# low
-#define NAND_CLR_WPn 0xA //WP# high
-#define NAND_STS_REG 0xB //Status register
-
-#define MEM32(x) *((volatile unsigned *) (x))
-static void __iomem *p_nand;
-
-static int rb100_dev_ready(struct mtd_info *mtd) {
- return SMEM1(NAND_STS_REG) & 0x80;
-}
-
-static void rbmips_hwcontrol100(struct mtd_info *mtd, int cmd, unsigned int ctrl) {
- struct nand_chip *chip = mtd->priv;
- if (ctrl & NAND_CTRL_CHANGE) {
- SMEM1((( ctrl & NAND_CLE) ? NAND_SET_CLE : NAND_CLR_CLE)) = 0x01;
- SMEM1((( ctrl & NAND_ALE) ? NAND_SET_ALE : NAND_CLR_ALE)) = 0x01;
- SMEM1((( ctrl & NAND_NCE) ? NAND_SET_CEn : NAND_CLR_CEn)) = 0x01;
- }
- if( cmd != NAND_CMD_NONE)
- writeb( cmd, chip->IO_ADDR_W);
-}
-
-static struct mtd_partition partition_info[] = {
- {
- name: "RouterBoard NAND Boot",
- offset: 0,
- size: 4 * 1024 * 1024
- },
- {
- name: "rootfs",
- offset: MTDPART_OFS_NXTBLK,
- size: MTDPART_SIZ_FULL
- }
-};
-
-static struct mtd_info rmtd;
-static struct nand_chip rnand;
-/*========================================================================*/
-/* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader */
-/* will not be able to find the kernel that we load. So set the oobinfo */
-/* when creating the partitions. */
-/*========================================================================*/
-static struct nand_ecclayout rb_ecclayout = {
- .eccbytes = 6,
- .eccpos = { 8, 9, 10, 13, 14, 15 },
- .oobavail = 9,
- .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1} }
-};
-static unsigned init_ok = 0;
-
-unsigned get_rbnand_block_size(void) {
- return init_ok ? rmtd.writesize : 0;
-}
-
-EXPORT_SYMBOL(get_rbnand_block_size);
-
-int __init rbmips_init(void) {
- memset(&rmtd, 0, sizeof(rmtd));
- memset(&rnand, 0, sizeof(rnand));
- printk(KERN_INFO "RB1xx nand\n");
- MEM32(0xB2000064) = 0x100;
- MEM32(0xB2000008) = 0x1;
- SMEM1(NAND_SET_SPn) = 0x01;
- SMEM1(NAND_CLR_WPn) = 0x01;
- rnand.IO_ADDR_R = (unsigned char *)KSEG1ADDR(SMEM1_BASE);
- rnand.IO_ADDR_W = rnand.IO_ADDR_R;
- rnand.cmd_ctrl = rbmips_hwcontrol100;
- rnand.dev_ready = rb100_dev_ready;
- p_nand = (void __iomem *)ioremap(( unsigned long)SMEM1_BASE, 0x1000);
- if (!p_nand) {
- printk(KERN_WARNING "RB1xx nand Unable ioremap buffer\n");
- return -ENXIO;
- }
- rnand.ecc.mode = NAND_ECC_SOFT;
- rnand.ecc.layout = &rb_ecclayout;
- rnand.chip_delay = 25;
- rnand.options |= NAND_NO_AUTOINCR;
- rmtd.priv = &rnand;
- if (nand_scan(&rmtd, 1) && nand_scan(&rmtd, 1)
- && nand_scan(&rmtd, 1) && nand_scan(&rmtd, 1)) {
- printk(KERN_INFO "RB1xxx nand device not found\n");
- iounmap ((void *)p_nand);
- return -ENXIO;
- }
- add_mtd_partitions(&rmtd, partition_info, 2);
- init_ok = 1;
- return 0;
-}
-
-module_init(rbmips_init);
-
+++ /dev/null
-/*
- * ADM5120 built in ethernet switch driver
- *
- * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
- *
- * Inspiration for this driver came from the original ADMtek 2.4
- * driver, Copyright ADMtek Inc.
- */
-#include <linux/autoconf.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <asm/mipsregs.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include "adm5120sw.h"
-
-#include <asm/mach-adm5120/adm5120_info.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
-MODULE_DESCRIPTION("ADM5120 ethernet switch driver");
-MODULE_LICENSE("GPL");
-
-/*
- * The ADM5120 uses an internal matrix to determine which ports
- * belong to which VLAN.
- * The default generates a VLAN (and device) for each port
- * (including MII port) and the CPU port is part of all of them.
- *
- * Another example, one big switch and everything mapped to eth0:
- * 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00
- */
-static unsigned char vlan_matrix[SW_DEVS] = {
- 0x41, 0x42, 0x44, 0x48, 0x50, 0x60
-};
-
-/* default settings - unlimited TX and RX on all ports, default shaper mode */
-static unsigned char bw_matrix[SW_DEVS] = {
- 0, 0, 0, 0, 0, 0
-};
-
-static int adm5120_nrdevs;
-
-static struct net_device *adm5120_devs[SW_DEVS];
-static struct adm5120_dma
- adm5120_dma_txh_v[ADM5120_DMA_TXH] __attribute__((aligned(16))),
- adm5120_dma_txl_v[ADM5120_DMA_TXL] __attribute__((aligned(16))),
- adm5120_dma_rxh_v[ADM5120_DMA_RXH] __attribute__((aligned(16))),
- adm5120_dma_rxl_v[ADM5120_DMA_RXL] __attribute__((aligned(16))),
- *adm5120_dma_txh,
- *adm5120_dma_txl,
- *adm5120_dma_rxh,
- *adm5120_dma_rxl;
-static struct sk_buff
- *adm5120_skb_rxh[ADM5120_DMA_RXH],
- *adm5120_skb_rxl[ADM5120_DMA_RXL],
- *adm5120_skb_txh[ADM5120_DMA_TXH],
- *adm5120_skb_txl[ADM5120_DMA_TXL];
-static int adm5120_rxhi = 0;
-static int adm5120_rxli = 0;
-/* We don't use high priority tx for now */
-/*static int adm5120_txhi = 0;*/
-static int adm5120_txli = 0;
-static int adm5120_txhit = 0;
-static int adm5120_txlit = 0;
-static int adm5120_if_open = 0;
-
-static inline void adm5120_set_reg(unsigned int reg, unsigned long val)
-{
- *(volatile unsigned long*)(SW_BASE+reg) = val;
-}
-
-static inline unsigned long adm5120_get_reg(unsigned int reg)
-{
- return *(volatile unsigned long*)(SW_BASE+reg);
-}
-
-static inline void adm5120_rxfixup(struct adm5120_dma *dma,
- struct sk_buff **skbl, int num)
-{
- int i;
-
- /* Resubmit the entire ring */
- for (i=0; i<num; i++) {
- dma[i].status = 0;
- dma[i].cntl = 0;
- dma[i].len = ADM5120_DMA_RXSIZE;
- dma[i].data = ADM5120_DMA_ADDR(skbl[i]->data) |
- ADM5120_DMA_OWN | (i==num-1 ? ADM5120_DMA_RINGEND : 0);
- }
-}
-
-static inline void adm5120_rx(struct adm5120_dma *dma, struct sk_buff **skbl,
- int *index, int num)
-{
- struct sk_buff *skb, *skbn;
- struct adm5120_sw *priv;
- struct net_device *dev;
- int port, vlan, len;
-
- while (!(dma[*index].data & ADM5120_DMA_OWN)) {
- port = (dma[*index].status & ADM5120_DMA_PORTID);
- port >>= ADM5120_DMA_PORTSHIFT;
- for (vlan = 0; vlan < adm5120_nrdevs; vlan++) {
- if ((1<<port) & vlan_matrix[vlan])
- break;
- }
- if (vlan == adm5120_nrdevs)
- vlan = 0;
- dev = adm5120_devs[vlan];
- skb = skbl[*index];
- len = (dma[*index].status & ADM5120_DMA_LEN);
- len >>= ADM5120_DMA_LENSHIFT;
- len -= ETH_FCS;
-
- priv = netdev_priv(dev);
- if (len <= 0 || len > ADM5120_DMA_RXSIZE ||
- dma[*index].status & ADM5120_DMA_FCSERR) {
- priv->stats.rx_errors++;
- skbn = NULL;
- } else {
- skbn = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
- if (skbn) {
- skb_put(skb, len);
- skb->dev = dev;
- skb->protocol = eth_type_trans(skb, dev);
- skb->ip_summed = CHECKSUM_UNNECESSARY;
- dev->last_rx = jiffies;
- priv->stats.rx_packets++;
- priv->stats.rx_bytes+=len;
- skb_reserve(skbn, 2);
- skbl[*index] = skbn;
- } else {
- printk(KERN_INFO "%s recycling!\n", dev->name);
- }
- }
-
- dma[*index].status = 0;
- dma[*index].cntl = 0;
- dma[*index].len = ADM5120_DMA_RXSIZE;
- dma[*index].data = ADM5120_DMA_ADDR(skbl[*index]->data) |
- ADM5120_DMA_OWN |
- (num-1==*index ? ADM5120_DMA_RINGEND : 0);
- if (num == ++*index)
- *index = 0;
- if (skbn)
- netif_rx(skb);
- }
-}
-
-static inline void adm5120_tx(struct adm5120_dma *dma, struct sk_buff **skbl,
- int *index, int num)
-{
- while((dma[*index].data & ADM5120_DMA_OWN) == 0 && skbl[*index]) {
- dev_kfree_skb_irq(skbl[*index]);
- skbl[*index] = NULL;
- if (++*index == num)
- *index = 0;
- }
-}
-
-static irqreturn_t adm5120_sw_irq(int irq, void *dev_id)
-{
- unsigned long intreg;
-
- adm5120_set_reg(ADM5120_INT_MASK,
- adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTHANDLE);
-
- intreg = adm5120_get_reg(ADM5120_INT_ST);
- adm5120_set_reg(ADM5120_INT_ST, intreg);
-
- if (intreg & ADM5120_INT_RXH)
- adm5120_rx(adm5120_dma_rxh, adm5120_skb_rxh, &adm5120_rxhi,
- ADM5120_DMA_RXH);
- if (intreg & ADM5120_INT_HFULL)
- adm5120_rxfixup(adm5120_dma_rxh, adm5120_skb_rxh,
- ADM5120_DMA_RXH);
- if (intreg & ADM5120_INT_RXL)
- adm5120_rx(adm5120_dma_rxl, adm5120_skb_rxl, &adm5120_rxli,
- ADM5120_DMA_RXL);
- if (intreg & ADM5120_INT_LFULL)
- adm5120_rxfixup(adm5120_dma_rxl, adm5120_skb_rxl,
- ADM5120_DMA_RXL);
- if (intreg & ADM5120_INT_TXH)
- adm5120_tx(adm5120_dma_txh, adm5120_skb_txh, &adm5120_txhit,
- ADM5120_DMA_TXH);
- if (intreg & ADM5120_INT_TXL)
- adm5120_tx(adm5120_dma_txl, adm5120_skb_txl, &adm5120_txlit,
- ADM5120_DMA_TXL);
-
- adm5120_set_reg(ADM5120_INT_MASK,
- adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE);
-
- return IRQ_HANDLED;
-}
-
-static void adm5120_set_vlan(char *matrix)
-{
- unsigned long val;
-
- val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
- adm5120_set_reg(ADM5120_VLAN_GI, val);
- val = matrix[4] + (matrix[5]<<8);
- adm5120_set_reg(ADM5120_VLAN_GII, val);
-}
-
-static void adm5120_set_bw(char *matrix)
-{
- unsigned long val;
-
- /* Port 0 to 3 are set using the bandwidth control 0 register */
- val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
- adm5120_set_reg(ADM5120_BW_CTL0, val);
-
- /* Port 4 and 5 are set using the bandwidth control 1 register */
- val = matrix[4];
- if (matrix[5] == 1)
- adm5120_set_reg(ADM5120_BW_CTL1, val | 0x80000000);
- else
- adm5120_set_reg(ADM5120_BW_CTL1, val & ~0x8000000);
-
- printk(KERN_DEBUG "D: ctl0 0x%x, ctl1 0x%x\n",
- adm5120_get_reg(ADM5120_BW_CTL0),
- adm5120_get_reg(ADM5120_BW_CTL1));
-}
-
-static int adm5120_sw_open(struct net_device *dev)
-{
- if (!adm5120_if_open++)
- adm5120_set_reg(ADM5120_INT_MASK,
- adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE);
- netif_start_queue(dev);
- return 0;
-}
-
-static int adm5120_sw_stop(struct net_device *dev)
-{
- netif_stop_queue(dev);
- if (!--adm5120_if_open)
- adm5120_set_reg(ADM5120_INT_MASK,
- adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTMASKALL);
- return 0;
-}
-
-static int adm5120_sw_tx(struct sk_buff *skb, struct net_device *dev)
-{
- struct adm5120_dma *dma = adm5120_dma_txl;
- struct sk_buff **skbl = adm5120_skb_txl;
- struct adm5120_sw *priv = netdev_priv(dev);
- int *index = &adm5120_txli;
- int num = ADM5120_DMA_TXL;
- int trigger = ADM5120_SEND_TRIG_L;
-
- dev->trans_start = jiffies;
- if (dma[*index].data & ADM5120_DMA_OWN) {
- dev_kfree_skb(skb);
- priv->stats.tx_dropped++;
- return 0;
- }
-
- dma[*index].data = ADM5120_DMA_ADDR(skb->data) | ADM5120_DMA_OWN;
- if (*index == num-1)
- dma[*index].data |= ADM5120_DMA_RINGEND;
- dma[*index].status =
- ((skb->len<ETH_ZLEN?ETH_ZLEN:skb->len) << ADM5120_DMA_LENSHIFT) |
- (0x1 << priv->port);
- dma[*index].len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
- priv->stats.tx_packets++;
- priv->stats.tx_bytes += skb->len;
- skbl[*index]=skb;
-
- if (++*index == num)
- *index = 0;
- adm5120_set_reg(ADM5120_SEND_TRIG, trigger);
-
- return 0;
-}
-
-static void adm5120_tx_timeout(struct net_device *dev)
-{
- netif_wake_queue(dev);
-}
-
-static struct net_device_stats *adm5120_sw_stats(struct net_device *dev)
-{
- return &((struct adm5120_sw *)netdev_priv(dev))->stats;
-}
-
-static void adm5120_set_multicast_list(struct net_device *dev)
-{
- struct adm5120_sw *priv = netdev_priv(dev);
- int portmask;
-
- portmask = vlan_matrix[priv->port] & 0x3f;
-
- if (dev->flags & IFF_PROMISC)
- adm5120_set_reg(ADM5120_CPUP_CONF,
- adm5120_get_reg(ADM5120_CPUP_CONF) &
- ~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL));
- else
- adm5120_set_reg(ADM5120_CPUP_CONF,
- adm5120_get_reg(ADM5120_CPUP_CONF) |
- (portmask << ADM5120_DISUNSHIFT));
-
- if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI ||
- dev->mc_count)
- adm5120_set_reg(ADM5120_CPUP_CONF,
- adm5120_get_reg(ADM5120_CPUP_CONF) &
- ~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL));
- else
- adm5120_set_reg(ADM5120_CPUP_CONF,
- adm5120_get_reg(ADM5120_CPUP_CONF) |
- (portmask << ADM5120_DISMCSHIFT));
-}
-
-static void adm5120_write_mac(struct net_device *dev)
-{
- struct adm5120_sw *priv = netdev_priv(dev);
- unsigned char *mac = dev->dev_addr;
-
- adm5120_set_reg(ADM5120_MAC_WT1,
- mac[2] | (mac[3]<<8) | (mac[4]<<16) | (mac[5]<<24));
- adm5120_set_reg(ADM5120_MAC_WT0, (priv->port<<3) |
- (mac[0]<<16) | (mac[1]<<24) | ADM5120_MAC_WRITE | ADM5120_VLAN_EN);
-
- while (!(adm5120_get_reg(ADM5120_MAC_WT0) & ADM5120_MAC_WRITE_DONE));
-}
-
-static int adm5120_sw_set_mac_address(struct net_device *dev, void *p)
-{
- struct sockaddr *addr = p;
-
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
- adm5120_write_mac(dev);
- return 0;
-}
-
-static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-{
- int err;
- struct adm5120_sw_info info;
- struct adm5120_sw *priv = netdev_priv(dev);
-
- switch(cmd) {
- case SIOCGADMINFO:
- info.magic = 0x5120;
- info.ports = adm5120_nrdevs;
- info.vlan = priv->port;
- err = copy_to_user(rq->ifr_data, &info, sizeof(info));
- if (err)
- return -EFAULT;
- break;
- case SIOCSMATRIX:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
- err = copy_from_user(vlan_matrix, rq->ifr_data,
- sizeof(vlan_matrix));
- if (err)
- return -EFAULT;
- adm5120_set_vlan(vlan_matrix);
- break;
- case SIOCGMATRIX:
- err = copy_to_user(rq->ifr_data, vlan_matrix,
- sizeof(vlan_matrix));
- if (err)
- return -EFAULT;
- break;
- case SIOCGETBW:
- err = copy_to_user(rq->ifr_data, bw_matrix, sizeof(bw_matrix));
- if (err)
- return -EFAULT;
- break;
- case SIOCSETBW:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
- err = copy_from_user(bw_matrix, rq->ifr_data, sizeof(bw_matrix));
- if (err)
- return -EFAULT;
- adm5120_set_bw(bw_matrix);
- break;
- default:
- return -EOPNOTSUPP;
- }
- return 0;
-}
-
-static void adm5120_dma_tx_init(struct adm5120_dma *dma, struct sk_buff **skb,
- int num)
-{
- memset(dma, 0, sizeof(struct adm5120_dma)*num);
- dma[num-1].data |= ADM5120_DMA_RINGEND;
- memset(skb, 0, sizeof(struct skb*)*num);
-}
-
-static void adm5120_dma_rx_init(struct adm5120_dma *dma, struct sk_buff **skb,
- int num)
-{
- int i;
-
- memset(dma, 0, sizeof(struct adm5120_dma)*num);
- for (i=0; i<num; i++) {
- skb[i] = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
- if (!skb[i]) {
- i=num;
- break;
- }
- skb_reserve(skb[i], 2);
- dma[i].data = ADM5120_DMA_ADDR(skb[i]->data) | ADM5120_DMA_OWN;
- dma[i].cntl = 0;
- dma[i].len = ADM5120_DMA_RXSIZE;
- dma[i].status = 0;
- }
- dma[i-1].data |= ADM5120_DMA_RINGEND;
-}
-
-static int __init adm5120_sw_init(void)
-{
- int i, err;
- struct net_device *dev;
-
- err = request_irq(ADM5120_IRQ_SWITCH, adm5120_sw_irq, 0, "ethernet switch", NULL);
- if (err)
- goto out;
-
- adm5120_nrdevs = adm5120_board.iface_num;
- if (adm5120_nrdevs > 5 && !adm5120_has_gmii())
- adm5120_nrdevs = 5;
-
- adm5120_set_reg(ADM5120_CPUP_CONF,
- ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING |
- ADM5120_DISUNALL | ADM5120_DISMCALL);
- adm5120_set_reg(ADM5120_PORT_CONF0, ADM5120_ENMC | ADM5120_ENBP);
-
- adm5120_set_reg(ADM5120_PHY_CNTL2, adm5120_get_reg(ADM5120_PHY_CNTL2) |
- ADM5120_AUTONEG | ADM5120_NORMAL | ADM5120_AUTOMDIX);
- adm5120_set_reg(ADM5120_PHY_CNTL3, adm5120_get_reg(ADM5120_PHY_CNTL3) |
- ADM5120_PHY_NTH);
-
- adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
- adm5120_set_reg(ADM5120_INT_ST, ADM5120_INTMASKALL);
-
- adm5120_dma_txh = (void *)KSEG1ADDR((u32)adm5120_dma_txh_v);
- adm5120_dma_txl = (void *)KSEG1ADDR((u32)adm5120_dma_txl_v);
- adm5120_dma_rxh = (void *)KSEG1ADDR((u32)adm5120_dma_rxh_v);
- adm5120_dma_rxl = (void *)KSEG1ADDR((u32)adm5120_dma_rxl_v);
-
- adm5120_dma_tx_init(adm5120_dma_txh, adm5120_skb_txh, ADM5120_DMA_TXH);
- adm5120_dma_tx_init(adm5120_dma_txl, adm5120_skb_txl, ADM5120_DMA_TXL);
- adm5120_dma_rx_init(adm5120_dma_rxh, adm5120_skb_rxh, ADM5120_DMA_RXH);
- adm5120_dma_rx_init(adm5120_dma_rxl, adm5120_skb_rxl, ADM5120_DMA_RXL);
- adm5120_set_reg(ADM5120_SEND_HBADDR, KSEG1ADDR(adm5120_dma_txh));
- adm5120_set_reg(ADM5120_SEND_LBADDR, KSEG1ADDR(adm5120_dma_txl));
- adm5120_set_reg(ADM5120_RECEIVE_HBADDR, KSEG1ADDR(adm5120_dma_rxh));
- adm5120_set_reg(ADM5120_RECEIVE_LBADDR, KSEG1ADDR(adm5120_dma_rxl));
-
- adm5120_set_vlan(vlan_matrix);
-
- for (i=0; i<adm5120_nrdevs; i++) {
- adm5120_devs[i] = alloc_etherdev(sizeof(struct adm5120_sw));
- if (!adm5120_devs[i]) {
- err = -ENOMEM;
- goto out_int;
- }
-
- dev = adm5120_devs[i];
- SET_MODULE_OWNER(dev);
- memset(netdev_priv(dev), 0, sizeof(struct adm5120_sw));
- ((struct adm5120_sw*)netdev_priv(dev))->port = i;
- dev->base_addr = SW_BASE;
- dev->irq = ADM5120_IRQ_SWITCH;
- dev->open = adm5120_sw_open;
- dev->hard_start_xmit = adm5120_sw_tx;
- dev->stop = adm5120_sw_stop;
- dev->get_stats = adm5120_sw_stats;
- dev->set_multicast_list = adm5120_set_multicast_list;
- dev->do_ioctl = adm5120_do_ioctl;
- dev->tx_timeout = adm5120_tx_timeout;
- dev->watchdog_timeo = ETH_TX_TIMEOUT;
- dev->set_mac_address = adm5120_sw_set_mac_address;
- /* HACK alert!!! In the original admtek driver it is asumed
- that you can read the MAC addressess from flash, but edimax
- decided to leave that space intentionally blank...
- */
- memcpy(dev->dev_addr, "\x00\x50\xfc\x11\x22\x01", 6);
- dev->dev_addr[5] += i;
- adm5120_write_mac(dev);
-
- if ((err = register_netdev(dev))) {
- free_netdev(dev);
- goto out_int;
- }
- printk(KERN_INFO "%s: ADM5120 switch port%d\n", dev->name, i);
- }
- adm5120_set_reg(ADM5120_CPUP_CONF,
- ADM5120_CRC_PADDING | ADM5120_DISUNALL | ADM5120_DISMCALL);
-
- return 0;
-
-out_int:
- /* Undo everything that did succeed */
- for (; i; i--) {
- unregister_netdev(adm5120_devs[i-1]);
- free_netdev(adm5120_devs[i-1]);
- }
- free_irq(ADM5120_IRQ_SWITCH, NULL);
-out:
- printk(KERN_ERR "ADM5120 Ethernet switch init failed\n");
- return err;
-}
-
-static void __exit adm5120_sw_exit(void)
-{
- int i;
-
- for (i = 0; i < adm5120_nrdevs; i++) {
- unregister_netdev(adm5120_devs[i]);
- free_netdev(adm5120_devs[i-1]);
- }
-
- free_irq(ADM5120_IRQ_SWITCH, NULL);
-
- for (i = 0; i < ADM5120_DMA_RXH; i++) {
- if (!adm5120_skb_rxh[i])
- break;
- kfree_skb(adm5120_skb_rxh[i]);
- }
- for (i = 0; i < ADM5120_DMA_RXL; i++) {
- if (!adm5120_skb_rxl[i])
- break;
- kfree_skb(adm5120_skb_rxl[i]);
- }
-}
-
-module_init(adm5120_sw_init);
-module_exit(adm5120_sw_exit);
+++ /dev/null
-/*
- * Defines for ADM5120 built in ethernet switch driver
- *
- * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
- *
- * Values come from ADM5120 datasheet and original ADMtek 2.4 driver,
- * Copyright ADMtek Inc.
- */
-
-#ifndef _INCLUDE_ADM5120SW_H_
-#define _INCLUDE_ADM5120SW_H_
-
-#define SW_BASE KSEG1ADDR(0x12000000)
-#define SW_DEVS 6
-
-#define ETH_TX_TIMEOUT HZ/4
-#define ETH_FCS 4;
-
-#define ADM5120_CODE 0x00 /* CPU description */
-#define ADM5120_CODE_PQFP 0x20000000 /* package type */
-#define ADM5120_CPUP_CONF 0x24 /* CPU port config */
-#define ADM5120_DISCCPUPORT 0x00000001 /* disable cpu port */
-#define ADM5120_CRC_PADDING 0x00000002 /* software crc */
-#define ADM5120_DISUNSHIFT 9
-#define ADM5120_DISUNALL 0x00007e00 /* disable unknown from all */
-#define ADM5120_DISMCSHIFT 16
-#define ADM5120_DISMCALL 0x003f0000 /* disable multicast from all */
-#define ADM5120_PORT_CONF0 0x28
-#define ADM5120_ENMC 0x00003f00 /* Enable MC routing (ex cpu) */
-#define ADM5120_ENBP 0x003f0000 /* Enable Back Pressure */
-#define ADM5120_VLAN_GI 0x40 /* VLAN settings */
-#define ADM5120_VLAN_GII 0x44
-#define ADM5120_SEND_TRIG 0x48
-#define ADM5120_SEND_TRIG_L 0x00000001
-#define ADM5120_SEND_TRIG_H 0x00000002
-#define ADM5120_MAC_WT0 0x58
-#define ADM5120_MAC_WRITE 0x00000001
-#define ADM5120_MAC_WRITE_DONE 0x00000002
-#define ADM5120_VLAN_EN 0x00000040
-#define ADM5120_MAC_WT1 0x5c
-#define ADM5120_BW_CTL0 0x60 /* Bandwidth control 0 */
-#define ADM5120_BW_CTL1 0x64 /* Bandwidth control 1 */
-#define ADM5120_PHY_CNTL2 0x7c
-#define ADM5120_AUTONEG 0x0000001f /* Auto negotiate */
-#define ADM5120_NORMAL 0x01f00000 /* PHY normal mode */
-#define ADM5120_AUTOMDIX 0x3e000000 /* Auto MDIX */
-#define ADM5120_PHY_CNTL3 0x80
-#define ADM5120_PHY_NTH 0x00000400
-#define ADM5120_INT_ST 0xb0
-#define ADM5120_INT_RXH 0x0000004
-#define ADM5120_INT_RXL 0x0000008
-#define ADM5120_INT_HFULL 0x0000010
-#define ADM5120_INT_LFULL 0x0000020
-#define ADM5120_INT_TXH 0x0000001
-#define ADM5120_INT_TXL 0x0000002
-#define ADM5120_INT_MASK 0xb4
-#define ADM5120_INTMASKALL 0x1FDEFFF /* All interrupts */
-#define ADM5120_INTHANDLE (ADM5120_INT_RXH | ADM5120_INT_RXL | \
- ADM5120_INT_HFULL | ADM5120_INT_LFULL | \
- ADM5120_INT_TXH | ADM5120_INT_TXL)
-#define ADM5120_SEND_HBADDR 0xd0
-#define ADM5120_SEND_LBADDR 0xd4
-#define ADM5120_RECEIVE_HBADDR 0xd8
-#define ADM5120_RECEIVE_LBADDR 0xdc
-
-struct adm5120_dma {
- u32 data;
- u32 cntl;
- u32 len;
- u32 status;
-} __attribute__ ((packed));
-
-#define ADM5120_DMA_MASK 0x01ffffff
-#define ADM5120_DMA_OWN 0x80000000 /* buffer owner */
-#define ADM5120_DMA_RINGEND 0x10000000 /* Last in DMA ring */
-
-#define ADM5120_DMA_ADDR(ptr) ((u32)(ptr) & ADM5120_DMA_MASK)
-#define ADM5120_DMA_PORTID 0x00007000
-#define ADM5120_DMA_PORTSHIFT 12
-#define ADM5120_DMA_LEN 0x07ff0000
-#define ADM5120_DMA_LENSHIFT 16
-#define ADM5120_DMA_FCSERR 0x00000008
-
-#define ADM5120_DMA_TXH 16
-#define ADM5120_DMA_TXL 64
-#define ADM5120_DMA_RXH 16
-#define ADM5120_DMA_RXL 8
-
-#define ADM5120_DMA_RXSIZE 1550
-#define ADM5120_DMA_EXTRA 20
-
-struct adm5120_sw {
- int port;
- struct net_device_stats stats;
-};
-
-#define SIOCSMATRIX SIOCDEVPRIVATE
-#define SIOCGMATRIX SIOCDEVPRIVATE+1
-#define SIOCGADMINFO SIOCDEVPRIVATE+2
-#define SIOCGETBW SIOCDEVPRIVATE+3
-#define SIOCSETBW SIOCDEVPRIVATE+4
-
-struct adm5120_sw_info {
- u16 magic;
- u16 ports;
- u16 vlan;
-};
-
-#endif /* _INCLUDE_ADM5120SW_H_ */
+++ /dev/null
-/*
- * Serial driver for ADM5120 SoC
- *
- * Derived from drivers/serial/uart00.c
- * Copyright 2001 Altera Corporation
- *
- * Some pieces are derived from the ADMtek 2.4 serial driver.
- * Copyright (C) ADMtek Incorporated, 2003
- * daniell@admtek.com.tw
- * Which again was derived from drivers/char/serial.c
- * Copyright (C) Linus Torvalds et al.
- *
- * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/ioport.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/console.h>
-
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_irq.h>
-
-#define ADM5120_UART_REG(base, reg) \
- (*(volatile u32 *)KSEG1ADDR((base)+(reg)))
-
-#define ADM5120_UARTCLK_FREQ 62500000
-#define ADM5120_UART_BAUDDIV(rate) ((unsigned long)(ADM5120_UARTCLK_FREQ/(16*(rate)) - 1))
-
-#define ADM5120_UART_BAUD115200 ADM5120_UART_BAUDDIV(115200)
-
-#define ADM5120_UART_DATA 0x00
-#define ADM5120_UART_RS 0x04
-#define ADM5120_UART_LCR_H 0x08
-#define ADM5120_UART_LCR_M 0x0c
-#define ADM5120_UART_LCR_L 0x10
-#define ADM5120_UART_CR 0x14
-#define ADM5120_UART_FR 0x18
-#define ADM5120_UART_IR 0x1c
-
-#define ADM5120_UART_FE 0x01
-#define ADM5120_UART_PE 0x02
-#define ADM5120_UART_BE 0x04
-#define ADM5120_UART_OE 0x08
-#define ADM5120_UART_ERR 0x0f
-#define ADM5120_UART_FIFO_EN 0x10
-#define ADM5120_UART_EN 0x01
-#define ADM5120_UART_TIE 0x20
-#define ADM5120_UART_RIE 0x50
-#define ADM5120_UART_IE 0x78
-#define ADM5120_UART_CTS 0x01
-#define ADM5120_UART_DSR 0x02
-#define ADM5120_UART_DCD 0x04
-#define ADM5120_UART_TXFF 0x20
-#define ADM5120_UART_TXFE 0x80
-#define ADM5120_UART_RXFE 0x10
-#define ADM5120_UART_BRK 0x01
-#define ADM5120_UART_PEN 0x02
-#define ADM5120_UART_EPS 0x04
-#define ADM5120_UART_STP2 0x08
-#define ADM5120_UART_W5 0x00
-#define ADM5120_UART_W6 0x20
-#define ADM5120_UART_W7 0x40
-#define ADM5120_UART_W8 0x60
-#define ADM5120_UART_MIS 0x01
-#define ADM5120_UART_RIS 0x02
-#define ADM5120_UART_TIS 0x04
-#define ADM5120_UART_RTIS 0x08
-
-static void adm5120ser_stop_tx(struct uart_port *port)
-{
- ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_TIE;
-}
-
-static void adm5120ser_irq_rx(struct uart_port *port)
-{
- struct tty_struct *tty = port->info->tty;
- unsigned int status, ch, rds, flg, ignored = 0;
-
- status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
- while (!(status & ADM5120_UART_RXFE)) {
- /*
- * We need to read rds before reading the
- * character from the fifo
- */
- rds = ADM5120_UART_REG(port->iobase, ADM5120_UART_RS);
- ch = ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA);
- port->icount.rx++;
-
- if (tty->low_latency)
- tty_flip_buffer_push(tty);
-
- flg = TTY_NORMAL;
-
- /*
- * Note that the error handling code is
- * out of the main execution path
- */
- if (rds & ADM5120_UART_ERR)
- goto handle_error;
- if (uart_handle_sysrq_char(port, ch))
- goto ignore_char;
-
- error_return:
- tty_insert_flip_char(tty, ch, flg);
-
- ignore_char:
- status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
- }
- out:
- tty_flip_buffer_push(tty);
- return;
-
- handle_error:
- ADM5120_UART_REG(port->iobase, ADM5120_UART_RS) = 0xff;
- if (rds & ADM5120_UART_BE) {
- port->icount.brk++;
- if (uart_handle_break(port))
- goto ignore_char;
- } else if (rds & ADM5120_UART_PE)
- port->icount.parity++;
- else if (rds & ADM5120_UART_FE)
- port->icount.frame++;
- if (rds & ADM5120_UART_OE)
- port->icount.overrun++;
-
- if (rds & port->ignore_status_mask) {
- if (++ignored > 100)
- goto out;
- goto ignore_char;
- }
- rds &= port->read_status_mask;
-
- if (rds & ADM5120_UART_BE)
- flg = TTY_BREAK;
- else if (rds & ADM5120_UART_PE)
- flg = TTY_PARITY;
- else if (rds & ADM5120_UART_FE)
- flg = TTY_FRAME;
-
- if (rds & ADM5120_UART_OE) {
- /*
- * CHECK: does overrun affect the current character?
- * ASSUMPTION: it does not.
- */
- tty_insert_flip_char(tty, ch, flg);
- ch = 0;
- flg = TTY_OVERRUN;
- }
-#ifdef CONFIG_MAGIC_SYSRQ
- port->sysrq = 0;
-#endif
- goto error_return;
-}
-
-static void adm5120ser_irq_tx(struct uart_port *port)
-{
- struct circ_buf *xmit = &port->info->xmit;
- int count;
-
- if (port->x_char) {
- ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
- port->x_char;
- port->icount.tx++;
- port->x_char = 0;
- return;
- }
- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
- adm5120ser_stop_tx(port);
- return;
- }
-
- count = port->fifosize >> 1;
- do {
- ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
- xmit->buf[xmit->tail];
- xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
- port->icount.tx++;
- if (uart_circ_empty(xmit))
- break;
- } while (--count > 0);
-
- if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
- uart_write_wakeup(port);
-
- if (uart_circ_empty(xmit))
- adm5120ser_stop_tx(port);
-}
-
-static void adm5120ser_irq_modem(struct uart_port *port)
-{
- unsigned int status;
-
- status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
-
- if (status & ADM5120_UART_DCD)
- uart_handle_dcd_change(port, status & ADM5120_UART_DCD);
-
- if (status & ADM5120_UART_DSR)
- port->icount.dsr++;
-
- if (status & ADM5120_UART_CTS)
- uart_handle_cts_change(port, status & ADM5120_UART_CTS);
-
- wake_up_interruptible(&port->info->delta_msr_wait);
-}
-
-static irqreturn_t adm5120ser_irq(int irq, void *dev_id)
-{
- struct uart_port *port = dev_id;
- unsigned long ir = ADM5120_UART_REG(port->iobase, ADM5120_UART_IR);
-
- if (ir & (ADM5120_UART_RIS | ADM5120_UART_RTIS))
- adm5120ser_irq_rx(port);
- if (ir & ADM5120_UART_TIS)
- adm5120ser_irq_tx(port);
- if (ir & ADM5120_UART_MIS) {
- adm5120ser_irq_modem(port);
- ADM5120_UART_REG(port->iobase, ADM5120_UART_IR) = 0xff;
- }
-
- return IRQ_HANDLED;
-}
-
-static unsigned int adm5120ser_tx_empty(struct uart_port *port)
-{
- unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
- return (fr & ADM5120_UART_TXFE) ? TIOCSER_TEMT : 0;
-}
-
-static void adm5120ser_set_mctrl(struct uart_port *port, unsigned int mctrl)
-{
-}
-
-static unsigned int adm5120ser_get_mctrl(struct uart_port *port)
-{
- unsigned int result = 0;
- unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
-
- if (fr & ADM5120_UART_CTS)
- result |= TIOCM_CTS;
- if (fr & ADM5120_UART_DSR)
- result |= TIOCM_DSR;
- if (fr & ADM5120_UART_DCD)
- result |= TIOCM_CAR;
- return result;
-}
-
-static void adm5120ser_start_tx(struct uart_port *port)
-{
- ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |= ADM5120_UART_TIE;
-}
-
-static void adm5120ser_stop_rx(struct uart_port *port)
-{
- ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_RIE;
-}
-
-static void adm5120ser_enable_ms(struct uart_port *port)
-{
-}
-
-static void adm5120ser_break_ctl(struct uart_port *port, int break_state)
-{
- unsigned long flags;
- unsigned long lcrh;
-
- spin_lock_irqsave(&port->lock, flags);
- lcrh = ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H);
- if (break_state == -1)
- lcrh |= ADM5120_UART_BRK;
- else
- lcrh &= ~ADM5120_UART_BRK;
- ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
- spin_unlock_irqrestore(&port->lock, flags);
-}
-
-static int adm5120ser_startup(struct uart_port *port)
-{
- int ret;
-
- ret = request_irq(port->irq, adm5120ser_irq, 0, "ADM5120 UART", port);
- if (ret) {
- printk(KERN_ERR "Couldn't get irq %d\n", port->irq);
- return ret;
- }
- ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) |=
- ADM5120_UART_FIFO_EN;
- ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |=
- ADM5120_UART_EN | ADM5120_UART_IE;
- return 0;
-}
-
-static void adm5120ser_shutdown(struct uart_port *port)
-{
- ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_IE;
- free_irq(port->irq, port);
-}
-
-static void adm5120ser_set_termios(struct uart_port *port,
- struct ktermios *termios, struct ktermios *old)
-{
- unsigned int baud, quot, lcrh;
- unsigned long flags;
-
- termios->c_cflag |= CREAD;
-
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
- quot = uart_get_divisor(port, baud);
-
- lcrh = ADM5120_UART_FIFO_EN;
- switch (termios->c_cflag & CSIZE) {
- case CS5:
- lcrh |= ADM5120_UART_W5;
- break;
- case CS6:
- lcrh |= ADM5120_UART_W6;
- break;
- case CS7:
- lcrh |= ADM5120_UART_W7;
- break;
- default:
- lcrh |= ADM5120_UART_W8;
- break;
- }
- if (termios->c_cflag & CSTOPB)
- lcrh |= ADM5120_UART_STP2;
- if (termios->c_cflag & PARENB) {
- lcrh |= ADM5120_UART_PEN;
- if (!(termios->c_cflag & PARODD))
- lcrh |= ADM5120_UART_EPS;
- }
-
- spin_lock_irqsave(port->lock, flags);
-
- ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
-
- /*
- * Update the per-port timeout.
- */
- uart_update_timeout(port, termios->c_cflag, baud);
-
- port->read_status_mask = ADM5120_UART_OE;
- if (termios->c_iflag & INPCK)
- port->read_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
- if (termios->c_iflag & (BRKINT | PARMRK))
- port->read_status_mask |= ADM5120_UART_BE;
-
- /*
- * Characters to ignore
- */
- port->ignore_status_mask = 0;
- if (termios->c_iflag & IGNPAR)
- port->ignore_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
- if (termios->c_iflag & IGNBRK) {
- port->ignore_status_mask |= ADM5120_UART_BE;
- /*
- * If we're ignoring parity and break indicators,
- * ignore overruns to (for real raw support).
- */
- if (termios->c_iflag & IGNPAR)
- port->ignore_status_mask |= ADM5120_UART_OE;
- }
-
- quot = ADM5120_UART_BAUD115200;
- ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_L) = quot & 0xff;
- ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_M) = quot >> 8;
-
- spin_unlock_irqrestore(&port->lock, flags);
-}
-
-static const char *adm5120ser_type(struct uart_port *port)
-{
- return port->type == PORT_ADM5120 ? "ADM5120" : NULL;
-}
-
-static void adm5120ser_config_port(struct uart_port *port, int flags)
-{
- if (flags & UART_CONFIG_TYPE)
- port->type = PORT_ADM5120;
-}
-
-static void adm5120ser_release_port(struct uart_port *port)
-{
- release_mem_region(port->iobase, ADM5120_UART_SIZE);
-}
-
-static int adm5120ser_request_port(struct uart_port *port)
-{
- return request_mem_region(port->iobase, ADM5120_UART_SIZE,
- "adm5120-uart") != NULL ? 0 : -EBUSY;
-}
-
-static struct uart_ops adm5120ser_ops = {
- .tx_empty = adm5120ser_tx_empty,
- .set_mctrl = adm5120ser_set_mctrl,
- .get_mctrl = adm5120ser_get_mctrl,
- .stop_tx = adm5120ser_stop_tx,
- .start_tx = adm5120ser_start_tx,
- .stop_rx = adm5120ser_stop_rx,
- .enable_ms = adm5120ser_enable_ms,
- .break_ctl = adm5120ser_break_ctl,
- .startup = adm5120ser_startup,
- .shutdown = adm5120ser_shutdown,
- .set_termios = adm5120ser_set_termios,
- .type = adm5120ser_type,
- .config_port = adm5120ser_config_port,
- .release_port = adm5120ser_release_port,
- .request_port = adm5120ser_request_port,
-};
-
-static void adm5120console_put(const char c)
-{
- while ((ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_FR) &
- ADM5120_UART_TXFF) != 0);
- ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_DATA) = c;
-}
-
-static void adm5120console_write(struct console *con, const char *s,
- unsigned int count)
-{
- while (count--) {
- if (*s == '\n')
- adm5120console_put('\r');
- adm5120console_put(*s);
- s++;
- }
-}
-
-static int __init adm5120console_setup(struct console *con, char *options)
-{
- /* Set to 115200 baud, 8N1 and enable FIFO */
- ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_L) =
- ADM5120_UART_BAUD115200 & 0xff;
- ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_M) =
- ADM5120_UART_BAUD115200 >> 8;
- ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_H) =
- ADM5120_UART_W8 | ADM5120_UART_FIFO_EN;
- /* Enable port */
- ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_CR) =
- ADM5120_UART_EN;
-
- return 0;
-}
-
-static struct uart_driver adm5120ser_reg;
-
-static struct console adm5120_serconsole = {
- .name = "ttyS",
- .write = adm5120console_write,
- .device = uart_console_device,
- .setup = adm5120console_setup,
- .flags = CON_PRINTBUFFER,
- .cflag = B115200 | CS8 | CREAD,
- .index = 0,
- .data = &adm5120ser_reg,
-};
-
-static int __init adm5120console_init(void)
-{
- register_console(&adm5120_serconsole);
- return 0;
-}
-
-console_initcall(adm5120console_init);
-
-
-static struct uart_port adm5120ser_ports[] = {
- {
- .iobase = ADM5120_UART0_BASE,
- .irq = ADM5120_IRQ_UART0,
- .uartclk = ADM5120_UARTCLK_FREQ,
- .fifosize = 16,
- .ops = &adm5120ser_ops,
- .line = 0,
- .flags = ASYNC_BOOT_AUTOCONF,
- },
-#if (CONFIG_ADM5120_NR_UARTS > 1)
- {
- .iobase = ADM5120_UART1_BASE,
- .irq = ADM5120_IRQ_UART1,
- .uartclk = ADM5120_UARTCLK_FREQ,
- .fifosize = 16,
- .ops = &adm5120ser_ops,
- .line = 1,
- .flags = ASYNC_BOOT_AUTOCONF,
- },
-#endif
-};
-
-static struct uart_driver adm5120ser_reg = {
- .owner = THIS_MODULE,
- .driver_name = "ttyS",
- .dev_name = "ttyS",
- .major = TTY_MAJOR,
- .minor = 64,
- .nr = CONFIG_ADM5120_NR_UARTS,
- .cons = &adm5120_serconsole,
-};
-
-static int __init adm5120ser_init(void)
-{
- int ret, i;
-
- ret = uart_register_driver(&adm5120ser_reg);
- if (!ret) {
- for (i = 0; i < CONFIG_ADM5120_NR_UARTS; i++)
- uart_add_one_port(&adm5120ser_reg, &adm5120ser_ports[i]);
- }
-
- return ret;
-}
-
-__initcall(adm5120ser_init);
+++ /dev/null
-/*
- * HCD driver for ADM5120 SoC
- *
- * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- *
- * Based on the ADMtek 2.4 driver
- * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
- * Which again was based on the ohci and uhci drivers.
- */
-
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/usb.h>
-#include <linux/platform_device.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/byteorder.h>
-#include <asm/mach-adm5120/adm5120_info.h>
-
-#include "../core/hcd.h"
-
-MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
-
-#define PFX "adm5120-hcd: "
-
-#define ADMHCD_REG_CONTROL 0x00
-#define ADMHCD_REG_INTSTATUS 0x04
-#define ADMHCD_REG_INTENABLE 0x08
-#define ADMHCD_REG_HOSTCONTROL 0x10
-#define ADMHCD_REG_FMINTERVAL 0x18
-#define ADMHCD_REG_FMNUMBER 0x1c
-#define ADMHCD_REG_LSTHRESH 0x70
-#define ADMHCD_REG_RHDESCR 0x74
-#define ADMHCD_REG_PORTSTATUS0 0x78
-#define ADMHCD_REG_PORTSTATUS1 0x7c
-#define ADMHCD_REG_HOSTHEAD 0x80
-
-
-#define ADMHCD_NUMPORTS 2
-
-#define ADMHCD_HOST_EN 0x00000001 /* Host enable */
-#define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
-#define ADMHCD_SW_RESET 0x00000008 /* Reset */
-
-#define ADMHCD_INT_TD 0x00100000 /* TD completed */
-#define ADMHCD_INT_SW 0x20000000 /* software interrupt */
-#define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
-#define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
-
-#define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
-#define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
-#define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
-#define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
-#define ADMHCD_DMA_EN 0x00000004 /* enable dma engine */
-
-#define ADMHCD_NPS 0x00000020 /* No Power Switch */
-#define ADMHCD_LPSC 0x04000000 /* Local power switch change */
-
-#define ADMHCD_CCS 0x00000001 /* current connect status */
-#define ADMHCD_PES 0x00000002 /* port enable status */
-#define ADMHCD_PSS 0x00000004 /* port suspend status */
-#define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
-#define ADMHCD_PRS 0x00000010 /* port reset status */
-#define ADMHCD_PPS 0x00000100 /* port power status */
-#define ADMHCD_LSDA 0x00000200 /* low speed device attached */
-#define ADMHCD_CSC 0x00010000 /* connect status change */
-#define ADMHCD_PESC 0x00020000 /* enable status change */
-#define ADMHCD_PSSC 0x00040000 /* suspend status change */
-#define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
-#define ADMHCD_PRSC 0x00100000 /* reset status change */
-
-
-struct admhcd_ed {
- /* Don't change first four, they used for DMA */
- u32 control;
- struct admhcd_td *tail;
- struct admhcd_td *head;
- struct admhcd_ed *next;
- /* the rest is for the driver only: */
- struct admhcd_td *cur;
- struct usb_host_endpoint *ep;
- struct urb *urb;
- struct admhcd_ed *real;
-} __attribute__ ((packed));
-
-#define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
-#define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
-#define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
-#define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
-#define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
-#define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
-
-struct admhcd_td {
- /* Don't change first four, they are used for DMA */
- u32 control;
- u32 buffer;
- u32 buflen;
- struct admhcd_td *next;
- /* the rest is for the driver only: */
- struct urb *urb;
- struct admhcd_td *real;
-} __attribute__ ((packed));
-
-#define ADMHCD_TD_OWN 0x80000000
-#define ADMHCD_TD_TOGGLE 0x00000000
-#define ADMHCD_TD_DATA0 0x01000000
-#define ADMHCD_TD_DATA1 0x01800000
-#define ADMHCD_TD_OUT 0x00200000
-#define ADMHCD_TD_IN 0x00400000
-#define ADMHCD_TD_SETUP 0x00000000
-#define ADMHCD_TD_ISO 0x00010000
-#define ADMHCD_TD_R 0x00040000
-#define ADMHCD_TD_INTEN 0x00010000
-
-static int admhcd_td_err[16] = {
- 0, /* No */
- -EREMOTEIO, /* CRC */
- -EREMOTEIO, /* bit stuff */
- -EREMOTEIO, /* data toggle */
- -EPIPE, /* stall */
- -ETIMEDOUT, /* timeout */
- -EPROTO, /* pid err */
- -EPROTO, /* unexpected pid */
- -EREMOTEIO, /* data overrun */
- -EREMOTEIO, /* data underrun */
- -ETIMEDOUT, /* 1010 */
- -ETIMEDOUT, /* 1011 */
- -EREMOTEIO, /* buffer overrun */
- -EREMOTEIO, /* buffer underrun */
- -ETIMEDOUT, /* 1110 */
- -ETIMEDOUT, /* 1111 */
-};
-
-#define ADMHCD_TD_ERRMASK 0x38000000
-#define ADMHCD_TD_ERRSHIFT 27
-
-#define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
-#define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
-
-struct admhcd {
- spinlock_t lock;
-
- void __iomem *addr_reg;
- void __iomem *data_reg;
- /* Root hub registers */
- u32 rhdesca;
- u32 rhdescb;
- u32 rhstatus;
- u32 rhport[2];
-
- /* async schedule: control, bulk */
- struct list_head async;
- u32 base;
- u32 dma_en;
- unsigned long flags;
-
-};
-
-static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
-{
- return (struct admhcd *)(hcd->hcd_priv);
-}
-
-static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
-{
- return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
-}
-
-static char hcd_name[] = "adm5120-hcd";
-
-static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
-{
- return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
-}
-
-static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
-{
- *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
-}
-
-static void admhcd_lock(struct admhcd *ahcd)
-{
- spin_lock_irqsave(&ahcd->lock, ahcd->flags);
- ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
- ADMHCD_DMA_EN;
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
-}
-
-static void admhcd_unlock(struct admhcd *ahcd)
-{
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
- ADMHCD_STATE_OP | ahcd->dma_en);
- spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
-}
-
-static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
-{
- struct admhcd_td *tdn, *td;
-
- tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC);
- if (!tdn)
- return NULL;
- tdn->real = tdn;
- tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
- memset(tdn, 0, sizeof(struct admhcd_td));
- if (ed->cur == NULL) {
- ed->cur = tdn;
- ed->head = tdn;
- ed->tail = tdn;
- td = tdn;
- } else {
- /* Supply back the old tail and link in new td as tail */
- td = TD(ed->tail);
- TD(ed->tail)->next = tdn;
- ed->tail = tdn;
- }
- td->urb = urb;
-
- return td;
-}
-
-static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
-{
- struct admhcd_td *td, **tdp;
-
- if (urb == NULL)
- ed->control |= ADMHCD_ED_SKIP;
- tdp = &ed->cur;
- td = ed->cur;
- do {
- if (td->urb == urb)
- break;
- tdp = &td->next;
- td = TD(td->next);
- } while (td);
- while (td && td->urb == urb) {
- *tdp = TD(td->next);
- kfree(td->real);
- td = *tdp;
- }
-}
-
-/* Find an endpoint's descriptor, if needed allocate a new one and link it
- in the DMA chain
- */
-static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
- struct usb_host_endpoint *ep, struct urb *urb)
-{
- struct admhcd_ed *hosthead;
- struct admhcd_ed *found = NULL, *ed = NULL;
- unsigned int pipe = urb->pipe;
-
- admhcd_lock(ahcd);
- hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
- if (hosthead) {
- for (ed = hosthead;; ed = ED(ed->next)) {
- if (ed->ep == ep) {
- found = ed;
- break;
- }
- if (ED(ed->next) == hosthead)
- break;
- }
- }
- if (!found) {
- found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC);
- if (!found)
- goto out;
- memset(found, 0, sizeof(struct admhcd_ed));
- found->real = found;
- found->ep = ep;
- found = (struct admhcd_ed *)KSEG1ADDR(found);
- found->control = usb_pipedevice(pipe) |
- (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
- (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
- (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
- (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
- (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
- /* Alloc first dummy td */
- admhcd_td_alloc(found, NULL);
- if (hosthead) {
- found->next = hosthead;
- ed->next = found;
- } else {
- found->next = found;
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
- }
- }
-out:
- admhcd_unlock(ahcd);
- return found;
-}
-
-static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
- dma_addr_t data, int len)
-{
- td->buffer = data;
- td->buflen = len;
- td->control = control;
- return TD(td->next);
-}
-
-static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
-{
- struct admhcd_td *td = ed->cur;
-
- if (ed->urb)
- return;
- if (td->urb) {
- ed->urb = td->urb;
- while (1) {
- td->control |= ADMHCD_TD_OWN;
- if (TD(td->next)->urb != td->urb) {
- td->buflen |= ADMHCD_TD_INTEN;
- break;
- }
- td = TD(td->next);
- }
- }
- ed->head = TD(ed->head);
- ahcd->dma_en |= ADMHCD_DMA_EN;
-}
-
-static irqreturn_t adm5120hcd_irq(struct usb_hcd *hcd)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- u32 intstatus;
-
- intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
- if (intstatus & ADMHCD_INT_FATAL) {
- admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
- //
- }
- if (intstatus & ADMHCD_INT_SW) {
- admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
- //
- }
- if (intstatus & ADMHCD_INT_TD) {
- struct admhcd_ed *ed, *head;
-
- admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
-
- head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
- ed = head;
- if (ed) do {
- /* Is it a finished TD? */
- if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
- struct admhcd_td *td;
- int error;
-
- td = ed->cur;
- error = (td->control & ADMHCD_TD_ERRMASK) >>
- ADMHCD_TD_ERRSHIFT;
- ed->urb->status = admhcd_td_err[error];
- admhcd_td_free(ed, ed->urb);
- // Calculate real length!!!
- ed->urb->actual_length = ed->urb->transfer_buffer_length;
- ed->urb->hcpriv = NULL;
- usb_hcd_giveback_urb(hcd, ed->urb);
- ed->urb = NULL;
- }
- admhcd_ed_start(ahcd, ed);
- ed = ED(ed->next);
- } while (ed != head);
- }
-
- return IRQ_HANDLED;
-}
-
-static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
- struct urb *urb, gfp_t mem_flags)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- struct admhcd_ed *ed;
- struct admhcd_td *td;
- int size = 0, i, zero = 0, ret = 0;
- unsigned int pipe = urb->pipe, toggle = 0;
- dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
- int data_len = urb->transfer_buffer_length;
-
- ed = admhcd_get_ed(ahcd, ep, urb);
- if (!ed)
- return -ENOMEM;
-
- switch(usb_pipetype(pipe)) {
- case PIPE_CONTROL:
- size = 2;
- case PIPE_INTERRUPT:
- case PIPE_BULK:
- default:
- size += urb->transfer_buffer_length / 4096;
- if (urb->transfer_buffer_length % 4096)
- size++;
- if (size == 0)
- size++;
- else if (urb->transfer_flags & URB_ZERO_PACKET &&
- !(urb->transfer_buffer_length %
- usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
- size++;
- zero = 1;
- }
- break;
- case PIPE_ISOCHRONOUS:
- size = urb->number_of_packets;
- break;
- }
-
- admhcd_lock(ahcd);
- /* Remember the first td */
- td = admhcd_td_alloc(ed, urb);
- if (!td) {
- ret = -ENOMEM;
- goto out;
- }
- /* Allocate additionall tds first */
- for (i = 1; i < size; i++) {
- if (admhcd_td_alloc(ed, urb) == NULL) {
- admhcd_td_free(ed, urb);
- ret = -ENOMEM;
- goto out;
- }
- }
-
- if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
- toggle = ADMHCD_TD_TOGGLE;
- else {
- toggle = ADMHCD_TD_DATA0;
- usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
- usb_pipeout(pipe), 1);
- }
-
- switch(usb_pipetype(pipe)) {
- case PIPE_CONTROL:
- td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
- td, (dma_addr_t)urb->setup_packet, 8);
- while (data_len > 0) {
- td = admhcd_td_fill(ADMHCD_TD_DATA1
- | ADMHCD_TD_R |
- (usb_pipeout(pipe) ?
- ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
- data, data_len % 4097);
- data_len -= 4096;
- }
- admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
- ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
- data, 0);
- break;
- case PIPE_INTERRUPT:
- case PIPE_BULK:
- //info ok for interrupt?
- i = 0;
- while(data_len > 4096) {
- td = admhcd_td_fill((usb_pipeout(pipe) ?
- ADMHCD_TD_OUT :
- ADMHCD_TD_IN | ADMHCD_TD_R) |
- (i ? ADMHCD_TD_TOGGLE : toggle), td,
- data, 4096);
- data += 4096;
- data_len -= 4096;
- i++;
- }
- td = admhcd_td_fill((usb_pipeout(pipe) ?
- ADMHCD_TD_OUT : ADMHCD_TD_IN) |
- (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
- i++;
- if (zero)
- admhcd_td_fill((usb_pipeout(pipe) ?
- ADMHCD_TD_OUT : ADMHCD_TD_IN) |
- (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
- break;
- case PIPE_ISOCHRONOUS:
- for (i = 0; i < urb->number_of_packets; i++) {
- td = admhcd_td_fill(ADMHCD_TD_ISO |
- ((urb->start_frame + i) & 0xffff), td,
- data + urb->iso_frame_desc[i].offset,
- urb->iso_frame_desc[i].length);
- }
- break;
- }
- urb->hcpriv = ed;
- admhcd_ed_start(ahcd, ed);
-out:
- admhcd_unlock(ahcd);
- return ret;
-}
-
-static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- struct admhcd_ed *ed;
-
- admhcd_lock(ahcd);
-
- ed = urb->hcpriv;
- if (ed && ed->urb != urb)
- admhcd_td_free(ed, urb);
-
- admhcd_unlock(ahcd);
- return 0;
-}
-
-static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- struct admhcd_ed *ed, *edt, *head;
-
- admhcd_lock(ahcd);
-
- head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
- if (!head)
- goto out;
- for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
- if (ed->ep == ep)
- break;
- if (ed->ep != ep)
- goto out;
- while (ed->cur)
- admhcd_td_free(ed, ed->cur->urb);
- if (head == ed) {
- if (ED(ed->next) == ed) {
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
- ahcd->dma_en = 0;
- goto out_free;
- }
- head = ED(ed->next);
- for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
- edt->next = ED(ed->next);
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
- goto out_free;
- }
- for (edt = head; edt->next != ed; edt = edt->next);
- edt->next = ed->next;
-out_free:
- kfree(ed->real);
-out:
- admhcd_unlock(ahcd);
-}
-
-static int admhcd_get_frame_number(struct usb_hcd *hcd)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
-
- return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
-}
-
-static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- int port;
-
- *buf = 0;
- for (port = 0; port < ADMHCD_NUMPORTS; port++) {
- if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
- (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
- ADMHCD_PRSC))
- *buf |= (1 << (port + 1));
- }
- return !!*buf;
-}
-
-static __u8 root_hub_hub_des[] = {
- 0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
- 0x02, /* __u8 bNbrPorts; */
- 0x0a, 0x00, /* __u16 wHubCharacteristics; */
- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
- 0x00, /* __u8 bHubContrCurrent; 0mA */
- 0x00, /* __u8 DeviceRemovable; */
- 0xff, /* __u8 PortPwrCtrlMask; */
-};
-
-static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
- u16 wIndex, char *buf, u16 wLength)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
- int retval = 0, len;
- unsigned int port = wIndex -1;
-
- switch (typeReq) {
-
- case GetHubStatus:
- *(__le32 *)buf = cpu_to_le32(0);
- break;
- case GetPortStatus:
- if (port >= ADMHCD_NUMPORTS)
- goto err;
- *(__le32 *)buf = cpu_to_le32(
- admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
- break;
- case SetHubFeature: /* We don't implement these */
- case ClearHubFeature:
- switch (wValue) {
- case C_HUB_OVER_CURRENT:
- case C_HUB_LOCAL_POWER:
- break;
- default:
- goto err;
- }
- case SetPortFeature:
- if (port >= ADMHCD_NUMPORTS)
- goto err;
-
- switch (wValue) {
- case USB_PORT_FEAT_SUSPEND:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PSS);
- break;
- case USB_PORT_FEAT_RESET:
- if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
- & ADMHCD_CCS) {
- admhcd_reg_set(ahcd,
- ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PRS | ADMHCD_CSC);
- mdelay(50);
- admhcd_reg_set(ahcd,
- ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PES | ADMHCD_CSC);
- }
- break;
- case USB_PORT_FEAT_POWER:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PPS);
- break;
- default:
- goto err;
- }
- break;
- case ClearPortFeature:
- if (port >= ADMHCD_NUMPORTS)
- goto err;
-
- switch (wValue) {
- case USB_PORT_FEAT_ENABLE:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_CCS);
- break;
- case USB_PORT_FEAT_C_ENABLE:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PESC);
- break;
- case USB_PORT_FEAT_SUSPEND:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_POCI);
- break;
- case USB_PORT_FEAT_C_SUSPEND:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PSSC);
- case USB_PORT_FEAT_POWER:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_LSDA);
- break;
- case USB_PORT_FEAT_C_CONNECTION:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_CSC);
- break;
- case USB_PORT_FEAT_C_OVER_CURRENT:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_OCIC);
- break;
- case USB_PORT_FEAT_C_RESET:
- admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
- ADMHCD_PRSC);
- break;
- default:
- goto err;
- }
- break;
- case GetHubDescriptor:
- len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
- memcpy(buf, root_hub_hub_des, len);
- break;
- default:
-err:
- retval = -EPIPE;
- }
-
- return retval;
-}
-
-static struct hc_driver adm5120_hc_driver = {
- .description = hcd_name,
- .product_desc = "ADM5120 HCD",
- .hcd_priv_size = sizeof(struct admhcd),
- .irq = adm5120hcd_irq,
- .flags = HCD_USB11,
- .urb_enqueue = admhcd_urb_enqueue,
- .urb_dequeue = admhcd_urb_dequeue,
- .endpoint_disable = admhcd_endpoint_disable,
- .get_frame_number = admhcd_get_frame_number,
- .hub_status_data = admhcd_hub_status_data,
- .hub_control = admhcd_hub_control,
-};
-
-#define resource_len(r) (((r)->end - (r)->start) + 1)
-
-static int __init adm5120hcd_probe(struct platform_device *pdev)
-{
- struct usb_hcd *hcd;
- struct admhcd *ahcd;
- struct resource *addr, *data;
- void __iomem *addr_reg;
- void __iomem *data_reg;
-
- int err = 0, irq;
-
- if (pdev->num_resources < 3) {
- err = -ENODEV;
- goto out;
- }
-
- if (pdev->dev.dma_mask) {
- printk(KERN_DEBUG "no we won't dma\n");
- return -EINVAL;
- }
-
- irq = platform_get_irq(pdev, 0);
- data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-
- if (!addr || !data || irq < 0) {
- err = -ENODEV;
- goto out;
- }
-
- if (!request_mem_region(addr->start, 2, hcd_name)) {
- err = -EBUSY;
- goto out;
- }
-
- addr_reg = ioremap(addr->start, resource_len(addr));
- if (addr_reg == NULL) {
- err = -ENOMEM;
- goto out_mem;
- }
- if (!request_mem_region(data->start, 2, hcd_name)) {
- err = -EBUSY;
- goto out_unmap;
- }
-
- data_reg = ioremap(data->start, resource_len(data));
- if (data_reg == NULL) {
- err = -ENOMEM;
- goto out_mem;
- }
-
- hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
- if (!hcd)
- goto out_mem;
-
- hcd->rsrc_start = addr->start;
- ahcd = hcd_to_admhcd(hcd);
-
- spin_lock_init(&ahcd->lock);
- INIT_LIST_HEAD(&ahcd->async);
-
- ahcd->data_reg = data_reg;
- ahcd->addr_reg = addr_reg;
-
- hcd->product_desc = "ADM5120 HCD";
-
- /* Initialise the HCD registers */
- admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
- mdelay(10);
-
- admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
-
- while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
- mdelay(1);
-
- admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
- admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
- admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
- admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE,
- ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
- admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS,
- ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
- admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
- admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
-
- err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
- if (err)
- goto out_dev;
-
- return 0;
-
-out_dev:
- usb_put_hcd(hcd);
-out_unmap:
- iounmap(addr_reg);
-out_mem:
- release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start);
-out:
- return err;
-}
-
-static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
- struct admhcd *ahcd;
-
- if (!hcd)
- return 0;
- ahcd = hcd_to_admhcd(hcd);
- usb_remove_hcd(hcd);
-
- usb_put_hcd(hcd);
- return 0;
-}
-
-static struct platform_driver adm5120hcd_driver = {
- .probe = adm5120hcd_probe,
- .remove = adm5120hcd_remove,
- .driver = {
- .name = "adm5120-hcd",
- .owner = THIS_MODULE,
- },
-};
-
-static int __init adm5120hcd_init(void)
-{
- if (usb_disabled())
- return -ENODEV;
- if (!adm5120_board.has_usb) {
- printk(KERN_DEBUG PFX "this board does not have USB\n");
- return -ENODEV;
- }
-
- printk(KERN_INFO PFX "registered\n");
- return platform_driver_register(&adm5120hcd_driver);
-}
-
-static void __exit adm5120hcd_exit(void)
-{
- platform_driver_unregister(&adm5120hcd_driver);
-}
-
-module_init(adm5120hcd_init);
-module_exit(adm5120hcd_exit);
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 SoC definitions
- *
- * This file defines some constants specific to the ADM5120 SoC
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- */
-#ifndef _ADM5120_DEFS_H
-#define _ADM5120_DEFS_H
-
-#define ADM5120_SDRAM0_BASE 0x00000000
-#define ADM5120_SDRAM1_BASE 0x01000000
-#define ADM5120_SRAM1_BASE 0x10000000
-#define ADM5120_MPMC_BASE 0x11000000
-#define ADM5120_USBC_BASE 0x11200000
-#define ADM5120_PCIMEM_BASE 0x11400000
-#define ADM5120_PCIIO_BASE 0x11500000
-#define ADM5120_PCICFG_ADDR 0x115FFFF0
-#define ADM5120_PCICFG_DATA 0x115FFFF8
-#define ADM5120_SWITCH_BASE 0x12000000
-#define ADM5120_INTC_BASE 0x12200000
-#define ADM5120_UART0_BASE 0x12600000
-#define ADM5120_UART1_BASE 0x12800000
-#define ADM5120_SRAM0_BASE 0x1FC00000
-
-#define ADM5120_MPMC_SIZE 0x1000
-#define ADM5120_USBC_SIZE 0x84
-#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE)
-#define ADM5120_PCIIO_SIZE (ADM5120_PCICFG_ADDR - ADM5120_PCIIO_BASE)
-#define ADM5120_PCICFG_SIZE 0x10
-#define ADM5120_SWITCH_SIZE 0x114
-#define ADM5120_INTC_SIZE 0x28
-#define ADM5120_UART_SIZE 0x20
-
-#define ADM5120_CLK_175 175000000
-#define ADM5120_CLK_200 200000000
-#define ADM5120_CLK_225 225000000
-#define ADM5120_CLK_250 250000000
-
-#define ADM5120_UART_CLOCK 62500000
-
-#endif /* _ADM5120_DEFS_H */
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef _ADM5120_INFO_H
-#define _ADM5120_INFO_H
-
-#include <linux/types.h>
-
-#define ADM5120_BOARD_NAMELEN 64
-
-struct adm5120_board {
- char name[ADM5120_BOARD_NAMELEN];
- unsigned long mach_type;
- unsigned int iface_num; /* Number of Ethernet interfaces */
- unsigned int has_usb; /* USB controller presence flag */
- u32 mem_size; /* onboard memory size */
- u32 flash0_size; /* Flash 0 size */
-};
-
-extern struct adm5120_board adm5120_board;
-
-extern unsigned int adm5120_boot_loader;
-#define BOOT_LOADER_UNKNOWN 0
-#define BOOT_LOADER_CFE 1
-#define BOOT_LOADER_UBOOT 2
-#define BOOT_LOADER_MYLOADER 3
-#define BOOT_LOADER_ROUTERBOOT 4
-#define BOOT_LOADER_BOOTBASE 5
-#define BOOT_LOADER_LAST 5
-
-extern unsigned int adm5120_product_code;
-extern unsigned int adm5120_revision;
-extern unsigned int adm5120_nand_boot;
-
-extern unsigned long adm5120_speed;
-#define ADM5120_SPEED_175 175000000
-#define ADM5120_SPEED_200 200000000
-#define ADM5120_SPEED_225 225000000
-#define ADM5120_SPEED_250 250000000
-
-extern unsigned int adm5120_package;
-#define ADM5120_PACKAGE_PQFP 0
-#define ADM5120_PACKAGE_BGA 1
-
-extern unsigned long adm5120_memsize;
-
-extern void adm5120_info_init(void);
-
-static inline int adm5120_package_pqfp(void)
-{
- return (adm5120_package == ADM5120_PACKAGE_PQFP);
-}
-
-static inline int adm5120_package_bga(void)
-{
- return (adm5120_package == ADM5120_PACKAGE_BGA);
-}
-
-static inline int adm5120_has_pci(void)
-{
- return (adm5120_package == ADM5120_PACKAGE_BGA);
-}
-
-static inline int adm5120_has_gmii(void)
-{
- return (adm5120_package == ADM5120_PACKAGE_BGA);
-}
-
-static inline char *adm5120_board_name(void)
-{
- return adm5120_board.name;
-}
-
-static inline u32 adm5120_board_memsize(void)
-{
- return adm5120_board.mem_size;
-}
-
-#endif /* _ADM5120_INFO_H */
+++ /dev/null
-/*
- * ADM5120 interrupt controller definitions
- *
- * This header file defines the hardware registers of the ADM5120 SoC
- * built-in interrupt controller.
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- */
-#ifndef _ADM5120_INTC_H_
-#define _ADM5120_INTC_H_
-
-/*
- * INTC register offsets
- */
-#define INTC_REG_IRQ_STATUS 0x00 /* Interrupt status after masking */
-#define INTC_REG_IRQ_RAW_STATUS 0x04 /* Interrupt status before masking */
-#define INTC_REG_IRQ_ENABLE 0x08 /* Used to enable the interrupt sources */
-#define INTC_REG_IRQ_ENABLE_CLEAR 0x0C /* Used to disable the interrupt sources */
-#define INTC_REG_IRQ_DISABLE INTC_REG_IRQ_ENABLE_CLEAR
-#define INTC_REG_INT_MODE 0x14 /* The interrupt mode of the sources */
-#define INTC_REG_FIQ_STATUS 0x18 /* FIQ status */
-#define INTC_REG_IRQ_TEST_SOURCE 0x1C
-#define INTC_REG_IRQ_SOURCE_SELECT 0x20
-#define INTC_REG_INT_LEVEL 0x24
-
-/*
- * INTC IRQ numbers
- */
-#define INTC_IRQ_TIMER 0 /* built in timer */
-#define INTC_IRQ_UART0 1 /* built-in UART0 */
-#define INTC_IRQ_UART1 2 /* built-in UART1 */
-#define INTC_IRQ_USBC 3 /* USB Host Controller */
-#define INTC_IRQ_GPIO2 4 /* GPIO line 2 */
-#define INTC_IRQ_GPIO4 5 /* GPIO line 4 */
-#define INTC_IRQ_PCI0 6 /* PCI slot 2 */
-#define INTC_IRQ_PCI1 7 /* PCI slot 3 */
-#define INTC_IRQ_PCI2 8 /* PCI slot 4 */
-#define INTC_IRQ_SWITCH 9 /* built-in ethernet switch */
-#define INTC_IRQ_LAST INTC_IRQ_SWITCH
-#define INTC_IRQ_COUNT 10
-
-/*
- * INTC register bits
- */
-#define INTC_INT_TIMER ( 1 << INTC_IRQ_TIMER )
-#define INTC_INT_UART0 ( 1 << INTC_IRQ_UART0 )
-#define INTC_INT_UART1 ( 1 << INTC_IRQ_UART1 )
-#define INTC_INT_USBC ( 1 << INTC_IRQ_USBC )
-#define INTC_INT_INTX0 ( 1 << INTC_IRQ_INTX0 )
-#define INTC_INT_INTX1 ( 1 << INTC_IRQ_INTX1 )
-#define INTC_INT_PCI0 ( 1 << INTC_IRQ_PCI0 )
-#define INTC_INT_PCI1 ( 1 << INTC_IRQ_PCI1 )
-#define INTC_INT_PCI2 ( 1 << INTC_IRQ_PCI2 )
-#define INTC_INT_SWITCH ( 1 << INTC_IRQ_SWITCH )
-#define INTC_INT_ALL (( 1 << INTC_IRQ_COUNT)-1)
-
-#endif /* _ADM5120_INTC_H_ */
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 specific IRQ numbers
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-#ifndef _ADM5120_IRQ_H_
-#define _ADM5120_IRQ_H_
-
-#include <asm/mach-adm5120/adm5120_intc.h>
-
-#define MIPS_IRQ_HW0 2
-#define MIPS_IRQ_COUNTER 7
-#define MIPS_IRQ_COUNT 8
-
-#define ADM5120_CPU_IRQ_BASE 0
-#define ADM5120_INTC_IRQ_BASE (ADM5120_CPU_IRQ_BASE+MIPS_IRQ_COUNT)
-#define ADM5120_SWITCH_IRQ_BASE (ADM5120_INTC_IRQ_BASE+INTC_IRQ_COUNT)
-
-#define ADM5120_CPU_IRQ(x) (ADM5120_CPU_IRQ_BASE + (x))
-#define ADM5120_INTC_IRQ(x) (ADM5120_INTC_IRQ_BASE + (x))
-
-#define ADM5120_IRQ_INTC ADM5120_CPU_IRQ(MIPS_IRQ_HW0)
-#define ADM5120_IRQ_COUNTER ADM5120_CPU_IRQ(MIPS_IRQ_COUNTER)
-
-#define ADM5120_IRQ_TIMER ADM5120_INTC_IRQ(INTC_IRQ_TIMER)
-#define ADM5120_IRQ_UART0 ADM5120_INTC_IRQ(INTC_IRQ_UART0)
-#define ADM5120_IRQ_UART1 ADM5120_INTC_IRQ(INTC_IRQ_UART1)
-#define ADM5120_IRQ_USBC ADM5120_INTC_IRQ(INTC_IRQ_USBC)
-#define ADM5120_IRQ_GPIO2 ADM5120_INTC_IRQ(INTC_IRQ_GPIO2)
-#define ADM5120_IRQ_GPIO4 ADM5120_INTC_IRQ(INTC_IRQ_GPIO4)
-#define ADM5120_IRQ_PCI0 ADM5120_INTC_IRQ(INTC_IRQ_PCI0)
-#define ADM5120_IRQ_PCI1 ADM5120_INTC_IRQ(INTC_IRQ_PCI1)
-#define ADM5120_IRQ_PCI2 ADM5120_INTC_IRQ(INTC_IRQ_PCI2)
-#define ADM5120_IRQ_SWITCH ADM5120_INTC_IRQ(INTC_IRQ_SWITCH)
-
-#endif
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 MPMC (Multiport Memory Controller) register definitions
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#ifndef _ADM5120_MPMC_H_
-#define _ADM5120_MPMC_H_
-
-#define MPMC_REG_CTRL 0x0000
-#define MPMC_REG_STATUS 0x0004
-#define MPMC_REG_CONF 0x0008
-#define MPMC_REG_DC 0x0020
-#define MPMC_REG_DR 0x0024
-#define MPMC_REG_DRP 0x0030
-
-#define MPMC_REG_DC0 0x0100
-#define MPMC_REG_DRC0 0x0104
-#define MPMC_REG_DC1 0x0120
-#define MPMC_REG_DRC1 0x0124
-#define MPMC_REG_DC2 0x0140
-#define MPMC_REG_DRC2 0x0144
-#define MPMC_REG_DC3 0x0160
-#define MPMC_REG_DRC3 0x0164
-#define MPMC_REG_SC0 0x0200 /* for F_CS1_N */
-#define MPMC_REG_SC1 0x0220 /* for F_CS0_N */
-#define MPMC_REG_SC2 0x0240
-#define MPMC_REG_SC3 0x0260
-
-#define MPMC_CTRL_AM ( 1 << 1 )
-
-/* Dynamic Control register bits */
-#define MPMC_DC_CE ( 1 << 0 )
-#define MPMC_DC_DMC ( 1 << 1 )
-#define MPMC_DC_SRR ( 1 << 2 )
-#define MPMC_DC_SI_SHIFT 7
-#define MPMC_DC_SI_MASK ( 3 << 7 )
-#define MPMC_DC_SI_NORMAL ( 0 << 7 )
-#define MPMC_DC_SI_MODE ( 1 << 7 )
-#define MPMC_DC_SI_PALL ( 2 << 7 )
-#define MPMC_DC_SI_NOP ( 3 << 7 )
-
-#define SRAM_REG_CONF 0x00
-#define SRAM_REG_WWE 0x04
-#define SRAM_REG_WOE 0x08
-#define SRAM_REG_WRD 0x0C
-#define SRAM_REG_WPG 0x10
-#define SRAM_REG_WWR 0x14
-#define SRAM_REG_WTR 0x18
-
-/* Dynamic Configuration register bits */
-#define DC_BE (1 << 19) /* buffer enable */
-#define DC_RW_SHIFT 28 /* shift for number of rows */
-#define DC_RW_MASK 0x03
-#define DC_NB_SHIFT 26 /* shift for number of banks */
-#define DC_NB_MASK 0x01
-#define DC_CW_SHIFT 22 /* shift for number of columns */
-#define DC_CW_MASK 0x07
-#define DC_DW_SHIFT 7 /* shift for device width */
-#define DC_DW_MASK 0x03
-
-/* Static Configuration register bits */
-#define SC_MW_MASK 0x03 /* memory width mask */
-#define SC_MW_8 0x00 /* 8 bit memory width */
-#define SC_MW_16 0x01 /* 16 bit memory width */
-#define SC_MW_32 0x02 /* 32 bit memory width */
-
-#endif /* _ADM5120_MPMC_H_ */
+++ /dev/null
-/*
- * ADM5120 ethernet switch definitions
- *
- * This header file defines the hardware registers of the ADM5120 SoC
- * built-in Ethernet switch.
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- */
-
-#ifndef _ADM5120_SWITCH_H
-#define _ADM5120_SWITCH_H
-
-#define BITMASK(len) ((1 << (len))-1)
-#define ONEBIT(at) (1 << (at))
-
-/* Switch register offsets */
-#define SWITCH_REG_CODE 0x0000
-#define SWITCH_REG_SOFT_RESET 0x0004
-#define SWITCH_REG_MEMCTRL 0x001C
-#define SWITCH_REG_CPUP_CONF 0x0024
-#define SWITCH_REG_PORT_CONF0 0x0028
-#define SWITCH_REG_PORT_CONF1 0x002C
-#define SWITCH_REG_PORT_CONF2 0x0030
-#define SWITCH_REG_VLAN_G1 0x0040
-#define SWITCH_REG_VLAN_G2 0x0044
-#define SWITCH_REG_SEND_TRIG 0x0048
-#define SWITCH_REG_MAC_WT0 0x0058
-#define SWITCH_REG_MAC_WT1 0x005C
-#define SWITCH_REG_PHY_CNTL0 0x0068
-#define SWITCH_REG_PHY_CNTL1 0x006C
-#define SWITCH_REG_PHY_CNTL2 0x007C
-#define SWITCH_REG_PHY_CNTL3 0x0080
-#define SWITCH_REG_PRI_CNTL 0x0084
-#define SWITCH_REG_INT_STATUS 0x00B0
-#define SWITCH_REG_INT_MASK 0x00B4
-#define SWITCH_REG_GPIO_CONF0 0x00B8
-#define SWITCH_REG_GPIO_CONF2 0x00BC
-#define SWITCH_REG_WDOG0 0x00C0
-#define SWITCH_REG_WDOG1 0x00C4
-#define SWITCH_REG_PHY_CNTL4 0x00A0
-
-#define SWITCH_REG_SEND_HBADDR 0x00D0
-#define SWITCH_REG_SEND_LBADDR 0x00D4
-#define SWITCH_REG_RECV_HBADDR 0x00D8
-#define SWITCH_REG_RECV_LBADDR 0x00DC
-
-#define SWITCH_REG_TIMER_INT 0x00F0
-#define SWITCH_REG_TIMER 0x00F4
-
-#define SWITCH_REG_PORT0_LED 0x0100
-#define SWITCH_REG_PORT1_LED 0x0104
-#define SWITCH_REG_PORT2_LED 0x0108
-#define SWITCH_REG_PORT3_LED 0x010C
-#define SWITCH_REG_PORT4_LED 0x0110
-
-/* CODE register bits */
-#define CODE_PC_MASK BITMASK(16) /* Product Code */
-#define CODE_REV_SHIFT 16
-#define CODE_REV_MASK BITMASK(4) /* Product Revision */
-#define CODE_CLKS_SHIFT 20
-#define CODE_CLKS_MASK BITMASK(2) /* Clock Speed */
-#define CODE_CLKS_175 0 /* 175 MHz */
-#define CODE_CLKS_200 1 /* 200 MHz */
-#define CODE_CLKS_225 2 /* 225 MHz */
-#define CODE_CLKS_250 3 /* 250 MHz */
-#define CODE_NAB ONEBIT(24) /* NAND boot */
-#define CODE_PK_MASK BITMASK(1) /* Package type */
-#define CODE_PK_SHIFT 29
-#define CODE_PK_BGA 0 /* BGA package */
-#define CODE_PK_PQFP 1 /* PQFP package */
-
-/* MEMCTRL register bits */
-#define MEMCTRL_SDRS_MASK BITMASK(3) /* SDRAM bank size */
-#define MEMCTRL_SDRS_4M 0x01
-#define MEMCTRL_SDRS_8M 0x02
-#define MEMCTRL_SDRS_16M 0x03
-#define MEMCTRL_SDRS_64M 0x04
-#define MEMCTRL_SDRS_128M 0x05
-#define MEMCTRL_SDR1_ENABLE ONEBIT(5) /* enable SDRAM bank 1 */
-
-#define MEMCTRL_SRS0_SHIFT 8 /* shift for SRAM0 size */
-#define MEMCTRL_SRS1_SHIFT 16 /* shift for SRAM1 size */
-#define MEMCTRL_SRS_MASK BITMASK(3) /* SRAM size mask */
-#define MEMCTRL_SRS_DISABLED 0x00 /* Disabled */
-#define MEMCTRL_SRS_512K 0x01 /* 512KB*/
-#define MEMCTRL_SRS_1M 0x02 /* 1MB */
-#define MEMCTRL_SRS_2M 0x03 /* 2MB */
-#define MEMCTRL_SRS_4M 0x04 /* 4MB */
-
-/* GPIO_CONF0 register bits */
-#define GPIO_CONF0_MASK BITMASK(8)
-#define GPIO_CONF0_IM_SHIFT 0
-#define GPIO_CONF0_IV_SHIFT 8
-#define GPIO_CONF0_OE_SHIFT 16
-#define GPIO_CONF0_OV_SHIFT 24
-#define GPIO_CONF0_IM_MASK (0xFF << GPIO_CONF0_IM_SHIFT)
-#define GPIO_CONF0_IV_MASK (0xFF << GPIO_CONF0_IV_SHIFT)
-#define GPIO_CONF0_OE_MASK (0xFF << GPIO_CONF0_OE_SHIFT)
-#define GPIO_CONF0_OV_MASK (0xFF << GPIO_CONF0_OV_SHIFT)
-
-/* TIMER_INT register bits */
-#define TIMER_INT_TOS ONEBIT(1) /* time-out status */
-#define TIMER_INT_TOM ONEBIT(16) /* mask time-out interrupt */
-
-/* TIMER register bits */
-#define TIMER_PERIOD_MASK BITMASK(16) /* mask for timer period */
-#define TIMER_PERIOD_DEFAULT 0xFFFF /* default timer period */
-#define TIMER_TE ONEBIT(16) /* timer enable bit */
-
-/* PORTx_LED register bits */
-#define LED_MODE_MASK BITMASK(4)
-#define LED_MODE_INPUT 0
-#define LED_MODE_FLASH 1
-#define LED_MODE_OUT_HIGH 2
-#define LED_MODE_OUT_LOW 3
-#define LED_MODE_LINK 4
-#define LED_MODE_SPEED 5
-#define LED_MODE_DUPLEX 6
-#define LED_MODE_ACT 7
-#define LED_MODE_COLL 8
-#define LED_MODE_LINK_ACT 9
-#define LED_MODE_DUPLEX_COLL 10
-#define LED_MODE_10M_ACT 11
-#define LED_MODE_100M_ACT 12
-#define LED0_MODE_SHIFT 0 /* LED0 mode shift */
-#define LED1_MODE_SHIFT 4 /* LED1 mode shift */
-#define LED2_MODE_SHIFT 8 /* LED2 mode shift */
-#define LED0_IV_SHIFT 12 /* LED0 input value shift */
-#define LED1_IV_SHIFT 13 /* LED1 input value shift */
-#define LED2_IV_SHIFT 14 /* LED2 input value shift */
-
-#endif /* _ADM5120_SWITCH_H */
+++ /dev/null
-/*
- * $Id$
- *
- * ADM5120 GPIO wrappers for arch-neutral GPIO calls
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#ifndef _ADM5120_GPIO_H_
-#define _ADM5120_GPIO_H_
-
-#define ADM5120_GPIO_PIN0 0
-#define ADM5120_GPIO_PIN1 1
-#define ADM5120_GPIO_PIN2 2
-#define ADM5120_GPIO_PIN3 3
-#define ADM5120_GPIO_PIN4 4
-#define ADM5120_GPIO_PIN5 5
-#define ADM5120_GPIO_PIN6 6
-#define ADM5120_GPIO_PIN7 7
-#define ADM5120_GPIO_P0L0 8
-#define ADM5120_GPIO_P0L1 9
-#define ADM5120_GPIO_P0L2 10
-#define ADM5120_GPIO_P1L0 11
-#define ADM5120_GPIO_P1L1 12
-#define ADM5120_GPIO_P1L2 13
-#define ADM5120_GPIO_P2L0 14
-#define ADM5120_GPIO_P2L1 15
-#define ADM5120_GPIO_P2L2 16
-#define ADM5120_GPIO_P3L0 17
-#define ADM5120_GPIO_P3L1 18
-#define ADM5120_GPIO_P3L2 19
-#define ADM5120_GPIO_P4L0 20
-#define ADM5120_GPIO_P4L1 21
-#define ADM5120_GPIO_P4L2 22
-#define ADM5120_GPIO_MAX 22
-#define ADM5120_GPIO_COUNT ADM5120_GPIO_MAX+1
-
-extern int adm5120_gpio_direction_input(unsigned gpio);
-extern int adm5120_gpio_direction_output(unsigned gpio, int value);
-extern int adm5120_gpio_get_value(unsigned gpio);
-extern void adm5120_gpio_set_value(unsigned gpio, int value);
-extern int adm5120_gpio_request(unsigned gpio, const char *label);
-extern void adm5120_gpio_free(unsigned gpio);
-extern int adm5120_gpio_to_irq(unsigned gpio);
-extern int adm5120_irq_to_gpio(unsigned irq);
-
-/*
- * Wrappers for the generic GPIO layer
- */
-static inline int gpio_direction_input(unsigned gpio)
-{
- return adm5120_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
- return adm5120_gpio_direction_output(gpio,value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
- return adm5120_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
- adm5120_gpio_set_value(gpio, value);
-}
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
- return adm5120_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
- adm5120_gpio_free(gpio);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
- return adm5120_gpio_to_irq(gpio);
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
- return adm5120_irq_to_gpio(irq);
-}
-
-#include <asm-generic/gpio.h> /* cansleep wrappers */
-
-#endif
+++ /dev/null
-/*
- * Copyright (C) 2006,2007 Gabor Juhos
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef _MYLOADER_H_
-#define _MYLOADER_H_
-
-/*
- * Firmware file format:
- *
- * <header>
- * [<block descriptor 0>]
- * ...
- * [<block descriptor n>]
- * <null block descriptor>
- * [<block data 0>]
- * ...
- * [<block data n>]
- *
- *
- */
-
-/* Myloader specific magic numbers */
-#define MYLO_MAGIC_FIRMWARE 0x4C594D00
-#define MYLO_MAGIC_20021103 0x20021103
-#define MYLO_MAGIC_20021107 0x20021107
-
-#define MYLO_MAGIC_SYS_PARAMS MYLO_MAGIC_20021107
-#define MYLO_MAGIC_PARTITIONS MYLO_MAGIC_20021103
-#define MYLO_MAGIC_BOARD_PARAMS MYLO_MAGIC_20021103
-
-/*
- * Addresses of the data structures provided by MyLoader
- */
-#define MYLO_MIPS_SYS_PARAMS 0x80000800 /* System Parameters */
-#define MYLO_MIPS_BOARD_PARAMS 0x80000A00 /* Board Parameters */
-#define MYLO_MIPS_PARTITIONS 0x80000C00 /* Partition Table */
-#define MYLO_MIPS_BOOT_PARAMS 0x80000E00 /* Boot Parameters */
-
-/* Vendor ID's (seems to be same as the PCI vendor ID's) */
-#define VENID_COMPEX 0x11F6
-
-/* Devices based on the ADM5120 */
-#define DEVID_COMPEX_NP27G 0x0078
-#define DEVID_COMPEX_NP28G 0x044C
-#define DEVID_COMPEX_NP28GHS 0x044E
-#define DEVID_COMPEX_WP54Gv1C 0x0514
-#define DEVID_COMPEX_WP54G 0x0515
-#define DEVID_COMPEX_WP54AG 0x0546
-#define DEVID_COMPEX_WPP54AG 0x0550
-#define DEVID_COMPEX_WPP54G 0x0555
-
-/* Devices based on the IXP422 */
-#define DEVID_COMPEX_WP18 0x047E
-#define DEVID_COMPEX_NP18A 0x0489
-
-/* Other devices */
-#define DEVID_COMPEX_NP26G8M 0x03E8
-#define DEVID_COMPEX_NP26G16M 0x03E9
-
-struct mylo_fw_header {
- uint32_t magic; /* must be MYLO_MAGIC_FIRMWARE */
- uint32_t crc; /* CRC of the whole firmware */
- uint32_t res0; /* unknown/unused */
- uint32_t res1; /* unknown/unused */
- uint16_t vid; /* vendor ID */
- uint16_t did; /* device ID */
- uint16_t svid; /* sub vendor ID */
- uint16_t sdid; /* sub device ID */
- uint32_t rev; /* device revision */
- uint32_t fwhi; /* FIXME: firmware version high? */
- uint32_t fwlo; /* FIXME: firmware version low? */
- uint32_t flags; /* firmware flags */
-};
-
-#define FW_FLAG_BOARD_PARAMS_WP 0x01 /* board parameters are write protected */
-#define FW_FLAG_BOOT_SECTOR_WE 0x02 /* enable of write boot sectors (below 64K) */
-
-struct mylo_fw_blockdesc {
- uint32_t type; /* block type */
- uint32_t addr; /* relative address to flash start */
- uint32_t dlen; /* size of block data in bytes */
- uint32_t blen; /* total size of block in bytes */
-};
-
-#define FW_DESC_TYPE_UNUSED 0
-#define FW_DESC_TYPE_USED 1
-
-struct mylo_partition {
- uint16_t flags; /* partition flags */
- uint16_t type; /* type of the partition */
- uint32_t addr; /* relative address of the partition from the
- flash start */
- uint32_t size; /* size of the partition in bytes */
- uint32_t param; /* if this is the active partition, the
- MyLoader load code to this address */
-};
-
-#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition,
- * MyLoader loads firmware from here */
-#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */
-#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */
-#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM
- * before decompression */
-#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */
-
-#define PARTITION_TYPE_FREE 0
-#define PARTITION_TYPE_USED 1
-
-#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the
- partition table */
-
-struct mylo_partition_table {
- uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */
- uint32_t res0; /* unknown/unused */
- uint32_t res1; /* unknown/unused */
- uint32_t res2; /* unknown/unused */
- struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
-};
-
-struct mylo_partition_header {
- uint32_t len; /* length of the partition data */
- uint32_t crc; /* CRC value of the partition data */
-};
-
-struct mylo_system_params {
- uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */
- uint32_t res0;
- uint32_t res1;
- uint32_t mylo_ver;
- uint16_t vid; /* Vendor ID */
- uint16_t did; /* Device ID */
- uint16_t svid; /* Sub Vendor ID */
- uint16_t sdid; /* Sub Device ID */
- uint32_t rev; /* device revision */
- uint32_t fwhi;
- uint32_t fwlo;
- uint32_t tftp_addr;
- uint32_t prog_start;
- uint32_t flash_size; /* Size of boot FLASH in bytes */
- uint32_t dram_size; /* Size of onboard RAM in bytes */
-};
-
-
-struct mylo_eth_addr {
- uint8_t mac[6];
- uint8_t csum[2];
-};
-
-#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address
- in the board parameters */
-
-struct mylo_board_params {
- uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */
- uint32_t res0;
- uint32_t res1;
- uint32_t res2;
- struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
-};
-
-#endif /* _MYLOADER_H_*/
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef _ROUTERBOOT_H
-#define _ROUTERBOOT_H
-
-#define RB_MAC_SIZE 6
-#define RB_MAX_MAC_COUNT 6
-
-struct rb_bios_settings {
- u32 hs_offs; /* hard settings offset */
- u32 hs_size; /* hard settings size */
- u32 fw_offs; /* firmware offset */
- u32 ss_offs; /* soft settings offset */
- u32 ss_size; /* soft settings size */
-};
-
-struct rb_hard_settings {
- char *name; /* board name */
- char *bios_ver; /* BIOS version */
- u32 mem_size; /* memory size in bytes */
- u32 mac_count; /* number of mac addresses */
- u8 macs[RB_MAC_SIZE][RB_MAX_MAC_COUNT]; /* mac addresses */
-};
-
-/*
- * Magic numbers
- */
-#define RB_MAGIC_HARD 0x64726148 /* "Hard" */
-#define RB_MAGIC_SOFT 0x74666F53 /* "Soft" */
-#define RB_MAGIC_DAWN 0x6E776144 /* "Dawn" */
-
-#define RB_ID_TERMINATOR 0
-
-/*
- * ID values for Hardware settings
- */
-#define RB_ID_HARD_01 1
-#define RB_ID_HARD_02 2
-#define RB_ID_FLASH_INFO 3
-#define RB_ID_MAC_ADDRESS_PACK 4
-#define RB_ID_BOARD_NAME 5
-#define RB_ID_BIOS_VERSION 6
-#define RB_ID_HARD_07 7
-#define RB_ID_SDRAM_TIMINGS 8
-#define RB_ID_DEVICE_TIMINGS 9
-#define RB_ID_SOFTWARE_ID 10
-#define RB_ID_SERIAL_NUMBER 11
-#define RB_ID_HARD_12 12
-#define RB_ID_MEMORY_SIZE 13
-#define RB_ID_MAC_ADDRESS_COUNT 14
-
-/*
- * ID values for Software settings
- */
-#define RB_ID_UART_SPEED 1
-#define RB_ID_BOOT_DELAY 2
-#define RB_ID_BOOT_DEVICE 3
-#define RB_ID_BOOT_KEY 4
-#define RB_ID_CPU_MODE 5
-#define RB_ID_FW_VERSION 6
-#define RB_ID_SOFT_07 7
-#define RB_ID_SOFT_08 8
-#define RB_ID_BOOT_PROTOCOL 9
-#define RB_ID_SOFT_10 10
-#define RB_ID_SOFT_11 11
-
-/*
- * UART_SPEED values
- */
-#define RB_UART_SPEED_115200 0
-#define RB_UART_SPEED_57600 1
-#define RB_UART_SPEED_38400 2
-#define RB_UART_SPEED_19200 3
-#define RB_UART_SPEED_9600 4
-#define RB_UART_SPEED_4800 5
-#define RB_UART_SPEED_2400 6
-#define RB_UART_SPEED_1200 7
-
-/*
- * BOOT_DELAY values
- */
-#define RB_BOOT_DELAY_0SEC 0
-#define RB_BOOT_DELAY_1SEC 1
-#define RB_BOOT_DELAY_2SEC 2
-
-/*
- * BOOT_DEVICE values
- */
-#define RB_BOOT_DEVICE_ETHER 0
-#define RB_BOOT_DEVICE_NANDETH 1
-#define RB_BOOT_DEVICE_ETHONCE 2
-#define RB_BOOT_DEVICE_NANDONLY 3
-
-/*
- * BOOT_KEY values
- */
-#define RB_BOOT_KEY_ANY 0
-#define RB_BOOT_KEY_DEL 1
-
-/*
- * CPU_MODE values
- */
-#define RB_CPU_MODE_POWERSAVE 0
-#define RB_CPU_MODE_REGULAR 1
-
-/*
- * BOOT_PROTOCOL values
- */
-#define RB_BOOT_PROTOCOL_BOOTP 0
-#define RB_BOOT_PROTOCOL_DHCP 1
-
-#endif /* _ROUTERBOOT_H */
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef _ZYNOS_H
-#define _ZYNOS_H
-
-#define ZYNOS_NAME_LEN 32
-#define ZYNOS_FEAT_BYTES 22
-#define ZYNOS_MAC_LEN 6
-
-struct zynos_board_info {
- unsigned char vendor[ZYNOS_NAME_LEN];
- unsigned char product[ZYNOS_NAME_LEN];
- u32 bootext_addr;
- u32 res0;
- u16 board_id;
- u8 res1[6];
- u8 feat_other[ZYNOS_FEAT_BYTES];
- u8 feat_main;
- u8 res2;
- u8 mac[ZYNOS_MAC_LEN];
- u8 country;
- u8 dbgflag;
-} __attribute__ ((packed));
-
-/*
- * Vendor IDs
- */
-#define ZYNOS_VENDOR_ID_ZYXEL 0
-#define ZYNOS_VENDOR_ID_NETGEAR 1
-#define ZYNOS_VENDOR_ID_DLINK 2
-#define ZYNOS_VENDOR_ID_OTHER 3
-#define ZYNOS_VENDOR_ID_LUCENT 4
-
-/*
- * Vendor names
- */
-#define ZYNOS_VENDOR_DLINK "D-Link"
-#define ZYNOS_VENDOR_LUCENT "LUCENT"
-#define ZYNOS_VENDOR_NETGEAR "NetGear"
-#define ZYNOS_VENDOR_ZYXEL "ZyXEL"
-
-/*
- * Board IDs (big-endian)
- */
-#define ZYNOS_BOARD_ES2108 0x00F2 /* Ethernet Switch 2108 */
-#define ZYNOS_BOARD_ES2108F 0x01AF /* Ethernet Switch 2108-F */
-#define ZYNOS_BOARD_ES2108G 0x00F3 /* Ethernet Switch 2108-G */
-#define ZYNOS_BOARD_ES2108LC 0x00FC /* Ethernet Switch 2108-LC */
-#define ZYNOS_BOARD_ES2108PWR 0x00F4 /* Ethernet Switch 2108PWR */
-#define ZYNOS_BOARD_HS100 0x9FF1 /* HomeSafe 100/100W */
-#define ZYNOS_BOARD_P334 0x9FF5 /* Prestige 334 */
-#define ZYNOS_BOARD_P334U 0x9FDD /* Prestige 334U */
-#define ZYNOS_BOARD_P334W 0x9FF3 /* Prestige 334W */
-#define ZYNOS_BOARD_P334WH 0x00E0 /* Prestige 334WH */
-#define ZYNOS_BOARD_P334WHD 0x00E1 /* Prestige 334WHD */
-#define ZYNOS_BOARD_P334WT 0x9FEF /* Prestige 334WT */
-#define ZYNOS_BOARD_P335 0x9FED /* Prestige 335/335WT */
-#define ZYNOS_BOARD_P335PLUS 0x0025 /* Prestige 335Plus */
-#define ZYNOS_BOARD_P335U 0x9FDC /* Prestige 335U */
-
-/*
- * Some magic numbers (big-endian)
- */
-#define ZYNOS_MAGIC_DBGAREA1 0x48646267 /* "Hdbg" */
-#define ZYNOS_MAGIC_DBGAREA2 0x61726561 /* "area" */
-
-#endif /* _ZYNOS_H */
+++ /dev/null
-/*
- * $Id$
- *
- * GPIO LEDs platform data structure
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
- *
- */
-
-#ifndef _GPIO_LEDS_H_
-#define _GPIO_LEDS_H_
-
-struct gpio_led_platform_data {
- char *name;
- char *trigger;
- unsigned gpio; /* GPIO line number */
- int value_off; /* value to turn LED OFF */
- int value_on; /* value to turn LED ON */
-};
-
-#endif /* _GPIO_LEDS_H__ */
+++ /dev/null
-#
-# Copyright (C) 2006,2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-IMGNAME = $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)
-LOADER_MAKE = $(MAKE) -C lzma-loader KDIR=$(KDIR)
-
-define Image/Build/Loader
- $(LOADER_MAKE) LOADER=loader-$(1).$(2) LOADER_DATA="" \
- LZMA_TEXT_START=$(3) LZMA_STARTUP_ORG=$(4) \
- CONFIG_PASS_KARGS=$(5) CONFIG_BOARD=$(6) \
- compile loader.$(2)
-endef
-
-define Build/Clean
- $(LOADER_MAKE) clean
-endef
-
-define Image/Prepare
- cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma
-endef
-
-define trxalign/jffs2-128k
--a 0x20000
-endef
-define trxalign/jffs2-64k
--a 0x10000
-endef
-define trxalign/squashfs
--a 1024
-endef
-
-define Image/Build/TRX
- $(STAGING_DIR)/bin/trx -o $(1) -f $(3) -f $(KDIR)/vmlinux.lzma \
- $(call trxalign/$(2)) -f $(KDIR)/root.$(2)
-endef
-
-define Image/Build/TRXNoloader
- $(STAGING_DIR)/bin/trx -o $(1) -f $(KDIR)/vmlinux.lzma \
- $(call trxalign/$(2)) -f $(KDIR)/root.$(2)
-endef
-
-define Image/Build/Compex
- $(call Image/Build/Loader,$(2),gz,0x80500000,0,y,$(2))
- $(call Image/Build/TRX,$(IMGNAME)-$(3)-$(2).trx,$(1),$(KDIR)/loader-$(2).gz)
-endef
-
-define Image/Build/Edimax
- $(call Image/Build/Loader,$(2),gz,0x80500000,0x6D8,y,$(2))
- $(call Image/Build/TRXNoloader,$(IMGNAME)-$(3)-$(2).trx,$(1))
- $(STAGING_DIR)/bin/mkcsysimg -B $(4) -d -w \
- -r $(KDIR)/loader-$(2).gz \
- -x $(IMGNAME)-$(3)-$(2).trx \
- $(IMGNAME)-$(3)-$(2).bin
-endef
-
-define Image/Build/Infineon
- $(call Image/Build/Loader,$(2),gz,0x80500000,0x6D8,y,$(2))
- $(call Image/Build/TRXNoloader,$(IMGNAME)-$(3)-$(2).trx,$(1))
- dd if=$(KDIR)/loader-$(2).gz of=$(IMGNAME)-$(3)-$(2).img bs=64k conv=sync
- cat $(IMGNAME)-$(3)-$(2).trx >>$(IMGNAME)-$(3)-$(2).img
-endef
-
-define Image/Build/MyLoader
- $(call Image/Build/Loader,$(2),gz,0x80500000,0)
- $(call Image/Build/TRXNoloader,$(IMGNAME)-$(3)-$(2).trx,$(1))
- $(STAGING_DIR)/bin/mkmylofw -B $(4) \
- -p0x20000:0x10000:ahp:0x80001000 \
- -p0x30000:0 \
- -b0x20000:0x10000:h:$(KDIR)/loader-$(2).gz \
- -b0x30000:0::$(IMGNAME)-$(3)-$(2).trx \
- $(IMGNAME)-$(3)-$(2).bin
-endef
-
-define Image/cmdline/yaffs2
-root=/dev/mtdblock1 rootfstype=yaffs2 init=/etc/preinit
-endef
-
-define Image/Build/RouterBoard
- $(CP) $(KDIR)/vmlinux.elf $(IMGNAME)-vmlinux
- $(STAGING_DIR)/bin/patch-cmdline $(KDIR)/vmlinux.elf '$(strip $(call Image/cmdline/yaffs2)) '
-endef
-
-define Image/Build
-# this line is here intentionally
-ifneq ($(1),jffs2-256k)
-ifneq ($(1),jffs2-128k)
- $(call Image/Build/Compex,$(1),wp54g-wrt,$(patsubst jffs2-%,jffs2,$(1)),WP54G-WRT)
- $(call Image/Build/Edimax,$(1),br-6104k,$(patsubst jffs2-%,jffs2,$(1)),BR-6104K)
- $(call Image/Build/Edimax,$(1),br-6104kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6104KP)
- $(call Image/Build/Edimax,$(1),br-6114wg,$(patsubst jffs2-%,jffs2,$(1)),BR-6114WG)
- $(call Image/Build/Edimax,$(1),br-6524k,$(patsubst jffs2-%,jffs2,$(1)),BR-6524K)
- $(call Image/Build/Edimax,$(1),br-6524kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6524KP)
- $(call Image/Build/Edimax,$(1),br-6541k,$(patsubst jffs2-%,jffs2,$(1)),BR-6541K)
- $(call Image/Build/Edimax,$(1),br-6541kp,$(patsubst jffs2-%,jffs2,$(1)),BR-6541KP)
- $(call Image/Build/Edimax,$(1),ew-7207apg,$(patsubst jffs2-%,jffs2,$(1)),EW-7207APg)
- $(call Image/Build/Edimax,$(1),ps-1205uwg,$(patsubst jffs2-%,jffs2,$(1)),PS-1205UWg)
- $(call Image/Build/Edimax,$(1),ps-3205u,$(patsubst jffs2-%,jffs2,$(1)),PS-3205U)
- $(call Image/Build/Edimax,$(1),ps-3205uwg,$(patsubst jffs2-%,jffs2,$(1)),PS-3205UWg)
- $(call Image/Build/Edimax,$(1),br-6524wg,$(patsubst jffs2-%,jffs2,$(1)),BR-6524WG)
- $(call Image/Build/Edimax,$(1),br-6524wp,$(patsubst jffs2-%,jffs2,$(1)),BR-6524WP)
- $(call Image/Build/Infineon,$(1),easy-5120,$(patsubst jffs2-%,jffs2,$(1)))
- $(call Image/Build/Infineon,$(1),easy-5120-rt,$(patsubst jffs2-%,jffs2,$(1)))
- $(call Image/Build/Infineon,$(1),easy-5120p-ata,$(patsubst jffs2-%,jffs2,$(1)))
- $(call Image/Build/Infineon,$(1),easy-83000,$(patsubst jffs2-%,jffs2,$(1)))
- $(call Image/Build/MyLoader,$(1),np27g,$(patsubst jffs2-%,jffs2,$(1)),NP27G)
- $(call Image/Build/MyLoader,$(1),np28g,$(patsubst jffs2-%,jffs2,$(1)),NP28G)
- $(call Image/Build/MyLoader,$(1),np28ghs,$(patsubst jffs2-%,jffs2,$(1)),NP28GHS)
- $(call Image/Build/MyLoader,$(1),wp54g,$(patsubst jffs2-%,jffs2,$(1)),WP54G)
- $(call Image/Build/MyLoader,$(1),wp54ag,$(patsubst jffs2-%,jffs2,$(1)),WP54AG)
- $(call Image/Build/MyLoader,$(1),wpp54g,$(patsubst jffs2-%,jffs2,$(1)),WPP54G)
- $(call Image/Build/MyLoader,$(1),wpp54ag,$(patsubst jffs2-%,jffs2,$(1)),WPP54AG)
-endif
-endif
-ifeq ($(1),tgz)
- $(call Image/Build/RouterBoard)
-endif
-endef
-
-define Image/Build/LZMAKernel
- $(LOADER_MAKE) TARGET_DIR=$(BIN_DIR) \
- LOADER=openwrt-$(BOARD)-$(KERNEL)-ramfs-lzma-$(1).$(2) \
- LOADER_DATA=$(KDIR)/vmlinux.lzma \
- LZMA_TEXT_START=$(3) LZMA_STARTUP_ORG=$(4) \
- CONFIG_PASS_KARGS=$(5) CONFIG_BOARD=$(6) \
- compile loader.$(2)
-endef
-
-define Image/Build/LZMAKernel/Compex
- $(call Image/Build/LZMAKernel,$(1),$(2),0x80500000,0,y,$(1))
-endef
-
-define Image/Build/LZMAKernel/Generic
- $(call Image/Build/LZMAKernel,$(1),$(2),0x80500000,0)
-endef
-
-define Image/Build/LZMAKernel/Admboot
- $(call Image/Build/LZMAKernel,$(1),$(2),0x80500000,0x6D8,y,$(1))
-endef
-
-define Image/Build/Initramfs
- $(call Image/Build/LZMAKernel/Generic,generic,bin)
- $(call Image/Build/LZMAKernel/Generic,rb-100,elf)
- $(call Image/Build/LZMAKernel/Generic,np27g,bin)
- $(call Image/Build/LZMAKernel/Generic,wp54g,bin)
- $(call Image/Build/LZMAKernel/Compex,wp54g-wrt,bin)
- $(call Image/Build/LZMAKernel/Admboot,br-6104k,gz)
- $(call Image/Build/LZMAKernel/Admboot,easy-5120,gz)
- $(call Image/Build/LZMAKernel/Admboot,easy-83000,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-630,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-670,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-700,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-771,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-790,gz)
- $(call Image/Build/LZMAKernel/Admboot,cas-861,gz)
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-
-LOADER := loader.bin
-LOADER_NAME := $(basename $(notdir $(LOADER)))
-LOADER_DATA :=
-TARGET_DIR :=
-
-ifeq ($(TARGET_DIR),)
-TARGET_DIR := $(KDIR)
-endif
-
-LOADER_BIN := $(TARGET_DIR)/$(LOADER_NAME).bin
-LOADER_GZ := $(TARGET_DIR)/$(LOADER_NAME).gz
-LOADER_ELF := $(TARGET_DIR)/$(LOADER_NAME).elf
-
-LZMA_STARTUP_ORG:= 0
-LZMA_TEXT_START := 0x80300000
-
-PKG_NAME := lzma-loader
-PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
-
-.PHONY : loader-compile loader.bin loader.elf loader.gz
-
-$(PKG_BUILD_DIR)/.prepared:
- mkdir $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
- touch $@
-
-loader-compile: $(PKG_BUILD_DIR)/.prepared
- $(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
- LZMA_STARTUP_ORG=$(LZMA_STARTUP_ORG) \
- LZMA_TEXT_START=$(LZMA_TEXT_START) \
- LOADER_DATA=$(LOADER_DATA) \
- CONFIG_BOARD=$(CONFIG_BOARD) \
- CONFIG_PASS_KARGS=$(CONFIG_PASS_KARGS) \
- clean all
-
-loader.gz: $(PKG_BUILD_DIR)/loader.bin
- gzip -nc9 $< > $(LOADER_GZ)
-
-loader.elf: $(PKG_BUILD_DIR)/loader.elf
- $(CP) $< $(LOADER_ELF)
-
-loader.bin: $(PKG_BUILD_DIR)/loader.bin
- $(CP) $< $(LOADER_BIN)
-
-download:
-prepare: $(PKG_BUILD_DIR)/.prepared
-compile: loader-compile
-
-install:
-
-clean:
- rm -rf $(PKG_BUILD_DIR)
-
+++ /dev/null
-/*
- LzmaDecode.c
- LZMA Decoder
-
- LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#include "LzmaDecode.h"
-
-#ifndef Byte
-#define Byte unsigned char
-#endif
-
-#define kNumTopBits 24
-#define kTopValue ((UInt32)1 << kNumTopBits)
-
-#define kNumBitModelTotalBits 11
-#define kBitModelTotal (1 << kNumBitModelTotalBits)
-#define kNumMoveBits 5
-
-typedef struct _CRangeDecoder
-{
- Byte *Buffer;
- Byte *BufferLim;
- UInt32 Range;
- UInt32 Code;
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *InCallback;
- int Result;
- #endif
- int ExtraBytes;
-} CRangeDecoder;
-
-Byte RangeDecoderReadByte(CRangeDecoder *rd)
-{
- if (rd->Buffer == rd->BufferLim)
- {
- #ifdef _LZMA_IN_CB
- UInt32 size;
- rd->Result = rd->InCallback->Read(rd->InCallback, &rd->Buffer, &size);
- rd->BufferLim = rd->Buffer + size;
- if (size == 0)
- #endif
- {
- rd->ExtraBytes = 1;
- return 0xFF;
- }
- }
- return (*rd->Buffer++);
-}
-
-/* #define ReadByte (*rd->Buffer++) */
-#define ReadByte (RangeDecoderReadByte(rd))
-
-void RangeDecoderInit(CRangeDecoder *rd,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- Byte *stream, UInt32 bufferSize
- #endif
- )
-{
- int i;
- #ifdef _LZMA_IN_CB
- rd->InCallback = inCallback;
- rd->Buffer = rd->BufferLim = 0;
- #else
- rd->Buffer = stream;
- rd->BufferLim = stream + bufferSize;
- #endif
- rd->ExtraBytes = 0;
- rd->Code = 0;
- rd->Range = (0xFFFFFFFF);
- for(i = 0; i < 5; i++)
- rd->Code = (rd->Code << 8) | ReadByte;
-}
-
-#define RC_INIT_VAR UInt32 range = rd->Range; UInt32 code = rd->Code;
-#define RC_FLUSH_VAR rd->Range = range; rd->Code = code;
-#define RC_NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | ReadByte; }
-
-UInt32 RangeDecoderDecodeDirectBits(CRangeDecoder *rd, int numTotalBits)
-{
- RC_INIT_VAR
- UInt32 result = 0;
- int i;
- for (i = numTotalBits; i > 0; i--)
- {
- /* UInt32 t; */
- range >>= 1;
-
- result <<= 1;
- if (code >= range)
- {
- code -= range;
- result |= 1;
- }
- /*
- t = (code - range) >> 31;
- t &= 1;
- code -= range & (t - 1);
- result = (result + result) | (1 - t);
- */
- RC_NORMALIZE
- }
- RC_FLUSH_VAR
- return result;
-}
-
-int RangeDecoderBitDecode(CProb *prob, CRangeDecoder *rd)
-{
- UInt32 bound = (rd->Range >> kNumBitModelTotalBits) * *prob;
- if (rd->Code < bound)
- {
- rd->Range = bound;
- *prob += (kBitModelTotal - *prob) >> kNumMoveBits;
- if (rd->Range < kTopValue)
- {
- rd->Code = (rd->Code << 8) | ReadByte;
- rd->Range <<= 8;
- }
- return 0;
- }
- else
- {
- rd->Range -= bound;
- rd->Code -= bound;
- *prob -= (*prob) >> kNumMoveBits;
- if (rd->Range < kTopValue)
- {
- rd->Code = (rd->Code << 8) | ReadByte;
- rd->Range <<= 8;
- }
- return 1;
- }
-}
-
-#define RC_GET_BIT2(prob, mi, A0, A1) \
- UInt32 bound = (range >> kNumBitModelTotalBits) * *prob; \
- if (code < bound) \
- { A0; range = bound; *prob += (kBitModelTotal - *prob) >> kNumMoveBits; mi <<= 1; } \
- else \
- { A1; range -= bound; code -= bound; *prob -= (*prob) >> kNumMoveBits; mi = (mi + mi) + 1; } \
- RC_NORMALIZE
-
-#define RC_GET_BIT(prob, mi) RC_GET_BIT2(prob, mi, ; , ;)
-
-int RangeDecoderBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-{
- int mi = 1;
- int i;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- for(i = numLevels; i > 0; i--)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + mi;
- RC_GET_BIT(prob, mi)
- #else
- mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd);
- #endif
- }
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return mi - (1 << numLevels);
-}
-
-int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-{
- int mi = 1;
- int i;
- int symbol = 0;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- for(i = 0; i < numLevels; i++)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + mi;
- RC_GET_BIT2(prob, mi, ; , symbol |= (1 << i))
- #else
- int bit = RangeDecoderBitDecode(probs + mi, rd);
- mi = mi + mi + bit;
- symbol |= (bit << i);
- #endif
- }
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)
-{
- int symbol = 1;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- do
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + symbol;
- RC_GET_BIT(prob, symbol)
- #else
- symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
- #endif
- }
- while (symbol < 0x100);
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-Byte LzmaLiteralDecodeMatch(CProb *probs, CRangeDecoder *rd, Byte matchByte)
-{
- int symbol = 1;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- do
- {
- int bit;
- int matchBit = (matchByte >> 7) & 1;
- matchByte <<= 1;
- #ifdef _LZMA_LOC_OPT
- {
- CProb *prob = probs + ((1 + matchBit) << 8) + symbol;
- RC_GET_BIT2(prob, symbol, bit = 0, bit = 1)
- }
- #else
- bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd);
- symbol = (symbol << 1) | bit;
- #endif
- if (matchBit != bit)
- {
- while (symbol < 0x100)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + symbol;
- RC_GET_BIT(prob, symbol)
- #else
- symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
- #endif
- }
- break;
- }
- }
- while (symbol < 0x100);
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-#define kNumPosBitsMax 4
-#define kNumPosStatesMax (1 << kNumPosBitsMax)
-
-#define kLenNumLowBits 3
-#define kLenNumLowSymbols (1 << kLenNumLowBits)
-#define kLenNumMidBits 3
-#define kLenNumMidSymbols (1 << kLenNumMidBits)
-#define kLenNumHighBits 8
-#define kLenNumHighSymbols (1 << kLenNumHighBits)
-
-#define LenChoice 0
-#define LenChoice2 (LenChoice + 1)
-#define LenLow (LenChoice2 + 1)
-#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-
-int LzmaLenDecode(CProb *p, CRangeDecoder *rd, int posState)
-{
- if(RangeDecoderBitDecode(p + LenChoice, rd) == 0)
- return RangeDecoderBitTreeDecode(p + LenLow +
- (posState << kLenNumLowBits), kLenNumLowBits, rd);
- if(RangeDecoderBitDecode(p + LenChoice2, rd) == 0)
- return kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid +
- (posState << kLenNumMidBits), kLenNumMidBits, rd);
- return kLenNumLowSymbols + kLenNumMidSymbols +
- RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd);
-}
-
-#define kNumStates 12
-
-#define kStartPosModelIndex 4
-#define kEndPosModelIndex 14
-#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-
-#define kNumPosSlotBits 6
-#define kNumLenToPosStates 4
-
-#define kNumAlignBits 4
-#define kAlignTableSize (1 << kNumAlignBits)
-
-#define kMatchMinLen 2
-
-#define IsMatch 0
-#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-#define IsRepG0 (IsRep + kNumStates)
-#define IsRepG1 (IsRepG0 + kNumStates)
-#define IsRepG2 (IsRepG1 + kNumStates)
-#define IsRep0Long (IsRepG2 + kNumStates)
-#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-#define LenCoder (Align + kAlignTableSize)
-#define RepLenCoder (LenCoder + kNumLenProbs)
-#define Literal (RepLenCoder + kNumLenProbs)
-
-#if Literal != LZMA_BASE_SIZE
-StopCompilingDueBUG
-#endif
-
-#ifdef _LZMA_OUT_READ
-
-typedef struct _LzmaVarState
-{
- CRangeDecoder RangeDecoder;
- Byte *Dictionary;
- UInt32 DictionarySize;
- UInt32 DictionaryPos;
- UInt32 GlobalPos;
- UInt32 Reps[4];
- int lc;
- int lp;
- int pb;
- int State;
- int PreviousIsMatch;
- int RemainLen;
-} LzmaVarState;
-
-int LzmaDecoderInit(
- unsigned char *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- unsigned char *dictionary, UInt32 dictionarySize,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- unsigned char *inStream, UInt32 inSize
- #endif
- )
-{
- LzmaVarState *vs = (LzmaVarState *)buffer;
- CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
- UInt32 i;
- if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState))
- return LZMA_RESULT_NOT_ENOUGH_MEM;
- vs->Dictionary = dictionary;
- vs->DictionarySize = dictionarySize;
- vs->DictionaryPos = 0;
- vs->GlobalPos = 0;
- vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
- vs->lc = lc;
- vs->lp = lp;
- vs->pb = pb;
- vs->State = 0;
- vs->PreviousIsMatch = 0;
- vs->RemainLen = 0;
- dictionary[dictionarySize - 1] = 0;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- RangeDecoderInit(&vs->RangeDecoder,
- #ifdef _LZMA_IN_CB
- inCallback
- #else
- inStream, inSize
- #endif
- );
- return LZMA_RESULT_OK;
-}
-
-int LzmaDecode(unsigned char *buffer,
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed)
-{
- LzmaVarState *vs = (LzmaVarState *)buffer;
- CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
- CRangeDecoder rd = vs->RangeDecoder;
- int state = vs->State;
- int previousIsMatch = vs->PreviousIsMatch;
- Byte previousByte;
- UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
- UInt32 nowPos = 0;
- UInt32 posStateMask = (1 << (vs->pb)) - 1;
- UInt32 literalPosMask = (1 << (vs->lp)) - 1;
- int lc = vs->lc;
- int len = vs->RemainLen;
- UInt32 globalPos = vs->GlobalPos;
-
- Byte *dictionary = vs->Dictionary;
- UInt32 dictionarySize = vs->DictionarySize;
- UInt32 dictionaryPos = vs->DictionaryPos;
-
- if (len == -1)
- {
- *outSizeProcessed = 0;
- return LZMA_RESULT_OK;
- }
-
- while(len > 0 && nowPos < outSize)
- {
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- len--;
- }
- if (dictionaryPos == 0)
- previousByte = dictionary[dictionarySize - 1];
- else
- previousByte = dictionary[dictionaryPos - 1];
-#else
-
-int LzmaDecode(
- Byte *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- unsigned char *inStream, UInt32 inSize,
- #endif
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed)
-{
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
- CProb *p = (CProb *)buffer;
- CRangeDecoder rd;
- UInt32 i;
- int state = 0;
- int previousIsMatch = 0;
- Byte previousByte = 0;
- UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
- UInt32 nowPos = 0;
- UInt32 posStateMask = (1 << pb) - 1;
- UInt32 literalPosMask = (1 << lp) - 1;
- int len = 0;
- if (bufferSize < numProbs * sizeof(CProb))
- return LZMA_RESULT_NOT_ENOUGH_MEM;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- RangeDecoderInit(&rd,
- #ifdef _LZMA_IN_CB
- inCallback
- #else
- inStream, inSize
- #endif
- );
-#endif
-
- *outSizeProcessed = 0;
- while(nowPos < outSize)
- {
- int posState = (int)(
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & posStateMask);
- #ifdef _LZMA_IN_CB
- if (rd.Result != LZMA_RESULT_OK)
- return rd.Result;
- #endif
- if (rd.ExtraBytes != 0)
- return LZMA_RESULT_DATA_ERROR;
- if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0)
- {
- CProb *probs = p + Literal + (LZMA_LIT_SIZE *
- (((
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-
- if (state < 4) state = 0;
- else if (state < 10) state -= 3;
- else state -= 6;
- if (previousIsMatch)
- {
- Byte matchByte;
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- matchByte = dictionary[pos];
- #else
- matchByte = outStream[nowPos - rep0];
- #endif
- previousByte = LzmaLiteralDecodeMatch(probs, &rd, matchByte);
- previousIsMatch = 0;
- }
- else
- previousByte = LzmaLiteralDecode(probs, &rd);
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #endif
- }
- else
- {
- previousIsMatch = 1;
- if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1)
- {
- if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0)
- {
- if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0)
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos;
- #endif
- if (
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- == 0)
- return LZMA_RESULT_DATA_ERROR;
- state = state < 7 ? 9 : 11;
- #ifdef _LZMA_OUT_READ
- pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- continue;
- }
- }
- else
- {
- UInt32 distance;
- if(RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0)
- distance = rep1;
- else
- {
- if(RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0)
- distance = rep2;
- else
- {
- distance = rep3;
- rep3 = rep2;
- }
- rep2 = rep1;
- }
- rep1 = rep0;
- rep0 = distance;
- }
- len = LzmaLenDecode(p + RepLenCoder, &rd, posState);
- state = state < 7 ? 8 : 11;
- }
- else
- {
- int posSlot;
- rep3 = rep2;
- rep2 = rep1;
- rep1 = rep0;
- state = state < 7 ? 7 : 10;
- len = LzmaLenDecode(p + LenCoder, &rd, posState);
- posSlot = RangeDecoderBitTreeDecode(p + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
- kNumPosSlotBits), kNumPosSlotBits, &rd);
- if (posSlot >= kStartPosModelIndex)
- {
- int numDirectBits = ((posSlot >> 1) - 1);
- rep0 = ((2 | ((UInt32)posSlot & 1)) << numDirectBits);
- if (posSlot < kEndPosModelIndex)
- {
- rep0 += RangeDecoderReverseBitTreeDecode(
- p + SpecPos + rep0 - posSlot - 1, numDirectBits, &rd);
- }
- else
- {
- rep0 += RangeDecoderDecodeDirectBits(&rd,
- numDirectBits - kNumAlignBits) << kNumAlignBits;
- rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd);
- }
- }
- else
- rep0 = posSlot;
- rep0++;
- }
- if (rep0 == (UInt32)(0))
- {
- /* it's for stream version */
- len = -1;
- break;
- }
- if (rep0 > nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- {
- return LZMA_RESULT_DATA_ERROR;
- }
- len += kMatchMinLen;
- do
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- len--;
- }
- while(len > 0 && nowPos < outSize);
- }
- }
-
- #ifdef _LZMA_OUT_READ
- vs->RangeDecoder = rd;
- vs->DictionaryPos = dictionaryPos;
- vs->GlobalPos = globalPos + nowPos;
- vs->Reps[0] = rep0;
- vs->Reps[1] = rep1;
- vs->Reps[2] = rep2;
- vs->Reps[3] = rep3;
- vs->State = state;
- vs->PreviousIsMatch = previousIsMatch;
- vs->RemainLen = len;
- #endif
-
- *outSizeProcessed = nowPos;
- return LZMA_RESULT_OK;
-}
+++ /dev/null
-/*
- LzmaDecode.h
- LZMA Decoder interface
-
- LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#ifndef __LZMADECODE_H
-#define __LZMADECODE_H
-
-/* #define _LZMA_IN_CB */
-/* Use callback for input data */
-
-/* #define _LZMA_OUT_READ */
-/* Use read function for output data */
-
-/* #define _LZMA_PROB32 */
-/* It can increase speed on some 32-bit CPUs,
- but memory usage will be doubled in that case */
-
-/* #define _LZMA_LOC_OPT */
-/* Enable local speed optimizations inside code */
-
-#ifndef UInt32
-#ifdef _LZMA_UINT32_IS_ULONG
-#define UInt32 unsigned long
-#else
-#define UInt32 unsigned int
-#endif
-#endif
-
-#ifdef _LZMA_PROB32
-#define CProb UInt32
-#else
-#define CProb unsigned short
-#endif
-
-#define LZMA_RESULT_OK 0
-#define LZMA_RESULT_DATA_ERROR 1
-#define LZMA_RESULT_NOT_ENOUGH_MEM 2
-
-#ifdef _LZMA_IN_CB
-typedef struct _ILzmaInCallback
-{
- int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize);
-} ILzmaInCallback;
-#endif
-
-#define LZMA_BASE_SIZE 1846
-#define LZMA_LIT_SIZE 768
-
-/*
-bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb)
-bufferSize += 100 in case of _LZMA_OUT_READ
-by default CProb is unsigned short,
-but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int)
-*/
-
-#ifdef _LZMA_OUT_READ
-int LzmaDecoderInit(
- unsigned char *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- unsigned char *dictionary, UInt32 dictionarySize,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- unsigned char *inStream, UInt32 inSize
- #endif
-);
-#endif
-
-int LzmaDecode(
- unsigned char *buffer,
- #ifndef _LZMA_OUT_READ
- UInt32 bufferSize,
- int lc, int lp, int pb,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- unsigned char *inStream, UInt32 inSize,
- #endif
- #endif
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed);
-
-#endif
+++ /dev/null
-#
-# Makefile for Broadcom BCM947XX boards
-#
-# Copyright 2001-2003, Broadcom Corporation
-# All Rights Reserved.
-#
-# THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-# KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-# SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-# FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-#
-# Copyright 2004 Manuel Novoa III <mjn3@codepoet.org>
-# Modified to support bzip'd kernels.
-# Of course, it would be better to integrate bunzip capability into CFE.
-#
-# Copyright 2005 Oleg I. Vdovikin <oleg@cs.msu.su>
-# Cleaned up, modified for lzma support, removed from kernel
-#
-# Copyright 2007 Gabor Juhos <juhosg@freemail.hu>
-# Modified to support user defined entry point address.
-# Added support for make targets with different names
-#
-
-LOADADDR := 0x80001000
-LZMA_TEXT_START := 0x80500000
-LZMA_STARTUP_ORG:= 0
-LOADER_DATA :=
-CONFIG_PASS_KARGS :=
-CONFIG_BOARD :=
-
-CC := $(CROSS_COMPILE)gcc
-LD := $(CROSS_COMPILE)ld
-OBJCOPY := $(CROSS_COMPILE)objcopy
-OBJDUMP := $(CROSS_COMPILE)objdump
-
-BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
-
-CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
- -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \
- -ffunction-sections -pipe -mlong-calls -fno-common \
- -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
-CFLAGS += -DLOADADDR=$(LOADADDR)
-
-ASFLAGS = $(CFLAGS) -D__ASSEMBLY__ -DLZMA_STARTUP_ORG=$(LZMA_STARTUP_ORG)
-
-LDFLAGS = -static --gc-sections -no-warn-mismatch
-LDFLAGS += -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
-
-O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
-
-OBJECTS := head.o decompress.o board.o LzmaDecode.o
-
-ifneq ($(strip $(LOADER_DATA)),)
-OBJECTS += data.o
-CFLAGS += -DLZMA_WRAPPER=1
-else
-CFLAGS += -D_LZMA_IN_CB
-endif
-
-ifneq ($(strip $(CONFIG_PASS_KARGS)),)
-CFLAGS += -DCONFIG_PASS_KARGS
-endif
-
-BOARD_DEF := $(strip $(CONFIG_BOARD))
-BOARD_DEF := $(shell echo $(BOARD_DEF) | tr a-z A-Z | tr -d -)
-ifneq ($(BOARD_DEF),)
-CFLAGS += -DCONFIG_BOARD_$(BOARD_DEF)
-endif
-
-all: loader.bin
-
-# Don't build dependencies, this may die if $(CC) isn't gcc
-dep:
-
-install:
-
-%.o : %.c
- $(CC) $(CFLAGS) -c -o $@ $<
-
-%.o : %.S
- $(CC) $(ASFLAGS) -c -o $@ $<
-
-data.o: $(LOADER_DATA)
- $(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
-
-loader.bin: loader.elf
- $(OBJCOPY) $(BIN_FLAGS) $< $@
-
-loader.elf: $(OBJECTS)
- $(LD) $(LDFLAGS) -o $@ $(OBJECTS)
-
-mrproper: clean
-
-clean:
- rm -f *.elf *.bin *.o
-
-
-
+++ /dev/null
-/*
- * LZMA compressed kernel decompressor for bcm947xx boards
- *
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-The code is intended to decompress kernel, being compressed using lzma utility
-build using 7zip LZMA SDK. This utility is located in the LZMA_Alone directory
-
-decompressor code expects that your .trx file consist of three partitions:
-
-1) decompressor itself (this is gziped code which pmon/cfe will extract and run
-on boot-up instead of real kernel)
-2) LZMA compressed kernel (both streamed and regular modes are supported now)
-3) Root filesystem
-
-Please be sure to apply the following patch for use this new trx layout (it will
-allow using both new and old trx files for root filesystem lookup code)
-
---- linuz/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:24:27.503322896 +0300
-+++ linux/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:29:05.237100944 +0300
-@@ -221,7 +221,9 @@
- /* Try looking at TRX header for rootfs offset */
- if (le32_to_cpu(trx->magic) == TRX_MAGIC) {
- bcm947xx_parts[1].offset = off;
-- if (le32_to_cpu(trx->offsets[1]) > off)
-+ if (le32_to_cpu(trx->offsets[2]) > off)
-+ off = le32_to_cpu(trx->offsets[2]);
-+ else if (le32_to_cpu(trx->offsets[1]) > off)
- off = le32_to_cpu(trx->offsets[1]);
- continue;
- }
-
-
-Revision history:
- 0.02 Initial release
- 0.03 Added Mineharu Takahara <mtakahar@yahoo.com> patch to pass actual
- output size to decoder (stream mode compressed input is not
- a requirement anymore)
- 0.04 Reordered functions using lds script
+++ /dev/null
-/*
- * ADM5120 specific board support for LZMA decompressor
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <stddef.h>
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-/*
- * INTC definitions
- */
-#define INTC_BASE 0xB2200000
-
-/* INTC registers */
-#define INTC_REG_IRQ_DISABLE 0x0C
-
-/*
- * UART definitions
- */
-#define UART_BASE 0xB2600000
-/* UART registers */
-#define UART_REG_DATA 0x00 /* Data register */
-#define UART_REG_ECR 0x04 /* Error Clear register */
-#define UART_REG_LCRH 0x08 /* Line Control High register */
-#define UART_REG_LCRM 0x0C /* Line Control Middle register */
-#define UART_REG_LCRL 0x10 /* Line Control Low register */
-#define UART_REG_CTRL 0x14 /* Control register */
-#define UART_REG_FLAG 0x18 /* Flag register */
-
-/* Control register bits */
-#define UART_CTRL_EN ( 1 << 0 ) /* UART enable */
-
-/* Line Control High register bits */
-#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
-
-/* Flag register bits */
-#define UART_FLAG_CTS ( 1 << 0 )
-#define UART_FLAG_DSR ( 1 << 1 )
-#define UART_FLAG_DCD ( 1 << 2 )
-#define UART_FLAG_BUSY ( 1 << 3 )
-#define UART_FLAG_RXFE ( 1 << 4 ) /* RX FIFO empty */
-#define UART_FLAG_TXFF ( 1 << 5 ) /* TX FIFO full */
-#define UART_FLAG_RXFF ( 1 << 6 ) /* RX FIFO full */
-#define UART_FLAG_TXFE ( 1 << 7 ) /* TX FIFO empty */
-
-/*
- * SWITCH definitions
- */
-#define SWITCH_BASE 0xB2000000
-
-#define SWITCH_REG_CPUP_CONF 0x0024
-#define SWITCH_REG_PORT_CONF0 0x0028
-
-#define SWITCH_REG_GPIO_CONF0 0x00B8
-#define SWITCH_REG_GPIO_CONF2 0x00BC
-
-#define SWITCH_REG_PORT0_LED 0x0100
-#define SWITCH_REG_PORT1_LED 0x0104
-#define SWITCH_REG_PORT2_LED 0x0108
-#define SWITCH_REG_PORT3_LED 0x010C
-#define SWITCH_REG_PORT4_LED 0x0110
-
-#define SWITCH_PORTS_HW 0x3F /* Hardware Ports */
-
-/* CPUP_CONF register bits */
-#define CPUP_CONF_DCPUP ( 1 << 0 ) /* Disable CPU port */
-
-/* PORT_CONF0 register bits */
-#define PORT_CONF0_DP_SHIFT 0 /* disable port shift*/
-
-
-/*
- * UART routines
- */
-
-#define UART_READ(r) READREG(UART_BASE+(r))
-#define UART_WRITE(r,v) WRITEREG(UART_BASE+(r),(v))
-
-static void uart_init(void)
-{
- unsigned int t;
-
- /* disable uart */
- UART_WRITE(UART_REG_CTRL, 0);
-
- /* keep current baud rate */
- t = UART_READ(UART_REG_LCRM);
- UART_WRITE(UART_REG_LCRM, t);
- t = UART_READ(UART_REG_LCRL);
- UART_WRITE(UART_REG_LCRL, t);
-
- /* keep data, stop, and parity bits, but disable FIFO */
- t = UART_READ(UART_REG_LCRH);
- t &= ~(UART_LCRH_FEN);
- UART_WRITE(UART_REG_LCRH, t );
-
- /* clear error bits */
- UART_WRITE(UART_REG_ECR, 0xFF);
-
- /* enable uart, and disable interrupts */
- UART_WRITE(UART_REG_CTRL, UART_CTRL_EN);
-}
-
-static void uart_putc(int ch)
-{
- while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
-
- UART_WRITE(UART_REG_DATA, ch);
-
- while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFF) != 0);
-}
-
-/*
- * INTC routines
- */
-
-#define INTC_READ(r) READREG(INTC_BASE+(r))
-#define INTC_WRITE(r,v) WRITEREG(INTC_BASE+(r),v)
-
-static void intc_init(void)
-{
- INTC_WRITE(INTC_REG_IRQ_DISABLE, 0xFFFFFFFF);
-}
-
-/*
- * SWITCH routines
- */
-
-#define SWITCH_READ(r) READREG(SWITCH_BASE+(r))
-#define SWITCH_WRITE(r,v) WRITEREG(SWITCH_BASE+(r),v)
-
-static void switch_init(void)
-{
- /* disable PHYS ports */
- SWITCH_WRITE(SWITCH_REG_PORT_CONF0,
- (SWITCH_PORTS_HW << PORT_CONF0_DP_SHIFT));
-
- /* disable CPU port */
- SWITCH_WRITE(SWITCH_REG_CPUP_CONF, CPUP_CONF_DCPUP);
-
- /* disable GPIO lines */
- SWITCH_WRITE(SWITCH_REG_GPIO_CONF0, 0);
- SWITCH_WRITE(SWITCH_REG_GPIO_CONF2, 0);
-
- /* disable LED lines */
- SWITCH_WRITE(SWITCH_REG_PORT0_LED, 0);
- SWITCH_WRITE(SWITCH_REG_PORT1_LED, 0);
- SWITCH_WRITE(SWITCH_REG_PORT2_LED, 0);
- SWITCH_WRITE(SWITCH_REG_PORT3_LED, 0);
- SWITCH_WRITE(SWITCH_REG_PORT4_LED, 0);
-}
-
-/*
- * routines needed by decompress.c
- */
-void board_putc(int ch)
-{
- uart_putc(ch);
-}
-
-void board_init(void)
-{
- intc_init();
- switch_init();
- uart_init();
-}
+++ /dev/null
-/*
- * Cellvision/SparkLAN boards
- */
-
-#if defined(CONFIG_BOARD_CAS630)
-# define CONFIG_BOARD_NAME "CAS-630"
-#endif
-
-#if defined(CONFIG_BOARD_CAS670)
-# define CONFIG_BOARD_NAME "CAS-670"
-#endif
-
-#if defined(CONFIG_BOARD_CAS700)
-# define CONFIG_BOARD_NAME "CAS-700"
-#endif
-
-#if defined(CONFIG_BOARD_CAS790)
-# define CONFIG_BOARD_NAME "CAS-790"
-#endif
-
-#if defined(CONFIG_BOARD_CAS771)
-# define CONFIG_BOARD_NAME "CAS-771"
-#endif
-
-#if defined(CONFIG_BOARD_CAS861)
-# define CONFIG_BOARD_NAME "CAS-861"
-#endif
-
-#if defined(CONFIG_BOARD_NFS101U)
-# define CONFIG_BOARD_NAME "NFS-101U"
-#endif
-
-#if defined(CONFIG_BOARD_NFS202U)
-# define CONFIG_BOARD_NAME "NFS-202U"
-#endif
-
-/*
- * Edimax boards
- */
-#if defined(CONFIG_BOARD_BR6104K)
-# define CONFIG_BOARD_NAME "BR-6104K"
-#endif
-
-#if defined(CONFIG_BOARD_BR6104KP)
-# define CONFIG_BOARD_NAME "BR-6104KP"
-#endif
-
-/*
- * Infineon boards
- */
-#if defined(CONFIG_BOARD_EASY5120)
-# define CONFIG_BOARD_NAME "EASY 5120"
-#endif
-
-#if defined(CONFIG_BOARD_EASY5120RT)
-# define CONFIG_BOARD_NAME "EASY 5120-RT"
-#endif
-
-#if defined(CONFIG_BOARD_EASY5120PATA)
-# define CONFIG_BOARD_NAME "EASY 5120P-ATA"
-#endif
-
-#if defined(CONFIG_BOARD_EASY83000)
-# define CONFIG_BOARD_NAME "EASY 83000"
-#endif
-
-/*
- * ZyXEL boards
- */
-#if defined(CONFIG_BOARD_P334WT)
-# define CONFIG_BOARD_NAME "P-334WT"
-#endif
-
-#if defined(CONFIG_BOARD_P335)
-# define CONFIG_BOARD_NAME "P-335"
-#endif
-
-/*
- * Default values
- */
-#ifndef CONFIG_BOARD_NAME
-# define CONFIG_BOARD_NAME "ADM5120"
-#endif
+++ /dev/null
-/*
- * LZMA compressed kernel decompressor for ADM5120 boards
- *
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *
- * Please note, this was code based on the bunzip2 decompressor code
- * by Manuel Novoa III (mjn3@codepoet.org), although the only thing left
- * is an idea and part of original vendor code
- *
- *
- * 12-Mar-2005 Mineharu Takahara <mtakahar@yahoo.com>
- * pass actual output size to decoder (stream mode
- * compressed input is not a requirement anymore)
- *
- * 24-Apr-2005 Oleg I. Vdovikin
- * reordered functions using lds script, removed forward decl
- *
- * 24-Mar-2007 Gabor Juhos
- * pass original values of the a0,a1,a2,a3 registers to the kernel
- *
- * 19-May-2007 Gabor Juhos
- * endiannes related cleanups
- * add support for decompressing an embedded kernel
- *
- */
-
-#include <stddef.h>
-
-#include "config.h"
-#include "LzmaDecode.h"
-
-#define ADM5120_FLASH_START 0x1fc00000 /* Flash start */
-#define ADM5120_FLASH_END 0x1fe00000 /* Flash end */
-
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-
-#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
-
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-
-#define cache_unroll(base,op) \
- __asm__ __volatile__( \
- ".set noreorder;\n" \
- ".set mips3;\n" \
- "cache %1, (%0);\n" \
- ".set mips0;\n" \
- ".set reorder\n" \
- : \
- : "r" (base), \
- "i" (op));
-
-static __inline__ void blast_icache(unsigned long size, unsigned long lsize)
-{
- unsigned long start = KSEG0;
- unsigned long end = (start + size);
-
- while(start < end) {
- cache_unroll(start,Index_Invalidate_I);
- start += lsize;
- }
-}
-
-static __inline__ void blast_dcache(unsigned long size, unsigned long lsize)
-{
- unsigned long start = KSEG0;
- unsigned long end = (start + size);
-
- while(start < end) {
- cache_unroll(start,Index_Writeback_Inv_D);
- start += lsize;
- }
-}
-
-#define TRX_MAGIC 0x30524448 /* "HDR0" */
-#define TRX_ALIGN 0x1000
-
-struct trx_header {
- unsigned int magic; /* "HDR0" */
- unsigned int len; /* Length of file including header */
- unsigned int crc32; /* 32-bit CRC from flag_version to end of file */
- unsigned int flag_version; /* 0:15 flags, 16:31 version */
- unsigned int offsets[3]; /* Offsets of partitions from start of header */
-};
-
-/* beyound the image end, size not known in advance */
-extern unsigned char workspace[];
-#if LZMA_WRAPPER
-extern unsigned char _lzma_data_start[];
-extern unsigned char _lzma_data_end[];
-#endif
-
-extern void board_init(void);
-extern void board_putc(int ch);
-
-struct env_var {
- char *name;
- char *value;
-};
-
-#ifdef CONFIG_PASS_KARGS
-#define ENVV(n,v) {.name = (n), .value = (v)}
-struct env_var env_vars[] = {
- ENVV("board_name", CONFIG_BOARD_NAME),
- ENVV(NULL, NULL)
-};
-#endif
-
-unsigned char *data;
-unsigned long datalen;
-
-typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1,
- unsigned long reg_a2, unsigned long reg_a3);
-
-static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
-{
- *bufferSize = 1;
- *buffer = data++;
-
- return LZMA_RESULT_OK;
-}
-
-static __inline__ unsigned char get_byte(void)
-{
- unsigned char *buffer;
- UInt32 fake;
-
- read_byte(0, &buffer, &fake);
- return *buffer;
-}
-
-static __inline__ unsigned int read_le32(void *buf)
-{
- unsigned char *p;
-
- p = buf;
- return ((unsigned int)p[0] + ((unsigned int)p[1] << 8) +
- ((unsigned int)p[2] << 16) +((unsigned int)p[3] << 24));
-}
-
-static void print_char(char ch)
-{
- if (ch == '\n')
- board_putc('\r');
- board_putc(ch);
-}
-
-static void print_str(char * str)
-{
- while ( *str != 0 )
- print_char(*str++);
-}
-
-static void print_hex(int val)
-{
- int i;
- int tmp;
-
- print_str("0x");
- for ( i=0 ; i<8 ; i++ ) {
- tmp = (val >> ((7-i) * 4 )) & 0xf;
- tmp = tmp < 10 ? (tmp + '0') : (tmp + 'A' - 10);
- board_putc(tmp);
- }
-}
-
-#if !(LZMA_WRAPPER)
-static unsigned char *find_kernel(void)
-{
- struct trx_header *hdr;
- unsigned char *ret;
-
- print_str("Looking for TRX header... ");
- /* look for trx header, 32-bit data access */
- hdr = NULL;
- for (ret = ((unsigned char *) KSEG1ADDR(ADM5120_FLASH_START));
- ret < ((unsigned char *)KSEG1ADDR(ADM5120_FLASH_END));
- ret += TRX_ALIGN) {
-
- if (read_le32(ret) == TRX_MAGIC) {
- hdr = (struct trx_header *)ret;
- break;
- }
- }
-
- if (hdr == NULL) {
- print_str("not found!\n");
- return NULL;
- }
-
- print_str("found at ");
- print_hex((unsigned int)ret);
- print_str(", kernel in partition ");
-
- /* compressed kernel is in the partition 0 or 1 */
- if ((read_le32(&hdr->offsets[1]) == 0) ||
- (read_le32(&hdr->offsets[1]) > 65536)) {
- ret += read_le32(&hdr->offsets[0]);
- print_str("0\n");
- } else {
- ret += read_le32(&hdr->offsets[1]);
- print_str("1\n");
- }
-
- return ret;
-}
-#endif /* !(LZMA_WRAPPER) */
-
-static void halt(void)
-{
- print_str("\nSystem halted!\n");
- for(;;);
-}
-
-/* should be the first function */
-void decompress_entry(unsigned long reg_a0, unsigned long reg_a1,
- unsigned long reg_a2, unsigned long reg_a3,
- unsigned long icache_size, unsigned long icache_lsize,
- unsigned long dcache_size, unsigned long dcache_lsize)
-{
- unsigned int i; /* temp value */
- unsigned int lc; /* literal context bits */
- unsigned int lp; /* literal pos state bits */
- unsigned int pb; /* pos state bits */
- unsigned int osize; /* uncompressed size */
- int res;
-#if !(LZMA_WRAPPER)
- ILzmaInCallback callback;
-#endif
-
- board_init();
-
- print_str("\n\nLZMA loader for " CONFIG_BOARD_NAME
- ", Copyright (C) 2007 OpenWrt.org\n\n");
-
-#if LZMA_WRAPPER
- data = _lzma_data_start;
- datalen = _lzma_data_end - _lzma_data_start;
-#else
- data = find_kernel();
- if (data == NULL) {
- /* no compressed kernel found, halting */
- halt();
- }
-
- datalen = ((unsigned char *) KSEG1ADDR(ADM5120_FLASH_END))-data;
-#endif
-
- /* lzma args */
- i = get_byte();
- lc = i % 9, i = i / 9;
- lp = i % 5, pb = i / 5;
-
- /* skip rest of the LZMA coder property */
- for (i = 0; i < 4; i++)
- get_byte();
-
- /* read the lower half of uncompressed size in the header */
- osize = ((unsigned int)get_byte()) +
- ((unsigned int)get_byte() << 8) +
- ((unsigned int)get_byte() << 16) +
- ((unsigned int)get_byte() << 24);
-
- /* skip rest of the header (upper half of uncompressed size) */
- for (i = 0; i < 4; i++)
- get_byte();
-
- print_str("decompressing kernel... ");
-
- /* decompress kernel */
-#if LZMA_WRAPPER
- res = LzmaDecode(workspace, ~0, lc, lp, pb, data, datalen,
- (unsigned char*)LOADADDR, osize, &i);
-#else
- callback.Read = read_byte;
- res = LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
- (unsigned char*)LOADADDR, osize, &i);
-#endif
- if (res != LZMA_RESULT_OK) {
- print_str("failed!\n");
- print_str("LzmaDecode: ");
- switch (res) {
- case LZMA_RESULT_DATA_ERROR:
- print_str("data error\n");
- break;
- case LZMA_RESULT_NOT_ENOUGH_MEM:
- print_str("not enough memory\n");
- break;
- default:
- print_str("unknown error, err=0x");
- print_hex(res);
- print_str("\n");
- }
- halt();
- }
-
- print_str("done!\n");
-
- blast_dcache(dcache_size, dcache_lsize);
- blast_icache(icache_size, icache_lsize);
-
- print_str("launching kernel...\n\n");
-
-#ifdef CONFIG_PASS_KARGS
- reg_a0 = 0;
- reg_a1 = 0;
- reg_a2 = (unsigned long)env_vars;
- reg_a3 = 0;
-#endif
- /* Jump to load address */
- ((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3);
-}
+++ /dev/null
-/* Copyright 2007 Gabor Juhos <juhosg@freemail.hu> */
-/* keep original values of the a0,a1,a2,a3 registers */
-/* modifed to support user defined entry point address */
-/* Copyright 2005 Oleg I. Vdovikin (oleg@cs.msu.su) */
-/* cache manipulation adapted from Broadcom code */
-/* idea taken from original bunzip2 decompressor code */
-/* Copyright 2004 Manuel Novoa III (mjn3@codepoet.org) */
-/* Licensed under the linux kernel's version of the GPL.*/
-
-#include <asm/asm.h>
-#include <asm/regdef.h>
-
-#define KSEG0 0x80000000
-
-#define C0_STATUS $12
-#define C0_CAUSE $13
-#define C0_CONFIG $16
-#define C0_WATCHLO $18
-#define C0_WATCHHI $19
-#define C0_TAGLO $28
-#define C0_TAGHI $29
-
-#define CONF1_DA_SHIFT 7 /* D$ associativity */
-#define CONF1_DA_MASK 0x00000380
-#define CONF1_DA_BASE 1
-#define CONF1_DL_SHIFT 10 /* D$ line size */
-#define CONF1_DL_MASK 0x00001c00
-#define CONF1_DL_BASE 2
-#define CONF1_DS_SHIFT 13 /* D$ sets/way */
-#define CONF1_DS_MASK 0x0000e000
-#define CONF1_DS_BASE 64
-#define CONF1_IA_SHIFT 16 /* I$ associativity */
-#define CONF1_IA_MASK 0x00070000
-#define CONF1_IA_BASE 1
-#define CONF1_IL_SHIFT 19 /* I$ line size */
-#define CONF1_IL_MASK 0x00380000
-#define CONF1_IL_BASE 2
-#define CONF1_IS_SHIFT 22 /* Instruction cache sets/way */
-#define CONF1_IS_MASK 0x01c00000
-#define CONF1_IS_BASE 64
-
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-
- .text
-
-#if (LZMA_STARTUP_ORG)
- .set noreorder
-
- b startup
- nop
-
- .org LZMA_STARTUP_ORG
-#endif
-
-LEAF(startup)
- .set noreorder
- .set mips32
-
- mtc0 zero, C0_WATCHLO # clear watch registers
- mtc0 zero, C0_WATCHHI
-
- mtc0 zero, C0_CAUSE # clear before writing status register
-
- mfc0 t0, C0_STATUS # get status register
- li t1, ~(0xFF01)
- and t0, t1 # mask interrupts
- mtc0 t0, C0_STATUS # set up status register
-
- move t1, ra # save return address
- la t0, __reloc_label # get linked address of label
- bal __reloc_label # branch and link to label to
- nop # get actual address
-__reloc_label:
- subu t0, ra, t0 # get reloc_delta
- move ra, t1 # restore return address
-
- beqz t0, __reloc_end # if delta is 0 we are in the right place
- nop
-
- /* Copy our code to the right place */
- la t1, _code_start # get linked address of _code_start
- la t2, _code_end # get linked address of _code_end
- addu t0, t0, t1 # calculate actual address of _code_start
-
-__reloc_copy:
- lw t3, 0(t0)
- sw t3, 0(t1)
- add t1, 4
- blt t1, t2, __reloc_copy
- add t0, 4
-
-__reloc_end:
-
- /* At this point we need to invalidate dcache and */
- /* icache before jumping to new code */
-
-1: /* Get cache sizes */
- .set mips32
- mfc0 s0,C0_CONFIG,1
- .set mips0
-
- li s1,CONF1_DL_MASK
- and s1,s0
- beq s1,zero,nodc
- nop
-
- srl s1,CONF1_DL_SHIFT
- li t0,CONF1_DL_BASE
- sll s1,t0,s1 /* s1 has D$ cache line size */
-
- li s2,CONF1_DA_MASK
- and s2,s0
- srl s2,CONF1_DA_SHIFT
- addiu s2,CONF1_DA_BASE /* s2 now has D$ associativity */
-
- li t0,CONF1_DS_MASK
- and t0,s0
- srl t0,CONF1_DS_SHIFT
- li s3,CONF1_DS_BASE
- sll s3,s3,t0 /* s3 has D$ sets per way */
-
- multu s2,s3 /* sets/way * associativity */
- mflo t0 /* total cache lines */
-
- multu s1,t0 /* D$ linesize * lines */
- mflo s2 /* s2 is now D$ size in bytes */
-
- /* Initilize the D$: */
- mtc0 zero,C0_TAGLO
- mtc0 zero,C0_TAGHI
-
- li t0,KSEG0 /* Just an address for the first $ line */
- addu t1,t0,s2 /* + size of cache == end */
-
- .set mips3
-1: cache Index_Writeback_Inv_D,0(t0)
- .set mips0
- bne t0,t1,1b
- addu t0,s1
-
-nodc:
- /* Now we get to do it all again for the I$ */
-
- move s3,zero /* just in case there is no icache */
- move s4,zero
-
- li t0,CONF1_IL_MASK
- and t0,s0
- beq t0,zero,noic
- nop
-
- srl t0,CONF1_IL_SHIFT
- li s3,CONF1_IL_BASE
- sll s3,t0 /* s3 has I$ cache line size */
-
- li t0,CONF1_IA_MASK
- and t0,s0
- srl t0,CONF1_IA_SHIFT
- addiu s4,t0,CONF1_IA_BASE /* s4 now has I$ associativity */
-
- li t0,CONF1_IS_MASK
- and t0,s0
- srl t0,CONF1_IS_SHIFT
- li s5,CONF1_IS_BASE
- sll s5,t0 /* s5 has I$ sets per way */
-
- multu s4,s5 /* sets/way * associativity */
- mflo t0 /* s4 is now total cache lines */
-
- multu s3,t0 /* I$ linesize * lines */
- mflo s4 /* s4 is cache size in bytes */
-
- /* Initilize the I$: */
- mtc0 zero,C0_TAGLO
- mtc0 zero,C0_TAGHI
-
- li t0,KSEG0 /* Just an address for the first $ line */
- addu t1,t0,s4 /* + size of cache == end */
-
- .set mips3
-1: cache Index_Invalidate_I,0(t0)
- .set mips0
- bne t0,t1,1b
- addu t0,s3
-
-noic:
- /* Setup new "C" stack */
- la sp, _stack
-
- addiu sp, -32 /* reserve stack for parameters */
-#if 0
- sw a0, 0(sp)
- sw a1, 4(sp)
- sw a2, 8(sp)
- sw a3, 12(sp)
-#endif
- sw s3, 16(sp) /* icache line size */
- sw s4, 20(sp) /* icache size */
- sw s1, 24(sp) /* dcache line size */
- sw s2, 28(sp) /* dcache size */
-
- /* jump to the decompressor routine */
- la t0, decompress_entry
- jr t0
- nop
-
- .set reorder
-END(startup)
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .text : {
- _code_start = .;
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- . = ALIGN(16);
- *(.data.lzma)
- }
-
- .data : {
- *(.data)
- *(.data.*)
- }
- _code_end = .;
-
- .bss : {
- *(.bss)
- *(.bss.*)
- }
-
- . = ALIGN(16);
- . = . + 8192;
- _stack = .;
-
- workspace = .;
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .data.lzma : {
- _lzma_data_start = .;
- *(.data)
- _lzma_data_end = .;
- }
-}
+++ /dev/null
-Index: linux-2.6.22-rc6/arch/mips/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/arch/mips/Kconfig
-+++ linux-2.6.22-rc6/arch/mips/Kconfig
-@@ -15,6 +15,17 @@ choice
- prompt "System type"
- default SGI_IP22
-
-+config MIPS_ADM5120
-+ bool "Support for ADM5120 SoC"
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select GENERIC_GPIO
-+
- config MACH_ALCHEMY
- bool "Alchemy processor based machines"
-
-@@ -658,6 +669,7 @@ config TOSHIBA_RBTX4938
-
- endchoice
-
-+source "arch/mips/adm5120/Kconfig"
- source "arch/mips/au1000/Kconfig"
- source "arch/mips/ddb5xxx/Kconfig"
- source "arch/mips/gt64120/ev64120/Kconfig"
-Index: linux-2.6.22-rc6/arch/mips/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/arch/mips/Makefile
-+++ linux-2.6.22-rc6/arch/mips/Makefile
-@@ -165,6 +165,14 @@ cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/
- load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
-
- #
-+# ADMtek 5120
-+#
-+
-+core-$(CONFIG_MIPS_ADM5120) += arch/mips/adm5120/
-+cflags-$(CONFIG_MIPS_ADM5120) += -Iinclude/asm-mips/mach-adm5120
-+load-$(CONFIG_MIPS_ADM5120) += 0xffffffff80001000
-+
-+#
- # Common Alchemy Au1x00 stuff
- #
- core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
-Index: linux-2.6.22-rc6/include/asm-mips/bootinfo.h
-===================================================================
---- linux-2.6.22-rc6.orig/include/asm-mips/bootinfo.h
-+++ linux-2.6.22-rc6/include/asm-mips/bootinfo.h
-@@ -213,6 +213,57 @@
- #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
- #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
-
-+/*
-+ * Valid machtype for group ADMtek ADM5120
-+ */
-+#define MACH_GROUP_ADM5120 26
-+#define MACH_ADM5120_UNKNOWN 0 /* Unknown board */
-+#define MACH_ADM5120_WP54G_WRT 1 /* Compex WP54G-WRT */
-+#define MACH_ADM5120_WP54G 2 /* Compex WP54G */
-+#define MACH_ADM5120_WP54AG 3 /* Compex WP54AG */
-+#define MACH_ADM5120_WPP54G 4 /* Compex WPP54G */
-+#define MACH_ADM5120_WPP54AG 5 /* Compex WPP54AG */
-+#define MACH_ADM5120_NP28G 6 /* Compex NP28G */
-+#define MACH_ADM5120_NP28GHS 7 /* Compex NP28G HotSpot */
-+#define MACH_ADM5120_NP27G 8 /* Compex NP27G */
-+#define MACH_ADM5120_WP54Gv1C 9 /* Compex WP54G version 1C */
-+#define MACH_ADM5120_RB_111 10 /* Mikrotik RouterBOARD 111 */
-+#define MACH_ADM5120_RB_112 11 /* Mikrotik RouterBOARD 112 */
-+#define MACH_ADM5120_RB_133 12 /* Mikrotik RouterBOARD 133 */
-+#define MACH_ADM5120_RB_133C 13 /* Mikrotik RouterBOARD 133c */
-+#define MACH_ADM5120_RB_150 14 /* Mikrotik RouterBOARD 150 */
-+#define MACH_ADM5120_RB_153 15 /* Mikrotik RouterBOARD 153 */
-+#define MACH_ADM5120_HS100 16 /* ZyXEL HomeSafe 100/100W */
-+#define MACH_ADM5120_P334 17 /* ZyXEL Prestige 334 */
-+#define MACH_ADM5120_P334U 18 /* ZyXEL Prestige 334U */
-+#define MACH_ADM5120_P334W 19 /* ZyXEL Prestige 334W */
-+#define MACH_ADM5120_P334WH 20 /* ZyXEL Prestige 334WH */
-+#define MACH_ADM5120_P334WHD 21 /* ZyXEL Prestige 334WHD */
-+#define MACH_ADM5120_P334WT 22 /* ZyXEL Prestige 334WT */
-+#define MACH_ADM5120_P335 23 /* ZyXEL Prestige 335/335WT */
-+#define MACH_ADM5120_P335PLUS 24 /* ZyXEL Prestige 335Plus */
-+#define MACH_ADM5120_P335U 25 /* ZyXEL Prestige 335U */
-+#define MACH_ADM5120_ES2108 26 /* ZyXEL Ethernet Switch 2108 */
-+#define MACH_ADM5120_ES2108F 27 /* ZyXEL Ethernet Switch 2108-F */
-+#define MACH_ADM5120_ES2108G 28 /* ZyXEL Ethernet Switch 2108-G */
-+#define MACH_ADM5120_ES2108LC 29 /* ZyXEL Ethernet Switch 2108-LC */
-+#define MACH_ADM5120_ES2108PWR 30 /* ZyXEL Ethernet Switch 2108-PWR */
-+#define MACH_ADM5120_ES2024A 31 /* ZyXEL Ethernet Switch 2024A */
-+#define MACH_ADM5120_ES2024PWR 32 /* ZyXEL Ethernet Switch 2024PWR */
-+#define MACH_ADM5120_CAS630 33 /* Cellvision CAS-630/630W */
-+#define MACH_ADM5120_CAS670 34 /* Cellvision CAS-670/670W */
-+#define MACH_ADM5120_CAS700 36 /* Cellvision CAS-700/700W */
-+#define MACH_ADM5120_CAS771 37 /* Cellvision CAS-771/771W */
-+#define MACH_ADM5120_CAS790 38 /* Cellvision CAS-790 */
-+#define MACH_ADM5120_CAS861 39 /* Cellvision CAS-861/861W */
-+#define MACH_ADM5120_NFS101U 40 /* Cellvision NFS-101U/101WU */
-+#define MACH_ADM5120_NFS202U 41 /* Cellvision NFS-202U/202WU */
-+#define MACH_ADM5120_EASY5120 43 /* Infineon EASY 5120 */
-+#define MACH_ADM5120_EASY5120RT 44 /* Infineon EASY 5120-RT */
-+#define MACH_ADM5120_EASY5120PATA 45 /* Infineon EASY 5120P-ATA */
-+#define MACH_ADM5120_EASY83000 46 /* Infineon EASY-83000 */
-+#define MACH_ADM5120_BR6104K 47 /* Edimax BR-6104K */
-+
- #define CL_SIZE COMMAND_LINE_SIZE
-
- const char *get_system_type(void);
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/mtd/maps/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/maps/Kconfig
-+++ linux-2.6.22-rc6/drivers/mtd/maps/Kconfig
-@@ -620,5 +620,10 @@ config MTD_PLATRAM
-
- This selection automatically selects the map_ram driver.
-
-+config MTD_ADM5120
-+ tristate "Map driver for ADMtek ADM5120 boards"
-+ depends on MIPS_ADM5120
-+ select MTD_CFI_AMDSTD
-+
- endmenu
-
-Index: linux-2.6.22-rc6/drivers/mtd/maps/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/maps/Makefile
-+++ linux-2.6.22-rc6/drivers/mtd/maps/Makefile
-@@ -47,6 +47,7 @@ obj-$(CONFIG_MTD_OCELOT) += ocelot.o
- obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
- obj-$(CONFIG_MTD_PCI) += pci.o
- obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
-+obj-$(CONFIG_MTD_ADM5120) += adm5120_mtd.o
- obj-$(CONFIG_MTD_LASAT) += lasat.o
- obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
- obj-$(CONFIG_MTD_EDB7312) += edb7312.o
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/net/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/net/Kconfig
-+++ linux-2.6.22-rc6/drivers/net/Kconfig
-@@ -574,6 +574,10 @@ config MIPS_AU1X00_ENET
- If you have an Alchemy Semi AU1X00 based system
- say Y. Otherwise, say N.
-
-+config MIPS_ADM5120_ENET
-+ tristate "MIPS ADM5120 Ethernet switch support"
-+ depends on NET_ETHERNET && MIPS_ADM5120
-+
- config NET_SB1250_MAC
- tristate "SB1250 Ethernet support"
- depends on NET_ETHERNET && SIBYTE_SB1xxx_SOC
-Index: linux-2.6.22-rc6/drivers/net/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/net/Makefile
-+++ linux-2.6.22-rc6/drivers/net/Makefile
-@@ -165,6 +165,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
- # This is also a 82596 and should probably be merged
- obj-$(CONFIG_LP486E) += lp486e.o
-
-+obj-$(CONFIG_MIPS_ADM5120_ENET) += adm5120sw.o
- obj-$(CONFIG_ETH16I) += eth16i.o
- obj-$(CONFIG_ZORRO8390) += zorro8390.o
- obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/serial/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/serial/Makefile
-+++ linux-2.6.22-rc6/drivers/serial/Makefile
-@@ -21,6 +21,7 @@ obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554)
- obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
- obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o
- obj-$(CONFIG_SERIAL_8250_AU1X00) += 8250_au1x00.o
-+obj-$(CONFIG_SERIAL_ADM5120) += adm5120_uart.o
- obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o
- obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o
- obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
-Index: linux-2.6.22-rc6/include/linux/serial_core.h
-===================================================================
---- linux-2.6.22-rc6.orig/include/linux/serial_core.h
-+++ linux-2.6.22-rc6/include/linux/serial_core.h
-@@ -143,6 +143,9 @@
- #define PORT_KS8695 76
-
-
-+/* ADMtek ADM5120 SoC */
-+#define PORT_ADM5120 77
-+
- #ifdef __KERNEL__
-
- #include <linux/compiler.h>
-Index: linux-2.6.22-rc6/drivers/serial/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/serial/Kconfig
-+++ linux-2.6.22-rc6/drivers/serial/Kconfig
-@@ -270,6 +270,22 @@ config SERIAL_8250_RM9K
-
- comment "Non-8250 serial port support"
-
-+config SERIAL_ADM5120
-+ bool "ADM5120 serial port support"
-+ depends on MIPS_ADM5120
-+ select SERIAL_CORE
-+ select SERIAL_CORE_CONSOLE
-+ help
-+ Driver for the on chip UARTs on the ADM5120 SoC
-+
-+config ADM5120_NR_UARTS
-+ int "Maximum number of ADM5120 serial ports"
-+ depends on SERIAL_ADM5120
-+ default "2"
-+ ---help---
-+ Set this to the number of serial ports you want the driver to
-+ support.
-+
- config SERIAL_AMBA_PL010
- tristate "ARM AMBA PL010 serial port support"
- depends on ARM_AMBA && (BROKEN || !ARCH_VERSATILE)
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/usb/core/hub.c
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/usb/core/hub.c
-+++ linux-2.6.22-rc6/drivers/usb/core/hub.c
-@@ -464,7 +464,7 @@ void usb_hub_tt_clear_buffer (struct usb
- : (USB_ENDPOINT_XFER_BULK << 11);
- if (usb_pipein (pipe))
- clear->devinfo |= 1 << 15;
--
-+
- /* tell keventd to clear state for this TT */
- spin_lock_irqsave (&tt->lock, flags);
- list_add_tail (&clear->clear_list, &tt->clear_list);
-@@ -540,7 +540,7 @@ static int hub_hub_status(struct usb_hub
- "%s failed (err = %d)\n", __FUNCTION__, ret);
- else {
- *status = le16_to_cpu(hub->status->hub.wHubStatus);
-- *change = le16_to_cpu(hub->status->hub.wHubChange);
-+ *change = le16_to_cpu(hub->status->hub.wHubChange);
- ret = 0;
- }
- mutex_unlock(&hub->status_mutex);
-@@ -1424,7 +1424,7 @@ static int hub_port_status(struct usb_hu
- ret = -EIO;
- } else {
- *status = le16_to_cpu(hub->status->port.wPortStatus);
-- *change = le16_to_cpu(hub->status->port.wPortChange);
-+ *change = le16_to_cpu(hub->status->port.wPortChange);
- ret = 0;
- }
- mutex_unlock(&hub->status_mutex);
-@@ -2007,7 +2007,7 @@ static inline int remote_wakeup(struct u
- * Between connect detection and reset signaling there must be a delay
- * of 100ms at least for debounce and power-settling. The corresponding
- * timer shall restart whenever the downstream port detects a disconnect.
-- *
-+ *
- * Apparently there are some bluetooth and irda-dongles and a number of
- * low-speed devices for which this debounce period may last over a second.
- * Not covered by the spec - but easy to deal with.
-@@ -2142,7 +2142,7 @@ hub_port_init (struct usb_hub *hub, stru
- goto fail;
- }
- oldspeed = udev->speed;
--
-+
- /* USB 2.0 section 5.5.3 talks about ep0 maxpacket ...
- * it's fixed size except for full speed devices.
- * For Wireless USB devices, ep0 max packet is always 512 (tho
-@@ -2168,7 +2168,7 @@ hub_port_init (struct usb_hub *hub, stru
- default:
- goto fail;
- }
--
-+
- type = "";
- switch (udev->speed) {
- case USB_SPEED_LOW: speed = "low"; break;
-@@ -2194,7 +2194,7 @@ hub_port_init (struct usb_hub *hub, stru
- udev->tt = &hub->tt;
- udev->ttport = port1;
- }
--
-+
- /* Why interleave GET_DESCRIPTOR and SET_ADDRESS this way?
- * Because device hardware and firmware is sometimes buggy in
- * this area, and this is how Linux has done it for ages.
-@@ -2230,6 +2230,8 @@ hub_port_init (struct usb_hub *hub, stru
- USB_DT_DEVICE << 8, 0,
- buf, GET_DESCRIPTOR_BUFSIZE,
- USB_CTRL_GET_TIMEOUT);
-+printk(KERN_CRIT "usb_control_msg: %d %d %d (%d)\n", r, buf->bMaxPacketSize0,
-+buf->bDescriptorType, USB_DT_DEVICE);
- switch (buf->bMaxPacketSize0) {
- case 8: case 16: case 32: case 64: case 255:
- if (buf->bDescriptorType ==
-@@ -2281,7 +2283,7 @@ hub_port_init (struct usb_hub *hub, stru
- udev->devnum, retval);
- goto fail;
- }
--
-+
- /* cope with hardware quirkiness:
- * - let SET_ADDRESS settle, some device hardware wants it
- * - read ep0 maxpacket even for high and low speed,
-@@ -2318,7 +2320,7 @@ hub_port_init (struct usb_hub *hub, stru
- udev->ep0.desc.wMaxPacketSize = cpu_to_le16(i);
- ep0_reinit(udev);
- }
--
-+
- retval = usb_get_device_descriptor(udev, USB_DT_DEVICE_SIZE);
- if (retval < (signed)sizeof(udev->descriptor)) {
- dev_err(&udev->dev, "device descriptor read/%s, error %d\n",
-@@ -2416,7 +2418,7 @@ static void hub_port_connect_change(stru
- struct device *hub_dev = hub->intfdev;
- u16 wHubCharacteristics = le16_to_cpu(hub->descriptor->wHubCharacteristics);
- int status, i;
--
-+
- dev_dbg (hub_dev,
- "port %d, status %04x, change %04x, %s\n",
- port1, portstatus, portchange, portspeed (portstatus));
-@@ -2425,7 +2427,7 @@ static void hub_port_connect_change(stru
- set_port_led(hub, port1, HUB_LED_AUTO);
- hub->indicator[port1-1] = INDICATOR_AUTO;
- }
--
-+
- /* Disconnect any existing devices under this port */
- if (hdev->children[port1-1])
- usb_disconnect(&hdev->children[port1-1]);
-@@ -2455,7 +2457,7 @@ static void hub_port_connect_change(stru
- if ((wHubCharacteristics & HUB_CHAR_LPSM) < 2
- && !(portstatus & (1 << USB_PORT_FEAT_POWER)))
- set_port_feature(hdev, port1, USB_PORT_FEAT_POWER);
--
-+
- if (portstatus & USB_PORT_STAT_ENABLE)
- goto done;
- return;
-@@ -2535,7 +2537,7 @@ static void hub_port_connect_change(stru
- goto loop_disable;
- }
- }
--
-+
- /* check for devices running slower than they could */
- if (le16_to_cpu(udev->descriptor.bcdUSB) >= 0x0200
- && udev->speed == USB_SPEED_FULL
-@@ -2587,7 +2589,7 @@ loop:
- if (status == -ENOTCONN)
- break;
- }
--
-+
- done:
- hub_port_disable(hub, port1, 1);
- }
-@@ -2720,7 +2722,7 @@ static void hub_events(void)
- * EM interference sometimes causes badly
- * shielded USB devices to be shutdown by
- * the hub, this hack enables them again.
-- * Works at least with mouse driver.
-+ * Works at least with mouse driver.
- */
- if (!(portstatus & USB_PORT_STAT_ENABLE)
- && !connect_change
-@@ -2750,7 +2752,7 @@ static void hub_events(void)
- "resume on port %d, status %d\n",
- i, ret);
- }
--
-+
- if (portchange & USB_PORT_STAT_C_OVERCURRENT) {
- dev_err (hub_dev,
- "over-current change on port %d\n",
-@@ -2985,7 +2987,7 @@ int usb_reset_device(struct usb_device *
-
- if (ret < 0)
- goto re_enumerate;
--
-+
- /* Device might have changed firmware (DFU or similar) */
- if (memcmp(&udev->descriptor, &descriptor, sizeof descriptor)
- || config_descriptors_changed (udev)) {
-@@ -2993,7 +2995,7 @@ int usb_reset_device(struct usb_device *
- udev->descriptor = descriptor; /* for disconnect() calls */
- goto re_enumerate;
- }
--
-+
- if (!udev->actconfig)
- goto done;
-
-@@ -3031,7 +3033,7 @@ int usb_reset_device(struct usb_device *
-
- done:
- return 0;
--
-+
- re_enumerate:
- hub_port_logical_disconnect(parent_hub, port1);
- return -ENODEV;
-Index: linux-2.6.22-rc6/drivers/usb/host/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/usb/host/Kconfig
-+++ linux-2.6.22-rc6/drivers/usb/host/Kconfig
-@@ -224,3 +224,6 @@ config USB_SL811_CS
- To compile this driver as a module, choose M here: the
- module will be called "sl811_cs".
-
-+config USB_ADM5120_HCD
-+ tristate "ADM5120 HCD support"
-+ depends on USB && MIPS_ADM5120
-Index: linux-2.6.22-rc6/drivers/usb/host/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/usb/host/Makefile
-+++ linux-2.6.22-rc6/drivers/usb/host/Makefile
-@@ -8,6 +8,7 @@ endif
-
- obj-$(CONFIG_PCI) += pci-quirks.o
-
-+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
- obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
- obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
- obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o
-Index: linux-2.6.22-rc6/drivers/usb/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/usb/Kconfig
-+++ linux-2.6.22-rc6/drivers/usb/Kconfig
-@@ -88,8 +88,6 @@ source "drivers/usb/storage/Kconfig"
-
- source "drivers/usb/image/Kconfig"
-
--source "drivers/usb/mon/Kconfig"
--
- comment "USB port drivers"
- depends on USB
-
-Index: linux-2.6.22-rc6/drivers/usb/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/usb/Makefile
-+++ linux-2.6.22-rc6/drivers/usb/Makefile
-@@ -16,6 +16,7 @@ obj-$(CONFIG_USB_UHCI_HCD) += host/
- obj-$(CONFIG_USB_SL811_HCD) += host/
- obj-$(CONFIG_USB_U132_HCD) += host/
- obj-$(CONFIG_USB_OHCI_AT91) += host/
-+obj-$(CONFIG_USB_ADM5120_HCD) += host/
-
- obj-$(CONFIG_USB_ACM) += class/
- obj-$(CONFIG_USB_PRINTER) += class/
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/leds/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/leds/Kconfig
-+++ linux-2.6.22-rc6/drivers/leds/Kconfig
-@@ -20,6 +20,27 @@ config LEDS_CLASS
-
- comment "LED drivers"
-
-+config LEDS_GPIO
-+ tristate "LED support for LEDS on GPIO lines"
-+ depends on LEDS_CLASS && GENERIC_GPIO
-+ help
-+ This option enables support for LEDs connected to GPIO lines
-+
-+config LEDS_ADM5120
-+ tristate "LED Support for ADM5120 GPIO LEDs"
-+ depends on LEDS_GPIO && MIPS_ADM5120
-+ help
-+ This option enables support for LEDs connected to GPIO lines
-+ on ADM5120 SoC based platforms.
-+
-+config LEDS_ADM5120_EXPERIMENTAL
-+ bool "Enable ADM5120 LEDs experimental code"
-+ depends on LEDS_ADM5120
-+
-+config LEDS_ADM5120_DIAG
-+ bool "Enable ADM5120 LEDs diagnostic mode"
-+ depends on LEDS_ADM5120
-+
- config LEDS_CORGI
- tristate "LED Support for the Sharp SL-C7x0 series"
- depends on LEDS_CLASS && PXA_SHARP_C7xx
-Index: linux-2.6.22-rc6/drivers/leds/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/leds/Makefile
-+++ linux-2.6.22-rc6/drivers/leds/Makefile
-@@ -5,6 +5,8 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o
- obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
-
- # LED Platform Drivers
-+obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
-+obj-$(CONFIG_LEDS_ADM5120) += leds-adm5120.o
- obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
- obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
- obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
+++ /dev/null
-Index: linux-2.6.22-rc6/arch/mips/pci/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/arch/mips/pci/Makefile
-+++ linux-2.6.22-rc6/arch/mips/pci/Makefile
-@@ -50,3 +50,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
- obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
- obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
- obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
-+obj-$(CONFIG_PCI_ADM5120) += fixup-adm5120.o ops-adm5120.o pci-adm5120.o
-Index: linux-2.6.22-rc6/include/linux/pci_ids.h
-===================================================================
---- linux-2.6.22-rc6.orig/include/linux/pci_ids.h
-+++ linux-2.6.22-rc6/include/linux/pci_ids.h
-@@ -1712,6 +1712,9 @@
- #define PCI_VENDOR_ID_ESDGMBH 0x12fe
- #define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
-
-+#define PCI_VENDOR_ID_ADMTEK 0x1317
-+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
-+
- #define PCI_VENDOR_ID_SIIG 0x131f
- #define PCI_SUBVENDOR_ID_SIIG 0x131f
- #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
+++ /dev/null
-Index: linux-2.6.22-rc6/include/asm-mips/byteorder.h
-===================================================================
---- linux-2.6.22-rc6.orig/include/asm-mips/byteorder.h
-+++ linux-2.6.22-rc6/include/asm-mips/byteorder.h
-@@ -58,6 +58,35 @@ static __inline__ __attribute_const__ __
-
- #endif /* CONFIG_CPU_MIPSR2 */
-
-+#ifdef CONFIG_ADM5120_HARDWARE_SWAB
-+
-+static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x)
-+{
-+ __asm__ (
-+ " sh %2, 0xCA(%1) \n"
-+ " lhu %0, 0xCC(%1) \n"
-+ : "=r" (x)
-+ : "r" (0xB2000000), "r" (x));
-+
-+ return x;
-+}
-+
-+static __inline__ __attribute_const__ __u32 ___adm5120__swab32(__u32 x)
-+{
-+ __asm__ (
-+ " sw %2, 0xC8(%1) \n"
-+ " lw %0, 0xCC(%1) \n"
-+ : "=r" (x)
-+ : "r" (0xB2000000), "r" (x));
-+
-+ return x;
-+}
-+
-+#define __arch__swab16(x) ___adm5120__swab16(x)
-+#define __arch__swab32(x) ___adm5120__swab32(x)
-+
-+#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
-+
- #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
- # define __BYTEORDER_HAS_U64__
- # define __SWAB_64_THRU_32__
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/mtd/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/Kconfig
-+++ linux-2.6.22-rc6/drivers/mtd/Kconfig
-@@ -155,6 +155,22 @@ config MTD_AFS_PARTS
- for your particular device. It won't happen automatically. The
- 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
-
-+config MTD_MYLOADER_PARTS
-+ tristate "MyLoader partition parsing"
-+ depends on MIPS_ADM5120 && MTD_PARTITIONS
-+ ---help---
-+ MyLoader is a bootloader which allows the user to define partitions
-+ in flash devices, by putting a table in the second erase block
-+ on the device, similar to a partition table. This table gives the
-+ offsets and lengths of the user defined partitions.
-+
-+ If you need code which can detect and parse these tables, and
-+ register MTD 'partitions' corresponding to each image detected,
-+ enable this option.
-+
-+ You will still need the parsing functions to be called by the driver
-+ for your particular device. It won't happen automatically.
-+
- comment "User Modules And Translation Layers"
-
- config MTD_CHAR
-Index: linux-2.6.22-rc6/drivers/mtd/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/Makefile
-+++ linux-2.6.22-rc6/drivers/mtd/Makefile
-@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
- obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
- obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
- obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
-+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
-
- # 'Users' - code which presents functionality to userspace.
- obj-$(CONFIG_MTD_CHAR) += mtdchar.o
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/mtd/chips/cfi_cmdset_0002.c
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/chips/cfi_cmdset_0002.c
-+++ linux-2.6.22-rc6/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -47,12 +47,17 @@
- #define MANUFACTURER_AMD 0x0001
- #define MANUFACTURER_ATMEL 0x001F
- #define MANUFACTURER_SST 0x00BF
-+#define MANUFACTURER_MACRONIX 0x00C2
- #define SST49LF004B 0x0060
- #define SST49LF040B 0x0050
- #define SST49LF008A 0x005a
- #define AT49BV6416 0x00d6
- #define MANUFACTURER_SAMSUNG 0x00ec
-
-+/* Macronix */
-+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
-+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
-+
- static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
- static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -217,6 +222,35 @@ static void fixup_use_atmel_lock(struct
- mtd->flags |= MTD_STUPID_LOCK;
- }
-
-+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+/*
-+ * Some Macronix chips has bad bootblock information in the CFI table
-+ */
-+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
-+{
-+ struct map_info *map = mtd->priv;
-+ struct cfi_private *cfi = map->fldrv_priv;
-+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
-+ __u8 major = extp->MajorVersion;
-+ __u8 minor = extp->MinorVersion;
-+
-+ switch (cfi->id) {
-+ /* TODO: put affected chip ids here */
-+ case MX29LV160B:
-+ case MX29LV320B:
-+ if (((major << 8) | minor) != 0x3131)
-+ break;
-+
-+ if (extp->TopBottom == 2)
-+ break;
-+
-+ extp->TopBottom = 2; /* Bottom boot */
-+ printk("%s: weird Macronix chip detected, id:0x%04X, boot location "
-+ "forced to bottom\n", map->name, cfi->id);
-+ }
-+}
-+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
-+
- static struct cfi_fixup cfi_fixup_table[] = {
- #ifdef AMD_BOOTLOC_BUG
- { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
-@@ -231,6 +265,9 @@ static struct cfi_fixup cfi_fixup_table[
- { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
- #endif
- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
-+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
-+#endif
- { 0, 0, NULL, NULL }
- };
- static struct cfi_fixup jedec_fixup_table[] = {
-Index: linux-2.6.22-rc6/drivers/mtd/chips/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/chips/Kconfig
-+++ linux-2.6.22-rc6/drivers/mtd/chips/Kconfig
-@@ -196,6 +196,14 @@ config MTD_CFI_AMDSTD
- provides support for one of those command sets, used on chips
- including the AMD Am29LV320.
-
-+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+ bool "Force bottom boot for Macronix flash chips"
-+ depends on MTD_CFI_AMDSTD
-+ help
-+ Some Macronix flash chips have wrong boot-block location in the
-+ CFI table, and the driver may detect the type incorrectly. Select
-+ this if your board has such chip.
-+
- config MTD_CFI_STAA
- tristate "Support for ST (Advanced Architecture) flash chips"
- depends on MTD_GEN_PROBE
+++ /dev/null
-Index: linux-2.6.22-rc6/arch/mips/kernel/head.S
-===================================================================
---- linux-2.6.22-rc6.orig/arch/mips/kernel/head.S
-+++ linux-2.6.22-rc6/arch/mips/kernel/head.S
-@@ -129,14 +129,19 @@
- #endif
- .endm
-
--
- j kernel_entry
- nop
--
-+ nop
-+
- /*
- * Reserved space for exception handlers.
- * Necessary for machines which link their kernels at KSEG0.
-+ * Use as temporary storage for the kernel command line, so that it
-+ * can be updated easily without having to relink the kernel.
- */
-+
-+EXPORT(_image_cmdline)
-+ .ascii "CMDLINE:"
- .align 10
-
- EXPORT(stext) # used for profiling
+++ /dev/null
-Index: linux-2.6.22-rc6/drivers/mtd/nand/Kconfig
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/nand/Kconfig
-+++ linux-2.6.22-rc6/drivers/mtd/nand/Kconfig
-@@ -81,6 +81,12 @@ config MTD_NAND_TS7250
- help
- Support for NAND flash on Technologic Systems TS-7250 platform.
-
-+config MTD_NAND_RB100
-+ tristate "NAND Flash device on RB100 board"
-+ depends on MTD_NAND
-+ help
-+ Support for NAND flash on RB100 platform.
-+
- config MTD_NAND_IDS
- tristate
-
-Index: linux-2.6.22-rc6/drivers/mtd/nand/Makefile
-===================================================================
---- linux-2.6.22-rc6.orig/drivers/mtd/nand/Makefile
-+++ linux-2.6.22-rc6/drivers/mtd/nand/Makefile
-@@ -10,6 +10,7 @@ obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nan
- obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
- obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
- obj-$(CONFIG_MTD_NAND_TOTO) += toto.o
-+obj-$(CONFIG_MTD_NAND_RB100) += rbmipsnand.o
- obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
- obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
- obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
+++ /dev/null
-Index: linux-2.6.21.1/arch/mips/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/arch/mips/Kconfig
-+++ linux-2.6.21.1/arch/mips/Kconfig
-@@ -16,6 +16,17 @@ choice
- prompt "System type"
- default SGI_IP22
-
-+config MIPS_ADM5120
-+ bool "Support for ADM5120 SoC"
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select GENERIC_GPIO
-+
- config MIPS_MTX1
- bool "4G Systems MTX-1 board"
- select DMA_NONCOHERENT
-@@ -766,6 +775,7 @@
-
- endchoice
-
-+source "arch/mips/adm5120/Kconfig"
- source "arch/mips/ddb5xxx/Kconfig"
- source "arch/mips/gt64120/ev64120/Kconfig"
- source "arch/mips/jazz/Kconfig"
-Index: linux-2.6.21.1/arch/mips/Makefile
-===================================================================
---- linux-2.6.21.1.orig/arch/mips/Makefile
-+++ linux-2.6.21.1/arch/mips/Makefile
-@@ -165,6 +165,14 @@ cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/
- load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
-
- #
-+# ADMtek 5120
-+#
-+
-+core-$(CONFIG_MIPS_ADM5120) += arch/mips/adm5120/
-+cflags-$(CONFIG_MIPS_ADM5120) += -Iinclude/asm-mips/mach-adm5120
-+load-$(CONFIG_MIPS_ADM5120) += 0xffffffff80001000
-+
-+#
- # Common Alchemy Au1x00 stuff
- #
- core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
-Index: linux-2.6.21.1/include/asm-mips/bootinfo.h
-===================================================================
---- linux-2.6.21.1.orig/include/asm-mips/bootinfo.h
-+++ linux-2.6.21.1/include/asm-mips/bootinfo.h
-@@ -213,6 +213,57 @@
- #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
- #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
-
-+/*
-+ * Valid machtype for group ADMtek ADM5120
-+ */
-+#define MACH_GROUP_ADM5120 23
-+#define MACH_ADM5120_UNKNOWN 0 /* Unknown board */
-+#define MACH_ADM5120_WP54G_WRT 1 /* Compex WP54G-WRT */
-+#define MACH_ADM5120_WP54G 2 /* Compex WP54G */
-+#define MACH_ADM5120_WP54AG 3 /* Compex WP54AG */
-+#define MACH_ADM5120_WPP54G 4 /* Compex WPP54G */
-+#define MACH_ADM5120_WPP54AG 5 /* Compex WPP54AG */
-+#define MACH_ADM5120_NP28G 6 /* Compex NP28G */
-+#define MACH_ADM5120_NP28GHS 7 /* Compex NP28G HotSpot */
-+#define MACH_ADM5120_NP27G 8 /* Compex NP27G */
-+#define MACH_ADM5120_WP54Gv1C 9 /* Compex WP54G version 1C */
-+#define MACH_ADM5120_RB_111 10 /* Mikrotik RouterBOARD 111 */
-+#define MACH_ADM5120_RB_112 11 /* Mikrotik RouterBOARD 112 */
-+#define MACH_ADM5120_RB_133 12 /* Mikrotik RouterBOARD 133 */
-+#define MACH_ADM5120_RB_133C 13 /* Mikrotik RouterBOARD 133c */
-+#define MACH_ADM5120_RB_150 14 /* Mikrotik RouterBOARD 150 */
-+#define MACH_ADM5120_RB_153 15 /* Mikrotik RouterBOARD 153 */
-+#define MACH_ADM5120_HS100 16 /* ZyXEL HomeSafe 100/100W */
-+#define MACH_ADM5120_P334 17 /* ZyXEL Prestige 334 */
-+#define MACH_ADM5120_P334U 18 /* ZyXEL Prestige 334U */
-+#define MACH_ADM5120_P334W 19 /* ZyXEL Prestige 334W */
-+#define MACH_ADM5120_P334WH 20 /* ZyXEL Prestige 334WH */
-+#define MACH_ADM5120_P334WHD 21 /* ZyXEL Prestige 334WHD */
-+#define MACH_ADM5120_P334WT 22 /* ZyXEL Prestige 334WT */
-+#define MACH_ADM5120_P335 23 /* ZyXEL Prestige 335/335WT */
-+#define MACH_ADM5120_P335PLUS 24 /* ZyXEL Prestige 335Plus */
-+#define MACH_ADM5120_P335U 25 /* ZyXEL Prestige 335U */
-+#define MACH_ADM5120_ES2108 26 /* ZyXEL Ethernet Switch 2108 */
-+#define MACH_ADM5120_ES2108F 27 /* ZyXEL Ethernet Switch 2108-F */
-+#define MACH_ADM5120_ES2108G 28 /* ZyXEL Ethernet Switch 2108-G */
-+#define MACH_ADM5120_ES2108LC 29 /* ZyXEL Ethernet Switch 2108-LC */
-+#define MACH_ADM5120_ES2108PWR 30 /* ZyXEL Ethernet Switch 2108-PWR */
-+#define MACH_ADM5120_ES2024A 31 /* ZyXEL Ethernet Switch 2024A */
-+#define MACH_ADM5120_ES2024PWR 32 /* ZyXEL Ethernet Switch 2024PWR */
-+#define MACH_ADM5120_CAS630 33 /* Cellvision CAS-630/630W */
-+#define MACH_ADM5120_CAS670 34 /* Cellvision CAS-670/670W */
-+#define MACH_ADM5120_CAS700 36 /* Cellvision CAS-700/700W */
-+#define MACH_ADM5120_CAS771 37 /* Cellvision CAS-771/771W */
-+#define MACH_ADM5120_CAS790 38 /* Cellvision CAS-790 */
-+#define MACH_ADM5120_CAS861 39 /* Cellvision CAS-861/861W */
-+#define MACH_ADM5120_NFS101U 40 /* Cellvision NFS-101U/101WU */
-+#define MACH_ADM5120_NFS202U 41 /* Cellvision NFS-202U/202WU */
-+#define MACH_ADM5120_EASY5120 43 /* Infineon EASY 5120 */
-+#define MACH_ADM5120_EASY5120RT 44 /* Infineon EASY 5120-RT */
-+#define MACH_ADM5120_EASY5120PATA 45 /* Infineon EASY 5120P-ATA */
-+#define MACH_ADM5120_EASY83000 46 /* Infineon EASY-83000 */
-+#define MACH_ADM5120_BR6104K 47 /* Edimax BR-6104K */
-+
- #define CL_SIZE COMMAND_LINE_SIZE
-
- const char *get_system_type(void);
+++ /dev/null
-Index: linux-2.6.21.1/drivers/mtd/maps/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/maps/Kconfig
-+++ linux-2.6.21.1/drivers/mtd/maps/Kconfig
-@@ -605,5 +605,10 @@ config MTD_PLATRAM
-
- This selection automatically selects the map_ram driver.
-
-+config MTD_ADM5120
-+ tristate "Map driver for ADMtek ADM5120 boards"
-+ depends on MIPS_ADM5120
-+ select MTD_CFI_AMDSTD
-+
- endmenu
-
-Index: linux-2.6.21.1/drivers/mtd/maps/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/maps/Makefile
-+++ linux-2.6.21.1/drivers/mtd/maps/Makefile
-@@ -45,6 +45,7 @@ obj-$(CONFIG_MTD_OCELOT) += ocelot.o
- obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
- obj-$(CONFIG_MTD_PCI) += pci.o
- obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
-+obj-$(CONFIG_MTD_ADM5120) += adm5120_mtd.o
- obj-$(CONFIG_MTD_LASAT) += lasat.o
- obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
- obj-$(CONFIG_MTD_EDB7312) += edb7312.o
+++ /dev/null
-Index: linux-2.6.21.1/drivers/net/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/net/Kconfig
-+++ linux-2.6.21.1/drivers/net/Kconfig
-@@ -574,6 +574,10 @@ config MIPS_AU1X00_ENET
- If you have an Alchemy Semi AU1X00 based system
- say Y. Otherwise, say N.
-
-+config MIPS_ADM5120_ENET
-+ tristate "MIPS ADM5120 Ethernet switch support"
-+ depends on NET_ETHERNET && MIPS_ADM5120
-+
- config NET_SB1250_MAC
- tristate "SB1250 Ethernet support"
- depends on NET_ETHERNET && SIBYTE_SB1xxx_SOC
-Index: linux-2.6.21.1/drivers/net/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/net/Makefile
-+++ linux-2.6.21.1/drivers/net/Makefile
-@@ -165,6 +165,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
- # This is also a 82596 and should probably be merged
- obj-$(CONFIG_LP486E) += lp486e.o
-
-+obj-$(CONFIG_MIPS_ADM5120_ENET) += adm5120sw.o
- obj-$(CONFIG_ETH16I) += eth16i.o
- obj-$(CONFIG_ZORRO8390) += zorro8390.o
- obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
+++ /dev/null
-Index: linux-2.6.21.1/drivers/serial/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/serial/Makefile
-+++ linux-2.6.21.1/drivers/serial/Makefile
-@@ -21,6 +21,7 @@ obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554)
- obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
- obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o
- obj-$(CONFIG_SERIAL_8250_AU1X00) += 8250_au1x00.o
-+obj-$(CONFIG_SERIAL_ADM5120) += adm5120_uart.o
- obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o
- obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o
- obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
-Index: linux-2.6.21.1/include/linux/serial_core.h
-===================================================================
---- linux-2.6.21.1.orig/include/linux/serial_core.h
-+++ linux-2.6.21.1/include/linux/serial_core.h
-@@ -135,6 +135,9 @@
- /* Xilinx uartlite */
- #define PORT_UARTLITE 74
-
-+/* ADMtek ADM5120 SoC */
-+#define PORT_ADM5120 68
-+
- #ifdef __KERNEL__
-
- #include <linux/compiler.h>
-Index: linux-2.6.21.1/drivers/serial/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/serial/Kconfig
-+++ linux-2.6.21.1/drivers/serial/Kconfig
-@@ -256,6 +256,22 @@ config SERIAL_8250_AU1X00
-
- comment "Non-8250 serial port support"
-
-+config SERIAL_ADM5120
-+ bool "ADM5120 serial port support"
-+ depends on MIPS_ADM5120
-+ select SERIAL_CORE
-+ select SERIAL_CORE_CONSOLE
-+ help
-+ Driver for the on chip UARTs on the ADM5120 SoC
-+
-+config ADM5120_NR_UARTS
-+ int "Maximum number of ADM5120 serial ports"
-+ depends on SERIAL_ADM5120
-+ default "2"
-+ ---help---
-+ Set this to the number of serial ports you want the driver to
-+ support.
-+
- config SERIAL_AMBA_PL010
- tristate "ARM AMBA PL010 serial port support"
- depends on ARM_AMBA && (BROKEN || !ARCH_VERSATILE)
+++ /dev/null
-Index: linux-2.6.21.1/drivers/usb/core/hub.c
-===================================================================
---- linux-2.6.21.1.orig/drivers/usb/core/hub.c
-+++ linux-2.6.21.1/drivers/usb/core/hub.c
-@@ -2227,6 +2227,8 @@ hub_port_init (struct usb_hub *hub, stru
- USB_DT_DEVICE << 8, 0,
- buf, GET_DESCRIPTOR_BUFSIZE,
- (i ? USB_CTRL_GET_TIMEOUT : 1000));
-+printk(KERN_CRIT "usb_control_msg: %d %d %d (%d)\n", r, buf->bMaxPacketSize0,
-+buf->bDescriptorType, USB_DT_DEVICE);
- switch (buf->bMaxPacketSize0) {
- case 8: case 16: case 32: case 64: case 255:
- if (buf->bDescriptorType ==
-Index: linux-2.6.21.1/drivers/usb/host/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/usb/host/Kconfig
-+++ linux-2.6.21.1/drivers/usb/host/Kconfig
-@@ -224,3 +224,6 @@ config USB_SL811_CS
- To compile this driver as a module, choose M here: the
- module will be called "sl811_cs".
-
-+config USB_ADM5120_HCD
-+ tristate "ADM5120 HCD support"
-+ depends on USB && MIPS_ADM5120
-Index: linux-2.6.21.1/drivers/usb/host/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/usb/host/Makefile
-+++ linux-2.6.21.1/drivers/usb/host/Makefile
-@@ -16,3 +16,4 @@ obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd
- obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o
- obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o
- obj-$(CONFIG_ETRAX_ARCH_V10) += hc_crisv10.o
-+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
-Index: linux-2.6.21.1/drivers/usb/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/usb/Kconfig
-+++ linux-2.6.21.1/drivers/usb/Kconfig
-@@ -91,8 +91,6 @@ source "drivers/usb/image/Kconfig"
-
- source "drivers/usb/net/Kconfig"
-
--source "drivers/usb/mon/Kconfig"
--
- comment "USB port drivers"
- depends on USB
-
-Index: linux-2.6.21.1/drivers/usb/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/usb/Makefile
-+++ linux-2.6.21.1/drivers/usb/Makefile
-@@ -17,6 +17,7 @@ obj-$(CONFIG_USB_SL811_HCD) += host/
- obj-$(CONFIG_USB_U132_HCD) += host/
- obj-$(CONFIG_ETRAX_USB_HOST) += host/
- obj-$(CONFIG_USB_OHCI_AT91) += host/
-+obj-$(CONFIG_USB_ADM5120_HCD) += host/
-
- obj-$(CONFIG_USB_ACM) += class/
- obj-$(CONFIG_USB_PRINTER) += class/
+++ /dev/null
-Index: linux-2.6.21.1/drivers/leds/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/leds/Kconfig
-+++ linux-2.6.21.1/drivers/leds/Kconfig
-@@ -19,6 +19,27 @@ config LEDS_CLASS
-
- comment "LED drivers"
-
-+config LEDS_GPIO
-+ tristate "LED support for LEDS on GPIO lines"
-+ depends on LEDS_CLASS && GENERIC_GPIO
-+ help
-+ This option enables support for LEDs connected to GPIO lines
-+
-+config LEDS_ADM5120
-+ tristate "LED Support for ADM5120 GPIO LEDs"
-+ depends on LEDS_GPIO && MIPS_ADM5120
-+ help
-+ This option enables support for LEDs connected to GPIO lines
-+ on ADM5120 SoC based platforms.
-+
-+config LEDS_ADM5120_EXPERIMENTAL
-+ bool "Enable ADM5120 LEDs experimental code"
-+ depends on LEDS_ADM5120
-+
-+config LEDS_ADM5120_DIAG
-+ bool "Enable ADM5120 LEDs diagnostic mode"
-+ depends on LEDS_ADM5120
-+
- config LEDS_CORGI
- tristate "LED Support for the Sharp SL-C7x0 series"
- depends on LEDS_CLASS && PXA_SHARP_C7xx
-Index: linux-2.6.21.1/drivers/leds/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/leds/Makefile
-+++ linux-2.6.21.1/drivers/leds/Makefile
-@@ -5,6 +5,8 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o
- obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
-
- # LED Platform Drivers
-+obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
-+obj-$(CONFIG_LEDS_ADM5120) += leds-adm5120.o
- obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
- obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
- obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
+++ /dev/null
-Index: linux-2.6.21.1/arch/mips/pci/Makefile
-===================================================================
---- linux-2.6.21.1.orig/arch/mips/pci/Makefile
-+++ linux-2.6.21.1/arch/mips/pci/Makefile
-@@ -53,3 +53,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
- obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
- obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
- obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
-+obj-$(CONFIG_PCI_ADM5120) += fixup-adm5120.o ops-adm5120.o pci-adm5120.o
-Index: linux-2.6.21.1/include/linux/pci_ids.h
-===================================================================
---- linux-2.6.21.1.orig/include/linux/pci_ids.h
-+++ linux-2.6.21.1/include/linux/pci_ids.h
-@@ -1701,6 +1701,9 @@
- #define PCI_VENDOR_ID_ESDGMBH 0x12fe
- #define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
-
-+#define PCI_VENDOR_ID_ADMTEK 0x1317
-+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
-+
- #define PCI_VENDOR_ID_SIIG 0x131f
- #define PCI_SUBVENDOR_ID_SIIG 0x131f
- #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
+++ /dev/null
---- linux-2.6.19.2/include/asm-mips/byteorder.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.new/include/asm-mips/byteorder.h 2007-05-16 21:14:47.000000000 +0200
-@@ -58,6 +58,35 @@
-
- #endif /* CONFIG_CPU_MIPSR2 */
-
-+#ifdef CONFIG_ADM5120_HARDWARE_SWAB
-+
-+static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x)
-+{
-+ __asm__ (
-+ " sh %2, 0xCA(%1) \n"
-+ " lhu %0, 0xCC(%1) \n"
-+ : "=r" (x)
-+ : "r" (0xB2000000), "r" (x));
-+
-+ return x;
-+}
-+
-+static __inline__ __attribute_const__ __u32 ___adm5120__swab32(__u32 x)
-+{
-+ __asm__ (
-+ " sw %2, 0xC8(%1) \n"
-+ " lw %0, 0xCC(%1) \n"
-+ : "=r" (x)
-+ : "r" (0xB2000000), "r" (x));
-+
-+ return x;
-+}
-+
-+#define __arch__swab16(x) ___adm5120__swab16(x)
-+#define __arch__swab32(x) ___adm5120__swab32(x)
-+
-+#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
-+
- #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
- # define __BYTEORDER_HAS_U64__
- # define __SWAB_64_THRU_32__
+++ /dev/null
-Index: linux-2.6.21.1/drivers/mtd/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/Kconfig
-+++ linux-2.6.21.1/drivers/mtd/Kconfig
-@@ -157,6 +157,22 @@ config MTD_AFS_PARTS
- for your particular device. It won't happen automatically. The
- 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
-
-+config MTD_MYLOADER_PARTS
-+ tristate "MyLoader partition parsing"
-+ depends on MIPS_ADM5120 && MTD_PARTITIONS
-+ ---help---
-+ MyLoader is a bootloader which allows the user to define partitions
-+ in flash devices, by putting a table in the second erase block
-+ on the device, similar to a partition table. This table gives the
-+ offsets and lengths of the user defined partitions.
-+
-+ If you need code which can detect and parse these tables, and
-+ register MTD 'partitions' corresponding to each image detected,
-+ enable this option.
-+
-+ You will still need the parsing functions to be called by the driver
-+ for your particular device. It won't happen automatically.
-+
- comment "User Modules And Translation Layers"
- depends on MTD
-
-Index: linux-2.6.21.1/drivers/mtd/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/Makefile
-+++ linux-2.6.21.1/drivers/mtd/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
- obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
- obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
- obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
-+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
-
- # 'Users' - code which presents functionality to userspace.
- obj-$(CONFIG_MTD_CHAR) += mtdchar.o
+++ /dev/null
-Index: linux-2.6.21.1/drivers/mtd/chips/cfi_cmdset_0002.c
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/chips/cfi_cmdset_0002.c
-+++ linux-2.6.21.1/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -47,12 +47,17 @@
- #define MANUFACTURER_AMD 0x0001
- #define MANUFACTURER_ATMEL 0x001F
- #define MANUFACTURER_SST 0x00BF
-+#define MANUFACTURER_MACRONIX 0x00C2
- #define SST49LF004B 0x0060
- #define SST49LF040B 0x0050
- #define SST49LF008A 0x005a
- #define AT49BV6416 0x00d6
- #define MANUFACTURER_SAMSUNG 0x00ec
-
-+/* Macronix */
-+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
-+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
-+
- static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
- static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -217,6 +222,35 @@ static void fixup_use_atmel_lock(struct
- mtd->flags |= MTD_STUPID_LOCK;
- }
-
-+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+/*
-+ * Some Macronix chips has bad bootblock information in the CFI table
-+ */
-+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
-+{
-+ struct map_info *map = mtd->priv;
-+ struct cfi_private *cfi = map->fldrv_priv;
-+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
-+ __u8 major = extp->MajorVersion;
-+ __u8 minor = extp->MinorVersion;
-+
-+ switch (cfi->id) {
-+ /* TODO: put affected chip ids here */
-+ case MX29LV160B:
-+ case MX29LV320B:
-+ if (((major << 8) | minor) != 0x3131)
-+ break;
-+
-+ if (extp->TopBottom == 2)
-+ break;
-+
-+ extp->TopBottom = 2; /* Bottom boot */
-+ printk("%s: weird Macronix chip detected, id:0x%04X, boot location "
-+ "forced to bottom\n", map->name, cfi->id);
-+ }
-+}
-+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
-+
- static struct cfi_fixup cfi_fixup_table[] = {
- #ifdef AMD_BOOTLOC_BUG
- { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
-@@ -231,6 +265,9 @@ static struct cfi_fixup cfi_fixup_table[
- { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
- #endif
- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
-+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
-+#endif
- { 0, 0, NULL, NULL }
- };
- static struct cfi_fixup jedec_fixup_table[] = {
-Index: linux-2.6.21.1/drivers/mtd/chips/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/chips/Kconfig
-+++ linux-2.6.21.1/drivers/mtd/chips/Kconfig
-@@ -199,6 +199,14 @@ config MTD_CFI_AMDSTD
- provides support for one of those command sets, used on chips
- including the AMD Am29LV320.
-
-+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
-+ bool "Force bottom boot for Macronix flash chips"
-+ depends on MTD_CFI_AMDSTD
-+ help
-+ Some Macronix flash chips have wrong boot-block location in the
-+ CFI table, and the driver may detect the type incorrectly. Select
-+ this if your board has such chip.
-+
- config MTD_CFI_STAA
- tristate "Support for ST (Advanced Architecture) flash chips"
- depends on MTD_GEN_PROBE
+++ /dev/null
-Index: linux-2.6.21.1/arch/mips/kernel/head.S
-===================================================================
---- linux-2.6.21.1.orig/arch/mips/kernel/head.S
-+++ linux-2.6.21.1/arch/mips/kernel/head.S
-@@ -129,14 +129,19 @@
- #endif
- .endm
-
--
- j kernel_entry
- nop
--
-+ nop
-+
- /*
- * Reserved space for exception handlers.
- * Necessary for machines which link their kernels at KSEG0.
-+ * Use as temporary storage for the kernel command line, so that it
-+ * can be updated easily without having to relink the kernel.
- */
-+
-+EXPORT(_image_cmdline)
-+ .ascii "CMDLINE:"
- .align 10
-
- EXPORT(stext) # used for profiling
+++ /dev/null
-Index: linux-2.6.21.1/drivers/mtd/nand/Kconfig
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/nand/Kconfig
-+++ linux-2.6.21.1/drivers/mtd/nand/Kconfig
-@@ -75,6 +75,12 @@ config MTD_NAND_TS7250
- help
- Support for NAND flash on Technologic Systems TS-7250 platform.
-
-+config MTD_NAND_RB100
-+ tristate "NAND Flash device on RB100 board"
-+ depends on MTD_NAND
-+ help
-+ Support for NAND flash on RB100 platform.
-+
- config MTD_NAND_IDS
- tristate
-
-Index: linux-2.6.21.1/drivers/mtd/nand/Makefile
-===================================================================
---- linux-2.6.21.1.orig/drivers/mtd/nand/Makefile
-+++ linux-2.6.21.1/drivers/mtd/nand/Makefile
-@@ -10,6 +10,7 @@ obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nan
- obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
- obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
- obj-$(CONFIG_MTD_NAND_TOTO) += toto.o
-+obj-$(CONFIG_MTD_NAND_RB100) += rbmipsnand.o
- obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
- obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
- obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Atheros
- NAME:=Atheros WiFi (default)
- PACKAGES:=kmod-madwifi
-endef
-
-define Profile/Atheros/Description
- Package set compatible with hardware using Atheros WiFi cards
-endef
-$(eval $(call Profile,Atheros))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Texas
- NAME:=Texas Instruments WiFi
- PACKAGES:=kmod-acx
-endef
-
-define Profile/Texas/Description
- Package set compatible with hardware using Texas Instruments WiFi cards
-endef
-$(eval $(call Profile,Texas))
-
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Ralink
- NAME:=Ralink WiFi
- PACKAGES:=kmod-rt2500
-endef
-
-define Profile/Ralink/Description
- Package set compatible with hardware using Ralink WiFi cards
-endef
-$(eval $(call Profile,Ralink))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/None
- NAME:=No WiFi
- PACKAGES:=
-endef
-
-define Profile/None/Description
- Package set without WiFi support
-endef
-$(eval $(call Profile,None))
-
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Cellvision
- NAME:=Cellvision CAS-63x/77x cameras
- PACKAGES:=kmod-rt2500 kmod-cpia2 kmod-usb-ohci kmod-usb2 kmod-usb-audio
-endef
-
-define Profile/Cellvision/Description
- Package set compatible with the Cellvision CAS devices, including Wireless variants.
-endef
-$(eval $(call Profile,Cellvision))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/RouterBoard
- NAME:=RouterBoard RB1xx
- PACKAGES:=kmod-madwifi
-endef
-
-define Profile/RouterBoard/Description
- Package set compatible with the RouterBoard RB1xx devices. Contains RouterOS to OpenWrt\\\
- installation scripts.
-endef
-$(eval $(call Profile,RouterBoard))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mips
-BOARD:=adm5120eb
-BOARDNAME:=ADM5120 (Big Endian)
-FEATURES:=squashfs pci usb
-
-LINUX_VERSION:=2.6.22-rc6
-
-define Target/Description
- Build firmware images for Infineon/ADMTek ADM5120 based boards running in big-endian mode
- (e.g : ZyXEL Prestige 335WT ...)
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-DEFAULT_PACKAGES += admswconfig
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_ADM5120_HARDWARE_SWAB is not set
-CONFIG_ADM5120_NR_UARTS=2
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-# CONFIG_ATM_DRIVERS is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BAYCOM_SER_FDX=m
-CONFIG_BAYCOM_SER_HDX=m
-CONFIG_BINFMT_MISC=m
-CONFIG_BITREVERSE=y
-CONFIG_CIFS_DEBUG2=y
-CONFIG_CIFS_EXPERIMENTAL=y
-CONFIG_CIFS_STATS2=y
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_CIFS_XATTR=y
-CONFIG_CMDLINE="console=ttyS0,115200 rootfs=jffs2,squashfs init=/etc/preinit"
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-CONFIG_CPU_MIPSR1=y
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_VR41XX is not set
-CONFIG_CRYPTO_SHA1=y
-# CONFIG_DDB5477 is not set
-CONFIG_DEVPORT=y
-# CONFIG_DM9000 is not set
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_ELF_CORE=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_FS_MBCACHE=m
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_ACL=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HID=m
-CONFIG_HWMON=y
-# CONFIG_HWMON_DEBUG_CHIP is not set
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_INPUT=y
-# CONFIG_INPUT_EVDEV is not set
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IRQ_CPU=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_POSIX_ACL=y
-CONFIG_JFFS2_FS_SECURITY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JOLIET is not set
-CONFIG_LEDS_ADM5120=y
-CONFIG_LEDS_ADM5120_DIAG=y
-# CONFIG_LEDS_ADM5120_EXPERIMENTAL is not set
-CONFIG_LEDS_GPIO=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-CONFIG_MII=m
-# CONFIG_MINIX_FS is not set
-CONFIG_MIPS=y
-CONFIG_MIPS_ADM5120=y
-CONFIG_MIPS_ADM5120_ENET=y
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_ADM5120 is not set
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_MYLOADER_PARTS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-CONFIG_MTD_PHYSMAP_LEN=0x400000
-CONFIG_MTD_PHYSMAP_START=0x1fc00000
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_NETDEV_1000=y
-CONFIG_NET_KEY=y
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCIPCWATCHDOG is not set
-CONFIG_PCI_ADM5120=y
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_PNPACPI is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_SCSI_WAIT_SCAN=m
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_ADM5120=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_RAW is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_PTSWARM is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SND_USB_AUDIO is not set
-CONFIG_SOFT_WATCHDOG=m
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_USB=y
-# CONFIG_USBPCWATCHDOG is not set
-# CONFIG_USB_ACM is not set
-CONFIG_USB_ADM5120_HCD=y
-# CONFIG_USB_ATM is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_DEVICEFS is not set
-# CONFIG_USB_EHCI_HCD is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USBNET_MII is not set
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_VGASTATE is not set
-CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_ZD1211RW is not set
-CONFIG_ZONE_DMA_FLAG=0
+++ /dev/null
-../adm5120-2.6/files
\ No newline at end of file
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-IMGNAME = $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)
-LOADER_MAKE = $(MAKE) -C lzma-loader KDIR=$(KDIR)
-
-define Image/Build/Loader
- $(LOADER_MAKE) LOADER=loader-$(1).$(2) LOADER_DATA="" \
- LZMA_TEXT_START=$(3) LZMA_STARTUP_ORG=$(4) \
- CONFIG_PASS_KARGS=$(5) CONFIG_BOARD=$(6) \
- compile loader.$(2)
-endef
-
-define Build/Clean
- $(LOADER_MAKE) clean
-endef
-
-define Image/Prepare
- cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma
-endef
-
-define trxalign/jffs2-128k
--a 0x20000
-endef
-define trxalign/jffs2-64k
--a 0x10000
-endef
-define trxalign/squashfs
--a 1024
-endef
-
-define Image/Build/TRX
- $(STAGING_DIR)/bin/trx -o $(1) -f $(3) -f $(KDIR)/vmlinux.lzma \
- $(call trxalign/$(2)) -f $(KDIR)/root.$(2)
-endef
-
-define Image/Build/TRXNoloader
- $(STAGING_DIR)/bin/trx -o $(1) -f $(KDIR)/vmlinux.lzma \
- $(call trxalign/$(2)) -f $(KDIR)/root.$(2)
-endef
-
-define Image/Build/ZyXEL
- $(call Image/Build/Loader,loader-$(2),gz,0x80500000,0)
- $(call Image/Build/TRXNoloader,$(IMGNAME)-$(3)-$(2).trx,$(1))
- #TODO: firmware generation tool needed
-endef
-
-define Image/Build
- #FIXME: No firmware images yet
-endef
-
-define Image/Build/LZMAKernel
- $(LOADER_MAKE) TARGET_DIR=$(BIN_DIR) \
- LOADER=openwrt-$(BOARD)-$(KERNEL)-ramfs-lzma-$(1).$(2) \
- LOADER_DATA=$(KDIR)/vmlinux.lzma \
- LZMA_TEXT_START=$(3) LZMA_STARTUP_ORG=$(4) \
- CONFIG_PASS_KARGS=$(5) CONFIG_BOARD=$(6) \
- compile loader.$(2)
-endef
-
-define Image/Build/LZMAKernel/ZyXEL
- $(call Image/Build/LZMAKernel,$(1),$(2),0x80500000,0,y,$(1))
-endef
-
-define Image/Build/Initramfs
- $(call Image/Build/LZMAKernel/ZyXEL,p-334wt,bin)
- $(call Image/Build/LZMAKernel/ZyXEL,p-335,bin)
-endef
-
-$(eval $(call BuildImage))
-
+++ /dev/null
-../../adm5120-2.6/image/lzma-loader
\ No newline at end of file
+++ /dev/null
-../adm5120-2.6/patches
\ No newline at end of file
+++ /dev/null
-../adm5120-2.6/patches-2.6.22
\ No newline at end of file
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Texas
- NAME:=Texas Instruments WiFi (default)
- PACKAGES:=kmod-acx
-endef
-
-define Profile/Texas/Description
- Package set compatible with hardware using Texas Instruments WiFi cards
-endef
-$(eval $(call Profile,Texas))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Atheros
- NAME:=Atheros WiFi
- PACKAGES:=kmod-madwifi
-endef
-
-define Profile/Atheros/Description
- Package set compatible with hardware using Atheros WiFi cards
-endef
-$(eval $(call Profile,Atheros))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/None
- NAME:=No WiFi
- PACKAGES:=
-endef
-
-define Profile/None/Description
- Package set without WiFi support
-endef
-$(eval $(call Profile,None))
-
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=powerpc
-BOARD:=amcc
-BOARDNAME:=AMCC Taishan
-FEATURES:=jffs2
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build firmware images for the AMCC Taishan evaluation board
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-::sysinit:/etc/init.d/rcS S boot
-::shutdown:/etc/init.d/rcS K stop
-tts/0::askfirst:/bin/ash --login
-ttyS1::askfirst:/bin/ash --login
-tty1::askfirst:/bin/ash --login
+++ /dev/null
-# CONFIG_40x is not set
-CONFIG_44x=y
-CONFIG_4xx=y
-# CONFIG_6xx is not set
-# CONFIG_8139TOO is not set
-# CONFIG_8xx is not set
-# CONFIG_ATM_DRIVERS is not set
-# CONFIG_BAMBOO is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-# CONFIG_EBONY is not set
-# CONFIG_LUAN is not set
-# CONFIG_YUCCA is not set
-# CONFIG_OCOTEA is not set
-CONFIG_TAISHAN=y
-CONFIG_440GX=y
-CONFIG_440A=y
-CONFIG_PTE_64BIT=y
-CONFIG_PHYS_64BIT=y
-# CONFIG_ADVANCED_OPTIONS is not set
-# CONFIG_AGP is not set
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-# CONFIG_B44 is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BIOS_FIXUP=y
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BOOKE_WDT is not set
-CONFIG_BOOT_LOAD=0x01000000
-# CONFIG_BT is not set
-# CONFIG_BUBINGA is not set
-CONFIG_CMDLINE="console=ttyS1,115200 init=/etc/preinit"
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_CONSISTENT_START=0xff100000
-# CONFIG_CPCI405 is not set
-# CONFIG_CPU_FREQ is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-# CONFIG_EP405 is not set
-# CONFIG_FIRMWARE_EDID is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_NVRAM=y
-# CONFIG_GEN_RTC is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_DEBUG is not set
-CONFIG_IBM_EMAC_PHY_RX_CLK_FIX=y
-CONFIG_IBM_EMAC_POLL_WEIGHT=32
-CONFIG_IBM_EMAC_RXB=128
-CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
-CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0
-CONFIG_IBM_EMAC_TXB=128
-CONFIG_IBM_OCP=y
-# CONFIG_IDE is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_ISA_DMA_API=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_KEXEC is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_MACINTOSH_DRIVERS is not set
-CONFIG_MATH_EMULATION=y
-CONFIG_MINI_FO=y
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x8000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_MTD_SPLIT_ROOTFS=y
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-CONFIG_NETDEV_1000=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_NVRAM is not set
-# CONFIG_PCIPCWATCHDOG is not set
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCMCIA_ATMEL is not set
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_PM is not set
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_PPC4xx_DMA=y
-CONFIG_PPC4xx_EDMA=y
-CONFIG_PPC_GEN550=y
-# CONFIG_PPC_I8259 is not set
-CONFIG_PPC_INDIRECT_PCI=y
-CONFIG_PPC_OCP=y
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-CONFIG_RESOURCES_64BIT=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SECCOMP is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_RSA is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SYCAMORE is not set
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USB is not set
-# CONFIG_VIA_RHINE is not set
-CONFIG_WANT_EARLY_SERIAL=y
-# CONFIG_WINDFARM is not set
-# CONFIG_XILINX_ML300 is not set
-# CONFIG_XILINX_ML403 is not set
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Image/Prepare
- cp $(LINUX_DIR)/arch/ppc/boot/images/uImage $(KDIR)/uImage
-endef
-
-define Image/BuildKernel
- cp $(KDIR)/uImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-uImage
-endef
-
-define Image/Build
- $(call Image/Build/$(1),$(1))
-endef
-
-define Image/Build/jffs2-256k
- ( \
- dd if=$(LINUX_DIR)/arch/ppc/boot/images/uImage bs=4096k conv=sync; \
- dd if=$(KDIR)/root.$(1) bs=256k conv=sync; \
- ) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-jffs2.img
-endef
-
-define Image/Build/squashfs
- $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
- ( \
- dd if=$(LINUX_DIR)/arch/ppc/boot/images/uImage bs=4096k conv=sync; \
- dd if=$(KDIR)/root.$(1) bs=256k conv=sync; \
- ) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-diff -Nur linux-2.6.21/drivers/net/ibm_emac/ibm_emac_phy.c linux-2.6.21-owrt/drivers/net/ibm_emac/ibm_emac_phy.c
---- linux-2.6.21/drivers/net/ibm_emac/ibm_emac_phy.c 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21-owrt/drivers/net/ibm_emac/ibm_emac_phy.c 2007-05-28 16:27:15.000000000 +0200
-@@ -299,11 +299,50 @@
- .ops = &cis8201_phy_ops
- };
-
-+#if defined(CONFIG_TAISHAN)
-+static int et1011c_init(struct mii_phy *phy)
-+{
-+ u16 reg_short;
-+
-+ reg_short = (u16)(phy_read(phy,0x16));
-+ reg_short &= ~(0x7);
-+ reg_short |= 0x6; /* RGMII Trace Delay*/
-+ phy_write(phy, 0x16, reg_short);
-+
-+ reg_short = (u16)(phy_read(phy, 0x17));
-+ reg_short &= ~(0x40);
-+ phy_write(phy, 0x17, reg_short);
-+
-+ phy_write(phy,0x1c,0x74f0);
-+ return 0;
-+}
-+
-+static struct mii_phy_ops et1011c_phy_ops = {
-+ .init = et1011c_init,
-+ .setup_aneg = genmii_setup_aneg,
-+ .setup_forced = genmii_setup_forced,
-+ .poll_link = genmii_poll_link,
-+ .read_link = genmii_read_link
-+};
-+
-+static struct mii_phy_def et1011c_phy_def = {
-+ .phy_id = 0x0282f000,
-+ .phy_id_mask = 0x0fffff00,
-+ .name = "ET1011C Gigabit Ethernet",
-+ .ops = &et1011c_phy_ops
-+};
-+
-+static struct mii_phy_def *mii_phy_table[] = {
-+ &et1011c_phy_def,
-+ NULL
-+};
-+#else
- static struct mii_phy_def *mii_phy_table[] = {
- &cis8201_phy_def,
- &genmii_phy_def,
- NULL
- };
-+#endif
-
- int mii_phy_probe(struct mii_phy *phy, int address)
- {
-diff -Nur linux-2.6.21/drivers/net/ibm_emac/ibm_emac_zmii.c linux-2.6.21-owrt/drivers/net/ibm_emac/ibm_emac_zmii.c
---- linux-2.6.21/drivers/net/ibm_emac/ibm_emac_zmii.c 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21-owrt/drivers/net/ibm_emac/ibm_emac_zmii.c 2007-05-28 16:26:48.000000000 +0200
-@@ -170,6 +170,13 @@
- struct ocp_func_emac_data *emacdata = dev->def->additions;
-
- if (emacdata->zmii_idx >= 0) {
-+#if defined(CONFIG_TAISHAN)
-+ /* don't attach emac0 and emac1 */
-+ if( dev->def->index < 2 )
-+ {
-+ return -ENODEV;
-+ }
-+#endif
- dev->zmii_input = emacdata->zmii_mux;
- dev->zmii_dev =
- ocp_find_device(OCP_VENDOR_IBM, OCP_FUNC_ZMII,
+++ /dev/null
-diff -Nur linux-2.6.21/arch/ppc/platforms/4xx/taishan.c linux-2.6.21-owrt/arch/ppc/platforms/4xx/taishan.c
---- linux-2.6.21/arch/ppc/platforms/4xx/taishan.c 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21-owrt/arch/ppc/platforms/4xx/taishan.c 2007-05-28 17:21:46.000000000 +0200
-@@ -60,8 +60,8 @@
- };
-
- #define RW_PART0_OF 0
--#define RW_PART0_SZ 0x180000
--#define RW_PART1_SZ 0x200000
-+#define RW_PART0_SZ 0x400000
-+#define RW_PART1_SZ 0x3a00000
- /* Partition 2 will be autosized dynamically... */
- #define RW_PART3_SZ 0x80000
- #define RW_PART4_SZ 0x40000
-@@ -73,12 +73,12 @@
- .size = RW_PART0_SZ
- },
- {
-- .name = "root",
-+ .name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
- .size = RW_PART1_SZ,
- },
- {
-- .name = "user",
-+ .name = "diagnostics",
- .offset = MTDPART_OFS_APPEND,
- /* .size = RW_PART2_SZ */ /* will be adjusted dynamically */
- },
+++ /dev/null
-diff -Nur linux-2.6.21/arch/ppc/boot/images/Makefile linux-2.6.21-owrt/arch/ppc/boot/images/Makefile
---- linux-2.6.21/arch/ppc/boot/images/Makefile 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21-owrt/arch/ppc/boot/images/Makefile 2007-05-28 17:44:11.000000000 +0200
-@@ -20,11 +20,11 @@
-
- quiet_cmd_uimage = UIMAGE $@
- cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \
-- -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
-+ -C none -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
- -d $< $@
-
- targets += uImage
--$(obj)/uImage: $(obj)/vmlinux.gz
-+$(obj)/uImage: $(obj)/vmlinux.bin
- $(Q)rm -f $@
- $(call cmd,uimage)
- @echo -n ' Image: $@ '
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mipsel
-BOARD:=ar7
-BOARDNAME:=TI AR7
-FEATURES:=squashfs jffs2 atm
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build firmware images for TI AR7 based routers
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-define Build/Compile
- $(call Build/Compile/Default)
- $(TARGET_CC) -o $(PKG_BUILD_DIR)/adam2patcher $(PLATFORM_DIR)/src/adam2patcher.c
-endef
-
-define Package/base-files/install-target
- mkdir -p $(1)/sbin
- $(CP) $(PKG_BUILD_DIR)/adam2patcher $(1)/sbin
-endef
-
-
+++ /dev/null
-# Copyright (C) 2006 OpenWrt.org
-
-config interface loopback
- option ifname lo
- option proto static
- option ipaddr 127.0.0.1
- option netmask 255.0.0.0
-
-config interface lan
- option ifname eth0
- option proto static
- option ipaddr 192.168.1.1
- option netmask 255.255.255.0
-
-
-
-## Example for ATM bridging.
-## Useful for PPPoE or IP over ATM. Will create 'nas${unit}'
-#
-# config atm-bridge
-# option unit 0
-# option encaps llc
-# option vpi 8
-# option vci 35
-
-
-# config interface wan
-## PPPoE:
-# option ifname nas0
-# option proto pppoe
-
-## PPPoA:
-# option ifname atm0
-# option proto pppoa
-# option encaps llc
-# option vpi 8
-# option vci 35
-
-## Both:
-# option username "my_username"
-# option password "my_password"
+++ /dev/null
-#!/bin/sh
-# Copyright (C) 2007 OpenWrt.org
-
-set_led() {
- local led="$1"
- local state="$2"
- [ -d "/sys/class/leds/ar7:$led" ] && echo "$state" > "/sys/class/leds/ar7:$led/brightness"
-}
-
-set_state() {
- case "$1" in
- preinit)
- set_led status 1
- ;;
- done)
- set_led status 0
- ;;
- esac
-}
+++ /dev/null
-#!/bin/sh /etc/rc.common
-# ADAM2 patcher for Netgear DG834 and compatible
-# Copyright (C) 2006 OpenWrt.org
-
-START=00
-start() {
- MD5="$(md5sum /dev/mtdblock0 | awk '{print $1}')"
- [ "$MD5" = "0530bfdf00ec155f4182afd70da028c1" ] && {
- mtd unlock adam2
- /sbin/adam2patcher /dev/mtdblock0
- }
- rm -f /etc/rc.d/S${START}adam2 /etc/init.d/adam2 /sbin/adam2patcher >&- 2>&-
-}
+++ /dev/null
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_AR7=y
-CONFIG_AR7_GPIO=y
-CONFIG_AR7_WDT=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_ATM_DRIVERS=y
-# CONFIG_ATMEL is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_BCM43XX is not set
-CONFIG_BITREVERSE=y
-# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_BOOT_ELF32=y
-# CONFIG_BROADCOM_PHY is not set
-# CONFIG_BT is not set
-CONFIG_CMDLINE="init=/etc/preinit rootfstype=squashfs,jffs2,"
-CONFIG_CPMAC=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-CONFIG_CPU_MIPSR1=y
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_DM9000 is not set
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_FIXED_MII_100_FDX=y
-# CONFIG_FIXED_MII_10_FDX is not set
-CONFIG_FIXED_PHY=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_HERMES is not set
-# CONFIG_HOSTAP_PCI is not set
-# CONFIG_HOSTAP_PLX is not set
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
-CONFIG_IRQ_CPU=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_LEDS_AR7=y
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-CONFIG_MIPS=y
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_MIPS_MTX1 is not set
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_AR7_PARTS=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-CONFIG_MTD_PHYSMAP_LEN=0
-CONFIG_MTD_PHYSMAP_START=0x10000000
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_NEED_MULTIPLE_NODES=y
-# CONFIG_NET_PCI is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NETDEV_1000 is not set
-CONFIG_NODES_SHIFT=6
-# CONFIG_PAGE_SIZE_16KB is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PCIPCWATCHDOG is not set
-CONFIG_PHYLIB=y
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_PNPACPI is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_PRISM54 is not set
-# CONFIG_QSEMI_PHY is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-CONFIG_SERIAL_8250_PCI=y
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_PTSWARM is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SMSC_PHY is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USB is not set
+++ /dev/null
-
-obj-y := \
- prom.o \
- setup.o \
- memory.o \
- irq.o \
- time.o \
- platform.o \
- gpio.o \
- clock.o \
- vlynq.o
-
-obj-$(CONFIG_PCI) += \
- vlynq-pci.o
-
-EXTRA_AFLAGS := $(CFLAGS)
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/ar7/ar7.h>
-
-#define BOOT_PLL_SOURCE_MASK 0x3
-#define CPU_PLL_SOURCE_SHIFT 16
-#define BUS_PLL_SOURCE_SHIFT 14
-#define USB_PLL_SOURCE_SHIFT 18
-#define DSP_PLL_SOURCE_SHIFT 22
-#define BOOT_PLL_SOURCE_AFE 0
-#define BOOT_PLL_SOURCE_BUS 0
-#define BOOT_PLL_SOURCE_REF 1
-#define BOOT_PLL_SOURCE_XTAL 2
-#define BOOT_PLL_SOURCE_CPU 3
-#define BOOT_PLL_BYPASS 0x00000020
-#define BOOT_PLL_ASYNC_MODE 0x02000000
-#define BOOT_PLL_2TO1_MODE 0x00008000
-
-struct tnetd7300_clock {
- volatile u32 ctrl;
-#define PREDIV_MASK 0x001f0000
-#define PREDIV_SHIFT 16
-#define POSTDIV_MASK 0x0000001f
- u32 unused1[3];
- volatile u32 pll;
-#define MUL_MASK 0x0000f000
-#define MUL_SHIFT 12
-#define PLL_MODE_MASK 0x00000001
-#define PLL_NDIV 0x00000800
-#define PLL_DIV 0x00000002
-#define PLL_STATUS 0x00000001
- u32 unused2[3];
-} __attribute__ ((packed));
-
-struct tnetd7300_clocks {
- struct tnetd7300_clock bus;
- struct tnetd7300_clock cpu;
- struct tnetd7300_clock usb;
- struct tnetd7300_clock dsp;
-} __attribute__ ((packed));
-
-struct tnetd7200_clock {
- volatile u32 ctrl;
- u32 unused1[3];
-#define DIVISOR_ENABLE_MASK 0x00008000
- volatile u32 mul;
- volatile u32 prediv;
- volatile u32 postdiv;
- u32 unused2[7];
- volatile u32 cmd;
- volatile u32 status;
- volatile u32 cmden;
- u32 padding[15];
-};
-
-struct tnetd7200_clocks {
- struct tnetd7200_clock cpu;
- struct tnetd7200_clock dsp;
- struct tnetd7200_clock usb;
-};
-
-int ar7_afe_clock = 35328000;
-int ar7_ref_clock = 25000000;
-int ar7_xtal_clock = 24000000;
-
-int ar7_cpu_clock = 150000000;
-EXPORT_SYMBOL(ar7_cpu_clock);
-int ar7_bus_clock = 125000000;
-EXPORT_SYMBOL(ar7_bus_clock);
-int ar7_dsp_clock = 0;
-EXPORT_SYMBOL(ar7_dsp_clock);
-
-static int gcd(int x, int y)
-{
- if (x > y)
- return (x % y) ? gcd(y, x % y) : y;
- return (y % x) ? gcd(x, y % x) : x;
-}
-
-static inline int ABS(int x)
-{
- return (x >= 0) ? x : -x;
-}
-
-static void approximate(int base, int target, int *prediv,
- int *postdiv, int *mul)
-{
- int i, j, k, freq, res = target;
- for (i = 1; i <= 16; i++) {
- for (j = 1; j <= 32; j++) {
- for (k = 1; k <= 32; k++) {
- freq = ABS(base / j * i / k - target);
- if (freq < res) {
- res = freq;
- *mul = i;
- *prediv = j;
- *postdiv = k;
- }
- }
- }
- }
-}
-
-static void calculate(int base, int target, int *prediv, int *postdiv,
- int *mul)
-{
- int tmp_gcd, tmp_base, tmp_freq;
-
- for (*prediv = 1; *prediv <= 32; (*prediv)++) {
- tmp_base = base / *prediv;
- tmp_gcd = gcd(target, tmp_base);
- *mul = target / tmp_gcd;
- *postdiv = tmp_base / tmp_gcd;
- if ((*mul < 1) || (*mul >= 16))
- continue;
- if ((*postdiv > 0) & (*postdiv <= 32))
- break;
- }
-
- if (base / (*prediv) * (*mul) / (*postdiv) != target) {
- approximate(base, target, prediv, postdiv, mul);
- tmp_freq = base / (*prediv) * (*mul) / (*postdiv);
- printk(KERN_WARNING
- "Adjusted requested frequency %d to %d\n",
- target, tmp_freq);
- }
-
- printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n",
- *prediv, *postdiv, *mul);
-}
-
-static int tnetd7300_dsp_clock(void)
-{
- u32 didr1, didr2;
- u8 rev = ar7_chip_rev();
- didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18));
- didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c));
- if (didr2 & (1 << 23))
- return 0;
- if ((rev >= 0x23) && (rev != 0x57))
- return 250000000;
- if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22))
- > 4208000)
- return 250000000;
- return 0;
-}
-
-static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
- u32 *bootcr, u32 bus_clock)
-{
- int product;
- int base_clock = ar7_ref_clock;
- u32 ctrl = clock->ctrl;
- u32 pll = clock->pll;
- int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
- int postdiv = (ctrl & POSTDIV_MASK) + 1;
- int divisor = prediv * postdiv;
- int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1;
-
- switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
- case BOOT_PLL_SOURCE_BUS:
- base_clock = bus_clock;
- break;
- case BOOT_PLL_SOURCE_REF:
- base_clock = ar7_ref_clock;
- break;
- case BOOT_PLL_SOURCE_XTAL:
- base_clock = ar7_xtal_clock;
- break;
- case BOOT_PLL_SOURCE_CPU:
- base_clock = ar7_cpu_clock;
- break;
- }
-
- if (*bootcr & BOOT_PLL_BYPASS)
- return base_clock / divisor;
-
- if ((pll & PLL_MODE_MASK) == 0)
- return (base_clock >> (mul / 16 + 1)) / divisor;
-
- if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
- product = (mul & 1) ?
- (base_clock * mul) >> 1 :
- (base_clock * (mul - 1)) >> 2;
- return product / divisor;
- }
-
- if (mul == 16)
- return base_clock / divisor;
-
- return base_clock * mul / divisor;
-}
-
-static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
- u32 *bootcr, u32 frequency)
-{
- u32 status;
- int prediv, postdiv, mul;
- int base_clock = ar7_bus_clock;
-
- switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
- case BOOT_PLL_SOURCE_BUS:
- base_clock = ar7_bus_clock;
- break;
- case BOOT_PLL_SOURCE_REF:
- base_clock = ar7_ref_clock;
- break;
- case BOOT_PLL_SOURCE_XTAL:
- base_clock = ar7_xtal_clock;
- break;
- case BOOT_PLL_SOURCE_CPU:
- base_clock = ar7_cpu_clock;
- break;
- }
-
- calculate(base_clock, frequency, &prediv, &postdiv, &mul);
-
- clock->ctrl = ((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1);
- mdelay(1);
- clock->pll = 4;
- do {
- status = clock->pll;
- } while (status & PLL_STATUS);
- clock->pll = ((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e;
- mdelay(75);
-}
-
-static void __init tnetd7300_init_clocks(void)
-{
- u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
- struct tnetd7300_clocks *clocks = (struct tnetd7300_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x20, sizeof(struct tnetd7300_clocks));
-
- ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
- &clocks->bus, bootcr,
- ar7_afe_clock);
-
- if (*bootcr & BOOT_PLL_ASYNC_MODE) {
- ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
- &clocks->cpu,
- bootcr, ar7_afe_clock);
- } else {
- ar7_cpu_clock = ar7_bus_clock;
- }
-
- tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb,
- bootcr, 48000000);
-
- if (ar7_dsp_clock == 250000000)
- tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp,
- bootcr, ar7_dsp_clock);
-
- iounmap(clocks);
- iounmap(bootcr);
-}
-
-static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
- u32 *bootcr, u32 bus_clock)
-{
- int divisor = ((clock->prediv & 0x1f) + 1) *
- ((clock->postdiv & 0x1f) + 1);
-
- if (*bootcr & BOOT_PLL_BYPASS)
- return base / divisor;
-
- return base * ((clock->mul & 0xf) + 1) / divisor;
-}
-
-static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
- u32 *bootcr, u32 frequency)
-{
- u32 status;
- int prediv, postdiv, mul;
-
- calculate(base, frequency, &prediv, &postdiv, &mul);
-
- clock->ctrl = 0;
- clock->prediv = DIVISOR_ENABLE_MASK | prediv;
- clock->mul = mul;
- mdelay(1);
- do {
- status = clock->status;
- } while (status & PLL_STATUS);
- clock->postdiv = DIVISOR_ENABLE_MASK | postdiv;
- clock->cmden = 1;
- clock->cmd = 1;
- do {
- status = clock->status;
- } while (status & PLL_STATUS);
- clock->ctrl = 1;
-}
-
-static void __init tnetd7200_init_clocks(void)
-{
- u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
- struct tnetd7200_clocks *clocks = (struct tnetd7200_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x80, sizeof(struct tnetd7200_clocks));
-
- ar7_cpu_clock = tnetd7200_get_clock(ar7_afe_clock,
- &clocks->cpu,
- bootcr, ar7_afe_clock);
-
- if (*bootcr & BOOT_PLL_ASYNC_MODE) {
- ar7_bus_clock = 125000000;
- } else {
- if (*bootcr & BOOT_PLL_2TO1_MODE) {
- ar7_bus_clock = ar7_cpu_clock / 2;
- } else {
- ar7_bus_clock = ar7_cpu_clock;
- }
- }
-
- tnetd7200_set_clock(ar7_ref_clock * 5, &clocks->usb,
- bootcr, 48000000);
-
- if (ar7_dsp_clock == 250000000)
- tnetd7200_set_clock(ar7_ref_clock, &clocks->dsp,
- bootcr, ar7_dsp_clock);
-
- iounmap(clocks);
- iounmap(bootcr);
-}
-
-void __init ar7_init_clocks(void)
-{
- switch (ar7_chip_id()) {
- case AR7_CHIP_7100:
- tnetd7200_init_clocks();
- break;
- case AR7_CHIP_7200:
-#warning FIXME: check revision
- ar7_dsp_clock = 250000000;
- tnetd7200_init_clocks();
- break;
- case AR7_CHIP_7300:
- ar7_dsp_clock = tnetd7300_dsp_clock();
- tnetd7300_init_clocks();
- break;
- default:
- break;
- }
-}
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/ar7/ar7.h>
-#include <asm/ar7/gpio.h>
-
-static char *ar7_gpio_list[AR7_GPIO_MAX] = { 0, };
-
-int gpio_request(unsigned gpio, char *label)
-{
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- if (ar7_gpio_list[gpio])
- return -EBUSY;
-
- if (label) {
- ar7_gpio_list[gpio] = label;
- } else {
- ar7_gpio_list[gpio] = "busy";
- }
-
- return 0;
-}
-EXPORT_SYMBOL(gpio_request);
-
-void gpio_free(unsigned gpio)
-{
- BUG_ON(!ar7_gpio_list[gpio]);
- ar7_gpio_list[gpio] = NULL;
-}
-EXPORT_SYMBOL(gpio_free);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-
-#include <asm/irq.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/ar7/ar7.h>
-
-#define EXCEPT_OFFSET 0x80
-#define PACE_OFFSET 0xA0
-#define CHNLS_OFFSET 0x200
-
-#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10)
-#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8)
-#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */
-#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
-#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */
-#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
-#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */
-#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
-#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */
-#define PIR_OFFSET (0x40)
-#define MSR_OFFSET (0x44)
-#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
-#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
-
-#define REG(addr) (*(volatile u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr))
-
-#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4))
-
-static void ar7_unmask_irq(unsigned int irq_nr);
-static void ar7_mask_irq(unsigned int irq_nr);
-static void ar7_unmask_secondary_irq(unsigned int irq_nr);
-static void ar7_mask_secondary_irq(unsigned int irq_nr);
-static irqreturn_t ar7_cascade(int interrupt, void *dev);
-static irqreturn_t ar7_secondary_cascade(int interrupt, void *dev);
-static void ar7_irq_init(int base);
-static int ar7_irq_base;
-
-static struct irq_chip ar7_irq_type = {
- .typename = "AR7",
- .name = "AR7",
- .unmask = ar7_unmask_irq,
- .mask = ar7_mask_irq,
-};
-
-static struct irq_chip ar7_secondary_irq_type = {
- .name = "AR7",
- .unmask = ar7_unmask_secondary_irq,
- .mask = ar7_mask_secondary_irq,
-};
-
-static struct irqaction ar7_cascade_action = {
- .handler = ar7_cascade,
- .name = "AR7 cascade interrupt"
-};
-
-static struct irqaction ar7_secondary_cascade_action = {
- .handler = ar7_secondary_cascade,
- .name = "AR7 secondary cascade interrupt"
-};
-
-static void ar7_unmask_irq(unsigned int irq)
-{
- unsigned long flags;
- local_irq_save(flags);
- /* enable the interrupt channel bit */
- REG(ESR_OFFSET(irq)) = 1 << ((irq - ar7_irq_base) % 32);
- local_irq_restore(flags);
-}
-
-static void ar7_mask_irq(unsigned int irq)
-{
- unsigned long flags;
- local_irq_save(flags);
- /* disable the interrupt channel bit */
- REG(ECR_OFFSET(irq)) = 1 << ((irq - ar7_irq_base) % 32);
- local_irq_restore(flags);
-}
-
-static void ar7_unmask_secondary_irq(unsigned int irq)
-{
- unsigned long flags;
- local_irq_save(flags);
- /* enable the interrupt channel bit */
- REG(SEC_ESR_OFFSET) = 1 << (irq - ar7_irq_base - 40);
- local_irq_restore(flags);
-}
-
-static void ar7_mask_secondary_irq(unsigned int irq)
-{
- unsigned long flags;
- local_irq_save(flags);
- /* disable the interrupt channel bit */
- REG(SEC_ECR_OFFSET) = 1 << (irq - ar7_irq_base - 40);
- local_irq_restore(flags);
-}
-
-void __init arch_init_irq(void) {
- mips_cpu_irq_init();
- ar7_irq_init(8);
-}
-
-static void __init ar7_irq_init(int base)
-{
- int i;
- /*
- Disable interrupts and clear pending
- */
- REG(ECR_OFFSET(0)) = 0xffffffff;
- REG(ECR_OFFSET(32)) = 0xff;
- REG(SEC_ECR_OFFSET) = 0xffffffff;
- REG(CR_OFFSET(0)) = 0xffffffff;
- REG(CR_OFFSET(32)) = 0xff;
- REG(SEC_CR_OFFSET) = 0xffffffff;
-
- ar7_irq_base = base;
-
- for(i = 0; i < 40; i++) {
- REG(CHNL_OFFSET(i)) = i;
- /* Primary IRQ's */
- irq_desc[i + base].status = IRQ_DISABLED;
- irq_desc[i + base].action = NULL;
- irq_desc[i + base].depth = 1;
- irq_desc[i + base].chip = &ar7_irq_type;
- /* Secondary IRQ's */
- if (i < 32) {
- irq_desc[i + base + 40].status = IRQ_DISABLED;
- irq_desc[i + base + 40].action = NULL;
- irq_desc[i + base + 40].depth = 1;
- irq_desc[i + base + 40].chip = &ar7_secondary_irq_type;
- }
- }
-
- setup_irq(2, &ar7_cascade_action);
- setup_irq(ar7_irq_base, &ar7_secondary_cascade_action);
- set_c0_status(IE_IRQ0);
-}
-
-static irqreturn_t ar7_cascade(int interrupt, void *dev)
-{
- int irq;
-
- irq = (REG(PIR_OFFSET) & 0x3F);
- REG(CR_OFFSET(irq)) = 1 << (irq % 32);
-
- do_IRQ(irq + ar7_irq_base);
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t ar7_secondary_cascade(int interrupt, void *dev)
-{
- int irq = 0, i;
- unsigned long status;
-
- status = REG(SEC_SR_OFFSET);
- if (unlikely(!status)) {
- spurious_interrupt();
- return IRQ_NONE;
- }
-
- for (i = 0; i < 32; i++)
- if (status & (i << 1)) {
- irq = i + 40;
- REG(SEC_CR_OFFSET) = 1 << i;
- break;
- }
-
- do_IRQ(irq + ar7_irq_base);
-
- return IRQ_HANDLED;
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_status() & read_c0_cause();
- if (pending & STATUSF_IP7) /* cpu timer */
- do_IRQ(7);
- else if (pending & STATUSF_IP2) /* int0 hardware line */
- do_IRQ(2);
- else
- spurious_interrupt();
-}
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * Based on arch/mips/mm/init.c
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/bootmem.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/pfn.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/swap.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/sections.h>
-
-#include <asm/mips-boards/prom.h>
-
-static int __init memsize(void)
-{
- u32 size = (64 << 20);
- volatile u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4);
- u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end));
-
- while (addr > kernel_end) {
- *addr = (u32)addr;
- size >>= 1;
- addr -= size >> 2;
- }
-
- do {
- addr += size >> 2;
- if (*addr != (u32)addr)
- break;
- size <<= 1;
- } while (size < (64 << 20));
-
- return size;
-}
-
-#ifdef CONFIG_NEED_MULTIPLE_NODES
-static bootmem_data_t node_bootmem_data;
-pg_data_t __node_data[1] = {
- {
- .bdata = &node_bootmem_data
- },
-};
-EXPORT_SYMBOL(__node_data);
-
-unsigned long max_mapnr;
-struct page *mem_map;
-EXPORT_SYMBOL(max_mapnr);
-EXPORT_SYMBOL(mem_map);
-
-static unsigned long setup_zero_pages(void)
-{
- unsigned int order = 3;
- unsigned long size;
- struct page *page;
-
- empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
- if (!empty_zero_page)
- panic("Oh boy, that early out of memory?");
-
- page = virt_to_page(empty_zero_page);
- split_page(page, order);
- while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
- SetPageReserved(page);
- page++;
- }
-
- size = PAGE_SIZE << order;
- zero_page_mask = (size - 1) & PAGE_MASK;
-
- return 1UL << order;
-}
-
-extern void pagetable_init(void);
-
-void __init paging_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES] = { 0, };
-
- pagetable_init();
-
- zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
-
- free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL);
-}
-
-static struct kcore_list kcore_mem, kcore_vmalloc;
-
-void __init mem_init(void)
-{
- unsigned long codesize, reservedpages, datasize, initsize;
- unsigned long tmp, ram;
- unsigned long kernel_start, kernel_end;
-
- kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text));
- kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end));
- for (tmp = min_low_pfn + 1; tmp < kernel_start; tmp++) {
- ClearPageReserved(pfn_to_page(tmp));
- init_page_count(pfn_to_page(tmp));
- free_page((unsigned long)__va(tmp << PAGE_SHIFT));
- }
-
- totalram_pages += free_all_bootmem();
- totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
-
- reservedpages = ram = 0;
- for (tmp = min_low_pfn; tmp <= max_low_pfn; tmp++) {
- ram++;
- if (PageReserved(pfn_to_page(tmp)))
- if ((tmp < kernel_start) || (tmp > kernel_end))
- reservedpages++;
- }
- num_physpages = ram;
-
- codesize = (unsigned long) &_etext - (unsigned long) &_text;
- datasize = (unsigned long) &_edata - (unsigned long) &_etext;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
-
- kclist_add(&kcore_mem, __va(min_low_pfn),
- (max_low_pfn - min_low_pfn) << PAGE_SHIFT);
- kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
- VMALLOC_END - VMALLOC_START);
-
- printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init)\n",
- (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
- ram << (PAGE_SHIFT-10),
- codesize >> 10,
- reservedpages << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10);
-}
-#endif
-
-void __init prom_meminit(void)
-{
- unsigned long pages;
-#ifdef CONFIG_NEED_MULTIPLE_NODES
- unsigned long kernel_start, kernel_end;
- unsigned long free_pages;
- unsigned long bootmap_size;
-#endif
-
- pages = memsize() >> PAGE_SHIFT;
- add_memory_region(ARCH_PFN_OFFSET << PAGE_SHIFT, pages <<
- PAGE_SHIFT, BOOT_MEM_RAM);
-
-#ifdef CONFIG_NEED_MULTIPLE_NODES
- kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text));
- kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end));
- min_low_pfn = ARCH_PFN_OFFSET;
- max_low_pfn = ARCH_PFN_OFFSET + pages;
- max_mapnr = max_low_pfn;
- free_pages = pages - (kernel_end - min_low_pfn);
- bootmap_size = init_bootmem_node(NODE_DATA(0), kernel_end,
- ARCH_PFN_OFFSET, max_low_pfn);
-
- free_bootmem(PFN_PHYS(kernel_end), free_pages << PAGE_SHIFT);
- memory_present(0, min_low_pfn, max_low_pfn);
- reserve_bootmem(PFN_PHYS(kernel_end), bootmap_size);
- mem_map = NODE_DATA(0)->node_mem_map;
-#endif
-}
-
-void __init prom_free_prom_memory(void)
-{
- return;
-}
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
-#include <linux/ioport.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/ar7/ar7.h>
-#include <asm/ar7/gpio.h>
-#include <asm/ar7/vlynq.h>
-
-struct plat_vlynq_data {
- struct plat_vlynq_ops ops;
- int gpio_bit;
- int reset_bit;
-};
-
-
-static int vlynq_on(struct vlynq_device *dev)
-{
- int result;
- struct plat_vlynq_data *pdata = dev->dev.platform_data;
-
- if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
- goto out;
-
- ar7_device_reset(pdata->reset_bit);
-
- if ((result = ar7_gpio_disable(pdata->gpio_bit)))
- goto out_enabled;
-
- if ((result = ar7_gpio_enable(pdata->gpio_bit)))
- goto out_enabled;
-
- if ((result = gpio_direction_output(pdata->gpio_bit)))
- goto out_gpio_enabled;
-
- gpio_set_value(pdata->gpio_bit, 0);
- mdelay(50);
-
- gpio_set_value(pdata->gpio_bit, 1);
- mdelay(50);
-
- return 0;
-
-out_gpio_enabled:
- ar7_gpio_disable(pdata->gpio_bit);
-out_enabled:
- ar7_device_disable(pdata->reset_bit);
- gpio_free(pdata->gpio_bit);
-out:
- return result;
-}
-
-static void vlynq_off(struct vlynq_device *dev)
-{
- struct plat_vlynq_data *pdata = dev->dev.platform_data;
- ar7_gpio_disable(pdata->gpio_bit);
- gpio_free(pdata->gpio_bit);
- ar7_device_disable(pdata->reset_bit);
-}
-
-static struct resource physmap_flash_resource = {
- .name = "mem",
- .flags = IORESOURCE_MEM,
- .start = 0x10000000,
- .end = 0x103fffff,
-};
-
-static struct resource cpmac_low_res[] = {
- {
- .name = "regs",
- .flags = IORESOURCE_MEM,
- .start = AR7_REGS_MAC0,
- .end = AR7_REGS_MAC0 + 0x7FF,
- },
- {
- .name = "irq",
- .flags = IORESOURCE_IRQ,
- .start = 27,
- .end = 27,
- },
-};
-
-static struct resource cpmac_high_res[] = {
- {
- .name = "regs",
- .flags = IORESOURCE_MEM,
- .start = AR7_REGS_MAC1,
- .end = AR7_REGS_MAC1 + 0x7FF,
- },
- {
- .name = "irq",
- .flags = IORESOURCE_IRQ,
- .start = 41,
- .end = 41,
- },
-};
-
-static struct resource vlynq_low_res[] = {
- {
- .name = "regs",
- .flags = IORESOURCE_MEM,
- .start = AR7_REGS_VLYNQ0,
- .end = AR7_REGS_VLYNQ0 + 0xff,
- },
- {
- .name = "irq",
- .flags = IORESOURCE_IRQ,
- .start = 29,
- .end = 29,
- },
- {
- .name = "mem",
- .flags = IORESOURCE_MEM,
- .start = 0x04000000,
- .end = 0x04ffffff,
- },
- {
- .name = "devirq",
- .flags = IORESOURCE_IRQ,
- .start = 80,
- .end = 111,
- },
-};
-
-static struct resource vlynq_high_res[] = {
- {
- .name = "regs",
- .flags = IORESOURCE_MEM,
- .start = AR7_REGS_VLYNQ1,
- .end = AR7_REGS_VLYNQ1 + 0xFF,
- },
- {
- .name = "irq",
- .flags = IORESOURCE_IRQ,
- .start = 33,
- .end = 33,
- },
- {
- .name = "mem",
- .flags = IORESOURCE_MEM,
- .start = 0x0c000000,
- .end = 0x0cffffff,
- },
- {
- .name = "devirq",
- .flags = IORESOURCE_IRQ,
- .start = 112,
- .end = 143,
- },
-};
-
-static struct physmap_flash_data physmap_flash_data = {
- .width = 2,
-};
-
-static struct plat_cpmac_data cpmac_low_data = {
- .reset_bit = 17,
- .power_bit = 20,
- .phy_mask = 0x80000000,
-};
-
-static struct plat_cpmac_data cpmac_high_data = {
- .reset_bit = 21,
- .power_bit = 22,
- .phy_mask = 0x7fffffff,
-};
-
-static struct plat_vlynq_data vlynq_low_data = {
- .ops.on = vlynq_on,
- .ops.off = vlynq_off,
- .reset_bit = 20,
- .gpio_bit = 18,
-};
-
-static struct plat_vlynq_data vlynq_high_data = {
- .ops.on = vlynq_on,
- .ops.off = vlynq_off,
- .reset_bit = 16,
- .gpio_bit = 19,
-};
-
-static struct platform_device physmap_flash = {
- .id = 0,
- .name = "physmap-flash",
- .dev.platform_data = &physmap_flash_data,
- .resource = &physmap_flash_resource,
- .num_resources = 1,
-};
-
-static struct platform_device cpmac_low = {
- .id = 0,
- .name = "cpmac",
- .dev.platform_data = &cpmac_low_data,
- .resource = cpmac_low_res,
- .num_resources = ARRAY_SIZE(cpmac_low_res),
-};
-
-static struct platform_device cpmac_high = {
- .id = 1,
- .name = "cpmac",
- .dev.platform_data = &cpmac_high_data,
- .resource = cpmac_high_res,
- .num_resources = ARRAY_SIZE(cpmac_high_res),
-};
-
-static struct platform_device vlynq_low = {
- .id = 0,
- .name = "vlynq",
- .dev.platform_data = &vlynq_low_data,
- .resource = vlynq_low_res,
- .num_resources = ARRAY_SIZE(vlynq_low_res),
-};
-
-static struct platform_device vlynq_high = {
- .id = 1,
- .name = "vlynq",
- .dev.platform_data = &vlynq_high_data,
- .resource = vlynq_high_res,
- .num_resources = ARRAY_SIZE(vlynq_high_res),
-};
-
-
-/* This is proper way to define uart ports, but they are then detected
- * as xscale and, obviously, don't work...
- */
-#if !defined(CONFIG_SERIAL_8250)
-static struct plat_serial8250_port uart_data[] = {
- {
- .mapbase = AR7_REGS_UART0,
- .irq = AR7_IRQ_UART0,
- .regshift = 2,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
- },
- {
- .mapbase = AR7_REGS_UART1,
- .irq = AR7_IRQ_UART1,
- .regshift = 2,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
- },
- {
- .flags = 0,
- },
-};
-
-static struct platform_device uart = {
- .id = 0,
- .name = "serial8250",
- .dev.platform_data = uart_data,
-};
-#endif
-
-static inline unsigned char char2hex(char h)
-{
- switch (h) {
- case '0': case '1': case '2': case '3': case '4':
- case '5': case '6': case '7': case '8': case '9':
- return h - '0';
- case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
- return h - 'A' + 10;
- case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
- return h - 'a' + 10;
- default:
- return 0;
- }
-}
-
-static void cpmac_get_mac(int instance, unsigned char *dev_addr)
-{
- int i;
- char name[5], default_mac[] = "00:00:00:12:34:56", *mac;
-
- mac = NULL;
- sprintf(name, "mac%c", 'a' + instance);
- mac = prom_getenv(name);
- if (!mac) {
- sprintf(name, "mac%c", 'a');
- mac = prom_getenv(name);
- }
- if (!mac)
- mac = default_mac;
- for (i = 0; i < 6; i++)
- dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
- char2hex(mac[i * 3 + 1]);
-}
-
-static int __init ar7_register_devices(void)
-{
- int res;
-
-#if defined(CONFIG_SERIAL_8250)
- static struct uart_port uart_port[2];
-
- memset(uart_port, 0, sizeof(struct uart_port) * 2);
-
- uart_port[0].type = PORT_AR7;
- uart_port[0].line = 0;
- uart_port[0].irq = AR7_IRQ_UART0;
- uart_port[0].uartclk = ar7_bus_freq() / 2;
- uart_port[0].iotype = UPIO_MEM;
- uart_port[0].mapbase = AR7_REGS_UART0;
- uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
- uart_port[0].regshift = 2;
- res = early_serial_setup(&uart_port[0]);
- if (res)
- return res;
-
- uart_port[1].type = PORT_AR7;
- uart_port[1].line = 1;
- uart_port[1].irq = AR7_IRQ_UART1;
- uart_port[1].uartclk = ar7_bus_freq() / 2;
- uart_port[1].iotype = UPIO_MEM;
- uart_port[1].mapbase = AR7_REGS_UART1;
- uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
- uart_port[1].regshift = 2;
- res = early_serial_setup(&uart_port[1]);
- if (res)
- return res;
-#else
- uart_data[0].uartclk = ar7_bus_freq() / 2;
- uart_data[1].uartclk = uart_data[0].uartclk;
- res = platform_device_register(&uart);
- if (res)
- return res;
-#endif
- res = platform_device_register(&physmap_flash);
- if (res)
- return res;
-
- res = platform_device_register(&vlynq_low);
- if (res)
- return res;
-
- ar7_device_disable(vlynq_low_data.reset_bit);
- if (ar7_has_high_vlynq()) {
- ar7_device_disable(vlynq_high_data.reset_bit);
- res = platform_device_register(&vlynq_high);
- if (res)
- return res;
- }
-
- if (ar7_has_high_cpmac()) {
- cpmac_get_mac(1, cpmac_high_data.dev_addr);
- res = platform_device_register(&cpmac_high);
- if (res)
- return res;
- } else {
- cpmac_low_data.phy_mask = 0xffffffff;
- }
-
- cpmac_get_mac(0, cpmac_low_data.dev_addr);
- res = platform_device_register(&cpmac_low);
-
- return res;
-}
-
-
-arch_initcall(ar7_register_devices);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Putting things on the screen/serial line using YAMONs facilities.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/serial_reg.h>
-#include <linux/spinlock.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include <asm/bootinfo.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/gdb-stub.h>
-
-#include <asm/ar7/ar7.h>
-
-#define MAX_ENTRY 80
-
-struct env_var {
- char *name;
- char *value;
-};
-
-struct psp_chip_map {
- u16 chip;
- char *names[50];
-};
-
-/* I hate this. No. *I* *HATE* *THIS* */
-static __initdata struct psp_chip_map psp_chip_map[] = {
- {
- .chip = AR7_CHIP_7100,
- .names = {
- "dummy", "cpufrequency", "memsize",
- "flashsize", "modetty0", "modetty1", "prompt",
- "bootcfg", "maca", "macb", "usb_rndis_mac",
- "macap", "my_ipaddress", "server_ipaddress",
- "bline_maca", "bline_macb", "bline_rndis",
- "bline_atm", "usb_pid", "usb_vid",
- "usb_eppolli", "gateway_ipaddress",
- "subnet_mask", "usb_serial", "usb_board_mac",
- "remote_user", "remote_pass", "remote_dir",
- "sysfrequency", "link_timeout", "mac_port",
- "path", "hostname", "tftpcfg", "buildops",
- "tftp_fo_fname", "tftp_fo_ports",
- "console_state", "mipsfrequency",
- },
- },
- {
- .chip = AR7_CHIP_7200,
- .names = {
- "dummy", "cpufrequency", "memsize",
- "flashsize", "modetty0", "modetty1", "prompt",
- "bootcfg", "maca", "macb", "usb_rndis_mac",
- "macap", "my_ipaddress", "server_ipaddress",
- "bline_maca", "bline_macb", "bline_rndis",
- "bline_atm", "usb_pid", "usb_vid",
- "usb_eppolli", "gateway_ipaddress",
- "subnet_mask", "usb_serial", "usb_board_mac",
- "remote_user", "remote_pass", "remote_dir",
- "sysfrequency", "link_timeout", "mac_port",
- "path", "hostname", "tftpcfg", "buildops",
- "tftp_fo_fname", "tftp_fo_ports",
- "console_state", "mipsfrequency",
- },
- },
- {
- .chip = AR7_CHIP_7300,
- .names = {
- "dummy", "cpufrequency", "memsize",
- "flashsize", "modetty0", "modetty1", "prompt",
- "bootcfg", "maca", "macb", "usb_rndis_mac",
- "macap", "my_ipaddress", "server_ipaddress",
- "bline_maca", "bline_macb", "bline_rndis",
- "bline_atm", "usb_pid", "usb_vid",
- "usb_eppolli", "gateway_ipaddress",
- "subnet_mask", "usb_serial", "usb_board_mac",
- "remote_user", "remote_pass", "remote_dir",
- "sysfrequency", "link_timeout", "mac_port",
- "path", "hostname", "tftpcfg", "buildops",
- "tftp_fo_fname", "tftp_fo_ports",
- "console_state", "mipsfrequency",
- },
- },
- {
- .chip = 0x0,
- },
-};
-
-static struct env_var adam2_env[MAX_ENTRY] = { { 0, }, };
-
-char * prom_getenv(char *name)
-{
- int i;
- for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++)
- if (!strcmp(name, adam2_env[i].name))
- return adam2_env[i].value;
-
- return NULL;
-}
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
-
-static void __init ar7_init_cmdline(int argc, char *argv[])
-{
- char *cp;
- int actr;
-
- actr = 1; /* Always ignore argv[0] */
-
- cp = &(arcs_cmdline[0]);
- while(actr < argc) {
- strcpy(cp, argv[actr]);
- cp += strlen(argv[actr]);
- *cp++ = ' ';
- actr++;
- }
- if (cp != &(arcs_cmdline[0])) {
- /* get rid of trailing space */
- --cp;
- *cp = '\0';
- }
-}
-
-struct psbl_rec {
- u32 psbl_size;
- u32 env_base;
- u32 env_size;
- u32 ffs_base;
- u32 ffs_size;
-};
-
-static __initdata char psp_env_version[] = "TIENV0.8";
-
-struct psp_env_var {
- unsigned char num;
- unsigned char ctrl;
- unsigned short csum;
- unsigned char len;
- unsigned char data[11];
-};
-
-static char psp_env_data[2048] = { 0, };
-
-static void __init add_adam2_var(char *name, char *value)
-{
- int i;
- for (i = 0; i < MAX_ENTRY; i++) {
- if (!adam2_env[i].name) {
- adam2_env[i].name = name;
- adam2_env[i].value = value;
- return;
- } else if (!strcmp(adam2_env[i].name, name)) {
- adam2_env[i].value = value;
- return;
- }
- }
-}
-
-static int __init parse_psp_env(void *start)
-{
- int i, j;
- u16 chip;
- struct psp_chip_map *map;
- char *src, *dest, *name, *value;
- struct psp_env_var *vars = start;
-
- chip = ar7_chip_id();
- for (map = psp_chip_map; map->chip; map++)
- if (map->chip == chip)
- break;
-
- if (!map->chip)
- return -EINVAL;
-
- i = 1;
- j = 0;
- dest = psp_env_data;
- while (vars[i].num < 0xff) {
- src = vars[i].data;
- if (vars[i].num) {
- strcpy(dest, map->names[vars[i].num]);
- name = dest;
- } else {
- strcpy(dest, src);
- name = dest;
- src += strlen(src) + 1;
- }
- dest += strlen(dest) + 1;
- strcpy(dest, src);
- value = dest;
- dest += strlen(dest) + 1;
- add_adam2_var(name, value);
- i += vars[i].len;
- }
- return 0;
-}
-
-static void __init ar7_init_env(struct env_var *env)
-{
- int i;
- struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
- void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
-
- if(strcmp(psp_env, psp_env_version) == 0) {
- parse_psp_env(psp_env);
- } else {
- for (i = 0; i < MAX_ENTRY; i++, env++)
- if (env->name)
- add_adam2_var(env->name, env->value);
- }
-}
-
-static void __init console_config(void)
-{
-#ifdef CONFIG_SERIAL_8250_CONSOLE
- char console_string[40];
- int baud = 0;
- char parity = '\0', bits = '\0', flow = '\0';
- char *s, *p;
-
- if (strstr(prom_getcmdline(), "console="))
- return;
-
-#ifdef CONFIG_KGDB
- strcat(prom_getcmdline(), " console=kgdb");
- kgdb_enabled = 1;
- return;
-#endif
-
- if ((s = prom_getenv("modetty0"))) {
- baud = simple_strtoul(s, &p, 10);
- s = p;
- if (*s == ',') s++;
- if (*s) parity = *s++;
- if (*s == ',') s++;
- if (*s) bits = *s++;
- if (*s == ',') s++;
- if (*s == 'h') flow = 'r';
- }
-
- if (baud == 0)
- baud = 38400;
- if (parity != 'n' && parity != 'o' && parity != 'e')
- parity = 'n';
- if (bits != '7' && bits != '8')
- bits = '8';
- if (flow == '\0')
- flow = 'r';
-
- sprintf(console_string, " console=ttyS0,%d%c%c%c", baud,
- parity, bits, flow);
- strcat(prom_getcmdline(), console_string);
-#endif
-}
-
-void __init prom_init(void)
-{
- ar7_init_cmdline(fw_arg0, (char **)fw_arg1);
- ar7_init_env((struct env_var *)fw_arg2);
- console_config();
-}
-
-#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4)))
-static inline unsigned int serial_in(int offset)
-{
- return readb((void *)PORT(offset));
-}
-
-static inline void serial_out(int offset, int value)
-{
- writeb(value, (void *)PORT(offset));
-}
-
-char prom_getchar(void)
-{
- while (!(serial_in(UART_LSR) & UART_LSR_DR));
- return serial_in(UART_RX);
-}
-
-int prom_putchar(char c)
-{
- while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0);
- serial_out(UART_TX, c);
- return 1;
-}
-
-#ifdef CONFIG_KGDB
-int putDebugChar(char c)
-{
- return prom_putchar(c);
-}
-
-char getDebugChar(void)
-{
- return prom_getchar();
-}
-#endif
-
-EXPORT_SYMBOL(prom_getenv);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <linux/tty.h>
-#include <linux/pm.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_core.h>
-#include <linux/serial.h>
-#include <linux/serial_reg.h>
-
-#include <asm/cpu.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/dma.h>
-#include <asm/time.h>
-#include <asm/traps.h>
-#include <asm/io.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/ar7/ar7.h>
-
-extern void ar7_time_init(void);
-static void ar7_machine_restart(char *command);
-static void ar7_machine_halt(void);
-static void ar7_machine_power_off(void);
-
-static void ar7_machine_restart(char *command)
-{
- volatile u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET +
- AR7_RESET_SOFTWARE, 1);
- *softres_reg = 1;
-}
-
-static void ar7_machine_halt(void)
-{
- while (1);
-}
-
-static void ar7_machine_power_off(void)
-{
- volatile u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
- u32 power_state = *power_reg | (3 << 30);
- *power_reg = power_state;
- ar7_machine_halt();
-}
-
-const char *get_system_type(void)
-{
- u16 chip_id = ar7_chip_id();
- switch (chip_id) {
- case AR7_CHIP_7300:
- return "TI AR7 (TNETD7300)";
- case AR7_CHIP_7100:
- return "TI AR7 (TNETD7100)";
- case AR7_CHIP_7200:
- return "TI AR7 (TNETD7200)";
- default:
- return "TI AR7 (Unknown)";
- }
-}
-
-static int __init ar7_init_console(void)
-{
- return 0;
-}
-
-/*
- * Initializes basic routines and structures pointers, memory size (as
- * given by the bios and saves the command line.
- */
-
-extern void ar7_init_clocks(void);
-
-void __init plat_mem_setup(void)
-{
- unsigned long io_base;
-
- _machine_restart = ar7_machine_restart;
- _machine_halt = ar7_machine_halt;
- pm_power_off = ar7_machine_power_off;
- board_time_init = ar7_time_init;
- panic_timeout = 3;
-
- io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
- if (!io_base) panic("Can't remap IO base!\n");
- set_io_port_base(io_base);
-
- prom_meminit();
-#warning FIXME: clock initialisation
- //ar7_init_clocks();
-
- ioport_resource.start = 0;
- ioport_resource.end = ~0;
- iomem_resource.start = 0;
- iomem_resource.end = ~0;
-}
-
-console_initcall(ar7_init_console);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Setting up the clock on the MIPS boards.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/mc146818rtc.h>
-
-#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
-#include <asm/hardirq.h>
-#include <asm/irq.h>
-#include <asm/div64.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/mc146818-time.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/maltaint.h>
-#include <asm/mc146818-time.h>
-#include <asm/ar7/ar7.h>
-
-void __init ar7_time_init(void)
-{
- mips_hpt_frequency = ar7_cpu_freq() / 2;
-}
-
-void __init plat_timer_setup(struct irqaction *irq)
-{
- setup_irq(7, irq);
-}
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <asm/ar7/vlynq.h>
-
-#define VLYNQ_PCI_SLOTS 2
-
-struct vlynq_reg_config {
- u32 offset;
- u32 value;
-};
-
-struct vlynq_pci_config {
- u32 chip_id;
- char name[32];
- struct vlynq_mapping rx_mapping[4];
- int irq;
- int irq_type;
- u32 chip;
- u32 class;
- int num_regs;
- struct vlynq_reg_config regs[10];
-};
-
-struct vlynq_pci_private {
- u32 latency;
- u32 cache_line;
- u32 command;
- u32 sz_mask;
- struct vlynq_pci_config *config;
-};
-
-static struct vlynq_pci_config known_devices[] = {
- {
- .chip_id = 0x00000009, .name = "TI ACX111",
- .rx_mapping = {
- { .size = 0x22000, .offset = 0xf0000000 },
- { .size = 0x40000, .offset = 0xc0000000 },
- { .size = 0x0, .offset = 0x0 },
- { .size = 0x0, .offset = 0x0 },
- },
- .irq = 0, .chip = 0x9066104c,
- .irq_type = IRQ_TYPE_EDGE_RISING,
- .class = PCI_CLASS_NETWORK_OTHER,
- .num_regs = 5,
- .regs = {
- { .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
- { .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
- { .offset = 0x740, .value = 0 },
- { .offset = 0x744, .value = 0x00010000 },
- { .offset = 0x764, .value = 0x00010000 },
- },
- },
-};
-
-static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
-
-static struct resource vlynq_io_resource = {
- .start = 0x00000000,
- .end = 0x00000000,
- .name = "pci IO space",
- .flags = IORESOURCE_IO
-};
-
-static struct resource vlynq_mem_resource = {
- .start = 0x00000000,
- .end = 0x00000000,
- .name = "pci memory space",
- .flags = IORESOURCE_MEM
-};
-
-static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
-{
- int i;
- struct vlynq_pci_private *priv = dev->priv;
- u32 ret = dev->mem_start;
- if (!priv->config->rx_mapping[res].size) return 0;
- for (i = 0; i < res; i++)
- ret += priv->config->rx_mapping[i].size;
-
- return ret;
-}
-
-static inline u32 vlynq_read(u32 val, int size) {
- switch (size) {
- case 1:
- return *(u8 *)&val;
- case 2:
- return *(u16 *)&val;
- }
- return val;
-}
-
-static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
-{
- struct vlynq_device *dev;
- struct vlynq_pci_private *priv;
- int resno, slot = PCI_SLOT(devfn);
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (slot >= VLYNQ_PCI_SLOTS)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- dev = slots[slot];
-
- if (!dev || (PCI_FUNC(devfn) > 0))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- priv = dev->priv;
-
- switch (where) {
- case PCI_VENDOR_ID:
- *val = vlynq_read(priv->config->chip, size);
- break;
- case PCI_DEVICE_ID:
- *val = priv->config->chip & 0xffff;
- case PCI_COMMAND:
- *val = priv->command;
- case PCI_STATUS:
-/* *val = PCI_STATUS_CAP_LIST;*/
- *val = 0;
- break;
- case PCI_CLASS_REVISION:
- *val = priv->config->class;
- break;
- case PCI_LATENCY_TIMER:
- *val = priv->latency;
- break;
- case PCI_HEADER_TYPE:
- *val = PCI_HEADER_TYPE_NORMAL;
- break;
- case PCI_CACHE_LINE_SIZE:
- *val = priv->cache_line;
- break;
- case PCI_BASE_ADDRESS_0:
- case PCI_BASE_ADDRESS_1:
- case PCI_BASE_ADDRESS_2:
- case PCI_BASE_ADDRESS_3:
- resno = (where - PCI_BASE_ADDRESS_0) >> 2;
- if (priv->sz_mask & (1 << resno)) {
- priv->sz_mask &= ~(1 << resno);
- *val = priv->config->rx_mapping[resno].size;
- } else {
- *val = vlynq_get_mapped(dev, resno);
- }
- break;
- case PCI_BASE_ADDRESS_4:
- case PCI_BASE_ADDRESS_5:
- case PCI_SUBSYSTEM_VENDOR_ID:
- case PCI_SUBSYSTEM_ID:
- case PCI_ROM_ADDRESS:
- case PCI_INTERRUPT_LINE:
- case PCI_CARDBUS_CIS:
- case PCI_CAPABILITY_LIST:
- *val = 0;
- break;
- case PCI_INTERRUPT_PIN:
- *val = 1;
- break;
- default:
- printk("%s: Read of unknown register 0x%x (size %d)\n",
- dev->dev.bus_id, where, size);
- return PCIBIOS_BAD_REGISTER_NUMBER;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
-{
- struct vlynq_device *dev;
- struct vlynq_pci_private *priv;
- int resno, slot = PCI_SLOT(devfn);
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (slot >= VLYNQ_PCI_SLOTS)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- dev = slots[slot];
-
- if (!dev || (PCI_FUNC(devfn) > 0))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- priv = dev->priv;
-
- switch (where) {
- case PCI_VENDOR_ID:
- case PCI_DEVICE_ID:
- case PCI_STATUS:
- case PCI_CLASS_REVISION:
- case PCI_HEADER_TYPE:
- case PCI_CACHE_LINE_SIZE:
- case PCI_SUBSYSTEM_VENDOR_ID:
- case PCI_SUBSYSTEM_ID:
- case PCI_INTERRUPT_LINE:
- case PCI_INTERRUPT_PIN:
- case PCI_CARDBUS_CIS:
- case PCI_CAPABILITY_LIST:
- return PCIBIOS_FUNC_NOT_SUPPORTED;
- case PCI_COMMAND:
- priv->command = val;
- case PCI_LATENCY_TIMER:
- priv->latency = val;
- break;
- case PCI_BASE_ADDRESS_0:
- case PCI_BASE_ADDRESS_1:
- case PCI_BASE_ADDRESS_2:
- case PCI_BASE_ADDRESS_3:
- if (val == 0xffffffff) {
- resno = (where - PCI_BASE_ADDRESS_0) >> 2;
- priv->sz_mask |= (1 << resno);
- break;
- }
- case PCI_BASE_ADDRESS_4:
- case PCI_BASE_ADDRESS_5:
- case PCI_ROM_ADDRESS:
- break;
- default:
- printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
- dev->dev.bus_id, where, size, val);
- return PCIBIOS_BAD_REGISTER_NUMBER;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops vlynq_pci_ops = {
- vlynq_config_read,
- vlynq_config_write
-};
-
-static struct pci_controller vlynq_controller = {
- .pci_ops = &vlynq_pci_ops,
- .io_resource = &vlynq_io_resource,
- .mem_resource = &vlynq_mem_resource,
-};
-
-static int vlynq_pci_probe(struct vlynq_device *dev)
-{
- int result, i;
- u32 chip_id, addr;
- struct vlynq_pci_private *priv;
- struct vlynq_mapping mapping[4] = { { 0, }, };
- struct vlynq_pci_config *config = NULL;
-
- result = vlynq_set_local_irq(dev, 31);
- if (result)
- return result;
-
- result = vlynq_set_remote_irq(dev, 30);
- if (result)
- return result;
-
- result = vlynq_device_enable(dev);
- if (result)
- return result;
-
- chip_id = vlynq_remote_id(dev);
- for (i = 0; i < ARRAY_SIZE(known_devices); i++)
- if (chip_id == known_devices[i].chip_id)
- config = &known_devices[i];
-
- if (!config) {
- printk("vlynq-pci: skipping unknown device "
- "%04x:%04x at %s\n", chip_id >> 16,
- chip_id & 0xffff, dev->dev.bus_id);
- result = -ENODEV;
- goto fail;
- }
-
- printk("vlynq-pci: attaching device %s at %s\n",
- config->name, dev->dev.bus_id);
-
- priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL);
- if (!priv) {
- printk(KERN_ERR "%s: failed to allocate private data\n",
- dev->dev.bus_id);
- result = -ENOMEM;
- goto fail;
- }
-
- memset(priv, 0, sizeof(struct vlynq_pci_private));
- priv->latency = 64;
- priv->cache_line = 32;
- priv->config = config;
-
- mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
- mapping[0].size = 0x02000000;
- vlynq_set_local_mapping(dev, dev->mem_start, mapping);
- vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
-
- set_irq_type(vlynq_virq_to_irq(dev, config->irq), config->irq_type);
-
- addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
- if (!addr) {
- printk(KERN_ERR "%s: failed to remap io memory\n",
- dev->dev.bus_id);
- result = -ENXIO;
- goto fail;
- }
-
- for (i = 0; i < config->num_regs; i++)
- *(volatile u32 *)(addr + config->regs[i].offset) =
- config->regs[i].value;
-
- dev->priv = priv;
- for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
- if (!slots[i]) {
- slots[i] = dev;
- break;
- }
- }
-
- return 0;
-
-fail:
- vlynq_device_disable(dev);
-
- return result;
-}
-
-static int vlynq_pci_remove(struct vlynq_device *dev)
-{
- int i;
- struct vlynq_pci_private *priv = dev->priv;
-
- for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
- if (slots[i] == dev)
- slots[i] = NULL;
-
- vlynq_device_disable(dev);
- kfree(priv);
-
- return 0;
-}
-
-static struct vlynq_driver vlynq_pci = {
- .name = "PCI over VLYNQ emulation",
- .probe = vlynq_pci_probe,
- .remove = vlynq_pci_remove,
-};
-
-int vlynq_pci_init(void)
-{
- int res;
- res = vlynq_register_driver(&vlynq_pci);
- if (res)
- return res;
-
- register_pci_controller(&vlynq_controller);
-
- return 0;
-}
-
-int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
- struct vlynq_device *dev;
- struct vlynq_pci_private *priv;
-
- dev = slots[slot];
-
- if (!dev)
- return 0;
-
- priv = dev->priv;
-
- return vlynq_virq_to_irq(dev, priv->config->irq);
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/ioport.h>
-#include <linux/errno.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/device.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/ar7/vlynq.h>
-
-#define PER_DEVICE_IRQS 32
-
-#define VLYNQ_CTRL_PM_ENABLE 0x80000000
-#define VLYNQ_CTRL_CLOCK_INT 0x00008000
-#define VLYNQ_CTRL_CLOCK_DIV(x) ((x & 7) << 16)
-#define VLYNQ_CTRL_INT_LOCAL 0x00004000
-#define VLYNQ_CTRL_INT_ENABLE 0x00002000
-#define VLYNQ_CTRL_INT_VECTOR(x) ((x & 0x1f) << 8)
-#define VLYNQ_CTRL_INT2CFG 0x00000080
-#define VLYNQ_CTRL_RESET 0x00000001
-
-#define VLYNQ_STATUS_RERROR 0x00000100
-#define VLYNQ_STATUS_LERROR 0x00000080
-#define VLYNQ_STATUS_LINK 0x00000001
-
-#define VINT_ENABLE 0x00000100
-#define VINT_TYPE_EDGE 0x00000080
-#define VINT_LEVEL_LOW 0x00000040
-#define VINT_VECTOR(x) (x & 0x1f)
-#define VINT_OFFSET(irq) (8 * ((irq) % 4))
-
-#define VLYNQ_AUTONEGO_V2 0x00010000
-
-struct vlynq_regs {
- volatile u32 revision;
- volatile u32 control;
- volatile u32 status;
- volatile u32 int_prio;
- volatile u32 int_status;
- volatile u32 int_pending;
- volatile u32 int_ptr;
- volatile u32 tx_offset;
- volatile struct vlynq_mapping rx_mapping[4];
- volatile u32 chip;
- volatile u32 autonego;
- volatile u32 unused[6];
- volatile u32 int_device[8];
-} __attribute__ ((packed));
-
-#ifdef VLYNQ_DEBUG
-static void vlynq_dump_regs(struct vlynq_device *dev)
-{
- int i;
- printk("VLYNQ local=%p remote=%p\n", dev->local, dev->remote);
- for (i = 0; i < 32; i++) {
- printk("VLYNQ: local %d: %08x\n", i + 1, ((u32 *)dev->local)[i]);
- printk("VLYNQ: remote %d: %08x\n", i + 1, ((u32 *)dev->remote)[i]);
- }
-}
-
-static void vlynq_dump_mem(u32 *base, int count)
-{
- int i;
- for (i = 0; i < (count + 3) / 4; i++) {
- if (i % 4 == 0) printk("\nMEM[0x%04x]:", i * 4);
- printk(" 0x%08x", *(base + i));
- }
- printk("\n");
-}
-#endif
-
-int vlynq_linked(struct vlynq_device *dev)
-{
- int i;
- for (i = 0; i < 10; i++)
- if (dev->local->status & VLYNQ_STATUS_LINK) {
- printk("%s: linked\n", dev->dev.bus_id);
- return 1;
- } else {
- mdelay(1);
- }
- return 0;
-}
-
-static void vlynq_irq_unmask(unsigned int irq)
-{
- volatile u32 val;
- struct vlynq_device *dev = irq_desc[irq].chip_data;
- int virq;
-
- BUG_ON(!dev);
- virq = irq - dev->irq_start;
- val = dev->remote->int_device[virq >> 2];
- val |= (VINT_ENABLE | virq) << VINT_OFFSET(virq);
- dev->remote->int_device[virq >> 2] = val;
-}
-
-static void vlynq_irq_mask(unsigned int irq)
-{
- volatile u32 val;
- struct vlynq_device *dev = irq_desc[irq].chip_data;
- int virq;
-
- BUG_ON(!dev);
- virq = irq - dev->irq_start;
- val = dev->remote->int_device[virq >> 2];
- val &= ~(VINT_ENABLE << VINT_OFFSET(virq));
- dev->remote->int_device[virq >> 2] = val;
-}
-
-static int vlynq_irq_type(unsigned int irq, unsigned int flow_type)
-{
- volatile u32 val;
- struct vlynq_device *dev = irq_desc[irq].chip_data;
- int virq;
-
- BUG_ON(!dev);
- virq = irq - dev->irq_start;
- val = dev->remote->int_device[virq >> 2];
- switch (flow_type & IRQ_TYPE_SENSE_MASK) {
- case IRQ_TYPE_EDGE_RISING:
- case IRQ_TYPE_EDGE_FALLING:
- case IRQ_TYPE_EDGE_BOTH:
- val |= VINT_TYPE_EDGE << VINT_OFFSET(virq);
- val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq));
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq));
- val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq));
- break;
- case IRQ_TYPE_LEVEL_LOW:
- val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq));
- val |= VINT_LEVEL_LOW << VINT_OFFSET(virq);
- break;
- default:
- return -EINVAL;
- }
- dev->remote->int_device[virq >> 2] = val;
- return 0;
-}
-
-static irqreturn_t vlynq_irq(int irq, void *dev_id)
-{
- struct vlynq_device *dev = dev_id;
- u32 status, ack;
- int virq = 0;
-
- status = dev->local->int_status;
- dev->local->int_status = status;
-
- if (status & (1 << dev->local_irq)) { /* Local vlynq IRQ. Ack */
- ack = dev->local->status;
- dev->local->status = ack;
- }
-
- if (status & (1 << dev->remote_irq)) { /* Remote vlynq IRQ. Ack */
- ack = dev->remote->status;
- dev->remote->status = ack;
- }
-
- status &= ~((1 << dev->local_irq) | (1 << dev->remote_irq));
- while (status) {
- if (status & 1) /* Remote device IRQ. Pass. */
- do_IRQ(dev->irq_start + virq);
- status >>= 1;
- virq++;
- }
-
- return IRQ_HANDLED;
-}
-
-static struct irq_chip vlynq_irq_chip = {
- .typename = "VLYNQ",
- .name = "vlynq",
- .unmask = vlynq_irq_unmask,
- .mask = vlynq_irq_mask,
- .set_type = vlynq_irq_type,
-};
-
-static int vlynq_setup_irq(struct vlynq_device *dev)
-{
- u32 val;
- int i;
-
- if (dev->local_irq == dev->remote_irq) {
- printk("%s: local vlynq irq should be different from remote\n",
- dev->dev.bus_id);
- return -EINVAL;
- }
-
- val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq);
- val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL |
- VLYNQ_CTRL_INT2CFG;
- dev->local->int_ptr = 0x14;
- dev->local->control |= val;
-
- val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq);
- val |= VLYNQ_CTRL_INT_ENABLE;
- dev->remote->int_ptr = 0x14;
- dev->remote->control |= val;
-
- for (i = 0; i < PER_DEVICE_IRQS; i++) {
- if ((i == dev->local_irq) || (i == dev->remote_irq))
- continue;
- irq_desc[dev->irq_start + i].status = IRQ_DISABLED;
- irq_desc[dev->irq_start + i].action = 0;
- irq_desc[dev->irq_start + i].depth = 1;
- irq_desc[dev->irq_start + i].chip = &vlynq_irq_chip;
- irq_desc[dev->irq_start + i].chip_data = dev;
- dev->remote->int_device[i >> 2] = 0;
- }
-
- if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "vlynq", dev)) {
- printk("%s: request_irq failed\n", dev->dev.bus_id);
- return -EAGAIN;
- }
-
- return 0;
-}
-
-static void vlynq_free_irq(struct vlynq_device *dev)
-{
- free_irq(dev->irq, dev);
-}
-
-static void vlynq_device_release(struct device *dev)
-{
- struct vlynq_device *vdev = to_vlynq_device(dev);
- kfree(vdev);
-}
-
-static int vlynq_device_probe(struct device *dev)
-{
- struct vlynq_driver *drv = to_vlynq_driver(dev->driver);
- if (drv->probe)
- return drv->probe(to_vlynq_device(dev));
- return 0;
-}
-
-static int vlynq_device_remove(struct device *dev)
-{
- struct vlynq_driver *drv = to_vlynq_driver(dev->driver);
- if (drv->remove)
- return drv->remove(to_vlynq_device(dev));
- return 0;
-}
-
-int __vlynq_register_driver(struct vlynq_driver *driver, struct module *owner)
-{
- driver->driver.name = driver->name;
- driver->driver.bus = &vlynq_bus_type;
-/* driver->driver.owner = owner;*/
- return driver_register(&driver->driver);
-}
-EXPORT_SYMBOL(__vlynq_register_driver);
-
-void vlynq_unregister_driver(struct vlynq_driver *driver)
-{
- driver_unregister(&driver->driver);
-}
-EXPORT_SYMBOL(vlynq_unregister_driver);
-
-int vlynq_device_enable(struct vlynq_device *dev)
-{
- u32 val;
- int result;
- struct plat_vlynq_ops *ops = dev->dev.platform_data;
-
- result = ops->on(dev);
- if (result)
- return result;
-
- dev->local->control = 0;
- dev->remote->control = 0;
-
- if (vlynq_linked(dev))
- return vlynq_setup_irq(dev);
-
- for (val = 0; val < 8; val++) {
- dev->local->control = VLYNQ_CTRL_CLOCK_DIV(val) |
- VLYNQ_CTRL_CLOCK_INT;
- if (vlynq_linked(dev))
- return vlynq_setup_irq(dev);
- }
-
- return -ENODEV;
-}
-
-void vlynq_device_disable(struct vlynq_device *dev)
-{
- struct plat_vlynq_ops *ops = dev->dev.platform_data;
-
- vlynq_free_irq(dev);
- ops->off(dev);
-}
-
-u32 vlynq_local_id(struct vlynq_device *dev)
-{
- return dev->local->chip;
-}
-
-u32 vlynq_remote_id(struct vlynq_device *dev)
-{
- return dev->remote->chip;
-}
-
-void vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset,
- struct vlynq_mapping *mapping)
-{
- int i;
-
- dev->local->tx_offset = tx_offset;
- for (i = 0; i < 4; i++) {
- dev->local->rx_mapping[i].offset = mapping[i].offset;
- dev->local->rx_mapping[i].size = mapping[i].size;
- }
-}
-
-void vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset,
- struct vlynq_mapping *mapping)
-{
- int i;
-
- dev->remote->tx_offset = tx_offset;
- for (i = 0; i < 4; i++) {
- dev->remote->rx_mapping[i].offset = mapping[i].offset;
- dev->remote->rx_mapping[i].size = mapping[i].size;
- }
-}
-
-int vlynq_virq_to_irq(struct vlynq_device *dev, int virq)
-{
- if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
- return -EINVAL;
-
- if ((virq == dev->local_irq) || (virq == dev->remote_irq))
- return -EINVAL;
-
- return dev->irq_start + virq;
-}
-
-int vlynq_irq_to_virq(struct vlynq_device *dev, int irq)
-{
- if ((irq < dev->irq_start) || (irq >= dev->irq_start + PER_DEVICE_IRQS))
- return -EINVAL;
-
- return irq - dev->irq_start;
-}
-
-int vlynq_set_local_irq(struct vlynq_device *dev, int virq)
-{
- if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
- return -EINVAL;
-
- if (virq == dev->remote_irq)
- return -EINVAL;
-
- dev->local_irq = virq;
-
- return 0;
-}
-
-int vlynq_set_remote_irq(struct vlynq_device *dev, int virq)
-{
- if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
- return -EINVAL;
-
- if (virq == dev->local_irq)
- return -EINVAL;
-
- dev->remote_irq = virq;
-
- return 0;
-}
-
-static int vlynq_probe(struct platform_device *pdev)
-{
- struct vlynq_device *dev;
- struct resource *regs_res, *mem_res, *irq_res;
- int len, result;
-
- if (strcmp(pdev->name, "vlynq"))
- return -ENODEV;
-
- regs_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
- if (!regs_res)
- return -ENODEV;
-
- mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem");
- if (!mem_res)
- return -ENODEV;
-
- irq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "devirq");
- if (!irq_res)
- return -ENODEV;
-
- dev = kmalloc(sizeof(struct vlynq_device), GFP_KERNEL);
- if (!dev) {
- printk(KERN_ERR "vlynq: failed to allocate device structure\n");
- return -ENOMEM;
- }
-
- memset(dev, 0, sizeof(struct vlynq_device));
-
- dev->id = pdev->id;
- dev->dev.bus = &vlynq_bus_type;
- dev->dev.parent = &pdev->dev;
- snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id);
- dev->dev.bus_id[BUS_ID_SIZE - 1] = 0;
- dev->dev.platform_data = pdev->dev.platform_data;
- dev->dev.release = vlynq_device_release;
-
- dev->regs_start = regs_res->start;
- dev->regs_end = regs_res->end;
- dev->mem_start = mem_res->start;
- dev->mem_end = mem_res->end;
-
- len = regs_res->end - regs_res->start;
- if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) {
- printk("%s: Can't request vlynq registers\n", dev->dev.bus_id);
- result = -ENXIO;
- goto fail_request;
- }
-
- dev->local = ioremap_nocache(regs_res->start, len);
- if (!dev->local) {
- printk("%s: Can't remap vlynq registers\n", dev->dev.bus_id);
- result = -ENXIO;
- goto fail_remap;
- }
-
- dev->remote = (struct vlynq_regs *)((u32)dev->local + 128);
-
- dev->irq = platform_get_irq_byname(pdev, "irq");
- dev->irq_start = irq_res->start;
- dev->irq_end = irq_res->end;
- dev->local_irq = 31;
- dev->remote_irq = 30;
-
- if (device_register(&dev->dev))
- goto fail_register;
- platform_set_drvdata(pdev, dev);
-
- printk("%s: regs 0x%p, irq %d, mem 0x%p\n",
- dev->dev.bus_id, (void *)dev->regs_start, dev->irq,
- (void *)dev->mem_start);
-
- return 0;
-
-fail_register:
-fail_remap:
- iounmap(dev->local);
-fail_request:
- release_mem_region(regs_res->start, len);
- kfree(dev);
- return result;
-}
-
-static int vlynq_remove(struct platform_device *pdev)
-{
- struct vlynq_device *dev = platform_get_drvdata(pdev);
-
- device_unregister(&dev->dev);
- release_mem_region(dev->regs_start, dev->regs_end - dev->regs_start);
-
- kfree(dev);
-
- return 0;
-}
-
-static struct platform_driver vlynq_driver = {
- .driver.name = "vlynq",
- .probe = vlynq_probe,
- .remove = vlynq_remove,
-};
-
-struct bus_type vlynq_bus_type = {
- .name = "vlynq",
- .probe = vlynq_device_probe,
- .remove = vlynq_device_remove,
-};
-EXPORT_SYMBOL(vlynq_bus_type);
-
-#ifdef CONFIG_PCI
-extern void vlynq_pci_init(void);
-#endif
-int __init vlynq_init(void)
-{
- int res = 0;
-
- res = bus_register(&vlynq_bus_type);
- if (res)
- goto fail_bus;
-
- res = platform_driver_register(&vlynq_driver);
- if (res)
- goto fail_platform;
-
-#ifdef CONFIG_PCI
- vlynq_pci_init();
-#endif
-
- return 0;
-
-fail_platform:
- bus_unregister(&vlynq_bus_type);
-fail_bus:
- return res;
-}
-
-/*
-void __devexit vlynq_exit(void)
-{
- platform_driver_unregister(&vlynq_driver);
- bus_unregister(&vlynq_bus_type);
-}
-*/
-
-
-subsys_initcall(vlynq_init);
+++ /dev/null
-/*
- * linux/drivers/char/ar7_gpio.c
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/device.h>
-#include <linux/fs.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-
-#include <linux/types.h>
-#include <linux/cdev.h>
-#include <gpio.h>
-
-#define DRVNAME "ar7_gpio"
-#define LONGNAME "TI AR7 GPIOs Driver"
-
-MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
-MODULE_DESCRIPTION(LONGNAME);
-MODULE_LICENSE("GPL");
-
-static int ar7_gpio_major = 0;
-
-static ssize_t ar7_gpio_write(struct file *file, const char __user *buf,
- size_t len, loff_t *ppos)
-{
- int pin = iminor(file->f_dentry->d_inode);
- size_t i;
-
- for (i = 0; i < len; ++i) {
- char c;
- if (get_user(c, buf + i))
- return -EFAULT;
- switch (c) {
- case '0':
- gpio_set_value(pin, 0);
- break;
- case '1':
- gpio_set_value(pin, 1);
- break;
- case 'd':
- case 'D':
- ar7_gpio_disable(pin);
- break;
- case 'e':
- case 'E':
- ar7_gpio_enable(pin);
- break;
- case 'i':
- case 'I':
- case '<':
- gpio_direction_input(pin);
- break;
- case 'o':
- case 'O':
- case '>':
- gpio_direction_output(pin);
- break;
- default:
- return -EINVAL;
- }
- }
-
- return len;
-}
-
-static ssize_t ar7_gpio_read(struct file *file, char __user * buf,
- size_t len, loff_t * ppos)
-{
- int pin = iminor(file->f_dentry->d_inode);
- int value;
-
- value = gpio_get_value(pin);
- if (put_user(value ? '1' : '0', buf))
- return -EFAULT;
-
- return 1;
-}
-
-static int ar7_gpio_open(struct inode *inode, struct file *file)
-{
- int m = iminor(inode);
-
- if (m >= AR7_GPIO_MAX)
- return -EINVAL;
-
- return nonseekable_open(inode, file);
-}
-
-static int ar7_gpio_release(struct inode *inode, struct file *file)
-{
- return 0;
-}
-
-static const struct file_operations ar7_gpio_fops = {
- .owner = THIS_MODULE,
- .write = ar7_gpio_write,
- .read = ar7_gpio_read,
- .open = ar7_gpio_open,
- .release = ar7_gpio_release,
- .llseek = no_llseek,
-};
-
-static struct platform_device *ar7_gpio_device;
-
-static int __init ar7_gpio_init(void)
-{
- int rc;
-
- ar7_gpio_device = platform_device_alloc(DRVNAME, -1);
- if (!ar7_gpio_device)
- return -ENOMEM;
-
- rc = platform_device_add(ar7_gpio_device);
- if (rc < 0)
- goto out_put;
-
- rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops);
- if (rc < 0)
- goto out_put;
-
- ar7_gpio_major = rc;
-
- goto out;
-
-out_put:
- platform_device_put(ar7_gpio_device);
-out:
- return rc;
-}
-
-static void __exit ar7_gpio_exit(void)
-{
- unregister_chrdev(ar7_gpio_major, DRVNAME);
- platform_device_unregister(ar7_gpio_device);
-}
-
-module_init(ar7_gpio_init);
-module_exit(ar7_gpio_exit);
+++ /dev/null
-/*
- * linux/drivers/char/ar7_wdt.c
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
- *
- * Some code taken from:
- * National Semiconductor SCx200 Watchdog support
- * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/miscdevice.h>
-#include <linux/watchdog.h>
-#include <linux/notifier.h>
-#include <linux/reboot.h>
-#include <linux/fs.h>
-#include <linux/ioport.h>
-
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-
-#include <asm/ar7/ar7.h>
-
-#define DRVNAME "ar7_wdt"
-#define LONGNAME "TI AR7 Watchdog Timer"
-
-MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
-MODULE_DESCRIPTION(LONGNAME);
-MODULE_LICENSE("GPL");
-MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
-
-static int margin = 60;
-module_param(margin, int, 0);
-MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
-
-static int nowayout = WATCHDOG_NOWAYOUT;
-module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
-
-typedef struct {
- u32 kick_lock;
- u32 kick;
- u32 change_lock;
- u32 change ;
- u32 disable_lock;
- u32 disable;
- u32 prescale_lock;
- u32 prescale;
-} ar7_wdt_t;
-
-static struct semaphore open_semaphore;
-static unsigned expect_close;
-
-/* XXX currently fixed, allows max margin ~68.72 secs */
-#define prescale_value 0xFFFF
-
-static void ar7_wdt_kick(u32 value)
-{
- volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-
- ar7_wdt->kick_lock = 0x5555;
- if ((ar7_wdt->kick_lock & 3) == 1) {
- ar7_wdt->kick_lock = 0xAAAA;
- if ((ar7_wdt->kick_lock & 3) == 3) {
- ar7_wdt->kick = value;
- return;
- }
- }
- printk(KERN_ERR DRVNAME ": failed to unlock WDT kick reg\n");
-}
-
-static void ar7_wdt_prescale(u32 value)
-{
- volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-
- ar7_wdt->prescale_lock = 0x5A5A;
- if ((ar7_wdt->prescale_lock & 3) == 1) {
- ar7_wdt->prescale_lock = 0xA5A5;
- if ((ar7_wdt->prescale_lock & 3) == 3) {
- ar7_wdt->prescale = value;
- return;
- }
- }
- printk(KERN_ERR DRVNAME ": failed to unlock WDT prescale reg\n");
-}
-
-static void ar7_wdt_change(u32 value)
-{
- volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-
- ar7_wdt->change_lock = 0x6666;
- if ((ar7_wdt->change_lock & 3) == 1) {
- ar7_wdt->change_lock = 0xBBBB;
- if ((ar7_wdt->change_lock & 3) == 3) {
- ar7_wdt->change = value;
- return;
- }
- }
- printk(KERN_ERR DRVNAME ": failed to unlock WDT change reg\n");
-}
-
-static void ar7_wdt_disable(u32 value)
-{
- volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)ioremap(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-
- ar7_wdt->disable_lock = 0x7777;
- if ((ar7_wdt->disable_lock & 3) == 1) {
- ar7_wdt->disable_lock = 0xCCCC;
- if ((ar7_wdt->disable_lock & 3) == 2) {
- ar7_wdt->disable_lock = 0xDDDD;
- if ((ar7_wdt->disable_lock & 3) == 3) {
- ar7_wdt->disable = value;
- return;
- }
- }
- }
- printk(KERN_ERR DRVNAME ": failed to unlock WDT disable reg\n");
-}
-
-static void ar7_wdt_update_margin(int new_margin)
-{
- u32 change;
-
- change = new_margin * (ar7_vbus_freq() / prescale_value);
- if (change < 1) change = 1;
- if (change > 0xFFFF) change = 0xFFFF;
- ar7_wdt_change(change);
- margin = change * prescale_value / ar7_vbus_freq();
- printk(KERN_INFO DRVNAME
- ": timer margin %d seconds (prescale %d, change %d, freq %d)\n",
- margin, prescale_value, change, ar7_vbus_freq());
-}
-
-static void ar7_wdt_enable_wdt(void)
-{
- printk(KERN_DEBUG DRVNAME ": enabling watchdog timer\n");
- ar7_wdt_disable(1);
- ar7_wdt_kick(1);
-}
-
-static void ar7_wdt_disable_wdt(void)
-{
- printk(KERN_DEBUG DRVNAME ": disabling watchdog timer\n");
- ar7_wdt_disable(0);
-}
-
-static int ar7_wdt_open(struct inode *inode, struct file *file)
-{
- /* only allow one at a time */
- if (down_trylock(&open_semaphore))
- return -EBUSY;
- ar7_wdt_enable_wdt();
- expect_close = 0;
-
- return 0;
-}
-
-static int ar7_wdt_release(struct inode *inode, struct file *file)
-{
- if (!expect_close) {
- printk(KERN_WARNING DRVNAME ": watchdog device closed unexpectedly, will not disable the watchdog timer\n");
- } else if (!nowayout) {
- ar7_wdt_disable_wdt();
- }
- up(&open_semaphore);
-
- return 0;
-}
-
-static int ar7_wdt_notify_sys(struct notifier_block *this,
- unsigned long code, void *unused)
-{
- if (code == SYS_HALT || code == SYS_POWER_OFF)
- if (!nowayout)
- ar7_wdt_disable_wdt();
-
- return NOTIFY_DONE;
-}
-
-static struct notifier_block ar7_wdt_notifier =
-{
- .notifier_call = ar7_wdt_notify_sys
-};
-
-static ssize_t ar7_wdt_write(struct file *file, const char *data,
- size_t len, loff_t *ppos)
-{
- if (ppos != &file->f_pos)
- return -ESPIPE;
-
- /* check for a magic close character */
- if (len) {
- size_t i;
-
- ar7_wdt_kick(1);
-
- expect_close = 0;
- for (i = 0; i < len; ++i) {
- char c;
- if (get_user(c, data+i))
- return -EFAULT;
- if (c == 'V')
- expect_close = 1;
- }
-
- }
- return len;
-}
-
-static int ar7_wdt_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- static struct watchdog_info ident = {
- .identity = LONGNAME,
- .firmware_version = 1,
- .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING),
- };
- int new_margin;
-
- switch (cmd) {
- default:
- return -ENOTTY;
- case WDIOC_GETSUPPORT:
- if(copy_to_user((struct watchdog_info *)arg, &ident,
- sizeof(ident)))
- return -EFAULT;
- return 0;
- case WDIOC_GETSTATUS:
- case WDIOC_GETBOOTSTATUS:
- if (put_user(0, (int *)arg))
- return -EFAULT;
- return 0;
- case WDIOC_KEEPALIVE:
- ar7_wdt_kick(1);
- return 0;
- case WDIOC_SETTIMEOUT:
- if (get_user(new_margin, (int *)arg))
- return -EFAULT;
- if (new_margin < 1)
- return -EINVAL;
-
- ar7_wdt_update_margin(new_margin);
- ar7_wdt_kick(1);
-
- case WDIOC_GETTIMEOUT:
- if (put_user(margin, (int *)arg))
- return -EFAULT;
- return 0;
- }
-}
-
-static struct file_operations ar7_wdt_fops = {
- .owner = THIS_MODULE,
- .write = ar7_wdt_write,
- .ioctl = ar7_wdt_ioctl,
- .open = ar7_wdt_open,
- .release = ar7_wdt_release,
-};
-
-static struct miscdevice ar7_wdt_miscdev = {
- .minor = WATCHDOG_MINOR,
- .name = "watchdog",
- .fops = &ar7_wdt_fops,
-};
-
-static int __init ar7_wdt_init(void)
-{
- int rc;
-
- if (!request_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t), LONGNAME)) {
- printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n");
- return -EBUSY;
- }
-
- ar7_wdt_disable_wdt();
- ar7_wdt_prescale(prescale_value);
- ar7_wdt_update_margin(margin);
-
- sema_init(&open_semaphore, 1);
-
- rc = misc_register(&ar7_wdt_miscdev);
- if (rc) {
- printk(KERN_ERR DRVNAME ": unable to register misc device\n");
- goto out_alloc;
- }
-
- rc = register_reboot_notifier(&ar7_wdt_notifier);
- if (rc) {
- printk(KERN_ERR DRVNAME ": unable to register reboot notifier\n");
- goto out_register;
- }
- goto out;
-
-out_register:
- misc_deregister(&ar7_wdt_miscdev);
-out_alloc:
- release_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-out:
- return rc;
-}
-
-static void __exit ar7_wdt_cleanup(void)
-{
- unregister_reboot_notifier(&ar7_wdt_notifier);
- misc_deregister(&ar7_wdt_miscdev);
- release_mem_region(AR7_REGS_WDT, sizeof(ar7_wdt_t));
-}
-
-module_init(ar7_wdt_init);
-module_exit(ar7_wdt_cleanup);
+++ /dev/null
-/*
- * linux/drivers/leds/leds-ar7.c
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-#include <linux/err.h>
-#include <asm/io.h>
-#include <gpio.h>
-
-#define DRVNAME "ar7-leds"
-#define LONGNAME "TI AR7 LEDs driver"
-
-MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
-MODULE_DESCRIPTION(LONGNAME);
-MODULE_LICENSE("GPL");
-
-static void ar7_status_led_set(struct led_classdev *pled,
- enum led_brightness value)
-{
- gpio_set_value(AR7_GPIO_BIT_STATUS_LED, value ? 0 : 1);
-}
-
-static struct led_classdev ar7_status_led = {
- .name = "ar7:status",
- .brightness_set = ar7_status_led_set,
-};
-
-#ifdef CONFIG_PM
-static int ar7_leds_suspend(struct platform_device *dev,
- pm_message_t state)
-{
- led_classdev_suspend(&ar7_status_led);
- return 0;
-}
-
-static int ar7_leds_resume(struct platform_device *dev)
-{
- led_classdev_resume(&ar7_status_led);
- return 0;
-}
-#else /* CONFIG_PM */
-#define ar7_leds_suspend NULL
-#define ar7_leds_resume NULL
-#endif /* CONFIG_PM */
-
-static int ar7_leds_probe(struct platform_device *pdev)
-{
- int rc;
-
- rc = led_classdev_register(&pdev->dev, &ar7_status_led);
- if (rc < 0 )
- goto out;
-
- ar7_gpio_enable(AR7_GPIO_BIT_STATUS_LED);
- gpio_direction_output(AR7_GPIO_BIT_STATUS_LED);
-
-out:
- return rc;
-}
-
-static int ar7_leds_remove(struct platform_device *pdev)
-{
- led_classdev_unregister(&ar7_status_led);
-
- return 0;
-}
-
-static struct platform_device *ar7_leds_device;
-
-static struct platform_driver ar7_leds_driver = {
- .probe = ar7_leds_probe,
- .remove = ar7_leds_remove,
- .suspend = ar7_leds_suspend,
- .resume = ar7_leds_resume,
- .driver = {
- .name = DRVNAME,
- },
-};
-
-static int __init ar7_leds_init(void)
-{
- int rc;
-
- ar7_leds_device = platform_device_alloc(DRVNAME, -1);
- if (!ar7_leds_device)
- return -ENOMEM;
-
- rc = platform_device_add(ar7_leds_device);
- if (rc < 0)
- goto out_put;
-
- rc = platform_driver_register(&ar7_leds_driver);
- if (rc < 0)
- goto out_put;
-
- goto out;
-
-out_put:
- platform_device_put(ar7_leds_device);
-out:
- return rc;
-}
-
-static void __exit ar7_leds_exit(void)
-{
- platform_driver_unregister(&ar7_leds_driver);
- platform_device_unregister(ar7_leds_device);
-}
-
-module_init(ar7_leds_init);
-module_exit(ar7_leds_exit);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * TI AR7 flash partition table.
- * Based on ar7 map by Felix Fietkau.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/bootmem.h>
-#include <linux/squashfs_fs.h>
-
-struct ar7_bin_rec {
- unsigned int checksum;
- unsigned int length;
- unsigned int address;
-};
-
-static struct mtd_partition ar7_parts[5];
-
-static int create_mtd_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- unsigned long origin)
-{
- struct ar7_bin_rec header;
- unsigned int offset, len;
- unsigned int pre_size = master->erasesize, post_size = 0,
- root_offset = 0xe0000;
- int retries = 10;
-
- printk("Parsing AR7 partition map...\n");
-
- ar7_parts[0].name = "loader";
- ar7_parts[0].offset = 0;
- ar7_parts[0].size = master->erasesize;
- ar7_parts[0].mask_flags = MTD_WRITEABLE;
-
- ar7_parts[1].name = "config";
- ar7_parts[1].offset = 0;
- ar7_parts[1].size = master->erasesize;
- ar7_parts[1].mask_flags = 0;
-
- do {
- offset = pre_size;
- master->read(master, offset, sizeof(header), &len, (u_char *)&header);
- if (!strncmp((char *)&header, "TIENV0.8", 8))
- ar7_parts[1].offset = pre_size;
- if (header.checksum == 0xfeedfa42)
- break;
- if (header.checksum == 0xfeed1281)
- break;
- pre_size += master->erasesize;
- } while (retries--);
-
- pre_size = offset;
-
- if (!ar7_parts[1].offset) {
- ar7_parts[1].offset = master->size - master->erasesize;
- post_size = master->erasesize;
- }
-
- switch (header.checksum) {
- case 0xfeedfa42:
- while (header.length) {
- offset += sizeof(header) + header.length;
- master->read(master, offset, sizeof(header),
- &len, (u_char *)&header);
- }
- root_offset = offset + sizeof(header) + 4;
- break;
- case 0xfeed1281:
- while (header.length) {
- offset += sizeof(header) + header.length;
- master->read(master, offset, sizeof(header),
- &len, (u_char *)&header);
- }
- root_offset = offset + sizeof(header) + 4 + 0xff;
- root_offset &= ~(u32)0xff;
- break;
- default:
- printk("Unknown magic: %08x\n", header.checksum);
- break;
- }
-
- master->read(master, root_offset, sizeof(header), &len, (u_char *)&header);
- if (header.checksum != SQUASHFS_MAGIC) {
- root_offset += master->erasesize - 1;
- root_offset &= ~(master->erasesize - 1);
- }
-
- ar7_parts[2].name = "linux";
- ar7_parts[2].offset = pre_size;
- ar7_parts[2].size = master->size - pre_size - post_size;
- ar7_parts[2].mask_flags = 0;
-
- ar7_parts[3].name = "rootfs";
- ar7_parts[3].offset = root_offset;
- ar7_parts[3].size = master->size - root_offset - post_size;
- ar7_parts[3].mask_flags = 0;
-
- *pparts = ar7_parts;
- return 4;
-}
-
-static struct mtd_part_parser ar7_parser = {
- .owner = THIS_MODULE,
- .parse_fn = create_mtd_partitions,
- .name = "ar7part",
-};
-
-static int __init ar7_parser_init(void)
-{
- return register_mtd_parser(&ar7_parser);
-}
-
-module_init(ar7_parser_init);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Felix Fietkau, Eugene Konev");
-MODULE_DESCRIPTION("MTD partitioning for TI AR7");
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/moduleparam.h>
-
-#include <linux/sched.h>
-#include <linux/kernel.h> /* printk() */
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-#include <linux/version.h>
-
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/ethtool.h>
-#include <linux/skbuff.h>
-#include <linux/mii.h>
-#include <linux/phy.h>
-#include <linux/platform_device.h>
-#include <asm/ar7/ar7.h>
-#include <gpio.h>
-
-MODULE_AUTHOR("Eugene Konev");
-MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
-MODULE_LICENSE("GPL");
-
-static int rx_ring_size = 64;
-static int disable_napi = 0;
-module_param(rx_ring_size, int, 64);
-module_param(disable_napi, int, 0);
-MODULE_PARM_DESC(rx_ring_size, "Size of rx ring (in skbs)");
-MODULE_PARM_DESC(disable_napi, "Disable NAPI polling");
-
-/* Register definitions */
-struct cpmac_control_regs {
- volatile u32 revision;
- volatile u32 control;
- volatile u32 teardown;
- volatile u32 unused;
-} __attribute__ ((packed));
-
-struct cpmac_int_regs {
- volatile u32 stat_raw;
- volatile u32 stat_masked;
- volatile u32 enable;
- volatile u32 clear;
-} __attribute__ ((packed));
-
-struct cpmac_stats {
- volatile u32 good;
- volatile u32 bcast;
- volatile u32 mcast;
- volatile u32 pause;
- volatile u32 crc_error;
- volatile u32 align_error;
- volatile u32 oversized;
- volatile u32 jabber;
- volatile u32 undersized;
- volatile u32 fragment;
- volatile u32 filtered;
- volatile u32 qos_filtered;
- volatile u32 octets;
-} __attribute__ ((packed));
-
-struct cpmac_regs {
- struct cpmac_control_regs tx_ctrl;
- struct cpmac_control_regs rx_ctrl;
- volatile u32 unused1[56];
- volatile u32 mbp;
-/* MBP bits */
-#define MBP_RXPASSCRC 0x40000000
-#define MBP_RXQOS 0x20000000
-#define MBP_RXNOCHAIN 0x10000000
-#define MBP_RXCMF 0x01000000
-#define MBP_RXSHORT 0x00800000
-#define MBP_RXCEF 0x00400000
-#define MBP_RXPROMISC 0x00200000
-#define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
-#define MBP_RXBCAST 0x00002000
-#define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
-#define MBP_RXMCAST 0x00000020
-#define MBP_MCASTCHAN(chan) ((chan) & 0x7)
- volatile u32 unicast_enable;
- volatile u32 unicast_clear;
- volatile u32 max_len;
- volatile u32 buffer_offset;
- volatile u32 filter_flow_threshold;
- volatile u32 unused2[2];
- volatile u32 flow_thre[8];
- volatile u32 free_buffer[8];
- volatile u32 mac_control;
-#define MAC_TXPTYPE 0x00000200
-#define MAC_TXPACE 0x00000040
-#define MAC_MII 0x00000020
-#define MAC_TXFLOW 0x00000010
-#define MAC_RXFLOW 0x00000008
-#define MAC_MTEST 0x00000004
-#define MAC_LOOPBACK 0x00000002
-#define MAC_FDX 0x00000001
- volatile u32 mac_status;
-#define MACST_QOS 0x4
-#define MACST_RXFLOW 0x2
-#define MACST_TXFLOW 0x1
- volatile u32 emc_control;
- volatile u32 unused3;
- struct cpmac_int_regs tx_int;
- volatile u32 mac_int_vector;
-/* Int Status bits */
-#define INTST_STATUS 0x80000
-#define INTST_HOST 0x40000
-#define INTST_RX 0x20000
-#define INTST_TX 0x10000
- volatile u32 mac_eoi_vector;
- volatile u32 unused4[2];
- struct cpmac_int_regs rx_int;
- volatile u32 mac_int_stat_raw;
- volatile u32 mac_int_stat_masked;
- volatile u32 mac_int_enable;
- volatile u32 mac_int_clear;
- volatile u32 mac_addr_low[8];
- volatile u32 mac_addr_mid;
- volatile u32 mac_addr_high;
- volatile u32 mac_hash_low;
- volatile u32 mac_hash_high;
- volatile u32 boff_test;
- volatile u32 pac_test;
- volatile u32 rx_pause;
- volatile u32 tx_pause;
- volatile u32 unused5[2];
- struct cpmac_stats rx_stats;
- struct cpmac_stats tx_stats;
- volatile u32 unused6[232];
- volatile u32 tx_ptr[8];
- volatile u32 rx_ptr[8];
- volatile u32 tx_ack[8];
- volatile u32 rx_ack[8];
-
-} __attribute__ ((packed));
-
-struct cpmac_mdio_regs {
- volatile u32 version;
- volatile u32 control;
-#define MDIOC_IDLE 0x80000000
-#define MDIOC_ENABLE 0x40000000
-#define MDIOC_PREAMBLE 0x00100000
-#define MDIOC_FAULT 0x00080000
-#define MDIOC_FAULTDETECT 0x00040000
-#define MDIOC_INTTEST 0x00020000
-#define MDIOC_CLKDIV(div) ((div) & 0xff)
- volatile u32 alive;
- volatile u32 link;
- struct cpmac_int_regs link_int;
- struct cpmac_int_regs user_int;
- u32 unused[20];
- volatile u32 access;
-#define MDIO_BUSY 0x80000000
-#define MDIO_WRITE 0x40000000
-#define MDIO_REG(reg) (((reg) & 0x1f) << 21)
-#define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
-#define MDIO_DATA(data) ((data) & 0xffff)
- volatile u32 physel;
-} __attribute__ ((packed));
-
-/* Descriptor */
-struct cpmac_desc {
- u32 hw_next;
- u32 hw_data;
- u16 buflen;
- u16 bufflags;
- u16 datalen;
- u16 dataflags;
-/* Flags bits */
-#define CPMAC_SOP 0x8000
-#define CPMAC_EOP 0x4000
-#define CPMAC_OWN 0x2000
-#define CPMAC_EOQ 0x1000
- struct sk_buff *skb;
- struct cpmac_desc *next;
-} __attribute__ ((packed));
-
-struct cpmac_priv {
- struct net_device_stats stats;
- spinlock_t lock;
- struct sk_buff *skb_pool;
- int free_skbs;
- struct cpmac_desc *rx_head;
- int tx_head, tx_tail;
- struct cpmac_desc *desc_ring;
- struct cpmac_regs *regs;
- struct mii_bus *mii_bus;
- struct phy_device *phy;
- char phy_name[BUS_ID_SIZE];
- struct plat_cpmac_data *config;
- int oldlink, oldspeed, oldduplex;
- u32 msg_enable;
- struct net_device *dev;
- struct work_struct alloc_work;
-};
-
-static irqreturn_t cpmac_irq(int, void *);
-static void cpmac_reset(struct net_device *dev);
-static void cpmac_hw_init(struct net_device *dev);
-static int cpmac_stop(struct net_device *dev);
-static int cpmac_open(struct net_device *dev);
-
-#undef CPMAC_DEBUG
-#define CPMAC_LOW_THRESH 32
-#define CPMAC_ALLOC_SIZE 64
-#define CPMAC_SKB_SIZE 1518
-#define CPMAC_TX_RING_SIZE 8
-
-#ifdef CPMAC_DEBUG
-static void cpmac_dump_regs(u32 *base, int count)
-{
- int i;
- for (i = 0; i < (count + 3) / 4; i++) {
- if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4);
- printk(" 0x%08x", *(base + i));
- }
- printk("\n");
-}
-
-static const char *cpmac_dump_buf(const uint8_t * buf, unsigned size)
-{
- static char buffer[3 * 25 + 1];
- char *p = &buffer[0];
- if (size > 20)
- size = 20;
- while (size-- > 0) {
- p += sprintf(p, " %02x", *buf++);
- }
- return buffer;
-}
-#endif
-
-static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
-{
- struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
- volatile u32 val;
-
- while ((val = regs->access) & MDIO_BUSY);
- regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) |
- MDIO_PHY(phy_id & 0x1f);
- while ((val = regs->access) & MDIO_BUSY);
-
- return val & 0xffff;
-}
-
-static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
-{
- struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
- volatile u32 tmp;
-
- while ((tmp = regs->access) & MDIO_BUSY);
- regs->access = MDIO_BUSY | MDIO_WRITE |
- MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) |
- val;
-
- return 0;
-}
-
-static int cpmac_mdio_reset(struct mii_bus *bus)
-{
- struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
-
- ar7_device_reset(AR7_RESET_BIT_MDIO);
- regs->control = MDIOC_ENABLE |
- MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
-
- return 0;
-}
-
-static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
-
-static struct mii_bus cpmac_mii = {
- .name = "cpmac-mii",
- .read = cpmac_mdio_read,
- .write = cpmac_mdio_write,
- .reset = cpmac_mdio_reset,
- .irq = mii_irqs,
-};
-
-static int cpmac_config(struct net_device *dev, struct ifmap *map)
-{
- if (dev->flags & IFF_UP)
- return -EBUSY;
-
- /* Don't allow changing the I/O address */
- if (map->base_addr != dev->base_addr)
- return -EOPNOTSUPP;
-
- /* ignore other fields */
- return 0;
-}
-
-static int cpmac_set_mac_address(struct net_device *dev, void *addr)
-{
- struct sockaddr *sa = addr;
-
- if (dev->flags & IFF_UP)
- return -EBUSY;
-
- memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
-
- return 0;
-}
-
-static void cpmac_set_multicast_list(struct net_device *dev)
-{
- struct dev_mc_list *iter;
- int i;
- int hash, tmp;
- int hashlo = 0, hashhi = 0;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if(dev->flags & IFF_PROMISC) {
- priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
- priv->regs->mbp |= MBP_RXPROMISC;
- } else {
- priv->regs->mbp &= ~MBP_RXPROMISC;
- if(dev->flags & IFF_ALLMULTI) {
- /* enable all multicast mode */
- priv->regs->mac_hash_low = 0xffffffff;
- priv->regs->mac_hash_high = 0xffffffff;
- } else {
- for(i = 0, iter = dev->mc_list; i < dev->mc_count;
- i++, iter = iter->next) {
- hash = 0;
- tmp = iter->dmi_addr[0];
- hash ^= (tmp >> 2) ^ (tmp << 4);
- tmp = iter->dmi_addr[1];
- hash ^= (tmp >> 4) ^ (tmp << 2);
- tmp = iter->dmi_addr[2];
- hash ^= (tmp >> 6) ^ tmp;
- tmp = iter->dmi_addr[4];
- hash ^= (tmp >> 2) ^ (tmp << 4);
- tmp = iter->dmi_addr[5];
- hash ^= (tmp >> 4) ^ (tmp << 2);
- tmp = iter->dmi_addr[6];
- hash ^= (tmp >> 6) ^ tmp;
- hash &= 0x3f;
- if(hash < 32) {
- hashlo |= 1<<hash;
- } else {
- hashhi |= 1<<(hash - 32);
- }
- }
-
- priv->regs->mac_hash_low = hashlo;
- priv->regs->mac_hash_high = hashhi;
- }
- }
-}
-
-static struct sk_buff *cpmac_get_skb(struct net_device *dev)
-{
- struct sk_buff *skb;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- skb = priv->skb_pool;
- if (likely(skb)) {
- priv->skb_pool = skb->next;
- } else {
- skb = dev_alloc_skb(CPMAC_SKB_SIZE + 2);
- if (skb) {
- skb->next = NULL;
- skb_reserve(skb, 2);
- skb->dev = priv->dev;
- }
- }
-
- if (likely(priv->free_skbs))
- priv->free_skbs--;
-
- if (priv->free_skbs < CPMAC_LOW_THRESH)
- schedule_work(&priv->alloc_work);
-
- return skb;
-}
-
-static inline struct sk_buff *cpmac_rx_one(struct net_device *dev,
- struct cpmac_priv *priv,
- struct cpmac_desc *desc)
-{
- unsigned long flags;
- char *data;
- struct sk_buff *skb, *result = NULL;
-
- priv->regs->rx_ack[0] = virt_to_phys(desc);
- if (unlikely(!desc->datalen)) {
- if (printk_ratelimit())
- printk(KERN_WARNING "%s: rx: spurious interrupt\n",
- dev->name);
- priv->stats.rx_errors++;
- return NULL;
- }
-
- spin_lock_irqsave(&priv->lock, flags);
- skb = cpmac_get_skb(dev);
- if (likely(skb)) {
- data = (char *)phys_to_virt(desc->hw_data);
- dma_cache_inv((u32)data, desc->datalen);
- skb_put(desc->skb, desc->datalen);
- desc->skb->protocol = eth_type_trans(desc->skb, dev);
- desc->skb->ip_summed = CHECKSUM_NONE;
- priv->stats.rx_packets++;
- priv->stats.rx_bytes += desc->datalen;
- result = desc->skb;
- desc->skb = skb;
- } else {
-#ifdef CPMAC_DEBUG
- if (printk_ratelimit())
- printk("%s: low on skbs, dropping packet\n",
- dev->name);
-#endif
- priv->stats.rx_dropped++;
- }
- spin_unlock_irqrestore(&priv->lock, flags);
-
- desc->hw_data = virt_to_phys(desc->skb->data);
- desc->buflen = CPMAC_SKB_SIZE;
- desc->dataflags = CPMAC_OWN;
- dma_cache_wback((u32)desc, 16);
-
- return result;
-}
-
-static void cpmac_rx(struct net_device *dev)
-{
- struct sk_buff *skb;
- struct cpmac_desc *desc;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- spin_lock(&priv->lock);
- if (unlikely(!priv->rx_head)) {
- spin_unlock(&priv->lock);
- return;
- }
-
- desc = priv->rx_head;
- dma_cache_inv((u32)desc, 16);
-#ifdef CPMAC_DEBUG
- printk(KERN_DEBUG "%s: len=%d, %s\n", __func__, pkt->datalen,
- cpmac_dump_buf(data, pkt->datalen));
-#endif
-
- while ((desc->dataflags & CPMAC_OWN) == 0) {
- skb = cpmac_rx_one(dev, priv, desc);
- if (likely(skb)) {
- netif_rx(skb);
- }
- desc = desc->next;
- dma_cache_inv((u32)desc, 16);
- }
-
- priv->rx_head = desc;
- priv->regs->rx_ptr[0] = virt_to_phys(desc);
- spin_unlock(&priv->lock);
-}
-
-static int cpmac_poll(struct net_device *dev, int *budget)
-{
- struct sk_buff *skb;
- struct cpmac_desc *desc;
- int received = 0, quota = min(dev->quota, *budget);
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if (unlikely(!priv->rx_head)) {
- if (printk_ratelimit())
- printk(KERN_WARNING "%s: rx: polling, but no queue\n",
- dev->name);
- netif_rx_complete(dev);
- return 0;
- }
-
- desc = priv->rx_head;
- dma_cache_inv((u32)desc, 16);
-
- while ((received < quota) && ((desc->dataflags & CPMAC_OWN) == 0)) {
- skb = cpmac_rx_one(dev, priv, desc);
- if (likely(skb)) {
- netif_receive_skb(skb);
- received++;
- }
- desc = desc->next;
- priv->rx_head = desc;
- dma_cache_inv((u32)desc, 16);
- }
-
- *budget -= received;
- dev->quota -= received;
-#ifdef CPMAC_DEBUG
- printk("%s: processed %d packets\n", dev->name, received);
-#endif
- if (desc->dataflags & CPMAC_OWN) {
- priv->regs->rx_ptr[0] = virt_to_phys(desc);
- netif_rx_complete(dev);
- priv->regs->rx_int.enable = 0x1;
- priv->regs->rx_int.clear = 0xfe;
- return 0;
- }
-
- return 1;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
-static void
-cpmac_alloc_skbs(struct work_struct *work)
-{
- struct cpmac_priv *priv = container_of(work, struct cpmac_priv,
- alloc_work);
-#else
-static void
-cpmac_alloc_skbs(void *data)
-{
- struct net_device *dev = (struct net_device*)data;
- struct cpmac_priv *priv = netdev_priv(dev);
-#endif
- unsigned long flags;
- int i, num_skbs = 0;
- struct sk_buff *skb, *skbs = NULL;
-
- for (i = 0; i < CPMAC_ALLOC_SIZE; i++) {
- skb = alloc_skb(CPMAC_SKB_SIZE + 2, GFP_KERNEL);
- if (!skb)
- break;
- skb->next = skbs;
- skb_reserve(skb, 2);
- skb->dev = priv->dev;
- num_skbs++;
- skbs = skb;
- }
-
- if (skbs) {
- spin_lock_irqsave(&priv->lock, flags);
- for (skb = priv->skb_pool; skb && skb->next; skb = skb->next);
- if (!skb) {
- priv->skb_pool = skbs;
- } else {
- skb->next = skbs;
- }
- priv->free_skbs += num_skbs;
- spin_unlock_irqrestore(&priv->lock, flags);
-#ifdef CPMAC_DEBUG
- printk("%s: allocated %d skbs\n", priv->dev->name, num_skbs);
-#endif
- }
-}
-
-static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- unsigned long flags;
- int len, chan;
- struct cpmac_desc *desc;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- len = skb->len;
-#ifdef CPMAC_DEBUG
- printk(KERN_DEBUG "%s: len=%d\n", __func__, len); //cpmac_dump_buf(const uint8_t * buf, unsigned size)
-#endif
- if (unlikely(len < ETH_ZLEN)) {
- if (unlikely(skb_padto(skb, ETH_ZLEN))) {
- if (printk_ratelimit())
- printk(KERN_NOTICE "%s: padding failed, dropping\n",
- dev->name);
- spin_lock_irqsave(&priv->lock, flags);
- priv->stats.tx_dropped++;
- spin_unlock_irqrestore(&priv->lock, flags);
- return -ENOMEM;
- }
- len = ETH_ZLEN;
- }
- spin_lock_irqsave(&priv->lock, flags);
- chan = priv->tx_tail++;
- priv->tx_tail %= 8;
- if (priv->tx_tail == priv->tx_head)
- netif_stop_queue(dev);
-
- desc = &priv->desc_ring[chan];
- dma_cache_inv((u32)desc, 16);
- if (desc->dataflags & CPMAC_OWN) {
- printk(KERN_NOTICE "%s: tx dma ring full, dropping\n", dev->name);
- priv->stats.tx_dropped++;
- spin_unlock_irqrestore(&priv->lock, flags);
- return -ENOMEM;
- }
-
- dev->trans_start = jiffies;
- desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN;
- desc->skb = skb;
- desc->hw_data = virt_to_phys(skb->data);
- dma_cache_wback((u32)skb->data, len);
- desc->buflen = len;
- desc->datalen = len;
- desc->hw_next = 0;
- dma_cache_wback((u32)desc, 16);
- priv->regs->tx_ptr[chan] = virt_to_phys(desc);
- spin_unlock_irqrestore(&priv->lock, flags);
-
- return 0;
-}
-
-static void cpmac_end_xmit(struct net_device *dev, int channel)
-{
- struct cpmac_desc *desc;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- spin_lock(&priv->lock);
- desc = &priv->desc_ring[channel];
- priv->regs->tx_ack[channel] = virt_to_phys(desc);
- if (likely(desc->skb)) {
- priv->stats.tx_packets++;
- priv->stats.tx_bytes += desc->skb->len;
- dev_kfree_skb_irq(desc->skb);
- if (netif_queue_stopped(dev))
- netif_wake_queue(dev);
- } else {
- if (printk_ratelimit())
- printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n",
- dev->name);
- }
- spin_unlock(&priv->lock);
-}
-
-static void cpmac_reset(struct net_device *dev)
-{
- int i;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- ar7_device_reset(priv->config->reset_bit);
- priv->regs->rx_ctrl.control &= ~1;
- priv->regs->tx_ctrl.control &= ~1;
- for (i = 0; i < 8; i++) {
- priv->regs->tx_ptr[i] = 0;
- priv->regs->rx_ptr[i] = 0;
- }
- priv->regs->mac_control &= ~MAC_MII; /* disable mii */
-}
-
-static inline void cpmac_free_rx_ring(struct net_device *dev)
-{
- struct cpmac_desc *desc;
- int i;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if (unlikely(!priv->rx_head))
- return;
-
- desc = priv->rx_head;
- dma_cache_inv((u32)desc, 16);
-
- for (i = 0; i < rx_ring_size; i++) {
- desc->buflen = CPMAC_SKB_SIZE;
- if ((desc->dataflags & CPMAC_OWN) == 0) {
- desc->dataflags = CPMAC_OWN;
- priv->stats.rx_dropped++;
- }
- dma_cache_wback((u32)desc, 16);
- desc = desc->next;
- dma_cache_inv((u32)desc, 16);
- }
-}
-
-static irqreturn_t cpmac_irq(int irq, void *dev_id)
-{
- struct net_device *dev = (struct net_device *)dev_id;
- struct cpmac_priv *priv = netdev_priv(dev);
- u32 status;
-
- if (!dev)
- return IRQ_NONE;
-
- status = priv->regs->mac_int_vector;
-
- if (status & INTST_TX) {
- cpmac_end_xmit(dev, (status & 7));
- }
-
- if (status & INTST_RX) {
- if (disable_napi) {
- cpmac_rx(dev);
- } else {
- priv->regs->rx_int.enable = 0;
- priv->regs->rx_int.clear = 0xff;
- netif_rx_schedule(dev);
- }
- }
-
- priv->regs->mac_eoi_vector = 0;
-
- if (unlikely(status & (INTST_HOST | INTST_STATUS))) {
- if (printk_ratelimit()) {
- printk(KERN_ERR "%s: hw error, resetting...\n", dev->name);
- }
- spin_lock(&priv->lock);
- phy_stop(priv->phy);
- cpmac_reset(dev);
- cpmac_free_rx_ring(dev);
- cpmac_hw_init(dev);
- spin_unlock(&priv->lock);
- }
-
- return IRQ_HANDLED;
-}
-
-static void cpmac_tx_timeout(struct net_device *dev)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
- struct cpmac_desc *desc;
-
- priv->stats.tx_errors++;
- desc = &priv->desc_ring[priv->tx_head++];
- priv->tx_head %= 8;
- printk("%s: transmit timeout\n", dev->name);
- if (desc->skb)
- dev_kfree_skb(desc->skb);
- netif_wake_queue(dev);
-}
-
-static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
- if (!(netif_running(dev)))
- return -EINVAL;
- if (!priv->phy)
- return -EINVAL;
- if ((cmd == SIOCGMIIPHY) || (cmd == SIOCGMIIREG) ||
- (cmd == SIOCSMIIREG))
- return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
-
- return -EINVAL;
-}
-
-static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if (priv->phy)
- return phy_ethtool_gset(priv->phy, cmd);
-
- return -EINVAL;
-}
-
-static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- if (priv->phy)
- return phy_ethtool_sset(priv->phy, cmd);
-
- return -EINVAL;
-}
-
-static void cpmac_get_drvinfo(struct net_device *dev,
- struct ethtool_drvinfo *info)
-{
- strcpy(info->driver, "cpmac");
- strcpy(info->version, "0.0.3");
- info->fw_version[0] = '\0';
- sprintf(info->bus_info, "%s", "cpmac");
- info->regdump_len = 0;
-}
-
-static const struct ethtool_ops cpmac_ethtool_ops = {
- .get_settings = cpmac_get_settings,
- .set_settings = cpmac_set_settings,
- .get_drvinfo = cpmac_get_drvinfo,
- .get_link = ethtool_op_get_link,
-};
-
-static struct net_device_stats *cpmac_stats(struct net_device *dev)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
-
- if (netif_device_present(dev))
- return &priv->stats;
-
- return NULL;
-}
-
-static int cpmac_change_mtu(struct net_device *dev, int mtu)
-{
- unsigned long flags;
- struct cpmac_priv *priv = netdev_priv(dev);
- spinlock_t *lock = &priv->lock;
-
- if ((mtu < 68) || (mtu > 1500))
- return -EINVAL;
-
- spin_lock_irqsave(lock, flags);
- dev->mtu = mtu;
- spin_unlock_irqrestore(lock, flags);
-
- return 0;
-}
-
-static void cpmac_adjust_link(struct net_device *dev)
-{
- struct cpmac_priv *priv = netdev_priv(dev);
- unsigned long flags;
- int new_state = 0;
-
- spin_lock_irqsave(&priv->lock, flags);
- if (priv->phy->link) {
- if (priv->phy->duplex != priv->oldduplex) {
- new_state = 1;
- priv->oldduplex = priv->phy->duplex;
- }
-
- if (priv->phy->speed != priv->oldspeed) {
- new_state = 1;
- priv->oldspeed = priv->phy->speed;
- }
-
- if (!priv->oldlink) {
- new_state = 1;
- priv->oldlink = 1;
- netif_schedule(dev);
- }
- } else if (priv->oldlink) {
- new_state = 1;
- priv->oldlink = 0;
- priv->oldspeed = 0;
- priv->oldduplex = -1;
- }
-
- if (new_state)
- phy_print_status(priv->phy);
-
- spin_unlock_irqrestore(&priv->lock, flags);
-}
-
-static void cpmac_hw_init(struct net_device *dev)
-{
- int i;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- for (i = 0; i < 8; i++)
- priv->regs->tx_ptr[i] = 0;
- priv->regs->rx_ptr[0] = virt_to_phys(priv->rx_head);
-
- priv->regs->mbp = MBP_RXSHORT | MBP_RXBCAST | MBP_RXMCAST;
- priv->regs->unicast_enable = 0x1;
- priv->regs->unicast_clear = 0xfe;
- priv->regs->buffer_offset = 0;
- for (i = 0; i < 8; i++)
- priv->regs->mac_addr_low[i] = dev->dev_addr[5];
- priv->regs->mac_addr_mid = dev->dev_addr[4];
- priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8)
- | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
- priv->regs->max_len = CPMAC_SKB_SIZE;
- priv->regs->rx_int.enable = 0x1;
- priv->regs->rx_int.clear = 0xfe;
- priv->regs->tx_int.enable = 0xff;
- priv->regs->tx_int.clear = 0;
- priv->regs->mac_int_enable = 3;
- priv->regs->mac_int_clear = 0xfc;
-
- priv->regs->rx_ctrl.control |= 1;
- priv->regs->tx_ctrl.control |= 1;
- priv->regs->mac_control |= MAC_MII | MAC_FDX;
-
- priv->phy->state = PHY_CHANGELINK;
- phy_start(priv->phy);
-}
-
-static int cpmac_open(struct net_device *dev)
-{
- int i, size, res;
- struct cpmac_priv *priv = netdev_priv(dev);
- struct cpmac_desc *desc;
- struct sk_buff *skb;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
- priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
- 0, PHY_INTERFACE_MODE_MII);
-#else
- priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0);
-#endif
- if (IS_ERR(priv->phy)) {
- printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
- return PTR_ERR(priv->phy);
- }
-
- if (!request_mem_region(dev->mem_start, dev->mem_end -
- dev->mem_start, dev->name)) {
- printk("%s: failed to request registers\n",
- dev->name);
- res = -ENXIO;
- goto fail_reserve;
- }
-
- priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end -
- dev->mem_start);
- if (!priv->regs) {
- printk("%s: failed to remap registers\n", dev->name);
- res = -ENXIO;
- goto fail_remap;
- }
-
- priv->rx_head = NULL;
- size = sizeof(struct cpmac_desc) * (rx_ring_size +
- CPMAC_TX_RING_SIZE);
- priv->desc_ring = (struct cpmac_desc *)kmalloc(size, GFP_KERNEL);
- if (!priv->desc_ring) {
- res = -ENOMEM;
- goto fail_alloc;
- }
-
- memset((char *)priv->desc_ring, 0, size);
-
- priv->skb_pool = NULL;
- priv->free_skbs = 0;
- priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
- INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs);
-#else
- INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs, dev);
-#endif
- schedule_work(&priv->alloc_work);
- flush_scheduled_work();
-
- for (i = 0; i < rx_ring_size; i++) {
- desc = &priv->rx_head[i];
- skb = cpmac_get_skb(dev);
- if (!skb) {
- res = -ENOMEM;
- goto fail_desc;
- }
- desc->skb = skb;
- desc->hw_data = virt_to_phys(skb->data);
- desc->buflen = CPMAC_SKB_SIZE;
- desc->dataflags = CPMAC_OWN;
- desc->next = &priv->rx_head[(i + 1) % rx_ring_size];
- desc->hw_next = virt_to_phys(desc->next);
- dma_cache_wback((u32)desc, 16);
- }
-
- if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT,
- dev->name, dev))) {
- printk("%s: failed to obtain irq\n", dev->name);
- goto fail_irq;
- }
-
- cpmac_reset(dev);
- cpmac_hw_init(dev);
-
- netif_start_queue(dev);
- return 0;
-
-fail_irq:
-fail_desc:
- for (i = 0; i < rx_ring_size; i++)
- if (priv->rx_head[i].skb)
- kfree_skb(priv->rx_head[i].skb);
-fail_alloc:
- kfree(priv->desc_ring);
-
- for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
- priv->skb_pool = skb->next;
- kfree_skb(skb);
- }
-
- iounmap(priv->regs);
-
-fail_remap:
- release_mem_region(dev->mem_start, dev->mem_end -
- dev->mem_start);
-
-fail_reserve:
- phy_disconnect(priv->phy);
-
- return res;
-}
-
-static int cpmac_stop(struct net_device *dev)
-{
- int i;
- struct sk_buff *skb;
- struct cpmac_priv *priv = netdev_priv(dev);
-
- netif_stop_queue(dev);
-
- phy_stop(priv->phy);
- phy_disconnect(priv->phy);
- priv->phy = NULL;
-
- cpmac_reset(dev);
-
- for (i = 0; i < 8; i++) {
- priv->regs->rx_ptr[i] = 0;
- priv->regs->tx_ptr[i] = 0;
- priv->regs->mbp = 0;
- }
-
- free_irq(dev->irq, dev);
- release_mem_region(dev->mem_start, dev->mem_end -
- dev->mem_start);
-
- cancel_delayed_work(&priv->alloc_work);
- flush_scheduled_work();
-
- priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
- for (i = 0; i < rx_ring_size; i++)
- if (priv->rx_head[i].skb)
- kfree_skb(priv->rx_head[i].skb);
-
- kfree(priv->desc_ring);
-
- for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
- priv->skb_pool = skb->next;
- kfree_skb(skb);
- }
-
- return 0;
-}
-
-static int external_switch = 0;
-
-static int __devinit cpmac_probe(struct platform_device *pdev)
-{
- int i, rc, phy_id;
- struct resource *res;
- struct cpmac_priv *priv;
- struct net_device *dev;
- struct plat_cpmac_data *pdata;
-
- if (strcmp(pdev->name, "cpmac") != 0)
- return -ENODEV;
-
- pdata = pdev->dev.platform_data;
-
- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
- if (!(pdata->phy_mask & (1 << phy_id)))
- continue;
- if (!cpmac_mii.phy_map[phy_id])
- continue;
- break;
- }
-
- if (phy_id == PHY_MAX_ADDR) {
- if (external_switch) {
- phy_id = 0;
- } else {
- printk("cpmac: no PHY present\n");
- return -ENODEV;
- }
- }
-
- dev = alloc_etherdev(sizeof(struct cpmac_priv));
-
- if (!dev) {
- printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n");
- return -ENOMEM;
- }
-
- SET_MODULE_OWNER(dev);
- platform_set_drvdata(pdev, dev);
- priv = netdev_priv(dev);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
- if (!res) {
- rc = -ENODEV;
- goto fail;
- }
-
- dev->mem_start = res->start;
- dev->mem_end = res->end;
- dev->irq = platform_get_irq_byname(pdev, "irq");
-
- dev->mtu = 1500;
- dev->open = cpmac_open;
- dev->stop = cpmac_stop;
- dev->set_config = cpmac_config;
- dev->hard_start_xmit = cpmac_start_xmit;
- dev->do_ioctl = cpmac_ioctl;
- dev->get_stats = cpmac_stats;
- dev->change_mtu = cpmac_change_mtu;
- dev->set_mac_address = cpmac_set_mac_address;
- dev->set_multicast_list = cpmac_set_multicast_list;
- dev->tx_timeout = cpmac_tx_timeout;
- dev->ethtool_ops = &cpmac_ethtool_ops;
- if (!disable_napi) {
- dev->poll = cpmac_poll;
- dev->weight = min(rx_ring_size, 64);
- }
-
- memset(priv, 0, sizeof(struct cpmac_priv));
- spin_lock_init(&priv->lock);
- priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
- priv->config = pdata;
- priv->dev = dev;
- memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr));
- if (phy_id == 31) {
- snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
- cpmac_mii.id, phy_id);
- } else {
- snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
- }
-
- if ((rc = register_netdev(dev))) {
- printk("cpmac: error %i registering device %s\n",
- rc, dev->name);
- goto fail;
- }
-
- printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
- dev->name, (u32 *)dev->mem_start, dev->irq,
- priv->phy_name);
- for (i = 0; i < 6; i++) {
- printk("%02x", dev->dev_addr[i]);
- if (i < 5) printk(":");
- else printk(")\n");
- }
-
- return 0;
-
-fail:
- free_netdev(dev);
- return rc;
-}
-
-static int __devexit cpmac_remove(struct platform_device *pdev)
-{
- struct net_device *dev = platform_get_drvdata(pdev);
- unregister_netdev(dev);
- free_netdev(dev);
- return 0;
-}
-
-static struct platform_driver cpmac_driver = {
- .driver.name = "cpmac",
- .probe = cpmac_probe,
- .remove = cpmac_remove,
-};
-
-int __devinit cpmac_init(void)
-{
- volatile u32 mask;
- int i, res;
- cpmac_mii.priv = (struct cpmac_mdio_regs *)
- ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs));
-
- if (!cpmac_mii.priv) {
- printk("Can't ioremap mdio registers\n");
- return -ENXIO;
- }
-
-#warning FIXME: unhardcode gpio&reset bits
- ar7_gpio_disable(26);
- ar7_gpio_disable(27);
- ar7_device_reset(17);
- ar7_device_reset(21);
- ar7_device_reset(26);
-
- cpmac_mii.reset(&cpmac_mii);
-
- for (i = 0; i < 300000; i++) {
- mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive;
- if (mask)
- break;
- }
-
- mask &= 0x7fffffff;
- if (mask & (mask - 1)) {
- external_switch = 1;
- mask = 0;
- }
-
- cpmac_mii.phy_mask = ~(mask | 0x80000000);
-
- res = mdiobus_register(&cpmac_mii);
- if (res)
- goto fail_mii;
-
- res = platform_driver_register(&cpmac_driver);
- if (res)
- goto fail_cpmac;
-
- return 0;
-
-fail_cpmac:
- mdiobus_unregister(&cpmac_mii);
-
-fail_mii:
- iounmap(cpmac_mii.priv);
-
- return res;
-}
-
-void __devexit cpmac_exit(void)
-{
- platform_driver_unregister(&cpmac_driver);
- mdiobus_unregister(&cpmac_mii);
-}
-
-module_init(cpmac_init);
-module_exit(cpmac_exit);
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef __AR7_H__
-#define __AR7_H__
-
-#include <linux/delay.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-
-#define AR7_REGS_BASE 0x08610000
-
-#define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000)
-#define AR7_REGS_EMIF (AR7_REGS_BASE + 0x0800)
-#define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900)
-#define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00)
-#define AR7_REGS_WDT (AR7_REGS_BASE + 0x0b00)
-#define AR7_REGS_TIMER0 (AR7_REGS_BASE + 0x0c00)
-#define AR7_REGS_TIMER1 (AR7_REGS_BASE + 0x0d00)
-#define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00)
-#define AR7_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
-#define AR7_REGS_I2C (AR7_REGS_BASE + 0x1000)
-#define AR7_REGS_USB (AR7_REGS_BASE + 0x1200)
-#define AR7_REGS_DMA (AR7_REGS_BASE + 0x1400)
-#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
-#define AR7_REGS_BIST (AR7_REGS_BASE + 0x1700)
-#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
-#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1A00)
-#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1C00)
-#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1E00)
-#define AR7_REGS_FSER (AR7_REGS_BASE + 0x2000)
-#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
-#define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800)
-
-#define AR7_RESET_PEREPHERIAL 0x0
-#define AR7_RESET_SOFTWARE 0x4
-#define AR7_RESET_STATUS 0x8
-
-#define AR7_RESET_BIT_MDIO 22
-
-/* GPIO control registers */
-#define AR7_GPIO_INPUT 0x0
-#define AR7_GPIO_OUTPUT 0x4
-#define AR7_GPIO_DIR 0x8
-#define AR7_GPIO_ENABLE 0xC
-
-#define AR7_GPIO_BIT_STATUS_LED 8
-
-#define AR7_CHIP_7100 0x18
-#define AR7_CHIP_7200 0x2b
-#define AR7_CHIP_7300 0x05
-
-/* Interrupts */
-#define AR7_IRQ_UART0 15
-#define AR7_IRQ_UART1 16
-
-struct plat_cpmac_data {
- int reset_bit;
- int power_bit;
- u32 phy_mask;
- char dev_addr[6];
-};
-
-struct plat_dsl_data {
- int reset_bit_dsl;
- int reset_bit_sar;
-};
-
-extern char *prom_getenv(char *envname);
-
-extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock;
-
-static inline u16 ar7_chip_id(void)
-{
- return readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff;
-}
-
-static inline u8 ar7_chip_rev(void)
-{
- return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff;
-}
-
-static inline int ar7_cpu_freq(void)
-{
- return ar7_cpu_clock;
-}
-
-static inline int ar7_bus_freq(void)
-{
- return ar7_bus_clock;
-}
-
-static inline int ar7_vbus_freq(void)
-{
- return ar7_bus_clock / 2;
-}
-#define ar7_cpmac_freq ar7_vbus_freq
-
-static inline int ar7_dsp_freq(void)
-{
- return ar7_dsp_clock;
-}
-
-static inline int ar7_has_high_cpmac(void)
-{
- u16 chip_id = ar7_chip_id();
- switch (chip_id) {
- case AR7_CHIP_7100:
- case AR7_CHIP_7200:
- return 0;
- default:
- return 1;
- }
-}
-#define ar7_has_high_vlynq ar7_has_high_cpmac
-
-static inline void ar7_device_enable(u32 bit)
-{
- void *reset_reg = (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
- writel(readl(reset_reg) | (1 << bit), reset_reg);
- mdelay(20);
-}
-
-static inline void ar7_device_disable(u32 bit)
-{
- void *reset_reg = (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
- writel(readl(reset_reg) & ~(1 << bit), reset_reg);
- mdelay(20);
-}
-
-static inline void ar7_device_reset(u32 bit)
-{
- ar7_device_disable(bit);
- ar7_device_enable(bit);
-}
-
-static inline void ar7_device_on(u32 bit)
-{
- void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER);
- writel(readl(power_reg) | (1 << bit), power_reg);
- mdelay(20);
-}
-
-static inline void ar7_device_off(u32 bit)
-{
- void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER);
- writel(readl(power_reg) & ~(1 << bit), power_reg);
- mdelay(20);
-}
-
-#endif
+++ /dev/null
-/*
- * $Id: gpio.h 6693 2007-03-25 05:42:16Z ejka $
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef __AR7_GPIO_H__
-#define __AR7_GPIO_H__
-#include <asm/ar7/ar7.h>
-
-#define AR7_GPIO_MAX 32
-
-extern int gpio_request(unsigned gpio, char *label);
-extern void gpio_free(unsigned gpio);
-
-/* Common GPIO layer */
-static inline int gpio_direction_input(unsigned gpio)
-{
- void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
-
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
-
- return 0;
-}
-
-static inline int gpio_direction_output(unsigned gpio)
-{
- void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
-
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir);
-
- return 0;
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
- void __iomem *gpio_in = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
-
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- return ((readl(gpio_in) & (1 << gpio)) != 0);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
- void __iomem *gpio_out = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
- volatile unsigned tmp;
-
- if (gpio >= AR7_GPIO_MAX)
- return;
-
- tmp = readl(gpio_out) & ~(1 << gpio);
- if (value)
- tmp |= 1 << gpio;
- writel(tmp, gpio_out);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
- return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
- return -EINVAL;
-}
-
-/* Board specific GPIO functions */
-static inline int ar7_gpio_enable(unsigned gpio)
-{
- void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
-
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- writel(readl(gpio_en) | (1 << gpio), gpio_en);
-
- return 0;
-}
-
-static inline int ar7_gpio_disable(unsigned gpio)
-{
- void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
-
- if (gpio >= AR7_GPIO_MAX)
- return -EINVAL;
-
- writel(readl(gpio_en) & ~(1 << gpio), gpio_en);
-
- return 0;
-}
-
-#include <asm-generic/gpio.h>
-
-#endif
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _ASM_MACH_MMZONE_H
-#define _ASM_MACH_MMZONE_H
-
-extern pg_data_t __node_data[];
-#define NODE_DATA(nid) (&__node_data[nid])
-#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
-#define pa_to_nid(addr) (((addr) >= ARCH_PFN_OFFSET << PAGE_SHIFT) ? 0 : -1)
-
-#endif /* _ASM_MACH_MMZONE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
- * Copyright (C) 2000, 2002 Maciej W. Rozycki
- * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_AR7_SPACES_H
-#define _ASM_AR7_SPACES_H
-
-#define CAC_BASE 0x80000000
-#define IO_BASE 0xa0000000
-#define UNCAC_BASE 0xa0000000
-#define MAP_BASE 0xc0000000
-
-/*
- * This handles the memory map.
- * We handle pages at KSEG0 for kernels with 32 bit address space.
- */
-#define PAGE_OFFSET 0x94000000UL
-#define PHYS_OFFSET 0x14000000UL
-
-/*
- * Memory above this physical address will be considered highmem.
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START 0x40000000UL
-#endif
-
-#endif /* __ASM_AR7_SPACES_H */
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2006, 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-
-#ifndef __VLYNQ_H__
-#define __VLYNQ_H__
-
-struct vlynq_mapping {
- u32 size;
- u32 offset;
-} __attribute__ ((packed));
-
-struct vlynq_device_id {
- u32 id;
-};
-
-struct vlynq_regs;
-struct vlynq_device {
- u32 id;
- int irq;
- int local_irq;
- int remote_irq;
- int clock_div;
- u32 regs_start, regs_end;
- u32 mem_start, mem_end;
- u32 irq_start, irq_end;
- void *priv;
- struct vlynq_regs *local;
- struct vlynq_regs *remote;
- struct device dev;
-};
-
-struct vlynq_driver {
- char *name;
- int (*probe)(struct vlynq_device *dev);
- int (*remove)(struct vlynq_device *dev);
- struct device_driver driver;
-};
-
-#define to_vlynq_driver(drv) container_of(drv, struct vlynq_driver, driver)
-
-struct plat_vlynq_ops {
- int (*on)(struct vlynq_device *dev);
- void (*off)(struct vlynq_device *dev);
-};
-
-#define to_vlynq_device(device) container_of(device, struct vlynq_device, dev)
-
-extern struct bus_type vlynq_bus_type;
-
-extern int __vlynq_register_driver(struct vlynq_driver *driver,
- struct module *owner);
-
-static inline int vlynq_register_driver(struct vlynq_driver *driver)
-{
- return __vlynq_register_driver(driver, THIS_MODULE);
-}
-
-extern void vlynq_unregister_driver(struct vlynq_driver *driver);
-extern int vlynq_device_enable(struct vlynq_device *dev);
-extern void vlynq_device_disable(struct vlynq_device *dev);
-extern u32 vlynq_local_id(struct vlynq_device *dev);
-extern u32 vlynq_remote_id(struct vlynq_device *dev);
-extern void vlynq_set_local_mapping(struct vlynq_device *dev,
- u32 tx_offset,
- struct vlynq_mapping *mapping);
-extern void vlynq_set_remote_mapping(struct vlynq_device *dev,
- u32 tx_offset,
- struct vlynq_mapping *mapping);
-extern int vlynq_virq_to_irq(struct vlynq_device *dev, int virq);
-extern int vlynq_irq_to_virq(struct vlynq_device *dev, int irq);
-extern int vlynq_set_local_irq(struct vlynq_device *dev, int virq);
-extern int vlynq_set_remote_irq(struct vlynq_device *dev, int virq);
-
-#endif
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-DROP_SECTIONS := .reginfo .mdebug .comment .note .pdr .options .MIPS.options
-OBJCOPY_SREC := $(TARGET_CROSS)objcopy -S -O srec $(addprefix --remove-section=,$(DROP_SECTIONS))
-
-LOADADDR := 0x94600000
-KERNEL_ENTRY := 0x94100000
-RAMSTART := 0x94000000
-RAMSIZE := 0x00100000
-
-LOADER_MAKEOPTS= \
- KDIR=$(KDIR) \
- LOADADDR=$(LOADADDR) \
- KERNEL_ENTRY=$(KERNEL_ENTRY) \
- RAMSTART=$(RAMSTART) \
- RAMSIZE=$(RAMSIZE)
-
-CFLAGS := -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
- -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \
- -pipe -mlong-calls -fno-common \
- -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap \
- -DLOADADDR=$(LOADADDR)
-
-define Build/Clean
- $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader $(LOADER_MAKEOPTS) clean
-endef
-
-define Image/Prepare
- cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma
-
- $(MAKE) -C $(GENERIC_PLATFORM_DIR)/image/lzma-loader \
- $(LOADER_MAKEOPTS) \
- clean compile
- $(OBJCOPY_SREC) $(KDIR)/loader.elf $(KDIR)/loader.srec
- srec2bin $(KDIR)/loader.srec $(KDIR)/loader.bin
-endef
-
-define align/jffs2-64k
-bs=65536 conv=sync
-endef
-
-define align/jffs2-128k
-bs=131072 conv=sync
-endef
-
-define Image/Build/CyberTAN
- (dd if=/dev/zero bs=16 count=1; cat $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin) | \
- $(STAGING_DIR)/bin/addpattern -p $(3) -o $(BIN_DIR)/openwrt-$(2)-$(KERNEL)-$(4).bin
-endef
-
-#define Image/Build/sErCoMm
-# cat sercomm/adam2.bin "$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin" > "$(KDIR)/dgfw.tmp"
-# dd if=sercomm/$(2) of="$(KDIR)/dgfw.tmp" bs=$$$$((0x3e0000 - 80)) seek=1 conv=notrunc
-# $(STAGING_DIR)/bin/dgfirmware -f -w "$(BIN_DIR)/openwrt-$(2)-$(KERNEL)-$(3).img" "$(KDIR)/dgfw.tmp"
-# rm -f "$(KDIR)/dgfw.tmp"
-#endef
-
-define Image/Build
- dd if=$(KDIR)/loader.bin $(call align/$(1)) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin
- cat $(BUILD_DIR)/linux-$(KERNEL)-$(BOARD)/root.$(1) >> $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin
- $(call prepare_generic_squashfs,$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).bin)
- $(call Image/Build/CyberTAN,$(1),AG1B,AG1B,$(1))
- $(call Image/Build/CyberTAN,$(1),WA21,WA21,$(1))
- $(call Image/Build/CyberTAN,$(1),WA22,WA22,$(1))
- $(call Image/Build/CyberTAN,$(1),WAG2,WAG2,$(1))
- $(call Image/Build/CyberTAN,$(1),WA31,WA31 -b,$(1))
- $(call Image/Build/CyberTAN,$(1),WA32,WA32 -b,$(1))
- $(call Image/Build/CyberTAN,$(1),WA7A,WA7A -b,$(1))
- $(call Image/Build/CyberTAN,$(1),WA7B,WA7B -b,$(1))
-# $(call Image/Build/sErCoMm,$(1),dg834,$(1))
-# $(call Image/Build/sErCoMm,$(1),jdr454wb,$(1))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-diff -Nru linux-2.6.19.2/arch/mips/Kconfig linux-ar7/arch/mips/Kconfig
---- linux-2.6.19.2/arch/mips/Kconfig 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/arch/mips/Kconfig 2007-01-29 21:52:21.000000000 +0700
-@@ -16,6 +16,20 @@
- prompt "System type"
- default SGI_IP22
-
-+config AR7
-+ bool "Texas Instruments AR7"
-+ select BOOT_ELF32
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select NEED_MULTIPLE_NODES
-+ select GENERIC_GPIO
-+
- config MIPS_MTX1
- bool "4G Systems MTX-1 board"
- select DMA_NONCOHERENT
-diff -Nru linux-2.6.19.2/arch/mips/Makefile linux-ar7/arch/mips/Makefile
---- linux-2.6.19.2/arch/mips/Makefile 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/arch/mips/Makefile 2007-01-29 21:52:21.000000000 +0700
-@@ -158,6 +158,13 @@
- #
-
- #
-+# Texas Instruments AR7
-+#
-+core-$(CONFIG_AR7) += arch/mips/ar7/
-+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
-+load-$(CONFIG_AR7) += 0xffffffff94100000
-+
-+#
- # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
- #
- core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
-diff -Nru linux-2.6.19.2/arch/mips/kernel/setup.c linux-ar7/arch/mips/kernel/setup.c
---- linux-2.6.19.2orig/arch/mips/kernel/setup.c 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/arch/mips/kernel/setup.c 2007-03-04 22:32:13.000000000 +0700
-@@ -236,7 +236,7 @@
- * Initialize the bootmem allocator. It also setup initrd related data
- * if needed.
- */
--#ifdef CONFIG_SGI_IP27
-+#ifdef CONFIG_NEED_MULTIPLE_NODES
-
- static void __init bootmem_init(void)
- {
-@@ -244,7 +244,7 @@
- finalize_initrd();
- }
-
--#else /* !CONFIG_SGI_IP27 */
-+#else /* !CONFIG_NEED_MULTIPLE_NODES */
-
- static void __init bootmem_init(void)
- {
-@@ -349,7 +349,7 @@
- finalize_initrd();
- }
-
--#endif /* CONFIG_SGI_IP27 */
-+#endif /* CONFIG_NEED_MULTIPLE_NODES */
-
- /*
- * arch_mem_init - initialize memory managment subsystem
-diff -Nru linux-2.6.19.2/arch/mips/kernel/traps.c linux-ar7/arch/mips/kernel/traps.c
---- linux-2.6.19.2/arch/mips/kernel/traps.c 2007-01-11 02:10:37.000000000 +0700
-+++ linux-ar7/arch/mips/kernel/traps.c 2007-03-15 13:19:19.000000000 +0700
-@@ -1072,11 +1072,6 @@
- unsigned long exception_handlers[32];
- unsigned long vi_handlers[64];
-
--/*
-- * As a side effect of the way this is implemented we're limited
-- * to interrupt handlers in the address range from
-- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
-- */
- void *set_except_vector(int n, void *addr)
- {
- unsigned long handler = (unsigned long) addr;
-@@ -1084,9 +1079,15 @@
-
- exception_handlers[n] = handler;
- if (n == 0 && cpu_has_divec) {
-- *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
-- (0x03ffffff & (handler >> 2));
-- flush_icache_range(ebase + 0x200, ebase + 0x204);
-+ /* lui k0, 0x0000 */
-+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16);
-+ /* ori k0, 0x0000 */
-+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff);
-+ /* jr k0 */
-+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008;
-+ /* nop */
-+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000;
-+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210);
- }
- return (void *)old_handler;
- }
+++ /dev/null
-diff -Nru linux-2.6.19.2/drivers/mtd/Kconfig linux-ar7/drivers/mtd/Kconfig
---- linux-2.6.19.2/drivers/mtd/Kconfig 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/drivers/mtd/Kconfig 2007-02-03 22:47:10.000000000 +0700
-@@ -152,6 +152,12 @@
- for your particular device. It won't happen automatically. The
- 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
-
-+config MTD_AR7_PARTS
-+ tristate "TI AR7 partitioning support"
-+ depends on MTD_PARTITIONS
-+ ---help---
-+ TI AR7 partitioning support
-+
- comment "User Modules And Translation Layers"
- depends on MTD
-
-diff -Nru linux-2.6.19.2/drivers/mtd/Makefile linux-ar7/drivers/mtd/Makefile
---- linux-2.6.19.2/drivers/mtd/Makefile 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/drivers/mtd/Makefile 2007-02-03 22:02:27.000000000 +0700
-@@ -12,6 +12,7 @@
- obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
- obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
- obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
-+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
-
- # 'Users' - code which presents functionality to userspace.
- obj-$(CONFIG_MTD_CHAR) += mtdchar.o
-diff -Nru linux-2.6.19.2/drivers/mtd/maps/physmap.c linux-ar7/drivers/mtd/maps/physmap.c
---- linux-2.6.19.2/drivers/mtd/maps/physmap.c 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/drivers/mtd/maps/physmap.c 2007-02-03 21:57:11.000000000 +0700
-@@ -74,7 +74,7 @@
-
- static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
- #ifdef CONFIG_MTD_PARTITIONS
--static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
-+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL };
- #endif
-
- static int physmap_flash_probe(struct platform_device *dev)
+++ /dev/null
-diff -ruN linux-2.6.19.2-orig/drivers/char/Kconfig linux-2.6.19.2-ar7/drivers/char/Kconfig
---- linux-2.6.19.2-orig/drivers/char/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/char/Kconfig 2007-02-19 01:22:23.000000000 +0100
-@@ -920,6 +920,15 @@
- To compile this driver as a module, choose M here: the
- module will be called mwave.
-
-+config AR7_GPIO
-+ tristate "TI AR7 GPIO Support"
-+ depends on AR7
-+ help
-+ Give userspace access to the GPIO pins on the Texas Instruments AR7
-+ processors.
-+
-+ If compiled as a module, it will be called ar7_gpio.
-+
- config SCx200_GPIO
- tristate "NatSemi SCx200 GPIO Support"
- depends on SCx200
-diff -ruN linux-2.6.19.2-orig/drivers/char/Makefile linux-2.6.19.2-ar7/drivers/char/Makefile
---- linux-2.6.19.2-orig/drivers/char/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/char/Makefile 2007-02-19 01:22:23.000000000 +0100
-@@ -83,6 +83,7 @@
- obj-$(CONFIG_PPDEV) += ppdev.o
- obj-$(CONFIG_NWBUTTON) += nwbutton.o
- obj-$(CONFIG_NWFLASH) += nwflash.o
-+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
- obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
- obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
- obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o
+++ /dev/null
-diff -ruN linux-2.6.19.2-orig/drivers/leds/Kconfig linux-2.6.19.2-ar7/drivers/leds/Kconfig
---- linux-2.6.19.2-orig/drivers/leds/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/leds/Kconfig 2007-02-24 02:30:48.000000000 +0100
-@@ -19,6 +19,12 @@
-
- comment "LED drivers"
-
-+config LEDS_AR7
-+ tristate "LED Support for the TI AR7"
-+ depends LEDS_CLASS && AR7
-+ help
-+ This option enables support for the LEDs on TI AR7.
-+
- config LEDS_CORGI
- tristate "LED Support for the Sharp SL-C7x0 series"
- depends LEDS_CLASS && PXA_SHARP_C7xx
-diff -ruN linux-2.6.19.2-orig/drivers/leds/Makefile linux-2.6.19.2-ar7/drivers/leds/Makefile
---- linux-2.6.19.2-orig/drivers/leds/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/leds/Makefile 2007-02-24 02:29:44.000000000 +0100
-@@ -5,6 +5,7 @@
- obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
-
- # LED Platform Drivers
-+obj-$(CONFIG_LEDS_AR7) += leds-ar7.o
- obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
- obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
- obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
+++ /dev/null
-diff -ruN linux-2.6.19.2-orig/drivers/char/watchdog/Kconfig linux-2.6.19.2-ar7/drivers/char/watchdog/Kconfig
---- linux-2.6.19.2-orig/drivers/char/watchdog/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/char/watchdog/Kconfig 2007-02-26 12:49:29.000000000 +0100
-@@ -544,6 +544,12 @@
-
- # MIPS Architecture
-
-+config AR7_WDT
-+ tristate "TI AR7 Watchdog Timer"
-+ depends on WATCHDOG && AR7
-+ help
-+ Hardware driver for the TI AR7 Watchdog Timer.
-+
- config INDYDOG
- tristate "Indy/I2 Hardware Watchdog"
- depends on WATCHDOG && SGI_IP22
-diff -ruN linux-2.6.19.2-orig/drivers/char/watchdog/Makefile linux-2.6.19.2-ar7/drivers/char/watchdog/Makefile
---- linux-2.6.19.2-orig/drivers/char/watchdog/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2-ar7/drivers/char/watchdog/Makefile 2007-02-26 12:46:36.000000000 +0100
-@@ -71,6 +71,7 @@
- obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
-
- # MIPS Architecture
-+obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
- obj-$(CONFIG_INDYDOG) += indydog.o
-
- # S390 Architecture
+++ /dev/null
-diff -Nru linux-2.6.19.2/drivers/net/Kconfig linux-ar7/drivers/net/Kconfig
---- linux-2.6.19.2/drivers/net/Kconfig 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/drivers/net/Kconfig 2007-01-29 21:52:22.000000000 +0700
-@@ -1777,6 +1777,15 @@
- workstations.
- See <http://www.semiconductors.philips.com/pip/SAA9730_flyer_1>.
-
-+config CPMAC
-+ tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
-+ depends on NET_ETHERNET && EXPERIMENTAL && AR7
-+ select PHYLIB
-+ select FIXED_PHY
-+ select FIXED_MII_100_FDX
-+ help
-+ TI AR7 CPMAC Ethernet support
-+
- config NET_POCKET
- bool "Pocket and portable adapters"
- depends on NET_ETHERNET && PARPORT
-diff -Nru linux-2.6.19.2/drivers/net/Makefile linux-ar7/drivers/net/Makefile
---- linux-2.6.19.2/drivers/net/Makefile 2006-12-12 02:32:53.000000000 +0700
-+++ linux-ar7/drivers/net/Makefile 2007-01-29 21:52:22.000000000 +0700
-@@ -148,6 +148,7 @@
- obj-$(CONFIG_8139TOO) += 8139too.o
- obj-$(CONFIG_ZNET) += znet.o
- obj-$(CONFIG_LAN_SAA9730) += saa9730.o
-+obj-$(CONFIG_CPMAC) += cpmac.o
- obj-$(CONFIG_DEPCA) += depca.o
- obj-$(CONFIG_EWRK3) += ewrk3.o
- obj-$(CONFIG_ATP) += atp.o
+++ /dev/null
-Index: linux-2.6.21.4/drivers/net/phy/fixed.c
-===================================================================
---- linux-2.6.21.4.orig/drivers/net/phy/fixed.c 2007-06-11 16:30:06.418483448 +0200
-+++ linux-2.6.21.4/drivers/net/phy/fixed.c 2007-06-11 16:30:11.156763120 +0200
-@@ -187,6 +187,19 @@
- .driver = { .owner = THIS_MODULE,},
- };
-
-+static void fixed_mdio_release (struct device * dev)
-+{
-+ struct phy_device *phydev = container_of(dev, struct phy_device, dev);
-+ struct mii_bus *bus = phydev->bus;
-+ struct fixed_info *fixed = bus->priv;
-+
-+ kfree(phydev);
-+ kfree(bus->dev);
-+ kfree(bus);
-+ kfree(fixed->regs);
-+ kfree(fixed);
-+}
-+
- /*-----------------------------------------------------------------------------
- * This func is used to create all the necessary stuff, bind
- * the fixed phy driver and register all it on the mdio_bus_type.
-@@ -221,6 +234,12 @@
- }
-
- fixed->regs = kzalloc(MII_REGS_NUM*sizeof(int), GFP_KERNEL);
-+ if (NULL == fixed->regs) {
-+ kfree(dev);
-+ kfree(new_bus);
-+ kfree(fixed);
-+ return -ENOMEM;
-+ }
- fixed->regs_num = MII_REGS_NUM;
- fixed->phy_status.speed = speed;
- fixed->phy_status.duplex = duplex;
-@@ -249,8 +268,11 @@
- fixed->phydev = phydev;
-
- if(NULL == phydev) {
-- err = -ENOMEM;
-- goto device_create_fail;
-+ kfree(dev);
-+ kfree(new_bus);
-+ kfree(fixed->regs);
-+ kfree(fixed);
-+ return -ENOMEM;
- }
-
- phydev->irq = PHY_IGNORE_INTERRUPT;
-@@ -262,8 +284,34 @@
- else
- snprintf(phydev->dev.bus_id, BUS_ID_SIZE,
- "fixed@%d:%d", speed, duplex);
-+
- phydev->bus = new_bus;
-
-+#if 1
-+ phydev->dev.driver = &fixed_mdio_driver.driver;
-+ phydev->dev.release = fixed_mdio_release;
-+
-+ err = phydev->dev.driver->probe(&phydev->dev);
-+ if(err < 0) {
-+ printk(KERN_ERR "Phy %s: problems with fixed driver\n",
-+ phydev->dev.bus_id);
-+ kfree(phydev);
-+ kfree(dev);
-+ kfree(new_bus);
-+ kfree(fixed->regs);
-+ kfree(fixed);
-+ return err;
-+ }
-+
-+ down_write(&phydev->dev.bus->subsys.rwsem);
-+ err = device_register(&phydev->dev);
-+ if(err) {
-+ printk(KERN_ERR "Phy %s failed to register\n",
-+ phydev->dev.bus_id);
-+ }
-+
-+ return 0;
-+#else
- err = device_register(&phydev->dev);
- if(err) {
- printk(KERN_ERR "Phy %s failed to register\n",
-@@ -306,6 +354,7 @@
- kfree(fixed);
-
- return err;
-+#endif
- }
-
-
+++ /dev/null
-diff -Nru linux-2.6.19.2/include/linux/serialP.h linux-ar7/include/linux/serialP.h
---- linux-2.6.19.2/include/linux/serialP.h 2007-01-17 01:24:01.000000000 +0700
-+++ linux-ar7/include/linux/serialP.h 2007-03-22 22:36:48.000000000 +0700
-@@ -135,6 +135,9 @@
- * the interrupt line _up_ instead of down, so if we register the IRQ
- * while the UART is in that state, we die in an IRQ storm. */
- #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
-+#elif defined(CONFIG_AR7)
-+/* This is how it is set up by bootloader... */
-+#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 | UART_MCR_RTS | UART_MCR_DTR)
- #else
- #define ALPHA_KLUDGE_MCR 0
- #endif
-diff -Nru linux-2.6.19.2/include/linux/serial_core.h linux-ar7/include/linux/serial_core.h
---- linux-2.6.19.2/include/linux/serial_core.h 2007-01-11 02:10:37.000000000 +0700
-+++ linux-ar7/include/linux/serial_core.h 2007-03-22 22:50:13.000000000 +0700
-@@ -39,7 +39,8 @@
- #define PORT_RSA 13
- #define PORT_NS16550A 14
- #define PORT_XSCALE 15
--#define PORT_MAX_8250 15 /* max port ID */
-+#define PORT_AR7 16
-+#define PORT_MAX_8250 16 /* max port ID */
-
- /*
- * ARM specific type numbers. These are not currently guaranteed
-diff -Nru linux-2.6.19.2/drivers/serial/8250.c linux-ar7/drivers/serial/8250.c
---- linux-2.6.19.2/drivers/serial/8250.c 2007-01-11 02:10:37.000000000 +0700
-+++ linux-ar7/drivers/serial/8250.c 2007-03-22 22:45:17.000000000 +0700
-@@ -251,6 +251,13 @@
- .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
- .flags = UART_CAP_FIFO | UART_CAP_UUE,
- },
-+ [PORT_AR7] = {
-+ .name = "TI-AR7",
-+ .fifo_size = 16,
-+ .tx_loadsz = 16,
-+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
-+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
-+ },
- };
-
- #ifdef CONFIG_SERIAL_8250_AU1X00
-@@ -2243,7 +2250,7 @@
- {
- struct uart_8250_port *up = (struct uart_8250_port *)port;
-
-- wait_for_xmitr(up, UART_LSR_THRE);
-+ wait_for_xmitr(up, BOTH_EMPTY);
- serial_out(up, UART_TX, ch);
- }
-
+++ /dev/null
---- linux-2.6.19.orig/scripts/setlocalversion 2006-11-30 04:57:37.000000000 +0700
-+++ linux-2.6.19/scripts/setlocalversion 2006-12-25 12:50:53.000000000 +0700
-@@ -1,6 +1,8 @@
- #!/bin/sh
- # Print additional version information for non-release trees.
-
-+exit 0
-+
- usage() {
- echo "Usage: $0 [srctree]" >&2
- exit 1
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Texas
- NAME:=Texas Instruments WiFi (default)
- PACKAGES:=kmod-acx
-endef
-
-define Profile/Texas/Description
- Package set compatible with hardware using Texas Instruments WiFi cards
-endef
-$(eval $(call Profile,Texas))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/None
- NAME:=No WiFi
- PACKAGES:=
-endef
-
-define Profile/None/Description
- Package set without WiFi support
-endef
-$(eval $(call Profile,None))
-
+++ /dev/null
-/*
- * patcher.c - ADAM2 patcher for Netgear DG834 (and compatible)
- *
- * Copyright (C) 2006 Felix Fietkau
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <stddef.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdint.h>
-#include <sys/mman.h>
-#include <sys/stat.h>
-#include <string.h>
-
-#include <sys/ioctl.h>
-
-int main(int argc, char **argv)
-{
- int fd;
- char *ptr;
- uint32_t *i;
-
- if (argc != 2) {
- fprintf(stderr, "Usage: %s <filename>\n", argv[0]);
- exit(1);
- }
-
- if (((fd = open(argv[1], O_RDWR)) < 0)
- || ((ptr = mmap(0, 128 * 1024, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0)) == (void *) (-1))) {
- fprintf(stderr, "Can't open file\n");
- exit(1);
- }
-
- i = (uint32_t *) &ptr[0x3944];
- if (*i == 0x0c000944) {
- fprintf(stderr, "Unpatched ADAM2 detected. Patching... ");
- *i = 0x00000000;
- msync(i, sizeof(*i), MS_SYNC|MS_INVALIDATE);
- fprintf(stderr, "done!\n");
- } else if (*i == 0x00000000) {
- fprintf(stderr, "Patched ADAM2 detected.\n");
- } else {
- fprintf(stderr, "Unknown ADAM2 detected. Can't patch!\n");
- }
-
- close(fd);
-}
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=arm
-BOARD:=at91
-BOARDNAME:=AT91
-FEATURES:=squashfs usb
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build fimware images for Figment Design Labs VersaLink board.
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-#include the profiles
--include profiles/*.mk
-
-KERNELNAME:="uImage"
-$(eval $(call BuildKernel))
+++ /dev/null
-::sysinit:/etc/init.d/rcS S boot
-::shutdown:/etc/init.d/rcS K stop
-tts/0::askfirst:/bin/ash --login
-ttyS0::askfirst:/bin/ash --login
-
-ttyS2::respawn:/sbin/getty -L ttyS2 115200 vt100
+++ /dev/null
-src snapshots http://vlink.guthrie.homedns.org/vlink3
-dest root /
-dest ram /tmp
+++ /dev/null
-# CONFIG_AEABI is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_ARCH_AAEC2000 is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91RM9200=y
-# CONFIG_ARCH_AT91RM9200DK is not set
-# CONFIG_ARCH_AT91SAM9260 is not set
-# CONFIG_ARCH_AT91SAM9261 is not set
-# CONFIG_ARCH_AT91SAM9263 is not set
-# CONFIG_ARCH_AT91SAM9RL is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP13XX is not set
-# CONFIG_ARCH_IOP32X is not set
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_PNX4008 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARM=y
-CONFIG_ARM_AT91_ETHER=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARPD is not set
-# CONFIG_ARTHUR is not set
-# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-CONFIG_AT91_SPI=y
-# CONFIG_AT91_SPIDEV is not set
-CONFIG_AT91_VLIO=y
-# CONFIG_ATMEL_TCLIB is not set
-# CONFIG_ATM_DUMMY is not set
-# CONFIG_ATM_TCP is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BITREVERSE=y
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BONDING is not set
-# CONFIG_BROADCOM_PHY is not set
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_BT is not set
-# CONFIG_CIFS_STATS is not set
-# CONFIG_CLS_U32_MARK is not set
-# CONFIG_CLS_U32_PERF is not set
-# CONFIG_CONFIGFS_FS is not set
-CONFIG_CPU_32=y
-CONFIG_CPU_32v4T=y
-CONFIG_CPU_ABRT_EV4T=y
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_CACHE_V4WT=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_V4WB=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_TLB_V4WBI=y
-# CONFIG_CRYPTO_ANUBIS is not set
-CONFIG_CRYPTO_BLKCIPHER=m
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-CONFIG_CRYPTO_CBC=m
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HMAC=y
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=m
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_WP512 is not set
-CONFIG_DAVICOM_PHY=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_USER is not set
-# CONFIG_DM9000 is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FIXED_PHY is not set
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_FW_LOADER is not set
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_TIME is not set
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HID=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-# CONFIG_I2C is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INPUT=y
-# CONFIG_INPUT_EVDEV is not set
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_IP6_NF_MATCH_FRAG is not set
-# CONFIG_IP6_NF_MATCH_HL is not set
-# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-# CONFIG_IP6_NF_MATCH_OPTS is not set
-# CONFIG_IP6_NF_MATCH_RT is not set
-# CONFIG_IP6_NF_RAW is not set
-# CONFIG_IP6_NF_TARGET_HL is not set
-# CONFIG_IP6_NF_TARGET_LOG is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_ROUTE_VERBOSE is not set
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=32
-# CONFIG_LIBCRC32C is not set
-# CONFIG_LLC2 is not set
-# CONFIG_MACH_AT91RM9200EK is not set
-# CONFIG_MACH_ATEB9200 is not set
-# CONFIG_MACH_CARMEVA is not set
-# CONFIG_MACH_CHUB is not set
-# CONFIG_MACH_CSB337 is not set
-# CONFIG_MACH_CSB637 is not set
-# CONFIG_MACH_KAFA is not set
-# CONFIG_MACH_KB9200 is not set
-# CONFIG_MACH_ONEARM is not set
-CONFIG_MACH_VLINK=y
-CONFIG_MMC=m
-CONFIG_MMC_AT91=m
-CONFIG_MMC_BLOCK=m
-# CONFIG_MMC_DEBUG is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_AFS_PARTS is not set
-CONFIG_MTD_AT91_DATAFLASH=y
-CONFIG_MTD_AT91_PARTS=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_SPLIT_ROOTFS is not set
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_IPGRE_BROADCAST is not set
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NET_RADIO is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_SCH_NETEM is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_NO_IDLE_HZ is not set
-# CONFIG_NO_IOPORT is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NVRAM is not set
-# CONFIG_OUTER_CACHE is not set
-CONFIG_PHYLIB=y
-# CONFIG_PNPACPI is not set
-# CONFIG_PPPOATM is not set
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_SYNC_TTY is not set
-# CONFIG_QSEMI_PHY is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_RTC_LIB=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_SERIAL_ATMEL_TTYAT is not set
-CONFIG_SERIO=y
-# CONFIG_SERIO_LIBPS2 is not set
-CONFIG_SERIO_RAW=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SMC91X is not set
-# CONFIG_SMSC_PHY is not set
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_UID16=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB_ATM is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_GTCO is not set
-# CONFIG_USB_KAWETH is not set
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_MON=y
-# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-# CONFIG_USB_SERIAL_FUNSOFT is not set
-# CONFIG_USB_SERIAL_GARMIN is not set
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IPW is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-# CONFIG_USB_SERIAL_OPTION is not set
-# CONFIG_USB_SERIAL_SAFE is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_STORAGE_ALAUDA is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_USBAT is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USBNET_MII is not set
-# CONFIG_USB_YEALINK is not set
-CONFIG_VECTORS_BASE=0xffff0000
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-# CONFIG_VT_HW_CONSOLE_BINDING is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_XIP_KERNEL is not set
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
+++ /dev/null
-/*
- * $Id: at91part.c 6948 2007-04-15 04:01:45Z hcg $
- *
- * Copyright (C) 2007 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * Atmel AT91 flash partition table. (Modified by Hamish Guthrie).
- * Based on ar7 map by Felix Fietkau.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/bootmem.h>
-#include <linux/squashfs_fs.h>
-
-static struct mtd_partition at91_parts[6];
-
-static int create_mtd_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- unsigned long origin)
-{
- unsigned int offset, len;
- unsigned int pre_size = 0x42000, root_max = 0x362400;
- unsigned char buf[512];
- struct squashfs_super_block *sb = (struct squashfs_super_block *) buf;
-
- printk("Parsing AT91 partition map...\n");
-
- at91_parts[0].name = "loaders";
- at91_parts[0].offset = 0;
- at91_parts[0].size = 0x21000;
- at91_parts[0].mask_flags = MTD_WRITEABLE;
-
- at91_parts[1].name = "ubparams";
- at91_parts[1].offset = 0x21000;
- at91_parts[1].size = 0x8400;
- at91_parts[1].mask_flags = 0;
-
- at91_parts[2].name = "kernel";
- at91_parts[2].offset = pre_size;
- at91_parts[2].size = 0;
- at91_parts[2].mask_flags = 0;
-
- at91_parts[3].name = "rootfs";
- at91_parts[3].offset = 0;
- at91_parts[3].size = 0;
- at91_parts[3].mask_flags = 0;
-
- for(offset = pre_size; offset < root_max; offset += master->erasesize) {
-
- memset(&buf, 0xe5, sizeof(buf));
-
- if (master->read(master, offset, sizeof(buf), &len, buf) || len != sizeof(buf))
- break;
-
- if (*((__u32 *) buf) == SQUASHFS_MAGIC) {
- printk(KERN_INFO "%s: Filesystem type: squashfs, size=0x%x\n",
- master->name, (u32) sb->bytes_used);
-
- at91_parts[3].size = sb->bytes_used;
- at91_parts[3].offset = offset;
- len = at91_parts[3].offset + at91_parts[3].size;
- len = ((len / (master->erasesize * 8)) + 1) * master->erasesize * 8;
- at91_parts[3].size = len - at91_parts[3].offset;
- at91_parts[2].size = offset - at91_parts[2].offset;
- break;
- }
- }
-
- if (at91_parts[3].size == 0) {
- printk(KERN_NOTICE "%s: Couldn't find root filesystem\n", master->name);
- return -1;
- }
-
- at91_parts[4].name = "rootfs_data";
- at91_parts[4].offset = root_max;
- at91_parts[4].size = master->size - root_max;
- at91_parts[4].mask_flags = 0;
-
- at91_parts[5].name = "complete";
- at91_parts[5].offset = 0;
- at91_parts[5].size = master->size;
- at91_parts[5].mask_flags = 0;
-
- *pparts = at91_parts;
- return 6;
-}
-
-static struct mtd_part_parser at91_parser = {
- .owner = THIS_MODULE,
- .parse_fn = create_mtd_partitions,
- .name = "at91part",
-};
-
-static int __init at91_parser_init(void)
-{
- return register_mtd_parser(&at91_parser);
-}
-
-module_init(at91_parser_init);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Felix Fietkau, Eugene Konev, Hamish Guthrie");
-MODULE_DESCRIPTION("MTD partitioning for Atmel at91");
+++ /dev/null
-config AT91_DFBOOT
- bool "Build dataflashboot loader"
- depends LINUX_2_6_AT91
- default y
-
-config AT91_UBOOT
- bool "Build u-boot loader"
- depends LINUX_2_6_AT91
- default y
-
-config UBOOT_TARGET
- string "U-Boot Board Configuration"
- depends LINUX_2_6_AT91
- depends AT91_UBOOT
- default "vlink"
- help
- For all supported boards there are ready-to-use default
- configurations available; just type "<board_name>".
-
-config UBOOT_IPADDR
- string "IP Address for U-Boot"
- depends LINUX_2_6_AT91
- depends AT91_UBOOT
- default "192.168.0.178"
- help
- IP address of device to be used in U-Boot
-
-config UBOOT_SERVERIP
- string "IP Address of TFTP server"
- depends LINUX_2_6_AT91
- depends AT91_UBOOT
- default "192.168.0.232"
- help
- IP address of TFTP server for U-Boot
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Build/Clean
- $(MAKE) -C dfboot clean
- $(MAKE) -C u-boot clean
-endef
-
-define Build/Compile
- $(MAKE) -C dfboot compile
- $(MAKE) -C u-boot compile
- $(KDIR)/u-boot-1.1.4/tools/ubparams
- cp params $(KDIR)
-endef
-
-define Image/Prepare
- cp $(LINUX_DIR)/arch/arm/boot/uImage $(KDIR)/uImage
- cp $(KDIR)/dfboot/dfboot.bin $(KDIR)/dfboot.bin
- cp $(KDIR)/dfboot/dfbptest.bin $(KDIR)/dfbptest.bin
- cp $(KDIR)/u-boot-1.1.4/u-boot.bin $(KDIR)/u-boot.bin
- dd if=$(KDIR)/u-boot.bin of=$(KDIR)/u-boot.block bs=100k count=1 conv=sync
- cat $(KDIR)/u-boot.block $(KDIR)/params > $(KDIR)/u-boot.full
-endef
-
-define Image/BuildKernel
- cp $(KDIR)/uImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-uImage
-endef
-
-define Image/Build
- dd if=$(KDIR)/uImage of=$(KDIR)/uImage.block bs=8448 conv=sync
- dd if=$(KDIR)/root.squashfs of=$(KDIR)/root.block bs=8448 conv=sync
- cat $(KDIR)/uImage.block $(KDIR)/root.block > $(KDIR)/knlroot.bin
- $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL).trx -f $(KDIR)/dfboot.bin -f$(KDIR)/u-boot.full -f$(KDIR)/knlroot.bin
- cp $(KDIR)/dfbptest.bin $(BIN_DIR)
- $(call Image/Build/$(1),$(1))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=dfboot
-PKG_VERSION:=0.1
-PKG_RELEASE:=1
-
-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
-
-include $(INCLUDE_DIR)/package.mk
-
-define Build/Prepare
- mkdir -p $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
-endef
-
-define Build/Compile
- $(MAKE) -C $(PKG_BUILD_DIR) \
- $(TARGET_CONFIGURE_OPTS) \
- CFLAGS="$(TARGET_CFLAGS)"
-endef
-
-define Build/InstallDev
- dd if=$(PKG_BUILD_DIR)/binary/dfboot.bin of=$(PKG_BUILD_DIR)/binary/dfboot.block bs=32k count=1 conv=sync
-endef
-
-$(eval $(call Build/DefaultTargets))
+++ /dev/null
-# Makefile for DataFlashBoot.bin
-# Must use toolchain with H/W FLoating Point
-
-BASENAME=dfboot
-BINNAME=$(BASENAME).bin
-OUTNAME=$(BASENAME).out
-LSSNAME=$(BASENAME).lss
-MAPNAME=$(BASENAME).map
-
-BASENAME2=dfbptest
-BINNAME2=$(BASENAME2).bin
-OUTNAME2=$(BASENAME2).out
-LSSNAME2=$(BASENAME2).lss
-MAPNAME2=$(BASENAME2).map
-
-INCPATH=include
-
-CFLAGS_LOCAL=-Os -Wall -I$(INCPATH)
-BUILD=$(CC) $(CFLAGS) $(CFLAGS_LOCAL)
-
-LDFLAGS+=-T elf32-littlearm.lds -Ttext 0
-LINK=$(LD) $(LDFLAGS)
-
-OBJS=objs/cstartup_ram.o objs/at45.o objs/com.o objs/dataflash.o\
- objs/div0.o objs/init.o objs/main.o objs/asm_isr.o objs/asm_mci_isr.o\
- objs/mci_device.o objs/jump.o objs/_udivsi3.o objs/_umodsi3.o
-
-OBJS2=objs/cstartup_ram.o objs/at45.o objs/com.o objs/dataflash.o\
- objs/div0.o objs/init.o objs/ptmain.o objs/asm_isr.o objs/asm_mci_isr.o\
- objs/mci_device.o objs/jump.o objs/_udivsi3.o objs/_umodsi3.o
-
-I=config.h com.h dataflash.h embedded_services.h main.h stdio.h include/AT91RM9200.h include/lib_AT91RM9200.h
-
-all:clean $(BASENAME) $(BASENAME2)
-
-$(BASENAME): $(OBJS)
- $(LINK) -n -o $(OUTNAME) $(OBJS)
- $(OBJCOPY) $(OUTNAME) -O binary $(BINNAME)
- $(OBJDUMP) -h -s $(OUTNAME) > $(LSSNAME)
- $(NM) -n $(OUTNAME) | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(MAPNAME)
- cp $(BINNAME) binary
-
-$(BASENAME2): $(OBJS2)
- $(LINK) -n -o $(OUTNAME2) $(OBJS2)
- $(OBJCOPY) $(OUTNAME2) -O binary $(BINNAME2)
- $(OBJDUMP) -h -s $(OUTNAME2) > $(LSSNAME2)
- $(NM) -n $(OUTNAME2) | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(MAPNAME2)
- cp $(BINNAME2) binary
-
-# C objects here
-objs/at45.o: at45.c $(I)
- $(BUILD) -c -o objs/at45.o at45.c
-objs/com.o: com.c $(I)
- $(BUILD) -c -o objs/com.o com.c
-objs/dataflash.o: dataflash.c $(I)
- $(BUILD) -c -o objs/dataflash.o dataflash.c
-objs/mci_device.o: mci_device.c $(I)
- $(BUILD) -c -o objs/mci_device.o mci_device.c
-objs/div0.o: div0.c $(I)
- $(BUILD) -c -o objs/div0.o div0.c
-objs/init.o: init.c $(I)
- $(BUILD) -c -o objs/init.o init.c
-objs/main.o: main.c $(I)
- $(BUILD) -c -o objs/main.o main.c
-objs/ptmain.o: main.c $(I)
- $(BUILD) -c -D PRODTEST -o objs/ptmain.o main.c
-
-# ASM objects here
-objs/asm_isr.o: asm_isr.S
- $(BUILD) -c -o objs/asm_isr.o asm_isr.S
-objs/asm_mci_isr.o: asm_mci_isr.S
- $(BUILD) -c -o objs/asm_mci_isr.o asm_mci_isr.S
-objs/cstartup_ram.o: cstartup_ram.S
- $(BUILD) -c -o objs/cstartup_ram.o cstartup_ram.S
-objs/jump.o: jump.S
- $(BUILD) -c -o objs/jump.o jump.S
-objs/_udivsi3.o: _udivsi3.S
- $(BUILD) -c -o objs/_udivsi3.o _udivsi3.S
-objs/_umodsi3.o: _umodsi3.S
- $(BUILD) -c -o objs/_umodsi3.o _umodsi3.S
-
-install: $(BINNAME) $(BINNAME2)
- cp $(BINNAME) binary
- cp $(BINNAME2) binary
-
-clean:
- rm -f *~
- rm -f objs/*
- rm -f *.out
- rm -f *.bin
- rm -f *.lss
- rm -f *.map
- rm -f .unpacked
- mkdir -p objs
+++ /dev/null
-/* # 1 "libgcc1.S" */
-@ libgcc1 routines for ARM cpu.
-@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
-dividend .req r0
-divisor .req r1
-result .req r2
-curbit .req r3
-/* ip .req r12 */
-/* sp .req r13 */
-/* lr .req r14 */
-/* pc .req r15 */
- .text
- .globl __udivsi3
- .type __udivsi3 ,function
- .align 0
- __udivsi3 :
- cmp divisor, #0
- beq Ldiv0
- mov curbit, #1
- mov result, #0
- cmp dividend, divisor
- bcc Lgot_result
-Loop1:
- @ Unless the divisor is very big, shift it up in multiples of
- @ four bits, since this is the amount of unwinding in the main
- @ division loop. Continue shifting until the divisor is
- @ larger than the dividend.
- cmp divisor, #0x10000000
- cmpcc divisor, dividend
- movcc divisor, divisor, lsl #4
- movcc curbit, curbit, lsl #4
- bcc Loop1
-Lbignum:
- @ For very big divisors, we must shift it a bit at a time, or
- @ we will be in danger of overflowing.
- cmp divisor, #0x80000000
- cmpcc divisor, dividend
- movcc divisor, divisor, lsl #1
- movcc curbit, curbit, lsl #1
- bcc Lbignum
-Loop3:
- @ Test for possible subtractions, and note which bits
- @ are done in the result. On the final pass, this may subtract
- @ too much from the dividend, but the result will be ok, since the
- @ "bit" will have been shifted out at the bottom.
- cmp dividend, divisor
- subcs dividend, dividend, divisor
- orrcs result, result, curbit
- cmp dividend, divisor, lsr #1
- subcs dividend, dividend, divisor, lsr #1
- orrcs result, result, curbit, lsr #1
- cmp dividend, divisor, lsr #2
- subcs dividend, dividend, divisor, lsr #2
- orrcs result, result, curbit, lsr #2
- cmp dividend, divisor, lsr #3
- subcs dividend, dividend, divisor, lsr #3
- orrcs result, result, curbit, lsr #3
- cmp dividend, #0 @ Early termination?
- movnes curbit, curbit, lsr #4 @ No, any more bits to do?
- movne divisor, divisor, lsr #4
- bne Loop3
-Lgot_result:
- mov r0, result
- mov pc, lr
-Ldiv0:
- str lr, [sp, #-4]!
- bl __div0 (PLT)
- mov r0, #0 @ about as wrong as it could be
- ldmia sp!, {pc}
- .size __udivsi3 , . - __udivsi3
-/* # 235 "libgcc1.S" */
-/* # 320 "libgcc1.S" */
-/* # 421 "libgcc1.S" */
-/* # 433 "libgcc1.S" */
-/* # 456 "libgcc1.S" */
-/* # 500 "libgcc1.S" */
-/* # 580 "libgcc1.S" */
+++ /dev/null
-/* # 1 "libgcc1.S" */
-@ libgcc1 routines for ARM cpu.
-@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
-/* # 145 "libgcc1.S" */
-dividend .req r0
-divisor .req r1
-overdone .req r2
-curbit .req r3
-/* ip .req r12 */
-/* sp .req r13 */
-/* lr .req r14 */
-/* pc .req r15 */
- .text
- .globl __umodsi3
- .type __umodsi3 ,function
- .align 0
- __umodsi3 :
- cmp divisor, #0
- beq Ldiv0
- mov curbit, #1
- cmp dividend, divisor
- movcc pc, lr
-Loop1:
- @ Unless the divisor is very big, shift it up in multiples of
- @ four bits, since this is the amount of unwinding in the main
- @ division loop. Continue shifting until the divisor is
- @ larger than the dividend.
- cmp divisor, #0x10000000
- cmpcc divisor, dividend
- movcc divisor, divisor, lsl #4
- movcc curbit, curbit, lsl #4
- bcc Loop1
-Lbignum:
- @ For very big divisors, we must shift it a bit at a time, or
- @ we will be in danger of overflowing.
- cmp divisor, #0x80000000
- cmpcc divisor, dividend
- movcc divisor, divisor, lsl #1
- movcc curbit, curbit, lsl #1
- bcc Lbignum
-Loop3:
- @ Test for possible subtractions. On the final pass, this may
- @ subtract too much from the dividend, so keep track of which
- @ subtractions are done, we can fix them up afterwards...
- mov overdone, #0
- cmp dividend, divisor
- subcs dividend, dividend, divisor
- cmp dividend, divisor, lsr #1
- subcs dividend, dividend, divisor, lsr #1
- orrcs overdone, overdone, curbit, ror #1
- cmp dividend, divisor, lsr #2
- subcs dividend, dividend, divisor, lsr #2
- orrcs overdone, overdone, curbit, ror #2
- cmp dividend, divisor, lsr #3
- subcs dividend, dividend, divisor, lsr #3
- orrcs overdone, overdone, curbit, ror #3
- mov ip, curbit
- cmp dividend, #0 @ Early termination?
- movnes curbit, curbit, lsr #4 @ No, any more bits to do?
- movne divisor, divisor, lsr #4
- bne Loop3
- @ Any subtractions that we should not have done will be recorded in
- @ the top three bits of "overdone". Exactly which were not needed
- @ are governed by the position of the bit, stored in ip.
- @ If we terminated early, because dividend became zero,
- @ then none of the below will match, since the bit in ip will not be
- @ in the bottom nibble.
- ands overdone, overdone, #0xe0000000
- moveq pc, lr @ No fixups needed
- tst overdone, ip, ror #3
- addne dividend, dividend, divisor, lsr #3
- tst overdone, ip, ror #2
- addne dividend, dividend, divisor, lsr #2
- tst overdone, ip, ror #1
- addne dividend, dividend, divisor, lsr #1
- mov pc, lr
-Ldiv0:
- str lr, [sp, #-4]!
- bl __div0 (PLT)
- mov r0, #0 @ about as wrong as it could be
- ldmia sp!, {pc}
- .size __umodsi3 , . - __umodsi3
-/* # 320 "libgcc1.S" */
-/* # 421 "libgcc1.S" */
-/* # 433 "libgcc1.S" */
-/* # 456 "libgcc1.S" */
-/* # 500 "libgcc1.S" */
-/* # 580 "libgcc1.S" */
+++ /dev/null
-#include "AT91RM9200_inc.h"
-
-#define ARM_MODE_USER 0x10
-#define ARM_MODE_FIQ 0x11
-#define ARM_MODE_IRQ 0x12
-#define ARM_MODE_SVC 0x13
-#define ARM_MODE_ABORT 0x17
-#define ARM_MODE_UNDEF 0x1B
-#define ARM_MODE_SYS 0x1F
-
-#define I_BIT 0x80
-#define F_BIT 0x40
-#define T_BIT 0x20
-
-
-/* -----------------------------------------------------------------------------
- AT91F_ASM_SPI_Handler
- ---------------------
- Handler called by the AIC
-
- Save context
- Call C handler
- Restore context
- ----------------------------------------------------------------------------- */
-
-.global AT91F_ST_ASM_HANDLER
-
-AT91F_ST_ASM_HANDLER:
-/* Adjust and save LR_irq in IRQ stack */
- sub r14, r14, #4
- stmfd sp!, {r14}
-
-/* Write in the IVR to support Protect Mode
- No effect in Normal Mode
- De-assert the NIRQ and clear the source in Protect Mode */
- ldr r14, =AT91C_BASE_AIC
- str r14, [r14, #AIC_IVR]
-
-/* Save SPSR and r0 in IRQ stack */
- mrs r14, SPSR
- stmfd sp!, {r0, r14}
-
-/* Enable Interrupt and Switch in SYS Mode */
- mrs r0, CPSR
- bic r0, r0, #I_BIT
- orr r0, r0, #ARM_MODE_SYS
- msr CPSR_c, r0
-
-/* Save scratch/used registers and LR in User Stack */
- stmfd sp!, { r1-r3, r12, r14}
-
- ldr r1, =AT91F_ST_HANDLER
- mov r14, pc
- bx r1
-
-/* Restore scratch/used registers and LR from User Stack */
- ldmia sp!, { r1-r3, r12, r14}
-
-/* Disable Interrupt and switch back in IRQ mode */
- mrs r0, CPSR
- bic r0, r0, #ARM_MODE_SYS
- orr r0, r0, #I_BIT | ARM_MODE_IRQ
- msr CPSR_c, r0
-
-/* Mark the End of Interrupt on the AIC */
- ldr r0, =AT91C_BASE_AIC
- str r0, [r0, #AIC_EOICR]
-
-/* Restore SPSR_irq and r0 from IRQ stack */
- ldmia sp!, {r0, r14}
- msr SPSR_cxsf, r14
-
-/* Restore adjusted LR_irq from IRQ stack directly in the PC */
- ldmia sp!, {pc}^
-
+++ /dev/null
-#include <AT91RM9200_inc.h>
-
-#define ARM_MODE_USER 0x10
-#define ARM_MODE_FIQ 0x11
-#define ARM_MODE_IRQ 0x12
-#define ARM_MODE_SVC 0x13
-#define ARM_MODE_ABORT 0x17
-#define ARM_MODE_UNDEF 0x1B
-#define ARM_MODE_SYS 0x1F
-
-#define I_BIT 0x80
-#define F_BIT 0x40
-#define T_BIT 0x20
-
-
-/* -----------------------------------------------------------------------------
- AT91F_ASM_MCI_Handler
- ---------------------
- Handler called by the AIC
-
- Save context
- Call C handler
- Restore context
- ----------------------------------------------------------------------------- */
-
-.global AT91F_ASM_MCI_Handler
-
-AT91F_ASM_MCI_Handler:
-/* Adjust and save LR_irq in IRQ stack */
- sub r14, r14, #4
- stmfd sp!, {r14}
-
-/* Write in the IVR to support Protect Mode
- No effect in Normal Mode
- De-assert the NIRQ and clear the source in Protect Mode */
- ldr r14, =AT91C_BASE_AIC
- str r14, [r14, #AIC_IVR]
-
-/* Save SPSR and r0 in IRQ stack */
- mrs r14, SPSR
- stmfd sp!, {r0, r14}
-
-/* Enable Interrupt and Switch in SYS Mode */
- mrs r0, CPSR
- bic r0, r0, #I_BIT
- orr r0, r0, #ARM_MODE_SYS
- msr CPSR_c, r0
-
-/* Save scratch/used registers and LR in User Stack */
- stmfd sp!, { r1-r3, r12, r14}
-
- ldr r1, =AT91F_MCI_Handler
- mov r14, pc
- bx r1
-
-/* Restore scratch/used registers and LR from User Stack */
- ldmia sp!, { r1-r3, r12, r14}
-
-/* Disable Interrupt and switch back in IRQ mode */
- mrs r0, CPSR
- bic r0, r0, #ARM_MODE_SYS
- orr r0, r0, #I_BIT | ARM_MODE_IRQ
- msr CPSR_c, r0
-
-/* Mark the End of Interrupt on the AIC */
- ldr r0, =AT91C_BASE_AIC
- str r0, [r0, #AIC_EOICR]
-
-/* Restore SPSR_irq and r0 from IRQ stack */
- ldmia sp!, {r0, r14}
- msr SPSR_cxsf, r14
-
-/* Restore adjusted LR_irq from IRQ stack directly in the PC */
- ldmia sp!, {pc}^
-
+++ /dev/null
-/*----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support - ROUSSET -
- *----------------------------------------------------------------------------
- * The software is delivered "AS IS" without warranty or condition of any
- * kind, either express, implied or statutory. This includes without
- * limitation any warranty or condition with respect to merchantability or
- * fitness for any particular purpose, or against the infringements of
- * intellectual property rights of others.
- *----------------------------------------------------------------------------
- * File Name : at45c.h
- * Object :
- *
- * 1.0 10/12/03 HIi : Creation.
- * 1.01 03/05/04 HIi : Bug Fix in AT91F_DataFlashWaitReady() Function.
- *----------------------------------------------------------------------------
- */
-#include "config.h"
-#include "stdio.h"
-#include "AT91RM9200.h"
-#include "lib_AT91RM9200.h"
-#include "dataflash.h"
-#include "main.h"
-
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiInit */
-/* \brief SPI Low level Init */
-/*----------------------------------------------------------------------------*/
-void AT91F_SpiInit(void) {
- /* Configure PIOs */
- AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 |
- AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
- AT91C_PA2_SPCK;
- AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 |
- AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
- AT91C_PA2_SPCK;
- /* Enable CLock */
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-
- /* Reset the SPI */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-
- /* Configure CS0 and CS3 */
- *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
- (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
- ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
- *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
- (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
- ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiEnable */
-/* \brief Enable SPI chip select */
-/*----------------------------------------------------------------------------*/
-static void AT91F_SpiEnable(int cs) {
- switch(cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH << 16) & AT91C_SPI_PCS);
- break;
- case 3: /* Configure SPI CS3 for Serial DataFlash Card */
- /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
- /* Clear Output */
- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
- /* Configure PCS */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
- break;
- }
-
- /* SPI_Enable */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiWrite */
-/* \brief Set the PDC registers for a transfert */
-/*----------------------------------------------------------------------------*/
-static unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
- unsigned int timeout;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-
- if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
- AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-
- /* Intialize the Next Transmit and Next Receive Counters */
- AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
-
- /* ARM simple, non interrupt dependent timer */
- timeout = 0;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
- while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF));
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- if (timeout >= AT91C_DATAFLASH_TIMEOUT){
- return AT91C_DATAFLASH_ERROR;
- }
-
- return AT91C_DATAFLASH_OK;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashSendCommand */
-/* \brief Generic function to send a command to the dataflash */
-/*----------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
- AT91PS_DataFlash pDataFlash,
- unsigned char OpCode,
- unsigned int CmdSize,
- unsigned int DataflashAddress)
-{
- unsigned int adr;
-
- /* process the address to obtain page address and byte address */
- adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size))
- << pDataFlash->pDevice->page_offset) +
- (DataflashAddress % (pDataFlash->pDevice->pages_size));
-
- /* fill the command buffer */
- pDataFlash->pDataFlashDesc->command[0] = OpCode;
- if (pDataFlash->pDevice->pages_number >= 16384)
- {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
- }
- else
- {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- }
- pDataFlash->pDataFlashDesc->command[5] = 0;
- pDataFlash->pDataFlashDesc->command[6] = 0;
- pDataFlash->pDataFlashDesc->command[7] = 0;
-
- /* Initialize the SpiData structure for the spi write fuction */
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashGetStatus */
-/* \brief Read the status register of the dataflash */
-/*----------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
- AT91S_DataFlashStatus status;
-
- /* first send the read status command (D7H) */
- pDesc->command[0] = DB_STATUS;
- pDesc->command[1] = 0;
-
- pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
-
- pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
- return status;
-}
-
-/*-----------------------------------------------------------------------------
- * Function Name : AT91F_DataFlashWaitReady
- * Object : wait for dataflash ready (bit7 of the status register == 1)
- * Input Parameters : DataFlash Service and timeout
- * Return value : DataFlash status "ready or not"
- *-----------------------------------------------------------------------------
- */
-static AT91S_DataFlashStatus AT91F_DataFlashWaitReady(
- AT91PS_DataflashDesc pDataFlashDesc,
- unsigned int timeout)
-{
- pDataFlashDesc->DataFlash_state = IDLE;
- do {
- AT91F_DataFlashGetStatus(pDataFlashDesc);
- timeout--;
- }
- while(((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0));
-
- if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
- return AT91C_DATAFLASH_ERROR;
-
- return AT91C_DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
-/* Input Parameters : DataFlash Service */
-/* : <src> = dataflash address */
-/* : <*dataBuffer> = data buffer pointer */
-/* : <sizeToRead> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(
- AT91PS_DataFlash pDataFlash,
- int src,
- unsigned char *dataBuffer,
- int sizeToRead )
-{
- AT91S_DataFlashStatus status;
- /* Test the size to read in the device */
- if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return AT91C_DATAFLASH_MEMORY_OVERFLOW;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
- status = AT91F_DataFlashSendCommand(pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
- /* Send the command to the dataflash */
- return(status);
-}
-
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_MainMemoryToBufferTransfer */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfer(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
- return AT91C_DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize,
- page*pDataFlash->pDevice->pages_size));
-}
-
-
-
-/*----------------------------------------------------------------------------- */
-/* Function Name : AT91F_DataFlashWriteBuffer */
-/* Object : Write data to the internal sram buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to write buffer1 or buffer2 */
-/* : <*dataBuffer> = data buffer to write */
-/* : <bufferAddress> = address in the internal buffer */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned char *dataBuffer,
- unsigned int bufferAddress,
- int SizeToWrite )
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
- return AT91C_DATAFLASH_BAD_COMMAND;
-
- /* buffer address must be lower than page size */
- if (bufferAddress > pDataFlash->pDevice->pages_size)
- return AT91C_DATAFLASH_BAD_ADDRESS;
-
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
- pDataFlash->pDataFlashDesc->command[1] = 0;
- if (pDataFlash->pDevice->pages_number >= 16384)
- {
- pDataFlash->pDataFlashDesc->command[2] = 0;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- cmdsize = 5;
- }
- else
- {
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- cmdsize = 4;
- }
-
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PageErase */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_PageErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize,
- page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_WriteBufferToMain */
-/* Object : Write buffer to the main memory */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to send to buf1 or buf2 */
-/* : <dest> = main memory address */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_WriteBufferToMain (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int dest )
-{
- int cmdsize;
- /* Test if the buffer command is correct */
- if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
- (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
- return AT91C_DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- /* Send the command to the dataflash */
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PartialPageWrite */
-/* Object : Erase partially a page */
-/* Input Parameters : <page> = page number */
-/* : <AdrInpage> = adr to begin the fading */
-/* : <length> = Number of bytes to erase */
-/*------------------------------------------------------------------------------*/
-static AT91S_DataFlashStatus AT91F_PartialPageWrite (
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int size)
-{
- unsigned int page;
- unsigned int AdrInPage;
-
- page = dest / (pDataFlash->pDevice->pages_size);
- AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
- /* Read the contents of the page in the Sram Buffer */
- AT91F_MainMemoryToBufferTransfer(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
-
- /*Update the SRAM buffer */
- AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
-
- /* Erase page if a 128 Mbits device */
- if (pDataFlash->pDevice->pages_number >= 16384)
- {
- AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
- }
-
- /* Rewrite the modified Sram Buffer in the main memory */
- return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM,
- (page*pDataFlash->pDevice->pages_size)));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashWrite */
-/* Object : */
-/* Input Parameters : <*src> = Source buffer */
-/* : <dest> = dataflash adress */
-/* : <size> = data buffer size */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size )
-{
- unsigned int length;
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return AT91C_DATAFLASH_MEMORY_OVERFLOW;
-
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
- length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
- if (size < length)
- length = size;
-
- if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
- return AT91C_DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
-
- /* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
-
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 )
- {
- /* program dataflash page */
- page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
- status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src,
- 0, pDataFlash->pDevice->pages_size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
-
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
- if (!status)
- return AT91C_DATAFLASH_ERROR;
-
- status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
- if(!status)
- return AT91C_DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
-
- /* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
-
- /* If still some bytes to read */
- if ( size > 0 ) {
- /* program dataflash page */
- if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
- return AT91C_DATAFLASH_ERROR;
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
- }
- return AT91C_DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
-/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(
- AT91PS_DataFlash pDataFlash,
- unsigned long addr,
- unsigned long size,
- char *buffer)
-{
- unsigned long SizeToRead;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT) != AT91C_DATAFLASH_OK)
- return -1;
-
- while (size)
- {
- SizeToRead = (size < 0x8000)? size:0x8000;
-
- if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT)
- != AT91C_DATAFLASH_OK)
- return -1;
-
- if (AT91F_DataFlashContinuousRead (pDataFlash, addr, (unsigned char *)buffer,
- SizeToRead) != AT91C_DATAFLASH_OK)
- return -1;
-
- size -= SizeToRead;
- addr += SizeToRead;
- buffer += SizeToRead;
- }
-
- return AT91C_DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
-/* Return value : Dataflash status register */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
- AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return ((pDesc->command[1] == 0xFF)? 0: (pDesc->command[1] & 0x3C));
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashErase */
-/* Object : */
-/* Input Parameters : <*pDataFlash> = Device info */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashErase(AT91PS_DataFlash pDataFlash)
-{
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- for(page=0; page < pDataFlash->pDevice->pages_number; page++)
- {
- /* Erase dataflash page */
- if ((page & 0x00FF) == 0)
- printf("\rERA %d/%d", page, pDataFlash->pDevice->pages_number);
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
- if (!status)
- return AT91C_DATAFLASH_ERROR;
- }
-
- return AT91C_DATAFLASH_OK;
-}
-
+++ /dev/null
-/*----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support - ROUSSET -
- *----------------------------------------------------------------------------
- * The software is delivered "AS IS" without warranty or condition of any
- * kind, either express, implied or statutory. This includes without
- * limitation any warranty or condition with respect to merchantability or
- * fitness for any particular purpose, or against the infringements of
- * intellectual property rights of others.
- *----------------------------------------------------------------------------
- * File Name : com.c
- * Object :
- * Creation : HIi 03/27/2003
- *
- *----------------------------------------------------------------------------
- */
-#include "AT91RM9200.h"
-#include "lib_AT91RM9200.h"
-#include "config.h"
-#include "com.h"
-#include "stdio.h"
-
-static char erase_seq[] = "\b \b"; /* erase sequence */
-
-#define MAX_UARTS 1
-
-//unsigned int usa[2] = {(unsigned int)AT91C_BASE_DBGU, (unsigned int)AT91C_ALTERNATE_USART};
-unsigned int usa[1] = {(unsigned int)AT91C_BASE_DBGU};
-unsigned int us;
-int port_detected;
-
-void at91_init_uarts(void)
-{
- int i;
-
- port_detected = 0;
- AT91F_DBGU_CfgPIO();
- AT91F_US0_CfgPIO();
- AT91F_US0_CfgPMC();
-
- for(i=0; i<MAX_UARTS; i++) {
- us = usa[i];
- AT91F_US_ResetRx((AT91PS_USART)us);
- AT91F_US_ResetTx((AT91PS_USART)us);
-
- // Configure DBGU
- AT91F_US_Configure(
- (AT91PS_USART)us, // DBGU base address
- AT91C_MASTER_CLOCK, // 60 MHz
- AT91C_US_ASYNC_MODE, // mode Register to be programmed
- 115200, // baudrate to be programmed
- 0 // timeguard to be programmed
- );
-
- // Enable Transmitter
- AT91F_US_EnableTx((AT91PS_USART)us);
- // Enable Receiver
- AT91F_US_EnableRx((AT91PS_USART)us);
- }
- us = usa[0];
-}
-
-int at91_serial_putc(int ch)
-{
- if (ch == '\n')
- at91_serial_putc('\r');
- while (!AT91F_US_TxReady((AT91PS_USART)us));
- AT91F_US_PutChar((AT91PS_USART)us, (char)ch);
- return ch;
-}
-
-/* This getc is modified to be able work on more than one port. On certain
- * boards (i.e. Figment Designs VersaLink), the debug port is not available
- * once the unit is in it's enclosure, so, if one needs to get into dfboot
- * for any reason it is impossible. With this getc, it scans between the debug
- * port and another port and once it receives a character, it sets that port
- * as the debug port. */
-int at91_serial_getc()
-{
- while(1) {
-#if 0
- if (!port_detected) {
- if (us == usa[0]) {
- us = usa[1];
- }
- else {
- us = usa[0];
- }
- }
-#endif
- if(AT91F_US_RxReady((AT91PS_USART)us)) {
-#if 0
- port_detected = 1;
-#endif
- return((int)AT91F_US_GetChar((AT91PS_USART)us));
- }
- }
-}
-
-/*-----------------------------------------------------------------------------
- * Function Name : AT91F_ReadLine()
- * Object :
- * Input Parameters :
- * Return value :
- *-----------------------------------------------------------------------------
- */
-int AT91F_ReadLine (const char *const prompt, char *console_buffer)
-{
- char *p = console_buffer;
- int n = 0; /* buffer index */
- int plen = strlen (prompt); /* prompt length */
- int col; /* output column cnt */
- char c;
-
- /* print prompt */
- if (prompt)
- printf(prompt);
- col = plen;
-
- for (;;) {
- c = getc();
-
- switch (c) {
- case '\r': /* Enter */
- case '\n':
- *p = '\0';
- puts ("\n");
- return (p - console_buffer);
-
- case 0x03: /* ^C - break */
- console_buffer[0] = '\0'; /* discard input */
- return (-1);
-
- case 0x08: /* ^H - backspace */
- case 0x7F: /* DEL - backspace */
- if (n) {
- --p;
- printf(erase_seq);
- col--;
- n--;
- }
- continue;
-
- default:
- /*
- * Must be a normal character then
- */
- if (n < (AT91C_CB_SIZE -2))
- {
- ++col; /* echo input */
- putc(c);
- *p++ = c;
- ++n;
- }
- else
- { /* Buffer full */
- putc('\a');
- }
- }
- }
-}
-
-
-/*-----------------------------------------------------------------------------
- * Function Name : AT91F_WaitKeyPressed()
- * Object :
- * Input Parameters :
- * Return value :
- *-----------------------------------------------------------------------------
- */
-void AT91F_WaitKeyPressed(void)
-{
- int c;
- puts("KEY");
- c = getc();
- putc('\n');
-}
-
-int puts(const char *str)
-{
- while(*str != 0) {
- at91_serial_putc(*str);
- str++;
- }
- return 1;
-}
-
-int putc(int c)
-{
- return at91_serial_putc(c);
-}
-
-int putchar(c)
-{
- return putc(c);
-}
-
-int getc()
-{
- return at91_serial_getc();
-}
-
-int strlen(const char *str)
-{
- int len = 0;
-
- if(str == (char *)0)
- return 0;
-
- while(*str++ != 0)
- len++;
-
- return len;
-}
-
-#define ZEROPAD 1 /* pad with zero */
-#define SIGN 2 /* unsigned/signed long */
-#define LEFT 4 /* left justified */
-#define LARGE 8 /* use 'ABCDEF' instead of 'abcdef' */
-
-#define do_div(n,base) ({ \
- int __res; \
- __res = ((unsigned) n) % (unsigned) base; \
- n = ((unsigned) n) / (unsigned) base; \
- __res; \
-})
-
-static int number(int num, int base, int size,
- int precision, int type)
-{
- char c, sign, tmp[66];
- const char *digits="0123456789ABCDEF";
- int i;
-
- if (type & LEFT)
- type &= ~ZEROPAD;
- if (base < 2 || base > 16)
- return 0;
- c = (type & ZEROPAD) ? '0' : ' ';
- sign = 0;
-
- if(type & SIGN && num < 0)
- {
- sign = '-';
- num = -num;
- size--;
- }
-
- i = 0;
- if(num == 0)
- tmp[i++] = digits[0];
- else while(num != 0)
- tmp[i++] = digits[do_div(num, base)];
-
- if(i > precision)
- precision = i;
- size -= precision;
-
- if(!(type&(ZEROPAD+LEFT)))
- while(size-->0)
- putc(' ');
-
- if(sign)
- putc(sign);
-
- if (!(type & LEFT))
- while (size-- > 0)
- putc(c);
-
- while (i < precision--)
- putc('0');
-
- while (i-- > 0)
- putc(tmp[i]);
-
- while (size-- > 0)
- putc(' ');;
-
- return 1;
-}
-
-int hvfprintf(const char *fmt, va_list va)
-{
- char *s;
-
- do {
- if(*fmt == '%') {
- bool done = false;
-
- int type = 0;
- int precision = 0;
-
- do {
- fmt++;
- switch(*fmt) {
- case '0' :
- if(!precision)
- type |= ZEROPAD;
- case '1' :
- case '2' :
- case '3' :
- case '4' :
- case '5' :
- case '6' :
- case '7' :
- case '8' :
- case '9' :
- precision = precision * 10 + (*fmt - '0');
- break;
- case '.' :
- break;
- case 's' :
- s = va_arg(va, char *);
- if(!s)
- puts("<NULL>");
- else
- puts(s);
- done = true;
- break;
- case 'c' :
- putc(va_arg(va, int));
- done = true;
- break;
- case 'd' :
- number(va_arg(va, int), 10, 0, precision, type);
- done = true;
- break;
- case 'x' :
- case 'X' :
- number(va_arg(va, int), 16, 0, precision, type);
- done = true;
- break;
- case '%' :
- putc(*fmt);
- done = true;
- default:
- putc('%');
- putc(*fmt);
- done = true;
- break;
- }
- } while(!done);
- } else if(*fmt == '\\') {
- fmt++;
- if(*fmt == 'r') {
- putc('\r');
- } else if(*fmt == 'n') {
- putc('\n');
- }
- } else {
- putc(*fmt);
- }
- fmt++;
- } while(*fmt != 0);
-
- return 0;
-}
-
-int printf(const char *fmt, ...)
-{
- va_list ap;
- int i;
-
- va_start(ap, fmt);
- i = hvfprintf(fmt, ap);
- va_end(ap);
-
- return i;
-}
+++ /dev/null
-/*----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support - ROUSSET -
- *----------------------------------------------------------------------------
- * The software is delivered "AS IS" without warranty or condition of any
- * kind, either express, implied or statutory. This includes without
- * limitation any warranty or condition with respect to merchantability or
- * fitness for any particular purpose, or against the infringements of
- * intellectual property rights of others.
- *----------------------------------------------------------------------------
- * File Name : com.h
- * Object :
- *
- * 1.0 27/03/03 HIi : Creation
- *----------------------------------------------------------------------------
- */
-#ifndef com_h
-#define com_h
-
-#define AT91C_CB_SIZE 20 /* size of the console buffer */
-
-/* Escape sequences */
-#define ESC \033
-
-extern int AT91F_ReadLine (const char *const prompt, char *console_buffer);
-extern void AT91F_WaitKeyPressed(void);
-
-#endif
-
+++ /dev/null
-
-#ifndef _CONFIG_H
-#define _CONFIG_H
-
-//#define PAGESZ_1056 1
-#undef PAGESZ_1056
-#define SPI_LOW_SPEED 1
-#define AT91C_DELAY_TO_BOOT 1500
-
-#define CRC_RETRIES 0x100
-
-#define AT91C_MASTER_CLOCK 59904000
-#define AT91C_BAUD_RATE 115200
-
-#define AT91C_ALTERNATE_USART AT91C_BASE_US0
-
-#endif
+++ /dev/null
-#include "AT91RM9200_inc.h"
-
-/*---------------------------
-ARM Core Mode and Status Bits
----------------------------*/
-.section start
- .text
-
-#define ARM_MODE_USER 0x10
-#define ARM_MODE_FIQ 0x11
-#define ARM_MODE_IRQ 0x12
-#define ARM_MODE_SVC 0x13
-#define ARM_MODE_ABORT 0x17
-#define ARM_MODE_UNDEF 0x1B
-#define ARM_MODE_SYS 0x1F
-
-#define I_BIT 0x80
-#define F_BIT 0x40
-#define T_BIT 0x20
-
-/*----------------------------------------------------------------------------
- Area Definition
-----------------
- Must be defined as function to put first in the code as it must be mapped
- at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap.
-_---------------------------------------------------------------------------*/
-
- .align 4
- .globl _start
-_start:
-
-/*----------------------------------------------------------------------------
- Exception vectors ( before Remap )
-------------------------------------
- These vectors are read at address 0.
- They absolutely requires to be in relative addresssing mode in order to
- guarantee a valid jump. For the moment, all are just looping (what may be
- dangerous in a final system). If an exception occurs before remap, this
- would result in an infinite loop.
-----------------------------------------------------------------------------*/
- b reset /* reset */
- b undefvec /* Undefined Instruction */
- b swivec /* Software Interrupt */
- b pabtvec /* Prefetch Abort */
- b dabtvec /* Data Abort */
- b rsvdvec /* reserved */
- b aicvec /* IRQ : read the AIC */
- b fiqvec /* FIQ */
-
-undefvec:
-swivec:
-pabtvec:
-dabtvec:
-rsvdvec:
-aicvec:
-fiqvec:
- b undefvec
-
-reset:
-
-#define MEMEND 0x00004000
-
-/* ----------------------------
- Setup the stack for each mode
----------------------------- */
-
-#define IRQ_STACK_SIZE 0x10
-#define FIQ_STACK_SIZE 0x04
-#define ABT_STACK_SIZE 0x04
-#define UND_STACK_SIZE 0x04
-#define SVC_STACK_SIZE 0x10
-#define USER_STACK_SIZE 0x400
-
- ldr r0,= MEMEND
-
-/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
- msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
- mov r13, r0 /* Init stack Undef*/
- sub r0, r0, #SVC_STACK_SIZE
-
-/*- Set up Interrupt Mode and set IRQ Mode Stack*/
- msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
- mov r13, r0 /* Init stack IRQ*/
- sub r0, r0, #IRQ_STACK_SIZE
-
-/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
- msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
- mov r13, r0 /* Init stack FIQ*/
- sub r0, r0, #FIQ_STACK_SIZE
-
-/*- Set up Abort Mode and set Abort Mode Stack*/
- msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
- mov r13, r0 /* Init stack Abort*/
- sub r0, r0, #ABT_STACK_SIZE
-
-/*- Set up Undefined Instruction Mode and set Undef Mode Stack*/
- msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
- mov r13, r0 /* Init stack Undef*/
- sub r0, r0, #UND_STACK_SIZE
-
-/*- Set up user Mode and set System Mode Stack*/
- msr CPSR_c, #ARM_MODE_SYS | I_BIT | F_BIT
- bic r0, r0, #3 /* Insure word alignement */
- mov sp, r0 /* Init stack System */
-
-
- ldr r0, = AT91F_LowLevelInit
- mov lr, pc
- bx r0
-
-/*----------------------------------------
- Read/modify/write CP15 control register
-----------------------------------------*/
- mrc p15, 0, r0, c1, c0,0 /* read cp15 control registre (cp15 r1) in r0 */
- ldr r3,= 0xC0000080 /* Reset bit :Little Endian end fast bus mode */
- ldr r4,= 0xC0001000 /* Set bit :Asynchronous clock mode, Not Fast Bus, I-Cache enable */
- bic r0, r0, r3
- orr r0, r0, r4
- mcr p15, 0, r0, c1, c0,0 /* write r0 in cp15 control registre (cp15 r1) */
-
-/* Enable interrupts */
- msr CPSR_c, #ARM_MODE_SYS | F_BIT
-
-/*------------------------------------------------------------------------------
-- Branch on C code Main function (with interworking)
-----------------------------------------------------
-- Branch must be performed by an interworking call as either an ARM or Thumb
-- _start function must be supported. This makes the code not position-
-- independent. A Branch with link would generate errors
-----------------------------------------------------------------------------*/
-
-/*- Branch to _start by interworking*/
- ldr r4, = main
- mov lr, pc
- bx r4
-
-/*-----------------------------------------------------------------------------
-- Loop for ever
----------------
-- End of application. Normally, never occur.
-- Could jump on Software Reset ( B 0x0 ).
-------------------------------------------------------------------------------*/
-End:
- b End
+++ /dev/null
-/*----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support - ROUSSET -
- *----------------------------------------------------------------------------
- * The software is delivered "AS IS" without warranty or condition of any
- * kind, either express, implied or statutory. This includes without
- * limitation any warranty or condition with respect to merchantability or
- * fitness for any particular purpose, or against the infringements of
- * intellectual property rights of others.
- *----------------------------------------------------------------------------
- * File Name : dataflash.c
- * Object : High level functions for the dataflash
- * Creation : HIi 10/10/2003
- *----------------------------------------------------------------------------
- */
-#include "config.h"
-#include "stdio.h"
-#include "dataflash.h"
-
-
-AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
-static AT91S_DataFlash DataFlashInst;
-
-int cs[][CFG_MAX_DATAFLASH_BANKS] = {
- {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
- {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
-};
-
-int AT91F_DataflashInit(void)
-{
- int i;
- int dfcode;
- int Nb_device = 0;
-
- AT91F_SpiInit();
-
- for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
- dataflash_info[i].id = 0;
- dataflash_info[i].Device.pages_number = 0;
- dfcode = AT91F_DataflashProbe (cs[i][1], &dataflash_info[i].Desc);
-
- switch (dfcode) {
- case AT45DB161:
- dataflash_info[i].Device.pages_number = 4096;
- dataflash_info[i].Device.pages_size = 528;
- dataflash_info[i].Device.page_offset = 10;
- dataflash_info[i].Device.byte_mask = 0x300;
- dataflash_info[i].Device.cs = cs[i][1];
- dataflash_info[i].Desc.DataFlash_state = IDLE;
- dataflash_info[i].logical_address = cs[i][0];
- dataflash_info[i].id = dfcode;
- Nb_device++;
- break;
-
- case AT45DB321:
- dataflash_info[i].Device.pages_number = 8192;
- dataflash_info[i].Device.pages_size = 528;
- dataflash_info[i].Device.page_offset = 10;
- dataflash_info[i].Device.byte_mask = 0x300;
- dataflash_info[i].Device.cs = cs[i][1];
- dataflash_info[i].Desc.DataFlash_state = IDLE;
- dataflash_info[i].logical_address = cs[i][0];
- dataflash_info[i].id = dfcode;
- Nb_device++;
- break;
-
- case AT45DB642:
- dataflash_info[i].Device.pages_number = 8192;
- dataflash_info[i].Device.pages_size = 1056;
- dataflash_info[i].Device.page_offset = 11;
- dataflash_info[i].Device.byte_mask = 0x700;
- dataflash_info[i].Device.cs = cs[i][1];
- dataflash_info[i].Desc.DataFlash_state = IDLE;
- dataflash_info[i].logical_address = cs[i][0];
- dataflash_info[i].id = dfcode;
- Nb_device++;
- break;
- case AT45DB128:
- dataflash_info[i].Device.pages_number = 16384;
- dataflash_info[i].Device.pages_size = 1056;
- dataflash_info[i].Device.page_offset = 11;
- dataflash_info[i].Device.byte_mask = 0x700;
- dataflash_info[i].Device.cs = cs[i][1];
- dataflash_info[i].Desc.DataFlash_state = IDLE;
- dataflash_info[i].logical_address = cs[i][0];
- dataflash_info[i].id = dfcode;
- Nb_device++;
- break;
- default:
- break;
- }
- }
- return (Nb_device);
-}
-
-
-void AT91F_DataflashPrintInfo(void)
-{
- int i;
- for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
- if (dataflash_info[i].id != 0) {
- printf ("DF:AT45DB");
- switch (dataflash_info[i].id) {
- case AT45DB161:
- printf ("161");
- break;
-
- case AT45DB321:
- printf ("321");
- break;
-
- case AT45DB642:
- printf ("642");
- break;
- case AT45DB128:
- printf ("128");
- break;
- }
-
- printf ("\n# PG: %6d\n"
- "PG SZ: %6d\n"
- "SZ=%8d bytes\n"
- "ADDR: %08X\n",
- (unsigned int) dataflash_info[i].Device.pages_number,
- (unsigned int) dataflash_info[i].Device.pages_size,
- (unsigned int) dataflash_info[i].Device.pages_number *
- dataflash_info[i].Device.pages_size,
- (unsigned int) dataflash_info[i].logical_address);
- }
- }
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashSelect */
-/* Object : Select the correct device */
-/*------------------------------------------------------------------------------*/
-static AT91PS_DataFlash AT91F_DataflashSelect(AT91PS_DataFlash pFlash,
- unsigned int *addr)
-{
- char addr_valid = 0;
- int i;
-
- for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++)
- if ((*addr & 0xFF000000) == dataflash_info[i].logical_address) {
- addr_valid = 1;
- break;
- }
- if (!addr_valid) {
- pFlash = (AT91PS_DataFlash) 0;
- return pFlash;
- }
- pFlash->pDataFlashDesc = &(dataflash_info[i].Desc);
- pFlash->pDevice = &(dataflash_info[i].Device);
- *addr -= dataflash_info[i].logical_address;
- return (pFlash);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : read_dataflash */
-/* Object : dataflash memory read */
-/*------------------------------------------------------------------------------*/
-int read_dataflash(unsigned long addr, unsigned long size, char *result)
-{
- unsigned int AddrToRead = addr;
- AT91PS_DataFlash pFlash = &DataFlashInst;
-
- pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
- if (pFlash == 0)
- return -1;
-
- return (AT91F_DataFlashRead(pFlash, AddrToRead, size, result));
-}
-
-
-/*-----------------------------------------------------------------------------*/
-/* Function Name : write_dataflash */
-/* Object : write a block in dataflash */
-/*-----------------------------------------------------------------------------*/
-int write_dataflash(unsigned long addr_dest, unsigned int addr_src,
- unsigned int size)
-{
- unsigned int AddrToWrite = addr_dest;
- AT91PS_DataFlash pFlash = &DataFlashInst;
-
- pFlash = AT91F_DataflashSelect(pFlash, &AddrToWrite);
- if (AddrToWrite == -1)
- return -1;
-
- return AT91F_DataFlashWrite(pFlash, (unsigned char *) addr_src, AddrToWrite, size);
-}
-
-/*-----------------------------------------------------------------------------*/
-/* Function Name : erase_dataflash */
-/* Object : Erase entire dataflash */
-/*-----------------------------------------------------------------------------*/
-int erase_dataflash(unsigned long addr_dest)
-{
- unsigned int AddrToWrite = addr_dest;
- AT91PS_DataFlash pFlash = &DataFlashInst;
-
- pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
- if (AddrToWrite == -1)
- return -1;
-
- return AT91F_DataFlashErase(pFlash);
-}
-
+++ /dev/null
-//*---------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*---------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*---------------------------------------------------------------------------
-//* File Name : AT91_SpiDataFlash.h
-//* Object : Data Flash Atmel Description File
-//* Translator :
-//*
-//* 1.0 03/04/01 HI : Creation
-//*
-//*---------------------------------------------------------------------------
-
-#ifndef _DataFlash_h
-#define _DataFlash_h
-
-/* Max value = 15Mhz to be compliant with the Continuous array read function */
-#ifdef SPI_LOW_SPEED
-#define AT91C_SPI_CLK 14976000/4
-#else
-#define AT91C_SPI_CLK 14976000
-#endif
-
-/* AC characteristics */
-/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
-
-#define DATAFLASH_TCSS (0xf << 16) /* 250ns 15/60000000 */
-#define DATAFLASH_TCHS (0x1 << 24) /* 250ns 32*1/60000000 */
-
-
-#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-
-#define CFG_MAX_DATAFLASH_BANKS 2
-#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
-#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
-
-typedef struct {
- unsigned long base; /* logical base address for a bank */
- unsigned long size; /* total bank size */
- unsigned long page_count;
- unsigned long page_size;
- unsigned long id; /* device id */
-} dataflash_info_t;
-
-typedef unsigned int AT91S_DataFlashStatus;
-
-/*----------------------------------------------------------------------*/
-/* DataFlash Structures */
-/*----------------------------------------------------------------------*/
-
-/*---------------------------------------------*/
-/* DataFlash Descriptor Structure Definition */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataflashDesc {
- unsigned char *tx_cmd_pt;
- unsigned int tx_cmd_size;
- unsigned char *rx_cmd_pt;
- unsigned int rx_cmd_size;
- unsigned char *tx_data_pt;
- unsigned int tx_data_size;
- unsigned char *rx_data_pt;
- unsigned int rx_data_size;
- volatile unsigned char DataFlash_state;
- unsigned char command[8];
-} AT91S_DataflashDesc, *AT91PS_DataflashDesc;
-
-/*---------------------------------------------*/
-/* DataFlash device definition structure */
-/*---------------------------------------------*/
-typedef struct _AT91S_Dataflash {
- int pages_number; /* dataflash page number */
- int pages_size; /* dataflash page size */
- int page_offset; /* page offset in command */
- int byte_mask; /* byte mask in command */
- int cs;
-} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;
-
-
-/*---------------------------------------------*/
-/* DataFlash Structure Definition */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataFlash {
- AT91PS_DataflashDesc pDataFlashDesc; /* dataflash descriptor */
- AT91PS_DataflashFeatures pDevice; /* Pointer on a dataflash features array */
-} AT91S_DataFlash, *AT91PS_DataFlash;
-
-
-typedef struct _AT91S_DATAFLASH_INFO {
-
- AT91S_DataflashDesc Desc;
- AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
- unsigned long logical_address;
- unsigned int id; /* device id */
-} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
-
-
-/*-------------------------------------------------------------------------------------------------*/
-
-#define AT45DB161 0x2c
-#define AT45DB321 0x34
-#define AT45DB642 0x3c
-#define AT45DB128 0x10
-
-#define AT91C_DATAFLASH_TIMEOUT 20000 /* For AT91F_DataFlashWaitReady */
-
-/* DataFlash return value */
-#define AT91C_DATAFLASH_BUSY 0x00
-#define AT91C_DATAFLASH_OK 0x01
-#define AT91C_DATAFLASH_ERROR 0x02
-#define AT91C_DATAFLASH_MEMORY_OVERFLOW 0x03
-#define AT91C_DATAFLASH_BAD_COMMAND 0x04
-#define AT91C_DATAFLASH_BAD_ADDRESS 0x05
-
-
-/* Driver State */
-#define IDLE 0x0
-#define BUSY 0x1
-#define ERROR 0x2
-
-/* DataFlash Driver State */
-#define GET_STATUS 0x0F
-
-/*-------------------------------------------------------------------------------------------------*/
-/* Command Definition */
-/*-------------------------------------------------------------------------------------------------*/
-
-/* READ COMMANDS */
-#define DB_CONTINUOUS_ARRAY_READ 0xE8 /* Continuous array read */
-#define DB_BURST_ARRAY_READ 0xE8 /* Burst array read */
-#define DB_PAGE_READ 0xD2 /* Main memory page read */
-#define DB_BUF1_READ 0xD4 /* Buffer 1 read */
-#define DB_BUF2_READ 0xD6 /* Buffer 2 read */
-#define DB_STATUS 0xD7 /* Status Register */
-
-/* PROGRAM and ERASE COMMANDS */
-#define DB_BUF1_WRITE 0x84 /* Buffer 1 write */
-#define DB_BUF2_WRITE 0x87 /* Buffer 2 write */
-#define DB_BUF1_PAGE_ERASE_PGM 0x83 /* Buffer 1 to main memory page program with built-In erase */
-#define DB_BUF1_PAGE_ERASE_FASTPGM 0x93 /* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF2_PAGE_ERASE_PGM 0x86 /* Buffer 2 to main memory page program with built-In erase */
-#define DB_BUF2_PAGE_ERASE_FASTPGM 0x96 /* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF1_PAGE_PGM 0x88 /* Buffer 1 to main memory page program without built-In erase */
-#define DB_BUF1_PAGE_FASTPGM 0x98 /* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_BUF2_PAGE_PGM 0x89 /* Buffer 2 to main memory page program without built-In erase */
-#define DB_BUF2_PAGE_FASTPGM 0x99 /* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_PAGE_ERASE 0x81 /* Page Erase */
-#define DB_BLOCK_ERASE 0x50 /* Block Erase */
-#define DB_PAGE_PGM_BUF1 0x82 /* Main memory page through buffer 1 */
-#define DB_PAGE_FASTPGM_BUF1 0x92 /* Main memory page through buffer 1, Fast program */
-#define DB_PAGE_PGM_BUF2 0x85 /* Main memory page through buffer 2 */
-#define DB_PAGE_FastPGM_BUF2 0x95 /* Main memory page through buffer 2, Fast program */
-
-/* ADDITIONAL COMMANDS */
-#define DB_PAGE_2_BUF1_TRF 0x53 /* Main memory page to buffer 1 transfert */
-#define DB_PAGE_2_BUF2_TRF 0x55 /* Main memory page to buffer 2 transfert */
-#define DB_PAGE_2_BUF1_CMP 0x60 /* Main memory page to buffer 1 compare */
-#define DB_PAGE_2_BUF2_CMP 0x61 /* Main memory page to buffer 2 compare */
-#define DB_AUTO_PAGE_PGM_BUF1 0x58 /* Auto page rewrite throught buffer 1 */
-#define DB_AUTO_PAGE_PGM_BUF2 0x59 /* Auto page rewrite throught buffer 2 */
-
-/*-------------------------------------------------------------------------------------------------*/
-
-extern AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
-
-extern void AT91F_SpiInit(void);
-extern int AT91F_DataflashProbe(int i, AT91PS_DataflashDesc pDesc);
-extern int AT91F_DataFlashRead(AT91PS_DataFlash, unsigned long , unsigned long, char *);
-extern AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash ,unsigned char *, int, int);
-extern AT91S_DataFlashStatus AT91F_DataFlashErase(AT91PS_DataFlash pDataFlash);
-extern int AT91F_DataflashInit(void);
-extern void AT91F_DataflashPrintInfo(void);
-extern int read_dataflash(unsigned long addr, unsigned long size, char *result);
-extern int write_dataflash(unsigned long addr_dest, unsigned int addr_src, unsigned int size);
-extern int erase_dataflash(unsigned long addr_dest);
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* Replacement (=dummy) for GNU/Linux division-by zero handler */
-void __div0 (void)
-{
- while(-1);
-}
+++ /dev/null
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text : { *(.text) }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .bss : { *(.bss) }
-}
\ No newline at end of file
+++ /dev/null
-//*----------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*----------------------------------------------------------------------------
-//* File Name : embedded_sevices.h
-//* Object : Header File with all the embedded software services definitions
-//*
-//* 1.0 24 Jan 2003 FB : Creation
-//*----------------------------------------------------------------------------
-#ifndef embedded_sevices_h
-#define embedded_sevices_h
-
-#include "AT91RM9200.h"
-
-#define AT91C_BASE_ROM (char *)0x00100000
-
-/* Return values */
-#define AT91C_BUFFER_SUCCESS 0
-#define AT91C_BUFFER_ERROR_SHIFT 16
-#define AT91C_BUFFER_ERROR (0x0F << AT91C_BUFFER_ERROR_SHIFT)
-
-#define AT91C_BUFFER_OVERFLOW (0x01 << AT91C_BUFFER_ERROR_SHIFT)
-#define AT91C_BUFFER_UNDERRUN (0x02 << AT91C_BUFFER_ERROR_SHIFT)
-
-typedef unsigned int AT91S_BufferStatus;
-
-struct _AT91S_Pipe;
-
-// This structure is a virtual object of a buffer
-typedef struct _AT91S_Buffer
-{
- struct _AT91S_Pipe *pPipe;
- void *pChild;
-
- // Functions invoked by the pipe
- AT91S_BufferStatus (*SetRdBuffer) (struct _AT91S_Buffer *pSBuffer, char *pBuffer, unsigned int Size);
- AT91S_BufferStatus (*SetWrBuffer) (struct _AT91S_Buffer *pSBuffer, char const *pBuffer, unsigned int Size);
- AT91S_BufferStatus (*RstRdBuffer) (struct _AT91S_Buffer *pSBuffer);
- AT91S_BufferStatus (*RstWrBuffer) (struct _AT91S_Buffer *pSBuffer);
- char (*MsgWritten) (struct _AT91S_Buffer *pSBuffer, char const *pBuffer);
- char (*MsgRead) (struct _AT91S_Buffer *pSBuffer, char const *pBuffer);
- // Functions invoked by the peripheral
- AT91S_BufferStatus (*GetWrBuffer) (struct _AT91S_Buffer *pSBuffer, char const **pData, unsigned int *pSize);
- AT91S_BufferStatus (*GetRdBuffer) (struct _AT91S_Buffer *pSBuffer, char **pData, unsigned int *pSize);
- AT91S_BufferStatus (*EmptyWrBuffer) (struct _AT91S_Buffer *pSBuffer, unsigned int size);
- AT91S_BufferStatus (*FillRdBuffer) (struct _AT91S_Buffer *pSBuffer, unsigned int size);
- char (*IsWrEmpty) (struct _AT91S_Buffer *pSBuffer);
- char (*IsRdFull) (struct _AT91S_Buffer *pSBuffer);
-} AT91S_Buffer, *AT91PS_Buffer;
-
-// ===========================================================================================
-// SimpleBuffer definition
-//
-// This structure is pointed by pRealBuffer field in the SBuffer
-// It contains usefull information for a real implementation of
-// a SBuffer object.
-// The application just create an instance of SSBUffer and SBuffer,
-// call OpenSimpleBuffer, and continue using SBuffer instance
-
-typedef struct _AT91S_SBuffer
-{
- AT91S_Buffer parent;
- char *pRdBuffer;
- char const *pWrBuffer;
- unsigned int szRdBuffer;
- unsigned int szWrBuffer;
- unsigned int stRdBuffer;
- unsigned int stWrBuffer;
-} AT91S_SBuffer, *AT91PS_SBuffer;
-
-typedef AT91PS_Buffer (*AT91PF_OpenSBuffer) (AT91PS_SBuffer);
-
-// This function is called by the application
-extern AT91PS_Buffer AT91F_OpenSBuffer(AT91PS_SBuffer pBuffer);
-
-// Functions invoked by the pipe
-extern AT91S_BufferStatus AT91F_SbSetRdBuffer (AT91PS_Buffer pBuffer, char *pData, unsigned int Size);
-extern AT91S_BufferStatus AT91F_SbSetWrBuffer (AT91PS_Buffer pBuffer, char const *pData, unsigned int Size);
-extern AT91S_BufferStatus AT91F_SbRstRdBuffer (AT91PS_Buffer pBuffer);
-extern AT91S_BufferStatus AT91F_SbRstWrBuffer (AT91PS_Buffer pBuffer);
-extern char AT91F_SbMsgWritten (AT91PS_Buffer pBuffer, char const *pMsg);
-extern char AT91F_SbMsgRead (AT91PS_Buffer pBuffer, char const *pMsg);
-// Functions invoked by the peripheral
-extern AT91S_BufferStatus AT91F_SbGetWrBuffer (AT91PS_Buffer pBuffer, char const **pData, unsigned int *pSize);
-extern AT91S_BufferStatus AT91F_SbGetRdBuffer (AT91PS_Buffer pBuffer, char **pData, unsigned int *pSize);
-extern AT91S_BufferStatus AT91F_SbEmptyWrBuffer(AT91PS_Buffer pBuffer, unsigned int size);
-extern AT91S_BufferStatus AT91F_SbFillRdBuffer (AT91PS_Buffer pBuffer, unsigned int size);
-extern char AT91F_SbIsWrEmpty (AT91PS_Buffer pBuffer);
-extern char AT91F_SbIsRdFull (AT91PS_Buffer pBuffer);
-
-#ifdef DBG_DRV_BUFFER
-extern char const *AT91F_SbGetError(AT91S_BufferStatus errorNumber);
-#endif
-
-
-#define AT91C_OPEN_CTRLTEMPO_SUCCESS 0
-#define AT91C_ERROR_OPEN_CTRLTEMPO 1
-#define AT91C_START_OK 2
-#define AT91C_STOP_OK 3
-#define AT91C_TIMEOUT_REACHED 4
-
-typedef enum _AT91E_SvcTempo {
- AT91E_SVCTEMPO_DIS,
- AT91E_SVCTEMPO_EN
-} AT91E_SvcTempo;
-
-typedef unsigned int AT91S_TempoStatus;
-
-// AT91S_SvcTempo
-typedef struct _AT91S_SvcTempo
-{
-
- // Methods:
- AT91S_TempoStatus (*Start) (
- struct _AT91S_SvcTempo *pSvc,
- unsigned int timeout,
- unsigned int reload,
- void (*callback) (AT91S_TempoStatus, void *),
- void *pData);
- AT91S_TempoStatus (*Stop) (struct _AT91S_SvcTempo *pSvc);
-
- struct _AT91S_SvcTempo *pPreviousTempo;
- struct _AT91S_SvcTempo *pNextTempo;
-
- // Data
- unsigned int TickTempo; //* timeout value
- unsigned int ReloadTempo;//* Reload value for periodic execution
- void (*TempoCallback)(AT91S_TempoStatus, void *);
- void *pPrivateData;
- AT91E_SvcTempo flag;
-} AT91S_SvcTempo, *AT91PS_SvcTempo;
-
-
-// AT91S_CtrlTempo
-typedef struct _AT91S_CtlTempo
-{
- // Members:
-
- // Start and stop for Timer hardware
- AT91S_TempoStatus (*CtlTempoStart) (void *pTimer);
- AT91S_TempoStatus (*CtlTempoStop) (void *pTimer);
-
- // Start and stop for Tempo service
- AT91S_TempoStatus (*SvcTempoStart) (
- struct _AT91S_SvcTempo *pSvc,
- unsigned int timeout,
- unsigned int reload,
- void (*callback) (AT91S_TempoStatus, void *),
- void *pData);
- AT91S_TempoStatus (*SvcTempoStop) (struct _AT91S_SvcTempo *pSvc);
- AT91S_TempoStatus (*CtlTempoSetTime)(struct _AT91S_CtlTempo *pCtrl, unsigned int NewTime);
- AT91S_TempoStatus (*CtlTempoGetTime)(struct _AT91S_CtlTempo *pCtrl);
- AT91S_TempoStatus (*CtlTempoIsStart)(struct _AT91S_CtlTempo *pCtrl);
- AT91S_TempoStatus (*CtlTempoCreate) (
- struct _AT91S_CtlTempo *pCtrl,
- struct _AT91S_SvcTempo *pTempo);
- AT91S_TempoStatus (*CtlTempoRemove) (
- struct _AT91S_CtlTempo *pCtrl,
- struct _AT91S_SvcTempo *pTempo);
- AT91S_TempoStatus (*CtlTempoTick) (struct _AT91S_CtlTempo *pCtrl);
-
- // Data:
-
- void *pPrivateData; // Pointer to devived class
- void const *pTimer; // hardware
- AT91PS_SvcTempo pFirstTempo;
- AT91PS_SvcTempo pNewTempo;
-} AT91S_CtlTempo, *AT91PS_CtlTempo;
-typedef AT91S_TempoStatus (*AT91PF_OpenCtlTempo) ( AT91PS_CtlTempo, void const *);
-
-// This function is called by the application.
-extern AT91S_TempoStatus AT91F_OpenCtlTempo( AT91PS_CtlTempo pCtrlTempo, void const *pTempoTimer );
-
-extern AT91S_TempoStatus AT91F_STStart (void *);
-extern AT91S_TempoStatus AT91F_STStop (void *);
-extern AT91S_TempoStatus AT91F_STSetTime (AT91PS_CtlTempo, unsigned int);
-extern AT91S_TempoStatus AT91F_STGetTime (AT91PS_CtlTempo);
-extern AT91S_TempoStatus AT91F_STIsStart (AT91PS_CtlTempo);
-extern AT91S_TempoStatus AT91F_CtlTempoCreate (AT91PS_CtlTempo, AT91PS_SvcTempo);
-extern AT91S_TempoStatus AT91F_CtlTempoRemove (AT91PS_CtlTempo, AT91PS_SvcTempo);
-extern AT91S_TempoStatus AT91F_CtlTempoTick (AT91PS_CtlTempo);
-extern AT91S_TempoStatus AT91F_SvcTempoStart (
- AT91PS_SvcTempo pSvc,
- unsigned int timeout,
- unsigned int reload,
- void (*callback) (AT91S_TempoStatus, void *),
- void *pData);
-extern AT91S_TempoStatus AT91F_SvcTempoStop (AT91PS_SvcTempo);
-
-
-// Following types are defined in another header files
-struct _AT91S_Buffer;
-
-// Constants:
-#define AT91C_COMMSVC_SUCCESS 0
-#define AT91C_COMMSVC_ERROR_SHIFT 8
-#define AT91C_COMMSVC_ERROR (0x0f << AT91C_COMMSVC_ERROR_SHIFT)
-
-typedef unsigned int AT91S_SvcCommStatus;
-
-// AT91S_Service definition
-// This structure is an abstraction of a communication peripheral
-typedef struct _AT91S_Service
-{
- // Methods:
- AT91S_SvcCommStatus (*Reset) (struct _AT91S_Service *pService);
- AT91S_SvcCommStatus (*StartTx)(struct _AT91S_Service *pService);
- AT91S_SvcCommStatus (*StartRx)(struct _AT91S_Service *pService);
- AT91S_SvcCommStatus (*StopTx) (struct _AT91S_Service *pService);
- AT91S_SvcCommStatus (*StopRx) (struct _AT91S_Service *pService);
- char (*TxReady)(struct _AT91S_Service *pService);
- char (*RxReady)(struct _AT91S_Service *pService);
- // Data:
- struct _AT91S_Buffer *pBuffer; // Link to a buffer object
- void *pChild;
-} AT91S_SvcComm, *AT91PS_SvcComm;
-
-// Constants:
-#define AT91C_XMODEM_SOH 0x01 /* Start of Heading for 128 bytes */
-#define AT91C_XMODEM_STX 0x02 /* Start of heading for 1024 bytes */
-#define AT91C_XMODEM_EOT 0x04 /* End of transmission */
-#define AT91C_XMODEM_ACK 0x06 /* Acknowledge */
-#define AT91C_XMODEM_NAK 0x15 /* Negative Acknowledge */
-#define AT91C_XMODEM_CRCCHR 'C'
-
-#define AT91C_XMODEM_PACKET_SIZE 2 // packet + packetCRC
-#define AT91C_XMODEM_CRC_SIZE 2 // crcLSB + crcMSB
-#define AT91C_XMODEM_DATA_SIZE_SOH 128 // data 128 corresponding to SOH header
-#define AT91C_XMODEM_DATA_SIZE_STX 1024 // data 1024 corresponding to STX header
-
-//* Following structure is used by SPipe to refer to the USB device peripheral endpoint
-typedef struct _AT91PS_SvcXmodem {
-
- // Public Methods:
- AT91S_SvcCommStatus (*Handler) (struct _AT91PS_SvcXmodem *, unsigned int);
- AT91S_SvcCommStatus (*StartTx) (struct _AT91PS_SvcXmodem *, unsigned int);
- AT91S_SvcCommStatus (*StopTx) (struct _AT91PS_SvcXmodem *, unsigned int);
-
- // Private Methods:
- AT91S_SvcCommStatus (*ReadHandler) (struct _AT91PS_SvcXmodem *, unsigned int csr);
- AT91S_SvcCommStatus (*WriteHandler) (struct _AT91PS_SvcXmodem *, unsigned int csr);
- unsigned short (*GetCrc) (char *ptr, unsigned int count);
- char (*CheckHeader) (unsigned char currentPacket, char *packet);
- char (*CheckData) (struct _AT91PS_SvcXmodem *);
-
- AT91S_SvcComm parent; // Base class
- AT91PS_USART pUsart;
-
- AT91S_SvcTempo tempo; // Link to a AT91S_Tempo object
-
- char *pData;
- unsigned int dataSize; // = XMODEM_DATA_STX or XMODEM_DATA_SOH
- char packetDesc[AT91C_XMODEM_PACKET_SIZE];
- unsigned char packetId; // Current packet
- char packetStatus;
- char isPacketDesc;
- char eot; // end of transmition
-} AT91S_SvcXmodem, *AT91PS_SvcXmodem;
-
-typedef AT91PS_SvcComm (*AT91PF_OpenSvcXmodem) ( AT91PS_SvcXmodem, AT91PS_USART, AT91PS_CtlTempo);
-
-// This function is called by the application.
-extern AT91PS_SvcComm AT91F_OpenSvcXmodem( AT91PS_SvcXmodem, AT91PS_USART, AT91PS_CtlTempo);
-
-extern unsigned short AT91F_SvcXmodemGetCrc (char *ptr, unsigned int count);
-extern char AT91F_SvcXmodemCheckHeader(unsigned char currentPacket, char *packet);
-extern char AT91F_SvcXmodemCheckData (AT91PS_SvcXmodem pSvcXmodem);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemReadHandler(AT91PS_SvcXmodem pSvcXmodem, unsigned int csr);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemWriteHandler(AT91PS_SvcXmodem pSvcXmodem, unsigned int csr);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemStartTx(AT91PS_SvcComm pSvcComm);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemStopTx(AT91PS_SvcComm pSvcComm);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemStartRx(AT91PS_SvcComm pSvcComm);
-extern AT91S_SvcCommStatus AT91F_SvcXmodemStopRx(AT91PS_SvcComm pSvcComm);
-extern char AT91F_SvcXmodemTxReady(AT91PS_SvcComm pService);
-extern char AT91F_SvcXmodemRxReady(AT91PS_SvcComm pSvcComm);
-
-
-// Constants:
-#define AT91C_PIPE_SUCCESS 0
-#define AT91C_PIPE_ERROR_SHIFT 8
-#define AT91C_PIPE_ERROR (0x0F << AT91C_PIPE_ERROR_SHIFT)
-
-#define AT91C_PIPE_OPEN_FAILED (1 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_WRITE_FAILED (2 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_WRITE_ABORTED (3 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_READ_FAILED (4 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_READ_ABORTED (5 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_ABORT_FAILED (6 << AT91C_PIPE_ERROR_SHIFT)
-#define AT91C_PIPE_RESET_FAILED (7 << AT91C_PIPE_ERROR_SHIFT)
-
-/* _AT91S_Pipe stucture */
-typedef unsigned int AT91S_PipeStatus;
-
-typedef struct _AT91S_Pipe
-{
- // A pipe is linked with a peripheral and a buffer
- AT91PS_SvcComm pSvcComm;
- AT91PS_Buffer pBuffer;
-
- // Callback functions with their arguments
- void (*WriteCallback) (AT91S_PipeStatus, void *);
- void (*ReadCallback) (AT91S_PipeStatus, void *);
- void *pPrivateReadData;
- void *pPrivateWriteData;
-
- // Pipe methods
- AT91S_PipeStatus (*Write) (
- struct _AT91S_Pipe *pPipe,
- char const * pData,
- unsigned int size,
- void (*callback) (AT91S_PipeStatus, void *),
- void *privateData);
- AT91S_PipeStatus (*Read) (
- struct _AT91S_Pipe *pPipe,
- char *pData,
- unsigned int size,
- void (*callback) (AT91S_PipeStatus, void *),
- void *privateData);
- AT91S_PipeStatus (*AbortWrite) (
- struct _AT91S_Pipe *pPipe);
- AT91S_PipeStatus (*AbortRead) (
- struct _AT91S_Pipe *pPipe);
- AT91S_PipeStatus (*Reset) (
- struct _AT91S_Pipe *pPipe);
- char (*IsWritten) (
- struct _AT91S_Pipe *pPipe,
- char const *pVoid);
- char (*IsReceived) (
- struct _AT91S_Pipe *pPipe,
- char const *pVoid);
-} AT91S_Pipe, *AT91PS_Pipe;
-
-// types used in AT91S_Pipe
-typedef AT91PS_Pipe (*AT91PF_OpenPipe) (AT91PS_Pipe, AT91PS_SvcComm, AT91PS_Buffer);
-typedef void (*AT91PF_PipeWriteCallBack) (AT91S_PipeStatus, void *);
-typedef void (*AT91PF_PipeReadCallBack) (AT91S_PipeStatus, void *);
-typedef AT91S_PipeStatus (*AT91PF_PipeWrite) (AT91PS_Pipe, char const *, unsigned int, void (*) (AT91S_PipeStatus, void *), void *);
-typedef AT91S_PipeStatus (*AT91PF_PipeRead) (AT91PS_Pipe, char const *, unsigned int, void (*) (AT91S_PipeStatus, void *), void *);
-typedef AT91S_PipeStatus (*AT91PF_PipeAbortWrite) (AT91PS_Pipe);
-typedef AT91S_PipeStatus (*AT91PF_PipeAbortRead) (AT91PS_Pipe);
-typedef AT91S_PipeStatus (*AT91PF_PipeReset) (AT91PS_Pipe);
-typedef char (*AT91PF_PipeIsWritten) (AT91PS_Pipe, char const *);
-typedef char (*AT91PF_PipeIsReceived) (AT91PS_Pipe, char const *);
-
-// This function is called by the application
-extern AT91PS_Pipe AT91F_OpenPipe(
- AT91PS_Pipe pPipe,
- AT91PS_SvcComm pSvcComm,
- AT91PS_Buffer pBuffer);
-
-// Following functions are called through AT91S_Pipe pointers
-
-extern AT91S_PipeStatus AT91F_PipeWrite(
- AT91PS_Pipe pPipe,
- char const *pVoid,
- unsigned int size,
- AT91PF_PipeWriteCallBack callback,
- void *privateData);
-extern AT91S_PipeStatus AT91F_PipeRead(
- AT91PS_Pipe pPipe,
- char *pVoid,
- unsigned int Size,
- AT91PF_PipeReadCallBack callback,
- void *privateData);
-extern AT91S_PipeStatus AT91F_PipeAbortWrite(AT91PS_Pipe pPipe);
-extern AT91S_PipeStatus AT91F_PipeAbortRead(AT91PS_Pipe pPipe);
-extern AT91S_PipeStatus AT91F_PipeReset(AT91PS_Pipe pPipe);
-extern char AT91F_PipeMsgWritten(AT91PS_Pipe pPipe, char const *pVoid);
-extern char AT91F_PipeMsgReceived(AT91PS_Pipe pPipe, char const *pVoid);
-
-#ifdef DBG_DRV_PIPE
-// This function parse the error number and return a string
-// describing the error message
-extern char const *AT91F_PipeGetError(AT91S_PipeStatus msgId);
-#endif
-
-extern const unsigned char bit_rev[256];
-
-extern void CalculateCrc32(const unsigned char *,unsigned int, unsigned int *);
-extern void CalculateCrc16(const unsigned char *, unsigned int , unsigned short *);
-extern void CalculateCrcHdlc(const unsigned char *, unsigned int, unsigned short *);
-extern void CalculateCrc16ccitt(const unsigned char *, unsigned int , unsigned short *);
-
-typedef const unsigned char* AT91PS_SVC_CRC_BIT_REV ;
-
-typedef void (*AT91PF_SVC_CRC32) (const unsigned char *, unsigned int, unsigned int *);
-typedef void (*AT91PF_SVC_CRC16) (const unsigned char *, unsigned int, unsigned short *);
-typedef void (*AT91PF_SVC_CRCHDLC) (const unsigned char *, unsigned int, unsigned short *);
-typedef void (*AT91PF_SVC_CRCCCITT)(const unsigned char *, unsigned int , unsigned short *);
-
-
-typedef short (*AT91PF_Sinus) (int angle);
-typedef const short * AT91PS_SINE_TAB;
-
-extern short AT91F_Sinus(int angle);
-extern const short AT91C_SINUS180_TAB[256];
-
-
-typedef void (TypeAICHandler) (void) ;
-
-
-// ROM BOOT Structure Element Definition (liv v2)
-typedef struct _AT91S_MEMCDesc
-{
- AT91PS_MC memc_base ; /* Peripheral base */
- unsigned char periph_id ; /* MC Peripheral Identifier */
-} AT91S_MEMCDesc, *AT91PS_MEMCDesc ;
-
-typedef struct _AT91S_Pio2Desc
-{
- AT91PS_PIO pio_base ; /* Base Address */
- unsigned char periph_id ; /* Peripheral Identifier */
- unsigned char pio_number ; /* Total Pin Number */
-} AT91S_Pio2Desc, *AT91PS_Pio2Desc ;
-
-typedef struct _AT91S_SPIDesc
-{
- AT91PS_SPI spi_base ;
- const AT91PS_PIO pio_base ;
- unsigned char periph_id ;
- unsigned char pin_spck ;
- unsigned char pin_miso ;
- unsigned char pin_mosi ;
- unsigned char pin_npcs[4] ;
-} AT91S_SPIDesc, *AT91PS_SPIDesc ;
-
-typedef struct _AT91S_USART2Desc
-{
- AT91PS_USART usart_base ; /* Peripheral base */
- const AT91PS_PIO pio_base ; /* IO controller descriptor */
- unsigned int pin_rxd ; /* RXD pin number in the PIO */
- unsigned int pin_txd ; /* TXD pin number in the PIO */
- unsigned int pin_sck ; /* SCK pin number in the PIO */
- unsigned int pin_rts ; /* RTS pin number in the PIO */
- unsigned int pin_cts ; /* CTS pin number in the PIO */
- unsigned int pin_dtr ; /* DTR pin number in the PIO */
- unsigned int pin_ri ; /* RI pin number in the PIO */
- unsigned int pin_dsr ; /* DSR pin number in the PIO */
- unsigned int pin_dcd ; /* DCD pin number in the PIO */
- unsigned int periph_id ; /* USART Peripheral Identifier */
-} AT91S_USART2Desc, *AT91PS_USART2Desc ;
-
-typedef struct _AT91S_TWIDesc
-{
- AT91PS_TWI TWI_base ;
- const AT91PS_PIO pio_base ;
- unsigned int pin_sck ;
- unsigned int pin_sda ;
- unsigned int periph_id;
-}AT91S_TWIDesc, *AT91PS_TWIDesc;
-
-typedef struct _AT91S_STDesc
-{
- AT91PS_ST st_base ; /* Peripheral base address */
- TypeAICHandler *AsmSTHandler ; /* Assembly interrupt handler */
- unsigned char PeriphId ; /* Peripheral Identifier */
-} AT91S_STDesc, *AT91PS_STDesc;
-
-typedef struct _AT91S_RomBoot {
- const unsigned int version;
- // Peripheral descriptors
- const AT91S_MEMCDesc MEMC_DESC;
- const AT91S_STDesc SYSTIMER_DESC;
- const AT91S_Pio2Desc PIOA_DESC;
- const AT91S_Pio2Desc PIOB_DESC;
- const AT91S_USART2Desc DBGU_DESC;
- const AT91S_USART2Desc USART0_DESC;
- const AT91S_USART2Desc USART1_DESC;
- const AT91S_USART2Desc USART2_DESC;
- const AT91S_USART2Desc USART3_DESC;
- const AT91S_TWIDesc TWI_DESC;
- const AT91S_SPIDesc SPI_DESC;
-
- // Objects entry
- const AT91PF_OpenPipe OpenPipe;
- const AT91PF_OpenSBuffer OpenSBuffer;
- const unsigned int reserved1;
- const AT91PF_OpenSvcXmodem OpenSvcXmodem;
- const AT91PF_OpenCtlTempo OpenCtlTempo;
- const unsigned int reserved2;
- const unsigned int reserved3;
- const unsigned int reserved4;
- const AT91PF_SVC_CRC16 CRC16;
- const AT91PF_SVC_CRCCCITT CRCCCITT;
- const AT91PF_SVC_CRCHDLC CRCHDLC;
- const AT91PF_SVC_CRC32 CRC32;
- const AT91PS_SVC_CRC_BIT_REV Bit_Reverse_Array;
- const AT91PS_SINE_TAB SineTab;
- const AT91PF_Sinus Sine;
-} AT91S_RomBoot, *AT91PS_RomBoot;
-
-#define AT91C_ROM_BOOT_ADDRESS ((const AT91S_RomBoot *) ( *((unsigned int *) (AT91C_BASE_ROM + 0x20))) )
-
-#endif
-
+++ /dev/null
-//*---------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*---------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*---------------------------------------------------------------------------
-//* File Name : AT91C_MCI_Device.h
-//* Object : Data Flash Atmel Description File
-//* Translator :
-//*
-//* 1.0 26/11/02 FB : Creation
-//*---------------------------------------------------------------------------
-
-#ifndef AT91C_MCI_Device_h
-#define AT91C_MCI_Device_h
-
-#include "AT91RM9200.h"
-#include "lib_AT91RM9200.h"
-
-typedef unsigned int AT91S_MCIDeviceStatus;
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-
-#define AT91C_CARD_REMOVED 0
-#define AT91C_MMC_CARD_INSERTED 1
-#define AT91C_SD_CARD_INSERTED 2
-
-#define AT91C_NO_ARGUMENT 0x0
-
-#define AT91C_FIRST_RCA 0xCAFE
-#define AT91C_MAX_MCI_CARDS 10
-
-#define AT91C_BUS_WIDTH_1BIT 0x00
-#define AT91C_BUS_WIDTH_4BITS 0x02
-
-/* Driver State */
-#define AT91C_MCI_IDLE 0x0
-#define AT91C_MCI_TIMEOUT_ERROR 0x1
-#define AT91C_MCI_RX_SINGLE_BLOCK 0x2
-#define AT91C_MCI_RX_MULTIPLE_BLOCK 0x3
-#define AT91C_MCI_RX_STREAM 0x4
-#define AT91C_MCI_TX_SINGLE_BLOCK 0x5
-#define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6
-#define AT91C_MCI_TX_STREAM 0x7
-
-/* TimeOut */
-#define AT91C_TIMEOUT_CMDRDY 30
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-// MMC & SDCard Structures
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-
-/*-----------------------------------------------*/
-/* SDCard Device Descriptor Structure Definition */
-/*-----------------------------------------------*/
-typedef struct _AT91S_MciDeviceDesc
-{
- volatile unsigned char state;
- unsigned char SDCard_bus_width;
-
-} AT91S_MciDeviceDesc, *AT91PS_MciDeviceDesc;
-
-/*---------------------------------------------*/
-/* MMC & SDCard Structure Device Features */
-/*---------------------------------------------*/
-typedef struct _AT91S_MciDeviceFeatures
-{
- unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED)
- unsigned int Relative_Card_Address; // RCA
- unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD
- unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD
- unsigned char Read_Partial; // READ_BL_PARTIAL
- unsigned char Write_Partial; // WRITE_BL_PARTIAL
- unsigned char Erase_Block_Enable; // ERASE_BLK_EN
- unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN
- unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN
- unsigned char Sector_Size; // SECTOR_SIZE
- unsigned int Memory_Capacity; // Size in bits of the device
-
-} AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ;
-
-/*---------------------------------------------*/
-/* MCI Device Structure Definition */
-/*---------------------------------------------*/
-typedef struct _AT91S_MciDevice
-{
- AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor
- AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array
-}AT91S_MciDevice, *AT91PS_MciDevice;
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-// MCI_CMD Register Value
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-#define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD)
-
-/////////////////////////////////////////////////////////////////
-// Class 0 & 1 commands: Basic commands and Read Stream commands
-/////////////////////////////////////////////////////////////////
-
-#define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE )
-#define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD)
-#define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD)
-#define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 )
-#define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD)
-#define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD)
-
-#define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested
-
-#define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
-#define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
-#define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT )
-
-#define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO )
-
-//*------------------------------------------------
-//* Class 2 commands: Block oriented Read commands
-//*------------------------------------------------
-
-#define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
-#define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
-#define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
-
-//*--------------------------------------------
-//* Class 3 commands: Sequential write commands
-//*--------------------------------------------
-
-#define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC
-
-//*------------------------------------------------
-//* Class 4 commands: Block oriented write commands
-//*------------------------------------------------
-
-#define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
-#define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
-#define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 )
-
-
-//*----------------------------------------
-//* Class 6 commands: Group Write protect
-//*----------------------------------------
-
-#define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 )
-
-
-//*----------------------------------------
-//* Class 5 commands: Erase commands
-//*----------------------------------------
-
-#define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 )
-#define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT )
-
-//*----------------------------------------
-//* Class 7 commands: Lock commands
-//*----------------------------------------
-
-#define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
-
-//*-----------------------------------------------
-// Class 8 commands: Application specific commands
-//*-----------------------------------------------
-
-#define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
-
-#define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO )
-#define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-#define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-
-#define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\
- AT91C_SDCARD_STATUS_CMD +\
- AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\
- AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\
- AT91C_SDCARD_APP_OP_COND_CMD +\
- AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\
- AT91C_SDCARD_SEND_SCR_CMD)
-
-//*----------------------------------------
-//* Class 9 commands: IO Mode commands
-//*----------------------------------------
-
-#define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT)
-#define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-// Functions returnals
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-#define AT91C_CMD_SEND_OK 0 // Command ok
-#define AT91C_CMD_SEND_ERROR -1 // Command failed
-#define AT91C_INIT_OK 2 // Init Successfull
-#define AT91C_INIT_ERROR 3 // Init Failed
-#define AT91C_READ_OK 4 // Read Successfull
-#define AT91C_READ_ERROR 5 // Read Failed
-#define AT91C_WRITE_OK 6 // Write Successfull
-#define AT91C_WRITE_ERROR 7 // Write Failed
-#define AT91C_ERASE_OK 8 // Erase Successfull
-#define AT91C_ERASE_ERROR 9 // Erase Failed
-#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull
-#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-// MCI_SR Errors
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\
- AT91C_MCI_OVRE |\
- AT91C_MCI_DTOE |\
- AT91C_MCI_DCRCE |\
- AT91C_MCI_RTOE |\
- AT91C_MCI_RENDE |\
- AT91C_MCI_RCRCE |\
- AT91C_MCI_RDIRE |\
- AT91C_MCI_RINDE)
-
-////////////////////////////////////////////////////////////////////////////////////////////////////
-// OCR Register
-////////////////////////////////////////////////////////////////////////////////////////////////////
-#define AT91C_VDD_16_17 (1 << 4)
-#define AT91C_VDD_17_18 (1 << 5)
-#define AT91C_VDD_18_19 (1 << 6)
-#define AT91C_VDD_19_20 (1 << 7)
-#define AT91C_VDD_20_21 (1 << 8)
-#define AT91C_VDD_21_22 (1 << 9)
-#define AT91C_VDD_22_23 (1 << 10)
-#define AT91C_VDD_23_24 (1 << 11)
-#define AT91C_VDD_24_25 (1 << 12)
-#define AT91C_VDD_25_26 (1 << 13)
-#define AT91C_VDD_26_27 (1 << 14)
-#define AT91C_VDD_27_28 (1 << 15)
-#define AT91C_VDD_28_29 (1 << 16)
-#define AT91C_VDD_29_30 (1 << 17)
-#define AT91C_VDD_30_31 (1 << 18)
-#define AT91C_VDD_31_32 (1 << 19)
-#define AT91C_VDD_32_33 (1 << 20)
-#define AT91C_VDD_33_34 (1 << 21)
-#define AT91C_VDD_34_35 (1 << 22)
-#define AT91C_VDD_35_36 (1 << 23)
-#define AT91C_CARD_POWER_UP_BUSY (1 << 31)
-
-#define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\
- AT91C_VDD_28_29 +\
- AT91C_VDD_29_30 +\
- AT91C_VDD_30_31 +\
- AT91C_VDD_31_32 +\
- AT91C_VDD_32_33)
-
-////////////////////////////////////////////////////////////////////////////////////////////////////
-// CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1)
-////////////////////////////////////////////////////////////////////////////////////////////////////
-#define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus
-#define AT91C_SR_IDLE (0 << 9)
-#define AT91C_SR_READY (1 << 9)
-#define AT91C_SR_IDENT (2 << 9)
-#define AT91C_SR_STBY (3 << 9)
-#define AT91C_SR_TRAN (4 << 9)
-#define AT91C_SR_DATA (5 << 9)
-#define AT91C_SR_RCV (6 << 9)
-#define AT91C_SR_PRG (7 << 9)
-#define AT91C_SR_DIS (8 << 9)
-
-#define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN)
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-// MMC CSD register header File
-// AT91C_CSD_xxx_S for shift value
-// AT91C_CSD_xxx_M for mask value
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-
-// First Response INT <=> CSD[3] : bits 0 to 31
-#define AT91C_CSD_BIT0_S 0 // [0:0]
-#define AT91C_CSD_BIT0_M 0x01
-#define AT91C_CSD_CRC_S 1 // [7:1]
-#define AT91C_CSD_CRC_M 0x7F
-#define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility
-#define AT91C_CSD_MMC_ECC_M 0x03
-#define AT91C_CSD_FILE_FMT_S 10 // [11:10]
-#define AT91C_CSD_FILE_FMT_M 0x03
-#define AT91C_CSD_TMP_WP_S 12 // [12:12]
-#define AT91C_CSD_TMP_WP_M 0x01
-#define AT91C_CSD_PERM_WP_S 13 // [13:13]
-#define AT91C_CSD_PERM_WP_M 0x01
-#define AT91C_CSD_COPY_S 14 // [14:14]
-#define AT91C_CSD_COPY_M 0x01
-#define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15]
-#define AT91C_CSD_FILE_FMT_GRP_M 0x01
-// reserved 16 // [20:16]
-// reserved 0x1F
-#define AT91C_CSD_WBLOCK_P_S 21 // [21:21]
-#define AT91C_CSD_WBLOCK_P_M 0x01
-#define AT91C_CSD_WBLEN_S 22 // [25:22]
-#define AT91C_CSD_WBLEN_M 0x0F
-#define AT91C_CSD_R2W_F_S 26 // [28:26]
-#define AT91C_CSD_R2W_F_M 0x07
-#define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility
-#define AT91C_CSD_MMC_DEF_ECC_M 0x03
-#define AT91C_CSD_WP_GRP_EN_S 31 // [31:31]
-#define AT91C_CSD_WP_GRP_EN_M 0x01
-
-// Seconde Response INT <=> CSD[2] : bits 32 to 63
-#define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32]
-#define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F
-#define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39]
-#define AT91C_CSD_v21_SECT_SIZE_M 0x7F
-#define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46]
-#define AT91C_CSD_v21_ER_BLEN_EN_M 0x01
-
-#define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32]
-#define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F
-#define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37]
-#define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F
-#define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42]
-#define AT91C_CSD_v22_SECT_SIZE_M 0x1F
-
-#define AT91C_CSD_C_SIZE_M_S 15 // [49:47]
-#define AT91C_CSD_C_SIZE_M_M 0x07
-#define AT91C_CSD_VDD_WMAX_S 18 // [52:50]
-#define AT91C_CSD_VDD_WMAX_M 0x07
-#define AT91C_CSD_VDD_WMIN_S 21 // [55:53]
-#define AT91C_CSD_VDD_WMIN_M 0x07
-#define AT91C_CSD_RCUR_MAX_S 24 // [58:56]
-#define AT91C_CSD_RCUR_MAX_M 0x07
-#define AT91C_CSD_RCUR_MIN_S 27 // [61:59]
-#define AT91C_CSD_RCUR_MIN_M 0x07
-#define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE
-#define AT91C_CSD_CSIZE_L_M 0x03
-
-// Third Response INT <=> CSD[1] : bits 64 to 95
-#define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE
-#define AT91C_CSD_CSIZE_H_M 0x03FF
-// reserved 10 // [75:74]
-// reserved 0x03
-#define AT91C_CSD_DSR_I_S 12 // [76:76]
-#define AT91C_CSD_DSR_I_M 0x01
-#define AT91C_CSD_RD_B_MIS_S 13 // [77:77]
-#define AT91C_CSD_RD_B_MIS_M 0x01
-#define AT91C_CSD_WR_B_MIS_S 14 // [78:78]
-#define AT91C_CSD_WR_B_MIS_M 0x01
-#define AT91C_CSD_RD_B_PAR_S 15 // [79:79]
-#define AT91C_CSD_RD_B_PAR_M 0x01
-#define AT91C_CSD_RD_B_LEN_S 16 // [83:80]
-#define AT91C_CSD_RD_B_LEN_M 0x0F
-#define AT91C_CSD_CCC_S 20 // [95:84]
-#define AT91C_CSD_CCC_M 0x0FFF
-
-// Fourth Response INT <=> CSD[0] : bits 96 to 127
-#define AT91C_CSD_TRANS_SPEED_S 0 // [103:96]
-#define AT91C_CSD_TRANS_SPEED_M 0xFF
-#define AT91C_CSD_NSAC_S 8 // [111:104]
-#define AT91C_CSD_NSAC_M 0xFF
-#define AT91C_CSD_TAAC_S 16 // [119:112]
-#define AT91C_CSD_TAAC_M 0xFF
-// reserved 24 // [121:120]
-// reserved 0x03
-#define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility
-#define AT91C_CSD_MMC_SPEC_VERS_M 0x0F
-#define AT91C_CSD_STRUCT_S 30 // [127:126]
-#define AT91C_CSD_STRUCT_M 0x03
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////
-
-#endif
-
+++ /dev/null
-// ----------------------------------------------------------------------------
-// ATMEL Microcontroller Software Support - ROUSSET -
-// ----------------------------------------------------------------------------
-// The software is delivered "AS IS" without warranty or condition of any
-// kind, either express, implied or statutory. This includes without
-// limitation any warranty or condition with respect to merchantability or
-// fitness for any particular purpose, or against the infringements of
-// intellectual property rights of others.
-// ----------------------------------------------------------------------------
-// File Name : AT91RM9200.h
-// Object : AT91RM9200 definitions
-// Generated : AT91 SW Application Group 11/19/2003 (17:20:50)
-//
-// CVS Reference : /AT91RM9200.pl/1.16/Fri Feb 07 10:29:51 2003//
-// CVS Reference : /SYS_AT91RM9200.pl/1.2/Fri Jan 17 12:44:37 2003//
-// CVS Reference : /MC_1760A.pl/1.1/Fri Aug 23 14:38:22 2002//
-// CVS Reference : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-// CVS Reference : /PMC_2636A.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
-// CVS Reference : /ST_1763B.pl/1.1/Fri Aug 23 14:41:42 2002//
-// CVS Reference : /RTC_1245D.pl/1.2/Fri Jan 31 12:19:06 2003//
-// CVS Reference : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-// CVS Reference : /DBGU_1754A.pl/1.4/Fri Jan 31 12:18:24 2003//
-// CVS Reference : /UDP_1765B.pl/1.3/Fri Aug 02 14:45:38 2002//
-// CVS Reference : /MCI_1764A.pl/1.2/Thu Nov 14 17:48:24 2002//
-// CVS Reference : /US_1739C.pl/1.2/Fri Jul 12 07:49:25 2002//
-// CVS Reference : /SPI_AT91RMxxxx.pl/1.3/Tue Nov 26 10:20:29 2002//
-// CVS Reference : /SSC_1762A.pl/1.2/Fri Nov 08 13:26:39 2002//
-// CVS Reference : /TC_1753B.pl/1.2/Fri Jan 31 12:19:55 2003//
-// CVS Reference : /TWI_1761B.pl/1.4/Fri Feb 07 10:30:07 2003//
-// CVS Reference : /PDC_1734B.pl/1.2/Thu Nov 21 16:38:23 2002//
-// CVS Reference : /UHP_xxxxA.pl/1.1/Mon Jul 22 12:21:58 2002//
-// CVS Reference : /EMAC_1794A.pl/1.4/Fri Jan 17 12:11:54 2003//
-// CVS Reference : /EBI_1759B.pl/1.10/Fri Jan 17 12:44:29 2003//
-// CVS Reference : /SMC_1783A.pl/1.3/Thu Oct 31 14:38:17 2002//
-// CVS Reference : /SDRC_1758B.pl/1.2/Thu Oct 03 13:04:41 2002//
-// CVS Reference : /BFC_1757B.pl/1.3/Thu Oct 31 14:38:00 2002//
-// ----------------------------------------------------------------------------
-
-#ifndef AT91RM9200_H
-#define AT91RM9200_H
-
-typedef volatile unsigned int AT91_REG;// Hardware register definition
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR System Peripherals
-// *****************************************************************************
-typedef struct _AT91S_SYS {
- AT91_REG AIC_SMR[32]; // Source Mode Register
- AT91_REG AIC_SVR[32]; // Source Vector Register
- AT91_REG AIC_IVR; // IRQ Vector Register
- AT91_REG AIC_FVR; // FIQ Vector Register
- AT91_REG AIC_ISR; // Interrupt Status Register
- AT91_REG AIC_IPR; // Interrupt Pending Register
- AT91_REG AIC_IMR; // Interrupt Mask Register
- AT91_REG AIC_CISR; // Core Interrupt Status Register
- AT91_REG Reserved0[2]; //
- AT91_REG AIC_IECR; // Interrupt Enable Command Register
- AT91_REG AIC_IDCR; // Interrupt Disable Command Register
- AT91_REG AIC_ICCR; // Interrupt Clear Command Register
- AT91_REG AIC_ISCR; // Interrupt Set Command Register
- AT91_REG AIC_EOICR; // End of Interrupt Command Register
- AT91_REG AIC_SPU; // Spurious Vector Register
- AT91_REG AIC_DCR; // Debug Control Register (Protect)
- AT91_REG Reserved1[1]; //
- AT91_REG AIC_FFER; // Fast Forcing Enable Register
- AT91_REG AIC_FFDR; // Fast Forcing Disable Register
- AT91_REG AIC_FFSR; // Fast Forcing Status Register
- AT91_REG Reserved2[45]; //
- AT91_REG DBGU_CR; // Control Register
- AT91_REG DBGU_MR; // Mode Register
- AT91_REG DBGU_IER; // Interrupt Enable Register
- AT91_REG DBGU_IDR; // Interrupt Disable Register
- AT91_REG DBGU_IMR; // Interrupt Mask Register
- AT91_REG DBGU_CSR; // Channel Status Register
- AT91_REG DBGU_RHR; // Receiver Holding Register
- AT91_REG DBGU_THR; // Transmitter Holding Register
- AT91_REG DBGU_BRGR; // Baud Rate Generator Register
- AT91_REG Reserved3[7]; //
- AT91_REG DBGU_C1R; // Chip ID1 Register
- AT91_REG DBGU_C2R; // Chip ID2 Register
- AT91_REG DBGU_FNTR; // Force NTRST Register
- AT91_REG Reserved4[45]; //
- AT91_REG DBGU_RPR; // Receive Pointer Register
- AT91_REG DBGU_RCR; // Receive Counter Register
- AT91_REG DBGU_TPR; // Transmit Pointer Register
- AT91_REG DBGU_TCR; // Transmit Counter Register
- AT91_REG DBGU_RNPR; // Receive Next Pointer Register
- AT91_REG DBGU_RNCR; // Receive Next Counter Register
- AT91_REG DBGU_TNPR; // Transmit Next Pointer Register
- AT91_REG DBGU_TNCR; // Transmit Next Counter Register
- AT91_REG DBGU_PTCR; // PDC Transfer Control Register
- AT91_REG DBGU_PTSR; // PDC Transfer Status Register
- AT91_REG Reserved5[54]; //
- AT91_REG PIOA_PER; // PIO Enable Register
- AT91_REG PIOA_PDR; // PIO Disable Register
- AT91_REG PIOA_PSR; // PIO Status Register
- AT91_REG Reserved6[1]; //
- AT91_REG PIOA_OER; // Output Enable Register
- AT91_REG PIOA_ODR; // Output Disable Registerr
- AT91_REG PIOA_OSR; // Output Status Register
- AT91_REG Reserved7[1]; //
- AT91_REG PIOA_IFER; // Input Filter Enable Register
- AT91_REG PIOA_IFDR; // Input Filter Disable Register
- AT91_REG PIOA_IFSR; // Input Filter Status Register
- AT91_REG Reserved8[1]; //
- AT91_REG PIOA_SODR; // Set Output Data Register
- AT91_REG PIOA_CODR; // Clear Output Data Register
- AT91_REG PIOA_ODSR; // Output Data Status Register
- AT91_REG PIOA_PDSR; // Pin Data Status Register
- AT91_REG PIOA_IER; // Interrupt Enable Register
- AT91_REG PIOA_IDR; // Interrupt Disable Register
- AT91_REG PIOA_IMR; // Interrupt Mask Register
- AT91_REG PIOA_ISR; // Interrupt Status Register
- AT91_REG PIOA_MDER; // Multi-driver Enable Register
- AT91_REG PIOA_MDDR; // Multi-driver Disable Register
- AT91_REG PIOA_MDSR; // Multi-driver Status Register
- AT91_REG Reserved9[1]; //
- AT91_REG PIOA_PPUDR; // Pull-up Disable Register
- AT91_REG PIOA_PPUER; // Pull-up Enable Register
- AT91_REG PIOA_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved10[1]; //
- AT91_REG PIOA_ASR; // Select A Register
- AT91_REG PIOA_BSR; // Select B Register
- AT91_REG PIOA_ABSR; // AB Select Status Register
- AT91_REG Reserved11[9]; //
- AT91_REG PIOA_OWER; // Output Write Enable Register
- AT91_REG PIOA_OWDR; // Output Write Disable Register
- AT91_REG PIOA_OWSR; // Output Write Status Register
- AT91_REG Reserved12[85]; //
- AT91_REG PIOB_PER; // PIO Enable Register
- AT91_REG PIOB_PDR; // PIO Disable Register
- AT91_REG PIOB_PSR; // PIO Status Register
- AT91_REG Reserved13[1]; //
- AT91_REG PIOB_OER; // Output Enable Register
- AT91_REG PIOB_ODR; // Output Disable Registerr
- AT91_REG PIOB_OSR; // Output Status Register
- AT91_REG Reserved14[1]; //
- AT91_REG PIOB_IFER; // Input Filter Enable Register
- AT91_REG PIOB_IFDR; // Input Filter Disable Register
- AT91_REG PIOB_IFSR; // Input Filter Status Register
- AT91_REG Reserved15[1]; //
- AT91_REG PIOB_SODR; // Set Output Data Register
- AT91_REG PIOB_CODR; // Clear Output Data Register
- AT91_REG PIOB_ODSR; // Output Data Status Register
- AT91_REG PIOB_PDSR; // Pin Data Status Register
- AT91_REG PIOB_IER; // Interrupt Enable Register
- AT91_REG PIOB_IDR; // Interrupt Disable Register
- AT91_REG PIOB_IMR; // Interrupt Mask Register
- AT91_REG PIOB_ISR; // Interrupt Status Register
- AT91_REG PIOB_MDER; // Multi-driver Enable Register
- AT91_REG PIOB_MDDR; // Multi-driver Disable Register
- AT91_REG PIOB_MDSR; // Multi-driver Status Register
- AT91_REG Reserved16[1]; //
- AT91_REG PIOB_PPUDR; // Pull-up Disable Register
- AT91_REG PIOB_PPUER; // Pull-up Enable Register
- AT91_REG PIOB_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved17[1]; //
- AT91_REG PIOB_ASR; // Select A Register
- AT91_REG PIOB_BSR; // Select B Register
- AT91_REG PIOB_ABSR; // AB Select Status Register
- AT91_REG Reserved18[9]; //
- AT91_REG PIOB_OWER; // Output Write Enable Register
- AT91_REG PIOB_OWDR; // Output Write Disable Register
- AT91_REG PIOB_OWSR; // Output Write Status Register
- AT91_REG Reserved19[85]; //
- AT91_REG PIOC_PER; // PIO Enable Register
- AT91_REG PIOC_PDR; // PIO Disable Register
- AT91_REG PIOC_PSR; // PIO Status Register
- AT91_REG Reserved20[1]; //
- AT91_REG PIOC_OER; // Output Enable Register
- AT91_REG PIOC_ODR; // Output Disable Registerr
- AT91_REG PIOC_OSR; // Output Status Register
- AT91_REG Reserved21[1]; //
- AT91_REG PIOC_IFER; // Input Filter Enable Register
- AT91_REG PIOC_IFDR; // Input Filter Disable Register
- AT91_REG PIOC_IFSR; // Input Filter Status Register
- AT91_REG Reserved22[1]; //
- AT91_REG PIOC_SODR; // Set Output Data Register
- AT91_REG PIOC_CODR; // Clear Output Data Register
- AT91_REG PIOC_ODSR; // Output Data Status Register
- AT91_REG PIOC_PDSR; // Pin Data Status Register
- AT91_REG PIOC_IER; // Interrupt Enable Register
- AT91_REG PIOC_IDR; // Interrupt Disable Register
- AT91_REG PIOC_IMR; // Interrupt Mask Register
- AT91_REG PIOC_ISR; // Interrupt Status Register
- AT91_REG PIOC_MDER; // Multi-driver Enable Register
- AT91_REG PIOC_MDDR; // Multi-driver Disable Register
- AT91_REG PIOC_MDSR; // Multi-driver Status Register
- AT91_REG Reserved23[1]; //
- AT91_REG PIOC_PPUDR; // Pull-up Disable Register
- AT91_REG PIOC_PPUER; // Pull-up Enable Register
- AT91_REG PIOC_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved24[1]; //
- AT91_REG PIOC_ASR; // Select A Register
- AT91_REG PIOC_BSR; // Select B Register
- AT91_REG PIOC_ABSR; // AB Select Status Register
- AT91_REG Reserved25[9]; //
- AT91_REG PIOC_OWER; // Output Write Enable Register
- AT91_REG PIOC_OWDR; // Output Write Disable Register
- AT91_REG PIOC_OWSR; // Output Write Status Register
- AT91_REG Reserved26[85]; //
- AT91_REG PIOD_PER; // PIO Enable Register
- AT91_REG PIOD_PDR; // PIO Disable Register
- AT91_REG PIOD_PSR; // PIO Status Register
- AT91_REG Reserved27[1]; //
- AT91_REG PIOD_OER; // Output Enable Register
- AT91_REG PIOD_ODR; // Output Disable Registerr
- AT91_REG PIOD_OSR; // Output Status Register
- AT91_REG Reserved28[1]; //
- AT91_REG PIOD_IFER; // Input Filter Enable Register
- AT91_REG PIOD_IFDR; // Input Filter Disable Register
- AT91_REG PIOD_IFSR; // Input Filter Status Register
- AT91_REG Reserved29[1]; //
- AT91_REG PIOD_SODR; // Set Output Data Register
- AT91_REG PIOD_CODR; // Clear Output Data Register
- AT91_REG PIOD_ODSR; // Output Data Status Register
- AT91_REG PIOD_PDSR; // Pin Data Status Register
- AT91_REG PIOD_IER; // Interrupt Enable Register
- AT91_REG PIOD_IDR; // Interrupt Disable Register
- AT91_REG PIOD_IMR; // Interrupt Mask Register
- AT91_REG PIOD_ISR; // Interrupt Status Register
- AT91_REG PIOD_MDER; // Multi-driver Enable Register
- AT91_REG PIOD_MDDR; // Multi-driver Disable Register
- AT91_REG PIOD_MDSR; // Multi-driver Status Register
- AT91_REG Reserved30[1]; //
- AT91_REG PIOD_PPUDR; // Pull-up Disable Register
- AT91_REG PIOD_PPUER; // Pull-up Enable Register
- AT91_REG PIOD_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved31[1]; //
- AT91_REG PIOD_ASR; // Select A Register
- AT91_REG PIOD_BSR; // Select B Register
- AT91_REG PIOD_ABSR; // AB Select Status Register
- AT91_REG Reserved32[9]; //
- AT91_REG PIOD_OWER; // Output Write Enable Register
- AT91_REG PIOD_OWDR; // Output Write Disable Register
- AT91_REG PIOD_OWSR; // Output Write Status Register
- AT91_REG Reserved33[85]; //
- AT91_REG PMC_SCER; // System Clock Enable Register
- AT91_REG PMC_SCDR; // System Clock Disable Register
- AT91_REG PMC_SCSR; // System Clock Status Register
- AT91_REG Reserved34[1]; //
- AT91_REG PMC_PCER; // Peripheral Clock Enable Register
- AT91_REG PMC_PCDR; // Peripheral Clock Disable Register
- AT91_REG PMC_PCSR; // Peripheral Clock Status Register
- AT91_REG Reserved35[1]; //
- AT91_REG CKGR_MOR; // Main Oscillator Register
- AT91_REG CKGR_MCFR; // Main Clock Frequency Register
- AT91_REG CKGR_PLLAR; // PLL A Register
- AT91_REG CKGR_PLLBR; // PLL B Register
- AT91_REG PMC_MCKR; // Master Clock Register
- AT91_REG Reserved36[3]; //
- AT91_REG PMC_PCKR[8]; // Programmable Clock Register
- AT91_REG PMC_IER; // Interrupt Enable Register
- AT91_REG PMC_IDR; // Interrupt Disable Register
- AT91_REG PMC_SR; // Status Register
- AT91_REG PMC_IMR; // Interrupt Mask Register
- AT91_REG Reserved37[36]; //
- AT91_REG ST_CR; // Control Register
- AT91_REG ST_PIMR; // Period Interval Mode Register
- AT91_REG ST_WDMR; // Watchdog Mode Register
- AT91_REG ST_RTMR; // Real-time Mode Register
- AT91_REG ST_SR; // Status Register
- AT91_REG ST_IER; // Interrupt Enable Register
- AT91_REG ST_IDR; // Interrupt Disable Register
- AT91_REG ST_IMR; // Interrupt Mask Register
- AT91_REG ST_RTAR; // Real-time Alarm Register
- AT91_REG ST_CRTR; // Current Real-time Register
- AT91_REG Reserved38[54]; //
- AT91_REG RTC_CR; // Control Register
- AT91_REG RTC_MR; // Mode Register
- AT91_REG RTC_TIMR; // Time Register
- AT91_REG RTC_CALR; // Calendar Register
- AT91_REG RTC_TIMALR; // Time Alarm Register
- AT91_REG RTC_CALALR; // Calendar Alarm Register
- AT91_REG RTC_SR; // Status Register
- AT91_REG RTC_SCCR; // Status Clear Command Register
- AT91_REG RTC_IER; // Interrupt Enable Register
- AT91_REG RTC_IDR; // Interrupt Disable Register
- AT91_REG RTC_IMR; // Interrupt Mask Register
- AT91_REG RTC_VER; // Valid Entry Register
- AT91_REG Reserved39[52]; //
- AT91_REG MC_RCR; // MC Remap Control Register
- AT91_REG MC_ASR; // MC Abort Status Register
- AT91_REG MC_AASR; // MC Abort Address Status Register
- AT91_REG Reserved40[1]; //
- AT91_REG MC_PUIA[16]; // MC Protection Unit Area
- AT91_REG MC_PUP; // MC Protection Unit Peripherals
- AT91_REG MC_PUER; // MC Protection Unit Enable Register
- AT91_REG Reserved41[2]; //
- AT91_REG EBI_CSA; // Chip Select Assignment Register
- AT91_REG EBI_CFGR; // Configuration Register
- AT91_REG Reserved42[2]; //
- AT91_REG EBI_SMC2_CSR[8]; // SMC2 Chip Select Register
- AT91_REG EBI_SDRC_MR; // SDRAM Controller Mode Register
- AT91_REG EBI_SDRC_TR; // SDRAM Controller Refresh Timer Register
- AT91_REG EBI_SDRC_CR; // SDRAM Controller Configuration Register
- AT91_REG EBI_SDRC_SRR; // SDRAM Controller Self Refresh Register
- AT91_REG EBI_SDRC_LPR; // SDRAM Controller Low Power Register
- AT91_REG EBI_SDRC_IER; // SDRAM Controller Interrupt Enable Register
- AT91_REG EBI_SDRC_IDR; // SDRAM Controller Interrupt Disable Register
- AT91_REG EBI_SDRC_IMR; // SDRAM Controller Interrupt Mask Register
- AT91_REG EBI_SDRC_ISR; // SDRAM Controller Interrupt Mask Register
- AT91_REG Reserved43[3]; //
- AT91_REG EBI_BFC_MR; // BFC Mode Register
-} AT91S_SYS, *AT91PS_SYS;
-
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Memory Controller Interface
-// *****************************************************************************
-typedef struct _AT91S_MC {
- AT91_REG MC_RCR; // MC Remap Control Register
- AT91_REG MC_ASR; // MC Abort Status Register
- AT91_REG MC_AASR; // MC Abort Address Status Register
- AT91_REG Reserved0[1]; //
- AT91_REG MC_PUIA[16]; // MC Protection Unit Area
- AT91_REG MC_PUP; // MC Protection Unit Peripherals
- AT91_REG MC_PUER; // MC Protection Unit Enable Register
-} AT91S_MC, *AT91PS_MC;
-
-// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register --------
-#define AT91C_MC_RCB ((unsigned int) 0x1 << 0) // (MC) Remap Command Bit
-// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register --------
-#define AT91C_MC_UNDADD ((unsigned int) 0x1 << 0) // (MC) Undefined Addess Abort Status
-#define AT91C_MC_MISADD ((unsigned int) 0x1 << 1) // (MC) Misaligned Addess Abort Status
-#define AT91C_MC_MPU ((unsigned int) 0x1 << 2) // (MC) Memory protection Unit Abort Status
-#define AT91C_MC_ABTSZ ((unsigned int) 0x3 << 8) // (MC) Abort Size Status
-#define AT91C_MC_ABTSZ_BYTE ((unsigned int) 0x0 << 8) // (MC) Byte
-#define AT91C_MC_ABTSZ_HWORD ((unsigned int) 0x1 << 8) // (MC) Half-word
-#define AT91C_MC_ABTSZ_WORD ((unsigned int) 0x2 << 8) // (MC) Word
-#define AT91C_MC_ABTTYP ((unsigned int) 0x3 << 10) // (MC) Abort Type Status
-#define AT91C_MC_ABTTYP_DATAR ((unsigned int) 0x0 << 10) // (MC) Data Read
-#define AT91C_MC_ABTTYP_DATAW ((unsigned int) 0x1 << 10) // (MC) Data Write
-#define AT91C_MC_ABTTYP_FETCH ((unsigned int) 0x2 << 10) // (MC) Code Fetch
-#define AT91C_MC_MST0 ((unsigned int) 0x1 << 16) // (MC) Master 0 Abort Source
-#define AT91C_MC_MST1 ((unsigned int) 0x1 << 17) // (MC) Master 1 Abort Source
-#define AT91C_MC_SVMST0 ((unsigned int) 0x1 << 24) // (MC) Saved Master 0 Abort Source
-#define AT91C_MC_SVMST1 ((unsigned int) 0x1 << 25) // (MC) Saved Master 1 Abort Source
-// -------- MC_PUIA : (MC Offset: 0x10) MC Protection Unit Area --------
-#define AT91C_MC_PROT ((unsigned int) 0x3 << 0) // (MC) Protection
-#define AT91C_MC_PROT_PNAUNA ((unsigned int) 0x0) // (MC) Privilege: No Access, User: No Access
-#define AT91C_MC_PROT_PRWUNA ((unsigned int) 0x1) // (MC) Privilege: Read/Write, User: No Access
-#define AT91C_MC_PROT_PRWURO ((unsigned int) 0x2) // (MC) Privilege: Read/Write, User: Read Only
-#define AT91C_MC_PROT_PRWURW ((unsigned int) 0x3) // (MC) Privilege: Read/Write, User: Read/Write
-#define AT91C_MC_SIZE ((unsigned int) 0xF << 4) // (MC) Internal Area Size
-#define AT91C_MC_SIZE_1KB ((unsigned int) 0x0 << 4) // (MC) Area size 1KByte
-#define AT91C_MC_SIZE_2KB ((unsigned int) 0x1 << 4) // (MC) Area size 2KByte
-#define AT91C_MC_SIZE_4KB ((unsigned int) 0x2 << 4) // (MC) Area size 4KByte
-#define AT91C_MC_SIZE_8KB ((unsigned int) 0x3 << 4) // (MC) Area size 8KByte
-#define AT91C_MC_SIZE_16KB ((unsigned int) 0x4 << 4) // (MC) Area size 16KByte
-#define AT91C_MC_SIZE_32KB ((unsigned int) 0x5 << 4) // (MC) Area size 32KByte
-#define AT91C_MC_SIZE_64KB ((unsigned int) 0x6 << 4) // (MC) Area size 64KByte
-#define AT91C_MC_SIZE_128KB ((unsigned int) 0x7 << 4) // (MC) Area size 128KByte
-#define AT91C_MC_SIZE_256KB ((unsigned int) 0x8 << 4) // (MC) Area size 256KByte
-#define AT91C_MC_SIZE_512KB ((unsigned int) 0x9 << 4) // (MC) Area size 512KByte
-#define AT91C_MC_SIZE_1MB ((unsigned int) 0xA << 4) // (MC) Area size 1MByte
-#define AT91C_MC_SIZE_2MB ((unsigned int) 0xB << 4) // (MC) Area size 2MByte
-#define AT91C_MC_SIZE_4MB ((unsigned int) 0xC << 4) // (MC) Area size 4MByte
-#define AT91C_MC_SIZE_8MB ((unsigned int) 0xD << 4) // (MC) Area size 8MByte
-#define AT91C_MC_SIZE_16MB ((unsigned int) 0xE << 4) // (MC) Area size 16MByte
-#define AT91C_MC_SIZE_64MB ((unsigned int) 0xF << 4) // (MC) Area size 64MByte
-#define AT91C_MC_BA ((unsigned int) 0x3FFFF << 10) // (MC) Internal Area Base Address
-// -------- MC_PUP : (MC Offset: 0x50) MC Protection Unit Peripheral --------
-// -------- MC_PUER : (MC Offset: 0x54) MC Protection Unit Area --------
-#define AT91C_MC_PUEB ((unsigned int) 0x1 << 0) // (MC) Protection Unit enable Bit
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Real-time Clock Alarm and Parallel Load Interface
-// *****************************************************************************
-typedef struct _AT91S_RTC {
- AT91_REG RTC_CR; // Control Register
- AT91_REG RTC_MR; // Mode Register
- AT91_REG RTC_TIMR; // Time Register
- AT91_REG RTC_CALR; // Calendar Register
- AT91_REG RTC_TIMALR; // Time Alarm Register
- AT91_REG RTC_CALALR; // Calendar Alarm Register
- AT91_REG RTC_SR; // Status Register
- AT91_REG RTC_SCCR; // Status Clear Command Register
- AT91_REG RTC_IER; // Interrupt Enable Register
- AT91_REG RTC_IDR; // Interrupt Disable Register
- AT91_REG RTC_IMR; // Interrupt Mask Register
- AT91_REG RTC_VER; // Valid Entry Register
-} AT91S_RTC, *AT91PS_RTC;
-
-// -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register --------
-#define AT91C_RTC_UPDTIM ((unsigned int) 0x1 << 0) // (RTC) Update Request Time Register
-#define AT91C_RTC_UPDCAL ((unsigned int) 0x1 << 1) // (RTC) Update Request Calendar Register
-#define AT91C_RTC_TIMEVSEL ((unsigned int) 0x3 << 8) // (RTC) Time Event Selection
-#define AT91C_RTC_TIMEVSEL_MINUTE ((unsigned int) 0x0 << 8) // (RTC) Minute change.
-#define AT91C_RTC_TIMEVSEL_HOUR ((unsigned int) 0x1 << 8) // (RTC) Hour change.
-#define AT91C_RTC_TIMEVSEL_DAY24 ((unsigned int) 0x2 << 8) // (RTC) Every day at midnight.
-#define AT91C_RTC_TIMEVSEL_DAY12 ((unsigned int) 0x3 << 8) // (RTC) Every day at noon.
-#define AT91C_RTC_CALEVSEL ((unsigned int) 0x3 << 16) // (RTC) Calendar Event Selection
-#define AT91C_RTC_CALEVSEL_WEEK ((unsigned int) 0x0 << 16) // (RTC) Week change (every Monday at time 00:00:00).
-#define AT91C_RTC_CALEVSEL_MONTH ((unsigned int) 0x1 << 16) // (RTC) Month change (every 01 of each month at time 00:00:00).
-#define AT91C_RTC_CALEVSEL_YEAR ((unsigned int) 0x2 << 16) // (RTC) Year change (every January 1 at time 00:00:00).
-// -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register --------
-#define AT91C_RTC_HRMOD ((unsigned int) 0x1 << 0) // (RTC) 12-24 hour Mode
-// -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register --------
-#define AT91C_RTC_SEC ((unsigned int) 0x7F << 0) // (RTC) Current Second
-#define AT91C_RTC_MIN ((unsigned int) 0x7F << 8) // (RTC) Current Minute
-#define AT91C_RTC_HOUR ((unsigned int) 0x1F << 16) // (RTC) Current Hour
-#define AT91C_RTC_AMPM ((unsigned int) 0x1 << 22) // (RTC) Ante Meridiem, Post Meridiem Indicator
-// -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register --------
-#define AT91C_RTC_CENT ((unsigned int) 0x3F << 0) // (RTC) Current Century
-#define AT91C_RTC_YEAR ((unsigned int) 0xFF << 8) // (RTC) Current Year
-#define AT91C_RTC_MONTH ((unsigned int) 0x1F << 16) // (RTC) Current Month
-#define AT91C_RTC_DAY ((unsigned int) 0x7 << 21) // (RTC) Current Day
-#define AT91C_RTC_DATE ((unsigned int) 0x3F << 24) // (RTC) Current Date
-// -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register --------
-#define AT91C_RTC_SECEN ((unsigned int) 0x1 << 7) // (RTC) Second Alarm Enable
-#define AT91C_RTC_MINEN ((unsigned int) 0x1 << 15) // (RTC) Minute Alarm
-#define AT91C_RTC_HOUREN ((unsigned int) 0x1 << 23) // (RTC) Current Hour
-// -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register --------
-#define AT91C_RTC_MONTHEN ((unsigned int) 0x1 << 23) // (RTC) Month Alarm Enable
-#define AT91C_RTC_DATEEN ((unsigned int) 0x1 << 31) // (RTC) Date Alarm Enable
-// -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register --------
-#define AT91C_RTC_ACKUPD ((unsigned int) 0x1 << 0) // (RTC) Acknowledge for Update
-#define AT91C_RTC_ALARM ((unsigned int) 0x1 << 1) // (RTC) Alarm Flag
-#define AT91C_RTC_SECEV ((unsigned int) 0x1 << 2) // (RTC) Second Event
-#define AT91C_RTC_TIMEV ((unsigned int) 0x1 << 3) // (RTC) Time Event
-#define AT91C_RTC_CALEV ((unsigned int) 0x1 << 4) // (RTC) Calendar event
-// -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register --------
-// -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register --------
-// -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register --------
-// -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register --------
-// -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register --------
-#define AT91C_RTC_NVTIM ((unsigned int) 0x1 << 0) // (RTC) Non valid Time
-#define AT91C_RTC_NVCAL ((unsigned int) 0x1 << 1) // (RTC) Non valid Calendar
-#define AT91C_RTC_NVTIMALR ((unsigned int) 0x1 << 2) // (RTC) Non valid time Alarm
-#define AT91C_RTC_NVCALALR ((unsigned int) 0x1 << 3) // (RTC) Nonvalid Calendar Alarm
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR System Timer Interface
-// *****************************************************************************
-typedef struct _AT91S_ST {
- AT91_REG ST_CR; // Control Register
- AT91_REG ST_PIMR; // Period Interval Mode Register
- AT91_REG ST_WDMR; // Watchdog Mode Register
- AT91_REG ST_RTMR; // Real-time Mode Register
- AT91_REG ST_SR; // Status Register
- AT91_REG ST_IER; // Interrupt Enable Register
- AT91_REG ST_IDR; // Interrupt Disable Register
- AT91_REG ST_IMR; // Interrupt Mask Register
- AT91_REG ST_RTAR; // Real-time Alarm Register
- AT91_REG ST_CRTR; // Current Real-time Register
-} AT91S_ST, *AT91PS_ST;
-
-// -------- ST_CR : (ST Offset: 0x0) System Timer Control Register --------
-#define AT91C_ST_WDRST ((unsigned int) 0x1 << 0) // (ST) Watchdog Timer Restart
-// -------- ST_PIMR : (ST Offset: 0x4) System Timer Period Interval Mode Register --------
-#define AT91C_ST_PIV ((unsigned int) 0xFFFF << 0) // (ST) Watchdog Timer Restart
-// -------- ST_WDMR : (ST Offset: 0x8) System Timer Watchdog Mode Register --------
-#define AT91C_ST_WDV ((unsigned int) 0xFFFF << 0) // (ST) Watchdog Timer Restart
-#define AT91C_ST_RSTEN ((unsigned int) 0x1 << 16) // (ST) Reset Enable
-#define AT91C_ST_EXTEN ((unsigned int) 0x1 << 17) // (ST) External Signal Assertion Enable
-// -------- ST_RTMR : (ST Offset: 0xc) System Timer Real-time Mode Register --------
-#define AT91C_ST_RTPRES ((unsigned int) 0xFFFF << 0) // (ST) Real-time Timer Prescaler Value
-// -------- ST_SR : (ST Offset: 0x10) System Timer Status Register --------
-#define AT91C_ST_PITS ((unsigned int) 0x1 << 0) // (ST) Period Interval Timer Interrupt
-#define AT91C_ST_WDOVF ((unsigned int) 0x1 << 1) // (ST) Watchdog Overflow
-#define AT91C_ST_RTTINC ((unsigned int) 0x1 << 2) // (ST) Real-time Timer Increment
-#define AT91C_ST_ALMS ((unsigned int) 0x1 << 3) // (ST) Alarm Status
-// -------- ST_IER : (ST Offset: 0x14) System Timer Interrupt Enable Register --------
-// -------- ST_IDR : (ST Offset: 0x18) System Timer Interrupt Disable Register --------
-// -------- ST_IMR : (ST Offset: 0x1c) System Timer Interrupt Mask Register --------
-// -------- ST_RTAR : (ST Offset: 0x20) System Timer Real-time Alarm Register --------
-#define AT91C_ST_ALMV ((unsigned int) 0xFFFFF << 0) // (ST) Alarm Value Value
-// -------- ST_CRTR : (ST Offset: 0x24) System Timer Current Real-time Register --------
-#define AT91C_ST_CRTV ((unsigned int) 0xFFFFF << 0) // (ST) Current Real-time Value
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Power Management Controler
-// *****************************************************************************
-typedef struct _AT91S_PMC {
- AT91_REG PMC_SCER; // System Clock Enable Register
- AT91_REG PMC_SCDR; // System Clock Disable Register
- AT91_REG PMC_SCSR; // System Clock Status Register
- AT91_REG Reserved0[1]; //
- AT91_REG PMC_PCER; // Peripheral Clock Enable Register
- AT91_REG PMC_PCDR; // Peripheral Clock Disable Register
- AT91_REG PMC_PCSR; // Peripheral Clock Status Register
- AT91_REG Reserved1[5]; //
- AT91_REG PMC_MCKR; // Master Clock Register
- AT91_REG Reserved2[3]; //
- AT91_REG PMC_PCKR[8]; // Programmable Clock Register
- AT91_REG PMC_IER; // Interrupt Enable Register
- AT91_REG PMC_IDR; // Interrupt Disable Register
- AT91_REG PMC_SR; // Status Register
- AT91_REG PMC_IMR; // Interrupt Mask Register
-} AT91S_PMC, *AT91PS_PMC;
-
-// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------
-#define AT91C_PMC_PCK ((unsigned int) 0x1 << 0) // (PMC) Processor Clock
-#define AT91C_PMC_UDP ((unsigned int) 0x1 << 1) // (PMC) USB Device Port Clock
-#define AT91C_PMC_MCKUDP ((unsigned int) 0x1 << 2) // (PMC) USB Device Port Master Clock Automatic Disable on Suspend
-#define AT91C_PMC_UHP ((unsigned int) 0x1 << 4) // (PMC) USB Host Port Clock
-#define AT91C_PMC_PCK0 ((unsigned int) 0x1 << 8) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK1 ((unsigned int) 0x1 << 9) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK2 ((unsigned int) 0x1 << 10) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK3 ((unsigned int) 0x1 << 11) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK4 ((unsigned int) 0x1 << 12) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK5 ((unsigned int) 0x1 << 13) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK6 ((unsigned int) 0x1 << 14) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK7 ((unsigned int) 0x1 << 15) // (PMC) Programmable Clock Output
-// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register --------
-// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register --------
-// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------
-#define AT91C_PMC_CSS ((unsigned int) 0x3 << 0) // (PMC) Programmable Clock Selection
-#define AT91C_PMC_CSS_SLOW_CLK ((unsigned int) 0x0) // (PMC) Slow Clock is selected
-#define AT91C_PMC_CSS_MAIN_CLK ((unsigned int) 0x1) // (PMC) Main Clock is selected
-#define AT91C_PMC_CSS_PLLA_CLK ((unsigned int) 0x2) // (PMC) Clock from PLL A is selected
-#define AT91C_PMC_CSS_PLLB_CLK ((unsigned int) 0x3) // (PMC) Clock from PLL B is selected
-#define AT91C_PMC_PRES ((unsigned int) 0x7 << 2) // (PMC) Programmable Clock Prescaler
-#define AT91C_PMC_PRES_CLK ((unsigned int) 0x0 << 2) // (PMC) Selected clock
-#define AT91C_PMC_PRES_CLK_2 ((unsigned int) 0x1 << 2) // (PMC) Selected clock divided by 2
-#define AT91C_PMC_PRES_CLK_4 ((unsigned int) 0x2 << 2) // (PMC) Selected clock divided by 4
-#define AT91C_PMC_PRES_CLK_8 ((unsigned int) 0x3 << 2) // (PMC) Selected clock divided by 8
-#define AT91C_PMC_PRES_CLK_16 ((unsigned int) 0x4 << 2) // (PMC) Selected clock divided by 16
-#define AT91C_PMC_PRES_CLK_32 ((unsigned int) 0x5 << 2) // (PMC) Selected clock divided by 32
-#define AT91C_PMC_PRES_CLK_64 ((unsigned int) 0x6 << 2) // (PMC) Selected clock divided by 64
-#define AT91C_PMC_MDIV ((unsigned int) 0x3 << 8) // (PMC) Master Clock Division
-#define AT91C_PMC_MDIV_1 ((unsigned int) 0x0 << 8) // (PMC) The master clock and the processor clock are the same
-#define AT91C_PMC_MDIV_2 ((unsigned int) 0x1 << 8) // (PMC) The processor clock is twice as fast as the master clock
-#define AT91C_PMC_MDIV_3 ((unsigned int) 0x2 << 8) // (PMC) The processor clock is three times faster than the master clock
-#define AT91C_PMC_MDIV_4 ((unsigned int) 0x3 << 8) // (PMC) The processor clock is four times faster than the master clock
-// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------
-// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register --------
-#define AT91C_PMC_MOSCS ((unsigned int) 0x1 << 0) // (PMC) MOSC Status/Enable/Disable/Mask
-#define AT91C_PMC_LOCKA ((unsigned int) 0x1 << 1) // (PMC) PLL A Status/Enable/Disable/Mask
-#define AT91C_PMC_LOCKB ((unsigned int) 0x1 << 2) // (PMC) PLL B Status/Enable/Disable/Mask
-#define AT91C_PMC_MCKRDY ((unsigned int) 0x1 << 3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK0RDY ((unsigned int) 0x1 << 8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK1RDY ((unsigned int) 0x1 << 9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK2RDY ((unsigned int) 0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK3RDY ((unsigned int) 0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK4RDY ((unsigned int) 0x1 << 12) // (PMC) PCK4_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK5RDY ((unsigned int) 0x1 << 13) // (PMC) PCK5_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK6RDY ((unsigned int) 0x1 << 14) // (PMC) PCK6_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK7RDY ((unsigned int) 0x1 << 15) // (PMC) PCK7_RDY Status/Enable/Disable/Mask
-// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------
-// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------
-// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Clock Generator Controler
-// *****************************************************************************
-typedef struct _AT91S_CKGR {
- AT91_REG CKGR_MOR; // Main Oscillator Register
- AT91_REG CKGR_MCFR; // Main Clock Frequency Register
- AT91_REG CKGR_PLLAR; // PLL A Register
- AT91_REG CKGR_PLLBR; // PLL B Register
-} AT91S_CKGR, *AT91PS_CKGR;
-
-// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register --------
-#define AT91C_CKGR_MOSCEN ((unsigned int) 0x1 << 0) // (CKGR) Main Oscillator Enable
-#define AT91C_CKGR_OSCTEST ((unsigned int) 0x1 << 1) // (CKGR) Oscillator Test
-#define AT91C_CKGR_OSCOUNT ((unsigned int) 0xFF << 8) // (CKGR) Main Oscillator Start-up Time
-// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register --------
-#define AT91C_CKGR_MAINF ((unsigned int) 0xFFFF << 0) // (CKGR) Main Clock Frequency
-#define AT91C_CKGR_MAINRDY ((unsigned int) 0x1 << 16) // (CKGR) Main Clock Ready
-// -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register --------
-#define AT91C_CKGR_DIVA ((unsigned int) 0xFF << 0) // (CKGR) Divider Selected
-#define AT91C_CKGR_DIVA_0 ((unsigned int) 0x0) // (CKGR) Divider output is 0
-#define AT91C_CKGR_DIVA_BYPASS ((unsigned int) 0x1) // (CKGR) Divider is bypassed
-#define AT91C_CKGR_PLLACOUNT ((unsigned int) 0x3F << 8) // (CKGR) PLL A Counter
-#define AT91C_CKGR_OUTA ((unsigned int) 0x3 << 14) // (CKGR) PLL A Output Frequency Range
-#define AT91C_CKGR_OUTA_0 ((unsigned int) 0x0 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_1 ((unsigned int) 0x1 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_2 ((unsigned int) 0x2 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_3 ((unsigned int) 0x3 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_MULA ((unsigned int) 0x7FF << 16) // (CKGR) PLL A Multiplier
-#define AT91C_CKGR_SRCA ((unsigned int) 0x1 << 29) // (CKGR) PLL A Source
-// -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register --------
-#define AT91C_CKGR_DIVB ((unsigned int) 0xFF << 0) // (CKGR) Divider Selected
-#define AT91C_CKGR_DIVB_0 ((unsigned int) 0x0) // (CKGR) Divider output is 0
-#define AT91C_CKGR_DIVB_BYPASS ((unsigned int) 0x1) // (CKGR) Divider is bypassed
-#define AT91C_CKGR_PLLBCOUNT ((unsigned int) 0x3F << 8) // (CKGR) PLL B Counter
-#define AT91C_CKGR_OUTB ((unsigned int) 0x3 << 14) // (CKGR) PLL B Output Frequency Range
-#define AT91C_CKGR_OUTB_0 ((unsigned int) 0x0 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_1 ((unsigned int) 0x1 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_2 ((unsigned int) 0x2 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_3 ((unsigned int) 0x3 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_MULB ((unsigned int) 0x7FF << 16) // (CKGR) PLL B Multiplier
-#define AT91C_CKGR_USB_96M ((unsigned int) 0x1 << 28) // (CKGR) Divider for USB Ports
-#define AT91C_CKGR_USB_PLL ((unsigned int) 0x1 << 29) // (CKGR) PLL Use
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Parallel Input Output Controler
-// *****************************************************************************
-typedef struct _AT91S_PIO {
- AT91_REG PIO_PER; // PIO Enable Register
- AT91_REG PIO_PDR; // PIO Disable Register
- AT91_REG PIO_PSR; // PIO Status Register
- AT91_REG Reserved0[1]; //
- AT91_REG PIO_OER; // Output Enable Register
- AT91_REG PIO_ODR; // Output Disable Registerr
- AT91_REG PIO_OSR; // Output Status Register
- AT91_REG Reserved1[1]; //
- AT91_REG PIO_IFER; // Input Filter Enable Register
- AT91_REG PIO_IFDR; // Input Filter Disable Register
- AT91_REG PIO_IFSR; // Input Filter Status Register
- AT91_REG Reserved2[1]; //
- AT91_REG PIO_SODR; // Set Output Data Register
- AT91_REG PIO_CODR; // Clear Output Data Register
- AT91_REG PIO_ODSR; // Output Data Status Register
- AT91_REG PIO_PDSR; // Pin Data Status Register
- AT91_REG PIO_IER; // Interrupt Enable Register
- AT91_REG PIO_IDR; // Interrupt Disable Register
- AT91_REG PIO_IMR; // Interrupt Mask Register
- AT91_REG PIO_ISR; // Interrupt Status Register
- AT91_REG PIO_MDER; // Multi-driver Enable Register
- AT91_REG PIO_MDDR; // Multi-driver Disable Register
- AT91_REG PIO_MDSR; // Multi-driver Status Register
- AT91_REG Reserved3[1]; //
- AT91_REG PIO_PPUDR; // Pull-up Disable Register
- AT91_REG PIO_PPUER; // Pull-up Enable Register
- AT91_REG PIO_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved4[1]; //
- AT91_REG PIO_ASR; // Select A Register
- AT91_REG PIO_BSR; // Select B Register
- AT91_REG PIO_ABSR; // AB Select Status Register
- AT91_REG Reserved5[9]; //
- AT91_REG PIO_OWER; // Output Write Enable Register
- AT91_REG PIO_OWDR; // Output Write Disable Register
- AT91_REG PIO_OWSR; // Output Write Status Register
-} AT91S_PIO, *AT91PS_PIO;
-
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Debug Unit
-// *****************************************************************************
-typedef struct _AT91S_DBGU {
- AT91_REG DBGU_CR; // Control Register
- AT91_REG DBGU_MR; // Mode Register
- AT91_REG DBGU_IER; // Interrupt Enable Register
- AT91_REG DBGU_IDR; // Interrupt Disable Register
- AT91_REG DBGU_IMR; // Interrupt Mask Register
- AT91_REG DBGU_CSR; // Channel Status Register
- AT91_REG DBGU_RHR; // Receiver Holding Register
- AT91_REG DBGU_THR; // Transmitter Holding Register
- AT91_REG DBGU_BRGR; // Baud Rate Generator Register
- AT91_REG Reserved0[7]; //
- AT91_REG DBGU_C1R; // Chip ID1 Register
- AT91_REG DBGU_C2R; // Chip ID2 Register
- AT91_REG DBGU_FNTR; // Force NTRST Register
- AT91_REG Reserved1[45]; //
- AT91_REG DBGU_RPR; // Receive Pointer Register
- AT91_REG DBGU_RCR; // Receive Counter Register
- AT91_REG DBGU_TPR; // Transmit Pointer Register
- AT91_REG DBGU_TCR; // Transmit Counter Register
- AT91_REG DBGU_RNPR; // Receive Next Pointer Register
- AT91_REG DBGU_RNCR; // Receive Next Counter Register
- AT91_REG DBGU_TNPR; // Transmit Next Pointer Register
- AT91_REG DBGU_TNCR; // Transmit Next Counter Register
- AT91_REG DBGU_PTCR; // PDC Transfer Control Register
- AT91_REG DBGU_PTSR; // PDC Transfer Status Register
-} AT91S_DBGU, *AT91PS_DBGU;
-
-// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register --------
-#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) // (DBGU) Reset Receiver
-#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) // (DBGU) Reset Transmitter
-#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) // (DBGU) Receiver Enable
-#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) // (DBGU) Receiver Disable
-#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) // (DBGU) Transmitter Enable
-#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) // (DBGU) Transmitter Disable
-// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register --------
-#define AT91C_US_PAR ((unsigned int) 0x7 << 9) // (DBGU) Parity type
-#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) // (DBGU) Even Parity
-#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) // (DBGU) Odd Parity
-#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) // (DBGU) Parity forced to 0 (Space)
-#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) // (DBGU) Parity forced to 1 (Mark)
-#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) // (DBGU) No Parity
-#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) // (DBGU) Multi-drop mode
-#define AT91C_US_CHMODE ((unsigned int) 0x3 << 14) // (DBGU) Channel Mode
-#define AT91C_US_CHMODE_NORMAL ((unsigned int) 0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
-#define AT91C_US_CHMODE_AUTO ((unsigned int) 0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
-#define AT91C_US_CHMODE_LOCAL ((unsigned int) 0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
-#define AT91C_US_CHMODE_REMOTE ((unsigned int) 0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
-// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register --------
-#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) // (DBGU) RXRDY Interrupt
-#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) // (DBGU) TXRDY Interrupt
-#define AT91C_US_ENDRX ((unsigned int) 0x1 << 3) // (DBGU) End of Receive Transfer Interrupt
-#define AT91C_US_ENDTX ((unsigned int) 0x1 << 4) // (DBGU) End of Transmit Interrupt
-#define AT91C_US_OVRE ((unsigned int) 0x1 << 5) // (DBGU) Overrun Interrupt
-#define AT91C_US_FRAME ((unsigned int) 0x1 << 6) // (DBGU) Framing Error Interrupt
-#define AT91C_US_PARE ((unsigned int) 0x1 << 7) // (DBGU) Parity Error Interrupt
-#define AT91C_US_TXEMPTY ((unsigned int) 0x1 << 9) // (DBGU) TXEMPTY Interrupt
-#define AT91C_US_TXBUFE ((unsigned int) 0x1 << 11) // (DBGU) TXBUFE Interrupt
-#define AT91C_US_RXBUFF ((unsigned int) 0x1 << 12) // (DBGU) RXBUFF Interrupt
-#define AT91C_US_COMM_TX ((unsigned int) 0x1 << 30) // (DBGU) COMM_TX Interrupt
-#define AT91C_US_COMM_RX ((unsigned int) 0x1 << 31) // (DBGU) COMM_RX Interrupt
-// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register --------
-// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register --------
-// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register --------
-// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register --------
-#define AT91C_US_FORCE_NTRST ((unsigned int) 0x1 << 0) // (DBGU) Force NTRST in JTAG
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Peripheral Data Controller
-// *****************************************************************************
-typedef struct _AT91S_PDC {
- AT91_REG PDC_RPR; // Receive Pointer Register
- AT91_REG PDC_RCR; // Receive Counter Register
- AT91_REG PDC_TPR; // Transmit Pointer Register
- AT91_REG PDC_TCR; // Transmit Counter Register
- AT91_REG PDC_RNPR; // Receive Next Pointer Register
- AT91_REG PDC_RNCR; // Receive Next Counter Register
- AT91_REG PDC_TNPR; // Transmit Next Pointer Register
- AT91_REG PDC_TNCR; // Transmit Next Counter Register
- AT91_REG PDC_PTCR; // PDC Transfer Control Register
- AT91_REG PDC_PTSR; // PDC Transfer Status Register
-} AT91S_PDC, *AT91PS_PDC;
-
-// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register --------
-#define AT91C_PDC_RXTEN ((unsigned int) 0x1 << 0) // (PDC) Receiver Transfer Enable
-#define AT91C_PDC_RXTDIS ((unsigned int) 0x1 << 1) // (PDC) Receiver Transfer Disable
-#define AT91C_PDC_TXTEN ((unsigned int) 0x1 << 8) // (PDC) Transmitter Transfer Enable
-#define AT91C_PDC_TXTDIS ((unsigned int) 0x1 << 9) // (PDC) Transmitter Transfer Disable
-// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
-// *****************************************************************************
-typedef struct _AT91S_AIC {
- AT91_REG AIC_SMR[32]; // Source Mode Register
- AT91_REG AIC_SVR[32]; // Source Vector Register
- AT91_REG AIC_IVR; // IRQ Vector Register
- AT91_REG AIC_FVR; // FIQ Vector Register
- AT91_REG AIC_ISR; // Interrupt Status Register
- AT91_REG AIC_IPR; // Interrupt Pending Register
- AT91_REG AIC_IMR; // Interrupt Mask Register
- AT91_REG AIC_CISR; // Core Interrupt Status Register
- AT91_REG Reserved0[2]; //
- AT91_REG AIC_IECR; // Interrupt Enable Command Register
- AT91_REG AIC_IDCR; // Interrupt Disable Command Register
- AT91_REG AIC_ICCR; // Interrupt Clear Command Register
- AT91_REG AIC_ISCR; // Interrupt Set Command Register
- AT91_REG AIC_EOICR; // End of Interrupt Command Register
- AT91_REG AIC_SPU; // Spurious Vector Register
- AT91_REG AIC_DCR; // Debug Control Register (Protect)
- AT91_REG Reserved1[1]; //
- AT91_REG AIC_FFER; // Fast Forcing Enable Register
- AT91_REG AIC_FFDR; // Fast Forcing Disable Register
- AT91_REG AIC_FFSR; // Fast Forcing Status Register
-} AT91S_AIC, *AT91PS_AIC;
-
-// -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
-#define AT91C_AIC_PRIOR ((unsigned int) 0x7 << 0) // (AIC) Priority Level
-#define AT91C_AIC_PRIOR_LOWEST ((unsigned int) 0x0) // (AIC) Lowest priority level
-#define AT91C_AIC_PRIOR_HIGHEST ((unsigned int) 0x7) // (AIC) Highest priority level
-#define AT91C_AIC_SRCTYPE ((unsigned int) 0x3 << 5) // (AIC) Interrupt Source Type
-#define AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE ((unsigned int) 0x0 << 5) // (AIC) Internal Sources Code Label Level Sensitive
-#define AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED ((unsigned int) 0x1 << 5) // (AIC) Internal Sources Code Label Edge triggered
-#define AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL ((unsigned int) 0x2 << 5) // (AIC) External Sources Code Label High-level Sensitive
-#define AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE ((unsigned int) 0x3 << 5) // (AIC) External Sources Code Label Positive Edge triggered
-// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
-#define AT91C_AIC_NFIQ ((unsigned int) 0x1 << 0) // (AIC) NFIQ Status
-#define AT91C_AIC_NIRQ ((unsigned int) 0x1 << 1) // (AIC) NIRQ Status
-// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) --------
-#define AT91C_AIC_DCR_PROT ((unsigned int) 0x1 << 0) // (AIC) Protection Mode
-#define AT91C_AIC_DCR_GMSK ((unsigned int) 0x1 << 1) // (AIC) General Mask
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Serial Parallel Interface
-// *****************************************************************************
-typedef struct _AT91S_SPI {
- AT91_REG SPI_CR; // Control Register
- AT91_REG SPI_MR; // Mode Register
- AT91_REG SPI_RDR; // Receive Data Register
- AT91_REG SPI_TDR; // Transmit Data Register
- AT91_REG SPI_SR; // Status Register
- AT91_REG SPI_IER; // Interrupt Enable Register
- AT91_REG SPI_IDR; // Interrupt Disable Register
- AT91_REG SPI_IMR; // Interrupt Mask Register
- AT91_REG Reserved0[4]; //
- AT91_REG SPI_CSR[4]; // Chip Select Register
- AT91_REG Reserved1[48]; //
- AT91_REG SPI_RPR; // Receive Pointer Register
- AT91_REG SPI_RCR; // Receive Counter Register
- AT91_REG SPI_TPR; // Transmit Pointer Register
- AT91_REG SPI_TCR; // Transmit Counter Register
- AT91_REG SPI_RNPR; // Receive Next Pointer Register
- AT91_REG SPI_RNCR; // Receive Next Counter Register
- AT91_REG SPI_TNPR; // Transmit Next Pointer Register
- AT91_REG SPI_TNCR; // Transmit Next Counter Register
- AT91_REG SPI_PTCR; // PDC Transfer Control Register
- AT91_REG SPI_PTSR; // PDC Transfer Status Register
-} AT91S_SPI, *AT91PS_SPI;
-
-// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register --------
-#define AT91C_SPI_SPIEN ((unsigned int) 0x1 << 0) // (SPI) SPI Enable
-#define AT91C_SPI_SPIDIS ((unsigned int) 0x1 << 1) // (SPI) SPI Disable
-#define AT91C_SPI_SWRST ((unsigned int) 0x1 << 7) // (SPI) SPI Software reset
-// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register --------
-#define AT91C_SPI_MSTR ((unsigned int) 0x1 << 0) // (SPI) Master/Slave Mode
-#define AT91C_SPI_PS ((unsigned int) 0x1 << 1) // (SPI) Peripheral Select
-#define AT91C_SPI_PS_FIXED ((unsigned int) 0x0 << 1) // (SPI) Fixed Peripheral Select
-#define AT91C_SPI_PS_VARIABLE ((unsigned int) 0x1 << 1) // (SPI) Variable Peripheral Select
-#define AT91C_SPI_PCSDEC ((unsigned int) 0x1 << 2) // (SPI) Chip Select Decode
-#define AT91C_SPI_DIV32 ((unsigned int) 0x1 << 3) // (SPI) Clock Selection
-#define AT91C_SPI_MODFDIS ((unsigned int) 0x1 << 4) // (SPI) Mode Fault Detection
-#define AT91C_SPI_LLB ((unsigned int) 0x1 << 7) // (SPI) Clock Selection
-#define AT91C_SPI_PCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select
-#define AT91C_SPI_DLYBCS ((unsigned int) 0xFF << 24) // (SPI) Delay Between Chip Selects
-// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register --------
-#define AT91C_SPI_RD ((unsigned int) 0xFFFF << 0) // (SPI) Receive Data
-#define AT91C_SPI_RPCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
-// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register --------
-#define AT91C_SPI_TD ((unsigned int) 0xFFFF << 0) // (SPI) Transmit Data
-#define AT91C_SPI_TPCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
-// -------- SPI_SR : (SPI Offset: 0x10) Status Register --------
-#define AT91C_SPI_RDRF ((unsigned int) 0x1 << 0) // (SPI) Receive Data Register Full
-#define AT91C_SPI_TDRE ((unsigned int) 0x1 << 1) // (SPI) Transmit Data Register Empty
-#define AT91C_SPI_MODF ((unsigned int) 0x1 << 2) // (SPI) Mode Fault Error
-#define AT91C_SPI_OVRES ((unsigned int) 0x1 << 3) // (SPI) Overrun Error Status
-#define AT91C_SPI_SPENDRX ((unsigned int) 0x1 << 4) // (SPI) End of Receiver Transfer
-#define AT91C_SPI_SPENDTX ((unsigned int) 0x1 << 5) // (SPI) End of Receiver Transfer
-#define AT91C_SPI_RXBUFF ((unsigned int) 0x1 << 6) // (SPI) RXBUFF Interrupt
-#define AT91C_SPI_TXBUFE ((unsigned int) 0x1 << 7) // (SPI) TXBUFE Interrupt
-#define AT91C_SPI_SPIENS ((unsigned int) 0x1 << 16) // (SPI) Enable Status
-// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register --------
-// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register --------
-// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register --------
-// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register --------
-#define AT91C_SPI_CPOL ((unsigned int) 0x1 << 0) // (SPI) Clock Polarity
-#define AT91C_SPI_NCPHA ((unsigned int) 0x1 << 1) // (SPI) Clock Phase
-#define AT91C_SPI_BITS ((unsigned int) 0xF << 4) // (SPI) Bits Per Transfer
-#define AT91C_SPI_BITS_8 ((unsigned int) 0x0 << 4) // (SPI) 8 Bits Per transfer
-#define AT91C_SPI_BITS_9 ((unsigned int) 0x1 << 4) // (SPI) 9 Bits Per transfer
-#define AT91C_SPI_BITS_10 ((unsigned int) 0x2 << 4) // (SPI) 10 Bits Per transfer
-#define AT91C_SPI_BITS_11 ((unsigned int) 0x3 << 4) // (SPI) 11 Bits Per transfer
-#define AT91C_SPI_BITS_12 ((unsigned int) 0x4 << 4) // (SPI) 12 Bits Per transfer
-#define AT91C_SPI_BITS_13 ((unsigned int) 0x5 << 4) // (SPI) 13 Bits Per transfer
-#define AT91C_SPI_BITS_14 ((unsigned int) 0x6 << 4) // (SPI) 14 Bits Per transfer
-#define AT91C_SPI_BITS_15 ((unsigned int) 0x7 << 4) // (SPI) 15 Bits Per transfer
-#define AT91C_SPI_BITS_16 ((unsigned int) 0x8 << 4) // (SPI) 16 Bits Per transfer
-#define AT91C_SPI_SCBR ((unsigned int) 0xFF << 8) // (SPI) Serial Clock Baud Rate
-#define AT91C_SPI_DLYBS ((unsigned int) 0xFF << 16) // (SPI) Serial Clock Baud Rate
-#define AT91C_SPI_DLYBCT ((unsigned int) 0xFF << 24) // (SPI) Delay Between Consecutive Transfers
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Synchronous Serial Controller Interface
-// *****************************************************************************
-typedef struct _AT91S_SSC {
- AT91_REG SSC_CR; // Control Register
- AT91_REG SSC_CMR; // Clock Mode Register
- AT91_REG Reserved0[2]; //
- AT91_REG SSC_RCMR; // Receive Clock ModeRegister
- AT91_REG SSC_RFMR; // Receive Frame Mode Register
- AT91_REG SSC_TCMR; // Transmit Clock Mode Register
- AT91_REG SSC_TFMR; // Transmit Frame Mode Register
- AT91_REG SSC_RHR; // Receive Holding Register
- AT91_REG SSC_THR; // Transmit Holding Register
- AT91_REG Reserved1[2]; //
- AT91_REG SSC_RSHR; // Receive Sync Holding Register
- AT91_REG SSC_TSHR; // Transmit Sync Holding Register
- AT91_REG SSC_RC0R; // Receive Compare 0 Register
- AT91_REG SSC_RC1R; // Receive Compare 1 Register
- AT91_REG SSC_SR; // Status Register
- AT91_REG SSC_IER; // Interrupt Enable Register
- AT91_REG SSC_IDR; // Interrupt Disable Register
- AT91_REG SSC_IMR; // Interrupt Mask Register
- AT91_REG Reserved2[44]; //
- AT91_REG SSC_RPR; // Receive Pointer Register
- AT91_REG SSC_RCR; // Receive Counter Register
- AT91_REG SSC_TPR; // Transmit Pointer Register
- AT91_REG SSC_TCR; // Transmit Counter Register
- AT91_REG SSC_RNPR; // Receive Next Pointer Register
- AT91_REG SSC_RNCR; // Receive Next Counter Register
- AT91_REG SSC_TNPR; // Transmit Next Pointer Register
- AT91_REG SSC_TNCR; // Transmit Next Counter Register
- AT91_REG SSC_PTCR; // PDC Transfer Control Register
- AT91_REG SSC_PTSR; // PDC Transfer Status Register
-} AT91S_SSC, *AT91PS_SSC;
-
-// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register --------
-#define AT91C_SSC_RXEN ((unsigned int) 0x1 << 0) // (SSC) Receive Enable
-#define AT91C_SSC_RXDIS ((unsigned int) 0x1 << 1) // (SSC) Receive Disable
-#define AT91C_SSC_TXEN ((unsigned int) 0x1 << 8) // (SSC) Transmit Enable
-#define AT91C_SSC_TXDIS ((unsigned int) 0x1 << 9) // (SSC) Transmit Disable
-#define AT91C_SSC_SWRST ((unsigned int) 0x1 << 15) // (SSC) Software Reset
-// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register --------
-#define AT91C_SSC_CKS ((unsigned int) 0x3 << 0) // (SSC) Receive/Transmit Clock Selection
-#define AT91C_SSC_CKS_DIV ((unsigned int) 0x0) // (SSC) Divided Clock
-#define AT91C_SSC_CKS_TK ((unsigned int) 0x1) // (SSC) TK Clock signal
-#define AT91C_SSC_CKS_RK ((unsigned int) 0x2) // (SSC) RK pin
-#define AT91C_SSC_CKO ((unsigned int) 0x7 << 2) // (SSC) Receive/Transmit Clock Output Mode Selection
-#define AT91C_SSC_CKO_NONE ((unsigned int) 0x0 << 2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
-#define AT91C_SSC_CKO_CONTINOUS ((unsigned int) 0x1 << 2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
-#define AT91C_SSC_CKO_DATA_TX ((unsigned int) 0x2 << 2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
-#define AT91C_SSC_CKI ((unsigned int) 0x1 << 5) // (SSC) Receive/Transmit Clock Inversion
-#define AT91C_SSC_CKG ((unsigned int) 0x3 << 6) // (SSC) Receive/Transmit Clock Gating Selection
-#define AT91C_SSC_CKG_NONE ((unsigned int) 0x0 << 6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
-#define AT91C_SSC_CKG_LOW ((unsigned int) 0x1 << 6) // (SSC) Receive/Transmit Clock enabled only if RF Low
-#define AT91C_SSC_CKG_HIGH ((unsigned int) 0x2 << 6) // (SSC) Receive/Transmit Clock enabled only if RF High
-#define AT91C_SSC_START ((unsigned int) 0xF << 8) // (SSC) Receive/Transmit Start Selection
-#define AT91C_SSC_START_CONTINOUS ((unsigned int) 0x0 << 8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
-#define AT91C_SSC_START_TX ((unsigned int) 0x1 << 8) // (SSC) Transmit/Receive start
-#define AT91C_SSC_START_LOW_RF ((unsigned int) 0x2 << 8) // (SSC) Detection of a low level on RF input
-#define AT91C_SSC_START_HIGH_RF ((unsigned int) 0x3 << 8) // (SSC) Detection of a high level on RF input
-#define AT91C_SSC_START_FALL_RF ((unsigned int) 0x4 << 8) // (SSC) Detection of a falling edge on RF input
-#define AT91C_SSC_START_RISE_RF ((unsigned int) 0x5 << 8) // (SSC) Detection of a rising edge on RF input
-#define AT91C_SSC_START_LEVEL_RF ((unsigned int) 0x6 << 8) // (SSC) Detection of any level change on RF input
-#define AT91C_SSC_START_EDGE_RF ((unsigned int) 0x7 << 8) // (SSC) Detection of any edge on RF input
-#define AT91C_SSC_START_0 ((unsigned int) 0x8 << 8) // (SSC) Compare 0
-#define AT91C_SSC_STOP ((unsigned int) 0x1 << 12) // (SSC) Receive Stop Selection
-#define AT91C_SSC_STTOUT ((unsigned int) 0x1 << 15) // (SSC) Receive/Transmit Start Output Selection
-#define AT91C_SSC_STTDLY ((unsigned int) 0xFF << 16) // (SSC) Receive/Transmit Start Delay
-#define AT91C_SSC_PERIOD ((unsigned int) 0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
-// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register --------
-#define AT91C_SSC_DATLEN ((unsigned int) 0x1F << 0) // (SSC) Data Length
-#define AT91C_SSC_LOOP ((unsigned int) 0x1 << 5) // (SSC) Loop Mode
-#define AT91C_SSC_MSBF ((unsigned int) 0x1 << 7) // (SSC) Most Significant Bit First
-#define AT91C_SSC_DATNB ((unsigned int) 0xF << 8) // (SSC) Data Number per Frame
-#define AT91C_SSC_FSLEN ((unsigned int) 0xF << 16) // (SSC) Receive/Transmit Frame Sync length
-#define AT91C_SSC_FSOS ((unsigned int) 0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
-#define AT91C_SSC_FSOS_NONE ((unsigned int) 0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
-#define AT91C_SSC_FSOS_NEGATIVE ((unsigned int) 0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
-#define AT91C_SSC_FSOS_POSITIVE ((unsigned int) 0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
-#define AT91C_SSC_FSOS_LOW ((unsigned int) 0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
-#define AT91C_SSC_FSOS_HIGH ((unsigned int) 0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
-#define AT91C_SSC_FSOS_TOGGLE ((unsigned int) 0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
-#define AT91C_SSC_FSEDGE ((unsigned int) 0x1 << 24) // (SSC) Frame Sync Edge Detection
-// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register --------
-// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register --------
-#define AT91C_SSC_DATDEF ((unsigned int) 0x1 << 5) // (SSC) Data Default Value
-#define AT91C_SSC_FSDEN ((unsigned int) 0x1 << 23) // (SSC) Frame Sync Data Enable
-// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register --------
-#define AT91C_SSC_TXRDY ((unsigned int) 0x1 << 0) // (SSC) Transmit Ready
-#define AT91C_SSC_TXEMPTY ((unsigned int) 0x1 << 1) // (SSC) Transmit Empty
-#define AT91C_SSC_ENDTX ((unsigned int) 0x1 << 2) // (SSC) End Of Transmission
-#define AT91C_SSC_TXBUFE ((unsigned int) 0x1 << 3) // (SSC) Transmit Buffer Empty
-#define AT91C_SSC_RXRDY ((unsigned int) 0x1 << 4) // (SSC) Receive Ready
-#define AT91C_SSC_OVRUN ((unsigned int) 0x1 << 5) // (SSC) Receive Overrun
-#define AT91C_SSC_ENDRX ((unsigned int) 0x1 << 6) // (SSC) End of Reception
-#define AT91C_SSC_RXBUFF ((unsigned int) 0x1 << 7) // (SSC) Receive Buffer Full
-#define AT91C_SSC_CP0 ((unsigned int) 0x1 << 8) // (SSC) Compare 0
-#define AT91C_SSC_CP1 ((unsigned int) 0x1 << 9) // (SSC) Compare 1
-#define AT91C_SSC_TXSYN ((unsigned int) 0x1 << 10) // (SSC) Transmit Sync
-#define AT91C_SSC_RXSYN ((unsigned int) 0x1 << 11) // (SSC) Receive Sync
-#define AT91C_SSC_TXENA ((unsigned int) 0x1 << 16) // (SSC) Transmit Enable
-#define AT91C_SSC_RXENA ((unsigned int) 0x1 << 17) // (SSC) Receive Enable
-// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register --------
-// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register --------
-// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Usart
-// *****************************************************************************
-typedef struct _AT91S_USART {
- AT91_REG US_CR; // Control Register
- AT91_REG US_MR; // Mode Register
- AT91_REG US_IER; // Interrupt Enable Register
- AT91_REG US_IDR; // Interrupt Disable Register
- AT91_REG US_IMR; // Interrupt Mask Register
- AT91_REG US_CSR; // Channel Status Register
- AT91_REG US_RHR; // Receiver Holding Register
- AT91_REG US_THR; // Transmitter Holding Register
- AT91_REG US_BRGR; // Baud Rate Generator Register
- AT91_REG US_RTOR; // Receiver Time-out Register
- AT91_REG US_TTGR; // Transmitter Time-guard Register
- AT91_REG Reserved0[5]; //
- AT91_REG US_FIDI; // FI_DI_Ratio Register
- AT91_REG US_NER; // Nb Errors Register
- AT91_REG US_XXR; // XON_XOFF Register
- AT91_REG US_IF; // IRDA_FILTER Register
- AT91_REG Reserved1[44]; //
- AT91_REG US_RPR; // Receive Pointer Register
- AT91_REG US_RCR; // Receive Counter Register
- AT91_REG US_TPR; // Transmit Pointer Register
- AT91_REG US_TCR; // Transmit Counter Register
- AT91_REG US_RNPR; // Receive Next Pointer Register
- AT91_REG US_RNCR; // Receive Next Counter Register
- AT91_REG US_TNPR; // Transmit Next Pointer Register
- AT91_REG US_TNCR; // Transmit Next Counter Register
- AT91_REG US_PTCR; // PDC Transfer Control Register
- AT91_REG US_PTSR; // PDC Transfer Status Register
-} AT91S_USART, *AT91PS_USART;
-
-// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
-#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) // (USART) Reset Status Bits
-#define AT91C_US_STTBRK ((unsigned int) 0x1 << 9) // (USART) Start Break
-#define AT91C_US_STPBRK ((unsigned int) 0x1 << 10) // (USART) Stop Break
-#define AT91C_US_STTTO ((unsigned int) 0x1 << 11) // (USART) Start Time-out
-#define AT91C_US_SENDA ((unsigned int) 0x1 << 12) // (USART) Send Address
-#define AT91C_US_RSTIT ((unsigned int) 0x1 << 13) // (USART) Reset Iterations
-#define AT91C_US_RSTNACK ((unsigned int) 0x1 << 14) // (USART) Reset Non Acknowledge
-#define AT91C_US_RETTO ((unsigned int) 0x1 << 15) // (USART) Rearm Time-out
-#define AT91C_US_DTREN ((unsigned int) 0x1 << 16) // (USART) Data Terminal ready Enable
-#define AT91C_US_DTRDIS ((unsigned int) 0x1 << 17) // (USART) Data Terminal ready Disable
-#define AT91C_US_RTSEN ((unsigned int) 0x1 << 18) // (USART) Request to Send enable
-#define AT91C_US_RTSDIS ((unsigned int) 0x1 << 19) // (USART) Request to Send Disable
-// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
-#define AT91C_US_USMODE ((unsigned int) 0xF << 0) // (USART) Usart mode
-#define AT91C_US_USMODE_NORMAL ((unsigned int) 0x0) // (USART) Normal
-#define AT91C_US_USMODE_RS485 ((unsigned int) 0x1) // (USART) RS485
-#define AT91C_US_USMODE_HWHSH ((unsigned int) 0x2) // (USART) Hardware Handshaking
-#define AT91C_US_USMODE_MODEM ((unsigned int) 0x3) // (USART) Modem
-#define AT91C_US_USMODE_ISO7816_0 ((unsigned int) 0x4) // (USART) ISO7816 protocol: T = 0
-#define AT91C_US_USMODE_ISO7816_1 ((unsigned int) 0x6) // (USART) ISO7816 protocol: T = 1
-#define AT91C_US_USMODE_IRDA ((unsigned int) 0x8) // (USART) IrDA
-#define AT91C_US_USMODE_SWHSH ((unsigned int) 0xC) // (USART) Software Handshaking
-#define AT91C_US_CLKS ((unsigned int) 0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock
-#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) // (USART) Clock
-#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) // (USART) fdiv1
-#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) // (USART) slow_clock (ARM)
-#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) // (USART) External (SCK)
-#define AT91C_US_CHRL ((unsigned int) 0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock
-#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) // (USART) Character Length: 5 bits
-#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) // (USART) Character Length: 6 bits
-#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) // (USART) Character Length: 7 bits
-#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) // (USART) Character Length: 8 bits
-#define AT91C_US_SYNC ((unsigned int) 0x1 << 8) // (USART) Synchronous Mode Select
-#define AT91C_US_NBSTOP ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits
-#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) // (USART) 1 stop bit
-#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
-#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) // (USART) 2 stop bits
-#define AT91C_US_MSBF ((unsigned int) 0x1 << 16) // (USART) Bit Order
-#define AT91C_US_MODE9 ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length
-#define AT91C_US_CKLO ((unsigned int) 0x1 << 18) // (USART) Clock Output Select
-#define AT91C_US_OVER ((unsigned int) 0x1 << 19) // (USART) Over Sampling Mode
-#define AT91C_US_INACK ((unsigned int) 0x1 << 20) // (USART) Inhibit Non Acknowledge
-#define AT91C_US_DSNACK ((unsigned int) 0x1 << 21) // (USART) Disable Successive NACK
-#define AT91C_US_MAX_ITER ((unsigned int) 0x1 << 24) // (USART) Number of Repetitions
-#define AT91C_US_FILTER ((unsigned int) 0x1 << 28) // (USART) Receive Line Filter
-// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register --------
-#define AT91C_US_RXBRK ((unsigned int) 0x1 << 2) // (USART) Break Received/End of Break
-#define AT91C_US_TIMEOUT ((unsigned int) 0x1 << 8) // (USART) Receiver Time-out
-#define AT91C_US_ITERATION ((unsigned int) 0x1 << 10) // (USART) Max number of Repetitions Reached
-#define AT91C_US_NACK ((unsigned int) 0x1 << 13) // (USART) Non Acknowledge
-#define AT91C_US_RIIC ((unsigned int) 0x1 << 16) // (USART) Ring INdicator Input Change Flag
-#define AT91C_US_DSRIC ((unsigned int) 0x1 << 17) // (USART) Data Set Ready Input Change Flag
-#define AT91C_US_DCDIC ((unsigned int) 0x1 << 18) // (USART) Data Carrier Flag
-#define AT91C_US_CTSIC ((unsigned int) 0x1 << 19) // (USART) Clear To Send Input Change Flag
-// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register --------
-// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register --------
-// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register --------
-#define AT91C_US_RI ((unsigned int) 0x1 << 20) // (USART) Image of RI Input
-#define AT91C_US_DSR ((unsigned int) 0x1 << 21) // (USART) Image of DSR Input
-#define AT91C_US_DCD ((unsigned int) 0x1 << 22) // (USART) Image of DCD Input
-#define AT91C_US_CTS ((unsigned int) 0x1 << 23) // (USART) Image of CTS Input
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Two-wire Interface
-// *****************************************************************************
-typedef struct _AT91S_TWI {
- AT91_REG TWI_CR; // Control Register
- AT91_REG TWI_MMR; // Master Mode Register
- AT91_REG TWI_SMR; // Slave Mode Register
- AT91_REG TWI_IADR; // Internal Address Register
- AT91_REG TWI_CWGR; // Clock Waveform Generator Register
- AT91_REG Reserved0[3]; //
- AT91_REG TWI_SR; // Status Register
- AT91_REG TWI_IER; // Interrupt Enable Register
- AT91_REG TWI_IDR; // Interrupt Disable Register
- AT91_REG TWI_IMR; // Interrupt Mask Register
- AT91_REG TWI_RHR; // Receive Holding Register
- AT91_REG TWI_THR; // Transmit Holding Register
-} AT91S_TWI, *AT91PS_TWI;
-
-// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register --------
-#define AT91C_TWI_START ((unsigned int) 0x1 << 0) // (TWI) Send a START Condition
-#define AT91C_TWI_STOP ((unsigned int) 0x1 << 1) // (TWI) Send a STOP Condition
-#define AT91C_TWI_MSEN ((unsigned int) 0x1 << 2) // (TWI) TWI Master Transfer Enabled
-#define AT91C_TWI_MSDIS ((unsigned int) 0x1 << 3) // (TWI) TWI Master Transfer Disabled
-#define AT91C_TWI_SVEN ((unsigned int) 0x1 << 4) // (TWI) TWI Slave Transfer Enabled
-#define AT91C_TWI_SVDIS ((unsigned int) 0x1 << 5) // (TWI) TWI Slave Transfer Disabled
-#define AT91C_TWI_SWRST ((unsigned int) 0x1 << 7) // (TWI) Software Reset
-// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register --------
-#define AT91C_TWI_IADRSZ ((unsigned int) 0x3 << 8) // (TWI) Internal Device Address Size
-#define AT91C_TWI_IADRSZ_NO ((unsigned int) 0x0 << 8) // (TWI) No internal device address
-#define AT91C_TWI_IADRSZ_1_BYTE ((unsigned int) 0x1 << 8) // (TWI) One-byte internal device address
-#define AT91C_TWI_IADRSZ_2_BYTE ((unsigned int) 0x2 << 8) // (TWI) Two-byte internal device address
-#define AT91C_TWI_IADRSZ_3_BYTE ((unsigned int) 0x3 << 8) // (TWI) Three-byte internal device address
-#define AT91C_TWI_MREAD ((unsigned int) 0x1 << 12) // (TWI) Master Read Direction
-#define AT91C_TWI_DADR ((unsigned int) 0x7F << 16) // (TWI) Device Address
-// -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register --------
-#define AT91C_TWI_SADR ((unsigned int) 0x7F << 16) // (TWI) Slave Device Address
-// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register --------
-#define AT91C_TWI_CLDIV ((unsigned int) 0xFF << 0) // (TWI) Clock Low Divider
-#define AT91C_TWI_CHDIV ((unsigned int) 0xFF << 8) // (TWI) Clock High Divider
-#define AT91C_TWI_CKDIV ((unsigned int) 0x7 << 16) // (TWI) Clock Divider
-// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register --------
-#define AT91C_TWI_TXCOMP ((unsigned int) 0x1 << 0) // (TWI) Transmission Completed
-#define AT91C_TWI_RXRDY ((unsigned int) 0x1 << 1) // (TWI) Receive holding register ReaDY
-#define AT91C_TWI_TXRDY ((unsigned int) 0x1 << 2) // (TWI) Transmit holding register ReaDY
-#define AT91C_TWI_SVREAD ((unsigned int) 0x1 << 3) // (TWI) Slave Read
-#define AT91C_TWI_SVACC ((unsigned int) 0x1 << 4) // (TWI) Slave Access
-#define AT91C_TWI_GCACC ((unsigned int) 0x1 << 5) // (TWI) General Call Access
-#define AT91C_TWI_OVRE ((unsigned int) 0x1 << 6) // (TWI) Overrun Error
-#define AT91C_TWI_UNRE ((unsigned int) 0x1 << 7) // (TWI) Underrun Error
-#define AT91C_TWI_NACK ((unsigned int) 0x1 << 8) // (TWI) Not Acknowledged
-#define AT91C_TWI_ARBLST ((unsigned int) 0x1 << 9) // (TWI) Arbitration Lost
-// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register --------
-// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register --------
-// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Multimedia Card Interface
-// *****************************************************************************
-typedef struct _AT91S_MCI {
- AT91_REG MCI_CR; // MCI Control Register
- AT91_REG MCI_MR; // MCI Mode Register
- AT91_REG MCI_DTOR; // MCI Data Timeout Register
- AT91_REG MCI_SDCR; // MCI SD Card Register
- AT91_REG MCI_ARGR; // MCI Argument Register
- AT91_REG MCI_CMDR; // MCI Command Register
- AT91_REG Reserved0[2]; //
- AT91_REG MCI_RSPR[4]; // MCI Response Register
- AT91_REG MCI_RDR; // MCI Receive Data Register
- AT91_REG MCI_TDR; // MCI Transmit Data Register
- AT91_REG Reserved1[2]; //
- AT91_REG MCI_SR; // MCI Status Register
- AT91_REG MCI_IER; // MCI Interrupt Enable Register
- AT91_REG MCI_IDR; // MCI Interrupt Disable Register
- AT91_REG MCI_IMR; // MCI Interrupt Mask Register
- AT91_REG Reserved2[44]; //
- AT91_REG MCI_RPR; // Receive Pointer Register
- AT91_REG MCI_RCR; // Receive Counter Register
- AT91_REG MCI_TPR; // Transmit Pointer Register
- AT91_REG MCI_TCR; // Transmit Counter Register
- AT91_REG MCI_RNPR; // Receive Next Pointer Register
- AT91_REG MCI_RNCR; // Receive Next Counter Register
- AT91_REG MCI_TNPR; // Transmit Next Pointer Register
- AT91_REG MCI_TNCR; // Transmit Next Counter Register
- AT91_REG MCI_PTCR; // PDC Transfer Control Register
- AT91_REG MCI_PTSR; // PDC Transfer Status Register
-} AT91S_MCI, *AT91PS_MCI;
-
-// -------- MCI_CR : (MCI Offset: 0x0) MCI Control Register --------
-#define AT91C_MCI_MCIEN ((unsigned int) 0x1 << 0) // (MCI) Multimedia Interface Enable
-#define AT91C_MCI_MCIDIS ((unsigned int) 0x1 << 1) // (MCI) Multimedia Interface Disable
-#define AT91C_MCI_PWSEN ((unsigned int) 0x1 << 2) // (MCI) Power Save Mode Enable
-#define AT91C_MCI_PWSDIS ((unsigned int) 0x1 << 3) // (MCI) Power Save Mode Disable
-// -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register --------
-#define AT91C_MCI_CLKDIV ((unsigned int) 0x1 << 0) // (MCI) Clock Divider
-#define AT91C_MCI_PWSDIV ((unsigned int) 0x1 << 8) // (MCI) Power Saving Divider
-#define AT91C_MCI_PDCPADV ((unsigned int) 0x1 << 14) // (MCI) PDC Padding Value
-#define AT91C_MCI_PDCMODE ((unsigned int) 0x1 << 15) // (MCI) PDC Oriented Mode
-#define AT91C_MCI_BLKLEN ((unsigned int) 0x1 << 18) // (MCI) Data Block Length
-// -------- MCI_DTOR : (MCI Offset: 0x8) MCI Data Timeout Register --------
-#define AT91C_MCI_DTOCYC ((unsigned int) 0x1 << 0) // (MCI) Data Timeout Cycle Number
-#define AT91C_MCI_DTOMUL ((unsigned int) 0x7 << 4) // (MCI) Data Timeout Multiplier
-#define AT91C_MCI_DTOMUL_1 ((unsigned int) 0x0 << 4) // (MCI) DTOCYC x 1
-#define AT91C_MCI_DTOMUL_16 ((unsigned int) 0x1 << 4) // (MCI) DTOCYC x 16
-#define AT91C_MCI_DTOMUL_128 ((unsigned int) 0x2 << 4) // (MCI) DTOCYC x 128
-#define AT91C_MCI_DTOMUL_256 ((unsigned int) 0x3 << 4) // (MCI) DTOCYC x 256
-#define AT91C_MCI_DTOMUL_1024 ((unsigned int) 0x4 << 4) // (MCI) DTOCYC x 1024
-#define AT91C_MCI_DTOMUL_4096 ((unsigned int) 0x5 << 4) // (MCI) DTOCYC x 4096
-#define AT91C_MCI_DTOMUL_65536 ((unsigned int) 0x6 << 4) // (MCI) DTOCYC x 65536
-#define AT91C_MCI_DTOMUL_1048576 ((unsigned int) 0x7 << 4) // (MCI) DTOCYC x 1048576
-// -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register --------
-#define AT91C_MCI_SCDSEL ((unsigned int) 0x1 << 0) // (MCI) SD Card Selector
-#define AT91C_MCI_SCDBUS ((unsigned int) 0x1 << 7) // (MCI) SD Card Bus Width
-// -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register --------
-#define AT91C_MCI_CMDNB ((unsigned int) 0x1F << 0) // (MCI) Command Number
-#define AT91C_MCI_RSPTYP ((unsigned int) 0x3 << 6) // (MCI) Response Type
-#define AT91C_MCI_RSPTYP_NO ((unsigned int) 0x0 << 6) // (MCI) No response
-#define AT91C_MCI_RSPTYP_48 ((unsigned int) 0x1 << 6) // (MCI) 48-bit response
-#define AT91C_MCI_RSPTYP_136 ((unsigned int) 0x2 << 6) // (MCI) 136-bit response
-#define AT91C_MCI_SPCMD ((unsigned int) 0x7 << 8) // (MCI) Special CMD
-#define AT91C_MCI_SPCMD_NONE ((unsigned int) 0x0 << 8) // (MCI) Not a special CMD
-#define AT91C_MCI_SPCMD_INIT ((unsigned int) 0x1 << 8) // (MCI) Initialization CMD
-#define AT91C_MCI_SPCMD_SYNC ((unsigned int) 0x2 << 8) // (MCI) Synchronized CMD
-#define AT91C_MCI_SPCMD_IT_CMD ((unsigned int) 0x4 << 8) // (MCI) Interrupt command
-#define AT91C_MCI_SPCMD_IT_REP ((unsigned int) 0x5 << 8) // (MCI) Interrupt response
-#define AT91C_MCI_OPDCMD ((unsigned int) 0x1 << 11) // (MCI) Open Drain Command
-#define AT91C_MCI_MAXLAT ((unsigned int) 0x1 << 12) // (MCI) Maximum Latency for Command to respond
-#define AT91C_MCI_TRCMD ((unsigned int) 0x3 << 16) // (MCI) Transfer CMD
-#define AT91C_MCI_TRCMD_NO ((unsigned int) 0x0 << 16) // (MCI) No transfer
-#define AT91C_MCI_TRCMD_START ((unsigned int) 0x1 << 16) // (MCI) Start transfer
-#define AT91C_MCI_TRCMD_STOP ((unsigned int) 0x2 << 16) // (MCI) Stop transfer
-#define AT91C_MCI_TRDIR ((unsigned int) 0x1 << 18) // (MCI) Transfer Direction
-#define AT91C_MCI_TRTYP ((unsigned int) 0x3 << 19) // (MCI) Transfer Type
-#define AT91C_MCI_TRTYP_BLOCK ((unsigned int) 0x0 << 19) // (MCI) Block Transfer type
-#define AT91C_MCI_TRTYP_MULTIPLE ((unsigned int) 0x1 << 19) // (MCI) Multiple Block transfer type
-#define AT91C_MCI_TRTYP_STREAM ((unsigned int) 0x2 << 19) // (MCI) Stream transfer type
-// -------- MCI_SR : (MCI Offset: 0x40) MCI Status Register --------
-#define AT91C_MCI_CMDRDY ((unsigned int) 0x1 << 0) // (MCI) Command Ready flag
-#define AT91C_MCI_RXRDY ((unsigned int) 0x1 << 1) // (MCI) RX Ready flag
-#define AT91C_MCI_TXRDY ((unsigned int) 0x1 << 2) // (MCI) TX Ready flag
-#define AT91C_MCI_BLKE ((unsigned int) 0x1 << 3) // (MCI) Data Block Transfer Ended flag
-#define AT91C_MCI_DTIP ((unsigned int) 0x1 << 4) // (MCI) Data Transfer in Progress flag
-#define AT91C_MCI_NOTBUSY ((unsigned int) 0x1 << 5) // (MCI) Data Line Not Busy flag
-#define AT91C_MCI_ENDRX ((unsigned int) 0x1 << 6) // (MCI) End of RX Buffer flag
-#define AT91C_MCI_ENDTX ((unsigned int) 0x1 << 7) // (MCI) End of TX Buffer flag
-#define AT91C_MCI_RXBUFF ((unsigned int) 0x1 << 14) // (MCI) RX Buffer Full flag
-#define AT91C_MCI_TXBUFE ((unsigned int) 0x1 << 15) // (MCI) TX Buffer Empty flag
-#define AT91C_MCI_RINDE ((unsigned int) 0x1 << 16) // (MCI) Response Index Error flag
-#define AT91C_MCI_RDIRE ((unsigned int) 0x1 << 17) // (MCI) Response Direction Error flag
-#define AT91C_MCI_RCRCE ((unsigned int) 0x1 << 18) // (MCI) Response CRC Error flag
-#define AT91C_MCI_RENDE ((unsigned int) 0x1 << 19) // (MCI) Response End Bit Error flag
-#define AT91C_MCI_RTOE ((unsigned int) 0x1 << 20) // (MCI) Response Time-out Error flag
-#define AT91C_MCI_DCRCE ((unsigned int) 0x1 << 21) // (MCI) data CRC Error flag
-#define AT91C_MCI_DTOE ((unsigned int) 0x1 << 22) // (MCI) Data timeout Error flag
-#define AT91C_MCI_OVRE ((unsigned int) 0x1 << 30) // (MCI) Overrun flag
-#define AT91C_MCI_UNRE ((unsigned int) 0x1 << 31) // (MCI) Underrun flag
-// -------- MCI_IER : (MCI Offset: 0x44) MCI Interrupt Enable Register --------
-// -------- MCI_IDR : (MCI Offset: 0x48) MCI Interrupt Disable Register --------
-// -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR USB Device Interface
-// *****************************************************************************
-typedef struct _AT91S_UDP {
- AT91_REG UDP_NUM; // Frame Number Register
- AT91_REG UDP_GLBSTATE; // Global State Register
- AT91_REG UDP_FADDR; // Function Address Register
- AT91_REG Reserved0[1]; //
- AT91_REG UDP_IER; // Interrupt Enable Register
- AT91_REG UDP_IDR; // Interrupt Disable Register
- AT91_REG UDP_IMR; // Interrupt Mask Register
- AT91_REG UDP_ISR; // Interrupt Status Register
- AT91_REG UDP_ICR; // Interrupt Clear Register
- AT91_REG Reserved1[1]; //
- AT91_REG UDP_RSTEP; // Reset Endpoint Register
- AT91_REG Reserved2[1]; //
- AT91_REG UDP_CSR[8]; // Endpoint Control and Status Register
- AT91_REG UDP_FDR[8]; // Endpoint FIFO Data Register
-} AT91S_UDP, *AT91PS_UDP;
-
-// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register --------
-#define AT91C_UDP_FRM_NUM ((unsigned int) 0x7FF << 0) // (UDP) Frame Number as Defined in the Packet Field Formats
-#define AT91C_UDP_FRM_ERR ((unsigned int) 0x1 << 16) // (UDP) Frame Error
-#define AT91C_UDP_FRM_OK ((unsigned int) 0x1 << 17) // (UDP) Frame OK
-// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register --------
-#define AT91C_UDP_FADDEN ((unsigned int) 0x1 << 0) // (UDP) Function Address Enable
-#define AT91C_UDP_CONFG ((unsigned int) 0x1 << 1) // (UDP) Configured
-#define AT91C_UDP_RMWUPE ((unsigned int) 0x1 << 2) // (UDP) Remote Wake Up Enable
-#define AT91C_UDP_RSMINPR ((unsigned int) 0x1 << 3) // (UDP) A Resume Has Been Sent to the Host
-// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register --------
-#define AT91C_UDP_FADD ((unsigned int) 0xFF << 0) // (UDP) Function Address Value
-#define AT91C_UDP_FEN ((unsigned int) 0x1 << 8) // (UDP) Function Enable
-// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register --------
-#define AT91C_UDP_EPINT0 ((unsigned int) 0x1 << 0) // (UDP) Endpoint 0 Interrupt
-#define AT91C_UDP_EPINT1 ((unsigned int) 0x1 << 1) // (UDP) Endpoint 0 Interrupt
-#define AT91C_UDP_EPINT2 ((unsigned int) 0x1 << 2) // (UDP) Endpoint 2 Interrupt
-#define AT91C_UDP_EPINT3 ((unsigned int) 0x1 << 3) // (UDP) Endpoint 3 Interrupt
-#define AT91C_UDP_EPINT4 ((unsigned int) 0x1 << 4) // (UDP) Endpoint 4 Interrupt
-#define AT91C_UDP_EPINT5 ((unsigned int) 0x1 << 5) // (UDP) Endpoint 5 Interrupt
-#define AT91C_UDP_EPINT6 ((unsigned int) 0x1 << 6) // (UDP) Endpoint 6 Interrupt
-#define AT91C_UDP_EPINT7 ((unsigned int) 0x1 << 7) // (UDP) Endpoint 7 Interrupt
-#define AT91C_UDP_RXSUSP ((unsigned int) 0x1 << 8) // (UDP) USB Suspend Interrupt
-#define AT91C_UDP_RXRSM ((unsigned int) 0x1 << 9) // (UDP) USB Resume Interrupt
-#define AT91C_UDP_EXTRSM ((unsigned int) 0x1 << 10) // (UDP) USB External Resume Interrupt
-#define AT91C_UDP_SOFINT ((unsigned int) 0x1 << 11) // (UDP) USB Start Of frame Interrupt
-#define AT91C_UDP_WAKEUP ((unsigned int) 0x1 << 13) // (UDP) USB Resume Interrupt
-// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register --------
-// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register --------
-// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register --------
-#define AT91C_UDP_ENDBUSRES ((unsigned int) 0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
-// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register --------
-// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register --------
-#define AT91C_UDP_EP0 ((unsigned int) 0x1 << 0) // (UDP) Reset Endpoint 0
-#define AT91C_UDP_EP1 ((unsigned int) 0x1 << 1) // (UDP) Reset Endpoint 1
-#define AT91C_UDP_EP2 ((unsigned int) 0x1 << 2) // (UDP) Reset Endpoint 2
-#define AT91C_UDP_EP3 ((unsigned int) 0x1 << 3) // (UDP) Reset Endpoint 3
-#define AT91C_UDP_EP4 ((unsigned int) 0x1 << 4) // (UDP) Reset Endpoint 4
-#define AT91C_UDP_EP5 ((unsigned int) 0x1 << 5) // (UDP) Reset Endpoint 5
-#define AT91C_UDP_EP6 ((unsigned int) 0x1 << 6) // (UDP) Reset Endpoint 6
-#define AT91C_UDP_EP7 ((unsigned int) 0x1 << 7) // (UDP) Reset Endpoint 7
-// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register --------
-#define AT91C_UDP_TXCOMP ((unsigned int) 0x1 << 0) // (UDP) Generates an IN packet with data previously written in the DPR
-#define AT91C_UDP_RX_DATA_BK0 ((unsigned int) 0x1 << 1) // (UDP) Receive Data Bank 0
-#define AT91C_UDP_RXSETUP ((unsigned int) 0x1 << 2) // (UDP) Sends STALL to the Host (Control endpoints)
-#define AT91C_UDP_ISOERROR ((unsigned int) 0x1 << 3) // (UDP) Isochronous error (Isochronous endpoints)
-#define AT91C_UDP_TXPKTRDY ((unsigned int) 0x1 << 4) // (UDP) Transmit Packet Ready
-#define AT91C_UDP_FORCESTALL ((unsigned int) 0x1 << 5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
-#define AT91C_UDP_RX_DATA_BK1 ((unsigned int) 0x1 << 6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
-#define AT91C_UDP_DIR ((unsigned int) 0x1 << 7) // (UDP) Transfer Direction
-#define AT91C_UDP_EPTYPE ((unsigned int) 0x7 << 8) // (UDP) Endpoint type
-#define AT91C_UDP_EPTYPE_CTRL ((unsigned int) 0x0 << 8) // (UDP) Control
-#define AT91C_UDP_EPTYPE_ISO_OUT ((unsigned int) 0x1 << 8) // (UDP) Isochronous OUT
-#define AT91C_UDP_EPTYPE_BULK_OUT ((unsigned int) 0x2 << 8) // (UDP) Bulk OUT
-#define AT91C_UDP_EPTYPE_INT_OUT ((unsigned int) 0x3 << 8) // (UDP) Interrupt OUT
-#define AT91C_UDP_EPTYPE_ISO_IN ((unsigned int) 0x5 << 8) // (UDP) Isochronous IN
-#define AT91C_UDP_EPTYPE_BULK_IN ((unsigned int) 0x6 << 8) // (UDP) Bulk IN
-#define AT91C_UDP_EPTYPE_INT_IN ((unsigned int) 0x7 << 8) // (UDP) Interrupt IN
-#define AT91C_UDP_DTGLE ((unsigned int) 0x1 << 11) // (UDP) Data Toggle
-#define AT91C_UDP_EPEDS ((unsigned int) 0x1 << 15) // (UDP) Endpoint Enable Disable
-#define AT91C_UDP_RXBYTECNT ((unsigned int) 0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Timer Counter Channel Interface
-// *****************************************************************************
-typedef struct _AT91S_TC {
- AT91_REG TC_CCR; // Channel Control Register
- AT91_REG TC_CMR; // Channel Mode Register
- AT91_REG Reserved0[2]; //
- AT91_REG TC_CV; // Counter Value
- AT91_REG TC_RA; // Register A
- AT91_REG TC_RB; // Register B
- AT91_REG TC_RC; // Register C
- AT91_REG TC_SR; // Status Register
- AT91_REG TC_IER; // Interrupt Enable Register
- AT91_REG TC_IDR; // Interrupt Disable Register
- AT91_REG TC_IMR; // Interrupt Mask Register
-} AT91S_TC, *AT91PS_TC;
-
-// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register --------
-#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) // (TC) Counter Clock Enable Command
-#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) // (TC) Counter Clock Disable Command
-#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) // (TC) Software Trigger Command
-// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode --------
-#define AT91C_TC_CPCSTOP ((unsigned int) 0x1 << 6) // (TC) Counter Clock Stopped with RC Compare
-#define AT91C_TC_CPCDIS ((unsigned int) 0x1 << 7) // (TC) Counter Clock Disable with RC Compare
-#define AT91C_TC_EEVTEDG ((unsigned int) 0x3 << 8) // (TC) External Event Edge Selection
-#define AT91C_TC_EEVTEDG_NONE ((unsigned int) 0x0 << 8) // (TC) Edge: None
-#define AT91C_TC_EEVTEDG_RISING ((unsigned int) 0x1 << 8) // (TC) Edge: rising edge
-#define AT91C_TC_EEVTEDG_FALLING ((unsigned int) 0x2 << 8) // (TC) Edge: falling edge
-#define AT91C_TC_EEVTEDG_BOTH ((unsigned int) 0x3 << 8) // (TC) Edge: each edge
-#define AT91C_TC_EEVT ((unsigned int) 0x3 << 10) // (TC) External Event Selection
-#define AT91C_TC_EEVT_NONE ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
-#define AT91C_TC_EEVT_RISING ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
-#define AT91C_TC_EEVT_FALLING ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
-#define AT91C_TC_EEVT_BOTH ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
-#define AT91C_TC_ENETRG ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable
-#define AT91C_TC_WAVESEL ((unsigned int) 0x3 << 13) // (TC) Waveform Selection
-#define AT91C_TC_WAVESEL_UP ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UPDOWN ((unsigned int) 0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UP_AUTO ((unsigned int) 0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UPDOWN_AUTO ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
-#define AT91C_TC_CPCTRG ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable
-#define AT91C_TC_WAVE ((unsigned int) 0x1 << 15) // (TC)
-#define AT91C_TC_ACPA ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA
-#define AT91C_TC_ACPA_NONE ((unsigned int) 0x0 << 16) // (TC) Effect: none
-#define AT91C_TC_ACPA_SET ((unsigned int) 0x1 << 16) // (TC) Effect: set
-#define AT91C_TC_ACPA_CLEAR ((unsigned int) 0x2 << 16) // (TC) Effect: clear
-#define AT91C_TC_ACPA_TOGGLE ((unsigned int) 0x3 << 16) // (TC) Effect: toggle
-#define AT91C_TC_ACPC ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA
-#define AT91C_TC_ACPC_NONE ((unsigned int) 0x0 << 18) // (TC) Effect: none
-#define AT91C_TC_ACPC_SET ((unsigned int) 0x1 << 18) // (TC) Effect: set
-#define AT91C_TC_ACPC_CLEAR ((unsigned int) 0x2 << 18) // (TC) Effect: clear
-#define AT91C_TC_ACPC_TOGGLE ((unsigned int) 0x3 << 18) // (TC) Effect: toggle
-#define AT91C_TC_AEEVT ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA
-#define AT91C_TC_AEEVT_NONE ((unsigned int) 0x0 << 20) // (TC) Effect: none
-#define AT91C_TC_AEEVT_SET ((unsigned int) 0x1 << 20) // (TC) Effect: set
-#define AT91C_TC_AEEVT_CLEAR ((unsigned int) 0x2 << 20) // (TC) Effect: clear
-#define AT91C_TC_AEEVT_TOGGLE ((unsigned int) 0x3 << 20) // (TC) Effect: toggle
-#define AT91C_TC_ASWTRG ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA
-#define AT91C_TC_ASWTRG_NONE ((unsigned int) 0x0 << 22) // (TC) Effect: none
-#define AT91C_TC_ASWTRG_SET ((unsigned int) 0x1 << 22) // (TC) Effect: set
-#define AT91C_TC_ASWTRG_CLEAR ((unsigned int) 0x2 << 22) // (TC) Effect: clear
-#define AT91C_TC_ASWTRG_TOGGLE ((unsigned int) 0x3 << 22) // (TC) Effect: toggle
-#define AT91C_TC_BCPB ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB
-#define AT91C_TC_BCPB_NONE ((unsigned int) 0x0 << 24) // (TC) Effect: none
-#define AT91C_TC_BCPB_SET ((unsigned int) 0x1 << 24) // (TC) Effect: set
-#define AT91C_TC_BCPB_CLEAR ((unsigned int) 0x2 << 24) // (TC) Effect: clear
-#define AT91C_TC_BCPB_TOGGLE ((unsigned int) 0x3 << 24) // (TC) Effect: toggle
-#define AT91C_TC_BCPC ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB
-#define AT91C_TC_BCPC_NONE ((unsigned int) 0x0 << 26) // (TC) Effect: none
-#define AT91C_TC_BCPC_SET ((unsigned int) 0x1 << 26) // (TC) Effect: set
-#define AT91C_TC_BCPC_CLEAR ((unsigned int) 0x2 << 26) // (TC) Effect: clear
-#define AT91C_TC_BCPC_TOGGLE ((unsigned int) 0x3 << 26) // (TC) Effect: toggle
-#define AT91C_TC_BEEVT ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB
-#define AT91C_TC_BEEVT_NONE ((unsigned int) 0x0 << 28) // (TC) Effect: none
-#define AT91C_TC_BEEVT_SET ((unsigned int) 0x1 << 28) // (TC) Effect: set
-#define AT91C_TC_BEEVT_CLEAR ((unsigned int) 0x2 << 28) // (TC) Effect: clear
-#define AT91C_TC_BEEVT_TOGGLE ((unsigned int) 0x3 << 28) // (TC) Effect: toggle
-#define AT91C_TC_BSWTRG ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB
-#define AT91C_TC_BSWTRG_NONE ((unsigned int) 0x0 << 30) // (TC) Effect: none
-#define AT91C_TC_BSWTRG_SET ((unsigned int) 0x1 << 30) // (TC) Effect: set
-#define AT91C_TC_BSWTRG_CLEAR ((unsigned int) 0x2 << 30) // (TC) Effect: clear
-#define AT91C_TC_BSWTRG_TOGGLE ((unsigned int) 0x3 << 30) // (TC) Effect: toggle
-// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register --------
-#define AT91C_TC_COVFS ((unsigned int) 0x1 << 0) // (TC) Counter Overflow
-#define AT91C_TC_LOVRS ((unsigned int) 0x1 << 1) // (TC) Load Overrun
-#define AT91C_TC_CPAS ((unsigned int) 0x1 << 2) // (TC) RA Compare
-#define AT91C_TC_CPBS ((unsigned int) 0x1 << 3) // (TC) RB Compare
-#define AT91C_TC_CPCS ((unsigned int) 0x1 << 4) // (TC) RC Compare
-#define AT91C_TC_LDRAS ((unsigned int) 0x1 << 5) // (TC) RA Loading
-#define AT91C_TC_LDRBS ((unsigned int) 0x1 << 6) // (TC) RB Loading
-#define AT91C_TC_ETRCS ((unsigned int) 0x1 << 7) // (TC) External Trigger
-#define AT91C_TC_ETRGS ((unsigned int) 0x1 << 16) // (TC) Clock Enabling
-#define AT91C_TC_MTIOA ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror
-#define AT91C_TC_MTIOB ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror
-// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register --------
-// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register --------
-// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Timer Counter Interface
-// *****************************************************************************
-typedef struct _AT91S_TCB {
- AT91S_TC TCB_TC0; // TC Channel 0
- AT91_REG Reserved0[4]; //
- AT91S_TC TCB_TC1; // TC Channel 1
- AT91_REG Reserved1[4]; //
- AT91S_TC TCB_TC2; // TC Channel 2
- AT91_REG Reserved2[4]; //
- AT91_REG TCB_BCR; // TC Block Control Register
- AT91_REG TCB_BMR; // TC Block Mode Register
-} AT91S_TCB, *AT91PS_TCB;
-
-// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
-#define AT91C_TCB_SYNC ((unsigned int) 0x1 << 0) // (TCB) Synchro Command
-// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register --------
-#define AT91C_TCB_TC0XC0S ((unsigned int) 0x1 << 0) // (TCB) External Clock Signal 0 Selection
-#define AT91C_TCB_TC0XC0S_TCLK0 ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0
-#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) // (TCB) None signal connected to XC0
-#define AT91C_TCB_TC0XC0S_TIOA1 ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0
-#define AT91C_TCB_TC0XC0S_TIOA2 ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0
-#define AT91C_TCB_TC1XC1S ((unsigned int) 0x1 << 2) // (TCB) External Clock Signal 1 Selection
-#define AT91C_TCB_TC1XC1S_TCLK1 ((unsigned int) 0x0 << 2) // (TCB) TCLK1 connected to XC1
-#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) // (TCB) None signal connected to XC1
-#define AT91C_TCB_TC1XC1S_TIOA0 ((unsigned int) 0x2 << 2) // (TCB) TIOA0 connected to XC1
-#define AT91C_TCB_TC1XC1S_TIOA2 ((unsigned int) 0x3 << 2) // (TCB) TIOA2 connected to XC1
-#define AT91C_TCB_TC2XC2S ((unsigned int) 0x1 << 4) // (TCB) External Clock Signal 2 Selection
-#define AT91C_TCB_TC2XC2S_TCLK2 ((unsigned int) 0x0 << 4) // (TCB) TCLK2 connected to XC2
-#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) // (TCB) None signal connected to XC2
-#define AT91C_TCB_TC2XC2S_TIOA0 ((unsigned int) 0x2 << 4) // (TCB) TIOA0 connected to XC2
-#define AT91C_TCB_TC2XC2S_TIOA2 ((unsigned int) 0x3 << 4) // (TCB) TIOA2 connected to XC2
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR USB Host Interface
-// *****************************************************************************
-typedef struct _AT91S_UHP {
- AT91_REG UHP_HcRevision; // Revision
- AT91_REG UHP_HcControl; // Operating modes for the Host Controller
- AT91_REG UHP_HcCommandStatus; // Command & status Register
- AT91_REG UHP_HcInterruptStatus; // Interrupt Status Register
- AT91_REG UHP_HcInterruptEnable; // Interrupt Enable Register
- AT91_REG UHP_HcInterruptDisable; // Interrupt Disable Register
- AT91_REG UHP_HcHCCA; // Pointer to the Host Controller Communication Area
- AT91_REG UHP_HcPeriodCurrentED; // Current Isochronous or Interrupt Endpoint Descriptor
- AT91_REG UHP_HcControlHeadED; // First Endpoint Descriptor of the Control list
- AT91_REG UHP_HcControlCurrentED; // Endpoint Control and Status Register
- AT91_REG UHP_HcBulkHeadED; // First endpoint register of the Bulk list
- AT91_REG UHP_HcBulkCurrentED; // Current endpoint of the Bulk list
- AT91_REG UHP_HcBulkDoneHead; // Last completed transfer descriptor
- AT91_REG UHP_HcFmInterval; // Bit time between 2 consecutive SOFs
- AT91_REG UHP_HcFmRemaining; // Bit time remaining in the current Frame
- AT91_REG UHP_HcFmNumber; // Frame number
- AT91_REG UHP_HcPeriodicStart; // Periodic Start
- AT91_REG UHP_HcLSThreshold; // LS Threshold
- AT91_REG UHP_HcRhDescriptorA; // Root Hub characteristics A
- AT91_REG UHP_HcRhDescriptorB; // Root Hub characteristics B
- AT91_REG UHP_HcRhStatus; // Root Hub Status register
- AT91_REG UHP_HcRhPortStatus[2]; // Root Hub Port Status Register
-} AT91S_UHP, *AT91PS_UHP;
-
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Ethernet MAC
-// *****************************************************************************
-typedef struct _AT91S_EMAC {
- AT91_REG EMAC_CTL; // Network Control Register
- AT91_REG EMAC_CFG; // Network Configuration Register
- AT91_REG EMAC_SR; // Network Status Register
- AT91_REG EMAC_TAR; // Transmit Address Register
- AT91_REG EMAC_TCR; // Transmit Control Register
- AT91_REG EMAC_TSR; // Transmit Status Register
- AT91_REG EMAC_RBQP; // Receive Buffer Queue Pointer
- AT91_REG Reserved0[1]; //
- AT91_REG EMAC_RSR; // Receive Status Register
- AT91_REG EMAC_ISR; // Interrupt Status Register
- AT91_REG EMAC_IER; // Interrupt Enable Register
- AT91_REG EMAC_IDR; // Interrupt Disable Register
- AT91_REG EMAC_IMR; // Interrupt Mask Register
- AT91_REG EMAC_MAN; // PHY Maintenance Register
- AT91_REG Reserved1[2]; //
- AT91_REG EMAC_FRA; // Frames Transmitted OK Register
- AT91_REG EMAC_SCOL; // Single Collision Frame Register
- AT91_REG EMAC_MCOL; // Multiple Collision Frame Register
- AT91_REG EMAC_OK; // Frames Received OK Register
- AT91_REG EMAC_SEQE; // Frame Check Sequence Error Register
- AT91_REG EMAC_ALE; // Alignment Error Register
- AT91_REG EMAC_DTE; // Deferred Transmission Frame Register
- AT91_REG EMAC_LCOL; // Late Collision Register
- AT91_REG EMAC_ECOL; // Excessive Collision Register
- AT91_REG EMAC_CSE; // Carrier Sense Error Register
- AT91_REG EMAC_TUE; // Transmit Underrun Error Register
- AT91_REG EMAC_CDE; // Code Error Register
- AT91_REG EMAC_ELR; // Excessive Length Error Register
- AT91_REG EMAC_RJB; // Receive Jabber Register
- AT91_REG EMAC_USF; // Undersize Frame Register
- AT91_REG EMAC_SQEE; // SQE Test Error Register
- AT91_REG EMAC_DRFC; // Discarded RX Frame Register
- AT91_REG Reserved2[3]; //
- AT91_REG EMAC_HSH; // Hash Address High[63:32]
- AT91_REG EMAC_HSL; // Hash Address Low[31:0]
- AT91_REG EMAC_SA1L; // Specific Address 1 Low, First 4 bytes
- AT91_REG EMAC_SA1H; // Specific Address 1 High, Last 2 bytes
- AT91_REG EMAC_SA2L; // Specific Address 2 Low, First 4 bytes
- AT91_REG EMAC_SA2H; // Specific Address 2 High, Last 2 bytes
- AT91_REG EMAC_SA3L; // Specific Address 3 Low, First 4 bytes
- AT91_REG EMAC_SA3H; // Specific Address 3 High, Last 2 bytes
- AT91_REG EMAC_SA4L; // Specific Address 4 Low, First 4 bytes
- AT91_REG EMAC_SA4H; // Specific Address 4 High, Last 2 bytesr
-} AT91S_EMAC, *AT91PS_EMAC;
-
-// -------- EMAC_CTL : (EMAC Offset: 0x0) --------
-#define AT91C_EMAC_LB ((unsigned int) 0x1 << 0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
-#define AT91C_EMAC_LBL ((unsigned int) 0x1 << 1) // (EMAC) Loopback local.
-#define AT91C_EMAC_RE ((unsigned int) 0x1 << 2) // (EMAC) Receive enable.
-#define AT91C_EMAC_TE ((unsigned int) 0x1 << 3) // (EMAC) Transmit enable.
-#define AT91C_EMAC_MPE ((unsigned int) 0x1 << 4) // (EMAC) Management port enable.
-#define AT91C_EMAC_CSR ((unsigned int) 0x1 << 5) // (EMAC) Clear statistics registers.
-#define AT91C_EMAC_ISR ((unsigned int) 0x1 << 6) // (EMAC) Increment statistics registers.
-#define AT91C_EMAC_WES ((unsigned int) 0x1 << 7) // (EMAC) Write enable for statistics registers.
-#define AT91C_EMAC_BP ((unsigned int) 0x1 << 8) // (EMAC) Back pressure.
-// -------- EMAC_CFG : (EMAC Offset: 0x4) Network Configuration Register --------
-#define AT91C_EMAC_SPD ((unsigned int) 0x1 << 0) // (EMAC) Speed.
-#define AT91C_EMAC_FD ((unsigned int) 0x1 << 1) // (EMAC) Full duplex.
-#define AT91C_EMAC_BR ((unsigned int) 0x1 << 2) // (EMAC) Bit rate.
-#define AT91C_EMAC_CAF ((unsigned int) 0x1 << 4) // (EMAC) Copy all frames.
-#define AT91C_EMAC_NBC ((unsigned int) 0x1 << 5) // (EMAC) No broadcast.
-#define AT91C_EMAC_MTI ((unsigned int) 0x1 << 6) // (EMAC) Multicast hash enable
-#define AT91C_EMAC_UNI ((unsigned int) 0x1 << 7) // (EMAC) Unicast hash enable.
-#define AT91C_EMAC_BIG ((unsigned int) 0x1 << 8) // (EMAC) Receive 1522 bytes.
-#define AT91C_EMAC_EAE ((unsigned int) 0x1 << 9) // (EMAC) External address match enable.
-#define AT91C_EMAC_CLK ((unsigned int) 0x3 << 10) // (EMAC)
-#define AT91C_EMAC_CLK_HCLK_8 ((unsigned int) 0x0 << 10) // (EMAC) HCLK divided by 8
-#define AT91C_EMAC_CLK_HCLK_16 ((unsigned int) 0x1 << 10) // (EMAC) HCLK divided by 16
-#define AT91C_EMAC_CLK_HCLK_32 ((unsigned int) 0x2 << 10) // (EMAC) HCLK divided by 32
-#define AT91C_EMAC_CLK_HCLK_64 ((unsigned int) 0x3 << 10) // (EMAC) HCLK divided by 64
-#define AT91C_EMAC_RTY ((unsigned int) 0x1 << 12) // (EMAC)
-#define AT91C_EMAC_RMII ((unsigned int) 0x1 << 13) // (EMAC)
-// -------- EMAC_SR : (EMAC Offset: 0x8) Network Status Register --------
-#define AT91C_EMAC_MDIO ((unsigned int) 0x1 << 1) // (EMAC)
-#define AT91C_EMAC_IDLE ((unsigned int) 0x1 << 2) // (EMAC)
-// -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register --------
-#define AT91C_EMAC_LEN ((unsigned int) 0x7FF << 0) // (EMAC)
-#define AT91C_EMAC_NCRC ((unsigned int) 0x1 << 15) // (EMAC)
-// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register --------
-#define AT91C_EMAC_OVR ((unsigned int) 0x1 << 0) // (EMAC)
-#define AT91C_EMAC_COL ((unsigned int) 0x1 << 1) // (EMAC)
-#define AT91C_EMAC_RLE ((unsigned int) 0x1 << 2) // (EMAC)
-#define AT91C_EMAC_TXIDLE ((unsigned int) 0x1 << 3) // (EMAC)
-#define AT91C_EMAC_BNQ ((unsigned int) 0x1 << 4) // (EMAC)
-#define AT91C_EMAC_COMP ((unsigned int) 0x1 << 5) // (EMAC)
-#define AT91C_EMAC_UND ((unsigned int) 0x1 << 6) // (EMAC)
-// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register --------
-#define AT91C_EMAC_BNA ((unsigned int) 0x1 << 0) // (EMAC)
-#define AT91C_EMAC_REC ((unsigned int) 0x1 << 1) // (EMAC)
-// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register --------
-#define AT91C_EMAC_DONE ((unsigned int) 0x1 << 0) // (EMAC)
-#define AT91C_EMAC_RCOM ((unsigned int) 0x1 << 1) // (EMAC)
-#define AT91C_EMAC_RBNA ((unsigned int) 0x1 << 2) // (EMAC)
-#define AT91C_EMAC_TOVR ((unsigned int) 0x1 << 3) // (EMAC)
-#define AT91C_EMAC_TUND ((unsigned int) 0x1 << 4) // (EMAC)
-#define AT91C_EMAC_RTRY ((unsigned int) 0x1 << 5) // (EMAC)
-#define AT91C_EMAC_TBRE ((unsigned int) 0x1 << 6) // (EMAC)
-#define AT91C_EMAC_TCOM ((unsigned int) 0x1 << 7) // (EMAC)
-#define AT91C_EMAC_TIDLE ((unsigned int) 0x1 << 8) // (EMAC)
-#define AT91C_EMAC_LINK ((unsigned int) 0x1 << 9) // (EMAC)
-#define AT91C_EMAC_ROVR ((unsigned int) 0x1 << 10) // (EMAC)
-#define AT91C_EMAC_HRESP ((unsigned int) 0x1 << 11) // (EMAC)
-// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register --------
-// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register --------
-// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register --------
-// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register --------
-#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) // (EMAC)
-#define AT91C_EMAC_CODE ((unsigned int) 0x3 << 16) // (EMAC)
-#define AT91C_EMAC_REGA ((unsigned int) 0x1F << 18) // (EMAC)
-#define AT91C_EMAC_PHYA ((unsigned int) 0x1F << 23) // (EMAC)
-#define AT91C_EMAC_RW ((unsigned int) 0x3 << 28) // (EMAC)
-#define AT91C_EMAC_HIGH ((unsigned int) 0x1 << 30) // (EMAC)
-#define AT91C_EMAC_LOW ((unsigned int) 0x1 << 31) // (EMAC)
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR External Bus Interface
-// *****************************************************************************
-typedef struct _AT91S_EBI {
- AT91_REG EBI_CSA; // Chip Select Assignment Register
- AT91_REG EBI_CFGR; // Configuration Register
-} AT91S_EBI, *AT91PS_EBI;
-
-// -------- EBI_CSA : (EBI Offset: 0x0) Chip Select Assignment Register --------
-#define AT91C_EBI_CS0A ((unsigned int) 0x1 << 0) // (EBI) Chip Select 0 Assignment
-#define AT91C_EBI_CS0A_SMC ((unsigned int) 0x0) // (EBI) Chip Select 0 is assigned to the Static Memory Controller.
-#define AT91C_EBI_CS0A_BFC ((unsigned int) 0x1) // (EBI) Chip Select 0 is assigned to the Burst Flash Controller.
-#define AT91C_EBI_CS1A ((unsigned int) 0x1 << 1) // (EBI) Chip Select 1 Assignment
-#define AT91C_EBI_CS1A_SMC ((unsigned int) 0x0 << 1) // (EBI) Chip Select 1 is assigned to the Static Memory Controller.
-#define AT91C_EBI_CS1A_SDRAMC ((unsigned int) 0x1 << 1) // (EBI) Chip Select 1 is assigned to the SDRAM Controller.
-#define AT91C_EBI_CS3A ((unsigned int) 0x1 << 3) // (EBI) Chip Select 3 Assignment
-#define AT91C_EBI_CS3A_SMC ((unsigned int) 0x0 << 3) // (EBI) Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behaves as defined by the SMC2.
-#define AT91C_EBI_CS3A_SMC_SmartMedia ((unsigned int) 0x1 << 3) // (EBI) Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated.
-#define AT91C_EBI_CS4A ((unsigned int) 0x1 << 4) // (EBI) Chip Select 4 Assignment
-#define AT91C_EBI_CS4A_SMC ((unsigned int) 0x0 << 4) // (EBI) Chip Select 4 is assigned to the Static Memory Controller and NCS4,NCS5 and NCS6 behave as defined by the SMC2.
-#define AT91C_EBI_CS4A_SMC_CompactFlash ((unsigned int) 0x1 << 4) // (EBI) Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic is activated.
-// -------- EBI_CFGR : (EBI Offset: 0x4) Configuration Register --------
-#define AT91C_EBI_DBPUC ((unsigned int) 0x1 << 0) // (EBI) Data Bus Pull-Up Configuration
-#define AT91C_EBI_EBSEN ((unsigned int) 0x1 << 1) // (EBI) Bus Sharing Enable
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface
-// *****************************************************************************
-typedef struct _AT91S_SMC2 {
- AT91_REG SMC2_CSR[8]; // SMC2 Chip Select Register
-} AT91S_SMC2, *AT91PS_SMC2;
-
-// -------- SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register --------
-#define AT91C_SMC2_NWS ((unsigned int) 0x7F << 0) // (SMC2) Number of Wait States
-#define AT91C_SMC2_WSEN ((unsigned int) 0x1 << 7) // (SMC2) Wait State Enable
-#define AT91C_SMC2_TDF ((unsigned int) 0xF << 8) // (SMC2) Data Float Time
-#define AT91C_SMC2_BAT ((unsigned int) 0x1 << 12) // (SMC2) Byte Access Type
-#define AT91C_SMC2_DBW ((unsigned int) 0x1 << 13) // (SMC2) Data Bus Width
-#define AT91C_SMC2_DBW_16 ((unsigned int) 0x1 << 13) // (SMC2) 16-bit.
-#define AT91C_SMC2_DBW_8 ((unsigned int) 0x2 << 13) // (SMC2) 8-bit.
-#define AT91C_SMC2_DRP ((unsigned int) 0x1 << 15) // (SMC2) Data Read Protocol
-#define AT91C_SMC2_ACSS ((unsigned int) 0x3 << 16) // (SMC2) Address to Chip Select Setup
-#define AT91C_SMC2_ACSS_STANDARD ((unsigned int) 0x0 << 16) // (SMC2) Standard, asserted at the beginning of the access and deasserted at the end.
-#define AT91C_SMC2_ACSS_1_CYCLE ((unsigned int) 0x1 << 16) // (SMC2) One cycle less at the beginning and the end of the access.
-#define AT91C_SMC2_ACSS_2_CYCLES ((unsigned int) 0x2 << 16) // (SMC2) Two cycles less at the beginning and the end of the access.
-#define AT91C_SMC2_ACSS_3_CYCLES ((unsigned int) 0x3 << 16) // (SMC2) Three cycles less at the beginning and the end of the access.
-#define AT91C_SMC2_RWSETUP ((unsigned int) 0x7 << 24) // (SMC2) Read and Write Signal Setup Time
-#define AT91C_SMC2_RWHOLD ((unsigned int) 0x7 << 29) // (SMC2) Read and Write Signal Hold Time
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR SDRAM Controller Interface
-// *****************************************************************************
-typedef struct _AT91S_SDRC {
- AT91_REG SDRC_MR; // SDRAM Controller Mode Register
- AT91_REG SDRC_TR; // SDRAM Controller Refresh Timer Register
- AT91_REG SDRC_CR; // SDRAM Controller Configuration Register
- AT91_REG SDRC_SRR; // SDRAM Controller Self Refresh Register
- AT91_REG SDRC_LPR; // SDRAM Controller Low Power Register
- AT91_REG SDRC_IER; // SDRAM Controller Interrupt Enable Register
- AT91_REG SDRC_IDR; // SDRAM Controller Interrupt Disable Register
- AT91_REG SDRC_IMR; // SDRAM Controller Interrupt Mask Register
- AT91_REG SDRC_ISR; // SDRAM Controller Interrupt Mask Register
-} AT91S_SDRC, *AT91PS_SDRC;
-
-// -------- SDRC_MR : (SDRC Offset: 0x0) SDRAM Controller Mode Register --------
-#define AT91C_SDRC_MODE ((unsigned int) 0xF << 0) // (SDRC) Mode
-#define AT91C_SDRC_MODE_NORMAL_CMD ((unsigned int) 0x0) // (SDRC) Normal Mode
-#define AT91C_SDRC_MODE_NOP_CMD ((unsigned int) 0x1) // (SDRC) NOP Command
-#define AT91C_SDRC_MODE_PRCGALL_CMD ((unsigned int) 0x2) // (SDRC) All Banks Precharge Command
-#define AT91C_SDRC_MODE_LMR_CMD ((unsigned int) 0x3) // (SDRC) Load Mode Register Command
-#define AT91C_SDRC_MODE_RFSH_CMD ((unsigned int) 0x4) // (SDRC) Refresh Command
-#define AT91C_SDRC_DBW ((unsigned int) 0x1 << 4) // (SDRC) Data Bus Width
-#define AT91C_SDRC_DBW_32_BITS ((unsigned int) 0x0 << 4) // (SDRC) 32 Bits datas bus
-#define AT91C_SDRC_DBW_16_BITS ((unsigned int) 0x1 << 4) // (SDRC) 16 Bits datas bus
-// -------- SDRC_TR : (SDRC Offset: 0x4) SDRC Refresh Timer Register --------
-#define AT91C_SDRC_COUNT ((unsigned int) 0xFFF << 0) // (SDRC) Refresh Counter
-// -------- SDRC_CR : (SDRC Offset: 0x8) SDRAM Configuration Register --------
-#define AT91C_SDRC_NC ((unsigned int) 0x3 << 0) // (SDRC) Number of Column Bits
-#define AT91C_SDRC_NC_8 ((unsigned int) 0x0) // (SDRC) 8 Bits
-#define AT91C_SDRC_NC_9 ((unsigned int) 0x1) // (SDRC) 9 Bits
-#define AT91C_SDRC_NC_10 ((unsigned int) 0x2) // (SDRC) 10 Bits
-#define AT91C_SDRC_NC_11 ((unsigned int) 0x3) // (SDRC) 11 Bits
-#define AT91C_SDRC_NR ((unsigned int) 0x3 << 2) // (SDRC) Number of Row Bits
-#define AT91C_SDRC_NR_11 ((unsigned int) 0x0 << 2) // (SDRC) 11 Bits
-#define AT91C_SDRC_NR_12 ((unsigned int) 0x1 << 2) // (SDRC) 12 Bits
-#define AT91C_SDRC_NR_13 ((unsigned int) 0x2 << 2) // (SDRC) 13 Bits
-#define AT91C_SDRC_NB ((unsigned int) 0x1 << 4) // (SDRC) Number of Banks
-#define AT91C_SDRC_NB_2_BANKS ((unsigned int) 0x0 << 4) // (SDRC) 2 banks
-#define AT91C_SDRC_NB_4_BANKS ((unsigned int) 0x1 << 4) // (SDRC) 4 banks
-#define AT91C_SDRC_CAS ((unsigned int) 0x3 << 5) // (SDRC) CAS Latency
-#define AT91C_SDRC_CAS_2 ((unsigned int) 0x2 << 5) // (SDRC) 2 cycles
-#define AT91C_SDRC_TWR ((unsigned int) 0xF << 7) // (SDRC) Number of Write Recovery Time Cycles
-#define AT91C_SDRC_TRC ((unsigned int) 0xF << 11) // (SDRC) Number of RAS Cycle Time Cycles
-#define AT91C_SDRC_TRP ((unsigned int) 0xF << 15) // (SDRC) Number of RAS Precharge Time Cycles
-#define AT91C_SDRC_TRCD ((unsigned int) 0xF << 19) // (SDRC) Number of RAS to CAS Delay Cycles
-#define AT91C_SDRC_TRAS ((unsigned int) 0xF << 23) // (SDRC) Number of RAS Active Time Cycles
-#define AT91C_SDRC_TXSR ((unsigned int) 0xF << 27) // (SDRC) Number of Command Recovery Time Cycles
-// -------- SDRC_SRR : (SDRC Offset: 0xc) SDRAM Controller Self-refresh Register --------
-#define AT91C_SDRC_SRCB ((unsigned int) 0x1 << 0) // (SDRC) Self-refresh Command Bit
-// -------- SDRC_LPR : (SDRC Offset: 0x10) SDRAM Controller Low-power Register --------
-#define AT91C_SDRC_LPCB ((unsigned int) 0x1 << 0) // (SDRC) Low-power Command Bit
-// -------- SDRC_IER : (SDRC Offset: 0x14) SDRAM Controller Interrupt Enable Register --------
-#define AT91C_SDRC_RES ((unsigned int) 0x1 << 0) // (SDRC) Refresh Error Status
-// -------- SDRC_IDR : (SDRC Offset: 0x18) SDRAM Controller Interrupt Disable Register --------
-// -------- SDRC_IMR : (SDRC Offset: 0x1c) SDRAM Controller Interrupt Mask Register --------
-// -------- SDRC_ISR : (SDRC Offset: 0x20) SDRAM Controller Interrupt Status Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Burst Flash Controller Interface
-// *****************************************************************************
-typedef struct _AT91S_BFC {
- AT91_REG BFC_MR; // BFC Mode Register
-} AT91S_BFC, *AT91PS_BFC;
-
-// -------- BFC_MR : (BFC Offset: 0x0) BFC Mode Register --------
-#define AT91C_BFC_BFCOM ((unsigned int) 0x3 << 0) // (BFC) Burst Flash Controller Operating Mode
-#define AT91C_BFC_BFCOM_DISABLED ((unsigned int) 0x0) // (BFC) NPCS0 is driven by the SMC or remains high.
-#define AT91C_BFC_BFCOM_ASYNC ((unsigned int) 0x1) // (BFC) Asynchronous
-#define AT91C_BFC_BFCOM_BURST_READ ((unsigned int) 0x2) // (BFC) Burst Read
-#define AT91C_BFC_BFCC ((unsigned int) 0x3 << 2) // (BFC) Burst Flash Controller Operating Mode
-#define AT91C_BFC_BFCC_MCK ((unsigned int) 0x1 << 2) // (BFC) Master Clock.
-#define AT91C_BFC_BFCC_MCK_DIV_2 ((unsigned int) 0x2 << 2) // (BFC) Master Clock divided by 2.
-#define AT91C_BFC_BFCC_MCK_DIV_4 ((unsigned int) 0x3 << 2) // (BFC) Master Clock divided by 4.
-#define AT91C_BFC_AVL ((unsigned int) 0xF << 4) // (BFC) Address Valid Latency
-#define AT91C_BFC_PAGES ((unsigned int) 0x7 << 8) // (BFC) Page Size
-#define AT91C_BFC_PAGES_NO_PAGE ((unsigned int) 0x0 << 8) // (BFC) No page handling.
-#define AT91C_BFC_PAGES_16 ((unsigned int) 0x1 << 8) // (BFC) 16 bytes page size.
-#define AT91C_BFC_PAGES_32 ((unsigned int) 0x2 << 8) // (BFC) 32 bytes page size.
-#define AT91C_BFC_PAGES_64 ((unsigned int) 0x3 << 8) // (BFC) 64 bytes page size.
-#define AT91C_BFC_PAGES_128 ((unsigned int) 0x4 << 8) // (BFC) 128 bytes page size.
-#define AT91C_BFC_PAGES_256 ((unsigned int) 0x5 << 8) // (BFC) 256 bytes page size.
-#define AT91C_BFC_PAGES_512 ((unsigned int) 0x6 << 8) // (BFC) 512 bytes page size.
-#define AT91C_BFC_PAGES_1024 ((unsigned int) 0x7 << 8) // (BFC) 1024 bytes page size.
-#define AT91C_BFC_OEL ((unsigned int) 0x3 << 12) // (BFC) Output Enable Latency
-#define AT91C_BFC_BAAEN ((unsigned int) 0x1 << 16) // (BFC) Burst Address Advance Enable
-#define AT91C_BFC_BFOEH ((unsigned int) 0x1 << 17) // (BFC) Burst Flash Output Enable Handling
-#define AT91C_BFC_MUXEN ((unsigned int) 0x1 << 18) // (BFC) Multiplexed Bus Enable
-#define AT91C_BFC_RDYEN ((unsigned int) 0x1 << 19) // (BFC) Ready Enable Mode
-
-// *****************************************************************************
-// REGISTER ADDRESS DEFINITION FOR AT91RM9200
-// *****************************************************************************
-// ========== Register definition for SYS peripheral ==========
-// ========== Register definition for MC peripheral ==========
-#define AT91C_MC_PUER ((AT91_REG *) 0xFFFFFF54) // (MC) MC Protection Unit Enable Register
-#define AT91C_MC_ASR ((AT91_REG *) 0xFFFFFF04) // (MC) MC Abort Status Register
-#define AT91C_MC_PUP ((AT91_REG *) 0xFFFFFF50) // (MC) MC Protection Unit Peripherals
-#define AT91C_MC_PUIA ((AT91_REG *) 0xFFFFFF10) // (MC) MC Protection Unit Area
-#define AT91C_MC_AASR ((AT91_REG *) 0xFFFFFF08) // (MC) MC Abort Address Status Register
-#define AT91C_MC_RCR ((AT91_REG *) 0xFFFFFF00) // (MC) MC Remap Control Register
-// ========== Register definition for RTC peripheral ==========
-#define AT91C_RTC_IMR ((AT91_REG *) 0xFFFFFE28) // (RTC) Interrupt Mask Register
-#define AT91C_RTC_IER ((AT91_REG *) 0xFFFFFE20) // (RTC) Interrupt Enable Register
-#define AT91C_RTC_SR ((AT91_REG *) 0xFFFFFE18) // (RTC) Status Register
-#define AT91C_RTC_TIMALR ((AT91_REG *) 0xFFFFFE10) // (RTC) Time Alarm Register
-#define AT91C_RTC_TIMR ((AT91_REG *) 0xFFFFFE08) // (RTC) Time Register
-#define AT91C_RTC_CR ((AT91_REG *) 0xFFFFFE00) // (RTC) Control Register
-#define AT91C_RTC_VER ((AT91_REG *) 0xFFFFFE2C) // (RTC) Valid Entry Register
-#define AT91C_RTC_IDR ((AT91_REG *) 0xFFFFFE24) // (RTC) Interrupt Disable Register
-#define AT91C_RTC_SCCR ((AT91_REG *) 0xFFFFFE1C) // (RTC) Status Clear Command Register
-#define AT91C_RTC_CALALR ((AT91_REG *) 0xFFFFFE14) // (RTC) Calendar Alarm Register
-#define AT91C_RTC_CALR ((AT91_REG *) 0xFFFFFE0C) // (RTC) Calendar Register
-#define AT91C_RTC_MR ((AT91_REG *) 0xFFFFFE04) // (RTC) Mode Register
-// ========== Register definition for ST peripheral ==========
-#define AT91C_ST_CRTR ((AT91_REG *) 0xFFFFFD24) // (ST) Current Real-time Register
-#define AT91C_ST_IMR ((AT91_REG *) 0xFFFFFD1C) // (ST) Interrupt Mask Register
-#define AT91C_ST_IER ((AT91_REG *) 0xFFFFFD14) // (ST) Interrupt Enable Register
-#define AT91C_ST_RTMR ((AT91_REG *) 0xFFFFFD0C) // (ST) Real-time Mode Register
-#define AT91C_ST_PIMR ((AT91_REG *) 0xFFFFFD04) // (ST) Period Interval Mode Register
-#define AT91C_ST_RTAR ((AT91_REG *) 0xFFFFFD20) // (ST) Real-time Alarm Register
-#define AT91C_ST_IDR ((AT91_REG *) 0xFFFFFD18) // (ST) Interrupt Disable Register
-#define AT91C_ST_SR ((AT91_REG *) 0xFFFFFD10) // (ST) Status Register
-#define AT91C_ST_WDMR ((AT91_REG *) 0xFFFFFD08) // (ST) Watchdog Mode Register
-#define AT91C_ST_CR ((AT91_REG *) 0xFFFFFD00) // (ST) Control Register
-// ========== Register definition for PMC peripheral ==========
-#define AT91C_PMC_SCSR ((AT91_REG *) 0xFFFFFC08) // (PMC) System Clock Status Register
-#define AT91C_PMC_SCER ((AT91_REG *) 0xFFFFFC00) // (PMC) System Clock Enable Register
-#define AT91C_PMC_IMR ((AT91_REG *) 0xFFFFFC6C) // (PMC) Interrupt Mask Register
-#define AT91C_PMC_IDR ((AT91_REG *) 0xFFFFFC64) // (PMC) Interrupt Disable Register
-#define AT91C_PMC_PCDR ((AT91_REG *) 0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
-#define AT91C_PMC_SCDR ((AT91_REG *) 0xFFFFFC04) // (PMC) System Clock Disable Register
-#define AT91C_PMC_SR ((AT91_REG *) 0xFFFFFC68) // (PMC) Status Register
-#define AT91C_PMC_IER ((AT91_REG *) 0xFFFFFC60) // (PMC) Interrupt Enable Register
-#define AT91C_PMC_MCKR ((AT91_REG *) 0xFFFFFC30) // (PMC) Master Clock Register
-#define AT91C_PMC_PCER ((AT91_REG *) 0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
-#define AT91C_PMC_PCSR ((AT91_REG *) 0xFFFFFC18) // (PMC) Peripheral Clock Status Register
-#define AT91C_PMC_PCKR ((AT91_REG *) 0xFFFFFC40) // (PMC) Programmable Clock Register
-// ========== Register definition for CKGR peripheral ==========
-#define AT91C_CKGR_PLLBR ((AT91_REG *) 0xFFFFFC2C) // (CKGR) PLL B Register
-#define AT91C_CKGR_MCFR ((AT91_REG *) 0xFFFFFC24) // (CKGR) Main Clock Frequency Register
-#define AT91C_CKGR_PLLAR ((AT91_REG *) 0xFFFFFC28) // (CKGR) PLL A Register
-#define AT91C_CKGR_MOR ((AT91_REG *) 0xFFFFFC20) // (CKGR) Main Oscillator Register
-// ========== Register definition for PIOD peripheral ==========
-#define AT91C_PIOD_PDSR ((AT91_REG *) 0xFFFFFA3C) // (PIOD) Pin Data Status Register
-#define AT91C_PIOD_CODR ((AT91_REG *) 0xFFFFFA34) // (PIOD) Clear Output Data Register
-#define AT91C_PIOD_OWER ((AT91_REG *) 0xFFFFFAA0) // (PIOD) Output Write Enable Register
-#define AT91C_PIOD_MDER ((AT91_REG *) 0xFFFFFA50) // (PIOD) Multi-driver Enable Register
-#define AT91C_PIOD_IMR ((AT91_REG *) 0xFFFFFA48) // (PIOD) Interrupt Mask Register
-#define AT91C_PIOD_IER ((AT91_REG *) 0xFFFFFA40) // (PIOD) Interrupt Enable Register
-#define AT91C_PIOD_ODSR ((AT91_REG *) 0xFFFFFA38) // (PIOD) Output Data Status Register
-#define AT91C_PIOD_SODR ((AT91_REG *) 0xFFFFFA30) // (PIOD) Set Output Data Register
-#define AT91C_PIOD_PER ((AT91_REG *) 0xFFFFFA00) // (PIOD) PIO Enable Register
-#define AT91C_PIOD_OWDR ((AT91_REG *) 0xFFFFFAA4) // (PIOD) Output Write Disable Register
-#define AT91C_PIOD_PPUER ((AT91_REG *) 0xFFFFFA64) // (PIOD) Pull-up Enable Register
-#define AT91C_PIOD_MDDR ((AT91_REG *) 0xFFFFFA54) // (PIOD) Multi-driver Disable Register
-#define AT91C_PIOD_ISR ((AT91_REG *) 0xFFFFFA4C) // (PIOD) Interrupt Status Register
-#define AT91C_PIOD_IDR ((AT91_REG *) 0xFFFFFA44) // (PIOD) Interrupt Disable Register
-#define AT91C_PIOD_PDR ((AT91_REG *) 0xFFFFFA04) // (PIOD) PIO Disable Register
-#define AT91C_PIOD_ODR ((AT91_REG *) 0xFFFFFA14) // (PIOD) Output Disable Registerr
-#define AT91C_PIOD_OWSR ((AT91_REG *) 0xFFFFFAA8) // (PIOD) Output Write Status Register
-#define AT91C_PIOD_ABSR ((AT91_REG *) 0xFFFFFA78) // (PIOD) AB Select Status Register
-#define AT91C_PIOD_ASR ((AT91_REG *) 0xFFFFFA70) // (PIOD) Select A Register
-#define AT91C_PIOD_PPUSR ((AT91_REG *) 0xFFFFFA68) // (PIOD) Pad Pull-up Status Register
-#define AT91C_PIOD_PPUDR ((AT91_REG *) 0xFFFFFA60) // (PIOD) Pull-up Disable Register
-#define AT91C_PIOD_MDSR ((AT91_REG *) 0xFFFFFA58) // (PIOD) Multi-driver Status Register
-#define AT91C_PIOD_PSR ((AT91_REG *) 0xFFFFFA08) // (PIOD) PIO Status Register
-#define AT91C_PIOD_OER ((AT91_REG *) 0xFFFFFA10) // (PIOD) Output Enable Register
-#define AT91C_PIOD_OSR ((AT91_REG *) 0xFFFFFA18) // (PIOD) Output Status Register
-#define AT91C_PIOD_IFER ((AT91_REG *) 0xFFFFFA20) // (PIOD) Input Filter Enable Register
-#define AT91C_PIOD_BSR ((AT91_REG *) 0xFFFFFA74) // (PIOD) Select B Register
-#define AT91C_PIOD_IFDR ((AT91_REG *) 0xFFFFFA24) // (PIOD) Input Filter Disable Register
-#define AT91C_PIOD_IFSR ((AT91_REG *) 0xFFFFFA28) // (PIOD) Input Filter Status Register
-// ========== Register definition for PIOC peripheral ==========
-#define AT91C_PIOC_IFDR ((AT91_REG *) 0xFFFFF824) // (PIOC) Input Filter Disable Register
-#define AT91C_PIOC_ODR ((AT91_REG *) 0xFFFFF814) // (PIOC) Output Disable Registerr
-#define AT91C_PIOC_ABSR ((AT91_REG *) 0xFFFFF878) // (PIOC) AB Select Status Register
-#define AT91C_PIOC_SODR ((AT91_REG *) 0xFFFFF830) // (PIOC) Set Output Data Register
-#define AT91C_PIOC_IFSR ((AT91_REG *) 0xFFFFF828) // (PIOC) Input Filter Status Register
-#define AT91C_PIOC_CODR ((AT91_REG *) 0xFFFFF834) // (PIOC) Clear Output Data Register
-#define AT91C_PIOC_ODSR ((AT91_REG *) 0xFFFFF838) // (PIOC) Output Data Status Register
-#define AT91C_PIOC_IER ((AT91_REG *) 0xFFFFF840) // (PIOC) Interrupt Enable Register
-#define AT91C_PIOC_IMR ((AT91_REG *) 0xFFFFF848) // (PIOC) Interrupt Mask Register
-#define AT91C_PIOC_OWDR ((AT91_REG *) 0xFFFFF8A4) // (PIOC) Output Write Disable Register
-#define AT91C_PIOC_MDDR ((AT91_REG *) 0xFFFFF854) // (PIOC) Multi-driver Disable Register
-#define AT91C_PIOC_PDSR ((AT91_REG *) 0xFFFFF83C) // (PIOC) Pin Data Status Register
-#define AT91C_PIOC_IDR ((AT91_REG *) 0xFFFFF844) // (PIOC) Interrupt Disable Register
-#define AT91C_PIOC_ISR ((AT91_REG *) 0xFFFFF84C) // (PIOC) Interrupt Status Register
-#define AT91C_PIOC_PDR ((AT91_REG *) 0xFFFFF804) // (PIOC) PIO Disable Register
-#define AT91C_PIOC_OWSR ((AT91_REG *) 0xFFFFF8A8) // (PIOC) Output Write Status Register
-#define AT91C_PIOC_OWER ((AT91_REG *) 0xFFFFF8A0) // (PIOC) Output Write Enable Register
-#define AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) // (PIOC) Select A Register
-#define AT91C_PIOC_PPUSR ((AT91_REG *) 0xFFFFF868) // (PIOC) Pad Pull-up Status Register
-#define AT91C_PIOC_PPUDR ((AT91_REG *) 0xFFFFF860) // (PIOC) Pull-up Disable Register
-#define AT91C_PIOC_MDSR ((AT91_REG *) 0xFFFFF858) // (PIOC) Multi-driver Status Register
-#define AT91C_PIOC_MDER ((AT91_REG *) 0xFFFFF850) // (PIOC) Multi-driver Enable Register
-#define AT91C_PIOC_IFER ((AT91_REG *) 0xFFFFF820) // (PIOC) Input Filter Enable Register
-#define AT91C_PIOC_OSR ((AT91_REG *) 0xFFFFF818) // (PIOC) Output Status Register
-#define AT91C_PIOC_OER ((AT91_REG *) 0xFFFFF810) // (PIOC) Output Enable Register
-#define AT91C_PIOC_PSR ((AT91_REG *) 0xFFFFF808) // (PIOC) PIO Status Register
-#define AT91C_PIOC_PER ((AT91_REG *) 0xFFFFF800) // (PIOC) PIO Enable Register
-#define AT91C_PIOC_BSR ((AT91_REG *) 0xFFFFF874) // (PIOC) Select B Register
-#define AT91C_PIOC_PPUER ((AT91_REG *) 0xFFFFF864) // (PIOC) Pull-up Enable Register
-// ========== Register definition for PIOB peripheral ==========
-#define AT91C_PIOB_OWSR ((AT91_REG *) 0xFFFFF6A8) // (PIOB) Output Write Status Register
-#define AT91C_PIOB_PPUSR ((AT91_REG *) 0xFFFFF668) // (PIOB) Pad Pull-up Status Register
-#define AT91C_PIOB_PPUDR ((AT91_REG *) 0xFFFFF660) // (PIOB) Pull-up Disable Register
-#define AT91C_PIOB_MDSR ((AT91_REG *) 0xFFFFF658) // (PIOB) Multi-driver Status Register
-#define AT91C_PIOB_MDER ((AT91_REG *) 0xFFFFF650) // (PIOB) Multi-driver Enable Register
-#define AT91C_PIOB_IMR ((AT91_REG *) 0xFFFFF648) // (PIOB) Interrupt Mask Register
-#define AT91C_PIOB_OSR ((AT91_REG *) 0xFFFFF618) // (PIOB) Output Status Register
-#define AT91C_PIOB_OER ((AT91_REG *) 0xFFFFF610) // (PIOB) Output Enable Register
-#define AT91C_PIOB_PSR ((AT91_REG *) 0xFFFFF608) // (PIOB) PIO Status Register
-#define AT91C_PIOB_PER ((AT91_REG *) 0xFFFFF600) // (PIOB) PIO Enable Register
-#define AT91C_PIOB_BSR ((AT91_REG *) 0xFFFFF674) // (PIOB) Select B Register
-#define AT91C_PIOB_PPUER ((AT91_REG *) 0xFFFFF664) // (PIOB) Pull-up Enable Register
-#define AT91C_PIOB_IFDR ((AT91_REG *) 0xFFFFF624) // (PIOB) Input Filter Disable Register
-#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) // (PIOB) Output Disable Registerr
-#define AT91C_PIOB_ABSR ((AT91_REG *) 0xFFFFF678) // (PIOB) AB Select Status Register
-#define AT91C_PIOB_ASR ((AT91_REG *) 0xFFFFF670) // (PIOB) Select A Register
-#define AT91C_PIOB_IFER ((AT91_REG *) 0xFFFFF620) // (PIOB) Input Filter Enable Register
-#define AT91C_PIOB_IFSR ((AT91_REG *) 0xFFFFF628) // (PIOB) Input Filter Status Register
-#define AT91C_PIOB_SODR ((AT91_REG *) 0xFFFFF630) // (PIOB) Set Output Data Register
-#define AT91C_PIOB_ODSR ((AT91_REG *) 0xFFFFF638) // (PIOB) Output Data Status Register
-#define AT91C_PIOB_CODR ((AT91_REG *) 0xFFFFF634) // (PIOB) Clear Output Data Register
-#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) // (PIOB) Pin Data Status Register
-#define AT91C_PIOB_OWER ((AT91_REG *) 0xFFFFF6A0) // (PIOB) Output Write Enable Register
-#define AT91C_PIOB_IER ((AT91_REG *) 0xFFFFF640) // (PIOB) Interrupt Enable Register
-#define AT91C_PIOB_OWDR ((AT91_REG *) 0xFFFFF6A4) // (PIOB) Output Write Disable Register
-#define AT91C_PIOB_MDDR ((AT91_REG *) 0xFFFFF654) // (PIOB) Multi-driver Disable Register
-#define AT91C_PIOB_ISR ((AT91_REG *) 0xFFFFF64C) // (PIOB) Interrupt Status Register
-#define AT91C_PIOB_IDR ((AT91_REG *) 0xFFFFF644) // (PIOB) Interrupt Disable Register
-#define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) // (PIOB) PIO Disable Register
-// ========== Register definition for PIOA peripheral ==========
-#define AT91C_PIOA_IMR ((AT91_REG *) 0xFFFFF448) // (PIOA) Interrupt Mask Register
-#define AT91C_PIOA_IER ((AT91_REG *) 0xFFFFF440) // (PIOA) Interrupt Enable Register
-#define AT91C_PIOA_OWDR ((AT91_REG *) 0xFFFFF4A4) // (PIOA) Output Write Disable Register
-#define AT91C_PIOA_ISR ((AT91_REG *) 0xFFFFF44C) // (PIOA) Interrupt Status Register
-#define AT91C_PIOA_PPUDR ((AT91_REG *) 0xFFFFF460) // (PIOA) Pull-up Disable Register
-#define AT91C_PIOA_MDSR ((AT91_REG *) 0xFFFFF458) // (PIOA) Multi-driver Status Register
-#define AT91C_PIOA_MDER ((AT91_REG *) 0xFFFFF450) // (PIOA) Multi-driver Enable Register
-#define AT91C_PIOA_PER ((AT91_REG *) 0xFFFFF400) // (PIOA) PIO Enable Register
-#define AT91C_PIOA_PSR ((AT91_REG *) 0xFFFFF408) // (PIOA) PIO Status Register
-#define AT91C_PIOA_OER ((AT91_REG *) 0xFFFFF410) // (PIOA) Output Enable Register
-#define AT91C_PIOA_BSR ((AT91_REG *) 0xFFFFF474) // (PIOA) Select B Register
-#define AT91C_PIOA_PPUER ((AT91_REG *) 0xFFFFF464) // (PIOA) Pull-up Enable Register
-#define AT91C_PIOA_MDDR ((AT91_REG *) 0xFFFFF454) // (PIOA) Multi-driver Disable Register
-#define AT91C_PIOA_PDR ((AT91_REG *) 0xFFFFF404) // (PIOA) PIO Disable Register
-#define AT91C_PIOA_ODR ((AT91_REG *) 0xFFFFF414) // (PIOA) Output Disable Registerr
-#define AT91C_PIOA_IFDR ((AT91_REG *) 0xFFFFF424) // (PIOA) Input Filter Disable Register
-#define AT91C_PIOA_ABSR ((AT91_REG *) 0xFFFFF478) // (PIOA) AB Select Status Register
-#define AT91C_PIOA_ASR ((AT91_REG *) 0xFFFFF470) // (PIOA) Select A Register
-#define AT91C_PIOA_PPUSR ((AT91_REG *) 0xFFFFF468) // (PIOA) Pad Pull-up Status Register
-#define AT91C_PIOA_ODSR ((AT91_REG *) 0xFFFFF438) // (PIOA) Output Data Status Register
-#define AT91C_PIOA_SODR ((AT91_REG *) 0xFFFFF430) // (PIOA) Set Output Data Register
-#define AT91C_PIOA_IFSR ((AT91_REG *) 0xFFFFF428) // (PIOA) Input Filter Status Register
-#define AT91C_PIOA_IFER ((AT91_REG *) 0xFFFFF420) // (PIOA) Input Filter Enable Register
-#define AT91C_PIOA_OSR ((AT91_REG *) 0xFFFFF418) // (PIOA) Output Status Register
-#define AT91C_PIOA_IDR ((AT91_REG *) 0xFFFFF444) // (PIOA) Interrupt Disable Register
-#define AT91C_PIOA_PDSR ((AT91_REG *) 0xFFFFF43C) // (PIOA) Pin Data Status Register
-#define AT91C_PIOA_CODR ((AT91_REG *) 0xFFFFF434) // (PIOA) Clear Output Data Register
-#define AT91C_PIOA_OWSR ((AT91_REG *) 0xFFFFF4A8) // (PIOA) Output Write Status Register
-#define AT91C_PIOA_OWER ((AT91_REG *) 0xFFFFF4A0) // (PIOA) Output Write Enable Register
-// ========== Register definition for DBGU peripheral ==========
-#define AT91C_DBGU_C2R ((AT91_REG *) 0xFFFFF244) // (DBGU) Chip ID2 Register
-#define AT91C_DBGU_THR ((AT91_REG *) 0xFFFFF21C) // (DBGU) Transmitter Holding Register
-#define AT91C_DBGU_CSR ((AT91_REG *) 0xFFFFF214) // (DBGU) Channel Status Register
-#define AT91C_DBGU_IDR ((AT91_REG *) 0xFFFFF20C) // (DBGU) Interrupt Disable Register
-#define AT91C_DBGU_MR ((AT91_REG *) 0xFFFFF204) // (DBGU) Mode Register
-#define AT91C_DBGU_FNTR ((AT91_REG *) 0xFFFFF248) // (DBGU) Force NTRST Register
-#define AT91C_DBGU_C1R ((AT91_REG *) 0xFFFFF240) // (DBGU) Chip ID1 Register
-#define AT91C_DBGU_BRGR ((AT91_REG *) 0xFFFFF220) // (DBGU) Baud Rate Generator Register
-#define AT91C_DBGU_RHR ((AT91_REG *) 0xFFFFF218) // (DBGU) Receiver Holding Register
-#define AT91C_DBGU_IMR ((AT91_REG *) 0xFFFFF210) // (DBGU) Interrupt Mask Register
-#define AT91C_DBGU_IER ((AT91_REG *) 0xFFFFF208) // (DBGU) Interrupt Enable Register
-#define AT91C_DBGU_CR ((AT91_REG *) 0xFFFFF200) // (DBGU) Control Register
-// ========== Register definition for PDC_DBGU peripheral ==========
-#define AT91C_DBGU_TNCR ((AT91_REG *) 0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
-#define AT91C_DBGU_RNCR ((AT91_REG *) 0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
-#define AT91C_DBGU_PTCR ((AT91_REG *) 0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
-#define AT91C_DBGU_PTSR ((AT91_REG *) 0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
-#define AT91C_DBGU_RCR ((AT91_REG *) 0xFFFFF304) // (PDC_DBGU) Receive Counter Register
-#define AT91C_DBGU_TCR ((AT91_REG *) 0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
-#define AT91C_DBGU_RPR ((AT91_REG *) 0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
-#define AT91C_DBGU_TPR ((AT91_REG *) 0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
-#define AT91C_DBGU_RNPR ((AT91_REG *) 0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
-#define AT91C_DBGU_TNPR ((AT91_REG *) 0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
-// ========== Register definition for AIC peripheral ==========
-#define AT91C_AIC_ICCR ((AT91_REG *) 0xFFFFF128) // (AIC) Interrupt Clear Command Register
-#define AT91C_AIC_IECR ((AT91_REG *) 0xFFFFF120) // (AIC) Interrupt Enable Command Register
-#define AT91C_AIC_SMR ((AT91_REG *) 0xFFFFF000) // (AIC) Source Mode Register
-#define AT91C_AIC_ISCR ((AT91_REG *) 0xFFFFF12C) // (AIC) Interrupt Set Command Register
-#define AT91C_AIC_EOICR ((AT91_REG *) 0xFFFFF130) // (AIC) End of Interrupt Command Register
-#define AT91C_AIC_DCR ((AT91_REG *) 0xFFFFF138) // (AIC) Debug Control Register (Protect)
-#define AT91C_AIC_FFER ((AT91_REG *) 0xFFFFF140) // (AIC) Fast Forcing Enable Register
-#define AT91C_AIC_SVR ((AT91_REG *) 0xFFFFF080) // (AIC) Source Vector Register
-#define AT91C_AIC_SPU ((AT91_REG *) 0xFFFFF134) // (AIC) Spurious Vector Register
-#define AT91C_AIC_FFDR ((AT91_REG *) 0xFFFFF144) // (AIC) Fast Forcing Disable Register
-#define AT91C_AIC_FVR ((AT91_REG *) 0xFFFFF104) // (AIC) FIQ Vector Register
-#define AT91C_AIC_FFSR ((AT91_REG *) 0xFFFFF148) // (AIC) Fast Forcing Status Register
-#define AT91C_AIC_IMR ((AT91_REG *) 0xFFFFF110) // (AIC) Interrupt Mask Register
-#define AT91C_AIC_ISR ((AT91_REG *) 0xFFFFF108) // (AIC) Interrupt Status Register
-#define AT91C_AIC_IVR ((AT91_REG *) 0xFFFFF100) // (AIC) IRQ Vector Register
-#define AT91C_AIC_IDCR ((AT91_REG *) 0xFFFFF124) // (AIC) Interrupt Disable Command Register
-#define AT91C_AIC_CISR ((AT91_REG *) 0xFFFFF114) // (AIC) Core Interrupt Status Register
-#define AT91C_AIC_IPR ((AT91_REG *) 0xFFFFF10C) // (AIC) Interrupt Pending Register
-// ========== Register definition for PDC_SPI peripheral ==========
-#define AT91C_SPI_PTCR ((AT91_REG *) 0xFFFE0120) // (PDC_SPI) PDC Transfer Control Register
-#define AT91C_SPI_TNPR ((AT91_REG *) 0xFFFE0118) // (PDC_SPI) Transmit Next Pointer Register
-#define AT91C_SPI_RNPR ((AT91_REG *) 0xFFFE0110) // (PDC_SPI) Receive Next Pointer Register
-#define AT91C_SPI_TPR ((AT91_REG *) 0xFFFE0108) // (PDC_SPI) Transmit Pointer Register
-#define AT91C_SPI_RPR ((AT91_REG *) 0xFFFE0100) // (PDC_SPI) Receive Pointer Register
-#define AT91C_SPI_PTSR ((AT91_REG *) 0xFFFE0124) // (PDC_SPI) PDC Transfer Status Register
-#define AT91C_SPI_TNCR ((AT91_REG *) 0xFFFE011C) // (PDC_SPI) Transmit Next Counter Register
-#define AT91C_SPI_RNCR ((AT91_REG *) 0xFFFE0114) // (PDC_SPI) Receive Next Counter Register
-#define AT91C_SPI_TCR ((AT91_REG *) 0xFFFE010C) // (PDC_SPI) Transmit Counter Register
-#define AT91C_SPI_RCR ((AT91_REG *) 0xFFFE0104) // (PDC_SPI) Receive Counter Register
-// ========== Register definition for SPI peripheral ==========
-#define AT91C_SPI_CSR ((AT91_REG *) 0xFFFE0030) // (SPI) Chip Select Register
-#define AT91C_SPI_IDR ((AT91_REG *) 0xFFFE0018) // (SPI) Interrupt Disable Register
-#define AT91C_SPI_SR ((AT91_REG *) 0xFFFE0010) // (SPI) Status Register
-#define AT91C_SPI_RDR ((AT91_REG *) 0xFFFE0008) // (SPI) Receive Data Register
-#define AT91C_SPI_CR ((AT91_REG *) 0xFFFE0000) // (SPI) Control Register
-#define AT91C_SPI_IMR ((AT91_REG *) 0xFFFE001C) // (SPI) Interrupt Mask Register
-#define AT91C_SPI_IER ((AT91_REG *) 0xFFFE0014) // (SPI) Interrupt Enable Register
-#define AT91C_SPI_TDR ((AT91_REG *) 0xFFFE000C) // (SPI) Transmit Data Register
-#define AT91C_SPI_MR ((AT91_REG *) 0xFFFE0004) // (SPI) Mode Register
-// ========== Register definition for PDC_SSC2 peripheral ==========
-#define AT91C_SSC2_PTCR ((AT91_REG *) 0xFFFD8120) // (PDC_SSC2) PDC Transfer Control Register
-#define AT91C_SSC2_TNPR ((AT91_REG *) 0xFFFD8118) // (PDC_SSC2) Transmit Next Pointer Register
-#define AT91C_SSC2_RNPR ((AT91_REG *) 0xFFFD8110) // (PDC_SSC2) Receive Next Pointer Register
-#define AT91C_SSC2_TPR ((AT91_REG *) 0xFFFD8108) // (PDC_SSC2) Transmit Pointer Register
-#define AT91C_SSC2_RPR ((AT91_REG *) 0xFFFD8100) // (PDC_SSC2) Receive Pointer Register
-#define AT91C_SSC2_PTSR ((AT91_REG *) 0xFFFD8124) // (PDC_SSC2) PDC Transfer Status Register
-#define AT91C_SSC2_TNCR ((AT91_REG *) 0xFFFD811C) // (PDC_SSC2) Transmit Next Counter Register
-#define AT91C_SSC2_RNCR ((AT91_REG *) 0xFFFD8114) // (PDC_SSC2) Receive Next Counter Register
-#define AT91C_SSC2_TCR ((AT91_REG *) 0xFFFD810C) // (PDC_SSC2) Transmit Counter Register
-#define AT91C_SSC2_RCR ((AT91_REG *) 0xFFFD8104) // (PDC_SSC2) Receive Counter Register
-// ========== Register definition for SSC2 peripheral ==========
-#define AT91C_SSC2_IMR ((AT91_REG *) 0xFFFD804C) // (SSC2) Interrupt Mask Register
-#define AT91C_SSC2_IER ((AT91_REG *) 0xFFFD8044) // (SSC2) Interrupt Enable Register
-#define AT91C_SSC2_RC1R ((AT91_REG *) 0xFFFD803C) // (SSC2) Receive Compare 1 Register
-#define AT91C_SSC2_TSHR ((AT91_REG *) 0xFFFD8034) // (SSC2) Transmit Sync Holding Register
-#define AT91C_SSC2_CMR ((AT91_REG *) 0xFFFD8004) // (SSC2) Clock Mode Register
-#define AT91C_SSC2_IDR ((AT91_REG *) 0xFFFD8048) // (SSC2) Interrupt Disable Register
-#define AT91C_SSC2_TCMR ((AT91_REG *) 0xFFFD8018) // (SSC2) Transmit Clock Mode Register
-#define AT91C_SSC2_RCMR ((AT91_REG *) 0xFFFD8010) // (SSC2) Receive Clock ModeRegister
-#define AT91C_SSC2_CR ((AT91_REG *) 0xFFFD8000) // (SSC2) Control Register
-#define AT91C_SSC2_RFMR ((AT91_REG *) 0xFFFD8014) // (SSC2) Receive Frame Mode Register
-#define AT91C_SSC2_TFMR ((AT91_REG *) 0xFFFD801C) // (SSC2) Transmit Frame Mode Register
-#define AT91C_SSC2_THR ((AT91_REG *) 0xFFFD8024) // (SSC2) Transmit Holding Register
-#define AT91C_SSC2_SR ((AT91_REG *) 0xFFFD8040) // (SSC2) Status Register
-#define AT91C_SSC2_RC0R ((AT91_REG *) 0xFFFD8038) // (SSC2) Receive Compare 0 Register
-#define AT91C_SSC2_RSHR ((AT91_REG *) 0xFFFD8030) // (SSC2) Receive Sync Holding Register
-#define AT91C_SSC2_RHR ((AT91_REG *) 0xFFFD8020) // (SSC2) Receive Holding Register
-// ========== Register definition for PDC_SSC1 peripheral ==========
-#define AT91C_SSC1_PTCR ((AT91_REG *) 0xFFFD4120) // (PDC_SSC1) PDC Transfer Control Register
-#define AT91C_SSC1_TNPR ((AT91_REG *) 0xFFFD4118) // (PDC_SSC1) Transmit Next Pointer Register
-#define AT91C_SSC1_RNPR ((AT91_REG *) 0xFFFD4110) // (PDC_SSC1) Receive Next Pointer Register
-#define AT91C_SSC1_TPR ((AT91_REG *) 0xFFFD4108) // (PDC_SSC1) Transmit Pointer Register
-#define AT91C_SSC1_RPR ((AT91_REG *) 0xFFFD4100) // (PDC_SSC1) Receive Pointer Register
-#define AT91C_SSC1_PTSR ((AT91_REG *) 0xFFFD4124) // (PDC_SSC1) PDC Transfer Status Register
-#define AT91C_SSC1_TNCR ((AT91_REG *) 0xFFFD411C) // (PDC_SSC1) Transmit Next Counter Register
-#define AT91C_SSC1_RNCR ((AT91_REG *) 0xFFFD4114) // (PDC_SSC1) Receive Next Counter Register
-#define AT91C_SSC1_TCR ((AT91_REG *) 0xFFFD410C) // (PDC_SSC1) Transmit Counter Register
-#define AT91C_SSC1_RCR ((AT91_REG *) 0xFFFD4104) // (PDC_SSC1) Receive Counter Register
-// ========== Register definition for SSC1 peripheral ==========
-#define AT91C_SSC1_RFMR ((AT91_REG *) 0xFFFD4014) // (SSC1) Receive Frame Mode Register
-#define AT91C_SSC1_CMR ((AT91_REG *) 0xFFFD4004) // (SSC1) Clock Mode Register
-#define AT91C_SSC1_IDR ((AT91_REG *) 0xFFFD4048) // (SSC1) Interrupt Disable Register
-#define AT91C_SSC1_SR ((AT91_REG *) 0xFFFD4040) // (SSC1) Status Register
-#define AT91C_SSC1_RC0R ((AT91_REG *) 0xFFFD4038) // (SSC1) Receive Compare 0 Register
-#define AT91C_SSC1_RSHR ((AT91_REG *) 0xFFFD4030) // (SSC1) Receive Sync Holding Register
-#define AT91C_SSC1_RHR ((AT91_REG *) 0xFFFD4020) // (SSC1) Receive Holding Register
-#define AT91C_SSC1_TCMR ((AT91_REG *) 0xFFFD4018) // (SSC1) Transmit Clock Mode Register
-#define AT91C_SSC1_RCMR ((AT91_REG *) 0xFFFD4010) // (SSC1) Receive Clock ModeRegister
-#define AT91C_SSC1_CR ((AT91_REG *) 0xFFFD4000) // (SSC1) Control Register
-#define AT91C_SSC1_IMR ((AT91_REG *) 0xFFFD404C) // (SSC1) Interrupt Mask Register
-#define AT91C_SSC1_IER ((AT91_REG *) 0xFFFD4044) // (SSC1) Interrupt Enable Register
-#define AT91C_SSC1_RC1R ((AT91_REG *) 0xFFFD403C) // (SSC1) Receive Compare 1 Register
-#define AT91C_SSC1_TSHR ((AT91_REG *) 0xFFFD4034) // (SSC1) Transmit Sync Holding Register
-#define AT91C_SSC1_THR ((AT91_REG *) 0xFFFD4024) // (SSC1) Transmit Holding Register
-#define AT91C_SSC1_TFMR ((AT91_REG *) 0xFFFD401C) // (SSC1) Transmit Frame Mode Register
-// ========== Register definition for PDC_SSC0 peripheral ==========
-#define AT91C_SSC0_PTCR ((AT91_REG *) 0xFFFD0120) // (PDC_SSC0) PDC Transfer Control Register
-#define AT91C_SSC0_TNPR ((AT91_REG *) 0xFFFD0118) // (PDC_SSC0) Transmit Next Pointer Register
-#define AT91C_SSC0_RNPR ((AT91_REG *) 0xFFFD0110) // (PDC_SSC0) Receive Next Pointer Register
-#define AT91C_SSC0_TPR ((AT91_REG *) 0xFFFD0108) // (PDC_SSC0) Transmit Pointer Register
-#define AT91C_SSC0_RPR ((AT91_REG *) 0xFFFD0100) // (PDC_SSC0) Receive Pointer Register
-#define AT91C_SSC0_PTSR ((AT91_REG *) 0xFFFD0124) // (PDC_SSC0) PDC Transfer Status Register
-#define AT91C_SSC0_TNCR ((AT91_REG *) 0xFFFD011C) // (PDC_SSC0) Transmit Next Counter Register
-#define AT91C_SSC0_RNCR ((AT91_REG *) 0xFFFD0114) // (PDC_SSC0) Receive Next Counter Register
-#define AT91C_SSC0_TCR ((AT91_REG *) 0xFFFD010C) // (PDC_SSC0) Transmit Counter Register
-#define AT91C_SSC0_RCR ((AT91_REG *) 0xFFFD0104) // (PDC_SSC0) Receive Counter Register
-// ========== Register definition for SSC0 peripheral ==========
-#define AT91C_SSC0_IMR ((AT91_REG *) 0xFFFD004C) // (SSC0) Interrupt Mask Register
-#define AT91C_SSC0_IER ((AT91_REG *) 0xFFFD0044) // (SSC0) Interrupt Enable Register
-#define AT91C_SSC0_RC1R ((AT91_REG *) 0xFFFD003C) // (SSC0) Receive Compare 1 Register
-#define AT91C_SSC0_TSHR ((AT91_REG *) 0xFFFD0034) // (SSC0) Transmit Sync Holding Register
-#define AT91C_SSC0_THR ((AT91_REG *) 0xFFFD0024) // (SSC0) Transmit Holding Register
-#define AT91C_SSC0_TFMR ((AT91_REG *) 0xFFFD001C) // (SSC0) Transmit Frame Mode Register
-#define AT91C_SSC0_RFMR ((AT91_REG *) 0xFFFD0014) // (SSC0) Receive Frame Mode Register
-#define AT91C_SSC0_CMR ((AT91_REG *) 0xFFFD0004) // (SSC0) Clock Mode Register
-#define AT91C_SSC0_IDR ((AT91_REG *) 0xFFFD0048) // (SSC0) Interrupt Disable Register
-#define AT91C_SSC0_SR ((AT91_REG *) 0xFFFD0040) // (SSC0) Status Register
-#define AT91C_SSC0_RC0R ((AT91_REG *) 0xFFFD0038) // (SSC0) Receive Compare 0 Register
-#define AT91C_SSC0_RSHR ((AT91_REG *) 0xFFFD0030) // (SSC0) Receive Sync Holding Register
-#define AT91C_SSC0_RHR ((AT91_REG *) 0xFFFD0020) // (SSC0) Receive Holding Register
-#define AT91C_SSC0_TCMR ((AT91_REG *) 0xFFFD0018) // (SSC0) Transmit Clock Mode Register
-#define AT91C_SSC0_RCMR ((AT91_REG *) 0xFFFD0010) // (SSC0) Receive Clock ModeRegister
-#define AT91C_SSC0_CR ((AT91_REG *) 0xFFFD0000) // (SSC0) Control Register
-// ========== Register definition for PDC_US3 peripheral ==========
-#define AT91C_US3_PTSR ((AT91_REG *) 0xFFFCC124) // (PDC_US3) PDC Transfer Status Register
-#define AT91C_US3_TNCR ((AT91_REG *) 0xFFFCC11C) // (PDC_US3) Transmit Next Counter Register
-#define AT91C_US3_RNCR ((AT91_REG *) 0xFFFCC114) // (PDC_US3) Receive Next Counter Register
-#define AT91C_US3_TCR ((AT91_REG *) 0xFFFCC10C) // (PDC_US3) Transmit Counter Register
-#define AT91C_US3_RCR ((AT91_REG *) 0xFFFCC104) // (PDC_US3) Receive Counter Register
-#define AT91C_US3_PTCR ((AT91_REG *) 0xFFFCC120) // (PDC_US3) PDC Transfer Control Register
-#define AT91C_US3_TNPR ((AT91_REG *) 0xFFFCC118) // (PDC_US3) Transmit Next Pointer Register
-#define AT91C_US3_RNPR ((AT91_REG *) 0xFFFCC110) // (PDC_US3) Receive Next Pointer Register
-#define AT91C_US3_TPR ((AT91_REG *) 0xFFFCC108) // (PDC_US3) Transmit Pointer Register
-#define AT91C_US3_RPR ((AT91_REG *) 0xFFFCC100) // (PDC_US3) Receive Pointer Register
-// ========== Register definition for US3 peripheral ==========
-#define AT91C_US3_IF ((AT91_REG *) 0xFFFCC04C) // (US3) IRDA_FILTER Register
-#define AT91C_US3_NER ((AT91_REG *) 0xFFFCC044) // (US3) Nb Errors Register
-#define AT91C_US3_RTOR ((AT91_REG *) 0xFFFCC024) // (US3) Receiver Time-out Register
-#define AT91C_US3_THR ((AT91_REG *) 0xFFFCC01C) // (US3) Transmitter Holding Register
-#define AT91C_US3_CSR ((AT91_REG *) 0xFFFCC014) // (US3) Channel Status Register
-#define AT91C_US3_IDR ((AT91_REG *) 0xFFFCC00C) // (US3) Interrupt Disable Register
-#define AT91C_US3_MR ((AT91_REG *) 0xFFFCC004) // (US3) Mode Register
-#define AT91C_US3_XXR ((AT91_REG *) 0xFFFCC048) // (US3) XON_XOFF Register
-#define AT91C_US3_FIDI ((AT91_REG *) 0xFFFCC040) // (US3) FI_DI_Ratio Register
-#define AT91C_US3_TTGR ((AT91_REG *) 0xFFFCC028) // (US3) Transmitter Time-guard Register
-#define AT91C_US3_BRGR ((AT91_REG *) 0xFFFCC020) // (US3) Baud Rate Generator Register
-#define AT91C_US3_RHR ((AT91_REG *) 0xFFFCC018) // (US3) Receiver Holding Register
-#define AT91C_US3_IMR ((AT91_REG *) 0xFFFCC010) // (US3) Interrupt Mask Register
-#define AT91C_US3_IER ((AT91_REG *) 0xFFFCC008) // (US3) Interrupt Enable Register
-#define AT91C_US3_CR ((AT91_REG *) 0xFFFCC000) // (US3) Control Register
-// ========== Register definition for PDC_US2 peripheral ==========
-#define AT91C_US2_PTSR ((AT91_REG *) 0xFFFC8124) // (PDC_US2) PDC Transfer Status Register
-#define AT91C_US2_TNCR ((AT91_REG *) 0xFFFC811C) // (PDC_US2) Transmit Next Counter Register
-#define AT91C_US2_RNCR ((AT91_REG *) 0xFFFC8114) // (PDC_US2) Receive Next Counter Register
-#define AT91C_US2_TCR ((AT91_REG *) 0xFFFC810C) // (PDC_US2) Transmit Counter Register
-#define AT91C_US2_PTCR ((AT91_REG *) 0xFFFC8120) // (PDC_US2) PDC Transfer Control Register
-#define AT91C_US2_RCR ((AT91_REG *) 0xFFFC8104) // (PDC_US2) Receive Counter Register
-#define AT91C_US2_TNPR ((AT91_REG *) 0xFFFC8118) // (PDC_US2) Transmit Next Pointer Register
-#define AT91C_US2_RPR ((AT91_REG *) 0xFFFC8100) // (PDC_US2) Receive Pointer Register
-#define AT91C_US2_TPR ((AT91_REG *) 0xFFFC8108) // (PDC_US2) Transmit Pointer Register
-#define AT91C_US2_RNPR ((AT91_REG *) 0xFFFC8110) // (PDC_US2) Receive Next Pointer Register
-// ========== Register definition for US2 peripheral ==========
-#define AT91C_US2_XXR ((AT91_REG *) 0xFFFC8048) // (US2) XON_XOFF Register
-#define AT91C_US2_FIDI ((AT91_REG *) 0xFFFC8040) // (US2) FI_DI_Ratio Register
-#define AT91C_US2_TTGR ((AT91_REG *) 0xFFFC8028) // (US2) Transmitter Time-guard Register
-#define AT91C_US2_BRGR ((AT91_REG *) 0xFFFC8020) // (US2) Baud Rate Generator Register
-#define AT91C_US2_RHR ((AT91_REG *) 0xFFFC8018) // (US2) Receiver Holding Register
-#define AT91C_US2_IMR ((AT91_REG *) 0xFFFC8010) // (US2) Interrupt Mask Register
-#define AT91C_US2_IER ((AT91_REG *) 0xFFFC8008) // (US2) Interrupt Enable Register
-#define AT91C_US2_CR ((AT91_REG *) 0xFFFC8000) // (US2) Control Register
-#define AT91C_US2_IF ((AT91_REG *) 0xFFFC804C) // (US2) IRDA_FILTER Register
-#define AT91C_US2_NER ((AT91_REG *) 0xFFFC8044) // (US2) Nb Errors Register
-#define AT91C_US2_RTOR ((AT91_REG *) 0xFFFC8024) // (US2) Receiver Time-out Register
-#define AT91C_US2_THR ((AT91_REG *) 0xFFFC801C) // (US2) Transmitter Holding Register
-#define AT91C_US2_CSR ((AT91_REG *) 0xFFFC8014) // (US2) Channel Status Register
-#define AT91C_US2_IDR ((AT91_REG *) 0xFFFC800C) // (US2) Interrupt Disable Register
-#define AT91C_US2_MR ((AT91_REG *) 0xFFFC8004) // (US2) Mode Register
-// ========== Register definition for PDC_US1 peripheral ==========
-#define AT91C_US1_PTSR ((AT91_REG *) 0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
-#define AT91C_US1_TNCR ((AT91_REG *) 0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
-#define AT91C_US1_RNCR ((AT91_REG *) 0xFFFC4114) // (PDC_US1) Receive Next Counter Register
-#define AT91C_US1_TCR ((AT91_REG *) 0xFFFC410C) // (PDC_US1) Transmit Counter Register
-#define AT91C_US1_RCR ((AT91_REG *) 0xFFFC4104) // (PDC_US1) Receive Counter Register
-#define AT91C_US1_PTCR ((AT91_REG *) 0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
-#define AT91C_US1_TNPR ((AT91_REG *) 0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
-#define AT91C_US1_RNPR ((AT91_REG *) 0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
-#define AT91C_US1_TPR ((AT91_REG *) 0xFFFC4108) // (PDC_US1) Transmit Pointer Register
-#define AT91C_US1_RPR ((AT91_REG *) 0xFFFC4100) // (PDC_US1) Receive Pointer Register
-// ========== Register definition for US1 peripheral ==========
-#define AT91C_US1_XXR ((AT91_REG *) 0xFFFC4048) // (US1) XON_XOFF Register
-#define AT91C_US1_RHR ((AT91_REG *) 0xFFFC4018) // (US1) Receiver Holding Register
-#define AT91C_US1_IMR ((AT91_REG *) 0xFFFC4010) // (US1) Interrupt Mask Register
-#define AT91C_US1_IER ((AT91_REG *) 0xFFFC4008) // (US1) Interrupt Enable Register
-#define AT91C_US1_CR ((AT91_REG *) 0xFFFC4000) // (US1) Control Register
-#define AT91C_US1_RTOR ((AT91_REG *) 0xFFFC4024) // (US1) Receiver Time-out Register
-#define AT91C_US1_THR ((AT91_REG *) 0xFFFC401C) // (US1) Transmitter Holding Register
-#define AT91C_US1_CSR ((AT91_REG *) 0xFFFC4014) // (US1) Channel Status Register
-#define AT91C_US1_IDR ((AT91_REG *) 0xFFFC400C) // (US1) Interrupt Disable Register
-#define AT91C_US1_FIDI ((AT91_REG *) 0xFFFC4040) // (US1) FI_DI_Ratio Register
-#define AT91C_US1_BRGR ((AT91_REG *) 0xFFFC4020) // (US1) Baud Rate Generator Register
-#define AT91C_US1_TTGR ((AT91_REG *) 0xFFFC4028) // (US1) Transmitter Time-guard Register
-#define AT91C_US1_IF ((AT91_REG *) 0xFFFC404C) // (US1) IRDA_FILTER Register
-#define AT91C_US1_NER ((AT91_REG *) 0xFFFC4044) // (US1) Nb Errors Register
-#define AT91C_US1_MR ((AT91_REG *) 0xFFFC4004) // (US1) Mode Register
-// ========== Register definition for PDC_US0 peripheral ==========
-#define AT91C_US0_PTCR ((AT91_REG *) 0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
-#define AT91C_US0_TNPR ((AT91_REG *) 0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
-#define AT91C_US0_RNPR ((AT91_REG *) 0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
-#define AT91C_US0_TPR ((AT91_REG *) 0xFFFC0108) // (PDC_US0) Transmit Pointer Register
-#define AT91C_US0_RPR ((AT91_REG *) 0xFFFC0100) // (PDC_US0) Receive Pointer Register
-#define AT91C_US0_PTSR ((AT91_REG *) 0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
-#define AT91C_US0_TNCR ((AT91_REG *) 0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
-#define AT91C_US0_RNCR ((AT91_REG *) 0xFFFC0114) // (PDC_US0) Receive Next Counter Register
-#define AT91C_US0_TCR ((AT91_REG *) 0xFFFC010C) // (PDC_US0) Transmit Counter Register
-#define AT91C_US0_RCR ((AT91_REG *) 0xFFFC0104) // (PDC_US0) Receive Counter Register
-// ========== Register definition for US0 peripheral ==========
-#define AT91C_US0_TTGR ((AT91_REG *) 0xFFFC0028) // (US0) Transmitter Time-guard Register
-#define AT91C_US0_BRGR ((AT91_REG *) 0xFFFC0020) // (US0) Baud Rate Generator Register
-#define AT91C_US0_RHR ((AT91_REG *) 0xFFFC0018) // (US0) Receiver Holding Register
-#define AT91C_US0_IMR ((AT91_REG *) 0xFFFC0010) // (US0) Interrupt Mask Register
-#define AT91C_US0_NER ((AT91_REG *) 0xFFFC0044) // (US0) Nb Errors Register
-#define AT91C_US0_RTOR ((AT91_REG *) 0xFFFC0024) // (US0) Receiver Time-out Register
-#define AT91C_US0_XXR ((AT91_REG *) 0xFFFC0048) // (US0) XON_XOFF Register
-#define AT91C_US0_FIDI ((AT91_REG *) 0xFFFC0040) // (US0) FI_DI_Ratio Register
-#define AT91C_US0_CR ((AT91_REG *) 0xFFFC0000) // (US0) Control Register
-#define AT91C_US0_IER ((AT91_REG *) 0xFFFC0008) // (US0) Interrupt Enable Register
-#define AT91C_US0_IF ((AT91_REG *) 0xFFFC004C) // (US0) IRDA_FILTER Register
-#define AT91C_US0_MR ((AT91_REG *) 0xFFFC0004) // (US0) Mode Register
-#define AT91C_US0_IDR ((AT91_REG *) 0xFFFC000C) // (US0) Interrupt Disable Register
-#define AT91C_US0_CSR ((AT91_REG *) 0xFFFC0014) // (US0) Channel Status Register
-#define AT91C_US0_THR ((AT91_REG *) 0xFFFC001C) // (US0) Transmitter Holding Register
-// ========== Register definition for TWI peripheral ==========
-#define AT91C_TWI_RHR ((AT91_REG *) 0xFFFB8030) // (TWI) Receive Holding Register
-#define AT91C_TWI_IDR ((AT91_REG *) 0xFFFB8028) // (TWI) Interrupt Disable Register
-#define AT91C_TWI_SR ((AT91_REG *) 0xFFFB8020) // (TWI) Status Register
-#define AT91C_TWI_CWGR ((AT91_REG *) 0xFFFB8010) // (TWI) Clock Waveform Generator Register
-#define AT91C_TWI_SMR ((AT91_REG *) 0xFFFB8008) // (TWI) Slave Mode Register
-#define AT91C_TWI_CR ((AT91_REG *) 0xFFFB8000) // (TWI) Control Register
-#define AT91C_TWI_THR ((AT91_REG *) 0xFFFB8034) // (TWI) Transmit Holding Register
-#define AT91C_TWI_IMR ((AT91_REG *) 0xFFFB802C) // (TWI) Interrupt Mask Register
-#define AT91C_TWI_IER ((AT91_REG *) 0xFFFB8024) // (TWI) Interrupt Enable Register
-#define AT91C_TWI_IADR ((AT91_REG *) 0xFFFB800C) // (TWI) Internal Address Register
-#define AT91C_TWI_MMR ((AT91_REG *) 0xFFFB8004) // (TWI) Master Mode Register
-// ========== Register definition for PDC_MCI peripheral ==========
-#define AT91C_MCI_PTCR ((AT91_REG *) 0xFFFB4120) // (PDC_MCI) PDC Transfer Control Register
-#define AT91C_MCI_TNPR ((AT91_REG *) 0xFFFB4118) // (PDC_MCI) Transmit Next Pointer Register
-#define AT91C_MCI_RNPR ((AT91_REG *) 0xFFFB4110) // (PDC_MCI) Receive Next Pointer Register
-#define AT91C_MCI_TPR ((AT91_REG *) 0xFFFB4108) // (PDC_MCI) Transmit Pointer Register
-#define AT91C_MCI_RPR ((AT91_REG *) 0xFFFB4100) // (PDC_MCI) Receive Pointer Register
-#define AT91C_MCI_PTSR ((AT91_REG *) 0xFFFB4124) // (PDC_MCI) PDC Transfer Status Register
-#define AT91C_MCI_TNCR ((AT91_REG *) 0xFFFB411C) // (PDC_MCI) Transmit Next Counter Register
-#define AT91C_MCI_RNCR ((AT91_REG *) 0xFFFB4114) // (PDC_MCI) Receive Next Counter Register
-#define AT91C_MCI_TCR ((AT91_REG *) 0xFFFB410C) // (PDC_MCI) Transmit Counter Register
-#define AT91C_MCI_RCR ((AT91_REG *) 0xFFFB4104) // (PDC_MCI) Receive Counter Register
-// ========== Register definition for MCI peripheral ==========
-#define AT91C_MCI_IDR ((AT91_REG *) 0xFFFB4048) // (MCI) MCI Interrupt Disable Register
-#define AT91C_MCI_SR ((AT91_REG *) 0xFFFB4040) // (MCI) MCI Status Register
-#define AT91C_MCI_RDR ((AT91_REG *) 0xFFFB4030) // (MCI) MCI Receive Data Register
-#define AT91C_MCI_RSPR ((AT91_REG *) 0xFFFB4020) // (MCI) MCI Response Register
-#define AT91C_MCI_ARGR ((AT91_REG *) 0xFFFB4010) // (MCI) MCI Argument Register
-#define AT91C_MCI_DTOR ((AT91_REG *) 0xFFFB4008) // (MCI) MCI Data Timeout Register
-#define AT91C_MCI_CR ((AT91_REG *) 0xFFFB4000) // (MCI) MCI Control Register
-#define AT91C_MCI_IMR ((AT91_REG *) 0xFFFB404C) // (MCI) MCI Interrupt Mask Register
-#define AT91C_MCI_IER ((AT91_REG *) 0xFFFB4044) // (MCI) MCI Interrupt Enable Register
-#define AT91C_MCI_TDR ((AT91_REG *) 0xFFFB4034) // (MCI) MCI Transmit Data Register
-#define AT91C_MCI_CMDR ((AT91_REG *) 0xFFFB4014) // (MCI) MCI Command Register
-#define AT91C_MCI_SDCR ((AT91_REG *) 0xFFFB400C) // (MCI) MCI SD Card Register
-#define AT91C_MCI_MR ((AT91_REG *) 0xFFFB4004) // (MCI) MCI Mode Register
-// ========== Register definition for UDP peripheral ==========
-#define AT91C_UDP_ISR ((AT91_REG *) 0xFFFB001C) // (UDP) Interrupt Status Register
-#define AT91C_UDP_IDR ((AT91_REG *) 0xFFFB0014) // (UDP) Interrupt Disable Register
-#define AT91C_UDP_GLBSTATE ((AT91_REG *) 0xFFFB0004) // (UDP) Global State Register
-#define AT91C_UDP_FDR ((AT91_REG *) 0xFFFB0050) // (UDP) Endpoint FIFO Data Register
-#define AT91C_UDP_CSR ((AT91_REG *) 0xFFFB0030) // (UDP) Endpoint Control and Status Register
-#define AT91C_UDP_RSTEP ((AT91_REG *) 0xFFFB0028) // (UDP) Reset Endpoint Register
-#define AT91C_UDP_ICR ((AT91_REG *) 0xFFFB0020) // (UDP) Interrupt Clear Register
-#define AT91C_UDP_IMR ((AT91_REG *) 0xFFFB0018) // (UDP) Interrupt Mask Register
-#define AT91C_UDP_IER ((AT91_REG *) 0xFFFB0010) // (UDP) Interrupt Enable Register
-#define AT91C_UDP_FADDR ((AT91_REG *) 0xFFFB0008) // (UDP) Function Address Register
-#define AT91C_UDP_NUM ((AT91_REG *) 0xFFFB0000) // (UDP) Frame Number Register
-// ========== Register definition for TC5 peripheral ==========
-#define AT91C_TC5_CMR ((AT91_REG *) 0xFFFA4084) // (TC5) Channel Mode Register
-#define AT91C_TC5_IDR ((AT91_REG *) 0xFFFA40A8) // (TC5) Interrupt Disable Register
-#define AT91C_TC5_SR ((AT91_REG *) 0xFFFA40A0) // (TC5) Status Register
-#define AT91C_TC5_RB ((AT91_REG *) 0xFFFA4098) // (TC5) Register B
-#define AT91C_TC5_CV ((AT91_REG *) 0xFFFA4090) // (TC5) Counter Value
-#define AT91C_TC5_CCR ((AT91_REG *) 0xFFFA4080) // (TC5) Channel Control Register
-#define AT91C_TC5_IMR ((AT91_REG *) 0xFFFA40AC) // (TC5) Interrupt Mask Register
-#define AT91C_TC5_IER ((AT91_REG *) 0xFFFA40A4) // (TC5) Interrupt Enable Register
-#define AT91C_TC5_RC ((AT91_REG *) 0xFFFA409C) // (TC5) Register C
-#define AT91C_TC5_RA ((AT91_REG *) 0xFFFA4094) // (TC5) Register A
-// ========== Register definition for TC4 peripheral ==========
-#define AT91C_TC4_IMR ((AT91_REG *) 0xFFFA406C) // (TC4) Interrupt Mask Register
-#define AT91C_TC4_IER ((AT91_REG *) 0xFFFA4064) // (TC4) Interrupt Enable Register
-#define AT91C_TC4_RC ((AT91_REG *) 0xFFFA405C) // (TC4) Register C
-#define AT91C_TC4_RA ((AT91_REG *) 0xFFFA4054) // (TC4) Register A
-#define AT91C_TC4_CMR ((AT91_REG *) 0xFFFA4044) // (TC4) Channel Mode Register
-#define AT91C_TC4_IDR ((AT91_REG *) 0xFFFA4068) // (TC4) Interrupt Disable Register
-#define AT91C_TC4_SR ((AT91_REG *) 0xFFFA4060) // (TC4) Status Register
-#define AT91C_TC4_RB ((AT91_REG *) 0xFFFA4058) // (TC4) Register B
-#define AT91C_TC4_CV ((AT91_REG *) 0xFFFA4050) // (TC4) Counter Value
-#define AT91C_TC4_CCR ((AT91_REG *) 0xFFFA4040) // (TC4) Channel Control Register
-// ========== Register definition for TC3 peripheral ==========
-#define AT91C_TC3_IMR ((AT91_REG *) 0xFFFA402C) // (TC3) Interrupt Mask Register
-#define AT91C_TC3_CV ((AT91_REG *) 0xFFFA4010) // (TC3) Counter Value
-#define AT91C_TC3_CCR ((AT91_REG *) 0xFFFA4000) // (TC3) Channel Control Register
-#define AT91C_TC3_IER ((AT91_REG *) 0xFFFA4024) // (TC3) Interrupt Enable Register
-#define AT91C_TC3_CMR ((AT91_REG *) 0xFFFA4004) // (TC3) Channel Mode Register
-#define AT91C_TC3_RA ((AT91_REG *) 0xFFFA4014) // (TC3) Register A
-#define AT91C_TC3_RC ((AT91_REG *) 0xFFFA401C) // (TC3) Register C
-#define AT91C_TC3_IDR ((AT91_REG *) 0xFFFA4028) // (TC3) Interrupt Disable Register
-#define AT91C_TC3_RB ((AT91_REG *) 0xFFFA4018) // (TC3) Register B
-#define AT91C_TC3_SR ((AT91_REG *) 0xFFFA4020) // (TC3) Status Register
-// ========== Register definition for TCB1 peripheral ==========
-#define AT91C_TCB1_BCR ((AT91_REG *) 0xFFFA4140) // (TCB1) TC Block Control Register
-#define AT91C_TCB1_BMR ((AT91_REG *) 0xFFFA4144) // (TCB1) TC Block Mode Register
-// ========== Register definition for TC2 peripheral ==========
-#define AT91C_TC2_IMR ((AT91_REG *) 0xFFFA00AC) // (TC2) Interrupt Mask Register
-#define AT91C_TC2_IER ((AT91_REG *) 0xFFFA00A4) // (TC2) Interrupt Enable Register
-#define AT91C_TC2_RC ((AT91_REG *) 0xFFFA009C) // (TC2) Register C
-#define AT91C_TC2_RA ((AT91_REG *) 0xFFFA0094) // (TC2) Register A
-#define AT91C_TC2_CMR ((AT91_REG *) 0xFFFA0084) // (TC2) Channel Mode Register
-#define AT91C_TC2_IDR ((AT91_REG *) 0xFFFA00A8) // (TC2) Interrupt Disable Register
-#define AT91C_TC2_SR ((AT91_REG *) 0xFFFA00A0) // (TC2) Status Register
-#define AT91C_TC2_RB ((AT91_REG *) 0xFFFA0098) // (TC2) Register B
-#define AT91C_TC2_CV ((AT91_REG *) 0xFFFA0090) // (TC2) Counter Value
-#define AT91C_TC2_CCR ((AT91_REG *) 0xFFFA0080) // (TC2) Channel Control Register
-// ========== Register definition for TC1 peripheral ==========
-#define AT91C_TC1_IMR ((AT91_REG *) 0xFFFA006C) // (TC1) Interrupt Mask Register
-#define AT91C_TC1_IER ((AT91_REG *) 0xFFFA0064) // (TC1) Interrupt Enable Register
-#define AT91C_TC1_RC ((AT91_REG *) 0xFFFA005C) // (TC1) Register C
-#define AT91C_TC1_RA ((AT91_REG *) 0xFFFA0054) // (TC1) Register A
-#define AT91C_TC1_CMR ((AT91_REG *) 0xFFFA0044) // (TC1) Channel Mode Register
-#define AT91C_TC1_IDR ((AT91_REG *) 0xFFFA0068) // (TC1) Interrupt Disable Register
-#define AT91C_TC1_SR ((AT91_REG *) 0xFFFA0060) // (TC1) Status Register
-#define AT91C_TC1_RB ((AT91_REG *) 0xFFFA0058) // (TC1) Register B
-#define AT91C_TC1_CV ((AT91_REG *) 0xFFFA0050) // (TC1) Counter Value
-#define AT91C_TC1_CCR ((AT91_REG *) 0xFFFA0040) // (TC1) Channel Control Register
-// ========== Register definition for TC0 peripheral ==========
-#define AT91C_TC0_IMR ((AT91_REG *) 0xFFFA002C) // (TC0) Interrupt Mask Register
-#define AT91C_TC0_IER ((AT91_REG *) 0xFFFA0024) // (TC0) Interrupt Enable Register
-#define AT91C_TC0_RC ((AT91_REG *) 0xFFFA001C) // (TC0) Register C
-#define AT91C_TC0_RA ((AT91_REG *) 0xFFFA0014) // (TC0) Register A
-#define AT91C_TC0_CMR ((AT91_REG *) 0xFFFA0004) // (TC0) Channel Mode Register
-#define AT91C_TC0_IDR ((AT91_REG *) 0xFFFA0028) // (TC0) Interrupt Disable Register
-#define AT91C_TC0_SR ((AT91_REG *) 0xFFFA0020) // (TC0) Status Register
-#define AT91C_TC0_RB ((AT91_REG *) 0xFFFA0018) // (TC0) Register B
-#define AT91C_TC0_CV ((AT91_REG *) 0xFFFA0010) // (TC0) Counter Value
-#define AT91C_TC0_CCR ((AT91_REG *) 0xFFFA0000) // (TC0) Channel Control Register
-// ========== Register definition for TCB0 peripheral ==========
-#define AT91C_TCB0_BMR ((AT91_REG *) 0xFFFA00C4) // (TCB0) TC Block Mode Register
-#define AT91C_TCB0_BCR ((AT91_REG *) 0xFFFA00C0) // (TCB0) TC Block Control Register
-// ========== Register definition for UHP peripheral ==========
-#define AT91C_UHP_HcRhDescriptorA ((AT91_REG *) 0x00300048) // (UHP) Root Hub characteristics A
-#define AT91C_UHP_HcRhPortStatus ((AT91_REG *) 0x00300054) // (UHP) Root Hub Port Status Register
-#define AT91C_UHP_HcRhDescriptorB ((AT91_REG *) 0x0030004C) // (UHP) Root Hub characteristics B
-#define AT91C_UHP_HcControl ((AT91_REG *) 0x00300004) // (UHP) Operating modes for the Host Controller
-#define AT91C_UHP_HcInterruptStatus ((AT91_REG *) 0x0030000C) // (UHP) Interrupt Status Register
-#define AT91C_UHP_HcRhStatus ((AT91_REG *) 0x00300050) // (UHP) Root Hub Status register
-#define AT91C_UHP_HcRevision ((AT91_REG *) 0x00300000) // (UHP) Revision
-#define AT91C_UHP_HcCommandStatus ((AT91_REG *) 0x00300008) // (UHP) Command & status Register
-#define AT91C_UHP_HcInterruptEnable ((AT91_REG *) 0x00300010) // (UHP) Interrupt Enable Register
-#define AT91C_UHP_HcHCCA ((AT91_REG *) 0x00300018) // (UHP) Pointer to the Host Controller Communication Area
-#define AT91C_UHP_HcControlHeadED ((AT91_REG *) 0x00300020) // (UHP) First Endpoint Descriptor of the Control list
-#define AT91C_UHP_HcInterruptDisable ((AT91_REG *) 0x00300014) // (UHP) Interrupt Disable Register
-#define AT91C_UHP_HcPeriodCurrentED ((AT91_REG *) 0x0030001C) // (UHP) Current Isochronous or Interrupt Endpoint Descriptor
-#define AT91C_UHP_HcControlCurrentED ((AT91_REG *) 0x00300024) // (UHP) Endpoint Control and Status Register
-#define AT91C_UHP_HcBulkCurrentED ((AT91_REG *) 0x0030002C) // (UHP) Current endpoint of the Bulk list
-#define AT91C_UHP_HcFmInterval ((AT91_REG *) 0x00300034) // (UHP) Bit time between 2 consecutive SOFs
-#define AT91C_UHP_HcBulkHeadED ((AT91_REG *) 0x00300028) // (UHP) First endpoint register of the Bulk list
-#define AT91C_UHP_HcBulkDoneHead ((AT91_REG *) 0x00300030) // (UHP) Last completed transfer descriptor
-#define AT91C_UHP_HcFmRemaining ((AT91_REG *) 0x00300038) // (UHP) Bit time remaining in the current Frame
-#define AT91C_UHP_HcPeriodicStart ((AT91_REG *) 0x00300040) // (UHP) Periodic Start
-#define AT91C_UHP_HcLSThreshold ((AT91_REG *) 0x00300044) // (UHP) LS Threshold
-#define AT91C_UHP_HcFmNumber ((AT91_REG *) 0x0030003C) // (UHP) Frame number
-// ========== Register definition for EMAC peripheral ==========
-#define AT91C_EMAC_RSR ((AT91_REG *) 0xFFFBC020) // (EMAC) Receive Status Register
-#define AT91C_EMAC_MAN ((AT91_REG *) 0xFFFBC034) // (EMAC) PHY Maintenance Register
-#define AT91C_EMAC_HSH ((AT91_REG *) 0xFFFBC090) // (EMAC) Hash Address High[63:32]
-#define AT91C_EMAC_MCOL ((AT91_REG *) 0xFFFBC048) // (EMAC) Multiple Collision Frame Register
-#define AT91C_EMAC_IER ((AT91_REG *) 0xFFFBC028) // (EMAC) Interrupt Enable Register
-#define AT91C_EMAC_SA2H ((AT91_REG *) 0xFFFBC0A4) // (EMAC) Specific Address 2 High, Last 2 bytes
-#define AT91C_EMAC_HSL ((AT91_REG *) 0xFFFBC094) // (EMAC) Hash Address Low[31:0]
-#define AT91C_EMAC_LCOL ((AT91_REG *) 0xFFFBC05C) // (EMAC) Late Collision Register
-#define AT91C_EMAC_OK ((AT91_REG *) 0xFFFBC04C) // (EMAC) Frames Received OK Register
-#define AT91C_EMAC_CFG ((AT91_REG *) 0xFFFBC004) // (EMAC) Network Configuration Register
-#define AT91C_EMAC_SA3L ((AT91_REG *) 0xFFFBC0A8) // (EMAC) Specific Address 3 Low, First 4 bytes
-#define AT91C_EMAC_SEQE ((AT91_REG *) 0xFFFBC050) // (EMAC) Frame Check Sequence Error Register
-#define AT91C_EMAC_ECOL ((AT91_REG *) 0xFFFBC060) // (EMAC) Excessive Collision Register
-#define AT91C_EMAC_ELR ((AT91_REG *) 0xFFFBC070) // (EMAC) Excessive Length Error Register
-#define AT91C_EMAC_SR ((AT91_REG *) 0xFFFBC008) // (EMAC) Network Status Register
-#define AT91C_EMAC_RBQP ((AT91_REG *) 0xFFFBC018) // (EMAC) Receive Buffer Queue Pointer
-#define AT91C_EMAC_CSE ((AT91_REG *) 0xFFFBC064) // (EMAC) Carrier Sense Error Register
-#define AT91C_EMAC_RJB ((AT91_REG *) 0xFFFBC074) // (EMAC) Receive Jabber Register
-#define AT91C_EMAC_USF ((AT91_REG *) 0xFFFBC078) // (EMAC) Undersize Frame Register
-#define AT91C_EMAC_IDR ((AT91_REG *) 0xFFFBC02C) // (EMAC) Interrupt Disable Register
-#define AT91C_EMAC_SA1L ((AT91_REG *) 0xFFFBC098) // (EMAC) Specific Address 1 Low, First 4 bytes
-#define AT91C_EMAC_IMR ((AT91_REG *) 0xFFFBC030) // (EMAC) Interrupt Mask Register
-#define AT91C_EMAC_FRA ((AT91_REG *) 0xFFFBC040) // (EMAC) Frames Transmitted OK Register
-#define AT91C_EMAC_SA3H ((AT91_REG *) 0xFFFBC0AC) // (EMAC) Specific Address 3 High, Last 2 bytes
-#define AT91C_EMAC_SA1H ((AT91_REG *) 0xFFFBC09C) // (EMAC) Specific Address 1 High, Last 2 bytes
-#define AT91C_EMAC_SCOL ((AT91_REG *) 0xFFFBC044) // (EMAC) Single Collision Frame Register
-#define AT91C_EMAC_ALE ((AT91_REG *) 0xFFFBC054) // (EMAC) Alignment Error Register
-#define AT91C_EMAC_TAR ((AT91_REG *) 0xFFFBC00C) // (EMAC) Transmit Address Register
-#define AT91C_EMAC_SA4L ((AT91_REG *) 0xFFFBC0B0) // (EMAC) Specific Address 4 Low, First 4 bytes
-#define AT91C_EMAC_SA2L ((AT91_REG *) 0xFFFBC0A0) // (EMAC) Specific Address 2 Low, First 4 bytes
-#define AT91C_EMAC_TUE ((AT91_REG *) 0xFFFBC068) // (EMAC) Transmit Underrun Error Register
-#define AT91C_EMAC_DTE ((AT91_REG *) 0xFFFBC058) // (EMAC) Deferred Transmission Frame Register
-#define AT91C_EMAC_TCR ((AT91_REG *) 0xFFFBC010) // (EMAC) Transmit Control Register
-#define AT91C_EMAC_CTL ((AT91_REG *) 0xFFFBC000) // (EMAC) Network Control Register
-#define AT91C_EMAC_SA4H ((AT91_REG *) 0xFFFBC0B4) // (EMAC) Specific Address 4 High, Last 2 bytesr
-#define AT91C_EMAC_CDE ((AT91_REG *) 0xFFFBC06C) // (EMAC) Code Error Register
-#define AT91C_EMAC_SQEE ((AT91_REG *) 0xFFFBC07C) // (EMAC) SQE Test Error Register
-#define AT91C_EMAC_TSR ((AT91_REG *) 0xFFFBC014) // (EMAC) Transmit Status Register
-#define AT91C_EMAC_DRFC ((AT91_REG *) 0xFFFBC080) // (EMAC) Discarded RX Frame Register
-// ========== Register definition for EBI peripheral ==========
-#define AT91C_EBI_CFGR ((AT91_REG *) 0xFFFFFF64) // (EBI) Configuration Register
-#define AT91C_EBI_CSA ((AT91_REG *) 0xFFFFFF60) // (EBI) Chip Select Assignment Register
-// ========== Register definition for SMC2 peripheral ==========
-#define AT91C_SMC2_CSR ((AT91_REG *) 0xFFFFFF70) // (SMC2) SMC2 Chip Select Register
-// ========== Register definition for SDRC peripheral ==========
-#define AT91C_SDRC_IMR ((AT91_REG *) 0xFFFFFFAC) // (SDRC) SDRAM Controller Interrupt Mask Register
-#define AT91C_SDRC_IER ((AT91_REG *) 0xFFFFFFA4) // (SDRC) SDRAM Controller Interrupt Enable Register
-#define AT91C_SDRC_SRR ((AT91_REG *) 0xFFFFFF9C) // (SDRC) SDRAM Controller Self Refresh Register
-#define AT91C_SDRC_TR ((AT91_REG *) 0xFFFFFF94) // (SDRC) SDRAM Controller Refresh Timer Register
-#define AT91C_SDRC_ISR ((AT91_REG *) 0xFFFFFFB0) // (SDRC) SDRAM Controller Interrupt Mask Register
-#define AT91C_SDRC_IDR ((AT91_REG *) 0xFFFFFFA8) // (SDRC) SDRAM Controller Interrupt Disable Register
-#define AT91C_SDRC_LPR ((AT91_REG *) 0xFFFFFFA0) // (SDRC) SDRAM Controller Low Power Register
-#define AT91C_SDRC_CR ((AT91_REG *) 0xFFFFFF98) // (SDRC) SDRAM Controller Configuration Register
-#define AT91C_SDRC_MR ((AT91_REG *) 0xFFFFFF90) // (SDRC) SDRAM Controller Mode Register
-// ========== Register definition for BFC peripheral ==========
-#define AT91C_BFC_MR ((AT91_REG *) 0xFFFFFFC0) // (BFC) BFC Mode Register
-
-// *****************************************************************************
-// PIO DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_PIO_PA0 ((unsigned int) 1 << 0) // Pin Controlled by PA0
-#define AT91C_PA0_MISO ((unsigned int) AT91C_PIO_PA0) // SPI Master In Slave
-#define AT91C_PA0_PCK3 ((unsigned int) AT91C_PIO_PA0) // PMC Programmable Clock Output 3
-#define AT91C_PIO_PA1 ((unsigned int) 1 << 1) // Pin Controlled by PA1
-#define AT91C_PA1_MOSI ((unsigned int) AT91C_PIO_PA1) // SPI Master Out Slave
-#define AT91C_PA1_PCK0 ((unsigned int) AT91C_PIO_PA1) // PMC Programmable Clock Output 0
-#define AT91C_PIO_PA10 ((unsigned int) 1 << 10) // Pin Controlled by PA10
-#define AT91C_PA10_ETX1 ((unsigned int) AT91C_PIO_PA10) // Ethernet MAC Transmit Data 1
-#define AT91C_PA10_MCDB1 ((unsigned int) AT91C_PIO_PA10) // Multimedia Card B Data 1
-#define AT91C_PIO_PA11 ((unsigned int) 1 << 11) // Pin Controlled by PA11
-#define AT91C_PA11_ECRS_ECRSDV ((unsigned int) AT91C_PIO_PA11) // Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
-#define AT91C_PA11_MCDB2 ((unsigned int) AT91C_PIO_PA11) // Multimedia Card B Data 2
-#define AT91C_PIO_PA12 ((unsigned int) 1 << 12) // Pin Controlled by PA12
-#define AT91C_PA12_ERX0 ((unsigned int) AT91C_PIO_PA12) // Ethernet MAC Receive Data 0
-#define AT91C_PA12_MCDB3 ((unsigned int) AT91C_PIO_PA12) // Multimedia Card B Data 3
-#define AT91C_PIO_PA13 ((unsigned int) 1 << 13) // Pin Controlled by PA13
-#define AT91C_PA13_ERX1 ((unsigned int) AT91C_PIO_PA13) // Ethernet MAC Receive Data 1
-#define AT91C_PA13_TCLK0 ((unsigned int) AT91C_PIO_PA13) // Timer Counter 0 external clock input
-#define AT91C_PIO_PA14 ((unsigned int) 1 << 14) // Pin Controlled by PA14
-#define AT91C_PA14_ERXER ((unsigned int) AT91C_PIO_PA14) // Ethernet MAC Receive Error
-#define AT91C_PA14_TCLK1 ((unsigned int) AT91C_PIO_PA14) // Timer Counter 1 external clock input
-#define AT91C_PIO_PA15 ((unsigned int) 1 << 15) // Pin Controlled by PA15
-#define AT91C_PA15_EMDC ((unsigned int) AT91C_PIO_PA15) // Ethernet MAC Management Data Clock
-#define AT91C_PA15_TCLK2 ((unsigned int) AT91C_PIO_PA15) // Timer Counter 2 external clock input
-#define AT91C_PIO_PA16 ((unsigned int) 1 << 16) // Pin Controlled by PA16
-#define AT91C_PA16_EMDIO ((unsigned int) AT91C_PIO_PA16) // Ethernet MAC Management Data Input/Output
-#define AT91C_PA16_IRQ6 ((unsigned int) AT91C_PIO_PA16) // AIC Interrupt input 6
-#define AT91C_PIO_PA17 ((unsigned int) 1 << 17) // Pin Controlled by PA17
-#define AT91C_PA17_TXD0 ((unsigned int) AT91C_PIO_PA17) // USART 0 Transmit Data
-#define AT91C_PA17_TIOA0 ((unsigned int) AT91C_PIO_PA17) // Timer Counter 0 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA18 ((unsigned int) 1 << 18) // Pin Controlled by PA18
-#define AT91C_PA18_RXD0 ((unsigned int) AT91C_PIO_PA18) // USART 0 Receive Data
-#define AT91C_PA18_TIOB0 ((unsigned int) AT91C_PIO_PA18) // Timer Counter 0 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA19 ((unsigned int) 1 << 19) // Pin Controlled by PA19
-#define AT91C_PA19_SCK0 ((unsigned int) AT91C_PIO_PA19) // USART 0 Serial Clock
-#define AT91C_PA19_TIOA1 ((unsigned int) AT91C_PIO_PA19) // Timer Counter 1 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA2 ((unsigned int) 1 << 2) // Pin Controlled by PA2
-#define AT91C_PA2_SPCK ((unsigned int) AT91C_PIO_PA2) // SPI Serial Clock
-#define AT91C_PA2_IRQ4 ((unsigned int) AT91C_PIO_PA2) // AIC Interrupt Input 4
-#define AT91C_PIO_PA20 ((unsigned int) 1 << 20) // Pin Controlled by PA20
-#define AT91C_PA20_CTS0 ((unsigned int) AT91C_PIO_PA20) // USART 0 Clear To Send
-#define AT91C_PA20_TIOB1 ((unsigned int) AT91C_PIO_PA20) // Timer Counter 1 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA21 ((unsigned int) 1 << 21) // Pin Controlled by PA21
-#define AT91C_PA21_RTS0 ((unsigned int) AT91C_PIO_PA21) // Usart 0 Ready To Send
-#define AT91C_PA21_TIOA2 ((unsigned int) AT91C_PIO_PA21) // Timer Counter 2 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA22 ((unsigned int) 1 << 22) // Pin Controlled by PA22
-#define AT91C_PA22_RXD2 ((unsigned int) AT91C_PIO_PA22) // USART 2 Receive Data
-#define AT91C_PA22_TIOB2 ((unsigned int) AT91C_PIO_PA22) // Timer Counter 2 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA23 ((unsigned int) 1 << 23) // Pin Controlled by PA23
-#define AT91C_PA23_TXD2 ((unsigned int) AT91C_PIO_PA23) // USART 2 Transmit Data
-#define AT91C_PA23_IRQ3 ((unsigned int) AT91C_PIO_PA23) // Interrupt input 3
-#define AT91C_PIO_PA24 ((unsigned int) 1 << 24) // Pin Controlled by PA24
-#define AT91C_PA24_SCK2 ((unsigned int) AT91C_PIO_PA24) // USART2 Serial Clock
-#define AT91C_PA24_PCK1 ((unsigned int) AT91C_PIO_PA24) // PMC Programmable Clock Output 1
-#define AT91C_PIO_PA25 ((unsigned int) 1 << 25) // Pin Controlled by PA25
-#define AT91C_PA25_TWD ((unsigned int) AT91C_PIO_PA25) // TWI Two-wire Serial Data
-#define AT91C_PA25_IRQ2 ((unsigned int) AT91C_PIO_PA25) // Interrupt input 2
-#define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26
-#define AT91C_PA26_TWCK ((unsigned int) AT91C_PIO_PA26) // TWI Two-wire Serial Clock
-#define AT91C_PA26_IRQ1 ((unsigned int) AT91C_PIO_PA26) // Interrupt input 1
-#define AT91C_PIO_PA27 ((unsigned int) 1 << 27) // Pin Controlled by PA27
-#define AT91C_PA27_MCCK ((unsigned int) AT91C_PIO_PA27) // Multimedia Card Clock
-#define AT91C_PA27_TCLK3 ((unsigned int) AT91C_PIO_PA27) // Timer Counter 3 External Clock Input
-#define AT91C_PIO_PA28 ((unsigned int) 1 << 28) // Pin Controlled by PA28
-#define AT91C_PA28_MCCDA ((unsigned int) AT91C_PIO_PA28) // Multimedia Card A Command
-#define AT91C_PA28_TCLK4 ((unsigned int) AT91C_PIO_PA28) // Timer Counter 4 external Clock Input
-#define AT91C_PIO_PA29 ((unsigned int) 1 << 29) // Pin Controlled by PA29
-#define AT91C_PA29_MCDA0 ((unsigned int) AT91C_PIO_PA29) // Multimedia Card A Data 0
-#define AT91C_PA29_TCLK5 ((unsigned int) AT91C_PIO_PA29) // Timer Counter 5 external clock input
-#define AT91C_PIO_PA3 ((unsigned int) 1 << 3) // Pin Controlled by PA3
-#define AT91C_PA3_NPCS0 ((unsigned int) AT91C_PIO_PA3) // SPI Peripheral Chip Select 0
-#define AT91C_PA3_IRQ5 ((unsigned int) AT91C_PIO_PA3) // AIC Interrupt Input 5
-#define AT91C_PIO_PA30 ((unsigned int) 1 << 30) // Pin Controlled by PA30
-#define AT91C_PA30_DRXD ((unsigned int) AT91C_PIO_PA30) // DBGU Debug Receive Data
-#define AT91C_PA30_CTS2 ((unsigned int) AT91C_PIO_PA30) // Usart 2 Clear To Send
-#define AT91C_PIO_PA31 ((unsigned int) 1 << 31) // Pin Controlled by PA31
-#define AT91C_PA31_DTXD ((unsigned int) AT91C_PIO_PA31) // DBGU Debug Transmit Data
-#define AT91C_PA31_RTS2 ((unsigned int) AT91C_PIO_PA31) // USART 2 Ready To Send
-#define AT91C_PIO_PA4 ((unsigned int) 1 << 4) // Pin Controlled by PA4
-#define AT91C_PA4_NPCS1 ((unsigned int) AT91C_PIO_PA4) // SPI Peripheral Chip Select 1
-#define AT91C_PA4_PCK1 ((unsigned int) AT91C_PIO_PA4) // PMC Programmable Clock Output 1
-#define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5
-#define AT91C_PA5_NPCS2 ((unsigned int) AT91C_PIO_PA5) // SPI Peripheral Chip Select 2
-#define AT91C_PA5_TXD3 ((unsigned int) AT91C_PIO_PA5) // USART 3 Transmit Data
-#define AT91C_PIO_PA6 ((unsigned int) 1 << 6) // Pin Controlled by PA6
-#define AT91C_PA6_NPCS3 ((unsigned int) AT91C_PIO_PA6) // SPI Peripheral Chip Select 3
-#define AT91C_PA6_RXD3 ((unsigned int) AT91C_PIO_PA6) // USART 3 Receive Data
-#define AT91C_PIO_PA7 ((unsigned int) 1 << 7) // Pin Controlled by PA7
-#define AT91C_PA7_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PA7) // Ethernet MAC Transmit Clock/Reference Clock
-#define AT91C_PA7_PCK2 ((unsigned int) AT91C_PIO_PA7) // PMC Programmable Clock 2
-#define AT91C_PIO_PA8 ((unsigned int) 1 << 8) // Pin Controlled by PA8
-#define AT91C_PA8_ETXEN ((unsigned int) AT91C_PIO_PA8) // Ethernet MAC Transmit Enable
-#define AT91C_PA8_MCCDB ((unsigned int) AT91C_PIO_PA8) // Multimedia Card B Command
-#define AT91C_PIO_PA9 ((unsigned int) 1 << 9) // Pin Controlled by PA9
-#define AT91C_PA9_ETX0 ((unsigned int) AT91C_PIO_PA9) // Ethernet MAC Transmit Data 0
-#define AT91C_PA9_MCDB0 ((unsigned int) AT91C_PIO_PA9) // Multimedia Card B Data 0
-#define AT91C_PIO_PB0 ((unsigned int) 1 << 0) // Pin Controlled by PB0
-#define AT91C_PB0_TF0 ((unsigned int) AT91C_PIO_PB0) // SSC Transmit Frame Sync 0
-#define AT91C_PB0_TIOB3 ((unsigned int) AT91C_PIO_PB0) // Timer Counter 3 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB1 ((unsigned int) 1 << 1) // Pin Controlled by PB1
-#define AT91C_PB1_TK0 ((unsigned int) AT91C_PIO_PB1) // SSC Transmit Clock 0
-#define AT91C_PB1_CTS3 ((unsigned int) AT91C_PIO_PB1) // USART 3 Clear To Send
-#define AT91C_PIO_PB10 ((unsigned int) 1 << 10) // Pin Controlled by PB10
-#define AT91C_PB10_RK1 ((unsigned int) AT91C_PIO_PB10) // SSC Receive Clock 1
-#define AT91C_PB10_TIOA5 ((unsigned int) AT91C_PIO_PB10) // Timer Counter 5 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB11 ((unsigned int) 1 << 11) // Pin Controlled by PB11
-#define AT91C_PB11_RF1 ((unsigned int) AT91C_PIO_PB11) // SSC Receive Frame Sync 1
-#define AT91C_PB11_TIOB5 ((unsigned int) AT91C_PIO_PB11) // Timer Counter 5 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB12 ((unsigned int) 1 << 12) // Pin Controlled by PB12
-#define AT91C_PB12_TF2 ((unsigned int) AT91C_PIO_PB12) // SSC Transmit Frame Sync 2
-#define AT91C_PB12_ETX2 ((unsigned int) AT91C_PIO_PB12) // Ethernet MAC Transmit Data 2
-#define AT91C_PIO_PB13 ((unsigned int) 1 << 13) // Pin Controlled by PB13
-#define AT91C_PB13_TK2 ((unsigned int) AT91C_PIO_PB13) // SSC Transmit Clock 2
-#define AT91C_PB13_ETX3 ((unsigned int) AT91C_PIO_PB13) // Ethernet MAC Transmit Data 3
-#define AT91C_PIO_PB14 ((unsigned int) 1 << 14) // Pin Controlled by PB14
-#define AT91C_PB14_TD2 ((unsigned int) AT91C_PIO_PB14) // SSC Transmit Data 2
-#define AT91C_PB14_ETXER ((unsigned int) AT91C_PIO_PB14) // Ethernet MAC Transmikt Coding Error
-#define AT91C_PIO_PB15 ((unsigned int) 1 << 15) // Pin Controlled by PB15
-#define AT91C_PB15_RD2 ((unsigned int) AT91C_PIO_PB15) // SSC Receive Data 2
-#define AT91C_PB15_ERX2 ((unsigned int) AT91C_PIO_PB15) // Ethernet MAC Receive Data 2
-#define AT91C_PIO_PB16 ((unsigned int) 1 << 16) // Pin Controlled by PB16
-#define AT91C_PB16_RK2 ((unsigned int) AT91C_PIO_PB16) // SSC Receive Clock 2
-#define AT91C_PB16_ERX3 ((unsigned int) AT91C_PIO_PB16) // Ethernet MAC Receive Data 3
-#define AT91C_PIO_PB17 ((unsigned int) 1 << 17) // Pin Controlled by PB17
-#define AT91C_PB17_RF2 ((unsigned int) AT91C_PIO_PB17) // SSC Receive Frame Sync 2
-#define AT91C_PB17_ERXDV ((unsigned int) AT91C_PIO_PB17) // Ethernet MAC Receive Data Valid
-#define AT91C_PIO_PB18 ((unsigned int) 1 << 18) // Pin Controlled by PB18
-#define AT91C_PB18_RI1 ((unsigned int) AT91C_PIO_PB18) // USART 1 Ring Indicator
-#define AT91C_PB18_ECOL ((unsigned int) AT91C_PIO_PB18) // Ethernet MAC Collision Detected
-#define AT91C_PIO_PB19 ((unsigned int) 1 << 19) // Pin Controlled by PB19
-#define AT91C_PB19_DTR1 ((unsigned int) AT91C_PIO_PB19) // USART 1 Data Terminal ready
-#define AT91C_PB19_ERXCK ((unsigned int) AT91C_PIO_PB19) // Ethernet MAC Receive Clock
-#define AT91C_PIO_PB2 ((unsigned int) 1 << 2) // Pin Controlled by PB2
-#define AT91C_PB2_TD0 ((unsigned int) AT91C_PIO_PB2) // SSC Transmit data
-#define AT91C_PB2_SCK3 ((unsigned int) AT91C_PIO_PB2) // USART 3 Serial Clock
-#define AT91C_PIO_PB20 ((unsigned int) 1 << 20) // Pin Controlled by PB20
-#define AT91C_PB20_TXD1 ((unsigned int) AT91C_PIO_PB20) // USART 1 Transmit Data
-#define AT91C_PIO_PB21 ((unsigned int) 1 << 21) // Pin Controlled by PB21
-#define AT91C_PB21_RXD1 ((unsigned int) AT91C_PIO_PB21) // USART 1 Receive Data
-#define AT91C_PIO_PB22 ((unsigned int) 1 << 22) // Pin Controlled by PB22
-#define AT91C_PB22_SCK1 ((unsigned int) AT91C_PIO_PB22) // USART1 Serial Clock
-#define AT91C_PIO_PB23 ((unsigned int) 1 << 23) // Pin Controlled by PB23
-#define AT91C_PB23_DCD1 ((unsigned int) AT91C_PIO_PB23) // USART 1 Data Carrier Detect
-#define AT91C_PIO_PB24 ((unsigned int) 1 << 24) // Pin Controlled by PB24
-#define AT91C_PB24_CTS1 ((unsigned int) AT91C_PIO_PB24) // USART 1 Clear To Send
-#define AT91C_PIO_PB25 ((unsigned int) 1 << 25) // Pin Controlled by PB25
-#define AT91C_PB25_DSR1 ((unsigned int) AT91C_PIO_PB25) // USART 1 Data Set ready
-#define AT91C_PB25_EF100 ((unsigned int) AT91C_PIO_PB25) // Ethernet MAC Force 100 Mbits/sec
-#define AT91C_PIO_PB26 ((unsigned int) 1 << 26) // Pin Controlled by PB26
-#define AT91C_PB26_RTS1 ((unsigned int) AT91C_PIO_PB26) // Usart 0 Ready To Send
-#define AT91C_PIO_PB27 ((unsigned int) 1 << 27) // Pin Controlled by PB27
-#define AT91C_PB27_PCK0 ((unsigned int) AT91C_PIO_PB27) // PMC Programmable Clock Output 0
-#define AT91C_PIO_PB28 ((unsigned int) 1 << 28) // Pin Controlled by PB28
-#define AT91C_PB28_FIQ ((unsigned int) AT91C_PIO_PB28) // AIC Fast Interrupt Input
-#define AT91C_PIO_PB29 ((unsigned int) 1 << 29) // Pin Controlled by PB29
-#define AT91C_PB29_IRQ0 ((unsigned int) AT91C_PIO_PB29) // Interrupt input 0
-#define AT91C_PIO_PB3 ((unsigned int) 1 << 3) // Pin Controlled by PB3
-#define AT91C_PB3_RD0 ((unsigned int) AT91C_PIO_PB3) // SSC Receive Data
-#define AT91C_PB3_MCDA1 ((unsigned int) AT91C_PIO_PB3) // Multimedia Card A Data 1
-#define AT91C_PIO_PB4 ((unsigned int) 1 << 4) // Pin Controlled by PB4
-#define AT91C_PB4_RK0 ((unsigned int) AT91C_PIO_PB4) // SSC Receive Clock
-#define AT91C_PB4_MCDA2 ((unsigned int) AT91C_PIO_PB4) // Multimedia Card A Data 2
-#define AT91C_PIO_PB5 ((unsigned int) 1 << 5) // Pin Controlled by PB5
-#define AT91C_PB5_RF0 ((unsigned int) AT91C_PIO_PB5) // SSC Receive Frame Sync 0
-#define AT91C_PB5_MCDA3 ((unsigned int) AT91C_PIO_PB5) // Multimedia Card A Data 3
-#define AT91C_PIO_PB6 ((unsigned int) 1 << 6) // Pin Controlled by PB6
-#define AT91C_PB6_TF1 ((unsigned int) AT91C_PIO_PB6) // SSC Transmit Frame Sync 1
-#define AT91C_PB6_TIOA3 ((unsigned int) AT91C_PIO_PB6) // Timer Counter 4 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB7 ((unsigned int) 1 << 7) // Pin Controlled by PB7
-#define AT91C_PB7_TK1 ((unsigned int) AT91C_PIO_PB7) // SSC Transmit Clock 1
-#define AT91C_PB7_TIOB3 ((unsigned int) AT91C_PIO_PB7) // Timer Counter 3 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB8 ((unsigned int) 1 << 8) // Pin Controlled by PB8
-#define AT91C_PB8_TD1 ((unsigned int) AT91C_PIO_PB8) // SSC Transmit Data 1
-#define AT91C_PB8_TIOA4 ((unsigned int) AT91C_PIO_PB8) // Timer Counter 4 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB9 ((unsigned int) 1 << 9) // Pin Controlled by PB9
-#define AT91C_PB9_RD1 ((unsigned int) AT91C_PIO_PB9) // SSC Receive Data 1
-#define AT91C_PB9_TIOB4 ((unsigned int) AT91C_PIO_PB9) // Timer Counter 4 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PC0 ((unsigned int) 1 << 0) // Pin Controlled by PC0
-#define AT91C_PC0_BFCK ((unsigned int) AT91C_PIO_PC0) // Burst Flash Clock
-#define AT91C_PIO_PC1 ((unsigned int) 1 << 1) // Pin Controlled by PC1
-#define AT91C_PC1_BFRDY_SMOE ((unsigned int) AT91C_PIO_PC1) // Burst Flash Ready
-#define AT91C_PIO_PC10 ((unsigned int) 1 << 10) // Pin Controlled by PC10
-#define AT91C_PC10_NCS4_CFCS ((unsigned int) AT91C_PIO_PC10) // Compact Flash Chip Select
-#define AT91C_PIO_PC11 ((unsigned int) 1 << 11) // Pin Controlled by PC11
-#define AT91C_PC11_NCS5_CFCE1 ((unsigned int) AT91C_PIO_PC11) // Chip Select 5 / Compact Flash Chip Enable 1
-#define AT91C_PIO_PC12 ((unsigned int) 1 << 12) // Pin Controlled by PC12
-#define AT91C_PC12_NCS6_CFCE2 ((unsigned int) AT91C_PIO_PC12) // Chip Select 6 / Compact Flash Chip Enable 2
-#define AT91C_PIO_PC13 ((unsigned int) 1 << 13) // Pin Controlled by PC13
-#define AT91C_PC13_NCS7 ((unsigned int) AT91C_PIO_PC13) // Chip Select 7
-#define AT91C_PIO_PC14 ((unsigned int) 1 << 14) // Pin Controlled by PC14
-#define AT91C_PIO_PC15 ((unsigned int) 1 << 15) // Pin Controlled by PC15
-#define AT91C_PIO_PC16 ((unsigned int) 1 << 16) // Pin Controlled by PC16
-#define AT91C_PC16_D16 ((unsigned int) AT91C_PIO_PC16) // Data Bus [16]
-#define AT91C_PIO_PC17 ((unsigned int) 1 << 17) // Pin Controlled by PC17
-#define AT91C_PC17_D17 ((unsigned int) AT91C_PIO_PC17) // Data Bus [17]
-#define AT91C_PIO_PC18 ((unsigned int) 1 << 18) // Pin Controlled by PC18
-#define AT91C_PC18_D18 ((unsigned int) AT91C_PIO_PC18) // Data Bus [18]
-#define AT91C_PIO_PC19 ((unsigned int) 1 << 19) // Pin Controlled by PC19
-#define AT91C_PC19_D19 ((unsigned int) AT91C_PIO_PC19) // Data Bus [19]
-#define AT91C_PIO_PC2 ((unsigned int) 1 << 2) // Pin Controlled by PC2
-#define AT91C_PC2_BFAVD ((unsigned int) AT91C_PIO_PC2) // Burst Flash Address Valid
-#define AT91C_PIO_PC20 ((unsigned int) 1 << 20) // Pin Controlled by PC20
-#define AT91C_PC20_D20 ((unsigned int) AT91C_PIO_PC20) // Data Bus [20]
-#define AT91C_PIO_PC21 ((unsigned int) 1 << 21) // Pin Controlled by PC21
-#define AT91C_PC21_D21 ((unsigned int) AT91C_PIO_PC21) // Data Bus [21]
-#define AT91C_PIO_PC22 ((unsigned int) 1 << 22) // Pin Controlled by PC22
-#define AT91C_PC22_D22 ((unsigned int) AT91C_PIO_PC22) // Data Bus [22]
-#define AT91C_PIO_PC23 ((unsigned int) 1 << 23) // Pin Controlled by PC23
-#define AT91C_PC23_D23 ((unsigned int) AT91C_PIO_PC23) // Data Bus [23]
-#define AT91C_PIO_PC24 ((unsigned int) 1 << 24) // Pin Controlled by PC24
-#define AT91C_PC24_D24 ((unsigned int) AT91C_PIO_PC24) // Data Bus [24]
-#define AT91C_PIO_PC25 ((unsigned int) 1 << 25) // Pin Controlled by PC25
-#define AT91C_PC25_D25 ((unsigned int) AT91C_PIO_PC25) // Data Bus [25]
-#define AT91C_PIO_PC26 ((unsigned int) 1 << 26) // Pin Controlled by PC26
-#define AT91C_PC26_D26 ((unsigned int) AT91C_PIO_PC26) // Data Bus [26]
-#define AT91C_PIO_PC27 ((unsigned int) 1 << 27) // Pin Controlled by PC27
-#define AT91C_PC27_D27 ((unsigned int) AT91C_PIO_PC27) // Data Bus [27]
-#define AT91C_PIO_PC28 ((unsigned int) 1 << 28) // Pin Controlled by PC28
-#define AT91C_PC28_D28 ((unsigned int) AT91C_PIO_PC28) // Data Bus [28]
-#define AT91C_PIO_PC29 ((unsigned int) 1 << 29) // Pin Controlled by PC29
-#define AT91C_PC29_D29 ((unsigned int) AT91C_PIO_PC29) // Data Bus [29]
-#define AT91C_PIO_PC3 ((unsigned int) 1 << 3) // Pin Controlled by PC3
-#define AT91C_PC3_BFBAA_SMWE ((unsigned int) AT91C_PIO_PC3) // Burst Flash Address Advance / SmartMedia Write Enable
-#define AT91C_PIO_PC30 ((unsigned int) 1 << 30) // Pin Controlled by PC30
-#define AT91C_PC30_D30 ((unsigned int) AT91C_PIO_PC30) // Data Bus [30]
-#define AT91C_PIO_PC31 ((unsigned int) 1 << 31) // Pin Controlled by PC31
-#define AT91C_PC31_D31 ((unsigned int) AT91C_PIO_PC31) // Data Bus [31]
-#define AT91C_PIO_PC4 ((unsigned int) 1 << 4) // Pin Controlled by PC4
-#define AT91C_PC4_BFOE ((unsigned int) AT91C_PIO_PC4) // Burst Flash Output Enable
-#define AT91C_PIO_PC5 ((unsigned int) 1 << 5) // Pin Controlled by PC5
-#define AT91C_PC5_BFWE ((unsigned int) AT91C_PIO_PC5) // Burst Flash Write Enable
-#define AT91C_PIO_PC6 ((unsigned int) 1 << 6) // Pin Controlled by PC6
-#define AT91C_PC6_NWAIT ((unsigned int) AT91C_PIO_PC6) // NWAIT
-#define AT91C_PIO_PC7 ((unsigned int) 1 << 7) // Pin Controlled by PC7
-#define AT91C_PC7_A23 ((unsigned int) AT91C_PIO_PC7) // Address Bus[23]
-#define AT91C_PIO_PC8 ((unsigned int) 1 << 8) // Pin Controlled by PC8
-#define AT91C_PC8_A24 ((unsigned int) AT91C_PIO_PC8) // Address Bus[24]
-#define AT91C_PIO_PC9 ((unsigned int) 1 << 9) // Pin Controlled by PC9
-#define AT91C_PC9_A25_CFRNW ((unsigned int) AT91C_PIO_PC9) // Address Bus[25] / Compact Flash Read Not Write
-#define AT91C_PIO_PD0 ((unsigned int) 1 << 0) // Pin Controlled by PD0
-#define AT91C_PD0_ETX0 ((unsigned int) AT91C_PIO_PD0) // Ethernet MAC Transmit Data 0
-#define AT91C_PIO_PD1 ((unsigned int) 1 << 1) // Pin Controlled by PD1
-#define AT91C_PD1_ETX1 ((unsigned int) AT91C_PIO_PD1) // Ethernet MAC Transmit Data 1
-#define AT91C_PIO_PD10 ((unsigned int) 1 << 10) // Pin Controlled by PD10
-#define AT91C_PD10_PCK3 ((unsigned int) AT91C_PIO_PD10) // PMC Programmable Clock Output 3
-#define AT91C_PD10_TPS1 ((unsigned int) AT91C_PIO_PD10) // ETM ARM9 pipeline status 1
-#define AT91C_PIO_PD11 ((unsigned int) 1 << 11) // Pin Controlled by PD11
-#define AT91C_PD11_ ((unsigned int) AT91C_PIO_PD11) //
-#define AT91C_PD11_TPS2 ((unsigned int) AT91C_PIO_PD11) // ETM ARM9 pipeline status 2
-#define AT91C_PIO_PD12 ((unsigned int) 1 << 12) // Pin Controlled by PD12
-#define AT91C_PD12_ ((unsigned int) AT91C_PIO_PD12) //
-#define AT91C_PD12_TPK0 ((unsigned int) AT91C_PIO_PD12) // ETM Trace Packet 0
-#define AT91C_PIO_PD13 ((unsigned int) 1 << 13) // Pin Controlled by PD13
-#define AT91C_PD13_ ((unsigned int) AT91C_PIO_PD13) //
-#define AT91C_PD13_TPK1 ((unsigned int) AT91C_PIO_PD13) // ETM Trace Packet 1
-#define AT91C_PIO_PD14 ((unsigned int) 1 << 14) // Pin Controlled by PD14
-#define AT91C_PD14_ ((unsigned int) AT91C_PIO_PD14) //
-#define AT91C_PD14_TPK2 ((unsigned int) AT91C_PIO_PD14) // ETM Trace Packet 2
-#define AT91C_PIO_PD15 ((unsigned int) 1 << 15) // Pin Controlled by PD15
-#define AT91C_PD15_TD0 ((unsigned int) AT91C_PIO_PD15) // SSC Transmit data
-#define AT91C_PD15_TPK3 ((unsigned int) AT91C_PIO_PD15) // ETM Trace Packet 3
-#define AT91C_PIO_PD16 ((unsigned int) 1 << 16) // Pin Controlled by PD16
-#define AT91C_PD16_TD1 ((unsigned int) AT91C_PIO_PD16) // SSC Transmit Data 1
-#define AT91C_PD16_TPK4 ((unsigned int) AT91C_PIO_PD16) // ETM Trace Packet 4
-#define AT91C_PIO_PD17 ((unsigned int) 1 << 17) // Pin Controlled by PD17
-#define AT91C_PD17_TD2 ((unsigned int) AT91C_PIO_PD17) // SSC Transmit Data 2
-#define AT91C_PD17_TPK5 ((unsigned int) AT91C_PIO_PD17) // ETM Trace Packet 5
-#define AT91C_PIO_PD18 ((unsigned int) 1 << 18) // Pin Controlled by PD18
-#define AT91C_PD18_NPCS1 ((unsigned int) AT91C_PIO_PD18) // SPI Peripheral Chip Select 1
-#define AT91C_PD18_TPK6 ((unsigned int) AT91C_PIO_PD18) // ETM Trace Packet 6
-#define AT91C_PIO_PD19 ((unsigned int) 1 << 19) // Pin Controlled by PD19
-#define AT91C_PD19_NPCS2 ((unsigned int) AT91C_PIO_PD19) // SPI Peripheral Chip Select 2
-#define AT91C_PD19_TPK7 ((unsigned int) AT91C_PIO_PD19) // ETM Trace Packet 7
-#define AT91C_PIO_PD2 ((unsigned int) 1 << 2) // Pin Controlled by PD2
-#define AT91C_PD2_ETX2 ((unsigned int) AT91C_PIO_PD2) // Ethernet MAC Transmit Data 2
-#define AT91C_PIO_PD20 ((unsigned int) 1 << 20) // Pin Controlled by PD20
-#define AT91C_PD20_NPCS3 ((unsigned int) AT91C_PIO_PD20) // SPI Peripheral Chip Select 3
-#define AT91C_PD20_TPK8 ((unsigned int) AT91C_PIO_PD20) // ETM Trace Packet 8
-#define AT91C_PIO_PD21 ((unsigned int) 1 << 21) // Pin Controlled by PD21
-#define AT91C_PD21_RTS0 ((unsigned int) AT91C_PIO_PD21) // Usart 0 Ready To Send
-#define AT91C_PD21_TPK9 ((unsigned int) AT91C_PIO_PD21) // ETM Trace Packet 9
-#define AT91C_PIO_PD22 ((unsigned int) 1 << 22) // Pin Controlled by PD22
-#define AT91C_PD22_RTS1 ((unsigned int) AT91C_PIO_PD22) // Usart 0 Ready To Send
-#define AT91C_PD22_TPK10 ((unsigned int) AT91C_PIO_PD22) // ETM Trace Packet 10
-#define AT91C_PIO_PD23 ((unsigned int) 1 << 23) // Pin Controlled by PD23
-#define AT91C_PD23_RTS2 ((unsigned int) AT91C_PIO_PD23) // USART 2 Ready To Send
-#define AT91C_PD23_TPK11 ((unsigned int) AT91C_PIO_PD23) // ETM Trace Packet 11
-#define AT91C_PIO_PD24 ((unsigned int) 1 << 24) // Pin Controlled by PD24
-#define AT91C_PD24_RTS3 ((unsigned int) AT91C_PIO_PD24) // USART 3 Ready To Send
-#define AT91C_PD24_TPK12 ((unsigned int) AT91C_PIO_PD24) // ETM Trace Packet 12
-#define AT91C_PIO_PD25 ((unsigned int) 1 << 25) // Pin Controlled by PD25
-#define AT91C_PD25_DTR1 ((unsigned int) AT91C_PIO_PD25) // USART 1 Data Terminal ready
-#define AT91C_PD25_TPK13 ((unsigned int) AT91C_PIO_PD25) // ETM Trace Packet 13
-#define AT91C_PIO_PD26 ((unsigned int) 1 << 26) // Pin Controlled by PD26
-#define AT91C_PD26_TPK14 ((unsigned int) AT91C_PIO_PD26) // ETM Trace Packet 14
-#define AT91C_PIO_PD27 ((unsigned int) 1 << 27) // Pin Controlled by PD27
-#define AT91C_PD27_TPK15 ((unsigned int) AT91C_PIO_PD27) // ETM Trace Packet 15
-#define AT91C_PIO_PD3 ((unsigned int) 1 << 3) // Pin Controlled by PD3
-#define AT91C_PD3_ETX3 ((unsigned int) AT91C_PIO_PD3) // Ethernet MAC Transmit Data 3
-#define AT91C_PIO_PD4 ((unsigned int) 1 << 4) // Pin Controlled by PD4
-#define AT91C_PD4_ETXEN ((unsigned int) AT91C_PIO_PD4) // Ethernet MAC Transmit Enable
-#define AT91C_PIO_PD5 ((unsigned int) 1 << 5) // Pin Controlled by PD5
-#define AT91C_PD5_ETXER ((unsigned int) AT91C_PIO_PD5) // Ethernet MAC Transmikt Coding Error
-#define AT91C_PIO_PD6 ((unsigned int) 1 << 6) // Pin Controlled by PD6
-#define AT91C_PD6_DTXD ((unsigned int) AT91C_PIO_PD6) // DBGU Debug Transmit Data
-#define AT91C_PIO_PD7 ((unsigned int) 1 << 7) // Pin Controlled by PD7
-#define AT91C_PD7_PCK0 ((unsigned int) AT91C_PIO_PD7) // PMC Programmable Clock Output 0
-#define AT91C_PD7_TSYNC ((unsigned int) AT91C_PIO_PD7) // ETM Synchronization signal
-#define AT91C_PIO_PD8 ((unsigned int) 1 << 8) // Pin Controlled by PD8
-#define AT91C_PD8_PCK1 ((unsigned int) AT91C_PIO_PD8) // PMC Programmable Clock Output 1
-#define AT91C_PD8_TCLK ((unsigned int) AT91C_PIO_PD8) // ETM Trace Clock signal
-#define AT91C_PIO_PD9 ((unsigned int) 1 << 9) // Pin Controlled by PD9
-#define AT91C_PD9_PCK2 ((unsigned int) AT91C_PIO_PD9) // PMC Programmable Clock 2
-#define AT91C_PD9_TPS0 ((unsigned int) AT91C_PIO_PD9) // ETM ARM9 pipeline status 0
-
-// *****************************************************************************
-// PERIPHERAL ID DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_ID_FIQ ((unsigned int) 0) // Advanced Interrupt Controller (FIQ)
-#define AT91C_ID_SYS ((unsigned int) 1) // System Peripheral
-#define AT91C_ID_PIOA ((unsigned int) 2) // Parallel IO Controller A
-#define AT91C_ID_PIOB ((unsigned int) 3) // Parallel IO Controller B
-#define AT91C_ID_PIOC ((unsigned int) 4) // Parallel IO Controller C
-#define AT91C_ID_PIOD ((unsigned int) 5) // Parallel IO Controller D
-#define AT91C_ID_US0 ((unsigned int) 6) // USART 0
-#define AT91C_ID_US1 ((unsigned int) 7) // USART 1
-#define AT91C_ID_US2 ((unsigned int) 8) // USART 2
-#define AT91C_ID_US3 ((unsigned int) 9) // USART 3
-#define AT91C_ID_MCI ((unsigned int) 10) // Multimedia Card Interface
-#define AT91C_ID_UDP ((unsigned int) 11) // USB Device Port
-#define AT91C_ID_TWI ((unsigned int) 12) // Two-Wire Interface
-#define AT91C_ID_SPI ((unsigned int) 13) // Serial Peripheral Interface
-#define AT91C_ID_SSC0 ((unsigned int) 14) // Serial Synchronous Controller 0
-#define AT91C_ID_SSC1 ((unsigned int) 15) // Serial Synchronous Controller 1
-#define AT91C_ID_SSC2 ((unsigned int) 16) // Serial Synchronous Controller 2
-#define AT91C_ID_TC0 ((unsigned int) 17) // Timer Counter 0
-#define AT91C_ID_TC1 ((unsigned int) 18) // Timer Counter 1
-#define AT91C_ID_TC2 ((unsigned int) 19) // Timer Counter 2
-#define AT91C_ID_TC3 ((unsigned int) 20) // Timer Counter 3
-#define AT91C_ID_TC4 ((unsigned int) 21) // Timer Counter 4
-#define AT91C_ID_TC5 ((unsigned int) 22) // Timer Counter 5
-#define AT91C_ID_UHP ((unsigned int) 23) // USB Host port
-#define AT91C_ID_EMAC ((unsigned int) 24) // Ethernet MAC
-#define AT91C_ID_IRQ0 ((unsigned int) 25) // Advanced Interrupt Controller (IRQ0)
-#define AT91C_ID_IRQ1 ((unsigned int) 26) // Advanced Interrupt Controller (IRQ1)
-#define AT91C_ID_IRQ2 ((unsigned int) 27) // Advanced Interrupt Controller (IRQ2)
-#define AT91C_ID_IRQ3 ((unsigned int) 28) // Advanced Interrupt Controller (IRQ3)
-#define AT91C_ID_IRQ4 ((unsigned int) 29) // Advanced Interrupt Controller (IRQ4)
-#define AT91C_ID_IRQ5 ((unsigned int) 30) // Advanced Interrupt Controller (IRQ5)
-#define AT91C_ID_IRQ6 ((unsigned int) 31) // Advanced Interrupt Controller (IRQ6)
-
-// *****************************************************************************
-// BASE ADDRESS DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_BASE_SYS ((AT91PS_SYS) 0xFFFFF000) // (SYS) Base Address
-#define AT91C_BASE_MC ((AT91PS_MC) 0xFFFFFF00) // (MC) Base Address
-#define AT91C_BASE_RTC ((AT91PS_RTC) 0xFFFFFE00) // (RTC) Base Address
-#define AT91C_BASE_ST ((AT91PS_ST) 0xFFFFFD00) // (ST) Base Address
-#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) // (PMC) Base Address
-#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) // (CKGR) Base Address
-#define AT91C_BASE_PIOD ((AT91PS_PIO) 0xFFFFFA00) // (PIOD) Base Address
-#define AT91C_BASE_PIOC ((AT91PS_PIO) 0xFFFFF800) // (PIOC) Base Address
-#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) // (PIOB) Base Address
-#define AT91C_BASE_PIOA ((AT91PS_PIO) 0xFFFFF400) // (PIOA) Base Address
-#define AT91C_BASE_DBGU ((AT91PS_DBGU) 0xFFFFF200) // (DBGU) Base Address
-#define AT91C_BASE_PDC_DBGU ((AT91PS_PDC) 0xFFFFF300) // (PDC_DBGU) Base Address
-#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) // (AIC) Base Address
-#define AT91C_BASE_PDC_SPI ((AT91PS_PDC) 0xFFFE0100) // (PDC_SPI) Base Address
-#define AT91C_BASE_SPI ((AT91PS_SPI) 0xFFFE0000) // (SPI) Base Address
-#define AT91C_BASE_PDC_SSC2 ((AT91PS_PDC) 0xFFFD8100) // (PDC_SSC2) Base Address
-#define AT91C_BASE_SSC2 ((AT91PS_SSC) 0xFFFD8000) // (SSC2) Base Address
-#define AT91C_BASE_PDC_SSC1 ((AT91PS_PDC) 0xFFFD4100) // (PDC_SSC1) Base Address
-#define AT91C_BASE_SSC1 ((AT91PS_SSC) 0xFFFD4000) // (SSC1) Base Address
-#define AT91C_BASE_PDC_SSC0 ((AT91PS_PDC) 0xFFFD0100) // (PDC_SSC0) Base Address
-#define AT91C_BASE_SSC0 ((AT91PS_SSC) 0xFFFD0000) // (SSC0) Base Address
-#define AT91C_BASE_PDC_US3 ((AT91PS_PDC) 0xFFFCC100) // (PDC_US3) Base Address
-#define AT91C_BASE_US3 ((AT91PS_USART) 0xFFFCC000) // (US3) Base Address
-#define AT91C_BASE_PDC_US2 ((AT91PS_PDC) 0xFFFC8100) // (PDC_US2) Base Address
-#define AT91C_BASE_US2 ((AT91PS_USART) 0xFFFC8000) // (US2) Base Address
-#define AT91C_BASE_PDC_US1 ((AT91PS_PDC) 0xFFFC4100) // (PDC_US1) Base Address
-#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFC4000) // (US1) Base Address
-#define AT91C_BASE_PDC_US0 ((AT91PS_PDC) 0xFFFC0100) // (PDC_US0) Base Address
-#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFC0000) // (US0) Base Address
-#define AT91C_BASE_TWI ((AT91PS_TWI) 0xFFFB8000) // (TWI) Base Address
-#define AT91C_BASE_PDC_MCI ((AT91PS_PDC) 0xFFFB4100) // (PDC_MCI) Base Address
-#define AT91C_BASE_MCI ((AT91PS_MCI) 0xFFFB4000) // (MCI) Base Address
-#define AT91C_BASE_UDP ((AT91PS_UDP) 0xFFFB0000) // (UDP) Base Address
-#define AT91C_BASE_TC5 ((AT91PS_TC) 0xFFFA4080) // (TC5) Base Address
-#define AT91C_BASE_TC4 ((AT91PS_TC) 0xFFFA4040) // (TC4) Base Address
-#define AT91C_BASE_TC3 ((AT91PS_TC) 0xFFFA4000) // (TC3) Base Address
-#define AT91C_BASE_TCB1 ((AT91PS_TCB) 0xFFFA4080) // (TCB1) Base Address
-#define AT91C_BASE_TC2 ((AT91PS_TC) 0xFFFA0080) // (TC2) Base Address
-#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFA0040) // (TC1) Base Address
-#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) // (TC0) Base Address
-#define AT91C_BASE_TCB0 ((AT91PS_TCB) 0xFFFA0000) // (TCB0) Base Address
-#define AT91C_BASE_UHP ((AT91PS_UHP) 0x00300000) // (UHP) Base Address
-#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFBC000) // (EMAC) Base Address
-#define AT91C_BASE_EBI ((AT91PS_EBI) 0xFFFFFF60) // (EBI) Base Address
-#define AT91C_BASE_SMC2 ((AT91PS_SMC2) 0xFFFFFF70) // (SMC2) Base Address
-#define AT91C_BASE_SDRC ((AT91PS_SDRC) 0xFFFFFF90) // (SDRC) Base Address
-#define AT91C_BASE_BFC ((AT91PS_BFC) 0xFFFFFFC0) // (BFC) Base Address
-
-// *****************************************************************************
-// MEMORY MAPPING DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_ISRAM ((char *) 0x00200000) // Internal SRAM base address
-#define AT91C_ISRAM_SIZE ((unsigned int) 0x00004000) // Internal SRAM size in byte (16 Kbyte)
-#define AT91C_IROM ((char *) 0x00100000) // Internal ROM base address
-#define AT91C_IROM_SIZE ((unsigned int) 0x00020000) // Internal ROM size in byte (128 Kbyte)
-
-#endif
+++ /dev/null
-;- ----------------------------------------------------------------------------
-;- ATMEL Microcontroller Software Support - ROUSSET -
-;- ----------------------------------------------------------------------------
-;- The software is delivered "AS IS" without warranty or condition of any
-;- kind, either express, implied or statutory. This includes without
-;- limitation any warranty or condition with respect to merchantability or
-;- fitness for any particular purpose, or against the infringements of
-;- intellectual property rights of others.
-;- ----------------------------------------------------------------------------
-;- File Name : AT91RM9200.h
-;- Object : AT91RM9200 definitions
-;- Generated : AT91 SW Application Group 11/19/2003 (17:20:51)
-;-
-;- CVS Reference : /AT91RM9200.pl/1.16/Fri Feb 07 10:29:51 2003//
-;- CVS Reference : /SYS_AT91RM9200.pl/1.2/Fri Jan 17 12:44:37 2003//
-;- CVS Reference : /MC_1760A.pl/1.1/Fri Aug 23 14:38:22 2002//
-;- CVS Reference : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-;- CVS Reference : /PMC_2636A.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
-;- CVS Reference : /ST_1763B.pl/1.1/Fri Aug 23 14:41:42 2002//
-;- CVS Reference : /RTC_1245D.pl/1.2/Fri Jan 31 12:19:06 2003//
-;- CVS Reference : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-;- CVS Reference : /DBGU_1754A.pl/1.4/Fri Jan 31 12:18:24 2003//
-;- CVS Reference : /UDP_1765B.pl/1.3/Fri Aug 02 14:45:38 2002//
-;- CVS Reference : /MCI_1764A.pl/1.2/Thu Nov 14 17:48:24 2002//
-;- CVS Reference : /US_1739C.pl/1.2/Fri Jul 12 07:49:25 2002//
-;- CVS Reference : /SPI_AT91RMxxxx.pl/1.3/Tue Nov 26 10:20:29 2002//
-;- CVS Reference : /SSC_1762A.pl/1.2/Fri Nov 08 13:26:39 2002//
-;- CVS Reference : /TC_1753B.pl/1.2/Fri Jan 31 12:19:55 2003//
-;- CVS Reference : /TWI_1761B.pl/1.4/Fri Feb 07 10:30:07 2003//
-;- CVS Reference : /PDC_1734B.pl/1.2/Thu Nov 21 16:38:23 2002//
-;- CVS Reference : /UHP_xxxxA.pl/1.1/Mon Jul 22 12:21:58 2002//
-;- CVS Reference : /EMAC_1794A.pl/1.4/Fri Jan 17 12:11:54 2003//
-;- CVS Reference : /EBI_1759B.pl/1.10/Fri Jan 17 12:44:29 2003//
-;- CVS Reference : /SMC_1783A.pl/1.3/Thu Oct 31 14:38:17 2002//
-;- CVS Reference : /SDRC_1758B.pl/1.2/Thu Oct 03 13:04:41 2002//
-;- CVS Reference : /BFC_1757B.pl/1.3/Thu Oct 31 14:38:00 2002//
-;- ----------------------------------------------------------------------------
-
-;- Hardware register definition
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR System Peripherals
-;- *****************************************************************************
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Memory Controller Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_MC
-MC_RCR # 4 ;- MC Remap Control Register
-MC_ASR # 4 ;- MC Abort Status Register
-MC_AASR # 4 ;- MC Abort Address Status Register
- # 4 ;- Reserved
-MC_PUIA # 64 ;- MC Protection Unit Area
-MC_PUP # 4 ;- MC Protection Unit Peripherals
-MC_PUER # 4 ;- MC Protection Unit Enable Register
-;- -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register --------
-AT91C_MC_RCB EQU (0x1:SHL:0) ;- (MC) Remap Command Bit
-;- -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register --------
-AT91C_MC_UNDADD EQU (0x1:SHL:0) ;- (MC) Undefined Addess Abort Status
-AT91C_MC_MISADD EQU (0x1:SHL:1) ;- (MC) Misaligned Addess Abort Status
-AT91C_MC_MPU EQU (0x1:SHL:2) ;- (MC) Memory protection Unit Abort Status
-AT91C_MC_ABTSZ EQU (0x3:SHL:8) ;- (MC) Abort Size Status
-AT91C_MC_ABTSZ_BYTE EQU (0x0:SHL:8) ;- (MC) Byte
-AT91C_MC_ABTSZ_HWORD EQU (0x1:SHL:8) ;- (MC) Half-word
-AT91C_MC_ABTSZ_WORD EQU (0x2:SHL:8) ;- (MC) Word
-AT91C_MC_ABTTYP EQU (0x3:SHL:10) ;- (MC) Abort Type Status
-AT91C_MC_ABTTYP_DATAR EQU (0x0:SHL:10) ;- (MC) Data Read
-AT91C_MC_ABTTYP_DATAW EQU (0x1:SHL:10) ;- (MC) Data Write
-AT91C_MC_ABTTYP_FETCH EQU (0x2:SHL:10) ;- (MC) Code Fetch
-AT91C_MC_MST0 EQU (0x1:SHL:16) ;- (MC) Master 0 Abort Source
-AT91C_MC_MST1 EQU (0x1:SHL:17) ;- (MC) Master 1 Abort Source
-AT91C_MC_SVMST0 EQU (0x1:SHL:24) ;- (MC) Saved Master 0 Abort Source
-AT91C_MC_SVMST1 EQU (0x1:SHL:25) ;- (MC) Saved Master 1 Abort Source
-;- -------- MC_PUIA : (MC Offset: 0x10) MC Protection Unit Area --------
-AT91C_MC_PROT EQU (0x3:SHL:0) ;- (MC) Protection
-AT91C_MC_PROT_PNAUNA EQU (0x0) ;- (MC) Privilege: No Access, User: No Access
-AT91C_MC_PROT_PRWUNA EQU (0x1) ;- (MC) Privilege: Read/Write, User: No Access
-AT91C_MC_PROT_PRWURO EQU (0x2) ;- (MC) Privilege: Read/Write, User: Read Only
-AT91C_MC_PROT_PRWURW EQU (0x3) ;- (MC) Privilege: Read/Write, User: Read/Write
-AT91C_MC_SIZE EQU (0xF:SHL:4) ;- (MC) Internal Area Size
-AT91C_MC_SIZE_1KB EQU (0x0:SHL:4) ;- (MC) Area size 1KByte
-AT91C_MC_SIZE_2KB EQU (0x1:SHL:4) ;- (MC) Area size 2KByte
-AT91C_MC_SIZE_4KB EQU (0x2:SHL:4) ;- (MC) Area size 4KByte
-AT91C_MC_SIZE_8KB EQU (0x3:SHL:4) ;- (MC) Area size 8KByte
-AT91C_MC_SIZE_16KB EQU (0x4:SHL:4) ;- (MC) Area size 16KByte
-AT91C_MC_SIZE_32KB EQU (0x5:SHL:4) ;- (MC) Area size 32KByte
-AT91C_MC_SIZE_64KB EQU (0x6:SHL:4) ;- (MC) Area size 64KByte
-AT91C_MC_SIZE_128KB EQU (0x7:SHL:4) ;- (MC) Area size 128KByte
-AT91C_MC_SIZE_256KB EQU (0x8:SHL:4) ;- (MC) Area size 256KByte
-AT91C_MC_SIZE_512KB EQU (0x9:SHL:4) ;- (MC) Area size 512KByte
-AT91C_MC_SIZE_1MB EQU (0xA:SHL:4) ;- (MC) Area size 1MByte
-AT91C_MC_SIZE_2MB EQU (0xB:SHL:4) ;- (MC) Area size 2MByte
-AT91C_MC_SIZE_4MB EQU (0xC:SHL:4) ;- (MC) Area size 4MByte
-AT91C_MC_SIZE_8MB EQU (0xD:SHL:4) ;- (MC) Area size 8MByte
-AT91C_MC_SIZE_16MB EQU (0xE:SHL:4) ;- (MC) Area size 16MByte
-AT91C_MC_SIZE_64MB EQU (0xF:SHL:4) ;- (MC) Area size 64MByte
-AT91C_MC_BA EQU (0x3FFFF:SHL:10) ;- (MC) Internal Area Base Address
-;- -------- MC_PUP : (MC Offset: 0x50) MC Protection Unit Peripheral --------
-;- -------- MC_PUER : (MC Offset: 0x54) MC Protection Unit Area --------
-AT91C_MC_PUEB EQU (0x1:SHL:0) ;- (MC) Protection Unit enable Bit
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Real-time Clock Alarm and Parallel Load Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_RTC
-RTC_CR # 4 ;- Control Register
-RTC_MR # 4 ;- Mode Register
-RTC_TIMR # 4 ;- Time Register
-RTC_CALR # 4 ;- Calendar Register
-RTC_TIMALR # 4 ;- Time Alarm Register
-RTC_CALALR # 4 ;- Calendar Alarm Register
-RTC_SR # 4 ;- Status Register
-RTC_SCCR # 4 ;- Status Clear Command Register
-RTC_IER # 4 ;- Interrupt Enable Register
-RTC_IDR # 4 ;- Interrupt Disable Register
-RTC_IMR # 4 ;- Interrupt Mask Register
-RTC_VER # 4 ;- Valid Entry Register
-;- -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register --------
-AT91C_RTC_UPDTIM EQU (0x1:SHL:0) ;- (RTC) Update Request Time Register
-AT91C_RTC_UPDCAL EQU (0x1:SHL:1) ;- (RTC) Update Request Calendar Register
-AT91C_RTC_TIMEVSEL EQU (0x3:SHL:8) ;- (RTC) Time Event Selection
-AT91C_RTC_TIMEVSEL_MINUTE EQU (0x0:SHL:8) ;- (RTC) Minute change.
-AT91C_RTC_TIMEVSEL_HOUR EQU (0x1:SHL:8) ;- (RTC) Hour change.
-AT91C_RTC_TIMEVSEL_DAY24 EQU (0x2:SHL:8) ;- (RTC) Every day at midnight.
-AT91C_RTC_TIMEVSEL_DAY12 EQU (0x3:SHL:8) ;- (RTC) Every day at noon.
-AT91C_RTC_CALEVSEL EQU (0x3:SHL:16) ;- (RTC) Calendar Event Selection
-AT91C_RTC_CALEVSEL_WEEK EQU (0x0:SHL:16) ;- (RTC) Week change (every Monday at time 00:00:00).
-AT91C_RTC_CALEVSEL_MONTH EQU (0x1:SHL:16) ;- (RTC) Month change (every 01 of each month at time 00:00:00).
-AT91C_RTC_CALEVSEL_YEAR EQU (0x2:SHL:16) ;- (RTC) Year change (every January 1 at time 00:00:00).
-;- -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register --------
-AT91C_RTC_HRMOD EQU (0x1:SHL:0) ;- (RTC) 12-24 hour Mode
-;- -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register --------
-AT91C_RTC_SEC EQU (0x7F:SHL:0) ;- (RTC) Current Second
-AT91C_RTC_MIN EQU (0x7F:SHL:8) ;- (RTC) Current Minute
-AT91C_RTC_HOUR EQU (0x1F:SHL:16) ;- (RTC) Current Hour
-AT91C_RTC_AMPM EQU (0x1:SHL:22) ;- (RTC) Ante Meridiem, Post Meridiem Indicator
-;- -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register --------
-AT91C_RTC_CENT EQU (0x3F:SHL:0) ;- (RTC) Current Century
-AT91C_RTC_YEAR EQU (0xFF:SHL:8) ;- (RTC) Current Year
-AT91C_RTC_MONTH EQU (0x1F:SHL:16) ;- (RTC) Current Month
-AT91C_RTC_DAY EQU (0x7:SHL:21) ;- (RTC) Current Day
-AT91C_RTC_DATE EQU (0x3F:SHL:24) ;- (RTC) Current Date
-;- -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register --------
-AT91C_RTC_SECEN EQU (0x1:SHL:7) ;- (RTC) Second Alarm Enable
-AT91C_RTC_MINEN EQU (0x1:SHL:15) ;- (RTC) Minute Alarm
-AT91C_RTC_HOUREN EQU (0x1:SHL:23) ;- (RTC) Current Hour
-;- -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register --------
-AT91C_RTC_MONTHEN EQU (0x1:SHL:23) ;- (RTC) Month Alarm Enable
-AT91C_RTC_DATEEN EQU (0x1:SHL:31) ;- (RTC) Date Alarm Enable
-;- -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register --------
-AT91C_RTC_ACKUPD EQU (0x1:SHL:0) ;- (RTC) Acknowledge for Update
-AT91C_RTC_ALARM EQU (0x1:SHL:1) ;- (RTC) Alarm Flag
-AT91C_RTC_SECEV EQU (0x1:SHL:2) ;- (RTC) Second Event
-AT91C_RTC_TIMEV EQU (0x1:SHL:3) ;- (RTC) Time Event
-AT91C_RTC_CALEV EQU (0x1:SHL:4) ;- (RTC) Calendar event
-;- -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register --------
-;- -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register --------
-;- -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register --------
-;- -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register --------
-;- -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register --------
-AT91C_RTC_NVTIM EQU (0x1:SHL:0) ;- (RTC) Non valid Time
-AT91C_RTC_NVCAL EQU (0x1:SHL:1) ;- (RTC) Non valid Calendar
-AT91C_RTC_NVTIMALR EQU (0x1:SHL:2) ;- (RTC) Non valid time Alarm
-AT91C_RTC_NVCALALR EQU (0x1:SHL:3) ;- (RTC) Nonvalid Calendar Alarm
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR System Timer Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_ST
-ST_CR # 4 ;- Control Register
-ST_PIMR # 4 ;- Period Interval Mode Register
-ST_WDMR # 4 ;- Watchdog Mode Register
-ST_RTMR # 4 ;- Real-time Mode Register
-ST_SR # 4 ;- Status Register
-ST_IER # 4 ;- Interrupt Enable Register
-ST_IDR # 4 ;- Interrupt Disable Register
-ST_IMR # 4 ;- Interrupt Mask Register
-ST_RTAR # 4 ;- Real-time Alarm Register
-ST_CRTR # 4 ;- Current Real-time Register
-;- -------- ST_CR : (ST Offset: 0x0) System Timer Control Register --------
-AT91C_ST_WDRST EQU (0x1:SHL:0) ;- (ST) Watchdog Timer Restart
-;- -------- ST_PIMR : (ST Offset: 0x4) System Timer Period Interval Mode Register --------
-AT91C_ST_PIV EQU (0xFFFF:SHL:0) ;- (ST) Watchdog Timer Restart
-;- -------- ST_WDMR : (ST Offset: 0x8) System Timer Watchdog Mode Register --------
-AT91C_ST_WDV EQU (0xFFFF:SHL:0) ;- (ST) Watchdog Timer Restart
-AT91C_ST_RSTEN EQU (0x1:SHL:16) ;- (ST) Reset Enable
-AT91C_ST_EXTEN EQU (0x1:SHL:17) ;- (ST) External Signal Assertion Enable
-;- -------- ST_RTMR : (ST Offset: 0xc) System Timer Real-time Mode Register --------
-AT91C_ST_RTPRES EQU (0xFFFF:SHL:0) ;- (ST) Real-time Timer Prescaler Value
-;- -------- ST_SR : (ST Offset: 0x10) System Timer Status Register --------
-AT91C_ST_PITS EQU (0x1:SHL:0) ;- (ST) Period Interval Timer Interrupt
-AT91C_ST_WDOVF EQU (0x1:SHL:1) ;- (ST) Watchdog Overflow
-AT91C_ST_RTTINC EQU (0x1:SHL:2) ;- (ST) Real-time Timer Increment
-AT91C_ST_ALMS EQU (0x1:SHL:3) ;- (ST) Alarm Status
-;- -------- ST_IER : (ST Offset: 0x14) System Timer Interrupt Enable Register --------
-;- -------- ST_IDR : (ST Offset: 0x18) System Timer Interrupt Disable Register --------
-;- -------- ST_IMR : (ST Offset: 0x1c) System Timer Interrupt Mask Register --------
-;- -------- ST_RTAR : (ST Offset: 0x20) System Timer Real-time Alarm Register --------
-AT91C_ST_ALMV EQU (0xFFFFF:SHL:0) ;- (ST) Alarm Value Value
-;- -------- ST_CRTR : (ST Offset: 0x24) System Timer Current Real-time Register --------
-AT91C_ST_CRTV EQU (0xFFFFF:SHL:0) ;- (ST) Current Real-time Value
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Power Management Controler
-;- *****************************************************************************
- ^ 0 ;- AT91S_PMC
-PMC_SCER # 4 ;- System Clock Enable Register
-PMC_SCDR # 4 ;- System Clock Disable Register
-PMC_SCSR # 4 ;- System Clock Status Register
- # 4 ;- Reserved
-PMC_PCER # 4 ;- Peripheral Clock Enable Register
-PMC_PCDR # 4 ;- Peripheral Clock Disable Register
-PMC_PCSR # 4 ;- Peripheral Clock Status Register
- # 20 ;- Reserved
-PMC_MCKR # 4 ;- Master Clock Register
- # 12 ;- Reserved
-PMC_PCKR # 32 ;- Programmable Clock Register
-PMC_IER # 4 ;- Interrupt Enable Register
-PMC_IDR # 4 ;- Interrupt Disable Register
-PMC_SR # 4 ;- Status Register
-PMC_IMR # 4 ;- Interrupt Mask Register
-;- -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------
-AT91C_PMC_PCK EQU (0x1:SHL:0) ;- (PMC) Processor Clock
-AT91C_PMC_UDP EQU (0x1:SHL:1) ;- (PMC) USB Device Port Clock
-AT91C_PMC_MCKUDP EQU (0x1:SHL:2) ;- (PMC) USB Device Port Master Clock Automatic Disable on Suspend
-AT91C_PMC_UHP EQU (0x1:SHL:4) ;- (PMC) USB Host Port Clock
-AT91C_PMC_PCK0 EQU (0x1:SHL:8) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK1 EQU (0x1:SHL:9) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK2 EQU (0x1:SHL:10) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK3 EQU (0x1:SHL:11) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK4 EQU (0x1:SHL:12) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK5 EQU (0x1:SHL:13) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK6 EQU (0x1:SHL:14) ;- (PMC) Programmable Clock Output
-AT91C_PMC_PCK7 EQU (0x1:SHL:15) ;- (PMC) Programmable Clock Output
-;- -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register --------
-;- -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register --------
-;- -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------
-AT91C_PMC_CSS EQU (0x3:SHL:0) ;- (PMC) Programmable Clock Selection
-AT91C_PMC_CSS_SLOW_CLK EQU (0x0) ;- (PMC) Slow Clock is selected
-AT91C_PMC_CSS_MAIN_CLK EQU (0x1) ;- (PMC) Main Clock is selected
-AT91C_PMC_CSS_PLLA_CLK EQU (0x2) ;- (PMC) Clock from PLL A is selected
-AT91C_PMC_CSS_PLLB_CLK EQU (0x3) ;- (PMC) Clock from PLL B is selected
-AT91C_PMC_PRES EQU (0x7:SHL:2) ;- (PMC) Programmable Clock Prescaler
-AT91C_PMC_PRES_CLK EQU (0x0:SHL:2) ;- (PMC) Selected clock
-AT91C_PMC_PRES_CLK_2 EQU (0x1:SHL:2) ;- (PMC) Selected clock divided by 2
-AT91C_PMC_PRES_CLK_4 EQU (0x2:SHL:2) ;- (PMC) Selected clock divided by 4
-AT91C_PMC_PRES_CLK_8 EQU (0x3:SHL:2) ;- (PMC) Selected clock divided by 8
-AT91C_PMC_PRES_CLK_16 EQU (0x4:SHL:2) ;- (PMC) Selected clock divided by 16
-AT91C_PMC_PRES_CLK_32 EQU (0x5:SHL:2) ;- (PMC) Selected clock divided by 32
-AT91C_PMC_PRES_CLK_64 EQU (0x6:SHL:2) ;- (PMC) Selected clock divided by 64
-AT91C_PMC_MDIV EQU (0x3:SHL:8) ;- (PMC) Master Clock Division
-AT91C_PMC_MDIV_1 EQU (0x0:SHL:8) ;- (PMC) The master clock and the processor clock are the same
-AT91C_PMC_MDIV_2 EQU (0x1:SHL:8) ;- (PMC) The processor clock is twice as fast as the master clock
-AT91C_PMC_MDIV_3 EQU (0x2:SHL:8) ;- (PMC) The processor clock is three times faster than the master clock
-AT91C_PMC_MDIV_4 EQU (0x3:SHL:8) ;- (PMC) The processor clock is four times faster than the master clock
-;- -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------
-;- -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register --------
-AT91C_PMC_MOSCS EQU (0x1:SHL:0) ;- (PMC) MOSC Status/Enable/Disable/Mask
-AT91C_PMC_LOCKA EQU (0x1:SHL:1) ;- (PMC) PLL A Status/Enable/Disable/Mask
-AT91C_PMC_LOCKB EQU (0x1:SHL:2) ;- (PMC) PLL B Status/Enable/Disable/Mask
-AT91C_PMC_MCKRDY EQU (0x1:SHL:3) ;- (PMC) MCK_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK0RDY EQU (0x1:SHL:8) ;- (PMC) PCK0_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK1RDY EQU (0x1:SHL:9) ;- (PMC) PCK1_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK2RDY EQU (0x1:SHL:10) ;- (PMC) PCK2_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK3RDY EQU (0x1:SHL:11) ;- (PMC) PCK3_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK4RDY EQU (0x1:SHL:12) ;- (PMC) PCK4_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK5RDY EQU (0x1:SHL:13) ;- (PMC) PCK5_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK6RDY EQU (0x1:SHL:14) ;- (PMC) PCK6_RDY Status/Enable/Disable/Mask
-AT91C_PMC_PCK7RDY EQU (0x1:SHL:15) ;- (PMC) PCK7_RDY Status/Enable/Disable/Mask
-;- -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------
-;- -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------
-;- -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Clock Generator Controler
-;- *****************************************************************************
- ^ 0 ;- AT91S_CKGR
-CKGR_MOR # 4 ;- Main Oscillator Register
-CKGR_MCFR # 4 ;- Main Clock Frequency Register
-CKGR_PLLAR # 4 ;- PLL A Register
-CKGR_PLLBR # 4 ;- PLL B Register
-;- -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register --------
-AT91C_CKGR_MOSCEN EQU (0x1:SHL:0) ;- (CKGR) Main Oscillator Enable
-AT91C_CKGR_OSCTEST EQU (0x1:SHL:1) ;- (CKGR) Oscillator Test
-AT91C_CKGR_OSCOUNT EQU (0xFF:SHL:8) ;- (CKGR) Main Oscillator Start-up Time
-;- -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register --------
-AT91C_CKGR_MAINF EQU (0xFFFF:SHL:0) ;- (CKGR) Main Clock Frequency
-AT91C_CKGR_MAINRDY EQU (0x1:SHL:16) ;- (CKGR) Main Clock Ready
-;- -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register --------
-AT91C_CKGR_DIVA EQU (0xFF:SHL:0) ;- (CKGR) Divider Selected
-AT91C_CKGR_DIVA_0 EQU (0x0) ;- (CKGR) Divider output is 0
-AT91C_CKGR_DIVA_BYPASS EQU (0x1) ;- (CKGR) Divider is bypassed
-AT91C_CKGR_PLLACOUNT EQU (0x3F:SHL:8) ;- (CKGR) PLL A Counter
-AT91C_CKGR_OUTA EQU (0x3:SHL:14) ;- (CKGR) PLL A Output Frequency Range
-AT91C_CKGR_OUTA_0 EQU (0x0:SHL:14) ;- (CKGR) Please refer to the PLLA datasheet
-AT91C_CKGR_OUTA_1 EQU (0x1:SHL:14) ;- (CKGR) Please refer to the PLLA datasheet
-AT91C_CKGR_OUTA_2 EQU (0x2:SHL:14) ;- (CKGR) Please refer to the PLLA datasheet
-AT91C_CKGR_OUTA_3 EQU (0x3:SHL:14) ;- (CKGR) Please refer to the PLLA datasheet
-AT91C_CKGR_MULA EQU (0x7FF:SHL:16) ;- (CKGR) PLL A Multiplier
-AT91C_CKGR_SRCA EQU (0x1:SHL:29) ;- (CKGR) PLL A Source
-;- -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register --------
-AT91C_CKGR_DIVB EQU (0xFF:SHL:0) ;- (CKGR) Divider Selected
-AT91C_CKGR_DIVB_0 EQU (0x0) ;- (CKGR) Divider output is 0
-AT91C_CKGR_DIVB_BYPASS EQU (0x1) ;- (CKGR) Divider is bypassed
-AT91C_CKGR_PLLBCOUNT EQU (0x3F:SHL:8) ;- (CKGR) PLL B Counter
-AT91C_CKGR_OUTB EQU (0x3:SHL:14) ;- (CKGR) PLL B Output Frequency Range
-AT91C_CKGR_OUTB_0 EQU (0x0:SHL:14) ;- (CKGR) Please refer to the PLLB datasheet
-AT91C_CKGR_OUTB_1 EQU (0x1:SHL:14) ;- (CKGR) Please refer to the PLLB datasheet
-AT91C_CKGR_OUTB_2 EQU (0x2:SHL:14) ;- (CKGR) Please refer to the PLLB datasheet
-AT91C_CKGR_OUTB_3 EQU (0x3:SHL:14) ;- (CKGR) Please refer to the PLLB datasheet
-AT91C_CKGR_MULB EQU (0x7FF:SHL:16) ;- (CKGR) PLL B Multiplier
-AT91C_CKGR_USB_96M EQU (0x1:SHL:28) ;- (CKGR) Divider for USB Ports
-AT91C_CKGR_USB_PLL EQU (0x1:SHL:29) ;- (CKGR) PLL Use
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Parallel Input Output Controler
-;- *****************************************************************************
- ^ 0 ;- AT91S_PIO
-PIO_PER # 4 ;- PIO Enable Register
-PIO_PDR # 4 ;- PIO Disable Register
-PIO_PSR # 4 ;- PIO Status Register
- # 4 ;- Reserved
-PIO_OER # 4 ;- Output Enable Register
-PIO_ODR # 4 ;- Output Disable Registerr
-PIO_OSR # 4 ;- Output Status Register
- # 4 ;- Reserved
-PIO_IFER # 4 ;- Input Filter Enable Register
-PIO_IFDR # 4 ;- Input Filter Disable Register
-PIO_IFSR # 4 ;- Input Filter Status Register
- # 4 ;- Reserved
-PIO_SODR # 4 ;- Set Output Data Register
-PIO_CODR # 4 ;- Clear Output Data Register
-PIO_ODSR # 4 ;- Output Data Status Register
-PIO_PDSR # 4 ;- Pin Data Status Register
-PIO_IER # 4 ;- Interrupt Enable Register
-PIO_IDR # 4 ;- Interrupt Disable Register
-PIO_IMR # 4 ;- Interrupt Mask Register
-PIO_ISR # 4 ;- Interrupt Status Register
-PIO_MDER # 4 ;- Multi-driver Enable Register
-PIO_MDDR # 4 ;- Multi-driver Disable Register
-PIO_MDSR # 4 ;- Multi-driver Status Register
- # 4 ;- Reserved
-PIO_PPUDR # 4 ;- Pull-up Disable Register
-PIO_PPUER # 4 ;- Pull-up Enable Register
-PIO_PPUSR # 4 ;- Pad Pull-up Status Register
- # 4 ;- Reserved
-PIO_ASR # 4 ;- Select A Register
-PIO_BSR # 4 ;- Select B Register
-PIO_ABSR # 4 ;- AB Select Status Register
- # 36 ;- Reserved
-PIO_OWER # 4 ;- Output Write Enable Register
-PIO_OWDR # 4 ;- Output Write Disable Register
-PIO_OWSR # 4 ;- Output Write Status Register
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Debug Unit
-;- *****************************************************************************
- ^ 0 ;- AT91S_DBGU
-DBGU_CR # 4 ;- Control Register
-DBGU_MR # 4 ;- Mode Register
-DBGU_IER # 4 ;- Interrupt Enable Register
-DBGU_IDR # 4 ;- Interrupt Disable Register
-DBGU_IMR # 4 ;- Interrupt Mask Register
-DBGU_CSR # 4 ;- Channel Status Register
-DBGU_RHR # 4 ;- Receiver Holding Register
-DBGU_THR # 4 ;- Transmitter Holding Register
-DBGU_BRGR # 4 ;- Baud Rate Generator Register
- # 28 ;- Reserved
-DBGU_C1R # 4 ;- Chip ID1 Register
-DBGU_C2R # 4 ;- Chip ID2 Register
-DBGU_FNTR # 4 ;- Force NTRST Register
- # 180 ;- Reserved
-DBGU_RPR # 4 ;- Receive Pointer Register
-DBGU_RCR # 4 ;- Receive Counter Register
-DBGU_TPR # 4 ;- Transmit Pointer Register
-DBGU_TCR # 4 ;- Transmit Counter Register
-DBGU_RNPR # 4 ;- Receive Next Pointer Register
-DBGU_RNCR # 4 ;- Receive Next Counter Register
-DBGU_TNPR # 4 ;- Transmit Next Pointer Register
-DBGU_TNCR # 4 ;- Transmit Next Counter Register
-DBGU_PTCR # 4 ;- PDC Transfer Control Register
-DBGU_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register --------
-AT91C_US_RSTRX EQU (0x1:SHL:2) ;- (DBGU) Reset Receiver
-AT91C_US_RSTTX EQU (0x1:SHL:3) ;- (DBGU) Reset Transmitter
-AT91C_US_RXEN EQU (0x1:SHL:4) ;- (DBGU) Receiver Enable
-AT91C_US_RXDIS EQU (0x1:SHL:5) ;- (DBGU) Receiver Disable
-AT91C_US_TXEN EQU (0x1:SHL:6) ;- (DBGU) Transmitter Enable
-AT91C_US_TXDIS EQU (0x1:SHL:7) ;- (DBGU) Transmitter Disable
-;- -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register --------
-AT91C_US_PAR EQU (0x7:SHL:9) ;- (DBGU) Parity type
-AT91C_US_PAR_EVEN EQU (0x0:SHL:9) ;- (DBGU) Even Parity
-AT91C_US_PAR_ODD EQU (0x1:SHL:9) ;- (DBGU) Odd Parity
-AT91C_US_PAR_SPACE EQU (0x2:SHL:9) ;- (DBGU) Parity forced to 0 (Space)
-AT91C_US_PAR_MARK EQU (0x3:SHL:9) ;- (DBGU) Parity forced to 1 (Mark)
-AT91C_US_PAR_NONE EQU (0x4:SHL:9) ;- (DBGU) No Parity
-AT91C_US_PAR_MULTI_DROP EQU (0x6:SHL:9) ;- (DBGU) Multi-drop mode
-AT91C_US_CHMODE EQU (0x3:SHL:14) ;- (DBGU) Channel Mode
-AT91C_US_CHMODE_NORMAL EQU (0x0:SHL:14) ;- (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
-AT91C_US_CHMODE_AUTO EQU (0x1:SHL:14) ;- (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
-AT91C_US_CHMODE_LOCAL EQU (0x2:SHL:14) ;- (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
-AT91C_US_CHMODE_REMOTE EQU (0x3:SHL:14) ;- (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
-;- -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register --------
-AT91C_US_RXRDY EQU (0x1:SHL:0) ;- (DBGU) RXRDY Interrupt
-AT91C_US_TXRDY EQU (0x1:SHL:1) ;- (DBGU) TXRDY Interrupt
-AT91C_US_ENDRX EQU (0x1:SHL:3) ;- (DBGU) End of Receive Transfer Interrupt
-AT91C_US_ENDTX EQU (0x1:SHL:4) ;- (DBGU) End of Transmit Interrupt
-AT91C_US_OVRE EQU (0x1:SHL:5) ;- (DBGU) Overrun Interrupt
-AT91C_US_FRAME EQU (0x1:SHL:6) ;- (DBGU) Framing Error Interrupt
-AT91C_US_PARE EQU (0x1:SHL:7) ;- (DBGU) Parity Error Interrupt
-AT91C_US_TXEMPTY EQU (0x1:SHL:9) ;- (DBGU) TXEMPTY Interrupt
-AT91C_US_TXBUFE EQU (0x1:SHL:11) ;- (DBGU) TXBUFE Interrupt
-AT91C_US_RXBUFF EQU (0x1:SHL:12) ;- (DBGU) RXBUFF Interrupt
-AT91C_US_COMM_TX EQU (0x1:SHL:30) ;- (DBGU) COMM_TX Interrupt
-AT91C_US_COMM_RX EQU (0x1:SHL:31) ;- (DBGU) COMM_RX Interrupt
-;- -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register --------
-;- -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register --------
-;- -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register --------
-;- -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register --------
-AT91C_US_FORCE_NTRST EQU (0x1:SHL:0) ;- (DBGU) Force NTRST in JTAG
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Peripheral Data Controller
-;- *****************************************************************************
- ^ 0 ;- AT91S_PDC
-PDC_RPR # 4 ;- Receive Pointer Register
-PDC_RCR # 4 ;- Receive Counter Register
-PDC_TPR # 4 ;- Transmit Pointer Register
-PDC_TCR # 4 ;- Transmit Counter Register
-PDC_RNPR # 4 ;- Receive Next Pointer Register
-PDC_RNCR # 4 ;- Receive Next Counter Register
-PDC_TNPR # 4 ;- Transmit Next Pointer Register
-PDC_TNCR # 4 ;- Transmit Next Counter Register
-PDC_PTCR # 4 ;- PDC Transfer Control Register
-PDC_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register --------
-AT91C_PDC_RXTEN EQU (0x1:SHL:0) ;- (PDC) Receiver Transfer Enable
-AT91C_PDC_RXTDIS EQU (0x1:SHL:1) ;- (PDC) Receiver Transfer Disable
-AT91C_PDC_TXTEN EQU (0x1:SHL:8) ;- (PDC) Transmitter Transfer Enable
-AT91C_PDC_TXTDIS EQU (0x1:SHL:9) ;- (PDC) Transmitter Transfer Disable
-;- -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
-;- *****************************************************************************
- ^ 0 ;- AT91S_AIC
-AIC_SMR # 128 ;- Source Mode Register
-AIC_SVR # 128 ;- Source Vector Register
-AIC_IVR # 4 ;- IRQ Vector Register
-AIC_FVR # 4 ;- FIQ Vector Register
-AIC_ISR # 4 ;- Interrupt Status Register
-AIC_IPR # 4 ;- Interrupt Pending Register
-AIC_IMR # 4 ;- Interrupt Mask Register
-AIC_CISR # 4 ;- Core Interrupt Status Register
- # 8 ;- Reserved
-AIC_IECR # 4 ;- Interrupt Enable Command Register
-AIC_IDCR # 4 ;- Interrupt Disable Command Register
-AIC_ICCR # 4 ;- Interrupt Clear Command Register
-AIC_ISCR # 4 ;- Interrupt Set Command Register
-AIC_EOICR # 4 ;- End of Interrupt Command Register
-AIC_SPU # 4 ;- Spurious Vector Register
-AIC_DCR # 4 ;- Debug Control Register (Protect)
- # 4 ;- Reserved
-AIC_FFER # 4 ;- Fast Forcing Enable Register
-AIC_FFDR # 4 ;- Fast Forcing Disable Register
-AIC_FFSR # 4 ;- Fast Forcing Status Register
-;- -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
-AT91C_AIC_PRIOR EQU (0x7:SHL:0) ;- (AIC) Priority Level
-AT91C_AIC_PRIOR_LOWEST EQU (0x0) ;- (AIC) Lowest priority level
-AT91C_AIC_PRIOR_HIGHEST EQU (0x7) ;- (AIC) Highest priority level
-AT91C_AIC_SRCTYPE EQU (0x3:SHL:5) ;- (AIC) Interrupt Source Type
-AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE EQU (0x0:SHL:5) ;- (AIC) Internal Sources Code Label Level Sensitive
-AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED EQU (0x1:SHL:5) ;- (AIC) Internal Sources Code Label Edge triggered
-AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL EQU (0x2:SHL:5) ;- (AIC) External Sources Code Label High-level Sensitive
-AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE EQU (0x3:SHL:5) ;- (AIC) External Sources Code Label Positive Edge triggered
-;- -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
-AT91C_AIC_NFIQ EQU (0x1:SHL:0) ;- (AIC) NFIQ Status
-AT91C_AIC_NIRQ EQU (0x1:SHL:1) ;- (AIC) NIRQ Status
-;- -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) --------
-AT91C_AIC_DCR_PROT EQU (0x1:SHL:0) ;- (AIC) Protection Mode
-AT91C_AIC_DCR_GMSK EQU (0x1:SHL:1) ;- (AIC) General Mask
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Serial Parallel Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_SPI
-SPI_CR # 4 ;- Control Register
-SPI_MR # 4 ;- Mode Register
-SPI_RDR # 4 ;- Receive Data Register
-SPI_TDR # 4 ;- Transmit Data Register
-SPI_SR # 4 ;- Status Register
-SPI_IER # 4 ;- Interrupt Enable Register
-SPI_IDR # 4 ;- Interrupt Disable Register
-SPI_IMR # 4 ;- Interrupt Mask Register
- # 16 ;- Reserved
-SPI_CSR # 16 ;- Chip Select Register
- # 192 ;- Reserved
-SPI_RPR # 4 ;- Receive Pointer Register
-SPI_RCR # 4 ;- Receive Counter Register
-SPI_TPR # 4 ;- Transmit Pointer Register
-SPI_TCR # 4 ;- Transmit Counter Register
-SPI_RNPR # 4 ;- Receive Next Pointer Register
-SPI_RNCR # 4 ;- Receive Next Counter Register
-SPI_TNPR # 4 ;- Transmit Next Pointer Register
-SPI_TNCR # 4 ;- Transmit Next Counter Register
-SPI_PTCR # 4 ;- PDC Transfer Control Register
-SPI_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register --------
-AT91C_SPI_SPIEN EQU (0x1:SHL:0) ;- (SPI) SPI Enable
-AT91C_SPI_SPIDIS EQU (0x1:SHL:1) ;- (SPI) SPI Disable
-AT91C_SPI_SWRST EQU (0x1:SHL:7) ;- (SPI) SPI Software reset
-;- -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register --------
-AT91C_SPI_MSTR EQU (0x1:SHL:0) ;- (SPI) Master/Slave Mode
-AT91C_SPI_PS EQU (0x1:SHL:1) ;- (SPI) Peripheral Select
-AT91C_SPI_PS_FIXED EQU (0x0:SHL:1) ;- (SPI) Fixed Peripheral Select
-AT91C_SPI_PS_VARIABLE EQU (0x1:SHL:1) ;- (SPI) Variable Peripheral Select
-AT91C_SPI_PCSDEC EQU (0x1:SHL:2) ;- (SPI) Chip Select Decode
-AT91C_SPI_DIV32 EQU (0x1:SHL:3) ;- (SPI) Clock Selection
-AT91C_SPI_MODFDIS EQU (0x1:SHL:4) ;- (SPI) Mode Fault Detection
-AT91C_SPI_LLB EQU (0x1:SHL:7) ;- (SPI) Clock Selection
-AT91C_SPI_PCS EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select
-AT91C_SPI_DLYBCS EQU (0xFF:SHL:24) ;- (SPI) Delay Between Chip Selects
-;- -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register --------
-AT91C_SPI_RD EQU (0xFFFF:SHL:0) ;- (SPI) Receive Data
-AT91C_SPI_RPCS EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select Status
-;- -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register --------
-AT91C_SPI_TD EQU (0xFFFF:SHL:0) ;- (SPI) Transmit Data
-AT91C_SPI_TPCS EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select Status
-;- -------- SPI_SR : (SPI Offset: 0x10) Status Register --------
-AT91C_SPI_RDRF EQU (0x1:SHL:0) ;- (SPI) Receive Data Register Full
-AT91C_SPI_TDRE EQU (0x1:SHL:1) ;- (SPI) Transmit Data Register Empty
-AT91C_SPI_MODF EQU (0x1:SHL:2) ;- (SPI) Mode Fault Error
-AT91C_SPI_OVRES EQU (0x1:SHL:3) ;- (SPI) Overrun Error Status
-AT91C_SPI_SPENDRX EQU (0x1:SHL:4) ;- (SPI) End of Receiver Transfer
-AT91C_SPI_SPENDTX EQU (0x1:SHL:5) ;- (SPI) End of Receiver Transfer
-AT91C_SPI_RXBUFF EQU (0x1:SHL:6) ;- (SPI) RXBUFF Interrupt
-AT91C_SPI_TXBUFE EQU (0x1:SHL:7) ;- (SPI) TXBUFE Interrupt
-AT91C_SPI_SPIENS EQU (0x1:SHL:16) ;- (SPI) Enable Status
-;- -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register --------
-;- -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register --------
-;- -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register --------
-;- -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register --------
-AT91C_SPI_CPOL EQU (0x1:SHL:0) ;- (SPI) Clock Polarity
-AT91C_SPI_NCPHA EQU (0x1:SHL:1) ;- (SPI) Clock Phase
-AT91C_SPI_BITS EQU (0xF:SHL:4) ;- (SPI) Bits Per Transfer
-AT91C_SPI_BITS_8 EQU (0x0:SHL:4) ;- (SPI) 8 Bits Per transfer
-AT91C_SPI_BITS_9 EQU (0x1:SHL:4) ;- (SPI) 9 Bits Per transfer
-AT91C_SPI_BITS_10 EQU (0x2:SHL:4) ;- (SPI) 10 Bits Per transfer
-AT91C_SPI_BITS_11 EQU (0x3:SHL:4) ;- (SPI) 11 Bits Per transfer
-AT91C_SPI_BITS_12 EQU (0x4:SHL:4) ;- (SPI) 12 Bits Per transfer
-AT91C_SPI_BITS_13 EQU (0x5:SHL:4) ;- (SPI) 13 Bits Per transfer
-AT91C_SPI_BITS_14 EQU (0x6:SHL:4) ;- (SPI) 14 Bits Per transfer
-AT91C_SPI_BITS_15 EQU (0x7:SHL:4) ;- (SPI) 15 Bits Per transfer
-AT91C_SPI_BITS_16 EQU (0x8:SHL:4) ;- (SPI) 16 Bits Per transfer
-AT91C_SPI_SCBR EQU (0xFF:SHL:8) ;- (SPI) Serial Clock Baud Rate
-AT91C_SPI_DLYBS EQU (0xFF:SHL:16) ;- (SPI) Serial Clock Baud Rate
-AT91C_SPI_DLYBCT EQU (0xFF:SHL:24) ;- (SPI) Delay Between Consecutive Transfers
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Synchronous Serial Controller Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_SSC
-SSC_CR # 4 ;- Control Register
-SSC_CMR # 4 ;- Clock Mode Register
- # 8 ;- Reserved
-SSC_RCMR # 4 ;- Receive Clock ModeRegister
-SSC_RFMR # 4 ;- Receive Frame Mode Register
-SSC_TCMR # 4 ;- Transmit Clock Mode Register
-SSC_TFMR # 4 ;- Transmit Frame Mode Register
-SSC_RHR # 4 ;- Receive Holding Register
-SSC_THR # 4 ;- Transmit Holding Register
- # 8 ;- Reserved
-SSC_RSHR # 4 ;- Receive Sync Holding Register
-SSC_TSHR # 4 ;- Transmit Sync Holding Register
-SSC_RC0R # 4 ;- Receive Compare 0 Register
-SSC_RC1R # 4 ;- Receive Compare 1 Register
-SSC_SR # 4 ;- Status Register
-SSC_IER # 4 ;- Interrupt Enable Register
-SSC_IDR # 4 ;- Interrupt Disable Register
-SSC_IMR # 4 ;- Interrupt Mask Register
- # 176 ;- Reserved
-SSC_RPR # 4 ;- Receive Pointer Register
-SSC_RCR # 4 ;- Receive Counter Register
-SSC_TPR # 4 ;- Transmit Pointer Register
-SSC_TCR # 4 ;- Transmit Counter Register
-SSC_RNPR # 4 ;- Receive Next Pointer Register
-SSC_RNCR # 4 ;- Receive Next Counter Register
-SSC_TNPR # 4 ;- Transmit Next Pointer Register
-SSC_TNCR # 4 ;- Transmit Next Counter Register
-SSC_PTCR # 4 ;- PDC Transfer Control Register
-SSC_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register --------
-AT91C_SSC_RXEN EQU (0x1:SHL:0) ;- (SSC) Receive Enable
-AT91C_SSC_RXDIS EQU (0x1:SHL:1) ;- (SSC) Receive Disable
-AT91C_SSC_TXEN EQU (0x1:SHL:8) ;- (SSC) Transmit Enable
-AT91C_SSC_TXDIS EQU (0x1:SHL:9) ;- (SSC) Transmit Disable
-AT91C_SSC_SWRST EQU (0x1:SHL:15) ;- (SSC) Software Reset
-;- -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register --------
-AT91C_SSC_CKS EQU (0x3:SHL:0) ;- (SSC) Receive/Transmit Clock Selection
-AT91C_SSC_CKS_DIV EQU (0x0) ;- (SSC) Divided Clock
-AT91C_SSC_CKS_TK EQU (0x1) ;- (SSC) TK Clock signal
-AT91C_SSC_CKS_RK EQU (0x2) ;- (SSC) RK pin
-AT91C_SSC_CKO EQU (0x7:SHL:2) ;- (SSC) Receive/Transmit Clock Output Mode Selection
-AT91C_SSC_CKO_NONE EQU (0x0:SHL:2) ;- (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
-AT91C_SSC_CKO_CONTINOUS EQU (0x1:SHL:2) ;- (SSC) Continuous Receive/Transmit Clock RK pin: Output
-AT91C_SSC_CKO_DATA_TX EQU (0x2:SHL:2) ;- (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
-AT91C_SSC_CKI EQU (0x1:SHL:5) ;- (SSC) Receive/Transmit Clock Inversion
-AT91C_SSC_CKG EQU (0x3:SHL:6) ;- (SSC) Receive/Transmit Clock Gating Selection
-AT91C_SSC_CKG_NONE EQU (0x0:SHL:6) ;- (SSC) Receive/Transmit Clock Gating: None, continuous clock
-AT91C_SSC_CKG_LOW EQU (0x1:SHL:6) ;- (SSC) Receive/Transmit Clock enabled only if RF Low
-AT91C_SSC_CKG_HIGH EQU (0x2:SHL:6) ;- (SSC) Receive/Transmit Clock enabled only if RF High
-AT91C_SSC_START EQU (0xF:SHL:8) ;- (SSC) Receive/Transmit Start Selection
-AT91C_SSC_START_CONTINOUS EQU (0x0:SHL:8) ;- (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
-AT91C_SSC_START_TX EQU (0x1:SHL:8) ;- (SSC) Transmit/Receive start
-AT91C_SSC_START_LOW_RF EQU (0x2:SHL:8) ;- (SSC) Detection of a low level on RF input
-AT91C_SSC_START_HIGH_RF EQU (0x3:SHL:8) ;- (SSC) Detection of a high level on RF input
-AT91C_SSC_START_FALL_RF EQU (0x4:SHL:8) ;- (SSC) Detection of a falling edge on RF input
-AT91C_SSC_START_RISE_RF EQU (0x5:SHL:8) ;- (SSC) Detection of a rising edge on RF input
-AT91C_SSC_START_LEVEL_RF EQU (0x6:SHL:8) ;- (SSC) Detection of any level change on RF input
-AT91C_SSC_START_EDGE_RF EQU (0x7:SHL:8) ;- (SSC) Detection of any edge on RF input
-AT91C_SSC_START_0 EQU (0x8:SHL:8) ;- (SSC) Compare 0
-AT91C_SSC_STOP EQU (0x1:SHL:12) ;- (SSC) Receive Stop Selection
-AT91C_SSC_STTOUT EQU (0x1:SHL:15) ;- (SSC) Receive/Transmit Start Output Selection
-AT91C_SSC_STTDLY EQU (0xFF:SHL:16) ;- (SSC) Receive/Transmit Start Delay
-AT91C_SSC_PERIOD EQU (0xFF:SHL:24) ;- (SSC) Receive/Transmit Period Divider Selection
-;- -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register --------
-AT91C_SSC_DATLEN EQU (0x1F:SHL:0) ;- (SSC) Data Length
-AT91C_SSC_LOOP EQU (0x1:SHL:5) ;- (SSC) Loop Mode
-AT91C_SSC_MSBF EQU (0x1:SHL:7) ;- (SSC) Most Significant Bit First
-AT91C_SSC_DATNB EQU (0xF:SHL:8) ;- (SSC) Data Number per Frame
-AT91C_SSC_FSLEN EQU (0xF:SHL:16) ;- (SSC) Receive/Transmit Frame Sync length
-AT91C_SSC_FSOS EQU (0x7:SHL:20) ;- (SSC) Receive/Transmit Frame Sync Output Selection
-AT91C_SSC_FSOS_NONE EQU (0x0:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
-AT91C_SSC_FSOS_NEGATIVE EQU (0x1:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
-AT91C_SSC_FSOS_POSITIVE EQU (0x2:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
-AT91C_SSC_FSOS_LOW EQU (0x3:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
-AT91C_SSC_FSOS_HIGH EQU (0x4:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
-AT91C_SSC_FSOS_TOGGLE EQU (0x5:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
-AT91C_SSC_FSEDGE EQU (0x1:SHL:24) ;- (SSC) Frame Sync Edge Detection
-;- -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register --------
-;- -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register --------
-AT91C_SSC_DATDEF EQU (0x1:SHL:5) ;- (SSC) Data Default Value
-AT91C_SSC_FSDEN EQU (0x1:SHL:23) ;- (SSC) Frame Sync Data Enable
-;- -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register --------
-AT91C_SSC_TXRDY EQU (0x1:SHL:0) ;- (SSC) Transmit Ready
-AT91C_SSC_TXEMPTY EQU (0x1:SHL:1) ;- (SSC) Transmit Empty
-AT91C_SSC_ENDTX EQU (0x1:SHL:2) ;- (SSC) End Of Transmission
-AT91C_SSC_TXBUFE EQU (0x1:SHL:3) ;- (SSC) Transmit Buffer Empty
-AT91C_SSC_RXRDY EQU (0x1:SHL:4) ;- (SSC) Receive Ready
-AT91C_SSC_OVRUN EQU (0x1:SHL:5) ;- (SSC) Receive Overrun
-AT91C_SSC_ENDRX EQU (0x1:SHL:6) ;- (SSC) End of Reception
-AT91C_SSC_RXBUFF EQU (0x1:SHL:7) ;- (SSC) Receive Buffer Full
-AT91C_SSC_CP0 EQU (0x1:SHL:8) ;- (SSC) Compare 0
-AT91C_SSC_CP1 EQU (0x1:SHL:9) ;- (SSC) Compare 1
-AT91C_SSC_TXSYN EQU (0x1:SHL:10) ;- (SSC) Transmit Sync
-AT91C_SSC_RXSYN EQU (0x1:SHL:11) ;- (SSC) Receive Sync
-AT91C_SSC_TXENA EQU (0x1:SHL:16) ;- (SSC) Transmit Enable
-AT91C_SSC_RXENA EQU (0x1:SHL:17) ;- (SSC) Receive Enable
-;- -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register --------
-;- -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register --------
-;- -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Usart
-;- *****************************************************************************
- ^ 0 ;- AT91S_USART
-US_CR # 4 ;- Control Register
-US_MR # 4 ;- Mode Register
-US_IER # 4 ;- Interrupt Enable Register
-US_IDR # 4 ;- Interrupt Disable Register
-US_IMR # 4 ;- Interrupt Mask Register
-US_CSR # 4 ;- Channel Status Register
-US_RHR # 4 ;- Receiver Holding Register
-US_THR # 4 ;- Transmitter Holding Register
-US_BRGR # 4 ;- Baud Rate Generator Register
-US_RTOR # 4 ;- Receiver Time-out Register
-US_TTGR # 4 ;- Transmitter Time-guard Register
- # 20 ;- Reserved
-US_FIDI # 4 ;- FI_DI_Ratio Register
-US_NER # 4 ;- Nb Errors Register
-US_XXR # 4 ;- XON_XOFF Register
-US_IF # 4 ;- IRDA_FILTER Register
- # 176 ;- Reserved
-US_RPR # 4 ;- Receive Pointer Register
-US_RCR # 4 ;- Receive Counter Register
-US_TPR # 4 ;- Transmit Pointer Register
-US_TCR # 4 ;- Transmit Counter Register
-US_RNPR # 4 ;- Receive Next Pointer Register
-US_RNCR # 4 ;- Receive Next Counter Register
-US_TNPR # 4 ;- Transmit Next Pointer Register
-US_TNCR # 4 ;- Transmit Next Counter Register
-US_PTCR # 4 ;- PDC Transfer Control Register
-US_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
-AT91C_US_RSTSTA EQU (0x1:SHL:8) ;- (USART) Reset Status Bits
-AT91C_US_STTBRK EQU (0x1:SHL:9) ;- (USART) Start Break
-AT91C_US_STPBRK EQU (0x1:SHL:10) ;- (USART) Stop Break
-AT91C_US_STTTO EQU (0x1:SHL:11) ;- (USART) Start Time-out
-AT91C_US_SENDA EQU (0x1:SHL:12) ;- (USART) Send Address
-AT91C_US_RSTIT EQU (0x1:SHL:13) ;- (USART) Reset Iterations
-AT91C_US_RSTNACK EQU (0x1:SHL:14) ;- (USART) Reset Non Acknowledge
-AT91C_US_RETTO EQU (0x1:SHL:15) ;- (USART) Rearm Time-out
-AT91C_US_DTREN EQU (0x1:SHL:16) ;- (USART) Data Terminal ready Enable
-AT91C_US_DTRDIS EQU (0x1:SHL:17) ;- (USART) Data Terminal ready Disable
-AT91C_US_RTSEN EQU (0x1:SHL:18) ;- (USART) Request to Send enable
-AT91C_US_RTSDIS EQU (0x1:SHL:19) ;- (USART) Request to Send Disable
-;- -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
-AT91C_US_USMODE EQU (0xF:SHL:0) ;- (USART) Usart mode
-AT91C_US_USMODE_NORMAL EQU (0x0) ;- (USART) Normal
-AT91C_US_USMODE_RS485 EQU (0x1) ;- (USART) RS485
-AT91C_US_USMODE_HWHSH EQU (0x2) ;- (USART) Hardware Handshaking
-AT91C_US_USMODE_MODEM EQU (0x3) ;- (USART) Modem
-AT91C_US_USMODE_ISO7816_0 EQU (0x4) ;- (USART) ISO7816 protocol: T = 0
-AT91C_US_USMODE_ISO7816_1 EQU (0x6) ;- (USART) ISO7816 protocol: T = 1
-AT91C_US_USMODE_IRDA EQU (0x8) ;- (USART) IrDA
-AT91C_US_USMODE_SWHSH EQU (0xC) ;- (USART) Software Handshaking
-AT91C_US_CLKS EQU (0x3:SHL:4) ;- (USART) Clock Selection (Baud Rate generator Input Clock
-AT91C_US_CLKS_CLOCK EQU (0x0:SHL:4) ;- (USART) Clock
-AT91C_US_CLKS_FDIV1 EQU (0x1:SHL:4) ;- (USART) fdiv1
-AT91C_US_CLKS_SLOW EQU (0x2:SHL:4) ;- (USART) slow_clock (ARM)
-AT91C_US_CLKS_EXT EQU (0x3:SHL:4) ;- (USART) External (SCK)
-AT91C_US_CHRL EQU (0x3:SHL:6) ;- (USART) Clock Selection (Baud Rate generator Input Clock
-AT91C_US_CHRL_5_BITS EQU (0x0:SHL:6) ;- (USART) Character Length: 5 bits
-AT91C_US_CHRL_6_BITS EQU (0x1:SHL:6) ;- (USART) Character Length: 6 bits
-AT91C_US_CHRL_7_BITS EQU (0x2:SHL:6) ;- (USART) Character Length: 7 bits
-AT91C_US_CHRL_8_BITS EQU (0x3:SHL:6) ;- (USART) Character Length: 8 bits
-AT91C_US_SYNC EQU (0x1:SHL:8) ;- (USART) Synchronous Mode Select
-AT91C_US_NBSTOP EQU (0x3:SHL:12) ;- (USART) Number of Stop bits
-AT91C_US_NBSTOP_1_BIT EQU (0x0:SHL:12) ;- (USART) 1 stop bit
-AT91C_US_NBSTOP_15_BIT EQU (0x1:SHL:12) ;- (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
-AT91C_US_NBSTOP_2_BIT EQU (0x2:SHL:12) ;- (USART) 2 stop bits
-AT91C_US_MSBF EQU (0x1:SHL:16) ;- (USART) Bit Order
-AT91C_US_MODE9 EQU (0x1:SHL:17) ;- (USART) 9-bit Character length
-AT91C_US_CKLO EQU (0x1:SHL:18) ;- (USART) Clock Output Select
-AT91C_US_OVER EQU (0x1:SHL:19) ;- (USART) Over Sampling Mode
-AT91C_US_INACK EQU (0x1:SHL:20) ;- (USART) Inhibit Non Acknowledge
-AT91C_US_DSNACK EQU (0x1:SHL:21) ;- (USART) Disable Successive NACK
-AT91C_US_MAX_ITER EQU (0x1:SHL:24) ;- (USART) Number of Repetitions
-AT91C_US_FILTER EQU (0x1:SHL:28) ;- (USART) Receive Line Filter
-;- -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register --------
-AT91C_US_RXBRK EQU (0x1:SHL:2) ;- (USART) Break Received/End of Break
-AT91C_US_TIMEOUT EQU (0x1:SHL:8) ;- (USART) Receiver Time-out
-AT91C_US_ITERATION EQU (0x1:SHL:10) ;- (USART) Max number of Repetitions Reached
-AT91C_US_NACK EQU (0x1:SHL:13) ;- (USART) Non Acknowledge
-AT91C_US_RIIC EQU (0x1:SHL:16) ;- (USART) Ring INdicator Input Change Flag
-AT91C_US_DSRIC EQU (0x1:SHL:17) ;- (USART) Data Set Ready Input Change Flag
-AT91C_US_DCDIC EQU (0x1:SHL:18) ;- (USART) Data Carrier Flag
-AT91C_US_CTSIC EQU (0x1:SHL:19) ;- (USART) Clear To Send Input Change Flag
-;- -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register --------
-;- -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register --------
-;- -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register --------
-AT91C_US_RI EQU (0x1:SHL:20) ;- (USART) Image of RI Input
-AT91C_US_DSR EQU (0x1:SHL:21) ;- (USART) Image of DSR Input
-AT91C_US_DCD EQU (0x1:SHL:22) ;- (USART) Image of DCD Input
-AT91C_US_CTS EQU (0x1:SHL:23) ;- (USART) Image of CTS Input
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Two-wire Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_TWI
-TWI_CR # 4 ;- Control Register
-TWI_MMR # 4 ;- Master Mode Register
-TWI_SMR # 4 ;- Slave Mode Register
-TWI_IADR # 4 ;- Internal Address Register
-TWI_CWGR # 4 ;- Clock Waveform Generator Register
- # 12 ;- Reserved
-TWI_SR # 4 ;- Status Register
-TWI_IER # 4 ;- Interrupt Enable Register
-TWI_IDR # 4 ;- Interrupt Disable Register
-TWI_IMR # 4 ;- Interrupt Mask Register
-TWI_RHR # 4 ;- Receive Holding Register
-TWI_THR # 4 ;- Transmit Holding Register
-;- -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register --------
-AT91C_TWI_START EQU (0x1:SHL:0) ;- (TWI) Send a START Condition
-AT91C_TWI_STOP EQU (0x1:SHL:1) ;- (TWI) Send a STOP Condition
-AT91C_TWI_MSEN EQU (0x1:SHL:2) ;- (TWI) TWI Master Transfer Enabled
-AT91C_TWI_MSDIS EQU (0x1:SHL:3) ;- (TWI) TWI Master Transfer Disabled
-AT91C_TWI_SVEN EQU (0x1:SHL:4) ;- (TWI) TWI Slave Transfer Enabled
-AT91C_TWI_SVDIS EQU (0x1:SHL:5) ;- (TWI) TWI Slave Transfer Disabled
-AT91C_TWI_SWRST EQU (0x1:SHL:7) ;- (TWI) Software Reset
-;- -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register --------
-AT91C_TWI_IADRSZ EQU (0x3:SHL:8) ;- (TWI) Internal Device Address Size
-AT91C_TWI_IADRSZ_NO EQU (0x0:SHL:8) ;- (TWI) No internal device address
-AT91C_TWI_IADRSZ_1_BYTE EQU (0x1:SHL:8) ;- (TWI) One-byte internal device address
-AT91C_TWI_IADRSZ_2_BYTE EQU (0x2:SHL:8) ;- (TWI) Two-byte internal device address
-AT91C_TWI_IADRSZ_3_BYTE EQU (0x3:SHL:8) ;- (TWI) Three-byte internal device address
-AT91C_TWI_MREAD EQU (0x1:SHL:12) ;- (TWI) Master Read Direction
-AT91C_TWI_DADR EQU (0x7F:SHL:16) ;- (TWI) Device Address
-;- -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register --------
-AT91C_TWI_SADR EQU (0x7F:SHL:16) ;- (TWI) Slave Device Address
-;- -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register --------
-AT91C_TWI_CLDIV EQU (0xFF:SHL:0) ;- (TWI) Clock Low Divider
-AT91C_TWI_CHDIV EQU (0xFF:SHL:8) ;- (TWI) Clock High Divider
-AT91C_TWI_CKDIV EQU (0x7:SHL:16) ;- (TWI) Clock Divider
-;- -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register --------
-AT91C_TWI_TXCOMP EQU (0x1:SHL:0) ;- (TWI) Transmission Completed
-AT91C_TWI_RXRDY EQU (0x1:SHL:1) ;- (TWI) Receive holding register ReaDY
-AT91C_TWI_TXRDY EQU (0x1:SHL:2) ;- (TWI) Transmit holding register ReaDY
-AT91C_TWI_SVREAD EQU (0x1:SHL:3) ;- (TWI) Slave Read
-AT91C_TWI_SVACC EQU (0x1:SHL:4) ;- (TWI) Slave Access
-AT91C_TWI_GCACC EQU (0x1:SHL:5) ;- (TWI) General Call Access
-AT91C_TWI_OVRE EQU (0x1:SHL:6) ;- (TWI) Overrun Error
-AT91C_TWI_UNRE EQU (0x1:SHL:7) ;- (TWI) Underrun Error
-AT91C_TWI_NACK EQU (0x1:SHL:8) ;- (TWI) Not Acknowledged
-AT91C_TWI_ARBLST EQU (0x1:SHL:9) ;- (TWI) Arbitration Lost
-;- -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register --------
-;- -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register --------
-;- -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Multimedia Card Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_MCI
-MCI_CR # 4 ;- MCI Control Register
-MCI_MR # 4 ;- MCI Mode Register
-MCI_DTOR # 4 ;- MCI Data Timeout Register
-MCI_SDCR # 4 ;- MCI SD Card Register
-MCI_ARGR # 4 ;- MCI Argument Register
-MCI_CMDR # 4 ;- MCI Command Register
- # 8 ;- Reserved
-MCI_RSPR # 16 ;- MCI Response Register
-MCI_RDR # 4 ;- MCI Receive Data Register
-MCI_TDR # 4 ;- MCI Transmit Data Register
- # 8 ;- Reserved
-MCI_SR # 4 ;- MCI Status Register
-MCI_IER # 4 ;- MCI Interrupt Enable Register
-MCI_IDR # 4 ;- MCI Interrupt Disable Register
-MCI_IMR # 4 ;- MCI Interrupt Mask Register
- # 176 ;- Reserved
-MCI_RPR # 4 ;- Receive Pointer Register
-MCI_RCR # 4 ;- Receive Counter Register
-MCI_TPR # 4 ;- Transmit Pointer Register
-MCI_TCR # 4 ;- Transmit Counter Register
-MCI_RNPR # 4 ;- Receive Next Pointer Register
-MCI_RNCR # 4 ;- Receive Next Counter Register
-MCI_TNPR # 4 ;- Transmit Next Pointer Register
-MCI_TNCR # 4 ;- Transmit Next Counter Register
-MCI_PTCR # 4 ;- PDC Transfer Control Register
-MCI_PTSR # 4 ;- PDC Transfer Status Register
-;- -------- MCI_CR : (MCI Offset: 0x0) MCI Control Register --------
-AT91C_MCI_MCIEN EQU (0x1:SHL:0) ;- (MCI) Multimedia Interface Enable
-AT91C_MCI_MCIDIS EQU (0x1:SHL:1) ;- (MCI) Multimedia Interface Disable
-AT91C_MCI_PWSEN EQU (0x1:SHL:2) ;- (MCI) Power Save Mode Enable
-AT91C_MCI_PWSDIS EQU (0x1:SHL:3) ;- (MCI) Power Save Mode Disable
-;- -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register --------
-AT91C_MCI_CLKDIV EQU (0x1:SHL:0) ;- (MCI) Clock Divider
-AT91C_MCI_PWSDIV EQU (0x1:SHL:8) ;- (MCI) Power Saving Divider
-AT91C_MCI_PDCPADV EQU (0x1:SHL:14) ;- (MCI) PDC Padding Value
-AT91C_MCI_PDCMODE EQU (0x1:SHL:15) ;- (MCI) PDC Oriented Mode
-AT91C_MCI_BLKLEN EQU (0x1:SHL:18) ;- (MCI) Data Block Length
-;- -------- MCI_DTOR : (MCI Offset: 0x8) MCI Data Timeout Register --------
-AT91C_MCI_DTOCYC EQU (0x1:SHL:0) ;- (MCI) Data Timeout Cycle Number
-AT91C_MCI_DTOMUL EQU (0x7:SHL:4) ;- (MCI) Data Timeout Multiplier
-AT91C_MCI_DTOMUL_1 EQU (0x0:SHL:4) ;- (MCI) DTOCYC x 1
-AT91C_MCI_DTOMUL_16 EQU (0x1:SHL:4) ;- (MCI) DTOCYC x 16
-AT91C_MCI_DTOMUL_128 EQU (0x2:SHL:4) ;- (MCI) DTOCYC x 128
-AT91C_MCI_DTOMUL_256 EQU (0x3:SHL:4) ;- (MCI) DTOCYC x 256
-AT91C_MCI_DTOMUL_1024 EQU (0x4:SHL:4) ;- (MCI) DTOCYC x 1024
-AT91C_MCI_DTOMUL_4096 EQU (0x5:SHL:4) ;- (MCI) DTOCYC x 4096
-AT91C_MCI_DTOMUL_65536 EQU (0x6:SHL:4) ;- (MCI) DTOCYC x 65536
-AT91C_MCI_DTOMUL_1048576 EQU (0x7:SHL:4) ;- (MCI) DTOCYC x 1048576
-;- -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register --------
-AT91C_MCI_SCDSEL EQU (0x1:SHL:0) ;- (MCI) SD Card Selector
-AT91C_MCI_SCDBUS EQU (0x1:SHL:7) ;- (MCI) SD Card Bus Width
-;- -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register --------
-AT91C_MCI_CMDNB EQU (0x1F:SHL:0) ;- (MCI) Command Number
-AT91C_MCI_RSPTYP EQU (0x3:SHL:6) ;- (MCI) Response Type
-AT91C_MCI_RSPTYP_NO EQU (0x0:SHL:6) ;- (MCI) No response
-AT91C_MCI_RSPTYP_48 EQU (0x1:SHL:6) ;- (MCI) 48-bit response
-AT91C_MCI_RSPTYP_136 EQU (0x2:SHL:6) ;- (MCI) 136-bit response
-AT91C_MCI_SPCMD EQU (0x7:SHL:8) ;- (MCI) Special CMD
-AT91C_MCI_SPCMD_NONE EQU (0x0:SHL:8) ;- (MCI) Not a special CMD
-AT91C_MCI_SPCMD_INIT EQU (0x1:SHL:8) ;- (MCI) Initialization CMD
-AT91C_MCI_SPCMD_SYNC EQU (0x2:SHL:8) ;- (MCI) Synchronized CMD
-AT91C_MCI_SPCMD_IT_CMD EQU (0x4:SHL:8) ;- (MCI) Interrupt command
-AT91C_MCI_SPCMD_IT_REP EQU (0x5:SHL:8) ;- (MCI) Interrupt response
-AT91C_MCI_OPDCMD EQU (0x1:SHL:11) ;- (MCI) Open Drain Command
-AT91C_MCI_MAXLAT EQU (0x1:SHL:12) ;- (MCI) Maximum Latency for Command to respond
-AT91C_MCI_TRCMD EQU (0x3:SHL:16) ;- (MCI) Transfer CMD
-AT91C_MCI_TRCMD_NO EQU (0x0:SHL:16) ;- (MCI) No transfer
-AT91C_MCI_TRCMD_START EQU (0x1:SHL:16) ;- (MCI) Start transfer
-AT91C_MCI_TRCMD_STOP EQU (0x2:SHL:16) ;- (MCI) Stop transfer
-AT91C_MCI_TRDIR EQU (0x1:SHL:18) ;- (MCI) Transfer Direction
-AT91C_MCI_TRTYP EQU (0x3:SHL:19) ;- (MCI) Transfer Type
-AT91C_MCI_TRTYP_BLOCK EQU (0x0:SHL:19) ;- (MCI) Block Transfer type
-AT91C_MCI_TRTYP_MULTIPLE EQU (0x1:SHL:19) ;- (MCI) Multiple Block transfer type
-AT91C_MCI_TRTYP_STREAM EQU (0x2:SHL:19) ;- (MCI) Stream transfer type
-;- -------- MCI_SR : (MCI Offset: 0x40) MCI Status Register --------
-AT91C_MCI_CMDRDY EQU (0x1:SHL:0) ;- (MCI) Command Ready flag
-AT91C_MCI_RXRDY EQU (0x1:SHL:1) ;- (MCI) RX Ready flag
-AT91C_MCI_TXRDY EQU (0x1:SHL:2) ;- (MCI) TX Ready flag
-AT91C_MCI_BLKE EQU (0x1:SHL:3) ;- (MCI) Data Block Transfer Ended flag
-AT91C_MCI_DTIP EQU (0x1:SHL:4) ;- (MCI) Data Transfer in Progress flag
-AT91C_MCI_NOTBUSY EQU (0x1:SHL:5) ;- (MCI) Data Line Not Busy flag
-AT91C_MCI_ENDRX EQU (0x1:SHL:6) ;- (MCI) End of RX Buffer flag
-AT91C_MCI_ENDTX EQU (0x1:SHL:7) ;- (MCI) End of TX Buffer flag
-AT91C_MCI_RXBUFF EQU (0x1:SHL:14) ;- (MCI) RX Buffer Full flag
-AT91C_MCI_TXBUFE EQU (0x1:SHL:15) ;- (MCI) TX Buffer Empty flag
-AT91C_MCI_RINDE EQU (0x1:SHL:16) ;- (MCI) Response Index Error flag
-AT91C_MCI_RDIRE EQU (0x1:SHL:17) ;- (MCI) Response Direction Error flag
-AT91C_MCI_RCRCE EQU (0x1:SHL:18) ;- (MCI) Response CRC Error flag
-AT91C_MCI_RENDE EQU (0x1:SHL:19) ;- (MCI) Response End Bit Error flag
-AT91C_MCI_RTOE EQU (0x1:SHL:20) ;- (MCI) Response Time-out Error flag
-AT91C_MCI_DCRCE EQU (0x1:SHL:21) ;- (MCI) data CRC Error flag
-AT91C_MCI_DTOE EQU (0x1:SHL:22) ;- (MCI) Data timeout Error flag
-AT91C_MCI_OVRE EQU (0x1:SHL:30) ;- (MCI) Overrun flag
-AT91C_MCI_UNRE EQU (0x1:SHL:31) ;- (MCI) Underrun flag
-;- -------- MCI_IER : (MCI Offset: 0x44) MCI Interrupt Enable Register --------
-;- -------- MCI_IDR : (MCI Offset: 0x48) MCI Interrupt Disable Register --------
-;- -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR USB Device Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_UDP
-UDP_NUM # 4 ;- Frame Number Register
-UDP_GLBSTATE # 4 ;- Global State Register
-UDP_FADDR # 4 ;- Function Address Register
- # 4 ;- Reserved
-UDP_IER # 4 ;- Interrupt Enable Register
-UDP_IDR # 4 ;- Interrupt Disable Register
-UDP_IMR # 4 ;- Interrupt Mask Register
-UDP_ISR # 4 ;- Interrupt Status Register
-UDP_ICR # 4 ;- Interrupt Clear Register
- # 4 ;- Reserved
-UDP_RSTEP # 4 ;- Reset Endpoint Register
- # 4 ;- Reserved
-UDP_CSR # 32 ;- Endpoint Control and Status Register
-UDP_FDR # 32 ;- Endpoint FIFO Data Register
-;- -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register --------
-AT91C_UDP_FRM_NUM EQU (0x7FF:SHL:0) ;- (UDP) Frame Number as Defined in the Packet Field Formats
-AT91C_UDP_FRM_ERR EQU (0x1:SHL:16) ;- (UDP) Frame Error
-AT91C_UDP_FRM_OK EQU (0x1:SHL:17) ;- (UDP) Frame OK
-;- -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register --------
-AT91C_UDP_FADDEN EQU (0x1:SHL:0) ;- (UDP) Function Address Enable
-AT91C_UDP_CONFG EQU (0x1:SHL:1) ;- (UDP) Configured
-AT91C_UDP_RMWUPE EQU (0x1:SHL:2) ;- (UDP) Remote Wake Up Enable
-AT91C_UDP_RSMINPR EQU (0x1:SHL:3) ;- (UDP) A Resume Has Been Sent to the Host
-;- -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register --------
-AT91C_UDP_FADD EQU (0xFF:SHL:0) ;- (UDP) Function Address Value
-AT91C_UDP_FEN EQU (0x1:SHL:8) ;- (UDP) Function Enable
-;- -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register --------
-AT91C_UDP_EPINT0 EQU (0x1:SHL:0) ;- (UDP) Endpoint 0 Interrupt
-AT91C_UDP_EPINT1 EQU (0x1:SHL:1) ;- (UDP) Endpoint 0 Interrupt
-AT91C_UDP_EPINT2 EQU (0x1:SHL:2) ;- (UDP) Endpoint 2 Interrupt
-AT91C_UDP_EPINT3 EQU (0x1:SHL:3) ;- (UDP) Endpoint 3 Interrupt
-AT91C_UDP_EPINT4 EQU (0x1:SHL:4) ;- (UDP) Endpoint 4 Interrupt
-AT91C_UDP_EPINT5 EQU (0x1:SHL:5) ;- (UDP) Endpoint 5 Interrupt
-AT91C_UDP_EPINT6 EQU (0x1:SHL:6) ;- (UDP) Endpoint 6 Interrupt
-AT91C_UDP_EPINT7 EQU (0x1:SHL:7) ;- (UDP) Endpoint 7 Interrupt
-AT91C_UDP_RXSUSP EQU (0x1:SHL:8) ;- (UDP) USB Suspend Interrupt
-AT91C_UDP_RXRSM EQU (0x1:SHL:9) ;- (UDP) USB Resume Interrupt
-AT91C_UDP_EXTRSM EQU (0x1:SHL:10) ;- (UDP) USB External Resume Interrupt
-AT91C_UDP_SOFINT EQU (0x1:SHL:11) ;- (UDP) USB Start Of frame Interrupt
-AT91C_UDP_WAKEUP EQU (0x1:SHL:13) ;- (UDP) USB Resume Interrupt
-;- -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register --------
-;- -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register --------
-;- -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register --------
-AT91C_UDP_ENDBUSRES EQU (0x1:SHL:12) ;- (UDP) USB End Of Bus Reset Interrupt
-;- -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register --------
-;- -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register --------
-AT91C_UDP_EP0 EQU (0x1:SHL:0) ;- (UDP) Reset Endpoint 0
-AT91C_UDP_EP1 EQU (0x1:SHL:1) ;- (UDP) Reset Endpoint 1
-AT91C_UDP_EP2 EQU (0x1:SHL:2) ;- (UDP) Reset Endpoint 2
-AT91C_UDP_EP3 EQU (0x1:SHL:3) ;- (UDP) Reset Endpoint 3
-AT91C_UDP_EP4 EQU (0x1:SHL:4) ;- (UDP) Reset Endpoint 4
-AT91C_UDP_EP5 EQU (0x1:SHL:5) ;- (UDP) Reset Endpoint 5
-AT91C_UDP_EP6 EQU (0x1:SHL:6) ;- (UDP) Reset Endpoint 6
-AT91C_UDP_EP7 EQU (0x1:SHL:7) ;- (UDP) Reset Endpoint 7
-;- -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register --------
-AT91C_UDP_TXCOMP EQU (0x1:SHL:0) ;- (UDP) Generates an IN packet with data previously written in the DPR
-AT91C_UDP_RX_DATA_BK0 EQU (0x1:SHL:1) ;- (UDP) Receive Data Bank 0
-AT91C_UDP_RXSETUP EQU (0x1:SHL:2) ;- (UDP) Sends STALL to the Host (Control endpoints)
-AT91C_UDP_ISOERROR EQU (0x1:SHL:3) ;- (UDP) Isochronous error (Isochronous endpoints)
-AT91C_UDP_TXPKTRDY EQU (0x1:SHL:4) ;- (UDP) Transmit Packet Ready
-AT91C_UDP_FORCESTALL EQU (0x1:SHL:5) ;- (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
-AT91C_UDP_RX_DATA_BK1 EQU (0x1:SHL:6) ;- (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
-AT91C_UDP_DIR EQU (0x1:SHL:7) ;- (UDP) Transfer Direction
-AT91C_UDP_EPTYPE EQU (0x7:SHL:8) ;- (UDP) Endpoint type
-AT91C_UDP_EPTYPE_CTRL EQU (0x0:SHL:8) ;- (UDP) Control
-AT91C_UDP_EPTYPE_ISO_OUT EQU (0x1:SHL:8) ;- (UDP) Isochronous OUT
-AT91C_UDP_EPTYPE_BULK_OUT EQU (0x2:SHL:8) ;- (UDP) Bulk OUT
-AT91C_UDP_EPTYPE_INT_OUT EQU (0x3:SHL:8) ;- (UDP) Interrupt OUT
-AT91C_UDP_EPTYPE_ISO_IN EQU (0x5:SHL:8) ;- (UDP) Isochronous IN
-AT91C_UDP_EPTYPE_BULK_IN EQU (0x6:SHL:8) ;- (UDP) Bulk IN
-AT91C_UDP_EPTYPE_INT_IN EQU (0x7:SHL:8) ;- (UDP) Interrupt IN
-AT91C_UDP_DTGLE EQU (0x1:SHL:11) ;- (UDP) Data Toggle
-AT91C_UDP_EPEDS EQU (0x1:SHL:15) ;- (UDP) Endpoint Enable Disable
-AT91C_UDP_RXBYTECNT EQU (0x7FF:SHL:16) ;- (UDP) Number Of Bytes Available in the FIFO
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Timer Counter Channel Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_TC
-TC_CCR # 4 ;- Channel Control Register
-TC_CMR # 4 ;- Channel Mode Register
- # 8 ;- Reserved
-TC_CV # 4 ;- Counter Value
-TC_RA # 4 ;- Register A
-TC_RB # 4 ;- Register B
-TC_RC # 4 ;- Register C
-TC_SR # 4 ;- Status Register
-TC_IER # 4 ;- Interrupt Enable Register
-TC_IDR # 4 ;- Interrupt Disable Register
-TC_IMR # 4 ;- Interrupt Mask Register
-;- -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register --------
-AT91C_TC_CLKEN EQU (0x1:SHL:0) ;- (TC) Counter Clock Enable Command
-AT91C_TC_CLKDIS EQU (0x1:SHL:1) ;- (TC) Counter Clock Disable Command
-AT91C_TC_SWTRG EQU (0x1:SHL:2) ;- (TC) Software Trigger Command
-;- -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode --------
-AT91C_TC_CPCSTOP EQU (0x1:SHL:6) ;- (TC) Counter Clock Stopped with RC Compare
-AT91C_TC_CPCDIS EQU (0x1:SHL:7) ;- (TC) Counter Clock Disable with RC Compare
-AT91C_TC_EEVTEDG EQU (0x3:SHL:8) ;- (TC) External Event Edge Selection
-AT91C_TC_EEVTEDG_NONE EQU (0x0:SHL:8) ;- (TC) Edge: None
-AT91C_TC_EEVTEDG_RISING EQU (0x1:SHL:8) ;- (TC) Edge: rising edge
-AT91C_TC_EEVTEDG_FALLING EQU (0x2:SHL:8) ;- (TC) Edge: falling edge
-AT91C_TC_EEVTEDG_BOTH EQU (0x3:SHL:8) ;- (TC) Edge: each edge
-AT91C_TC_EEVT EQU (0x3:SHL:10) ;- (TC) External Event Selection
-AT91C_TC_EEVT_NONE EQU (0x0:SHL:10) ;- (TC) Signal selected as external event: TIOB TIOB direction: input
-AT91C_TC_EEVT_RISING EQU (0x1:SHL:10) ;- (TC) Signal selected as external event: XC0 TIOB direction: output
-AT91C_TC_EEVT_FALLING EQU (0x2:SHL:10) ;- (TC) Signal selected as external event: XC1 TIOB direction: output
-AT91C_TC_EEVT_BOTH EQU (0x3:SHL:10) ;- (TC) Signal selected as external event: XC2 TIOB direction: output
-AT91C_TC_ENETRG EQU (0x1:SHL:12) ;- (TC) External Event Trigger enable
-AT91C_TC_WAVESEL EQU (0x3:SHL:13) ;- (TC) Waveform Selection
-AT91C_TC_WAVESEL_UP EQU (0x0:SHL:13) ;- (TC) UP mode without atomatic trigger on RC Compare
-AT91C_TC_WAVESEL_UPDOWN EQU (0x1:SHL:13) ;- (TC) UPDOWN mode without automatic trigger on RC Compare
-AT91C_TC_WAVESEL_UP_AUTO EQU (0x2:SHL:13) ;- (TC) UP mode with automatic trigger on RC Compare
-AT91C_TC_WAVESEL_UPDOWN_AUTO EQU (0x3:SHL:13) ;- (TC) UPDOWN mode with automatic trigger on RC Compare
-AT91C_TC_CPCTRG EQU (0x1:SHL:14) ;- (TC) RC Compare Trigger Enable
-AT91C_TC_WAVE EQU (0x1:SHL:15) ;- (TC)
-AT91C_TC_ACPA EQU (0x3:SHL:16) ;- (TC) RA Compare Effect on TIOA
-AT91C_TC_ACPA_NONE EQU (0x0:SHL:16) ;- (TC) Effect: none
-AT91C_TC_ACPA_SET EQU (0x1:SHL:16) ;- (TC) Effect: set
-AT91C_TC_ACPA_CLEAR EQU (0x2:SHL:16) ;- (TC) Effect: clear
-AT91C_TC_ACPA_TOGGLE EQU (0x3:SHL:16) ;- (TC) Effect: toggle
-AT91C_TC_ACPC EQU (0x3:SHL:18) ;- (TC) RC Compare Effect on TIOA
-AT91C_TC_ACPC_NONE EQU (0x0:SHL:18) ;- (TC) Effect: none
-AT91C_TC_ACPC_SET EQU (0x1:SHL:18) ;- (TC) Effect: set
-AT91C_TC_ACPC_CLEAR EQU (0x2:SHL:18) ;- (TC) Effect: clear
-AT91C_TC_ACPC_TOGGLE EQU (0x3:SHL:18) ;- (TC) Effect: toggle
-AT91C_TC_AEEVT EQU (0x3:SHL:20) ;- (TC) External Event Effect on TIOA
-AT91C_TC_AEEVT_NONE EQU (0x0:SHL:20) ;- (TC) Effect: none
-AT91C_TC_AEEVT_SET EQU (0x1:SHL:20) ;- (TC) Effect: set
-AT91C_TC_AEEVT_CLEAR EQU (0x2:SHL:20) ;- (TC) Effect: clear
-AT91C_TC_AEEVT_TOGGLE EQU (0x3:SHL:20) ;- (TC) Effect: toggle
-AT91C_TC_ASWTRG EQU (0x3:SHL:22) ;- (TC) Software Trigger Effect on TIOA
-AT91C_TC_ASWTRG_NONE EQU (0x0:SHL:22) ;- (TC) Effect: none
-AT91C_TC_ASWTRG_SET EQU (0x1:SHL:22) ;- (TC) Effect: set
-AT91C_TC_ASWTRG_CLEAR EQU (0x2:SHL:22) ;- (TC) Effect: clear
-AT91C_TC_ASWTRG_TOGGLE EQU (0x3:SHL:22) ;- (TC) Effect: toggle
-AT91C_TC_BCPB EQU (0x3:SHL:24) ;- (TC) RB Compare Effect on TIOB
-AT91C_TC_BCPB_NONE EQU (0x0:SHL:24) ;- (TC) Effect: none
-AT91C_TC_BCPB_SET EQU (0x1:SHL:24) ;- (TC) Effect: set
-AT91C_TC_BCPB_CLEAR EQU (0x2:SHL:24) ;- (TC) Effect: clear
-AT91C_TC_BCPB_TOGGLE EQU (0x3:SHL:24) ;- (TC) Effect: toggle
-AT91C_TC_BCPC EQU (0x3:SHL:26) ;- (TC) RC Compare Effect on TIOB
-AT91C_TC_BCPC_NONE EQU (0x0:SHL:26) ;- (TC) Effect: none
-AT91C_TC_BCPC_SET EQU (0x1:SHL:26) ;- (TC) Effect: set
-AT91C_TC_BCPC_CLEAR EQU (0x2:SHL:26) ;- (TC) Effect: clear
-AT91C_TC_BCPC_TOGGLE EQU (0x3:SHL:26) ;- (TC) Effect: toggle
-AT91C_TC_BEEVT EQU (0x3:SHL:28) ;- (TC) External Event Effect on TIOB
-AT91C_TC_BEEVT_NONE EQU (0x0:SHL:28) ;- (TC) Effect: none
-AT91C_TC_BEEVT_SET EQU (0x1:SHL:28) ;- (TC) Effect: set
-AT91C_TC_BEEVT_CLEAR EQU (0x2:SHL:28) ;- (TC) Effect: clear
-AT91C_TC_BEEVT_TOGGLE EQU (0x3:SHL:28) ;- (TC) Effect: toggle
-AT91C_TC_BSWTRG EQU (0x3:SHL:30) ;- (TC) Software Trigger Effect on TIOB
-AT91C_TC_BSWTRG_NONE EQU (0x0:SHL:30) ;- (TC) Effect: none
-AT91C_TC_BSWTRG_SET EQU (0x1:SHL:30) ;- (TC) Effect: set
-AT91C_TC_BSWTRG_CLEAR EQU (0x2:SHL:30) ;- (TC) Effect: clear
-AT91C_TC_BSWTRG_TOGGLE EQU (0x3:SHL:30) ;- (TC) Effect: toggle
-;- -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register --------
-AT91C_TC_COVFS EQU (0x1:SHL:0) ;- (TC) Counter Overflow
-AT91C_TC_LOVRS EQU (0x1:SHL:1) ;- (TC) Load Overrun
-AT91C_TC_CPAS EQU (0x1:SHL:2) ;- (TC) RA Compare
-AT91C_TC_CPBS EQU (0x1:SHL:3) ;- (TC) RB Compare
-AT91C_TC_CPCS EQU (0x1:SHL:4) ;- (TC) RC Compare
-AT91C_TC_LDRAS EQU (0x1:SHL:5) ;- (TC) RA Loading
-AT91C_TC_LDRBS EQU (0x1:SHL:6) ;- (TC) RB Loading
-AT91C_TC_ETRCS EQU (0x1:SHL:7) ;- (TC) External Trigger
-AT91C_TC_ETRGS EQU (0x1:SHL:16) ;- (TC) Clock Enabling
-AT91C_TC_MTIOA EQU (0x1:SHL:17) ;- (TC) TIOA Mirror
-AT91C_TC_MTIOB EQU (0x1:SHL:18) ;- (TC) TIOA Mirror
-;- -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register --------
-;- -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register --------
-;- -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Timer Counter Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_TCB
-TCB_TC0 # 48 ;- TC Channel 0
- # 16 ;- Reserved
-TCB_TC1 # 48 ;- TC Channel 1
- # 16 ;- Reserved
-TCB_TC2 # 48 ;- TC Channel 2
- # 16 ;- Reserved
-TCB_BCR # 4 ;- TC Block Control Register
-TCB_BMR # 4 ;- TC Block Mode Register
-;- -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
-AT91C_TCB_SYNC EQU (0x1:SHL:0) ;- (TCB) Synchro Command
-;- -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register --------
-AT91C_TCB_TC0XC0S EQU (0x1:SHL:0) ;- (TCB) External Clock Signal 0 Selection
-AT91C_TCB_TC0XC0S_TCLK0 EQU (0x0) ;- (TCB) TCLK0 connected to XC0
-AT91C_TCB_TC0XC0S_NONE EQU (0x1) ;- (TCB) None signal connected to XC0
-AT91C_TCB_TC0XC0S_TIOA1 EQU (0x2) ;- (TCB) TIOA1 connected to XC0
-AT91C_TCB_TC0XC0S_TIOA2 EQU (0x3) ;- (TCB) TIOA2 connected to XC0
-AT91C_TCB_TC1XC1S EQU (0x1:SHL:2) ;- (TCB) External Clock Signal 1 Selection
-AT91C_TCB_TC1XC1S_TCLK1 EQU (0x0:SHL:2) ;- (TCB) TCLK1 connected to XC1
-AT91C_TCB_TC1XC1S_NONE EQU (0x1:SHL:2) ;- (TCB) None signal connected to XC1
-AT91C_TCB_TC1XC1S_TIOA0 EQU (0x2:SHL:2) ;- (TCB) TIOA0 connected to XC1
-AT91C_TCB_TC1XC1S_TIOA2 EQU (0x3:SHL:2) ;- (TCB) TIOA2 connected to XC1
-AT91C_TCB_TC2XC2S EQU (0x1:SHL:4) ;- (TCB) External Clock Signal 2 Selection
-AT91C_TCB_TC2XC2S_TCLK2 EQU (0x0:SHL:4) ;- (TCB) TCLK2 connected to XC2
-AT91C_TCB_TC2XC2S_NONE EQU (0x1:SHL:4) ;- (TCB) None signal connected to XC2
-AT91C_TCB_TC2XC2S_TIOA0 EQU (0x2:SHL:4) ;- (TCB) TIOA0 connected to XC2
-AT91C_TCB_TC2XC2S_TIOA2 EQU (0x3:SHL:4) ;- (TCB) TIOA2 connected to XC2
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR USB Host Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_UHP
-UHP_HcRevision # 4 ;- Revision
-UHP_HcControl # 4 ;- Operating modes for the Host Controller
-UHP_HcCommandStatus # 4 ;- Command & status Register
-UHP_HcInterruptStatus # 4 ;- Interrupt Status Register
-UHP_HcInterruptEnable # 4 ;- Interrupt Enable Register
-UHP_HcInterruptDisable # 4 ;- Interrupt Disable Register
-UHP_HcHCCA # 4 ;- Pointer to the Host Controller Communication Area
-UHP_HcPeriodCurrentED # 4 ;- Current Isochronous or Interrupt Endpoint Descriptor
-UHP_HcControlHeadED # 4 ;- First Endpoint Descriptor of the Control list
-UHP_HcControlCurrentED # 4 ;- Endpoint Control and Status Register
-UHP_HcBulkHeadED # 4 ;- First endpoint register of the Bulk list
-UHP_HcBulkCurrentED # 4 ;- Current endpoint of the Bulk list
-UHP_HcBulkDoneHead # 4 ;- Last completed transfer descriptor
-UHP_HcFmInterval # 4 ;- Bit time between 2 consecutive SOFs
-UHP_HcFmRemaining # 4 ;- Bit time remaining in the current Frame
-UHP_HcFmNumber # 4 ;- Frame number
-UHP_HcPeriodicStart # 4 ;- Periodic Start
-UHP_HcLSThreshold # 4 ;- LS Threshold
-UHP_HcRhDescriptorA # 4 ;- Root Hub characteristics A
-UHP_HcRhDescriptorB # 4 ;- Root Hub characteristics B
-UHP_HcRhStatus # 4 ;- Root Hub Status register
-UHP_HcRhPortStatus # 8 ;- Root Hub Port Status Register
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Ethernet MAC
-;- *****************************************************************************
- ^ 0 ;- AT91S_EMAC
-EMAC_CTL # 4 ;- Network Control Register
-EMAC_CFG # 4 ;- Network Configuration Register
-EMAC_SR # 4 ;- Network Status Register
-EMAC_TAR # 4 ;- Transmit Address Register
-EMAC_TCR # 4 ;- Transmit Control Register
-EMAC_TSR # 4 ;- Transmit Status Register
-EMAC_RBQP # 4 ;- Receive Buffer Queue Pointer
- # 4 ;- Reserved
-EMAC_RSR # 4 ;- Receive Status Register
-EMAC_ISR # 4 ;- Interrupt Status Register
-EMAC_IER # 4 ;- Interrupt Enable Register
-EMAC_IDR # 4 ;- Interrupt Disable Register
-EMAC_IMR # 4 ;- Interrupt Mask Register
-EMAC_MAN # 4 ;- PHY Maintenance Register
- # 8 ;- Reserved
-EMAC_FRA # 4 ;- Frames Transmitted OK Register
-EMAC_SCOL # 4 ;- Single Collision Frame Register
-EMAC_MCOL # 4 ;- Multiple Collision Frame Register
-EMAC_OK # 4 ;- Frames Received OK Register
-EMAC_SEQE # 4 ;- Frame Check Sequence Error Register
-EMAC_ALE # 4 ;- Alignment Error Register
-EMAC_DTE # 4 ;- Deferred Transmission Frame Register
-EMAC_LCOL # 4 ;- Late Collision Register
-EMAC_ECOL # 4 ;- Excessive Collision Register
-EMAC_CSE # 4 ;- Carrier Sense Error Register
-EMAC_TUE # 4 ;- Transmit Underrun Error Register
-EMAC_CDE # 4 ;- Code Error Register
-EMAC_ELR # 4 ;- Excessive Length Error Register
-EMAC_RJB # 4 ;- Receive Jabber Register
-EMAC_USF # 4 ;- Undersize Frame Register
-EMAC_SQEE # 4 ;- SQE Test Error Register
-EMAC_DRFC # 4 ;- Discarded RX Frame Register
- # 12 ;- Reserved
-EMAC_HSH # 4 ;- Hash Address High[63:32]
-EMAC_HSL # 4 ;- Hash Address Low[31:0]
-EMAC_SA1L # 4 ;- Specific Address 1 Low, First 4 bytes
-EMAC_SA1H # 4 ;- Specific Address 1 High, Last 2 bytes
-EMAC_SA2L # 4 ;- Specific Address 2 Low, First 4 bytes
-EMAC_SA2H # 4 ;- Specific Address 2 High, Last 2 bytes
-EMAC_SA3L # 4 ;- Specific Address 3 Low, First 4 bytes
-EMAC_SA3H # 4 ;- Specific Address 3 High, Last 2 bytes
-EMAC_SA4L # 4 ;- Specific Address 4 Low, First 4 bytes
-EMAC_SA4H # 4 ;- Specific Address 4 High, Last 2 bytesr
-;- -------- EMAC_CTL : (EMAC Offset: 0x0) --------
-AT91C_EMAC_LB EQU (0x1:SHL:0) ;- (EMAC) Loopback. Optional. When set, loopback signal is at high level.
-AT91C_EMAC_LBL EQU (0x1:SHL:1) ;- (EMAC) Loopback local.
-AT91C_EMAC_RE EQU (0x1:SHL:2) ;- (EMAC) Receive enable.
-AT91C_EMAC_TE EQU (0x1:SHL:3) ;- (EMAC) Transmit enable.
-AT91C_EMAC_MPE EQU (0x1:SHL:4) ;- (EMAC) Management port enable.
-AT91C_EMAC_CSR EQU (0x1:SHL:5) ;- (EMAC) Clear statistics registers.
-AT91C_EMAC_ISR EQU (0x1:SHL:6) ;- (EMAC) Increment statistics registers.
-AT91C_EMAC_WES EQU (0x1:SHL:7) ;- (EMAC) Write enable for statistics registers.
-AT91C_EMAC_BP EQU (0x1:SHL:8) ;- (EMAC) Back pressure.
-;- -------- EMAC_CFG : (EMAC Offset: 0x4) Network Configuration Register --------
-AT91C_EMAC_SPD EQU (0x1:SHL:0) ;- (EMAC) Speed.
-AT91C_EMAC_FD EQU (0x1:SHL:1) ;- (EMAC) Full duplex.
-AT91C_EMAC_BR EQU (0x1:SHL:2) ;- (EMAC) Bit rate.
-AT91C_EMAC_CAF EQU (0x1:SHL:4) ;- (EMAC) Copy all frames.
-AT91C_EMAC_NBC EQU (0x1:SHL:5) ;- (EMAC) No broadcast.
-AT91C_EMAC_MTI EQU (0x1:SHL:6) ;- (EMAC) Multicast hash enable
-AT91C_EMAC_UNI EQU (0x1:SHL:7) ;- (EMAC) Unicast hash enable.
-AT91C_EMAC_BIG EQU (0x1:SHL:8) ;- (EMAC) Receive 1522 bytes.
-AT91C_EMAC_EAE EQU (0x1:SHL:9) ;- (EMAC) External address match enable.
-AT91C_EMAC_CLK EQU (0x3:SHL:10) ;- (EMAC)
-AT91C_EMAC_CLK_HCLK_8 EQU (0x0:SHL:10) ;- (EMAC) HCLK divided by 8
-AT91C_EMAC_CLK_HCLK_16 EQU (0x1:SHL:10) ;- (EMAC) HCLK divided by 16
-AT91C_EMAC_CLK_HCLK_32 EQU (0x2:SHL:10) ;- (EMAC) HCLK divided by 32
-AT91C_EMAC_CLK_HCLK_64 EQU (0x3:SHL:10) ;- (EMAC) HCLK divided by 64
-AT91C_EMAC_RTY EQU (0x1:SHL:12) ;- (EMAC)
-AT91C_EMAC_RMII EQU (0x1:SHL:13) ;- (EMAC)
-;- -------- EMAC_SR : (EMAC Offset: 0x8) Network Status Register --------
-AT91C_EMAC_MDIO EQU (0x1:SHL:1) ;- (EMAC)
-AT91C_EMAC_IDLE EQU (0x1:SHL:2) ;- (EMAC)
-;- -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register --------
-AT91C_EMAC_LEN EQU (0x7FF:SHL:0) ;- (EMAC)
-AT91C_EMAC_NCRC EQU (0x1:SHL:15) ;- (EMAC)
-;- -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register --------
-AT91C_EMAC_OVR EQU (0x1:SHL:0) ;- (EMAC)
-AT91C_EMAC_COL EQU (0x1:SHL:1) ;- (EMAC)
-AT91C_EMAC_RLE EQU (0x1:SHL:2) ;- (EMAC)
-AT91C_EMAC_TXIDLE EQU (0x1:SHL:3) ;- (EMAC)
-AT91C_EMAC_BNQ EQU (0x1:SHL:4) ;- (EMAC)
-AT91C_EMAC_COMP EQU (0x1:SHL:5) ;- (EMAC)
-AT91C_EMAC_UND EQU (0x1:SHL:6) ;- (EMAC)
-;- -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register --------
-AT91C_EMAC_BNA EQU (0x1:SHL:0) ;- (EMAC)
-AT91C_EMAC_REC EQU (0x1:SHL:1) ;- (EMAC)
-;- -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register --------
-AT91C_EMAC_DONE EQU (0x1:SHL:0) ;- (EMAC)
-AT91C_EMAC_RCOM EQU (0x1:SHL:1) ;- (EMAC)
-AT91C_EMAC_RBNA EQU (0x1:SHL:2) ;- (EMAC)
-AT91C_EMAC_TOVR EQU (0x1:SHL:3) ;- (EMAC)
-AT91C_EMAC_TUND EQU (0x1:SHL:4) ;- (EMAC)
-AT91C_EMAC_RTRY EQU (0x1:SHL:5) ;- (EMAC)
-AT91C_EMAC_TBRE EQU (0x1:SHL:6) ;- (EMAC)
-AT91C_EMAC_TCOM EQU (0x1:SHL:7) ;- (EMAC)
-AT91C_EMAC_TIDLE EQU (0x1:SHL:8) ;- (EMAC)
-AT91C_EMAC_LINK EQU (0x1:SHL:9) ;- (EMAC)
-AT91C_EMAC_ROVR EQU (0x1:SHL:10) ;- (EMAC)
-AT91C_EMAC_HRESP EQU (0x1:SHL:11) ;- (EMAC)
-;- -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register --------
-;- -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register --------
-;- -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register --------
-;- -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register --------
-AT91C_EMAC_DATA EQU (0xFFFF:SHL:0) ;- (EMAC)
-AT91C_EMAC_CODE EQU (0x3:SHL:16) ;- (EMAC)
-AT91C_EMAC_REGA EQU (0x1F:SHL:18) ;- (EMAC)
-AT91C_EMAC_PHYA EQU (0x1F:SHL:23) ;- (EMAC)
-AT91C_EMAC_RW EQU (0x3:SHL:28) ;- (EMAC)
-AT91C_EMAC_HIGH EQU (0x1:SHL:30) ;- (EMAC)
-AT91C_EMAC_LOW EQU (0x1:SHL:31) ;- (EMAC)
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR External Bus Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_EBI
-EBI_CSA # 4 ;- Chip Select Assignment Register
-EBI_CFGR # 4 ;- Configuration Register
-;- -------- EBI_CSA : (EBI Offset: 0x0) Chip Select Assignment Register --------
-AT91C_EBI_CS0A EQU (0x1:SHL:0) ;- (EBI) Chip Select 0 Assignment
-AT91C_EBI_CS0A_SMC EQU (0x0) ;- (EBI) Chip Select 0 is assigned to the Static Memory Controller.
-AT91C_EBI_CS0A_BFC EQU (0x1) ;- (EBI) Chip Select 0 is assigned to the Burst Flash Controller.
-AT91C_EBI_CS1A EQU (0x1:SHL:1) ;- (EBI) Chip Select 1 Assignment
-AT91C_EBI_CS1A_SMC EQU (0x0:SHL:1) ;- (EBI) Chip Select 1 is assigned to the Static Memory Controller.
-AT91C_EBI_CS1A_SDRAMC EQU (0x1:SHL:1) ;- (EBI) Chip Select 1 is assigned to the SDRAM Controller.
-AT91C_EBI_CS3A EQU (0x1:SHL:3) ;- (EBI) Chip Select 3 Assignment
-AT91C_EBI_CS3A_SMC EQU (0x0:SHL:3) ;- (EBI) Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behaves as defined by the SMC2.
-AT91C_EBI_CS3A_SMC_SmartMedia EQU (0x1:SHL:3) ;- (EBI) Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated.
-AT91C_EBI_CS4A EQU (0x1:SHL:4) ;- (EBI) Chip Select 4 Assignment
-AT91C_EBI_CS4A_SMC EQU (0x0:SHL:4) ;- (EBI) Chip Select 4 is assigned to the Static Memory Controller and NCS4,NCS5 and NCS6 behave as defined by the SMC2.
-AT91C_EBI_CS4A_SMC_CompactFlash EQU (0x1:SHL:4) ;- (EBI) Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic is activated.
-;- -------- EBI_CFGR : (EBI Offset: 0x4) Configuration Register --------
-AT91C_EBI_DBPUC EQU (0x1:SHL:0) ;- (EBI) Data Bus Pull-Up Configuration
-AT91C_EBI_EBSEN EQU (0x1:SHL:1) ;- (EBI) Bus Sharing Enable
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_SMC2
-SMC2_CSR # 32 ;- SMC2 Chip Select Register
-;- -------- SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register --------
-AT91C_SMC2_NWS EQU (0x7F:SHL:0) ;- (SMC2) Number of Wait States
-AT91C_SMC2_WSEN EQU (0x1:SHL:7) ;- (SMC2) Wait State Enable
-AT91C_SMC2_TDF EQU (0xF:SHL:8) ;- (SMC2) Data Float Time
-AT91C_SMC2_BAT EQU (0x1:SHL:12) ;- (SMC2) Byte Access Type
-AT91C_SMC2_DBW EQU (0x1:SHL:13) ;- (SMC2) Data Bus Width
-AT91C_SMC2_DBW_16 EQU (0x1:SHL:13) ;- (SMC2) 16-bit.
-AT91C_SMC2_DBW_8 EQU (0x2:SHL:13) ;- (SMC2) 8-bit.
-AT91C_SMC2_DRP EQU (0x1:SHL:15) ;- (SMC2) Data Read Protocol
-AT91C_SMC2_ACSS EQU (0x3:SHL:16) ;- (SMC2) Address to Chip Select Setup
-AT91C_SMC2_ACSS_STANDARD EQU (0x0:SHL:16) ;- (SMC2) Standard, asserted at the beginning of the access and deasserted at the end.
-AT91C_SMC2_ACSS_1_CYCLE EQU (0x1:SHL:16) ;- (SMC2) One cycle less at the beginning and the end of the access.
-AT91C_SMC2_ACSS_2_CYCLES EQU (0x2:SHL:16) ;- (SMC2) Two cycles less at the beginning and the end of the access.
-AT91C_SMC2_ACSS_3_CYCLES EQU (0x3:SHL:16) ;- (SMC2) Three cycles less at the beginning and the end of the access.
-AT91C_SMC2_RWSETUP EQU (0x7:SHL:24) ;- (SMC2) Read and Write Signal Setup Time
-AT91C_SMC2_RWHOLD EQU (0x7:SHL:29) ;- (SMC2) Read and Write Signal Hold Time
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR SDRAM Controller Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_SDRC
-SDRC_MR # 4 ;- SDRAM Controller Mode Register
-SDRC_TR # 4 ;- SDRAM Controller Refresh Timer Register
-SDRC_CR # 4 ;- SDRAM Controller Configuration Register
-SDRC_SRR # 4 ;- SDRAM Controller Self Refresh Register
-SDRC_LPR # 4 ;- SDRAM Controller Low Power Register
-SDRC_IER # 4 ;- SDRAM Controller Interrupt Enable Register
-SDRC_IDR # 4 ;- SDRAM Controller Interrupt Disable Register
-SDRC_IMR # 4 ;- SDRAM Controller Interrupt Mask Register
-SDRC_ISR # 4 ;- SDRAM Controller Interrupt Mask Register
-;- -------- SDRC_MR : (SDRC Offset: 0x0) SDRAM Controller Mode Register --------
-AT91C_SDRC_MODE EQU (0xF:SHL:0) ;- (SDRC) Mode
-AT91C_SDRC_MODE_NORMAL_CMD EQU (0x0) ;- (SDRC) Normal Mode
-AT91C_SDRC_MODE_NOP_CMD EQU (0x1) ;- (SDRC) NOP Command
-AT91C_SDRC_MODE_PRCGALL_CMD EQU (0x2) ;- (SDRC) All Banks Precharge Command
-AT91C_SDRC_MODE_LMR_CMD EQU (0x3) ;- (SDRC) Load Mode Register Command
-AT91C_SDRC_MODE_RFSH_CMD EQU (0x4) ;- (SDRC) Refresh Command
-AT91C_SDRC_DBW EQU (0x1:SHL:4) ;- (SDRC) Data Bus Width
-AT91C_SDRC_DBW_32_BITS EQU (0x0:SHL:4) ;- (SDRC) 32 Bits datas bus
-AT91C_SDRC_DBW_16_BITS EQU (0x1:SHL:4) ;- (SDRC) 16 Bits datas bus
-;- -------- SDRC_TR : (SDRC Offset: 0x4) SDRC Refresh Timer Register --------
-AT91C_SDRC_COUNT EQU (0xFFF:SHL:0) ;- (SDRC) Refresh Counter
-;- -------- SDRC_CR : (SDRC Offset: 0x8) SDRAM Configuration Register --------
-AT91C_SDRC_NC EQU (0x3:SHL:0) ;- (SDRC) Number of Column Bits
-AT91C_SDRC_NC_8 EQU (0x0) ;- (SDRC) 8 Bits
-AT91C_SDRC_NC_9 EQU (0x1) ;- (SDRC) 9 Bits
-AT91C_SDRC_NC_10 EQU (0x2) ;- (SDRC) 10 Bits
-AT91C_SDRC_NC_11 EQU (0x3) ;- (SDRC) 11 Bits
-AT91C_SDRC_NR EQU (0x3:SHL:2) ;- (SDRC) Number of Row Bits
-AT91C_SDRC_NR_11 EQU (0x0:SHL:2) ;- (SDRC) 11 Bits
-AT91C_SDRC_NR_12 EQU (0x1:SHL:2) ;- (SDRC) 12 Bits
-AT91C_SDRC_NR_13 EQU (0x2:SHL:2) ;- (SDRC) 13 Bits
-AT91C_SDRC_NB EQU (0x1:SHL:4) ;- (SDRC) Number of Banks
-AT91C_SDRC_NB_2_BANKS EQU (0x0:SHL:4) ;- (SDRC) 2 banks
-AT91C_SDRC_NB_4_BANKS EQU (0x1:SHL:4) ;- (SDRC) 4 banks
-AT91C_SDRC_CAS EQU (0x3:SHL:5) ;- (SDRC) CAS Latency
-AT91C_SDRC_CAS_2 EQU (0x2:SHL:5) ;- (SDRC) 2 cycles
-AT91C_SDRC_TWR EQU (0xF:SHL:7) ;- (SDRC) Number of Write Recovery Time Cycles
-AT91C_SDRC_TRC EQU (0xF:SHL:11) ;- (SDRC) Number of RAS Cycle Time Cycles
-AT91C_SDRC_TRP EQU (0xF:SHL:15) ;- (SDRC) Number of RAS Precharge Time Cycles
-AT91C_SDRC_TRCD EQU (0xF:SHL:19) ;- (SDRC) Number of RAS to CAS Delay Cycles
-AT91C_SDRC_TRAS EQU (0xF:SHL:23) ;- (SDRC) Number of RAS Active Time Cycles
-AT91C_SDRC_TXSR EQU (0xF:SHL:27) ;- (SDRC) Number of Command Recovery Time Cycles
-;- -------- SDRC_SRR : (SDRC Offset: 0xc) SDRAM Controller Self-refresh Register --------
-AT91C_SDRC_SRCB EQU (0x1:SHL:0) ;- (SDRC) Self-refresh Command Bit
-;- -------- SDRC_LPR : (SDRC Offset: 0x10) SDRAM Controller Low-power Register --------
-AT91C_SDRC_LPCB EQU (0x1:SHL:0) ;- (SDRC) Low-power Command Bit
-;- -------- SDRC_IER : (SDRC Offset: 0x14) SDRAM Controller Interrupt Enable Register --------
-AT91C_SDRC_RES EQU (0x1:SHL:0) ;- (SDRC) Refresh Error Status
-;- -------- SDRC_IDR : (SDRC Offset: 0x18) SDRAM Controller Interrupt Disable Register --------
-;- -------- SDRC_IMR : (SDRC Offset: 0x1c) SDRAM Controller Interrupt Mask Register --------
-;- -------- SDRC_ISR : (SDRC Offset: 0x20) SDRAM Controller Interrupt Status Register --------
-
-;- *****************************************************************************
-;- SOFTWARE API DEFINITION FOR Burst Flash Controller Interface
-;- *****************************************************************************
- ^ 0 ;- AT91S_BFC
-BFC_MR # 4 ;- BFC Mode Register
-;- -------- BFC_MR : (BFC Offset: 0x0) BFC Mode Register --------
-AT91C_BFC_BFCOM EQU (0x3:SHL:0) ;- (BFC) Burst Flash Controller Operating Mode
-AT91C_BFC_BFCOM_DISABLED EQU (0x0) ;- (BFC) NPCS0 is driven by the SMC or remains high.
-AT91C_BFC_BFCOM_ASYNC EQU (0x1) ;- (BFC) Asynchronous
-AT91C_BFC_BFCOM_BURST_READ EQU (0x2) ;- (BFC) Burst Read
-AT91C_BFC_BFCC EQU (0x3:SHL:2) ;- (BFC) Burst Flash Controller Operating Mode
-AT91C_BFC_BFCC_MCK EQU (0x1:SHL:2) ;- (BFC) Master Clock.
-AT91C_BFC_BFCC_MCK_DIV_2 EQU (0x2:SHL:2) ;- (BFC) Master Clock divided by 2.
-AT91C_BFC_BFCC_MCK_DIV_4 EQU (0x3:SHL:2) ;- (BFC) Master Clock divided by 4.
-AT91C_BFC_AVL EQU (0xF:SHL:4) ;- (BFC) Address Valid Latency
-AT91C_BFC_PAGES EQU (0x7:SHL:8) ;- (BFC) Page Size
-AT91C_BFC_PAGES_NO_PAGE EQU (0x0:SHL:8) ;- (BFC) No page handling.
-AT91C_BFC_PAGES_16 EQU (0x1:SHL:8) ;- (BFC) 16 bytes page size.
-AT91C_BFC_PAGES_32 EQU (0x2:SHL:8) ;- (BFC) 32 bytes page size.
-AT91C_BFC_PAGES_64 EQU (0x3:SHL:8) ;- (BFC) 64 bytes page size.
-AT91C_BFC_PAGES_128 EQU (0x4:SHL:8) ;- (BFC) 128 bytes page size.
-AT91C_BFC_PAGES_256 EQU (0x5:SHL:8) ;- (BFC) 256 bytes page size.
-AT91C_BFC_PAGES_512 EQU (0x6:SHL:8) ;- (BFC) 512 bytes page size.
-AT91C_BFC_PAGES_1024 EQU (0x7:SHL:8) ;- (BFC) 1024 bytes page size.
-AT91C_BFC_OEL EQU (0x3:SHL:12) ;- (BFC) Output Enable Latency
-AT91C_BFC_BAAEN EQU (0x1:SHL:16) ;- (BFC) Burst Address Advance Enable
-AT91C_BFC_BFOEH EQU (0x1:SHL:17) ;- (BFC) Burst Flash Output Enable Handling
-AT91C_BFC_MUXEN EQU (0x1:SHL:18) ;- (BFC) Multiplexed Bus Enable
-AT91C_BFC_RDYEN EQU (0x1:SHL:19) ;- (BFC) Ready Enable Mode
-
-;- *****************************************************************************
-;- REGISTER ADDRESS DEFINITION FOR AT91RM9200
-;- *****************************************************************************
-;- ========== Register definition for SYS peripheral ==========
-;- ========== Register definition for MC peripheral ==========
-AT91C_MC_PUER EQU (0xFFFFFF54) ;- (MC) MC Protection Unit Enable Register
-AT91C_MC_ASR EQU (0xFFFFFF04) ;- (MC) MC Abort Status Register
-AT91C_MC_PUP EQU (0xFFFFFF50) ;- (MC) MC Protection Unit Peripherals
-AT91C_MC_PUIA EQU (0xFFFFFF10) ;- (MC) MC Protection Unit Area
-AT91C_MC_AASR EQU (0xFFFFFF08) ;- (MC) MC Abort Address Status Register
-AT91C_MC_RCR EQU (0xFFFFFF00) ;- (MC) MC Remap Control Register
-;- ========== Register definition for RTC peripheral ==========
-AT91C_RTC_IMR EQU (0xFFFFFE28) ;- (RTC) Interrupt Mask Register
-AT91C_RTC_IER EQU (0xFFFFFE20) ;- (RTC) Interrupt Enable Register
-AT91C_RTC_SR EQU (0xFFFFFE18) ;- (RTC) Status Register
-AT91C_RTC_TIMALR EQU (0xFFFFFE10) ;- (RTC) Time Alarm Register
-AT91C_RTC_TIMR EQU (0xFFFFFE08) ;- (RTC) Time Register
-AT91C_RTC_CR EQU (0xFFFFFE00) ;- (RTC) Control Register
-AT91C_RTC_VER EQU (0xFFFFFE2C) ;- (RTC) Valid Entry Register
-AT91C_RTC_IDR EQU (0xFFFFFE24) ;- (RTC) Interrupt Disable Register
-AT91C_RTC_SCCR EQU (0xFFFFFE1C) ;- (RTC) Status Clear Command Register
-AT91C_RTC_CALALR EQU (0xFFFFFE14) ;- (RTC) Calendar Alarm Register
-AT91C_RTC_CALR EQU (0xFFFFFE0C) ;- (RTC) Calendar Register
-AT91C_RTC_MR EQU (0xFFFFFE04) ;- (RTC) Mode Register
-;- ========== Register definition for ST peripheral ==========
-AT91C_ST_CRTR EQU (0xFFFFFD24) ;- (ST) Current Real-time Register
-AT91C_ST_IMR EQU (0xFFFFFD1C) ;- (ST) Interrupt Mask Register
-AT91C_ST_IER EQU (0xFFFFFD14) ;- (ST) Interrupt Enable Register
-AT91C_ST_RTMR EQU (0xFFFFFD0C) ;- (ST) Real-time Mode Register
-AT91C_ST_PIMR EQU (0xFFFFFD04) ;- (ST) Period Interval Mode Register
-AT91C_ST_RTAR EQU (0xFFFFFD20) ;- (ST) Real-time Alarm Register
-AT91C_ST_IDR EQU (0xFFFFFD18) ;- (ST) Interrupt Disable Register
-AT91C_ST_SR EQU (0xFFFFFD10) ;- (ST) Status Register
-AT91C_ST_WDMR EQU (0xFFFFFD08) ;- (ST) Watchdog Mode Register
-AT91C_ST_CR EQU (0xFFFFFD00) ;- (ST) Control Register
-;- ========== Register definition for PMC peripheral ==========
-AT91C_PMC_SCSR EQU (0xFFFFFC08) ;- (PMC) System Clock Status Register
-AT91C_PMC_SCER EQU (0xFFFFFC00) ;- (PMC) System Clock Enable Register
-AT91C_PMC_IMR EQU (0xFFFFFC6C) ;- (PMC) Interrupt Mask Register
-AT91C_PMC_IDR EQU (0xFFFFFC64) ;- (PMC) Interrupt Disable Register
-AT91C_PMC_PCDR EQU (0xFFFFFC14) ;- (PMC) Peripheral Clock Disable Register
-AT91C_PMC_SCDR EQU (0xFFFFFC04) ;- (PMC) System Clock Disable Register
-AT91C_PMC_SR EQU (0xFFFFFC68) ;- (PMC) Status Register
-AT91C_PMC_IER EQU (0xFFFFFC60) ;- (PMC) Interrupt Enable Register
-AT91C_PMC_MCKR EQU (0xFFFFFC30) ;- (PMC) Master Clock Register
-AT91C_PMC_PCER EQU (0xFFFFFC10) ;- (PMC) Peripheral Clock Enable Register
-AT91C_PMC_PCSR EQU (0xFFFFFC18) ;- (PMC) Peripheral Clock Status Register
-AT91C_PMC_PCKR EQU (0xFFFFFC40) ;- (PMC) Programmable Clock Register
-;- ========== Register definition for CKGR peripheral ==========
-AT91C_CKGR_PLLBR EQU (0xFFFFFC2C) ;- (CKGR) PLL B Register
-AT91C_CKGR_MCFR EQU (0xFFFFFC24) ;- (CKGR) Main Clock Frequency Register
-AT91C_CKGR_PLLAR EQU (0xFFFFFC28) ;- (CKGR) PLL A Register
-AT91C_CKGR_MOR EQU (0xFFFFFC20) ;- (CKGR) Main Oscillator Register
-;- ========== Register definition for PIOD peripheral ==========
-AT91C_PIOD_PDSR EQU (0xFFFFFA3C) ;- (PIOD) Pin Data Status Register
-AT91C_PIOD_CODR EQU (0xFFFFFA34) ;- (PIOD) Clear Output Data Register
-AT91C_PIOD_OWER EQU (0xFFFFFAA0) ;- (PIOD) Output Write Enable Register
-AT91C_PIOD_MDER EQU (0xFFFFFA50) ;- (PIOD) Multi-driver Enable Register
-AT91C_PIOD_IMR EQU (0xFFFFFA48) ;- (PIOD) Interrupt Mask Register
-AT91C_PIOD_IER EQU (0xFFFFFA40) ;- (PIOD) Interrupt Enable Register
-AT91C_PIOD_ODSR EQU (0xFFFFFA38) ;- (PIOD) Output Data Status Register
-AT91C_PIOD_SODR EQU (0xFFFFFA30) ;- (PIOD) Set Output Data Register
-AT91C_PIOD_PER EQU (0xFFFFFA00) ;- (PIOD) PIO Enable Register
-AT91C_PIOD_OWDR EQU (0xFFFFFAA4) ;- (PIOD) Output Write Disable Register
-AT91C_PIOD_PPUER EQU (0xFFFFFA64) ;- (PIOD) Pull-up Enable Register
-AT91C_PIOD_MDDR EQU (0xFFFFFA54) ;- (PIOD) Multi-driver Disable Register
-AT91C_PIOD_ISR EQU (0xFFFFFA4C) ;- (PIOD) Interrupt Status Register
-AT91C_PIOD_IDR EQU (0xFFFFFA44) ;- (PIOD) Interrupt Disable Register
-AT91C_PIOD_PDR EQU (0xFFFFFA04) ;- (PIOD) PIO Disable Register
-AT91C_PIOD_ODR EQU (0xFFFFFA14) ;- (PIOD) Output Disable Registerr
-AT91C_PIOD_OWSR EQU (0xFFFFFAA8) ;- (PIOD) Output Write Status Register
-AT91C_PIOD_ABSR EQU (0xFFFFFA78) ;- (PIOD) AB Select Status Register
-AT91C_PIOD_ASR EQU (0xFFFFFA70) ;- (PIOD) Select A Register
-AT91C_PIOD_PPUSR EQU (0xFFFFFA68) ;- (PIOD) Pad Pull-up Status Register
-AT91C_PIOD_PPUDR EQU (0xFFFFFA60) ;- (PIOD) Pull-up Disable Register
-AT91C_PIOD_MDSR EQU (0xFFFFFA58) ;- (PIOD) Multi-driver Status Register
-AT91C_PIOD_PSR EQU (0xFFFFFA08) ;- (PIOD) PIO Status Register
-AT91C_PIOD_OER EQU (0xFFFFFA10) ;- (PIOD) Output Enable Register
-AT91C_PIOD_OSR EQU (0xFFFFFA18) ;- (PIOD) Output Status Register
-AT91C_PIOD_IFER EQU (0xFFFFFA20) ;- (PIOD) Input Filter Enable Register
-AT91C_PIOD_BSR EQU (0xFFFFFA74) ;- (PIOD) Select B Register
-AT91C_PIOD_IFDR EQU (0xFFFFFA24) ;- (PIOD) Input Filter Disable Register
-AT91C_PIOD_IFSR EQU (0xFFFFFA28) ;- (PIOD) Input Filter Status Register
-;- ========== Register definition for PIOC peripheral ==========
-AT91C_PIOC_IFDR EQU (0xFFFFF824) ;- (PIOC) Input Filter Disable Register
-AT91C_PIOC_ODR EQU (0xFFFFF814) ;- (PIOC) Output Disable Registerr
-AT91C_PIOC_ABSR EQU (0xFFFFF878) ;- (PIOC) AB Select Status Register
-AT91C_PIOC_SODR EQU (0xFFFFF830) ;- (PIOC) Set Output Data Register
-AT91C_PIOC_IFSR EQU (0xFFFFF828) ;- (PIOC) Input Filter Status Register
-AT91C_PIOC_CODR EQU (0xFFFFF834) ;- (PIOC) Clear Output Data Register
-AT91C_PIOC_ODSR EQU (0xFFFFF838) ;- (PIOC) Output Data Status Register
-AT91C_PIOC_IER EQU (0xFFFFF840) ;- (PIOC) Interrupt Enable Register
-AT91C_PIOC_IMR EQU (0xFFFFF848) ;- (PIOC) Interrupt Mask Register
-AT91C_PIOC_OWDR EQU (0xFFFFF8A4) ;- (PIOC) Output Write Disable Register
-AT91C_PIOC_MDDR EQU (0xFFFFF854) ;- (PIOC) Multi-driver Disable Register
-AT91C_PIOC_PDSR EQU (0xFFFFF83C) ;- (PIOC) Pin Data Status Register
-AT91C_PIOC_IDR EQU (0xFFFFF844) ;- (PIOC) Interrupt Disable Register
-AT91C_PIOC_ISR EQU (0xFFFFF84C) ;- (PIOC) Interrupt Status Register
-AT91C_PIOC_PDR EQU (0xFFFFF804) ;- (PIOC) PIO Disable Register
-AT91C_PIOC_OWSR EQU (0xFFFFF8A8) ;- (PIOC) Output Write Status Register
-AT91C_PIOC_OWER EQU (0xFFFFF8A0) ;- (PIOC) Output Write Enable Register
-AT91C_PIOC_ASR EQU (0xFFFFF870) ;- (PIOC) Select A Register
-AT91C_PIOC_PPUSR EQU (0xFFFFF868) ;- (PIOC) Pad Pull-up Status Register
-AT91C_PIOC_PPUDR EQU (0xFFFFF860) ;- (PIOC) Pull-up Disable Register
-AT91C_PIOC_MDSR EQU (0xFFFFF858) ;- (PIOC) Multi-driver Status Register
-AT91C_PIOC_MDER EQU (0xFFFFF850) ;- (PIOC) Multi-driver Enable Register
-AT91C_PIOC_IFER EQU (0xFFFFF820) ;- (PIOC) Input Filter Enable Register
-AT91C_PIOC_OSR EQU (0xFFFFF818) ;- (PIOC) Output Status Register
-AT91C_PIOC_OER EQU (0xFFFFF810) ;- (PIOC) Output Enable Register
-AT91C_PIOC_PSR EQU (0xFFFFF808) ;- (PIOC) PIO Status Register
-AT91C_PIOC_PER EQU (0xFFFFF800) ;- (PIOC) PIO Enable Register
-AT91C_PIOC_BSR EQU (0xFFFFF874) ;- (PIOC) Select B Register
-AT91C_PIOC_PPUER EQU (0xFFFFF864) ;- (PIOC) Pull-up Enable Register
-;- ========== Register definition for PIOB peripheral ==========
-AT91C_PIOB_OWSR EQU (0xFFFFF6A8) ;- (PIOB) Output Write Status Register
-AT91C_PIOB_PPUSR EQU (0xFFFFF668) ;- (PIOB) Pad Pull-up Status Register
-AT91C_PIOB_PPUDR EQU (0xFFFFF660) ;- (PIOB) Pull-up Disable Register
-AT91C_PIOB_MDSR EQU (0xFFFFF658) ;- (PIOB) Multi-driver Status Register
-AT91C_PIOB_MDER EQU (0xFFFFF650) ;- (PIOB) Multi-driver Enable Register
-AT91C_PIOB_IMR EQU (0xFFFFF648) ;- (PIOB) Interrupt Mask Register
-AT91C_PIOB_OSR EQU (0xFFFFF618) ;- (PIOB) Output Status Register
-AT91C_PIOB_OER EQU (0xFFFFF610) ;- (PIOB) Output Enable Register
-AT91C_PIOB_PSR EQU (0xFFFFF608) ;- (PIOB) PIO Status Register
-AT91C_PIOB_PER EQU (0xFFFFF600) ;- (PIOB) PIO Enable Register
-AT91C_PIOB_BSR EQU (0xFFFFF674) ;- (PIOB) Select B Register
-AT91C_PIOB_PPUER EQU (0xFFFFF664) ;- (PIOB) Pull-up Enable Register
-AT91C_PIOB_IFDR EQU (0xFFFFF624) ;- (PIOB) Input Filter Disable Register
-AT91C_PIOB_ODR EQU (0xFFFFF614) ;- (PIOB) Output Disable Registerr
-AT91C_PIOB_ABSR EQU (0xFFFFF678) ;- (PIOB) AB Select Status Register
-AT91C_PIOB_ASR EQU (0xFFFFF670) ;- (PIOB) Select A Register
-AT91C_PIOB_IFER EQU (0xFFFFF620) ;- (PIOB) Input Filter Enable Register
-AT91C_PIOB_IFSR EQU (0xFFFFF628) ;- (PIOB) Input Filter Status Register
-AT91C_PIOB_SODR EQU (0xFFFFF630) ;- (PIOB) Set Output Data Register
-AT91C_PIOB_ODSR EQU (0xFFFFF638) ;- (PIOB) Output Data Status Register
-AT91C_PIOB_CODR EQU (0xFFFFF634) ;- (PIOB) Clear Output Data Register
-AT91C_PIOB_PDSR EQU (0xFFFFF63C) ;- (PIOB) Pin Data Status Register
-AT91C_PIOB_OWER EQU (0xFFFFF6A0) ;- (PIOB) Output Write Enable Register
-AT91C_PIOB_IER EQU (0xFFFFF640) ;- (PIOB) Interrupt Enable Register
-AT91C_PIOB_OWDR EQU (0xFFFFF6A4) ;- (PIOB) Output Write Disable Register
-AT91C_PIOB_MDDR EQU (0xFFFFF654) ;- (PIOB) Multi-driver Disable Register
-AT91C_PIOB_ISR EQU (0xFFFFF64C) ;- (PIOB) Interrupt Status Register
-AT91C_PIOB_IDR EQU (0xFFFFF644) ;- (PIOB) Interrupt Disable Register
-AT91C_PIOB_PDR EQU (0xFFFFF604) ;- (PIOB) PIO Disable Register
-;- ========== Register definition for PIOA peripheral ==========
-AT91C_PIOA_IMR EQU (0xFFFFF448) ;- (PIOA) Interrupt Mask Register
-AT91C_PIOA_IER EQU (0xFFFFF440) ;- (PIOA) Interrupt Enable Register
-AT91C_PIOA_OWDR EQU (0xFFFFF4A4) ;- (PIOA) Output Write Disable Register
-AT91C_PIOA_ISR EQU (0xFFFFF44C) ;- (PIOA) Interrupt Status Register
-AT91C_PIOA_PPUDR EQU (0xFFFFF460) ;- (PIOA) Pull-up Disable Register
-AT91C_PIOA_MDSR EQU (0xFFFFF458) ;- (PIOA) Multi-driver Status Register
-AT91C_PIOA_MDER EQU (0xFFFFF450) ;- (PIOA) Multi-driver Enable Register
-AT91C_PIOA_PER EQU (0xFFFFF400) ;- (PIOA) PIO Enable Register
-AT91C_PIOA_PSR EQU (0xFFFFF408) ;- (PIOA) PIO Status Register
-AT91C_PIOA_OER EQU (0xFFFFF410) ;- (PIOA) Output Enable Register
-AT91C_PIOA_BSR EQU (0xFFFFF474) ;- (PIOA) Select B Register
-AT91C_PIOA_PPUER EQU (0xFFFFF464) ;- (PIOA) Pull-up Enable Register
-AT91C_PIOA_MDDR EQU (0xFFFFF454) ;- (PIOA) Multi-driver Disable Register
-AT91C_PIOA_PDR EQU (0xFFFFF404) ;- (PIOA) PIO Disable Register
-AT91C_PIOA_ODR EQU (0xFFFFF414) ;- (PIOA) Output Disable Registerr
-AT91C_PIOA_IFDR EQU (0xFFFFF424) ;- (PIOA) Input Filter Disable Register
-AT91C_PIOA_ABSR EQU (0xFFFFF478) ;- (PIOA) AB Select Status Register
-AT91C_PIOA_ASR EQU (0xFFFFF470) ;- (PIOA) Select A Register
-AT91C_PIOA_PPUSR EQU (0xFFFFF468) ;- (PIOA) Pad Pull-up Status Register
-AT91C_PIOA_ODSR EQU (0xFFFFF438) ;- (PIOA) Output Data Status Register
-AT91C_PIOA_SODR EQU (0xFFFFF430) ;- (PIOA) Set Output Data Register
-AT91C_PIOA_IFSR EQU (0xFFFFF428) ;- (PIOA) Input Filter Status Register
-AT91C_PIOA_IFER EQU (0xFFFFF420) ;- (PIOA) Input Filter Enable Register
-AT91C_PIOA_OSR EQU (0xFFFFF418) ;- (PIOA) Output Status Register
-AT91C_PIOA_IDR EQU (0xFFFFF444) ;- (PIOA) Interrupt Disable Register
-AT91C_PIOA_PDSR EQU (0xFFFFF43C) ;- (PIOA) Pin Data Status Register
-AT91C_PIOA_CODR EQU (0xFFFFF434) ;- (PIOA) Clear Output Data Register
-AT91C_PIOA_OWSR EQU (0xFFFFF4A8) ;- (PIOA) Output Write Status Register
-AT91C_PIOA_OWER EQU (0xFFFFF4A0) ;- (PIOA) Output Write Enable Register
-;- ========== Register definition for DBGU peripheral ==========
-AT91C_DBGU_C2R EQU (0xFFFFF244) ;- (DBGU) Chip ID2 Register
-AT91C_DBGU_THR EQU (0xFFFFF21C) ;- (DBGU) Transmitter Holding Register
-AT91C_DBGU_CSR EQU (0xFFFFF214) ;- (DBGU) Channel Status Register
-AT91C_DBGU_IDR EQU (0xFFFFF20C) ;- (DBGU) Interrupt Disable Register
-AT91C_DBGU_MR EQU (0xFFFFF204) ;- (DBGU) Mode Register
-AT91C_DBGU_FNTR EQU (0xFFFFF248) ;- (DBGU) Force NTRST Register
-AT91C_DBGU_C1R EQU (0xFFFFF240) ;- (DBGU) Chip ID1 Register
-AT91C_DBGU_BRGR EQU (0xFFFFF220) ;- (DBGU) Baud Rate Generator Register
-AT91C_DBGU_RHR EQU (0xFFFFF218) ;- (DBGU) Receiver Holding Register
-AT91C_DBGU_IMR EQU (0xFFFFF210) ;- (DBGU) Interrupt Mask Register
-AT91C_DBGU_IER EQU (0xFFFFF208) ;- (DBGU) Interrupt Enable Register
-AT91C_DBGU_CR EQU (0xFFFFF200) ;- (DBGU) Control Register
-;- ========== Register definition for PDC_DBGU peripheral ==========
-AT91C_DBGU_TNCR EQU (0xFFFFF31C) ;- (PDC_DBGU) Transmit Next Counter Register
-AT91C_DBGU_RNCR EQU (0xFFFFF314) ;- (PDC_DBGU) Receive Next Counter Register
-AT91C_DBGU_PTCR EQU (0xFFFFF320) ;- (PDC_DBGU) PDC Transfer Control Register
-AT91C_DBGU_PTSR EQU (0xFFFFF324) ;- (PDC_DBGU) PDC Transfer Status Register
-AT91C_DBGU_RCR EQU (0xFFFFF304) ;- (PDC_DBGU) Receive Counter Register
-AT91C_DBGU_TCR EQU (0xFFFFF30C) ;- (PDC_DBGU) Transmit Counter Register
-AT91C_DBGU_RPR EQU (0xFFFFF300) ;- (PDC_DBGU) Receive Pointer Register
-AT91C_DBGU_TPR EQU (0xFFFFF308) ;- (PDC_DBGU) Transmit Pointer Register
-AT91C_DBGU_RNPR EQU (0xFFFFF310) ;- (PDC_DBGU) Receive Next Pointer Register
-AT91C_DBGU_TNPR EQU (0xFFFFF318) ;- (PDC_DBGU) Transmit Next Pointer Register
-;- ========== Register definition for AIC peripheral ==========
-AT91C_AIC_ICCR EQU (0xFFFFF128) ;- (AIC) Interrupt Clear Command Register
-AT91C_AIC_IECR EQU (0xFFFFF120) ;- (AIC) Interrupt Enable Command Register
-AT91C_AIC_SMR EQU (0xFFFFF000) ;- (AIC) Source Mode Register
-AT91C_AIC_ISCR EQU (0xFFFFF12C) ;- (AIC) Interrupt Set Command Register
-AT91C_AIC_EOICR EQU (0xFFFFF130) ;- (AIC) End of Interrupt Command Register
-AT91C_AIC_DCR EQU (0xFFFFF138) ;- (AIC) Debug Control Register (Protect)
-AT91C_AIC_FFER EQU (0xFFFFF140) ;- (AIC) Fast Forcing Enable Register
-AT91C_AIC_SVR EQU (0xFFFFF080) ;- (AIC) Source Vector Register
-AT91C_AIC_SPU EQU (0xFFFFF134) ;- (AIC) Spurious Vector Register
-AT91C_AIC_FFDR EQU (0xFFFFF144) ;- (AIC) Fast Forcing Disable Register
-AT91C_AIC_FVR EQU (0xFFFFF104) ;- (AIC) FIQ Vector Register
-AT91C_AIC_FFSR EQU (0xFFFFF148) ;- (AIC) Fast Forcing Status Register
-AT91C_AIC_IMR EQU (0xFFFFF110) ;- (AIC) Interrupt Mask Register
-AT91C_AIC_ISR EQU (0xFFFFF108) ;- (AIC) Interrupt Status Register
-AT91C_AIC_IVR EQU (0xFFFFF100) ;- (AIC) IRQ Vector Register
-AT91C_AIC_IDCR EQU (0xFFFFF124) ;- (AIC) Interrupt Disable Command Register
-AT91C_AIC_CISR EQU (0xFFFFF114) ;- (AIC) Core Interrupt Status Register
-AT91C_AIC_IPR EQU (0xFFFFF10C) ;- (AIC) Interrupt Pending Register
-;- ========== Register definition for PDC_SPI peripheral ==========
-AT91C_SPI_PTCR EQU (0xFFFE0120) ;- (PDC_SPI) PDC Transfer Control Register
-AT91C_SPI_TNPR EQU (0xFFFE0118) ;- (PDC_SPI) Transmit Next Pointer Register
-AT91C_SPI_RNPR EQU (0xFFFE0110) ;- (PDC_SPI) Receive Next Pointer Register
-AT91C_SPI_TPR EQU (0xFFFE0108) ;- (PDC_SPI) Transmit Pointer Register
-AT91C_SPI_RPR EQU (0xFFFE0100) ;- (PDC_SPI) Receive Pointer Register
-AT91C_SPI_PTSR EQU (0xFFFE0124) ;- (PDC_SPI) PDC Transfer Status Register
-AT91C_SPI_TNCR EQU (0xFFFE011C) ;- (PDC_SPI) Transmit Next Counter Register
-AT91C_SPI_RNCR EQU (0xFFFE0114) ;- (PDC_SPI) Receive Next Counter Register
-AT91C_SPI_TCR EQU (0xFFFE010C) ;- (PDC_SPI) Transmit Counter Register
-AT91C_SPI_RCR EQU (0xFFFE0104) ;- (PDC_SPI) Receive Counter Register
-;- ========== Register definition for SPI peripheral ==========
-AT91C_SPI_CSR EQU (0xFFFE0030) ;- (SPI) Chip Select Register
-AT91C_SPI_IDR EQU (0xFFFE0018) ;- (SPI) Interrupt Disable Register
-AT91C_SPI_SR EQU (0xFFFE0010) ;- (SPI) Status Register
-AT91C_SPI_RDR EQU (0xFFFE0008) ;- (SPI) Receive Data Register
-AT91C_SPI_CR EQU (0xFFFE0000) ;- (SPI) Control Register
-AT91C_SPI_IMR EQU (0xFFFE001C) ;- (SPI) Interrupt Mask Register
-AT91C_SPI_IER EQU (0xFFFE0014) ;- (SPI) Interrupt Enable Register
-AT91C_SPI_TDR EQU (0xFFFE000C) ;- (SPI) Transmit Data Register
-AT91C_SPI_MR EQU (0xFFFE0004) ;- (SPI) Mode Register
-;- ========== Register definition for PDC_SSC2 peripheral ==========
-AT91C_SSC2_PTCR EQU (0xFFFD8120) ;- (PDC_SSC2) PDC Transfer Control Register
-AT91C_SSC2_TNPR EQU (0xFFFD8118) ;- (PDC_SSC2) Transmit Next Pointer Register
-AT91C_SSC2_RNPR EQU (0xFFFD8110) ;- (PDC_SSC2) Receive Next Pointer Register
-AT91C_SSC2_TPR EQU (0xFFFD8108) ;- (PDC_SSC2) Transmit Pointer Register
-AT91C_SSC2_RPR EQU (0xFFFD8100) ;- (PDC_SSC2) Receive Pointer Register
-AT91C_SSC2_PTSR EQU (0xFFFD8124) ;- (PDC_SSC2) PDC Transfer Status Register
-AT91C_SSC2_TNCR EQU (0xFFFD811C) ;- (PDC_SSC2) Transmit Next Counter Register
-AT91C_SSC2_RNCR EQU (0xFFFD8114) ;- (PDC_SSC2) Receive Next Counter Register
-AT91C_SSC2_TCR EQU (0xFFFD810C) ;- (PDC_SSC2) Transmit Counter Register
-AT91C_SSC2_RCR EQU (0xFFFD8104) ;- (PDC_SSC2) Receive Counter Register
-;- ========== Register definition for SSC2 peripheral ==========
-AT91C_SSC2_IMR EQU (0xFFFD804C) ;- (SSC2) Interrupt Mask Register
-AT91C_SSC2_IER EQU (0xFFFD8044) ;- (SSC2) Interrupt Enable Register
-AT91C_SSC2_RC1R EQU (0xFFFD803C) ;- (SSC2) Receive Compare 1 Register
-AT91C_SSC2_TSHR EQU (0xFFFD8034) ;- (SSC2) Transmit Sync Holding Register
-AT91C_SSC2_CMR EQU (0xFFFD8004) ;- (SSC2) Clock Mode Register
-AT91C_SSC2_IDR EQU (0xFFFD8048) ;- (SSC2) Interrupt Disable Register
-AT91C_SSC2_TCMR EQU (0xFFFD8018) ;- (SSC2) Transmit Clock Mode Register
-AT91C_SSC2_RCMR EQU (0xFFFD8010) ;- (SSC2) Receive Clock ModeRegister
-AT91C_SSC2_CR EQU (0xFFFD8000) ;- (SSC2) Control Register
-AT91C_SSC2_RFMR EQU (0xFFFD8014) ;- (SSC2) Receive Frame Mode Register
-AT91C_SSC2_TFMR EQU (0xFFFD801C) ;- (SSC2) Transmit Frame Mode Register
-AT91C_SSC2_THR EQU (0xFFFD8024) ;- (SSC2) Transmit Holding Register
-AT91C_SSC2_SR EQU (0xFFFD8040) ;- (SSC2) Status Register
-AT91C_SSC2_RC0R EQU (0xFFFD8038) ;- (SSC2) Receive Compare 0 Register
-AT91C_SSC2_RSHR EQU (0xFFFD8030) ;- (SSC2) Receive Sync Holding Register
-AT91C_SSC2_RHR EQU (0xFFFD8020) ;- (SSC2) Receive Holding Register
-;- ========== Register definition for PDC_SSC1 peripheral ==========
-AT91C_SSC1_PTCR EQU (0xFFFD4120) ;- (PDC_SSC1) PDC Transfer Control Register
-AT91C_SSC1_TNPR EQU (0xFFFD4118) ;- (PDC_SSC1) Transmit Next Pointer Register
-AT91C_SSC1_RNPR EQU (0xFFFD4110) ;- (PDC_SSC1) Receive Next Pointer Register
-AT91C_SSC1_TPR EQU (0xFFFD4108) ;- (PDC_SSC1) Transmit Pointer Register
-AT91C_SSC1_RPR EQU (0xFFFD4100) ;- (PDC_SSC1) Receive Pointer Register
-AT91C_SSC1_PTSR EQU (0xFFFD4124) ;- (PDC_SSC1) PDC Transfer Status Register
-AT91C_SSC1_TNCR EQU (0xFFFD411C) ;- (PDC_SSC1) Transmit Next Counter Register
-AT91C_SSC1_RNCR EQU (0xFFFD4114) ;- (PDC_SSC1) Receive Next Counter Register
-AT91C_SSC1_TCR EQU (0xFFFD410C) ;- (PDC_SSC1) Transmit Counter Register
-AT91C_SSC1_RCR EQU (0xFFFD4104) ;- (PDC_SSC1) Receive Counter Register
-;- ========== Register definition for SSC1 peripheral ==========
-AT91C_SSC1_RFMR EQU (0xFFFD4014) ;- (SSC1) Receive Frame Mode Register
-AT91C_SSC1_CMR EQU (0xFFFD4004) ;- (SSC1) Clock Mode Register
-AT91C_SSC1_IDR EQU (0xFFFD4048) ;- (SSC1) Interrupt Disable Register
-AT91C_SSC1_SR EQU (0xFFFD4040) ;- (SSC1) Status Register
-AT91C_SSC1_RC0R EQU (0xFFFD4038) ;- (SSC1) Receive Compare 0 Register
-AT91C_SSC1_RSHR EQU (0xFFFD4030) ;- (SSC1) Receive Sync Holding Register
-AT91C_SSC1_RHR EQU (0xFFFD4020) ;- (SSC1) Receive Holding Register
-AT91C_SSC1_TCMR EQU (0xFFFD4018) ;- (SSC1) Transmit Clock Mode Register
-AT91C_SSC1_RCMR EQU (0xFFFD4010) ;- (SSC1) Receive Clock ModeRegister
-AT91C_SSC1_CR EQU (0xFFFD4000) ;- (SSC1) Control Register
-AT91C_SSC1_IMR EQU (0xFFFD404C) ;- (SSC1) Interrupt Mask Register
-AT91C_SSC1_IER EQU (0xFFFD4044) ;- (SSC1) Interrupt Enable Register
-AT91C_SSC1_RC1R EQU (0xFFFD403C) ;- (SSC1) Receive Compare 1 Register
-AT91C_SSC1_TSHR EQU (0xFFFD4034) ;- (SSC1) Transmit Sync Holding Register
-AT91C_SSC1_THR EQU (0xFFFD4024) ;- (SSC1) Transmit Holding Register
-AT91C_SSC1_TFMR EQU (0xFFFD401C) ;- (SSC1) Transmit Frame Mode Register
-;- ========== Register definition for PDC_SSC0 peripheral ==========
-AT91C_SSC0_PTCR EQU (0xFFFD0120) ;- (PDC_SSC0) PDC Transfer Control Register
-AT91C_SSC0_TNPR EQU (0xFFFD0118) ;- (PDC_SSC0) Transmit Next Pointer Register
-AT91C_SSC0_RNPR EQU (0xFFFD0110) ;- (PDC_SSC0) Receive Next Pointer Register
-AT91C_SSC0_TPR EQU (0xFFFD0108) ;- (PDC_SSC0) Transmit Pointer Register
-AT91C_SSC0_RPR EQU (0xFFFD0100) ;- (PDC_SSC0) Receive Pointer Register
-AT91C_SSC0_PTSR EQU (0xFFFD0124) ;- (PDC_SSC0) PDC Transfer Status Register
-AT91C_SSC0_TNCR EQU (0xFFFD011C) ;- (PDC_SSC0) Transmit Next Counter Register
-AT91C_SSC0_RNCR EQU (0xFFFD0114) ;- (PDC_SSC0) Receive Next Counter Register
-AT91C_SSC0_TCR EQU (0xFFFD010C) ;- (PDC_SSC0) Transmit Counter Register
-AT91C_SSC0_RCR EQU (0xFFFD0104) ;- (PDC_SSC0) Receive Counter Register
-;- ========== Register definition for SSC0 peripheral ==========
-AT91C_SSC0_IMR EQU (0xFFFD004C) ;- (SSC0) Interrupt Mask Register
-AT91C_SSC0_IER EQU (0xFFFD0044) ;- (SSC0) Interrupt Enable Register
-AT91C_SSC0_RC1R EQU (0xFFFD003C) ;- (SSC0) Receive Compare 1 Register
-AT91C_SSC0_TSHR EQU (0xFFFD0034) ;- (SSC0) Transmit Sync Holding Register
-AT91C_SSC0_THR EQU (0xFFFD0024) ;- (SSC0) Transmit Holding Register
-AT91C_SSC0_TFMR EQU (0xFFFD001C) ;- (SSC0) Transmit Frame Mode Register
-AT91C_SSC0_RFMR EQU (0xFFFD0014) ;- (SSC0) Receive Frame Mode Register
-AT91C_SSC0_CMR EQU (0xFFFD0004) ;- (SSC0) Clock Mode Register
-AT91C_SSC0_IDR EQU (0xFFFD0048) ;- (SSC0) Interrupt Disable Register
-AT91C_SSC0_SR EQU (0xFFFD0040) ;- (SSC0) Status Register
-AT91C_SSC0_RC0R EQU (0xFFFD0038) ;- (SSC0) Receive Compare 0 Register
-AT91C_SSC0_RSHR EQU (0xFFFD0030) ;- (SSC0) Receive Sync Holding Register
-AT91C_SSC0_RHR EQU (0xFFFD0020) ;- (SSC0) Receive Holding Register
-AT91C_SSC0_TCMR EQU (0xFFFD0018) ;- (SSC0) Transmit Clock Mode Register
-AT91C_SSC0_RCMR EQU (0xFFFD0010) ;- (SSC0) Receive Clock ModeRegister
-AT91C_SSC0_CR EQU (0xFFFD0000) ;- (SSC0) Control Register
-;- ========== Register definition for PDC_US3 peripheral ==========
-AT91C_US3_PTSR EQU (0xFFFCC124) ;- (PDC_US3) PDC Transfer Status Register
-AT91C_US3_TNCR EQU (0xFFFCC11C) ;- (PDC_US3) Transmit Next Counter Register
-AT91C_US3_RNCR EQU (0xFFFCC114) ;- (PDC_US3) Receive Next Counter Register
-AT91C_US3_TCR EQU (0xFFFCC10C) ;- (PDC_US3) Transmit Counter Register
-AT91C_US3_RCR EQU (0xFFFCC104) ;- (PDC_US3) Receive Counter Register
-AT91C_US3_PTCR EQU (0xFFFCC120) ;- (PDC_US3) PDC Transfer Control Register
-AT91C_US3_TNPR EQU (0xFFFCC118) ;- (PDC_US3) Transmit Next Pointer Register
-AT91C_US3_RNPR EQU (0xFFFCC110) ;- (PDC_US3) Receive Next Pointer Register
-AT91C_US3_TPR EQU (0xFFFCC108) ;- (PDC_US3) Transmit Pointer Register
-AT91C_US3_RPR EQU (0xFFFCC100) ;- (PDC_US3) Receive Pointer Register
-;- ========== Register definition for US3 peripheral ==========
-AT91C_US3_IF EQU (0xFFFCC04C) ;- (US3) IRDA_FILTER Register
-AT91C_US3_NER EQU (0xFFFCC044) ;- (US3) Nb Errors Register
-AT91C_US3_RTOR EQU (0xFFFCC024) ;- (US3) Receiver Time-out Register
-AT91C_US3_THR EQU (0xFFFCC01C) ;- (US3) Transmitter Holding Register
-AT91C_US3_CSR EQU (0xFFFCC014) ;- (US3) Channel Status Register
-AT91C_US3_IDR EQU (0xFFFCC00C) ;- (US3) Interrupt Disable Register
-AT91C_US3_MR EQU (0xFFFCC004) ;- (US3) Mode Register
-AT91C_US3_XXR EQU (0xFFFCC048) ;- (US3) XON_XOFF Register
-AT91C_US3_FIDI EQU (0xFFFCC040) ;- (US3) FI_DI_Ratio Register
-AT91C_US3_TTGR EQU (0xFFFCC028) ;- (US3) Transmitter Time-guard Register
-AT91C_US3_BRGR EQU (0xFFFCC020) ;- (US3) Baud Rate Generator Register
-AT91C_US3_RHR EQU (0xFFFCC018) ;- (US3) Receiver Holding Register
-AT91C_US3_IMR EQU (0xFFFCC010) ;- (US3) Interrupt Mask Register
-AT91C_US3_IER EQU (0xFFFCC008) ;- (US3) Interrupt Enable Register
-AT91C_US3_CR EQU (0xFFFCC000) ;- (US3) Control Register
-;- ========== Register definition for PDC_US2 peripheral ==========
-AT91C_US2_PTSR EQU (0xFFFC8124) ;- (PDC_US2) PDC Transfer Status Register
-AT91C_US2_TNCR EQU (0xFFFC811C) ;- (PDC_US2) Transmit Next Counter Register
-AT91C_US2_RNCR EQU (0xFFFC8114) ;- (PDC_US2) Receive Next Counter Register
-AT91C_US2_TCR EQU (0xFFFC810C) ;- (PDC_US2) Transmit Counter Register
-AT91C_US2_PTCR EQU (0xFFFC8120) ;- (PDC_US2) PDC Transfer Control Register
-AT91C_US2_RCR EQU (0xFFFC8104) ;- (PDC_US2) Receive Counter Register
-AT91C_US2_TNPR EQU (0xFFFC8118) ;- (PDC_US2) Transmit Next Pointer Register
-AT91C_US2_RPR EQU (0xFFFC8100) ;- (PDC_US2) Receive Pointer Register
-AT91C_US2_TPR EQU (0xFFFC8108) ;- (PDC_US2) Transmit Pointer Register
-AT91C_US2_RNPR EQU (0xFFFC8110) ;- (PDC_US2) Receive Next Pointer Register
-;- ========== Register definition for US2 peripheral ==========
-AT91C_US2_XXR EQU (0xFFFC8048) ;- (US2) XON_XOFF Register
-AT91C_US2_FIDI EQU (0xFFFC8040) ;- (US2) FI_DI_Ratio Register
-AT91C_US2_TTGR EQU (0xFFFC8028) ;- (US2) Transmitter Time-guard Register
-AT91C_US2_BRGR EQU (0xFFFC8020) ;- (US2) Baud Rate Generator Register
-AT91C_US2_RHR EQU (0xFFFC8018) ;- (US2) Receiver Holding Register
-AT91C_US2_IMR EQU (0xFFFC8010) ;- (US2) Interrupt Mask Register
-AT91C_US2_IER EQU (0xFFFC8008) ;- (US2) Interrupt Enable Register
-AT91C_US2_CR EQU (0xFFFC8000) ;- (US2) Control Register
-AT91C_US2_IF EQU (0xFFFC804C) ;- (US2) IRDA_FILTER Register
-AT91C_US2_NER EQU (0xFFFC8044) ;- (US2) Nb Errors Register
-AT91C_US2_RTOR EQU (0xFFFC8024) ;- (US2) Receiver Time-out Register
-AT91C_US2_THR EQU (0xFFFC801C) ;- (US2) Transmitter Holding Register
-AT91C_US2_CSR EQU (0xFFFC8014) ;- (US2) Channel Status Register
-AT91C_US2_IDR EQU (0xFFFC800C) ;- (US2) Interrupt Disable Register
-AT91C_US2_MR EQU (0xFFFC8004) ;- (US2) Mode Register
-;- ========== Register definition for PDC_US1 peripheral ==========
-AT91C_US1_PTSR EQU (0xFFFC4124) ;- (PDC_US1) PDC Transfer Status Register
-AT91C_US1_TNCR EQU (0xFFFC411C) ;- (PDC_US1) Transmit Next Counter Register
-AT91C_US1_RNCR EQU (0xFFFC4114) ;- (PDC_US1) Receive Next Counter Register
-AT91C_US1_TCR EQU (0xFFFC410C) ;- (PDC_US1) Transmit Counter Register
-AT91C_US1_RCR EQU (0xFFFC4104) ;- (PDC_US1) Receive Counter Register
-AT91C_US1_PTCR EQU (0xFFFC4120) ;- (PDC_US1) PDC Transfer Control Register
-AT91C_US1_TNPR EQU (0xFFFC4118) ;- (PDC_US1) Transmit Next Pointer Register
-AT91C_US1_RNPR EQU (0xFFFC4110) ;- (PDC_US1) Receive Next Pointer Register
-AT91C_US1_TPR EQU (0xFFFC4108) ;- (PDC_US1) Transmit Pointer Register
-AT91C_US1_RPR EQU (0xFFFC4100) ;- (PDC_US1) Receive Pointer Register
-;- ========== Register definition for US1 peripheral ==========
-AT91C_US1_XXR EQU (0xFFFC4048) ;- (US1) XON_XOFF Register
-AT91C_US1_RHR EQU (0xFFFC4018) ;- (US1) Receiver Holding Register
-AT91C_US1_IMR EQU (0xFFFC4010) ;- (US1) Interrupt Mask Register
-AT91C_US1_IER EQU (0xFFFC4008) ;- (US1) Interrupt Enable Register
-AT91C_US1_CR EQU (0xFFFC4000) ;- (US1) Control Register
-AT91C_US1_RTOR EQU (0xFFFC4024) ;- (US1) Receiver Time-out Register
-AT91C_US1_THR EQU (0xFFFC401C) ;- (US1) Transmitter Holding Register
-AT91C_US1_CSR EQU (0xFFFC4014) ;- (US1) Channel Status Register
-AT91C_US1_IDR EQU (0xFFFC400C) ;- (US1) Interrupt Disable Register
-AT91C_US1_FIDI EQU (0xFFFC4040) ;- (US1) FI_DI_Ratio Register
-AT91C_US1_BRGR EQU (0xFFFC4020) ;- (US1) Baud Rate Generator Register
-AT91C_US1_TTGR EQU (0xFFFC4028) ;- (US1) Transmitter Time-guard Register
-AT91C_US1_IF EQU (0xFFFC404C) ;- (US1) IRDA_FILTER Register
-AT91C_US1_NER EQU (0xFFFC4044) ;- (US1) Nb Errors Register
-AT91C_US1_MR EQU (0xFFFC4004) ;- (US1) Mode Register
-;- ========== Register definition for PDC_US0 peripheral ==========
-AT91C_US0_PTCR EQU (0xFFFC0120) ;- (PDC_US0) PDC Transfer Control Register
-AT91C_US0_TNPR EQU (0xFFFC0118) ;- (PDC_US0) Transmit Next Pointer Register
-AT91C_US0_RNPR EQU (0xFFFC0110) ;- (PDC_US0) Receive Next Pointer Register
-AT91C_US0_TPR EQU (0xFFFC0108) ;- (PDC_US0) Transmit Pointer Register
-AT91C_US0_RPR EQU (0xFFFC0100) ;- (PDC_US0) Receive Pointer Register
-AT91C_US0_PTSR EQU (0xFFFC0124) ;- (PDC_US0) PDC Transfer Status Register
-AT91C_US0_TNCR EQU (0xFFFC011C) ;- (PDC_US0) Transmit Next Counter Register
-AT91C_US0_RNCR EQU (0xFFFC0114) ;- (PDC_US0) Receive Next Counter Register
-AT91C_US0_TCR EQU (0xFFFC010C) ;- (PDC_US0) Transmit Counter Register
-AT91C_US0_RCR EQU (0xFFFC0104) ;- (PDC_US0) Receive Counter Register
-;- ========== Register definition for US0 peripheral ==========
-AT91C_US0_TTGR EQU (0xFFFC0028) ;- (US0) Transmitter Time-guard Register
-AT91C_US0_BRGR EQU (0xFFFC0020) ;- (US0) Baud Rate Generator Register
-AT91C_US0_RHR EQU (0xFFFC0018) ;- (US0) Receiver Holding Register
-AT91C_US0_IMR EQU (0xFFFC0010) ;- (US0) Interrupt Mask Register
-AT91C_US0_NER EQU (0xFFFC0044) ;- (US0) Nb Errors Register
-AT91C_US0_RTOR EQU (0xFFFC0024) ;- (US0) Receiver Time-out Register
-AT91C_US0_XXR EQU (0xFFFC0048) ;- (US0) XON_XOFF Register
-AT91C_US0_FIDI EQU (0xFFFC0040) ;- (US0) FI_DI_Ratio Register
-AT91C_US0_CR EQU (0xFFFC0000) ;- (US0) Control Register
-AT91C_US0_IER EQU (0xFFFC0008) ;- (US0) Interrupt Enable Register
-AT91C_US0_IF EQU (0xFFFC004C) ;- (US0) IRDA_FILTER Register
-AT91C_US0_MR EQU (0xFFFC0004) ;- (US0) Mode Register
-AT91C_US0_IDR EQU (0xFFFC000C) ;- (US0) Interrupt Disable Register
-AT91C_US0_CSR EQU (0xFFFC0014) ;- (US0) Channel Status Register
-AT91C_US0_THR EQU (0xFFFC001C) ;- (US0) Transmitter Holding Register
-;- ========== Register definition for TWI peripheral ==========
-AT91C_TWI_RHR EQU (0xFFFB8030) ;- (TWI) Receive Holding Register
-AT91C_TWI_IDR EQU (0xFFFB8028) ;- (TWI) Interrupt Disable Register
-AT91C_TWI_SR EQU (0xFFFB8020) ;- (TWI) Status Register
-AT91C_TWI_CWGR EQU (0xFFFB8010) ;- (TWI) Clock Waveform Generator Register
-AT91C_TWI_SMR EQU (0xFFFB8008) ;- (TWI) Slave Mode Register
-AT91C_TWI_CR EQU (0xFFFB8000) ;- (TWI) Control Register
-AT91C_TWI_THR EQU (0xFFFB8034) ;- (TWI) Transmit Holding Register
-AT91C_TWI_IMR EQU (0xFFFB802C) ;- (TWI) Interrupt Mask Register
-AT91C_TWI_IER EQU (0xFFFB8024) ;- (TWI) Interrupt Enable Register
-AT91C_TWI_IADR EQU (0xFFFB800C) ;- (TWI) Internal Address Register
-AT91C_TWI_MMR EQU (0xFFFB8004) ;- (TWI) Master Mode Register
-;- ========== Register definition for PDC_MCI peripheral ==========
-AT91C_MCI_PTCR EQU (0xFFFB4120) ;- (PDC_MCI) PDC Transfer Control Register
-AT91C_MCI_TNPR EQU (0xFFFB4118) ;- (PDC_MCI) Transmit Next Pointer Register
-AT91C_MCI_RNPR EQU (0xFFFB4110) ;- (PDC_MCI) Receive Next Pointer Register
-AT91C_MCI_TPR EQU (0xFFFB4108) ;- (PDC_MCI) Transmit Pointer Register
-AT91C_MCI_RPR EQU (0xFFFB4100) ;- (PDC_MCI) Receive Pointer Register
-AT91C_MCI_PTSR EQU (0xFFFB4124) ;- (PDC_MCI) PDC Transfer Status Register
-AT91C_MCI_TNCR EQU (0xFFFB411C) ;- (PDC_MCI) Transmit Next Counter Register
-AT91C_MCI_RNCR EQU (0xFFFB4114) ;- (PDC_MCI) Receive Next Counter Register
-AT91C_MCI_TCR EQU (0xFFFB410C) ;- (PDC_MCI) Transmit Counter Register
-AT91C_MCI_RCR EQU (0xFFFB4104) ;- (PDC_MCI) Receive Counter Register
-;- ========== Register definition for MCI peripheral ==========
-AT91C_MCI_IDR EQU (0xFFFB4048) ;- (MCI) MCI Interrupt Disable Register
-AT91C_MCI_SR EQU (0xFFFB4040) ;- (MCI) MCI Status Register
-AT91C_MCI_RDR EQU (0xFFFB4030) ;- (MCI) MCI Receive Data Register
-AT91C_MCI_RSPR EQU (0xFFFB4020) ;- (MCI) MCI Response Register
-AT91C_MCI_ARGR EQU (0xFFFB4010) ;- (MCI) MCI Argument Register
-AT91C_MCI_DTOR EQU (0xFFFB4008) ;- (MCI) MCI Data Timeout Register
-AT91C_MCI_CR EQU (0xFFFB4000) ;- (MCI) MCI Control Register
-AT91C_MCI_IMR EQU (0xFFFB404C) ;- (MCI) MCI Interrupt Mask Register
-AT91C_MCI_IER EQU (0xFFFB4044) ;- (MCI) MCI Interrupt Enable Register
-AT91C_MCI_TDR EQU (0xFFFB4034) ;- (MCI) MCI Transmit Data Register
-AT91C_MCI_CMDR EQU (0xFFFB4014) ;- (MCI) MCI Command Register
-AT91C_MCI_SDCR EQU (0xFFFB400C) ;- (MCI) MCI SD Card Register
-AT91C_MCI_MR EQU (0xFFFB4004) ;- (MCI) MCI Mode Register
-;- ========== Register definition for UDP peripheral ==========
-AT91C_UDP_ISR EQU (0xFFFB001C) ;- (UDP) Interrupt Status Register
-AT91C_UDP_IDR EQU (0xFFFB0014) ;- (UDP) Interrupt Disable Register
-AT91C_UDP_GLBSTATE EQU (0xFFFB0004) ;- (UDP) Global State Register
-AT91C_UDP_FDR EQU (0xFFFB0050) ;- (UDP) Endpoint FIFO Data Register
-AT91C_UDP_CSR EQU (0xFFFB0030) ;- (UDP) Endpoint Control and Status Register
-AT91C_UDP_RSTEP EQU (0xFFFB0028) ;- (UDP) Reset Endpoint Register
-AT91C_UDP_ICR EQU (0xFFFB0020) ;- (UDP) Interrupt Clear Register
-AT91C_UDP_IMR EQU (0xFFFB0018) ;- (UDP) Interrupt Mask Register
-AT91C_UDP_IER EQU (0xFFFB0010) ;- (UDP) Interrupt Enable Register
-AT91C_UDP_FADDR EQU (0xFFFB0008) ;- (UDP) Function Address Register
-AT91C_UDP_NUM EQU (0xFFFB0000) ;- (UDP) Frame Number Register
-;- ========== Register definition for TC5 peripheral ==========
-AT91C_TC5_CMR EQU (0xFFFA4084) ;- (TC5) Channel Mode Register
-AT91C_TC5_IDR EQU (0xFFFA40A8) ;- (TC5) Interrupt Disable Register
-AT91C_TC5_SR EQU (0xFFFA40A0) ;- (TC5) Status Register
-AT91C_TC5_RB EQU (0xFFFA4098) ;- (TC5) Register B
-AT91C_TC5_CV EQU (0xFFFA4090) ;- (TC5) Counter Value
-AT91C_TC5_CCR EQU (0xFFFA4080) ;- (TC5) Channel Control Register
-AT91C_TC5_IMR EQU (0xFFFA40AC) ;- (TC5) Interrupt Mask Register
-AT91C_TC5_IER EQU (0xFFFA40A4) ;- (TC5) Interrupt Enable Register
-AT91C_TC5_RC EQU (0xFFFA409C) ;- (TC5) Register C
-AT91C_TC5_RA EQU (0xFFFA4094) ;- (TC5) Register A
-;- ========== Register definition for TC4 peripheral ==========
-AT91C_TC4_IMR EQU (0xFFFA406C) ;- (TC4) Interrupt Mask Register
-AT91C_TC4_IER EQU (0xFFFA4064) ;- (TC4) Interrupt Enable Register
-AT91C_TC4_RC EQU (0xFFFA405C) ;- (TC4) Register C
-AT91C_TC4_RA EQU (0xFFFA4054) ;- (TC4) Register A
-AT91C_TC4_CMR EQU (0xFFFA4044) ;- (TC4) Channel Mode Register
-AT91C_TC4_IDR EQU (0xFFFA4068) ;- (TC4) Interrupt Disable Register
-AT91C_TC4_SR EQU (0xFFFA4060) ;- (TC4) Status Register
-AT91C_TC4_RB EQU (0xFFFA4058) ;- (TC4) Register B
-AT91C_TC4_CV EQU (0xFFFA4050) ;- (TC4) Counter Value
-AT91C_TC4_CCR EQU (0xFFFA4040) ;- (TC4) Channel Control Register
-;- ========== Register definition for TC3 peripheral ==========
-AT91C_TC3_IMR EQU (0xFFFA402C) ;- (TC3) Interrupt Mask Register
-AT91C_TC3_CV EQU (0xFFFA4010) ;- (TC3) Counter Value
-AT91C_TC3_CCR EQU (0xFFFA4000) ;- (TC3) Channel Control Register
-AT91C_TC3_IER EQU (0xFFFA4024) ;- (TC3) Interrupt Enable Register
-AT91C_TC3_CMR EQU (0xFFFA4004) ;- (TC3) Channel Mode Register
-AT91C_TC3_RA EQU (0xFFFA4014) ;- (TC3) Register A
-AT91C_TC3_RC EQU (0xFFFA401C) ;- (TC3) Register C
-AT91C_TC3_IDR EQU (0xFFFA4028) ;- (TC3) Interrupt Disable Register
-AT91C_TC3_RB EQU (0xFFFA4018) ;- (TC3) Register B
-AT91C_TC3_SR EQU (0xFFFA4020) ;- (TC3) Status Register
-;- ========== Register definition for TCB1 peripheral ==========
-AT91C_TCB1_BCR EQU (0xFFFA4140) ;- (TCB1) TC Block Control Register
-AT91C_TCB1_BMR EQU (0xFFFA4144) ;- (TCB1) TC Block Mode Register
-;- ========== Register definition for TC2 peripheral ==========
-AT91C_TC2_IMR EQU (0xFFFA00AC) ;- (TC2) Interrupt Mask Register
-AT91C_TC2_IER EQU (0xFFFA00A4) ;- (TC2) Interrupt Enable Register
-AT91C_TC2_RC EQU (0xFFFA009C) ;- (TC2) Register C
-AT91C_TC2_RA EQU (0xFFFA0094) ;- (TC2) Register A
-AT91C_TC2_CMR EQU (0xFFFA0084) ;- (TC2) Channel Mode Register
-AT91C_TC2_IDR EQU (0xFFFA00A8) ;- (TC2) Interrupt Disable Register
-AT91C_TC2_SR EQU (0xFFFA00A0) ;- (TC2) Status Register
-AT91C_TC2_RB EQU (0xFFFA0098) ;- (TC2) Register B
-AT91C_TC2_CV EQU (0xFFFA0090) ;- (TC2) Counter Value
-AT91C_TC2_CCR EQU (0xFFFA0080) ;- (TC2) Channel Control Register
-;- ========== Register definition for TC1 peripheral ==========
-AT91C_TC1_IMR EQU (0xFFFA006C) ;- (TC1) Interrupt Mask Register
-AT91C_TC1_IER EQU (0xFFFA0064) ;- (TC1) Interrupt Enable Register
-AT91C_TC1_RC EQU (0xFFFA005C) ;- (TC1) Register C
-AT91C_TC1_RA EQU (0xFFFA0054) ;- (TC1) Register A
-AT91C_TC1_CMR EQU (0xFFFA0044) ;- (TC1) Channel Mode Register
-AT91C_TC1_IDR EQU (0xFFFA0068) ;- (TC1) Interrupt Disable Register
-AT91C_TC1_SR EQU (0xFFFA0060) ;- (TC1) Status Register
-AT91C_TC1_RB EQU (0xFFFA0058) ;- (TC1) Register B
-AT91C_TC1_CV EQU (0xFFFA0050) ;- (TC1) Counter Value
-AT91C_TC1_CCR EQU (0xFFFA0040) ;- (TC1) Channel Control Register
-;- ========== Register definition for TC0 peripheral ==========
-AT91C_TC0_IMR EQU (0xFFFA002C) ;- (TC0) Interrupt Mask Register
-AT91C_TC0_IER EQU (0xFFFA0024) ;- (TC0) Interrupt Enable Register
-AT91C_TC0_RC EQU (0xFFFA001C) ;- (TC0) Register C
-AT91C_TC0_RA EQU (0xFFFA0014) ;- (TC0) Register A
-AT91C_TC0_CMR EQU (0xFFFA0004) ;- (TC0) Channel Mode Register
-AT91C_TC0_IDR EQU (0xFFFA0028) ;- (TC0) Interrupt Disable Register
-AT91C_TC0_SR EQU (0xFFFA0020) ;- (TC0) Status Register
-AT91C_TC0_RB EQU (0xFFFA0018) ;- (TC0) Register B
-AT91C_TC0_CV EQU (0xFFFA0010) ;- (TC0) Counter Value
-AT91C_TC0_CCR EQU (0xFFFA0000) ;- (TC0) Channel Control Register
-;- ========== Register definition for TCB0 peripheral ==========
-AT91C_TCB0_BMR EQU (0xFFFA00C4) ;- (TCB0) TC Block Mode Register
-AT91C_TCB0_BCR EQU (0xFFFA00C0) ;- (TCB0) TC Block Control Register
-;- ========== Register definition for UHP peripheral ==========
-AT91C_UHP_HcRhDescriptorA EQU (0x00300048) ;- (UHP) Root Hub characteristics A
-AT91C_UHP_HcRhPortStatus EQU (0x00300054) ;- (UHP) Root Hub Port Status Register
-AT91C_UHP_HcRhDescriptorB EQU (0x0030004C) ;- (UHP) Root Hub characteristics B
-AT91C_UHP_HcControl EQU (0x00300004) ;- (UHP) Operating modes for the Host Controller
-AT91C_UHP_HcInterruptStatus EQU (0x0030000C) ;- (UHP) Interrupt Status Register
-AT91C_UHP_HcRhStatus EQU (0x00300050) ;- (UHP) Root Hub Status register
-AT91C_UHP_HcRevision EQU (0x00300000) ;- (UHP) Revision
-AT91C_UHP_HcCommandStatus EQU (0x00300008) ;- (UHP) Command & status Register
-AT91C_UHP_HcInterruptEnable EQU (0x00300010) ;- (UHP) Interrupt Enable Register
-AT91C_UHP_HcHCCA EQU (0x00300018) ;- (UHP) Pointer to the Host Controller Communication Area
-AT91C_UHP_HcControlHeadED EQU (0x00300020) ;- (UHP) First Endpoint Descriptor of the Control list
-AT91C_UHP_HcInterruptDisable EQU (0x00300014) ;- (UHP) Interrupt Disable Register
-AT91C_UHP_HcPeriodCurrentED EQU (0x0030001C) ;- (UHP) Current Isochronous or Interrupt Endpoint Descriptor
-AT91C_UHP_HcControlCurrentED EQU (0x00300024) ;- (UHP) Endpoint Control and Status Register
-AT91C_UHP_HcBulkCurrentED EQU (0x0030002C) ;- (UHP) Current endpoint of the Bulk list
-AT91C_UHP_HcFmInterval EQU (0x00300034) ;- (UHP) Bit time between 2 consecutive SOFs
-AT91C_UHP_HcBulkHeadED EQU (0x00300028) ;- (UHP) First endpoint register of the Bulk list
-AT91C_UHP_HcBulkDoneHead EQU (0x00300030) ;- (UHP) Last completed transfer descriptor
-AT91C_UHP_HcFmRemaining EQU (0x00300038) ;- (UHP) Bit time remaining in the current Frame
-AT91C_UHP_HcPeriodicStart EQU (0x00300040) ;- (UHP) Periodic Start
-AT91C_UHP_HcLSThreshold EQU (0x00300044) ;- (UHP) LS Threshold
-AT91C_UHP_HcFmNumber EQU (0x0030003C) ;- (UHP) Frame number
-;- ========== Register definition for EMAC peripheral ==========
-AT91C_EMAC_RSR EQU (0xFFFBC020) ;- (EMAC) Receive Status Register
-AT91C_EMAC_MAN EQU (0xFFFBC034) ;- (EMAC) PHY Maintenance Register
-AT91C_EMAC_HSH EQU (0xFFFBC090) ;- (EMAC) Hash Address High[63:32]
-AT91C_EMAC_MCOL EQU (0xFFFBC048) ;- (EMAC) Multiple Collision Frame Register
-AT91C_EMAC_IER EQU (0xFFFBC028) ;- (EMAC) Interrupt Enable Register
-AT91C_EMAC_SA2H EQU (0xFFFBC0A4) ;- (EMAC) Specific Address 2 High, Last 2 bytes
-AT91C_EMAC_HSL EQU (0xFFFBC094) ;- (EMAC) Hash Address Low[31:0]
-AT91C_EMAC_LCOL EQU (0xFFFBC05C) ;- (EMAC) Late Collision Register
-AT91C_EMAC_OK EQU (0xFFFBC04C) ;- (EMAC) Frames Received OK Register
-AT91C_EMAC_CFG EQU (0xFFFBC004) ;- (EMAC) Network Configuration Register
-AT91C_EMAC_SA3L EQU (0xFFFBC0A8) ;- (EMAC) Specific Address 3 Low, First 4 bytes
-AT91C_EMAC_SEQE EQU (0xFFFBC050) ;- (EMAC) Frame Check Sequence Error Register
-AT91C_EMAC_ECOL EQU (0xFFFBC060) ;- (EMAC) Excessive Collision Register
-AT91C_EMAC_ELR EQU (0xFFFBC070) ;- (EMAC) Excessive Length Error Register
-AT91C_EMAC_SR EQU (0xFFFBC008) ;- (EMAC) Network Status Register
-AT91C_EMAC_RBQP EQU (0xFFFBC018) ;- (EMAC) Receive Buffer Queue Pointer
-AT91C_EMAC_CSE EQU (0xFFFBC064) ;- (EMAC) Carrier Sense Error Register
-AT91C_EMAC_RJB EQU (0xFFFBC074) ;- (EMAC) Receive Jabber Register
-AT91C_EMAC_USF EQU (0xFFFBC078) ;- (EMAC) Undersize Frame Register
-AT91C_EMAC_IDR EQU (0xFFFBC02C) ;- (EMAC) Interrupt Disable Register
-AT91C_EMAC_SA1L EQU (0xFFFBC098) ;- (EMAC) Specific Address 1 Low, First 4 bytes
-AT91C_EMAC_IMR EQU (0xFFFBC030) ;- (EMAC) Interrupt Mask Register
-AT91C_EMAC_FRA EQU (0xFFFBC040) ;- (EMAC) Frames Transmitted OK Register
-AT91C_EMAC_SA3H EQU (0xFFFBC0AC) ;- (EMAC) Specific Address 3 High, Last 2 bytes
-AT91C_EMAC_SA1H EQU (0xFFFBC09C) ;- (EMAC) Specific Address 1 High, Last 2 bytes
-AT91C_EMAC_SCOL EQU (0xFFFBC044) ;- (EMAC) Single Collision Frame Register
-AT91C_EMAC_ALE EQU (0xFFFBC054) ;- (EMAC) Alignment Error Register
-AT91C_EMAC_TAR EQU (0xFFFBC00C) ;- (EMAC) Transmit Address Register
-AT91C_EMAC_SA4L EQU (0xFFFBC0B0) ;- (EMAC) Specific Address 4 Low, First 4 bytes
-AT91C_EMAC_SA2L EQU (0xFFFBC0A0) ;- (EMAC) Specific Address 2 Low, First 4 bytes
-AT91C_EMAC_TUE EQU (0xFFFBC068) ;- (EMAC) Transmit Underrun Error Register
-AT91C_EMAC_DTE EQU (0xFFFBC058) ;- (EMAC) Deferred Transmission Frame Register
-AT91C_EMAC_TCR EQU (0xFFFBC010) ;- (EMAC) Transmit Control Register
-AT91C_EMAC_CTL EQU (0xFFFBC000) ;- (EMAC) Network Control Register
-AT91C_EMAC_SA4H EQU (0xFFFBC0B4) ;- (EMAC) Specific Address 4 High, Last 2 bytesr
-AT91C_EMAC_CDE EQU (0xFFFBC06C) ;- (EMAC) Code Error Register
-AT91C_EMAC_SQEE EQU (0xFFFBC07C) ;- (EMAC) SQE Test Error Register
-AT91C_EMAC_TSR EQU (0xFFFBC014) ;- (EMAC) Transmit Status Register
-AT91C_EMAC_DRFC EQU (0xFFFBC080) ;- (EMAC) Discarded RX Frame Register
-;- ========== Register definition for EBI peripheral ==========
-AT91C_EBI_CFGR EQU (0xFFFFFF64) ;- (EBI) Configuration Register
-AT91C_EBI_CSA EQU (0xFFFFFF60) ;- (EBI) Chip Select Assignment Register
-;- ========== Register definition for SMC2 peripheral ==========
-AT91C_SMC2_CSR EQU (0xFFFFFF70) ;- (SMC2) SMC2 Chip Select Register
-;- ========== Register definition for SDRC peripheral ==========
-AT91C_SDRC_IMR EQU (0xFFFFFFAC) ;- (SDRC) SDRAM Controller Interrupt Mask Register
-AT91C_SDRC_IER EQU (0xFFFFFFA4) ;- (SDRC) SDRAM Controller Interrupt Enable Register
-AT91C_SDRC_SRR EQU (0xFFFFFF9C) ;- (SDRC) SDRAM Controller Self Refresh Register
-AT91C_SDRC_TR EQU (0xFFFFFF94) ;- (SDRC) SDRAM Controller Refresh Timer Register
-AT91C_SDRC_ISR EQU (0xFFFFFFB0) ;- (SDRC) SDRAM Controller Interrupt Mask Register
-AT91C_SDRC_IDR EQU (0xFFFFFFA8) ;- (SDRC) SDRAM Controller Interrupt Disable Register
-AT91C_SDRC_LPR EQU (0xFFFFFFA0) ;- (SDRC) SDRAM Controller Low Power Register
-AT91C_SDRC_CR EQU (0xFFFFFF98) ;- (SDRC) SDRAM Controller Configuration Register
-AT91C_SDRC_MR EQU (0xFFFFFF90) ;- (SDRC) SDRAM Controller Mode Register
-;- ========== Register definition for BFC peripheral ==========
-AT91C_BFC_MR EQU (0xFFFFFFC0) ;- (BFC) BFC Mode Register
-
-;- *****************************************************************************
-;- PIO DEFINITIONS FOR AT91RM9200
-;- *****************************************************************************
-AT91C_PIO_PA0 EQU (1:SHL:0) ;- Pin Controlled by PA0
-AT91C_PA0_MISO EQU (AT91C_PIO_PA0) ;- SPI Master In Slave
-AT91C_PA0_PCK3 EQU (AT91C_PIO_PA0) ;- PMC Programmable Clock Output 3
-AT91C_PIO_PA1 EQU (1:SHL:1) ;- Pin Controlled by PA1
-AT91C_PA1_MOSI EQU (AT91C_PIO_PA1) ;- SPI Master Out Slave
-AT91C_PA1_PCK0 EQU (AT91C_PIO_PA1) ;- PMC Programmable Clock Output 0
-AT91C_PIO_PA10 EQU (1:SHL:10) ;- Pin Controlled by PA10
-AT91C_PA10_ETX1 EQU (AT91C_PIO_PA10) ;- Ethernet MAC Transmit Data 1
-AT91C_PA10_MCDB1 EQU (AT91C_PIO_PA10) ;- Multimedia Card B Data 1
-AT91C_PIO_PA11 EQU (1:SHL:11) ;- Pin Controlled by PA11
-AT91C_PA11_ECRS_ECRSDV EQU (AT91C_PIO_PA11) ;- Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
-AT91C_PA11_MCDB2 EQU (AT91C_PIO_PA11) ;- Multimedia Card B Data 2
-AT91C_PIO_PA12 EQU (1:SHL:12) ;- Pin Controlled by PA12
-AT91C_PA12_ERX0 EQU (AT91C_PIO_PA12) ;- Ethernet MAC Receive Data 0
-AT91C_PA12_MCDB3 EQU (AT91C_PIO_PA12) ;- Multimedia Card B Data 3
-AT91C_PIO_PA13 EQU (1:SHL:13) ;- Pin Controlled by PA13
-AT91C_PA13_ERX1 EQU (AT91C_PIO_PA13) ;- Ethernet MAC Receive Data 1
-AT91C_PA13_TCLK0 EQU (AT91C_PIO_PA13) ;- Timer Counter 0 external clock input
-AT91C_PIO_PA14 EQU (1:SHL:14) ;- Pin Controlled by PA14
-AT91C_PA14_ERXER EQU (AT91C_PIO_PA14) ;- Ethernet MAC Receive Error
-AT91C_PA14_TCLK1 EQU (AT91C_PIO_PA14) ;- Timer Counter 1 external clock input
-AT91C_PIO_PA15 EQU (1:SHL:15) ;- Pin Controlled by PA15
-AT91C_PA15_EMDC EQU (AT91C_PIO_PA15) ;- Ethernet MAC Management Data Clock
-AT91C_PA15_TCLK2 EQU (AT91C_PIO_PA15) ;- Timer Counter 2 external clock input
-AT91C_PIO_PA16 EQU (1:SHL:16) ;- Pin Controlled by PA16
-AT91C_PA16_EMDIO EQU (AT91C_PIO_PA16) ;- Ethernet MAC Management Data Input/Output
-AT91C_PA16_IRQ6 EQU (AT91C_PIO_PA16) ;- AIC Interrupt input 6
-AT91C_PIO_PA17 EQU (1:SHL:17) ;- Pin Controlled by PA17
-AT91C_PA17_TXD0 EQU (AT91C_PIO_PA17) ;- USART 0 Transmit Data
-AT91C_PA17_TIOA0 EQU (AT91C_PIO_PA17) ;- Timer Counter 0 Multipurpose Timer I/O Pin A
-AT91C_PIO_PA18 EQU (1:SHL:18) ;- Pin Controlled by PA18
-AT91C_PA18_RXD0 EQU (AT91C_PIO_PA18) ;- USART 0 Receive Data
-AT91C_PA18_TIOB0 EQU (AT91C_PIO_PA18) ;- Timer Counter 0 Multipurpose Timer I/O Pin B
-AT91C_PIO_PA19 EQU (1:SHL:19) ;- Pin Controlled by PA19
-AT91C_PA19_SCK0 EQU (AT91C_PIO_PA19) ;- USART 0 Serial Clock
-AT91C_PA19_TIOA1 EQU (AT91C_PIO_PA19) ;- Timer Counter 1 Multipurpose Timer I/O Pin A
-AT91C_PIO_PA2 EQU (1:SHL:2) ;- Pin Controlled by PA2
-AT91C_PA2_SPCK EQU (AT91C_PIO_PA2) ;- SPI Serial Clock
-AT91C_PA2_IRQ4 EQU (AT91C_PIO_PA2) ;- AIC Interrupt Input 4
-AT91C_PIO_PA20 EQU (1:SHL:20) ;- Pin Controlled by PA20
-AT91C_PA20_CTS0 EQU (AT91C_PIO_PA20) ;- USART 0 Clear To Send
-AT91C_PA20_TIOB1 EQU (AT91C_PIO_PA20) ;- Timer Counter 1 Multipurpose Timer I/O Pin B
-AT91C_PIO_PA21 EQU (1:SHL:21) ;- Pin Controlled by PA21
-AT91C_PA21_RTS0 EQU (AT91C_PIO_PA21) ;- Usart 0 Ready To Send
-AT91C_PA21_TIOA2 EQU (AT91C_PIO_PA21) ;- Timer Counter 2 Multipurpose Timer I/O Pin A
-AT91C_PIO_PA22 EQU (1:SHL:22) ;- Pin Controlled by PA22
-AT91C_PA22_RXD2 EQU (AT91C_PIO_PA22) ;- USART 2 Receive Data
-AT91C_PA22_TIOB2 EQU (AT91C_PIO_PA22) ;- Timer Counter 2 Multipurpose Timer I/O Pin B
-AT91C_PIO_PA23 EQU (1:SHL:23) ;- Pin Controlled by PA23
-AT91C_PA23_TXD2 EQU (AT91C_PIO_PA23) ;- USART 2 Transmit Data
-AT91C_PA23_IRQ3 EQU (AT91C_PIO_PA23) ;- Interrupt input 3
-AT91C_PIO_PA24 EQU (1:SHL:24) ;- Pin Controlled by PA24
-AT91C_PA24_SCK2 EQU (AT91C_PIO_PA24) ;- USART2 Serial Clock
-AT91C_PA24_PCK1 EQU (AT91C_PIO_PA24) ;- PMC Programmable Clock Output 1
-AT91C_PIO_PA25 EQU (1:SHL:25) ;- Pin Controlled by PA25
-AT91C_PA25_TWD EQU (AT91C_PIO_PA25) ;- TWI Two-wire Serial Data
-AT91C_PA25_IRQ2 EQU (AT91C_PIO_PA25) ;- Interrupt input 2
-AT91C_PIO_PA26 EQU (1:SHL:26) ;- Pin Controlled by PA26
-AT91C_PA26_TWCK EQU (AT91C_PIO_PA26) ;- TWI Two-wire Serial Clock
-AT91C_PA26_IRQ1 EQU (AT91C_PIO_PA26) ;- Interrupt input 1
-AT91C_PIO_PA27 EQU (1:SHL:27) ;- Pin Controlled by PA27
-AT91C_PA27_MCCK EQU (AT91C_PIO_PA27) ;- Multimedia Card Clock
-AT91C_PA27_TCLK3 EQU (AT91C_PIO_PA27) ;- Timer Counter 3 External Clock Input
-AT91C_PIO_PA28 EQU (1:SHL:28) ;- Pin Controlled by PA28
-AT91C_PA28_MCCDA EQU (AT91C_PIO_PA28) ;- Multimedia Card A Command
-AT91C_PA28_TCLK4 EQU (AT91C_PIO_PA28) ;- Timer Counter 4 external Clock Input
-AT91C_PIO_PA29 EQU (1:SHL:29) ;- Pin Controlled by PA29
-AT91C_PA29_MCDA0 EQU (AT91C_PIO_PA29) ;- Multimedia Card A Data 0
-AT91C_PA29_TCLK5 EQU (AT91C_PIO_PA29) ;- Timer Counter 5 external clock input
-AT91C_PIO_PA3 EQU (1:SHL:3) ;- Pin Controlled by PA3
-AT91C_PA3_NPCS0 EQU (AT91C_PIO_PA3) ;- SPI Peripheral Chip Select 0
-AT91C_PA3_IRQ5 EQU (AT91C_PIO_PA3) ;- AIC Interrupt Input 5
-AT91C_PIO_PA30 EQU (1:SHL:30) ;- Pin Controlled by PA30
-AT91C_PA30_DRXD EQU (AT91C_PIO_PA30) ;- DBGU Debug Receive Data
-AT91C_PA30_CTS2 EQU (AT91C_PIO_PA30) ;- Usart 2 Clear To Send
-AT91C_PIO_PA31 EQU (1:SHL:31) ;- Pin Controlled by PA31
-AT91C_PA31_DTXD EQU (AT91C_PIO_PA31) ;- DBGU Debug Transmit Data
-AT91C_PA31_RTS2 EQU (AT91C_PIO_PA31) ;- USART 2 Ready To Send
-AT91C_PIO_PA4 EQU (1:SHL:4) ;- Pin Controlled by PA4
-AT91C_PA4_NPCS1 EQU (AT91C_PIO_PA4) ;- SPI Peripheral Chip Select 1
-AT91C_PA4_PCK1 EQU (AT91C_PIO_PA4) ;- PMC Programmable Clock Output 1
-AT91C_PIO_PA5 EQU (1:SHL:5) ;- Pin Controlled by PA5
-AT91C_PA5_NPCS2 EQU (AT91C_PIO_PA5) ;- SPI Peripheral Chip Select 2
-AT91C_PA5_TXD3 EQU (AT91C_PIO_PA5) ;- USART 3 Transmit Data
-AT91C_PIO_PA6 EQU (1:SHL:6) ;- Pin Controlled by PA6
-AT91C_PA6_NPCS3 EQU (AT91C_PIO_PA6) ;- SPI Peripheral Chip Select 3
-AT91C_PA6_RXD3 EQU (AT91C_PIO_PA6) ;- USART 3 Receive Data
-AT91C_PIO_PA7 EQU (1:SHL:7) ;- Pin Controlled by PA7
-AT91C_PA7_ETXCK_EREFCK EQU (AT91C_PIO_PA7) ;- Ethernet MAC Transmit Clock/Reference Clock
-AT91C_PA7_PCK2 EQU (AT91C_PIO_PA7) ;- PMC Programmable Clock 2
-AT91C_PIO_PA8 EQU (1:SHL:8) ;- Pin Controlled by PA8
-AT91C_PA8_ETXEN EQU (AT91C_PIO_PA8) ;- Ethernet MAC Transmit Enable
-AT91C_PA8_MCCDB EQU (AT91C_PIO_PA8) ;- Multimedia Card B Command
-AT91C_PIO_PA9 EQU (1:SHL:9) ;- Pin Controlled by PA9
-AT91C_PA9_ETX0 EQU (AT91C_PIO_PA9) ;- Ethernet MAC Transmit Data 0
-AT91C_PA9_MCDB0 EQU (AT91C_PIO_PA9) ;- Multimedia Card B Data 0
-AT91C_PIO_PB0 EQU (1:SHL:0) ;- Pin Controlled by PB0
-AT91C_PB0_TF0 EQU (AT91C_PIO_PB0) ;- SSC Transmit Frame Sync 0
-AT91C_PB0_TIOB3 EQU (AT91C_PIO_PB0) ;- Timer Counter 3 Multipurpose Timer I/O Pin B
-AT91C_PIO_PB1 EQU (1:SHL:1) ;- Pin Controlled by PB1
-AT91C_PB1_TK0 EQU (AT91C_PIO_PB1) ;- SSC Transmit Clock 0
-AT91C_PB1_CTS3 EQU (AT91C_PIO_PB1) ;- USART 3 Clear To Send
-AT91C_PIO_PB10 EQU (1:SHL:10) ;- Pin Controlled by PB10
-AT91C_PB10_RK1 EQU (AT91C_PIO_PB10) ;- SSC Receive Clock 1
-AT91C_PB10_TIOA5 EQU (AT91C_PIO_PB10) ;- Timer Counter 5 Multipurpose Timer I/O Pin A
-AT91C_PIO_PB11 EQU (1:SHL:11) ;- Pin Controlled by PB11
-AT91C_PB11_RF1 EQU (AT91C_PIO_PB11) ;- SSC Receive Frame Sync 1
-AT91C_PB11_TIOB5 EQU (AT91C_PIO_PB11) ;- Timer Counter 5 Multipurpose Timer I/O Pin B
-AT91C_PIO_PB12 EQU (1:SHL:12) ;- Pin Controlled by PB12
-AT91C_PB12_TF2 EQU (AT91C_PIO_PB12) ;- SSC Transmit Frame Sync 2
-AT91C_PB12_ETX2 EQU (AT91C_PIO_PB12) ;- Ethernet MAC Transmit Data 2
-AT91C_PIO_PB13 EQU (1:SHL:13) ;- Pin Controlled by PB13
-AT91C_PB13_TK2 EQU (AT91C_PIO_PB13) ;- SSC Transmit Clock 2
-AT91C_PB13_ETX3 EQU (AT91C_PIO_PB13) ;- Ethernet MAC Transmit Data 3
-AT91C_PIO_PB14 EQU (1:SHL:14) ;- Pin Controlled by PB14
-AT91C_PB14_TD2 EQU (AT91C_PIO_PB14) ;- SSC Transmit Data 2
-AT91C_PB14_ETXER EQU (AT91C_PIO_PB14) ;- Ethernet MAC Transmikt Coding Error
-AT91C_PIO_PB15 EQU (1:SHL:15) ;- Pin Controlled by PB15
-AT91C_PB15_RD2 EQU (AT91C_PIO_PB15) ;- SSC Receive Data 2
-AT91C_PB15_ERX2 EQU (AT91C_PIO_PB15) ;- Ethernet MAC Receive Data 2
-AT91C_PIO_PB16 EQU (1:SHL:16) ;- Pin Controlled by PB16
-AT91C_PB16_RK2 EQU (AT91C_PIO_PB16) ;- SSC Receive Clock 2
-AT91C_PB16_ERX3 EQU (AT91C_PIO_PB16) ;- Ethernet MAC Receive Data 3
-AT91C_PIO_PB17 EQU (1:SHL:17) ;- Pin Controlled by PB17
-AT91C_PB17_RF2 EQU (AT91C_PIO_PB17) ;- SSC Receive Frame Sync 2
-AT91C_PB17_ERXDV EQU (AT91C_PIO_PB17) ;- Ethernet MAC Receive Data Valid
-AT91C_PIO_PB18 EQU (1:SHL:18) ;- Pin Controlled by PB18
-AT91C_PB18_RI1 EQU (AT91C_PIO_PB18) ;- USART 1 Ring Indicator
-AT91C_PB18_ECOL EQU (AT91C_PIO_PB18) ;- Ethernet MAC Collision Detected
-AT91C_PIO_PB19 EQU (1:SHL:19) ;- Pin Controlled by PB19
-AT91C_PB19_DTR1 EQU (AT91C_PIO_PB19) ;- USART 1 Data Terminal ready
-AT91C_PB19_ERXCK EQU (AT91C_PIO_PB19) ;- Ethernet MAC Receive Clock
-AT91C_PIO_PB2 EQU (1:SHL:2) ;- Pin Controlled by PB2
-AT91C_PB2_TD0 EQU (AT91C_PIO_PB2) ;- SSC Transmit data
-AT91C_PB2_SCK3 EQU (AT91C_PIO_PB2) ;- USART 3 Serial Clock
-AT91C_PIO_PB20 EQU (1:SHL:20) ;- Pin Controlled by PB20
-AT91C_PB20_TXD1 EQU (AT91C_PIO_PB20) ;- USART 1 Transmit Data
-AT91C_PIO_PB21 EQU (1:SHL:21) ;- Pin Controlled by PB21
-AT91C_PB21_RXD1 EQU (AT91C_PIO_PB21) ;- USART 1 Receive Data
-AT91C_PIO_PB22 EQU (1:SHL:22) ;- Pin Controlled by PB22
-AT91C_PB22_SCK1 EQU (AT91C_PIO_PB22) ;- USART1 Serial Clock
-AT91C_PIO_PB23 EQU (1:SHL:23) ;- Pin Controlled by PB23
-AT91C_PB23_DCD1 EQU (AT91C_PIO_PB23) ;- USART 1 Data Carrier Detect
-AT91C_PIO_PB24 EQU (1:SHL:24) ;- Pin Controlled by PB24
-AT91C_PB24_CTS1 EQU (AT91C_PIO_PB24) ;- USART 1 Clear To Send
-AT91C_PIO_PB25 EQU (1:SHL:25) ;- Pin Controlled by PB25
-AT91C_PB25_DSR1 EQU (AT91C_PIO_PB25) ;- USART 1 Data Set ready
-AT91C_PB25_EF100 EQU (AT91C_PIO_PB25) ;- Ethernet MAC Force 100 Mbits/sec
-AT91C_PIO_PB26 EQU (1:SHL:26) ;- Pin Controlled by PB26
-AT91C_PB26_RTS1 EQU (AT91C_PIO_PB26) ;- Usart 0 Ready To Send
-AT91C_PIO_PB27 EQU (1:SHL:27) ;- Pin Controlled by PB27
-AT91C_PB27_PCK0 EQU (AT91C_PIO_PB27) ;- PMC Programmable Clock Output 0
-AT91C_PIO_PB28 EQU (1:SHL:28) ;- Pin Controlled by PB28
-AT91C_PB28_FIQ EQU (AT91C_PIO_PB28) ;- AIC Fast Interrupt Input
-AT91C_PIO_PB29 EQU (1:SHL:29) ;- Pin Controlled by PB29
-AT91C_PB29_IRQ0 EQU (AT91C_PIO_PB29) ;- Interrupt input 0
-AT91C_PIO_PB3 EQU (1:SHL:3) ;- Pin Controlled by PB3
-AT91C_PB3_RD0 EQU (AT91C_PIO_PB3) ;- SSC Receive Data
-AT91C_PB3_MCDA1 EQU (AT91C_PIO_PB3) ;- Multimedia Card A Data 1
-AT91C_PIO_PB4 EQU (1:SHL:4) ;- Pin Controlled by PB4
-AT91C_PB4_RK0 EQU (AT91C_PIO_PB4) ;- SSC Receive Clock
-AT91C_PB4_MCDA2 EQU (AT91C_PIO_PB4) ;- Multimedia Card A Data 2
-AT91C_PIO_PB5 EQU (1:SHL:5) ;- Pin Controlled by PB5
-AT91C_PB5_RF0 EQU (AT91C_PIO_PB5) ;- SSC Receive Frame Sync 0
-AT91C_PB5_MCDA3 EQU (AT91C_PIO_PB5) ;- Multimedia Card A Data 3
-AT91C_PIO_PB6 EQU (1:SHL:6) ;- Pin Controlled by PB6
-AT91C_PB6_TF1 EQU (AT91C_PIO_PB6) ;- SSC Transmit Frame Sync 1
-AT91C_PB6_TIOA3 EQU (AT91C_PIO_PB6) ;- Timer Counter 4 Multipurpose Timer I/O Pin A
-AT91C_PIO_PB7 EQU (1:SHL:7) ;- Pin Controlled by PB7
-AT91C_PB7_TK1 EQU (AT91C_PIO_PB7) ;- SSC Transmit Clock 1
-AT91C_PB7_TIOB3 EQU (AT91C_PIO_PB7) ;- Timer Counter 3 Multipurpose Timer I/O Pin B
-AT91C_PIO_PB8 EQU (1:SHL:8) ;- Pin Controlled by PB8
-AT91C_PB8_TD1 EQU (AT91C_PIO_PB8) ;- SSC Transmit Data 1
-AT91C_PB8_TIOA4 EQU (AT91C_PIO_PB8) ;- Timer Counter 4 Multipurpose Timer I/O Pin A
-AT91C_PIO_PB9 EQU (1:SHL:9) ;- Pin Controlled by PB9
-AT91C_PB9_RD1 EQU (AT91C_PIO_PB9) ;- SSC Receive Data 1
-AT91C_PB9_TIOB4 EQU (AT91C_PIO_PB9) ;- Timer Counter 4 Multipurpose Timer I/O Pin B
-AT91C_PIO_PC0 EQU (1:SHL:0) ;- Pin Controlled by PC0
-AT91C_PC0_BFCK EQU (AT91C_PIO_PC0) ;- Burst Flash Clock
-AT91C_PIO_PC1 EQU (1:SHL:1) ;- Pin Controlled by PC1
-AT91C_PC1_BFRDY_SMOE EQU (AT91C_PIO_PC1) ;- Burst Flash Ready
-AT91C_PIO_PC10 EQU (1:SHL:10) ;- Pin Controlled by PC10
-AT91C_PC10_NCS4_CFCS EQU (AT91C_PIO_PC10) ;- Compact Flash Chip Select
-AT91C_PIO_PC11 EQU (1:SHL:11) ;- Pin Controlled by PC11
-AT91C_PC11_NCS5_CFCE1 EQU (AT91C_PIO_PC11) ;- Chip Select 5 / Compact Flash Chip Enable 1
-AT91C_PIO_PC12 EQU (1:SHL:12) ;- Pin Controlled by PC12
-AT91C_PC12_NCS6_CFCE2 EQU (AT91C_PIO_PC12) ;- Chip Select 6 / Compact Flash Chip Enable 2
-AT91C_PIO_PC13 EQU (1:SHL:13) ;- Pin Controlled by PC13
-AT91C_PC13_NCS7 EQU (AT91C_PIO_PC13) ;- Chip Select 7
-AT91C_PIO_PC14 EQU (1:SHL:14) ;- Pin Controlled by PC14
-AT91C_PIO_PC15 EQU (1:SHL:15) ;- Pin Controlled by PC15
-AT91C_PIO_PC16 EQU (1:SHL:16) ;- Pin Controlled by PC16
-AT91C_PC16_D16 EQU (AT91C_PIO_PC16) ;- Data Bus [16]
-AT91C_PIO_PC17 EQU (1:SHL:17) ;- Pin Controlled by PC17
-AT91C_PC17_D17 EQU (AT91C_PIO_PC17) ;- Data Bus [17]
-AT91C_PIO_PC18 EQU (1:SHL:18) ;- Pin Controlled by PC18
-AT91C_PC18_D18 EQU (AT91C_PIO_PC18) ;- Data Bus [18]
-AT91C_PIO_PC19 EQU (1:SHL:19) ;- Pin Controlled by PC19
-AT91C_PC19_D19 EQU (AT91C_PIO_PC19) ;- Data Bus [19]
-AT91C_PIO_PC2 EQU (1:SHL:2) ;- Pin Controlled by PC2
-AT91C_PC2_BFAVD EQU (AT91C_PIO_PC2) ;- Burst Flash Address Valid
-AT91C_PIO_PC20 EQU (1:SHL:20) ;- Pin Controlled by PC20
-AT91C_PC20_D20 EQU (AT91C_PIO_PC20) ;- Data Bus [20]
-AT91C_PIO_PC21 EQU (1:SHL:21) ;- Pin Controlled by PC21
-AT91C_PC21_D21 EQU (AT91C_PIO_PC21) ;- Data Bus [21]
-AT91C_PIO_PC22 EQU (1:SHL:22) ;- Pin Controlled by PC22
-AT91C_PC22_D22 EQU (AT91C_PIO_PC22) ;- Data Bus [22]
-AT91C_PIO_PC23 EQU (1:SHL:23) ;- Pin Controlled by PC23
-AT91C_PC23_D23 EQU (AT91C_PIO_PC23) ;- Data Bus [23]
-AT91C_PIO_PC24 EQU (1:SHL:24) ;- Pin Controlled by PC24
-AT91C_PC24_D24 EQU (AT91C_PIO_PC24) ;- Data Bus [24]
-AT91C_PIO_PC25 EQU (1:SHL:25) ;- Pin Controlled by PC25
-AT91C_PC25_D25 EQU (AT91C_PIO_PC25) ;- Data Bus [25]
-AT91C_PIO_PC26 EQU (1:SHL:26) ;- Pin Controlled by PC26
-AT91C_PC26_D26 EQU (AT91C_PIO_PC26) ;- Data Bus [26]
-AT91C_PIO_PC27 EQU (1:SHL:27) ;- Pin Controlled by PC27
-AT91C_PC27_D27 EQU (AT91C_PIO_PC27) ;- Data Bus [27]
-AT91C_PIO_PC28 EQU (1:SHL:28) ;- Pin Controlled by PC28
-AT91C_PC28_D28 EQU (AT91C_PIO_PC28) ;- Data Bus [28]
-AT91C_PIO_PC29 EQU (1:SHL:29) ;- Pin Controlled by PC29
-AT91C_PC29_D29 EQU (AT91C_PIO_PC29) ;- Data Bus [29]
-AT91C_PIO_PC3 EQU (1:SHL:3) ;- Pin Controlled by PC3
-AT91C_PC3_BFBAA_SMWE EQU (AT91C_PIO_PC3) ;- Burst Flash Address Advance / SmartMedia Write Enable
-AT91C_PIO_PC30 EQU (1:SHL:30) ;- Pin Controlled by PC30
-AT91C_PC30_D30 EQU (AT91C_PIO_PC30) ;- Data Bus [30]
-AT91C_PIO_PC31 EQU (1:SHL:31) ;- Pin Controlled by PC31
-AT91C_PC31_D31 EQU (AT91C_PIO_PC31) ;- Data Bus [31]
-AT91C_PIO_PC4 EQU (1:SHL:4) ;- Pin Controlled by PC4
-AT91C_PC4_BFOE EQU (AT91C_PIO_PC4) ;- Burst Flash Output Enable
-AT91C_PIO_PC5 EQU (1:SHL:5) ;- Pin Controlled by PC5
-AT91C_PC5_BFWE EQU (AT91C_PIO_PC5) ;- Burst Flash Write Enable
-AT91C_PIO_PC6 EQU (1:SHL:6) ;- Pin Controlled by PC6
-AT91C_PC6_NWAIT EQU (AT91C_PIO_PC6) ;- NWAIT
-AT91C_PIO_PC7 EQU (1:SHL:7) ;- Pin Controlled by PC7
-AT91C_PC7_A23 EQU (AT91C_PIO_PC7) ;- Address Bus[23]
-AT91C_PIO_PC8 EQU (1:SHL:8) ;- Pin Controlled by PC8
-AT91C_PC8_A24 EQU (AT91C_PIO_PC8) ;- Address Bus[24]
-AT91C_PIO_PC9 EQU (1:SHL:9) ;- Pin Controlled by PC9
-AT91C_PC9_A25_CFRNW EQU (AT91C_PIO_PC9) ;- Address Bus[25] / Compact Flash Read Not Write
-AT91C_PIO_PD0 EQU (1:SHL:0) ;- Pin Controlled by PD0
-AT91C_PD0_ETX0 EQU (AT91C_PIO_PD0) ;- Ethernet MAC Transmit Data 0
-AT91C_PIO_PD1 EQU (1:SHL:1) ;- Pin Controlled by PD1
-AT91C_PD1_ETX1 EQU (AT91C_PIO_PD1) ;- Ethernet MAC Transmit Data 1
-AT91C_PIO_PD10 EQU (1:SHL:10) ;- Pin Controlled by PD10
-AT91C_PD10_PCK3 EQU (AT91C_PIO_PD10) ;- PMC Programmable Clock Output 3
-AT91C_PD10_TPS1 EQU (AT91C_PIO_PD10) ;- ETM ARM9 pipeline status 1
-AT91C_PIO_PD11 EQU (1:SHL:11) ;- Pin Controlled by PD11
-AT91C_PD11_ EQU (AT91C_PIO_PD11) ;-
-AT91C_PD11_TPS2 EQU (AT91C_PIO_PD11) ;- ETM ARM9 pipeline status 2
-AT91C_PIO_PD12 EQU (1:SHL:12) ;- Pin Controlled by PD12
-AT91C_PD12_ EQU (AT91C_PIO_PD12) ;-
-AT91C_PD12_TPK0 EQU (AT91C_PIO_PD12) ;- ETM Trace Packet 0
-AT91C_PIO_PD13 EQU (1:SHL:13) ;- Pin Controlled by PD13
-AT91C_PD13_ EQU (AT91C_PIO_PD13) ;-
-AT91C_PD13_TPK1 EQU (AT91C_PIO_PD13) ;- ETM Trace Packet 1
-AT91C_PIO_PD14 EQU (1:SHL:14) ;- Pin Controlled by PD14
-AT91C_PD14_ EQU (AT91C_PIO_PD14) ;-
-AT91C_PD14_TPK2 EQU (AT91C_PIO_PD14) ;- ETM Trace Packet 2
-AT91C_PIO_PD15 EQU (1:SHL:15) ;- Pin Controlled by PD15
-AT91C_PD15_TD0 EQU (AT91C_PIO_PD15) ;- SSC Transmit data
-AT91C_PD15_TPK3 EQU (AT91C_PIO_PD15) ;- ETM Trace Packet 3
-AT91C_PIO_PD16 EQU (1:SHL:16) ;- Pin Controlled by PD16
-AT91C_PD16_TD1 EQU (AT91C_PIO_PD16) ;- SSC Transmit Data 1
-AT91C_PD16_TPK4 EQU (AT91C_PIO_PD16) ;- ETM Trace Packet 4
-AT91C_PIO_PD17 EQU (1:SHL:17) ;- Pin Controlled by PD17
-AT91C_PD17_TD2 EQU (AT91C_PIO_PD17) ;- SSC Transmit Data 2
-AT91C_PD17_TPK5 EQU (AT91C_PIO_PD17) ;- ETM Trace Packet 5
-AT91C_PIO_PD18 EQU (1:SHL:18) ;- Pin Controlled by PD18
-AT91C_PD18_NPCS1 EQU (AT91C_PIO_PD18) ;- SPI Peripheral Chip Select 1
-AT91C_PD18_TPK6 EQU (AT91C_PIO_PD18) ;- ETM Trace Packet 6
-AT91C_PIO_PD19 EQU (1:SHL:19) ;- Pin Controlled by PD19
-AT91C_PD19_NPCS2 EQU (AT91C_PIO_PD19) ;- SPI Peripheral Chip Select 2
-AT91C_PD19_TPK7 EQU (AT91C_PIO_PD19) ;- ETM Trace Packet 7
-AT91C_PIO_PD2 EQU (1:SHL:2) ;- Pin Controlled by PD2
-AT91C_PD2_ETX2 EQU (AT91C_PIO_PD2) ;- Ethernet MAC Transmit Data 2
-AT91C_PIO_PD20 EQU (1:SHL:20) ;- Pin Controlled by PD20
-AT91C_PD20_NPCS3 EQU (AT91C_PIO_PD20) ;- SPI Peripheral Chip Select 3
-AT91C_PD20_TPK8 EQU (AT91C_PIO_PD20) ;- ETM Trace Packet 8
-AT91C_PIO_PD21 EQU (1:SHL:21) ;- Pin Controlled by PD21
-AT91C_PD21_RTS0 EQU (AT91C_PIO_PD21) ;- Usart 0 Ready To Send
-AT91C_PD21_TPK9 EQU (AT91C_PIO_PD21) ;- ETM Trace Packet 9
-AT91C_PIO_PD22 EQU (1:SHL:22) ;- Pin Controlled by PD22
-AT91C_PD22_RTS1 EQU (AT91C_PIO_PD22) ;- Usart 0 Ready To Send
-AT91C_PD22_TPK10 EQU (AT91C_PIO_PD22) ;- ETM Trace Packet 10
-AT91C_PIO_PD23 EQU (1:SHL:23) ;- Pin Controlled by PD23
-AT91C_PD23_RTS2 EQU (AT91C_PIO_PD23) ;- USART 2 Ready To Send
-AT91C_PD23_TPK11 EQU (AT91C_PIO_PD23) ;- ETM Trace Packet 11
-AT91C_PIO_PD24 EQU (1:SHL:24) ;- Pin Controlled by PD24
-AT91C_PD24_RTS3 EQU (AT91C_PIO_PD24) ;- USART 3 Ready To Send
-AT91C_PD24_TPK12 EQU (AT91C_PIO_PD24) ;- ETM Trace Packet 12
-AT91C_PIO_PD25 EQU (1:SHL:25) ;- Pin Controlled by PD25
-AT91C_PD25_DTR1 EQU (AT91C_PIO_PD25) ;- USART 1 Data Terminal ready
-AT91C_PD25_TPK13 EQU (AT91C_PIO_PD25) ;- ETM Trace Packet 13
-AT91C_PIO_PD26 EQU (1:SHL:26) ;- Pin Controlled by PD26
-AT91C_PD26_TPK14 EQU (AT91C_PIO_PD26) ;- ETM Trace Packet 14
-AT91C_PIO_PD27 EQU (1:SHL:27) ;- Pin Controlled by PD27
-AT91C_PD27_TPK15 EQU (AT91C_PIO_PD27) ;- ETM Trace Packet 15
-AT91C_PIO_PD3 EQU (1:SHL:3) ;- Pin Controlled by PD3
-AT91C_PD3_ETX3 EQU (AT91C_PIO_PD3) ;- Ethernet MAC Transmit Data 3
-AT91C_PIO_PD4 EQU (1:SHL:4) ;- Pin Controlled by PD4
-AT91C_PD4_ETXEN EQU (AT91C_PIO_PD4) ;- Ethernet MAC Transmit Enable
-AT91C_PIO_PD5 EQU (1:SHL:5) ;- Pin Controlled by PD5
-AT91C_PD5_ETXER EQU (AT91C_PIO_PD5) ;- Ethernet MAC Transmikt Coding Error
-AT91C_PIO_PD6 EQU (1:SHL:6) ;- Pin Controlled by PD6
-AT91C_PD6_DTXD EQU (AT91C_PIO_PD6) ;- DBGU Debug Transmit Data
-AT91C_PIO_PD7 EQU (1:SHL:7) ;- Pin Controlled by PD7
-AT91C_PD7_PCK0 EQU (AT91C_PIO_PD7) ;- PMC Programmable Clock Output 0
-AT91C_PD7_TSYNC EQU (AT91C_PIO_PD7) ;- ETM Synchronization signal
-AT91C_PIO_PD8 EQU (1:SHL:8) ;- Pin Controlled by PD8
-AT91C_PD8_PCK1 EQU (AT91C_PIO_PD8) ;- PMC Programmable Clock Output 1
-AT91C_PD8_TCLK EQU (AT91C_PIO_PD8) ;- ETM Trace Clock signal
-AT91C_PIO_PD9 EQU (1:SHL:9) ;- Pin Controlled by PD9
-AT91C_PD9_PCK2 EQU (AT91C_PIO_PD9) ;- PMC Programmable Clock 2
-AT91C_PD9_TPS0 EQU (AT91C_PIO_PD9) ;- ETM ARM9 pipeline status 0
-
-;- *****************************************************************************
-;- PERIPHERAL ID DEFINITIONS FOR AT91RM9200
-;- *****************************************************************************
-AT91C_ID_FIQ EQU ( 0) ;- Advanced Interrupt Controller (FIQ)
-AT91C_ID_SYS EQU ( 1) ;- System Peripheral
-AT91C_ID_PIOA EQU ( 2) ;- Parallel IO Controller A
-AT91C_ID_PIOB EQU ( 3) ;- Parallel IO Controller B
-AT91C_ID_PIOC EQU ( 4) ;- Parallel IO Controller C
-AT91C_ID_PIOD EQU ( 5) ;- Parallel IO Controller D
-AT91C_ID_US0 EQU ( 6) ;- USART 0
-AT91C_ID_US1 EQU ( 7) ;- USART 1
-AT91C_ID_US2 EQU ( 8) ;- USART 2
-AT91C_ID_US3 EQU ( 9) ;- USART 3
-AT91C_ID_MCI EQU (10) ;- Multimedia Card Interface
-AT91C_ID_UDP EQU (11) ;- USB Device Port
-AT91C_ID_TWI EQU (12) ;- Two-Wire Interface
-AT91C_ID_SPI EQU (13) ;- Serial Peripheral Interface
-AT91C_ID_SSC0 EQU (14) ;- Serial Synchronous Controller 0
-AT91C_ID_SSC1 EQU (15) ;- Serial Synchronous Controller 1
-AT91C_ID_SSC2 EQU (16) ;- Serial Synchronous Controller 2
-AT91C_ID_TC0 EQU (17) ;- Timer Counter 0
-AT91C_ID_TC1 EQU (18) ;- Timer Counter 1
-AT91C_ID_TC2 EQU (19) ;- Timer Counter 2
-AT91C_ID_TC3 EQU (20) ;- Timer Counter 3
-AT91C_ID_TC4 EQU (21) ;- Timer Counter 4
-AT91C_ID_TC5 EQU (22) ;- Timer Counter 5
-AT91C_ID_UHP EQU (23) ;- USB Host port
-AT91C_ID_EMAC EQU (24) ;- Ethernet MAC
-AT91C_ID_IRQ0 EQU (25) ;- Advanced Interrupt Controller (IRQ0)
-AT91C_ID_IRQ1 EQU (26) ;- Advanced Interrupt Controller (IRQ1)
-AT91C_ID_IRQ2 EQU (27) ;- Advanced Interrupt Controller (IRQ2)
-AT91C_ID_IRQ3 EQU (28) ;- Advanced Interrupt Controller (IRQ3)
-AT91C_ID_IRQ4 EQU (29) ;- Advanced Interrupt Controller (IRQ4)
-AT91C_ID_IRQ5 EQU (30) ;- Advanced Interrupt Controller (IRQ5)
-AT91C_ID_IRQ6 EQU (31) ;- Advanced Interrupt Controller (IRQ6)
-
-;- *****************************************************************************
-;- BASE ADDRESS DEFINITIONS FOR AT91RM9200
-;- *****************************************************************************
-AT91C_BASE_SYS EQU (0xFFFFF000) ;- (SYS) Base Address
-AT91C_BASE_MC EQU (0xFFFFFF00) ;- (MC) Base Address
-AT91C_BASE_RTC EQU (0xFFFFFE00) ;- (RTC) Base Address
-AT91C_BASE_ST EQU (0xFFFFFD00) ;- (ST) Base Address
-AT91C_BASE_PMC EQU (0xFFFFFC00) ;- (PMC) Base Address
-AT91C_BASE_CKGR EQU (0xFFFFFC20) ;- (CKGR) Base Address
-AT91C_BASE_PIOD EQU (0xFFFFFA00) ;- (PIOD) Base Address
-AT91C_BASE_PIOC EQU (0xFFFFF800) ;- (PIOC) Base Address
-AT91C_BASE_PIOB EQU (0xFFFFF600) ;- (PIOB) Base Address
-AT91C_BASE_PIOA EQU (0xFFFFF400) ;- (PIOA) Base Address
-AT91C_BASE_DBGU EQU (0xFFFFF200) ;- (DBGU) Base Address
-AT91C_BASE_PDC_DBGU EQU (0xFFFFF300) ;- (PDC_DBGU) Base Address
-AT91C_BASE_AIC EQU (0xFFFFF000) ;- (AIC) Base Address
-AT91C_BASE_PDC_SPI EQU (0xFFFE0100) ;- (PDC_SPI) Base Address
-AT91C_BASE_SPI EQU (0xFFFE0000) ;- (SPI) Base Address
-AT91C_BASE_PDC_SSC2 EQU (0xFFFD8100) ;- (PDC_SSC2) Base Address
-AT91C_BASE_SSC2 EQU (0xFFFD8000) ;- (SSC2) Base Address
-AT91C_BASE_PDC_SSC1 EQU (0xFFFD4100) ;- (PDC_SSC1) Base Address
-AT91C_BASE_SSC1 EQU (0xFFFD4000) ;- (SSC1) Base Address
-AT91C_BASE_PDC_SSC0 EQU (0xFFFD0100) ;- (PDC_SSC0) Base Address
-AT91C_BASE_SSC0 EQU (0xFFFD0000) ;- (SSC0) Base Address
-AT91C_BASE_PDC_US3 EQU (0xFFFCC100) ;- (PDC_US3) Base Address
-AT91C_BASE_US3 EQU (0xFFFCC000) ;- (US3) Base Address
-AT91C_BASE_PDC_US2 EQU (0xFFFC8100) ;- (PDC_US2) Base Address
-AT91C_BASE_US2 EQU (0xFFFC8000) ;- (US2) Base Address
-AT91C_BASE_PDC_US1 EQU (0xFFFC4100) ;- (PDC_US1) Base Address
-AT91C_BASE_US1 EQU (0xFFFC4000) ;- (US1) Base Address
-AT91C_BASE_PDC_US0 EQU (0xFFFC0100) ;- (PDC_US0) Base Address
-AT91C_BASE_US0 EQU (0xFFFC0000) ;- (US0) Base Address
-AT91C_BASE_TWI EQU (0xFFFB8000) ;- (TWI) Base Address
-AT91C_BASE_PDC_MCI EQU (0xFFFB4100) ;- (PDC_MCI) Base Address
-AT91C_BASE_MCI EQU (0xFFFB4000) ;- (MCI) Base Address
-AT91C_BASE_UDP EQU (0xFFFB0000) ;- (UDP) Base Address
-AT91C_BASE_TC5 EQU (0xFFFA4080) ;- (TC5) Base Address
-AT91C_BASE_TC4 EQU (0xFFFA4040) ;- (TC4) Base Address
-AT91C_BASE_TC3 EQU (0xFFFA4000) ;- (TC3) Base Address
-AT91C_BASE_TCB1 EQU (0xFFFA4080) ;- (TCB1) Base Address
-AT91C_BASE_TC2 EQU (0xFFFA0080) ;- (TC2) Base Address
-AT91C_BASE_TC1 EQU (0xFFFA0040) ;- (TC1) Base Address
-AT91C_BASE_TC0 EQU (0xFFFA0000) ;- (TC0) Base Address
-AT91C_BASE_TCB0 EQU (0xFFFA0000) ;- (TCB0) Base Address
-AT91C_BASE_UHP EQU (0x00300000) ;- (UHP) Base Address
-AT91C_BASE_EMAC EQU (0xFFFBC000) ;- (EMAC) Base Address
-AT91C_BASE_EBI EQU (0xFFFFFF60) ;- (EBI) Base Address
-AT91C_BASE_SMC2 EQU (0xFFFFFF70) ;- (SMC2) Base Address
-AT91C_BASE_SDRC EQU (0xFFFFFF90) ;- (SDRC) Base Address
-AT91C_BASE_BFC EQU (0xFFFFFFC0) ;- (BFC) Base Address
-
-;- *****************************************************************************
-;- MEMORY MAPPING DEFINITIONS FOR AT91RM9200
-;- *****************************************************************************
-AT91C_ISRAM EQU (0x00200000) ;- Internal SRAM base address
-AT91C_ISRAM_SIZE EQU (0x00004000) ;- Internal SRAM size in byte (16 Kbyte)
-AT91C_IROM EQU (0x00100000) ;- Internal ROM base address
-AT91C_IROM_SIZE EQU (0x00020000) ;- Internal ROM size in byte (128 Kbyte)
-
-
- END
+++ /dev/null
-// ----------------------------------------------------------------------------
-// ATMEL Microcontroller Software Support - ROUSSET -
-// ----------------------------------------------------------------------------
-// The software is delivered "AS IS" without warranty or condition of any
-// kind, either express, implied or statutory. This includes without
-// limitation any warranty or condition with respect to merchantability or
-// fitness for any particular purpose, or against the infringements of
-// intellectual property rights of others.
-// ----------------------------------------------------------------------------
-// File Name : AT91RM9200.h
-// Object : AT91RM9200 definitions
-// Generated : AT91 SW Application Group 11/19/2003 (17:20:51)
-//
-// CVS Reference : /AT91RM9200.pl/1.16/Fri Feb 07 10:29:51 2003//
-// CVS Reference : /SYS_AT91RM9200.pl/1.2/Fri Jan 17 12:44:37 2003//
-// CVS Reference : /MC_1760A.pl/1.1/Fri Aug 23 14:38:22 2002//
-// CVS Reference : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-// CVS Reference : /PMC_2636A.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
-// CVS Reference : /ST_1763B.pl/1.1/Fri Aug 23 14:41:42 2002//
-// CVS Reference : /RTC_1245D.pl/1.2/Fri Jan 31 12:19:06 2003//
-// CVS Reference : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 09:36:47 2002//
-// CVS Reference : /DBGU_1754A.pl/1.4/Fri Jan 31 12:18:24 2003//
-// CVS Reference : /UDP_1765B.pl/1.3/Fri Aug 02 14:45:38 2002//
-// CVS Reference : /MCI_1764A.pl/1.2/Thu Nov 14 17:48:24 2002//
-// CVS Reference : /US_1739C.pl/1.2/Fri Jul 12 07:49:25 2002//
-// CVS Reference : /SPI_AT91RMxxxx.pl/1.3/Tue Nov 26 10:20:29 2002//
-// CVS Reference : /SSC_1762A.pl/1.2/Fri Nov 08 13:26:39 2002//
-// CVS Reference : /TC_1753B.pl/1.2/Fri Jan 31 12:19:55 2003//
-// CVS Reference : /TWI_1761B.pl/1.4/Fri Feb 07 10:30:07 2003//
-// CVS Reference : /PDC_1734B.pl/1.2/Thu Nov 21 16:38:23 2002//
-// CVS Reference : /UHP_xxxxA.pl/1.1/Mon Jul 22 12:21:58 2002//
-// CVS Reference : /EMAC_1794A.pl/1.4/Fri Jan 17 12:11:54 2003//
-// CVS Reference : /EBI_1759B.pl/1.10/Fri Jan 17 12:44:29 2003//
-// CVS Reference : /SMC_1783A.pl/1.3/Thu Oct 31 14:38:17 2002//
-// CVS Reference : /SDRC_1758B.pl/1.2/Thu Oct 03 13:04:41 2002//
-// CVS Reference : /BFC_1757B.pl/1.3/Thu Oct 31 14:38:00 2002//
-// ----------------------------------------------------------------------------
-
-// Hardware register definition
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR System Peripherals
-// *****************************************************************************
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Memory Controller Interface
-// *****************************************************************************
-// *** Register offset in AT91S_MC structure ***
-#define MC_RCR ( 0) // MC Remap Control Register
-#define MC_ASR ( 4) // MC Abort Status Register
-#define MC_AASR ( 8) // MC Abort Address Status Register
-#define MC_PUIA (16) // MC Protection Unit Area
-#define MC_PUP (80) // MC Protection Unit Peripherals
-#define MC_PUER (84) // MC Protection Unit Enable Register
-// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register --------
-#define AT91C_MC_RCB (0x1 << 0) // (MC) Remap Command Bit
-// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register --------
-#define AT91C_MC_UNDADD (0x1 << 0) // (MC) Undefined Addess Abort Status
-#define AT91C_MC_MISADD (0x1 << 1) // (MC) Misaligned Addess Abort Status
-#define AT91C_MC_MPU (0x1 << 2) // (MC) Memory protection Unit Abort Status
-#define AT91C_MC_ABTSZ (0x3 << 8) // (MC) Abort Size Status
-#define AT91C_MC_ABTSZ_BYTE (0x0 << 8) // (MC) Byte
-#define AT91C_MC_ABTSZ_HWORD (0x1 << 8) // (MC) Half-word
-#define AT91C_MC_ABTSZ_WORD (0x2 << 8) // (MC) Word
-#define AT91C_MC_ABTTYP (0x3 << 10) // (MC) Abort Type Status
-#define AT91C_MC_ABTTYP_DATAR (0x0 << 10) // (MC) Data Read
-#define AT91C_MC_ABTTYP_DATAW (0x1 << 10) // (MC) Data Write
-#define AT91C_MC_ABTTYP_FETCH (0x2 << 10) // (MC) Code Fetch
-#define AT91C_MC_MST0 (0x1 << 16) // (MC) Master 0 Abort Source
-#define AT91C_MC_MST1 (0x1 << 17) // (MC) Master 1 Abort Source
-#define AT91C_MC_SVMST0 (0x1 << 24) // (MC) Saved Master 0 Abort Source
-#define AT91C_MC_SVMST1 (0x1 << 25) // (MC) Saved Master 1 Abort Source
-// -------- MC_PUIA : (MC Offset: 0x10) MC Protection Unit Area --------
-#define AT91C_MC_PROT (0x3 << 0) // (MC) Protection
-#define AT91C_MC_PROT_PNAUNA (0x0) // (MC) Privilege: No Access, User: No Access
-#define AT91C_MC_PROT_PRWUNA (0x1) // (MC) Privilege: Read/Write, User: No Access
-#define AT91C_MC_PROT_PRWURO (0x2) // (MC) Privilege: Read/Write, User: Read Only
-#define AT91C_MC_PROT_PRWURW (0x3) // (MC) Privilege: Read/Write, User: Read/Write
-#define AT91C_MC_SIZE (0xF << 4) // (MC) Internal Area Size
-#define AT91C_MC_SIZE_1KB (0x0 << 4) // (MC) Area size 1KByte
-#define AT91C_MC_SIZE_2KB (0x1 << 4) // (MC) Area size 2KByte
-#define AT91C_MC_SIZE_4KB (0x2 << 4) // (MC) Area size 4KByte
-#define AT91C_MC_SIZE_8KB (0x3 << 4) // (MC) Area size 8KByte
-#define AT91C_MC_SIZE_16KB (0x4 << 4) // (MC) Area size 16KByte
-#define AT91C_MC_SIZE_32KB (0x5 << 4) // (MC) Area size 32KByte
-#define AT91C_MC_SIZE_64KB (0x6 << 4) // (MC) Area size 64KByte
-#define AT91C_MC_SIZE_128KB (0x7 << 4) // (MC) Area size 128KByte
-#define AT91C_MC_SIZE_256KB (0x8 << 4) // (MC) Area size 256KByte
-#define AT91C_MC_SIZE_512KB (0x9 << 4) // (MC) Area size 512KByte
-#define AT91C_MC_SIZE_1MB (0xA << 4) // (MC) Area size 1MByte
-#define AT91C_MC_SIZE_2MB (0xB << 4) // (MC) Area size 2MByte
-#define AT91C_MC_SIZE_4MB (0xC << 4) // (MC) Area size 4MByte
-#define AT91C_MC_SIZE_8MB (0xD << 4) // (MC) Area size 8MByte
-#define AT91C_MC_SIZE_16MB (0xE << 4) // (MC) Area size 16MByte
-#define AT91C_MC_SIZE_64MB (0xF << 4) // (MC) Area size 64MByte
-#define AT91C_MC_BA (0x3FFFF << 10) // (MC) Internal Area Base Address
-// -------- MC_PUP : (MC Offset: 0x50) MC Protection Unit Peripheral --------
-// -------- MC_PUER : (MC Offset: 0x54) MC Protection Unit Area --------
-#define AT91C_MC_PUEB (0x1 << 0) // (MC) Protection Unit enable Bit
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Real-time Clock Alarm and Parallel Load Interface
-// *****************************************************************************
-// *** Register offset in AT91S_RTC structure ***
-#define RTC_CR ( 0) // Control Register
-#define RTC_MR ( 4) // Mode Register
-#define RTC_TIMR ( 8) // Time Register
-#define RTC_CALR (12) // Calendar Register
-#define RTC_TIMALR (16) // Time Alarm Register
-#define RTC_CALALR (20) // Calendar Alarm Register
-#define RTC_SR (24) // Status Register
-#define RTC_SCCR (28) // Status Clear Command Register
-#define RTC_IER (32) // Interrupt Enable Register
-#define RTC_IDR (36) // Interrupt Disable Register
-#define RTC_IMR (40) // Interrupt Mask Register
-#define RTC_VER (44) // Valid Entry Register
-// -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register --------
-#define AT91C_RTC_UPDTIM (0x1 << 0) // (RTC) Update Request Time Register
-#define AT91C_RTC_UPDCAL (0x1 << 1) // (RTC) Update Request Calendar Register
-#define AT91C_RTC_TIMEVSEL (0x3 << 8) // (RTC) Time Event Selection
-#define AT91C_RTC_TIMEVSEL_MINUTE (0x0 << 8) // (RTC) Minute change.
-#define AT91C_RTC_TIMEVSEL_HOUR (0x1 << 8) // (RTC) Hour change.
-#define AT91C_RTC_TIMEVSEL_DAY24 (0x2 << 8) // (RTC) Every day at midnight.
-#define AT91C_RTC_TIMEVSEL_DAY12 (0x3 << 8) // (RTC) Every day at noon.
-#define AT91C_RTC_CALEVSEL (0x3 << 16) // (RTC) Calendar Event Selection
-#define AT91C_RTC_CALEVSEL_WEEK (0x0 << 16) // (RTC) Week change (every Monday at time 00:00:00).
-#define AT91C_RTC_CALEVSEL_MONTH (0x1 << 16) // (RTC) Month change (every 01 of each month at time 00:00:00).
-#define AT91C_RTC_CALEVSEL_YEAR (0x2 << 16) // (RTC) Year change (every January 1 at time 00:00:00).
-// -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register --------
-#define AT91C_RTC_HRMOD (0x1 << 0) // (RTC) 12-24 hour Mode
-// -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register --------
-#define AT91C_RTC_SEC (0x7F << 0) // (RTC) Current Second
-#define AT91C_RTC_MIN (0x7F << 8) // (RTC) Current Minute
-#define AT91C_RTC_HOUR (0x1F << 16) // (RTC) Current Hour
-#define AT91C_RTC_AMPM (0x1 << 22) // (RTC) Ante Meridiem, Post Meridiem Indicator
-// -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register --------
-#define AT91C_RTC_CENT (0x3F << 0) // (RTC) Current Century
-#define AT91C_RTC_YEAR (0xFF << 8) // (RTC) Current Year
-#define AT91C_RTC_MONTH (0x1F << 16) // (RTC) Current Month
-#define AT91C_RTC_DAY (0x7 << 21) // (RTC) Current Day
-#define AT91C_RTC_DATE (0x3F << 24) // (RTC) Current Date
-// -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register --------
-#define AT91C_RTC_SECEN (0x1 << 7) // (RTC) Second Alarm Enable
-#define AT91C_RTC_MINEN (0x1 << 15) // (RTC) Minute Alarm
-#define AT91C_RTC_HOUREN (0x1 << 23) // (RTC) Current Hour
-// -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register --------
-#define AT91C_RTC_MONTHEN (0x1 << 23) // (RTC) Month Alarm Enable
-#define AT91C_RTC_DATEEN (0x1 << 31) // (RTC) Date Alarm Enable
-// -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register --------
-#define AT91C_RTC_ACKUPD (0x1 << 0) // (RTC) Acknowledge for Update
-#define AT91C_RTC_ALARM (0x1 << 1) // (RTC) Alarm Flag
-#define AT91C_RTC_SECEV (0x1 << 2) // (RTC) Second Event
-#define AT91C_RTC_TIMEV (0x1 << 3) // (RTC) Time Event
-#define AT91C_RTC_CALEV (0x1 << 4) // (RTC) Calendar event
-// -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register --------
-// -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register --------
-// -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register --------
-// -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register --------
-// -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register --------
-#define AT91C_RTC_NVTIM (0x1 << 0) // (RTC) Non valid Time
-#define AT91C_RTC_NVCAL (0x1 << 1) // (RTC) Non valid Calendar
-#define AT91C_RTC_NVTIMALR (0x1 << 2) // (RTC) Non valid time Alarm
-#define AT91C_RTC_NVCALALR (0x1 << 3) // (RTC) Nonvalid Calendar Alarm
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR System Timer Interface
-// *****************************************************************************
-// *** Register offset in AT91S_ST structure ***
-#define ST_CR ( 0) // Control Register
-#define ST_PIMR ( 4) // Period Interval Mode Register
-#define ST_WDMR ( 8) // Watchdog Mode Register
-#define ST_RTMR (12) // Real-time Mode Register
-#define ST_SR (16) // Status Register
-#define ST_IER (20) // Interrupt Enable Register
-#define ST_IDR (24) // Interrupt Disable Register
-#define ST_IMR (28) // Interrupt Mask Register
-#define ST_RTAR (32) // Real-time Alarm Register
-#define ST_CRTR (36) // Current Real-time Register
-// -------- ST_CR : (ST Offset: 0x0) System Timer Control Register --------
-#define AT91C_ST_WDRST (0x1 << 0) // (ST) Watchdog Timer Restart
-// -------- ST_PIMR : (ST Offset: 0x4) System Timer Period Interval Mode Register --------
-#define AT91C_ST_PIV (0xFFFF << 0) // (ST) Watchdog Timer Restart
-// -------- ST_WDMR : (ST Offset: 0x8) System Timer Watchdog Mode Register --------
-#define AT91C_ST_WDV (0xFFFF << 0) // (ST) Watchdog Timer Restart
-#define AT91C_ST_RSTEN (0x1 << 16) // (ST) Reset Enable
-#define AT91C_ST_EXTEN (0x1 << 17) // (ST) External Signal Assertion Enable
-// -------- ST_RTMR : (ST Offset: 0xc) System Timer Real-time Mode Register --------
-#define AT91C_ST_RTPRES (0xFFFF << 0) // (ST) Real-time Timer Prescaler Value
-// -------- ST_SR : (ST Offset: 0x10) System Timer Status Register --------
-#define AT91C_ST_PITS (0x1 << 0) // (ST) Period Interval Timer Interrupt
-#define AT91C_ST_WDOVF (0x1 << 1) // (ST) Watchdog Overflow
-#define AT91C_ST_RTTINC (0x1 << 2) // (ST) Real-time Timer Increment
-#define AT91C_ST_ALMS (0x1 << 3) // (ST) Alarm Status
-// -------- ST_IER : (ST Offset: 0x14) System Timer Interrupt Enable Register --------
-// -------- ST_IDR : (ST Offset: 0x18) System Timer Interrupt Disable Register --------
-// -------- ST_IMR : (ST Offset: 0x1c) System Timer Interrupt Mask Register --------
-// -------- ST_RTAR : (ST Offset: 0x20) System Timer Real-time Alarm Register --------
-#define AT91C_ST_ALMV (0xFFFFF << 0) // (ST) Alarm Value Value
-// -------- ST_CRTR : (ST Offset: 0x24) System Timer Current Real-time Register --------
-#define AT91C_ST_CRTV (0xFFFFF << 0) // (ST) Current Real-time Value
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Power Management Controler
-// *****************************************************************************
-// *** Register offset in AT91S_PMC structure ***
-#define PMC_SCER ( 0) // System Clock Enable Register
-#define PMC_SCDR ( 4) // System Clock Disable Register
-#define PMC_SCSR ( 8) // System Clock Status Register
-#define PMC_PCER (16) // Peripheral Clock Enable Register
-#define PMC_PCDR (20) // Peripheral Clock Disable Register
-#define PMC_PCSR (24) // Peripheral Clock Status Register
-#define PMC_MCKR (48) // Master Clock Register
-#define PMC_PCKR (64) // Programmable Clock Register
-#define PMC_IER (96) // Interrupt Enable Register
-#define PMC_IDR (100) // Interrupt Disable Register
-#define PMC_SR (104) // Status Register
-#define PMC_IMR (108) // Interrupt Mask Register
-// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------
-#define AT91C_PMC_PCK (0x1 << 0) // (PMC) Processor Clock
-#define AT91C_PMC_UDP (0x1 << 1) // (PMC) USB Device Port Clock
-#define AT91C_PMC_MCKUDP (0x1 << 2) // (PMC) USB Device Port Master Clock Automatic Disable on Suspend
-#define AT91C_PMC_UHP (0x1 << 4) // (PMC) USB Host Port Clock
-#define AT91C_PMC_PCK0 (0x1 << 8) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK1 (0x1 << 9) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK2 (0x1 << 10) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK3 (0x1 << 11) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK4 (0x1 << 12) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK5 (0x1 << 13) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK6 (0x1 << 14) // (PMC) Programmable Clock Output
-#define AT91C_PMC_PCK7 (0x1 << 15) // (PMC) Programmable Clock Output
-// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register --------
-// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register --------
-// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------
-#define AT91C_PMC_CSS (0x3 << 0) // (PMC) Programmable Clock Selection
-#define AT91C_PMC_CSS_SLOW_CLK (0x0) // (PMC) Slow Clock is selected
-#define AT91C_PMC_CSS_MAIN_CLK (0x1) // (PMC) Main Clock is selected
-#define AT91C_PMC_CSS_PLLA_CLK (0x2) // (PMC) Clock from PLL A is selected
-#define AT91C_PMC_CSS_PLLB_CLK (0x3) // (PMC) Clock from PLL B is selected
-#define AT91C_PMC_PRES (0x7 << 2) // (PMC) Programmable Clock Prescaler
-#define AT91C_PMC_PRES_CLK (0x0 << 2) // (PMC) Selected clock
-#define AT91C_PMC_PRES_CLK_2 (0x1 << 2) // (PMC) Selected clock divided by 2
-#define AT91C_PMC_PRES_CLK_4 (0x2 << 2) // (PMC) Selected clock divided by 4
-#define AT91C_PMC_PRES_CLK_8 (0x3 << 2) // (PMC) Selected clock divided by 8
-#define AT91C_PMC_PRES_CLK_16 (0x4 << 2) // (PMC) Selected clock divided by 16
-#define AT91C_PMC_PRES_CLK_32 (0x5 << 2) // (PMC) Selected clock divided by 32
-#define AT91C_PMC_PRES_CLK_64 (0x6 << 2) // (PMC) Selected clock divided by 64
-#define AT91C_PMC_MDIV (0x3 << 8) // (PMC) Master Clock Division
-#define AT91C_PMC_MDIV_1 (0x0 << 8) // (PMC) The master clock and the processor clock are the same
-#define AT91C_PMC_MDIV_2 (0x1 << 8) // (PMC) The processor clock is twice as fast as the master clock
-#define AT91C_PMC_MDIV_3 (0x2 << 8) // (PMC) The processor clock is three times faster than the master clock
-#define AT91C_PMC_MDIV_4 (0x3 << 8) // (PMC) The processor clock is four times faster than the master clock
-// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------
-// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register --------
-#define AT91C_PMC_MOSCS (0x1 << 0) // (PMC) MOSC Status/Enable/Disable/Mask
-#define AT91C_PMC_LOCKA (0x1 << 1) // (PMC) PLL A Status/Enable/Disable/Mask
-#define AT91C_PMC_LOCKB (0x1 << 2) // (PMC) PLL B Status/Enable/Disable/Mask
-#define AT91C_PMC_MCKRDY (0x1 << 3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK0RDY (0x1 << 8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK1RDY (0x1 << 9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK2RDY (0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK3RDY (0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK4RDY (0x1 << 12) // (PMC) PCK4_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK5RDY (0x1 << 13) // (PMC) PCK5_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK6RDY (0x1 << 14) // (PMC) PCK6_RDY Status/Enable/Disable/Mask
-#define AT91C_PMC_PCK7RDY (0x1 << 15) // (PMC) PCK7_RDY Status/Enable/Disable/Mask
-// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------
-// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------
-// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Clock Generator Controler
-// *****************************************************************************
-// *** Register offset in AT91S_CKGR structure ***
-#define CKGR_MOR ( 0) // Main Oscillator Register
-#define CKGR_MCFR ( 4) // Main Clock Frequency Register
-#define CKGR_PLLAR ( 8) // PLL A Register
-#define CKGR_PLLBR (12) // PLL B Register
-// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register --------
-#define AT91C_CKGR_MOSCEN (0x1 << 0) // (CKGR) Main Oscillator Enable
-#define AT91C_CKGR_OSCTEST (0x1 << 1) // (CKGR) Oscillator Test
-#define AT91C_CKGR_OSCOUNT (0xFF << 8) // (CKGR) Main Oscillator Start-up Time
-// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register --------
-#define AT91C_CKGR_MAINF (0xFFFF << 0) // (CKGR) Main Clock Frequency
-#define AT91C_CKGR_MAINRDY (0x1 << 16) // (CKGR) Main Clock Ready
-// -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register --------
-#define AT91C_CKGR_DIVA (0xFF << 0) // (CKGR) Divider Selected
-#define AT91C_CKGR_DIVA_0 (0x0) // (CKGR) Divider output is 0
-#define AT91C_CKGR_DIVA_BYPASS (0x1) // (CKGR) Divider is bypassed
-#define AT91C_CKGR_PLLACOUNT (0x3F << 8) // (CKGR) PLL A Counter
-#define AT91C_CKGR_OUTA (0x3 << 14) // (CKGR) PLL A Output Frequency Range
-#define AT91C_CKGR_OUTA_0 (0x0 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_1 (0x1 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_2 (0x2 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_OUTA_3 (0x3 << 14) // (CKGR) Please refer to the PLLA datasheet
-#define AT91C_CKGR_MULA (0x7FF << 16) // (CKGR) PLL A Multiplier
-#define AT91C_CKGR_SRCA (0x1 << 29) // (CKGR) PLL A Source
-// -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register --------
-#define AT91C_CKGR_DIVB (0xFF << 0) // (CKGR) Divider Selected
-#define AT91C_CKGR_DIVB_0 (0x0) // (CKGR) Divider output is 0
-#define AT91C_CKGR_DIVB_BYPASS (0x1) // (CKGR) Divider is bypassed
-#define AT91C_CKGR_PLLBCOUNT (0x3F << 8) // (CKGR) PLL B Counter
-#define AT91C_CKGR_OUTB (0x3 << 14) // (CKGR) PLL B Output Frequency Range
-#define AT91C_CKGR_OUTB_0 (0x0 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_1 (0x1 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_2 (0x2 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_OUTB_3 (0x3 << 14) // (CKGR) Please refer to the PLLB datasheet
-#define AT91C_CKGR_MULB (0x7FF << 16) // (CKGR) PLL B Multiplier
-#define AT91C_CKGR_USB_96M (0x1 << 28) // (CKGR) Divider for USB Ports
-#define AT91C_CKGR_USB_PLL (0x1 << 29) // (CKGR) PLL Use
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Parallel Input Output Controler
-// *****************************************************************************
-// *** Register offset in AT91S_PIO structure ***
-#define PIO_PER ( 0) // PIO Enable Register
-#define PIO_PDR ( 4) // PIO Disable Register
-#define PIO_PSR ( 8) // PIO Status Register
-#define PIO_OER (16) // Output Enable Register
-#define PIO_ODR (20) // Output Disable Registerr
-#define PIO_OSR (24) // Output Status Register
-#define PIO_IFER (32) // Input Filter Enable Register
-#define PIO_IFDR (36) // Input Filter Disable Register
-#define PIO_IFSR (40) // Input Filter Status Register
-#define PIO_SODR (48) // Set Output Data Register
-#define PIO_CODR (52) // Clear Output Data Register
-#define PIO_ODSR (56) // Output Data Status Register
-#define PIO_PDSR (60) // Pin Data Status Register
-#define PIO_IER (64) // Interrupt Enable Register
-#define PIO_IDR (68) // Interrupt Disable Register
-#define PIO_IMR (72) // Interrupt Mask Register
-#define PIO_ISR (76) // Interrupt Status Register
-#define PIO_MDER (80) // Multi-driver Enable Register
-#define PIO_MDDR (84) // Multi-driver Disable Register
-#define PIO_MDSR (88) // Multi-driver Status Register
-#define PIO_PPUDR (96) // Pull-up Disable Register
-#define PIO_PPUER (100) // Pull-up Enable Register
-#define PIO_PPUSR (104) // Pad Pull-up Status Register
-#define PIO_ASR (112) // Select A Register
-#define PIO_BSR (116) // Select B Register
-#define PIO_ABSR (120) // AB Select Status Register
-#define PIO_OWER (160) // Output Write Enable Register
-#define PIO_OWDR (164) // Output Write Disable Register
-#define PIO_OWSR (168) // Output Write Status Register
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Debug Unit
-// *****************************************************************************
-// *** Register offset in AT91S_DBGU structure ***
-#define DBGU_CR ( 0) // Control Register
-#define DBGU_MR ( 4) // Mode Register
-#define DBGU_IER ( 8) // Interrupt Enable Register
-#define DBGU_IDR (12) // Interrupt Disable Register
-#define DBGU_IMR (16) // Interrupt Mask Register
-#define DBGU_CSR (20) // Channel Status Register
-#define DBGU_RHR (24) // Receiver Holding Register
-#define DBGU_THR (28) // Transmitter Holding Register
-#define DBGU_BRGR (32) // Baud Rate Generator Register
-#define DBGU_C1R (64) // Chip ID1 Register
-#define DBGU_C2R (68) // Chip ID2 Register
-#define DBGU_FNTR (72) // Force NTRST Register
-#define DBGU_RPR (256) // Receive Pointer Register
-#define DBGU_RCR (260) // Receive Counter Register
-#define DBGU_TPR (264) // Transmit Pointer Register
-#define DBGU_TCR (268) // Transmit Counter Register
-#define DBGU_RNPR (272) // Receive Next Pointer Register
-#define DBGU_RNCR (276) // Receive Next Counter Register
-#define DBGU_TNPR (280) // Transmit Next Pointer Register
-#define DBGU_TNCR (284) // Transmit Next Counter Register
-#define DBGU_PTCR (288) // PDC Transfer Control Register
-#define DBGU_PTSR (292) // PDC Transfer Status Register
-// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register --------
-#define AT91C_US_RSTRX (0x1 << 2) // (DBGU) Reset Receiver
-#define AT91C_US_RSTTX (0x1 << 3) // (DBGU) Reset Transmitter
-#define AT91C_US_RXEN (0x1 << 4) // (DBGU) Receiver Enable
-#define AT91C_US_RXDIS (0x1 << 5) // (DBGU) Receiver Disable
-#define AT91C_US_TXEN (0x1 << 6) // (DBGU) Transmitter Enable
-#define AT91C_US_TXDIS (0x1 << 7) // (DBGU) Transmitter Disable
-// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register --------
-#define AT91C_US_PAR (0x7 << 9) // (DBGU) Parity type
-#define AT91C_US_PAR_EVEN (0x0 << 9) // (DBGU) Even Parity
-#define AT91C_US_PAR_ODD (0x1 << 9) // (DBGU) Odd Parity
-#define AT91C_US_PAR_SPACE (0x2 << 9) // (DBGU) Parity forced to 0 (Space)
-#define AT91C_US_PAR_MARK (0x3 << 9) // (DBGU) Parity forced to 1 (Mark)
-#define AT91C_US_PAR_NONE (0x4 << 9) // (DBGU) No Parity
-#define AT91C_US_PAR_MULTI_DROP (0x6 << 9) // (DBGU) Multi-drop mode
-#define AT91C_US_CHMODE (0x3 << 14) // (DBGU) Channel Mode
-#define AT91C_US_CHMODE_NORMAL (0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
-#define AT91C_US_CHMODE_AUTO (0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
-#define AT91C_US_CHMODE_LOCAL (0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
-#define AT91C_US_CHMODE_REMOTE (0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
-// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register --------
-#define AT91C_US_RXRDY (0x1 << 0) // (DBGU) RXRDY Interrupt
-#define AT91C_US_TXRDY (0x1 << 1) // (DBGU) TXRDY Interrupt
-#define AT91C_US_ENDRX (0x1 << 3) // (DBGU) End of Receive Transfer Interrupt
-#define AT91C_US_ENDTX (0x1 << 4) // (DBGU) End of Transmit Interrupt
-#define AT91C_US_OVRE (0x1 << 5) // (DBGU) Overrun Interrupt
-#define AT91C_US_FRAME (0x1 << 6) // (DBGU) Framing Error Interrupt
-#define AT91C_US_PARE (0x1 << 7) // (DBGU) Parity Error Interrupt
-#define AT91C_US_TXEMPTY (0x1 << 9) // (DBGU) TXEMPTY Interrupt
-#define AT91C_US_TXBUFE (0x1 << 11) // (DBGU) TXBUFE Interrupt
-#define AT91C_US_RXBUFF (0x1 << 12) // (DBGU) RXBUFF Interrupt
-#define AT91C_US_COMM_TX (0x1 << 30) // (DBGU) COMM_TX Interrupt
-#define AT91C_US_COMM_RX (0x1 << 31) // (DBGU) COMM_RX Interrupt
-// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register --------
-// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register --------
-// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register --------
-// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register --------
-#define AT91C_US_FORCE_NTRST (0x1 << 0) // (DBGU) Force NTRST in JTAG
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Peripheral Data Controller
-// *****************************************************************************
-// *** Register offset in AT91S_PDC structure ***
-#define PDC_RPR ( 0) // Receive Pointer Register
-#define PDC_RCR ( 4) // Receive Counter Register
-#define PDC_TPR ( 8) // Transmit Pointer Register
-#define PDC_TCR (12) // Transmit Counter Register
-#define PDC_RNPR (16) // Receive Next Pointer Register
-#define PDC_RNCR (20) // Receive Next Counter Register
-#define PDC_TNPR (24) // Transmit Next Pointer Register
-#define PDC_TNCR (28) // Transmit Next Counter Register
-#define PDC_PTCR (32) // PDC Transfer Control Register
-#define PDC_PTSR (36) // PDC Transfer Status Register
-// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register --------
-#define AT91C_PDC_RXTEN (0x1 << 0) // (PDC) Receiver Transfer Enable
-#define AT91C_PDC_RXTDIS (0x1 << 1) // (PDC) Receiver Transfer Disable
-#define AT91C_PDC_TXTEN (0x1 << 8) // (PDC) Transmitter Transfer Enable
-#define AT91C_PDC_TXTDIS (0x1 << 9) // (PDC) Transmitter Transfer Disable
-// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
-// *****************************************************************************
-// *** Register offset in AT91S_AIC structure ***
-#define AIC_SMR ( 0) // Source Mode Register
-#define AIC_SVR (128) // Source Vector Register
-#define AIC_IVR (256) // IRQ Vector Register
-#define AIC_FVR (260) // FIQ Vector Register
-#define AIC_ISR (264) // Interrupt Status Register
-#define AIC_IPR (268) // Interrupt Pending Register
-#define AIC_IMR (272) // Interrupt Mask Register
-#define AIC_CISR (276) // Core Interrupt Status Register
-#define AIC_IECR (288) // Interrupt Enable Command Register
-#define AIC_IDCR (292) // Interrupt Disable Command Register
-#define AIC_ICCR (296) // Interrupt Clear Command Register
-#define AIC_ISCR (300) // Interrupt Set Command Register
-#define AIC_EOICR (304) // End of Interrupt Command Register
-#define AIC_SPU (308) // Spurious Vector Register
-#define AIC_DCR (312) // Debug Control Register (Protect)
-#define AIC_FFER (320) // Fast Forcing Enable Register
-#define AIC_FFDR (324) // Fast Forcing Disable Register
-#define AIC_FFSR (328) // Fast Forcing Status Register
-// -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
-#define AT91C_AIC_PRIOR (0x7 << 0) // (AIC) Priority Level
-#define AT91C_AIC_PRIOR_LOWEST (0x0) // (AIC) Lowest priority level
-#define AT91C_AIC_PRIOR_HIGHEST (0x7) // (AIC) Highest priority level
-#define AT91C_AIC_SRCTYPE (0x3 << 5) // (AIC) Interrupt Source Type
-#define AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE (0x0 << 5) // (AIC) Internal Sources Code Label Level Sensitive
-#define AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED (0x1 << 5) // (AIC) Internal Sources Code Label Edge triggered
-#define AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL (0x2 << 5) // (AIC) External Sources Code Label High-level Sensitive
-#define AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE (0x3 << 5) // (AIC) External Sources Code Label Positive Edge triggered
-// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
-#define AT91C_AIC_NFIQ (0x1 << 0) // (AIC) NFIQ Status
-#define AT91C_AIC_NIRQ (0x1 << 1) // (AIC) NIRQ Status
-// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) --------
-#define AT91C_AIC_DCR_PROT (0x1 << 0) // (AIC) Protection Mode
-#define AT91C_AIC_DCR_GMSK (0x1 << 1) // (AIC) General Mask
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Serial Parallel Interface
-// *****************************************************************************
-// *** Register offset in AT91S_SPI structure ***
-#define SPI_CR ( 0) // Control Register
-#define SPI_MR ( 4) // Mode Register
-#define SPI_RDR ( 8) // Receive Data Register
-#define SPI_TDR (12) // Transmit Data Register
-#define SPI_SR (16) // Status Register
-#define SPI_IER (20) // Interrupt Enable Register
-#define SPI_IDR (24) // Interrupt Disable Register
-#define SPI_IMR (28) // Interrupt Mask Register
-#define SPI_CSR (48) // Chip Select Register
-#define SPI_RPR (256) // Receive Pointer Register
-#define SPI_RCR (260) // Receive Counter Register
-#define SPI_TPR (264) // Transmit Pointer Register
-#define SPI_TCR (268) // Transmit Counter Register
-#define SPI_RNPR (272) // Receive Next Pointer Register
-#define SPI_RNCR (276) // Receive Next Counter Register
-#define SPI_TNPR (280) // Transmit Next Pointer Register
-#define SPI_TNCR (284) // Transmit Next Counter Register
-#define SPI_PTCR (288) // PDC Transfer Control Register
-#define SPI_PTSR (292) // PDC Transfer Status Register
-// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register --------
-#define AT91C_SPI_SPIEN (0x1 << 0) // (SPI) SPI Enable
-#define AT91C_SPI_SPIDIS (0x1 << 1) // (SPI) SPI Disable
-#define AT91C_SPI_SWRST (0x1 << 7) // (SPI) SPI Software reset
-// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register --------
-#define AT91C_SPI_MSTR (0x1 << 0) // (SPI) Master/Slave Mode
-#define AT91C_SPI_PS (0x1 << 1) // (SPI) Peripheral Select
-#define AT91C_SPI_PS_FIXED (0x0 << 1) // (SPI) Fixed Peripheral Select
-#define AT91C_SPI_PS_VARIABLE (0x1 << 1) // (SPI) Variable Peripheral Select
-#define AT91C_SPI_PCSDEC (0x1 << 2) // (SPI) Chip Select Decode
-#define AT91C_SPI_DIV32 (0x1 << 3) // (SPI) Clock Selection
-#define AT91C_SPI_MODFDIS (0x1 << 4) // (SPI) Mode Fault Detection
-#define AT91C_SPI_LLB (0x1 << 7) // (SPI) Clock Selection
-#define AT91C_SPI_PCS (0xF << 16) // (SPI) Peripheral Chip Select
-#define AT91C_SPI_DLYBCS (0xFF << 24) // (SPI) Delay Between Chip Selects
-// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register --------
-#define AT91C_SPI_RD (0xFFFF << 0) // (SPI) Receive Data
-#define AT91C_SPI_RPCS (0xF << 16) // (SPI) Peripheral Chip Select Status
-// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register --------
-#define AT91C_SPI_TD (0xFFFF << 0) // (SPI) Transmit Data
-#define AT91C_SPI_TPCS (0xF << 16) // (SPI) Peripheral Chip Select Status
-// -------- SPI_SR : (SPI Offset: 0x10) Status Register --------
-#define AT91C_SPI_RDRF (0x1 << 0) // (SPI) Receive Data Register Full
-#define AT91C_SPI_TDRE (0x1 << 1) // (SPI) Transmit Data Register Empty
-#define AT91C_SPI_MODF (0x1 << 2) // (SPI) Mode Fault Error
-#define AT91C_SPI_OVRES (0x1 << 3) // (SPI) Overrun Error Status
-#define AT91C_SPI_SPENDRX (0x1 << 4) // (SPI) End of Receiver Transfer
-#define AT91C_SPI_SPENDTX (0x1 << 5) // (SPI) End of Receiver Transfer
-#define AT91C_SPI_RXBUFF (0x1 << 6) // (SPI) RXBUFF Interrupt
-#define AT91C_SPI_TXBUFE (0x1 << 7) // (SPI) TXBUFE Interrupt
-#define AT91C_SPI_SPIENS (0x1 << 16) // (SPI) Enable Status
-// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register --------
-// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register --------
-// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register --------
-// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register --------
-#define AT91C_SPI_CPOL (0x1 << 0) // (SPI) Clock Polarity
-#define AT91C_SPI_NCPHA (0x1 << 1) // (SPI) Clock Phase
-#define AT91C_SPI_BITS (0xF << 4) // (SPI) Bits Per Transfer
-#define AT91C_SPI_BITS_8 (0x0 << 4) // (SPI) 8 Bits Per transfer
-#define AT91C_SPI_BITS_9 (0x1 << 4) // (SPI) 9 Bits Per transfer
-#define AT91C_SPI_BITS_10 (0x2 << 4) // (SPI) 10 Bits Per transfer
-#define AT91C_SPI_BITS_11 (0x3 << 4) // (SPI) 11 Bits Per transfer
-#define AT91C_SPI_BITS_12 (0x4 << 4) // (SPI) 12 Bits Per transfer
-#define AT91C_SPI_BITS_13 (0x5 << 4) // (SPI) 13 Bits Per transfer
-#define AT91C_SPI_BITS_14 (0x6 << 4) // (SPI) 14 Bits Per transfer
-#define AT91C_SPI_BITS_15 (0x7 << 4) // (SPI) 15 Bits Per transfer
-#define AT91C_SPI_BITS_16 (0x8 << 4) // (SPI) 16 Bits Per transfer
-#define AT91C_SPI_SCBR (0xFF << 8) // (SPI) Serial Clock Baud Rate
-#define AT91C_SPI_DLYBS (0xFF << 16) // (SPI) Serial Clock Baud Rate
-#define AT91C_SPI_DLYBCT (0xFF << 24) // (SPI) Delay Between Consecutive Transfers
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Synchronous Serial Controller Interface
-// *****************************************************************************
-// *** Register offset in AT91S_SSC structure ***
-#define SSC_CR ( 0) // Control Register
-#define SSC_CMR ( 4) // Clock Mode Register
-#define SSC_RCMR (16) // Receive Clock ModeRegister
-#define SSC_RFMR (20) // Receive Frame Mode Register
-#define SSC_TCMR (24) // Transmit Clock Mode Register
-#define SSC_TFMR (28) // Transmit Frame Mode Register
-#define SSC_RHR (32) // Receive Holding Register
-#define SSC_THR (36) // Transmit Holding Register
-#define SSC_RSHR (48) // Receive Sync Holding Register
-#define SSC_TSHR (52) // Transmit Sync Holding Register
-#define SSC_RC0R (56) // Receive Compare 0 Register
-#define SSC_RC1R (60) // Receive Compare 1 Register
-#define SSC_SR (64) // Status Register
-#define SSC_IER (68) // Interrupt Enable Register
-#define SSC_IDR (72) // Interrupt Disable Register
-#define SSC_IMR (76) // Interrupt Mask Register
-#define SSC_RPR (256) // Receive Pointer Register
-#define SSC_RCR (260) // Receive Counter Register
-#define SSC_TPR (264) // Transmit Pointer Register
-#define SSC_TCR (268) // Transmit Counter Register
-#define SSC_RNPR (272) // Receive Next Pointer Register
-#define SSC_RNCR (276) // Receive Next Counter Register
-#define SSC_TNPR (280) // Transmit Next Pointer Register
-#define SSC_TNCR (284) // Transmit Next Counter Register
-#define SSC_PTCR (288) // PDC Transfer Control Register
-#define SSC_PTSR (292) // PDC Transfer Status Register
-// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register --------
-#define AT91C_SSC_RXEN (0x1 << 0) // (SSC) Receive Enable
-#define AT91C_SSC_RXDIS (0x1 << 1) // (SSC) Receive Disable
-#define AT91C_SSC_TXEN (0x1 << 8) // (SSC) Transmit Enable
-#define AT91C_SSC_TXDIS (0x1 << 9) // (SSC) Transmit Disable
-#define AT91C_SSC_SWRST (0x1 << 15) // (SSC) Software Reset
-// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register --------
-#define AT91C_SSC_CKS (0x3 << 0) // (SSC) Receive/Transmit Clock Selection
-#define AT91C_SSC_CKS_DIV (0x0) // (SSC) Divided Clock
-#define AT91C_SSC_CKS_TK (0x1) // (SSC) TK Clock signal
-#define AT91C_SSC_CKS_RK (0x2) // (SSC) RK pin
-#define AT91C_SSC_CKO (0x7 << 2) // (SSC) Receive/Transmit Clock Output Mode Selection
-#define AT91C_SSC_CKO_NONE (0x0 << 2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
-#define AT91C_SSC_CKO_CONTINOUS (0x1 << 2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
-#define AT91C_SSC_CKO_DATA_TX (0x2 << 2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
-#define AT91C_SSC_CKI (0x1 << 5) // (SSC) Receive/Transmit Clock Inversion
-#define AT91C_SSC_CKG (0x3 << 6) // (SSC) Receive/Transmit Clock Gating Selection
-#define AT91C_SSC_CKG_NONE (0x0 << 6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
-#define AT91C_SSC_CKG_LOW (0x1 << 6) // (SSC) Receive/Transmit Clock enabled only if RF Low
-#define AT91C_SSC_CKG_HIGH (0x2 << 6) // (SSC) Receive/Transmit Clock enabled only if RF High
-#define AT91C_SSC_START (0xF << 8) // (SSC) Receive/Transmit Start Selection
-#define AT91C_SSC_START_CONTINOUS (0x0 << 8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
-#define AT91C_SSC_START_TX (0x1 << 8) // (SSC) Transmit/Receive start
-#define AT91C_SSC_START_LOW_RF (0x2 << 8) // (SSC) Detection of a low level on RF input
-#define AT91C_SSC_START_HIGH_RF (0x3 << 8) // (SSC) Detection of a high level on RF input
-#define AT91C_SSC_START_FALL_RF (0x4 << 8) // (SSC) Detection of a falling edge on RF input
-#define AT91C_SSC_START_RISE_RF (0x5 << 8) // (SSC) Detection of a rising edge on RF input
-#define AT91C_SSC_START_LEVEL_RF (0x6 << 8) // (SSC) Detection of any level change on RF input
-#define AT91C_SSC_START_EDGE_RF (0x7 << 8) // (SSC) Detection of any edge on RF input
-#define AT91C_SSC_START_0 (0x8 << 8) // (SSC) Compare 0
-#define AT91C_SSC_STOP (0x1 << 12) // (SSC) Receive Stop Selection
-#define AT91C_SSC_STTOUT (0x1 << 15) // (SSC) Receive/Transmit Start Output Selection
-#define AT91C_SSC_STTDLY (0xFF << 16) // (SSC) Receive/Transmit Start Delay
-#define AT91C_SSC_PERIOD (0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
-// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register --------
-#define AT91C_SSC_DATLEN (0x1F << 0) // (SSC) Data Length
-#define AT91C_SSC_LOOP (0x1 << 5) // (SSC) Loop Mode
-#define AT91C_SSC_MSBF (0x1 << 7) // (SSC) Most Significant Bit First
-#define AT91C_SSC_DATNB (0xF << 8) // (SSC) Data Number per Frame
-#define AT91C_SSC_FSLEN (0xF << 16) // (SSC) Receive/Transmit Frame Sync length
-#define AT91C_SSC_FSOS (0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
-#define AT91C_SSC_FSOS_NONE (0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
-#define AT91C_SSC_FSOS_NEGATIVE (0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
-#define AT91C_SSC_FSOS_POSITIVE (0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
-#define AT91C_SSC_FSOS_LOW (0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
-#define AT91C_SSC_FSOS_HIGH (0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
-#define AT91C_SSC_FSOS_TOGGLE (0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
-#define AT91C_SSC_FSEDGE (0x1 << 24) // (SSC) Frame Sync Edge Detection
-// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register --------
-// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register --------
-#define AT91C_SSC_DATDEF (0x1 << 5) // (SSC) Data Default Value
-#define AT91C_SSC_FSDEN (0x1 << 23) // (SSC) Frame Sync Data Enable
-// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register --------
-#define AT91C_SSC_TXRDY (0x1 << 0) // (SSC) Transmit Ready
-#define AT91C_SSC_TXEMPTY (0x1 << 1) // (SSC) Transmit Empty
-#define AT91C_SSC_ENDTX (0x1 << 2) // (SSC) End Of Transmission
-#define AT91C_SSC_TXBUFE (0x1 << 3) // (SSC) Transmit Buffer Empty
-#define AT91C_SSC_RXRDY (0x1 << 4) // (SSC) Receive Ready
-#define AT91C_SSC_OVRUN (0x1 << 5) // (SSC) Receive Overrun
-#define AT91C_SSC_ENDRX (0x1 << 6) // (SSC) End of Reception
-#define AT91C_SSC_RXBUFF (0x1 << 7) // (SSC) Receive Buffer Full
-#define AT91C_SSC_CP0 (0x1 << 8) // (SSC) Compare 0
-#define AT91C_SSC_CP1 (0x1 << 9) // (SSC) Compare 1
-#define AT91C_SSC_TXSYN (0x1 << 10) // (SSC) Transmit Sync
-#define AT91C_SSC_RXSYN (0x1 << 11) // (SSC) Receive Sync
-#define AT91C_SSC_TXENA (0x1 << 16) // (SSC) Transmit Enable
-#define AT91C_SSC_RXENA (0x1 << 17) // (SSC) Receive Enable
-// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register --------
-// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register --------
-// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Usart
-// *****************************************************************************
-// *** Register offset in AT91S_USART structure ***
-#define US_CR ( 0) // Control Register
-#define US_MR ( 4) // Mode Register
-#define US_IER ( 8) // Interrupt Enable Register
-#define US_IDR (12) // Interrupt Disable Register
-#define US_IMR (16) // Interrupt Mask Register
-#define US_CSR (20) // Channel Status Register
-#define US_RHR (24) // Receiver Holding Register
-#define US_THR (28) // Transmitter Holding Register
-#define US_BRGR (32) // Baud Rate Generator Register
-#define US_RTOR (36) // Receiver Time-out Register
-#define US_TTGR (40) // Transmitter Time-guard Register
-#define US_FIDI (64) // FI_DI_Ratio Register
-#define US_NER (68) // Nb Errors Register
-#define US_XXR (72) // XON_XOFF Register
-#define US_IF (76) // IRDA_FILTER Register
-#define US_RPR (256) // Receive Pointer Register
-#define US_RCR (260) // Receive Counter Register
-#define US_TPR (264) // Transmit Pointer Register
-#define US_TCR (268) // Transmit Counter Register
-#define US_RNPR (272) // Receive Next Pointer Register
-#define US_RNCR (276) // Receive Next Counter Register
-#define US_TNPR (280) // Transmit Next Pointer Register
-#define US_TNCR (284) // Transmit Next Counter Register
-#define US_PTCR (288) // PDC Transfer Control Register
-#define US_PTSR (292) // PDC Transfer Status Register
-// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
-#define AT91C_US_RSTSTA (0x1 << 8) // (USART) Reset Status Bits
-#define AT91C_US_STTBRK (0x1 << 9) // (USART) Start Break
-#define AT91C_US_STPBRK (0x1 << 10) // (USART) Stop Break
-#define AT91C_US_STTTO (0x1 << 11) // (USART) Start Time-out
-#define AT91C_US_SENDA (0x1 << 12) // (USART) Send Address
-#define AT91C_US_RSTIT (0x1 << 13) // (USART) Reset Iterations
-#define AT91C_US_RSTNACK (0x1 << 14) // (USART) Reset Non Acknowledge
-#define AT91C_US_RETTO (0x1 << 15) // (USART) Rearm Time-out
-#define AT91C_US_DTREN (0x1 << 16) // (USART) Data Terminal ready Enable
-#define AT91C_US_DTRDIS (0x1 << 17) // (USART) Data Terminal ready Disable
-#define AT91C_US_RTSEN (0x1 << 18) // (USART) Request to Send enable
-#define AT91C_US_RTSDIS (0x1 << 19) // (USART) Request to Send Disable
-// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
-#define AT91C_US_USMODE (0xF << 0) // (USART) Usart mode
-#define AT91C_US_USMODE_NORMAL (0x0) // (USART) Normal
-#define AT91C_US_USMODE_RS485 (0x1) // (USART) RS485
-#define AT91C_US_USMODE_HWHSH (0x2) // (USART) Hardware Handshaking
-#define AT91C_US_USMODE_MODEM (0x3) // (USART) Modem
-#define AT91C_US_USMODE_ISO7816_0 (0x4) // (USART) ISO7816 protocol: T = 0
-#define AT91C_US_USMODE_ISO7816_1 (0x6) // (USART) ISO7816 protocol: T = 1
-#define AT91C_US_USMODE_IRDA (0x8) // (USART) IrDA
-#define AT91C_US_USMODE_SWHSH (0xC) // (USART) Software Handshaking
-#define AT91C_US_CLKS (0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock
-#define AT91C_US_CLKS_CLOCK (0x0 << 4) // (USART) Clock
-#define AT91C_US_CLKS_FDIV1 (0x1 << 4) // (USART) fdiv1
-#define AT91C_US_CLKS_SLOW (0x2 << 4) // (USART) slow_clock (ARM)
-#define AT91C_US_CLKS_EXT (0x3 << 4) // (USART) External (SCK)
-#define AT91C_US_CHRL (0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock
-#define AT91C_US_CHRL_5_BITS (0x0 << 6) // (USART) Character Length: 5 bits
-#define AT91C_US_CHRL_6_BITS (0x1 << 6) // (USART) Character Length: 6 bits
-#define AT91C_US_CHRL_7_BITS (0x2 << 6) // (USART) Character Length: 7 bits
-#define AT91C_US_CHRL_8_BITS (0x3 << 6) // (USART) Character Length: 8 bits
-#define AT91C_US_SYNC (0x1 << 8) // (USART) Synchronous Mode Select
-#define AT91C_US_NBSTOP (0x3 << 12) // (USART) Number of Stop bits
-#define AT91C_US_NBSTOP_1_BIT (0x0 << 12) // (USART) 1 stop bit
-#define AT91C_US_NBSTOP_15_BIT (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
-#define AT91C_US_NBSTOP_2_BIT (0x2 << 12) // (USART) 2 stop bits
-#define AT91C_US_MSBF (0x1 << 16) // (USART) Bit Order
-#define AT91C_US_MODE9 (0x1 << 17) // (USART) 9-bit Character length
-#define AT91C_US_CKLO (0x1 << 18) // (USART) Clock Output Select
-#define AT91C_US_OVER (0x1 << 19) // (USART) Over Sampling Mode
-#define AT91C_US_INACK (0x1 << 20) // (USART) Inhibit Non Acknowledge
-#define AT91C_US_DSNACK (0x1 << 21) // (USART) Disable Successive NACK
-#define AT91C_US_MAX_ITER (0x1 << 24) // (USART) Number of Repetitions
-#define AT91C_US_FILTER (0x1 << 28) // (USART) Receive Line Filter
-// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register --------
-#define AT91C_US_RXBRK (0x1 << 2) // (USART) Break Received/End of Break
-#define AT91C_US_TIMEOUT (0x1 << 8) // (USART) Receiver Time-out
-#define AT91C_US_ITERATION (0x1 << 10) // (USART) Max number of Repetitions Reached
-#define AT91C_US_NACK (0x1 << 13) // (USART) Non Acknowledge
-#define AT91C_US_RIIC (0x1 << 16) // (USART) Ring INdicator Input Change Flag
-#define AT91C_US_DSRIC (0x1 << 17) // (USART) Data Set Ready Input Change Flag
-#define AT91C_US_DCDIC (0x1 << 18) // (USART) Data Carrier Flag
-#define AT91C_US_CTSIC (0x1 << 19) // (USART) Clear To Send Input Change Flag
-// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register --------
-// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register --------
-// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register --------
-#define AT91C_US_RI (0x1 << 20) // (USART) Image of RI Input
-#define AT91C_US_DSR (0x1 << 21) // (USART) Image of DSR Input
-#define AT91C_US_DCD (0x1 << 22) // (USART) Image of DCD Input
-#define AT91C_US_CTS (0x1 << 23) // (USART) Image of CTS Input
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Two-wire Interface
-// *****************************************************************************
-// *** Register offset in AT91S_TWI structure ***
-#define TWI_CR ( 0) // Control Register
-#define TWI_MMR ( 4) // Master Mode Register
-#define TWI_SMR ( 8) // Slave Mode Register
-#define TWI_IADR (12) // Internal Address Register
-#define TWI_CWGR (16) // Clock Waveform Generator Register
-#define TWI_SR (32) // Status Register
-#define TWI_IER (36) // Interrupt Enable Register
-#define TWI_IDR (40) // Interrupt Disable Register
-#define TWI_IMR (44) // Interrupt Mask Register
-#define TWI_RHR (48) // Receive Holding Register
-#define TWI_THR (52) // Transmit Holding Register
-// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register --------
-#define AT91C_TWI_START (0x1 << 0) // (TWI) Send a START Condition
-#define AT91C_TWI_STOP (0x1 << 1) // (TWI) Send a STOP Condition
-#define AT91C_TWI_MSEN (0x1 << 2) // (TWI) TWI Master Transfer Enabled
-#define AT91C_TWI_MSDIS (0x1 << 3) // (TWI) TWI Master Transfer Disabled
-#define AT91C_TWI_SVEN (0x1 << 4) // (TWI) TWI Slave Transfer Enabled
-#define AT91C_TWI_SVDIS (0x1 << 5) // (TWI) TWI Slave Transfer Disabled
-#define AT91C_TWI_SWRST (0x1 << 7) // (TWI) Software Reset
-// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register --------
-#define AT91C_TWI_IADRSZ (0x3 << 8) // (TWI) Internal Device Address Size
-#define AT91C_TWI_IADRSZ_NO (0x0 << 8) // (TWI) No internal device address
-#define AT91C_TWI_IADRSZ_1_BYTE (0x1 << 8) // (TWI) One-byte internal device address
-#define AT91C_TWI_IADRSZ_2_BYTE (0x2 << 8) // (TWI) Two-byte internal device address
-#define AT91C_TWI_IADRSZ_3_BYTE (0x3 << 8) // (TWI) Three-byte internal device address
-#define AT91C_TWI_MREAD (0x1 << 12) // (TWI) Master Read Direction
-#define AT91C_TWI_DADR (0x7F << 16) // (TWI) Device Address
-// -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register --------
-#define AT91C_TWI_SADR (0x7F << 16) // (TWI) Slave Device Address
-// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register --------
-#define AT91C_TWI_CLDIV (0xFF << 0) // (TWI) Clock Low Divider
-#define AT91C_TWI_CHDIV (0xFF << 8) // (TWI) Clock High Divider
-#define AT91C_TWI_CKDIV (0x7 << 16) // (TWI) Clock Divider
-// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register --------
-#define AT91C_TWI_TXCOMP (0x1 << 0) // (TWI) Transmission Completed
-#define AT91C_TWI_RXRDY (0x1 << 1) // (TWI) Receive holding register ReaDY
-#define AT91C_TWI_TXRDY (0x1 << 2) // (TWI) Transmit holding register ReaDY
-#define AT91C_TWI_SVREAD (0x1 << 3) // (TWI) Slave Read
-#define AT91C_TWI_SVACC (0x1 << 4) // (TWI) Slave Access
-#define AT91C_TWI_GCACC (0x1 << 5) // (TWI) General Call Access
-#define AT91C_TWI_OVRE (0x1 << 6) // (TWI) Overrun Error
-#define AT91C_TWI_UNRE (0x1 << 7) // (TWI) Underrun Error
-#define AT91C_TWI_NACK (0x1 << 8) // (TWI) Not Acknowledged
-#define AT91C_TWI_ARBLST (0x1 << 9) // (TWI) Arbitration Lost
-// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register --------
-// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register --------
-// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Multimedia Card Interface
-// *****************************************************************************
-// *** Register offset in AT91S_MCI structure ***
-#define MCI_CR ( 0) // MCI Control Register
-#define MCI_MR ( 4) // MCI Mode Register
-#define MCI_DTOR ( 8) // MCI Data Timeout Register
-#define MCI_SDCR (12) // MCI SD Card Register
-#define MCI_ARGR (16) // MCI Argument Register
-#define MCI_CMDR (20) // MCI Command Register
-#define MCI_RSPR (32) // MCI Response Register
-#define MCI_RDR (48) // MCI Receive Data Register
-#define MCI_TDR (52) // MCI Transmit Data Register
-#define MCI_SR (64) // MCI Status Register
-#define MCI_IER (68) // MCI Interrupt Enable Register
-#define MCI_IDR (72) // MCI Interrupt Disable Register
-#define MCI_IMR (76) // MCI Interrupt Mask Register
-#define MCI_RPR (256) // Receive Pointer Register
-#define MCI_RCR (260) // Receive Counter Register
-#define MCI_TPR (264) // Transmit Pointer Register
-#define MCI_TCR (268) // Transmit Counter Register
-#define MCI_RNPR (272) // Receive Next Pointer Register
-#define MCI_RNCR (276) // Receive Next Counter Register
-#define MCI_TNPR (280) // Transmit Next Pointer Register
-#define MCI_TNCR (284) // Transmit Next Counter Register
-#define MCI_PTCR (288) // PDC Transfer Control Register
-#define MCI_PTSR (292) // PDC Transfer Status Register
-// -------- MCI_CR : (MCI Offset: 0x0) MCI Control Register --------
-#define AT91C_MCI_MCIEN (0x1 << 0) // (MCI) Multimedia Interface Enable
-#define AT91C_MCI_MCIDIS (0x1 << 1) // (MCI) Multimedia Interface Disable
-#define AT91C_MCI_PWSEN (0x1 << 2) // (MCI) Power Save Mode Enable
-#define AT91C_MCI_PWSDIS (0x1 << 3) // (MCI) Power Save Mode Disable
-// -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register --------
-#define AT91C_MCI_CLKDIV (0x1 << 0) // (MCI) Clock Divider
-#define AT91C_MCI_PWSDIV (0x1 << 8) // (MCI) Power Saving Divider
-#define AT91C_MCI_PDCPADV (0x1 << 14) // (MCI) PDC Padding Value
-#define AT91C_MCI_PDCMODE (0x1 << 15) // (MCI) PDC Oriented Mode
-#define AT91C_MCI_BLKLEN (0x1 << 18) // (MCI) Data Block Length
-// -------- MCI_DTOR : (MCI Offset: 0x8) MCI Data Timeout Register --------
-#define AT91C_MCI_DTOCYC (0x1 << 0) // (MCI) Data Timeout Cycle Number
-#define AT91C_MCI_DTOMUL (0x7 << 4) // (MCI) Data Timeout Multiplier
-#define AT91C_MCI_DTOMUL_1 (0x0 << 4) // (MCI) DTOCYC x 1
-#define AT91C_MCI_DTOMUL_16 (0x1 << 4) // (MCI) DTOCYC x 16
-#define AT91C_MCI_DTOMUL_128 (0x2 << 4) // (MCI) DTOCYC x 128
-#define AT91C_MCI_DTOMUL_256 (0x3 << 4) // (MCI) DTOCYC x 256
-#define AT91C_MCI_DTOMUL_1024 (0x4 << 4) // (MCI) DTOCYC x 1024
-#define AT91C_MCI_DTOMUL_4096 (0x5 << 4) // (MCI) DTOCYC x 4096
-#define AT91C_MCI_DTOMUL_65536 (0x6 << 4) // (MCI) DTOCYC x 65536
-#define AT91C_MCI_DTOMUL_1048576 (0x7 << 4) // (MCI) DTOCYC x 1048576
-// -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register --------
-#define AT91C_MCI_SCDSEL (0x1 << 0) // (MCI) SD Card Selector
-#define AT91C_MCI_SCDBUS (0x1 << 7) // (MCI) SD Card Bus Width
-// -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register --------
-#define AT91C_MCI_CMDNB (0x1F << 0) // (MCI) Command Number
-#define AT91C_MCI_RSPTYP (0x3 << 6) // (MCI) Response Type
-#define AT91C_MCI_RSPTYP_NO (0x0 << 6) // (MCI) No response
-#define AT91C_MCI_RSPTYP_48 (0x1 << 6) // (MCI) 48-bit response
-#define AT91C_MCI_RSPTYP_136 (0x2 << 6) // (MCI) 136-bit response
-#define AT91C_MCI_SPCMD (0x7 << 8) // (MCI) Special CMD
-#define AT91C_MCI_SPCMD_NONE (0x0 << 8) // (MCI) Not a special CMD
-#define AT91C_MCI_SPCMD_INIT (0x1 << 8) // (MCI) Initialization CMD
-#define AT91C_MCI_SPCMD_SYNC (0x2 << 8) // (MCI) Synchronized CMD
-#define AT91C_MCI_SPCMD_IT_CMD (0x4 << 8) // (MCI) Interrupt command
-#define AT91C_MCI_SPCMD_IT_REP (0x5 << 8) // (MCI) Interrupt response
-#define AT91C_MCI_OPDCMD (0x1 << 11) // (MCI) Open Drain Command
-#define AT91C_MCI_MAXLAT (0x1 << 12) // (MCI) Maximum Latency for Command to respond
-#define AT91C_MCI_TRCMD (0x3 << 16) // (MCI) Transfer CMD
-#define AT91C_MCI_TRCMD_NO (0x0 << 16) // (MCI) No transfer
-#define AT91C_MCI_TRCMD_START (0x1 << 16) // (MCI) Start transfer
-#define AT91C_MCI_TRCMD_STOP (0x2 << 16) // (MCI) Stop transfer
-#define AT91C_MCI_TRDIR (0x1 << 18) // (MCI) Transfer Direction
-#define AT91C_MCI_TRTYP (0x3 << 19) // (MCI) Transfer Type
-#define AT91C_MCI_TRTYP_BLOCK (0x0 << 19) // (MCI) Block Transfer type
-#define AT91C_MCI_TRTYP_MULTIPLE (0x1 << 19) // (MCI) Multiple Block transfer type
-#define AT91C_MCI_TRTYP_STREAM (0x2 << 19) // (MCI) Stream transfer type
-// -------- MCI_SR : (MCI Offset: 0x40) MCI Status Register --------
-#define AT91C_MCI_CMDRDY (0x1 << 0) // (MCI) Command Ready flag
-#define AT91C_MCI_RXRDY (0x1 << 1) // (MCI) RX Ready flag
-#define AT91C_MCI_TXRDY (0x1 << 2) // (MCI) TX Ready flag
-#define AT91C_MCI_BLKE (0x1 << 3) // (MCI) Data Block Transfer Ended flag
-#define AT91C_MCI_DTIP (0x1 << 4) // (MCI) Data Transfer in Progress flag
-#define AT91C_MCI_NOTBUSY (0x1 << 5) // (MCI) Data Line Not Busy flag
-#define AT91C_MCI_ENDRX (0x1 << 6) // (MCI) End of RX Buffer flag
-#define AT91C_MCI_ENDTX (0x1 << 7) // (MCI) End of TX Buffer flag
-#define AT91C_MCI_RXBUFF (0x1 << 14) // (MCI) RX Buffer Full flag
-#define AT91C_MCI_TXBUFE (0x1 << 15) // (MCI) TX Buffer Empty flag
-#define AT91C_MCI_RINDE (0x1 << 16) // (MCI) Response Index Error flag
-#define AT91C_MCI_RDIRE (0x1 << 17) // (MCI) Response Direction Error flag
-#define AT91C_MCI_RCRCE (0x1 << 18) // (MCI) Response CRC Error flag
-#define AT91C_MCI_RENDE (0x1 << 19) // (MCI) Response End Bit Error flag
-#define AT91C_MCI_RTOE (0x1 << 20) // (MCI) Response Time-out Error flag
-#define AT91C_MCI_DCRCE (0x1 << 21) // (MCI) data CRC Error flag
-#define AT91C_MCI_DTOE (0x1 << 22) // (MCI) Data timeout Error flag
-#define AT91C_MCI_OVRE (0x1 << 30) // (MCI) Overrun flag
-#define AT91C_MCI_UNRE (0x1 << 31) // (MCI) Underrun flag
-// -------- MCI_IER : (MCI Offset: 0x44) MCI Interrupt Enable Register --------
-// -------- MCI_IDR : (MCI Offset: 0x48) MCI Interrupt Disable Register --------
-// -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR USB Device Interface
-// *****************************************************************************
-// *** Register offset in AT91S_UDP structure ***
-#define UDP_NUM ( 0) // Frame Number Register
-#define UDP_GLBSTATE ( 4) // Global State Register
-#define UDP_FADDR ( 8) // Function Address Register
-#define UDP_IER (16) // Interrupt Enable Register
-#define UDP_IDR (20) // Interrupt Disable Register
-#define UDP_IMR (24) // Interrupt Mask Register
-#define UDP_ISR (28) // Interrupt Status Register
-#define UDP_ICR (32) // Interrupt Clear Register
-#define UDP_RSTEP (40) // Reset Endpoint Register
-#define UDP_CSR (48) // Endpoint Control and Status Register
-#define UDP_FDR (80) // Endpoint FIFO Data Register
-// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register --------
-#define AT91C_UDP_FRM_NUM (0x7FF << 0) // (UDP) Frame Number as Defined in the Packet Field Formats
-#define AT91C_UDP_FRM_ERR (0x1 << 16) // (UDP) Frame Error
-#define AT91C_UDP_FRM_OK (0x1 << 17) // (UDP) Frame OK
-// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register --------
-#define AT91C_UDP_FADDEN (0x1 << 0) // (UDP) Function Address Enable
-#define AT91C_UDP_CONFG (0x1 << 1) // (UDP) Configured
-#define AT91C_UDP_RMWUPE (0x1 << 2) // (UDP) Remote Wake Up Enable
-#define AT91C_UDP_RSMINPR (0x1 << 3) // (UDP) A Resume Has Been Sent to the Host
-// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register --------
-#define AT91C_UDP_FADD (0xFF << 0) // (UDP) Function Address Value
-#define AT91C_UDP_FEN (0x1 << 8) // (UDP) Function Enable
-// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register --------
-#define AT91C_UDP_EPINT0 (0x1 << 0) // (UDP) Endpoint 0 Interrupt
-#define AT91C_UDP_EPINT1 (0x1 << 1) // (UDP) Endpoint 0 Interrupt
-#define AT91C_UDP_EPINT2 (0x1 << 2) // (UDP) Endpoint 2 Interrupt
-#define AT91C_UDP_EPINT3 (0x1 << 3) // (UDP) Endpoint 3 Interrupt
-#define AT91C_UDP_EPINT4 (0x1 << 4) // (UDP) Endpoint 4 Interrupt
-#define AT91C_UDP_EPINT5 (0x1 << 5) // (UDP) Endpoint 5 Interrupt
-#define AT91C_UDP_EPINT6 (0x1 << 6) // (UDP) Endpoint 6 Interrupt
-#define AT91C_UDP_EPINT7 (0x1 << 7) // (UDP) Endpoint 7 Interrupt
-#define AT91C_UDP_RXSUSP (0x1 << 8) // (UDP) USB Suspend Interrupt
-#define AT91C_UDP_RXRSM (0x1 << 9) // (UDP) USB Resume Interrupt
-#define AT91C_UDP_EXTRSM (0x1 << 10) // (UDP) USB External Resume Interrupt
-#define AT91C_UDP_SOFINT (0x1 << 11) // (UDP) USB Start Of frame Interrupt
-#define AT91C_UDP_WAKEUP (0x1 << 13) // (UDP) USB Resume Interrupt
-// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register --------
-// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register --------
-// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register --------
-#define AT91C_UDP_ENDBUSRES (0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
-// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register --------
-// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register --------
-#define AT91C_UDP_EP0 (0x1 << 0) // (UDP) Reset Endpoint 0
-#define AT91C_UDP_EP1 (0x1 << 1) // (UDP) Reset Endpoint 1
-#define AT91C_UDP_EP2 (0x1 << 2) // (UDP) Reset Endpoint 2
-#define AT91C_UDP_EP3 (0x1 << 3) // (UDP) Reset Endpoint 3
-#define AT91C_UDP_EP4 (0x1 << 4) // (UDP) Reset Endpoint 4
-#define AT91C_UDP_EP5 (0x1 << 5) // (UDP) Reset Endpoint 5
-#define AT91C_UDP_EP6 (0x1 << 6) // (UDP) Reset Endpoint 6
-#define AT91C_UDP_EP7 (0x1 << 7) // (UDP) Reset Endpoint 7
-// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register --------
-#define AT91C_UDP_TXCOMP (0x1 << 0) // (UDP) Generates an IN packet with data previously written in the DPR
-#define AT91C_UDP_RX_DATA_BK0 (0x1 << 1) // (UDP) Receive Data Bank 0
-#define AT91C_UDP_RXSETUP (0x1 << 2) // (UDP) Sends STALL to the Host (Control endpoints)
-#define AT91C_UDP_ISOERROR (0x1 << 3) // (UDP) Isochronous error (Isochronous endpoints)
-#define AT91C_UDP_TXPKTRDY (0x1 << 4) // (UDP) Transmit Packet Ready
-#define AT91C_UDP_FORCESTALL (0x1 << 5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
-#define AT91C_UDP_RX_DATA_BK1 (0x1 << 6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
-#define AT91C_UDP_DIR (0x1 << 7) // (UDP) Transfer Direction
-#define AT91C_UDP_EPTYPE (0x7 << 8) // (UDP) Endpoint type
-#define AT91C_UDP_EPTYPE_CTRL (0x0 << 8) // (UDP) Control
-#define AT91C_UDP_EPTYPE_ISO_OUT (0x1 << 8) // (UDP) Isochronous OUT
-#define AT91C_UDP_EPTYPE_BULK_OUT (0x2 << 8) // (UDP) Bulk OUT
-#define AT91C_UDP_EPTYPE_INT_OUT (0x3 << 8) // (UDP) Interrupt OUT
-#define AT91C_UDP_EPTYPE_ISO_IN (0x5 << 8) // (UDP) Isochronous IN
-#define AT91C_UDP_EPTYPE_BULK_IN (0x6 << 8) // (UDP) Bulk IN
-#define AT91C_UDP_EPTYPE_INT_IN (0x7 << 8) // (UDP) Interrupt IN
-#define AT91C_UDP_DTGLE (0x1 << 11) // (UDP) Data Toggle
-#define AT91C_UDP_EPEDS (0x1 << 15) // (UDP) Endpoint Enable Disable
-#define AT91C_UDP_RXBYTECNT (0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Timer Counter Channel Interface
-// *****************************************************************************
-// *** Register offset in AT91S_TC structure ***
-#define TC_CCR ( 0) // Channel Control Register
-#define TC_CMR ( 4) // Channel Mode Register
-#define TC_CV (16) // Counter Value
-#define TC_RA (20) // Register A
-#define TC_RB (24) // Register B
-#define TC_RC (28) // Register C
-#define TC_SR (32) // Status Register
-#define TC_IER (36) // Interrupt Enable Register
-#define TC_IDR (40) // Interrupt Disable Register
-#define TC_IMR (44) // Interrupt Mask Register
-// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register --------
-#define AT91C_TC_CLKEN (0x1 << 0) // (TC) Counter Clock Enable Command
-#define AT91C_TC_CLKDIS (0x1 << 1) // (TC) Counter Clock Disable Command
-#define AT91C_TC_SWTRG (0x1 << 2) // (TC) Software Trigger Command
-// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode --------
-#define AT91C_TC_CPCSTOP (0x1 << 6) // (TC) Counter Clock Stopped with RC Compare
-#define AT91C_TC_CPCDIS (0x1 << 7) // (TC) Counter Clock Disable with RC Compare
-#define AT91C_TC_EEVTEDG (0x3 << 8) // (TC) External Event Edge Selection
-#define AT91C_TC_EEVTEDG_NONE (0x0 << 8) // (TC) Edge: None
-#define AT91C_TC_EEVTEDG_RISING (0x1 << 8) // (TC) Edge: rising edge
-#define AT91C_TC_EEVTEDG_FALLING (0x2 << 8) // (TC) Edge: falling edge
-#define AT91C_TC_EEVTEDG_BOTH (0x3 << 8) // (TC) Edge: each edge
-#define AT91C_TC_EEVT (0x3 << 10) // (TC) External Event Selection
-#define AT91C_TC_EEVT_NONE (0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
-#define AT91C_TC_EEVT_RISING (0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
-#define AT91C_TC_EEVT_FALLING (0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
-#define AT91C_TC_EEVT_BOTH (0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
-#define AT91C_TC_ENETRG (0x1 << 12) // (TC) External Event Trigger enable
-#define AT91C_TC_WAVESEL (0x3 << 13) // (TC) Waveform Selection
-#define AT91C_TC_WAVESEL_UP (0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UPDOWN (0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UP_AUTO (0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
-#define AT91C_TC_WAVESEL_UPDOWN_AUTO (0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
-#define AT91C_TC_CPCTRG (0x1 << 14) // (TC) RC Compare Trigger Enable
-#define AT91C_TC_WAVE (0x1 << 15) // (TC)
-#define AT91C_TC_ACPA (0x3 << 16) // (TC) RA Compare Effect on TIOA
-#define AT91C_TC_ACPA_NONE (0x0 << 16) // (TC) Effect: none
-#define AT91C_TC_ACPA_SET (0x1 << 16) // (TC) Effect: set
-#define AT91C_TC_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear
-#define AT91C_TC_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle
-#define AT91C_TC_ACPC (0x3 << 18) // (TC) RC Compare Effect on TIOA
-#define AT91C_TC_ACPC_NONE (0x0 << 18) // (TC) Effect: none
-#define AT91C_TC_ACPC_SET (0x1 << 18) // (TC) Effect: set
-#define AT91C_TC_ACPC_CLEAR (0x2 << 18) // (TC) Effect: clear
-#define AT91C_TC_ACPC_TOGGLE (0x3 << 18) // (TC) Effect: toggle
-#define AT91C_TC_AEEVT (0x3 << 20) // (TC) External Event Effect on TIOA
-#define AT91C_TC_AEEVT_NONE (0x0 << 20) // (TC) Effect: none
-#define AT91C_TC_AEEVT_SET (0x1 << 20) // (TC) Effect: set
-#define AT91C_TC_AEEVT_CLEAR (0x2 << 20) // (TC) Effect: clear
-#define AT91C_TC_AEEVT_TOGGLE (0x3 << 20) // (TC) Effect: toggle
-#define AT91C_TC_ASWTRG (0x3 << 22) // (TC) Software Trigger Effect on TIOA
-#define AT91C_TC_ASWTRG_NONE (0x0 << 22) // (TC) Effect: none
-#define AT91C_TC_ASWTRG_SET (0x1 << 22) // (TC) Effect: set
-#define AT91C_TC_ASWTRG_CLEAR (0x2 << 22) // (TC) Effect: clear
-#define AT91C_TC_ASWTRG_TOGGLE (0x3 << 22) // (TC) Effect: toggle
-#define AT91C_TC_BCPB (0x3 << 24) // (TC) RB Compare Effect on TIOB
-#define AT91C_TC_BCPB_NONE (0x0 << 24) // (TC) Effect: none
-#define AT91C_TC_BCPB_SET (0x1 << 24) // (TC) Effect: set
-#define AT91C_TC_BCPB_CLEAR (0x2 << 24) // (TC) Effect: clear
-#define AT91C_TC_BCPB_TOGGLE (0x3 << 24) // (TC) Effect: toggle
-#define AT91C_TC_BCPC (0x3 << 26) // (TC) RC Compare Effect on TIOB
-#define AT91C_TC_BCPC_NONE (0x0 << 26) // (TC) Effect: none
-#define AT91C_TC_BCPC_SET (0x1 << 26) // (TC) Effect: set
-#define AT91C_TC_BCPC_CLEAR (0x2 << 26) // (TC) Effect: clear
-#define AT91C_TC_BCPC_TOGGLE (0x3 << 26) // (TC) Effect: toggle
-#define AT91C_TC_BEEVT (0x3 << 28) // (TC) External Event Effect on TIOB
-#define AT91C_TC_BEEVT_NONE (0x0 << 28) // (TC) Effect: none
-#define AT91C_TC_BEEVT_SET (0x1 << 28) // (TC) Effect: set
-#define AT91C_TC_BEEVT_CLEAR (0x2 << 28) // (TC) Effect: clear
-#define AT91C_TC_BEEVT_TOGGLE (0x3 << 28) // (TC) Effect: toggle
-#define AT91C_TC_BSWTRG (0x3 << 30) // (TC) Software Trigger Effect on TIOB
-#define AT91C_TC_BSWTRG_NONE (0x0 << 30) // (TC) Effect: none
-#define AT91C_TC_BSWTRG_SET (0x1 << 30) // (TC) Effect: set
-#define AT91C_TC_BSWTRG_CLEAR (0x2 << 30) // (TC) Effect: clear
-#define AT91C_TC_BSWTRG_TOGGLE (0x3 << 30) // (TC) Effect: toggle
-// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register --------
-#define AT91C_TC_COVFS (0x1 << 0) // (TC) Counter Overflow
-#define AT91C_TC_LOVRS (0x1 << 1) // (TC) Load Overrun
-#define AT91C_TC_CPAS (0x1 << 2) // (TC) RA Compare
-#define AT91C_TC_CPBS (0x1 << 3) // (TC) RB Compare
-#define AT91C_TC_CPCS (0x1 << 4) // (TC) RC Compare
-#define AT91C_TC_LDRAS (0x1 << 5) // (TC) RA Loading
-#define AT91C_TC_LDRBS (0x1 << 6) // (TC) RB Loading
-#define AT91C_TC_ETRCS (0x1 << 7) // (TC) External Trigger
-#define AT91C_TC_ETRGS (0x1 << 16) // (TC) Clock Enabling
-#define AT91C_TC_MTIOA (0x1 << 17) // (TC) TIOA Mirror
-#define AT91C_TC_MTIOB (0x1 << 18) // (TC) TIOA Mirror
-// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register --------
-// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register --------
-// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Timer Counter Interface
-// *****************************************************************************
-// *** Register offset in AT91S_TCB structure ***
-#define TCB_TC0 ( 0) // TC Channel 0
-#define TCB_TC1 (64) // TC Channel 1
-#define TCB_TC2 (128) // TC Channel 2
-#define TCB_BCR (192) // TC Block Control Register
-#define TCB_BMR (196) // TC Block Mode Register
-// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
-#define AT91C_TCB_SYNC (0x1 << 0) // (TCB) Synchro Command
-// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register --------
-#define AT91C_TCB_TC0XC0S (0x1 << 0) // (TCB) External Clock Signal 0 Selection
-#define AT91C_TCB_TC0XC0S_TCLK0 (0x0) // (TCB) TCLK0 connected to XC0
-#define AT91C_TCB_TC0XC0S_NONE (0x1) // (TCB) None signal connected to XC0
-#define AT91C_TCB_TC0XC0S_TIOA1 (0x2) // (TCB) TIOA1 connected to XC0
-#define AT91C_TCB_TC0XC0S_TIOA2 (0x3) // (TCB) TIOA2 connected to XC0
-#define AT91C_TCB_TC1XC1S (0x1 << 2) // (TCB) External Clock Signal 1 Selection
-#define AT91C_TCB_TC1XC1S_TCLK1 (0x0 << 2) // (TCB) TCLK1 connected to XC1
-#define AT91C_TCB_TC1XC1S_NONE (0x1 << 2) // (TCB) None signal connected to XC1
-#define AT91C_TCB_TC1XC1S_TIOA0 (0x2 << 2) // (TCB) TIOA0 connected to XC1
-#define AT91C_TCB_TC1XC1S_TIOA2 (0x3 << 2) // (TCB) TIOA2 connected to XC1
-#define AT91C_TCB_TC2XC2S (0x1 << 4) // (TCB) External Clock Signal 2 Selection
-#define AT91C_TCB_TC2XC2S_TCLK2 (0x0 << 4) // (TCB) TCLK2 connected to XC2
-#define AT91C_TCB_TC2XC2S_NONE (0x1 << 4) // (TCB) None signal connected to XC2
-#define AT91C_TCB_TC2XC2S_TIOA0 (0x2 << 4) // (TCB) TIOA0 connected to XC2
-#define AT91C_TCB_TC2XC2S_TIOA2 (0x3 << 4) // (TCB) TIOA2 connected to XC2
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR USB Host Interface
-// *****************************************************************************
-// *** Register offset in AT91S_UHP structure ***
-#define UHP_HcRevision ( 0) // Revision
-#define UHP_HcControl ( 4) // Operating modes for the Host Controller
-#define UHP_HcCommandStatus ( 8) // Command & status Register
-#define UHP_HcInterruptStatus (12) // Interrupt Status Register
-#define UHP_HcInterruptEnable (16) // Interrupt Enable Register
-#define UHP_HcInterruptDisable (20) // Interrupt Disable Register
-#define UHP_HcHCCA (24) // Pointer to the Host Controller Communication Area
-#define UHP_HcPeriodCurrentED (28) // Current Isochronous or Interrupt Endpoint Descriptor
-#define UHP_HcControlHeadED (32) // First Endpoint Descriptor of the Control list
-#define UHP_HcControlCurrentED (36) // Endpoint Control and Status Register
-#define UHP_HcBulkHeadED (40) // First endpoint register of the Bulk list
-#define UHP_HcBulkCurrentED (44) // Current endpoint of the Bulk list
-#define UHP_HcBulkDoneHead (48) // Last completed transfer descriptor
-#define UHP_HcFmInterval (52) // Bit time between 2 consecutive SOFs
-#define UHP_HcFmRemaining (56) // Bit time remaining in the current Frame
-#define UHP_HcFmNumber (60) // Frame number
-#define UHP_HcPeriodicStart (64) // Periodic Start
-#define UHP_HcLSThreshold (68) // LS Threshold
-#define UHP_HcRhDescriptorA (72) // Root Hub characteristics A
-#define UHP_HcRhDescriptorB (76) // Root Hub characteristics B
-#define UHP_HcRhStatus (80) // Root Hub Status register
-#define UHP_HcRhPortStatus (84) // Root Hub Port Status Register
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Ethernet MAC
-// *****************************************************************************
-// *** Register offset in AT91S_EMAC structure ***
-#define EMAC_CTL ( 0) // Network Control Register
-#define EMAC_CFG ( 4) // Network Configuration Register
-#define EMAC_SR ( 8) // Network Status Register
-#define EMAC_TAR (12) // Transmit Address Register
-#define EMAC_TCR (16) // Transmit Control Register
-#define EMAC_TSR (20) // Transmit Status Register
-#define EMAC_RBQP (24) // Receive Buffer Queue Pointer
-#define EMAC_RSR (32) // Receive Status Register
-#define EMAC_ISR (36) // Interrupt Status Register
-#define EMAC_IER (40) // Interrupt Enable Register
-#define EMAC_IDR (44) // Interrupt Disable Register
-#define EMAC_IMR (48) // Interrupt Mask Register
-#define EMAC_MAN (52) // PHY Maintenance Register
-#define EMAC_FRA (64) // Frames Transmitted OK Register
-#define EMAC_SCOL (68) // Single Collision Frame Register
-#define EMAC_MCOL (72) // Multiple Collision Frame Register
-#define EMAC_OK (76) // Frames Received OK Register
-#define EMAC_SEQE (80) // Frame Check Sequence Error Register
-#define EMAC_ALE (84) // Alignment Error Register
-#define EMAC_DTE (88) // Deferred Transmission Frame Register
-#define EMAC_LCOL (92) // Late Collision Register
-#define EMAC_ECOL (96) // Excessive Collision Register
-#define EMAC_CSE (100) // Carrier Sense Error Register
-#define EMAC_TUE (104) // Transmit Underrun Error Register
-#define EMAC_CDE (108) // Code Error Register
-#define EMAC_ELR (112) // Excessive Length Error Register
-#define EMAC_RJB (116) // Receive Jabber Register
-#define EMAC_USF (120) // Undersize Frame Register
-#define EMAC_SQEE (124) // SQE Test Error Register
-#define EMAC_DRFC (128) // Discarded RX Frame Register
-#define EMAC_HSH (144) // Hash Address High[63:32]
-#define EMAC_HSL (148) // Hash Address Low[31:0]
-#define EMAC_SA1L (152) // Specific Address 1 Low, First 4 bytes
-#define EMAC_SA1H (156) // Specific Address 1 High, Last 2 bytes
-#define EMAC_SA2L (160) // Specific Address 2 Low, First 4 bytes
-#define EMAC_SA2H (164) // Specific Address 2 High, Last 2 bytes
-#define EMAC_SA3L (168) // Specific Address 3 Low, First 4 bytes
-#define EMAC_SA3H (172) // Specific Address 3 High, Last 2 bytes
-#define EMAC_SA4L (176) // Specific Address 4 Low, First 4 bytes
-#define EMAC_SA4H (180) // Specific Address 4 High, Last 2 bytesr
-// -------- EMAC_CTL : (EMAC Offset: 0x0) --------
-#define AT91C_EMAC_LB (0x1 << 0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
-#define AT91C_EMAC_LBL (0x1 << 1) // (EMAC) Loopback local.
-#define AT91C_EMAC_RE (0x1 << 2) // (EMAC) Receive enable.
-#define AT91C_EMAC_TE (0x1 << 3) // (EMAC) Transmit enable.
-#define AT91C_EMAC_MPE (0x1 << 4) // (EMAC) Management port enable.
-#define AT91C_EMAC_CSR (0x1 << 5) // (EMAC) Clear statistics registers.
-#define AT91C_EMAC_ISR (0x1 << 6) // (EMAC) Increment statistics registers.
-#define AT91C_EMAC_WES (0x1 << 7) // (EMAC) Write enable for statistics registers.
-#define AT91C_EMAC_BP (0x1 << 8) // (EMAC) Back pressure.
-// -------- EMAC_CFG : (EMAC Offset: 0x4) Network Configuration Register --------
-#define AT91C_EMAC_SPD (0x1 << 0) // (EMAC) Speed.
-#define AT91C_EMAC_FD (0x1 << 1) // (EMAC) Full duplex.
-#define AT91C_EMAC_BR (0x1 << 2) // (EMAC) Bit rate.
-#define AT91C_EMAC_CAF (0x1 << 4) // (EMAC) Copy all frames.
-#define AT91C_EMAC_NBC (0x1 << 5) // (EMAC) No broadcast.
-#define AT91C_EMAC_MTI (0x1 << 6) // (EMAC) Multicast hash enable
-#define AT91C_EMAC_UNI (0x1 << 7) // (EMAC) Unicast hash enable.
-#define AT91C_EMAC_BIG (0x1 << 8) // (EMAC) Receive 1522 bytes.
-#define AT91C_EMAC_EAE (0x1 << 9) // (EMAC) External address match enable.
-#define AT91C_EMAC_CLK (0x3 << 10) // (EMAC)
-#define AT91C_EMAC_CLK_HCLK_8 (0x0 << 10) // (EMAC) HCLK divided by 8
-#define AT91C_EMAC_CLK_HCLK_16 (0x1 << 10) // (EMAC) HCLK divided by 16
-#define AT91C_EMAC_CLK_HCLK_32 (0x2 << 10) // (EMAC) HCLK divided by 32
-#define AT91C_EMAC_CLK_HCLK_64 (0x3 << 10) // (EMAC) HCLK divided by 64
-#define AT91C_EMAC_RTY (0x1 << 12) // (EMAC)
-#define AT91C_EMAC_RMII (0x1 << 13) // (EMAC)
-// -------- EMAC_SR : (EMAC Offset: 0x8) Network Status Register --------
-#define AT91C_EMAC_MDIO (0x1 << 1) // (EMAC)
-#define AT91C_EMAC_IDLE (0x1 << 2) // (EMAC)
-// -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register --------
-#define AT91C_EMAC_LEN (0x7FF << 0) // (EMAC)
-#define AT91C_EMAC_NCRC (0x1 << 15) // (EMAC)
-// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register --------
-#define AT91C_EMAC_OVR (0x1 << 0) // (EMAC)
-#define AT91C_EMAC_COL (0x1 << 1) // (EMAC)
-#define AT91C_EMAC_RLE (0x1 << 2) // (EMAC)
-#define AT91C_EMAC_TXIDLE (0x1 << 3) // (EMAC)
-#define AT91C_EMAC_BNQ (0x1 << 4) // (EMAC)
-#define AT91C_EMAC_COMP (0x1 << 5) // (EMAC)
-#define AT91C_EMAC_UND (0x1 << 6) // (EMAC)
-// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register --------
-#define AT91C_EMAC_BNA (0x1 << 0) // (EMAC)
-#define AT91C_EMAC_REC (0x1 << 1) // (EMAC)
-// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register --------
-#define AT91C_EMAC_DONE (0x1 << 0) // (EMAC)
-#define AT91C_EMAC_RCOM (0x1 << 1) // (EMAC)
-#define AT91C_EMAC_RBNA (0x1 << 2) // (EMAC)
-#define AT91C_EMAC_TOVR (0x1 << 3) // (EMAC)
-#define AT91C_EMAC_TUND (0x1 << 4) // (EMAC)
-#define AT91C_EMAC_RTRY (0x1 << 5) // (EMAC)
-#define AT91C_EMAC_TBRE (0x1 << 6) // (EMAC)
-#define AT91C_EMAC_TCOM (0x1 << 7) // (EMAC)
-#define AT91C_EMAC_TIDLE (0x1 << 8) // (EMAC)
-#define AT91C_EMAC_LINK (0x1 << 9) // (EMAC)
-#define AT91C_EMAC_ROVR (0x1 << 10) // (EMAC)
-#define AT91C_EMAC_HRESP (0x1 << 11) // (EMAC)
-// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register --------
-// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register --------
-// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register --------
-// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register --------
-#define AT91C_EMAC_DATA (0xFFFF << 0) // (EMAC)
-#define AT91C_EMAC_CODE (0x3 << 16) // (EMAC)
-#define AT91C_EMAC_REGA (0x1F << 18) // (EMAC)
-#define AT91C_EMAC_PHYA (0x1F << 23) // (EMAC)
-#define AT91C_EMAC_RW (0x3 << 28) // (EMAC)
-#define AT91C_EMAC_HIGH (0x1 << 30) // (EMAC)
-#define AT91C_EMAC_LOW (0x1 << 31) // (EMAC)
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR External Bus Interface
-// *****************************************************************************
-// *** Register offset in AT91S_EBI structure ***
-#define EBI_CSA ( 0) // Chip Select Assignment Register
-#define EBI_CFGR ( 4) // Configuration Register
-// -------- EBI_CSA : (EBI Offset: 0x0) Chip Select Assignment Register --------
-#define AT91C_EBI_CS0A (0x1 << 0) // (EBI) Chip Select 0 Assignment
-#define AT91C_EBI_CS0A_SMC (0x0) // (EBI) Chip Select 0 is assigned to the Static Memory Controller.
-#define AT91C_EBI_CS0A_BFC (0x1) // (EBI) Chip Select 0 is assigned to the Burst Flash Controller.
-#define AT91C_EBI_CS1A (0x1 << 1) // (EBI) Chip Select 1 Assignment
-#define AT91C_EBI_CS1A_SMC (0x0 << 1) // (EBI) Chip Select 1 is assigned to the Static Memory Controller.
-#define AT91C_EBI_CS1A_SDRAMC (0x1 << 1) // (EBI) Chip Select 1 is assigned to the SDRAM Controller.
-#define AT91C_EBI_CS3A (0x1 << 3) // (EBI) Chip Select 3 Assignment
-#define AT91C_EBI_CS3A_SMC (0x0 << 3) // (EBI) Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behaves as defined by the SMC2.
-#define AT91C_EBI_CS3A_SMC_SmartMedia (0x1 << 3) // (EBI) Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated.
-#define AT91C_EBI_CS4A (0x1 << 4) // (EBI) Chip Select 4 Assignment
-#define AT91C_EBI_CS4A_SMC (0x0 << 4) // (EBI) Chip Select 4 is assigned to the Static Memory Controller and NCS4,NCS5 and NCS6 behave as defined by the SMC2.
-#define AT91C_EBI_CS4A_SMC_CompactFlash (0x1 << 4) // (EBI) Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic is activated.
-// -------- EBI_CFGR : (EBI Offset: 0x4) Configuration Register --------
-#define AT91C_EBI_DBPUC (0x1 << 0) // (EBI) Data Bus Pull-Up Configuration
-#define AT91C_EBI_EBSEN (0x1 << 1) // (EBI) Bus Sharing Enable
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface
-// *****************************************************************************
-// *** Register offset in AT91S_SMC2 structure ***
-#define SMC2_CSR ( 0) // SMC2 Chip Select Register
-// -------- SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register --------
-#define AT91C_SMC2_NWS (0x7F << 0) // (SMC2) Number of Wait States
-#define AT91C_SMC2_WSEN (0x1 << 7) // (SMC2) Wait State Enable
-#define AT91C_SMC2_TDF (0xF << 8) // (SMC2) Data Float Time
-#define AT91C_SMC2_BAT (0x1 << 12) // (SMC2) Byte Access Type
-#define AT91C_SMC2_DBW (0x1 << 13) // (SMC2) Data Bus Width
-#define AT91C_SMC2_DBW_16 (0x1 << 13) // (SMC2) 16-bit.
-#define AT91C_SMC2_DBW_8 (0x2 << 13) // (SMC2) 8-bit.
-#define AT91C_SMC2_DRP (0x1 << 15) // (SMC2) Data Read Protocol
-#define AT91C_SMC2_ACSS (0x3 << 16) // (SMC2) Address to Chip Select Setup
-#define AT91C_SMC2_ACSS_STANDARD (0x0 << 16) // (SMC2) Standard, asserted at the beginning of the access and deasserted at the end.
-#define AT91C_SMC2_ACSS_1_CYCLE (0x1 << 16) // (SMC2) One cycle less at the beginning and the end of the access.
-#define AT91C_SMC2_ACSS_2_CYCLES (0x2 << 16) // (SMC2) Two cycles less at the beginning and the end of the access.
-#define AT91C_SMC2_ACSS_3_CYCLES (0x3 << 16) // (SMC2) Three cycles less at the beginning and the end of the access.
-#define AT91C_SMC2_RWSETUP (0x7 << 24) // (SMC2) Read and Write Signal Setup Time
-#define AT91C_SMC2_RWHOLD (0x7 << 29) // (SMC2) Read and Write Signal Hold Time
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR SDRAM Controller Interface
-// *****************************************************************************
-// *** Register offset in AT91S_SDRC structure ***
-#define SDRC_MR ( 0) // SDRAM Controller Mode Register
-#define SDRC_TR ( 4) // SDRAM Controller Refresh Timer Register
-#define SDRC_CR ( 8) // SDRAM Controller Configuration Register
-#define SDRC_SRR (12) // SDRAM Controller Self Refresh Register
-#define SDRC_LPR (16) // SDRAM Controller Low Power Register
-#define SDRC_IER (20) // SDRAM Controller Interrupt Enable Register
-#define SDRC_IDR (24) // SDRAM Controller Interrupt Disable Register
-#define SDRC_IMR (28) // SDRAM Controller Interrupt Mask Register
-#define SDRC_ISR (32) // SDRAM Controller Interrupt Mask Register
-// -------- SDRC_MR : (SDRC Offset: 0x0) SDRAM Controller Mode Register --------
-#define AT91C_SDRC_MODE (0xF << 0) // (SDRC) Mode
-#define AT91C_SDRC_MODE_NORMAL_CMD (0x0) // (SDRC) Normal Mode
-#define AT91C_SDRC_MODE_NOP_CMD (0x1) // (SDRC) NOP Command
-#define AT91C_SDRC_MODE_PRCGALL_CMD (0x2) // (SDRC) All Banks Precharge Command
-#define AT91C_SDRC_MODE_LMR_CMD (0x3) // (SDRC) Load Mode Register Command
-#define AT91C_SDRC_MODE_RFSH_CMD (0x4) // (SDRC) Refresh Command
-#define AT91C_SDRC_DBW (0x1 << 4) // (SDRC) Data Bus Width
-#define AT91C_SDRC_DBW_32_BITS (0x0 << 4) // (SDRC) 32 Bits datas bus
-#define AT91C_SDRC_DBW_16_BITS (0x1 << 4) // (SDRC) 16 Bits datas bus
-// -------- SDRC_TR : (SDRC Offset: 0x4) SDRC Refresh Timer Register --------
-#define AT91C_SDRC_COUNT (0xFFF << 0) // (SDRC) Refresh Counter
-// -------- SDRC_CR : (SDRC Offset: 0x8) SDRAM Configuration Register --------
-#define AT91C_SDRC_NC (0x3 << 0) // (SDRC) Number of Column Bits
-#define AT91C_SDRC_NC_8 (0x0) // (SDRC) 8 Bits
-#define AT91C_SDRC_NC_9 (0x1) // (SDRC) 9 Bits
-#define AT91C_SDRC_NC_10 (0x2) // (SDRC) 10 Bits
-#define AT91C_SDRC_NC_11 (0x3) // (SDRC) 11 Bits
-#define AT91C_SDRC_NR (0x3 << 2) // (SDRC) Number of Row Bits
-#define AT91C_SDRC_NR_11 (0x0 << 2) // (SDRC) 11 Bits
-#define AT91C_SDRC_NR_12 (0x1 << 2) // (SDRC) 12 Bits
-#define AT91C_SDRC_NR_13 (0x2 << 2) // (SDRC) 13 Bits
-#define AT91C_SDRC_NB (0x1 << 4) // (SDRC) Number of Banks
-#define AT91C_SDRC_NB_2_BANKS (0x0 << 4) // (SDRC) 2 banks
-#define AT91C_SDRC_NB_4_BANKS (0x1 << 4) // (SDRC) 4 banks
-#define AT91C_SDRC_CAS (0x3 << 5) // (SDRC) CAS Latency
-#define AT91C_SDRC_CAS_2 (0x2 << 5) // (SDRC) 2 cycles
-#define AT91C_SDRC_TWR (0xF << 7) // (SDRC) Number of Write Recovery Time Cycles
-#define AT91C_SDRC_TRC (0xF << 11) // (SDRC) Number of RAS Cycle Time Cycles
-#define AT91C_SDRC_TRP (0xF << 15) // (SDRC) Number of RAS Precharge Time Cycles
-#define AT91C_SDRC_TRCD (0xF << 19) // (SDRC) Number of RAS to CAS Delay Cycles
-#define AT91C_SDRC_TRAS (0xF << 23) // (SDRC) Number of RAS Active Time Cycles
-#define AT91C_SDRC_TXSR (0xF << 27) // (SDRC) Number of Command Recovery Time Cycles
-// -------- SDRC_SRR : (SDRC Offset: 0xc) SDRAM Controller Self-refresh Register --------
-#define AT91C_SDRC_SRCB (0x1 << 0) // (SDRC) Self-refresh Command Bit
-// -------- SDRC_LPR : (SDRC Offset: 0x10) SDRAM Controller Low-power Register --------
-#define AT91C_SDRC_LPCB (0x1 << 0) // (SDRC) Low-power Command Bit
-// -------- SDRC_IER : (SDRC Offset: 0x14) SDRAM Controller Interrupt Enable Register --------
-#define AT91C_SDRC_RES (0x1 << 0) // (SDRC) Refresh Error Status
-// -------- SDRC_IDR : (SDRC Offset: 0x18) SDRAM Controller Interrupt Disable Register --------
-// -------- SDRC_IMR : (SDRC Offset: 0x1c) SDRAM Controller Interrupt Mask Register --------
-// -------- SDRC_ISR : (SDRC Offset: 0x20) SDRAM Controller Interrupt Status Register --------
-
-// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Burst Flash Controller Interface
-// *****************************************************************************
-// *** Register offset in AT91S_BFC structure ***
-#define BFC_MR ( 0) // BFC Mode Register
-// -------- BFC_MR : (BFC Offset: 0x0) BFC Mode Register --------
-#define AT91C_BFC_BFCOM (0x3 << 0) // (BFC) Burst Flash Controller Operating Mode
-#define AT91C_BFC_BFCOM_DISABLED (0x0) // (BFC) NPCS0 is driven by the SMC or remains high.
-#define AT91C_BFC_BFCOM_ASYNC (0x1) // (BFC) Asynchronous
-#define AT91C_BFC_BFCOM_BURST_READ (0x2) // (BFC) Burst Read
-#define AT91C_BFC_BFCC (0x3 << 2) // (BFC) Burst Flash Controller Operating Mode
-#define AT91C_BFC_BFCC_MCK (0x1 << 2) // (BFC) Master Clock.
-#define AT91C_BFC_BFCC_MCK_DIV_2 (0x2 << 2) // (BFC) Master Clock divided by 2.
-#define AT91C_BFC_BFCC_MCK_DIV_4 (0x3 << 2) // (BFC) Master Clock divided by 4.
-#define AT91C_BFC_AVL (0xF << 4) // (BFC) Address Valid Latency
-#define AT91C_BFC_PAGES (0x7 << 8) // (BFC) Page Size
-#define AT91C_BFC_PAGES_NO_PAGE (0x0 << 8) // (BFC) No page handling.
-#define AT91C_BFC_PAGES_16 (0x1 << 8) // (BFC) 16 bytes page size.
-#define AT91C_BFC_PAGES_32 (0x2 << 8) // (BFC) 32 bytes page size.
-#define AT91C_BFC_PAGES_64 (0x3 << 8) // (BFC) 64 bytes page size.
-#define AT91C_BFC_PAGES_128 (0x4 << 8) // (BFC) 128 bytes page size.
-#define AT91C_BFC_PAGES_256 (0x5 << 8) // (BFC) 256 bytes page size.
-#define AT91C_BFC_PAGES_512 (0x6 << 8) // (BFC) 512 bytes page size.
-#define AT91C_BFC_PAGES_1024 (0x7 << 8) // (BFC) 1024 bytes page size.
-#define AT91C_BFC_OEL (0x3 << 12) // (BFC) Output Enable Latency
-#define AT91C_BFC_BAAEN (0x1 << 16) // (BFC) Burst Address Advance Enable
-#define AT91C_BFC_BFOEH (0x1 << 17) // (BFC) Burst Flash Output Enable Handling
-#define AT91C_BFC_MUXEN (0x1 << 18) // (BFC) Multiplexed Bus Enable
-#define AT91C_BFC_RDYEN (0x1 << 19) // (BFC) Ready Enable Mode
-
-// *****************************************************************************
-// REGISTER ADDRESS DEFINITION FOR AT91RM9200
-// *****************************************************************************
-// ========== Register definition for SYS peripheral ==========
-// ========== Register definition for MC peripheral ==========
-#define AT91C_MC_PUER (0xFFFFFF54) // (MC) MC Protection Unit Enable Register
-#define AT91C_MC_ASR (0xFFFFFF04) // (MC) MC Abort Status Register
-#define AT91C_MC_PUP (0xFFFFFF50) // (MC) MC Protection Unit Peripherals
-#define AT91C_MC_PUIA (0xFFFFFF10) // (MC) MC Protection Unit Area
-#define AT91C_MC_AASR (0xFFFFFF08) // (MC) MC Abort Address Status Register
-#define AT91C_MC_RCR (0xFFFFFF00) // (MC) MC Remap Control Register
-// ========== Register definition for RTC peripheral ==========
-#define AT91C_RTC_IMR (0xFFFFFE28) // (RTC) Interrupt Mask Register
-#define AT91C_RTC_IER (0xFFFFFE20) // (RTC) Interrupt Enable Register
-#define AT91C_RTC_SR (0xFFFFFE18) // (RTC) Status Register
-#define AT91C_RTC_TIMALR (0xFFFFFE10) // (RTC) Time Alarm Register
-#define AT91C_RTC_TIMR (0xFFFFFE08) // (RTC) Time Register
-#define AT91C_RTC_CR (0xFFFFFE00) // (RTC) Control Register
-#define AT91C_RTC_VER (0xFFFFFE2C) // (RTC) Valid Entry Register
-#define AT91C_RTC_IDR (0xFFFFFE24) // (RTC) Interrupt Disable Register
-#define AT91C_RTC_SCCR (0xFFFFFE1C) // (RTC) Status Clear Command Register
-#define AT91C_RTC_CALALR (0xFFFFFE14) // (RTC) Calendar Alarm Register
-#define AT91C_RTC_CALR (0xFFFFFE0C) // (RTC) Calendar Register
-#define AT91C_RTC_MR (0xFFFFFE04) // (RTC) Mode Register
-// ========== Register definition for ST peripheral ==========
-#define AT91C_ST_CRTR (0xFFFFFD24) // (ST) Current Real-time Register
-#define AT91C_ST_IMR (0xFFFFFD1C) // (ST) Interrupt Mask Register
-#define AT91C_ST_IER (0xFFFFFD14) // (ST) Interrupt Enable Register
-#define AT91C_ST_RTMR (0xFFFFFD0C) // (ST) Real-time Mode Register
-#define AT91C_ST_PIMR (0xFFFFFD04) // (ST) Period Interval Mode Register
-#define AT91C_ST_RTAR (0xFFFFFD20) // (ST) Real-time Alarm Register
-#define AT91C_ST_IDR (0xFFFFFD18) // (ST) Interrupt Disable Register
-#define AT91C_ST_SR (0xFFFFFD10) // (ST) Status Register
-#define AT91C_ST_WDMR (0xFFFFFD08) // (ST) Watchdog Mode Register
-#define AT91C_ST_CR (0xFFFFFD00) // (ST) Control Register
-// ========== Register definition for PMC peripheral ==========
-#define AT91C_PMC_SCSR (0xFFFFFC08) // (PMC) System Clock Status Register
-#define AT91C_PMC_SCER (0xFFFFFC00) // (PMC) System Clock Enable Register
-#define AT91C_PMC_IMR (0xFFFFFC6C) // (PMC) Interrupt Mask Register
-#define AT91C_PMC_IDR (0xFFFFFC64) // (PMC) Interrupt Disable Register
-#define AT91C_PMC_PCDR (0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
-#define AT91C_PMC_SCDR (0xFFFFFC04) // (PMC) System Clock Disable Register
-#define AT91C_PMC_SR (0xFFFFFC68) // (PMC) Status Register
-#define AT91C_PMC_IER (0xFFFFFC60) // (PMC) Interrupt Enable Register
-#define AT91C_PMC_MCKR (0xFFFFFC30) // (PMC) Master Clock Register
-#define AT91C_PMC_PCER (0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
-#define AT91C_PMC_PCSR (0xFFFFFC18) // (PMC) Peripheral Clock Status Register
-#define AT91C_PMC_PCKR (0xFFFFFC40) // (PMC) Programmable Clock Register
-// ========== Register definition for CKGR peripheral ==========
-#define AT91C_CKGR_PLLBR (0xFFFFFC2C) // (CKGR) PLL B Register
-#define AT91C_CKGR_MCFR (0xFFFFFC24) // (CKGR) Main Clock Frequency Register
-#define AT91C_CKGR_PLLAR (0xFFFFFC28) // (CKGR) PLL A Register
-#define AT91C_CKGR_MOR (0xFFFFFC20) // (CKGR) Main Oscillator Register
-// ========== Register definition for PIOD peripheral ==========
-#define AT91C_PIOD_PDSR (0xFFFFFA3C) // (PIOD) Pin Data Status Register
-#define AT91C_PIOD_CODR (0xFFFFFA34) // (PIOD) Clear Output Data Register
-#define AT91C_PIOD_OWER (0xFFFFFAA0) // (PIOD) Output Write Enable Register
-#define AT91C_PIOD_MDER (0xFFFFFA50) // (PIOD) Multi-driver Enable Register
-#define AT91C_PIOD_IMR (0xFFFFFA48) // (PIOD) Interrupt Mask Register
-#define AT91C_PIOD_IER (0xFFFFFA40) // (PIOD) Interrupt Enable Register
-#define AT91C_PIOD_ODSR (0xFFFFFA38) // (PIOD) Output Data Status Register
-#define AT91C_PIOD_SODR (0xFFFFFA30) // (PIOD) Set Output Data Register
-#define AT91C_PIOD_PER (0xFFFFFA00) // (PIOD) PIO Enable Register
-#define AT91C_PIOD_OWDR (0xFFFFFAA4) // (PIOD) Output Write Disable Register
-#define AT91C_PIOD_PPUER (0xFFFFFA64) // (PIOD) Pull-up Enable Register
-#define AT91C_PIOD_MDDR (0xFFFFFA54) // (PIOD) Multi-driver Disable Register
-#define AT91C_PIOD_ISR (0xFFFFFA4C) // (PIOD) Interrupt Status Register
-#define AT91C_PIOD_IDR (0xFFFFFA44) // (PIOD) Interrupt Disable Register
-#define AT91C_PIOD_PDR (0xFFFFFA04) // (PIOD) PIO Disable Register
-#define AT91C_PIOD_ODR (0xFFFFFA14) // (PIOD) Output Disable Registerr
-#define AT91C_PIOD_OWSR (0xFFFFFAA8) // (PIOD) Output Write Status Register
-#define AT91C_PIOD_ABSR (0xFFFFFA78) // (PIOD) AB Select Status Register
-#define AT91C_PIOD_ASR (0xFFFFFA70) // (PIOD) Select A Register
-#define AT91C_PIOD_PPUSR (0xFFFFFA68) // (PIOD) Pad Pull-up Status Register
-#define AT91C_PIOD_PPUDR (0xFFFFFA60) // (PIOD) Pull-up Disable Register
-#define AT91C_PIOD_MDSR (0xFFFFFA58) // (PIOD) Multi-driver Status Register
-#define AT91C_PIOD_PSR (0xFFFFFA08) // (PIOD) PIO Status Register
-#define AT91C_PIOD_OER (0xFFFFFA10) // (PIOD) Output Enable Register
-#define AT91C_PIOD_OSR (0xFFFFFA18) // (PIOD) Output Status Register
-#define AT91C_PIOD_IFER (0xFFFFFA20) // (PIOD) Input Filter Enable Register
-#define AT91C_PIOD_BSR (0xFFFFFA74) // (PIOD) Select B Register
-#define AT91C_PIOD_IFDR (0xFFFFFA24) // (PIOD) Input Filter Disable Register
-#define AT91C_PIOD_IFSR (0xFFFFFA28) // (PIOD) Input Filter Status Register
-// ========== Register definition for PIOC peripheral ==========
-#define AT91C_PIOC_IFDR (0xFFFFF824) // (PIOC) Input Filter Disable Register
-#define AT91C_PIOC_ODR (0xFFFFF814) // (PIOC) Output Disable Registerr
-#define AT91C_PIOC_ABSR (0xFFFFF878) // (PIOC) AB Select Status Register
-#define AT91C_PIOC_SODR (0xFFFFF830) // (PIOC) Set Output Data Register
-#define AT91C_PIOC_IFSR (0xFFFFF828) // (PIOC) Input Filter Status Register
-#define AT91C_PIOC_CODR (0xFFFFF834) // (PIOC) Clear Output Data Register
-#define AT91C_PIOC_ODSR (0xFFFFF838) // (PIOC) Output Data Status Register
-#define AT91C_PIOC_IER (0xFFFFF840) // (PIOC) Interrupt Enable Register
-#define AT91C_PIOC_IMR (0xFFFFF848) // (PIOC) Interrupt Mask Register
-#define AT91C_PIOC_OWDR (0xFFFFF8A4) // (PIOC) Output Write Disable Register
-#define AT91C_PIOC_MDDR (0xFFFFF854) // (PIOC) Multi-driver Disable Register
-#define AT91C_PIOC_PDSR (0xFFFFF83C) // (PIOC) Pin Data Status Register
-#define AT91C_PIOC_IDR (0xFFFFF844) // (PIOC) Interrupt Disable Register
-#define AT91C_PIOC_ISR (0xFFFFF84C) // (PIOC) Interrupt Status Register
-#define AT91C_PIOC_PDR (0xFFFFF804) // (PIOC) PIO Disable Register
-#define AT91C_PIOC_OWSR (0xFFFFF8A8) // (PIOC) Output Write Status Register
-#define AT91C_PIOC_OWER (0xFFFFF8A0) // (PIOC) Output Write Enable Register
-#define AT91C_PIOC_ASR (0xFFFFF870) // (PIOC) Select A Register
-#define AT91C_PIOC_PPUSR (0xFFFFF868) // (PIOC) Pad Pull-up Status Register
-#define AT91C_PIOC_PPUDR (0xFFFFF860) // (PIOC) Pull-up Disable Register
-#define AT91C_PIOC_MDSR (0xFFFFF858) // (PIOC) Multi-driver Status Register
-#define AT91C_PIOC_MDER (0xFFFFF850) // (PIOC) Multi-driver Enable Register
-#define AT91C_PIOC_IFER (0xFFFFF820) // (PIOC) Input Filter Enable Register
-#define AT91C_PIOC_OSR (0xFFFFF818) // (PIOC) Output Status Register
-#define AT91C_PIOC_OER (0xFFFFF810) // (PIOC) Output Enable Register
-#define AT91C_PIOC_PSR (0xFFFFF808) // (PIOC) PIO Status Register
-#define AT91C_PIOC_PER (0xFFFFF800) // (PIOC) PIO Enable Register
-#define AT91C_PIOC_BSR (0xFFFFF874) // (PIOC) Select B Register
-#define AT91C_PIOC_PPUER (0xFFFFF864) // (PIOC) Pull-up Enable Register
-// ========== Register definition for PIOB peripheral ==========
-#define AT91C_PIOB_OWSR (0xFFFFF6A8) // (PIOB) Output Write Status Register
-#define AT91C_PIOB_PPUSR (0xFFFFF668) // (PIOB) Pad Pull-up Status Register
-#define AT91C_PIOB_PPUDR (0xFFFFF660) // (PIOB) Pull-up Disable Register
-#define AT91C_PIOB_MDSR (0xFFFFF658) // (PIOB) Multi-driver Status Register
-#define AT91C_PIOB_MDER (0xFFFFF650) // (PIOB) Multi-driver Enable Register
-#define AT91C_PIOB_IMR (0xFFFFF648) // (PIOB) Interrupt Mask Register
-#define AT91C_PIOB_OSR (0xFFFFF618) // (PIOB) Output Status Register
-#define AT91C_PIOB_OER (0xFFFFF610) // (PIOB) Output Enable Register
-#define AT91C_PIOB_PSR (0xFFFFF608) // (PIOB) PIO Status Register
-#define AT91C_PIOB_PER (0xFFFFF600) // (PIOB) PIO Enable Register
-#define AT91C_PIOB_BSR (0xFFFFF674) // (PIOB) Select B Register
-#define AT91C_PIOB_PPUER (0xFFFFF664) // (PIOB) Pull-up Enable Register
-#define AT91C_PIOB_IFDR (0xFFFFF624) // (PIOB) Input Filter Disable Register
-#define AT91C_PIOB_ODR (0xFFFFF614) // (PIOB) Output Disable Registerr
-#define AT91C_PIOB_ABSR (0xFFFFF678) // (PIOB) AB Select Status Register
-#define AT91C_PIOB_ASR (0xFFFFF670) // (PIOB) Select A Register
-#define AT91C_PIOB_IFER (0xFFFFF620) // (PIOB) Input Filter Enable Register
-#define AT91C_PIOB_IFSR (0xFFFFF628) // (PIOB) Input Filter Status Register
-#define AT91C_PIOB_SODR (0xFFFFF630) // (PIOB) Set Output Data Register
-#define AT91C_PIOB_ODSR (0xFFFFF638) // (PIOB) Output Data Status Register
-#define AT91C_PIOB_CODR (0xFFFFF634) // (PIOB) Clear Output Data Register
-#define AT91C_PIOB_PDSR (0xFFFFF63C) // (PIOB) Pin Data Status Register
-#define AT91C_PIOB_OWER (0xFFFFF6A0) // (PIOB) Output Write Enable Register
-#define AT91C_PIOB_IER (0xFFFFF640) // (PIOB) Interrupt Enable Register
-#define AT91C_PIOB_OWDR (0xFFFFF6A4) // (PIOB) Output Write Disable Register
-#define AT91C_PIOB_MDDR (0xFFFFF654) // (PIOB) Multi-driver Disable Register
-#define AT91C_PIOB_ISR (0xFFFFF64C) // (PIOB) Interrupt Status Register
-#define AT91C_PIOB_IDR (0xFFFFF644) // (PIOB) Interrupt Disable Register
-#define AT91C_PIOB_PDR (0xFFFFF604) // (PIOB) PIO Disable Register
-// ========== Register definition for PIOA peripheral ==========
-#define AT91C_PIOA_IMR (0xFFFFF448) // (PIOA) Interrupt Mask Register
-#define AT91C_PIOA_IER (0xFFFFF440) // (PIOA) Interrupt Enable Register
-#define AT91C_PIOA_OWDR (0xFFFFF4A4) // (PIOA) Output Write Disable Register
-#define AT91C_PIOA_ISR (0xFFFFF44C) // (PIOA) Interrupt Status Register
-#define AT91C_PIOA_PPUDR (0xFFFFF460) // (PIOA) Pull-up Disable Register
-#define AT91C_PIOA_MDSR (0xFFFFF458) // (PIOA) Multi-driver Status Register
-#define AT91C_PIOA_MDER (0xFFFFF450) // (PIOA) Multi-driver Enable Register
-#define AT91C_PIOA_PER (0xFFFFF400) // (PIOA) PIO Enable Register
-#define AT91C_PIOA_PSR (0xFFFFF408) // (PIOA) PIO Status Register
-#define AT91C_PIOA_OER (0xFFFFF410) // (PIOA) Output Enable Register
-#define AT91C_PIOA_BSR (0xFFFFF474) // (PIOA) Select B Register
-#define AT91C_PIOA_PPUER (0xFFFFF464) // (PIOA) Pull-up Enable Register
-#define AT91C_PIOA_MDDR (0xFFFFF454) // (PIOA) Multi-driver Disable Register
-#define AT91C_PIOA_PDR (0xFFFFF404) // (PIOA) PIO Disable Register
-#define AT91C_PIOA_ODR (0xFFFFF414) // (PIOA) Output Disable Registerr
-#define AT91C_PIOA_IFDR (0xFFFFF424) // (PIOA) Input Filter Disable Register
-#define AT91C_PIOA_ABSR (0xFFFFF478) // (PIOA) AB Select Status Register
-#define AT91C_PIOA_ASR (0xFFFFF470) // (PIOA) Select A Register
-#define AT91C_PIOA_PPUSR (0xFFFFF468) // (PIOA) Pad Pull-up Status Register
-#define AT91C_PIOA_ODSR (0xFFFFF438) // (PIOA) Output Data Status Register
-#define AT91C_PIOA_SODR (0xFFFFF430) // (PIOA) Set Output Data Register
-#define AT91C_PIOA_IFSR (0xFFFFF428) // (PIOA) Input Filter Status Register
-#define AT91C_PIOA_IFER (0xFFFFF420) // (PIOA) Input Filter Enable Register
-#define AT91C_PIOA_OSR (0xFFFFF418) // (PIOA) Output Status Register
-#define AT91C_PIOA_IDR (0xFFFFF444) // (PIOA) Interrupt Disable Register
-#define AT91C_PIOA_PDSR (0xFFFFF43C) // (PIOA) Pin Data Status Register
-#define AT91C_PIOA_CODR (0xFFFFF434) // (PIOA) Clear Output Data Register
-#define AT91C_PIOA_OWSR (0xFFFFF4A8) // (PIOA) Output Write Status Register
-#define AT91C_PIOA_OWER (0xFFFFF4A0) // (PIOA) Output Write Enable Register
-// ========== Register definition for DBGU peripheral ==========
-#define AT91C_DBGU_C2R (0xFFFFF244) // (DBGU) Chip ID2 Register
-#define AT91C_DBGU_THR (0xFFFFF21C) // (DBGU) Transmitter Holding Register
-#define AT91C_DBGU_CSR (0xFFFFF214) // (DBGU) Channel Status Register
-#define AT91C_DBGU_IDR (0xFFFFF20C) // (DBGU) Interrupt Disable Register
-#define AT91C_DBGU_MR (0xFFFFF204) // (DBGU) Mode Register
-#define AT91C_DBGU_FNTR (0xFFFFF248) // (DBGU) Force NTRST Register
-#define AT91C_DBGU_C1R (0xFFFFF240) // (DBGU) Chip ID1 Register
-#define AT91C_DBGU_BRGR (0xFFFFF220) // (DBGU) Baud Rate Generator Register
-#define AT91C_DBGU_RHR (0xFFFFF218) // (DBGU) Receiver Holding Register
-#define AT91C_DBGU_IMR (0xFFFFF210) // (DBGU) Interrupt Mask Register
-#define AT91C_DBGU_IER (0xFFFFF208) // (DBGU) Interrupt Enable Register
-#define AT91C_DBGU_CR (0xFFFFF200) // (DBGU) Control Register
-// ========== Register definition for PDC_DBGU peripheral ==========
-#define AT91C_DBGU_TNCR (0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
-#define AT91C_DBGU_RNCR (0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
-#define AT91C_DBGU_PTCR (0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
-#define AT91C_DBGU_PTSR (0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
-#define AT91C_DBGU_RCR (0xFFFFF304) // (PDC_DBGU) Receive Counter Register
-#define AT91C_DBGU_TCR (0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
-#define AT91C_DBGU_RPR (0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
-#define AT91C_DBGU_TPR (0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
-#define AT91C_DBGU_RNPR (0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
-#define AT91C_DBGU_TNPR (0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
-// ========== Register definition for AIC peripheral ==========
-#define AT91C_AIC_ICCR (0xFFFFF128) // (AIC) Interrupt Clear Command Register
-#define AT91C_AIC_IECR (0xFFFFF120) // (AIC) Interrupt Enable Command Register
-#define AT91C_AIC_SMR (0xFFFFF000) // (AIC) Source Mode Register
-#define AT91C_AIC_ISCR (0xFFFFF12C) // (AIC) Interrupt Set Command Register
-#define AT91C_AIC_EOICR (0xFFFFF130) // (AIC) End of Interrupt Command Register
-#define AT91C_AIC_DCR (0xFFFFF138) // (AIC) Debug Control Register (Protect)
-#define AT91C_AIC_FFER (0xFFFFF140) // (AIC) Fast Forcing Enable Register
-#define AT91C_AIC_SVR (0xFFFFF080) // (AIC) Source Vector Register
-#define AT91C_AIC_SPU (0xFFFFF134) // (AIC) Spurious Vector Register
-#define AT91C_AIC_FFDR (0xFFFFF144) // (AIC) Fast Forcing Disable Register
-#define AT91C_AIC_FVR (0xFFFFF104) // (AIC) FIQ Vector Register
-#define AT91C_AIC_FFSR (0xFFFFF148) // (AIC) Fast Forcing Status Register
-#define AT91C_AIC_IMR (0xFFFFF110) // (AIC) Interrupt Mask Register
-#define AT91C_AIC_ISR (0xFFFFF108) // (AIC) Interrupt Status Register
-#define AT91C_AIC_IVR (0xFFFFF100) // (AIC) IRQ Vector Register
-#define AT91C_AIC_IDCR (0xFFFFF124) // (AIC) Interrupt Disable Command Register
-#define AT91C_AIC_CISR (0xFFFFF114) // (AIC) Core Interrupt Status Register
-#define AT91C_AIC_IPR (0xFFFFF10C) // (AIC) Interrupt Pending Register
-// ========== Register definition for PDC_SPI peripheral ==========
-#define AT91C_SPI_PTCR (0xFFFE0120) // (PDC_SPI) PDC Transfer Control Register
-#define AT91C_SPI_TNPR (0xFFFE0118) // (PDC_SPI) Transmit Next Pointer Register
-#define AT91C_SPI_RNPR (0xFFFE0110) // (PDC_SPI) Receive Next Pointer Register
-#define AT91C_SPI_TPR (0xFFFE0108) // (PDC_SPI) Transmit Pointer Register
-#define AT91C_SPI_RPR (0xFFFE0100) // (PDC_SPI) Receive Pointer Register
-#define AT91C_SPI_PTSR (0xFFFE0124) // (PDC_SPI) PDC Transfer Status Register
-#define AT91C_SPI_TNCR (0xFFFE011C) // (PDC_SPI) Transmit Next Counter Register
-#define AT91C_SPI_RNCR (0xFFFE0114) // (PDC_SPI) Receive Next Counter Register
-#define AT91C_SPI_TCR (0xFFFE010C) // (PDC_SPI) Transmit Counter Register
-#define AT91C_SPI_RCR (0xFFFE0104) // (PDC_SPI) Receive Counter Register
-// ========== Register definition for SPI peripheral ==========
-#define AT91C_SPI_CSR (0xFFFE0030) // (SPI) Chip Select Register
-#define AT91C_SPI_IDR (0xFFFE0018) // (SPI) Interrupt Disable Register
-#define AT91C_SPI_SR (0xFFFE0010) // (SPI) Status Register
-#define AT91C_SPI_RDR (0xFFFE0008) // (SPI) Receive Data Register
-#define AT91C_SPI_CR (0xFFFE0000) // (SPI) Control Register
-#define AT91C_SPI_IMR (0xFFFE001C) // (SPI) Interrupt Mask Register
-#define AT91C_SPI_IER (0xFFFE0014) // (SPI) Interrupt Enable Register
-#define AT91C_SPI_TDR (0xFFFE000C) // (SPI) Transmit Data Register
-#define AT91C_SPI_MR (0xFFFE0004) // (SPI) Mode Register
-// ========== Register definition for PDC_SSC2 peripheral ==========
-#define AT91C_SSC2_PTCR (0xFFFD8120) // (PDC_SSC2) PDC Transfer Control Register
-#define AT91C_SSC2_TNPR (0xFFFD8118) // (PDC_SSC2) Transmit Next Pointer Register
-#define AT91C_SSC2_RNPR (0xFFFD8110) // (PDC_SSC2) Receive Next Pointer Register
-#define AT91C_SSC2_TPR (0xFFFD8108) // (PDC_SSC2) Transmit Pointer Register
-#define AT91C_SSC2_RPR (0xFFFD8100) // (PDC_SSC2) Receive Pointer Register
-#define AT91C_SSC2_PTSR (0xFFFD8124) // (PDC_SSC2) PDC Transfer Status Register
-#define AT91C_SSC2_TNCR (0xFFFD811C) // (PDC_SSC2) Transmit Next Counter Register
-#define AT91C_SSC2_RNCR (0xFFFD8114) // (PDC_SSC2) Receive Next Counter Register
-#define AT91C_SSC2_TCR (0xFFFD810C) // (PDC_SSC2) Transmit Counter Register
-#define AT91C_SSC2_RCR (0xFFFD8104) // (PDC_SSC2) Receive Counter Register
-// ========== Register definition for SSC2 peripheral ==========
-#define AT91C_SSC2_IMR (0xFFFD804C) // (SSC2) Interrupt Mask Register
-#define AT91C_SSC2_IER (0xFFFD8044) // (SSC2) Interrupt Enable Register
-#define AT91C_SSC2_RC1R (0xFFFD803C) // (SSC2) Receive Compare 1 Register
-#define AT91C_SSC2_TSHR (0xFFFD8034) // (SSC2) Transmit Sync Holding Register
-#define AT91C_SSC2_CMR (0xFFFD8004) // (SSC2) Clock Mode Register
-#define AT91C_SSC2_IDR (0xFFFD8048) // (SSC2) Interrupt Disable Register
-#define AT91C_SSC2_TCMR (0xFFFD8018) // (SSC2) Transmit Clock Mode Register
-#define AT91C_SSC2_RCMR (0xFFFD8010) // (SSC2) Receive Clock ModeRegister
-#define AT91C_SSC2_CR (0xFFFD8000) // (SSC2) Control Register
-#define AT91C_SSC2_RFMR (0xFFFD8014) // (SSC2) Receive Frame Mode Register
-#define AT91C_SSC2_TFMR (0xFFFD801C) // (SSC2) Transmit Frame Mode Register
-#define AT91C_SSC2_THR (0xFFFD8024) // (SSC2) Transmit Holding Register
-#define AT91C_SSC2_SR (0xFFFD8040) // (SSC2) Status Register
-#define AT91C_SSC2_RC0R (0xFFFD8038) // (SSC2) Receive Compare 0 Register
-#define AT91C_SSC2_RSHR (0xFFFD8030) // (SSC2) Receive Sync Holding Register
-#define AT91C_SSC2_RHR (0xFFFD8020) // (SSC2) Receive Holding Register
-// ========== Register definition for PDC_SSC1 peripheral ==========
-#define AT91C_SSC1_PTCR (0xFFFD4120) // (PDC_SSC1) PDC Transfer Control Register
-#define AT91C_SSC1_TNPR (0xFFFD4118) // (PDC_SSC1) Transmit Next Pointer Register
-#define AT91C_SSC1_RNPR (0xFFFD4110) // (PDC_SSC1) Receive Next Pointer Register
-#define AT91C_SSC1_TPR (0xFFFD4108) // (PDC_SSC1) Transmit Pointer Register
-#define AT91C_SSC1_RPR (0xFFFD4100) // (PDC_SSC1) Receive Pointer Register
-#define AT91C_SSC1_PTSR (0xFFFD4124) // (PDC_SSC1) PDC Transfer Status Register
-#define AT91C_SSC1_TNCR (0xFFFD411C) // (PDC_SSC1) Transmit Next Counter Register
-#define AT91C_SSC1_RNCR (0xFFFD4114) // (PDC_SSC1) Receive Next Counter Register
-#define AT91C_SSC1_TCR (0xFFFD410C) // (PDC_SSC1) Transmit Counter Register
-#define AT91C_SSC1_RCR (0xFFFD4104) // (PDC_SSC1) Receive Counter Register
-// ========== Register definition for SSC1 peripheral ==========
-#define AT91C_SSC1_RFMR (0xFFFD4014) // (SSC1) Receive Frame Mode Register
-#define AT91C_SSC1_CMR (0xFFFD4004) // (SSC1) Clock Mode Register
-#define AT91C_SSC1_IDR (0xFFFD4048) // (SSC1) Interrupt Disable Register
-#define AT91C_SSC1_SR (0xFFFD4040) // (SSC1) Status Register
-#define AT91C_SSC1_RC0R (0xFFFD4038) // (SSC1) Receive Compare 0 Register
-#define AT91C_SSC1_RSHR (0xFFFD4030) // (SSC1) Receive Sync Holding Register
-#define AT91C_SSC1_RHR (0xFFFD4020) // (SSC1) Receive Holding Register
-#define AT91C_SSC1_TCMR (0xFFFD4018) // (SSC1) Transmit Clock Mode Register
-#define AT91C_SSC1_RCMR (0xFFFD4010) // (SSC1) Receive Clock ModeRegister
-#define AT91C_SSC1_CR (0xFFFD4000) // (SSC1) Control Register
-#define AT91C_SSC1_IMR (0xFFFD404C) // (SSC1) Interrupt Mask Register
-#define AT91C_SSC1_IER (0xFFFD4044) // (SSC1) Interrupt Enable Register
-#define AT91C_SSC1_RC1R (0xFFFD403C) // (SSC1) Receive Compare 1 Register
-#define AT91C_SSC1_TSHR (0xFFFD4034) // (SSC1) Transmit Sync Holding Register
-#define AT91C_SSC1_THR (0xFFFD4024) // (SSC1) Transmit Holding Register
-#define AT91C_SSC1_TFMR (0xFFFD401C) // (SSC1) Transmit Frame Mode Register
-// ========== Register definition for PDC_SSC0 peripheral ==========
-#define AT91C_SSC0_PTCR (0xFFFD0120) // (PDC_SSC0) PDC Transfer Control Register
-#define AT91C_SSC0_TNPR (0xFFFD0118) // (PDC_SSC0) Transmit Next Pointer Register
-#define AT91C_SSC0_RNPR (0xFFFD0110) // (PDC_SSC0) Receive Next Pointer Register
-#define AT91C_SSC0_TPR (0xFFFD0108) // (PDC_SSC0) Transmit Pointer Register
-#define AT91C_SSC0_RPR (0xFFFD0100) // (PDC_SSC0) Receive Pointer Register
-#define AT91C_SSC0_PTSR (0xFFFD0124) // (PDC_SSC0) PDC Transfer Status Register
-#define AT91C_SSC0_TNCR (0xFFFD011C) // (PDC_SSC0) Transmit Next Counter Register
-#define AT91C_SSC0_RNCR (0xFFFD0114) // (PDC_SSC0) Receive Next Counter Register
-#define AT91C_SSC0_TCR (0xFFFD010C) // (PDC_SSC0) Transmit Counter Register
-#define AT91C_SSC0_RCR (0xFFFD0104) // (PDC_SSC0) Receive Counter Register
-// ========== Register definition for SSC0 peripheral ==========
-#define AT91C_SSC0_IMR (0xFFFD004C) // (SSC0) Interrupt Mask Register
-#define AT91C_SSC0_IER (0xFFFD0044) // (SSC0) Interrupt Enable Register
-#define AT91C_SSC0_RC1R (0xFFFD003C) // (SSC0) Receive Compare 1 Register
-#define AT91C_SSC0_TSHR (0xFFFD0034) // (SSC0) Transmit Sync Holding Register
-#define AT91C_SSC0_THR (0xFFFD0024) // (SSC0) Transmit Holding Register
-#define AT91C_SSC0_TFMR (0xFFFD001C) // (SSC0) Transmit Frame Mode Register
-#define AT91C_SSC0_RFMR (0xFFFD0014) // (SSC0) Receive Frame Mode Register
-#define AT91C_SSC0_CMR (0xFFFD0004) // (SSC0) Clock Mode Register
-#define AT91C_SSC0_IDR (0xFFFD0048) // (SSC0) Interrupt Disable Register
-#define AT91C_SSC0_SR (0xFFFD0040) // (SSC0) Status Register
-#define AT91C_SSC0_RC0R (0xFFFD0038) // (SSC0) Receive Compare 0 Register
-#define AT91C_SSC0_RSHR (0xFFFD0030) // (SSC0) Receive Sync Holding Register
-#define AT91C_SSC0_RHR (0xFFFD0020) // (SSC0) Receive Holding Register
-#define AT91C_SSC0_TCMR (0xFFFD0018) // (SSC0) Transmit Clock Mode Register
-#define AT91C_SSC0_RCMR (0xFFFD0010) // (SSC0) Receive Clock ModeRegister
-#define AT91C_SSC0_CR (0xFFFD0000) // (SSC0) Control Register
-// ========== Register definition for PDC_US3 peripheral ==========
-#define AT91C_US3_PTSR (0xFFFCC124) // (PDC_US3) PDC Transfer Status Register
-#define AT91C_US3_TNCR (0xFFFCC11C) // (PDC_US3) Transmit Next Counter Register
-#define AT91C_US3_RNCR (0xFFFCC114) // (PDC_US3) Receive Next Counter Register
-#define AT91C_US3_TCR (0xFFFCC10C) // (PDC_US3) Transmit Counter Register
-#define AT91C_US3_RCR (0xFFFCC104) // (PDC_US3) Receive Counter Register
-#define AT91C_US3_PTCR (0xFFFCC120) // (PDC_US3) PDC Transfer Control Register
-#define AT91C_US3_TNPR (0xFFFCC118) // (PDC_US3) Transmit Next Pointer Register
-#define AT91C_US3_RNPR (0xFFFCC110) // (PDC_US3) Receive Next Pointer Register
-#define AT91C_US3_TPR (0xFFFCC108) // (PDC_US3) Transmit Pointer Register
-#define AT91C_US3_RPR (0xFFFCC100) // (PDC_US3) Receive Pointer Register
-// ========== Register definition for US3 peripheral ==========
-#define AT91C_US3_IF (0xFFFCC04C) // (US3) IRDA_FILTER Register
-#define AT91C_US3_NER (0xFFFCC044) // (US3) Nb Errors Register
-#define AT91C_US3_RTOR (0xFFFCC024) // (US3) Receiver Time-out Register
-#define AT91C_US3_THR (0xFFFCC01C) // (US3) Transmitter Holding Register
-#define AT91C_US3_CSR (0xFFFCC014) // (US3) Channel Status Register
-#define AT91C_US3_IDR (0xFFFCC00C) // (US3) Interrupt Disable Register
-#define AT91C_US3_MR (0xFFFCC004) // (US3) Mode Register
-#define AT91C_US3_XXR (0xFFFCC048) // (US3) XON_XOFF Register
-#define AT91C_US3_FIDI (0xFFFCC040) // (US3) FI_DI_Ratio Register
-#define AT91C_US3_TTGR (0xFFFCC028) // (US3) Transmitter Time-guard Register
-#define AT91C_US3_BRGR (0xFFFCC020) // (US3) Baud Rate Generator Register
-#define AT91C_US3_RHR (0xFFFCC018) // (US3) Receiver Holding Register
-#define AT91C_US3_IMR (0xFFFCC010) // (US3) Interrupt Mask Register
-#define AT91C_US3_IER (0xFFFCC008) // (US3) Interrupt Enable Register
-#define AT91C_US3_CR (0xFFFCC000) // (US3) Control Register
-// ========== Register definition for PDC_US2 peripheral ==========
-#define AT91C_US2_PTSR (0xFFFC8124) // (PDC_US2) PDC Transfer Status Register
-#define AT91C_US2_TNCR (0xFFFC811C) // (PDC_US2) Transmit Next Counter Register
-#define AT91C_US2_RNCR (0xFFFC8114) // (PDC_US2) Receive Next Counter Register
-#define AT91C_US2_TCR (0xFFFC810C) // (PDC_US2) Transmit Counter Register
-#define AT91C_US2_PTCR (0xFFFC8120) // (PDC_US2) PDC Transfer Control Register
-#define AT91C_US2_RCR (0xFFFC8104) // (PDC_US2) Receive Counter Register
-#define AT91C_US2_TNPR (0xFFFC8118) // (PDC_US2) Transmit Next Pointer Register
-#define AT91C_US2_RPR (0xFFFC8100) // (PDC_US2) Receive Pointer Register
-#define AT91C_US2_TPR (0xFFFC8108) // (PDC_US2) Transmit Pointer Register
-#define AT91C_US2_RNPR (0xFFFC8110) // (PDC_US2) Receive Next Pointer Register
-// ========== Register definition for US2 peripheral ==========
-#define AT91C_US2_XXR (0xFFFC8048) // (US2) XON_XOFF Register
-#define AT91C_US2_FIDI (0xFFFC8040) // (US2) FI_DI_Ratio Register
-#define AT91C_US2_TTGR (0xFFFC8028) // (US2) Transmitter Time-guard Register
-#define AT91C_US2_BRGR (0xFFFC8020) // (US2) Baud Rate Generator Register
-#define AT91C_US2_RHR (0xFFFC8018) // (US2) Receiver Holding Register
-#define AT91C_US2_IMR (0xFFFC8010) // (US2) Interrupt Mask Register
-#define AT91C_US2_IER (0xFFFC8008) // (US2) Interrupt Enable Register
-#define AT91C_US2_CR (0xFFFC8000) // (US2) Control Register
-#define AT91C_US2_IF (0xFFFC804C) // (US2) IRDA_FILTER Register
-#define AT91C_US2_NER (0xFFFC8044) // (US2) Nb Errors Register
-#define AT91C_US2_RTOR (0xFFFC8024) // (US2) Receiver Time-out Register
-#define AT91C_US2_THR (0xFFFC801C) // (US2) Transmitter Holding Register
-#define AT91C_US2_CSR (0xFFFC8014) // (US2) Channel Status Register
-#define AT91C_US2_IDR (0xFFFC800C) // (US2) Interrupt Disable Register
-#define AT91C_US2_MR (0xFFFC8004) // (US2) Mode Register
-// ========== Register definition for PDC_US1 peripheral ==========
-#define AT91C_US1_PTSR (0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
-#define AT91C_US1_TNCR (0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
-#define AT91C_US1_RNCR (0xFFFC4114) // (PDC_US1) Receive Next Counter Register
-#define AT91C_US1_TCR (0xFFFC410C) // (PDC_US1) Transmit Counter Register
-#define AT91C_US1_RCR (0xFFFC4104) // (PDC_US1) Receive Counter Register
-#define AT91C_US1_PTCR (0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
-#define AT91C_US1_TNPR (0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
-#define AT91C_US1_RNPR (0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
-#define AT91C_US1_TPR (0xFFFC4108) // (PDC_US1) Transmit Pointer Register
-#define AT91C_US1_RPR (0xFFFC4100) // (PDC_US1) Receive Pointer Register
-// ========== Register definition for US1 peripheral ==========
-#define AT91C_US1_XXR (0xFFFC4048) // (US1) XON_XOFF Register
-#define AT91C_US1_RHR (0xFFFC4018) // (US1) Receiver Holding Register
-#define AT91C_US1_IMR (0xFFFC4010) // (US1) Interrupt Mask Register
-#define AT91C_US1_IER (0xFFFC4008) // (US1) Interrupt Enable Register
-#define AT91C_US1_CR (0xFFFC4000) // (US1) Control Register
-#define AT91C_US1_RTOR (0xFFFC4024) // (US1) Receiver Time-out Register
-#define AT91C_US1_THR (0xFFFC401C) // (US1) Transmitter Holding Register
-#define AT91C_US1_CSR (0xFFFC4014) // (US1) Channel Status Register
-#define AT91C_US1_IDR (0xFFFC400C) // (US1) Interrupt Disable Register
-#define AT91C_US1_FIDI (0xFFFC4040) // (US1) FI_DI_Ratio Register
-#define AT91C_US1_BRGR (0xFFFC4020) // (US1) Baud Rate Generator Register
-#define AT91C_US1_TTGR (0xFFFC4028) // (US1) Transmitter Time-guard Register
-#define AT91C_US1_IF (0xFFFC404C) // (US1) IRDA_FILTER Register
-#define AT91C_US1_NER (0xFFFC4044) // (US1) Nb Errors Register
-#define AT91C_US1_MR (0xFFFC4004) // (US1) Mode Register
-// ========== Register definition for PDC_US0 peripheral ==========
-#define AT91C_US0_PTCR (0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
-#define AT91C_US0_TNPR (0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
-#define AT91C_US0_RNPR (0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
-#define AT91C_US0_TPR (0xFFFC0108) // (PDC_US0) Transmit Pointer Register
-#define AT91C_US0_RPR (0xFFFC0100) // (PDC_US0) Receive Pointer Register
-#define AT91C_US0_PTSR (0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
-#define AT91C_US0_TNCR (0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
-#define AT91C_US0_RNCR (0xFFFC0114) // (PDC_US0) Receive Next Counter Register
-#define AT91C_US0_TCR (0xFFFC010C) // (PDC_US0) Transmit Counter Register
-#define AT91C_US0_RCR (0xFFFC0104) // (PDC_US0) Receive Counter Register
-// ========== Register definition for US0 peripheral ==========
-#define AT91C_US0_TTGR (0xFFFC0028) // (US0) Transmitter Time-guard Register
-#define AT91C_US0_BRGR (0xFFFC0020) // (US0) Baud Rate Generator Register
-#define AT91C_US0_RHR (0xFFFC0018) // (US0) Receiver Holding Register
-#define AT91C_US0_IMR (0xFFFC0010) // (US0) Interrupt Mask Register
-#define AT91C_US0_NER (0xFFFC0044) // (US0) Nb Errors Register
-#define AT91C_US0_RTOR (0xFFFC0024) // (US0) Receiver Time-out Register
-#define AT91C_US0_XXR (0xFFFC0048) // (US0) XON_XOFF Register
-#define AT91C_US0_FIDI (0xFFFC0040) // (US0) FI_DI_Ratio Register
-#define AT91C_US0_CR (0xFFFC0000) // (US0) Control Register
-#define AT91C_US0_IER (0xFFFC0008) // (US0) Interrupt Enable Register
-#define AT91C_US0_IF (0xFFFC004C) // (US0) IRDA_FILTER Register
-#define AT91C_US0_MR (0xFFFC0004) // (US0) Mode Register
-#define AT91C_US0_IDR (0xFFFC000C) // (US0) Interrupt Disable Register
-#define AT91C_US0_CSR (0xFFFC0014) // (US0) Channel Status Register
-#define AT91C_US0_THR (0xFFFC001C) // (US0) Transmitter Holding Register
-// ========== Register definition for TWI peripheral ==========
-#define AT91C_TWI_RHR (0xFFFB8030) // (TWI) Receive Holding Register
-#define AT91C_TWI_IDR (0xFFFB8028) // (TWI) Interrupt Disable Register
-#define AT91C_TWI_SR (0xFFFB8020) // (TWI) Status Register
-#define AT91C_TWI_CWGR (0xFFFB8010) // (TWI) Clock Waveform Generator Register
-#define AT91C_TWI_SMR (0xFFFB8008) // (TWI) Slave Mode Register
-#define AT91C_TWI_CR (0xFFFB8000) // (TWI) Control Register
-#define AT91C_TWI_THR (0xFFFB8034) // (TWI) Transmit Holding Register
-#define AT91C_TWI_IMR (0xFFFB802C) // (TWI) Interrupt Mask Register
-#define AT91C_TWI_IER (0xFFFB8024) // (TWI) Interrupt Enable Register
-#define AT91C_TWI_IADR (0xFFFB800C) // (TWI) Internal Address Register
-#define AT91C_TWI_MMR (0xFFFB8004) // (TWI) Master Mode Register
-// ========== Register definition for PDC_MCI peripheral ==========
-#define AT91C_MCI_PTCR (0xFFFB4120) // (PDC_MCI) PDC Transfer Control Register
-#define AT91C_MCI_TNPR (0xFFFB4118) // (PDC_MCI) Transmit Next Pointer Register
-#define AT91C_MCI_RNPR (0xFFFB4110) // (PDC_MCI) Receive Next Pointer Register
-#define AT91C_MCI_TPR (0xFFFB4108) // (PDC_MCI) Transmit Pointer Register
-#define AT91C_MCI_RPR (0xFFFB4100) // (PDC_MCI) Receive Pointer Register
-#define AT91C_MCI_PTSR (0xFFFB4124) // (PDC_MCI) PDC Transfer Status Register
-#define AT91C_MCI_TNCR (0xFFFB411C) // (PDC_MCI) Transmit Next Counter Register
-#define AT91C_MCI_RNCR (0xFFFB4114) // (PDC_MCI) Receive Next Counter Register
-#define AT91C_MCI_TCR (0xFFFB410C) // (PDC_MCI) Transmit Counter Register
-#define AT91C_MCI_RCR (0xFFFB4104) // (PDC_MCI) Receive Counter Register
-// ========== Register definition for MCI peripheral ==========
-#define AT91C_MCI_IDR (0xFFFB4048) // (MCI) MCI Interrupt Disable Register
-#define AT91C_MCI_SR (0xFFFB4040) // (MCI) MCI Status Register
-#define AT91C_MCI_RDR (0xFFFB4030) // (MCI) MCI Receive Data Register
-#define AT91C_MCI_RSPR (0xFFFB4020) // (MCI) MCI Response Register
-#define AT91C_MCI_ARGR (0xFFFB4010) // (MCI) MCI Argument Register
-#define AT91C_MCI_DTOR (0xFFFB4008) // (MCI) MCI Data Timeout Register
-#define AT91C_MCI_CR (0xFFFB4000) // (MCI) MCI Control Register
-#define AT91C_MCI_IMR (0xFFFB404C) // (MCI) MCI Interrupt Mask Register
-#define AT91C_MCI_IER (0xFFFB4044) // (MCI) MCI Interrupt Enable Register
-#define AT91C_MCI_TDR (0xFFFB4034) // (MCI) MCI Transmit Data Register
-#define AT91C_MCI_CMDR (0xFFFB4014) // (MCI) MCI Command Register
-#define AT91C_MCI_SDCR (0xFFFB400C) // (MCI) MCI SD Card Register
-#define AT91C_MCI_MR (0xFFFB4004) // (MCI) MCI Mode Register
-// ========== Register definition for UDP peripheral ==========
-#define AT91C_UDP_ISR (0xFFFB001C) // (UDP) Interrupt Status Register
-#define AT91C_UDP_IDR (0xFFFB0014) // (UDP) Interrupt Disable Register
-#define AT91C_UDP_GLBSTATE (0xFFFB0004) // (UDP) Global State Register
-#define AT91C_UDP_FDR (0xFFFB0050) // (UDP) Endpoint FIFO Data Register
-#define AT91C_UDP_CSR (0xFFFB0030) // (UDP) Endpoint Control and Status Register
-#define AT91C_UDP_RSTEP (0xFFFB0028) // (UDP) Reset Endpoint Register
-#define AT91C_UDP_ICR (0xFFFB0020) // (UDP) Interrupt Clear Register
-#define AT91C_UDP_IMR (0xFFFB0018) // (UDP) Interrupt Mask Register
-#define AT91C_UDP_IER (0xFFFB0010) // (UDP) Interrupt Enable Register
-#define AT91C_UDP_FADDR (0xFFFB0008) // (UDP) Function Address Register
-#define AT91C_UDP_NUM (0xFFFB0000) // (UDP) Frame Number Register
-// ========== Register definition for TC5 peripheral ==========
-#define AT91C_TC5_CMR (0xFFFA4084) // (TC5) Channel Mode Register
-#define AT91C_TC5_IDR (0xFFFA40A8) // (TC5) Interrupt Disable Register
-#define AT91C_TC5_SR (0xFFFA40A0) // (TC5) Status Register
-#define AT91C_TC5_RB (0xFFFA4098) // (TC5) Register B
-#define AT91C_TC5_CV (0xFFFA4090) // (TC5) Counter Value
-#define AT91C_TC5_CCR (0xFFFA4080) // (TC5) Channel Control Register
-#define AT91C_TC5_IMR (0xFFFA40AC) // (TC5) Interrupt Mask Register
-#define AT91C_TC5_IER (0xFFFA40A4) // (TC5) Interrupt Enable Register
-#define AT91C_TC5_RC (0xFFFA409C) // (TC5) Register C
-#define AT91C_TC5_RA (0xFFFA4094) // (TC5) Register A
-// ========== Register definition for TC4 peripheral ==========
-#define AT91C_TC4_IMR (0xFFFA406C) // (TC4) Interrupt Mask Register
-#define AT91C_TC4_IER (0xFFFA4064) // (TC4) Interrupt Enable Register
-#define AT91C_TC4_RC (0xFFFA405C) // (TC4) Register C
-#define AT91C_TC4_RA (0xFFFA4054) // (TC4) Register A
-#define AT91C_TC4_CMR (0xFFFA4044) // (TC4) Channel Mode Register
-#define AT91C_TC4_IDR (0xFFFA4068) // (TC4) Interrupt Disable Register
-#define AT91C_TC4_SR (0xFFFA4060) // (TC4) Status Register
-#define AT91C_TC4_RB (0xFFFA4058) // (TC4) Register B
-#define AT91C_TC4_CV (0xFFFA4050) // (TC4) Counter Value
-#define AT91C_TC4_CCR (0xFFFA4040) // (TC4) Channel Control Register
-// ========== Register definition for TC3 peripheral ==========
-#define AT91C_TC3_IMR (0xFFFA402C) // (TC3) Interrupt Mask Register
-#define AT91C_TC3_CV (0xFFFA4010) // (TC3) Counter Value
-#define AT91C_TC3_CCR (0xFFFA4000) // (TC3) Channel Control Register
-#define AT91C_TC3_IER (0xFFFA4024) // (TC3) Interrupt Enable Register
-#define AT91C_TC3_CMR (0xFFFA4004) // (TC3) Channel Mode Register
-#define AT91C_TC3_RA (0xFFFA4014) // (TC3) Register A
-#define AT91C_TC3_RC (0xFFFA401C) // (TC3) Register C
-#define AT91C_TC3_IDR (0xFFFA4028) // (TC3) Interrupt Disable Register
-#define AT91C_TC3_RB (0xFFFA4018) // (TC3) Register B
-#define AT91C_TC3_SR (0xFFFA4020) // (TC3) Status Register
-// ========== Register definition for TCB1 peripheral ==========
-#define AT91C_TCB1_BCR (0xFFFA4140) // (TCB1) TC Block Control Register
-#define AT91C_TCB1_BMR (0xFFFA4144) // (TCB1) TC Block Mode Register
-// ========== Register definition for TC2 peripheral ==========
-#define AT91C_TC2_IMR (0xFFFA00AC) // (TC2) Interrupt Mask Register
-#define AT91C_TC2_IER (0xFFFA00A4) // (TC2) Interrupt Enable Register
-#define AT91C_TC2_RC (0xFFFA009C) // (TC2) Register C
-#define AT91C_TC2_RA (0xFFFA0094) // (TC2) Register A
-#define AT91C_TC2_CMR (0xFFFA0084) // (TC2) Channel Mode Register
-#define AT91C_TC2_IDR (0xFFFA00A8) // (TC2) Interrupt Disable Register
-#define AT91C_TC2_SR (0xFFFA00A0) // (TC2) Status Register
-#define AT91C_TC2_RB (0xFFFA0098) // (TC2) Register B
-#define AT91C_TC2_CV (0xFFFA0090) // (TC2) Counter Value
-#define AT91C_TC2_CCR (0xFFFA0080) // (TC2) Channel Control Register
-// ========== Register definition for TC1 peripheral ==========
-#define AT91C_TC1_IMR (0xFFFA006C) // (TC1) Interrupt Mask Register
-#define AT91C_TC1_IER (0xFFFA0064) // (TC1) Interrupt Enable Register
-#define AT91C_TC1_RC (0xFFFA005C) // (TC1) Register C
-#define AT91C_TC1_RA (0xFFFA0054) // (TC1) Register A
-#define AT91C_TC1_CMR (0xFFFA0044) // (TC1) Channel Mode Register
-#define AT91C_TC1_IDR (0xFFFA0068) // (TC1) Interrupt Disable Register
-#define AT91C_TC1_SR (0xFFFA0060) // (TC1) Status Register
-#define AT91C_TC1_RB (0xFFFA0058) // (TC1) Register B
-#define AT91C_TC1_CV (0xFFFA0050) // (TC1) Counter Value
-#define AT91C_TC1_CCR (0xFFFA0040) // (TC1) Channel Control Register
-// ========== Register definition for TC0 peripheral ==========
-#define AT91C_TC0_IMR (0xFFFA002C) // (TC0) Interrupt Mask Register
-#define AT91C_TC0_IER (0xFFFA0024) // (TC0) Interrupt Enable Register
-#define AT91C_TC0_RC (0xFFFA001C) // (TC0) Register C
-#define AT91C_TC0_RA (0xFFFA0014) // (TC0) Register A
-#define AT91C_TC0_CMR (0xFFFA0004) // (TC0) Channel Mode Register
-#define AT91C_TC0_IDR (0xFFFA0028) // (TC0) Interrupt Disable Register
-#define AT91C_TC0_SR (0xFFFA0020) // (TC0) Status Register
-#define AT91C_TC0_RB (0xFFFA0018) // (TC0) Register B
-#define AT91C_TC0_CV (0xFFFA0010) // (TC0) Counter Value
-#define AT91C_TC0_CCR (0xFFFA0000) // (TC0) Channel Control Register
-// ========== Register definition for TCB0 peripheral ==========
-#define AT91C_TCB0_BMR (0xFFFA00C4) // (TCB0) TC Block Mode Register
-#define AT91C_TCB0_BCR (0xFFFA00C0) // (TCB0) TC Block Control Register
-// ========== Register definition for UHP peripheral ==========
-#define AT91C_UHP_HcRhDescriptorA (0x00300048) // (UHP) Root Hub characteristics A
-#define AT91C_UHP_HcRhPortStatus (0x00300054) // (UHP) Root Hub Port Status Register
-#define AT91C_UHP_HcRhDescriptorB (0x0030004C) // (UHP) Root Hub characteristics B
-#define AT91C_UHP_HcControl (0x00300004) // (UHP) Operating modes for the Host Controller
-#define AT91C_UHP_HcInterruptStatus (0x0030000C) // (UHP) Interrupt Status Register
-#define AT91C_UHP_HcRhStatus (0x00300050) // (UHP) Root Hub Status register
-#define AT91C_UHP_HcRevision (0x00300000) // (UHP) Revision
-#define AT91C_UHP_HcCommandStatus (0x00300008) // (UHP) Command & status Register
-#define AT91C_UHP_HcInterruptEnable (0x00300010) // (UHP) Interrupt Enable Register
-#define AT91C_UHP_HcHCCA (0x00300018) // (UHP) Pointer to the Host Controller Communication Area
-#define AT91C_UHP_HcControlHeadED (0x00300020) // (UHP) First Endpoint Descriptor of the Control list
-#define AT91C_UHP_HcInterruptDisable (0x00300014) // (UHP) Interrupt Disable Register
-#define AT91C_UHP_HcPeriodCurrentED (0x0030001C) // (UHP) Current Isochronous or Interrupt Endpoint Descriptor
-#define AT91C_UHP_HcControlCurrentED (0x00300024) // (UHP) Endpoint Control and Status Register
-#define AT91C_UHP_HcBulkCurrentED (0x0030002C) // (UHP) Current endpoint of the Bulk list
-#define AT91C_UHP_HcFmInterval (0x00300034) // (UHP) Bit time between 2 consecutive SOFs
-#define AT91C_UHP_HcBulkHeadED (0x00300028) // (UHP) First endpoint register of the Bulk list
-#define AT91C_UHP_HcBulkDoneHead (0x00300030) // (UHP) Last completed transfer descriptor
-#define AT91C_UHP_HcFmRemaining (0x00300038) // (UHP) Bit time remaining in the current Frame
-#define AT91C_UHP_HcPeriodicStart (0x00300040) // (UHP) Periodic Start
-#define AT91C_UHP_HcLSThreshold (0x00300044) // (UHP) LS Threshold
-#define AT91C_UHP_HcFmNumber (0x0030003C) // (UHP) Frame number
-// ========== Register definition for EMAC peripheral ==========
-#define AT91C_EMAC_RSR (0xFFFBC020) // (EMAC) Receive Status Register
-#define AT91C_EMAC_MAN (0xFFFBC034) // (EMAC) PHY Maintenance Register
-#define AT91C_EMAC_HSH (0xFFFBC090) // (EMAC) Hash Address High[63:32]
-#define AT91C_EMAC_MCOL (0xFFFBC048) // (EMAC) Multiple Collision Frame Register
-#define AT91C_EMAC_IER (0xFFFBC028) // (EMAC) Interrupt Enable Register
-#define AT91C_EMAC_SA2H (0xFFFBC0A4) // (EMAC) Specific Address 2 High, Last 2 bytes
-#define AT91C_EMAC_HSL (0xFFFBC094) // (EMAC) Hash Address Low[31:0]
-#define AT91C_EMAC_LCOL (0xFFFBC05C) // (EMAC) Late Collision Register
-#define AT91C_EMAC_OK (0xFFFBC04C) // (EMAC) Frames Received OK Register
-#define AT91C_EMAC_CFG (0xFFFBC004) // (EMAC) Network Configuration Register
-#define AT91C_EMAC_SA3L (0xFFFBC0A8) // (EMAC) Specific Address 3 Low, First 4 bytes
-#define AT91C_EMAC_SEQE (0xFFFBC050) // (EMAC) Frame Check Sequence Error Register
-#define AT91C_EMAC_ECOL (0xFFFBC060) // (EMAC) Excessive Collision Register
-#define AT91C_EMAC_ELR (0xFFFBC070) // (EMAC) Excessive Length Error Register
-#define AT91C_EMAC_SR (0xFFFBC008) // (EMAC) Network Status Register
-#define AT91C_EMAC_RBQP (0xFFFBC018) // (EMAC) Receive Buffer Queue Pointer
-#define AT91C_EMAC_CSE (0xFFFBC064) // (EMAC) Carrier Sense Error Register
-#define AT91C_EMAC_RJB (0xFFFBC074) // (EMAC) Receive Jabber Register
-#define AT91C_EMAC_USF (0xFFFBC078) // (EMAC) Undersize Frame Register
-#define AT91C_EMAC_IDR (0xFFFBC02C) // (EMAC) Interrupt Disable Register
-#define AT91C_EMAC_SA1L (0xFFFBC098) // (EMAC) Specific Address 1 Low, First 4 bytes
-#define AT91C_EMAC_IMR (0xFFFBC030) // (EMAC) Interrupt Mask Register
-#define AT91C_EMAC_FRA (0xFFFBC040) // (EMAC) Frames Transmitted OK Register
-#define AT91C_EMAC_SA3H (0xFFFBC0AC) // (EMAC) Specific Address 3 High, Last 2 bytes
-#define AT91C_EMAC_SA1H (0xFFFBC09C) // (EMAC) Specific Address 1 High, Last 2 bytes
-#define AT91C_EMAC_SCOL (0xFFFBC044) // (EMAC) Single Collision Frame Register
-#define AT91C_EMAC_ALE (0xFFFBC054) // (EMAC) Alignment Error Register
-#define AT91C_EMAC_TAR (0xFFFBC00C) // (EMAC) Transmit Address Register
-#define AT91C_EMAC_SA4L (0xFFFBC0B0) // (EMAC) Specific Address 4 Low, First 4 bytes
-#define AT91C_EMAC_SA2L (0xFFFBC0A0) // (EMAC) Specific Address 2 Low, First 4 bytes
-#define AT91C_EMAC_TUE (0xFFFBC068) // (EMAC) Transmit Underrun Error Register
-#define AT91C_EMAC_DTE (0xFFFBC058) // (EMAC) Deferred Transmission Frame Register
-#define AT91C_EMAC_TCR (0xFFFBC010) // (EMAC) Transmit Control Register
-#define AT91C_EMAC_CTL (0xFFFBC000) // (EMAC) Network Control Register
-#define AT91C_EMAC_SA4H (0xFFFBC0B4) // (EMAC) Specific Address 4 High, Last 2 bytesr
-#define AT91C_EMAC_CDE (0xFFFBC06C) // (EMAC) Code Error Register
-#define AT91C_EMAC_SQEE (0xFFFBC07C) // (EMAC) SQE Test Error Register
-#define AT91C_EMAC_TSR (0xFFFBC014) // (EMAC) Transmit Status Register
-#define AT91C_EMAC_DRFC (0xFFFBC080) // (EMAC) Discarded RX Frame Register
-// ========== Register definition for EBI peripheral ==========
-#define AT91C_EBI_CFGR (0xFFFFFF64) // (EBI) Configuration Register
-#define AT91C_EBI_CSA (0xFFFFFF60) // (EBI) Chip Select Assignment Register
-// ========== Register definition for SMC2 peripheral ==========
-#define AT91C_SMC2_CSR (0xFFFFFF70) // (SMC2) SMC2 Chip Select Register
-// ========== Register definition for SDRC peripheral ==========
-#define AT91C_SDRC_IMR (0xFFFFFFAC) // (SDRC) SDRAM Controller Interrupt Mask Register
-#define AT91C_SDRC_IER (0xFFFFFFA4) // (SDRC) SDRAM Controller Interrupt Enable Register
-#define AT91C_SDRC_SRR (0xFFFFFF9C) // (SDRC) SDRAM Controller Self Refresh Register
-#define AT91C_SDRC_TR (0xFFFFFF94) // (SDRC) SDRAM Controller Refresh Timer Register
-#define AT91C_SDRC_ISR (0xFFFFFFB0) // (SDRC) SDRAM Controller Interrupt Mask Register
-#define AT91C_SDRC_IDR (0xFFFFFFA8) // (SDRC) SDRAM Controller Interrupt Disable Register
-#define AT91C_SDRC_LPR (0xFFFFFFA0) // (SDRC) SDRAM Controller Low Power Register
-#define AT91C_SDRC_CR (0xFFFFFF98) // (SDRC) SDRAM Controller Configuration Register
-#define AT91C_SDRC_MR (0xFFFFFF90) // (SDRC) SDRAM Controller Mode Register
-// ========== Register definition for BFC peripheral ==========
-#define AT91C_BFC_MR (0xFFFFFFC0) // (BFC) BFC Mode Register
-
-// *****************************************************************************
-// PIO DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_PIO_PA0 (1 << 0) // Pin Controlled by PA0
-#define AT91C_PA0_MISO (AT91C_PIO_PA0) // SPI Master In Slave
-#define AT91C_PA0_PCK3 (AT91C_PIO_PA0) // PMC Programmable Clock Output 3
-#define AT91C_PIO_PA1 (1 << 1) // Pin Controlled by PA1
-#define AT91C_PA1_MOSI (AT91C_PIO_PA1) // SPI Master Out Slave
-#define AT91C_PA1_PCK0 (AT91C_PIO_PA1) // PMC Programmable Clock Output 0
-#define AT91C_PIO_PA10 (1 << 10) // Pin Controlled by PA10
-#define AT91C_PA10_ETX1 (AT91C_PIO_PA10) // Ethernet MAC Transmit Data 1
-#define AT91C_PA10_MCDB1 (AT91C_PIO_PA10) // Multimedia Card B Data 1
-#define AT91C_PIO_PA11 (1 << 11) // Pin Controlled by PA11
-#define AT91C_PA11_ECRS_ECRSDV (AT91C_PIO_PA11) // Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
-#define AT91C_PA11_MCDB2 (AT91C_PIO_PA11) // Multimedia Card B Data 2
-#define AT91C_PIO_PA12 (1 << 12) // Pin Controlled by PA12
-#define AT91C_PA12_ERX0 (AT91C_PIO_PA12) // Ethernet MAC Receive Data 0
-#define AT91C_PA12_MCDB3 (AT91C_PIO_PA12) // Multimedia Card B Data 3
-#define AT91C_PIO_PA13 (1 << 13) // Pin Controlled by PA13
-#define AT91C_PA13_ERX1 (AT91C_PIO_PA13) // Ethernet MAC Receive Data 1
-#define AT91C_PA13_TCLK0 (AT91C_PIO_PA13) // Timer Counter 0 external clock input
-#define AT91C_PIO_PA14 (1 << 14) // Pin Controlled by PA14
-#define AT91C_PA14_ERXER (AT91C_PIO_PA14) // Ethernet MAC Receive Error
-#define AT91C_PA14_TCLK1 (AT91C_PIO_PA14) // Timer Counter 1 external clock input
-#define AT91C_PIO_PA15 (1 << 15) // Pin Controlled by PA15
-#define AT91C_PA15_EMDC (AT91C_PIO_PA15) // Ethernet MAC Management Data Clock
-#define AT91C_PA15_TCLK2 (AT91C_PIO_PA15) // Timer Counter 2 external clock input
-#define AT91C_PIO_PA16 (1 << 16) // Pin Controlled by PA16
-#define AT91C_PA16_EMDIO (AT91C_PIO_PA16) // Ethernet MAC Management Data Input/Output
-#define AT91C_PA16_IRQ6 (AT91C_PIO_PA16) // AIC Interrupt input 6
-#define AT91C_PIO_PA17 (1 << 17) // Pin Controlled by PA17
-#define AT91C_PA17_TXD0 (AT91C_PIO_PA17) // USART 0 Transmit Data
-#define AT91C_PA17_TIOA0 (AT91C_PIO_PA17) // Timer Counter 0 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA18 (1 << 18) // Pin Controlled by PA18
-#define AT91C_PA18_RXD0 (AT91C_PIO_PA18) // USART 0 Receive Data
-#define AT91C_PA18_TIOB0 (AT91C_PIO_PA18) // Timer Counter 0 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA19 (1 << 19) // Pin Controlled by PA19
-#define AT91C_PA19_SCK0 (AT91C_PIO_PA19) // USART 0 Serial Clock
-#define AT91C_PA19_TIOA1 (AT91C_PIO_PA19) // Timer Counter 1 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA2 (1 << 2) // Pin Controlled by PA2
-#define AT91C_PA2_SPCK (AT91C_PIO_PA2) // SPI Serial Clock
-#define AT91C_PA2_IRQ4 (AT91C_PIO_PA2) // AIC Interrupt Input 4
-#define AT91C_PIO_PA20 (1 << 20) // Pin Controlled by PA20
-#define AT91C_PA20_CTS0 (AT91C_PIO_PA20) // USART 0 Clear To Send
-#define AT91C_PA20_TIOB1 (AT91C_PIO_PA20) // Timer Counter 1 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA21 (1 << 21) // Pin Controlled by PA21
-#define AT91C_PA21_RTS0 (AT91C_PIO_PA21) // Usart 0 Ready To Send
-#define AT91C_PA21_TIOA2 (AT91C_PIO_PA21) // Timer Counter 2 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PA22 (1 << 22) // Pin Controlled by PA22
-#define AT91C_PA22_RXD2 (AT91C_PIO_PA22) // USART 2 Receive Data
-#define AT91C_PA22_TIOB2 (AT91C_PIO_PA22) // Timer Counter 2 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PA23 (1 << 23) // Pin Controlled by PA23
-#define AT91C_PA23_TXD2 (AT91C_PIO_PA23) // USART 2 Transmit Data
-#define AT91C_PA23_IRQ3 (AT91C_PIO_PA23) // Interrupt input 3
-#define AT91C_PIO_PA24 (1 << 24) // Pin Controlled by PA24
-#define AT91C_PA24_SCK2 (AT91C_PIO_PA24) // USART2 Serial Clock
-#define AT91C_PA24_PCK1 (AT91C_PIO_PA24) // PMC Programmable Clock Output 1
-#define AT91C_PIO_PA25 (1 << 25) // Pin Controlled by PA25
-#define AT91C_PA25_TWD (AT91C_PIO_PA25) // TWI Two-wire Serial Data
-#define AT91C_PA25_IRQ2 (AT91C_PIO_PA25) // Interrupt input 2
-#define AT91C_PIO_PA26 (1 << 26) // Pin Controlled by PA26
-#define AT91C_PA26_TWCK (AT91C_PIO_PA26) // TWI Two-wire Serial Clock
-#define AT91C_PA26_IRQ1 (AT91C_PIO_PA26) // Interrupt input 1
-#define AT91C_PIO_PA27 (1 << 27) // Pin Controlled by PA27
-#define AT91C_PA27_MCCK (AT91C_PIO_PA27) // Multimedia Card Clock
-#define AT91C_PA27_TCLK3 (AT91C_PIO_PA27) // Timer Counter 3 External Clock Input
-#define AT91C_PIO_PA28 (1 << 28) // Pin Controlled by PA28
-#define AT91C_PA28_MCCDA (AT91C_PIO_PA28) // Multimedia Card A Command
-#define AT91C_PA28_TCLK4 (AT91C_PIO_PA28) // Timer Counter 4 external Clock Input
-#define AT91C_PIO_PA29 (1 << 29) // Pin Controlled by PA29
-#define AT91C_PA29_MCDA0 (AT91C_PIO_PA29) // Multimedia Card A Data 0
-#define AT91C_PA29_TCLK5 (AT91C_PIO_PA29) // Timer Counter 5 external clock input
-#define AT91C_PIO_PA3 (1 << 3) // Pin Controlled by PA3
-#define AT91C_PA3_NPCS0 (AT91C_PIO_PA3) // SPI Peripheral Chip Select 0
-#define AT91C_PA3_IRQ5 (AT91C_PIO_PA3) // AIC Interrupt Input 5
-#define AT91C_PIO_PA30 (1 << 30) // Pin Controlled by PA30
-#define AT91C_PA30_DRXD (AT91C_PIO_PA30) // DBGU Debug Receive Data
-#define AT91C_PA30_CTS2 (AT91C_PIO_PA30) // Usart 2 Clear To Send
-#define AT91C_PIO_PA31 (1 << 31) // Pin Controlled by PA31
-#define AT91C_PA31_DTXD (AT91C_PIO_PA31) // DBGU Debug Transmit Data
-#define AT91C_PA31_RTS2 (AT91C_PIO_PA31) // USART 2 Ready To Send
-#define AT91C_PIO_PA4 (1 << 4) // Pin Controlled by PA4
-#define AT91C_PA4_NPCS1 (AT91C_PIO_PA4) // SPI Peripheral Chip Select 1
-#define AT91C_PA4_PCK1 (AT91C_PIO_PA4) // PMC Programmable Clock Output 1
-#define AT91C_PIO_PA5 (1 << 5) // Pin Controlled by PA5
-#define AT91C_PA5_NPCS2 (AT91C_PIO_PA5) // SPI Peripheral Chip Select 2
-#define AT91C_PA5_TXD3 (AT91C_PIO_PA5) // USART 3 Transmit Data
-#define AT91C_PIO_PA6 (1 << 6) // Pin Controlled by PA6
-#define AT91C_PA6_NPCS3 (AT91C_PIO_PA6) // SPI Peripheral Chip Select 3
-#define AT91C_PA6_RXD3 (AT91C_PIO_PA6) // USART 3 Receive Data
-#define AT91C_PIO_PA7 (1 << 7) // Pin Controlled by PA7
-#define AT91C_PA7_ETXCK_EREFCK (AT91C_PIO_PA7) // Ethernet MAC Transmit Clock/Reference Clock
-#define AT91C_PA7_PCK2 (AT91C_PIO_PA7) // PMC Programmable Clock 2
-#define AT91C_PIO_PA8 (1 << 8) // Pin Controlled by PA8
-#define AT91C_PA8_ETXEN (AT91C_PIO_PA8) // Ethernet MAC Transmit Enable
-#define AT91C_PA8_MCCDB (AT91C_PIO_PA8) // Multimedia Card B Command
-#define AT91C_PIO_PA9 (1 << 9) // Pin Controlled by PA9
-#define AT91C_PA9_ETX0 (AT91C_PIO_PA9) // Ethernet MAC Transmit Data 0
-#define AT91C_PA9_MCDB0 (AT91C_PIO_PA9) // Multimedia Card B Data 0
-#define AT91C_PIO_PB0 (1 << 0) // Pin Controlled by PB0
-#define AT91C_PB0_TF0 (AT91C_PIO_PB0) // SSC Transmit Frame Sync 0
-#define AT91C_PB0_TIOB3 (AT91C_PIO_PB0) // Timer Counter 3 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB1 (1 << 1) // Pin Controlled by PB1
-#define AT91C_PB1_TK0 (AT91C_PIO_PB1) // SSC Transmit Clock 0
-#define AT91C_PB1_CTS3 (AT91C_PIO_PB1) // USART 3 Clear To Send
-#define AT91C_PIO_PB10 (1 << 10) // Pin Controlled by PB10
-#define AT91C_PB10_RK1 (AT91C_PIO_PB10) // SSC Receive Clock 1
-#define AT91C_PB10_TIOA5 (AT91C_PIO_PB10) // Timer Counter 5 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB11 (1 << 11) // Pin Controlled by PB11
-#define AT91C_PB11_RF1 (AT91C_PIO_PB11) // SSC Receive Frame Sync 1
-#define AT91C_PB11_TIOB5 (AT91C_PIO_PB11) // Timer Counter 5 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB12 (1 << 12) // Pin Controlled by PB12
-#define AT91C_PB12_TF2 (AT91C_PIO_PB12) // SSC Transmit Frame Sync 2
-#define AT91C_PB12_ETX2 (AT91C_PIO_PB12) // Ethernet MAC Transmit Data 2
-#define AT91C_PIO_PB13 (1 << 13) // Pin Controlled by PB13
-#define AT91C_PB13_TK2 (AT91C_PIO_PB13) // SSC Transmit Clock 2
-#define AT91C_PB13_ETX3 (AT91C_PIO_PB13) // Ethernet MAC Transmit Data 3
-#define AT91C_PIO_PB14 (1 << 14) // Pin Controlled by PB14
-#define AT91C_PB14_TD2 (AT91C_PIO_PB14) // SSC Transmit Data 2
-#define AT91C_PB14_ETXER (AT91C_PIO_PB14) // Ethernet MAC Transmikt Coding Error
-#define AT91C_PIO_PB15 (1 << 15) // Pin Controlled by PB15
-#define AT91C_PB15_RD2 (AT91C_PIO_PB15) // SSC Receive Data 2
-#define AT91C_PB15_ERX2 (AT91C_PIO_PB15) // Ethernet MAC Receive Data 2
-#define AT91C_PIO_PB16 (1 << 16) // Pin Controlled by PB16
-#define AT91C_PB16_RK2 (AT91C_PIO_PB16) // SSC Receive Clock 2
-#define AT91C_PB16_ERX3 (AT91C_PIO_PB16) // Ethernet MAC Receive Data 3
-#define AT91C_PIO_PB17 (1 << 17) // Pin Controlled by PB17
-#define AT91C_PB17_RF2 (AT91C_PIO_PB17) // SSC Receive Frame Sync 2
-#define AT91C_PB17_ERXDV (AT91C_PIO_PB17) // Ethernet MAC Receive Data Valid
-#define AT91C_PIO_PB18 (1 << 18) // Pin Controlled by PB18
-#define AT91C_PB18_RI1 (AT91C_PIO_PB18) // USART 1 Ring Indicator
-#define AT91C_PB18_ECOL (AT91C_PIO_PB18) // Ethernet MAC Collision Detected
-#define AT91C_PIO_PB19 (1 << 19) // Pin Controlled by PB19
-#define AT91C_PB19_DTR1 (AT91C_PIO_PB19) // USART 1 Data Terminal ready
-#define AT91C_PB19_ERXCK (AT91C_PIO_PB19) // Ethernet MAC Receive Clock
-#define AT91C_PIO_PB2 (1 << 2) // Pin Controlled by PB2
-#define AT91C_PB2_TD0 (AT91C_PIO_PB2) // SSC Transmit data
-#define AT91C_PB2_SCK3 (AT91C_PIO_PB2) // USART 3 Serial Clock
-#define AT91C_PIO_PB20 (1 << 20) // Pin Controlled by PB20
-#define AT91C_PB20_TXD1 (AT91C_PIO_PB20) // USART 1 Transmit Data
-#define AT91C_PIO_PB21 (1 << 21) // Pin Controlled by PB21
-#define AT91C_PB21_RXD1 (AT91C_PIO_PB21) // USART 1 Receive Data
-#define AT91C_PIO_PB22 (1 << 22) // Pin Controlled by PB22
-#define AT91C_PB22_SCK1 (AT91C_PIO_PB22) // USART1 Serial Clock
-#define AT91C_PIO_PB23 (1 << 23) // Pin Controlled by PB23
-#define AT91C_PB23_DCD1 (AT91C_PIO_PB23) // USART 1 Data Carrier Detect
-#define AT91C_PIO_PB24 (1 << 24) // Pin Controlled by PB24
-#define AT91C_PB24_CTS1 (AT91C_PIO_PB24) // USART 1 Clear To Send
-#define AT91C_PIO_PB25 (1 << 25) // Pin Controlled by PB25
-#define AT91C_PB25_DSR1 (AT91C_PIO_PB25) // USART 1 Data Set ready
-#define AT91C_PB25_EF100 (AT91C_PIO_PB25) // Ethernet MAC Force 100 Mbits/sec
-#define AT91C_PIO_PB26 (1 << 26) // Pin Controlled by PB26
-#define AT91C_PB26_RTS1 (AT91C_PIO_PB26) // Usart 0 Ready To Send
-#define AT91C_PIO_PB27 (1 << 27) // Pin Controlled by PB27
-#define AT91C_PB27_PCK0 (AT91C_PIO_PB27) // PMC Programmable Clock Output 0
-#define AT91C_PIO_PB28 (1 << 28) // Pin Controlled by PB28
-#define AT91C_PB28_FIQ (AT91C_PIO_PB28) // AIC Fast Interrupt Input
-#define AT91C_PIO_PB29 (1 << 29) // Pin Controlled by PB29
-#define AT91C_PB29_IRQ0 (AT91C_PIO_PB29) // Interrupt input 0
-#define AT91C_PIO_PB3 (1 << 3) // Pin Controlled by PB3
-#define AT91C_PB3_RD0 (AT91C_PIO_PB3) // SSC Receive Data
-#define AT91C_PB3_MCDA1 (AT91C_PIO_PB3) // Multimedia Card A Data 1
-#define AT91C_PIO_PB4 (1 << 4) // Pin Controlled by PB4
-#define AT91C_PB4_RK0 (AT91C_PIO_PB4) // SSC Receive Clock
-#define AT91C_PB4_MCDA2 (AT91C_PIO_PB4) // Multimedia Card A Data 2
-#define AT91C_PIO_PB5 (1 << 5) // Pin Controlled by PB5
-#define AT91C_PB5_RF0 (AT91C_PIO_PB5) // SSC Receive Frame Sync 0
-#define AT91C_PB5_MCDA3 (AT91C_PIO_PB5) // Multimedia Card A Data 3
-#define AT91C_PIO_PB6 (1 << 6) // Pin Controlled by PB6
-#define AT91C_PB6_TF1 (AT91C_PIO_PB6) // SSC Transmit Frame Sync 1
-#define AT91C_PB6_TIOA3 (AT91C_PIO_PB6) // Timer Counter 4 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB7 (1 << 7) // Pin Controlled by PB7
-#define AT91C_PB7_TK1 (AT91C_PIO_PB7) // SSC Transmit Clock 1
-#define AT91C_PB7_TIOB3 (AT91C_PIO_PB7) // Timer Counter 3 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PB8 (1 << 8) // Pin Controlled by PB8
-#define AT91C_PB8_TD1 (AT91C_PIO_PB8) // SSC Transmit Data 1
-#define AT91C_PB8_TIOA4 (AT91C_PIO_PB8) // Timer Counter 4 Multipurpose Timer I/O Pin A
-#define AT91C_PIO_PB9 (1 << 9) // Pin Controlled by PB9
-#define AT91C_PB9_RD1 (AT91C_PIO_PB9) // SSC Receive Data 1
-#define AT91C_PB9_TIOB4 (AT91C_PIO_PB9) // Timer Counter 4 Multipurpose Timer I/O Pin B
-#define AT91C_PIO_PC0 (1 << 0) // Pin Controlled by PC0
-#define AT91C_PC0_BFCK (AT91C_PIO_PC0) // Burst Flash Clock
-#define AT91C_PIO_PC1 (1 << 1) // Pin Controlled by PC1
-#define AT91C_PC1_BFRDY_SMOE (AT91C_PIO_PC1) // Burst Flash Ready
-#define AT91C_PIO_PC10 (1 << 10) // Pin Controlled by PC10
-#define AT91C_PC10_NCS4_CFCS (AT91C_PIO_PC10) // Compact Flash Chip Select
-#define AT91C_PIO_PC11 (1 << 11) // Pin Controlled by PC11
-#define AT91C_PC11_NCS5_CFCE1 (AT91C_PIO_PC11) // Chip Select 5 / Compact Flash Chip Enable 1
-#define AT91C_PIO_PC12 (1 << 12) // Pin Controlled by PC12
-#define AT91C_PC12_NCS6_CFCE2 (AT91C_PIO_PC12) // Chip Select 6 / Compact Flash Chip Enable 2
-#define AT91C_PIO_PC13 (1 << 13) // Pin Controlled by PC13
-#define AT91C_PC13_NCS7 (AT91C_PIO_PC13) // Chip Select 7
-#define AT91C_PIO_PC14 (1 << 14) // Pin Controlled by PC14
-#define AT91C_PIO_PC15 (1 << 15) // Pin Controlled by PC15
-#define AT91C_PIO_PC16 (1 << 16) // Pin Controlled by PC16
-#define AT91C_PC16_D16 (AT91C_PIO_PC16) // Data Bus [16]
-#define AT91C_PIO_PC17 (1 << 17) // Pin Controlled by PC17
-#define AT91C_PC17_D17 (AT91C_PIO_PC17) // Data Bus [17]
-#define AT91C_PIO_PC18 (1 << 18) // Pin Controlled by PC18
-#define AT91C_PC18_D18 (AT91C_PIO_PC18) // Data Bus [18]
-#define AT91C_PIO_PC19 (1 << 19) // Pin Controlled by PC19
-#define AT91C_PC19_D19 (AT91C_PIO_PC19) // Data Bus [19]
-#define AT91C_PIO_PC2 (1 << 2) // Pin Controlled by PC2
-#define AT91C_PC2_BFAVD (AT91C_PIO_PC2) // Burst Flash Address Valid
-#define AT91C_PIO_PC20 (1 << 20) // Pin Controlled by PC20
-#define AT91C_PC20_D20 (AT91C_PIO_PC20) // Data Bus [20]
-#define AT91C_PIO_PC21 (1 << 21) // Pin Controlled by PC21
-#define AT91C_PC21_D21 (AT91C_PIO_PC21) // Data Bus [21]
-#define AT91C_PIO_PC22 (1 << 22) // Pin Controlled by PC22
-#define AT91C_PC22_D22 (AT91C_PIO_PC22) // Data Bus [22]
-#define AT91C_PIO_PC23 (1 << 23) // Pin Controlled by PC23
-#define AT91C_PC23_D23 (AT91C_PIO_PC23) // Data Bus [23]
-#define AT91C_PIO_PC24 (1 << 24) // Pin Controlled by PC24
-#define AT91C_PC24_D24 (AT91C_PIO_PC24) // Data Bus [24]
-#define AT91C_PIO_PC25 (1 << 25) // Pin Controlled by PC25
-#define AT91C_PC25_D25 (AT91C_PIO_PC25) // Data Bus [25]
-#define AT91C_PIO_PC26 (1 << 26) // Pin Controlled by PC26
-#define AT91C_PC26_D26 (AT91C_PIO_PC26) // Data Bus [26]
-#define AT91C_PIO_PC27 (1 << 27) // Pin Controlled by PC27
-#define AT91C_PC27_D27 (AT91C_PIO_PC27) // Data Bus [27]
-#define AT91C_PIO_PC28 (1 << 28) // Pin Controlled by PC28
-#define AT91C_PC28_D28 (AT91C_PIO_PC28) // Data Bus [28]
-#define AT91C_PIO_PC29 (1 << 29) // Pin Controlled by PC29
-#define AT91C_PC29_D29 (AT91C_PIO_PC29) // Data Bus [29]
-#define AT91C_PIO_PC3 (1 << 3) // Pin Controlled by PC3
-#define AT91C_PC3_BFBAA_SMWE (AT91C_PIO_PC3) // Burst Flash Address Advance / SmartMedia Write Enable
-#define AT91C_PIO_PC30 (1 << 30) // Pin Controlled by PC30
-#define AT91C_PC30_D30 (AT91C_PIO_PC30) // Data Bus [30]
-#define AT91C_PIO_PC31 (1 << 31) // Pin Controlled by PC31
-#define AT91C_PC31_D31 (AT91C_PIO_PC31) // Data Bus [31]
-#define AT91C_PIO_PC4 (1 << 4) // Pin Controlled by PC4
-#define AT91C_PC4_BFOE (AT91C_PIO_PC4) // Burst Flash Output Enable
-#define AT91C_PIO_PC5 (1 << 5) // Pin Controlled by PC5
-#define AT91C_PC5_BFWE (AT91C_PIO_PC5) // Burst Flash Write Enable
-#define AT91C_PIO_PC6 (1 << 6) // Pin Controlled by PC6
-#define AT91C_PC6_NWAIT (AT91C_PIO_PC6) // NWAIT
-#define AT91C_PIO_PC7 (1 << 7) // Pin Controlled by PC7
-#define AT91C_PC7_A23 (AT91C_PIO_PC7) // Address Bus[23]
-#define AT91C_PIO_PC8 (1 << 8) // Pin Controlled by PC8
-#define AT91C_PC8_A24 (AT91C_PIO_PC8) // Address Bus[24]
-#define AT91C_PIO_PC9 (1 << 9) // Pin Controlled by PC9
-#define AT91C_PC9_A25_CFRNW (AT91C_PIO_PC9) // Address Bus[25] / Compact Flash Read Not Write
-#define AT91C_PIO_PD0 (1 << 0) // Pin Controlled by PD0
-#define AT91C_PD0_ETX0 (AT91C_PIO_PD0) // Ethernet MAC Transmit Data 0
-#define AT91C_PIO_PD1 (1 << 1) // Pin Controlled by PD1
-#define AT91C_PD1_ETX1 (AT91C_PIO_PD1) // Ethernet MAC Transmit Data 1
-#define AT91C_PIO_PD10 (1 << 10) // Pin Controlled by PD10
-#define AT91C_PD10_PCK3 (AT91C_PIO_PD10) // PMC Programmable Clock Output 3
-#define AT91C_PD10_TPS1 (AT91C_PIO_PD10) // ETM ARM9 pipeline status 1
-#define AT91C_PIO_PD11 (1 << 11) // Pin Controlled by PD11
-#define AT91C_PD11_ (AT91C_PIO_PD11) //
-#define AT91C_PD11_TPS2 (AT91C_PIO_PD11) // ETM ARM9 pipeline status 2
-#define AT91C_PIO_PD12 (1 << 12) // Pin Controlled by PD12
-#define AT91C_PD12_ (AT91C_PIO_PD12) //
-#define AT91C_PD12_TPK0 (AT91C_PIO_PD12) // ETM Trace Packet 0
-#define AT91C_PIO_PD13 (1 << 13) // Pin Controlled by PD13
-#define AT91C_PD13_ (AT91C_PIO_PD13) //
-#define AT91C_PD13_TPK1 (AT91C_PIO_PD13) // ETM Trace Packet 1
-#define AT91C_PIO_PD14 (1 << 14) // Pin Controlled by PD14
-#define AT91C_PD14_ (AT91C_PIO_PD14) //
-#define AT91C_PD14_TPK2 (AT91C_PIO_PD14) // ETM Trace Packet 2
-#define AT91C_PIO_PD15 (1 << 15) // Pin Controlled by PD15
-#define AT91C_PD15_TD0 (AT91C_PIO_PD15) // SSC Transmit data
-#define AT91C_PD15_TPK3 (AT91C_PIO_PD15) // ETM Trace Packet 3
-#define AT91C_PIO_PD16 (1 << 16) // Pin Controlled by PD16
-#define AT91C_PD16_TD1 (AT91C_PIO_PD16) // SSC Transmit Data 1
-#define AT91C_PD16_TPK4 (AT91C_PIO_PD16) // ETM Trace Packet 4
-#define AT91C_PIO_PD17 (1 << 17) // Pin Controlled by PD17
-#define AT91C_PD17_TD2 (AT91C_PIO_PD17) // SSC Transmit Data 2
-#define AT91C_PD17_TPK5 (AT91C_PIO_PD17) // ETM Trace Packet 5
-#define AT91C_PIO_PD18 (1 << 18) // Pin Controlled by PD18
-#define AT91C_PD18_NPCS1 (AT91C_PIO_PD18) // SPI Peripheral Chip Select 1
-#define AT91C_PD18_TPK6 (AT91C_PIO_PD18) // ETM Trace Packet 6
-#define AT91C_PIO_PD19 (1 << 19) // Pin Controlled by PD19
-#define AT91C_PD19_NPCS2 (AT91C_PIO_PD19) // SPI Peripheral Chip Select 2
-#define AT91C_PD19_TPK7 (AT91C_PIO_PD19) // ETM Trace Packet 7
-#define AT91C_PIO_PD2 (1 << 2) // Pin Controlled by PD2
-#define AT91C_PD2_ETX2 (AT91C_PIO_PD2) // Ethernet MAC Transmit Data 2
-#define AT91C_PIO_PD20 (1 << 20) // Pin Controlled by PD20
-#define AT91C_PD20_NPCS3 (AT91C_PIO_PD20) // SPI Peripheral Chip Select 3
-#define AT91C_PD20_TPK8 (AT91C_PIO_PD20) // ETM Trace Packet 8
-#define AT91C_PIO_PD21 (1 << 21) // Pin Controlled by PD21
-#define AT91C_PD21_RTS0 (AT91C_PIO_PD21) // Usart 0 Ready To Send
-#define AT91C_PD21_TPK9 (AT91C_PIO_PD21) // ETM Trace Packet 9
-#define AT91C_PIO_PD22 (1 << 22) // Pin Controlled by PD22
-#define AT91C_PD22_RTS1 (AT91C_PIO_PD22) // Usart 0 Ready To Send
-#define AT91C_PD22_TPK10 (AT91C_PIO_PD22) // ETM Trace Packet 10
-#define AT91C_PIO_PD23 (1 << 23) // Pin Controlled by PD23
-#define AT91C_PD23_RTS2 (AT91C_PIO_PD23) // USART 2 Ready To Send
-#define AT91C_PD23_TPK11 (AT91C_PIO_PD23) // ETM Trace Packet 11
-#define AT91C_PIO_PD24 (1 << 24) // Pin Controlled by PD24
-#define AT91C_PD24_RTS3 (AT91C_PIO_PD24) // USART 3 Ready To Send
-#define AT91C_PD24_TPK12 (AT91C_PIO_PD24) // ETM Trace Packet 12
-#define AT91C_PIO_PD25 (1 << 25) // Pin Controlled by PD25
-#define AT91C_PD25_DTR1 (AT91C_PIO_PD25) // USART 1 Data Terminal ready
-#define AT91C_PD25_TPK13 (AT91C_PIO_PD25) // ETM Trace Packet 13
-#define AT91C_PIO_PD26 (1 << 26) // Pin Controlled by PD26
-#define AT91C_PD26_TPK14 (AT91C_PIO_PD26) // ETM Trace Packet 14
-#define AT91C_PIO_PD27 (1 << 27) // Pin Controlled by PD27
-#define AT91C_PD27_TPK15 (AT91C_PIO_PD27) // ETM Trace Packet 15
-#define AT91C_PIO_PD3 (1 << 3) // Pin Controlled by PD3
-#define AT91C_PD3_ETX3 (AT91C_PIO_PD3) // Ethernet MAC Transmit Data 3
-#define AT91C_PIO_PD4 (1 << 4) // Pin Controlled by PD4
-#define AT91C_PD4_ETXEN (AT91C_PIO_PD4) // Ethernet MAC Transmit Enable
-#define AT91C_PIO_PD5 (1 << 5) // Pin Controlled by PD5
-#define AT91C_PD5_ETXER (AT91C_PIO_PD5) // Ethernet MAC Transmikt Coding Error
-#define AT91C_PIO_PD6 (1 << 6) // Pin Controlled by PD6
-#define AT91C_PD6_DTXD (AT91C_PIO_PD6) // DBGU Debug Transmit Data
-#define AT91C_PIO_PD7 (1 << 7) // Pin Controlled by PD7
-#define AT91C_PD7_PCK0 (AT91C_PIO_PD7) // PMC Programmable Clock Output 0
-#define AT91C_PD7_TSYNC (AT91C_PIO_PD7) // ETM Synchronization signal
-#define AT91C_PIO_PD8 (1 << 8) // Pin Controlled by PD8
-#define AT91C_PD8_PCK1 (AT91C_PIO_PD8) // PMC Programmable Clock Output 1
-#define AT91C_PD8_TCLK (AT91C_PIO_PD8) // ETM Trace Clock signal
-#define AT91C_PIO_PD9 (1 << 9) // Pin Controlled by PD9
-#define AT91C_PD9_PCK2 (AT91C_PIO_PD9) // PMC Programmable Clock 2
-#define AT91C_PD9_TPS0 (AT91C_PIO_PD9) // ETM ARM9 pipeline status 0
-
-// *****************************************************************************
-// PERIPHERAL ID DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_ID_FIQ ( 0) // Advanced Interrupt Controller (FIQ)
-#define AT91C_ID_SYS ( 1) // System Peripheral
-#define AT91C_ID_PIOA ( 2) // Parallel IO Controller A
-#define AT91C_ID_PIOB ( 3) // Parallel IO Controller B
-#define AT91C_ID_PIOC ( 4) // Parallel IO Controller C
-#define AT91C_ID_PIOD ( 5) // Parallel IO Controller D
-#define AT91C_ID_US0 ( 6) // USART 0
-#define AT91C_ID_US1 ( 7) // USART 1
-#define AT91C_ID_US2 ( 8) // USART 2
-#define AT91C_ID_US3 ( 9) // USART 3
-#define AT91C_ID_MCI (10) // Multimedia Card Interface
-#define AT91C_ID_UDP (11) // USB Device Port
-#define AT91C_ID_TWI (12) // Two-Wire Interface
-#define AT91C_ID_SPI (13) // Serial Peripheral Interface
-#define AT91C_ID_SSC0 (14) // Serial Synchronous Controller 0
-#define AT91C_ID_SSC1 (15) // Serial Synchronous Controller 1
-#define AT91C_ID_SSC2 (16) // Serial Synchronous Controller 2
-#define AT91C_ID_TC0 (17) // Timer Counter 0
-#define AT91C_ID_TC1 (18) // Timer Counter 1
-#define AT91C_ID_TC2 (19) // Timer Counter 2
-#define AT91C_ID_TC3 (20) // Timer Counter 3
-#define AT91C_ID_TC4 (21) // Timer Counter 4
-#define AT91C_ID_TC5 (22) // Timer Counter 5
-#define AT91C_ID_UHP (23) // USB Host port
-#define AT91C_ID_EMAC (24) // Ethernet MAC
-#define AT91C_ID_IRQ0 (25) // Advanced Interrupt Controller (IRQ0)
-#define AT91C_ID_IRQ1 (26) // Advanced Interrupt Controller (IRQ1)
-#define AT91C_ID_IRQ2 (27) // Advanced Interrupt Controller (IRQ2)
-#define AT91C_ID_IRQ3 (28) // Advanced Interrupt Controller (IRQ3)
-#define AT91C_ID_IRQ4 (29) // Advanced Interrupt Controller (IRQ4)
-#define AT91C_ID_IRQ5 (30) // Advanced Interrupt Controller (IRQ5)
-#define AT91C_ID_IRQ6 (31) // Advanced Interrupt Controller (IRQ6)
-
-// *****************************************************************************
-// BASE ADDRESS DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_BASE_SYS (0xFFFFF000) // (SYS) Base Address
-#define AT91C_BASE_MC (0xFFFFFF00) // (MC) Base Address
-#define AT91C_BASE_RTC (0xFFFFFE00) // (RTC) Base Address
-#define AT91C_BASE_ST (0xFFFFFD00) // (ST) Base Address
-#define AT91C_BASE_PMC (0xFFFFFC00) // (PMC) Base Address
-#define AT91C_BASE_CKGR (0xFFFFFC20) // (CKGR) Base Address
-#define AT91C_BASE_PIOD (0xFFFFFA00) // (PIOD) Base Address
-#define AT91C_BASE_PIOC (0xFFFFF800) // (PIOC) Base Address
-#define AT91C_BASE_PIOB (0xFFFFF600) // (PIOB) Base Address
-#define AT91C_BASE_PIOA (0xFFFFF400) // (PIOA) Base Address
-#define AT91C_BASE_DBGU (0xFFFFF200) // (DBGU) Base Address
-#define AT91C_BASE_PDC_DBGU (0xFFFFF300) // (PDC_DBGU) Base Address
-#define AT91C_BASE_AIC (0xFFFFF000) // (AIC) Base Address
-#define AT91C_BASE_PDC_SPI (0xFFFE0100) // (PDC_SPI) Base Address
-#define AT91C_BASE_SPI (0xFFFE0000) // (SPI) Base Address
-#define AT91C_BASE_PDC_SSC2 (0xFFFD8100) // (PDC_SSC2) Base Address
-#define AT91C_BASE_SSC2 (0xFFFD8000) // (SSC2) Base Address
-#define AT91C_BASE_PDC_SSC1 (0xFFFD4100) // (PDC_SSC1) Base Address
-#define AT91C_BASE_SSC1 (0xFFFD4000) // (SSC1) Base Address
-#define AT91C_BASE_PDC_SSC0 (0xFFFD0100) // (PDC_SSC0) Base Address
-#define AT91C_BASE_SSC0 (0xFFFD0000) // (SSC0) Base Address
-#define AT91C_BASE_PDC_US3 (0xFFFCC100) // (PDC_US3) Base Address
-#define AT91C_BASE_US3 (0xFFFCC000) // (US3) Base Address
-#define AT91C_BASE_PDC_US2 (0xFFFC8100) // (PDC_US2) Base Address
-#define AT91C_BASE_US2 (0xFFFC8000) // (US2) Base Address
-#define AT91C_BASE_PDC_US1 (0xFFFC4100) // (PDC_US1) Base Address
-#define AT91C_BASE_US1 (0xFFFC4000) // (US1) Base Address
-#define AT91C_BASE_PDC_US0 (0xFFFC0100) // (PDC_US0) Base Address
-#define AT91C_BASE_US0 (0xFFFC0000) // (US0) Base Address
-#define AT91C_BASE_TWI (0xFFFB8000) // (TWI) Base Address
-#define AT91C_BASE_PDC_MCI (0xFFFB4100) // (PDC_MCI) Base Address
-#define AT91C_BASE_MCI (0xFFFB4000) // (MCI) Base Address
-#define AT91C_BASE_UDP (0xFFFB0000) // (UDP) Base Address
-#define AT91C_BASE_TC5 (0xFFFA4080) // (TC5) Base Address
-#define AT91C_BASE_TC4 (0xFFFA4040) // (TC4) Base Address
-#define AT91C_BASE_TC3 (0xFFFA4000) // (TC3) Base Address
-#define AT91C_BASE_TCB1 (0xFFFA4080) // (TCB1) Base Address
-#define AT91C_BASE_TC2 (0xFFFA0080) // (TC2) Base Address
-#define AT91C_BASE_TC1 (0xFFFA0040) // (TC1) Base Address
-#define AT91C_BASE_TC0 (0xFFFA0000) // (TC0) Base Address
-#define AT91C_BASE_TCB0 (0xFFFA0000) // (TCB0) Base Address
-#define AT91C_BASE_UHP (0x00300000) // (UHP) Base Address
-#define AT91C_BASE_EMAC (0xFFFBC000) // (EMAC) Base Address
-#define AT91C_BASE_EBI (0xFFFFFF60) // (EBI) Base Address
-#define AT91C_BASE_SMC2 (0xFFFFFF70) // (SMC2) Base Address
-#define AT91C_BASE_SDRC (0xFFFFFF90) // (SDRC) Base Address
-#define AT91C_BASE_BFC (0xFFFFFFC0) // (BFC) Base Address
-
-// *****************************************************************************
-// MEMORY MAPPING DEFINITIONS FOR AT91RM9200
-// *****************************************************************************
-#define AT91C_ISRAM (0x00200000) // Internal SRAM base address
-#define AT91C_ISRAM_SIZE (0x00004000) // Internal SRAM size in byte (16 Kbyte)
-#define AT91C_IROM (0x00100000) // Internal ROM base address
-#define AT91C_IROM_SIZE (0x00020000) // Internal ROM size in byte (128 Kbyte)
-
-
+++ /dev/null
-/*
- * (C) Copyright 2006
- * Atmel Nordic AB <www.atmel.com>
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- #ifndef __LED_H
-#define __LED_H
-
-#ifndef __ASSEMBLY__
-extern void LED_init (void);
-extern void LED_set(unsigned int led);
-extern void red_LED_on(void);
-extern void red_LED_off(void);
-extern void green_LED_on(void);
-extern void green_LED_off(void);
-extern void yellow_LED_on(void);
-extern void yellow_LED_off(void);
-extern void LED_blink(unsigned int led);
-#else
- .extern LED_init
- .extern LED_set
- .extern LED_blink
- .extern red_LED_on
- .extern red_LED_off
- .extern yellow_LED_on
- .extern yellow_LED_off
- .extern green_LED_on
- .extern green_LED_off
-#endif
-#endif
+++ /dev/null
-//*----------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*----------------------------------------------------------------------------
-//* File Name : lib_AT91RM9200.h
-//* Object : AT91RM9200 inlined functions
-//* Generated : AT91 SW Application Group 11/19/2003 (17:20:51)
-//*
-//* CVS Reference : /lib_pdc.h/1.2/Tue Jul 02 12:29:40 2002//
-//* CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003//
-//* CVS Reference : /lib_rtc_1245d.h/1.1/Fri Jan 31 12:19:12 2003//
-//* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
-//* CVS Reference : /lib_spi_AT91RMxxxx.h/1.2/Fri Jan 31 12:19:31 2003//
-//* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
-//* CVS Reference : /lib_pmc.h/1.3/Thu Nov 14 07:40:45 2002//
-//* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
-//* CVS Reference : /lib_twi.h/1.2/Fri Jan 31 12:19:38 2003//
-//* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:53 2002//
-//* CVS Reference : /lib_mci.h/1.2/Wed Nov 20 14:18:55 2002//
-//* CVS Reference : /lib_aic.h/1.3/Fri Jul 12 07:46:11 2002//
-//* CVS Reference : /lib_udp.h/1.3/Fri Jan 31 12:19:48 2003//
-//* CVS Reference : /lib_st.h/1.4/Fri Jan 31 12:20:13 2003//
-//*----------------------------------------------------------------------------
-
-#ifndef lib_AT91RM9200_H
-#define lib_AT91RM9200_H
-
-/* *****************************************************************************
- SOFTWARE API FOR PDC
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_SetNextRx
-//* \brief Set the next receive transfer descriptor
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_SetNextRx (
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
- char *address, // \arg address to the next bloc to be received
- unsigned int bytes) // \arg number of bytes to be received
-{
- pPDC->PDC_RNPR = (unsigned int) address;
- pPDC->PDC_RNCR = bytes;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_SetNextTx
-//* \brief Set the next transmit transfer descriptor
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_SetNextTx (
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
- char *address, // \arg address to the next bloc to be transmitted
- unsigned int bytes) // \arg number of bytes to be transmitted
-{
- pPDC->PDC_TNPR = (unsigned int) address;
- pPDC->PDC_TNCR = bytes;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_SetRx
-//* \brief Set the receive transfer descriptor
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_SetRx (
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
- char *address, // \arg address to the next bloc to be received
- unsigned int bytes) // \arg number of bytes to be received
-{
- pPDC->PDC_RPR = (unsigned int) address;
- pPDC->PDC_RCR = bytes;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_SetTx
-//* \brief Set the transmit transfer descriptor
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_SetTx (
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
- char *address, // \arg address to the next bloc to be transmitted
- unsigned int bytes) // \arg number of bytes to be transmitted
-{
- pPDC->PDC_TPR = (unsigned int) address;
- pPDC->PDC_TCR = bytes;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_EnableTx
-//* \brief Enable transmit
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_EnableTx (
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_EnableRx
-//* \brief Enable receive
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_EnableRx (
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_DisableTx
-//* \brief Disable transmit
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_DisableTx (
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_DisableRx
-//* \brief Disable receive
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_DisableRx (
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_IsTxEmpty
-//* \brief Test if the current transfer descriptor has been sent
-//*----------------------------------------------------------------------------
-static inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- return !(pPDC->PDC_TCR);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_IsNextTxEmpty
-//* \brief Test if the next transfer descriptor has been moved to the current td
-//*----------------------------------------------------------------------------
-static inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- return !(pPDC->PDC_TNCR);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_IsRxEmpty
-//* \brief Test if the current transfer descriptor has been filled
-//*----------------------------------------------------------------------------
-static inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- return !(pPDC->PDC_RCR);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_IsNextRxEmpty
-//* \brief Test if the next transfer descriptor has been moved to the current td
-//*----------------------------------------------------------------------------
-static inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
-{
- return !(pPDC->PDC_RNCR);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_Open
-//* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_Open (
- AT91PS_PDC pPDC) // \arg pointer to a PDC controller
-{
- //* Disable the RX and TX PDC transfer requests
- AT91F_PDC_DisableRx(pPDC);
- AT91F_PDC_DisableTx(pPDC);
-
- //* Reset all Counter register Next buffer first
- AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
-
- //* Enable the RX and TX PDC transfer requests
- AT91F_PDC_EnableRx(pPDC);
- AT91F_PDC_EnableTx(pPDC);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_Close
-//* \brief Close PDC: disable TX and RX reset transfer descriptors
-//*----------------------------------------------------------------------------
-static inline void AT91F_PDC_Close (
- AT91PS_PDC pPDC) // \arg pointer to a PDC controller
-{
- //* Disable the RX and TX PDC transfer requests
- AT91F_PDC_DisableRx(pPDC);
- AT91F_PDC_DisableTx(pPDC);
-
- //* Reset all Counter register Next buffer first
- AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
- AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_SendFrame
-//* \brief Close PDC: disable TX and RX reset transfer descriptors
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PDC_SendFrame(
- AT91PS_PDC pPDC,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- if (AT91F_PDC_IsTxEmpty(pPDC)) {
- //* Buffer and next buffer can be initialized
- AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
- AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
- return 2;
- }
- else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
- //* Only one buffer can be initialized
- AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
- return 1;
- }
- else {
- //* All buffer are in use...
- return 0;
- }
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PDC_ReceiveFrame
-//* \brief Close PDC: disable TX and RX reset transfer descriptors
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PDC_ReceiveFrame (
- AT91PS_PDC pPDC,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- if (AT91F_PDC_IsRxEmpty(pPDC)) {
- //* Buffer and next buffer can be initialized
- AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
- AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
- return 2;
- }
- else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
- //* Only one buffer can be initialized
- AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
- return 1;
- }
- else {
- //* All buffer are in use...
- return 0;
- }
-}
-/* *****************************************************************************
- SOFTWARE API FOR DBGU
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_InterruptEnable
-//* \brief Enable DBGU Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_DBGU_InterruptEnable(
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
- unsigned int flag) // \arg dbgu interrupt to be enabled
-{
- pDbgu->DBGU_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_InterruptDisable
-//* \brief Disable DBGU Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_DBGU_InterruptDisable(
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
- unsigned int flag) // \arg dbgu interrupt to be disabled
-{
- pDbgu->DBGU_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_GetInterruptMaskStatus
-//* \brief Return DBGU Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status
- AT91PS_DBGU pDbgu) // \arg pointer to a DBGU controller
-{
- return pDbgu->DBGU_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_IsInterruptMasked
-//* \brief Test if DBGU Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_DBGU_IsInterruptMasked(
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR RTC
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_RTC_InterruptEnable
-//* \brief Enable RTC Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_RTC_InterruptEnable(
- AT91PS_RTC pRtc, // \arg pointer to a RTC controller
- unsigned int flag) // \arg RTC interrupt to be enabled
-{
- pRtc->RTC_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_RTC_InterruptDisable
-//* \brief Disable RTC Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_RTC_InterruptDisable(
- AT91PS_RTC pRtc, // \arg pointer to a RTC controller
- unsigned int flag) // \arg RTC interrupt to be disabled
-{
- pRtc->RTC_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_RTC_GetInterruptMaskStatus
-//* \brief Return RTC Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_RTC_GetInterruptMaskStatus( // \return RTC Interrupt Mask Status
- AT91PS_RTC pRtc) // \arg pointer to a RTC controller
-{
- return pRtc->RTC_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_RTC_IsInterruptMasked
-//* \brief Test if RTC Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_RTC_IsInterruptMasked(
- AT91PS_RTC pRtc, // \arg pointer to a RTC controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_RTC_GetInterruptMaskStatus(pRtc) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR SSC
- ***************************************************************************** */
-//* Define the standard I2S mode configuration
-
-//* Configuration to set in the SSC Transmit Clock Mode Register
-//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
-//* nb_slot_by_frame : number of channels
-#define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
- AT91C_SSC_CKS_DIV +\
- AT91C_SSC_CKO_CONTINOUS +\
- AT91C_SSC_CKG_NONE +\
- AT91C_SSC_START_FALL_RF +\
- AT91C_SSC_STTOUT +\
- ((1<<16) & AT91C_SSC_STTDLY) +\
- ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
-
-
-//* Configuration to set in the SSC Transmit Frame Mode Register
-//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
-//* nb_slot_by_frame : number of channels
-#define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
- (nb_bit_by_slot-1) +\
- AT91C_SSC_MSBF +\
- (((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\
- (((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
- AT91C_SSC_FSOS_NEGATIVE)
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_SetBaudrate
-//* \brief Set the baudrate according to the CPU clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_SetBaudrate (
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
- unsigned int mainClock, // \arg peripheral clock
- unsigned int speed) // \arg SSC baudrate
-{
- unsigned int baud_value;
- //* Define the baud rate divisor register
- if (speed == 0)
- baud_value = 0;
- else
- {
- baud_value = (unsigned int) (mainClock * 10)/(2*speed);
- if ((baud_value % 10) >= 5)
- baud_value = (baud_value / 10) + 1;
- else
- baud_value /= 10;
- }
-
- pSSC->SSC_CMR = baud_value;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_Configure
-//* \brief Configure SSC
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_Configure (
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
- unsigned int syst_clock, // \arg System Clock Frequency
- unsigned int baud_rate, // \arg Expected Baud Rate Frequency
- unsigned int clock_rx, // \arg Receiver Clock Parameters
- unsigned int mode_rx, // \arg mode Register to be programmed
- unsigned int clock_tx, // \arg Transmitter Clock Parameters
- unsigned int mode_tx) // \arg mode Register to be programmed
-{
- //* Disable interrupts
- pSSC->SSC_IDR = (unsigned int) -1;
-
- //* Reset receiver and transmitter
- pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
-
- //* Define the Clock Mode Register
- AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
-
- //* Write the Receive Clock Mode Register
- pSSC->SSC_RCMR = clock_rx;
-
- //* Write the Transmit Clock Mode Register
- pSSC->SSC_TCMR = clock_tx;
-
- //* Write the Receive Frame Mode Register
- pSSC->SSC_RFMR = mode_rx;
-
- //* Write the Transmit Frame Mode Register
- pSSC->SSC_TFMR = mode_tx;
-
- //* Clear Transmit and Receive Counters
- AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
-
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_EnableRx
-//* \brief Enable receiving datas
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_EnableRx (
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
-{
- //* Enable receiver
- pSSC->SSC_CR = AT91C_SSC_RXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_DisableRx
-//* \brief Disable receiving datas
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_DisableRx (
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
-{
- //* Disable receiver
- pSSC->SSC_CR = AT91C_SSC_RXDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_EnableTx
-//* \brief Enable sending datas
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_EnableTx (
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
-{
- //* Enable transmitter
- pSSC->SSC_CR = AT91C_SSC_TXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_DisableTx
-//* \brief Disable sending datas
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_DisableTx (
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
-{
- //* Disable transmitter
- pSSC->SSC_CR = AT91C_SSC_TXDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_EnableIt
-//* \brief Enable SSC IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_EnableIt (
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
- unsigned int flag) // \arg IT to be enabled
-{
- //* Write to the IER register
- pSSC->SSC_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_DisableIt
-//* \brief Disable SSC IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC_DisableIt (
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
- unsigned int flag) // \arg IT to be disabled
-{
- //* Write to the IDR register
- pSSC->SSC_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_ReceiveFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SSC_ReceiveFrame (
- AT91PS_SSC pSSC,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_ReceiveFrame(
- (AT91PS_PDC) &(pSSC->SSC_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_SendFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SSC_SendFrame(
- AT91PS_SSC pSSC,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_SendFrame(
- (AT91PS_PDC) &(pSSC->SSC_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_GetInterruptMaskStatus
-//* \brief Return SSC Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status
- AT91PS_SSC pSsc) // \arg pointer to a SSC controller
-{
- return pSsc->SSC_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC_IsInterruptMasked
-//* \brief Test if SSC Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_SSC_IsInterruptMasked(
- AT91PS_SSC pSsc, // \arg pointer to a SSC controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR SPI
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_Open
-//* \brief Open a SPI Port
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SPI_Open (
- const unsigned int null) // \arg
-{
- /* NOT DEFINED AT THIS MOMENT */
- return ( 0 );
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_CfgCs
-//* \brief Configure SPI chip select register
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_CfgCs (
- int cs, // SPI cs number (0 to 3)
- int val) // chip select register
-{
- //* Write to the CSR register
- *(AT91C_SPI_CSR + cs) = val;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_EnableIt
-//* \brief Enable SPI interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_EnableIt (
- AT91PS_SPI pSPI, // pointer to a SPI controller
- unsigned int flag) // IT to be enabled
-{
- //* Write to the IER register
- pSPI->SPI_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_DisableIt
-//* \brief Disable SPI interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_DisableIt (
- AT91PS_SPI pSPI, // pointer to a SPI controller
- unsigned int flag) // IT to be disabled
-{
- //* Write to the IDR register
- pSPI->SPI_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_Reset
-//* \brief Reset the SPI controller
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_Reset (
- AT91PS_SPI pSPI // pointer to a SPI controller
- )
-{
- //* Write to the CR register
- pSPI->SPI_CR = AT91C_SPI_SWRST;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_Enable
-//* \brief Enable the SPI controller
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_Enable (
- AT91PS_SPI pSPI // pointer to a SPI controller
- )
-{
- //* Write to the CR register
- pSPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_Disable
-//* \brief Disable the SPI controller
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_Disable (
- AT91PS_SPI pSPI // pointer to a SPI controller
- )
-{
- //* Write to the CR register
- pSPI->SPI_CR = AT91C_SPI_SPIDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_CfgMode
-//* \brief Enable the SPI controller
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_CfgMode (
- AT91PS_SPI pSPI, // pointer to a SPI controller
- int mode) // mode register
-{
- //* Write to the MR register
- pSPI->SPI_MR = mode;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_CfgPCS
-//* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_CfgPCS (
- AT91PS_SPI pSPI, // pointer to a SPI controller
- char PCS_Device) // PCS of the Device
-{
- //* Write to the MR register
- pSPI->SPI_MR &= 0xFFF0FFFF;
- pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_ReceiveFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SPI_ReceiveFrame (
- AT91PS_SPI pSPI,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_ReceiveFrame(
- (AT91PS_PDC) &(pSPI->SPI_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_SendFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SPI_SendFrame(
- AT91PS_SPI pSPI,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_SendFrame(
- (AT91PS_PDC) &(pSPI->SPI_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_Close
-//* \brief Close SPI: disable IT disable transfert, close PDC
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_Close (
- AT91PS_SPI pSPI) // \arg pointer to a SPI controller
-{
- //* Reset all the Chip Select register
- pSPI->SPI_CSR[0] = 0 ;
- pSPI->SPI_CSR[1] = 0 ;
- pSPI->SPI_CSR[2] = 0 ;
- pSPI->SPI_CSR[3] = 0 ;
-
- //* Reset the SPI mode
- pSPI->SPI_MR = 0 ;
-
- //* Disable all interrupts
- pSPI->SPI_IDR = 0xFFFFFFFF ;
-
- //* Abort the Peripheral Data Transfers
- AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
-
- //* Disable receiver and transmitter and stop any activity immediately
- pSPI->SPI_CR = AT91C_SPI_SPIDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_PutChar
-//* \brief Send a character,does not check if ready to send
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_PutChar (
- AT91PS_SPI pSPI,
- unsigned int character,
- unsigned int cs_number )
-{
- unsigned int value_for_cs;
- value_for_cs = (~(1 << cs_number)) & 0xF; //Place a zero among a 4 ONEs number
- pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_GetChar
-//* \brief Receive a character,does not check if a character is available
-//*----------------------------------------------------------------------------
-static inline int AT91F_SPI_GetChar (
- const AT91PS_SPI pSPI)
-{
- return((pSPI->SPI_RDR) & 0xFFFF);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_GetInterruptMaskStatus
-//* \brief Return SPI Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
- AT91PS_SPI pSpi) // \arg pointer to a SPI controller
-{
- return pSpi->SPI_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_IsInterruptMasked
-//* \brief Test if SPI Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_SPI_IsInterruptMasked(
- AT91PS_SPI pSpi, // \arg pointer to a SPI controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR TC
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC_InterruptEnable
-//* \brief Enable TC Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC_InterruptEnable(
- AT91PS_TC pTc, // \arg pointer to a TC controller
- unsigned int flag) // \arg TC interrupt to be enabled
-{
- pTc->TC_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC_InterruptDisable
-//* \brief Disable TC Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC_InterruptDisable(
- AT91PS_TC pTc, // \arg pointer to a TC controller
- unsigned int flag) // \arg TC interrupt to be disabled
-{
- pTc->TC_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC_GetInterruptMaskStatus
-//* \brief Return TC Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status
- AT91PS_TC pTc) // \arg pointer to a TC controller
-{
- return pTc->TC_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC_IsInterruptMasked
-//* \brief Test if TC Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_TC_IsInterruptMasked(
- AT91PS_TC pTc, // \arg pointer to a TC controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR PMC
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_CKGR_GetMainClock
-//* \brief Return Main clock in Hz
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_CKGR_GetMainClock (
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
- unsigned int slowClock) // \arg slowClock in Hz
-{
- return ((pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF) * slowClock) >> 4;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_GetProcessorClock
-//* \brief Return processor clock in Hz (for AT91RM3400 and AT91RM9200)
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PMC_GetProcessorClock (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
- unsigned int slowClock) // \arg slowClock in Hz
-{
- unsigned int reg = pPMC->PMC_MCKR;
- unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
- unsigned int pllDivider, pllMultiplier;
-
- switch (reg & AT91C_PMC_CSS) {
- case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
- return slowClock / prescaler;
- case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
- return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
- case AT91C_PMC_CSS_PLLA_CLK: // PLLA clock is selected
- reg = pCKGR->CKGR_PLLAR;
- pllDivider = (reg & AT91C_CKGR_DIVA);
- pllMultiplier = ((reg & AT91C_CKGR_MULA) >> 16) + 1;
- if (reg & AT91C_CKGR_SRCA) // Source is Main clock
- return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
- else // Source is Slow clock
- return slowClock / pllDivider * pllMultiplier / prescaler;
- case AT91C_PMC_CSS_PLLB_CLK: // PLLB clock is selected
- reg = pCKGR->CKGR_PLLBR;
- pllDivider = (reg & AT91C_CKGR_DIVB);
- pllMultiplier = ((reg & AT91C_CKGR_MULB) >> 16) + 1;
- return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
- }
- return 0;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_GetMasterClock
-//* \brief Return master clock in Hz (just for AT91RM9200)
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PMC_GetMasterClock (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
- unsigned int slowClock) // \arg slowClock in Hz
-{
- return AT91F_PMC_GetProcessorClock(pPMC, pCKGR, slowClock) /
- (((pPMC->PMC_MCKR & AT91C_PMC_MDIV) >> 8)+1);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_EnablePeriphClock
-//* \brief Enable peripheral clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_EnablePeriphClock (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- unsigned int periphIds) // \arg IDs of peripherals to enable
-{
- pPMC->PMC_PCER = periphIds;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_DisablePeriphClock
-//* \brief Enable peripheral clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_DisablePeriphClock (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- unsigned int periphIds) // \arg IDs of peripherals to enable
-{
- pPMC->PMC_PCDR = periphIds;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_EnablePCK
-//* \brief Enable peripheral clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_EnablePCK (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- unsigned int pck, // \arg Peripheral clock identifier 0 .. 7
- unsigned int ccs, // \arg clock selection: AT91C_PMC_CSS_SLOW_CLK, AT91C_PMC_CSS_MAIN_CLK, AT91C_PMC_CSS_PLLA_CLK, AT91C_PMC_CSS_PLLB_CLK
- unsigned int pres) // \arg Programmable clock prescalar AT91C_PMC_PRES_CLK, AT91C_PMC_PRES_CLK_2, ..., AT91C_PMC_PRES_CLK_64
-{
- pPMC->PMC_PCKR[pck] = ccs | pres;
- pPMC->PMC_SCER = (1 << pck) << 8;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_DisablePCK
-//* \brief Enable peripheral clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_DisablePCK (
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
- unsigned int pck) // \arg Peripheral clock identifier 0 .. 7
-{
- pPMC->PMC_SCDR = (1 << pck) << 8;
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR PIO
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgPeriph
-//* \brief Enable pins to be drived by peripheral
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgPeriph(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int periphAEnable, // \arg PERIPH A to enable
- unsigned int periphBEnable) // \arg PERIPH B to enable
-
-{
- pPio->PIO_ASR = periphAEnable;
- pPio->PIO_BSR = periphBEnable;
- pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgOutput
-//* \brief Enable PIO in output mode
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgOutput(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int pioEnable) // \arg PIO to be enabled
-{
- pPio->PIO_PER = pioEnable; // Set in PIO mode
- pPio->PIO_OER = pioEnable; // Configure in Output
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgInput
-//* \brief Enable PIO in input mode
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgInput(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int inputEnable) // \arg PIO to be enabled
-{
- // Disable output
- pPio->PIO_ODR = inputEnable;
- pPio->PIO_PER = inputEnable;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgOpendrain
-//* \brief Configure PIO in open drain
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgOpendrain(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int multiDrvEnable) // \arg pio to be configured in open drain
-{
- // Configure the multi-drive option
- pPio->PIO_MDDR = ~multiDrvEnable;
- pPio->PIO_MDER = multiDrvEnable;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgPullup
-//* \brief Enable pullup on PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgPullup(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int pullupEnable) // \arg enable pullup on PIO
-{
- // Connect or not Pullup
- pPio->PIO_PPUDR = ~pullupEnable;
- pPio->PIO_PPUER = pullupEnable;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgDirectDrive
-//* \brief Enable direct drive on PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgDirectDrive(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int directDrive) // \arg PIO to be configured with direct drive
-
-{
- // Configure the Direct Drive
- pPio->PIO_OWDR = ~directDrive;
- pPio->PIO_OWER = directDrive;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_CfgInputFilter
-//* \brief Enable input filter on input PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_CfgInputFilter(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int inputFilter) // \arg PIO to be configured with input filter
-
-{
- // Configure the Direct Drive
- pPio->PIO_IFDR = ~inputFilter;
- pPio->PIO_IFER = inputFilter;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetInput
-//* \brief Return PIO input value
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetInput( // \return PIO input
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_PDSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsInputSet
-//* \brief Test if PIO is input flag is active
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsInputSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetInput(pPio) & flag);
-}
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_SetOutput
-//* \brief Set to 1 output PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_SetOutput(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg output to be set
-{
- pPio->PIO_SODR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_ClearOutput
-//* \brief Set to 0 output PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_ClearOutput(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg output to be cleared
-{
- pPio->PIO_CODR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_ForceOutput
-//* \brief Force output when Direct drive option is enabled
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_ForceOutput(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg output to be forced
-{
- pPio->PIO_ODSR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_Enable
-//* \brief Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_Enable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio to be enabled
-{
- pPio->PIO_PER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_Disable
-//* \brief Disable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_Disable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio to be disabled
-{
- pPio->PIO_PDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetStatus
-//* \brief Return PIO Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_PSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsSet
-//* \brief Test if PIO is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_OutputEnable
-//* \brief Output Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_OutputEnable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio output to be enabled
-{
- pPio->PIO_OER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_OutputDisable
-//* \brief Output Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_OutputDisable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio output to be disabled
-{
- pPio->PIO_ODR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetOutputStatus
-//* \brief Return PIO Output Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_OSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsOuputSet
-//* \brief Test if PIO Output is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsOutputSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetOutputStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_InputFilterEnable
-//* \brief Input Filter Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_InputFilterEnable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio input filter to be enabled
-{
- pPio->PIO_IFER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_InputFilterDisable
-//* \brief Input Filter Disable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_InputFilterDisable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio input filter to be disabled
-{
- pPio->PIO_IFDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetInputFilterStatus
-//* \brief Return PIO Input Filter Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_IFSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsInputFilterSet
-//* \brief Test if PIO Input filter is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsInputFilterSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetInputFilterStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetOutputDataStatus
-//* \brief Return PIO Output Data Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_ODSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_InterruptEnable
-//* \brief Enable PIO Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_InterruptEnable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio interrupt to be enabled
-{
- pPio->PIO_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_InterruptDisable
-//* \brief Disable PIO Interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_InterruptDisable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio interrupt to be disabled
-{
- pPio->PIO_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetInterruptMaskStatus
-//* \brief Return PIO Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetInterruptStatus
-//* \brief Return PIO Interrupt Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_ISR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsInterruptMasked
-//* \brief Test if PIO Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsInterruptMasked(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsInterruptSet
-//* \brief Test if PIO Interrupt is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsInterruptSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetInterruptStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_MultiDriverEnable
-//* \brief Multi Driver Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_MultiDriverEnable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio to be enabled
-{
- pPio->PIO_MDER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_MultiDriverDisable
-//* \brief Multi Driver Disable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_MultiDriverDisable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio to be disabled
-{
- pPio->PIO_MDDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetMultiDriverStatus
-//* \brief Return PIO Multi Driver Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_MDSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsMultiDriverSet
-//* \brief Test if PIO MultiDriver is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsMultiDriverSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_A_RegisterSelection
-//* \brief PIO A Register Selection
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_A_RegisterSelection(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio A register selection
-{
- pPio->PIO_ASR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_B_RegisterSelection
-//* \brief PIO B Register Selection
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_B_RegisterSelection(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio B register selection
-{
- pPio->PIO_BSR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_Get_AB_RegisterStatus
-//* \brief Return PIO Interrupt Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_ABSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsAB_RegisterSet
-//* \brief Test if PIO AB Register is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsAB_RegisterSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_OutputWriteEnable
-//* \brief Output Write Enable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_OutputWriteEnable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio output write to be enabled
-{
- pPio->PIO_OWER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_OutputWriteDisable
-//* \brief Output Write Disable PIO
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIO_OutputWriteDisable(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg pio output write to be disabled
-{
- pPio->PIO_OWDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetOutputWriteStatus
-//* \brief Return PIO Output Write Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_OWSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsOutputWriteSet
-//* \brief Test if PIO OutputWrite is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsOutputWriteSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_GetCfgPullup
-//* \brief Return PIO Configuration Pullup
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
-{
- return pPio->PIO_PPUSR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsOutputDataStatusSet
-//* \brief Test if PIO Output Data Status is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsOutputDataStatusSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_PIO_GetOutputDataStatus(pPio) & flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIO_IsCfgPullupStatusSet
-//* \brief Test if PIO Configuration Pullup Status is Set
-//*----------------------------------------------------------------------------
-static inline int AT91F_PIO_IsCfgPullupStatusSet(
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
- unsigned int flag) // \arg flag to be tested
-{
- return (~AT91F_PIO_GetCfgPullup(pPio) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR TWI
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_EnableIt
-//* \brief Enable TWI IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_TWI_EnableIt (
- AT91PS_TWI pTWI, // \arg pointer to a TWI controller
- unsigned int flag) // \arg IT to be enabled
-{
- //* Write to the IER register
- pTWI->TWI_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_DisableIt
-//* \brief Disable TWI IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_TWI_DisableIt (
- AT91PS_TWI pTWI, // \arg pointer to a TWI controller
- unsigned int flag) // \arg IT to be disabled
-{
- //* Write to the IDR register
- pTWI->TWI_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_Configure
-//* \brief Configure TWI in master mode
-//*----------------------------------------------------------------------------
-static inline void AT91F_TWI_Configure ( AT91PS_TWI pTWI ) // \arg pointer to a TWI controller
-{
- //* Disable interrupts
- pTWI->TWI_IDR = (unsigned int) -1;
-
- //* Reset peripheral
- pTWI->TWI_CR = AT91C_TWI_SWRST;
-
- //* Set Master mode
- pTWI->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS;
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_GetInterruptMaskStatus
-//* \brief Return TWI Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status
- AT91PS_TWI pTwi) // \arg pointer to a TWI controller
-{
- return pTwi->TWI_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_IsInterruptMasked
-//* \brief Test if TWI Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_TWI_IsInterruptMasked(
- AT91PS_TWI pTwi, // \arg pointer to a TWI controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_TWI_GetInterruptMaskStatus(pTwi) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR USART
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_Baudrate
-//* \brief Calculate the baudrate
-//* Standard Asynchronous Mode : 8 bits , 1 stop , no parity
-#define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
- AT91C_US_NBSTOP_1_BIT + \
- AT91C_US_PAR_NONE + \
- AT91C_US_CHRL_8_BITS + \
- AT91C_US_CLKS_CLOCK )
-
-//* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity
-#define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \
- AT91C_US_NBSTOP_1_BIT + \
- AT91C_US_PAR_NONE + \
- AT91C_US_CHRL_8_BITS + \
- AT91C_US_CLKS_EXT )
-
-//* Standard Synchronous Mode : 8 bits , 1 stop , no parity
-#define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \
- AT91C_US_USMODE_NORMAL + \
- AT91C_US_NBSTOP_1_BIT + \
- AT91C_US_PAR_NONE + \
- AT91C_US_CHRL_8_BITS + \
- AT91C_US_CLKS_CLOCK )
-
-//* SCK used Label
-#define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT)
-
-//* Standard ISO T=0 Mode : 8 bits , 1 stop , parity
-#define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \
- AT91C_US_CLKS_CLOCK +\
- AT91C_US_NBSTOP_1_BIT + \
- AT91C_US_PAR_EVEN + \
- AT91C_US_CHRL_8_BITS + \
- AT91C_US_CKLO +\
- AT91C_US_OVER)
-
-//* Standard IRDA mode
-#define AT91C_US_ASYNC_IRDA_MODE ( AT91C_US_USMODE_IRDA + \
- AT91C_US_NBSTOP_1_BIT + \
- AT91C_US_PAR_NONE + \
- AT91C_US_CHRL_8_BITS + \
- AT91C_US_CLKS_CLOCK )
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_Baudrate
-//* \brief Caluculate baud_value according to the main clock and the baud rate
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_Baudrate (
- const unsigned int main_clock, // \arg peripheral clock
- const unsigned int baud_rate) // \arg UART baudrate
-{
- unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
- if ((baud_value % 10) >= 5)
- baud_value = (baud_value / 10) + 1;
- else
- baud_value /= 10;
- return baud_value;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_SetBaudrate
-//* \brief Set the baudrate according to the CPU clock
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_SetBaudrate (
- AT91PS_USART pUSART, // \arg pointer to a USART controller
- unsigned int mainClock, // \arg peripheral clock
- unsigned int speed) // \arg UART baudrate
-{
- //* Define the baud rate divisor register
- pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_SetTimeguard
-//* \brief Set USART timeguard
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_SetTimeguard (
- AT91PS_USART pUSART, // \arg pointer to a USART controller
- unsigned int timeguard) // \arg timeguard value
-{
- //* Write the Timeguard Register
- pUSART->US_TTGR = timeguard ;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_EnableIt
-//* \brief Enable USART IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_EnableIt (
- AT91PS_USART pUSART, // \arg pointer to a USART controller
- unsigned int flag) // \arg IT to be enabled
-{
- //* Write to the IER register
- pUSART->US_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_DisableIt
-//* \brief Disable USART IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_DisableIt (
- AT91PS_USART pUSART, // \arg pointer to a USART controller
- unsigned int flag) // \arg IT to be disabled
-{
- //* Write to the IER register
- pUSART->US_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_Configure
-//* \brief Configure USART
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_Configure (
- AT91PS_USART pUSART, // \arg pointer to a USART controller
- unsigned int mainClock, // \arg peripheral clock
- unsigned int mode , // \arg mode Register to be programmed
- unsigned int baudRate , // \arg baudrate to be programmed
- unsigned int timeguard ) // \arg timeguard to be programmed
-{
- //* Disable interrupts
- pUSART->US_IDR = (unsigned int) -1;
-
- //* Reset receiver and transmitter
- pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
-
- //* Define the baud rate divisor register
- AT91F_US_SetBaudrate(pUSART, mainClock, baudRate);
-
- //* Write the Timeguard Register
- AT91F_US_SetTimeguard(pUSART, timeguard);
-
- //* Clear Transmit and Receive Counters
- AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
-
- //* Define the USART mode
- pUSART->US_MR = mode ;
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_EnableRx
-//* \brief Enable receiving characters
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_EnableRx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Enable receiver
- pUSART->US_CR = AT91C_US_RXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_EnableTx
-//* \brief Enable sending characters
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_EnableTx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Enable transmitter
- pUSART->US_CR = AT91C_US_TXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_ResetRx
-//* \brief Reset Receiver and re-enable it
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_ResetRx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Reset receiver
- pUSART->US_CR = AT91C_US_RSTRX;
- //* Re-Enable receiver
- pUSART->US_CR = AT91C_US_RXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_ResetTx
-//* \brief Reset Transmitter and re-enable it
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_ResetTx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Reset transmitter
- pUSART->US_CR = AT91C_US_RSTTX;
- //* Enable transmitter
- pUSART->US_CR = AT91C_US_TXEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_DisableRx
-//* \brief Disable Receiver
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_DisableRx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Disable receiver
- pUSART->US_CR = AT91C_US_RXDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_DisableTx
-//* \brief Disable Transmitter
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_DisableTx (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Disable transmitter
- pUSART->US_CR = AT91C_US_TXDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_Close
-//* \brief Close USART: disable IT disable receiver and transmitter, close PDC
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_Close (
- AT91PS_USART pUSART) // \arg pointer to a USART controller
-{
- //* Reset the baud rate divisor register
- pUSART->US_BRGR = 0 ;
-
- //* Reset the USART mode
- pUSART->US_MR = 0 ;
-
- //* Reset the Timeguard Register
- pUSART->US_TTGR = 0;
-
- //* Disable all interrupts
- pUSART->US_IDR = 0xFFFFFFFF ;
-
- //* Abort the Peripheral Data Transfers
- AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
-
- //* Disable receiver and transmitter and stop any activity immediately
- pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_TxReady
-//* \brief Return 1 if a character can be written in US_THR
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_TxReady (
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
-{
- return (pUSART->US_CSR & AT91C_US_TXRDY);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_RxReady
-//* \brief Return 1 if a character can be read in US_RHR
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_RxReady (
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
-{
- return (pUSART->US_CSR & AT91C_US_RXRDY);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_Error
-//* \brief Return the error flag
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_Error (
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
-{
- return (pUSART->US_CSR &
- (AT91C_US_OVRE | // Overrun error
- AT91C_US_FRAME | // Framing error
- AT91C_US_PARE)); // Parity error
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_PutChar
-//* \brief Send a character,does not check if ready to send
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_PutChar (
- AT91PS_USART pUSART,
- int character )
-{
- pUSART->US_THR = (character & 0x1FF);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_GetChar
-//* \brief Receive a character,does not check if a character is available
-//*----------------------------------------------------------------------------
-static inline int AT91F_US_GetChar (
- const AT91PS_USART pUSART)
-{
- return((pUSART->US_RHR) & 0x1FF);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_SendFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_SendFrame(
- AT91PS_USART pUSART,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_SendFrame(
- (AT91PS_PDC) &(pUSART->US_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_ReceiveFrame
-//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_US_ReceiveFrame (
- AT91PS_USART pUSART,
- char *pBuffer,
- unsigned int szBuffer,
- char *pNextBuffer,
- unsigned int szNextBuffer )
-{
- return AT91F_PDC_ReceiveFrame(
- (AT91PS_PDC) &(pUSART->US_RPR),
- pBuffer,
- szBuffer,
- pNextBuffer,
- szNextBuffer);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US_SetIrdaFilter
-//* \brief Set the value of IrDa filter tregister
-//*----------------------------------------------------------------------------
-static inline void AT91F_US_SetIrdaFilter (
- AT91PS_USART pUSART,
- unsigned char value
-)
-{
- pUSART->US_IF = value;
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR MCI
- ***************************************************************************** */
-//* Classic MCI Mode Register Configuration with PDC mode enabled and MCK = MCI Clock
-#define AT91C_MCI_MR_PDCMODE (AT91C_MCI_CLKDIV |\
- AT91C_MCI_PWSDIV |\
- (AT91C_MCI_PWSDIV<<1) |\
- AT91C_MCI_PDCMODE)
-
-//* Classic MCI Data Timeout Register Configuration with 1048576 MCK cycles between 2 data transfer
-#define AT91C_MCI_DTOR_1MEGA_CYCLES (AT91C_MCI_DTOCYC | AT91C_MCI_DTOMUL)
-
-//* Classic MCI SDCard Register Configuration with 1-bit data bus on slot A
-#define AT91C_MCI_MMC_SLOTA (AT91C_MCI_SCDSEL & 0x0)
-
-//* Classic MCI SDCard Register Configuration with 1-bit data bus on slot B
-#define AT91C_MCI_MMC_SLOTB (AT91C_MCI_SCDSEL)
-
-//* Classic MCI SDCard Register Configuration with 4-bit data bus on slot A
-#define AT91C_MCI_SDCARD_4BITS_SLOTA ( (AT91C_MCI_SCDSEL & 0x0) | AT91C_MCI_SCDBUS )
-
-//* Classic MCI SDCard Register Configuration with 4-bit data bus on slot B
-#define AT91C_MCI_SDCARD_4BITS_SLOTB (AT91C_MCI_SCDSEL | AT91C_MCI_SCDBUS)
-
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Configure
-//* \brief Configure the MCI
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_Configure (
- AT91PS_MCI pMCI, // \arg pointer to a MCI controller
- unsigned int DTOR_register, // \arg Data Timeout Register to be programmed
- unsigned int MR_register, // \arg Mode Register to be programmed
- unsigned int SDCR_register) // \arg SDCard Register to be programmed
-{
- //* Reset the MCI
- pMCI->MCI_CR = AT91C_MCI_MCIEN | AT91C_MCI_PWSEN;
-
- //* Disable all the interrupts
- pMCI->MCI_IDR = 0xFFFFFFFF;
-
- //* Set the Data Timeout Register
- pMCI->MCI_DTOR = DTOR_register;
-
- //* Set the Mode Register
- pMCI->MCI_MR = MR_register;
-
- //* Set the SDCard Register
- pMCI->MCI_SDCR = SDCR_register;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_EnableIt
-//* \brief Enable MCI IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_EnableIt (
- AT91PS_MCI pMCI, // \arg pointer to a MCI controller
- unsigned int flag) // \arg IT to be enabled
-{
- //* Write to the IER register
- pMCI->MCI_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_DisableIt
-//* \brief Disable MCI IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_DisableIt (
- AT91PS_MCI pMCI, // \arg pointer to a MCI controller
- unsigned int flag) // \arg IT to be disabled
-{
- //* Write to the IDR register
- pMCI->MCI_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Enable_Interface
-//* \brief Enable the MCI Interface
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_Enable_Interface (
- AT91PS_MCI pMCI) // \arg pointer to a MCI controller
-{
- //* Enable the MCI
- pMCI->MCI_CR = AT91C_MCI_MCIEN;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Disable_Interface
-//* \brief Disable the MCI Interface
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_Disable_Interface (
- AT91PS_MCI pMCI) // \arg pointer to a MCI controller
-{
- //* Disable the MCI
- pMCI->MCI_CR = AT91C_MCI_MCIDIS;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Cfg_ModeRegister
-//* \brief Configure the MCI Mode Register
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_Cfg_ModeRegister (
- AT91PS_MCI pMCI, // \arg pointer to a MCI controller
- unsigned int mode_register) // \arg value to set in the mode register
-{
- //* Configure the MCI MR
- pMCI->MCI_MR = mode_register;
-}
-/* *****************************************************************************
- SOFTWARE API FOR AIC
- ***************************************************************************** */
-#define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20]
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_ConfigureIt
-//* \brief Interrupt Handler Initialization
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_AIC_ConfigureIt (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id, // \arg interrupt number to initialize
- unsigned int priority, // \arg priority to give to the interrupt
- unsigned int src_type, // \arg activation and sense of activation
- void (*newHandler) (void) ) // \arg address of the interrupt handler
-{
- unsigned int oldHandler;
- unsigned int mask ;
-
- oldHandler = pAic->AIC_SVR[irq_id];
-
- mask = 0x1 << irq_id ;
- //* Disable the interrupt on the interrupt controller
- pAic->AIC_IDCR = mask ;
- //* Save the interrupt handler routine pointer and the interrupt priority
- pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
- //* Store the Source Mode Register
- pAic->AIC_SMR[irq_id] = src_type | priority ;
- //* Clear the interrupt on the interrupt controller
- pAic->AIC_ICCR = mask ;
-
- return oldHandler;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_EnableIt
-//* \brief Enable corresponding IT number
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_EnableIt (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id ) // \arg interrupt number to initialize
-{
- //* Enable the interrupt on the interrupt controller
- pAic->AIC_IECR = 0x1 << irq_id ;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_DisableIt
-//* \brief Disable corresponding IT number
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_DisableIt (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id ) // \arg interrupt number to initialize
-{
- unsigned int mask = 0x1 << irq_id;
- //* Disable the interrupt on the interrupt controller
- pAic->AIC_IDCR = mask ;
- //* Clear the interrupt on the Interrupt Controller ( if one is pending )
- pAic->AIC_ICCR = mask ;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_ClearIt
-//* \brief Clear corresponding IT number
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_ClearIt (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id) // \arg interrupt number to initialize
-{
- //* Clear the interrupt on the Interrupt Controller ( if one is pending )
- pAic->AIC_ICCR = (0x1 << irq_id);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_AcknowledgeIt
-//* \brief Acknowledge corresponding IT number
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_AcknowledgeIt (
- AT91PS_AIC pAic) // \arg pointer to the AIC registers
-{
- pAic->AIC_EOICR = pAic->AIC_EOICR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_SetExceptionVector
-//* \brief Configure vector handler
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_AIC_SetExceptionVector (
- unsigned int *pVector, // \arg pointer to the AIC registers
- void (*Handler) () ) // \arg Interrupt Handler
-{
- unsigned int oldVector = *pVector;
-
- if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
- *pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
- else
- *pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
-
- return oldVector;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_Trig
-//* \brief Trig an IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_Trig (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id) // \arg interrupt number
-{
- pAic->AIC_ISCR = (0x1 << irq_id) ;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_IsActive
-//* \brief Test if an IT is active
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_AIC_IsActive (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id) // \arg Interrupt Number
-{
- return (pAic->AIC_ISR & (0x1 << irq_id));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_IsPending
-//* \brief Test if an IT is pending
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_AIC_IsPending (
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- unsigned int irq_id) // \arg Interrupt Number
-{
- return (pAic->AIC_IPR & (0x1 << irq_id));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_Open
-//* \brief Set exception vectors and AIC registers to default values
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_Open(
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
- void (*IrqHandler) (), // \arg Default IRQ vector exception
- void (*FiqHandler) (), // \arg Default FIQ vector exception
- void (*DefaultHandler) (), // \arg Default Handler set in ISR
- void (*SpuriousHandler) (), // \arg Default Spurious Handler
- unsigned int protectMode) // \arg Debug Control Register
-{
- int i;
-
- // Disable all interrupts and set IVR to the default handler
- for (i = 0; i < 32; ++i) {
- AT91F_AIC_DisableIt(pAic, i);
- AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, DefaultHandler);
- }
-
- // Set the IRQ exception vector
- AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
- // Set the Fast Interrupt exception vector
- AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
-
- pAic->AIC_SPU = (unsigned int) SpuriousHandler;
- pAic->AIC_DCR = protectMode;
-}
-/* *****************************************************************************
- SOFTWARE API FOR UDP
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EnableIt
-//* \brief Enable UDP IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EnableIt (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg IT to be enabled
-{
- //* Write to the IER register
- pUDP->UDP_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_DisableIt
-//* \brief Disable UDP IT
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_DisableIt (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg IT to be disabled
-{
- //* Write to the IDR register
- pUDP->UDP_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_SetAddress
-//* \brief Set UDP functional address
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_SetAddress (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char address) // \arg new UDP address
-{
- pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EnableEp
-//* \brief Enable Endpoint
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EnableEp (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg endpoints to be enabled
-{
- pUDP->UDP_GLBSTATE |= flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_DisableEp
-//* \brief Enable Endpoint
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_DisableEp (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg endpoints to be enabled
-{
- pUDP->UDP_GLBSTATE &= ~(flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_SetState
-//* \brief Set UDP Device state
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_SetState (
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg new UDP address
-{
- pUDP->UDP_GLBSTATE &= ~(AT91C_UDP_FADDEN | AT91C_UDP_CONFG);
- pUDP->UDP_GLBSTATE |= flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_GetState
-//* \brief return UDP Device state
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_UDP_GetState ( // \return the UDP device state
- AT91PS_UDP pUDP) // \arg pointer to a UDP controller
-{
- return (pUDP->UDP_GLBSTATE & (AT91C_UDP_FADDEN | AT91C_UDP_CONFG));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_ResetEp
-//* \brief Reset UDP endpoint
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_ResetEp ( // \return the UDP device state
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned int flag) // \arg Endpoints to be reset
-{
- pUDP->UDP_RSTEP = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpStall
-//* \brief Endpoint will STALL requests
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EpStall(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint) // \arg endpoint number
-{
- pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpWrite
-//* \brief Write value in the DPR
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EpWrite(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint, // \arg endpoint number
- unsigned char value) // \arg value to be written in the DPR
-{
- pUDP->UDP_FDR[endpoint] = value;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpRead
-//* \brief Return value from the DPR
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_UDP_EpRead(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint) // \arg endpoint number
-{
- return pUDP->UDP_FDR[endpoint];
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpEndOfWr
-//* \brief Notify the UDP that values in DPR are ready to be sent
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EpEndOfWr(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint) // \arg endpoint number
-{
- pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpClear
-//* \brief Clear flag in the endpoint CSR register
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EpClear(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint, // \arg endpoint number
- unsigned int flag) // \arg flag to be cleared
-{
- pUDP->UDP_CSR[endpoint] &= ~(flag);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpSet
-//* \brief Set flag in the endpoint CSR register
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_EpSet(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint, // \arg endpoint number
- unsigned int flag) // \arg flag to be cleared
-{
- pUDP->UDP_CSR[endpoint] |= flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_EpStatus
-//* \brief Return the endpoint CSR register
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_UDP_EpStatus(
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
- unsigned char endpoint) // \arg endpoint number
-{
- return pUDP->UDP_CSR[endpoint];
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_GetInterruptMaskStatus
-//* \brief Return UDP Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_UDP_GetInterruptMaskStatus( // \return UDP Interrupt Mask Status
- AT91PS_UDP pUdp) // \arg pointer to a UDP controller
-{
- return pUdp->UDP_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_IsInterruptMasked
-//* \brief Test if UDP Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_UDP_IsInterruptMasked(
- AT91PS_UDP pUdp, // \arg pointer to a UDP controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_UDP_GetInterruptMaskStatus(pUdp) & flag);
-}
-
-/* *****************************************************************************
- SOFTWARE API FOR ST
- ***************************************************************************** */
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_SetPeriodInterval
-//* \brief Set Periodic Interval Interrupt (period in ms)
-//*----------------------------------------------------------------------------
-static inline void AT91F_ST_SetPeriodInterval(
- AT91PS_ST pSt,
- unsigned int period)
-{
- volatile int status;
- pSt->ST_IDR = AT91C_ST_PITS; /* Interrupt disable Register */
-
- status = pSt->ST_SR;
- pSt->ST_PIMR = period << 5; /* Period Interval Mode Register == timer interval = 1ms*/
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_EnableIt
-//* \brief Enable system timer interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_ST_EnableIt(
- AT91PS_ST pSt,
- unsigned int flag)
-{
- pSt->ST_IER = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_DisableIt
-//* \brief Disable system timer interrupt
-//*----------------------------------------------------------------------------
-static inline void AT91F_ST_DisableIt(
- AT91PS_ST pSt,
- unsigned int flag)
-{
- pSt->ST_IDR = flag;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_GetInterruptMaskStatus
-//* \brief Return ST Interrupt Mask Status
-//*----------------------------------------------------------------------------
-static inline unsigned int AT91F_ST_GetInterruptMaskStatus( // \return ST Interrupt Mask Status
- AT91PS_ST pSt) // \arg pointer to a ST controller
-{
- return pSt->ST_IMR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_IsInterruptMasked
-//* \brief Test if ST Interrupt is Masked
-//*----------------------------------------------------------------------------
-static inline int AT91F_ST_IsInterruptMasked(
- AT91PS_ST pSt, // \arg pointer to a ST controller
- unsigned int flag) // \arg flag to be tested
-{
- return (AT91F_ST_GetInterruptMaskStatus(pSt) & flag);
-}
-//*----------------------------------------------------------------------------
-//* \fn AT91F_EBI_CfgPIO
-//* \brief Configure PIO controllers to drive EBI signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_EBI_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOC, // PIO controller base address
- ((unsigned int) AT91C_PC8_A24 ) |
- ((unsigned int) AT91C_PC7_A23 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_CfgPMC
-//* \brief Enable Peripheral clock in PMC for DBGU
-//*----------------------------------------------------------------------------
-static inline void AT91F_DBGU_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SYS));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DBGU_CfgPIO
-//* \brief Configure PIO controllers to drive DBGU signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_DBGU_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA31_DTXD ) |
- ((unsigned int) AT91C_PA30_DRXD ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SYS_CfgPMC
-//* \brief Enable Peripheral clock in PMC for SYS
-//*----------------------------------------------------------------------------
-static inline void AT91F_SYS_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SYS));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UHP_CfgPMC
-//* \brief Enable Peripheral clock in PMC for UHP
-//*----------------------------------------------------------------------------
-static inline void AT91F_UHP_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_UHP));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SDRC_CfgPIO
-//* \brief Configure PIO controllers to drive SDRC signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_SDRC_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOC, // PIO controller base address
- ((unsigned int) AT91C_PC20_D20 ) |
- ((unsigned int) AT91C_PC21_D21 ) |
- ((unsigned int) AT91C_PC30_D30 ) |
- ((unsigned int) AT91C_PC22_D22 ) |
- ((unsigned int) AT91C_PC31_D31 ) |
- ((unsigned int) AT91C_PC23_D23 ) |
- ((unsigned int) AT91C_PC16_D16 ) |
- ((unsigned int) AT91C_PC24_D24 ) |
- ((unsigned int) AT91C_PC17_D17 ) |
- ((unsigned int) AT91C_PC25_D25 ) |
- ((unsigned int) AT91C_PC18_D18 ) |
- ((unsigned int) AT91C_PC26_D26 ) |
- ((unsigned int) AT91C_PC19_D19 ) |
- ((unsigned int) AT91C_PC27_D27 ) |
- ((unsigned int) AT91C_PC28_D28 ) |
- ((unsigned int) AT91C_PC29_D29 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_EMAC_CfgPMC
-//* \brief Enable Peripheral clock in PMC for EMAC
-//*----------------------------------------------------------------------------
-static inline void AT91F_EMAC_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_EMAC));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_EMAC_CfgPIO
-//* \brief Configure PIO controllers to drive EMAC signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_EMAC_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA14_ERXER ) |
- ((unsigned int) AT91C_PA12_ERX0 ) |
- ((unsigned int) AT91C_PA13_ERX1 ) |
- ((unsigned int) AT91C_PA8_ETXEN ) |
- ((unsigned int) AT91C_PA16_EMDIO ) |
- ((unsigned int) AT91C_PA9_ETX0 ) |
- ((unsigned int) AT91C_PA10_ETX1 ) |
- ((unsigned int) AT91C_PA11_ECRS_ECRSDV) |
- ((unsigned int) AT91C_PA15_EMDC ) |
- ((unsigned int) AT91C_PA7_ETXCK_EREFCK), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_RTC_CfgPMC
-//* \brief Enable Peripheral clock in PMC for RTC
-//*----------------------------------------------------------------------------
-static inline void AT91F_RTC_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SYS));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC2_CfgPMC
-//* \brief Enable Peripheral clock in PMC for SSC2
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC2_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SSC2));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC2_CfgPIO
-//* \brief Configure PIO controllers to drive SSC2 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC2_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOB, // PIO controller base address
- ((unsigned int) AT91C_PB12_TF2 ) |
- ((unsigned int) AT91C_PB17_RF2 ) |
- ((unsigned int) AT91C_PB13_TK2 ) |
- ((unsigned int) AT91C_PB16_RK2 ) |
- ((unsigned int) AT91C_PB14_TD2 ) |
- ((unsigned int) AT91C_PB15_RD2 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC1_CfgPMC
-//* \brief Enable Peripheral clock in PMC for SSC1
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC1_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SSC1));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC1_CfgPIO
-//* \brief Configure PIO controllers to drive SSC1 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC1_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOB, // PIO controller base address
- ((unsigned int) AT91C_PB11_RF1 ) |
- ((unsigned int) AT91C_PB10_RK1 ) |
- ((unsigned int) AT91C_PB8_TD1 ) |
- ((unsigned int) AT91C_PB9_RD1 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SSC0_CfgPMC
-//* \brief Enable Peripheral clock in PMC for SSC0
-//*----------------------------------------------------------------------------
-static inline void AT91F_SSC0_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SSC0));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_CfgPMC
-//* \brief Enable Peripheral clock in PMC for SPI
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SPI));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SPI_CfgPIO
-//* \brief Configure PIO controllers to drive SPI signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_SPI_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA3_NPCS0 ) |
- ((unsigned int) AT91C_PA4_NPCS1 ) |
- ((unsigned int) AT91C_PA1_MOSI ) |
- ((unsigned int) AT91C_PA5_NPCS2 ) |
- ((unsigned int) AT91C_PA6_NPCS3 ) |
- ((unsigned int) AT91C_PA0_MISO ) |
- ((unsigned int) AT91C_PA2_SPCK ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC5_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC5
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC5_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC5));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC4_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC4
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC4_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC4));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC3_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC3
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC3_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC3));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC2_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC2
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC2_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC2));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC1_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC1
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC1_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC1));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TC0_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TC0
-//*----------------------------------------------------------------------------
-static inline void AT91F_TC0_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TC0));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_SMC2_CfgPIO
-//* \brief Configure PIO controllers to drive SMC2 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_SMC2_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOC, // PIO controller base address
- ((unsigned int) AT91C_PC10_NCS4_CFCS) |
- ((unsigned int) AT91C_PC9_A25_CFRNW) |
- ((unsigned int) AT91C_PC12_NCS6_CFCE2) |
- ((unsigned int) AT91C_PC11_NCS5_CFCE1), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_CfgPMC
-//* \brief Enable Peripheral clock in PMC for PMC
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SYS));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PMC_CfgPIO
-//* \brief Configure PIO controllers to drive PMC signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_PMC_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- 0, // Peripheral A
- ((unsigned int) AT91C_PA24_PCK1 )); // Peripheral B
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOB, // PIO controller base address
- ((unsigned int) AT91C_PB27_PCK0 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIOD_CfgPMC
-//* \brief Enable Peripheral clock in PMC for PIOD
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIOD_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_PIOD));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIOC_CfgPMC
-//* \brief Enable Peripheral clock in PMC for PIOC
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIOC_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_PIOC));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIOB_CfgPMC
-//* \brief Enable Peripheral clock in PMC for PIOB
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIOB_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_PIOB));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_PIOA_CfgPMC
-//* \brief Enable Peripheral clock in PMC for PIOA
-//*----------------------------------------------------------------------------
-static inline void AT91F_PIOA_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_PIOA));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_CfgPMC
-//* \brief Enable Peripheral clock in PMC for TWI
-//*----------------------------------------------------------------------------
-static inline void AT91F_TWI_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_TWI));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_TWI_CfgPIO
-//* \brief Configure PIO controllers to drive TWI signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_TWI_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA25_TWD ) |
- ((unsigned int) AT91C_PA26_TWCK ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US3_CfgPMC
-//* \brief Enable Peripheral clock in PMC for US3
-//*----------------------------------------------------------------------------
-static inline void AT91F_US3_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_US3));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US2_CfgPMC
-//* \brief Enable Peripheral clock in PMC for US2
-//*----------------------------------------------------------------------------
-static inline void AT91F_US2_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_US2));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US2_CfgPIO
-//* \brief Configure PIO controllers to drive US2 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_US2_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA23_TXD2 ) |
- ((unsigned int) AT91C_PA22_RXD2 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US1_CfgPMC
-//* \brief Enable Peripheral clock in PMC for US1
-//*----------------------------------------------------------------------------
-static inline void AT91F_US1_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_US1));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US1_CfgPIO
-//* \brief Configure PIO controllers to drive US1 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_US1_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOB, // PIO controller base address
- ((unsigned int) AT91C_PB21_RXD1 ) |
- ((unsigned int) AT91C_PB26_RTS1 ) |
- ((unsigned int) AT91C_PB25_DSR1 ) |
- ((unsigned int) AT91C_PB24_CTS1 ) |
- ((unsigned int) AT91C_PB19_DTR1 ) |
- ((unsigned int) AT91C_PB23_DCD1 ) |
- ((unsigned int) AT91C_PB20_TXD1 ) |
- ((unsigned int) AT91C_PB18_RI1 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US0_CfgPMC
-//* \brief Enable Peripheral clock in PMC for US0
-//*----------------------------------------------------------------------------
-static inline void AT91F_US0_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_US0));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_US0_CfgPIO
-//* \brief Configure PIO controllers to drive US0 signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_US0_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA17_TXD0 ) |
- ((unsigned int) AT91C_PA21_RTS0 ) |
- ((unsigned int) AT91C_PA19_SCK0 ) |
- ((unsigned int) AT91C_PA20_CTS0 ), // Peripheral A
- 0); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_CfgPMC
-//* \brief Enable Peripheral clock in PMC for MCI
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_MCI));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_CfgPIO
-//* \brief Configure PIO controllers to drive MCI signals
-//*----------------------------------------------------------------------------
-static inline void AT91F_MCI_CfgPIO (void)
-{
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOA, // PIO controller base address
- ((unsigned int) AT91C_PA28_MCCDA ) |
- ((unsigned int) AT91C_PA29_MCDA0 ) |
- ((unsigned int) AT91C_PA27_MCCK ), // Peripheral A
- 0); // Peripheral B
- // Configure PIO controllers to periph mode
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOB, // PIO controller base address
- 0, // Peripheral A
- ((unsigned int) AT91C_PB5_MCDA3 ) |
- ((unsigned int) AT91C_PB3_MCDA1 ) |
- ((unsigned int) AT91C_PB4_MCDA2 )); // Peripheral B
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_AIC_CfgPMC
-//* \brief Enable Peripheral clock in PMC for AIC
-//*----------------------------------------------------------------------------
-static inline void AT91F_AIC_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_IRQ4) |
- ((unsigned int) 1 << AT91C_ID_FIQ) |
- ((unsigned int) 1 << AT91C_ID_IRQ5) |
- ((unsigned int) 1 << AT91C_ID_IRQ6) |
- ((unsigned int) 1 << AT91C_ID_IRQ0) |
- ((unsigned int) 1 << AT91C_ID_IRQ1) |
- ((unsigned int) 1 << AT91C_ID_IRQ2) |
- ((unsigned int) 1 << AT91C_ID_IRQ3));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UDP_CfgPMC
-//* \brief Enable Peripheral clock in PMC for UDP
-//*----------------------------------------------------------------------------
-static inline void AT91F_UDP_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_UDP));
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_ST_CfgPMC
-//* \brief Enable Peripheral clock in PMC for ST
-//*----------------------------------------------------------------------------
-static inline void AT91F_ST_CfgPMC (void)
-{
- AT91F_PMC_EnablePeriphClock(
- AT91C_BASE_PMC, // PIO controller base address
- ((unsigned int) 1 << AT91C_ID_SYS));
-}
-
-#endif // lib_AT91RM9200_H
+++ /dev/null
-//*----------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*----------------------------------------------------------------------------
-//* File Name : init.c
-//* Object : Low level initialisations written in C
-//* Creation : HIi 10/10/2003
-//*
-//*----------------------------------------------------------------------------
-#include "config.h"
-#include "AT91RM9200.h"
-#include "lib_AT91RM9200.h"
-#include "stdio.h"
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DataAbort
-//* \brief This function reports an Abort
-//*----------------------------------------------------------------------------
-static void AT91F_SpuriousHandler()
-{
- puts("ISI");
- while (1);
-}
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_DataAbort
-//* \brief This function reports an Abort
-//*----------------------------------------------------------------------------
-static void AT91F_DataAbort()
-{
- puts("IDA");
- while (1);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_FetchAbort
-//* \brief This function reports an Abort
-//*----------------------------------------------------------------------------
-static void AT91F_FetchAbort()
-{
- puts("IFA");
- while (1);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_UndefHandler
-//* \brief This function reports that no handler have been set for current IT
-//*----------------------------------------------------------------------------
-static void AT91F_UndefHandler()
-{
- puts("IUD");
- while (1);
-}
-
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : AT91F_InitSdram
-//* Object : Initialize the SDRAM
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-static void AT91F_InitSdram()
-{
- int *pRegister;
-
- //* Configure PIOC as peripheral (D16/D31)
-
- AT91F_PIO_CfgPeriph(
- AT91C_BASE_PIOC, // PIO controller base address
- 0xFFFF0030,
- 0
- );
-
- //*Init SDRAM
- pRegister = (int *)0xFFFFFF98;
- *pRegister = 0x2188c155;
- pRegister = (int *)0xFFFFFF90;
- *pRegister = 0x2;
- pRegister = (int *)0x20000000;
- *pRegister = 0;
- pRegister = (int *)0xFFFFFF90;
- *pRegister = 0x4;
- pRegister = (int *)0x20000000;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- *pRegister = 0;
- pRegister = (int *)0xFFFFFF90;
- *pRegister = 0x3;
- pRegister = (int *)0x20000080;
- *pRegister = 0;
-
- pRegister = (int *)0xFFFFFF94;
- *pRegister = 0x2e0;
- pRegister = (int *)0x20000000;
- *pRegister = 0;
-
- pRegister = (int *)0xFFFFFF90;
- *pRegister = 0x00;
- pRegister = (int *)0x20000000;
- *pRegister = 0;
-}
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_InitFlash
-//* \brief This function performs low level HW initialization
-//*----------------------------------------------------------------------------
-static void AT91F_InitMemories()
-{
- int *pEbi = (int *)0xFFFFFF60;
-
- //* Setup MEMC to support all connected memories (CS0 = FLASH; CS1=SDRAM)
- pEbi = (int *)0xFFFFFF60;
- *pEbi = 0x00000002;
-
- //* CS0 cs for flash
- pEbi = (int *)0xFFFFFF70;
- *pEbi = 0x00003284;
-
- AT91F_InitSdram();
-}
-
-
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_LowLevelInit
-//* \brief This function performs very low level HW initialization
-//*----------------------------------------------------------------------------
-void AT91F_LowLevelInit(void)
-{
- int i;
-
- // Init Interrupt Controller
- AT91F_AIC_Open(
- AT91C_BASE_AIC, // pointer to the AIC registers
- AT91C_AIC_BRANCH_OPCODE, // IRQ exception vector
- AT91F_UndefHandler, // FIQ exception vector
- AT91F_UndefHandler, // AIC default handler
- AT91F_SpuriousHandler, // AIC spurious handler
- 0); // Protect mode
-
- // Perform 8 End Of Interrupt Command to make sýre AIC will not Lock out nIRQ
- for(i=0; i<8; i++)
- AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
-
- AT91F_AIC_SetExceptionVector((unsigned int *)0x0C, AT91F_FetchAbort);
- AT91F_AIC_SetExceptionVector((unsigned int *)0x10, AT91F_DataAbort);
- AT91F_AIC_SetExceptionVector((unsigned int *)0x4, AT91F_UndefHandler);
-
- //Initialize SDRAM and Flash
- AT91F_InitMemories();
-
-}
-
+++ /dev/null
-.global Jump
-
-Jump: mov pc, r0
-
+++ /dev/null
-/*
- * (C) Copyright 2006
- * Atmel Nordic AB <www.atmel.com>
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <AT91RM9200.h>
-
-#define GREEN_LED AT91C_PIO_PB0
-#define YELLOW_LED AT91C_PIO_PB1
-#define RED_LED AT91C_PIO_PB2
-
-void LED_set(unsigned int led)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
- PIOB->PIO_SODR = (led ^ 0x7) & 0x7; // All 0's => Set PIO high => OFF
- PIOB->PIO_CODR = led & 0x7; // All 1's => Set PIO low => ON
-}
-
-void green_LED_on(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_CODR = GREEN_LED;
- PIOB->PIO_CODR = (1 << 0);
-}
-
-void yellow_LED_on(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_CODR = YELLOW_LED;
- PIOB->PIO_CODR = (1 << 1);
-}
-
-void red_LED_on(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_CODR = RED_LED;
- PIOB->PIO_CODR = (1 << 2);
-}
-
-void green_LED_off(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_SODR = GREEN_LED;
- PIOB->PIO_SODR = (1 << 0);
-}
-
-void yellow_LED_off(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_SODR = YELLOW_LED;
- PIOB->PIO_SODR = (1 << 1);
-}
-
-void red_LED_off(void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-// PIOB->PIO_SODR = RED_LED;
- PIOB->PIO_SODR = (1 << 2);
-}
-
-void LED_blink(unsigned int led)
-{
- volatile int i,j;
- for(i = 0; i < 5; i++) {
- LED_set((1 << led)&0x7);
- for(j= 0; j < 200000; j++);
- LED_set(0);
- for(j= 0; j < 200000; j++);
- }
-}
-
-
-void LED_init (void)
-{
- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
- AT91PS_PMC PMC = AT91C_BASE_PMC;
- PMC->PMC_PCER = (1 << AT91C_ID_PIOB); // Enable PIOB clock
- // Disable peripherals on LEDs
- PIOB->PIO_PER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
- // Enable pins as outputs
- PIOB->PIO_OER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
- // Turn all LEDs OFF
- PIOB->PIO_SODR = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-}
+++ /dev/null
-/*----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support - ROUSSET -
- *----------------------------------------------------------------------------
- * The software is delivered "AS IS" without warranty or condition of any
- * kind, either express, implied or statutory. This includes without
- * limitation any warranty or condition with respect to merchantability or
- * fitness for any particular purpose, or against the infringements of
- * intellectual property rights of others.
- *----------------------------------------------------------------------------
- * File Name : main.c
- * Object :
- * Creation : HIi 10/10/2003
- * Modif : HIi 15/06/2004 : add crc32 to verify the download
- * from dataflash
- * : HIi 21/09/2004 : Set first PLLA to 180Mhz and MCK to
- * 60Mhz to speed up dataflash boot (15Mhz)
- * : MLC 12/04/2005 : Modify SetPLL() to avoid errata
- * : USA 30/12/2005 : Change to page Size 1056
- * Change startaddress to C0008400
- * Change SPI Speed to ~4 Mhz
- * Add retry on CRC Error
- *----------------------------------------------------------------------------
- */
-#include "config.h"
-#include "stdio.h"
-#include "AT91RM9200.h"
-#include "lib_AT91RM9200.h"
-#include "com.h"
-#include "main.h"
-#include "dataflash.h"
-#include "AT91C_MCI_Device.h"
-
-#define DEBUGOUT
-#define XMODEM
-#define MEMDISP
-
-#ifdef PAGESZ_1056
-#define PAGESIZE 1056
-#else
-#define PAGESIZE 1024
-#endif
-
-#define AT91C_SDRAM_START 0x20000000
-#define AT91C_BOOT_ADDR 0x21F00000
-#define AT91C_BOOT_SIZE 128*PAGESIZE
-#ifdef PAGESZ_1056
-#define AT91C_BOOT_DATAFLASH_ADDR 0xC0008400
-#else
-#define AT91C_BOOT_DATAFLASH_ADDR 0xC0008000
-#endif
-#define AT91C_PLLA_VALUE 0x237A3E5A // crystal= 18.432MHz - fixes BRG error at 115kbps
-//#define AT91C_PLLA_VALUE 0x2026BE04 // crystal= 18.432MHz
-//#define AT91C_PLLA_VALUE 0x202CBE01 // crystal= 4MHz
-
-
-
-#define DISP_LINE_LEN 16
-
-// Reason for boot failure
-#define IMAGE_BAD_SIZE 0
-#define IMAGE_READ_FAILURE 1
-#define IMAGE_CRC_ERROR 2
-#define IMAGE_ERROR 3
-#define SUCCESS -1
-
-/* prototypes*/
-extern void AT91F_ST_ASM_HANDLER(void);
-extern void Jump(unsigned int addr);
-
-const char *menu_dataflash[] = {
-#ifdef XMODEM
- "1: P DFboot\n",
- "2: P U-Boot\n",
-#endif
- "3: P SDCard\n",
-#ifdef PAGESZ_1056
- "4: R UBOOT\n",
-#else
- "4: R UBOOT\n",
-#endif
-#ifdef XMODEM
- "5: P DF [addr]\n",
-#endif
- "6: RD DF [addr]\n",
- "7: E DF\n"
-};
-#ifdef XMODEM
-#define MAXMENU 7
-#else
-#define MAXMENU 4
-#endif
-
-char message[20];
-#ifdef XMODEM
-volatile char XmodemComplete = 0;
-#endif
-unsigned int StTick = 0;
-
-AT91S_RomBoot const *pAT91;
-#ifdef XMODEM
-AT91S_SBuffer sXmBuffer;
-AT91S_SvcXmodem svcXmodem;
-AT91S_Pipe xmodemPipe;
-#endif
-AT91S_CtlTempo ctlTempo;
-
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : GetTickCount()
-//* Object : Return the number of systimer tick
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-unsigned int GetTickCount(void)
-{
- return StTick;
-}
-
-#ifdef XMODEM
-//*--------------------------------------------------------------------------------------
-//* Function Name : AT91_XmodemComplete()
-//* Object : Perform the remap and jump to appli in RAM
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-static void AT91_XmodemComplete(AT91S_PipeStatus status, void *pVoid)
-{
- /* stop the Xmodem tempo */
- svcXmodem.tempo.Stop(&(svcXmodem.tempo));
- XmodemComplete = 1;
-}
-
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : AT91F_XmodemProtocol(AT91S_PipeStatus status, void *pVoid)
-//* Object : Xmodem dispatcher
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-static void XmodemProtocol(AT91S_PipeStatus status, void *pVoid)
-{
- AT91PS_SBuffer pSBuffer = (AT91PS_SBuffer) xmodemPipe.pBuffer->pChild;
- AT91PS_USART pUsart = svcXmodem.pUsart;
-
- if (pSBuffer->szRdBuffer == 0) {
- /* Start a tempo to wait the Xmodem protocol complete */
- svcXmodem.tempo.Start(&(svcXmodem.tempo), 10, 0, AT91_XmodemComplete, pUsart);
- }
-}
-#endif
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : irq1_c_handler()
-//* Object : C Interrupt handler for Interrutp source 1
-//* Input Parameters : none
-//* Output Parameters : none
-//*--------------------------------------------------------------------------------------
-void AT91F_ST_HANDLER(void)
-{
- volatile unsigned int csr = *AT91C_DBGU_CSR;
-#ifdef XMODEM
- unsigned int error;
-#endif
-
- if (AT91C_BASE_ST->ST_SR & 0x01) {
- StTick++;
- ctlTempo.CtlTempoTick(&ctlTempo);
- return;
- }
-
-#ifdef XMODEM
- error = AT91F_US_Error((AT91PS_USART)AT91C_BASE_DBGU);
- if (csr & error) {
- /* Stop previous Xmodem transmition*/
- *(AT91C_DBGU_CR) = AT91C_US_RSTSTA;
- AT91F_US_DisableIt((AT91PS_USART)AT91C_BASE_DBGU, AT91C_US_ENDRX);
- AT91F_US_EnableIt((AT91PS_USART)AT91C_BASE_DBGU, AT91C_US_RXRDY);
-
- }
-
- else if (csr & (AT91C_US_TXRDY | AT91C_US_ENDTX | AT91C_US_TXEMPTY |
- AT91C_US_RXRDY | AT91C_US_ENDRX | AT91C_US_TIMEOUT |
- AT91C_US_RXBUFF)) {
- if ( !(svcXmodem.eot) )
- svcXmodem.Handler(&svcXmodem, csr);
- }
-#endif
-}
-
-
-//*-----------------------------------------------------------------------------
-//* Function Name : AT91F_DisplayMenu()
-//* Object :
-//* Input Parameters :
-//* Return value :
-//*-----------------------------------------------------------------------------
-static int AT91F_DisplayMenu(void)
-{
- int i, mci_present = 0;
- printf("\nDF LOADER %s %s %s\n",AT91C_VERSION,__DATE__,__TIME__);
- AT91F_DataflashPrintInfo();
- mci_present = AT91F_MCI_Init();
- for(i = 0; i < MAXMENU; i++) {
- puts(menu_dataflash[i]);
- }
- return mci_present;
-}
-
-
-//*-----------------------------------------------------------------------------
-//* Function Name : AsciiToHex()
-//* Object : ascii to hexa conversion
-//* Input Parameters :
-//* Return value :
-//*-----------------------------------------------------------------------------
-static unsigned int AsciiToHex(char *s, unsigned int *val)
-{
- int n;
-
- *val=0;
-
- if(s[0] == '0' && ((s[1] == 'x') || (s[1] == 'X')))
- s+=2;
- n = 0;
- while((n < 8) && (s[n] !=0))
- {
- *val <<= 4;
- if ( (s[n] >= '0') && (s[n] <='9'))
- *val += (s[n] - '0');
- else
- if ((s[n] >= 'a') && (s[n] <='f'))
- *val += (s[n] - 0x57);
- else
- if ((s[n] >= 'A') && (s[n] <='F'))
- *val += (s[n] - 0x37);
- else
- return 0;
- n++;
- }
-
- return 1;
-}
-
-
-#ifdef MEMDISP
-//*-----------------------------------------------------------------------------
-//* Function Name : AT91F_MemoryDisplay()
-//* Object : Display the content of the dataflash
-//* Input Parameters :
-//* Return value :
-//*-----------------------------------------------------------------------------
-static int AT91F_MemoryDisplay(unsigned int addr, unsigned int length)
-{
- unsigned long i, nbytes, linebytes;
- char *cp;
-// unsigned int *uip;
-// unsigned short *usp;
- unsigned char *ucp;
- char linebuf[DISP_LINE_LEN];
-
-// nbytes = length * size;
- nbytes = length;
- do
- {
-// uip = (unsigned int *)linebuf;
-// usp = (unsigned short *)linebuf;
- ucp = (unsigned char *)linebuf;
-
- printf("%08x:", addr);
- linebytes = (nbytes > DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
- if((addr & 0xF0000000) == 0x20000000) {
- for(i = 0; i < linebytes; i ++) {
- linebuf[i] = *(char *)(addr+i);
- }
- } else {
- read_dataflash(addr, linebytes, linebuf);
- }
- for (i=0; i<linebytes; i++)
- {
-/* if (size == 4)
- printf(" %08x", *uip++);
- else if (size == 2)
- printf(" %04x", *usp++);
- else
-*/
- printf(" %02x", *ucp++);
-// addr += size;
- addr++;
- }
- printf(" ");
- cp = linebuf;
- for (i=0; i<linebytes; i++) {
- if ((*cp < 0x20) || (*cp > 0x7e))
- printf(".");
- else
- printf("%c", *cp);
- cp++;
- }
- printf("\n");
- nbytes -= linebytes;
- } while (nbytes > 0);
- return 0;
-}
-#endif
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : AT91F_SetPLL
-//* Object : Set the PLLA to 180Mhz and Master clock to 60 Mhz
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-static unsigned int AT91F_SetPLL(void)
-{
- AT91_REG tmp;
- AT91PS_PMC pPmc = AT91C_BASE_PMC;
- AT91PS_CKGR pCkgr = AT91C_BASE_CKGR;
-
- pPmc->PMC_IDR = 0xFFFFFFFF;
-
- /* -Setup the PLL A */
- pCkgr->CKGR_PLLAR = AT91C_PLLA_VALUE;
-
- while (!(*AT91C_PMC_SR & AT91C_PMC_LOCKA));
-
- /* - Switch Master Clock from PLLB to PLLA/3 */
- tmp = pPmc->PMC_MCKR;
- /* See Atmel Errata #27 and #28 */
- if (tmp & 0x0000001C) {
- tmp = (tmp & ~0x0000001C);
- pPmc->PMC_MCKR = tmp;
- while (!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY));
- }
- if (tmp != 0x00000202) {
- pPmc->PMC_MCKR = 0x00000202;
- if ((tmp & 0x00000003) != 0x00000002)
- while (!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY));
- }
-
- return 1;
-}
-
-
-//*--------------------------------------------------------------------------------------
-//* Function Name : AT91F_ResetRegisters
-//* Object : Restore the initial state to registers
-//* Input Parameters :
-//* Output Parameters :
-//*--------------------------------------------------------------------------------------
-static unsigned int AT91F_ResetRegisters(void)
-{
- volatile int i = 0;
-
- /* set the PIOs in input*/
- /* This disables the UART output, so dont execute for now*/
-
-#ifndef DEBUGOUT
- *AT91C_PIOA_ODR = 0xFFFFFFFF; /* Disables all the output pins */
- *AT91C_PIOA_PER = 0xFFFFFFFF; /* Enables the PIO to control all the pins */
-#endif
-
- AT91F_AIC_DisableIt (AT91C_BASE_AIC, AT91C_ID_SYS);
- /* close all peripheral clocks */
-
-#ifndef DEBUGOUT
- AT91C_BASE_PMC->PMC_PCDR = 0xFFFFFFFC;
-#endif
- /* Disable core interrupts and set supervisor mode */
- __asm__ ("msr CPSR_c, #0xDF"); //* ARM_MODE_SYS(0x1F) | I_BIT(0x80) | F_BIT(0x40)
- /* Clear all the interrupts */
- *AT91C_AIC_ICCR = 0xffffffff;
-
- /* read the AIC_IVR and AIC_FVR */
- i = *AT91C_AIC_IVR;
- i = *AT91C_AIC_FVR;
-
- /* write the end of interrupt control register */
- *AT91C_AIC_EOICR = 0;
-
- return 1;
-}
-
-
-static int AT91F_LoadBoot(void)
-{
-// volatile unsigned int crc1 = 0, crc2 = 0;
- volatile unsigned int SizeToDownload = 0x21400;
- volatile unsigned int AddressToDownload = AT91C_BOOT_ADDR;
-
-#if 0
- /* Read vector 6 to extract size to load */
- if (read_dataflash(AT91C_BOOT_DATAFLASH_ADDR, 32,
- (char *)AddressToDownload) != AT91C_DATAFLASH_OK)
- {
- printf("Bad Code Size\n");
- return IMAGE_BAD_SIZE;
- }
- /* calculate the size to download */
- SizeToDownload = *(int *)(AddressToDownload + AT91C_OFFSET_VECT6);
-#endif
-
-// printf("\nLoad UBOOT from dataflash[%x] to SDRAM[%x]\n",
-// AT91C_BOOT_DATAFLASH_ADDR, AT91C_BOOT_ADDR);
- if (read_dataflash(AT91C_BOOT_DATAFLASH_ADDR, SizeToDownload + 8,
- (char *)AddressToDownload) != AT91C_DATAFLASH_OK)
- {
- printf("F DF RD\n");
- return IMAGE_READ_FAILURE;
- }
-#if 0
- pAT91->CRC32((const unsigned char *)AT91C_BOOT_ADDR,
- (unsigned int)SizeToDownload , (unsigned int *)&crc2);
- crc1 = (int)(*(char *)(AddressToDownload + SizeToDownload)) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 1) << 8) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 2) << 16) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 3) << 24);
-
- /* Restore the value of Vector 6 */
- *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) =
- *(int *)(AddressToDownload + SizeToDownload + 4);
-
- if (crc1 != crc2) {
- printf("DF CRC bad %x != %x\n",crc1,crc2);
- return IMAGE_CRC_ERROR;
- }
-#endif
- return SUCCESS;
-}
-
-static int AT91F_StartBoot(void)
-{
- int sts;
- if((sts = AT91F_LoadBoot()) != SUCCESS) return sts;
-// printf("\n");
-// printf("PLLA[180MHz], MCK[60Mhz] ==> Start UBOOT\n");
- if (AT91F_ResetRegisters())
- {
- printf("Jump");
- Jump(AT91C_BOOT_ADDR);
-// LED_blink(0);
- }
- return IMAGE_ERROR;
-}
-
-#if 0
-static void AT91F_RepeatedStartBoot(void)
-{
- int i;
- for(i = 0; i < CRC_RETRIES; i++) {
- if(AT91F_StartBoot() != IMAGE_CRC_ERROR){
-// LED_blink(1);
- return;
- }
- }
- return;
-}
-#endif
-
-#define TRUE 1
-#define FALSE 0
-#define TRX_MAGIC 0x30524448 /* "HDR0" */
-#define TRX_VERSION 1
-
-struct trx_header {
- unsigned int magic;
- unsigned int len;
- unsigned int crc32;
- unsigned int flag_version;
- unsigned int offsets[3];
-};
-
-#define AT91C_MCI_TIMEOUT 1000000
-
-extern AT91S_MciDevice MCI_Device;
-extern void AT91F_MCIDeviceWaitReady(unsigned int);
-extern int AT91F_MCI_ReadBlockSwab(AT91PS_MciDevice, int, unsigned int *, int);
-
-int Program_From_MCI(void)
-{
- int i;
- unsigned int Max_Read_DataBlock_Length;
- int block = 0;
- int buffer = AT91C_DOWNLOAD_BASE_ADDRESS;
- int bufpos = AT91C_DOWNLOAD_BASE_ADDRESS;
- int NbPage = 0;
- struct trx_header *p;
-
- p = (struct trx_header *)bufpos;
-
- Max_Read_DataBlock_Length = MCI_Device.pMCI_DeviceFeatures->Max_Read_DataBlock_Length;
-
- AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
-
- AT91F_MCI_ReadBlockSwab(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length);
-
- if (p->magic != TRX_MAGIC) {
- printf("Inv IMG 0x%08x\n", p->magic);
- return FALSE;
- }
-
- printf("RDSD");
- AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15 | AT91C_PIO_PC8 | AT91C_PIO_PC14;
- for (i=0; i<(p->len/512); i++) {
- AT91F_MCI_ReadBlockSwab(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length);
- block++;
- bufpos += Max_Read_DataBlock_Length;
- }
-
- NbPage = 0;
- i = dataflash_info[0].Device.pages_number;
- while(i >>= 1)
- NbPage++;
- i = ((p->offsets[1] - p->offsets[0])/ 512) + 1 + (NbPage << 13) + (dataflash_info[0].Device.pages_size << 17);
- *(int *)(buffer + p->offsets[0] + AT91C_OFFSET_VECT6) = i;
-
- printf(" WDFB");
- AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15 | AT91C_PIO_PC14;
- AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC8;
- write_dataflash(0xc0000000, buffer + p->offsets[0], p->offsets[1] - p->offsets[0]);
- printf(" WUB");
- AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC7 | AT91C_PIO_PC15;
- AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC8 | AT91C_PIO_PC14;
- write_dataflash(0xc0008000, buffer + p->offsets[1], p->offsets[2] - p->offsets[1]);
- printf(" WKRFS");
- AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC8 | AT91C_PIO_PC15;
- AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC7 | AT91C_PIO_PC14;
- write_dataflash(0xc0042000, buffer + p->offsets[2], p->len - p->offsets[2]);
- AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC8 | AT91C_PIO_PC14;
- AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC7 | AT91C_PIO_PC15;
- return TRUE;
-}
-
-//*----------------------------------------------------------------------------
-//* Function Name : main
-//* Object : Main function
-//* Input Parameters : none
-//* Output Parameters : True
-//*----------------------------------------------------------------------------
-int main(void)
-{
-#ifdef XMODEM
- AT91PS_Buffer pXmBuffer;
- AT91PS_SvcComm pSvcXmodem;
-#endif
- AT91S_SvcTempo svcBootTempo; // Link to a AT91S_Tempo object
- unsigned int ix;
- volatile unsigned int AddressToDownload, SizeToDownload;
- unsigned int DeviceAddress = 0;
- char command = 0;
-#ifdef XMODEM
- volatile int i = 0;
- unsigned int crc1 = 0, crc2 = 0;
- volatile int device;
- int NbPage;
-#endif
- volatile int Nb_Device = 0;
- int mci_present = 0;
-
- pAT91 = AT91C_ROM_BOOT_ADDRESS;
-
- if (!AT91F_SetPLL())
- {
- printf("F SetPLL");
- while(1);
- }
-
- at91_init_uarts();
-
- /* Tempo Initialisation */
- pAT91->OpenCtlTempo(&ctlTempo, (void *) &(pAT91->SYSTIMER_DESC));
- ctlTempo.CtlTempoStart((void *) &(pAT91->SYSTIMER_DESC));
-
- // Attach the tempo to a tempo controler
- ctlTempo.CtlTempoCreate(&ctlTempo, &svcBootTempo);
-// LED_init();
-// LED_blink(2);
-
-#ifdef XMODEM
- /* Xmodem Initialisation */
- pXmBuffer = pAT91->OpenSBuffer(&sXmBuffer);
- pSvcXmodem = pAT91->OpenSvcXmodem(&svcXmodem,
- (AT91PS_USART)AT91C_BASE_DBGU, &ctlTempo);
- pAT91->OpenPipe(&xmodemPipe, pSvcXmodem, pXmBuffer);
-#endif
-
- /* System Timer initialization */
- AT91F_AIC_ConfigureIt(
- AT91C_BASE_AIC, // AIC base address
- AT91C_ID_SYS, // System peripheral ID
- AT91C_AIC_PRIOR_HIGHEST, // Max priority
- AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, // Level sensitive
- AT91F_ST_ASM_HANDLER
- );
- /* Enable ST interrupt */
- AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SYS);
-
-#ifndef PRODTEST
- /* Start tempo to start Boot in a delay of
- * AT91C_DELAY_TO_BOOT sec if no key pressed */
- svcBootTempo.Start(&svcBootTempo, AT91C_DELAY_TO_BOOT,
- 0, AT91F_StartBoot, NULL);
-#endif
-
- while(1)
- {
- while(command == 0)
- {
- AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS;
- SizeToDownload = AT91C_DOWNLOAD_MAX_SIZE;
- DeviceAddress = 0;
-
- /* try to detect Dataflash */
- if (!Nb_Device)
- Nb_Device = AT91F_DataflashInit();
-
- mci_present = AT91F_DisplayMenu();
-
-#ifdef PRODTEST
- if (mci_present) {
- if (Program_From_MCI())
- AT91F_StartBoot();
- }
-#endif
-
- message[0] = 0;
- AT91F_ReadLine ("Enter: ", message);
-
-#ifndef PRODTEST
- /* stop tempo ==> stop autoboot */
- svcBootTempo.Stop(&svcBootTempo);
-#endif
-
- command = message[0];
- for(ix = 1; (message[ix] == ' ') && (ix < 12); ix++); // Skip some whitespace
-
- if(!AsciiToHex(&message[ix], &DeviceAddress) )
- DeviceAddress = 0; // Illegal DeviceAddress
-
- switch(command)
- {
-#ifdef XMODEM
- case '1':
- case '2':
- case '5':
- if(command == '1') {
- DeviceAddress = 0xC0000000;
-// printf("Download DataflashBoot.bin to [0x%x]\n", DeviceAddress);
- } else if(command == '2') {
- DeviceAddress = AT91C_BOOT_DATAFLASH_ADDR;
-// printf("Download u-boot.bin to [0x%x]\n", DeviceAddress);
- } else {
-// printf("Download Dataflash to [0x%x]\n", DeviceAddress);
- }
- switch(DeviceAddress & 0xFF000000)
- {
- case CFG_DATAFLASH_LOGIC_ADDR_CS0:
- if (dataflash_info[0].id == 0){
- printf("No DF");
- AT91F_WaitKeyPressed();
- command = 0;
- }
-
- device = 0;
- break;
-
- case CFG_DATAFLASH_LOGIC_ADDR_CS3:
- if (dataflash_info[1].id == 0){
- printf("No DF");
- AT91F_WaitKeyPressed();
- command = 0;
- }
- device = 1;
- break;
-
- default:
- command = 0;
- break;
- }
- break;
-#endif
-
- case '3':
- if (mci_present)
- Program_From_MCI();
- command = 0;
- break;
-
- case '4':
- AT91F_StartBoot();
- command = 0;
- break;
-
-#ifdef MEMDISP
- case '6':
- do
- {
- AT91F_MemoryDisplay(DeviceAddress, 256);
- AT91F_ReadLine (NULL, message);
- DeviceAddress += 0x100;
- }
- while(message[0] == '\0');
- command = 0;
- break;
-#endif
-
- case '7':
- switch(DeviceAddress & 0xFF000000)
- {
- case CFG_DATAFLASH_LOGIC_ADDR_CS0:
- break;
- case CFG_DATAFLASH_LOGIC_ADDR_CS3:
- break;
- default:
- command = 0;
- break;
- }
-
- if (command != 0) {
- AT91F_ReadLine ("RDY ERA\nSure?",
- message);
- if(message[0] == 'Y' || message[0] == 'y') {
- erase_dataflash(DeviceAddress & 0xFF000000);
-// printf("Erase complete\n\n");
- }
-// else
-// printf("Erase aborted\n");
- }
- command = 0;
-
- break;
-
- default:
- command = 0;
- break;
- }
- }
-#ifdef XMODEM
- for(i = 0; i <= AT91C_DOWNLOAD_MAX_SIZE; i++)
- *(unsigned char *)(AddressToDownload + i) = 0;
-
- xmodemPipe.Read(&xmodemPipe, (char *)AddressToDownload,
- SizeToDownload, XmodemProtocol, 0);
- while(XmodemComplete !=1);
- SizeToDownload = (unsigned int)((svcXmodem.pData) -
- (unsigned int)AddressToDownload);
-
- /* Modification of vector 6 */
- if ((DeviceAddress == CFG_DATAFLASH_LOGIC_ADDR_CS0)) {
- // Vector 6 must be compliant to the BootRom description (ref Datasheet)
- NbPage = 0;
- i = dataflash_info[device].Device.pages_number;
- while(i >>= 1)
- NbPage++;
- i = (SizeToDownload / 512)+1 + (NbPage << 13) +
- (dataflash_info[device].Device.pages_size << 17); //+4 to add crc32
- SizeToDownload = 512 * (i &0xFF);
- }
- else
- {
- /* Save the contents of vector 6 ==> will be restored
- * at boot time (AT91F_StartBoot) */
- *(int *)(AddressToDownload + SizeToDownload + 4) =
- *(int *)(AddressToDownload + AT91C_OFFSET_VECT6);
- /* Modify Vector 6 to contain the size of the
- * file to copy (Dataflash -> SDRAM)*/
- i = SizeToDownload;
- }
-
- *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) = i;
-// printf("\nModification of Arm Vector 6 :%x\n", i);
-
-// printf("\nWrite %d bytes in DataFlash [0x%x]\n",SizeToDownload, DeviceAddress);
- crc1 = 0;
- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc1);
-
- /* Add the crc32 at the end of the code */
- *(char *)(AddressToDownload + SizeToDownload) = (char)(crc1 & 0x000000FF);
- *(char *)(AddressToDownload + SizeToDownload + 1) = (char)((crc1 & 0x0000FF00) >> 8);
- *(char *)(AddressToDownload + SizeToDownload + 2) = (char)((crc1 & 0x00FF0000) >> 16);
- *(char *)(AddressToDownload + SizeToDownload + 3) = (char)((crc1 & 0xFF000000) >> 24);
-
- /* write dataflash */
- write_dataflash (DeviceAddress, AddressToDownload, (SizeToDownload + 8));
-
- /* clear the buffer before read */
- for(i=0; i <= SizeToDownload; i++)
- *(unsigned char *)(AddressToDownload + i) = 0;
-
- /* Read dataflash to check the validity of the data */
- read_dataflash (DeviceAddress, (SizeToDownload + 4), (char *)(AddressToDownload));
-
- printf("VFY: ");
- crc2 = 0;
-
- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc2);
- crc1 = (int)(*(char *)(AddressToDownload + SizeToDownload)) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 1) << 8) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 2) << 16) +
- (int)(*(char *)(AddressToDownload + SizeToDownload + 3) << 24);
-
- if (crc1 != crc2)
- printf("ERR");
- else
- printf("OK");
-
- command = 0;
- XmodemComplete = 0;
- AT91F_WaitKeyPressed();
-#endif
- }
-}
-
+++ /dev/null
-//*----------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*----------------------------------------------------------------------------
-//* File Name : main.h
-//* Object :
-//*
-//* 1.0 27/03/03 HIi : Creation
-//* 1.01 03/05/04 HIi : AT9C_VERSION incremented to 1.01
-//* 1.02 15/06/04 HIi : AT9C_VERSION incremented to 1.02 ==>
-//* Add crc32 to verify dataflash download
-//* 1.03 18/04/05 MLC : AT91C_VERSION incremented to 1.03g
-//* Repeat boot on CRC Failure
-//* Change Page Size to 1056
-//* Reduce SPI speed to 4 Mbit
-//* Change U-Boot boot address to a 1056 byte page boundary
-//* 1.04 30/04/05 USA : AT91C_VERSION incremented to 1.04
-//* 1.05 07/08/06 USA : AT91C_VERSION incremented to 1.05
-//* Will only support loading Dataflashboot.bin and U-Boot
-//*----------------------------------------------------------------------------
-
-#ifndef main_h
-#define main_h
-
-#include "embedded_services.h"
-
-#define AT91C_DOWNLOAD_BASE_ADDRESS 0x20000000
-#define AT91C_DOWNLOAD_MAX_SIZE 0x00040000
-
-#define AT91C_OFFSET_VECT6 0x14 //* Offset for ARM vector 6
-
-#define AT91C_VERSION "VER 1.05"
-
-
-// Global variables and functions definition
-extern unsigned int GetTickCount(void);
-#endif
-
+++ /dev/null
-//*----------------------------------------------------------------------------
-//* ATMEL Microcontroller Software Support - ROUSSET -
-//*----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*----------------------------------------------------------------------------
-//* File Name : mci_device.c
-//* Object : TEST DataFlash Functions
-//* Creation : FB 26/11/2002
-//*
-//*----------------------------------------------------------------------------
-
-#include <AT91C_MCI_Device.h>
-#include "stdio.h"
-
-#define AT91C_MCI_TIMEOUT 1000000 /* For AT91F_MCIDeviceWaitReady */
-#define BUFFER_SIZE_MCI_DEVICE 512
-#define MASTER_CLOCK 60000000
-#define FALSE 0
-#define TRUE 1
-
-//* External Functions
-extern void AT91F_ASM_MCI_Handler(void);
-//* Global Variables
-AT91S_MciDeviceFeatures MCI_Device_Features;
-AT91S_MciDeviceDesc MCI_Device_Desc;
-AT91S_MciDevice MCI_Device;
-
-#undef ENABLE_WRITE
-#undef MMC
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SendCommand
-//* \brief Generic function to send a command to the MMC or SDCard
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SendCommand (
- AT91PS_MciDevice pMCI_Device,
- unsigned int Cmd,
- unsigned int Arg)
-{
- unsigned int error,status;
- //unsigned int tick=0;
-
- // Send the command
- AT91C_BASE_MCI->MCI_ARGR = Arg;
- AT91C_BASE_MCI->MCI_CMDR = Cmd;
-
- // wait for CMDRDY Status flag to read the response
- do
- {
- status = AT91C_BASE_MCI->MCI_SR;
- //tick++;
- }
- while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) );
-
- // Test error ==> if crc error and response R3 ==> don't check error
- error = (AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR;
- if(error != 0 )
- {
- // if the command is SEND_OP_COND the CRC error flag is always present (cf : R3 response)
- if ( (Cmd != AT91C_SDCARD_APP_OP_COND_CMD) && (Cmd != AT91C_MMC_SEND_OP_COND_CMD) )
- return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
- else
- {
- if (error != AT91C_MCI_RCRCE)
- return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
- }
- }
- return AT91C_CMD_SEND_OK;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SDCard_SendAppCommand
-//* \brief Specific function to send a specific command to the SDCard
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SDCard_SendAppCommand (
- AT91PS_MciDevice pMCI_Device,
- unsigned int Cmd_App,
- unsigned int Arg )
-{
- unsigned int status;
- //unsigned int tick=0;
-
- // Send the CMD55 for application specific command
- AT91C_BASE_MCI->MCI_ARGR = (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address << 16 );
- AT91C_BASE_MCI->MCI_CMDR = AT91C_APP_CMD;
-
- // wait for CMDRDY Status flag to read the response
- do
- {
- status = AT91C_BASE_MCI->MCI_SR;
- //tick++;
- }
- while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) );
-
- // if an error occurs
- if (((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR) != 0 )
- return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
-
- // check if it is a specific command and then send the command
- if ( (Cmd_App && AT91C_SDCARD_APP_ALL_CMD) == 0)
- return AT91C_CMD_SEND_ERROR;
-
- return( AT91F_MCI_SendCommand(pMCI_Device,Cmd_App,Arg) );
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_GetStatus
-//* \brief Addressed card sends its status register
-//*----------------------------------------------------------------------------
-int AT91F_MCI_GetStatus(AT91PS_MciDevice pMCI_Device,unsigned int relative_card_address)
-{
- if (AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_SEND_STATUS_CMD,
- relative_card_address <<16) == AT91C_CMD_SEND_OK)
- return (AT91C_BASE_MCI->MCI_RSPR[0]);
-
- return AT91C_CMD_SEND_ERROR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Device_Handler
-//* \brief MCI C interrupt handler
-//*----------------------------------------------------------------------------
-void AT91F_MCI_Device_Handler(
- AT91PS_MciDevice pMCI_Device,
- unsigned int status)
-{
- // If End of Tx Buffer Empty interrupt occurred
- if ( status & AT91C_MCI_TXBUFE )
- {
- AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_TXBUFE;
- AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTDIS;
-
- pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE;
- } // End of if AT91C_MCI_TXBUFF
-
- // If End of Rx Buffer Full interrupt occurred
- if ( status & AT91C_MCI_RXBUFF )
- {
- AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_RXBUFF;
- AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTDIS;
-
- pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE;
- } // End of if AT91C_MCI_RXBUFF
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Handler
-//* \brief MCI Handler
-//*----------------------------------------------------------------------------
-void AT91F_MCI_Handler(void)
-{
- int status;
-
- status = ( AT91C_BASE_MCI->MCI_SR & AT91C_BASE_MCI->MCI_IMR );
-
- AT91F_MCI_Device_Handler(&MCI_Device,status);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_ReadBlock
-//* \brief Read an ENTIRE block or PARTIAL block
-//*----------------------------------------------------------------------------
-int AT91F_MCI_ReadBlock(
- AT91PS_MciDevice pMCI_Device,
- int src,
- unsigned int *dataBuffer,
- int sizeToRead )
-{
- ////////////////////////////////////////////////////////////////////////////////////////////
- if(pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE)
- return AT91C_READ_ERROR;
-
- if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA)
- return AT91C_READ_ERROR;
-
- if ( (src + sizeToRead) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity )
- return AT91C_READ_ERROR;
-
- // If source does not fit a begin of a block
- if ( (src % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 )
- return AT91C_READ_ERROR;
-
- // Test if the MMC supports Partial Read Block
- // ALWAYS SUPPORTED IN SD Memory Card
- if( (sizeToRead < pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length)
- && (pMCI_Device->pMCI_DeviceFeatures->Read_Partial == 0x00) )
- return AT91C_READ_ERROR;
-
- if( sizeToRead > pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length)
- return AT91C_READ_ERROR;
- ////////////////////////////////////////////////////////////////////////////////////////////
-
- // Init Mode Register
- AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length << 16) | AT91C_MCI_PDCMODE);
-
- if (sizeToRead %4)
- sizeToRead = (sizeToRead /4)+1;
- else
- sizeToRead = sizeToRead/4;
-
- AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS);
- AT91C_BASE_PDC_MCI->PDC_RPR = (unsigned int)dataBuffer;
- AT91C_BASE_PDC_MCI->PDC_RCR = sizeToRead;
-
- // Send the Read single block command
- if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_READ_SINGLE_BLOCK_CMD, src) != AT91C_CMD_SEND_OK )
- return AT91C_READ_ERROR;
-
- pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_RX_SINGLE_BLOCK;
-
- // Enable AT91C_MCI_RXBUFF Interrupt
- AT91C_BASE_MCI->MCI_IER = AT91C_MCI_RXBUFF;
-
- // (PDC) Receiver Transfer Enable
- AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTEN;
-
- return AT91C_READ_OK;
-}
-
-
-#ifdef ENABLE_WRITE
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_WriteBlock
-//* \brief Write an ENTIRE block but not always PARTIAL block !!!
-//*----------------------------------------------------------------------------
-int AT91F_MCI_WriteBlock(
- AT91PS_MciDevice pMCI_Device,
- int dest,
- unsigned int *dataBuffer,
- int sizeToWrite )
-{
- ////////////////////////////////////////////////////////////////////////////////////////////
- if( pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE)
- return AT91C_WRITE_ERROR;
-
- if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA)
- return AT91C_WRITE_ERROR;
-
- if ( (dest + sizeToWrite) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity )
- return AT91C_WRITE_ERROR;
-
- // If source does not fit a begin of a block
- if ( (dest % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 )
- return AT91C_WRITE_ERROR;
-
- // Test if the MMC supports Partial Write Block
- if( (sizeToWrite < pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length)
- && (pMCI_Device->pMCI_DeviceFeatures->Write_Partial == 0x00) )
- return AT91C_WRITE_ERROR;
-
- if( sizeToWrite > pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length )
- return AT91C_WRITE_ERROR;
- ////////////////////////////////////////////////////////////////////////////////////////////
-
- // Init Mode Register
- AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length << 16) | AT91C_MCI_PDCMODE);
-
- if (sizeToWrite %4)
- sizeToWrite = (sizeToWrite /4)+1;
- else
- sizeToWrite = sizeToWrite/4;
-
- // Init PDC for write sequence
- AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS);
- AT91C_BASE_PDC_MCI->PDC_TPR = (unsigned int) dataBuffer;
- AT91C_BASE_PDC_MCI->PDC_TCR = sizeToWrite;
-
- // Send the write single block command
- if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_WRITE_BLOCK_CMD, dest) != AT91C_CMD_SEND_OK)
- return AT91C_WRITE_ERROR;
-
- pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_TX_SINGLE_BLOCK;
-
- // Enable AT91C_MCI_TXBUFE Interrupt
- AT91C_BASE_MCI->MCI_IER = AT91C_MCI_TXBUFE;
-
- // Enables TX for PDC transfert requests
- AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTEN;
-
- return AT91C_WRITE_OK;
-}
-#endif
-
-#ifdef MMC
-//*------------------------------------------------------------------------------------------------------------
-//* \fn AT91F_MCI_MMC_SelectCard
-//* \brief Toggles a card between the Stand_by and Transfer states or between Programming and Disconnect states
-//*------------------------------------------------------------------------------------------------------------
-int AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address)
-{
- int status;
-
- //* Check if the MMC card chosen is already the selected one
- status = AT91F_MCI_GetStatus(pMCI_Device,relative_card_address);
-
- if (status < 0)
- return AT91C_CARD_SELECTED_ERROR;
-
- if ((status & AT91C_SR_CARD_SELECTED) == AT91C_SR_CARD_SELECTED)
- return AT91C_CARD_SELECTED_OK;
-
- //* Search for the MMC Card to be selected, status = the Corresponding Device Number
- status = 0;
- while( (pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address != relative_card_address)
- && (status < AT91C_MAX_MCI_CARDS) )
- status++;
-
- if (status > AT91C_MAX_MCI_CARDS)
- return AT91C_CARD_SELECTED_ERROR;
-
- if (AT91F_MCI_SendCommand( pMCI_Device,
- AT91C_SEL_DESEL_CARD_CMD,
- pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address << 16) == AT91C_CMD_SEND_OK)
- return AT91C_CARD_SELECTED_OK;
- return AT91C_CARD_SELECTED_ERROR;
-}
-#endif
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_GetCSD
-//* \brief Asks to the specified card to send its CSD
-//*----------------------------------------------------------------------------
-int AT91F_MCI_GetCSD (AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address , unsigned int * response)
-{
-
- if(AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_SEND_CSD_CMD,
- (relative_card_address << 16)) != AT91C_CMD_SEND_OK)
- return AT91C_CMD_SEND_ERROR;
-
- response[0] = AT91C_BASE_MCI->MCI_RSPR[0];
- response[1] = AT91C_BASE_MCI->MCI_RSPR[1];
- response[2] = AT91C_BASE_MCI->MCI_RSPR[2];
- response[3] = AT91C_BASE_MCI->MCI_RSPR[3];
-
- return AT91C_CMD_SEND_OK;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SetBlocklength
-//* \brief Select a block length for all following block commands (R/W)
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SetBlocklength(AT91PS_MciDevice pMCI_Device,unsigned int length)
-{
- return( AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_BLOCKLEN_CMD, length) );
-}
-
-#ifdef MMC
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_MMC_GetAllOCR
-//* \brief Asks to all cards to send their operations conditions
-//*----------------------------------------------------------------------------
-int AT91F_MCI_MMC_GetAllOCR (AT91PS_MciDevice pMCI_Device)
-{
- unsigned int response =0x0;
-
- while(1)
- {
- response = AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_MMC_SEND_OP_COND_CMD,
- AT91C_MMC_HOST_VOLTAGE_RANGE);
- if (response != AT91C_CMD_SEND_OK)
- return AT91C_INIT_ERROR;
-
- response = AT91C_BASE_MCI->MCI_RSPR[0];
-
- if ( (response & AT91C_CARD_POWER_UP_BUSY) == AT91C_CARD_POWER_UP_BUSY)
- return(response);
- }
-}
-#endif
-
-#ifdef MMC
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_MMC_GetAllCID
-//* \brief Asks to the MMC on the chosen slot to send its CID
-//*----------------------------------------------------------------------------
-int AT91F_MCI_MMC_GetAllCID (AT91PS_MciDevice pMCI_Device, unsigned int *response)
-{
- int Nb_Cards_Found=-1;
-
- while(1)
- {
- if(AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_MMC_ALL_SEND_CID_CMD,
- AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK)
- return Nb_Cards_Found;
- else
- {
- Nb_Cards_Found = 0;
- //* Assignation of the relative address to the MMC CARD
- pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Relative_Card_Address = Nb_Cards_Found + AT91C_FIRST_RCA;
- //* Set the insert flag
- pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Card_Inserted = AT91C_MMC_CARD_INSERTED;
-
- if (AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_MMC_SET_RELATIVE_ADDR_CMD,
- (Nb_Cards_Found + AT91C_FIRST_RCA) << 16) != AT91C_CMD_SEND_OK)
- return AT91C_CMD_SEND_ERROR;
-
- //* If no error during assignation address ==> Increment Nb_cards_Found
- Nb_Cards_Found++ ;
- }
- }
-}
-#endif
-#ifdef MMC
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_MMC_Init
-//* \brief Return the MMC initialisation status
-//*----------------------------------------------------------------------------
-int AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device)
-{
- unsigned int tab_response[4];
- unsigned int mult,blocknr;
- unsigned int i,Nb_Cards_Found=0;
-
- //* Resets all MMC Cards in Idle state
- AT91F_MCI_SendCommand(pMCI_Device, AT91C_MMC_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT);
-
- if(AT91F_MCI_MMC_GetAllOCR(pMCI_Device) == AT91C_INIT_ERROR)
- return AT91C_INIT_ERROR;
-
- Nb_Cards_Found = AT91F_MCI_MMC_GetAllCID(pMCI_Device,tab_response);
- if (Nb_Cards_Found != AT91C_CMD_SEND_ERROR)
- {
- //* Set the Mode Register
- AT91C_BASE_MCI->MCI_MR = AT91C_MCI_MR_PDCMODE;
-
- for(i = 0; i < Nb_Cards_Found; i++)
- {
- if (AT91F_MCI_GetCSD(pMCI_Device,
- pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address,
- tab_response) != AT91C_CMD_SEND_OK)
- pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address = 0;
- else
- {
- pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M );
- pMCI_Device->pMCI_DeviceFeatures[i].Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M );
- pMCI_Device->pMCI_DeviceFeatures[i].Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v22_SECT_SIZE_S) & AT91C_CSD_v22_SECT_SIZE_M );
- pMCI_Device->pMCI_DeviceFeatures[i].Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M;
- pMCI_Device->pMCI_DeviceFeatures[i].Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M;
-
- // None in MMC specification version 2.2
- pMCI_Device->pMCI_DeviceFeatures[i].Erase_Block_Enable = 0;
-
- pMCI_Device->pMCI_DeviceFeatures[i].Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M;
- pMCI_Device->pMCI_DeviceFeatures[i].Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M;
-
- //// Compute Memory Capacity
- // compute MULT
- mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 );
- // compute MSB of C_SIZE
- blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2;
- // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR
- blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 );
-
- pMCI_Device->pMCI_DeviceFeatures[i].Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length * blocknr;
- //// End of Compute Memory Capacity
-
- } // end of else
- } // end of for
-
- return AT91C_INIT_OK;
- } // end of if
-
- return AT91C_INIT_ERROR;
-}
-#endif
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SDCard_GetOCR
-//* \brief Asks to all cards to send their operations conditions
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SDCard_GetOCR (AT91PS_MciDevice pMCI_Device)
-{
- unsigned int response =0x0;
-
- // The RCA to be used for CMD55 in Idle state shall be the card's default RCA=0x0000.
- pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = 0x0;
-
- while( (response & AT91C_CARD_POWER_UP_BUSY) != AT91C_CARD_POWER_UP_BUSY )
- {
- response = AT91F_MCI_SDCard_SendAppCommand(pMCI_Device,
- AT91C_SDCARD_APP_OP_COND_CMD,
- AT91C_MMC_HOST_VOLTAGE_RANGE);
- if (response != AT91C_CMD_SEND_OK)
- return AT91C_INIT_ERROR;
-
- response = AT91C_BASE_MCI->MCI_RSPR[0];
- }
-
- return(AT91C_BASE_MCI->MCI_RSPR[0]);
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SDCard_GetCID
-//* \brief Asks to the SDCard on the chosen slot to send its CID
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SDCard_GetCID (AT91PS_MciDevice pMCI_Device, unsigned int *response)
-{
- if(AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_ALL_SEND_CID_CMD,
- AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK)
- return AT91C_CMD_SEND_ERROR;
-
- response[0] = AT91C_BASE_MCI->MCI_RSPR[0];
- response[1] = AT91C_BASE_MCI->MCI_RSPR[1];
- response[2] = AT91C_BASE_MCI->MCI_RSPR[2];
- response[3] = AT91C_BASE_MCI->MCI_RSPR[3];
-
- return AT91C_CMD_SEND_OK;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SDCard_SetBusWidth
-//* \brief Set bus width for SDCard
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SDCard_SetBusWidth(AT91PS_MciDevice pMCI_Device)
-{
- volatile int ret_value;
- char bus_width;
-
- do
- {
- ret_value =AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address);
- }
- while((ret_value > 0) && ((ret_value & AT91C_SR_READY_FOR_DATA) == 0));
-
- // Select Card
- AT91F_MCI_SendCommand(pMCI_Device,
- AT91C_SEL_DESEL_CARD_CMD,
- (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address)<<16);
-
- // Set bus width for Sdcard
- if(pMCI_Device->pMCI_DeviceDesc->SDCard_bus_width == AT91C_MCI_SCDBUS)
- bus_width = AT91C_BUS_WIDTH_4BITS;
- else bus_width = AT91C_BUS_WIDTH_1BIT;
-
- if (AT91F_MCI_SDCard_SendAppCommand(pMCI_Device,AT91C_SDCARD_SET_BUS_WIDTH_CMD,bus_width) != AT91C_CMD_SEND_OK)
- return AT91C_CMD_SEND_ERROR;
-
- return AT91C_CMD_SEND_OK;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_SDCard_Init
-//* \brief Return the SDCard initialisation status
-//*----------------------------------------------------------------------------
-int AT91F_MCI_SDCard_Init (AT91PS_MciDevice pMCI_Device)
-{
- unsigned int tab_response[4];
- unsigned int mult,blocknr;
-
- AT91F_MCI_SendCommand(pMCI_Device, AT91C_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT);
-
- if(AT91F_MCI_SDCard_GetOCR(pMCI_Device) == AT91C_INIT_ERROR)
- return AT91C_INIT_ERROR;
-
- if (AT91F_MCI_SDCard_GetCID(pMCI_Device,tab_response) == AT91C_CMD_SEND_OK)
- {
- pMCI_Device->pMCI_DeviceFeatures->Card_Inserted = AT91C_SD_CARD_INSERTED;
-
- if (AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_RELATIVE_ADDR_CMD, 0) == AT91C_CMD_SEND_OK)
- {
- pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = (AT91C_BASE_MCI->MCI_RSPR[0] >> 16);
- if (AT91F_MCI_GetCSD(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address,tab_response) == AT91C_CMD_SEND_OK)
- {
- pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M );
- pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M );
- pMCI_Device->pMCI_DeviceFeatures->Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v21_SECT_SIZE_S) & AT91C_CSD_v21_SECT_SIZE_M );
- pMCI_Device->pMCI_DeviceFeatures->Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M;
- pMCI_Device->pMCI_DeviceFeatures->Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M;
- pMCI_Device->pMCI_DeviceFeatures->Erase_Block_Enable = (tab_response[3] >> AT91C_CSD_v21_ER_BLEN_EN_S) & AT91C_CSD_v21_ER_BLEN_EN_M;
- pMCI_Device->pMCI_DeviceFeatures->Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M;
- pMCI_Device->pMCI_DeviceFeatures->Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M;
-
- //// Compute Memory Capacity
- // compute MULT
- mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 );
- // compute MSB of C_SIZE
- blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2;
- // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR
- blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 );
-
- pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length * blocknr;
- //// End of Compute Memory Capacity
- printf("SD-Card: %d Bytes\n\r", pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity);
-
- if( AT91F_MCI_SDCard_SetBusWidth(pMCI_Device) == AT91C_CMD_SEND_OK )
- {
- if (AT91F_MCI_SetBlocklength(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) == AT91C_CMD_SEND_OK)
- return AT91C_INIT_OK;
- }
- }
- }
- }
- return AT91C_INIT_ERROR;
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_CfgDevice
-//* \brief This function is used to initialise MMC or SDCard Features
-//*----------------------------------------------------------------------------
-void AT91F_CfgDevice(void)
-{
- // Init Device Structure
-
- MCI_Device_Features.Relative_Card_Address = 0;
- MCI_Device_Features.Card_Inserted = AT91C_CARD_REMOVED;
- MCI_Device_Features.Max_Read_DataBlock_Length = 0;
- MCI_Device_Features.Max_Write_DataBlock_Length = 0;
- MCI_Device_Features.Read_Partial = 0;
- MCI_Device_Features.Write_Partial = 0;
- MCI_Device_Features.Erase_Block_Enable = 0;
- MCI_Device_Features.Sector_Size = 0;
- MCI_Device_Features.Memory_Capacity = 0;
-
- MCI_Device_Desc.state = AT91C_MCI_IDLE;
- MCI_Device_Desc.SDCard_bus_width = AT91C_MCI_SCDBUS;
-
- // Init AT91S_DataFlash Global Structure, by default AT45DB choosen !!!
- MCI_Device.pMCI_DeviceDesc = &MCI_Device_Desc;
- MCI_Device.pMCI_DeviceFeatures = &MCI_Device_Features;
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCI_Init
-//* \brief Initialsise Card
-//*----------------------------------------------------------------------------
-int AT91F_MCI_Init(void)
-{
-
-///////////////////////////////////////////////////////////////////////////////////////////
-// MCI Init : common to MMC and SDCard
-///////////////////////////////////////////////////////////////////////////////////////////
-
- // Set up PIO SDC_TYPE to switch on MMC/SDCard and not DataFlash Card
- AT91F_PIO_CfgOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7);
- AT91F_PIO_SetOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7);
-
- // Init MCI for MMC and SDCard interface
- AT91F_MCI_CfgPIO();
- AT91F_MCI_CfgPMC();
- AT91F_PDC_Open(AT91C_BASE_PDC_MCI);
-
- // Disable all the interrupts
- AT91C_BASE_MCI->MCI_IDR = 0xFFFFFFFF;
-
- // Init MCI Device Structures
- AT91F_CfgDevice();
-
- // Configure MCI interrupt
- AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,
- AT91C_ID_MCI,
- AT91C_AIC_PRIOR_HIGHEST,
- AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE,
- AT91F_ASM_MCI_Handler);
-
- // Enable MCI interrupt
- AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_MCI);
-
- // Enable Receiver
- AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU);
-
- AT91F_MCI_Configure(AT91C_BASE_MCI,
- AT91C_MCI_DTOR_1MEGA_CYCLES,
- AT91C_MCI_MR_PDCMODE, // 15MHz for MCK = 60MHz (CLKDIV = 1)
- AT91C_MCI_SDCARD_4BITS_SLOTA);
-
- if(AT91F_MCI_SDCard_Init(&MCI_Device) != AT91C_INIT_OK)
- return FALSE;
- else
- return TRUE;
-
-}
-
-//*----------------------------------------------------------------------------
-//* \fn AT91F_MCIDeviceWaitReady
-//* \brief Wait for MCI Device ready
-//*----------------------------------------------------------------------------
-void AT91F_MCIDeviceWaitReady(unsigned int timeout)
-{
- volatile int status;
-
- do
- {
- status = AT91C_BASE_MCI->MCI_SR;
- timeout--;
- }
- while( !(status & AT91C_MCI_NOTBUSY) && (timeout>0) );
-}
-
-unsigned int swab32(unsigned int data)
-{
- unsigned int res = 0;
-
- res = (data & 0x000000ff) << 24 |
- (data & 0x0000ff00) << 8 |
- (data & 0x00ff0000) >> 8 |
- (data & 0xff000000) >> 24;
-
- return res;
-}
-
-//*--------------------------------------------------------------------
-//* \fn AT91F_MCI_ReadBlockSwab
-//* \brief Read Block and swap byte order
-//*--------------------------------------------------------------------
-int AT91F_MCI_ReadBlockSwab(
- AT91PS_MciDevice pMCI_Device,
- int src,
- unsigned int *databuffer,
- int sizeToRead)
-{
- int i;
- unsigned char *buf = (unsigned char *)databuffer;
-
- //* Read Block 1
- for(i=0;i<BUFFER_SIZE_MCI_DEVICE;i++)
- *buf++ = 0x00;
- AT91F_MCI_ReadBlock(&MCI_Device,src,databuffer,sizeToRead);
-
- //* Wait end of Read
- AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
-
- {
- int index;
- unsigned int *uiBuffer = databuffer;
-
- for(index = 0; index < 512/4; index++)
- uiBuffer[index] = swab32(uiBuffer[index]);
- }
- return(1);
-}
-
+++ /dev/null
-#include <stdarg.h>
-#include <stdbool.h>
-
-#ifndef NULL
-#define NULL ((void *)0)
-#endif
-
-void at91_init_uarts(void);
-int puts(const char *str);
-int putc(int c);
-int putchar(int c);
-int getc();
-
-int strlen(const char *str);
-
-int hvfprintf(const char *fmt, va_list ap);
-
-int printf(const char *fmt, ...);
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=u-boot
-PKG_VERSION:=1.1.4
-PKG_RELEASE:=1
-
-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION)
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
-PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot
-PKG_MD5SUM:=
-PKG_CAT:=bzcat
-
-include $(INCLUDE_DIR)/package.mk
-
-UBOOT_CONFIG=$(strip $(subst ",, $(CONFIG_UBOOT_TARGET)))
-LAN_IP=$(strip $(CONFIG_UBOOT_IPADDR))
-LAN_SERVERIP=$(strip $(subst ",, $(CONFIG_UBOOT_SERVERIP)))
-
-define Build/Compile
- $(MAKE) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIG)_config
- export CROSS_COMPILE=$(TARGET_CROSS); \
- export LAN_IP=$(LAN_IP); \
- export LAN_SERVERIP=$(LAN_SERVERIP); \
- $(MAKE) -C $(PKG_BUILD_DIR)
- mkdir -p $(PKG_BUILD_DIR)/ubclient
- $(CP) ./ubclient/* $(PKG_BUILD_DIR)/ubclient
- export LAN_IP=$(LAN_IP); \
- export LAN_SERVERIP=$(LAN_SERVERIP); \
- $(MAKE) -C $(PKG_BUILD_DIR)/ubclient \
- $(TARGET_CONFIGURE_OPTS) \
- CFLAGS="$(TARGET_CFLAGS) -Dtarget_$(BOARD)=1"
-endef
-
-define Build/InstallDev
- dd if=$(PKG_BUILD_DIR)/u-boot.bin of=$(PKG_BUILD_DIR)/u-boot.block bs=232k count=1 conv=sync
-# $(INSTALL_DIR) $(STAGING_DIR)/ubclient/sbin
-# $(INSTALL_BIN) $(PKG_BUILD_DIR)/ubclient/ubpar $(STAGING_DIR)/ubclient/sbin/
- $(CP) $(PKG_BUILD_DIR)/ubclient/ubpar ../../base-files/default/sbin
-endef
-
-$(eval $(call Build/DefaultTargets))
+++ /dev/null
---- u-boot-1.1.4/cpu/arm920t/config.mk 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.klaus/cpu/arm920t/config.mk 2006-02-27 19:07:41.000000000 +0100
-@@ -30,5 +30,5 @@
- # Supply options according to compiler version
- #
- # =========================================================================
--PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu)
-+PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32)
- PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
---- u-boot-1.1.4/cpu/arm920t/start.S 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.klaus/cpu/arm920t/start.S 2006-02-22 16:45:24.000000000 +0100
-@@ -237,6 +237,7 @@
- */
-
-
-+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- cpu_init_crit:
- /*
- * flush v4 I/D caches
-@@ -265,6 +266,7 @@
- mov lr, ip
- mov pc, lr
-
-+#endif
-
- /*
- *************************************************************************
---- u-boot-1.1.4/examples/Makefile 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.klaus/examples/Makefile 2006-03-02 02:37:14.000000000 +0100
-@@ -30,7 +30,7 @@
- endif
-
- ifeq ($(ARCH),arm)
--LOAD_ADDR = 0xc100000
-+LOAD_ADDR = 0x21000000
- endif
-
- ifeq ($(ARCH),mips)
---- u-boot-1.1.4/include/config.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.klaus/include/config.h 2006-02-27 19:04:46.000000000 +0100
-@@ -0,0 +1,2 @@
-+/* Automatically generated - do not edit */
-+#include <configs/at91rm9200dk.h>
---- u-boot-1.1.4/include/config.mk 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.klaus/include/config.mk 2006-02-27 19:04:46.000000000 +0100
-@@ -0,0 +1,4 @@
-+ARCH = arm
-+CPU = arm920t
-+BOARD = at91rm9200dk
-+SOC = at91rm9200
---- u-boot-1.1.4/include/configs/at91rm9200dk.h 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.klaus/include/configs/at91rm9200dk.h 2006-02-26 22:44:17.000000000 +0100
-@@ -25,6 +25,11 @@
- #ifndef __CONFIG_H
- #define __CONFIG_H
-
-+// Added 2 defines to skip re-init lowlevel and relocate HCG HLH
-+//
-+#define CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+
- /* ARM asynchronous clock */
- #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
- #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-@@ -165,12 +170,12 @@
- #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
- #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
-
--#undef CFG_ENV_IS_IN_DATAFLASH
-+#define CFG_ENV_IS_IN_DATAFLASH
-
- #ifdef CFG_ENV_IS_IN_DATAFLASH
--#define CFG_ENV_OFFSET 0x20000
-+#define CFG_ENV_OFFSET 0x21000
- #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
--#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
-+#define CFG_ENV_SIZE 0x8400 /* 0x8000 */
- #else
- #define CFG_ENV_IS_IN_FLASH 1
- #ifdef CONFIG_SKIP_LOWLEVEL_INIT
---- u-boot-1.1.4/Makefile 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.klaus/Makefile 2006-03-02 02:49:23.000000000 +0100
-@@ -57,7 +57,7 @@
- CROSS_COMPILE = powerpc-linux-
- endif
- ifeq ($(ARCH),arm)
--CROSS_COMPILE = arm-linux-
-+CROSS_COMPILE = ../staging_dir/bin/arm-linux-
- endif
- ifeq ($(ARCH),i386)
- ifeq ($(HOSTARCH),i387)
+++ /dev/null
-diff -Naur u-boot-1.1.4.org/board/vlink/at45.c u-boot-1.1.4.tmp/board/vlink/at45.c
---- u-boot-1.1.4.org/board/vlink/at45.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/at45.c 2005-12-16 17:39:27.000000000 +0100
-@@ -0,0 +1,621 @@
-+/* Driver for ATMEL DataFlash support
-+ * Author : Hamid Ikdoumi (Atmel)
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+#include <config.h>
-+#include <common.h>
-+#include <asm/hardware.h>
-+
-+#ifdef CONFIG_HAS_DATAFLASH
-+#include <dataflash.h>
-+
-+#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
-+the Continuous Array Read function */
-+
-+/* AC Characteristics */
-+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS (0xC << 16)
-+#define DATAFLASH_TCHS (0x1 << 24)
-+
-+#define AT91C_TIMEOUT_WRDY 200000
-+#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-+#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-+
-+void AT91F_SpiInit(void) {
-+
-+/*-------------------------------------------------------------------*/
-+/* SPI DataFlash Init */
-+/*-------------------------------------------------------------------*/
-+ /* Configure PIOs */
-+ AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
-+ AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
-+ AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
-+ AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
-+ /* Enable CLock */
-+ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-+
-+ /* Reset the SPI */
-+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-+
-+ /* Configure SPI in Master Mode with No CS selected !!! */
-+ AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-+
-+ /* Configure CS0 and CS3 */
-+ *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
-+ DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-+
-+ *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
-+ DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-+
-+}
-+
-+void AT91F_SpiEnable(int cs) {
-+ switch(cs) {
-+ case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
-+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
-+ AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS);
-+ break;
-+ case 3: /* Configure SPI CS3 for Serial DataFlash Card */
-+ /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
-+ AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
-+ AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
-+ /* Clear Output */
-+ AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
-+ /* Configure PCS */
-+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
-+ AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
-+ break;
-+ }
-+
-+ /* SPI_Enable */
-+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-+}
-+
-+/*----------------------------------------------------------------------------*/
-+/* \fn AT91F_SpiWrite */
-+/* \brief Set the PDC registers for a transfert */
-+/*----------------------------------------------------------------------------*/
-+unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
-+{
-+ unsigned int timeout;
-+
-+ pDesc->state = BUSY;
-+
-+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-+
-+ /* Initialize the Transmit and Receive Pointer */
-+ AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
-+ AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-+
-+ /* Intialize the Transmit and Receive Counters */
-+ AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
-+ AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-+
-+ if ( pDesc->tx_data_size != 0 ) {
-+ /* Initialize the Next Transmit and Next Receive Pointer */
-+ AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
-+ AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-+
-+ /* Intialize the Next Transmit and Next Receive Counters */
-+ AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
-+ AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
-+ }
-+
-+ /* arm simple, non interrupt dependent timer */
-+ reset_timer_masked();
-+ timeout = 0;
-+
-+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
-+ while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
-+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-+ pDesc->state = IDLE;
-+
-+ if (timeout >= CFG_SPI_WRITE_TOUT){
-+ printf("Error Timeout\n\r");
-+ return DATAFLASH_ERROR;
-+ }
-+
-+ return DATAFLASH_OK;
-+}
-+
-+
-+/*----------------------------------------------------------------------*/
-+/* \fn AT91F_DataFlashSendCommand */
-+/* \brief Generic function to send a command to the dataflash */
-+/*----------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char OpCode,
-+ unsigned int CmdSize,
-+ unsigned int DataflashAddress)
-+{
-+ unsigned int adr;
-+
-+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
-+ return DATAFLASH_BUSY;
-+
-+ /* process the address to obtain page address and byte address */
-+ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));
-+
-+ /* fill the command buffer */
-+ pDataFlash->pDataFlashDesc->command[0] = OpCode;
-+ if (pDataFlash->pDevice->pages_number >= 16384) {
-+ pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
-+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
-+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
-+ pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
-+ } else {
-+ pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
-+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
-+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
-+ pDataFlash->pDataFlashDesc->command[4] = 0;
-+ }
-+ pDataFlash->pDataFlashDesc->command[5] = 0;
-+ pDataFlash->pDataFlashDesc->command[6] = 0;
-+ pDataFlash->pDataFlashDesc->command[7] = 0;
-+
-+ /* Initialize the SpiData structure for the spi write fuction */
-+ pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
-+ pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
-+ pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
-+ pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-+
-+ /* send the command and read the data */
-+ return AT91F_SpiWrite (pDataFlash->pDataFlashDesc);
-+}
-+
-+
-+/*----------------------------------------------------------------------*/
-+/* \fn AT91F_DataFlashGetStatus */
-+/* \brief Read the status register of the dataflash */
-+/*----------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-+{
-+ AT91S_DataFlashStatus status;
-+
-+ /* if a transfert is in progress ==> return 0 */
-+ if( (pDesc->state) != IDLE)
-+ return DATAFLASH_BUSY;
-+
-+ /* first send the read status command (D7H) */
-+ pDesc->command[0] = DB_STATUS;
-+ pDesc->command[1] = 0;
-+
-+ pDesc->DataFlash_state = GET_STATUS;
-+ pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
-+ pDesc->tx_cmd_pt = pDesc->command ;
-+ pDesc->rx_cmd_pt = pDesc->command ;
-+ pDesc->rx_cmd_size = 2 ;
-+ pDesc->tx_cmd_size = 2 ;
-+ status = AT91F_SpiWrite (pDesc);
-+
-+ pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
-+
-+ return status;
-+}
-+
-+
-+/*----------------------------------------------------------------------*/
-+/* \fn AT91F_DataFlashWaitReady */
-+/* \brief wait for dataflash ready (bit7 of the status register == 1) */
-+/*----------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
-+{
-+ pDataFlashDesc->DataFlash_state = IDLE;
-+
-+ do {
-+ AT91F_DataFlashGetStatus(pDataFlashDesc);
-+ timeout--;
-+ } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) );
-+
-+ if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
-+ return DATAFLASH_ERROR;
-+
-+ return DATAFLASH_OK;
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_DataFlashContinuousRead */
-+/* Object : Continuous stream Read */
-+/* Input Parameters : DataFlash Service */
-+/* : <src> = dataflash address */
-+/* : <*dataBuffer> = data buffer pointer */
-+/* : <sizeToRead> = data buffer size */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
-+ AT91PS_DataFlash pDataFlash,
-+ int src,
-+ unsigned char *dataBuffer,
-+ int sizeToRead )
-+{
-+ AT91S_DataFlashStatus status;
-+ /* Test the size to read in the device */
-+ if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
-+ return DATAFLASH_MEMORY_OVERFLOW;
-+
-+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
-+ pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
-+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
-+ pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-+
-+ status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
-+ /* Send the command to the dataflash */
-+ return(status);
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_DataFlashPagePgmBuf */
-+/* Object : Main memory page program through buffer 1 or buffer 2 */
-+/* Input Parameters : DataFlash Service */
-+/* : <*src> = Source buffer */
-+/* : <dest> = dataflash destination address */
-+/* : <SizeToWrite> = data buffer size */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char *src,
-+ unsigned int dest,
-+ unsigned int SizeToWrite)
-+{
-+ int cmdsize;
-+ pDataFlash->pDataFlashDesc->tx_data_pt = src ;
-+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-+ pDataFlash->pDataFlashDesc->rx_data_pt = src;
-+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-+
-+ cmdsize = 4;
-+ /* Send the command to the dataflash */
-+ if (pDataFlash->pDevice->pages_number >= 16384)
-+ cmdsize = 5;
-+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_MainMemoryToBufferTransfert */
-+/* Object : Read a page in the SRAM Buffer 1 or 2 */
-+/* Input Parameters : DataFlash Service */
-+/* : Page concerned */
-+/* : */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char BufferCommand,
-+ unsigned int page)
-+{
-+ int cmdsize;
-+ /* Test if the buffer command is legal */
-+ if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
-+ return DATAFLASH_BAD_COMMAND;
-+
-+ /* no data to transmit or receive */
-+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
-+ cmdsize = 4;
-+ if (pDataFlash->pDevice->pages_number >= 16384)
-+ cmdsize = 5;
-+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size));
-+}
-+
-+
-+/*----------------------------------------------------------------------------- */
-+/* Function Name : AT91F_DataFlashWriteBuffer */
-+/* Object : Write data to the internal sram buffer 1 or 2 */
-+/* Input Parameters : DataFlash Service */
-+/* : <BufferCommand> = command to write buffer1 or buffer2 */
-+/* : <*dataBuffer> = data buffer to write */
-+/* : <bufferAddress> = address in the internal buffer */
-+/* : <SizeToWrite> = data buffer size */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char BufferCommand,
-+ unsigned char *dataBuffer,
-+ unsigned int bufferAddress,
-+ int SizeToWrite )
-+{
-+ int cmdsize;
-+ /* Test if the buffer command is legal */
-+ if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
-+ return DATAFLASH_BAD_COMMAND;
-+
-+ /* buffer address must be lower than page size */
-+ if (bufferAddress > pDataFlash->pDevice->pages_size)
-+ return DATAFLASH_BAD_ADDRESS;
-+
-+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
-+ return DATAFLASH_BUSY;
-+
-+ /* Send first Write Command */
-+ pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
-+ pDataFlash->pDataFlashDesc->command[1] = 0;
-+ if (pDataFlash->pDevice->pages_number >= 16384) {
-+ pDataFlash->pDataFlashDesc->command[2] = 0;
-+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
-+ pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
-+ cmdsize = 5;
-+ } else {
-+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
-+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
-+ pDataFlash->pDataFlashDesc->command[4] = 0;
-+ cmdsize = 4;
-+ }
-+
-+ pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
-+ pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
-+ pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
-+ pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-+
-+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
-+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
-+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
-+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-+
-+ return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_PageErase */
-+/* Object : Erase a page */
-+/* Input Parameters : DataFlash Service */
-+/* : Page concerned */
-+/* : */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_PageErase(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned int page)
-+{
-+ int cmdsize;
-+ /* Test if the buffer command is legal */
-+ /* no data to transmit or receive */
-+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
-+
-+ cmdsize = 4;
-+ if (pDataFlash->pDevice->pages_number >= 16384)
-+ cmdsize = 5;
-+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size));
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_BlockErase */
-+/* Object : Erase a Block */
-+/* Input Parameters : DataFlash Service */
-+/* : Page concerned */
-+/* : */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_BlockErase(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned int block)
-+{
-+ int cmdsize;
-+ /* Test if the buffer command is legal */
-+ /* no data to transmit or receive */
-+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
-+ cmdsize = 4;
-+ if (pDataFlash->pDevice->pages_number >= 16384)
-+ cmdsize = 5;
-+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size));
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_WriteBufferToMain */
-+/* Object : Write buffer to the main memory */
-+/* Input Parameters : DataFlash Service */
-+/* : <BufferCommand> = command to send to buffer1 or buffer2 */
-+/* : <dest> = main memory address */
-+/* Return value : State of the dataflash */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_WriteBufferToMain (
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char BufferCommand,
-+ unsigned int dest )
-+{
-+ int cmdsize;
-+ /* Test if the buffer command is correct */
-+ if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
-+ (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
-+ (BufferCommand != DB_BUF2_PAGE_PGM) &&
-+ (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
-+ return DATAFLASH_BAD_COMMAND;
-+
-+ /* no data to transmit or receive */
-+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
-+
-+ cmdsize = 4;
-+ if (pDataFlash->pDevice->pages_number >= 16384)
-+ cmdsize = 5;
-+ /* Send the command to the dataflash */
-+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_PartialPageWrite */
-+/* Object : Erase partielly a page */
-+/* Input Parameters : <page> = page number */
-+/* : <AdrInpage> = adr to begin the fading */
-+/* : <length> = Number of bytes to erase */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_PartialPageWrite (
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char *src,
-+ unsigned int dest,
-+ unsigned int size)
-+{
-+ unsigned int page;
-+ unsigned int AdrInPage;
-+
-+ page = dest / (pDataFlash->pDevice->pages_size);
-+ AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-+
-+ /* Read the contents of the page in the Sram Buffer */
-+ AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+ /*Update the SRAM buffer */
-+ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
-+
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+
-+ /* Erase page if a 128 Mbits device */
-+ if (pDataFlash->pDevice->pages_number >= 16384) {
-+ AT91F_PageErase(pDataFlash, page);
-+ /* Rewrite the modified Sram Buffer in the main memory */
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+ }
-+
-+ /* Rewrite the modified Sram Buffer in the main memory */
-+ return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size)));
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_DataFlashWrite */
-+/* Object : */
-+/* Input Parameters : <*src> = Source buffer */
-+/* : <dest> = dataflash adress */
-+/* : <size> = data buffer size */
-+/*------------------------------------------------------------------------------*/
-+AT91S_DataFlashStatus AT91F_DataFlashWrite(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned char *src,
-+ int dest,
-+ int size )
-+{
-+ unsigned int length;
-+ unsigned int page;
-+ unsigned int status;
-+
-+ AT91F_SpiEnable(pDataFlash->pDevice->cs);
-+
-+ if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
-+ return DATAFLASH_MEMORY_OVERFLOW;
-+
-+ /* If destination does not fit a page start address */
-+ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
-+ length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-+
-+ if (size < length)
-+ length = size;
-+
-+ if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
-+ return DATAFLASH_ERROR;
-+
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+
-+ /* Update size, source and destination pointers */
-+ size -= length;
-+ dest += length;
-+ src += length;
-+ }
-+
-+ while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
-+ /* program dataflash page */
-+ page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-+
-+ status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size);
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+
-+ status = AT91F_PageErase(pDataFlash, page);
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+ if (!status)
-+ return DATAFLASH_ERROR;
-+
-+ status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
-+ if(!status)
-+ return DATAFLASH_ERROR;
-+
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+
-+ /* Update size, source and destination pointers */
-+ size -= pDataFlash->pDevice->pages_size ;
-+ dest += pDataFlash->pDevice->pages_size ;
-+ src += pDataFlash->pDevice->pages_size ;
-+ }
-+
-+ /* If still some bytes to read */
-+ if ( size > 0 ) {
-+ /* program dataflash page */
-+ if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
-+ return DATAFLASH_ERROR;
-+
-+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-+ }
-+ return DATAFLASH_OK;
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_DataFlashRead */
-+/* Object : Read a block in dataflash */
-+/* Input Parameters : */
-+/* Return value : */
-+/*------------------------------------------------------------------------------*/
-+int AT91F_DataFlashRead(
-+ AT91PS_DataFlash pDataFlash,
-+ unsigned long addr,
-+ unsigned long size,
-+ char *buffer)
-+{
-+ unsigned long SizeToRead;
-+
-+ AT91F_SpiEnable(pDataFlash->pDevice->cs);
-+
-+ if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
-+ return -1;
-+
-+ while (size) {
-+ SizeToRead = (size < 0x8000)? size:0x8000;
-+
-+ if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
-+ return -1;
-+
-+ if (AT91F_DataFlashContinuousRead (pDataFlash, addr, buffer, SizeToRead) != DATAFLASH_OK)
-+ return -1;
-+
-+ size -= SizeToRead;
-+ addr += SizeToRead;
-+ buffer += SizeToRead;
-+ }
-+
-+ return DATAFLASH_OK;
-+}
-+
-+
-+/*------------------------------------------------------------------------------*/
-+/* Function Name : AT91F_DataflashProbe */
-+/* Object : */
-+/* Input Parameters : */
-+/* Return value : Dataflash status register */
-+/*------------------------------------------------------------------------------*/
-+int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-+{
-+ AT91F_SpiEnable(cs);
-+ AT91F_DataFlashGetStatus(pDesc);
-+ return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
-+}
-+
-+#endif
-diff -Naur u-boot-1.1.4.org/board/vlink/config.mk u-boot-1.1.4.tmp/board/vlink/config.mk
---- u-boot-1.1.4.org/board/vlink/config.mk 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/config.mk 2005-12-16 17:39:27.000000000 +0100
-@@ -0,0 +1 @@
-+TEXT_BASE = 0x21f00000
-diff -Naur u-boot-1.1.4.org/board/vlink/flash.c u-boot-1.1.4.tmp/board/vlink/flash.c
---- u-boot-1.1.4.org/board/vlink/flash.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/flash.c 2006-06-05 02:44:43.000000000 +0200
-@@ -0,0 +1,504 @@
-+/*
-+ * (C) Copyright 2002
-+ * Lineo, Inc. <www.lineo.com>
-+ * Bernhard Kuhn <bkuhn@lineo.com>
-+ *
-+ * (C) Copyright 2002
-+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-+ * Alex Zuepke <azu@sysgo.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+
-+ulong myflush(void);
-+
-+
-+/* Flash Organization Structure */
-+typedef struct OrgDef
-+{
-+ unsigned int sector_number;
-+ unsigned int sector_size;
-+} OrgDef;
-+
-+
-+/* Flash Organizations */
-+OrgDef OrgAT49BV16x4[] =
-+{
-+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
-+ { 2, 32*1024 }, /* 2 * 32 kBytes sectors */
-+ { 30, 64*1024 }, /* 30 * 64 kBytes sectors */
-+};
-+
-+OrgDef OrgAT49BV16x4A[] =
-+{
-+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
-+ { 31, 64*1024 }, /* 31 * 64 kBytes sectors */
-+};
-+
-+OrgDef OrgAT49BV6416[] =
-+{
-+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
-+ { 127, 64*1024 }, /* 127 * 64 kBytes sectors */
-+};
-+
-+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-+
-+/* AT49BV1614A Codes */
-+#define FLASH_CODE1 0xAA
-+#define FLASH_CODE2 0x55
-+#define ID_IN_CODE 0x90
-+#define ID_OUT_CODE 0xF0
-+
-+
-+#define CMD_READ_ARRAY 0x00F0
-+#define CMD_UNLOCK1 0x00AA
-+#define CMD_UNLOCK2 0x0055
-+#define CMD_ERASE_SETUP 0x0080
-+#define CMD_ERASE_CONFIRM 0x0030
-+#define CMD_PROGRAM 0x00A0
-+#define CMD_UNLOCK_BYPASS 0x0020
-+#define CMD_SECTOR_UNLOCK 0x0070
-+
-+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
-+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
-+
-+#define BIT_ERASE_DONE 0x0080
-+#define BIT_RDY_MASK 0x0080
-+#define BIT_PROGRAM_ERROR 0x0020
-+#define BIT_TIMEOUT 0x80000000 /* our flag */
-+
-+#define READY 1
-+#define ERR 2
-+#define TMO 4
-+
-+/*-----------------------------------------------------------------------
-+ */
-+void flash_identification (flash_info_t * info)
-+{
-+ volatile u16 manuf_code, device_code, add_device_code;
-+
-+ MEM_FLASH_ADDR1 = FLASH_CODE1;
-+ MEM_FLASH_ADDR2 = FLASH_CODE2;
-+ MEM_FLASH_ADDR1 = ID_IN_CODE;
-+
-+ manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
-+ device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
-+ add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
-+
-+ MEM_FLASH_ADDR1 = FLASH_CODE1;
-+ MEM_FLASH_ADDR2 = FLASH_CODE2;
-+ MEM_FLASH_ADDR1 = ID_OUT_CODE;
-+
-+ /* Vendor type */
-+ info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
-+ printf ("Atmel: ");
-+
-+ if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-+
-+ if ((add_device_code & FLASH_TYPEMASK) ==
-+ (ATM_ID_BV1614A & FLASH_TYPEMASK)) {
-+ info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
-+ printf ("AT49BV1614A (16Mbit)\n");
-+ } else { /* AT49BV1614 Flash */
-+ info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
-+ printf ("AT49BV1614 (16Mbit)\n");
-+ }
-+
-+ } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
-+ info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
-+ printf ("AT49BV6416 (64Mbit)\n");
-+ }
-+}
-+
-+ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
-+{
-+ int i, nb_sectors = 0;
-+
-+ for (i=0; i<nb_blocks; i++){
-+ nb_sectors += pOrgDef[i].sector_number;
-+ }
-+
-+ return nb_sectors;
-+}
-+
-+void flash_unlock_sector(flash_info_t * info, unsigned int sector)
-+{
-+ volatile u16 *addr = (volatile u16 *) (info->start[sector]);
-+
-+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-+ *addr = CMD_SECTOR_UNLOCK;
-+}
-+
-+
-+ulong flash_init (void)
-+{
-+ int i, j, k;
-+ unsigned int flash_nb_blocks, sector;
-+ unsigned int start_address;
-+ OrgDef *pOrgDef;
-+
-+ ulong size = 0;
-+
-+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
-+ ulong flashbase = 0;
-+
-+ flash_identification (&flash_info[i]);
-+
-+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-+ (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-+
-+ pOrgDef = OrgAT49BV16x4;
-+ flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
-+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-+ (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */
-+
-+ pOrgDef = OrgAT49BV16x4A;
-+ flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
-+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
-+
-+ pOrgDef = OrgAT49BV6416;
-+ flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
-+ } else {
-+ flash_nb_blocks = 0;
-+ pOrgDef = OrgAT49BV16x4;
-+ }
-+
-+ flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
-+ memset (flash_info[i].protect, 0, flash_info[i].sector_count);
-+
-+ if (i == 0)
-+ flashbase = PHYS_FLASH_1;
-+ else
-+ panic ("configured too many flash banks!\n");
-+
-+ sector = 0;
-+ start_address = flashbase;
-+ flash_info[i].size = 0;
-+
-+ for (j = 0; j < flash_nb_blocks; j++) {
-+ for (k = 0; k < pOrgDef[j].sector_number; k++) {
-+ flash_info[i].start[sector++] = start_address;
-+ start_address += pOrgDef[j].sector_size;
-+ flash_info[i].size += pOrgDef[j].sector_size;
-+ }
-+ }
-+
-+ size += flash_info[i].size;
-+
-+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
-+
-+ /* Unlock all sectors at reset */
-+ for (j=0; j<flash_info[i].sector_count; j++){
-+ flash_unlock_sector(&flash_info[i], j);
-+ }
-+ }
-+ }
-+
-+ /* Protect binary boot image */
-+ flash_protect (FLAG_PROTECT_SET,
-+ CFG_FLASH_BASE,
-+ CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
-+
-+ /* Protect environment variables */
-+ flash_protect (FLAG_PROTECT_SET,
-+ CFG_ENV_ADDR,
-+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-+
-+ /* Protect U-Boot gzipped image */
-+ flash_protect (FLAG_PROTECT_SET,
-+ CFG_U_BOOT_BASE,
-+ CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
-+
-+ return size;
-+}
-+
-+/*-----------------------------------------------------------------------
-+ */
-+void flash_print_info (flash_info_t * info)
-+{
-+ int i;
-+
-+ switch (info->flash_id & FLASH_VENDMASK) {
-+ case (ATM_MANUFACT & FLASH_VENDMASK):
-+ printf ("Atmel: ");
-+ break;
-+ default:
-+ printf ("Unknown Vendor ");
-+ break;
-+ }
-+
-+ switch (info->flash_id & FLASH_TYPEMASK) {
-+ case (ATM_ID_BV1614 & FLASH_TYPEMASK):
-+ printf ("AT49BV1614 (16Mbit)\n");
-+ break;
-+ case (ATM_ID_BV1614A & FLASH_TYPEMASK):
-+ printf ("AT49BV1614A (16Mbit)\n");
-+ break;
-+ case (ATM_ID_BV6416 & FLASH_TYPEMASK):
-+ printf ("AT49BV6416 (64Mbit)\n");
-+ break;
-+ default:
-+ printf ("Unknown Chip Type\n");
-+ return;
-+ }
-+
-+ printf (" Size: %ld MB in %d Sectors\n",
-+ info->size >> 20, info->sector_count);
-+
-+ printf (" Sector Start Addresses:");
-+ for (i = 0; i < info->sector_count; i++) {
-+ if ((i % 5) == 0) {
-+ printf ("\n ");
-+ }
-+ printf (" %08lX%s", info->start[i],
-+ info->protect[i] ? " (RO)" : " ");
-+ }
-+ printf ("\n");
-+}
-+
-+/*-----------------------------------------------------------------------
-+ */
-+
-+int flash_erase (flash_info_t * info, int s_first, int s_last)
-+{
-+ ulong result;
-+ int iflag, cflag, prot, sect;
-+ int rc = ERR_OK;
-+ int chip1;
-+
-+ /* first look for protection bits */
-+
-+ if (info->flash_id == FLASH_UNKNOWN)
-+ return ERR_UNKNOWN_FLASH_TYPE;
-+
-+ if ((s_first < 0) || (s_first > s_last)) {
-+ return ERR_INVAL;
-+ }
-+
-+ if ((info->flash_id & FLASH_VENDMASK) !=
-+ (ATM_MANUFACT & FLASH_VENDMASK)) {
-+ return ERR_UNKNOWN_FLASH_VENDOR;
-+ }
-+
-+ prot = 0;
-+ for (sect = s_first; sect <= s_last; ++sect) {
-+ if (info->protect[sect]) {
-+ prot++;
-+ }
-+ }
-+ if (prot)
-+ return ERR_PROTECTED;
-+
-+ /*
-+ * Disable interrupts which might cause a timeout
-+ * here. Remember that our exception vectors are
-+ * at address 0 in the flash, and we don't want a
-+ * (ticker) exception to happen while the flash
-+ * chip is in programming mode.
-+ */
-+ cflag = icache_status ();
-+ icache_disable ();
-+ iflag = disable_interrupts ();
-+
-+ /* Start erase on unprotected sectors */
-+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-+ printf ("Erasing sector %2d ... ", sect);
-+
-+ /* arm simple, non interrupt dependent timer */
-+ reset_timer_masked ();
-+
-+ if (info->protect[sect] == 0) { /* not protected */
-+ volatile u16 *addr = (volatile u16 *) (info->start[sect]);
-+
-+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-+
-+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-+ *addr = CMD_ERASE_CONFIRM;
-+
-+ /* wait until flash is ready */
-+ chip1 = 0;
-+
-+ do {
-+ result = *addr;
-+
-+ /* check timeout */
-+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
-+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-+ chip1 = TMO;
-+ break;
-+ }
-+
-+ if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
-+ chip1 = READY;
-+
-+ } while (!chip1);
-+
-+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-+
-+ if (chip1 == ERR) {
-+ rc = ERR_PROG_ERROR;
-+ goto outahere;
-+ }
-+ if (chip1 == TMO) {
-+ rc = ERR_TIMOUT;
-+ goto outahere;
-+ }
-+
-+ printf ("ok.\n");
-+ } else { /* it was protected */
-+ printf ("protected!\n");
-+ }
-+ }
-+
-+ if (ctrlc ())
-+ printf ("User Interrupt!\n");
-+
-+outahere:
-+ /* allow flash to settle - wait 10 ms */
-+ udelay_masked (10000);
-+
-+ if (iflag)
-+ enable_interrupts ();
-+
-+ if (cflag)
-+ icache_enable ();
-+
-+ return rc;
-+}
-+
-+/*-----------------------------------------------------------------------
-+ * Copy memory to flash
-+ */
-+
-+volatile static int write_word (flash_info_t * info, ulong dest,
-+ ulong data)
-+{
-+ volatile u16 *addr = (volatile u16 *) dest;
-+ ulong result;
-+ int rc = ERR_OK;
-+ int cflag, iflag;
-+ int chip1;
-+
-+ /*
-+ * Check if Flash is (sufficiently) erased
-+ */
-+ result = *addr;
-+ if ((result & data) != data)
-+ return ERR_NOT_ERASED;
-+
-+
-+ /*
-+ * Disable interrupts which might cause a timeout
-+ * here. Remember that our exception vectors are
-+ * at address 0 in the flash, and we don't want a
-+ * (ticker) exception to happen while the flash
-+ * chip is in programming mode.
-+ */
-+ cflag = icache_status ();
-+ icache_disable ();
-+ iflag = disable_interrupts ();
-+
-+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-+ MEM_FLASH_ADDR1 = CMD_PROGRAM;
-+ *addr = data;
-+
-+ /* arm simple, non interrupt dependent timer */
-+ reset_timer_masked ();
-+
-+ /* wait until flash is ready */
-+ chip1 = 0;
-+ do {
-+ result = *addr;
-+
-+ /* check timeout */
-+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
-+ chip1 = ERR | TMO;
-+ break;
-+ }
-+ if (!chip1 && ((result & 0x80) == (data & 0x80)))
-+ chip1 = READY;
-+
-+ } while (!chip1);
-+
-+ *addr = CMD_READ_ARRAY;
-+
-+ if (chip1 == ERR || *addr != data)
-+ rc = ERR_PROG_ERROR;
-+
-+ if (iflag)
-+ enable_interrupts ();
-+
-+ if (cflag)
-+ icache_enable ();
-+
-+ return rc;
-+}
-+
-+/*-----------------------------------------------------------------------
-+ * Copy memory to flash.
-+ */
-+
-+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-+{
-+ ulong wp, data;
-+ int rc;
-+
-+ if (addr & 1) {
-+ printf ("unaligned destination not supported\n");
-+ return ERR_ALIGN;
-+ };
-+
-+ if ((int) src & 1) {
-+ printf ("unaligned source not supported\n");
-+ return ERR_ALIGN;
-+ };
-+
-+ wp = addr;
-+
-+ while (cnt >= 2) {
-+ data = *((volatile u16 *) src);
-+ if ((rc = write_word (info, wp, data)) != 0) {
-+ return (rc);
-+ }
-+ src += 2;
-+ wp += 2;
-+ cnt -= 2;
-+ }
-+
-+ if (cnt == 1) {
-+ data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
-+ 8);
-+ if ((rc = write_word (info, wp, data)) != 0) {
-+ return (rc);
-+ }
-+ src += 1;
-+ wp += 1;
-+ cnt -= 1;
-+ };
-+
-+ return ERR_OK;
-+}
-diff -Naur u-boot-1.1.4.org/board/vlink/Makefile u-boot-1.1.4.tmp/board/vlink/Makefile
---- u-boot-1.1.4.org/board/vlink/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/Makefile 2006-06-05 02:48:33.000000000 +0200
-@@ -0,0 +1,46 @@
-+#
-+# (C) Copyright 2003
-+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB = lib$(BOARD).a
-+
-+OBJS := vlink.o at45.o flash.o
-+
-+$(LIB): $(OBJS) $(SOBJS)
-+ $(AR) crv $@ $(OBJS) $(SOBJS)
-+
-+clean:
-+ rm -f $(SOBJS) $(OBJS)
-+
-+distclean: clean
-+ rm -f $(LIB) core *.bak .depend
-+
-+#########################################################################
-+
-+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-+
-+-include .depend
-+
-+#########################################################################
-diff -Naur u-boot-1.1.4.org/board/vlink/u-boot.lds u-boot-1.1.4.tmp/board/vlink/u-boot.lds
---- u-boot-1.1.4.org/board/vlink/u-boot.lds 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/u-boot.lds 2005-12-16 17:39:27.000000000 +0100
-@@ -0,0 +1,57 @@
-+/*
-+ * (C) Copyright 2002
-+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-+OUTPUT_ARCH(arm)
-+ENTRY(_start)
-+SECTIONS
-+{
-+ . = 0x00000000;
-+
-+ . = ALIGN(4);
-+ .text :
-+ {
-+ cpu/arm920t/start.o (.text)
-+ *(.text)
-+ }
-+
-+ . = ALIGN(4);
-+ .rodata : { *(.rodata) }
-+
-+ . = ALIGN(4);
-+ .data : { *(.data) }
-+
-+ . = ALIGN(4);
-+ .got : { *(.got) }
-+
-+ . = .;
-+ __u_boot_cmd_start = .;
-+ .u_boot_cmd : { *(.u_boot_cmd) }
-+ __u_boot_cmd_end = .;
-+
-+ . = ALIGN(4);
-+ __bss_start = .;
-+ .bss : { *(.bss) }
-+ _end = .;
-+}
-diff -Naur u-boot-1.1.4.org/board/vlink/vlink.c u-boot-1.1.4.tmp/board/vlink/vlink.c
---- u-boot-1.1.4.org/board/vlink/vlink.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/board/vlink/vlink.c 2006-06-05 03:10:22.000000000 +0200
-@@ -0,0 +1,89 @@
-+/*
-+ * (C) Copyright 2002
-+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-+ * Marius Groeger <mgroeger@sysgo.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <asm/arch/AT91RM9200.h>
-+#include <at91rm9200_net.h>
-+#include <dm9161.h>
-+#include <asm/mach-types.h>
-+
-+/* ------------------------------------------------------------------------- */
-+/*
-+ * Miscelaneous platform dependent initialisations
-+ */
-+
-+int board_init (void)
-+{
-+ DECLARE_GLOBAL_DATA_PTR;
-+
-+ /* Enable Ctrlc */
-+ console_init_f ();
-+
-+ /* Correct IRDA resistor problem */
-+ /* Set PA23_TXD in Output */
-+ (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2;
-+
-+ /* memory and cpu-speed are setup before relocation */
-+ /* so we do _nothing_ here */
-+
-+ /* arch number of Versalink-Board */
-+ gd->bd->bi_arch_number = MACH_TYPE_VLINK;
-+ /* adress of boot parameters */
-+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-+
-+ return 0;
-+}
-+
-+int dram_init (void)
-+{
-+ DECLARE_GLOBAL_DATA_PTR;
-+
-+ gd->bd->bi_dram[0].start = PHYS_SDRAM;
-+ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-+ return 0;
-+}
-+
-+#ifdef CONFIG_DRIVER_ETHER
-+#if (CONFIG_COMMANDS & CFG_CMD_NET)
-+
-+/*
-+ * Name:
-+ * at91rm9200_GetPhyInterface
-+ * Description:
-+ * Initialise the interface functions to the PHY
-+ * Arguments:
-+ * None
-+ * Return value:
-+ * None
-+ */
-+void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-+{
-+ p_phyops->Init = dm9161_InitPhy;
-+ p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
-+ p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
-+ p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
-+}
-+
-+#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-+#endif /* CONFIG_DRIVER_ETHER */
-diff -Naur u-boot-1.1.4.org/include/asm-arm/mach-types.h u-boot-1.1.4.tmp/include/asm-arm/mach-types.h
---- u-boot-1.1.4.org/include/asm-arm/mach-types.h 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.tmp/include/asm-arm/mach-types.h 2006-06-05 01:29:25.000000000 +0200
-@@ -424,7 +424,7 @@
- #define MACH_TYPE_MPORT3S 411
- #define MACH_TYPE_RA_ALPHA 412
- #define MACH_TYPE_XCEP 413
--#define MACH_TYPE_ARCOM_MERCURY 414
-+#define MACH_TYPE_ARCOM_VULCAN 414
- #define MACH_TYPE_STARGATE 415
- #define MACH_TYPE_ARMADILLOJ 416
- #define MACH_TYPE_ELROY_JACK 417
-@@ -457,7 +457,7 @@
- #define MACH_TYPE_XM250 444
- #define MACH_TYPE_T6TC1XB 445
- #define MACH_TYPE_ESS710 446
--#define MACH_TYPE_MX3ADS 447
-+#define MACH_TYPE_MX31ADS 447
- #define MACH_TYPE_HIMALAYA 448
- #define MACH_TYPE_BOLFENK 449
- #define MACH_TYPE_AT91RM9200KR 450
-@@ -563,8 +563,8 @@
- #define MACH_TYPE_ENS_CMU 550
- #define MACH_TYPE_MM6_SDB 551
- #define MACH_TYPE_SATURN 552
--#define MACH_TYPE_ARGONPLUSEVB 553
--#define MACH_TYPE_SCMA11EVB 554
-+#define MACH_TYPE_I30030EVB 553
-+#define MACH_TYPE_MXC27530EVB 554
- #define MACH_TYPE_SMDK2800 555
- #define MACH_TYPE_MTWILSON 556
- #define MACH_TYPE_ZITI 557
-@@ -644,7 +644,7 @@
- #define MACH_TYPE_MX2JAZZ 631
- #define MACH_TYPE_MULTIIO 632
- #define MACH_TYPE_HRDISPLAY 633
--#define MACH_TYPE_SCMA11BB 634
-+#define MACH_TYPE_MXC27530ADS 634
- #define MACH_TYPE_TRIZEPS3 635
- #define MACH_TYPE_ZEFEERDZA 636
- #define MACH_TYPE_ZEFEERDZB 637
-@@ -718,7 +718,7 @@
- #define MACH_TYPE_GEM 707
- #define MACH_TYPE_I858 708
- #define MACH_TYPE_HX2750 709
--#define MACH_TYPE_ZEUSEVB 710
-+#define MACH_TYPE_MXC91131EVB 710
- #define MACH_TYPE_P700 711
- #define MACH_TYPE_CPE 712
- #define MACH_TYPE_SPITZ 713
-@@ -736,6 +736,331 @@
- #define MACH_TYPE_LN2410SBC 725
- #define MACH_TYPE_CB3RUFC 726
- #define MACH_TYPE_MP2USB 727
-+#define MACH_TYPE_NTNP425C 728
-+#define MACH_TYPE_COLIBRI 729
-+#define MACH_TYPE_PCM7220 730
-+#define MACH_TYPE_GATEWAY7001 731
-+#define MACH_TYPE_PCM027 732
-+#define MACH_TYPE_CMPXA 733
-+#define MACH_TYPE_ANUBIS 734
-+#define MACH_TYPE_ITE8152 735
-+#define MACH_TYPE_LPC3XXX 736
-+#define MACH_TYPE_PUPPETEER 737
-+#define MACH_TYPE_MACH_VADATECH 738
-+#define MACH_TYPE_E570 739
-+#define MACH_TYPE_X50 740
-+#define MACH_TYPE_RECON 741
-+#define MACH_TYPE_XBOARDGP8 742
-+#define MACH_TYPE_FPIC2 743
-+#define MACH_TYPE_AKITA 744
-+#define MACH_TYPE_A81 745
-+#define MACH_TYPE_SVM_SC25X 746
-+#define MACH_TYPE_VADATECH020 747
-+#define MACH_TYPE_TLI 748
-+#define MACH_TYPE_EDB9315LC 749
-+#define MACH_TYPE_PASSEC 750
-+#define MACH_TYPE_DS_TIGER 751
-+#define MACH_TYPE_E310 752
-+#define MACH_TYPE_E330 753
-+#define MACH_TYPE_RT3000 754
-+#define MACH_TYPE_NOKIA770 755
-+#define MACH_TYPE_PNX0106 756
-+#define MACH_TYPE_HX21XX 757
-+#define MACH_TYPE_FARADAY 758
-+#define MACH_TYPE_SBC9312 759
-+#define MACH_TYPE_BATMAN 760
-+#define MACH_TYPE_JPD201 761
-+#define MACH_TYPE_MIPSA 762
-+#define MACH_TYPE_KACOM 763
-+#define MACH_TYPE_SWARCOCPU 764
-+#define MACH_TYPE_SWARCODSL 765
-+#define MACH_TYPE_BLUEANGEL 766
-+#define MACH_TYPE_HAIRYGRAMA 767
-+#define MACH_TYPE_BANFF 768
-+#define MACH_TYPE_CARMEVA 769
-+#define MACH_TYPE_SAM255 770
-+#define MACH_TYPE_PPM10 771
-+#define MACH_TYPE_EDB9315A 772
-+#define MACH_TYPE_SUNSET 773
-+#define MACH_TYPE_STARGATE2 774
-+#define MACH_TYPE_INTELMOTE2 775
-+#define MACH_TYPE_TRIZEPS4 776
-+#define MACH_TYPE_MAINSTONE2 777
-+#define MACH_TYPE_EZ_IXP42X 778
-+#define MACH_TYPE_TAPWAVE_ZODIAC 779
-+#define MACH_TYPE_UNIVERSALMETER 780
-+#define MACH_TYPE_HICOARM9 781
-+#define MACH_TYPE_PNX4008 782
-+#define MACH_TYPE_KWS6000 783
-+#define MACH_TYPE_PORTUX920T 784
-+#define MACH_TYPE_EZ_X5 785
-+#define MACH_TYPE_OMAP_RUDOLPH 786
-+#define MACH_TYPE_CPUAT91 787
-+#define MACH_TYPE_REA9200 788
-+#define MACH_TYPE_ACTS_PUNE_SA1110 789
-+#define MACH_TYPE_IXP425 790
-+#define MACH_TYPE_I30030ADS 791
-+#define MACH_TYPE_PERCH 792
-+#define MACH_TYPE_EIS05R1 793
-+#define MACH_TYPE_PEPPERPAD 794
-+#define MACH_TYPE_SB3010 795
-+#define MACH_TYPE_RM9200 796
-+#define MACH_TYPE_DMA03 797
-+#define MACH_TYPE_ROAD_S101 798
-+#define MACH_TYPE_IQ_NEXTGEN_A 799
-+#define MACH_TYPE_IQ_NEXTGEN_B 800
-+#define MACH_TYPE_IQ_NEXTGEN_C 801
-+#define MACH_TYPE_IQ_NEXTGEN_D 802
-+#define MACH_TYPE_IQ_NEXTGEN_E 803
-+#define MACH_TYPE_MALLOW_AT91 804
-+#define MACH_TYPE_CYBERTRACKER_I 805
-+#define MACH_TYPE_GESBC931X 806
-+#define MACH_TYPE_CENTIPAD 807
-+#define MACH_TYPE_ARMSOC 808
-+#define MACH_TYPE_SE4200 809
-+#define MACH_TYPE_EMS197A 810
-+#define MACH_TYPE_MICRO9 811
-+#define MACH_TYPE_MICRO9L 812
-+#define MACH_TYPE_UC5471DSP 813
-+#define MACH_TYPE_SJ5471ENG 814
-+#define MACH_TYPE_CMPXA26X 815
-+#define MACH_TYPE_NC 816
-+#define MACH_TYPE_OMAP_PALMTE 817
-+#define MACH_TYPE_AJAX52X 818
-+#define MACH_TYPE_SIRIUSTAR 819
-+#define MACH_TYPE_IODATA_HDLG 820
-+#define MACH_TYPE_AT91RM9200UTL 821
-+#define MACH_TYPE_BIOSAFE 822
-+#define MACH_TYPE_MP1000 823
-+#define MACH_TYPE_PARSY 824
-+#define MACH_TYPE_CCXP 825
-+#define MACH_TYPE_OMAP_GSAMPLE 826
-+#define MACH_TYPE_REALVIEW_EB 827
-+#define MACH_TYPE_SAMOA 828
-+#define MACH_TYPE_T3XSCALE 829
-+#define MACH_TYPE_I878 830
-+#define MACH_TYPE_BORZOI 831
-+#define MACH_TYPE_GECKO 832
-+#define MACH_TYPE_DS101 833
-+#define MACH_TYPE_OMAP_PALMTT2 834
-+#define MACH_TYPE_XSCALE_PALMLD 835
-+#define MACH_TYPE_CC9C 836
-+#define MACH_TYPE_SBC1670 837
-+#define MACH_TYPE_IXDP28X5 838
-+#define MACH_TYPE_OMAP_PALMTT 839
-+#define MACH_TYPE_ML696K 840
-+#define MACH_TYPE_ARCOM_ZEUS 841
-+#define MACH_TYPE_OSIRIS 842
-+#define MACH_TYPE_MAESTRO 843
-+#define MACH_TYPE_TUNGE2 844
-+#define MACH_TYPE_IXBBM 845
-+#define MACH_TYPE_MX27 846
-+#define MACH_TYPE_AX8004 847
-+#define MACH_TYPE_AT91SAM9261EK 848
-+#define MACH_TYPE_LOFT 849
-+#define MACH_TYPE_MAGPIE 850
-+#define MACH_TYPE_MX21 851
-+#define MACH_TYPE_MB87M3400 852
-+#define MACH_TYPE_MGUARD_DELTA 853
-+#define MACH_TYPE_DAVINCI_DVDP 854
-+#define MACH_TYPE_HTCUNIVERSAL 855
-+#define MACH_TYPE_TPAD 856
-+#define MACH_TYPE_ROVERP3 857
-+#define MACH_TYPE_JORNADA928 858
-+#define MACH_TYPE_MV88FXX81 859
-+#define MACH_TYPE_STMP36XX 860
-+#define MACH_TYPE_SXNI79524 861
-+#define MACH_TYPE_AMS_DELTA 862
-+#define MACH_TYPE_URANIUM 863
-+#define MACH_TYPE_UCON 864
-+#define MACH_TYPE_NAS100D 865
-+#define MACH_TYPE_L083_1000 866
-+#define MACH_TYPE_EZX 867
-+#define MACH_TYPE_PNX5220 868
-+#define MACH_TYPE_BUTTE 869
-+#define MACH_TYPE_SRM2 870
-+#define MACH_TYPE_DSBR 871
-+#define MACH_TYPE_CRYSTALBALL 872
-+#define MACH_TYPE_TINYPXA27X 873
-+#define MACH_TYPE_HERBIE 874
-+#define MACH_TYPE_MAGICIAN 875
-+#define MACH_TYPE_CM4002 876
-+#define MACH_TYPE_B4 877
-+#define MACH_TYPE_MAUI 878
-+#define MACH_TYPE_CYBERTRACKER_G 879
-+#define MACH_TYPE_NXDKN 880
-+#define MACH_TYPE_MIO8390 881
-+#define MACH_TYPE_OMI_BOARD 882
-+#define MACH_TYPE_MX21CIV 883
-+#define MACH_TYPE_MAHI_CDAC 884
-+#define MACH_TYPE_XSCALE_PALMTX 885
-+#define MACH_TYPE_S3C2413 887
-+#define MACH_TYPE_SAMSYS_EP0 888
-+#define MACH_TYPE_WG302V1 889
-+#define MACH_TYPE_WG302V2 890
-+#define MACH_TYPE_EB42X 891
-+#define MACH_TYPE_IQ331ES 892
-+#define MACH_TYPE_COSYDSP 893
-+#define MACH_TYPE_UPLAT7D 894
-+#define MACH_TYPE_PTDAVINCI 895
-+#define MACH_TYPE_MBUS 896
-+#define MACH_TYPE_NADIA2VB 897
-+#define MACH_TYPE_R1000 898
-+#define MACH_TYPE_HW90250 899
-+#define MACH_TYPE_OMAP_2430SDP 900
-+#define MACH_TYPE_DAVINCI_EVM 901
-+#define MACH_TYPE_OMAP_TORNADO 902
-+#define MACH_TYPE_OLOCREEK 903
-+#define MACH_TYPE_PALMZ72 904
-+#define MACH_TYPE_NXDB500 905
-+#define MACH_TYPE_APF9328 906
-+#define MACH_TYPE_OMAP_WIPOQ 907
-+#define MACH_TYPE_OMAP_TWIP 908
-+#define MACH_TYPE_XSCALE_PALMTREO650 909
-+#define MACH_TYPE_ACUMEN 910
-+#define MACH_TYPE_XP100 911
-+#define MACH_TYPE_FS2410 912
-+#define MACH_TYPE_PXA270_CERF 913
-+#define MACH_TYPE_SQ2FTLPALM 914
-+#define MACH_TYPE_BSEMSERVER 915
-+#define MACH_TYPE_NETCLIENT 916
-+#define MACH_TYPE_XSCALE_PALMTT5 917
-+#define MACH_TYPE_OMAP_PALMTC 918
-+#define MACH_TYPE_OMAP_APOLLON 919
-+#define MACH_TYPE_MXC30030EVB 920
-+#define MACH_TYPE_REA_2D 921
-+#define MACH_TYPE_TI3E524 922
-+#define MACH_TYPE_ATEB9200 923
-+#define MACH_TYPE_AUCKLAND 924
-+#define MACH_TYPE_AK3320M 925
-+#define MACH_TYPE_DURAMAX 926
-+#define MACH_TYPE_N35 927
-+#define MACH_TYPE_PRONGHORN 928
-+#define MACH_TYPE_FUNDY 929
-+#define MACH_TYPE_LOGICPD_PXA270 930
-+#define MACH_TYPE_CPU777 931
-+#define MACH_TYPE_SIMICON9201 932
-+#define MACH_TYPE_LEAP2_HPM 933
-+#define MACH_TYPE_CM922TXA10 934
-+#define MACH_TYPE_PXA 935
-+#define MACH_TYPE_SANDGATE2 936
-+#define MACH_TYPE_SANDGATE2G 937
-+#define MACH_TYPE_SANDGATE2P 938
-+#define MACH_TYPE_FRED_JACK 939
-+#define MACH_TYPE_TTG_COLOR1 940
-+#define MACH_TYPE_NXEB500HMI 941
-+#define MACH_TYPE_NETDCU8 942
-+#define MACH_TYPE_ML675050_CPU_BOA 943
-+#define MACH_TYPE_NG_FVX538 944
-+#define MACH_TYPE_NG_FVS338 945
-+#define MACH_TYPE_PNX4103 946
-+#define MACH_TYPE_HESDB 947
-+#define MACH_TYPE_XSILO 948
-+#define MACH_TYPE_ESPRESSO 949
-+#define MACH_TYPE_EMLC 950
-+#define MACH_TYPE_SISTERON 951
-+#define MACH_TYPE_RX1950 952
-+#define MACH_TYPE_TSC_VENUS 953
-+#define MACH_TYPE_DS101J 954
-+#define MACH_TYPE_MXC30030ADS 955
-+#define MACH_TYPE_FUJITSU_WIMAXSOC 956
-+#define MACH_TYPE_DUALPCMODEM 957
-+#define MACH_TYPE_GESBC9312 958
-+#define MACH_TYPE_HTCAPACHE 959
-+#define MACH_TYPE_IXDP435 960
-+#define MACH_TYPE_CATPROVT100 961
-+#define MACH_TYPE_PICOTUX1XX 962
-+#define MACH_TYPE_PICOTUX2XX 963
-+#define MACH_TYPE_DSMG600 964
-+#define MACH_TYPE_EMPC2 965
-+#define MACH_TYPE_VENTURA 966
-+#define MACH_TYPE_PHIDGET_SBC 967
-+#define MACH_TYPE_IJ3K 968
-+#define MACH_TYPE_PISGAH 969
-+#define MACH_TYPE_OMAP_FSAMPLE 970
-+#define MACH_TYPE_SG720 971
-+#define MACH_TYPE_REDFOX 972
-+#define MACH_TYPE_MYSH_EP9315_1 973
-+#define MACH_TYPE_TPF106 974
-+#define MACH_TYPE_AT91RM9200KG 975
-+#define MACH_TYPE_SLEDB 976
-+#define MACH_TYPE_ONTRACK 977
-+#define MACH_TYPE_PM1200 978
-+#define MACH_TYPE_ESS24XXX 979
-+#define MACH_TYPE_COREMP7 980
-+#define MACH_TYPE_NEXCODER_6446 981
-+#define MACH_TYPE_STVC8380 982
-+#define MACH_TYPE_TEKLYNX 983
-+#define MACH_TYPE_CARBONADO 984
-+#define MACH_TYPE_SYSMOS_MP730 985
-+#define MACH_TYPE_SNAPPER_CL15 986
-+#define MACH_TYPE_PGIGIM 987
-+#define MACH_TYPE_PTX9160P2 988
-+#define MACH_TYPE_DCORE1 989
-+#define MACH_TYPE_VICTORPXA 990
-+#define MACH_TYPE_MX2DTB 991
-+#define MACH_TYPE_PXA_IREX_ER0100 992
-+#define MACH_TYPE_OMAP_PALMZ71 993
-+#define MACH_TYPE_BARTEC_DEG 994
-+#define MACH_TYPE_HW50251 995
-+#define MACH_TYPE_IBOX 996
-+#define MACH_TYPE_ATLASLH7A404 997
-+#define MACH_TYPE_PT2026 998
-+#define MACH_TYPE_HTCALPINE 999
-+#define MACH_TYPE_BARTEC_VTU 1000
-+#define MACH_TYPE_VCOREII 1001
-+#define MACH_TYPE_PDNB3 1002
-+#define MACH_TYPE_HTCBEETLES 1003
-+#define MACH_TYPE_S3C6400 1004
-+#define MACH_TYPE_S3C2443 1005
-+#define MACH_TYPE_OMAP_LDK 1006
-+#define MACH_TYPE_SMDK2460 1007
-+#define MACH_TYPE_SMDK2440 1008
-+#define MACH_TYPE_SMDK2412 1009
-+#define MACH_TYPE_WEBBOX 1010
-+#define MACH_TYPE_CWWNDP 1011
-+#define MACH_TYPE_DRAGON 1012
-+#define MACH_TYPE_OPENDO_CPU_BOARD 1013
-+#define MACH_TYPE_CCM2200 1014
-+#define MACH_TYPE_ETWARM 1015
-+#define MACH_TYPE_M93030 1016
-+#define MACH_TYPE_CC7U 1017
-+#define MACH_TYPE_MTT_RANGER 1018
-+#define MACH_TYPE_NEXUS 1019
-+#define MACH_TYPE_DESMAN 1020
-+#define MACH_TYPE_BKDE303 1021
-+#define MACH_TYPE_SMDK2413 1022
-+#define MACH_TYPE_AML_M7200 1023
-+#define MACH_TYPE_AML_M5900 1024
-+#define MACH_TYPE_SG640 1025
-+#define MACH_TYPE_EDG79524 1026
-+#define MACH_TYPE_AI2410 1027
-+#define MACH_TYPE_IXP465 1028
-+#define MACH_TYPE_BALLOON3 1029
-+#define MACH_TYPE_HEINS 1030
-+#define MACH_TYPE_MPLUSEVA 1031
-+#define MACH_TYPE_RT042 1032
-+#define MACH_TYPE_CWIEM 1033
-+#define MACH_TYPE_CM_X270 1034
-+#define MACH_TYPE_CM_X255 1035
-+#define MACH_TYPE_ESH_AT91 1036
-+#define MACH_TYPE_SANDGATE3 1037
-+#define MACH_TYPE_PRIMO 1038
-+#define MACH_TYPE_GEMSTONE 1039
-+#define MACH_TYPE_PRONGHORNMETRO 1040
-+#define MACH_TYPE_SIDEWINDER 1041
-+#define MACH_TYPE_PICOMOD1 1042
-+#define MACH_TYPE_SG590 1043
-+#define MACH_TYPE_AKAI9307 1044
-+#define MACH_TYPE_FONTAINE 1045
-+#define MACH_TYPE_WOMBAT 1046
-+#define MACH_TYPE_ACQ300 1047
-+#define MACH_TYPE_MOD_270 1048
-+#define MACH_TYPE_VC0820 1049
-+#define MACH_TYPE_ANI_AIM 1050
-+#define MACH_TYPE_JELLYFISH 1051
-+#define MACH_TYPE_AMANITA 1052
-+#define MACH_TYPE_VLINK 1053
-
- #ifdef CONFIG_ARCH_EBSA110
- # ifdef machine_arch_type
-@@ -3540,9 +3865,9 @@
- # else
- # define machine_arch_type MACH_TYPE_RAMSES
- # endif
--# define machine_is_ramses() (machine_arch_type == MACH_TYPE_RAMSES)
-+# define machine_is_mnci() (machine_arch_type == MACH_TYPE_RAMSES)
- #else
--# define machine_is_ramses() (0)
-+# define machine_is_mnci() (0)
- #endif
-
- #ifdef CONFIG_ARCH_S28X
-@@ -4500,9 +4825,9 @@
- # else
- # define machine_arch_type MACH_TYPE_M825XX
- # endif
--# define machine_is_m825xx() (machine_arch_type == MACH_TYPE_M825XX)
-+# define machine_is_comcerto() (machine_arch_type == MACH_TYPE_M825XX)
- #else
--# define machine_is_m825xx() (0)
-+# define machine_is_comcerto() (0)
- #endif
-
- #ifdef CONFIG_SA1100_M7100
-@@ -5657,16 +5982,16 @@
- # define machine_is_xcep() (0)
- #endif
-
--#ifdef CONFIG_MACH_ARCOM_MERCURY
-+#ifdef CONFIG_MACH_ARCOM_VULCAN
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_ARCOM_MERCURY
-+# define machine_arch_type MACH_TYPE_ARCOM_VULCAN
- # endif
--# define machine_is_arcom_mercury() (machine_arch_type == MACH_TYPE_ARCOM_MERCURY)
-+# define machine_is_arcom_vulcan() (machine_arch_type == MACH_TYPE_ARCOM_VULCAN)
- #else
--# define machine_is_arcom_mercury() (0)
-+# define machine_is_arcom_vulcan() (0)
- #endif
-
- #ifdef CONFIG_MACH_STARGATE
-@@ -6053,16 +6378,16 @@
- # define machine_is_ess710() (0)
- #endif
-
--#ifdef CONFIG_MACH_MX3ADS
-+#ifdef CONFIG_MACH_MX31ADS
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_MX3ADS
-+# define machine_arch_type MACH_TYPE_MX31ADS
- # endif
--# define machine_is_mx3ads() (machine_arch_type == MACH_TYPE_MX3ADS)
-+# define machine_is_mx31ads() (machine_arch_type == MACH_TYPE_MX31ADS)
- #else
--# define machine_is_mx3ads() (0)
-+# define machine_is_mx31ads() (0)
- #endif
-
- #ifdef CONFIG_MACH_HIMALAYA
-@@ -7325,28 +7650,28 @@
- # define machine_is_saturn() (0)
- #endif
-
--#ifdef CONFIG_MACH_ARGONPLUSEVB
-+#ifdef CONFIG_MACH_I30030EVB
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_ARGONPLUSEVB
-+# define machine_arch_type MACH_TYPE_I30030EVB
- # endif
--# define machine_is_argonplusevb() (machine_arch_type == MACH_TYPE_ARGONPLUSEVB)
-+# define machine_is_i30030evb() (machine_arch_type == MACH_TYPE_I30030EVB)
- #else
--# define machine_is_argonplusevb() (0)
-+# define machine_is_i30030evb() (0)
- #endif
-
--#ifdef CONFIG_MACH_SCMA11EVB
-+#ifdef CONFIG_MACH_MXC27530EVB
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_SCMA11EVB
-+# define machine_arch_type MACH_TYPE_MXC27530EVB
- # endif
--# define machine_is_scma11evb() (machine_arch_type == MACH_TYPE_SCMA11EVB)
-+# define machine_is_mxc27530evb() (machine_arch_type == MACH_TYPE_MXC27530EVB)
- #else
--# define machine_is_scma11evb() (0)
-+# define machine_is_mxc27530evb() (0)
- #endif
-
- #ifdef CONFIG_MACH_SMDK2800
-@@ -8297,16 +8622,16 @@
- # define machine_is_hrdisplay() (0)
- #endif
-
--#ifdef CONFIG_MACH_SCMA11BB
-+#ifdef CONFIG_MACH_MXC27530ADS
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_SCMA11BB
-+# define machine_arch_type MACH_TYPE_MXC27530ADS
- # endif
--# define machine_is_scma11bb() (machine_arch_type == MACH_TYPE_SCMA11BB)
-+# define machine_is_mxc27530ads() (machine_arch_type == MACH_TYPE_MXC27530ADS)
- #else
--# define machine_is_scma11bb() (0)
-+# define machine_is_mxc27530ads() (0)
- #endif
-
- #ifdef CONFIG_MACH_TRIZEPS3
-@@ -9185,16 +9510,16 @@
- # define machine_is_hx2750() (0)
- #endif
-
--#ifdef CONFIG_MACH_ZEUSEVB
-+#ifdef CONFIG_MACH_MXC91131EVB
- # ifdef machine_arch_type
- # undef machine_arch_type
- # define machine_arch_type __machine_arch_type
- # else
--# define machine_arch_type MACH_TYPE_ZEUSEVB
-+# define machine_arch_type MACH_TYPE_MXC91131EVB
- # endif
--# define machine_is_zeusevb() (machine_arch_type == MACH_TYPE_ZEUSEVB)
-+# define machine_is_mxc91131evb() (machine_arch_type == MACH_TYPE_MXC91131EVB)
- #else
--# define machine_is_zeusevb() (0)
-+# define machine_is_mxc91131evb() (0)
- #endif
-
- #ifdef CONFIG_MACH_P700
-@@ -9401,6 +9726,3906 @@
- # define machine_is_mp2usb() (0)
- #endif
-
-+#ifdef CONFIG_MACH_NTNP425C
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NTNP425C
-+# endif
-+# define machine_is_ntnp425c() (machine_arch_type == MACH_TYPE_NTNP425C)
-+#else
-+# define machine_is_ntnp425c() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_COLIBRI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_COLIBRI
-+# endif
-+# define machine_is_colibri() (machine_arch_type == MACH_TYPE_COLIBRI)
-+#else
-+# define machine_is_colibri() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PCM7220
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PCM7220
-+# endif
-+# define machine_is_pcm7220() (machine_arch_type == MACH_TYPE_PCM7220)
-+#else
-+# define machine_is_pcm7220() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_GATEWAY7001
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_GATEWAY7001
-+# endif
-+# define machine_is_gateway7001() (machine_arch_type == MACH_TYPE_GATEWAY7001)
-+#else
-+# define machine_is_gateway7001() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PCM027
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PCM027
-+# endif
-+# define machine_is_pcm027() (machine_arch_type == MACH_TYPE_PCM027)
-+#else
-+# define machine_is_pcm027() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CMPXA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CMPXA
-+# endif
-+# define machine_is_cmpxa() (machine_arch_type == MACH_TYPE_CMPXA)
-+#else
-+# define machine_is_cmpxa() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ANUBIS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ANUBIS
-+# endif
-+# define machine_is_anubis() (machine_arch_type == MACH_TYPE_ANUBIS)
-+#else
-+# define machine_is_anubis() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ITE8152
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ITE8152
-+# endif
-+# define machine_is_ite8152() (machine_arch_type == MACH_TYPE_ITE8152)
-+#else
-+# define machine_is_ite8152() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_LPC3XXX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_LPC3XXX
-+# endif
-+# define machine_is_lpc3xxx() (machine_arch_type == MACH_TYPE_LPC3XXX)
-+#else
-+# define machine_is_lpc3xxx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PUPPETEER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PUPPETEER
-+# endif
-+# define machine_is_puppeteer() (machine_arch_type == MACH_TYPE_PUPPETEER)
-+#else
-+# define machine_is_puppeteer() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MACH_VADATECH
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MACH_VADATECH
-+# endif
-+# define machine_is_vt001() (machine_arch_type == MACH_TYPE_MACH_VADATECH)
-+#else
-+# define machine_is_vt001() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_E570
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_E570
-+# endif
-+# define machine_is_e570() (machine_arch_type == MACH_TYPE_E570)
-+#else
-+# define machine_is_e570() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_X50
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_X50
-+# endif
-+# define machine_is_x50() (machine_arch_type == MACH_TYPE_X50)
-+#else
-+# define machine_is_x50() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_RECON
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_RECON
-+# endif
-+# define machine_is_recon() (machine_arch_type == MACH_TYPE_RECON)
-+#else
-+# define machine_is_recon() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XBOARDGP8
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XBOARDGP8
-+# endif
-+# define machine_is_xboardgp8() (machine_arch_type == MACH_TYPE_XBOARDGP8)
-+#else
-+# define machine_is_xboardgp8() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FPIC2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FPIC2
-+# endif
-+# define machine_is_fpic2() (machine_arch_type == MACH_TYPE_FPIC2)
-+#else
-+# define machine_is_fpic2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AKITA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AKITA
-+# endif
-+# define machine_is_akita() (machine_arch_type == MACH_TYPE_AKITA)
-+#else
-+# define machine_is_akita() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_A81
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_A81
-+# endif
-+# define machine_is_a81() (machine_arch_type == MACH_TYPE_A81)
-+#else
-+# define machine_is_a81() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SVM_SC25X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SVM_SC25X
-+# endif
-+# define machine_is_svm_sc25x() (machine_arch_type == MACH_TYPE_SVM_SC25X)
-+#else
-+# define machine_is_svm_sc25x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VADATECH020
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VADATECH020
-+# endif
-+# define machine_is_vt020() (machine_arch_type == MACH_TYPE_VADATECH020)
-+#else
-+# define machine_is_vt020() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TLI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TLI
-+# endif
-+# define machine_is_tli() (machine_arch_type == MACH_TYPE_TLI)
-+#else
-+# define machine_is_tli() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EDB9315LC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EDB9315LC
-+# endif
-+# define machine_is_edb9315lc() (machine_arch_type == MACH_TYPE_EDB9315LC)
-+#else
-+# define machine_is_edb9315lc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PASSEC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PASSEC
-+# endif
-+# define machine_is_passec() (machine_arch_type == MACH_TYPE_PASSEC)
-+#else
-+# define machine_is_passec() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DS_TIGER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DS_TIGER
-+# endif
-+# define machine_is_ds_tiger() (machine_arch_type == MACH_TYPE_DS_TIGER)
-+#else
-+# define machine_is_ds_tiger() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_E310
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_E310
-+# endif
-+# define machine_is_e310() (machine_arch_type == MACH_TYPE_E310)
-+#else
-+# define machine_is_e310() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_E330
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_E330
-+# endif
-+# define machine_is_e330() (machine_arch_type == MACH_TYPE_E330)
-+#else
-+# define machine_is_e330() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_RT3000
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_RT3000
-+# endif
-+# define machine_is_rt3000() (machine_arch_type == MACH_TYPE_RT3000)
-+#else
-+# define machine_is_rt3000() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NOKIA770
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NOKIA770
-+# endif
-+# define machine_is_nokia770() (machine_arch_type == MACH_TYPE_NOKIA770)
-+#else
-+# define machine_is_nokia770() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PNX0106
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PNX0106
-+# endif
-+# define machine_is_pnx0106() (machine_arch_type == MACH_TYPE_PNX0106)
-+#else
-+# define machine_is_pnx0106() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HX21XX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HX21XX
-+# endif
-+# define machine_is_hx21xx() (machine_arch_type == MACH_TYPE_HX21XX)
-+#else
-+# define machine_is_hx21xx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FARADAY
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FARADAY
-+# endif
-+# define machine_is_faraday() (machine_arch_type == MACH_TYPE_FARADAY)
-+#else
-+# define machine_is_faraday() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SBC9312
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SBC9312
-+# endif
-+# define machine_is_sbc9312() (machine_arch_type == MACH_TYPE_SBC9312)
-+#else
-+# define machine_is_sbc9312() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BATMAN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BATMAN
-+# endif
-+# define machine_is_batman() (machine_arch_type == MACH_TYPE_BATMAN)
-+#else
-+# define machine_is_batman() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_JPD201
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_JPD201
-+# endif
-+# define machine_is_jpd201() (machine_arch_type == MACH_TYPE_JPD201)
-+#else
-+# define machine_is_jpd201() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MIPSA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MIPSA
-+# endif
-+# define machine_is_mipsa() (machine_arch_type == MACH_TYPE_MIPSA)
-+#else
-+# define machine_is_mipsa() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_KACOM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_KACOM
-+# endif
-+# define machine_is_kacom() (machine_arch_type == MACH_TYPE_KACOM)
-+#else
-+# define machine_is_kacom() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SWARCOCPU
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SWARCOCPU
-+# endif
-+# define machine_is_swarcocpu() (machine_arch_type == MACH_TYPE_SWARCOCPU)
-+#else
-+# define machine_is_swarcocpu() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SWARCODSL
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SWARCODSL
-+# endif
-+# define machine_is_swarcodsl() (machine_arch_type == MACH_TYPE_SWARCODSL)
-+#else
-+# define machine_is_swarcodsl() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BLUEANGEL
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BLUEANGEL
-+# endif
-+# define machine_is_blueangel() (machine_arch_type == MACH_TYPE_BLUEANGEL)
-+#else
-+# define machine_is_blueangel() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HAIRYGRAMA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HAIRYGRAMA
-+# endif
-+# define machine_is_hairygrama() (machine_arch_type == MACH_TYPE_HAIRYGRAMA)
-+#else
-+# define machine_is_hairygrama() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BANFF
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BANFF
-+# endif
-+# define machine_is_banff() (machine_arch_type == MACH_TYPE_BANFF)
-+#else
-+# define machine_is_banff() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CARMEVA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CARMEVA
-+# endif
-+# define machine_is_carmeva() (machine_arch_type == MACH_TYPE_CARMEVA)
-+#else
-+# define machine_is_carmeva() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SAM255
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SAM255
-+# endif
-+# define machine_is_sam255() (machine_arch_type == MACH_TYPE_SAM255)
-+#else
-+# define machine_is_sam255() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PPM10
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PPM10
-+# endif
-+# define machine_is_ppm10() (machine_arch_type == MACH_TYPE_PPM10)
-+#else
-+# define machine_is_ppm10() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EDB9315A
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EDB9315A
-+# endif
-+# define machine_is_edb9315a() (machine_arch_type == MACH_TYPE_EDB9315A)
-+#else
-+# define machine_is_edb9315a() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SUNSET
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SUNSET
-+# endif
-+# define machine_is_sunset() (machine_arch_type == MACH_TYPE_SUNSET)
-+#else
-+# define machine_is_sunset() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_STARGATE2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_STARGATE2
-+# endif
-+# define machine_is_stargate2() (machine_arch_type == MACH_TYPE_STARGATE2)
-+#else
-+# define machine_is_stargate2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_INTELMOTE2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_INTELMOTE2
-+# endif
-+# define machine_is_intelmote2() (machine_arch_type == MACH_TYPE_INTELMOTE2)
-+#else
-+# define machine_is_intelmote2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TRIZEPS4
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TRIZEPS4
-+# endif
-+# define machine_is_trizeps4() (machine_arch_type == MACH_TYPE_TRIZEPS4)
-+#else
-+# define machine_is_trizeps4() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAINSTONE2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAINSTONE2
-+# endif
-+# define machine_is_mainstone2() (machine_arch_type == MACH_TYPE_MAINSTONE2)
-+#else
-+# define machine_is_mainstone2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EZ_IXP42X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EZ_IXP42X
-+# endif
-+# define machine_is_ez_ixp42x() (machine_arch_type == MACH_TYPE_EZ_IXP42X)
-+#else
-+# define machine_is_ez_ixp42x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TAPWAVE_ZODIAC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TAPWAVE_ZODIAC
-+# endif
-+# define machine_is_tapwave_zodiac() (machine_arch_type == MACH_TYPE_TAPWAVE_ZODIAC)
-+#else
-+# define machine_is_tapwave_zodiac() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_UNIVERSALMETER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_UNIVERSALMETER
-+# endif
-+# define machine_is_universalmeter() (machine_arch_type == MACH_TYPE_UNIVERSALMETER)
-+#else
-+# define machine_is_universalmeter() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HICOARM9
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HICOARM9
-+# endif
-+# define machine_is_hicoarm9() (machine_arch_type == MACH_TYPE_HICOARM9)
-+#else
-+# define machine_is_hicoarm9() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PNX4008
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PNX4008
-+# endif
-+# define machine_is_pnx4008() (machine_arch_type == MACH_TYPE_PNX4008)
-+#else
-+# define machine_is_pnx4008() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_KWS6000
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_KWS6000
-+# endif
-+# define machine_is_kws6000() (machine_arch_type == MACH_TYPE_KWS6000)
-+#else
-+# define machine_is_kws6000() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PORTUX920T
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PORTUX920T
-+# endif
-+# define machine_is_portux920t() (machine_arch_type == MACH_TYPE_PORTUX920T)
-+#else
-+# define machine_is_portux920t() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EZ_X5
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EZ_X5
-+# endif
-+# define machine_is_ez_x5() (machine_arch_type == MACH_TYPE_EZ_X5)
-+#else
-+# define machine_is_ez_x5() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_RUDOLPH
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_RUDOLPH
-+# endif
-+# define machine_is_omap_rudolph() (machine_arch_type == MACH_TYPE_OMAP_RUDOLPH)
-+#else
-+# define machine_is_omap_rudolph() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CPUAT91
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CPUAT91
-+# endif
-+# define machine_is_cpuat91() (machine_arch_type == MACH_TYPE_CPUAT91)
-+#else
-+# define machine_is_cpuat91() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_REA9200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_REA9200
-+# endif
-+# define machine_is_rea9200() (machine_arch_type == MACH_TYPE_REA9200)
-+#else
-+# define machine_is_rea9200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ACTS_PUNE_SA1110
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ACTS_PUNE_SA1110
-+# endif
-+# define machine_is_acts_pune_sa1110() (machine_arch_type == MACH_TYPE_ACTS_PUNE_SA1110)
-+#else
-+# define machine_is_acts_pune_sa1110() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IXP425
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IXP425
-+# endif
-+# define machine_is_ixp425() (machine_arch_type == MACH_TYPE_IXP425)
-+#else
-+# define machine_is_ixp425() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_I30030ADS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_I30030ADS
-+# endif
-+# define machine_is_i30030ads() (machine_arch_type == MACH_TYPE_I30030ADS)
-+#else
-+# define machine_is_i30030ads() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PERCH
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PERCH
-+# endif
-+# define machine_is_perch() (machine_arch_type == MACH_TYPE_PERCH)
-+#else
-+# define machine_is_perch() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EIS05R1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EIS05R1
-+# endif
-+# define machine_is_eis05r1() (machine_arch_type == MACH_TYPE_EIS05R1)
-+#else
-+# define machine_is_eis05r1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PEPPERPAD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PEPPERPAD
-+# endif
-+# define machine_is_pepperpad() (machine_arch_type == MACH_TYPE_PEPPERPAD)
-+#else
-+# define machine_is_pepperpad() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SB3010
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SB3010
-+# endif
-+# define machine_is_sb3010() (machine_arch_type == MACH_TYPE_SB3010)
-+#else
-+# define machine_is_sb3010() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_RM9200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_RM9200
-+# endif
-+# define machine_is_rm9200() (machine_arch_type == MACH_TYPE_RM9200)
-+#else
-+# define machine_is_rm9200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DMA03
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DMA03
-+# endif
-+# define machine_is_dma03() (machine_arch_type == MACH_TYPE_DMA03)
-+#else
-+# define machine_is_dma03() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ROAD_S101
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ROAD_S101
-+# endif
-+# define machine_is_road_s101() (machine_arch_type == MACH_TYPE_ROAD_S101)
-+#else
-+# define machine_is_road_s101() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ_NEXTGEN_A
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_A
-+# endif
-+# define machine_is_iq_nextgen_a() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_A)
-+#else
-+# define machine_is_iq_nextgen_a() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ_NEXTGEN_B
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_B
-+# endif
-+# define machine_is_iq_nextgen_b() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_B)
-+#else
-+# define machine_is_iq_nextgen_b() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ_NEXTGEN_C
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_C
-+# endif
-+# define machine_is_iq_nextgen_c() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_C)
-+#else
-+# define machine_is_iq_nextgen_c() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ_NEXTGEN_D
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_D
-+# endif
-+# define machine_is_iq_nextgen_d() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_D)
-+#else
-+# define machine_is_iq_nextgen_d() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ_NEXTGEN_E
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_E
-+# endif
-+# define machine_is_iq_nextgen_e() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_E)
-+#else
-+# define machine_is_iq_nextgen_e() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MALLOW_AT91
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MALLOW_AT91
-+# endif
-+# define machine_is_mallow_at91() (machine_arch_type == MACH_TYPE_MALLOW_AT91)
-+#else
-+# define machine_is_mallow_at91() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CYBERTRACKER_I
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CYBERTRACKER_I
-+# endif
-+# define machine_is_cybertracker_i() (machine_arch_type == MACH_TYPE_CYBERTRACKER_I)
-+#else
-+# define machine_is_cybertracker_i() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_GESBC931X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_GESBC931X
-+# endif
-+# define machine_is_gesbc931x() (machine_arch_type == MACH_TYPE_GESBC931X)
-+#else
-+# define machine_is_gesbc931x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CENTIPAD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CENTIPAD
-+# endif
-+# define machine_is_centipad() (machine_arch_type == MACH_TYPE_CENTIPAD)
-+#else
-+# define machine_is_centipad() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ARMSOC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ARMSOC
-+# endif
-+# define machine_is_armsoc() (machine_arch_type == MACH_TYPE_ARMSOC)
-+#else
-+# define machine_is_armsoc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SE4200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SE4200
-+# endif
-+# define machine_is_se4200() (machine_arch_type == MACH_TYPE_SE4200)
-+#else
-+# define machine_is_se4200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EMS197A
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EMS197A
-+# endif
-+# define machine_is_ems197a() (machine_arch_type == MACH_TYPE_EMS197A)
-+#else
-+# define machine_is_ems197a() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MICRO9
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MICRO9
-+# endif
-+# define machine_is_micro9() (machine_arch_type == MACH_TYPE_MICRO9)
-+#else
-+# define machine_is_micro9() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MICRO9L
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MICRO9L
-+# endif
-+# define machine_is_micro9l() (machine_arch_type == MACH_TYPE_MICRO9L)
-+#else
-+# define machine_is_micro9l() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_UC5471DSP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_UC5471DSP
-+# endif
-+# define machine_is_uc5471dsp() (machine_arch_type == MACH_TYPE_UC5471DSP)
-+#else
-+# define machine_is_uc5471dsp() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SJ5471ENG
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SJ5471ENG
-+# endif
-+# define machine_is_sj5471eng() (machine_arch_type == MACH_TYPE_SJ5471ENG)
-+#else
-+# define machine_is_sj5471eng() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CMPXA26X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CMPXA26X
-+# endif
-+# define machine_is_none() (machine_arch_type == MACH_TYPE_CMPXA26X)
-+#else
-+# define machine_is_none() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NC
-+# endif
-+# define machine_is_nc1() (machine_arch_type == MACH_TYPE_NC)
-+#else
-+# define machine_is_nc1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_PALMTE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_PALMTE
-+# endif
-+# define machine_is_omap_palmte() (machine_arch_type == MACH_TYPE_OMAP_PALMTE)
-+#else
-+# define machine_is_omap_palmte() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AJAX52X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AJAX52X
-+# endif
-+# define machine_is_ajax52x() (machine_arch_type == MACH_TYPE_AJAX52X)
-+#else
-+# define machine_is_ajax52x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SIRIUSTAR
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SIRIUSTAR
-+# endif
-+# define machine_is_siriustar() (machine_arch_type == MACH_TYPE_SIRIUSTAR)
-+#else
-+# define machine_is_siriustar() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IODATA_HDLG
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IODATA_HDLG
-+# endif
-+# define machine_is_iodata_hdlg() (machine_arch_type == MACH_TYPE_IODATA_HDLG)
-+#else
-+# define machine_is_iodata_hdlg() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AT91RM9200UTL
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AT91RM9200UTL
-+# endif
-+# define machine_is_at91rm9200utl() (machine_arch_type == MACH_TYPE_AT91RM9200UTL)
-+#else
-+# define machine_is_at91rm9200utl() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BIOSAFE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BIOSAFE
-+# endif
-+# define machine_is_biosafe() (machine_arch_type == MACH_TYPE_BIOSAFE)
-+#else
-+# define machine_is_biosafe() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MP1000
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MP1000
-+# endif
-+# define machine_is_mp1000() (machine_arch_type == MACH_TYPE_MP1000)
-+#else
-+# define machine_is_mp1000() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PARSY
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PARSY
-+# endif
-+# define machine_is_parsy() (machine_arch_type == MACH_TYPE_PARSY)
-+#else
-+# define machine_is_parsy() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CCXP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CCXP
-+# endif
-+# define machine_is_ccxp270() (machine_arch_type == MACH_TYPE_CCXP)
-+#else
-+# define machine_is_ccxp270() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_GSAMPLE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_GSAMPLE
-+# endif
-+# define machine_is_omap_gsample() (machine_arch_type == MACH_TYPE_OMAP_GSAMPLE)
-+#else
-+# define machine_is_omap_gsample() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_REALVIEW_EB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_REALVIEW_EB
-+# endif
-+# define machine_is_realview_eb() (machine_arch_type == MACH_TYPE_REALVIEW_EB)
-+#else
-+# define machine_is_realview_eb() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SAMOA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SAMOA
-+# endif
-+# define machine_is_samoa() (machine_arch_type == MACH_TYPE_SAMOA)
-+#else
-+# define machine_is_samoa() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_T3XSCALE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_T3XSCALE
-+# endif
-+# define machine_is_t3xscale() (machine_arch_type == MACH_TYPE_T3XSCALE)
-+#else
-+# define machine_is_t3xscale() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_I878
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_I878
-+# endif
-+# define machine_is_i878() (machine_arch_type == MACH_TYPE_I878)
-+#else
-+# define machine_is_i878() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BORZOI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BORZOI
-+# endif
-+# define machine_is_borzoi() (machine_arch_type == MACH_TYPE_BORZOI)
-+#else
-+# define machine_is_borzoi() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_GECKO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_GECKO
-+# endif
-+# define machine_is_gecko() (machine_arch_type == MACH_TYPE_GECKO)
-+#else
-+# define machine_is_gecko() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DS101
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DS101
-+# endif
-+# define machine_is_ds101() (machine_arch_type == MACH_TYPE_DS101)
-+#else
-+# define machine_is_ds101() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_PALMTT2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_PALMTT2
-+# endif
-+# define machine_is_omap_palmtt2() (machine_arch_type == MACH_TYPE_OMAP_PALMTT2)
-+#else
-+# define machine_is_omap_palmtt2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XSCALE_PALMLD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XSCALE_PALMLD
-+# endif
-+# define machine_is_xscale_palmld() (machine_arch_type == MACH_TYPE_XSCALE_PALMLD)
-+#else
-+# define machine_is_xscale_palmld() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CC9C
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CC9C
-+# endif
-+# define machine_is_cc9c() (machine_arch_type == MACH_TYPE_CC9C)
-+#else
-+# define machine_is_cc9c() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SBC1670
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SBC1670
-+# endif
-+# define machine_is_sbc1670() (machine_arch_type == MACH_TYPE_SBC1670)
-+#else
-+# define machine_is_sbc1670() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IXDP28X5
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IXDP28X5
-+# endif
-+# define machine_is_ixdp28x5() (machine_arch_type == MACH_TYPE_IXDP28X5)
-+#else
-+# define machine_is_ixdp28x5() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_PALMTT
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_PALMTT
-+# endif
-+# define machine_is_omap_palmtt() (machine_arch_type == MACH_TYPE_OMAP_PALMTT)
-+#else
-+# define machine_is_omap_palmtt() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ML696K
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ML696K
-+# endif
-+# define machine_is_ml696k() (machine_arch_type == MACH_TYPE_ML696K)
-+#else
-+# define machine_is_ml696k() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ARCOM_ZEUS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ARCOM_ZEUS
-+# endif
-+# define machine_is_arcom_zeus() (machine_arch_type == MACH_TYPE_ARCOM_ZEUS)
-+#else
-+# define machine_is_arcom_zeus() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OSIRIS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OSIRIS
-+# endif
-+# define machine_is_osiris() (machine_arch_type == MACH_TYPE_OSIRIS)
-+#else
-+# define machine_is_osiris() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAESTRO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAESTRO
-+# endif
-+# define machine_is_maestro() (machine_arch_type == MACH_TYPE_MAESTRO)
-+#else
-+# define machine_is_maestro() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TUNGE2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TUNGE2
-+# endif
-+# define machine_is_tunge2() (machine_arch_type == MACH_TYPE_TUNGE2)
-+#else
-+# define machine_is_tunge2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IXBBM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IXBBM
-+# endif
-+# define machine_is_ixbbm() (machine_arch_type == MACH_TYPE_IXBBM)
-+#else
-+# define machine_is_ixbbm() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MX27
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MX27
-+# endif
-+# define machine_is_mx27ads() (machine_arch_type == MACH_TYPE_MX27)
-+#else
-+# define machine_is_mx27ads() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AX8004
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AX8004
-+# endif
-+# define machine_is_ax8004() (machine_arch_type == MACH_TYPE_AX8004)
-+#else
-+# define machine_is_ax8004() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AT91SAM9261EK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AT91SAM9261EK
-+# endif
-+# define machine_is_at91sam9261ek() (machine_arch_type == MACH_TYPE_AT91SAM9261EK)
-+#else
-+# define machine_is_at91sam9261ek() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_LOFT
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_LOFT
-+# endif
-+# define machine_is_loft() (machine_arch_type == MACH_TYPE_LOFT)
-+#else
-+# define machine_is_loft() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAGPIE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAGPIE
-+# endif
-+# define machine_is_magpie() (machine_arch_type == MACH_TYPE_MAGPIE)
-+#else
-+# define machine_is_magpie() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MX21
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MX21
-+# endif
-+# define machine_is_mx21ads() (machine_arch_type == MACH_TYPE_MX21)
-+#else
-+# define machine_is_mx21ads() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MB87M3400
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MB87M3400
-+# endif
-+# define machine_is_mb87m3400() (machine_arch_type == MACH_TYPE_MB87M3400)
-+#else
-+# define machine_is_mb87m3400() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MGUARD_DELTA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MGUARD_DELTA
-+# endif
-+# define machine_is_mguard_delta() (machine_arch_type == MACH_TYPE_MGUARD_DELTA)
-+#else
-+# define machine_is_mguard_delta() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DAVINCI_DVDP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DAVINCI_DVDP
-+# endif
-+# define machine_is_davinci_dvdp() (machine_arch_type == MACH_TYPE_DAVINCI_DVDP)
-+#else
-+# define machine_is_davinci_dvdp() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HTCUNIVERSAL
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HTCUNIVERSAL
-+# endif
-+# define machine_is_htcuniversal() (machine_arch_type == MACH_TYPE_HTCUNIVERSAL)
-+#else
-+# define machine_is_htcuniversal() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TPAD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TPAD
-+# endif
-+# define machine_is_tpad() (machine_arch_type == MACH_TYPE_TPAD)
-+#else
-+# define machine_is_tpad() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ROVERP3
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ROVERP3
-+# endif
-+# define machine_is_roverp3() (machine_arch_type == MACH_TYPE_ROVERP3)
-+#else
-+# define machine_is_roverp3() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_JORNADA928
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_JORNADA928
-+# endif
-+# define machine_is_jornada928() (machine_arch_type == MACH_TYPE_JORNADA928)
-+#else
-+# define machine_is_jornada928() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MV88FXX81
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MV88FXX81
-+# endif
-+# define machine_is_mv88fxx81() (machine_arch_type == MACH_TYPE_MV88FXX81)
-+#else
-+# define machine_is_mv88fxx81() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_STMP36XX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_STMP36XX
-+# endif
-+# define machine_is_stmp36xx() (machine_arch_type == MACH_TYPE_STMP36XX)
-+#else
-+# define machine_is_stmp36xx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SXNI79524
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SXNI79524
-+# endif
-+# define machine_is_sxni79524() (machine_arch_type == MACH_TYPE_SXNI79524)
-+#else
-+# define machine_is_sxni79524() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AMS_DELTA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AMS_DELTA
-+# endif
-+# define machine_is_ams_delta() (machine_arch_type == MACH_TYPE_AMS_DELTA)
-+#else
-+# define machine_is_ams_delta() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_URANIUM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_URANIUM
-+# endif
-+# define machine_is_uranium() (machine_arch_type == MACH_TYPE_URANIUM)
-+#else
-+# define machine_is_uranium() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_UCON
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_UCON
-+# endif
-+# define machine_is_ucon() (machine_arch_type == MACH_TYPE_UCON)
-+#else
-+# define machine_is_ucon() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NAS100D
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NAS100D
-+# endif
-+# define machine_is_nas100d() (machine_arch_type == MACH_TYPE_NAS100D)
-+#else
-+# define machine_is_nas100d() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_L083_1000
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_L083_1000
-+# endif
-+# define machine_is_l083() (machine_arch_type == MACH_TYPE_L083_1000)
-+#else
-+# define machine_is_l083() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EZX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EZX
-+# endif
-+# define machine_is_ezx() (machine_arch_type == MACH_TYPE_EZX)
-+#else
-+# define machine_is_ezx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PNX5220
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PNX5220
-+# endif
-+# define machine_is_pnx5220() (machine_arch_type == MACH_TYPE_PNX5220)
-+#else
-+# define machine_is_pnx5220() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BUTTE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BUTTE
-+# endif
-+# define machine_is_butte() (machine_arch_type == MACH_TYPE_BUTTE)
-+#else
-+# define machine_is_butte() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SRM2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SRM2
-+# endif
-+# define machine_is_srm2() (machine_arch_type == MACH_TYPE_SRM2)
-+#else
-+# define machine_is_srm2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DSBR
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DSBR
-+# endif
-+# define machine_is_dsbr() (machine_arch_type == MACH_TYPE_DSBR)
-+#else
-+# define machine_is_dsbr() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CRYSTALBALL
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CRYSTALBALL
-+# endif
-+# define machine_is_crystalball() (machine_arch_type == MACH_TYPE_CRYSTALBALL)
-+#else
-+# define machine_is_crystalball() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TINYPXA27X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TINYPXA27X
-+# endif
-+# define machine_is_tinypxa27x() (machine_arch_type == MACH_TYPE_TINYPXA27X)
-+#else
-+# define machine_is_tinypxa27x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HERBIE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HERBIE
-+# endif
-+# define machine_is_herbie() (machine_arch_type == MACH_TYPE_HERBIE)
-+#else
-+# define machine_is_herbie() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAGICIAN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAGICIAN
-+# endif
-+# define machine_is_magician() (machine_arch_type == MACH_TYPE_MAGICIAN)
-+#else
-+# define machine_is_magician() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CM4002
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CM4002
-+# endif
-+# define machine_is_cm4002() (machine_arch_type == MACH_TYPE_CM4002)
-+#else
-+# define machine_is_cm4002() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_B4
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_B4
-+# endif
-+# define machine_is_b4() (machine_arch_type == MACH_TYPE_B4)
-+#else
-+# define machine_is_b4() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAUI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAUI
-+# endif
-+# define machine_is_maui() (machine_arch_type == MACH_TYPE_MAUI)
-+#else
-+# define machine_is_maui() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CYBERTRACKER_G
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CYBERTRACKER_G
-+# endif
-+# define machine_is_cybertracker_g() (machine_arch_type == MACH_TYPE_CYBERTRACKER_G)
-+#else
-+# define machine_is_cybertracker_g() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NXDKN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NXDKN
-+# endif
-+# define machine_is_nxdkn() (machine_arch_type == MACH_TYPE_NXDKN)
-+#else
-+# define machine_is_nxdkn() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MIO8390
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MIO8390
-+# endif
-+# define machine_is_mio8390() (machine_arch_type == MACH_TYPE_MIO8390)
-+#else
-+# define machine_is_mio8390() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMI_BOARD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMI_BOARD
-+# endif
-+# define machine_is_omi_board() (machine_arch_type == MACH_TYPE_OMI_BOARD)
-+#else
-+# define machine_is_omi_board() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MX21CIV
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MX21CIV
-+# endif
-+# define machine_is_mx21civ() (machine_arch_type == MACH_TYPE_MX21CIV)
-+#else
-+# define machine_is_mx21civ() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MAHI_CDAC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MAHI_CDAC
-+# endif
-+# define machine_is_mahi_cdac() (machine_arch_type == MACH_TYPE_MAHI_CDAC)
-+#else
-+# define machine_is_mahi_cdac() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XSCALE_PALMTX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XSCALE_PALMTX
-+# endif
-+# define machine_is_xscale_palmtx() (machine_arch_type == MACH_TYPE_XSCALE_PALMTX)
-+#else
-+# define machine_is_xscale_palmtx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_S3C2413
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_S3C2413
-+# endif
-+# define machine_is_s3c2413() (machine_arch_type == MACH_TYPE_S3C2413)
-+#else
-+# define machine_is_s3c2413() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SAMSYS_EP0
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SAMSYS_EP0
-+# endif
-+# define machine_is_samsys_ep0() (machine_arch_type == MACH_TYPE_SAMSYS_EP0)
-+#else
-+# define machine_is_samsys_ep0() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_WG302V1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_WG302V1
-+# endif
-+# define machine_is_wg302v1() (machine_arch_type == MACH_TYPE_WG302V1)
-+#else
-+# define machine_is_wg302v1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_WG302V2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_WG302V2
-+# endif
-+# define machine_is_wg302v2() (machine_arch_type == MACH_TYPE_WG302V2)
-+#else
-+# define machine_is_wg302v2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EB42X
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EB42X
-+# endif
-+# define machine_is_eb42x() (machine_arch_type == MACH_TYPE_EB42X)
-+#else
-+# define machine_is_eb42x() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IQ331ES
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IQ331ES
-+# endif
-+# define machine_is_iq331es() (machine_arch_type == MACH_TYPE_IQ331ES)
-+#else
-+# define machine_is_iq331es() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_COSYDSP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_COSYDSP
-+# endif
-+# define machine_is_cosydsp() (machine_arch_type == MACH_TYPE_COSYDSP)
-+#else
-+# define machine_is_cosydsp() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_UPLAT7D
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_UPLAT7D
-+# endif
-+# define machine_is_uplat7d_proto() (machine_arch_type == MACH_TYPE_UPLAT7D)
-+#else
-+# define machine_is_uplat7d_proto() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PTDAVINCI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PTDAVINCI
-+# endif
-+# define machine_is_ptdavinci() (machine_arch_type == MACH_TYPE_PTDAVINCI)
-+#else
-+# define machine_is_ptdavinci() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MBUS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MBUS
-+# endif
-+# define machine_is_mbus() (machine_arch_type == MACH_TYPE_MBUS)
-+#else
-+# define machine_is_mbus() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NADIA2VB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NADIA2VB
-+# endif
-+# define machine_is_nadia2vb() (machine_arch_type == MACH_TYPE_NADIA2VB)
-+#else
-+# define machine_is_nadia2vb() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_R1000
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_R1000
-+# endif
-+# define machine_is_r1000() (machine_arch_type == MACH_TYPE_R1000)
-+#else
-+# define machine_is_r1000() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HW90250
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HW90250
-+# endif
-+# define machine_is_hw90250() (machine_arch_type == MACH_TYPE_HW90250)
-+#else
-+# define machine_is_hw90250() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_2430SDP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_2430SDP
-+# endif
-+# define machine_is_omap_2430sdp() (machine_arch_type == MACH_TYPE_OMAP_2430SDP)
-+#else
-+# define machine_is_omap_2430sdp() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DAVINCI_EVM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DAVINCI_EVM
-+# endif
-+# define machine_is_davinci_evm() (machine_arch_type == MACH_TYPE_DAVINCI_EVM)
-+#else
-+# define machine_is_davinci_evm() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_TORNADO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_TORNADO
-+# endif
-+# define machine_is_omap_tornado() (machine_arch_type == MACH_TYPE_OMAP_TORNADO)
-+#else
-+# define machine_is_omap_tornado() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OLOCREEK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OLOCREEK
-+# endif
-+# define machine_is_olocreek() (machine_arch_type == MACH_TYPE_OLOCREEK)
-+#else
-+# define machine_is_olocreek() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PALMZ72
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PALMZ72
-+# endif
-+# define machine_is_palmz72() (machine_arch_type == MACH_TYPE_PALMZ72)
-+#else
-+# define machine_is_palmz72() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NXDB500
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NXDB500
-+# endif
-+# define machine_is_nxdb500() (machine_arch_type == MACH_TYPE_NXDB500)
-+#else
-+# define machine_is_nxdb500() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_APF9328
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_APF9328
-+# endif
-+# define machine_is_apf9328() (machine_arch_type == MACH_TYPE_APF9328)
-+#else
-+# define machine_is_apf9328() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_WIPOQ
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_WIPOQ
-+# endif
-+# define machine_is_omap_wipoq() (machine_arch_type == MACH_TYPE_OMAP_WIPOQ)
-+#else
-+# define machine_is_omap_wipoq() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_TWIP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_TWIP
-+# endif
-+# define machine_is_omap_twip() (machine_arch_type == MACH_TYPE_OMAP_TWIP)
-+#else
-+# define machine_is_omap_twip() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XSCALE_PALMTREO650
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XSCALE_PALMTREO650
-+# endif
-+# define machine_is_xscale_treo650() (machine_arch_type == MACH_TYPE_XSCALE_PALMTREO650)
-+#else
-+# define machine_is_xscale_treo650() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ACUMEN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ACUMEN
-+# endif
-+# define machine_is_acumen() (machine_arch_type == MACH_TYPE_ACUMEN)
-+#else
-+# define machine_is_acumen() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XP100
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XP100
-+# endif
-+# define machine_is_xp100() (machine_arch_type == MACH_TYPE_XP100)
-+#else
-+# define machine_is_xp100() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FS2410
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FS2410
-+# endif
-+# define machine_is_fs2410() (machine_arch_type == MACH_TYPE_FS2410)
-+#else
-+# define machine_is_fs2410() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PXA270_CERF
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PXA270_CERF
-+# endif
-+# define machine_is_pxa270_cerf() (machine_arch_type == MACH_TYPE_PXA270_CERF)
-+#else
-+# define machine_is_pxa270_cerf() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SQ2FTLPALM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SQ2FTLPALM
-+# endif
-+# define machine_is_sq2ftlpalm() (machine_arch_type == MACH_TYPE_SQ2FTLPALM)
-+#else
-+# define machine_is_sq2ftlpalm() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BSEMSERVER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BSEMSERVER
-+# endif
-+# define machine_is_bsemserver() (machine_arch_type == MACH_TYPE_BSEMSERVER)
-+#else
-+# define machine_is_bsemserver() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NETCLIENT
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NETCLIENT
-+# endif
-+# define machine_is_netclient() (machine_arch_type == MACH_TYPE_NETCLIENT)
-+#else
-+# define machine_is_netclient() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XSCALE_PALMTT5
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XSCALE_PALMTT5
-+# endif
-+# define machine_is_xscale_palmtt5() (machine_arch_type == MACH_TYPE_XSCALE_PALMTT5)
-+#else
-+# define machine_is_xscale_palmtt5() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_PALMTC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_PALMTC
-+# endif
-+# define machine_is_xscale_palmtc() (machine_arch_type == MACH_TYPE_OMAP_PALMTC)
-+#else
-+# define machine_is_xscale_palmtc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_APOLLON
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_APOLLON
-+# endif
-+# define machine_is_omap_apollon() (machine_arch_type == MACH_TYPE_OMAP_APOLLON)
-+#else
-+# define machine_is_omap_apollon() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MXC30030EVB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MXC30030EVB
-+# endif
-+# define machine_is_mxc30030evb() (machine_arch_type == MACH_TYPE_MXC30030EVB)
-+#else
-+# define machine_is_mxc30030evb() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_REA_2D
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_REA_2D
-+# endif
-+# define machine_is_rea_2d() (machine_arch_type == MACH_TYPE_REA_2D)
-+#else
-+# define machine_is_rea_2d() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TI3E524
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TI3E524
-+# endif
-+# define machine_is_eti3e524() (machine_arch_type == MACH_TYPE_TI3E524)
-+#else
-+# define machine_is_eti3e524() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ATEB9200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ATEB9200
-+# endif
-+# define machine_is_ateb9200() (machine_arch_type == MACH_TYPE_ATEB9200)
-+#else
-+# define machine_is_ateb9200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AUCKLAND
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AUCKLAND
-+# endif
-+# define machine_is_auckland() (machine_arch_type == MACH_TYPE_AUCKLAND)
-+#else
-+# define machine_is_auckland() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AK3320M
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AK3320M
-+# endif
-+# define machine_is_ak3220m() (machine_arch_type == MACH_TYPE_AK3320M)
-+#else
-+# define machine_is_ak3220m() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DURAMAX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DURAMAX
-+# endif
-+# define machine_is_duramax() (machine_arch_type == MACH_TYPE_DURAMAX)
-+#else
-+# define machine_is_duramax() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_N35
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_N35
-+# endif
-+# define machine_is_n35() (machine_arch_type == MACH_TYPE_N35)
-+#else
-+# define machine_is_n35() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PRONGHORN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PRONGHORN
-+# endif
-+# define machine_is_pronghorn() (machine_arch_type == MACH_TYPE_PRONGHORN)
-+#else
-+# define machine_is_pronghorn() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FUNDY
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FUNDY
-+# endif
-+# define machine_is_fundy() (machine_arch_type == MACH_TYPE_FUNDY)
-+#else
-+# define machine_is_fundy() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_LOGICPD_PXA270
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_LOGICPD_PXA270
-+# endif
-+# define machine_is_logicpd_pxa270() (machine_arch_type == MACH_TYPE_LOGICPD_PXA270)
-+#else
-+# define machine_is_logicpd_pxa270() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CPU777
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CPU777
-+# endif
-+# define machine_is_cpu777() (machine_arch_type == MACH_TYPE_CPU777)
-+#else
-+# define machine_is_cpu777() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SIMICON9201
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SIMICON9201
-+# endif
-+# define machine_is_simicon9201() (machine_arch_type == MACH_TYPE_SIMICON9201)
-+#else
-+# define machine_is_simicon9201() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_LEAP2_HPM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_LEAP2_HPM
-+# endif
-+# define machine_is_leap2_hpm() (machine_arch_type == MACH_TYPE_LEAP2_HPM)
-+#else
-+# define machine_is_leap2_hpm() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CM922TXA10
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CM922TXA10
-+# endif
-+# define machine_is_cm922txa10() (machine_arch_type == MACH_TYPE_CM922TXA10)
-+#else
-+# define machine_is_cm922txa10() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PXA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PXA
-+# endif
-+# define machine_is_sandgate() (machine_arch_type == MACH_TYPE_PXA)
-+#else
-+# define machine_is_sandgate() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SANDGATE2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SANDGATE2
-+# endif
-+# define machine_is_sandgate2() (machine_arch_type == MACH_TYPE_SANDGATE2)
-+#else
-+# define machine_is_sandgate2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SANDGATE2G
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SANDGATE2G
-+# endif
-+# define machine_is_sandgate2g() (machine_arch_type == MACH_TYPE_SANDGATE2G)
-+#else
-+# define machine_is_sandgate2g() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SANDGATE2P
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SANDGATE2P
-+# endif
-+# define machine_is_sandgate2p() (machine_arch_type == MACH_TYPE_SANDGATE2P)
-+#else
-+# define machine_is_sandgate2p() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FRED_JACK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FRED_JACK
-+# endif
-+# define machine_is_fred_jack() (machine_arch_type == MACH_TYPE_FRED_JACK)
-+#else
-+# define machine_is_fred_jack() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TTG_COLOR1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TTG_COLOR1
-+# endif
-+# define machine_is_ttg_color1() (machine_arch_type == MACH_TYPE_TTG_COLOR1)
-+#else
-+# define machine_is_ttg_color1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NXEB500HMI
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NXEB500HMI
-+# endif
-+# define machine_is_nxeb500hmi() (machine_arch_type == MACH_TYPE_NXEB500HMI)
-+#else
-+# define machine_is_nxeb500hmi() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NETDCU8
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NETDCU8
-+# endif
-+# define machine_is_netdcu8() (machine_arch_type == MACH_TYPE_NETDCU8)
-+#else
-+# define machine_is_netdcu8() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ML675050_CPU_BOA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ML675050_CPU_BOA
-+# endif
-+# define machine_is_ml675050_cpu_boa() (machine_arch_type == MACH_TYPE_ML675050_CPU_BOA)
-+#else
-+# define machine_is_ml675050_cpu_boa() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NG_FVX538
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NG_FVX538
-+# endif
-+# define machine_is_ng_fvx538() (machine_arch_type == MACH_TYPE_NG_FVX538)
-+#else
-+# define machine_is_ng_fvx538() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NG_FVS338
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NG_FVS338
-+# endif
-+# define machine_is_ng_fvs338() (machine_arch_type == MACH_TYPE_NG_FVS338)
-+#else
-+# define machine_is_ng_fvs338() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PNX4103
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PNX4103
-+# endif
-+# define machine_is_pnx4103() (machine_arch_type == MACH_TYPE_PNX4103)
-+#else
-+# define machine_is_pnx4103() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HESDB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HESDB
-+# endif
-+# define machine_is_hesdb() (machine_arch_type == MACH_TYPE_HESDB)
-+#else
-+# define machine_is_hesdb() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_XSILO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_XSILO
-+# endif
-+# define machine_is_xsilo() (machine_arch_type == MACH_TYPE_XSILO)
-+#else
-+# define machine_is_xsilo() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ESPRESSO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ESPRESSO
-+# endif
-+# define machine_is_espresso() (machine_arch_type == MACH_TYPE_ESPRESSO)
-+#else
-+# define machine_is_espresso() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EMLC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EMLC
-+# endif
-+# define machine_is_emlc() (machine_arch_type == MACH_TYPE_EMLC)
-+#else
-+# define machine_is_emlc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SISTERON
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SISTERON
-+# endif
-+# define machine_is_sisteron() (machine_arch_type == MACH_TYPE_SISTERON)
-+#else
-+# define machine_is_sisteron() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_RX1950
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_RX1950
-+# endif
-+# define machine_is_rx1950() (machine_arch_type == MACH_TYPE_RX1950)
-+#else
-+# define machine_is_rx1950() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TSC_VENUS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TSC_VENUS
-+# endif
-+# define machine_is_tsc_venus() (machine_arch_type == MACH_TYPE_TSC_VENUS)
-+#else
-+# define machine_is_tsc_venus() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DS101J
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DS101J
-+# endif
-+# define machine_is_ds101j() (machine_arch_type == MACH_TYPE_DS101J)
-+#else
-+# define machine_is_ds101j() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MXC30030ADS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MXC30030ADS
-+# endif
-+# define machine_is_mxc30030ads() (machine_arch_type == MACH_TYPE_MXC30030ADS)
-+#else
-+# define machine_is_mxc30030ads() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FUJITSU_WIMAXSOC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FUJITSU_WIMAXSOC
-+# endif
-+# define machine_is_fujitsu_wimaxsoc() (machine_arch_type == MACH_TYPE_FUJITSU_WIMAXSOC)
-+#else
-+# define machine_is_fujitsu_wimaxsoc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DUALPCMODEM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DUALPCMODEM
-+# endif
-+# define machine_is_dualpcmodem() (machine_arch_type == MACH_TYPE_DUALPCMODEM)
-+#else
-+# define machine_is_dualpcmodem() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_GESBC9312
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_GESBC9312
-+# endif
-+# define machine_is_gesbc9312() (machine_arch_type == MACH_TYPE_GESBC9312)
-+#else
-+# define machine_is_gesbc9312() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HTCAPACHE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HTCAPACHE
-+# endif
-+# define machine_is_htcapache() (machine_arch_type == MACH_TYPE_HTCAPACHE)
-+#else
-+# define machine_is_htcapache() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IXDP435
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IXDP435
-+# endif
-+# define machine_is_ixdp435() (machine_arch_type == MACH_TYPE_IXDP435)
-+#else
-+# define machine_is_ixdp435() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CATPROVT100
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CATPROVT100
-+# endif
-+# define machine_is_catprovt100() (machine_arch_type == MACH_TYPE_CATPROVT100)
-+#else
-+# define machine_is_catprovt100() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PICOTUX1XX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PICOTUX1XX
-+# endif
-+# define machine_is_picotux1xx() (machine_arch_type == MACH_TYPE_PICOTUX1XX)
-+#else
-+# define machine_is_picotux1xx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PICOTUX2XX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PICOTUX2XX
-+# endif
-+# define machine_is_picotux2xx() (machine_arch_type == MACH_TYPE_PICOTUX2XX)
-+#else
-+# define machine_is_picotux2xx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DSMG600
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DSMG600
-+# endif
-+# define machine_is_dsmg600() (machine_arch_type == MACH_TYPE_DSMG600)
-+#else
-+# define machine_is_dsmg600() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EMPC2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EMPC2
-+# endif
-+# define machine_is_empc2() (machine_arch_type == MACH_TYPE_EMPC2)
-+#else
-+# define machine_is_empc2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VENTURA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VENTURA
-+# endif
-+# define machine_is_ventura() (machine_arch_type == MACH_TYPE_VENTURA)
-+#else
-+# define machine_is_ventura() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PHIDGET_SBC
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PHIDGET_SBC
-+# endif
-+# define machine_is_phidget_sbc() (machine_arch_type == MACH_TYPE_PHIDGET_SBC)
-+#else
-+# define machine_is_phidget_sbc() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IJ3K
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IJ3K
-+# endif
-+# define machine_is_ij3k() (machine_arch_type == MACH_TYPE_IJ3K)
-+#else
-+# define machine_is_ij3k() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PISGAH
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PISGAH
-+# endif
-+# define machine_is_pisgah() (machine_arch_type == MACH_TYPE_PISGAH)
-+#else
-+# define machine_is_pisgah() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_FSAMPLE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_FSAMPLE
-+# endif
-+# define machine_is_omap_fsample() (machine_arch_type == MACH_TYPE_OMAP_FSAMPLE)
-+#else
-+# define machine_is_omap_fsample() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SG720
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SG720
-+# endif
-+# define machine_is_sg720() (machine_arch_type == MACH_TYPE_SG720)
-+#else
-+# define machine_is_sg720() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_REDFOX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_REDFOX
-+# endif
-+# define machine_is_redfox() (machine_arch_type == MACH_TYPE_REDFOX)
-+#else
-+# define machine_is_redfox() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MYSH_EP9315_1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MYSH_EP9315_1
-+# endif
-+# define machine_is_mysh_ep9315_1() (machine_arch_type == MACH_TYPE_MYSH_EP9315_1)
-+#else
-+# define machine_is_mysh_ep9315_1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TPF106
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TPF106
-+# endif
-+# define machine_is_tpf106() (machine_arch_type == MACH_TYPE_TPF106)
-+#else
-+# define machine_is_tpf106() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AT91RM9200KG
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AT91RM9200KG
-+# endif
-+# define machine_is_at91rm9200kg() (machine_arch_type == MACH_TYPE_AT91RM9200KG)
-+#else
-+# define machine_is_at91rm9200kg() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SLEDB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SLEDB
-+# endif
-+# define machine_is_racemt2() (machine_arch_type == MACH_TYPE_SLEDB)
-+#else
-+# define machine_is_racemt2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ONTRACK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ONTRACK
-+# endif
-+# define machine_is_ontrack() (machine_arch_type == MACH_TYPE_ONTRACK)
-+#else
-+# define machine_is_ontrack() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PM1200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PM1200
-+# endif
-+# define machine_is_pm1200() (machine_arch_type == MACH_TYPE_PM1200)
-+#else
-+# define machine_is_pm1200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ESS24XXX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ESS24XXX
-+# endif
-+# define machine_is_ess24562() (machine_arch_type == MACH_TYPE_ESS24XXX)
-+#else
-+# define machine_is_ess24562() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_COREMP7
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_COREMP7
-+# endif
-+# define machine_is_coremp7() (machine_arch_type == MACH_TYPE_COREMP7)
-+#else
-+# define machine_is_coremp7() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NEXCODER_6446
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NEXCODER_6446
-+# endif
-+# define machine_is_nexcoder_6446() (machine_arch_type == MACH_TYPE_NEXCODER_6446)
-+#else
-+# define machine_is_nexcoder_6446() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_STVC8380
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_STVC8380
-+# endif
-+# define machine_is_stvc8380() (machine_arch_type == MACH_TYPE_STVC8380)
-+#else
-+# define machine_is_stvc8380() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_TEKLYNX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_TEKLYNX
-+# endif
-+# define machine_is_teklynx() (machine_arch_type == MACH_TYPE_TEKLYNX)
-+#else
-+# define machine_is_teklynx() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CARBONADO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CARBONADO
-+# endif
-+# define machine_is_carbonado() (machine_arch_type == MACH_TYPE_CARBONADO)
-+#else
-+# define machine_is_carbonado() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SYSMOS_MP730
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SYSMOS_MP730
-+# endif
-+# define machine_is_sysmos_mp730() (machine_arch_type == MACH_TYPE_SYSMOS_MP730)
-+#else
-+# define machine_is_sysmos_mp730() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SNAPPER_CL15
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SNAPPER_CL15
-+# endif
-+# define machine_is_snapper_cl15() (machine_arch_type == MACH_TYPE_SNAPPER_CL15)
-+#else
-+# define machine_is_snapper_cl15() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PGIGIM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PGIGIM
-+# endif
-+# define machine_is_pgigim() (machine_arch_type == MACH_TYPE_PGIGIM)
-+#else
-+# define machine_is_pgigim() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PTX9160P2
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PTX9160P2
-+# endif
-+# define machine_is_ptx9160p2() (machine_arch_type == MACH_TYPE_PTX9160P2)
-+#else
-+# define machine_is_ptx9160p2() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DCORE1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DCORE1
-+# endif
-+# define machine_is_dcore1() (machine_arch_type == MACH_TYPE_DCORE1)
-+#else
-+# define machine_is_dcore1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VICTORPXA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VICTORPXA
-+# endif
-+# define machine_is_victorpxa() (machine_arch_type == MACH_TYPE_VICTORPXA)
-+#else
-+# define machine_is_victorpxa() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MX2DTB
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MX2DTB
-+# endif
-+# define machine_is_mx2dtb() (machine_arch_type == MACH_TYPE_MX2DTB)
-+#else
-+# define machine_is_mx2dtb() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PXA_IREX_ER0100
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PXA_IREX_ER0100
-+# endif
-+# define machine_is_pxa_irex_er0100() (machine_arch_type == MACH_TYPE_PXA_IREX_ER0100)
-+#else
-+# define machine_is_pxa_irex_er0100() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_PALMZ71
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_PALMZ71
-+# endif
-+# define machine_is_omap_palmz71() (machine_arch_type == MACH_TYPE_OMAP_PALMZ71)
-+#else
-+# define machine_is_omap_palmz71() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BARTEC_DEG
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BARTEC_DEG
-+# endif
-+# define machine_is_bartec_deg() (machine_arch_type == MACH_TYPE_BARTEC_DEG)
-+#else
-+# define machine_is_bartec_deg() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HW50251
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HW50251
-+# endif
-+# define machine_is_hw50251() (machine_arch_type == MACH_TYPE_HW50251)
-+#else
-+# define machine_is_hw50251() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IBOX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IBOX
-+# endif
-+# define machine_is_ibox() (machine_arch_type == MACH_TYPE_IBOX)
-+#else
-+# define machine_is_ibox() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ATLASLH7A404
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ATLASLH7A404
-+# endif
-+# define machine_is_atlaslh7a404() (machine_arch_type == MACH_TYPE_ATLASLH7A404)
-+#else
-+# define machine_is_atlaslh7a404() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PT2026
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PT2026
-+# endif
-+# define machine_is_pt2026() (machine_arch_type == MACH_TYPE_PT2026)
-+#else
-+# define machine_is_pt2026() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HTCALPINE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HTCALPINE
-+# endif
-+# define machine_is_htcalpine() (machine_arch_type == MACH_TYPE_HTCALPINE)
-+#else
-+# define machine_is_htcalpine() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BARTEC_VTU
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BARTEC_VTU
-+# endif
-+# define machine_is_bartec_vtu() (machine_arch_type == MACH_TYPE_BARTEC_VTU)
-+#else
-+# define machine_is_bartec_vtu() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VCOREII
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VCOREII
-+# endif
-+# define machine_is_vcoreii() (machine_arch_type == MACH_TYPE_VCOREII)
-+#else
-+# define machine_is_vcoreii() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PDNB3
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PDNB3
-+# endif
-+# define machine_is_pdnb3() (machine_arch_type == MACH_TYPE_PDNB3)
-+#else
-+# define machine_is_pdnb3() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HTCBEETLES
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HTCBEETLES
-+# endif
-+# define machine_is_htcbeetles() (machine_arch_type == MACH_TYPE_HTCBEETLES)
-+#else
-+# define machine_is_htcbeetles() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_S3C6400
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_S3C6400
-+# endif
-+# define machine_is_s3c6400() (machine_arch_type == MACH_TYPE_S3C6400)
-+#else
-+# define machine_is_s3c6400() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_S3C2443
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_S3C2443
-+# endif
-+# define machine_is_s3c2443() (machine_arch_type == MACH_TYPE_S3C2443)
-+#else
-+# define machine_is_s3c2443() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OMAP_LDK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OMAP_LDK
-+# endif
-+# define machine_is_omap_ldk() (machine_arch_type == MACH_TYPE_OMAP_LDK)
-+#else
-+# define machine_is_omap_ldk() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SMDK2460
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SMDK2460
-+# endif
-+# define machine_is_smdk2460() (machine_arch_type == MACH_TYPE_SMDK2460)
-+#else
-+# define machine_is_smdk2460() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SMDK2440
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SMDK2440
-+# endif
-+# define machine_is_smdk2440() (machine_arch_type == MACH_TYPE_SMDK2440)
-+#else
-+# define machine_is_smdk2440() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SMDK2412
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SMDK2412
-+# endif
-+# define machine_is_smdk2412() (machine_arch_type == MACH_TYPE_SMDK2412)
-+#else
-+# define machine_is_smdk2412() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_WEBBOX
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_WEBBOX
-+# endif
-+# define machine_is_webbox() (machine_arch_type == MACH_TYPE_WEBBOX)
-+#else
-+# define machine_is_webbox() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CWWNDP
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CWWNDP
-+# endif
-+# define machine_is_cwwndp() (machine_arch_type == MACH_TYPE_CWWNDP)
-+#else
-+# define machine_is_cwwndp() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DRAGON
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DRAGON
-+# endif
-+# define machine_is_dragon() (machine_arch_type == MACH_TYPE_DRAGON)
-+#else
-+# define machine_is_dragon() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_OPENDO_CPU_BOARD
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_OPENDO_CPU_BOARD
-+# endif
-+# define machine_is_opendo_cpu_board() (machine_arch_type == MACH_TYPE_OPENDO_CPU_BOARD)
-+#else
-+# define machine_is_opendo_cpu_board() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CCM2200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CCM2200
-+# endif
-+# define machine_is_ccm2200() (machine_arch_type == MACH_TYPE_CCM2200)
-+#else
-+# define machine_is_ccm2200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ETWARM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ETWARM
-+# endif
-+# define machine_is_etwarm() (machine_arch_type == MACH_TYPE_ETWARM)
-+#else
-+# define machine_is_etwarm() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_M93030
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_M93030
-+# endif
-+# define machine_is_m93030() (machine_arch_type == MACH_TYPE_M93030)
-+#else
-+# define machine_is_m93030() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CC7U
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CC7U
-+# endif
-+# define machine_is_cc7u() (machine_arch_type == MACH_TYPE_CC7U)
-+#else
-+# define machine_is_cc7u() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MTT_RANGER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MTT_RANGER
-+# endif
-+# define machine_is_mtt_ranger() (machine_arch_type == MACH_TYPE_MTT_RANGER)
-+#else
-+# define machine_is_mtt_ranger() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_NEXUS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_NEXUS
-+# endif
-+# define machine_is_nexus() (machine_arch_type == MACH_TYPE_NEXUS)
-+#else
-+# define machine_is_nexus() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_DESMAN
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_DESMAN
-+# endif
-+# define machine_is_desman() (machine_arch_type == MACH_TYPE_DESMAN)
-+#else
-+# define machine_is_desman() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BKDE303
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BKDE303
-+# endif
-+# define machine_is_bkde303() (machine_arch_type == MACH_TYPE_BKDE303)
-+#else
-+# define machine_is_bkde303() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SMDK2413
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SMDK2413
-+# endif
-+# define machine_is_smdk2413() (machine_arch_type == MACH_TYPE_SMDK2413)
-+#else
-+# define machine_is_smdk2413() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AML_M7200
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AML_M7200
-+# endif
-+# define machine_is_aml_m7200() (machine_arch_type == MACH_TYPE_AML_M7200)
-+#else
-+# define machine_is_aml_m7200() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AML_M5900
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AML_M5900
-+# endif
-+# define machine_is_aml_m5900() (machine_arch_type == MACH_TYPE_AML_M5900)
-+#else
-+# define machine_is_aml_m5900() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SG640
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SG640
-+# endif
-+# define machine_is_sg640() (machine_arch_type == MACH_TYPE_SG640)
-+#else
-+# define machine_is_sg640() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_EDG79524
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_EDG79524
-+# endif
-+# define machine_is_edg79524() (machine_arch_type == MACH_TYPE_EDG79524)
-+#else
-+# define machine_is_edg79524() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AI2410
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AI2410
-+# endif
-+# define machine_is_ai2410() (machine_arch_type == MACH_TYPE_AI2410)
-+#else
-+# define machine_is_ai2410() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_IXP465
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_IXP465
-+# endif
-+# define machine_is_ixp465() (machine_arch_type == MACH_TYPE_IXP465)
-+#else
-+# define machine_is_ixp465() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_BALLOON3
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_BALLOON3
-+# endif
-+# define machine_is_balloon3() (machine_arch_type == MACH_TYPE_BALLOON3)
-+#else
-+# define machine_is_balloon3() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_HEINS
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_HEINS
-+# endif
-+# define machine_is_heins() (machine_arch_type == MACH_TYPE_HEINS)
-+#else
-+# define machine_is_heins() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MPLUSEVA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MPLUSEVA
-+# endif
-+# define machine_is_mpluseva() (machine_arch_type == MACH_TYPE_MPLUSEVA)
-+#else
-+# define machine_is_mpluseva() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_RT042
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_RT042
-+# endif
-+# define machine_is_rt042() (machine_arch_type == MACH_TYPE_RT042)
-+#else
-+# define machine_is_rt042() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CWIEM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CWIEM
-+# endif
-+# define machine_is_cwiem() (machine_arch_type == MACH_TYPE_CWIEM)
-+#else
-+# define machine_is_cwiem() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CM_X270
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CM_X270
-+# endif
-+# define machine_is_cm_x270() (machine_arch_type == MACH_TYPE_CM_X270)
-+#else
-+# define machine_is_cm_x270() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_CM_X255
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_CM_X255
-+# endif
-+# define machine_is_cm_x255() (machine_arch_type == MACH_TYPE_CM_X255)
-+#else
-+# define machine_is_cm_x255() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ESH_AT91
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ESH_AT91
-+# endif
-+# define machine_is_esh_at91() (machine_arch_type == MACH_TYPE_ESH_AT91)
-+#else
-+# define machine_is_esh_at91() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SANDGATE3
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SANDGATE3
-+# endif
-+# define machine_is_sandgate3() (machine_arch_type == MACH_TYPE_SANDGATE3)
-+#else
-+# define machine_is_sandgate3() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PRIMO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PRIMO
-+# endif
-+# define machine_is_primo() (machine_arch_type == MACH_TYPE_PRIMO)
-+#else
-+# define machine_is_primo() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_GEMSTONE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_GEMSTONE
-+# endif
-+# define machine_is_gemstone() (machine_arch_type == MACH_TYPE_GEMSTONE)
-+#else
-+# define machine_is_gemstone() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PRONGHORNMETRO
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PRONGHORNMETRO
-+# endif
-+# define machine_is_pronghorn_metro() (machine_arch_type == MACH_TYPE_PRONGHORNMETRO)
-+#else
-+# define machine_is_pronghorn_metro() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SIDEWINDER
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SIDEWINDER
-+# endif
-+# define machine_is_sidewinder() (machine_arch_type == MACH_TYPE_SIDEWINDER)
-+#else
-+# define machine_is_sidewinder() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_PICOMOD1
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_PICOMOD1
-+# endif
-+# define machine_is_picomod1() (machine_arch_type == MACH_TYPE_PICOMOD1)
-+#else
-+# define machine_is_picomod1() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_SG590
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SG590
-+# endif
-+# define machine_is_sg590() (machine_arch_type == MACH_TYPE_SG590)
-+#else
-+# define machine_is_sg590() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AKAI9307
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AKAI9307
-+# endif
-+# define machine_is_akai9307() (machine_arch_type == MACH_TYPE_AKAI9307)
-+#else
-+# define machine_is_akai9307() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_FONTAINE
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_FONTAINE
-+# endif
-+# define machine_is_fontaine() (machine_arch_type == MACH_TYPE_FONTAINE)
-+#else
-+# define machine_is_fontaine() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_WOMBAT
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_WOMBAT
-+# endif
-+# define machine_is_wombat() (machine_arch_type == MACH_TYPE_WOMBAT)
-+#else
-+# define machine_is_wombat() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ACQ300
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ACQ300
-+# endif
-+# define machine_is_acq300() (machine_arch_type == MACH_TYPE_ACQ300)
-+#else
-+# define machine_is_acq300() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_MOD_270
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_MOD_270
-+# endif
-+# define machine_is_mod_270() (machine_arch_type == MACH_TYPE_MOD_270)
-+#else
-+# define machine_is_mod_270() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VC0820
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VC0820
-+# endif
-+# define machine_is_vmc_vc0820() (machine_arch_type == MACH_TYPE_VC0820)
-+#else
-+# define machine_is_vmc_vc0820() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_ANI_AIM
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_ANI_AIM
-+# endif
-+# define machine_is_ani_aim() (machine_arch_type == MACH_TYPE_ANI_AIM)
-+#else
-+# define machine_is_ani_aim() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_JELLYFISH
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_JELLYFISH
-+# endif
-+# define machine_is_jellyfish() (machine_arch_type == MACH_TYPE_JELLYFISH)
-+#else
-+# define machine_is_jellyfish() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_AMANITA
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AMANITA
-+# endif
-+# define machine_is_amanita() (machine_arch_type == MACH_TYPE_AMANITA)
-+#else
-+# define machine_is_amanita() (0)
-+#endif
-+
-+#ifdef CONFIG_MACH_VLINK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_VLINK
-+# endif
-+# define machine_is_vlink() (machine_arch_type == MACH_TYPE_VLINK)
-+#else
-+# define machine_is_vlink() (0)
-+#endif
-+
- /*
- * These have not yet been registered
- */
-diff -Naur u-boot-1.1.4.org/include/config.h u-boot-1.1.4.tmp/include/config.h
---- u-boot-1.1.4.org/include/config.h 2006-06-05 05:04:25.000000000 +0200
-+++ u-boot-1.1.4.tmp/include/config.h 2006-06-05 05:03:47.000000000 +0200
-@@ -1,2 +1,2 @@
- /* Automatically generated - do not edit */
--#include <configs/at91rm9200dk.h>
-+#include <configs/vlink.h>
-diff -Naur u-boot-1.1.4.org/include/config.mk u-boot-1.1.4.tmp/include/config.mk
---- u-boot-1.1.4.org/include/config.mk 2006-06-05 05:04:25.000000000 +0200
-+++ u-boot-1.1.4.tmp/include/config.mk 2006-06-05 05:03:47.000000000 +0200
-@@ -1,4 +1,4 @@
- ARCH = arm
- CPU = arm920t
--BOARD = at91rm9200dk
-+BOARD = vlink
- SOC = at91rm9200
-diff -Naur u-boot-1.1.4.org/include/configs/vlink.h u-boot-1.1.4.tmp/include/configs/vlink.h
---- u-boot-1.1.4.org/include/configs/vlink.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4.tmp/include/configs/vlink.h 2006-06-05 03:37:15.000000000 +0200
-@@ -0,0 +1,244 @@
-+/*
-+ * Hamish Guthrie <hamish@prodigi.ch>
-+ *
-+ * Configuation settings for the Figment Designs Versalink board.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+
-+// Added 2 defines to skip re-init lowlevel and relocate HCG HLH
-+//
-+#define CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+
-+/* ARM asynchronous clock */
-+#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-+#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-+/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
-+
-+#define AT91_SLOW_CLOCK 32768 /* slow clock */
-+
-+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
-+#define CONFIG_VLINK 1 /* on a Versalink Board */
-+#define CONFIG_IDENT_STRING " FDL Versalink"
-+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-+#define USE_920T_MMU 1
-+
-+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-+#define CONFIG_SETUP_MEMORY_TAGS 1
-+#define CONFIG_INITRD_TAG 1
-+
-+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CFG_USE_MAIN_OSCILLATOR 1
-+/* flash */
-+#define MC_PUIA_VAL 0x00000000
-+#define MC_PUP_VAL 0x00000000
-+#define MC_PUER_VAL 0x00000000
-+#define MC_ASR_VAL 0x00000000
-+#define MC_AASR_VAL 0x00000000
-+#define EBI_CFGR_VAL 0x00000000
-+#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
-+
-+/* clocks */
-+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
-+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
-+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
-+
-+/* sdram */
-+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
-+#define PIOC_BSR_VAL 0x00000000
-+#define PIOC_PDR_VAL 0xFFFF0000
-+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
-+#define SDRAM 0x20000000 /* address of the SDRAM */
-+#define SDRAM1 0x20000080 /* address of the SDRAM */
-+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
-+#define SDRC_MR_VAL 0x00000002 /* Precharge All */
-+#define SDRC_MR_VAL1 0x00000004 /* refresh */
-+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
-+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-+
-+#define CONFIG_BAUDRATE 115200
-+
-+/*
-+ * Hardware drivers
-+ */
-+
-+/* define one of these to choose the DBGU, USART0 or USART1 as console */
-+#define CONFIG_DBGU
-+#undef CONFIG_USART0
-+#undef CONFIG_USART1
-+
-+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
-+
-+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-+
-+#define CONFIG_BOOTDELAY 3
-+/* #define CONFIG_ENV_OVERWRITE 1 */
-+
-+#define CONFIG_COMMANDS \
-+ ((CONFIG_CMD_DFL | CFG_CMD_MII |\
-+ CFG_CMD_DHCP ) & \
-+ ~(CFG_CMD_BDI | \
-+ CFG_CMD_IMI | \
-+ CFG_CMD_AUTOSCRIPT | \
-+ CFG_CMD_FPGA | \
-+ CFG_CMD_MISC | \
-+ CFG_CMD_LOADS ))
-+
-+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-+#include <cmd_confdefs.h>
-+
-+#ifndef CONFIG_VLINK
-+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-+#define SECTORSIZE 512
-+
-+#define ADDR_COLUMN 1
-+#define ADDR_PAGE 2
-+#define ADDR_COLUMN_PAGE 3
-+
-+#define NAND_ChipID_UNKNOWN 0x00
-+#define NAND_MAX_FLOORS 1
-+#define NAND_MAX_CHIPS 1
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-+#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
-+
-+#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-+#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-+
-+#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-+
-+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-+#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-+#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-+/* the following are NOP's in our implementation */
-+#define NAND_CTL_CLRALE(nandptr)
-+#define NAND_CTL_SETALE(nandptr)
-+#define NAND_CTL_CLRCLE(nandptr)
-+#define NAND_CTL_SETCLE(nandptr)
-+#endif
-+
-+#define CONFIG_NR_DRAM_BANKS 1
-+#define PHYS_SDRAM 0x20000000
-+#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
-+
-+#define CFG_MEMTEST_START PHYS_SDRAM
-+#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-+
-+#define CONFIG_DRIVER_ETHER
-+#define CONFIG_NET_RETRY_COUNT 20
-+#define CONFIG_AT91C_USE_RMII
-+
-+#define CONFIG_HAS_DATAFLASH 1
-+#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
-+#define CFG_MAX_DATAFLASH_BANKS 2
-+#define CFG_MAX_DATAFLASH_PAGES 16384
-+#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
-+#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
-+
-+#ifdef CONFIG_VLINK
-+#define PHYS_FLASH_1 0x10000000
-+#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */
-+#define CFG_FLASH_BASE PHYS_FLASH_1
-+#define CFG_MAX_FLASH_BANKS 1
-+#define CFG_MAX_FLASH_SECT 256
-+#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
-+#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
-+#endif
-+
-+#define CFG_ENV_IS_IN_DATAFLASH
-+
-+#ifdef CFG_ENV_IS_IN_DATAFLASH
-+#define CFG_ENV_OFFSET 0x21000
-+#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
-+#define CFG_ENV_SIZE 0x8400 /* 0x8000 */
-+#else
-+#define CFG_ENV_IS_IN_FLASH 1
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
-+#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
-+#else
-+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
-+#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+#endif /* CFG_ENV_IS_IN_DATAFLASH */
-+
-+
-+#define CFG_LOAD_ADDR 0x21000000 /* default load address */
-+
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
-+#define CFG_U_BOOT_BASE PHYS_FLASH_1
-+#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
-+#else
-+#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
-+#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
-+#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+
-+#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
-+
-+#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
-+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-+#define CFG_MAXARGS 16 /* max number of command args */
-+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-+
-+#ifndef __ASSEMBLY__
-+/*-----------------------------------------------------------------------
-+ * Board specific extension for bd_info
-+ *
-+ * This structure is embedded in the global bd_info (bd_t) structure
-+ * and can be used by the board specific code (eg board/...)
-+ */
-+
-+struct bd_info_ext {
-+ /* helper variable for board environment handling
-+ *
-+ * env_crc_valid == 0 => uninitialised
-+ * env_crc_valid > 0 => environment crc in flash is valid
-+ * env_crc_valid < 0 => environment crc in flash is invalid
-+ */
-+ int env_crc_valid;
-+};
-+#endif
-+
-+#define CFG_HZ 1000
-+#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
-+ /* AT91C_TC_TIMER_DIV1_CLOCK */
-+
-+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
-+
-+#ifdef CONFIG_USE_IRQ
-+#error CONFIG_USE_IRQ not supported
-+#endif
-+
-+#endif
-diff -Naur u-boot-1.1.4.org/MAKEALL u-boot-1.1.4.tmp/MAKEALL
---- u-boot-1.1.4.org/MAKEALL 2005-12-16 17:39:27.000000000 +0100
-+++ u-boot-1.1.4.tmp/MAKEALL 2006-06-05 02:44:24.000000000 +0200
-@@ -180,7 +180,7 @@
- mx1ads mx1fs2 omap1510inn omap1610h2 \
- omap1610inn omap730p2 scb9328 smdk2400 \
- smdk2410 trab VCMA9 versatile \
-- versatileab versatilepb voiceblue
-+ versatileab versatilepb voiceblue vlink
- "
-
- #########################################################################
-diff -Naur u-boot-1.1.4.org/Makefile u-boot-1.1.4.tmp/Makefile
---- u-boot-1.1.4.org/Makefile 2006-06-02 15:58:57.000000000 +0200
-+++ u-boot-1.1.4.tmp/Makefile 2006-06-05 04:40:45.000000000 +0200
-@@ -1419,6 +1419,9 @@
- mp2usb_config : unconfig
- @./mkconfig $(@:_config=) arm arm920t mp2usb NULL at91rm9200
-
-+vlink_config : unconfig
-+ @./mkconfig $(@:_config=) arm arm920t vlink NULL at91rm9200
-+
-
- ########################################################################
- ## ARM Integrator boards - see doc/README-integrator for more info.
+++ /dev/null
---- u-boot-1.1.4.org/lib_arm/board.c 2006-06-05 12:36:22.000000000 +0200
-+++ u-boot-1.1.4.tmp/lib_arm/board.c 2006-06-05 12:36:44.000000000 +0200
-@@ -332,6 +332,11 @@
- }
- #endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
-
-+#ifdef CONFIG_MACH_VLINK
-+ printf("Initialising MAC address\n\r");
-+ eth_init(gd->bd);
-+#endif
-+
- /* Initialize from environment */
- if ((s = getenv ("loadaddr")) != NULL) {
- load_addr = simple_strtoul (s, NULL, 16);
+++ /dev/null
---- u-boot-1.1.4.ttt/include/configs/vlink.h 2006-06-05 15:57:37.000000000 +0200
-+++ u-boot-1.1.4/include/configs/vlink.h 2006-06-07 13:11:01.000000000 +0200
-@@ -105,9 +105,9 @@
-
- #define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | CFG_CMD_MII |\
-- CFG_CMD_DHCP ) & \
-- ~(CFG_CMD_BDI | \
-- CFG_CMD_IMI | \
-+ CFG_CMD_DHCP | \
-+ CFG_CMD_BDI ) & \
-+ ~(CFG_CMD_IMI | \
- CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_FPGA | \
- CFG_CMD_MISC | \
+++ /dev/null
-diff -urN u-boot-1.1.4.old/cpu/arm920t/config.mk u-boot-1.1.4/cpu/arm920t/config.mk
---- u-boot-1.1.4.old/cpu/arm920t/config.mk 2007-03-19 12:44:39.000000000 +0100
-+++ u-boot-1.1.4/cpu/arm920t/config.mk 2007-03-20 09:23:54.000000000 +0100
-@@ -21,8 +21,7 @@
- # MA 02111-1307 USA
- #
-
--PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
-- -msoft-float
-+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8
-
- PLATFORM_CPPFLAGS += -march=armv4
- # =========================================================================
+++ /dev/null
---- u-boot-1.1.4.old/tools/Makefile 2007-03-22 18:17:25.000000000 +0100
-+++ u-boot-1.1.4/tools/Makefile 2007-03-22 17:08:46.000000000 +0100
-@@ -21,9 +21,9 @@
- # MA 02111-1307 USA
- #
-
--BINS = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
-+BINS = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX) ubparams$(SFX)
-
--OBJS = environment.o img2srec.o mkimage.o crc32.o envcrc.o gen_eth_addr.o bmp_logo.o
-+OBJS = environment.o img2srec.o mkimage.o crc32.o envcrc.o gen_eth_addr.o bmp_logo.o ubparams.o
-
- ifeq ($(ARCH),mips)
- BINS += inca-swap-bytes$(SFX)
-@@ -118,6 +118,9 @@
-
- all: .depend $(BINS) $(LOGO_H) subdirs
-
-+ubparams$(SFX): ubparams.o crc32.o
-+ $(CC) $(CFLAGS) -o $@ $^
-+
- envcrc$(SFX): envcrc.o crc32.o environment.o
- $(CC) $(CFLAGS) -o $@ $^
-
-@@ -149,6 +152,9 @@
- $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
- $(STRIP) $@
-
-+ubparams.o: ubparams.c
-+ $(CC) -g $(CFLAGS) -c $<
-+
- envcrc.o: envcrc.c
- $(CC) -g $(CFLAGS) -c $<
-
---- u-boot-1.1.4.old/tools/ubparams.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.1.4/tools/ubparams.c 2007-03-22 18:09:52.000000000 +0100
-@@ -0,0 +1,78 @@
-+/*
-+ * ubparams.c
-+ *
-+ * Generate a u-boot parameter block with correct crc
-+ *
-+ * (C) 1007 Guthrie Consulting
-+ * hamish@prodigi.ch
-+ *
-+ */
-+
-+#include <stdio.h>
-+#include <stdlib.h>
-+#include <string.h>
-+
-+#ifndef __ASSEMBLY__
-+#define __ASSEMBLY__
-+#endif
-+#define __ASM_STUB_PROCESSOR_H__
-+#include <config.h>
-+#undef __ASSEMBLY__
-+#include "environment.h"
-+
-+#define XMK_STR(x) #x
-+#define MK_STR(x) XMK_STR(x)
-+
-+extern unsigned long crc32 (unsigned long, const unsigned char *, unsigned int);
-+
-+#if !defined(ENV_CRC)
-+#define ENV_CRC ~0
-+#endif
-+
-+unsigned int env_size = 0x8400;
-+env_t environment = {
-+ ENV_CRC,
-+ "bootdelay=3\0"
-+ "baudrate=115200\0"
-+ "stdin=serial\0"
-+ "stdout=serial\0"
-+ "stderr=serial\0"
-+ "partitions=mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data)\0"
-+ "fbargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "rdba=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0"
-+ "flash=run fbargs; bootm 0xc0042000\0"
-+ "bootargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "bootcmd=bootm 0xc0042000\0"
-+ "ethaddr=00:30:49:00:00:01\0"
-+ "ipaddr=10.0.1.73\0"
-+ "serverip=10.0.1.210\0"
-+ "serial#=MX070205484\0"
-+ "\0"
-+ };
-+
-+int main(void) {
-+ env_t *envptr, *source;
-+ unsigned char *dataptr;
-+ FILE *params;
-+
-+ source = &environment;
-+ envptr = (env_t *)malloc(CFG_ENV_SIZE);
-+ dataptr = (unsigned char *)envptr + ENV_HEADER_SIZE;
-+
-+ printf("Make u-boot params\n");
-+ printf("Params size is %d\n", CFG_ENV_SIZE);
-+
-+ memset(envptr, 0, CFG_ENV_SIZE);
-+ memcpy(envptr, source, sizeof(environment));
-+
-+ envptr->crc = crc32(0, envptr->data, ENV_SIZE);
-+
-+ params = fopen("params", "w");
-+ fwrite(envptr, CFG_ENV_SIZE, 1, params);
-+ fclose(params);
-+
-+ free(envptr);
-+ }
-+
-+
+++ /dev/null
---- u-boot-1.1.4.old/tools/ubparams.c 2007-03-22 18:09:52.000000000 +0100
-+++ u-boot-1.1.4/tools/ubparams.c 2007-03-22 18:29:32.000000000 +0100
-@@ -18,7 +18,7 @@
- #define __ASM_STUB_PROCESSOR_H__
- #include <config.h>
- #undef __ASSEMBLY__
--#include "environment.h"
-+#include <environment.h>
-
- #define XMK_STR(x) #x
- #define MK_STR(x) XMK_STR(x)
+++ /dev/null
---- u-boot-1.1.4.old/tools/ubparams.c 2007-03-23 10:51:17.000000000 +0100
-+++ u-boot-1.1.4/tools/ubparams.c 2007-03-23 10:49:37.000000000 +0100
-@@ -73,6 +73,7 @@
- fclose(params);
-
- free(envptr);
-+ return 0;
- }
-
-
+++ /dev/null
-diff -urN u-boot-1.1.4.old/lib_arm/board.c u-boot-1.1.4/lib_arm/board.c
---- u-boot-1.1.4.old/lib_arm/board.c 2007-03-23 10:53:52.000000000 +0100
-+++ u-boot-1.1.4/lib_arm/board.c 2007-03-24 13:17:12.000000000 +0100
-@@ -332,7 +332,7 @@
- }
- #endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
-
--#ifdef CONFIG_MACH_VLINK
-+#ifdef CONFIG_VLINK
- printf("Initialising MAC address\n\r");
- eth_init(gd->bd);
- #endif
+++ /dev/null
---- u-boot-1.1.4.old/board/vlink/vlink.c 2007-04-03 11:42:39.000000000 +0200
-+++ u-boot-1.1.4/board/vlink/vlink.c 2007-04-03 11:48:33.000000000 +0200
-@@ -40,10 +40,6 @@
- /* Enable Ctrlc */
- console_init_f ();
-
-- /* Correct IRDA resistor problem */
-- /* Set PA23_TXD in Output */
-- (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2;
--
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
+++ /dev/null
-diff -urN u-boot-1.1.4.old/tools/ubparams.c u-boot-1.1.4/tools/ubparams.c
---- u-boot-1.1.4.old/tools/ubparams.c 2007-05-01 13:20:17.000000000 +0200
-+++ u-boot-1.1.4/tools/ubparams.c 2007-05-04 10:13:34.000000000 +0200
-@@ -37,12 +37,11 @@
- "stdin=serial\0"
- "stdout=serial\0"
- "stderr=serial\0"
-- "partitions=mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data)\0"
-- "fbargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-- "rdba=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "fbargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "rdba=setenv bootargs root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0"
- "flash=run fbargs; bootm 0xc0042000\0"
-- "bootargs=setenv bootargs mtdparts=AT45DB642.spi0:132k(bootloader),33k(ubparams),99k(spare),1056k(linux),2112k(rootfs),33k(nvram),-(rootfs_data) root=/dev/mtdblock4 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-+ "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "bootcmd=bootm 0xc0042000\0"
- "ethaddr=00:30:49:00:00:01\0"
- "ipaddr=10.0.1.73\0"
+++ /dev/null
-diff -urN u-boot-1.1.4.orig/examples/Makefile u-boot-1.1.4/examples/Makefile
---- u-boot-1.1.4.orig/examples/Makefile 2007-05-13 13:45:44.000000000 +0200
-+++ u-boot-1.1.4/examples/Makefile 2007-05-13 13:48:43.000000000 +0200
-@@ -123,10 +123,10 @@
- $(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \
- -o $@ -e $(<:.o=) $< $(LIB) \
- -L$(gcclibdir) -lgcc
--%.srec: %
-+%.srec: %.o
- $(OBJCOPY) -O srec $< $@ 2>/dev/null
-
--%.bin: %
-+%.bin: %.o
- $(OBJCOPY) -O binary $< $@ 2>/dev/null
-
- #########################################################################
+++ /dev/null
---- u-boot-1.1.4.old/tools/Makefile 2007-06-13 13:35:59.000000000 +0200
-+++ u-boot-1.1.4/tools/Makefile 2007-06-14 15:33:04.000000000 +0200
-@@ -153,7 +153,7 @@
- $(STRIP) $@
-
- ubparams.o: ubparams.c
-- $(CC) -g $(CFLAGS) -c $<
-+ $(CC) -g $(CFLAGS) -DLAN_IP=$(LAN_IP) -DLAN_SERVERIP=$(LAN_SERVERIP) -c $<
-
- envcrc.o: envcrc.c
- $(CC) -g $(CFLAGS) -c $<
---- u-boot-1.1.4.old/tools/ubparams.c 2007-06-13 13:35:59.000000000 +0200
-+++ u-boot-1.1.4/tools/ubparams.c 2007-06-14 15:31:55.000000000 +0200
-@@ -44,8 +44,8 @@
- "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "bootcmd=bootm 0xc0042000\0"
- "ethaddr=00:30:49:00:00:01\0"
-- "ipaddr=10.0.1.73\0"
-- "serverip=10.0.1.210\0"
-+ "ipaddr=" MK_STR(LAN_IP) "\0"
-+ "serverip=" MK_STR(LAN_SERVERIP) "\0"
- "serial#=MX070205484\0"
- "\0"
- };
+++ /dev/null
---- u-boot-1.1.4.old/tools/ubparams.c 2007-06-19 14:24:39.000000000 +0200
-+++ u-boot-1.1.4/tools/ubparams.c 2007-06-19 14:25:05.000000000 +0200
-@@ -39,7 +39,7 @@
- "stderr=serial\0"
- "fbargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "rdba=setenv bootargs root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
-- "rdram=run rdba; tftp 21000000 vImage; tftp 21200000 root.squashfs; bootm 21000000\0"
-+ "rdram=run rdba; tftp 21000000 uImage; tftp 21200000 root.squashfs; bootm 21000000\0"
- "flash=run fbargs; bootm 0xc0042000\0"
- "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "bootcmd=bootm 0xc0042000\0"
+++ /dev/null
-#
-
-all: ubpar
-
-crc32.c:
- ln -s ../lib_generic/crc32.c ./
-
-%.o: %.c
- $(CC) -I ../include $(CFLAGS) $(EXTRA_FLAGS) -DLAN_IP=$(LAN_IP) -DLAN_SERVERIP=$(LAN_SERVERIP) -c -o $@ $^
-
-ubpar: ubpar.o crc32.o
- $(CC) -o $@ $^
-
-clean:
- rm -f *.o ubpar
+++ /dev/null
-/*
- * ubparams.c
- *
- * Generate a u-boot parameter block with correct crc
- *
- * (C) 1007 Guthrie Consulting
- * hamish@prodigi.ch
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__
-#endif
-#define __ASM_STUB_PROCESSOR_H__
-#include <config.h>
-#undef __ASSEMBLY__
-#include <environment.h>
-
-#define XMK_STR(x) #x
-#define MK_STR(x) XMK_STR(x)
-
-extern unsigned long crc32 (unsigned long, const unsigned char *, unsigned int);
-
-#if !defined(ENV_CRC)
-#define ENV_CRC ~0
-#endif
-
-#ifdef LAN_IP
- #warning LAN_IP
-#else
- #warning LAN_IP NOT DEFINED
-#endif
-#ifdef LAN_SERVERIP
- #warning LAN_SERVERIP
-#else
- #warning LAN_SERVERIP NOT DEFINED
-#endif
-
-static char *environment[] = {
- "bootdelay=3\0"
- "baudrate=115200\0"
- "stdin=serial\0"
- "stdout=serial\0"
- "stderr=serial\0"
- "fbargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "rdba=setenv bootargs root=/dev/ram rw initrd=0x21200000,6000000 ramdisk_size=20000 init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "rdram=run rdba; tftp 21000000 uImage; tftp 21200000 root.squashfs; bootm 21000000\0"
- "flash=run fbargs; bootm 0xc0042000\0"
- "bootargs=setenv bootargs root=/dev/mtdblock3 ro init=/etc/preinit console=/dev/ttyS0,115200,mem=32M\0"
- "bootcmd=bootm 0xc0042000\0"
- "ipaddr=" MK_STR(LAN_IP) "\0"
- "serverip=" MK_STR(LAN_SERVERIP) "\0"
- "\0"
- };
-
-int main(int argc, char *argv[]) {
- env_t *envptr;
- char *src, *srcptr;
- char *dataptr;
- FILE *params;
- int argfail = 1;
- char newmac[30];
- char newser[30];
- int paramlen = 0;
- int progmac = 0;
- int progser = 0;
-
- if (argc < 3) {
- printf ("Invalid arguments\n");
- return 1;
- }
-
- switch (argc) {
- case 5:
- if (strcmp(argv[3], "--serial") == 0) {
- argfail = 0;
- sprintf(newser, "serial#=%s", argv[4]);
- progser = 1;
- }
- case 3:
- if (strcmp(argv[1], "--mac") == 0) {
- argfail = 0;
- sprintf(newmac, "ethaddr=%s", argv[2]);
- progmac = 1;
- }
- else
- argfail = 1;
- }
-
- if (argfail) {
- printf("Invalid arguments\n");
- return 1;
- }
-
-
- src = srcptr = *environment;
- envptr = (env_t *)malloc(CFG_ENV_SIZE);
- dataptr = (char *)envptr + ENV_HEADER_SIZE;
-
- while(*srcptr) {
- //printf("%d, %s\n", strlen(srcptr), srcptr);
- paramlen += strlen(srcptr) + 1;
- srcptr += strlen(srcptr) + 1;
- }
-
- printf("Make u-boot params\n");
- printf("Params size is %d\n", CFG_ENV_SIZE);
-
- memset(envptr, 0, CFG_ENV_SIZE);
- memcpy(dataptr, src, paramlen);
- dataptr += paramlen;
-
- if (progmac) {
- memcpy(dataptr, newmac, strlen(newmac));
- dataptr += strlen(newmac) + 1;
- }
-
- if (progser) {
- memcpy(dataptr, newser, strlen(newser));
- dataptr += strlen(newser) + 1;
- }
-
- envptr->crc = crc32(0, envptr->data, ENV_SIZE);
-
- params = fopen("/dev/mtd1", "w");
- fwrite(envptr, CFG_ENV_SIZE, 1, params);
- fclose(params);
-
- free(envptr);
- return 0;
-}
+++ /dev/null
-diff -urN -x CVS linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S
---- linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S Tue May 8 12:13:30 2007
-@@ -67,6 +67,12 @@
- cmp r7, r3
- beq 99f
-
-+ @ Promwad Chub : 1181
-+ mov r3, #(MACH_TYPE_CHUB & 0xff)
-+ orr r3, r3, #(MACH_TYPE_CHUB & 0xff00)
-+ cmp r7, r3
-+ beq 99f
-+
- @ Unknown board, use the AT91RM9200DK board
- @ mov r7, #MACH_TYPE_AT91RM9200
- mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff)
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Kconfig linux-2.6-stable/arch/arm/mach-at91/Kconfig
---- linux-2.6.21/arch/arm/mach-at91/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/Kconfig Wed May 9 10:20:54 2007
-@@ -17,6 +17,9 @@
- config ARCH_AT91SAM9263
- bool "AT91SAM9263"
-
-+config ARCH_AT91SAM9RL
-+ bool "AT91SAM9RL"
-+
- endchoice
-
- # ----------------------------------------------------------
-@@ -87,6 +90,12 @@
- help
- Select this if you are using Sperry-Sun's KAFA board.
-
-+config MACH_CHUB
-+ bool "Promwad Chub board"
-+ depends on ARCH_AT91RM9200
-+ help
-+ Select this if you are using Promwad's Chub board.
-+
- endif
-
- # ----------------------------------------------------------
-@@ -111,6 +120,13 @@
- Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
- <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
-
-+config MACH_CAM60
-+ bool "KwikByte CAM60 board"
-+ depends on ARCH_AT91SAM9260
-+ help
-+ Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260.
-+ <http://www.kwikbyte.com>
-+
- endif
-
- # ----------------------------------------------------------
-@@ -145,6 +161,20 @@
-
- # ----------------------------------------------------------
-
-+if ARCH_AT91SAM9RL
-+
-+comment "AT91SAM9RL Board Type"
-+
-+config MACH_AT91SAM9RLEK
-+ bool "Atmel AT91SAM9RL-EK Evaluation Kit"
-+ depends on ARCH_AT91SAM9RL
-+ help
-+ Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
-+
-+endif
-+
-+# ----------------------------------------------------------
-+
- comment "AT91 Board Options"
-
- config MTD_AT91_DATAFLASH_CARD
-@@ -160,6 +190,20 @@
- On AT91SAM926x boards both types of NAND flash can be present
- (8 and 16 bit data bus width).
-
-+config CSB300_WAKE_SW0
-+ bool "CSB300 SW0 irq0 wakeup"
-+ depends on MACH_CSB337 && PM
-+ help
-+ If you have a CSB300 connected to your CSB337, this lets
-+ SW0 serve as a wakeup button. It uses IRQ0.
-+
-+config CSB300_WAKE_SW1
-+ bool "CSB300 SW1 gpio wakeup"
-+ depends on MACH_CSB337 && PM
-+ help
-+ If you have a CSB300 connected to your CSB337, this lets
-+ SW1 serve as a wakeup button. It uses GPIO.
-+
- # ----------------------------------------------------------
-
- comment "AT91 Feature Selections"
-@@ -170,6 +214,20 @@
- Select this if you need to program one or more of the PCK0..PCK3
- programmable clock outputs.
-
-+config ATMEL_TCLIB
-+ bool "Timer/Counter Library"
-+ help
-+ Select this if you want a library to allocate the Timer/Counter
-+ blocks found on many Atmel processors. This facilitates using
-+ these modules despite processor differences.
-+
-+config AT91_SLOW_CLOCK
-+ bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)"
-+ depends on PM && EXPERIMENTAL
-+ help
-+ Select this if you wish to put the CPU into slow clock mode
-+ while in the "Suspend to RAM" state, to save more power.
-+
- endmenu
-
- endif
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Makefile linux-2.6-stable/arch/arm/mach-at91/Makefile
---- linux-2.6.21/arch/arm/mach-at91/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/Makefile Wed May 9 12:37:19 2007
-@@ -8,12 +8,15 @@
- obj- :=
-
- obj-$(CONFIG_PM) += pm.o
-+obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
-+obj-$(CONFIG_ATMEL_TCLIB) += tclib.o
-
- # CPU-specific support
- obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
- obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
- obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
- obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
-+obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
-
- # AT91RM9200 board-specific support
- obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
-@@ -25,9 +28,11 @@
- obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
- obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
- obj-$(CONFIG_MACH_KAFA) += board-kafa.o
-+obj-$(CONFIG_MACH_CHUB) += board-chub.o
-
- # AT91SAM9260 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
-+obj-$(CONFIG_MACH_CAM60) += board-cam60.o
-
- # AT91SAM9261 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
-@@ -35,9 +40,13 @@
- # AT91SAM9263 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
-
-+# AT91SAM9RL board-specific support
-+obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
-+
- # LEDs support
- led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
- led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
-+led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
- led-$(CONFIG_MACH_CSB337) += leds.o
- led-$(CONFIG_MACH_CSB637) += leds.o
- led-$(CONFIG_MACH_KB9200) += leds.o
-@@ -45,7 +54,7 @@
- obj-$(CONFIG_LEDS) += $(led-y)
-
- # VGA support
--#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
-+obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
-
-
- ifeq ($(CONFIG_PM_DEBUG),y)
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c
---- linux-2.6.21/arch/arm/mach-at91/at91rm9200.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c Tue May 8 12:13:30 2007
-@@ -117,6 +117,21 @@
- .pmc_mask = 1 << AT91RM9200_ID_PIOD,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk ssc0_clk = {
-+ .name = "ssc0_clk",
-+ .pmc_mask = 1 << AT91RM9200_ID_SSC0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc1_clk = {
-+ .name = "ssc1_clk",
-+ .pmc_mask = 1 << AT91RM9200_ID_SSC1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc2_clk = {
-+ .name = "ssc2_clk",
-+ .pmc_mask = 1 << AT91RM9200_ID_SSC2,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk tc0_clk = {
- .name = "tc0_clk",
- .pmc_mask = 1 << AT91RM9200_ID_TC0,
-@@ -161,7 +176,9 @@
- &udc_clk,
- &twi_clk,
- &spi_clk,
-- // ssc 0 .. ssc2
-+ &ssc0_clk,
-+ &ssc1_clk,
-+ &ssc2_clk,
- &tc0_clk,
- &tc1_clk,
- &tc2_clk,
-@@ -250,6 +267,33 @@
-
-
- /* --------------------------------------------------------------------
-+ * Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91rm9200_tcblocks[] = {
-+ [0] = {
-+ .physaddr = AT91RM9200_BASE_TCB0,
-+ .irq = { AT91RM9200_ID_TC0, AT91RM9200_ID_TC1, AT91RM9200_ID_TC2 },
-+ .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
-+ },
-+ [1] = {
-+ .physaddr = AT91RM9200_BASE_TCB1,
-+ .irq = { AT91RM9200_ID_TC3, AT91RM9200_ID_TC4, AT91RM9200_ID_TC5 },
-+ .clk = { &tc3_clk, &tc4_clk, &tc5_clk },
-+ },
-+};
-+
-+#define at91rm9200_tc_init() atmel_tc_init(at91rm9200_tcblocks, ARRAY_SIZE(at91rm9200_tcblocks))
-+
-+#else
-+#define at91rm9200_tc_init() do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
- * AT91RM9200 processor initialization
- * -------------------------------------------------------------------- */
- void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
-@@ -271,6 +315,9 @@
-
- /* Initialize GPIO subsystem */
- at91_gpio_init(at91rm9200_gpio, banks);
-+
-+ /* Initialize the Timer/Counter blocks */
-+ at91rm9200_tc_init();
- }
-
-
-@@ -284,28 +331,28 @@
- static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 7, /* Advanced Interrupt Controller (FIQ) */
- 7, /* System Peripherals */
-- 0, /* Parallel IO Controller A */
-- 0, /* Parallel IO Controller B */
-- 0, /* Parallel IO Controller C */
-- 0, /* Parallel IO Controller D */
-- 6, /* USART 0 */
-- 6, /* USART 1 */
-- 6, /* USART 2 */
-- 6, /* USART 3 */
-+ 1, /* Parallel IO Controller A */
-+ 1, /* Parallel IO Controller B */
-+ 1, /* Parallel IO Controller C */
-+ 1, /* Parallel IO Controller D */
-+ 5, /* USART 0 */
-+ 5, /* USART 1 */
-+ 5, /* USART 2 */
-+ 5, /* USART 3 */
- 0, /* Multimedia Card Interface */
-- 4, /* USB Device Port */
-- 0, /* Two-Wire Interface */
-- 6, /* Serial Peripheral Interface */
-- 5, /* Serial Synchronous Controller 0 */
-- 5, /* Serial Synchronous Controller 1 */
-- 5, /* Serial Synchronous Controller 2 */
-+ 2, /* USB Device Port */
-+ 6, /* Two-Wire Interface */
-+ 5, /* Serial Peripheral Interface */
-+ 4, /* Serial Synchronous Controller 0 */
-+ 4, /* Serial Synchronous Controller 1 */
-+ 4, /* Serial Synchronous Controller 2 */
- 0, /* Timer Counter 0 */
- 0, /* Timer Counter 1 */
- 0, /* Timer Counter 2 */
- 0, /* Timer Counter 3 */
- 0, /* Timer Counter 4 */
- 0, /* Timer Counter 5 */
-- 3, /* USB Host port */
-+ 2, /* USB Host port */
- 3, /* Ethernet MAC */
- 0, /* Advanced Interrupt Controller (IRQ0) */
- 0, /* Advanced Interrupt Controller (IRQ1) */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c
---- linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c Tue May 8 12:13:30 2007
-@@ -480,7 +480,18 @@
- * SPI
- * -------------------------------------------------------------------- */
-
--#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
-+#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) /* legacy SPI driver */
-+#define SPI_DEVNAME "at91_spi"
-+
-+#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) /* SPI bitbanging driver */
-+#define SPI_DEVNAME "at91_spi"
-+
-+#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) /* new SPI driver */
-+#define SPI_DEVNAME "atmel_spi"
-+
-+#endif
-+
-+#ifdef SPI_DEVNAME
- static u64 spi_dmamask = 0xffffffffUL;
-
- static struct resource spi_resources[] = {
-@@ -497,7 +508,7 @@
- };
-
- static struct platform_device at91rm9200_spi_device = {
-- .name = "at91_spi",
-+ .name = SPI_DEVNAME,
- .id = 0,
- .dev = {
- .dma_mask = &spi_dmamask,
-@@ -606,6 +617,32 @@
- #endif
-
-
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+ .name = "at91_leds",
-+ .id = -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+ if (!nr)
-+ return;
-+
-+ at91_leds.dev.platform_data = leds;
-+
-+ for ( ; nr; nr--, leds++) {
-+ leds->index = nr; /* first record stores number of leds */
-+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+ }
-+
-+ platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
- * UART
- * -------------------------------------------------------------------- */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9260.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c Tue May 8 12:13:30 2007
-@@ -119,6 +119,11 @@
- .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk ssc_clk = {
-+ .name = "ssc_clk",
-+ .pmc_mask = 1 << AT91SAM9260_ID_SSC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk tc0_clk = {
- .name = "tc0_clk",
- .pmc_mask = 1 << AT91SAM9260_ID_TC0,
-@@ -193,7 +198,7 @@
- &twi_clk,
- &spi0_clk,
- &spi1_clk,
-- // ssc
-+ &ssc_clk,
- &tc0_clk,
- &tc1_clk,
- &tc2_clk,
-@@ -264,6 +269,33 @@
-
-
- /* --------------------------------------------------------------------
-+ * Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9260_tcblocks[] = {
-+ [0] = {
-+ .physaddr = AT91SAM9260_BASE_TCB0,
-+ .irq = { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 },
-+ .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
-+ },
-+ [1] = {
-+ .physaddr = AT91SAM9260_BASE_TCB1,
-+ .irq = { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 },
-+ .clk = { &tc3_clk, &tc4_clk, &tc5_clk },
-+ },
-+};
-+
-+#define at91sam9260_tc_init() atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks))
-+
-+#else
-+#define at91sam9260_tc_init() do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
- * AT91SAM9260 processor initialization
- * -------------------------------------------------------------------- */
-
-@@ -310,6 +342,9 @@
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9260_gpio, 3);
-+
-+ /* Initialize the Timer/Counter blocks */
-+ at91sam9260_tc_init();
- }
-
- /* --------------------------------------------------------------------
-@@ -322,30 +357,30 @@
- static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 7, /* Advanced Interrupt Controller */
- 7, /* System Peripherals */
-- 0, /* Parallel IO Controller A */
-- 0, /* Parallel IO Controller B */
-- 0, /* Parallel IO Controller C */
-+ 1, /* Parallel IO Controller A */
-+ 1, /* Parallel IO Controller B */
-+ 1, /* Parallel IO Controller C */
- 0, /* Analog-to-Digital Converter */
-- 6, /* USART 0 */
-- 6, /* USART 1 */
-- 6, /* USART 2 */
-+ 5, /* USART 0 */
-+ 5, /* USART 1 */
-+ 5, /* USART 2 */
- 0, /* Multimedia Card Interface */
-- 4, /* USB Device Port */
-- 0, /* Two-Wire Interface */
-- 6, /* Serial Peripheral Interface 0 */
-- 6, /* Serial Peripheral Interface 1 */
-+ 2, /* USB Device Port */
-+ 6, /* Two-Wire Interface */
-+ 5, /* Serial Peripheral Interface 0 */
-+ 5, /* Serial Peripheral Interface 1 */
- 5, /* Serial Synchronous Controller */
- 0,
- 0,
- 0, /* Timer Counter 0 */
- 0, /* Timer Counter 1 */
- 0, /* Timer Counter 2 */
-- 3, /* USB Host port */
-+ 2, /* USB Host port */
- 3, /* Ethernet */
- 0, /* Image Sensor Interface */
-- 6, /* USART 3 */
-- 6, /* USART 4 */
-- 6, /* USART 5 */
-+ 5, /* USART 3 */
-+ 5, /* USART 4 */
-+ 5, /* USART 5 */
- 0, /* Timer Counter 3 */
- 0, /* Timer Counter 4 */
- 0, /* Timer Counter 5 */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c Tue May 8 12:13:30 2007
-@@ -527,6 +527,32 @@
- #endif
-
-
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+ .name = "at91_leds",
-+ .id = -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+ if (!nr)
-+ return;
-+
-+ at91_leds.dev.platform_data = leds;
-+
-+ for ( ; nr; nr--, leds++) {
-+ leds->index = nr; /* first record stores number of leds */
-+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+ }
-+
-+ platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
- * UART
- * -------------------------------------------------------------------- */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9261.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c Tue May 8 12:13:30 2007
-@@ -97,6 +97,21 @@
- .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk ssc0_clk = {
-+ .name = "ssc0_clk",
-+ .pmc_mask = 1 << AT91SAM9261_ID_SSC0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc1_clk = {
-+ .name = "ssc1_clk",
-+ .pmc_mask = 1 << AT91SAM9261_ID_SSC1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc2_clk = {
-+ .name = "ssc2_clk",
-+ .pmc_mask = 1 << AT91SAM9261_ID_SSC2,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk tc0_clk = {
- .name = "tc0_clk",
- .pmc_mask = 1 << AT91SAM9261_ID_TC0,
-@@ -135,7 +150,9 @@
- &twi_clk,
- &spi0_clk,
- &spi1_clk,
-- // ssc 0 .. ssc2
-+ &ssc0_clk,
-+ &ssc1_clk,
-+ &ssc2_clk,
- &tc0_clk,
- &tc1_clk,
- &tc2_clk,
-@@ -230,6 +247,28 @@
-
-
- /* --------------------------------------------------------------------
-+ * Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9261_tcblocks[] = {
-+ [0] = {
-+ .physaddr = AT91SAM9261_BASE_TCB0,
-+ .irq = { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 },
-+ .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
-+ }
-+};
-+
-+#define at91sam9261_tc_init() atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks))
-+
-+#else
-+#define at91sam9261_tc_init() do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
- * AT91SAM9261 processor initialization
- * -------------------------------------------------------------------- */
-
-@@ -250,6 +289,9 @@
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9261_gpio, 3);
-+
-+ /* Initialize the Timer/Counter blocks */
-+ at91sam9261_tc_init();
- }
-
- /* --------------------------------------------------------------------
-@@ -262,25 +304,25 @@
- static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 7, /* Advanced Interrupt Controller */
- 7, /* System Peripherals */
-- 0, /* Parallel IO Controller A */
-- 0, /* Parallel IO Controller B */
-- 0, /* Parallel IO Controller C */
-+ 1, /* Parallel IO Controller A */
-+ 1, /* Parallel IO Controller B */
-+ 1, /* Parallel IO Controller C */
- 0,
-- 6, /* USART 0 */
-- 6, /* USART 1 */
-- 6, /* USART 2 */
-+ 5, /* USART 0 */
-+ 5, /* USART 1 */
-+ 5, /* USART 2 */
- 0, /* Multimedia Card Interface */
-- 4, /* USB Device Port */
-- 0, /* Two-Wire Interface */
-- 6, /* Serial Peripheral Interface 0 */
-- 6, /* Serial Peripheral Interface 1 */
-- 5, /* Serial Synchronous Controller 0 */
-- 5, /* Serial Synchronous Controller 1 */
-- 5, /* Serial Synchronous Controller 2 */
-+ 2, /* USB Device Port */
-+ 6, /* Two-Wire Interface */
-+ 5, /* Serial Peripheral Interface 0 */
-+ 5, /* Serial Peripheral Interface 1 */
-+ 4, /* Serial Synchronous Controller 0 */
-+ 4, /* Serial Synchronous Controller 1 */
-+ 4, /* Serial Synchronous Controller 2 */
- 0, /* Timer Counter 0 */
- 0, /* Timer Counter 1 */
- 0, /* Timer Counter 2 */
-- 3, /* USB Host port */
-+ 2, /* USB Host port */
- 3, /* LCD Controller */
- 0,
- 0,
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c Tue May 8 12:56:33 2007
-@@ -14,6 +14,9 @@
- #include <asm/mach/map.h>
-
- #include <linux/platform_device.h>
-+#include <linux/fb.h>
-+
-+#include <video/atmel_lcdc.h>
-
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
-@@ -430,9 +433,9 @@
- * LCD Controller
- * -------------------------------------------------------------------- */
-
--#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
- static u64 lcdc_dmamask = 0xffffffffUL;
--static struct at91fb_info lcdc_data;
-+static struct atmel_lcdfb_info lcdc_data;
-
- static struct resource lcdc_resources[] = {
- [0] = {
-@@ -455,7 +458,7 @@
- };
-
- static struct platform_device at91_lcdc_device = {
-- .name = "at91-fb",
-+ .name = "atmel_lcdfb",
- .id = 0,
- .dev = {
- .dma_mask = &lcdc_dmamask,
-@@ -466,7 +469,7 @@
- .num_resources = ARRAY_SIZE(lcdc_resources),
- };
-
--void __init at91_add_device_lcdc(struct at91fb_info *data)
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
- {
- if (!data) {
- return;
-@@ -499,7 +502,7 @@
- platform_device_register(&at91_lcdc_device);
- }
- #else
--void __init at91_add_device_lcdc(struct at91fb_info *data) {}
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
- #endif
-
-
-@@ -525,6 +528,32 @@
- #endif
-
-
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+ .name = "at91_leds",
-+ .id = -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+ if (!nr)
-+ return;
-+
-+ at91_leds.dev.platform_data = leds;
-+
-+ for ( ; nr; nr--, leds++) {
-+ leds->index = nr; /* first record stores number of leds */
-+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+ }
-+
-+ platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
- * UART
- * -------------------------------------------------------------------- */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9263.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c Tue May 8 12:13:30 2007
-@@ -87,6 +87,11 @@
- .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk can_clk = {
-+ .name = "can_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_CAN,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk twi_clk = {
- .name = "twi_clk",
- .pmc_mask = 1 << AT91SAM9263_ID_TWI,
-@@ -102,16 +107,46 @@
- .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk ssc0_clk = {
-+ .name = "ssc0_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc1_clk = {
-+ .name = "ssc1_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ac97_clk = {
-+ .name = "ac97_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk tcb_clk = {
- .name = "tcb_clk",
- .pmc_mask = 1 << AT91SAM9263_ID_TCB,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk pwmc_clk = {
-+ .name = "pwmc_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk macb_clk = {
- .name = "macb_clk",
- .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
- .type = CLK_TYPE_PERIPHERAL,
- };
-+static struct clk dma_clk = {
-+ .name = "dma_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_DMA,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk twodge_clk = {
-+ .name = "2dge_clk",
-+ .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
- static struct clk udc_clk = {
- .name = "udc_clk",
- .pmc_mask = 1 << AT91SAM9263_ID_UDP,
-@@ -142,20 +177,21 @@
- &usart2_clk,
- &mmc0_clk,
- &mmc1_clk,
-- // can
-+ &can_clk,
- &twi_clk,
- &spi0_clk,
- &spi1_clk,
-- // ssc0 .. ssc1
-- // ac97
-+ &ssc0_clk,
-+ &ssc1_clk,
-+ &ac97_clk,
- &tcb_clk,
-- // pwmc
-+ &pwmc_clk,
- &macb_clk,
-- // 2dge
-+ &twodge_clk,
- &udc_clk,
- &isi_clk,
- &lcdc_clk,
-- // dma
-+ &dma_clk,
- &ohci_clk,
- // irq0 .. irq1
- };
-@@ -237,6 +273,28 @@
-
-
- /* --------------------------------------------------------------------
-+ * Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9263_tcblocks[] = {
-+ [0] = {
-+ .physaddr = AT91SAM9263_BASE_TCB0,
-+ .irq = { AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB },
-+ .clk = { &tcb_clk, &tcb_clk, &tcb_clk },
-+ }
-+};
-+
-+#define at91sam9263_tc_init() atmel_tc_init(at91sam9263_tcblocks, ARRAY_SIZE(at91sam9263_tcblocks))
-+
-+#else
-+#define at91sam9263_tc_init() do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
- * AT91SAM9263 processor initialization
- * -------------------------------------------------------------------- */
-
-@@ -256,6 +314,9 @@
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9263_gpio, 5);
-+
-+ /* Initialize the Timer/Counter blocks */
-+ at91sam9263_tc_init();
- }
-
- /* --------------------------------------------------------------------
-@@ -268,34 +329,34 @@
- static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 7, /* Advanced Interrupt Controller (FIQ) */
- 7, /* System Peripherals */
-- 0, /* Parallel IO Controller A */
-- 0, /* Parallel IO Controller B */
-- 0, /* Parallel IO Controller C, D and E */
-+ 1, /* Parallel IO Controller A */
-+ 1, /* Parallel IO Controller B */
-+ 1, /* Parallel IO Controller C, D and E */
- 0,
- 0,
-- 6, /* USART 0 */
-- 6, /* USART 1 */
-- 6, /* USART 2 */
-+ 5, /* USART 0 */
-+ 5, /* USART 1 */
-+ 5, /* USART 2 */
- 0, /* Multimedia Card Interface 0 */
- 0, /* Multimedia Card Interface 1 */
-- 4, /* CAN */
-- 0, /* Two-Wire Interface */
-- 6, /* Serial Peripheral Interface 0 */
-- 6, /* Serial Peripheral Interface 1 */
-- 5, /* Serial Synchronous Controller 0 */
-- 5, /* Serial Synchronous Controller 1 */
-- 6, /* AC97 Controller */
-+ 3, /* CAN */
-+ 6, /* Two-Wire Interface */
-+ 5, /* Serial Peripheral Interface 0 */
-+ 5, /* Serial Peripheral Interface 1 */
-+ 4, /* Serial Synchronous Controller 0 */
-+ 4, /* Serial Synchronous Controller 1 */
-+ 5, /* AC97 Controller */
- 0, /* Timer Counter 0, 1 and 2 */
- 0, /* Pulse Width Modulation Controller */
- 3, /* Ethernet */
- 0,
- 0, /* 2D Graphic Engine */
-- 3, /* USB Device Port */
-+ 2, /* USB Device Port */
- 0, /* Image Sensor Interface */
- 3, /* LDC Controller */
- 0, /* DMA Controller */
- 0,
-- 3, /* USB Host port */
-+ 2, /* USB Host port */
- 0, /* Advanced Interrupt Controller (IRQ0) */
- 0, /* Advanced Interrupt Controller (IRQ1) */
- };
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c Thu May 10 12:23:46 2007
-@@ -13,6 +13,9 @@
- #include <asm/mach/map.h>
-
- #include <linux/platform_device.h>
-+#include <linux/fb.h>
-+
-+#include <video/atmel_lcdc.h>
-
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
-@@ -573,6 +576,180 @@
-
-
- /* --------------------------------------------------------------------
-+ * AC97
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
-+static u64 ac97_dmamask = 0xffffffffUL;
-+static struct atmel_ac97_data ac97_data;
-+
-+static struct resource ac97_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9263_BASE_AC97C,
-+ .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9263_ID_AC97C,
-+ .end = AT91SAM9263_ID_AC97C,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91sam9263_ac97_device = {
-+ .name = "ac97c",
-+ .id = 1,
-+ .dev = {
-+ .dma_mask = &ac97_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &ac97_data,
-+ },
-+ .resource = ac97_resources,
-+ .num_resources = ARRAY_SIZE(ac97_resources),
-+};
-+
-+void __init at91_add_device_ac97(struct atmel_ac97_data *data)
-+{
-+ if (!data)
-+ return;
-+
-+ at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
-+ at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
-+ at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
-+ at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
-+
-+ /* reset */
-+ if (data->reset_pin)
-+ at91_set_gpio_output(data->reset_pin, 0);
-+
-+ ac97_data = *ek_data;
-+ platform_device_register(&at91sam9263_ac97_device);
-+}
-+#else
-+void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * Image Sensor Interface
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
-+
-+struct resource isi_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9263_BASE_ISI,
-+ .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9263_ID_ISI,
-+ .end = AT91SAM9263_ID_ISI,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91sam9263_isi_device = {
-+ .name = "at91_isi",
-+ .id = -1,
-+ .resource = isi_resources,
-+ .num_resources = ARRAY_SIZE(isi_resources),
-+};
-+
-+void __init at91_add_device_isi(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
-+ at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
-+ at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
-+ at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
-+ at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
-+ at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
-+ at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
-+ at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
-+ at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
-+ at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
-+ at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
-+ at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
-+ at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
-+ at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
-+ at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
-+ at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
-+}
-+#else
-+void __init at91_add_device_isi(void) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * LCD Controller
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static u64 lcdc_dmamask = 0xffffffffUL;
-+static struct atmel_lcdfb_info lcdc_data;
-+
-+static struct resource lcdc_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9263_LCDC_BASE,
-+ .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9263_ID_LCDC,
-+ .end = AT91SAM9263_ID_LCDC,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91_lcdc_device = {
-+ .name = "atmel_lcdfb",
-+ .id = 0,
-+ .dev = {
-+ .dma_mask = &lcdc_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &lcdc_data,
-+ },
-+ .resource = lcdc_resources,
-+ .num_resources = ARRAY_SIZE(lcdc_resources),
-+};
-+
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
-+{
-+ if (!data)
-+ return;
-+
-+ at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
-+ at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
-+ at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
-+ at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
-+ at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
-+ at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
-+ at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
-+ at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
-+ at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
-+ at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
-+ at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
-+ at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
-+ at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
-+ at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
-+ at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
-+ at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
-+ at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
-+ at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
-+ at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
-+ at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
-+ at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
-+ at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
-+
-+ lcdc_data = *data;
-+ platform_device_register(&at91_lcdc_device);
-+}
-+#else
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
- * LEDs
- * -------------------------------------------------------------------- */
-
-@@ -594,6 +771,32 @@
- #endif
-
-
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+ .name = "at91_leds",
-+ .id = -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+ if (!nr)
-+ return;
-+
-+ at91_leds.dev.platform_data = leds;
-+
-+ for ( ; nr; nr--, leds++) {
-+ leds->index = nr; /* first record stores number of leds */
-+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+ }
-+
-+ platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
- * UART
- * -------------------------------------------------------------------- */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c Fri May 11 15:48:14 2007
-@@ -0,0 +1,366 @@
-+/*
-+ * arch/arm/mach-at91/at91sam9rl.c
-+ *
-+ * Copyright (C) 2005 SAN People
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#include <linux/module.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/at91sam9rl.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/at91_rstc.h>
-+
-+#include "generic.h"
-+#include "clock.h"
-+
-+static struct map_desc at91sam9rl_io_desc[] __initdata = {
-+ {
-+ .virtual = AT91_VA_BASE_SYS,
-+ .pfn = __phys_to_pfn(AT91_BASE_SYS),
-+ .length = SZ_16K,
-+ .type = MT_DEVICE,
-+ },
-+};
-+
-+static struct map_desc at91sam9rl_sram_desc[] __initdata = {
-+ {
-+ .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
-+ .type = MT_DEVICE,
-+ }
-+};
-+
-+/* --------------------------------------------------------------------
-+ * Clocks
-+ * -------------------------------------------------------------------- */
-+
-+/*
-+ * The peripheral clocks.
-+ */
-+static struct clk pioA_clk = {
-+ .name = "pioA_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_PIOA,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk pioB_clk = {
-+ .name = "pioB_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_PIOB,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk pioC_clk = {
-+ .name = "pioC_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_PIOC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk pioD_clk = {
-+ .name = "pioD_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_PIOD,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk usart0_clk = {
-+ .name = "usart0_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_US0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk usart1_clk = {
-+ .name = "usart1_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_US1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk usart2_clk = {
-+ .name = "usart2_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_US2,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk usart3_clk = {
-+ .name = "usart3_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_US3,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk mmc_clk = {
-+ .name = "mci_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_MCI,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk twi0_clk = {
-+ .name = "twi0_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TWI0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk twi1_clk = {
-+ .name = "twi1_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TWI1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk spi_clk = {
-+ .name = "spi_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_SPI,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc0_clk = {
-+ .name = "ssc0_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_SSC0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ssc1_clk = {
-+ .name = "ssc1_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_SSC1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk tc0_clk = {
-+ .name = "tc0_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TC0,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk tc1_clk = {
-+ .name = "tc1_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TC1,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk tc2_clk = {
-+ .name = "tc2_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TC2,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk pwmc_clk = {
-+ .name = "pwmc_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk tsc_clk = {
-+ .name = "tsc_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_TSC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk dma_clk = {
-+ .name = "dma_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_DMA,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk udphs_clk = {
-+ .name = "udphs_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_UDPHS,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk lcdc_clk = {
-+ .name = "lcdc_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_LCDC,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+static struct clk ac97_clk = {
-+ .name = "ac97_clk",
-+ .pmc_mask = 1 << AT91SAM9RL_ID_AC97C,
-+ .type = CLK_TYPE_PERIPHERAL,
-+};
-+
-+static struct clk *periph_clocks[] __initdata = {
-+ &pioA_clk,
-+ &pioB_clk,
-+ &pioC_clk,
-+ &pioD_clk,
-+ &usart0_clk,
-+ &usart1_clk,
-+ &usart2_clk,
-+ &usart3_clk,
-+ &mmc_clk,
-+ &twi0_clk,
-+ &twi1_clk,
-+ &spi_clk,
-+ &ssc0_clk,
-+ &ssc1_clk,
-+ &tc0_clk,
-+ &tc1_clk,
-+ &tc2_clk,
-+ &pwmc_clk,
-+ &tsc_clk,
-+ &dma_clk,
-+ &udphs_clk,
-+ &lcdc_clk,
-+ &ac97_clk,
-+ // irq0
-+};
-+
-+/*
-+ * The two programmable clocks.
-+ * You must configure pin multiplexing to bring these signals out.
-+ */
-+static struct clk pck0 = {
-+ .name = "pck0",
-+ .pmc_mask = AT91_PMC_PCK0,
-+ .type = CLK_TYPE_PROGRAMMABLE,
-+ .id = 0,
-+};
-+static struct clk pck1 = {
-+ .name = "pck1",
-+ .pmc_mask = AT91_PMC_PCK1,
-+ .type = CLK_TYPE_PROGRAMMABLE,
-+ .id = 1,
-+};
-+
-+static void __init at91sam9rl_register_clocks(void)
-+{
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-+ clk_register(periph_clocks[i]);
-+
-+ clk_register(&pck0);
-+ clk_register(&pck1);
-+}
-+
-+/* --------------------------------------------------------------------
-+ * GPIO
-+ * -------------------------------------------------------------------- */
-+
-+static struct at91_gpio_bank at91sam9rl_gpio[] = {
-+ {
-+ .id = AT91SAM9RL_ID_PIOA,
-+ .offset = AT91_PIOA,
-+ .clock = &pioA_clk,
-+ }, {
-+ .id = AT91SAM9RL_ID_PIOB,
-+ .offset = AT91_PIOB,
-+ .clock = &pioB_clk,
-+ }, {
-+ .id = AT91SAM9RL_ID_PIOC,
-+ .offset = AT91_PIOC,
-+ .clock = &pioC_clk,
-+ }, {
-+ .id = AT91SAM9RL_ID_PIOD,
-+ .offset = AT91_PIOD,
-+ .clock = &pioD_clk,
-+ }
-+};
-+
-+static void at91sam9rl_reset(void)
-+{
-+ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-+}
-+
-+
-+/* --------------------------------------------------------------------
-+ * Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9rl_tcblocks[] = {
-+ [0] = {
-+ .physaddr = AT91SAM9RL_BASE_TCB0,
-+ .irq = { AT91SAM9RL_ID_TC0, AT91SAM9RL_ID_TC1, AT91SAM9RL_ID_TC2 },
-+ .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
-+ }
-+};
-+
-+#define at91sam9rl_tc_init() atmel_tc_init(at91sam9rl_tcblocks, ARRAY_SIZE(at91sam9rl_tcblocks))
-+
-+#else
-+#define at91sam9rl_tc_init() do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * AT91SAM9RL processor initialization
-+ * -------------------------------------------------------------------- */
-+
-+void __init at91sam9rl_initialize(unsigned long main_clock)
-+{
-+ unsigned long cidr, sram_size;
-+
-+ /* Map peripherals */
-+ iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
-+
-+ cidr = at91_sys_read(AT91_DBGU_CIDR);
-+
-+ switch (cidr & AT91_CIDR_SRAMSIZ) {
-+ case AT91_CIDR_SRAMSIZ_32K:
-+ sram_size = 2 * SZ_16K;
-+ break;
-+ case AT91_CIDR_SRAMSIZ_16K:
-+ default:
-+ sram_size = SZ_16K;
-+ }
-+
-+ at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
-+ at91sam9rl_sram_desc->length = sram_size;
-+
-+ /* Map SRAM */
-+ iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
-+
-+ at91_arch_reset = at91sam9rl_reset;
-+ at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
-+
-+ /* Init clock subsystem */
-+ at91_clock_init(main_clock);
-+
-+ /* Register the processor-specific clocks */
-+ at91sam9rl_register_clocks();
-+
-+ /* Register GPIO subsystem */
-+ at91_gpio_init(at91sam9rl_gpio, 4);
-+
-+ /* Initialize the Timer/Counter blocks */
-+ at91sam9rl_tc_init();
-+}
-+
-+/* --------------------------------------------------------------------
-+ * Interrupt initialization
-+ * -------------------------------------------------------------------- */
-+
-+/*
-+ * The default interrupt priority levels (0 = lowest, 7 = highest).
-+ */
-+static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
-+ 7, /* Advanced Interrupt Controller */
-+ 7, /* System Peripherals */
-+ 1, /* Parallel IO Controller A */
-+ 1, /* Parallel IO Controller B */
-+ 1, /* Parallel IO Controller C */
-+ 1, /* Parallel IO Controller D */
-+ 5, /* USART 0 */
-+ 5, /* USART 1 */
-+ 5, /* USART 2 */
-+ 5, /* USART 3 */
-+ 0, /* Multimedia Card Interface */
-+ 6, /* Two-Wire Interface 0 */
-+ 6, /* Two-Wire Interface 1 */
-+ 5, /* Serial Peripheral Interface */
-+ 4, /* Serial Synchronous Controller 0 */
-+ 4, /* Serial Synchronous Controller 1 */
-+ 0, /* Timer Counter 0 */
-+ 0, /* Timer Counter 1 */
-+ 0, /* Timer Counter 2 */
-+ 0,
-+ 0, /* Touch Screen Controller */
-+ 0, /* DMA Controller */
-+ 2, /* USB Device High speed port */
-+ 2, /* LCD Controller */
-+ 6, /* AC97 Controller */
-+ 0,
-+ 0,
-+ 0,
-+ 0,
-+ 0,
-+ 0,
-+ 0, /* Advanced Interrupt Controller */
-+};
-+
-+void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-+{
-+ if (!priority)
-+ priority = at91sam9rl_default_irq_priority;
-+
-+ /* Initialize the AIC interrupt controller */
-+ at91_aic_init(priority);
-+
-+ /* Enable GPIO interrupts */
-+ at91_gpio_irq_setup();
-+}
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c
---- linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c Fri May 11 16:03:25 2007
-@@ -0,0 +1,660 @@
-+/*
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+
-+#include <linux/platform_device.h>
-+#include <linux/fb.h>
-+
-+#include <video/atmel_lcdc.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91sam9rl.h>
-+#include <asm/arch/at91sam9rl_matrix.h>
-+#include <asm/arch/at91sam926x_mc.h>
-+
-+#include "generic.h"
-+
-+#define SZ_512 0x00000200
-+#define SZ_256 0x00000100
-+#define SZ_16 0x00000010
-+
-+
-+/* --------------------------------------------------------------------
-+ * MMC / SD
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-+static u64 mmc_dmamask = 0xffffffffUL;
-+static struct at91_mmc_data mmc_data;
-+
-+static struct resource mmc_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_MCI,
-+ .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_MCI,
-+ .end = AT91SAM9RL_ID_MCI,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91sam9rl_mmc_device = {
-+ .name = "at91_mci",
-+ .id = -1,
-+ .dev = {
-+ .dma_mask = &mmc_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &mmc_data,
-+ },
-+ .resource = mmc_resources,
-+ .num_resources = ARRAY_SIZE(mmc_resources),
-+};
-+
-+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
-+{
-+ if (!data)
-+ return;
-+
-+ /* input/irq */
-+ if (data->det_pin) {
-+ at91_set_gpio_input(data->det_pin, 1);
-+ at91_set_deglitch(data->det_pin, 1);
-+ }
-+ if (data->wp_pin)
-+ at91_set_gpio_input(data->wp_pin, 1);
-+ if (data->vcc_pin)
-+ at91_set_gpio_output(data->vcc_pin, 0);
-+
-+ /* CLK */
-+ at91_set_A_periph(AT91_PIN_PA2, 0);
-+
-+ /* CMD */
-+ at91_set_A_periph(AT91_PIN_PA1, 1);
-+
-+ /* DAT0, maybe DAT1..DAT3 */
-+ at91_set_A_periph(AT91_PIN_PA0, 1);
-+ if (data->wire4) {
-+ at91_set_A_periph(AT91_PIN_PA3, 1);
-+ at91_set_A_periph(AT91_PIN_PA4, 1);
-+ at91_set_A_periph(AT91_PIN_PA5, 1);
-+ }
-+
-+ mmc_data = *data;
-+ platform_device_register(&at91sam9rl_mmc_device);
-+}
-+#else
-+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * NAND / SmartMedia
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
-+static struct at91_nand_data nand_data;
-+
-+#define NAND_BASE AT91_CHIPSELECT_3
-+
-+static struct resource nand_resources[] = {
-+ {
-+ .start = NAND_BASE,
-+ .end = NAND_BASE + SZ_256M - 1,
-+ .flags = IORESOURCE_MEM,
-+ }
-+};
-+
-+static struct platform_device at91_nand_device = {
-+ .name = "at91_nand",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &nand_data,
-+ },
-+ .resource = nand_resources,
-+ .num_resources = ARRAY_SIZE(nand_resources),
-+};
-+
-+void __init at91_add_device_nand(struct at91_nand_data *data)
-+{
-+ unsigned long csa;
-+
-+ if (!data)
-+ return;
-+
-+ csa = at91_sys_read(AT91_MATRIX_EBICSA);
-+ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
-+
-+ /* set the bus interface characteristics */
-+ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
-+ | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
-+
-+ at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
-+ | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
-+
-+ at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
-+
-+ at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
-+
-+ /* enable pin */
-+ if (data->enable_pin)
-+ at91_set_gpio_output(data->enable_pin, 1);
-+
-+ /* ready/busy pin */
-+ if (data->rdy_pin)
-+ at91_set_gpio_input(data->rdy_pin, 1);
-+
-+ /* card detect pin */
-+ if (data->det_pin)
-+ at91_set_gpio_input(data->det_pin, 1);
-+
-+ at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
-+ at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
-+
-+ nand_data = *data;
-+ platform_device_register(&at91_nand_device);
-+}
-+
-+#else
-+void __init at91_add_device_nand(struct at91_nand_data *data) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * TWI (i2c)
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
-+
-+static struct resource twi_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_TWI0,
-+ .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_TWI0,
-+ .end = AT91SAM9RL_ID_TWI0,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91sam9rl_twi_device = {
-+ .name = "at91_i2c",
-+ .id = -1,
-+ .resource = twi_resources,
-+ .num_resources = ARRAY_SIZE(twi_resources),
-+};
-+
-+void __init at91_add_device_i2c(void)
-+{
-+ /* pins used for TWI interface */
-+ at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
-+ at91_set_multi_drive(AT91_PIN_PA23, 1);
-+
-+ at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
-+ at91_set_multi_drive(AT91_PIN_PA24, 1);
-+
-+ platform_device_register(&at91sam9rl_twi_device);
-+}
-+#else
-+void __init at91_add_device_i2c(void) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * SPI
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-+static u64 spi_dmamask = 0xffffffffUL;
-+
-+static struct resource spi_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_SPI,
-+ .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_SPI,
-+ .end = AT91SAM9RL_ID_SPI,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device at91sam9rl_spi_device = {
-+ .name = "atmel_spi",
-+ .id = 0,
-+ .dev = {
-+ .dma_mask = &spi_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = spi_resources,
-+ .num_resources = ARRAY_SIZE(spi_resources),
-+};
-+
-+static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
-+
-+
-+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
-+{
-+ int i;
-+ unsigned long cs_pin;
-+
-+ at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */
-+ at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */
-+ at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */
-+
-+ /* Enable SPI chip-selects */
-+ for (i = 0; i < nr_devices; i++) {
-+ if (devices[i].controller_data)
-+ cs_pin = (unsigned long) devices[i].controller_data;
-+ else
-+ cs_pin = spi_standard_cs[devices[i].chip_select];
-+
-+ /* enable chip-select pin */
-+ at91_set_gpio_output(cs_pin, 1);
-+
-+ /* pass chip-select pin to driver */
-+ devices[i].controller_data = (void *) cs_pin;
-+ }
-+
-+ spi_register_board_info(devices, nr_devices);
-+ platform_device_register(&at91sam9rl_spi_device);
-+}
-+#else
-+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * LCD Controller
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static u64 lcdc_dmamask = 0xffffffffUL;
-+static struct atmel_lcdfb_info lcdc_data;
-+
-+static struct resource lcdc_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_LCDC_BASE,
-+ .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_LCDC,
-+ .end = AT91SAM9RL_ID_LCDC,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+#if defined(CONFIG_FB_INTSRAM)
-+ [2] = {
-+ .start = AT91SAM9RL_SRAM_BASE,
-+ .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+#endif
-+};
-+
-+static struct platform_device at91_lcdc_device = {
-+ .name = "atmel_lcdfb",
-+ .id = 0,
-+ .dev = {
-+ .dma_mask = &lcdc_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &lcdc_data,
-+ },
-+ .resource = lcdc_resources,
-+ .num_resources = ARRAY_SIZE(lcdc_resources),
-+};
-+
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
-+{
-+ if (!data) {
-+ return;
-+ }
-+
-+#warning "Check this"
-+ at91_set_B_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
-+ at91_set_B_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
-+ at91_set_B_periph(AT91_PIN_PC7, 0); /* LCDDEN */
-+ at91_set_B_periph(AT91_PIN_PC3, 0); /* LCDCC */
-+ at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
-+ at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
-+ at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
-+ at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
-+ at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
-+ at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
-+ at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
-+ at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
-+ at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
-+ at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
-+ at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
-+ at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
-+ at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
-+ at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
-+ at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
-+ at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
-+
-+ lcdc_data = *data;
-+ platform_device_register(&at91_lcdc_device);
-+}
-+#else
-+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * LEDs
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_LEDS)
-+u8 at91_leds_cpu;
-+u8 at91_leds_timer;
-+
-+void __init at91_init_leds(u8 cpu_led, u8 timer_led)
-+{
-+ /* Enable GPIO to access the LEDs */
-+ at91_set_gpio_output(cpu_led, 1);
-+ at91_set_gpio_output(timer_led, 1);
-+
-+ at91_leds_cpu = cpu_led;
-+ at91_leds_timer = timer_led;
-+}
-+#else
-+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
-+#endif
-+
-+
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+ .name = "at91_leds",
-+ .id = -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+ if (!nr)
-+ return;
-+
-+ at91_leds.dev.platform_data = leds;
-+
-+ for ( ; nr; nr--, leds++) {
-+ leds->index = nr; /* first record stores number of leds */
-+ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+ }
-+
-+ platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-+ * UART
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_SERIAL_ATMEL)
-+static struct resource dbgu_resources[] = {
-+ [0] = {
-+ .start = AT91_VA_BASE_SYS + AT91_DBGU,
-+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91_ID_SYS,
-+ .end = AT91_ID_SYS,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct atmel_uart_data dbgu_data = {
-+ .use_dma_tx = 0,
-+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */
-+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
-+};
-+
-+static struct platform_device at91sam9rl_dbgu_device = {
-+ .name = "atmel_usart",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &dbgu_data,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = dbgu_resources,
-+ .num_resources = ARRAY_SIZE(dbgu_resources),
-+};
-+
-+static inline void configure_dbgu_pins(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */
-+ at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */
-+}
-+
-+static struct resource uart0_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_US0,
-+ .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_US0,
-+ .end = AT91SAM9RL_ID_US0,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct atmel_uart_data uart0_data = {
-+ .use_dma_tx = 1,
-+ .use_dma_rx = 1,
-+};
-+
-+static struct platform_device at91sam9rl_uart0_device = {
-+ .name = "atmel_usart",
-+ .id = 1,
-+ .dev = {
-+ .platform_data = &uart0_data,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = uart0_resources,
-+ .num_resources = ARRAY_SIZE(uart0_resources),
-+};
-+
-+static inline void configure_usart0_pins(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */
-+ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
-+ at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */
-+ at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */
-+}
-+
-+static struct resource uart1_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_US1,
-+ .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_US1,
-+ .end = AT91SAM9RL_ID_US1,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct atmel_uart_data uart1_data = {
-+ .use_dma_tx = 1,
-+ .use_dma_rx = 1,
-+};
-+
-+static struct platform_device at91sam9rl_uart1_device = {
-+ .name = "atmel_usart",
-+ .id = 2,
-+ .dev = {
-+ .platform_data = &uart1_data,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = uart1_resources,
-+ .num_resources = ARRAY_SIZE(uart1_resources),
-+};
-+
-+static inline void configure_usart1_pins(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */
-+ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */
-+}
-+
-+static struct resource uart2_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_US2,
-+ .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_US2,
-+ .end = AT91SAM9RL_ID_US2,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct atmel_uart_data uart2_data = {
-+ .use_dma_tx = 1,
-+ .use_dma_rx = 1,
-+};
-+
-+static struct platform_device at91sam9rl_uart2_device = {
-+ .name = "atmel_usart",
-+ .id = 3,
-+ .dev = {
-+ .platform_data = &uart2_data,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = uart2_resources,
-+ .num_resources = ARRAY_SIZE(uart2_resources),
-+};
-+
-+static inline void configure_usart2_pins(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */
-+ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */
-+}
-+
-+static struct resource uart3_resources[] = {
-+ [0] = {
-+ .start = AT91SAM9RL_BASE_US3,
-+ .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = AT91SAM9RL_ID_US3,
-+ .end = AT91SAM9RL_ID_US3,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct atmel_uart_data uart3_data = {
-+ .use_dma_tx = 1,
-+ .use_dma_rx = 1,
-+};
-+
-+static struct platform_device at91sam9rl_uart3_device = {
-+ .name = "atmel_usart",
-+ .id = 4,
-+ .dev = {
-+ .platform_data = &uart3_data,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+ .resource = uart3_resources,
-+ .num_resources = ARRAY_SIZE(uart3_resources),
-+};
-+
-+static inline void configure_usart3_pins(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */
-+ at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */
-+}
-+
-+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-+struct platform_device *atmel_default_console_device; /* the serial console device */
-+
-+void __init at91_init_serial(struct at91_uart_config *config)
-+{
-+ int i;
-+
-+ /* Fill in list of supported UARTs */
-+ for (i = 0; i < config->nr_tty; i++) {
-+ switch (config->tty_map[i]) {
-+ case 0:
-+ configure_usart0_pins();
-+ at91_uarts[i] = &at91sam9rl_uart0_device;
-+ at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
-+ break;
-+ case 1:
-+ configure_usart1_pins();
-+ at91_uarts[i] = &at91sam9rl_uart1_device;
-+ at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
-+ break;
-+ case 2:
-+ configure_usart2_pins();
-+ at91_uarts[i] = &at91sam9rl_uart2_device;
-+ at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
-+ break;
-+ case 3:
-+ configure_usart3_pins();
-+ at91_uarts[i] = &at91sam9rl_uart3_device;
-+ at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
-+ break;
-+ case 4:
-+ configure_dbgu_pins();
-+ at91_uarts[i] = &at91sam9rl_dbgu_device;
-+ at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
-+ break;
-+ default:
-+ continue;
-+ }
-+ at91_uarts[i]->id = i; /* update ID number to mapped ID */
-+ }
-+
-+ /* Set serial console device */
-+ if (config->console_tty < ATMEL_MAX_UART)
-+ atmel_default_console_device = at91_uarts[config->console_tty];
-+ if (!atmel_default_console_device)
-+ printk(KERN_INFO "AT91: No default serial console defined.\n");
-+}
-+
-+void __init at91_add_device_serial(void)
-+{
-+ int i;
-+
-+ for (i = 0; i < ATMEL_MAX_UART; i++) {
-+ if (at91_uarts[i])
-+ platform_device_register(at91_uarts[i]);
-+ }
-+}
-+#else
-+void __init at91_init_serial(struct at91_uart_config *config) {}
-+void __init at91_add_device_serial(void) {}
-+#endif
-+
-+
-+/* -------------------------------------------------------------------- */
-+
-+/*
-+ * These devices are always present and don't need any board-specific
-+ * setup.
-+ */
-+static int __init at91_add_standard_devices(void)
-+{
-+ return 0;
-+}
-+
-+arch_initcall(at91_add_standard_devices);
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-cam60.c linux-2.6-stable/arch/arm/mach-at91/board-cam60.c
---- linux-2.6.21/arch/arm/mach-at91/board-cam60.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/board-cam60.c Tue May 8 12:13:30 2007
-@@ -0,0 +1,148 @@
-+/*
-+ * KwikByte CAM60
-+ *
-+ * based on board-sam9260ek.c
-+ * Copyright (C) 2005 SAN People
-+ * Copyright (C) 2006 Atmel
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91sam926x_mc.h>
-+
-+#include "generic.h"
-+
-+
-+/*
-+ * Serial port configuration.
-+ * 0 .. 5 = USART0 .. USART5
-+ * 6 = DBGU
-+ */
-+static struct at91_uart_config __initdata cam60_uart_config = {
-+ .console_tty = 0, /* ttyS0 */
-+ .nr_tty = 1,
-+ .tty_map = { 6, -1, -1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
-+};
-+
-+static void __init cam60_map_io(void)
-+{
-+ /* Initialize processor: 10 MHz crystal */
-+ at91sam9260_initialize(10000000);
-+
-+ /* Setup the serial ports and console */
-+ at91_init_serial(&cam60_uart_config);
-+}
-+
-+static void __init cam60_init_irq(void)
-+{
-+ at91sam9260_init_interrupts(NULL);
-+}
-+
-+
-+/*
-+ * SPI devices.
-+ */
-+#if defined(CONFIG_MTD_DATAFLASH)
-+static struct mtd_partition __initdata cam60_spi_partitions[] = {
-+ {
-+ .name = "BOOT1",
-+ .offset = 0,
-+ .size = 4 * 1056,
-+ },
-+ {
-+ .name = "BOOT2",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 256 * 1056,
-+ },
-+ {
-+ .name = "kernel",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 2222 * 1056,
-+ },
-+ {
-+ .name = "file system",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = MTDPART_SIZ_FULL,
-+ },
-+};
-+
-+static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
-+ .name = "spi_flash",
-+ .parts = cam60_spi_partitions,
-+ .nr_parts = ARRAY_SIZE(cam60_spi_partitions)
-+};
-+#endif
-+
-+static struct spi_board_info cam60_spi_devices[] = {
-+#if defined(CONFIG_MTD_DATAFLASH)
-+ { /* DataFlash chip */
-+ .modalias = "mtd_dataflash",
-+ .chip_select = 0,
-+ .max_speed_hz = 15 * 1000 * 1000,
-+ .bus_num = 0,
-+ .platform_data = &cam60_spi_flash_platform_data
-+ },
-+#endif
-+};
-+
-+
-+/*
-+ * MACB Ethernet device
-+ */
-+static struct __initdata at91_eth_data cam60_macb_data = {
-+ .phy_irq_pin = AT91_PIN_PB5,
-+ .is_rmii = 0,
-+};
-+
-+
-+static void __init cam60_board_init(void)
-+{
-+ /* Serial */
-+ at91_add_device_serial();
-+ /* SPI */
-+ at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
-+ /* Ethernet */
-+ at91_add_device_eth(&cam60_macb_data);
-+}
-+
-+MACHINE_START(CAM60, "KwikByte CAM60")
-+ /* Maintainer: KwikByte */
-+ .phys_io = AT91_BASE_SYS,
-+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+ .boot_params = AT91_SDRAM_BASE + 0x100,
-+ .timer = &at91sam926x_timer,
-+ .map_io = cam60_map_io,
-+ .init_irq = cam60_init_irq,
-+ .init_machine = cam60_board_init,
-+MACHINE_END
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-chub.c linux-2.6-stable/arch/arm/mach-at91/board-chub.c
---- linux-2.6.21/arch/arm/mach-at91/board-chub.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/board-chub.c Tue May 8 12:13:30 2007
-@@ -0,0 +1,132 @@
-+/*
-+ * linux/arch/arm/mach-at91/board-chub.c
-+ *
-+ * Copyright (C) 2005 SAN People, adapted for Promwad Chub board
-+ * by Kuten Ivan
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#include "generic.h"
-+
-+/*
-+ * Serial port configuration.
-+ * 0 .. 3 = USART0 .. USART3
-+ * 4 = DBGU
-+ */
-+static struct at91_uart_config __initdata chub_uart_config = {
-+ .console_tty = 0, /* ttyS0 */
-+ .nr_tty = 5,
-+ .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
-+};
-+
-+static void __init chub_init_irq(void)
-+{
-+ at91rm9200_init_interrupts(NULL);
-+}
-+
-+static void __init chub_map_io(void)
-+{
-+ /* Initialize clocks: 18.432 MHz crystal */
-+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
-+
-+ /* Setup the serial ports and console */
-+ at91_init_serial(&chub_uart_config);
-+}
-+
-+static struct at91_eth_data __initdata chub_eth_data = {
-+ .phy_irq_pin = AT91_PIN_PB29,
-+ .is_rmii = 0,
-+};
-+
-+static struct mtd_partition __initdata chub_nand_partition[] = {
-+ {
-+ .name = "NAND Partition 1",
-+ .offset = 0,
-+ .size = MTDPART_SIZ_FULL,
-+ },
-+};
-+
-+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
-+{
-+ *num_partitions = ARRAY_SIZE(chub_nand_partition);
-+ return chub_nand_partition;
-+}
-+
-+static struct at91_nand_data __initdata chub_nand_data = {
-+ .ale = 22,
-+ .cle = 21,
-+ .enable_pin = AT91_PIN_PA27,
-+ .partition_info = nand_partitions,
-+};
-+
-+static struct spi_board_info chub_spi_devices[] = {
-+ { /* DataFlash chip */
-+ .modalias = "mtd_dataflash",
-+ .chip_select = 0,
-+ .max_speed_hz = 15 * 1000 * 1000,
-+ },
-+};
-+
-+static void __init chub_board_init(void)
-+{
-+ /* Serial */
-+ at91_add_device_serial();
-+ /* I2C */
-+ at91_add_device_i2c();
-+ /* Ethernet */
-+ at91_add_device_eth(&chub_eth_data);
-+ /* SPI */
-+ at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
-+ /* NAND Flash */
-+ at91_add_device_nand(&chub_nand_data);
-+ /* Disable write protect for NAND */
-+ at91_set_gpio_output(AT91_PIN_PB7, 1);
-+ /* Power enable for 3x RS-232 and 1x RS-485 */
-+ at91_set_gpio_output(AT91_PIN_PB9, 1);
-+ /* Disable write protect for FRAM */
-+ at91_set_gpio_output(AT91_PIN_PA21, 1);
-+ /* Disable write protect for Dataflash */
-+ at91_set_gpio_output(AT91_PIN_PA19, 1);
-+}
-+
-+MACHINE_START(CHUB, "Promwad Chub")
-+ /* Maintainer: Ivan Kuten AT Promwad DOT com */
-+ .phys_io = AT91_BASE_SYS,
-+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+ .boot_params = AT91_SDRAM_BASE + 0x100,
-+ .timer = &at91rm9200_timer,
-+ .map_io = chub_map_io,
-+ .init_irq = chub_init_irq,
-+ .init_machine = chub_board_init,
-+MACHINE_END
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-csb337.c linux-2.6-stable/arch/arm/mach-at91/board-csb337.c
---- linux-2.6.21/arch/arm/mach-at91/board-csb337.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-csb337.c Tue May 8 12:13:30 2007
-@@ -24,6 +24,7 @@
- #include <linux/module.h>
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
-+#include <linux/interrupt.h>
- #include <linux/mtd/physmap.h>
-
- #include <asm/hardware.h>
-@@ -59,6 +60,7 @@
-
- /* Setup the LEDs */
- at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
-+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* third (unused) LED */
-
- /* Setup the serial ports and console */
- at91_init_serial(&csb337_uart_config);
-@@ -149,6 +151,55 @@
- .num_resources = ARRAY_SIZE(csb_flash_resources),
- };
-
-+static struct at91_gpio_led csb337_leds[] = {
-+ {
-+ .name = "led0",
-+ .gpio = AT91_PIN_PB0,
-+ .trigger = "heartbeat",
-+ },
-+ {
-+ .name = "led1",
-+ .gpio = AT91_PIN_PB1,
-+ .trigger = "timer",
-+ },
-+ {
-+ .name = "led2",
-+ .gpio = AT91_PIN_PB2,
-+ }
-+};
-+
-+#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1)
-+static irqreturn_t switch_irq_handler(int irq, void *context)
-+{
-+ return IRQ_HANDLED;
-+}
-+
-+static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode)
-+{
-+ int res;
-+
-+ res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL);
-+ if (res == 0)
-+ enable_irq_wake(irq);
-+}
-+
-+static void __init csb300_switches(void)
-+{
-+#ifdef CONFIG_CSB300_WAKE_SW0
-+ at91_set_A_periph(AT91_PIN_PB29, 1); /* IRQ0 */
-+ switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING);
-+#endif
-+#ifdef CONFIG_CSB300_WAKE_SW1
-+ at91_set_gpio_input(AT91_PIN_PB28, 1);
-+ at91_set_deglitch(AT91_PIN_PB28, 1);
-+ switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING);
-+#endif
-+ /* there's also SW2 at PA21, GPIO or TIOA2 */
-+}
-+#else
-+static void __init csb300_switches(void) {}
-+#endif
-+
- static void __init csb337_board_init(void)
- {
- /* Serial */
-@@ -168,8 +219,12 @@
- at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
- /* MMC */
- at91_add_device_mmc(0, &csb337_mmc_data);
-+ /* LEDS */
-+ at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds));
- /* NOR flash */
- platform_device_register(&csb_flash);
-+ /* Switches on CSB300 */
-+ csb300_switches();
- }
-
- MACHINE_START(CSB337, "Cogent CSB337")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-dk.c linux-2.6-stable/arch/arm/mach-at91/board-dk.c
---- linux-2.6.21/arch/arm/mach-at91/board-dk.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-dk.c Tue May 8 14:29:12 2007
-@@ -73,6 +73,185 @@
- at91rm9200_init_interrupts(NULL);
- }
-
-+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
-+#include <video/s1d13xxxfb.h>
-+#include <asm/arch/ics1523.h>
-+
-+/* EPSON S1D13806 FB */
-+#define AT91_FB_REG_BASE 0x30000000L
-+#define AT91_FB_REG_SIZE 0x200
-+#define AT91_FB_VMEM_BASE 0x30200000L
-+#define AT91_FB_VMEM_SIZE 0x140000L
-+
-+static void __init dk_init_video(void)
-+{
-+ /* NWAIT Signal */
-+ at91_set_A_periph(AT91_PIN_PC6, 0);
-+
-+ /* Initialization of the Static Memory Controller for Chip Select 2 */
-+ at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
-+ | AT91_SMC_WSEN | AT91_SMC_NWS_(4) /* wait states */
-+ | AT91_SMC_TDF_(1) /* float time */
-+ );
-+
-+ at91_ics1523_init();
-+}
-+
-+/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
-+ Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
-+static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
-+ {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
-+ {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
-+ {S1DREG_GPIO_CNF0, 0x00},
-+ {S1DREG_GPIO_CNF1, 0x00},
-+ {S1DREG_GPIO_CTL0, 0x08},
-+ {S1DREG_GPIO_CTL1, 0x00},
-+ {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
-+ {S1DREG_LCD_CLK_CNF, 0x00},
-+ {S1DREG_CRT_CLK_CNF, 0x00},
-+ {S1DREG_MPLUG_CLK_CNF, 0x00},
-+ {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
-+ {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
-+ {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
-+ {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
-+ {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
-+ {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
-+ {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
-+ {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
-+ {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
-+ {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
-+ {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
-+ {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
-+ {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
-+ {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
-+ {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
-+ {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
-+ {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
-+ {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
-+ {S1DREG_LCD_DISP_START0, 0x00},
-+ {S1DREG_LCD_DISP_START1, 0xC8},
-+ {S1DREG_LCD_DISP_START2, 0x00},
-+ {S1DREG_LCD_MEM_OFF0, 0x80},
-+ {S1DREG_LCD_MEM_OFF1, 0x02},
-+ {S1DREG_LCD_PIX_PAN, 0x00},
-+ {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
-+ {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
-+ {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
-+ {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
-+ {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
-+ {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
-+ {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
-+ {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
-+ {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
-+ {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
-+ {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
-+ {S1DREG_TV_OUT_CTL, 0x10},
-+ {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
-+ {S1DREG_CRT_DISP_START0, 0x00},
-+ {S1DREG_CRT_DISP_START1, 0x00},
-+ {S1DREG_CRT_DISP_START2, 0x00},
-+ {S1DREG_CRT_MEM_OFF0, 0x80},
-+ {S1DREG_CRT_MEM_OFF1, 0x02},
-+ {S1DREG_CRT_PIX_PAN, 0x00},
-+ {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
-+ {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
-+ {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
-+ {S1DREG_LCD_CUR_START, 0x01},
-+ {S1DREG_LCD_CUR_XPOS0, 0x00},
-+ {S1DREG_LCD_CUR_XPOS1, 0x00},
-+ {S1DREG_LCD_CUR_YPOS0, 0x00},
-+ {S1DREG_LCD_CUR_YPOS1, 0x00},
-+ {S1DREG_LCD_CUR_BCTL0, 0x00},
-+ {S1DREG_LCD_CUR_GCTL0, 0x00},
-+ {S1DREG_LCD_CUR_RCTL0, 0x00},
-+ {S1DREG_LCD_CUR_BCTL1, 0x1F},
-+ {S1DREG_LCD_CUR_GCTL1, 0x3F},
-+ {S1DREG_LCD_CUR_RCTL1, 0x1F},
-+ {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
-+ {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
-+ {S1DREG_CRT_CUR_START, 0x01},
-+ {S1DREG_CRT_CUR_XPOS0, 0x00},
-+ {S1DREG_CRT_CUR_XPOS1, 0x00},
-+ {S1DREG_CRT_CUR_YPOS0, 0x00},
-+ {S1DREG_CRT_CUR_YPOS1, 0x00},
-+ {S1DREG_CRT_CUR_BCTL0, 0x00},
-+ {S1DREG_CRT_CUR_GCTL0, 0x00},
-+ {S1DREG_CRT_CUR_RCTL0, 0x00},
-+ {S1DREG_CRT_CUR_BCTL1, 0x1F},
-+ {S1DREG_CRT_CUR_GCTL1, 0x3F},
-+ {S1DREG_CRT_CUR_RCTL1, 0x1F},
-+ {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
-+ {S1DREG_BBLT_CTL0, 0x00},
-+ {S1DREG_BBLT_CTL0, 0x00},
-+ {S1DREG_BBLT_CC_EXP, 0x00},
-+ {S1DREG_BBLT_OP, 0x00},
-+ {S1DREG_BBLT_SRC_START0, 0x00},
-+ {S1DREG_BBLT_SRC_START1, 0x00},
-+ {S1DREG_BBLT_SRC_START2, 0x00},
-+ {S1DREG_BBLT_DST_START0, 0x00},
-+ {S1DREG_BBLT_DST_START1, 0x00},
-+ {S1DREG_BBLT_DST_START2, 0x00},
-+ {S1DREG_BBLT_MEM_OFF0, 0x00},
-+ {S1DREG_BBLT_MEM_OFF1, 0x00},
-+ {S1DREG_BBLT_WIDTH0, 0x00},
-+ {S1DREG_BBLT_WIDTH1, 0x00},
-+ {S1DREG_BBLT_HEIGHT0, 0x00},
-+ {S1DREG_BBLT_HEIGHT1, 0x00},
-+ {S1DREG_BBLT_BGC0, 0x00},
-+ {S1DREG_BBLT_BGC1, 0x00},
-+ {S1DREG_BBLT_FGC0, 0x00},
-+ {S1DREG_BBLT_FGC1, 0x00},
-+ {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
-+ {S1DREG_LKUP_ADDR, 0x00},
-+ {S1DREG_PS_CNF, 0x00}, /* Power Save disable */
-+ {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
-+ {S1DREG_CPU2MEM_WDOGT, 0x00},
-+ {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
-+};
-+
-+static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
-+ .initregs = dk_s1dfb_initregs,
-+ .initregssize = ARRAY_SIZE(dk_s1dfb_initregs),
-+ .platform_init_video = dk_init_video,
-+};
-+
-+static u64 s1dfb_dmamask = 0xffffffffUL;
-+
-+static struct resource dk_s1dfb_resource[] = {
-+ [0] = { /* video mem */
-+ .name = "s1d13806 memory",
-+ .start = AT91_FB_VMEM_BASE,
-+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = { /* video registers */
-+ .name = "s1d13806 registers",
-+ .start = AT91_FB_REG_BASE,
-+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+};
-+
-+static struct platform_device dk_s1dfb_device = {
-+ .name = "s1d13806fb",
-+ .id = -1,
-+ .dev = {
-+ .dma_mask = &s1dfb_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &dk_s1dfb_pdata,
-+ },
-+ .resource = dk_s1dfb_resource,
-+ .num_resources = ARRAY_SIZE(dk_s1dfb_resource),
-+};
-+
-+static void __init dk_add_device_video(void)
-+{
-+ platform_device_register(&dk_s1dfb_device);
-+}
-+#else
-+static void __init dk_add_device_video(void) {}
-+#endif
-+
- static struct at91_eth_data __initdata dk_eth_data = {
- .phy_irq_pin = AT91_PIN_PC4,
- .is_rmii = 1,
-@@ -151,7 +330,7 @@
- #define DK_FLASH_SIZE 0x200000
-
- static struct physmap_flash_data dk_flash_data = {
-- .width = 2,
-+ .width = 2,
- };
-
- static struct resource dk_flash_resource = {
-@@ -170,6 +349,13 @@
- .num_resources = 1,
- };
-
-+static struct at91_gpio_led dk_leds[] = {
-+ {
-+ .name = "led0",
-+ .gpio = AT91_PIN_PB2,
-+ .trigger = "timer",
-+ }
-+};
-
- static void __init dk_board_init(void)
- {
-@@ -200,8 +386,10 @@
- at91_add_device_nand(&dk_nand_data);
- /* NOR Flash */
- platform_device_register(&dk_flash);
-+ /* LEDs */
-+ at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
- /* VGA */
--// dk_add_device_video();
-+ dk_add_device_video();
- }
-
- MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-ek.c linux-2.6-stable/arch/arm/mach-at91/board-ek.c
---- linux-2.6.21/arch/arm/mach-at91/board-ek.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-ek.c Tue May 8 14:29:22 2007
-@@ -73,6 +73,187 @@
- at91rm9200_init_interrupts(NULL);
- }
-
-+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
-+#include <video/s1d13xxxfb.h>
-+#include <asm/arch/ics1523.h>
-+
-+/* EPSON S1D13806 FB */
-+#define AT91_FB_REG_BASE 0x40000000L
-+#define AT91_FB_REG_SIZE 0x200
-+#define AT91_FB_VMEM_BASE 0x40200000L
-+#define AT91_FB_VMEM_SIZE 0x140000L
-+
-+static void __init ek_init_video(void)
-+{
-+ /* NWAIT Signal */
-+ at91_set_A_periph(AT91_PIN_PC6, 0);
-+
-+ /* Initialization of the Static Memory Controller for Chip Select 3 */
-+ at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16 /* 16 bit */
-+ | AT91_SMC_WSEN | AT91_SMC_NWS_(5) /* wait states */
-+ | AT91_SMC_TDF_(1) /* float time */
-+ );
-+
-+ at91_ics1523_init();
-+}
-+
-+/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
-+ Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
-+static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
-+ {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
-+ {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
-+ {S1DREG_GPIO_CNF0, 0xFF}, // 0x00
-+ {S1DREG_GPIO_CNF1, 0x1F}, // 0x08
-+ {S1DREG_GPIO_CTL0, 0x00},
-+ {S1DREG_GPIO_CTL1, 0x00},
-+ {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
-+ {S1DREG_LCD_CLK_CNF, 0x00},
-+ {S1DREG_CRT_CLK_CNF, 0x00},
-+ {S1DREG_MPLUG_CLK_CNF, 0x00},
-+ {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
-+ {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
-+ {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
-+ {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
-+ {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
-+ {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
-+ {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
-+ {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
-+ {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
-+ {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
-+ {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
-+ {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
-+ {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
-+ {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
-+ {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
-+ {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
-+ {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
-+ {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
-+ {S1DREG_LCD_DISP_START0, 0x00},
-+ {S1DREG_LCD_DISP_START1, 0xC8},
-+ {S1DREG_LCD_DISP_START2, 0x00},
-+ {S1DREG_LCD_MEM_OFF0, 0x80},
-+ {S1DREG_LCD_MEM_OFF1, 0x02},
-+ {S1DREG_LCD_PIX_PAN, 0x00},
-+ {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
-+ {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
-+ {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
-+ {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
-+ {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
-+ {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
-+ {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
-+ {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
-+ {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
-+ {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
-+ {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
-+ {S1DREG_TV_OUT_CTL, 0x10},
-+ {0x005E, 0x9F},
-+ {0x005F, 0x00},
-+ {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
-+ {S1DREG_CRT_DISP_START0, 0x00},
-+ {S1DREG_CRT_DISP_START1, 0x00},
-+ {S1DREG_CRT_DISP_START2, 0x00},
-+ {S1DREG_CRT_MEM_OFF0, 0x80},
-+ {S1DREG_CRT_MEM_OFF1, 0x02},
-+ {S1DREG_CRT_PIX_PAN, 0x00},
-+ {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
-+ {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
-+ {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
-+ {S1DREG_LCD_CUR_START, 0x01},
-+ {S1DREG_LCD_CUR_XPOS0, 0x00},
-+ {S1DREG_LCD_CUR_XPOS1, 0x00},
-+ {S1DREG_LCD_CUR_YPOS0, 0x00},
-+ {S1DREG_LCD_CUR_YPOS1, 0x00},
-+ {S1DREG_LCD_CUR_BCTL0, 0x00},
-+ {S1DREG_LCD_CUR_GCTL0, 0x00},
-+ {S1DREG_LCD_CUR_RCTL0, 0x00},
-+ {S1DREG_LCD_CUR_BCTL1, 0x1F},
-+ {S1DREG_LCD_CUR_GCTL1, 0x3F},
-+ {S1DREG_LCD_CUR_RCTL1, 0x1F},
-+ {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
-+ {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
-+ {S1DREG_CRT_CUR_START, 0x01},
-+ {S1DREG_CRT_CUR_XPOS0, 0x00},
-+ {S1DREG_CRT_CUR_XPOS1, 0x00},
-+ {S1DREG_CRT_CUR_YPOS0, 0x00},
-+ {S1DREG_CRT_CUR_YPOS1, 0x00},
-+ {S1DREG_CRT_CUR_BCTL0, 0x00},
-+ {S1DREG_CRT_CUR_GCTL0, 0x00},
-+ {S1DREG_CRT_CUR_RCTL0, 0x00},
-+ {S1DREG_CRT_CUR_BCTL1, 0x1F},
-+ {S1DREG_CRT_CUR_GCTL1, 0x3F},
-+ {S1DREG_CRT_CUR_RCTL1, 0x1F},
-+ {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
-+ {S1DREG_BBLT_CTL0, 0x00},
-+ {S1DREG_BBLT_CTL0, 0x00},
-+ {S1DREG_BBLT_CC_EXP, 0x00},
-+ {S1DREG_BBLT_OP, 0x00},
-+ {S1DREG_BBLT_SRC_START0, 0x00},
-+ {S1DREG_BBLT_SRC_START1, 0x00},
-+ {S1DREG_BBLT_SRC_START2, 0x00},
-+ {S1DREG_BBLT_DST_START0, 0x00},
-+ {S1DREG_BBLT_DST_START1, 0x00},
-+ {S1DREG_BBLT_DST_START2, 0x00},
-+ {S1DREG_BBLT_MEM_OFF0, 0x00},
-+ {S1DREG_BBLT_MEM_OFF1, 0x00},
-+ {S1DREG_BBLT_WIDTH0, 0x00},
-+ {S1DREG_BBLT_WIDTH1, 0x00},
-+ {S1DREG_BBLT_HEIGHT0, 0x00},
-+ {S1DREG_BBLT_HEIGHT1, 0x00},
-+ {S1DREG_BBLT_BGC0, 0x00},
-+ {S1DREG_BBLT_BGC1, 0x00},
-+ {S1DREG_BBLT_FGC0, 0x00},
-+ {S1DREG_BBLT_FGC1, 0x00},
-+ {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
-+ {S1DREG_LKUP_ADDR, 0x00},
-+ {S1DREG_PS_CNF, 0x10}, /* Power Save disable */
-+ {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
-+ {S1DREG_CPU2MEM_WDOGT, 0x00},
-+ {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
-+};
-+
-+static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
-+ .initregs = ek_s1dfb_initregs,
-+ .initregssize = ARRAY_SIZE(ek_s1dfb_initregs),
-+ .platform_init_video = ek_init_video,
-+};
-+
-+static u64 s1dfb_dmamask = 0xffffffffUL;
-+
-+static struct resource ek_s1dfb_resource[] = {
-+ [0] = { /* video mem */
-+ .name = "s1d13806 memory",
-+ .start = AT91_FB_VMEM_BASE,
-+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = { /* video registers */
-+ .name = "s1d13806 registers",
-+ .start = AT91_FB_REG_BASE,
-+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+};
-+
-+static struct platform_device ek_s1dfb_device = {
-+ .name = "s1d13806fb",
-+ .id = -1,
-+ .dev = {
-+ .dma_mask = &s1dfb_dmamask,
-+ .coherent_dma_mask = 0xffffffff,
-+ .platform_data = &ek_s1dfb_pdata,
-+ },
-+ .resource = ek_s1dfb_resource,
-+ .num_resources = ARRAY_SIZE(ek_s1dfb_resource),
-+};
-+
-+static void __init ek_add_device_video(void)
-+{
-+ platform_device_register(&ek_s1dfb_device);
-+}
-+#else
-+static void __init ek_add_device_video(void) {}
-+#endif
-+
- static struct at91_eth_data __initdata ek_eth_data = {
- .phy_irq_pin = AT91_PIN_PC4,
- .is_rmii = 1,
-@@ -113,7 +294,7 @@
- #define EK_FLASH_SIZE 0x200000
-
- static struct physmap_flash_data ek_flash_data = {
-- .width = 2,
-+ .width = 2,
- };
-
- static struct resource ek_flash_resource = {
-@@ -132,6 +313,18 @@
- .num_resources = 1,
- };
-
-+static struct at91_gpio_led ek_leds[] = {
-+ {
-+ .name = "led0",
-+ .gpio = AT91_PIN_PB1,
-+ .trigger = "heartbeat",
-+ },
-+ {
-+ .name = "led1",
-+ .gpio = AT91_PIN_PB2,
-+ .trigger = "timer",
-+ }
-+};
-
- static void __init ek_board_init(void)
- {
-@@ -158,8 +351,10 @@
- #endif
- /* NOR Flash */
- platform_device_register(&ek_flash);
-+ /* LEDs */
-+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
- /* VGA */
--// ek_add_device_video();
-+ ek_add_device_video();
- }
-
- MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-kb9202.c linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c
---- linux-2.6.21/arch/arm/mach-at91/board-kb9202.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c Tue May 8 12:21:31 2007
-@@ -37,6 +37,8 @@
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
-
-+#include <asm/arch/at91rm9200_mc.h>
-+
- #include "generic.h"
-
-
-@@ -111,6 +113,48 @@
- .partition_info = nand_partitions,
- };
-
-+
-+#if defined(CONFIG_FB_S1D15605)
-+#warning "Rather pass reset pin via platform_data"
-+static struct resource kb9202_lcd_resources[] = {
-+ [0] = {
-+ .start = AT91_CHIPSELECT_2,
-+ .end = AT91_CHIPSELECT_2 + 0x200FF,
-+ .flags = IORESOURCE_MEM
-+ },
-+ [1] = { /* reset pin */
-+ .start = AT91_PIN_PC22,
-+ .end = AT91_PIN_PC22,
-+ .flags = IORESOURCE_MEM
-+ },
-+};
-+
-+static struct platform_device kb9202_lcd_device = {
-+ .name = "s1d15605fb",
-+ .id = 0,
-+ .num_resources = ARRAY_SIZE(kb9202_lcd_resources),
-+ .resource = kb9202_lcd_resources,
-+};
-+
-+static void __init kb9202_add_device_lcd(void)
-+{
-+ /* In case the boot loader did not set the chip select mode and timing */
-+ at91_sys_write(AT91_SMC_CSR(2),
-+ AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
-+ AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
-+
-+ /* Backlight pin = output, off */
-+ at91_set_gpio_output(AT91_PIN_PC23, 0);
-+
-+ /* Reset pin = output, in reset */
-+ at91_set_gpio_output(AT91_PIN_PC22, 0);
-+
-+ platform_device_register(&kb9202_lcd_device);
-+}
-+#else
-+static void __init kb9202_add_device_lcd(void) {}
-+#endif
-+
- static void __init kb9202_board_init(void)
- {
- /* Serial */
-@@ -129,6 +173,8 @@
- at91_add_device_spi(NULL, 0);
- /* NAND */
- at91_add_device_nand(&kb9202_nand_data);
-+ /* LCD */
-+ kb9202_add_device_lcd();
- }
-
- MACHINE_START(KB9200, "KB920x")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c
---- linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c Tue May 8 12:13:30 2007
-@@ -104,9 +104,9 @@
- },
- #endif
- #endif
--#if defined(CONFIG_SND_AT73C213)
-+#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
- { /* AT73C213 DAC */
-- .modalias = "snd_at73c213",
-+ .modalias = "at73c213",
- .chip_select = 0,
- .max_speed_hz = 10 * 1000 * 1000,
- .bus_num = 1,
-@@ -118,7 +118,7 @@
- /*
- * MACB Ethernet device
- */
--static struct __initdata at91_eth_data ek_macb_data = {
-+static struct at91_eth_data __initdata ek_macb_data = {
- .phy_irq_pin = AT91_PIN_PA7,
- .is_rmii = 1,
- };
-@@ -188,6 +188,8 @@
- at91_add_device_eth(&ek_macb_data);
- /* MMC */
- at91_add_device_mmc(0, &ek_mmc_data);
-+ /* I2C */
-+ at91_add_device_i2c();
- }
-
- MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c
---- linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c Wed May 9 12:37:19 2007
-@@ -25,7 +25,11 @@
- #include <linux/module.h>
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
-+#include <linux/spi/ads7846.h>
- #include <linux/dm9000.h>
-+#include <linux/fb.h>
-+
-+#include <video/atmel_lcdc.h>
-
- #include <asm/hardware.h>
- #include <asm/setup.h>
-@@ -59,6 +63,9 @@
- /* Initialize processor: 18.432 MHz crystal */
- at91sam9261_initialize(18432000);
-
-+ /* Setup the LEDs */
-+ at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
-+
- /* Setup the serial ports and console */
- at91_init_serial(&ek_uart_config);
- }
-@@ -195,6 +202,41 @@
- };
-
- /*
-+ * ADS7846 Touchscreen
-+ */
-+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-+
-+static int ads7843_pendown_state(void)
-+{
-+ return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */
-+}
-+
-+static struct ads7846_platform_data ads_info = {
-+ .model = 7843,
-+ .x_min = 150,
-+ .x_max = 3830,
-+ .y_min = 190,
-+ .y_max = 3830,
-+ .vref_delay_usecs = 100,
-+ .x_plate_ohms = 450,
-+ .y_plate_ohms = 250,
-+ .pressure_max = 15000,
-+ .debounce_max = 1,
-+ .debounce_rep = 0,
-+ .debounce_tol = (~0),
-+ .get_pendown_state = ads7843_pendown_state,
-+};
-+
-+static void __init ek_add_device_ts(void)
-+{
-+ at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */
-+ at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */
-+}
-+#else
-+static void __init ek_add_device_ts(void) {}
-+#endif
-+
-+/*
- * SPI devices
- */
- static struct spi_board_info ek_spi_devices[] = {
-@@ -204,6 +246,17 @@
- .max_speed_hz = 15 * 1000 * 1000,
- .bus_num = 0,
- },
-+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-+ {
-+ .modalias = "ads7846",
-+ .chip_select = 2,
-+ .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
-+ .bus_num = 0,
-+ .platform_data = &ads_info,
-+ .irq = AT91SAM9261_ID_IRQ0,
-+ .controller_data = AT91_PIN_PA28, /* CS pin */
-+ },
-+#endif
- #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
- { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
- .modalias = "mtd_dataflash",
-@@ -211,9 +264,9 @@
- .max_speed_hz = 15 * 1000 * 1000,
- .bus_num = 0,
- },
--#elif defined(CONFIG_SND_AT73C213)
-+#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
- { /* AT73C213 DAC */
-- .modalias = "snd_at73c213",
-+ .modalias = "at73c213",
- .chip_select = 3,
- .max_speed_hz = 10 * 1000 * 1000,
- .bus_num = 0,
-@@ -222,6 +275,65 @@
- };
-
-
-+/*
-+ * LCD Controller
-+ */
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static struct fb_videomode at91_tft_vga_modes[] = {
-+ {
-+ .name = "TX09D50VM1CCA @ 60",
-+ .refresh = 60,
-+ .xres = 240, .yres = 320,
-+ .pixclock = KHZ2PICOS(4965),
-+
-+ .left_margin = 1, .right_margin = 33,
-+ .upper_margin = 1, .lower_margin = 0,
-+ .hsync_len = 5, .vsync_len = 1,
-+
-+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+ },
-+};
-+
-+static struct fb_monspecs at91fb_default_monspecs = {
-+ .manufacturer = "HIT",
-+ .monitor = "TX09D50VM1CCA",
-+
-+ .modedb = at91_tft_vga_modes,
-+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
-+ .hfmin = 15000,
-+ .hfmax = 64000,
-+ .vfmin = 50,
-+ .vfmax = 150,
-+};
-+
-+#define AT91SAM9261_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
-+ | ATMEL_LCDC_DISTYPE_TFT \
-+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-+
-+static void at91_lcdc_power_control(int on)
-+{
-+ if (on)
-+ at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
-+ else
-+ at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
-+}
-+
-+/* Driver datas */
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
-+ .default_bpp = 16,
-+ .default_dmacon = ATMEL_LCDC_DMAEN,
-+ .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
-+ .default_monspecs = &at91fb_default_monspecs,
-+ .atmel_lcdfb_power_control = at91_lcdc_power_control,
-+ .guard_time = 1,
-+};
-+
-+#else
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data;
-+#endif
-+
-+
- static void __init ek_board_init(void)
- {
- /* Serial */
-@@ -241,10 +353,14 @@
- #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
- /* SPI */
- at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
-+ /* Touchscreen */
-+ ek_add_device_ts();
- #else
- /* MMC */
- at91_add_device_mmc(0, &ek_mmc_data);
- #endif
-+ /* LCD Controller */
-+ at91_add_device_lcdc(&ek_lcdc_data);
- }
-
- MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c
---- linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c Tue May 8 12:56:33 2007
-@@ -25,6 +25,10 @@
- #include <linux/module.h>
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
-+#include <linux/spi/ads7846.h>
-+#include <linux/fb.h>
-+
-+#include <video/atmel_lcdc.h>
-
- #include <asm/hardware.h>
- #include <asm/setup.h>
-@@ -86,6 +90,40 @@
-
-
- /*
-+ * ADS7846 Touchscreen
-+ */
-+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-+static int ads7843_pendown_state(void)
-+{
-+ return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
-+}
-+
-+static struct ads7846_platform_data ads_info = {
-+ .model = 7843,
-+ .x_min = 150,
-+ .x_max = 3830,
-+ .y_min = 190,
-+ .y_max = 3830,
-+ .vref_delay_usecs = 100,
-+ .x_plate_ohms = 450,
-+ .y_plate_ohms = 250,
-+ .pressure_max = 15000,
-+ .debounce_max = 1,
-+ .debounce_rep = 0,
-+ .debounce_tol = (~0),
-+ .get_pendown_state = ads7843_pendown_state,
-+};
-+
-+static void __init ek_add_device_ts(void)
-+{
-+ at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
-+ at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */
-+}
-+#else
-+static void __init ek_add_device_ts(void) {}
-+#endif
-+
-+/*
- * SPI devices.
- */
- static struct spi_board_info ek_spi_devices[] = {
-@@ -97,6 +135,16 @@
- .bus_num = 0,
- },
- #endif
-+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-+ {
-+ .modalias = "ads7846",
-+ .chip_select = 3,
-+ .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
-+ .bus_num = 0,
-+ .platform_data = &ads_info,
-+ .irq = AT91SAM9263_ID_IRQ1,
-+ },
-+#endif
- };
-
-
-@@ -112,6 +160,14 @@
-
-
- /*
-+ * MACB Ethernet device
-+ */
-+static struct at91_eth_data __initdata ek_macb_data = {
-+ .is_rmii = 1,
-+};
-+
-+
-+/*
- * NAND flash
- */
- static struct mtd_partition __initdata ek_nand_partition[] = {
-@@ -148,6 +204,73 @@
- };
-
-
-+/*
-+ * LCD Controller
-+ */
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static struct fb_videomode at91_tft_vga_modes[] = {
-+ {
-+ .name = "TX09D50VM1CCA @ 60",
-+ .refresh = 60,
-+ .xres = 240, .yres = 320,
-+ .pixclock = KHZ2PICOS(4965),
-+
-+ .left_margin = 1, .right_margin = 33,
-+ .upper_margin = 1, .lower_margin = 0,
-+ .hsync_len = 5, .vsync_len = 1,
-+
-+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+ },
-+};
-+
-+static struct fb_monspecs at91fb_default_monspecs = {
-+ .manufacturer = "HIT",
-+ .monitor = "TX09D70VM1CCA",
-+
-+ .modedb = at91_tft_vga_modes,
-+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
-+ .hfmin = 15000,
-+ .hfmax = 64000,
-+ .vfmin = 50,
-+ .vfmax = 150,
-+};
-+
-+#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
-+ | ATMEL_LCDC_DISTYPE_TFT \
-+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-+
-+static void at91_lcdc_power_control(int on)
-+{
-+ if (on)
-+ at91_set_gpio_value(AT91_PIN_PD12, 0); /* power up */
-+ else
-+ at91_set_gpio_value(AT91_PIN_PD12, 1); /* power down */
-+}
-+
-+/* Driver datas */
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
-+ .default_bpp = 16,
-+ .default_dmacon = ATMEL_LCDC_DMAEN,
-+ .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
-+ .default_monspecs = &at91fb_default_monspecs,
-+ .atmel_lcdfb_power_control = at91_lcdc_power_control,
-+ .guard_time = 1,
-+};
-+
-+#else
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data;
-+#endif
-+
-+
-+/*
-+ * AC97
-+ */
-+static struct atmel_ac97_data ek_ac97_data = {
-+ .reset_pin = AT91_PIN_PA13,
-+};
-+
-+
- static void __init ek_board_init(void)
- {
- /* Serial */
-@@ -157,11 +280,22 @@
- /* USB Device */
- at91_add_device_udc(&ek_udc_data);
- /* SPI */
-+ at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
- at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
-+ /* Touchscreen */
-+ ek_add_device_ts();
- /* MMC */
- at91_add_device_mmc(1, &ek_mmc_data);
-+ /* Ethernet */
-+ at91_add_device_eth(&ek_macb_data);
- /* NAND */
- at91_add_device_nand(&ek_nand_data);
-+ /* I2C */
-+ at91_add_device_i2c();
-+ /* LCD Controller */
-+ at91_add_device_lcdc(&ek_lcdc_data);
-+ /* AC97 */
-+ at91_add_device_ac97(&ek_ac97_data);
- }
-
- MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c
---- linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c Wed May 9 10:58:34 2007
-@@ -0,0 +1,204 @@
-+/*
-+ * Copyright (C) 2005 SAN People
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/fb.h>
-+#include <linux/clk.h>
-+
-+#include <video/atmel_lcdc.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91sam926x_mc.h>
-+
-+#include "generic.h"
-+
-+
-+/*
-+ * Serial port configuration.
-+ * 0 .. 3 = USART0 .. USART3
-+ * 4 = DBGU
-+ */
-+static struct at91_uart_config __initdata ek_uart_config = {
-+ .console_tty = 0, /* ttyS0 */
-+ .nr_tty = 2,
-+ .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
-+};
-+
-+static void __init ek_map_io(void)
-+{
-+ /* Initialize processor: 12.000 MHz crystal */
-+ at91sam9rl_initialize(12000000);
-+
-+ /* Setup the serial ports and console */
-+ at91_init_serial(&ek_uart_config);
-+}
-+
-+static void __init ek_init_irq(void)
-+{
-+ at91sam9rl_init_interrupts(NULL);
-+}
-+
-+
-+/*
-+ * MCI (SD/MMC)
-+ */
-+static struct at91_mmc_data __initdata ek_mmc_data = {
-+ .wire4 = 1,
-+ .det_pin = AT91_PIN_PA15,
-+// .wp_pin = ... not connected
-+// .vcc_pin = ... not connected
-+};
-+
-+
-+/*
-+ * NAND flash
-+ */
-+static struct mtd_partition __initdata ek_nand_partition[] = {
-+ {
-+ .name = "Partition 1",
-+ .offset = 0,
-+ .size = 256 * 1024,
-+ },
-+ {
-+ .name = "Partition 2",
-+ .offset = 256 * 1024 ,
-+ .size = MTDPART_SIZ_FULL,
-+ },
-+};
-+
-+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
-+{
-+ *num_partitions = ARRAY_SIZE(ek_nand_partition);
-+ return ek_nand_partition;
-+}
-+
-+static struct at91_nand_data __initdata ek_nand_data = {
-+ .ale = 21,
-+ .cle = 22,
-+// .det_pin = ... not connected
-+ .rdy_pin = AT91_PIN_PD17,
-+ .enable_pin = AT91_PIN_PB6,
-+ .partition_info = nand_partitions,
-+ .bus_width_16 = 0,
-+};
-+
-+
-+/*
-+ * SPI devices
-+ */
-+static struct spi_board_info ek_spi_devices[] = {
-+ { /* DataFlash chip */
-+ .modalias = "mtd_dataflash",
-+ .chip_select = 0,
-+ .max_speed_hz = 15 * 1000 * 1000,
-+ .bus_num = 0,
-+ },
-+};
-+
-+
-+/*
-+ * LCD Controller
-+ */
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static struct fb_videomode at91_tft_vga_modes[] = {
-+ {
-+ .name = "TX09D50VM1CCA @ 60",
-+ .refresh = 60,
-+ .xres = 240, .yres = 320,
-+ .pixclock = KHZ2PICOS(4965),
-+
-+ .left_margin = 1, .right_margin = 33,
-+ .upper_margin = 1, .lower_margin = 0,
-+ .hsync_len = 5, .vsync_len = 1,
-+
-+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+ },
-+};
-+
-+static struct fb_monspecs at91fb_default_monspecs = {
-+ .manufacturer = "HIT",
-+ .monitor = "TX09D50VM1CCA",
-+
-+ .modedb = at91_tft_vga_modes,
-+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
-+ .hfmin = 15000,
-+ .hfmax = 64000,
-+ .vfmin = 50,
-+ .vfmax = 150,
-+};
-+
-+#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
-+ | ATMEL_LCDC_DISTYPE_TFT \
-+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-+
-+static void at91_lcdc_power_control(int on)
-+{
-+ if (on)
-+ at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
-+ else
-+ at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
-+}
-+
-+/* Driver datas */
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
-+ .default_bpp = 16,
-+ .default_dmacon = ATMEL_LCDC_DMAEN,
-+ .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
-+ .default_monspecs = &at91fb_default_monspecs,
-+ .atmel_lcdfb_power_control = at91_lcdc_power_control,
-+ .guard_time = 1,
-+};
-+
-+#else
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data;
-+#endif
-+
-+
-+static void __init ek_board_init(void)
-+{
-+ /* Serial */
-+ at91_add_device_serial();
-+ /* I2C */
-+ at91_add_device_i2c();
-+ /* NAND */
-+ at91_add_device_nand(&ek_nand_data);
-+ /* SPI */
-+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
-+ /* MMC */
-+ at91_add_device_mmc(0, &ek_mmc_data);
-+ /* LCD Controller */
-+ at91_add_device_lcdc(&ek_lcdc_data);
-+}
-+
-+MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
-+ /* Maintainer: Atmel */
-+ .phys_io = AT91_BASE_SYS,
-+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+ .boot_params = AT91_SDRAM_BASE + 0x100,
-+ .timer = &at91sam926x_timer,
-+ .map_io = ek_map_io,
-+ .init_irq = ek_init_irq,
-+ .init_machine = ek_board_init,
-+MACHINE_END
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/clock.c linux-2.6-stable/arch/arm/mach-at91/clock.c
---- linux-2.6.21/arch/arm/mach-at91/clock.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/clock.c Tue May 8 12:13:30 2007
-@@ -32,6 +32,7 @@
- #include <asm/arch/cpu.h>
-
- #include "clock.h"
-+#include "generic.h"
-
-
- /*
-@@ -254,6 +255,23 @@
-
- /*------------------------------------------------------------------------*/
-
-+#ifdef CONFIG_PM
-+
-+int clk_must_disable(struct clk *clk)
-+{
-+ if (!at91_suspend_entering_slow_clock())
-+ return 0;
-+
-+ while (clk->parent)
-+ clk = clk->parent;
-+ return clk != &clk32k;
-+}
-+EXPORT_SYMBOL(clk_must_disable);
-+
-+#endif
-+
-+/*------------------------------------------------------------------------*/
-+
- #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
-
- /*
-@@ -375,6 +393,7 @@
- seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
-
- seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
-+#warning "Hard-coded PCK"
- for (i = 0; i < 4; i++)
- seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
- seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/generic.h linux-2.6-stable/arch/arm/mach-at91/generic.h
---- linux-2.6.21/arch/arm/mach-at91/generic.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/generic.h Wed May 9 10:20:54 2007
-@@ -13,12 +13,14 @@
- extern void __init at91sam9260_initialize(unsigned long main_clock);
- extern void __init at91sam9261_initialize(unsigned long main_clock);
- extern void __init at91sam9263_initialize(unsigned long main_clock);
-+extern void __init at91sam9rl_initialize(unsigned long main_clock);
-
- /* Interrupts */
- extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
- extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
- extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
- extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
-+extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
- extern void __init at91_aic_init(unsigned int priority[]);
-
- /* Timer */
-@@ -34,6 +36,7 @@
- /* Power Management */
- extern void at91_irq_suspend(void);
- extern void at91_irq_resume(void);
-+extern int at91_suspend_entering_slow_clock(void);
-
- /* GPIO */
- #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/ics1523.c linux-2.6-stable/arch/arm/mach-at91/ics1523.c
---- linux-2.6.21/arch/arm/mach-at91/ics1523.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/ics1523.c Tue May 8 12:13:30 2007
-@@ -0,0 +1,207 @@
-+/*
-+ * arch/arm/mach-at91rm9200/ics1523.c
-+ *
-+ * Copyright (C) 2003 ATMEL Rousset
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#include <asm/hardware.h>
-+#include <asm/io.h>
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+
-+#include <asm/arch/ics1523.h>
-+#include <asm/arch/at91_twi.h>
-+#include <asm/arch/gpio.h>
-+
-+/* TWI Errors */
-+#define AT91_TWI_ERROR (AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
-+
-+
-+static void __iomem *twi_base;
-+
-+#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
-+#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
-+
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization of TWI CLOCK
-+ * ----------------------------------------------------------------------------- */
-+
-+static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
-+{
-+ int sclock;
-+
-+ /* Here, CKDIV = 1 and CHDIV = CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
-+ sclock = (10*mck_khz / ICS_TRANSFER_RATE);
-+ if (sclock % 10 >= 5)
-+ sclock = (sclock /10) - 5;
-+ else
-+ sclock = (sclock /10)- 6;
-+ sclock = (sclock + (4 - sclock %4)) >> 2; /* div 4 */
-+
-+ at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Read a byte with TWI Interface from the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
-+{
-+ int Status, nb_trial;
-+
-+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
-+ at91_twi_write(AT91_TWI_IADR, reg_address);
-+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+ /* Program temporizing period (300us) */
-+ udelay(300);
-+
-+ /* Wait TXcomplete ... */
-+ nb_trial = 0;
-+ Status = at91_twi_read(AT91_TWI_SR);
-+ while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
-+ nb_trial++;
-+ Status = at91_twi_read(AT91_TWI_SR);
-+ }
-+
-+ if (Status & AT91_TWI_TXCOMP) {
-+ *data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
-+ return ICS1523_ACCESS_OK;
-+ }
-+ else
-+ return ICS1523_ACCESS_ERROR;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Write a byte with TWI Interface to the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
-+{
-+ int Status, nb_trial;
-+
-+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
-+ at91_twi_write(AT91_TWI_IADR, reg_address);
-+ at91_twi_write(AT91_TWI_THR, data_out);
-+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+ /* Program temporizing period (300us) */
-+ udelay(300);
-+
-+ nb_trial = 0;
-+ Status = at91_twi_read(AT91_TWI_SR);
-+ while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
-+ nb_trial++;
-+ if (Status & AT91_TWI_ERROR) {
-+ /* If Underrun OR NACK - Start again */
-+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+ /* Program temporizing period (300us) */
-+ udelay(300);
-+ }
-+ Status = at91_twi_read(AT91_TWI_SR);
-+ };
-+
-+ if (Status & AT91_TWI_TXCOMP)
-+ return ICS1523_ACCESS_OK;
-+ else
-+ return ICS1523_ACCESS_ERROR;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization of the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+int at91_ics1523_init(void)
-+{
-+ int nb_trial;
-+ int ack = ICS1523_ACCESS_OK;
-+ unsigned int status = 0xffffffff;
-+ struct clk *twi_clk;
-+
-+ /* Map in TWI peripheral */
-+ twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
-+ if (!twi_base)
-+ return -ENOMEM;
-+
-+ /* pins used for TWI interface */
-+ at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
-+ at91_set_multi_drive(AT91_PIN_PA25, 1);
-+ at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
-+ at91_set_multi_drive(AT91_PIN_PA26, 1);
-+
-+ /* Enable the TWI clock */
-+ twi_clk = clk_get(NULL, "twi_clk");
-+ if (IS_ERR(twi_clk))
-+ return ICS1523_ACCESS_ERROR;
-+ clk_enable(twi_clk);
-+
-+ /* Disable interrupts */
-+ at91_twi_write(AT91_TWI_IDR, -1);
-+
-+ /* Reset peripheral */
-+ at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
-+
-+ /* Set Master mode */
-+ at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
-+
-+ /* Set TWI Clock Waveform Generator Register */
-+ at91_ics1523_SetTwiClock(60000); /* MCK in KHz = 60000 KHz */
-+
-+ /* ICS1523 Initialisation */
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
-+
-+ nb_trial = 0;
-+ do {
-+ nb_trial++;
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
-+
-+ /* Program 1ms temporizing period */
-+ mdelay(1);
-+
-+ at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
-+ } while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
-+
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
-+
-+ /* Program 1ms temporizing period */
-+ mdelay(1);
-+
-+ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
-+
-+ /* Program 1ms temporizing period */
-+ mdelay(1);
-+
-+ /* All done - cleanup */
-+ iounmap(twi_base);
-+ clk_disable(twi_clk);
-+ clk_put(twi_clk);
-+
-+ return ack;
-+}
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm.c linux-2.6-stable/arch/arm/mach-at91/pm.c
---- linux-2.6.21/arch/arm/mach-at91/pm.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mach-at91/pm.c Tue May 8 12:13:31 2007
-@@ -63,6 +63,7 @@
- * Verify that all the clocks are correct before entering
- * slow-clock mode.
- */
-+#warning "SAM9260 only has 3 programmable clocks."
- static int at91_pm_verify_clocks(void)
- {
- unsigned long scsr;
-@@ -104,20 +105,15 @@
- }
-
- /*
-- * Call this from platform driver suspend() to see how deeply to suspend.
-+ * This is called from clk_must_disable(), to see how deeply to suspend.
- * For example, some controllers (like OHCI) need one of the PLL clocks
- * in order to act as a wakeup source, and those are not available when
- * going into slow clock mode.
-- *
-- * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
-- * the very same problem (but not using at91 main_clk), and it'd be better
-- * to add one generic API rather than lots of platform-specific ones.
- */
- int at91_suspend_entering_slow_clock(void)
- {
- return (target_state == PM_SUSPEND_MEM);
- }
--EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
-
-
- static void (*slow_clock)(void);
-@@ -207,16 +203,23 @@
- .enter = at91_pm_enter,
- };
-
-+#ifdef CONFIG_AT91_SLOW_CLOCK
-+extern void at91rm9200_slow_clock(void);
-+extern u32 at91rm9200_slow_clock_sz;
-+#endif
-+
- static int __init at91_pm_init(void)
- {
-- printk("AT91: Power Management\n");
--
--#ifdef CONFIG_AT91_PM_SLOW_CLOCK
-- /* REVISIT allocations of SRAM should be dynamically managed.
-+#ifdef CONFIG_AT91_SLOW_CLOCK
-+ /*
-+ * REVISIT allocations of SRAM should be dynamically managed.
- * FIQ handlers and other components will want SRAM/TCM too...
- */
-- slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
-+ slow_clock = (void *) (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE + (3 * SZ_4K));
- memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
-+ printk("AT91: Power Management (with slow clock mode)\n");
-+#else
-+ printk("AT91: Power Management\n");
- #endif
-
- /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S
---- linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S Tue May 8 12:13:31 2007
-@@ -0,0 +1,172 @@
-+/*
-+ * arch/arm/mach-at91/pm_slow_clock.S
-+ *
-+ * Copyright (C) 2006 Savin Zlobec
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/linkage.h>
-+#include <asm/hardware.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/at91rm9200_mc.h>
-+
-+#define MCKRDY_TIMEOUT 1000
-+#define MOSCRDY_TIMEOUT 1000
-+#define PLLALOCK_TIMEOUT 1000
-+
-+ .macro wait_mckrdy
-+ mov r2, #MCKRDY_TIMEOUT
-+1: sub r2, r2, #1
-+ cmp r2, #0
-+ beq 2f
-+ ldr r3, [r1, #AT91_PMC_SR]
-+ tst r3, #AT91_PMC_MCKRDY
-+ beq 1b
-+2:
-+ .endm
-+
-+ .macro wait_moscrdy
-+ mov r2, #MOSCRDY_TIMEOUT
-+1: sub r2, r2, #1
-+ cmp r2, #0
-+ beq 2f
-+ ldr r3, [r1, #AT91_PMC_SR]
-+ tst r3, #AT91_PMC_MOSCS
-+ beq 1b
-+2:
-+ .endm
-+
-+ .macro wait_pllalock
-+ mov r2, #PLLALOCK_TIMEOUT
-+1: sub r2, r2, #1
-+ cmp r2, #0
-+ beq 2f
-+ ldr r3, [r1, #AT91_PMC_SR]
-+ tst r3, #AT91_PMC_LOCKA
-+ beq 1b
-+2:
-+ .endm
-+
-+ .macro wait_plladis
-+ mov r2, #PLLALOCK_TIMEOUT
-+1: sub r2, r2, #1
-+ cmp r2, #0
-+ beq 2f
-+ ldr r3, [r1, #AT91_PMC_SR]
-+ tst r3, #AT91_PMC_LOCKA
-+ bne 1b
-+2:
-+ .endm
-+
-+ .text
-+
-+ENTRY(at91rm9200_slow_clock)
-+
-+ ldr r1, .at91_va_base_sys
-+
-+ /* Put SDRAM in self refresh mode */
-+
-+ b 1f
-+ .align 5
-+1: mcr p15, 0, r0, c7, c10, 4
-+ mov r2, #1
-+ str r2, [r1, #AT91_SDRAMC_SRR]
-+
-+ /* Save Master clock setting */
-+
-+ ldr r2, [r1, #AT91_PMC_MCKR]
-+ str r2, .saved_mckr
-+
-+ /*
-+ * Set the Master clock source to slow clock
-+ *
-+ * First set the CSS field, wait for MCKRDY
-+ * and than set the PRES and MDIV fields.
-+ *
-+ * See eratta #2[78] for details.
-+ */
-+
-+ bic r2, r2, #3
-+ str r2, [r1, #AT91_PMC_MCKR]
-+
-+ wait_mckrdy
-+
-+ mov r2, #0
-+ str r2, [r1, #AT91_PMC_MCKR]
-+
-+ /* Save PLLA setting and disable it */
-+
-+ ldr r2, [r1, #AT91_CKGR_PLLAR]
-+ str r2, .saved_pllar
-+
-+ mov r2, #0
-+ str r2, [r1, #AT91_CKGR_PLLAR]
-+
-+ wait_plladis
-+
-+ /* Turn off the main oscillator */
-+
-+ ldr r2, [r1, #AT91_CKGR_MOR]
-+ bic r2, r2, #AT91_PMC_MOSCEN
-+ str r2, [r1, #AT91_CKGR_MOR]
-+
-+ /* Wait for interrupt */
-+
-+ mcr p15, 0, r0, c7, c0, 4
-+
-+ /* Turn on the main oscillator */
-+
-+ ldr r2, [r1, #AT91_CKGR_MOR]
-+ orr r2, r2, #AT91_PMC_MOSCEN
-+ str r2, [r1, #AT91_CKGR_MOR]
-+
-+ wait_moscrdy
-+
-+ /* Restore PLLA setting */
-+
-+ ldr r2, .saved_pllar
-+ str r2, [r1, #AT91_CKGR_PLLAR]
-+
-+ wait_pllalock
-+
-+ /*
-+ * Restore master clock setting
-+ *
-+ * First set PRES if it was not 0,
-+ * than set CSS and MDIV fields.
-+ * After every change wait for
-+ * MCKRDY.
-+ *
-+ * See eratta #2[78] for details.
-+ */
-+
-+ ldr r2, .saved_mckr
-+ tst r2, #0x1C
-+ beq 2f
-+ and r2, r2, #0x1C
-+ str r2, [r1, #AT91_PMC_MCKR]
-+
-+ wait_mckrdy
-+
-+2: ldr r2, .saved_mckr
-+ str r2, [r1, #AT91_PMC_MCKR]
-+
-+ wait_mckrdy
-+
-+ mov pc, lr
-+
-+.saved_mckr:
-+ .word 0
-+
-+.saved_pllar:
-+ .word 0
-+
-+.at91_va_base_sys:
-+ .word AT91_VA_BASE_SYS
-+
-+ENTRY(at91rm9200_slow_clock_sz)
-+ .word .-at91rm9200_slow_clock
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.c linux-2.6-stable/arch/arm/mach-at91/tclib.c
---- linux-2.6.21/arch/arm/mach-at91/tclib.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/tclib.c Tue May 8 12:13:31 2007
-@@ -0,0 +1,17 @@
-+#include <linux/clk.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock *blocks;
-+static int nblocks;
-+
-+/*
-+ * Called from the processor-specific init to register the TC Blocks.
-+ */
-+void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n)
-+{
-+ blocks = tcblocks;
-+ nblocks = n;
-+}
-diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.h linux-2.6-stable/arch/arm/mach-at91/tclib.h
---- linux-2.6.21/arch/arm/mach-at91/tclib.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/arch/arm/mach-at91/tclib.h Tue May 8 12:13:31 2007
-@@ -0,0 +1,11 @@
-+
-+#define TC_PER_TCB 3
-+
-+struct atmel_tcblock {
-+ u32 physaddr;
-+ void __iomem *ioaddr;
-+ struct clk *clk[TC_PER_TCB];
-+ int irq[TC_PER_TCB];
-+};
-+
-+extern void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n);
-diff -urN -x CVS linux-2.6.21/arch/arm/mm/Kconfig linux-2.6-stable/arch/arm/mm/Kconfig
---- linux-2.6.21/arch/arm/mm/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/mm/Kconfig Wed May 9 10:20:54 2007
-@@ -171,8 +171,8 @@
- # ARM926T
- config CPU_ARM926T
- bool "Support ARM926T processor"
-- depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX
-- default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX
-+ depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX
-+ default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX
- select CPU_32v5
- select CPU_ABRT_EV5TJ
- select CPU_CACHE_VIVT
-diff -urN -x CVS linux-2.6.21/arch/arm/tools/mach-types linux-2.6-stable/arch/arm/tools/mach-types
---- linux-2.6.21/arch/arm/tools/mach-types Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/arch/arm/tools/mach-types Tue May 8 12:13:31 2007
-@@ -1335,3 +1335,32 @@
- comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327
- sbc2410x MACH_SBC2410X SBC2410X 1328
- at4x0bd MACH_AT4X0BD AT4X0BD 1329
-+cbifr MACH_CBIFR CBIFR 1330
-+arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331
-+matrix520 MACH_MATRIX520 MATRIX520 1332
-+matrix510 MACH_MATRIX510 MATRIX510 1333
-+matrix500 MACH_MATRIX500 MATRIX500 1334
-+m501 MACH_M501 M501 1335
-+aaeon1270 MACH_AAEON1270 AAEON1270 1336
-+matrix500ev MACH_MATRIX500EV MATRIX500EV 1337
-+pac500 MACH_PAC500 PAC500 1338
-+pnx8181 MACH_PNX8181 PNX8181 1339
-+colibri320 MACH_COLIBRI320 COLIBRI320 1340
-+aztoolbb MACH_AZTOOLBB AZTOOLBB 1341
-+aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342
-+dvlhost MACH_DVLHOST DVLHOST 1343
-+zir9200 MACH_ZIR9200 ZIR9200 1344
-+zir9260 MACH_ZIR9260 ZIR9260 1345
-+cocopah MACH_COCOPAH COCOPAH 1346
-+nds MACH_NDS NDS 1347
-+rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348
-+fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349
-+classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350
-+cam60 MACH_CAM60 CAM60 1351
-+mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352
-+datacall MACH_DATACALL DATACALL 1353
-+at91eb01 MACH_AT91EB01 AT91EB01 1354
-+rty MACH_RTY RTY 1355
-+dwl2100 MACH_DWL2100 DWL2100 1356
-+vinsi MACH_VINSI VINSI 1357
-+db88f5281 MACH_DB88F5281 DB88F5281 1358
-diff -urN -x CVS linux-2.6.21/drivers/char/Kconfig linux-2.6-stable/drivers/char/Kconfig
---- linux-2.6.21/drivers/char/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/char/Kconfig Tue May 8 14:31:24 2007
-@@ -1071,5 +1071,21 @@
- /sys/devices/platform/telco_clock, with a number of files for
- controlling the behavior of this hardware.
-
-+config AT91_SPI
-+ bool "SPI driver (legacy) for AT91RM9200 processors"
-+ depends on ARCH_AT91RM9200
-+ default y
-+ help
-+ The SPI driver gives access to this serial bus on the AT91RM9200
-+ processor.
-+
-+config AT91_SPIDEV
-+ bool "SPI device interface (legacy) for AT91RM9200 processors"
-+ depends on ARCH_AT91RM9200 && AT91_SPI
-+ default n
-+ help
-+ The SPI driver gives user mode access to this serial
-+ bus on the AT91RM9200 processor.
-+
- endmenu
-
-diff -urN -x CVS linux-2.6.21/drivers/char/Makefile linux-2.6-stable/drivers/char/Makefile
---- linux-2.6.21/drivers/char/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/char/Makefile Tue May 8 14:31:24 2007
-@@ -93,6 +93,8 @@
- obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
- obj-$(CONFIG_TANBAC_TB0219) += tb0219.o
- obj-$(CONFIG_TELCLOCK) += tlclk.o
-+obj-$(CONFIG_AT91_SPI) += at91_spi.o
-+obj-$(CONFIG_AT91_SPIDEV) += at91_spidev.o
-
- obj-$(CONFIG_WATCHDOG) += watchdog/
- obj-$(CONFIG_MWAVE) += mwave/
-diff -urN -x CVS linux-2.6.21/drivers/char/at91_spi.c linux-2.6-stable/drivers/char/at91_spi.c
---- linux-2.6.21/drivers/char/at91_spi.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/char/at91_spi.c Tue May 8 14:31:24 2007
-@@ -0,0 +1,336 @@
-+/*
-+ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
-+ *
-+ * Copyright (C) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/module.h>
-+#include <linux/sched.h>
-+#include <linux/completion.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/platform_device.h>
-+#include <linux/atmel_pdc.h>
-+#include <asm/io.h>
-+#include <asm/semaphore.h>
-+
-+#include <asm/arch/at91_spi.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/spi.h>
-+
-+#undef DEBUG_SPI
-+
-+static struct spi_local spi_dev[NR_SPI_DEVICES]; /* state of the SPI devices */
-+static int spi_enabled = 0;
-+static struct semaphore spi_lock; /* protect access to SPI bus */
-+static int current_device = -1; /* currently selected SPI device */
-+static struct clk *spi_clk; /* SPI clock */
-+static void __iomem *spi_base; /* SPI peripheral base-address */
-+
-+DECLARE_COMPLETION(transfer_complete);
-+
-+
-+#define at91_spi_read(reg) __raw_readl(spi_base + (reg))
-+#define at91_spi_write(reg, val) __raw_writel((val), spi_base + (reg))
-+
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Access and enable the SPI bus.
-+ * This MUST be called before any transfers are performed.
-+ */
-+void spi_access_bus(short device)
-+{
-+ /* Ensure that requested device is valid */
-+ if ((device < 0) || (device >= NR_SPI_DEVICES))
-+ panic("at91_spi: spi_access_bus called with invalid device");
-+
-+ if (spi_enabled == 0) {
-+ clk_enable(spi_clk); /* Enable Peripheral clock */
-+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
-+#ifdef DEBUG_SPI
-+ printk("SPI on\n");
-+#endif
-+ }
-+ spi_enabled++;
-+
-+ /* Lock the SPI bus */
-+ down(&spi_lock);
-+ current_device = device;
-+
-+ /* Configure SPI bus for device */
-+ at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
-+}
-+
-+/*
-+ * Relinquish control of the SPI bus.
-+ */
-+void spi_release_bus(short device)
-+{
-+ if (device != current_device)
-+ panic("at91_spi: spi_release called with invalid device");
-+
-+ /* Release the SPI bus */
-+ current_device = -1;
-+ up(&spi_lock);
-+
-+ spi_enabled--;
-+ if (spi_enabled == 0) {
-+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
-+ clk_disable(spi_clk); /* Disable Peripheral clock */
-+#ifdef DEBUG_SPI
-+ printk("SPI off\n");
-+#endif
-+ }
-+}
-+
-+/*
-+ * Perform a data transfer over the SPI bus
-+ */
-+int spi_transfer(struct spi_transfer_list* list)
-+{
-+ struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
-+ int tx_size;
-+
-+ if (!list)
-+ panic("at91_spi: spi_transfer called with NULL transfer list");
-+ if (current_device == -1)
-+ panic("at91_spi: spi_transfer called without acquiring bus");
-+
-+#ifdef DEBUG_SPI
-+ printk("SPI transfer start [%i]\n", list->nr_transfers);
-+#endif
-+
-+ /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
-+ tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
-+
-+ /* Store transfer list */
-+ device->xfers = list;
-+ list->curr = 0;
-+
-+ /* Assume there must be at least one transfer */
-+ device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
-+ device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
-+
-+ /* Program PDC registers */
-+ at91_spi_write(ATMEL_PDC_TPR, device->tx);
-+ at91_spi_write(ATMEL_PDC_RPR, device->rx);
-+ at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
-+ at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
-+
-+ /* Is there a second transfer? */
-+ if (list->nr_transfers > 1) {
-+ device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
-+ device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
-+
-+ /* Program Next PDC registers */
-+ at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
-+ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
-+ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
-+ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
-+ }
-+ else {
-+ device->txnext = 0;
-+ device->rxnext = 0;
-+ at91_spi_write(ATMEL_PDC_TNCR, 0);
-+ at91_spi_write(ATMEL_PDC_RNCR, 0);
-+ }
-+
-+ // TODO: If we are doing consecutive transfers (at high speed, or
-+ // small buffers), then it might be worth modifying the 'Delay between
-+ // Consecutive Transfers' in the CSR registers.
-+ // This is an issue if we cannot chain the next buffer fast enough
-+ // in the interrupt handler.
-+
-+ /* Enable transmitter and receiver */
-+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
-+
-+ at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX); /* enable buffer complete interrupt */
-+ wait_for_completion(&transfer_complete);
-+
-+#ifdef DEBUG_SPI
-+ printk("SPI transfer end\n");
-+#endif
-+
-+ return 0;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Handle interrupts from the SPI controller.
-+ */
-+static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
-+{
-+ unsigned int status;
-+ struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
-+ struct spi_transfer_list *list = device->xfers;
-+
-+#ifdef DEBUG_SPI
-+ printk("SPI interrupt %i\n", current_device);
-+#endif
-+
-+ if (!list)
-+ panic("at91_spi: spi_interrupt with a NULL transfer list");
-+
-+ status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR); /* read status */
-+
-+ dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
-+ dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
-+
-+ device->tx = device->txnext; /* move next transfer to current transfer */
-+ device->rx = device->rxnext;
-+
-+ list->curr = list->curr + 1;
-+ if (list->curr == list->nr_transfers) { /* all transfers complete */
-+ at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX); /* disable interrupt */
-+
-+ /* Disable transmitter and receiver */
-+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+
-+ device->xfers = NULL;
-+ complete(&transfer_complete);
-+ }
-+ else if (list->curr+1 == list->nr_transfers) { /* no more next transfers */
-+ device->txnext = 0;
-+ device->rxnext = 0;
-+ at91_spi_write(ATMEL_PDC_TNCR, 0);
-+ at91_spi_write(ATMEL_PDC_RNCR, 0);
-+ }
-+ else {
-+ int i = (list->curr)+1;
-+
-+ /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
-+ int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
-+
-+ device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
-+ device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
-+ at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
-+ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
-+ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
-+ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
-+ }
-+ return IRQ_HANDLED;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Initialize the SPI controller
-+ */
-+static int __init at91spi_probe(struct platform_device *pdev)
-+{
-+ int i;
-+ unsigned long scbr;
-+ struct resource *res;
-+
-+ init_MUTEX(&spi_lock);
-+
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!res)
-+ return -ENXIO;
-+
-+ if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
-+ return -EBUSY;
-+
-+ spi_base = ioremap(res->start, res->end - res->start + 1);
-+ if (!spi_base) {
-+ release_mem_region(res->start, res->end - res->start + 1);
-+ return -ENOMEM;
-+ }
-+
-+ spi_clk = clk_get(NULL, "spi_clk");
-+ if (IS_ERR(spi_clk)) {
-+ printk(KERN_ERR "at91_spi: no clock defined\n");
-+ iounmap(spi_base);
-+ release_mem_region(res->start, res->end - res->start + 1);
-+ return -ENODEV;
-+ }
-+
-+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST); /* software reset of SPI controller */
-+
-+ /*
-+ * Calculate the correct SPI baud-rate divisor.
-+ */
-+ scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
-+ scbr = scbr + 1; /* round up */
-+
-+ printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
-+
-+ /* Set Chip Select registers to good defaults */
-+ for (i = 0; i < 4; i++) {
-+ at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
-+ }
-+
-+ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+
-+ memset(&spi_dev, 0, sizeof(spi_dev));
-+ spi_dev[0].pcs = 0xE;
-+ spi_dev[1].pcs = 0xD;
-+ spi_dev[2].pcs = 0xB;
-+ spi_dev[3].pcs = 0x7;
-+
-+ if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
-+ clk_put(spi_clk);
-+ iounmap(spi_base);
-+ release_mem_region(res->start, res->end - res->start + 1);
-+ return -EBUSY;
-+ }
-+
-+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
-+
-+ return 0;
-+}
-+
-+static int __devexit at91spi_remove(struct platform_device *pdev)
-+{
-+ struct resource *res;
-+
-+ at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
-+ clk_put(spi_clk);
-+
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ iounmap(spi_base);
-+ release_mem_region(res->start, res->end - res->start + 1);
-+
-+ free_irq(AT91RM9200_ID_SPI, 0);
-+ return 0;
-+}
-+
-+static struct platform_driver at91spi_driver = {
-+ .probe = at91spi_probe,
-+ .remove = __devexit_p(at91spi_remove),
-+ .driver = {
-+ .name = "at91_spi",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init at91spi_init(void)
-+{
-+ return platform_driver_register(&at91spi_driver);
-+}
-+
-+static void __exit at91spi_exit(void)
-+{
-+ platform_driver_unregister(&at91spi_driver);
-+}
-+
-+EXPORT_SYMBOL(spi_access_bus);
-+EXPORT_SYMBOL(spi_release_bus);
-+EXPORT_SYMBOL(spi_transfer);
-+
-+module_init(at91spi_init);
-+module_exit(at91spi_exit);
-+
-+MODULE_LICENSE("GPL")
-+MODULE_AUTHOR("Andrew Victor")
-+MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
-diff -urN -x CVS linux-2.6.21/drivers/char/at91_spidev.c linux-2.6-stable/drivers/char/at91_spidev.c
---- linux-2.6.21/drivers/char/at91_spidev.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/char/at91_spidev.c Tue May 8 14:31:24 2007
-@@ -0,0 +1,236 @@
-+/*
-+ * User-space interface to the SPI bus on Atmel AT91RM9200
-+ *
-+ * Copyright (C) 2003 SAN People (Pty) Ltd
-+ *
-+ * Based on SPI driver by Rick Bronson
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/slab.h>
-+#include <linux/highmem.h>
-+#include <linux/pagemap.h>
-+#include <asm/arch/spi.h>
-+
-+#ifdef CONFIG_DEVFS_FS
-+#include <linux/devfs_fs_kernel.h>
-+#endif
-+
-+
-+#undef DEBUG_SPIDEV
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Read or Write to SPI bus.
-+ */
-+static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
-+{
-+ unsigned int spi_device = (unsigned int) file->private_data;
-+
-+ struct mm_struct * mm;
-+ struct page ** maplist;
-+ struct spi_transfer_list* list;
-+ int pgcount;
-+
-+ unsigned int ofs, pagelen;
-+ int res, i, err;
-+
-+ if (!count) {
-+ return 0;
-+ }
-+
-+ list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
-+ if (!list) {
-+ return -ENOMEM;
-+ }
-+
-+ mm = current->mm;
-+
-+ pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
-+
-+ if (pgcount >= MAX_SPI_TRANSFERS) {
-+ kfree(list);
-+ return -EFBIG;
-+ }
-+
-+ maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
-+
-+ if (!maplist) {
-+ kfree(list);
-+ return -ENOMEM;
-+ }
-+ flush_cache_all();
-+ down_read(&mm->mmap_sem);
-+ err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
-+ up_read(&mm->mmap_sem);
-+
-+ if (err < 0) {
-+ kfree(list);
-+ kfree(maplist);
-+ return err;
-+ }
-+ pgcount = err;
-+
-+#ifdef DEBUG_SPIDEV
-+ printk("spidev_rd_rw: %i %i\n", count, pgcount);
-+#endif
-+
-+ /* Set default return value = transfer length */
-+ res = count;
-+
-+ /*
-+ * At this point, the virtual area buf[0] .. buf[count-1] will have
-+ * corresponding pages mapped in the physical memory and locked until
-+ * we unmap the kiobuf. The pages cannot be swapped out or moved
-+ * around.
-+ */
-+ ofs = (unsigned long) buf & (PAGE_SIZE -1);
-+ pagelen = PAGE_SIZE - ofs;
-+ if (count < pagelen)
-+ pagelen = count;
-+
-+ for (i = 0; i < pgcount; i++) {
-+ flush_dcache_page(maplist[i]);
-+
-+ list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
-+ list->txlen[i] = list->rxlen[i] = pagelen;
-+
-+#ifdef DEBUG_SPIDEV
-+ printk(" %i: %x (%i)\n", i, list->tx[i], list->txlen[i]);
-+#endif
-+
-+ ofs = 0; /* all subsequent transfers start at beginning of a page */
-+ count = count - pagelen;
-+ pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
-+ }
-+ list->nr_transfers = pgcount;
-+
-+ /* Perform transfer on SPI bus */
-+ spi_access_bus(spi_device);
-+ spi_transfer(list);
-+ spi_release_bus(spi_device);
-+
-+ while (pgcount--) {
-+ page_cache_release (maplist[pgcount]);
-+ }
-+ flush_cache_all();
-+
-+ kfree(maplist);
-+ kfree(list);
-+
-+ return res;
-+}
-+
-+static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+ int spi_device = MINOR(inode->i_rdev);
-+
-+ if (spi_device >= NR_SPI_DEVICES)
-+ return -ENODEV;
-+
-+ // TODO: This interface can be used to configure the SPI bus.
-+ // Configurable options could include: Speed, Clock Polarity, Clock Phase
-+
-+ switch(cmd) {
-+ default:
-+ return -ENOIOCTLCMD;
-+ }
-+}
-+
-+/*
-+ * Open the SPI device
-+ */
-+static int spidev_open(struct inode *inode, struct file *file)
-+{
-+ unsigned int spi_device = MINOR(inode->i_rdev);
-+
-+ if (spi_device >= NR_SPI_DEVICES)
-+ return -ENODEV;
-+
-+ /*
-+ * 'private_data' is actually a pointer, but we overload it with the
-+ * value we want to store.
-+ */
-+ file->private_data = (void *)spi_device;
-+
-+ return 0;
-+}
-+
-+/*
-+ * Close the SPI device
-+ */
-+static int spidev_close(struct inode *inode, struct file *file)
-+{
-+ return 0;
-+}
-+
-+/* ......................................................................... */
-+
-+static struct file_operations spidev_fops = {
-+ .owner = THIS_MODULE,
-+ .llseek = no_llseek,
-+ .read = spidev_rd_wr,
-+ .write = (int (*) (struct file *file, const char *buf, size_t count, loff_t *offset))spidev_rd_wr,
-+ .ioctl = spidev_ioctl,
-+ .open = spidev_open,
-+ .release = spidev_close,
-+};
-+
-+/*
-+ * Install the SPI /dev interface driver
-+ */
-+static int __init at91_spidev_init(void)
-+{
-+#ifdef CONFIG_DEVFS_FS
-+ int i;
-+#endif
-+
-+ if (register_chrdev(SPI_MAJOR, "spi", &spidev_fops)) {
-+ printk(KERN_ERR "at91_spidev: Unable to get major %d for SPI bus\n", SPI_MAJOR);
-+ return -EIO;
-+ }
-+
-+#ifdef CONFIG_DEVFS_FS
-+ devfs_mk_dir("spi");
-+ for (i = 0; i < NR_SPI_DEVICES; i++) {
-+ devfs_mk_cdev(MKDEV(SPI_MAJOR, i), S_IFCHR | S_IRUSR | S_IWUSR, "spi/%d",i);
-+ }
-+#endif
-+ printk(KERN_INFO "AT91 SPI driver loaded\n");
-+
-+ return 0;
-+}
-+
-+/*
-+ * Remove the SPI /dev interface driver
-+ */
-+static void __exit at91_spidev_exit(void)
-+{
-+#ifdef CONFIG_DEVFS_FS
-+ int i;
-+ for (i = 0; i < NR_SPI_DEVICES; i++) {
-+ devfs_remove("spi/%d", i);
-+ }
-+
-+ devfs_remove("spi");
-+#endif
-+
-+ if (unregister_chrdev(SPI_MAJOR, "spi")) {
-+ printk(KERN_ERR "at91_spidev: Unable to release major %d for SPI bus\n", SPI_MAJOR);
-+ return;
-+ }
-+}
-+
-+module_init(at91_spidev_init);
-+module_exit(at91_spidev_exit);
-+
-+MODULE_LICENSE("GPL")
-+MODULE_AUTHOR("Andrew Victor")
-+MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200")
-diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Kconfig linux-2.6-stable/drivers/i2c/busses/Kconfig
---- linux-2.6.21/drivers/i2c/busses/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/i2c/busses/Kconfig Tue May 8 12:13:31 2007
-@@ -81,6 +81,14 @@
- This supports the use of the I2C interface on Atmel AT91
- processors.
-
-+config I2C_AT91_CLOCKRATE
-+ prompt "Atmel AT91 I2C/TWI clock-rate"
-+ depends on I2C_AT91
-+ int
-+ default 100000
-+ help
-+ Set the AT91 I2C/TWI clock-rate.
-+
- config I2C_AU1550
- tristate "Au1550/Au1200 SMBus interface"
- depends on I2C && (SOC_AU1550 || SOC_AU1200)
-@@ -545,6 +553,14 @@
- This driver can also be built as a module. If so, the module
- will be called i2c-voodoo3.
-
-+config I2C_PCA
-+ tristate "PCA9564"
-+ depends on I2C
-+ select I2C_ALGOPCA
-+ help
-+ This driver support the Philips PCA 9564 Parallel bus to I2C
-+ bus controller.
-+
- config I2C_PCA_ISA
- tristate "PCA9564 on an ISA bus"
- depends on I2C
-diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Makefile linux-2.6-stable/drivers/i2c/busses/Makefile
---- linux-2.6.21/drivers/i2c/busses/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/i2c/busses/Makefile Tue May 8 12:13:31 2007
-@@ -28,6 +28,7 @@
- obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
- obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
- obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
-+obj-$(CONFIG_I2C_PCA) += i2c-pca.o
- obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
- obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
- obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
-diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-at91.c linux-2.6-stable/drivers/i2c/busses/i2c-at91.c
---- linux-2.6.21/drivers/i2c/busses/i2c-at91.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/i2c/busses/i2c-at91.c Tue May 8 12:13:31 2007
-@@ -31,8 +31,11 @@
- #include <asm/arch/board.h>
- #include <asm/arch/cpu.h>
-
--#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
-
-+/* Clockrate is configurable - max 400 Kbits/sec */
-+static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE;
-+module_param(clockrate, uint, 0);
-+MODULE_PARM_DESC(clockrate, "The TWI clockrate");
-
- static struct clk *twi_clk;
- static void __iomem *twi_base;
-@@ -53,7 +56,7 @@
- at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
-
- /* Calcuate clock dividers */
-- cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
-+ cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
- cdiv = cdiv + 1; /* round up */
- ckdiv = 0;
- while (cdiv > 255) {
-@@ -61,11 +64,12 @@
- cdiv = cdiv >> 1;
- }
-
-- if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */
-- if (ckdiv > 5) {
-- printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
-- ckdiv = 5;
-- }
-+ if (cpu_is_at91rm9200() && (ckdiv > 5)) { /* AT91RM9200 Errata #22 */
-+ printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
-+ ckdiv = 5;
-+ } else if (ckdiv > 7) {
-+ printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
-+ ckdiv = 7;
- }
-
- at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
-diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-pca.c linux-2.6-stable/drivers/i2c/busses/i2c-pca.c
---- linux-2.6.21/drivers/i2c/busses/i2c-pca.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/i2c/busses/i2c-pca.c Tue May 8 12:13:31 2007
-@@ -0,0 +1,213 @@
-+/*
-+ * Platform driver for PCA9564 I2C bus controller.
-+ *
-+ * (C) 2006 Andrew Victor
-+ *
-+ * Based on i2c-pca-isa.c driver for PCA9564 on ISA boards
-+ * Copyright (C) 2004 Arcom Control Systems
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/wait.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/i2c.h>
-+#include <linux/i2c-algo-pca.h>
-+
-+#include <asm/io.h>
-+
-+#include "../algos/i2c-algo-pca.h"
-+
-+#define PCA_OWN_ADDRESS 0x55 /* our address for slave mode */
-+#define PCA_CLOCK I2C_PCA_CON_59kHz
-+
-+//#define REG_SHIFT 2
-+#define REG_SHIFT 0
-+
-+//#define DEBUG_IO
-+
-+#define PCA_IO_SIZE 4
-+
-+static void __iomem *base_addr;
-+static int irq;
-+static wait_queue_head_t pca_wait;
-+
-+static int pca_getown(struct i2c_algo_pca_data *adap)
-+{
-+ return PCA_OWN_ADDRESS;
-+}
-+
-+static int pca_getclock(struct i2c_algo_pca_data *adap)
-+{
-+ return PCA_CLOCK;
-+}
-+
-+static void pca_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
-+{
-+#ifdef DEBUG_IO
-+ static char *names[] = { "T/O", "DAT", "ADR", "CON" };
-+ printk("*** write %s at %#lx <= %#04x\n", names[reg], (unsigned long) base_addr+reg, val);
-+#endif
-+ udelay(1);
-+ outb(val, base_addr + (reg << REG_SHIFT));
-+}
-+
-+static int pca_readbyte(struct i2c_algo_pca_data *adap, int reg)
-+{
-+ int res;
-+
-+ udelay(1);
-+ res = inb(base_addr + (reg << REG_SHIFT));
-+#ifdef DEBUG_IO
-+ {
-+ static char *names[] = { "STA", "DAT", "ADR", "CON" };
-+ printk("*** read %s => %#04x\n", names[reg], res);
-+ }
-+#endif
-+ return res;
-+}
-+
-+static int pca_waitforinterrupt(struct i2c_algo_pca_data *adap)
-+{
-+ int ret = 0;
-+
-+ if (irq > -1) {
-+ ret = wait_event_interruptible(pca_wait,
-+ pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI);
-+ } else {
-+ while ((pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
-+ udelay(100);
-+ }
-+ return ret;
-+}
-+
-+static irqreturn_t pca_handler(int this_irq, void *dev_id)
-+{
-+ wake_up_interruptible(&pca_wait);
-+ return IRQ_HANDLED;
-+}
-+
-+static struct i2c_algo_pca_data pca_i2c_data = {
-+ .get_own = pca_getown,
-+ .get_clock = pca_getclock,
-+ .write_byte = pca_writebyte,
-+ .read_byte = pca_readbyte,
-+ .wait_for_interrupt = pca_waitforinterrupt,
-+};
-+
-+static struct i2c_adapter pca_i2c_ops = {
-+ .owner = THIS_MODULE,
-+ .id = I2C_HW_A_PLAT,
-+ .algo_data = &pca_i2c_data,
-+ .name = "PCA9564",
-+ .class = I2C_CLASS_HWMON,
-+};
-+
-+static int __devinit pca_i2c_probe(struct platform_device *pdev)
-+{
-+ struct resource *res;
-+
-+ init_waitqueue_head(&pca_wait);
-+
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!res)
-+ return -ENODEV;
-+
-+ if (!request_mem_region(res->start, PCA_IO_SIZE, "PCA9564"))
-+ return -ENXIO;
-+
-+ base_addr = ioremap(res->start, PCA_IO_SIZE);
-+ if (base_addr == NULL)
-+ goto out_region;
-+
-+ irq = platform_get_irq(pdev, 0);
-+ if (irq > -1) {
-+ if (request_irq(irq, pca_handler, 0, "pca9564", NULL) < 0) {
-+ printk(KERN_ERR "i2c-pca: Request irq%d failed\n", irq);
-+ goto out_remap;
-+ }
-+ }
-+
-+ /* set up the driverfs linkage to our parent device */
-+ pca_i2c_ops.dev.parent = &pdev->dev;
-+
-+ if (i2c_pca_add_bus(&pca_i2c_ops) < 0) {
-+ printk(KERN_ERR "i2c-pca: Failed to add i2c bus\n");
-+ goto out_irq;
-+ }
-+
-+ return 0;
-+
-+ out_irq:
-+ if (irq > -1)
-+ free_irq(irq, &pca_i2c_ops);
-+
-+ out_remap:
-+ iounmap(base_addr);
-+
-+ out_region:
-+ release_mem_region(res->start, PCA_IO_SIZE);
-+ return -ENODEV;
-+}
-+
-+static int __devexit pca_i2c_remove(struct platform_device *pdev)
-+{
-+ struct resource *res;
-+
-+ i2c_del_adapter(&pca_i2c_ops);
-+
-+ if (irq > 0)
-+ free_irq(irq, NULL);
-+
-+ iounmap(base_addr);
-+
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ release_mem_region(res->start, PCA_IO_SIZE);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver pca_i2c_driver = {
-+ .probe = pca_i2c_probe,
-+ .remove = __devexit_p(pca_i2c_remove),
-+ .driver = {
-+ .name = "pca9564",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init pca_i2c_init(void)
-+{
-+ return platform_driver_register(&pca_i2c_driver);
-+}
-+
-+static void __exit pca_i2c_exit(void)
-+{
-+ platform_driver_unregister(&pca_i2c_driver);
-+}
-+
-+module_init(pca_i2c_init);
-+module_exit(pca_i2c_exit);
-+
-+MODULE_AUTHOR("Andrew Victor");
-+MODULE_DESCRIPTION("PCA9564 platform driver");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/drivers/input/touchscreen/ads7846.c linux-2.6-stable/drivers/input/touchscreen/ads7846.c
---- linux-2.6.21/drivers/input/touchscreen/ads7846.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/input/touchscreen/ads7846.c Tue May 8 12:56:33 2007
-@@ -39,7 +39,8 @@
- /*
- * This code has been heavily tested on a Nokia 770, and lightly
- * tested on other ads7846 devices (OSK/Mistral, Lubbock).
-- * Support for ads7843 and ads7845 has only been stubbed in.
-+ * Support for ads7843 tested on Atmel at91sam926x-EK.
-+ * Support for ads7845 has only been stubbed in.
- *
- * IRQ handling needs a workaround because of a shortcoming in handling
- * edge triggered IRQs on some platforms like the OMAP1/2. These
-@@ -246,18 +247,16 @@
-
- /* REVISIT: take a few more samples, and compare ... */
-
-- /* maybe off internal vREF */
-- if (use_internal) {
-- req->ref_off = REF_OFF;
-- req->xfer[4].tx_buf = &req->ref_off;
-- req->xfer[4].len = 1;
-- spi_message_add_tail(&req->xfer[4], &req->msg);
--
-- req->xfer[5].rx_buf = &req->scratch;
-- req->xfer[5].len = 2;
-- CS_CHANGE(req->xfer[5]);
-- spi_message_add_tail(&req->xfer[5], &req->msg);
-- }
-+ /* converter in low power mode & enable PENIRQ */
-+ req->ref_off = PWRDOWN;
-+ req->xfer[4].tx_buf = &req->ref_off;
-+ req->xfer[4].len = 1;
-+ spi_message_add_tail(&req->xfer[4], &req->msg);
-+
-+ req->xfer[5].rx_buf = &req->scratch;
-+ req->xfer[5].len = 2;
-+ CS_CHANGE(req->xfer[5]);
-+ spi_message_add_tail(&req->xfer[5], &req->msg);
-
- ts->irq_disabled = 1;
- disable_irq(spi->irq);
-@@ -536,6 +535,9 @@
- } else
- Rt = 0;
-
-+ if (ts->model == 7843)
-+ Rt = ts->pressure_max / 2;
-+
- /* Sample found inconsistent by debouncing or pressure is beyond
- * the maximum. Don't report it to user space, repeat at least
- * once more the measurement
-diff -urN -x CVS linux-2.6.21/drivers/leds/Kconfig linux-2.6-stable/drivers/leds/Kconfig
---- linux-2.6.21/drivers/leds/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/leds/Kconfig Tue May 8 12:13:31 2007
-@@ -76,6 +76,13 @@
- This option enables support for the Soekris net4801 and net4826 error
- LED.
-
-+config LEDS_AT91
-+ tristate "LED support using AT91 GPIOs"
-+ depends on LEDS_CLASS && ARCH_AT91 && !LEDS
-+ help
-+ This option enables support for LEDs connected to GPIO lines
-+ on AT91-based boards.
-+
- config LEDS_WRAP
- tristate "LED Support for the WRAP series LEDs"
- depends on LEDS_CLASS && SCx200_GPIO
-diff -urN -x CVS linux-2.6.21/drivers/leds/Makefile linux-2.6-stable/drivers/leds/Makefile
---- linux-2.6.21/drivers/leds/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/leds/Makefile Tue May 8 12:13:31 2007
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
- obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
- obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o
-+obj-$(CONFIG_LEDS_AT91) += leds-at91.o
-
- # LED Triggers
- obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
-diff -urN -x CVS linux-2.6.21/drivers/leds/leds-at91.c linux-2.6-stable/drivers/leds/leds-at91.c
---- linux-2.6.21/drivers/leds/leds-at91.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/leds/leds-at91.c Tue May 8 12:13:31 2007
-@@ -0,0 +1,140 @@
-+/*
-+ * AT91 GPIO based LED driver
-+ *
-+ * Copyright (C) 2006 David Brownell
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+static LIST_HEAD(at91_led_list); /* list of AT91 LEDs */
-+
-+struct at91_led {
-+ struct led_classdev cdev;
-+ struct list_head list;
-+ struct at91_gpio_led *led_data;
-+};
-+
-+/*
-+ * Change the state of the LED.
-+ */
-+static void at91_led_set(struct led_classdev *cdev, enum led_brightness value)
-+{
-+ struct at91_led *led = container_of(cdev, struct at91_led, cdev);
-+ short active = (value == LED_OFF);
-+
-+ if (led->led_data->flags & 1) /* active high/low? */
-+ active = !active;
-+ at91_set_gpio_value(led->led_data->gpio, active);
-+}
-+
-+static int __devexit at91_led_remove(struct platform_device *pdev)
-+{
-+ struct at91_led *led;
-+
-+ list_for_each_entry (led, &at91_led_list, list)
-+ led_classdev_unregister(&led->cdev);
-+
-+#warning "Free allocated memory"
-+ // TODO: Free memory. kfree(led);
-+
-+ return 0;
-+}
-+
-+static int __init at91_led_probe(struct platform_device *pdev)
-+{
-+ int status = 0;
-+ struct at91_gpio_led *pdata = pdev->dev.platform_data;
-+ unsigned nr_leds;
-+ struct at91_led *led;
-+
-+ if (!pdata)
-+ return -ENODEV;
-+
-+ nr_leds = pdata->index; /* first index stores number of LEDs */
-+
-+ while (nr_leds--) {
-+ led = kzalloc(sizeof(struct at91_led), GFP_KERNEL);
-+ if (!led) {
-+ dev_err(&pdev->dev, "No memory for device\n");
-+ status = -ENOMEM;
-+ goto cleanup;
-+ }
-+ led->led_data = pdata;
-+ led->cdev.name = pdata->name;
-+ led->cdev.brightness_set = at91_led_set,
-+ led->cdev.default_trigger = pdata->trigger;
-+
-+ status = led_classdev_register(&pdev->dev, &led->cdev);
-+ if (status < 0) {
-+ dev_err(&pdev->dev, "led_classdev_register failed - %d\n", status);
-+cleanup:
-+ at91_led_remove(pdev);
-+ break;
-+ }
-+ list_add(&led->list, &at91_led_list);
-+ pdata++;
-+ }
-+ return status;
-+}
-+
-+#ifdef CONFIG_PM
-+static int at91_led_suspend(struct platform_device *dev, pm_message_t state)
-+{
-+ struct at91_led *led;
-+
-+ list_for_each_entry (led, &at91_led_list, list)
-+ led_classdev_suspend(&led->cdev);
-+
-+ return 0;
-+}
-+
-+static int at91_led_resume(struct platform_device *dev)
-+{
-+ struct at91_led *led;
-+
-+ list_for_each_entry (led, &at91_led_list, list)
-+ led_classdev_resume(&led->cdev);
-+
-+ return 0;
-+}
-+#else
-+#define at91_led_suspend NULL
-+#define at91_led_resume NULL
-+#endif
-+
-+static struct platform_driver at91_led_driver = {
-+ .probe = at91_led_probe,
-+ .remove = __devexit_p(at91_led_remove),
-+ .suspend = at91_led_suspend,
-+ .resume = at91_led_resume,
-+ .driver = {
-+ .name = "at91_leds",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init at91_led_init(void)
-+{
-+ return platform_driver_register(&at91_led_driver);
-+}
-+module_init(at91_led_init);
-+
-+static void __exit at91_led_exit(void)
-+{
-+ platform_driver_unregister(&at91_led_driver);
-+}
-+module_exit(at91_led_exit);
-+
-+MODULE_DESCRIPTION("AT91 GPIO LED driver");
-+MODULE_AUTHOR("David Brownell");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/drivers/mmc/at91_mci.c linux-2.6-stable/drivers/mmc/at91_mci.c
---- linux-2.6.21/drivers/mmc/at91_mci.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/mmc/at91_mci.c Fri May 11 17:13:13 2007
-@@ -86,7 +86,7 @@
-
- #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
- | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
-- | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
-+ | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
-
- #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
- #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
-@@ -561,9 +561,7 @@
- pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
- status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
-
-- if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
-- AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
-- AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
-+ if (status & AT91_MCI_ERRORS) {
- if ((status & AT91_MCI_RCRCE) &&
- ((cmd->opcode == MMC_SEND_OP_COND) || (cmd->opcode == SD_APP_OP_COND))) {
- cmd->error = MMC_ERR_NONE;
-@@ -665,15 +663,15 @@
-
- int_status = at91_mci_read(host, AT91_MCI_SR);
- int_mask = at91_mci_read(host, AT91_MCI_IMR);
--
-+
- pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
- int_status & int_mask);
--
-+
- int_status = int_status & int_mask;
-
- if (int_status & AT91_MCI_ERRORS) {
- completed = 1;
--
-+
- if (int_status & AT91_MCI_UNRE)
- pr_debug("MMC: Underrun error\n");
- if (int_status & AT91_MCI_OVRE)
-@@ -821,7 +819,7 @@
- mmc->f_min = 375000;
- mmc->f_max = 25000000;
- mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
-- mmc->caps = MMC_CAP_BYTEBLOCK;
-+ mmc->caps = MMC_CAP_BYTEBLOCK | MMC_CAP_MULTIWRITE;
-
- mmc->max_blk_size = 4095;
- mmc->max_blk_count = mmc->max_req_size;
-@@ -895,6 +893,8 @@
-
- mmc_add_host(mmc);
-
-+ device_init_wakeup(&pdev->dev, 1);
-+
- /*
- * monitor card insertion/removal if we can
- */
-@@ -924,6 +924,8 @@
-
- host = mmc_priv(mmc);
-
-+ device_init_wakeup(&pdev->dev, 0);
-+
- if (host->present != -1) {
- free_irq(host->board->det_pin, host);
- cancel_delayed_work(&host->mmc->detect);
-@@ -951,8 +953,12 @@
- static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
- {
- struct mmc_host *mmc = platform_get_drvdata(pdev);
-+ struct at91mci_host *host = mmc_priv(mmc);
- int ret = 0;
-
-+ if (device_may_wakeup(&pdev->dev))
-+ enable_irq_wake(host->board->det_pin);
-+
- if (mmc)
- ret = mmc_suspend_host(mmc, state);
-
-@@ -962,8 +968,12 @@
- static int at91_mci_resume(struct platform_device *pdev)
- {
- struct mmc_host *mmc = platform_get_drvdata(pdev);
-+ struct at91mci_host *host = mmc_priv(mmc);
- int ret = 0;
-
-+ if (device_may_wakeup(&pdev->dev))
-+ disable_irq_wake(host->board->det_pin);
-+
- if (mmc)
- ret = mmc_resume_host(mmc);
-
-diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Kconfig linux-2.6-stable/drivers/mtd/devices/Kconfig
---- linux-2.6.21/drivers/mtd/devices/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/mtd/devices/Kconfig Tue May 8 14:31:24 2007
-@@ -267,5 +267,11 @@
- LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
- you have managed to wipe the first block.
-
--endmenu
-+config MTD_AT91_DATAFLASH
-+ tristate "AT91RM9200 DataFlash AT45DBxxx (legacy driver)"
-+ depends on MTD && ARCH_AT91RM9200 && AT91_SPI
-+ help
-+ This enables access to the DataFlash (AT45DBxxx) on the AT91RM9200.
-+ If you have such a board, say 'Y'.
-
-+endmenu
-diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Makefile linux-2.6-stable/drivers/mtd/devices/Makefile
---- linux-2.6.21/drivers/mtd/devices/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/mtd/devices/Makefile Tue May 8 14:31:24 2007
-@@ -17,3 +17,4 @@
- obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
- obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
- obj-$(CONFIG_MTD_M25P80) += m25p80.o
-+obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o
-diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/at91_dataflash.c linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c
---- linux-2.6.21/drivers/mtd/devices/at91_dataflash.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c Tue May 8 14:31:24 2007
-@@ -0,0 +1,667 @@
-+/*
-+ * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder)
-+ *
-+ * Copyright (C) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/slab.h>
-+#include <linux/pci.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+#include <asm/arch/spi.h>
-+
-+#undef DEBUG_DATAFLASH
-+
-+#define DATAFLASH_MAX_DEVICES 4 /* max number of dataflash devices */
-+#undef DATAFLASH_ALWAYS_ADD_DEVICE /* always add whole device when using partitions? */
-+
-+#define OP_READ_CONTINUOUS 0xE8
-+#define OP_READ_PAGE 0xD2
-+#define OP_READ_BUFFER1 0xD4
-+#define OP_READ_BUFFER2 0xD6
-+#define OP_READ_STATUS 0xD7
-+
-+#define OP_ERASE_PAGE 0x81
-+#define OP_ERASE_BLOCK 0x50
-+
-+#define OP_TRANSFER_BUF1 0x53
-+#define OP_TRANSFER_BUF2 0x55
-+#define OP_COMPARE_BUF1 0x60
-+#define OP_COMPARE_BUF2 0x61
-+
-+#define OP_PROGRAM_VIA_BUF1 0x82
-+#define OP_PROGRAM_VIA_BUF2 0x85
-+
-+struct dataflash_local
-+{
-+ int spi; /* SPI chip-select number */
-+
-+ unsigned int page_size; /* number of bytes per page */
-+ unsigned short page_offset; /* page offset in flash address */
-+};
-+
-+
-+/* Detected DataFlash devices */
-+static struct mtd_info* mtd_devices[DATAFLASH_MAX_DEVICES];
-+static int nr_devices = 0;
-+
-+/* ......................................................................... */
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+
-+static struct mtd_partition static_partitions_2M[] =
-+{
-+ {
-+ .name = "bootloader",
-+ .offset = 0,
-+ .size = 1 * 32 * 8 * 528, /* 1st sector = 32 blocks * 8 pages * 528 bytes */
-+ .mask_flags = MTD_WRITEABLE, /* read-only */
-+ },
-+ {
-+ .name = "kernel",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 6 * 32 * 8 * 528, /* 6 sectors */
-+ },
-+ {
-+ .name = "filesystem",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = MTDPART_SIZ_FULL, /* rest = 9 sectors */
-+ }
-+};
-+
-+static struct mtd_partition static_partitions_4M[] =
-+{
-+ {
-+ .name = "bootloader",
-+ .offset = 0,
-+ .size = 1 * 64 * 8 * 528, /* 1st sector = 64 blocks * 8 pages * 528 bytes */
-+ .mask_flags = MTD_WRITEABLE, /* read-only */
-+ },
-+ {
-+ .name = "kernel",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 4 * 64 * 8 * 528, /* 4 sectors */
-+ },
-+ {
-+ .name = "filesystem",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = MTDPART_SIZ_FULL, /* rest = 11 sectors */
-+ }
-+};
-+
-+#if defined(CONFIG_MACH_KAFA)
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+ {
-+ name: "romboot",
-+ offset: 0,
-+ size: 16 * 1056, /* 160 Kb */
-+ mask_flags: MTD_WRITEABLE, /* read-only */
-+ },
-+ {
-+ name: "uboot",
-+ offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+ size: 128 * 1056, /* 1 MB */
-+ },
-+ {
-+ name: "kernel",
-+ offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+ size: 1024 * 1056, /* 1 MB */
-+ },
-+ {
-+ name: "filesystem",
-+ offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+ size: MTDPART_SIZ_FULL,
-+ }
-+};
-+
-+#elif defined(CONFIG_MACH_MULTMDP)
-+
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+ {
-+ .name = "bootloader",
-+ .offset = 0,
-+ .size = 12 * 1056, /* 1st sector = 32 blocks * 8 pages * 1056 bytes */
-+ .mask_flags = MTD_WRITEABLE, /* read-only */
-+ },
-+ {
-+ .name = "configuration",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 20 * 1056,
-+ },
-+ {
-+ .name = "kernel",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 1520 * 1056,
-+ },
-+ {
-+ .name = "filesystem",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = MTDPART_SIZ_FULL,
-+ }
-+};
-+
-+#else
-+
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+ {
-+ .name = "bootloader",
-+ .offset = 0,
-+ .size = 1 * 32 * 8 * 1056, /* 1st sector = 32 blocks * 8 pages * 1056 bytes */
-+ .mask_flags = MTD_WRITEABLE, /* read-only */
-+ },
-+ {
-+ .name = "kernel",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = 5 * 32 * 8 * 1056, /* 5 sectors */
-+ },
-+ {
-+ .name = "filesystem",
-+ .offset = MTDPART_OFS_NXTBLK,
-+ .size = MTDPART_SIZ_FULL, /* rest = 26 sectors */
-+ }
-+};
-+#endif
-+
-+static const char *part_probes[] = { "cmdlinepart", NULL, };
-+
-+#endif
-+
-+/* ......................................................................... */
-+
-+/* Allocate a single SPI transfer descriptor. We're assuming that if multiple
-+ SPI transfers occur at the same time, spi_access_bus() will serialize them.
-+ If this is not valid, then either (i) each dataflash 'priv' structure
-+ needs it's own transfer descriptor, (ii) we lock this one, or (iii) use
-+ another mechanism. */
-+static struct spi_transfer_list* spi_transfer_desc;
-+
-+/*
-+ * Perform a SPI transfer to access the DataFlash device.
-+ */
-+static int do_spi_transfer(int nr, char* tx, int tx_len, char* rx, int rx_len,
-+ char* txnext, int txnext_len, char* rxnext, int rxnext_len)
-+{
-+ struct spi_transfer_list* list = spi_transfer_desc;
-+
-+ list->tx[0] = tx; list->txlen[0] = tx_len;
-+ list->rx[0] = rx; list->rxlen[0] = rx_len;
-+
-+ list->tx[1] = txnext; list->txlen[1] = txnext_len;
-+ list->rx[1] = rxnext; list->rxlen[1] = rxnext_len;
-+
-+ list->nr_transfers = nr;
-+
-+ return spi_transfer(list);
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Poll the DataFlash device until it is READY.
-+ */
-+static void at91_dataflash_waitready(void)
-+{
-+ char* command = kmalloc(2, GFP_KERNEL);
-+
-+ if (!command)
-+ return;
-+
-+ do {
-+ command[0] = OP_READ_STATUS;
-+ command[1] = 0;
-+
-+ do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
-+ } while ((command[1] & 0x80) == 0);
-+
-+ kfree(command);
-+}
-+
-+/*
-+ * Return the status of the DataFlash device.
-+ */
-+static unsigned short at91_dataflash_status(void)
-+{
-+ unsigned short status;
-+ char* command = kmalloc(2, GFP_KERNEL);
-+
-+ if (!command)
-+ return 0;
-+
-+ command[0] = OP_READ_STATUS;
-+ command[1] = 0;
-+
-+ do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
-+ status = command[1];
-+
-+ kfree(command);
-+ return status;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Erase blocks of flash.
-+ */
-+static int at91_dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
-+{
-+ struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+ unsigned int pageaddr;
-+ char* command;
-+
-+#ifdef DEBUG_DATAFLASH
-+ printk("dataflash_erase: addr=%i len=%i\n", instr->addr, instr->len);
-+#endif
-+
-+ /* Sanity checks */
-+ if (instr->addr + instr->len > mtd->size)
-+ return -EINVAL;
-+ if ((instr->len % mtd->erasesize != 0) || (instr->len % priv->page_size != 0))
-+ return -EINVAL;
-+ if ((instr->addr % priv->page_size) != 0)
-+ return -EINVAL;
-+
-+ command = kmalloc(4, GFP_KERNEL);
-+ if (!command)
-+ return -ENOMEM;
-+
-+ while (instr->len > 0) {
-+ /* Calculate flash page address */
-+ pageaddr = (instr->addr / priv->page_size) << priv->page_offset;
-+
-+ command[0] = OP_ERASE_PAGE;
-+ command[1] = (pageaddr & 0x00FF0000) >> 16;
-+ command[2] = (pageaddr & 0x0000FF00) >> 8;
-+ command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+ printk("ERASE: (%x) %x %x %x [%i]\n", command[0], command[1], command[2], command[3], pageaddr);
-+#endif
-+
-+ /* Send command to SPI device */
-+ spi_access_bus(priv->spi);
-+ do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+
-+ at91_dataflash_waitready(); /* poll status until ready */
-+ spi_release_bus(priv->spi);
-+
-+ instr->addr += priv->page_size; /* next page */
-+ instr->len -= priv->page_size;
-+ }
-+
-+ kfree(command);
-+
-+ /* Inform MTD subsystem that erase is complete */
-+ instr->state = MTD_ERASE_DONE;
-+ if (instr->callback)
-+ instr->callback(instr);
-+
-+ return 0;
-+}
-+
-+/*
-+ * Read from the DataFlash device.
-+ * from : Start offset in flash device
-+ * len : Amount to read
-+ * retlen : About of data actually read
-+ * buf : Buffer containing the data
-+ */
-+static int at91_dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
-+{
-+ struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+ unsigned int addr;
-+ char* command;
-+
-+#ifdef DEBUG_DATAFLASH
-+ printk("dataflash_read: %lli .. %lli\n", from, from+len);
-+#endif
-+
-+ *retlen = 0;
-+
-+ /* Sanity checks */
-+ if (!len)
-+ return 0;
-+ if (from + len > mtd->size)
-+ return -EINVAL;
-+
-+ /* Calculate flash page/byte address */
-+ addr = (((unsigned)from / priv->page_size) << priv->page_offset) + ((unsigned)from % priv->page_size);
-+
-+ command = kmalloc(8, GFP_KERNEL);
-+ if (!command)
-+ return -ENOMEM;
-+
-+ command[0] = OP_READ_CONTINUOUS;
-+ command[1] = (addr & 0x00FF0000) >> 16;
-+ command[2] = (addr & 0x0000FF00) >> 8;
-+ command[3] = (addr & 0x000000FF);
-+#ifdef DEBUG_DATAFLASH
-+ printk("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+
-+ /* Send command to SPI device */
-+ spi_access_bus(priv->spi);
-+ do_spi_transfer(2, command, 8, command, 8, buf, len, buf, len);
-+ spi_release_bus(priv->spi);
-+
-+ *retlen = len;
-+ kfree(command);
-+ return 0;
-+}
-+
-+/*
-+ * Write to the DataFlash device.
-+ * to : Start offset in flash device
-+ * len : Amount to write
-+ * retlen : Amount of data actually written
-+ * buf : Buffer containing the data
-+ */
-+static int at91_dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
-+{
-+ struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+ unsigned int pageaddr, addr, offset, writelen;
-+ size_t remaining;
-+ u_char *writebuf;
-+ unsigned short status;
-+ int res = 0;
-+ char* command;
-+ char* tmpbuf = NULL;
-+
-+#ifdef DEBUG_DATAFLASH
-+ printk("dataflash_write: %lli .. %lli\n", to, to+len);
-+#endif
-+
-+ *retlen = 0;
-+
-+ /* Sanity checks */
-+ if (!len)
-+ return 0;
-+ if (to + len > mtd->size)
-+ return -EINVAL;
-+
-+ command = kmalloc(4, GFP_KERNEL);
-+ if (!command)
-+ return -ENOMEM;
-+
-+ pageaddr = ((unsigned)to / priv->page_size);
-+ offset = ((unsigned)to % priv->page_size);
-+ if (offset + len > priv->page_size)
-+ writelen = priv->page_size - offset;
-+ else
-+ writelen = len;
-+ writebuf = (u_char *)buf;
-+ remaining = len;
-+
-+ /* Allocate temporary buffer */
-+ tmpbuf = kmalloc(priv->page_size, GFP_KERNEL);
-+ if (!tmpbuf) {
-+ kfree(command);
-+ return -ENOMEM;
-+ }
-+
-+ /* Gain access to the SPI bus */
-+ spi_access_bus(priv->spi);
-+
-+ while (remaining > 0) {
-+#ifdef DEBUG_DATAFLASH
-+ printk("write @ %i:%i len=%i\n", pageaddr, offset, writelen);
-+#endif
-+
-+ /* (1) Transfer to Buffer1 */
-+ if (writelen != priv->page_size) {
-+ addr = pageaddr << priv->page_offset;
-+ command[0] = OP_TRANSFER_BUF1;
-+ command[1] = (addr & 0x00FF0000) >> 16;
-+ command[2] = (addr & 0x0000FF00) >> 8;
-+ command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+ printk("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+ do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+ at91_dataflash_waitready();
-+ }
-+
-+ /* (2) Program via Buffer1 */
-+ addr = (pageaddr << priv->page_offset) + offset;
-+ command[0] = OP_PROGRAM_VIA_BUF1;
-+ command[1] = (addr & 0x00FF0000) >> 16;
-+ command[2] = (addr & 0x0000FF00) >> 8;
-+ command[3] = (addr & 0x000000FF);
-+#ifdef DEBUG_DATAFLASH
-+ printk("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+ do_spi_transfer(2, command, 4, command, 4, writebuf, writelen, tmpbuf, writelen);
-+ at91_dataflash_waitready();
-+
-+ /* (3) Compare to Buffer1 */
-+ addr = pageaddr << priv->page_offset;
-+ command[0] = OP_COMPARE_BUF1;
-+ command[1] = (addr & 0x00FF0000) >> 16;
-+ command[2] = (addr & 0x0000FF00) >> 8;
-+ command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+ printk("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+ do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+ at91_dataflash_waitready();
-+
-+ /* Get result of the compare operation */
-+ status = at91_dataflash_status();
-+ if ((status & 0x40) == 1) {
-+ printk("at91_dataflash: Write error on page %i\n", pageaddr);
-+ remaining = 0;
-+ res = -EIO;
-+ }
-+
-+ remaining = remaining - writelen;
-+ pageaddr++;
-+ offset = 0;
-+ writebuf += writelen;
-+ *retlen += writelen;
-+
-+ if (remaining > priv->page_size)
-+ writelen = priv->page_size;
-+ else
-+ writelen = remaining;
-+ }
-+
-+ /* Release SPI bus */
-+ spi_release_bus(priv->spi);
-+
-+ kfree(tmpbuf);
-+ kfree(command);
-+ return res;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Initialize and register DataFlash device with MTD subsystem.
-+ */
-+static int __init add_dataflash(int channel, char *name, int IDsize,
-+ int nr_pages, int pagesize, int pageoffset)
-+{
-+ struct mtd_info *device;
-+ struct dataflash_local *priv;
-+#ifdef CONFIG_MTD_PARTITIONS
-+ struct mtd_partition *mtd_parts = 0;
-+ int mtd_parts_nr = 0;
-+#endif
-+
-+ if (nr_devices >= DATAFLASH_MAX_DEVICES) {
-+ printk(KERN_ERR "at91_dataflash: Too many devices detected\n");
-+ return 0;
-+ }
-+
-+ device = kmalloc(sizeof(struct mtd_info) + strlen(name) + 8, GFP_KERNEL);
-+ if (!device)
-+ return -ENOMEM;
-+ memset(device, 0, sizeof(struct mtd_info));
-+
-+ device->name = (char *)&device[1];
-+ sprintf(device->name, "%s.spi%d", name, channel);
-+ device->size = nr_pages * pagesize;
-+ device->erasesize = pagesize;
-+ device->writesize = pagesize;
-+ device->owner = THIS_MODULE;
-+ device->type = MTD_DATAFLASH;
-+ device->flags = MTD_WRITEABLE;
-+ device->erase = at91_dataflash_erase;
-+ device->read = at91_dataflash_read;
-+ device->write = at91_dataflash_write;
-+
-+ priv = (struct dataflash_local *) kmalloc(sizeof(struct dataflash_local), GFP_KERNEL);
-+ if (!priv) {
-+ kfree(device);
-+ return -ENOMEM;
-+ }
-+ memset(priv, 0, sizeof(struct dataflash_local));
-+
-+ priv->spi = channel;
-+ priv->page_size = pagesize;
-+ priv->page_offset = pageoffset;
-+ device->priv = priv;
-+
-+ mtd_devices[nr_devices] = device;
-+ nr_devices++;
-+ printk("at91_dataflash: %s detected [spi%i] (%i bytes)\n", name, channel, device->size);
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+#ifdef CONFIG_MTD_CMDLINE_PARTS
-+ mtd_parts_nr = parse_mtd_partitions(device, part_probes, &mtd_parts, 0);
-+#endif
-+ if (mtd_parts_nr <= 0) {
-+ switch (IDsize) {
-+ case SZ_2M:
-+ mtd_parts = static_partitions_2M;
-+ mtd_parts_nr = ARRAY_SIZE(static_partitions_2M);
-+ break;
-+ case SZ_4M:
-+ mtd_parts = static_partitions_4M;
-+ mtd_parts_nr = ARRAY_SIZE(static_partitions_4M);
-+ break;
-+ case SZ_8M:
-+ mtd_parts = static_partitions_8M;
-+ mtd_parts_nr = ARRAY_SIZE(static_partitions_8M);
-+ break;
-+ }
-+ }
-+
-+ if (mtd_parts_nr > 0) {
-+#ifdef DATAFLASH_ALWAYS_ADD_DEVICE
-+ add_mtd_device(device);
-+#endif
-+ return add_mtd_partitions(device, mtd_parts, mtd_parts_nr);
-+ }
-+#endif
-+ return add_mtd_device(device); /* add whole device */
-+}
-+
-+/*
-+ * Detect and initialize DataFlash device connected to specified SPI channel.
-+ *
-+ * Device Density ID code Nr Pages Page Size Page offset
-+ * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
-+ * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
-+ * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
-+ * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
-+ * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
-+ * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
-+ * AT45DB0642 64Mbit (8M) xx1111xx (0x3c) 8192 1056 11
-+ * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
-+ */
-+static int __init at91_dataflash_detect(int channel)
-+{
-+ int res = 0;
-+ unsigned short status;
-+
-+ spi_access_bus(channel);
-+ status = at91_dataflash_status();
-+ spi_release_bus(channel);
-+ if (status != 0xff) { /* no dataflash device there */
-+ switch (status & 0x3c) {
-+ case 0x0c: /* 0 0 1 1 */
-+ res = add_dataflash(channel, "AT45DB011B", SZ_128K, 512, 264, 9);
-+ break;
-+ case 0x14: /* 0 1 0 1 */
-+ res = add_dataflash(channel, "AT45DB021B", SZ_256K, 1025, 264, 9);
-+ break;
-+ case 0x1c: /* 0 1 1 1 */
-+ res = add_dataflash(channel, "AT45DB041B", SZ_512K, 2048, 264, 9);
-+ break;
-+ case 0x24: /* 1 0 0 1 */
-+ res = add_dataflash(channel, "AT45DB081B", SZ_1M, 4096, 264, 9);
-+ break;
-+ case 0x2c: /* 1 0 1 1 */
-+ res = add_dataflash(channel, "AT45DB161B", SZ_2M, 4096, 528, 10);
-+ break;
-+ case 0x34: /* 1 1 0 1 */
-+ res = add_dataflash(channel, "AT45DB321B", SZ_4M, 8192, 528, 10);
-+ break;
-+ case 0x3c: /* 1 1 1 1 */
-+ res = add_dataflash(channel, "AT45DB642", SZ_8M, 8192, 1056, 11);
-+ break;
-+// Currently unsupported since Atmel removed the "Main Memory Program via Buffer" commands.
-+// case 0x10: /* 0 1 0 0 */
-+// res = add_dataflash(channel, "AT45DB1282", SZ_16M, 16384, 1056, 11);
-+// break;
-+ default:
-+ printk(KERN_ERR "at91_dataflash: Unknown device (%x)\n", status & 0x3c);
-+ }
-+ }
-+
-+ return res;
-+}
-+
-+static int __init at91_dataflash_init(void)
-+{
-+ spi_transfer_desc = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
-+ if (!spi_transfer_desc)
-+ return -ENOMEM;
-+
-+ /* DataFlash (SPI chip select 0) */
-+ at91_dataflash_detect(0);
-+
-+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
-+ /* DataFlash card (SPI chip select 3) */
-+ at91_dataflash_detect(3);
-+#endif
-+
-+ return 0;
-+}
-+
-+static void __exit at91_dataflash_exit(void)
-+{
-+ int i;
-+
-+ for (i = 0; i < DATAFLASH_MAX_DEVICES; i++) {
-+ if (mtd_devices[i]) {
-+#ifdef CONFIG_MTD_PARTITIONS
-+ del_mtd_partitions(mtd_devices[i]);
-+#else
-+ del_mtd_device(mtd_devices[i]);
-+#endif
-+ kfree(mtd_devices[i]->priv);
-+ kfree(mtd_devices[i]);
-+ }
-+ }
-+ nr_devices = 0;
-+ kfree(spi_transfer_desc);
-+}
-+
-+
-+module_init(at91_dataflash_init);
-+module_exit(at91_dataflash_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Andrew Victor");
-+MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200");
-diff -urN -x CVS linux-2.6.21/drivers/mtd/nand/at91_nand.c linux-2.6-stable/drivers/mtd/nand/at91_nand.c
---- linux-2.6.21/drivers/mtd/nand/at91_nand.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/mtd/nand/at91_nand.c Tue May 8 12:13:31 2007
-@@ -82,6 +82,10 @@
- at91_set_gpio_value(host->board->enable_pin, 1);
- }
-
-+#ifdef CONFIG_MTD_PARTITIONS
-+const char *part_probes[] = { "cmdlinepart", NULL };
-+#endif
-+
- /*
- * Probe for the NAND device.
- */
-@@ -151,6 +155,12 @@
- #ifdef CONFIG_MTD_PARTITIONS
- if (host->board->partition_info)
- partitions = host->board->partition_info(mtd->size, &num_partitions);
-+#ifdef CONFIG_MTD_CMDLINE_PARTS
-+ else {
-+ mtd->name = "at91_nand";
-+ num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
-+ }
-+#endif
-
- if ((!partitions) || (num_partitions == 0)) {
- printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n");
-diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.c linux-2.6-stable/drivers/net/arm/at91_ether.c
---- linux-2.6.21/drivers/net/arm/at91_ether.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/net/arm/at91_ether.c Tue May 8 12:13:31 2007
-@@ -225,6 +225,16 @@
- if (!(phy & ((1 << 2) | 1)))
- goto done;
- }
-+ else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */
-+ read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy);
-+ if (!(phy & ((1 << 2) | 1)))
-+ goto done;
-+ }
-+ else if (lp->phy_type == MII_DP83848_ID) {
-+ read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */
-+ if (!(phy & (1 << 7)))
-+ goto done;
-+ }
-
- update_linkspeed(dev, 0);
-
-@@ -280,6 +290,19 @@
- dsintr = (1 << 10) | ( 1 << 8);
- write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
- }
-+ else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */
-+ read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
-+ dsintr = dsintr | 0x500; /* set bits 8, 10 */
-+ write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
-+ }
-+ else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */
-+ read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
-+ dsintr = dsintr | 0x3c; /* set bits 2..5 */
-+ write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
-+ read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
-+ dsintr = dsintr | 0x3; /* set bits 0,1 */
-+ write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
-+ }
-
- disable_mdi();
- spin_unlock_irq(&lp->lock);
-@@ -323,6 +346,19 @@
- dsintr = ~((1 << 10) | (1 << 8));
- write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
- }
-+ else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */
-+ read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
-+ dsintr = dsintr & ~0x500; /* clear bits 8, 10 */
-+ write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
-+ }
-+ else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */
-+ read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
-+ dsintr = dsintr & ~0x3; /* clear bits 0, 1 */
-+ write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
-+ read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
-+ dsintr = dsintr & ~0x3c; /* clear bits 2..5 */
-+ write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
-+ }
-
- disable_mdi();
- spin_unlock_irq(&lp->lock);
-@@ -535,8 +571,8 @@
- mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
- }
-
-- at91_emac_write(AT91_EMAC_HSH, mc_filter[0]);
-- at91_emac_write(AT91_EMAC_HSL, mc_filter[1]);
-+ at91_emac_write(AT91_EMAC_HSL, mc_filter[0]);
-+ at91_emac_write(AT91_EMAC_HSH, mc_filter[1]);
- }
-
- /*
-@@ -943,14 +979,22 @@
- struct net_device *dev;
- struct at91_private *lp;
- unsigned int val;
-- int res;
-+ struct resource *res;
-+ int ret;
-
- dev = alloc_etherdev(sizeof(struct at91_private));
- if (!dev)
- return -ENOMEM;
-
-- dev->base_addr = AT91_VA_BASE_EMAC;
-- dev->irq = AT91RM9200_ID_EMAC;
-+ /* Get I/O base address and IRQ */
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!res) {
-+ free_netdev(dev);
-+ return -ENODEV;
-+ }
-+ dev->base_addr = res->start;
-+ dev->irq = platform_get_irq(pdev, 0);
-+
- SET_MODULE_OWNER(dev);
-
- /* Install the interrupt handler */
-@@ -1023,12 +1067,12 @@
- lp->phy_address = phy_address; /* MDI address of PHY */
-
- /* Register the network interface */
-- res = register_netdev(dev);
-- if (res) {
-+ ret = register_netdev(dev);
-+ if (ret) {
- free_irq(dev->irq, dev);
- free_netdev(dev);
- dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
-- return res;
-+ return ret;
- }
-
- /* Determine current link speed */
-@@ -1063,10 +1107,16 @@
- printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name);
- else if (phy_type == MII_DP83847_ID)
- printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name);
-+ else if (phy_type == MII_DP83848_ID)
-+ printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name);
- else if (phy_type == MII_AC101L_ID)
- printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name);
- else if (phy_type == MII_KS8721_ID)
- printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name);
-+ else if (phy_type == MII_T78Q21x3_ID)
-+ printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name);
-+ else if (phy_type == MII_LAN83C185_ID)
-+ printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name);
-
- return 0;
- }
-@@ -1104,8 +1154,11 @@
- case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
- case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
- case MII_DP83847_ID: /* National Semiconductor DP83847: */
-+ case MII_DP83848_ID: /* National Semiconductor DP83848: */
- case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
- case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
-+ case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */
-+ case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */
- detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk);
- break;
- }
-diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.h linux-2.6-stable/drivers/net/arm/at91_ether.h
---- linux-2.6.21/drivers/net/arm/at91_ether.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/net/arm/at91_ether.h Tue May 8 12:13:31 2007
-@@ -17,39 +17,46 @@
-
-
- /* Davicom 9161 PHY */
--#define MII_DM9161_ID 0x0181b880
--#define MII_DM9161A_ID 0x0181b8a0
--
--/* Davicom specific registers */
--#define MII_DSCR_REG 16
--#define MII_DSCSR_REG 17
--#define MII_DSINTR_REG 21
-+#define MII_DM9161_ID 0x0181b880
-+#define MII_DM9161A_ID 0x0181b8a0
-+#define MII_DSCR_REG 16
-+#define MII_DSCSR_REG 17
-+#define MII_DSINTR_REG 21
-
- /* Intel LXT971A PHY */
--#define MII_LXT971A_ID 0x001378E0
--
--/* Intel specific registers */
--#define MII_ISINTE_REG 18
--#define MII_ISINTS_REG 19
--#define MII_LEDCTRL_REG 20
-+#define MII_LXT971A_ID 0x001378E0
-+#define MII_ISINTE_REG 18
-+#define MII_ISINTS_REG 19
-+#define MII_LEDCTRL_REG 20
-
- /* Realtek RTL8201 PHY */
--#define MII_RTL8201_ID 0x00008200
-+#define MII_RTL8201_ID 0x00008200
-
- /* Broadcom BCM5221 PHY */
--#define MII_BCM5221_ID 0x004061e0
--
--/* Broadcom specific registers */
--#define MII_BCMINTR_REG 26
-+#define MII_BCM5221_ID 0x004061e0
-+#define MII_BCMINTR_REG 26
-
- /* National Semiconductor DP83847 */
--#define MII_DP83847_ID 0x20005c30
-+#define MII_DP83847_ID 0x20005c30
-+
-+/* National Semiconductor DP83848 */
-+#define MII_DP83848_ID 0x20005c90
-+#define MII_DPPHYSTS_REG 16
-+#define MII_DPMICR_REG 17
-+#define MII_DPMISR_REG 18
-
- /* Altima AC101L PHY */
--#define MII_AC101L_ID 0x00225520
-+#define MII_AC101L_ID 0x00225520
-
- /* Micrel KS8721 PHY */
--#define MII_KS8721_ID 0x00221610
-+#define MII_KS8721_ID 0x00221610
-+
-+/* Teridian 78Q2123/78Q2133 */
-+#define MII_T78Q21x3_ID 0x000e7230
-+#define MII_T78Q21INT_REG 17
-+
-+/* SMSC LAN83C185 */
-+#define MII_LAN83C185_ID 0x0007C0A0
-
- /* ........................................................................ */
-
-diff -urN -x CVS linux-2.6.21/drivers/pcmcia/at91_cf.c linux-2.6-stable/drivers/pcmcia/at91_cf.c
---- linux-2.6.21/drivers/pcmcia/at91_cf.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/pcmcia/at91_cf.c Tue May 8 12:13:31 2007
-@@ -332,20 +332,27 @@
- struct at91_cf_data *board = cf->board;
-
- pcmcia_socket_dev_suspend(&pdev->dev, mesg);
-+
- if (device_may_wakeup(&pdev->dev)) {
- enable_irq_wake(board->det_pin);
- if (board->irq_pin)
- enable_irq_wake(board->irq_pin);
-- } else {
-- disable_irq_wake(board->det_pin);
-- if (board->irq_pin)
-- disable_irq_wake(board->irq_pin);
- }
-+
- return 0;
- }
-
- static int at91_cf_resume(struct platform_device *pdev)
- {
-+ struct at91_cf_socket *cf = platform_get_drvdata(pdev);
-+ struct at91_cf_data *board = cf->board;
-+
-+ if (device_may_wakeup(&pdev->dev)) {
-+ disable_irq_wake(board->det_pin);
-+ if (board->irq_pin)
-+ disable_irq_wake(board->irq_pin);
-+ }
-+
- pcmcia_socket_dev_resume(&pdev->dev);
- return 0;
- }
-@@ -360,7 +367,6 @@
- .name = (char *) driver_name,
- .owner = THIS_MODULE,
- },
-- .probe = at91_cf_probe,
- .remove = __exit_p(at91_cf_remove),
- .suspend = at91_cf_suspend,
- .resume = at91_cf_resume,
-@@ -370,7 +376,7 @@
-
- static int __init at91_cf_init(void)
- {
-- return platform_driver_register(&at91_cf_driver);
-+ return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
- }
- module_init(at91_cf_init);
-
-diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.c linux-2.6-stable/drivers/serial/atmel_serial.c
---- linux-2.6.21/drivers/serial/atmel_serial.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/serial/atmel_serial.c Tue May 8 12:13:31 2007
-@@ -7,6 +7,8 @@
- * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
- * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
- *
-+ * DMA support added by Chip Coldwell.
-+ *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
-@@ -33,6 +35,7 @@
- #include <linux/sysrq.h>
- #include <linux/tty_flip.h>
- #include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
- #include <linux/atmel_pdc.h>
-
- #include <asm/io.h>
-@@ -47,6 +50,11 @@
-
- #include "atmel_serial.h"
-
-+#define SUPPORT_PDC
-+#define PDC_BUFFER_SIZE (L1_CACHE_BYTES << 3)
-+#warning "Revisit"
-+#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
-+
- #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- #define SUPPORT_SYSRQ
- #endif
-@@ -107,6 +115,13 @@
- static int (*atmel_open_hook)(struct uart_port *);
- static void (*atmel_close_hook)(struct uart_port *);
-
-+struct atmel_dma_buffer {
-+ unsigned char *buf;
-+ dma_addr_t dma_addr;
-+ size_t dma_size;
-+ unsigned int ofs;
-+};
-+
- /*
- * We wrap our port structure around the generic uart_port.
- */
-@@ -114,10 +129,20 @@
- struct uart_port uart; /* uart */
- struct clk *clk; /* uart clock */
- unsigned short suspended; /* is port suspended? */
-+
-+ short use_dma_rx; /* enable PDC receiver */
-+ short pdc_rx_idx; /* current PDC RX buffer */
-+ struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
-+
-+ short use_dma_tx; /* enable PDC transmitter */
-+ struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
- };
-
- static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
-
-+#define PDC_RX_BUF(port) &(port)->pdc_rx[(port)->pdc_rx_idx]
-+#define PDC_RX_SWITCH(port) (port)->pdc_rx_idx = !(port)->pdc_rx_idx
-+
- #ifdef SUPPORT_SYSRQ
- static struct console atmel_console;
- #endif
-@@ -205,7 +230,12 @@
- {
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
-- UART_PUT_IDR(port, ATMEL_US_TXRDY);
-+ if (atmel_port->use_dma_tx) {
-+ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */
-+ UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+ }
-+ else
-+ UART_PUT_IDR(port, ATMEL_US_TXRDY);
- }
-
- /*
-@@ -215,7 +245,17 @@
- {
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
-- UART_PUT_IER(port, ATMEL_US_TXRDY);
-+ if (atmel_port->use_dma_tx) {
-+ if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
-+ /* The transmitter is already running. Yes, we
-+ really need this.*/
-+ return;
-+
-+ UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); /* re-enable PDC transmit */
-+ }
-+ else
-+ UART_PUT_IER(port, ATMEL_US_TXRDY);
- }
-
- /*
-@@ -225,7 +265,12 @@
- {
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
-- UART_PUT_IDR(port, ATMEL_US_RXRDY);
-+ if (atmel_port->use_dma_rx) {
-+ UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); /* disable PDC receive */
-+ UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
-+ }
-+ else
-+ UART_PUT_IDR(port, ATMEL_US_RXRDY);
- }
-
- /*
-@@ -248,6 +293,134 @@
- }
-
- /*
-+ * Receive data via the PDC. A buffer has been fulled.
-+ */
-+static void atmel_pdc_endrx(struct uart_port *port)
-+{
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+ struct tty_struct *tty = port->info->tty;
-+ struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
-+ unsigned int count;
-+
-+ count = pdc->dma_size - pdc->ofs;
-+ if (likely(count > 0)) {
-+ dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+ tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
-+ tty_flip_buffer_push(tty);
-+
-+ port->icount.rx += count;
-+ }
-+
-+ /* Set this buffer as the next receive buffer */
-+ pdc->ofs = 0;
-+ UART_PUT_RNPR(port, pdc->dma_addr);
-+ UART_PUT_RNCR(port, pdc->dma_size);
-+
-+ /* Switch to next buffer */
-+ PDC_RX_SWITCH(atmel_port); /* next PDC buffer */
-+}
-+
-+/*
-+ * Receive data via the PDC. At least one byte was received, but the
-+ * buffer was not full when the inter-character timeout expired.
-+ */
-+static void atmel_pdc_timeout(struct uart_port *port)
-+{
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+ struct tty_struct *tty = port->info->tty;
-+ struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
-+ /* unsigned */ int ofs, count;
-+
-+ ofs = UART_GET_RPR(port) - pdc->dma_addr; /* current DMA adress */
-+ count = ofs - pdc->ofs;
-+
-+ if (likely(count > 0)) {
-+ dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+ tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
-+ tty_flip_buffer_push(tty);
-+
-+ pdc->ofs = ofs;
-+ port->icount.rx += count;
-+ }
-+
-+ /* reset the UART timeout */
-+ UART_PUT_CR(port, ATMEL_US_STTTO);
-+}
-+
-+/*
-+ * Deal with parity, framing and overrun errors.
-+ */
-+static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
-+{
-+ /* clear error */
-+ UART_PUT_CR(port, ATMEL_US_RSTSTA);
-+
-+ if (status & ATMEL_US_RXBRK) {
-+ status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
-+ port->icount.brk++;
-+ }
-+ if (status & ATMEL_US_PARE)
-+ port->icount.parity++;
-+ if (status & ATMEL_US_FRAME)
-+ port->icount.frame++;
-+ if (status & ATMEL_US_OVRE)
-+ port->icount.overrun++;
-+}
-+
-+/*
-+ * A transmission via the PDC is complete.
-+ */
-+static void atmel_pdc_endtx(struct uart_port *port)
-+{
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+ struct circ_buf *xmit = &port->info->xmit;
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+
-+ xmit->tail += pdc->ofs;
-+ if (xmit->tail >= SERIAL_XMIT_SIZE)
-+ xmit->tail -= SERIAL_XMIT_SIZE;
-+
-+ port->icount.tx += pdc->ofs;
-+ pdc->ofs = 0;
-+
-+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-+ uart_write_wakeup(port);
-+}
-+
-+/*
-+ * The PDC transmitter is idle, so either start the next transfer or
-+ * disable the transmitter.
-+ */
-+static void atmel_pdc_txbufe(struct uart_port *port)
-+{
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+ struct circ_buf *xmit = &port->info->xmit;
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+ int count;
-+
-+ if (!uart_circ_empty(xmit)) {
-+ /* more to transmit - setup next transfer */
-+ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */
-+ dma_sync_single_for_device(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
-+
-+ if (xmit->tail < xmit->head)
-+ count = xmit->head - xmit->tail;
-+ else
-+ count = SERIAL_XMIT_SIZE - xmit->tail;
-+ pdc->ofs = count;
-+
-+ UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
-+ UART_PUT_TCR(port, count);
-+ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); /* re-enable PDC transmit */
-+ }
-+ else {
-+ /* nothing left to transmit - disable the transmitter */
-+ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */
-+ UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+ }
-+}
-+
-+/*
- * Characters received (called from interrupt handler)
- */
- static void atmel_rx_chars(struct uart_port *port)
-@@ -349,6 +522,14 @@
- status = UART_GET_CSR(port);
- pending = status & UART_GET_IMR(port);
- while (pending) {
-+ /* PDC receive */
-+ if (pending & ATMEL_US_ENDRX)
-+ atmel_pdc_endrx(port);
-+ if (pending & ATMEL_US_TIMEOUT)
-+ atmel_pdc_timeout(port);
-+ if (atmel_port->use_dma_rx && pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ATMEL_US_FRAME | ATMEL_US_PARE))
-+ atmel_pdc_rxerr(port, pending);
-+
- /* Interrupt receive */
- if (pending & ATMEL_US_RXRDY)
- atmel_rx_chars(port);
-@@ -363,6 +544,12 @@
- if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
- wake_up_interruptible(&port->info->delta_msr_wait);
-
-+ /* PDC transmit */
-+ if (pending & ATMEL_US_ENDTX)
-+ atmel_pdc_endtx(port);
-+ if (pending & ATMEL_US_TXBUFE)
-+ atmel_pdc_txbufe(port);
-+
- /* Interrupt transmit */
- if (pending & ATMEL_US_TXRDY)
- atmel_tx_chars(port);
-@@ -401,6 +588,47 @@
- }
-
- /*
-+ * Initialize DMA (if necessary)
-+ */
-+ if (atmel_port->use_dma_rx) {
-+ int i;
-+
-+ for (i = 0; i < 2; i++) {
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
-+
-+ pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
-+ if (pdc->buf == NULL) {
-+ if (i != 0) {
-+ dma_unmap_single(port->dev, atmel_port->pdc_rx[0].dma_addr, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
-+ kfree(atmel_port->pdc_rx[0].buf);
-+ }
-+ free_irq(port->irq, port);
-+ return -ENOMEM;
-+ }
-+ pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
-+ pdc->dma_size = PDC_BUFFER_SIZE;
-+ pdc->ofs = 0;
-+ }
-+
-+ atmel_port->pdc_rx_idx = 0;
-+
-+ UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
-+ UART_PUT_RCR(port, PDC_BUFFER_SIZE);
-+
-+ UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
-+ UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
-+ }
-+ if (atmel_port->use_dma_tx) {
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+ struct circ_buf *xmit = &port->info->xmit;
-+
-+ pdc->buf = xmit->buf;
-+ pdc->dma_addr = dma_map_single(port->dev, pdc->buf, SERIAL_XMIT_SIZE, DMA_TO_DEVICE);
-+ pdc->dma_size = SERIAL_XMIT_SIZE;
-+ pdc->ofs = 0;
-+ }
-+
-+ /*
- * If there is a specific "open" function (to register
- * control line interrupts)
- */
-@@ -418,7 +646,15 @@
- UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
- UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
-
-- UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
-+ if (atmel_port->use_dma_rx) {
-+ UART_PUT_RTOR(port, PDC_RX_TIMEOUT); /* set UART timeout */
-+ UART_PUT_CR(port, ATMEL_US_STTTO);
-+
-+ UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
-+ UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); /* enable PDC controller */
-+ }
-+ else
-+ UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
-
- return 0;
- }
-@@ -431,6 +667,31 @@
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
- /*
-+ * Ensure everything is stopped.
-+ */
-+ atmel_stop_rx(port);
-+ atmel_stop_tx(port);
-+
-+ /*
-+ * Shut-down the DMA.
-+ */
-+ if (atmel_port->use_dma_rx) {
-+ int i;
-+
-+ for (i = 0; i < 2; i++) {
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
-+
-+ dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+ kfree(pdc->buf);
-+ }
-+ }
-+ if (atmel_port->use_dma_tx) {
-+ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+
-+ dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
-+ }
-+
-+ /*
- * Disable all interrupts, port and break condition.
- */
- UART_PUT_CR(port, ATMEL_US_RSTSTA);
-@@ -481,14 +742,20 @@
- */
- static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
- {
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- unsigned long flags;
- unsigned int mode, imr, quot, baud;
-
-+ /* Get current mode register */
-+ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
-+
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
- quot = uart_get_divisor(port, baud);
-
-- /* Get current mode register */
-- mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
-+ if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
-+ quot /= 8;
-+ mode |= ATMEL_US_USCLKS_MCK_DIV8;
-+ }
-
- /* byte size */
- switch (termios->c_cflag & CSIZE) {
-@@ -534,6 +801,9 @@
- if (termios->c_iflag & (BRKINT | PARMRK))
- port->read_status_mask |= ATMEL_US_RXBRK;
-
-+ if (atmel_port->use_dma_rx) /* need to enable error interrupts */
-+ UART_PUT_IER(port, port->read_status_mask);
-+
- /*
- * Characters to ignore
- */
-@@ -712,6 +982,13 @@
- clk_enable(atmel_port->clk);
- port->uartclk = clk_get_rate(atmel_port->clk);
- }
-+
-+#ifdef SUPPORT_PDC
-+ atmel_port->use_dma_rx = data->use_dma_rx;
-+ atmel_port->use_dma_tx = data->use_dma_tx;
-+ if (atmel_port->use_dma_tx)
-+ port->fifosize = PDC_BUFFER_SIZE;
-+#endif
- }
-
- /*
-@@ -888,7 +1165,8 @@
- struct uart_port *port = platform_get_drvdata(pdev);
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
-- if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
-+ if (device_may_wakeup(&pdev->dev)
-+ && !clk_must_disable(atmel_port->clk))
- enable_irq_wake(port->irq);
- else {
- uart_suspend_port(&atmel_uart, port);
-diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.h linux-2.6-stable/drivers/serial/atmel_serial.h
---- linux-2.6.21/drivers/serial/atmel_serial.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/serial/atmel_serial.h Tue May 8 12:13:31 2007
-@@ -46,6 +46,9 @@
- #define ATMEL_US_USMODE_ISO7816_T1 6
- #define ATMEL_US_USMODE_IRDA 8
- #define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
-+#define ATMEL_US_USCLKS_MCK (0 << 4)
-+#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
-+#define ATMEL_US_USCLKS_SCK (3 << 4)
- #define ATMEL_US_CHRL (3 << 6) /* Character Length */
- #define ATMEL_US_CHRL_5 (0 << 6)
- #define ATMEL_US_CHRL_6 (1 << 6)
-diff -urN -x CVS linux-2.6.21/drivers/spi/Kconfig linux-2.6-stable/drivers/spi/Kconfig
---- linux-2.6.21/drivers/spi/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/spi/Kconfig Tue May 8 14:31:24 2007
-@@ -54,6 +54,7 @@
- config SPI_ATMEL
- tristate "Atmel SPI Controller"
- depends on (ARCH_AT91 || AVR32) && SPI_MASTER
-+ select SPI_AT91_MANUAL_CS if ARCH_AT91RM9200
- help
- This selects a driver for the Atmel SPI Controller, present on
- many AT32 (AVR32) and AT91 (ARM) chips.
-@@ -82,6 +83,24 @@
- inexpensive battery powered microcontroller evaluation board.
- This same cable can be used to flash new firmware.
-
-+config SPI_AT91
-+ tristate "AT91RM9200 Bitbang SPI Master"
-+ depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL
-+ select SPI_BITBANG
-+ select SPI_AT91_MANUAL_CS
-+ help
-+ This is dumb PIO bitbanging driver for the Atmel AT91RM9200.
-+ The SPI_ATMEL driver will be its replacement, using the native
-+ SPI hardware and its DMA controller.
-+
-+config SPI_AT91_MANUAL_CS
-+ bool
-+ depends on ARCH_AT91RM9200
-+ help
-+ Works around an AT91RM9200 problem whereby the SPI chip-select
-+ will be wrongly disabled. The workaround uses those pins as
-+ GPIOs instead of letting the SPI controller manage them.
-+
- config SPI_IMX
- tristate "Freescale iMX SPI controller"
- depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
-diff -urN -x CVS linux-2.6.21/drivers/spi/Makefile linux-2.6-stable/drivers/spi/Makefile
---- linux-2.6.21/drivers/spi/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/spi/Makefile Tue May 8 14:31:24 2007
-@@ -20,6 +20,7 @@
- obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
- obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
- obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
-+obj-$(CONFIG_SPI_AT91) += spi_at91_bitbang.o
- # ... add above this line ...
-
- # SPI protocol drivers (device/link on bus)
-diff -urN -x CVS linux-2.6.21/drivers/spi/spi_at91_bitbang.c linux-2.6-stable/drivers/spi/spi_at91_bitbang.c
---- linux-2.6.21/drivers/spi/spi_at91_bitbang.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/spi/spi_at91_bitbang.c Tue May 8 14:31:24 2007
-@@ -0,0 +1,207 @@
-+/*
-+ * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION)
-+ *
-+ * Copyright (C) 2006 David Brownell
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/spi/spi.h>
-+#include <linux/spi/spi_bitbang.h>
-+
-+#include <asm/arch/gpio.h>
-+
-+
-+/*
-+ * FIXME this bitbanging version is just to help bootstrap systems until
-+ * there's a native SPI+IRQ+DMA controller driver ... such a driver should
-+ * be a drop-in replacement for this one, and much faster.
-+ *
-+ * remember:
-+ *
-+ * - other at91 parts (like at91sam9) have multiple controllers
-+ * and different pin muxing; this version is at91rm9200 specfic.
-+ *
-+ * - at91sam9261 SPI0 pins are directly muxed with MMC/SD pins.
-+ *
-+ * - rm9200 spi chipselects drop wrongly, so the native driver
-+ * will need to use gpios much like this does.
-+ *
-+ * - real hardware only allows 8..16 bits per word, while this
-+ * bitbanger allows 1..32 (incompatible superset).
-+ *
-+ * - this disregards clock parameters. with inlined gpio calls,
-+ * gcc 3.4.4 produces about 1.5 mbit/sec, more than 2x faster
-+ * than using the subroutined veresion from txrx_word().
-+ *
-+ * - suspend/resume and <linux/clk.h> support is missing ...
-+ */
-+
-+#define spi_miso_bit AT91_PIN_PA0
-+#define spi_mosi_bit AT91_PIN_PA1
-+#define spi_sck_bit AT91_PIN_PA2
-+
-+struct at91_spi {
-+ struct spi_bitbang bitbang;
-+ struct platform_device *pdev;
-+};
-+
-+/*----------------------------------------------------------------------*/
-+
-+static inline void setsck(struct spi_device *spi, int is_on)
-+{
-+ at91_set_gpio_value(spi_sck_bit, is_on);
-+}
-+
-+static inline void setmosi(struct spi_device *spi, int is_on)
-+{
-+ at91_set_gpio_value(spi_mosi_bit, is_on);
-+}
-+
-+static inline int getmiso(struct spi_device *spi)
-+{
-+ return at91_get_gpio_value(spi_miso_bit);
-+}
-+
-+static void at91_spi_chipselect(struct spi_device *spi, int is_active)
-+{
-+ unsigned long cs = (unsigned long) spi->controller_data;
-+
-+ /* set default clock polarity */
-+ if (is_active)
-+ setsck(spi, spi->mode & SPI_CPOL);
-+
-+ /* only support active-low (default) */
-+ at91_set_gpio_value(cs, !is_active);
-+}
-+
-+/*
-+ * NOTE: this is "as fast as we can"; it should be a function of
-+ * the device clock ...
-+ */
-+#define spidelay(X) do{} while(0)
-+
-+#define EXPAND_BITBANG_TXRX
-+#include <linux/spi/spi_bitbang.h>
-+
-+static u32 at91_spi_txrx_word_mode0(struct spi_device *spi,
-+ unsigned nsecs, u32 word, u8 bits)
-+{
-+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode1(struct spi_device *spi,
-+ unsigned nsecs, u32 word, u8 bits)
-+{
-+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode2(struct spi_device *spi,
-+ unsigned nsecs, u32 word, u8 bits)
-+{
-+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode3(struct spi_device *spi,
-+ unsigned nsecs, u32 word, u8 bits)
-+{
-+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, 8);
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+static int __init at91_spi_probe(struct platform_device *pdev)
-+{
-+ int status;
-+ struct spi_master *master;
-+ struct at91_spi *at91_spi;
-+
-+ if (pdev->id != 0) /* SPI0 bus */
-+ return -EINVAL;
-+
-+ master = spi_alloc_master(&pdev->dev, sizeof *at91_spi);
-+ if (!master)
-+ return -ENOMEM;
-+
-+ at91_spi = spi_master_get_devdata(master);
-+ at91_spi->pdev = pdev;
-+ platform_set_drvdata(pdev, at91_spi);
-+
-+ /* SPI and bitbang hookup */
-+ master->bus_num = 0;
-+ master->num_chipselect = 4;
-+
-+ at91_spi->bitbang.master = spi_master_get(master);
-+ at91_spi->bitbang.chipselect = at91_spi_chipselect;
-+ at91_spi->bitbang.txrx_word[SPI_MODE_0] = at91_spi_txrx_word_mode0;
-+ at91_spi->bitbang.txrx_word[SPI_MODE_1] = at91_spi_txrx_word_mode1;
-+ at91_spi->bitbang.txrx_word[SPI_MODE_2] = at91_spi_txrx_word_mode2;
-+ at91_spi->bitbang.txrx_word[SPI_MODE_3] = at91_spi_txrx_word_mode3;
-+
-+ status = spi_bitbang_start(&at91_spi->bitbang);
-+ if (status < 0)
-+ (void) spi_master_put(at91_spi->bitbang.master);
-+
-+ return status;
-+}
-+
-+static int __exit at91_spi_remove(struct platform_device *pdev)
-+{
-+ struct at91_spi *at91_spi = platform_get_drvdata(pdev);
-+ int status;
-+
-+ /* stop() unregisters child devices too */
-+ status = spi_bitbang_stop(&at91_spi->bitbang);
-+ (void) spi_master_put(at91_spi->bitbang.master);
-+
-+ platform_set_drvdata(pdev, NULL);
-+ return status;
-+}
-+
-+static struct platform_driver at91_spi_driver = {
-+ .probe = at91_spi_probe,
-+ .remove = __exit_p(at91_spi_remove),
-+ .driver = {
-+ .name = "at91_spi",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init at91_spi_init(void)
-+{
-+ at91_set_gpio_output(spi_sck_bit, 0);
-+ at91_set_gpio_output(spi_mosi_bit, 0);
-+ at91_set_gpio_input(spi_miso_bit, 1 /* pullup */);
-+
-+ /* register driver */
-+ return platform_driver_register(&at91_spi_driver);
-+}
-+
-+static void __exit at91_spi_exit(void)
-+{
-+ platform_driver_unregister(&at91_spi_driver);
-+}
-+
-+device_initcall(at91_spi_init);
-+module_exit(at91_spi_exit);
-+
-+MODULE_ALIAS("at91_spi.0");
-+
-+MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)");
-+MODULE_AUTHOR("David Brownell");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/Kconfig linux-2.6-stable/drivers/usb/gadget/Kconfig
---- linux-2.6.21/drivers/usb/gadget/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/usb/gadget/Kconfig Wed May 9 10:20:54 2007
-@@ -189,7 +189,7 @@
-
- config USB_GADGET_AT91
- boolean "AT91 USB Device Port"
-- depends on ARCH_AT91
-+ depends on ARCH_AT91 && !ARCH_AT91SAM9RL
- select USB_GADGET_SELECTED
- help
- Many Atmel AT91 processors (such as the AT91RM2000) have a
-diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/at91_udc.c linux-2.6-stable/drivers/usb/gadget/at91_udc.c
---- linux-2.6.21/drivers/usb/gadget/at91_udc.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/usb/gadget/at91_udc.c Tue May 8 12:13:31 2007
-@@ -1804,7 +1804,7 @@
- */
- if ((!udc->suspended && udc->addr)
- || !wake
-- || at91_suspend_entering_slow_clock()) {
-+ || clk_must_disable(udc->fclk)) {
- pullup(udc, 0);
- wake = 0;
- } else
-diff -urN -x CVS linux-2.6.21/drivers/usb/host/ohci-at91.c linux-2.6-stable/drivers/usb/host/ohci-at91.c
---- linux-2.6.21/drivers/usb/host/ohci-at91.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/usb/host/ohci-at91.c Tue May 8 12:13:31 2007
-@@ -299,7 +299,7 @@
- *
- * REVISIT: some boards will be able to turn VBUS off...
- */
-- if (at91_suspend_entering_slow_clock()) {
-+ if (clk_must_disable(fclk)) {
- ohci_usb_reset (ohci);
- at91_stop_clock();
- }
-diff -urN -x CVS linux-2.6.21/drivers/video/Kconfig linux-2.6-stable/drivers/video/Kconfig
---- linux-2.6.21/drivers/video/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/video/Kconfig Thu May 10 12:34:41 2007
-@@ -663,6 +663,17 @@
- framebuffer. Product specs at
- <http://www.erd.epson.com/vdc/html/products.htm>.
-
-+config FB_S1D15605
-+ tristate "Epson S1D15605 framebuffer support"
-+ depends on FB
-+ default m if MACH_KB9200
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ Build in support for the S1D15605 Epson Research 128x64
-+ LCD controller as a framebuffer.
-+
- config FB_S1D13XXX
- tristate "Epson S1D13XXX framebuffer support"
- depends on FB
-@@ -674,6 +685,22 @@
- working with S1D13806). Product specs at
- <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm>
-
-+config FB_ATMEL
-+ tristate "AT91/AT32 LCD Controller support"
-+ depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || AVR32)
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ This enables support for the AT91/AT32 LCD Controller.
-+
-+config FB_INTSRAM
-+ bool "Frame Buffer in internal SRAM"
-+ depends on FB_ATMEL && ARCH_AT91SAM9261
-+ help
-+ Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
-+ to let frame buffer in external SDRAM.
-+
- config FB_NVIDIA
- tristate "nVidia Framebuffer Support"
- depends on FB && PCI
-diff -urN -x CVS linux-2.6.21/drivers/video/Makefile linux-2.6-stable/drivers/video/Makefile
---- linux-2.6.21/drivers/video/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/video/Makefile Thu May 10 12:34:01 2007
-@@ -75,6 +75,8 @@
- obj-$(CONFIG_FB_SA1100) += sa1100fb.o
- obj-$(CONFIG_FB_HIT) += hitfb.o
- obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o
-+obj-$(CONFIG_FB_S1D15605) += s1d15605fb.o
-+obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
- obj-$(CONFIG_FB_PVR2) += pvr2fb.o
- obj-$(CONFIG_FB_VOODOO1) += sstfb.o
- obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
-diff -urN -x CVS linux-2.6.21/drivers/video/atmel_lcdfb.c linux-2.6-stable/drivers/video/atmel_lcdfb.c
---- linux-2.6.21/drivers/video/atmel_lcdfb.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/video/atmel_lcdfb.c Thu May 10 12:34:01 2007
-@@ -0,0 +1,752 @@
-+/*
-+ * Driver for AT91/AT32 LCD Controller
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/gpio.h>
-+
-+#include <video/atmel_lcdc.h>
-+
-+#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
-+#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
-+
-+/* configurable parameters */
-+#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
-+#define ATMEL_LCDC_DMA_BURST_LEN 8
-+
-+#if defined(CONFIG_ARCH_AT91SAM9263)
-+#define ATMEL_LCDC_FIFO_SIZE 2048
-+#else
-+#define ATMEL_LCDC_FIFO_SIZE 512
-+#endif
-+
-+#if defined(CONFIG_ARCH_AT91)
-+#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
-+
-+static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-+ struct fb_var_screeninfo *var)
-+{
-+
-+}
-+#elif defined(CONFIG_AVR32)
-+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
-+ | FBINFO_PARTIAL_PAN_OK \
-+ | FBINFO_HWACCEL_XPAN \
-+ | FBINFO_HWACCEL_YPAN)
-+
-+static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-+ struct fb_var_screeninfo *var)
-+{
-+ u32 dma2dcfg;
-+ u32 pixeloff;
-+
-+ pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
-+
-+ dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
-+ dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
-+
-+ /* Update configuration */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
-+ lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
-+ | ATMEL_LCDC_DMAUPDT);
-+}
-+#endif
-+
-+
-+static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
-+ .type = FB_TYPE_PACKED_PIXELS,
-+ .visual = FB_VISUAL_TRUECOLOR,
-+ .xpanstep = 0,
-+ .ypanstep = 0,
-+ .ywrapstep = 0,
-+ .accel = FB_ACCEL_NONE,
-+};
-+
-+
-+static void atmel_lcdfb_update_dma(struct fb_info *info,
-+ struct fb_var_screeninfo *var)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ struct fb_fix_screeninfo *fix = &info->fix;
-+ unsigned long dma_addr;
-+
-+ dma_addr = (fix->smem_start + var->yoffset * fix->line_length
-+ + var->xoffset * var->bits_per_pixel / 8);
-+
-+ dma_addr &= ~3UL;
-+
-+ /* Set framebuffer DMA base address and pixel offset */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
-+
-+ atmel_lcdfb_update_dma2d(sinfo, var);
-+}
-+
-+static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+
-+ dma_free_writecombine(info->device, info->fix.smem_len,
-+ info->screen_base, info->fix.smem_start);
-+}
-+
-+/**
-+ * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
-+ * @sinfo: the frame buffer to allocate memory for
-+ */
-+static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+ struct fb_var_screeninfo *var = &info->var;
-+
-+ info->fix.smem_len = (var->xres_virtual * var->yres_virtual
-+ * ((var->bits_per_pixel + 7) / 8));
-+
-+ info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
-+ (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
-+
-+ if (!info->screen_base) {
-+ return -ENOMEM;
-+ }
-+
-+ return 0;
-+}
-+
-+/**
-+ * atmel_lcdfb_check_var - Validates a var passed in.
-+ * @var: frame buffer variable screen structure
-+ * @info: frame buffer structure that represents a single frame buffer
-+ *
-+ * Checks to see if the hardware supports the state requested by
-+ * var passed in. This function does not alter the hardware
-+ * state!!! This means the data stored in struct fb_info and
-+ * struct atmel_lcdfb_info do not change. This includes the var
-+ * inside of struct fb_info. Do NOT change these. This function
-+ * can be called on its own if we intent to only test a mode and
-+ * not actually set it. The stuff in modedb.c is a example of
-+ * this. If the var passed in is slightly off by what the
-+ * hardware can support then we alter the var PASSED in to what
-+ * we can do. If the hardware doesn't support mode change a
-+ * -EINVAL will be returned by the upper layers. You don't need
-+ * to implement this function then. If you hardware doesn't
-+ * support changing the resolution then this function is not
-+ * needed. In this case the driver would just provide a var that
-+ * represents the static state the screen is in.
-+ *
-+ * Returns negative errno on error, or zero on success.
-+ */
-+static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ struct device *dev = info->device;
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned long clk_value_khz;
-+
-+ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
-+
-+ dev_dbg(dev, "%s:\n", __func__);
-+ dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
-+ dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
-+ dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
-+ dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
-+
-+ if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
-+ dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
-+ return -EINVAL;
-+ }
-+
-+ /* Force same alignment for each line */
-+ var->xres = (var->xres + 3) & ~3UL;
-+ var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
-+
-+ var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
-+ var->transp.msb_right = 0;
-+ var->transp.offset = var->transp.length = 0;
-+ var->xoffset = var->yoffset = 0;
-+
-+ switch (var->bits_per_pixel) {
-+ case 2:
-+ case 4:
-+ case 8:
-+ var->red.offset = var->green.offset = var->blue.offset = 0;
-+ var->red.length = var->green.length = var->blue.length
-+ = var->bits_per_pixel;
-+ break;
-+ case 15:
-+ case 16:
-+ var->red.offset = 0;
-+ var->green.offset = 5;
-+ var->blue.offset = 10;
-+ var->red.length = var->green.length = var->blue.length = 5;
-+ break;
-+ case 24:
-+ case 32:
-+ var->red.offset = 0;
-+ var->green.offset = 8;
-+ var->blue.offset = 16;
-+ var->red.length = var->green.length = var->blue.length = 8;
-+ break;
-+ default:
-+ dev_err(dev, "color depth %d not supported\n",
-+ var->bits_per_pixel);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+/**
-+ * atmel_lcdfb_set_par - Alters the hardware state.
-+ * @info: frame buffer structure that represents a single frame buffer
-+ *
-+ * Using the fb_var_screeninfo in fb_info we set the resolution
-+ * of the this particular framebuffer. This function alters the
-+ * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
-+ * not alter var in fb_info since we are using that data. This
-+ * means we depend on the data in var inside fb_info to be
-+ * supported by the hardware. atmel_lcdfb_check_var is always called
-+ * before atmel_lcdfb_set_par to ensure this. Again if you can't
-+ * change the resolution you don't need this function.
-+ *
-+ */
-+static int atmel_lcdfb_set_par(struct fb_info *info)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned long value;
-+ unsigned long clk_value_khz;
-+
-+ dev_dbg(info->device, "%s:\n", __func__);
-+ dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
-+ info->var.xres, info->var.yres,
-+ info->var.xres_virtual, info->var.yres_virtual);
-+
-+ /* Turn off the LCD controller and the DMA controller */
-+ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-+
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
-+
-+ if (info->var.bits_per_pixel <= 8)
-+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
-+ else
-+ info->fix.visual = FB_VISUAL_TRUECOLOR;
-+
-+ info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
-+
-+ /* Re-initialize the DMA engine... */
-+ dev_dbg(info->device, " * update DMA engine\n");
-+ atmel_lcdfb_update_dma(info, &info->var);
-+
-+ /* ...set frame size and burst length = 8 words (?) */
-+ value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
-+ value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
-+
-+ /* Now, the LCDC core... */
-+
-+ /* Set pixel clock */
-+ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
-+
-+ value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
-+
-+ if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
-+ value++;
-+
-+ value = (value / 2) - 1;
-+
-+ if (value <= 0) {
-+ dev_notice(info->device, "Bypassing pixel clock divider\n");
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
-+ } else
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
-+
-+ /* Initialize control register 2 */
-+ value = sinfo->default_lcdcon2;
-+
-+ if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
-+ value |= ATMEL_LCDC_INVLINE_INVERTED;
-+ if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
-+ value |= ATMEL_LCDC_INVFRAME_INVERTED;
-+
-+ switch (info->var.bits_per_pixel) {
-+ case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
-+ case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
-+ case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
-+ case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
-+ case 15: /* fall through */
-+ case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
-+ case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
-+ case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
-+ default: BUG(); break;
-+ }
-+ dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
-+
-+ /* Vertical timing */
-+ value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
-+ value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
-+ value |= info->var.lower_margin;
-+ dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
-+
-+ /* Horizontal timing */
-+ value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
-+ value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
-+ value |= (info->var.left_margin - 1);
-+ dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
-+
-+ /* Display size */
-+ value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
-+ value |= info->var.yres - 1;
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
-+
-+ /* FIFO Threshold: Use formula from data sheet */
-+ value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
-+ lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
-+
-+ /* Toggle LCD_MODE every frame */
-+ lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
-+
-+ /* Disable all interrupts */
-+ lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
-+
-+ /* Set contrast */
-+ value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
-+ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
-+ /* ...wait for DMA engine to become idle... */
-+ while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
-+ msleep(10);
-+
-+ dev_dbg(info->device, " * re-enable DMA engine\n");
-+ /* ...and enable it with updated configuration */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
-+
-+ dev_dbg(info->device, " * re-enable LCDC core\n");
-+ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-+ (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
-+
-+ dev_dbg(info->device, " * DONE\n");
-+
-+ return 0;
-+}
-+
-+static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
-+{
-+ chan &= 0xffff;
-+ chan >>= 16 - bf->length;
-+ return chan << bf->offset;
-+}
-+
-+/**
-+ * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
-+ * @regno: Which register in the CLUT we are programming
-+ * @red: The red value which can be up to 16 bits wide
-+ * @green: The green value which can be up to 16 bits wide
-+ * @blue: The blue value which can be up to 16 bits wide.
-+ * @transp: If supported the alpha value which can be up to 16 bits wide.
-+ * @info: frame buffer info structure
-+ *
-+ * Set a single color register. The values supplied have a 16 bit
-+ * magnitude which needs to be scaled in this function for the hardware.
-+ * Things to take into consideration are how many color registers, if
-+ * any, are supported with the current color visual. With truecolor mode
-+ * no color palettes are supported. Here a psuedo palette is created
-+ * which we store the value in pseudo_palette in struct fb_info. For
-+ * pseudocolor mode we have a limited color palette. To deal with this
-+ * we can program what color is displayed for a particular pixel value.
-+ * DirectColor is similar in that we can program each color field. If
-+ * we have a static colormap we don't need to implement this function.
-+ *
-+ * Returns negative errno on error, or zero on success. In an
-+ * ideal world, this would have been the case, but as it turns
-+ * out, the other drivers return 1 on failure, so that's what
-+ * we're going to do.
-+ */
-+static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
-+ unsigned int green, unsigned int blue,
-+ unsigned int transp, struct fb_info *info)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned int val;
-+ u32 *pal;
-+ int ret = 1;
-+
-+ if (info->var.grayscale)
-+ red = green = blue = (19595 * red + 38470 * green
-+ + 7471 * blue) >> 16;
-+
-+ switch (info->fix.visual) {
-+ case FB_VISUAL_TRUECOLOR:
-+ if (regno < 16) {
-+ pal = info->pseudo_palette;
-+
-+ val = chan_to_field(red, &info->var.red);
-+ val |= chan_to_field(green, &info->var.green);
-+ val |= chan_to_field(blue, &info->var.blue);
-+
-+ pal[regno] = val;
-+ ret = 0;
-+ }
-+ break;
-+
-+ case FB_VISUAL_PSEUDOCOLOR:
-+ if (regno < 256) {
-+ val = ((red >> 11) & 0x001f);
-+ val |= ((green >> 6) & 0x03e0);
-+ val |= ((blue >> 1) & 0x7c00);
-+
-+ /*
-+ * TODO: intensity bit. Maybe something like
-+ * ~(red[10] ^ green[10] ^ blue[10]) & 1
-+ */
-+
-+ lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
-+ ret = 0;
-+ }
-+ break;
-+ }
-+
-+ return ret;
-+}
-+
-+static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ dev_dbg(info->device, "%s\n", __func__);
-+
-+ atmel_lcdfb_update_dma(info, var);
-+
-+ return 0;
-+}
-+
-+static struct fb_ops atmel_lcdfb_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = atmel_lcdfb_check_var,
-+ .fb_set_par = atmel_lcdfb_set_par,
-+ .fb_setcolreg = atmel_lcdfb_setcolreg,
-+ .fb_pan_display = atmel_lcdfb_pan_display,
-+ .fb_fillrect = cfb_fillrect,
-+ .fb_copyarea = cfb_copyarea,
-+ .fb_imageblit = cfb_imageblit,
-+};
-+
-+static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
-+{
-+ struct fb_info *info = dev_id;
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ u32 status;
-+
-+ status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
-+ lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
-+ return IRQ_HANDLED;
-+}
-+
-+static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+ int ret = 0;
-+
-+ memset_io(info->screen_base, 0, info->fix.smem_len);
-+ info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
-+
-+ dev_info(info->device,
-+ "%luKiB frame buffer at %08lx (mapped at %p)\n",
-+ (unsigned long)info->fix.smem_len / 1024,
-+ (unsigned long)info->fix.smem_start,
-+ info->screen_base);
-+
-+ /* Allocate colormap */
-+ ret = fb_alloc_cmap(&info->cmap, 256, 0);
-+ if (ret < 0)
-+ dev_err(info->device, "Alloc color map failed\n");
-+
-+ return ret;
-+}
-+
-+static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
-+{
-+ if (sinfo->bus_clk)
-+ clk_enable(sinfo->bus_clk);
-+ clk_enable(sinfo->lcdc_clk);
-+}
-+
-+static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
-+{
-+ if (sinfo->bus_clk)
-+ clk_disable(sinfo->bus_clk);
-+ clk_disable(sinfo->lcdc_clk);
-+}
-+
-+
-+static int __init atmel_lcdfb_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info;
-+ struct atmel_lcdfb_info *sinfo;
-+ struct atmel_lcdfb_info *pdata_sinfo;
-+ struct resource *regs = NULL;
-+ struct resource *map = NULL;
-+ int ret;
-+
-+ dev_dbg(dev, "%s BEGIN\n", __func__);
-+
-+ ret = -ENOMEM;
-+ info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
-+ if (!info) {
-+ dev_err(dev, "cannot allocate memory\n");
-+ goto out;
-+ }
-+
-+ sinfo = info->par;
-+
-+ if (dev->platform_data) {
-+ pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
-+ sinfo->default_bpp = pdata_sinfo->default_bpp;
-+ sinfo->default_dmacon = pdata_sinfo->default_dmacon;
-+ sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
-+ sinfo->default_monspecs = pdata_sinfo->default_monspecs;
-+ sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
-+ sinfo->guard_time = pdata_sinfo->guard_time;
-+ } else {
-+ dev_err(dev, "cannot get default configuration\n");
-+ goto free_info;
-+ }
-+ sinfo->info = info;
-+ sinfo->pdev = pdev;
-+
-+ strcpy(info->fix.id, sinfo->pdev->name);
-+ info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
-+ info->pseudo_palette = sinfo->pseudo_palette;
-+ info->fbops = &atmel_lcdfb_ops;
-+
-+ memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
-+ info->fix = atmel_lcdfb_fix;
-+
-+ /* Enable LCDC Clocks */
-+ if (cpu_is_at91sam9261()) {
-+ sinfo->bus_clk = clk_get(dev, "hck1");
-+ if (IS_ERR(sinfo->bus_clk)) {
-+ ret = PTR_ERR(sinfo->bus_clk);
-+ goto free_info;
-+ }
-+ }
-+ sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
-+ if (IS_ERR(sinfo->lcdc_clk)) {
-+ ret = PTR_ERR(sinfo->lcdc_clk);
-+ goto put_bus_clk;
-+ }
-+ atmel_lcdfb_start_clock(sinfo);
-+
-+ ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
-+ info->monspecs.modedb_len, info->monspecs.modedb,
-+ sinfo->default_bpp);
-+ if (!ret) {
-+ dev_err(dev, "no suitable video mode found\n");
-+ goto stop_clk;
-+ }
-+
-+
-+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!regs) {
-+ dev_err(dev, "resources unusable\n");
-+ ret = -ENXIO;
-+ goto stop_clk;
-+ }
-+
-+ sinfo->irq_base = platform_get_irq(pdev, 0);
-+ if (sinfo->irq_base < 0) {
-+ dev_err(dev, "unable to get irq\n");
-+ ret = sinfo->irq_base;
-+ goto stop_clk;
-+ }
-+
-+ /* Initialize video memory */
-+ map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+ if (map) {
-+ /* use a pre-allocated memory buffer */
-+ info->fix.smem_start = map->start;
-+ info->fix.smem_len = map->end - map->start + 1;
-+ if (!request_mem_region(info->fix.smem_start,
-+ info->fix.smem_len, pdev->name)) {
-+ ret = -EBUSY;
-+ goto stop_clk;
-+ }
-+
-+ info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
-+ if (!info->screen_base)
-+ goto release_intmem;
-+ } else {
-+ /* alocate memory buffer */
-+ ret = atmel_lcdfb_alloc_video_memory(sinfo);
-+ if (ret < 0) {
-+ dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
-+ goto stop_clk;
-+ }
-+ }
-+
-+ /* LCDC registers */
-+ info->fix.mmio_start = regs->start;
-+ info->fix.mmio_len = regs->end - regs->start + 1;
-+
-+ if (!request_mem_region(info->fix.mmio_start,
-+ info->fix.mmio_len, pdev->name)) {
-+ ret = -EBUSY;
-+ goto free_fb;
-+ }
-+
-+ sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
-+ if (!sinfo->mmio) {
-+ dev_err(dev, "cannot map LCDC registers\n");
-+ goto release_mem;
-+ }
-+
-+ /* interrupt */
-+ ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
-+ if (ret) {
-+ dev_err(dev, "request_irq failed: %d\n", ret);
-+ goto unmap_mmio;
-+ }
-+
-+ ret = atmel_lcdfb_init_fbinfo(sinfo);
-+ if (ret < 0) {
-+ dev_err(dev, "init fbinfo failed: %d\n", ret);
-+ goto unregister_irqs;
-+ }
-+
-+ /*
-+ * This makes sure that our colour bitfield
-+ * descriptors are correctly initialised.
-+ */
-+ atmel_lcdfb_check_var(&info->var, info);
-+
-+ ret = fb_set_var(info, &info->var);
-+ if (ret) {
-+ dev_warn(dev, "unable to set display parameters\n");
-+ goto free_cmap;
-+ }
-+
-+ dev_set_drvdata(dev, info);
-+
-+ /*
-+ * Tell the world that we're ready to go
-+ */
-+ ret = register_framebuffer(info);
-+ if (ret < 0) {
-+ dev_err(dev, "failed to register framebuffer device: %d\n", ret);
-+ goto free_cmap;
-+ }
-+
-+ /* Power up the LCDC screen */
-+ if (sinfo->atmel_lcdfb_power_control)
-+ sinfo->atmel_lcdfb_power_control(1);
-+
-+ dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
-+ info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
-+
-+ return 0;
-+
-+
-+free_cmap:
-+ fb_dealloc_cmap(&info->cmap);
-+unregister_irqs:
-+ free_irq(sinfo->irq_base, info);
-+unmap_mmio:
-+ iounmap(sinfo->mmio);
-+release_mem:
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+free_fb:
-+ if (map)
-+ iounmap(info->screen_base);
-+ else
-+ atmel_lcdfb_free_video_memory(sinfo);
-+
-+release_intmem:
-+ if (map)
-+ release_mem_region(info->fix.smem_start, info->fix.smem_len);
-+stop_clk:
-+ atmel_lcdfb_stop_clock(sinfo);
-+ clk_put(sinfo->lcdc_clk);
-+put_bus_clk:
-+ if (sinfo->bus_clk)
-+ clk_put(sinfo->bus_clk);
-+free_info:
-+ framebuffer_release(info);
-+out:
-+ dev_dbg(dev, "%s FAILED\n", __func__);
-+ return ret;
-+}
-+
-+static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info = dev_get_drvdata(dev);
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+
-+ if (!sinfo)
-+ return 0;
-+
-+ if (sinfo->atmel_lcdfb_power_control)
-+ sinfo->atmel_lcdfb_power_control(0);
-+ unregister_framebuffer(info);
-+ atmel_lcdfb_stop_clock(sinfo);
-+ clk_put(sinfo->lcdc_clk);
-+ if (sinfo->bus_clk)
-+ clk_put(sinfo->bus_clk);
-+ fb_dealloc_cmap(&info->cmap);
-+ free_irq(sinfo->irq_base, info);
-+ iounmap(sinfo->mmio);
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+ if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
-+ iounmap(info->screen_base);
-+ release_mem_region(info->fix.smem_start, info->fix.smem_len);
-+ } else {
-+ atmel_lcdfb_free_video_memory(sinfo);
-+ }
-+
-+ dev_set_drvdata(dev, NULL);
-+ framebuffer_release(info);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver atmel_lcdfb_driver = {
-+ .remove = __exit_p(atmel_lcdfb_remove),
-+ .driver = {
-+ .name = "atmel_lcdfb",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init atmel_lcdfb_init(void)
-+{
-+ return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
-+}
-+
-+static void __exit atmel_lcdfb_exit(void)
-+{
-+ platform_driver_unregister(&atmel_lcdfb_driver);
-+}
-+
-+module_init(atmel_lcdfb_init);
-+module_exit(atmel_lcdfb_exit);
-+
-+MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
-+MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Kconfig linux-2.6-stable/drivers/video/backlight/Kconfig
---- linux-2.6.21/drivers/video/backlight/Kconfig Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/video/backlight/Kconfig Tue May 8 12:13:31 2007
-@@ -63,3 +63,11 @@
- help
- If you have a Frontpath ProGear say Y to enable the
- backlight driver.
-+
-+config BACKLIGHT_KB920x
-+ tristate "KwikByte KB9202 Backlight Driver"
-+ depends on BACKLIGHT_CLASS_DEVICE && MACH_KB9200
-+ default y
-+ help
-+ If you have a KwikByte KB9202 board, say Y to enable the
-+ backlight driver.
-diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Makefile linux-2.6-stable/drivers/video/backlight/Makefile
---- linux-2.6.21/drivers/video/backlight/Makefile Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/drivers/video/backlight/Makefile Tue May 8 12:13:31 2007
-@@ -6,3 +6,4 @@
- obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
- obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
- obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
-+obj-$(CONFIG_BACKLIGHT_KB920x) += kb920x_bl.o
-diff -urN -x CVS linux-2.6.21/drivers/video/backlight/kb920x_bl.c linux-2.6-stable/drivers/video/backlight/kb920x_bl.c
---- linux-2.6.21/drivers/video/backlight/kb920x_bl.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/video/backlight/kb920x_bl.c Tue May 8 12:13:31 2007
-@@ -0,0 +1,164 @@
-+/*
-+ * Backlight Driver for KB9202
-+ *
-+ * Copyright (c) 2006 KwikByte
-+ *
-+ * Based on Sharp's Corgi Backlight Driver
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/spinlock.h>
-+#include <linux/fb.h>
-+#include <linux/backlight.h>
-+
-+#include <asm/arch/gpio.h>
-+
-+/* The backlight is on(1)/off(0) */
-+#define KB9202_DEFAULT_INTENSITY 1
-+#define KB9202_MAX_INTENSITY 1
-+
-+static int kb9202bl_suspended;
-+static int current_intensity = 0;
-+static DEFINE_SPINLOCK(bl_lock);
-+
-+static int kb9202bl_set_intensity(struct backlight_device *bd)
-+{
-+ unsigned long flags;
-+ int intensity = bd->props.brightness;
-+
-+ if (bd->props.power != FB_BLANK_UNBLANK)
-+ intensity = 0;
-+ if (bd->props.fb_blank != FB_BLANK_UNBLANK)
-+ intensity = 0;
-+ if (kb9202bl_suspended)
-+ intensity = 0;
-+
-+ if ((!current_intensity) && (bd->props.power == FB_BLANK_UNBLANK))
-+ intensity = 1;
-+
-+ spin_lock_irqsave(&bl_lock, flags);
-+ if (intensity)
-+ gpio_set_value(AT91_PIN_PC23, 1);
-+ else
-+ gpio_set_value(AT91_PIN_PC23, 0);
-+ spin_unlock_irqrestore(&bl_lock, flags);
-+
-+ current_intensity = intensity;
-+
-+ return 0;
-+}
-+
-+static int kb9202bl_get_intensity(struct backlight_device *bd)
-+{
-+ return current_intensity;
-+}
-+
-+static struct backlight_ops kb9202bl_ops = {
-+ .get_brightness = kb9202bl_get_intensity,
-+ .update_status = kb9202bl_set_intensity,
-+};
-+
-+static int __init kb9202bl_probe(struct platform_device *pdev)
-+{
-+ struct backlight_device *bd;
-+
-+ bd = backlight_device_register ("kb9202-bl", &pdev->dev, NULL, &kb9202bl_ops);
-+ if (IS_ERR(bd))
-+ return PTR_ERR(bd);
-+
-+ platform_set_drvdata(pdev, bd);
-+
-+ bd->props.max_brightness = KB9202_MAX_INTENSITY;
-+ bd->props.brightness = KB9202_DEFAULT_INTENSITY;
-+ (void) kb9202bl_set_intensity(bd);
-+
-+ return 0;
-+}
-+
-+static int kb9202bl_remove(struct platform_device *pdev)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ bd->props.brightness = 0;
-+ bd->props.power = 0;
-+ (void) kb9202bl_set_intensity(bd);
-+
-+ backlight_device_unregister(bd);
-+
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int kb9202bl_suspend(struct platform_device *dev, pm_message_t state)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ kb9202bl_suspended = 1;
-+ (void) kb9202bl_set_intensity(bd);
-+ return 0;
-+}
-+
-+static int kb9202bl_resume(struct platform_device *dev)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ kb9202bl_suspended = 0;
-+ (void) kb9202bl_set_intensity(bd);
-+ return 0;
-+}
-+#else
-+#define kb9202bl_suspend NULL
-+#define kb9202bl_resume NULL
-+#endif
-+
-+static struct platform_driver kb9202bl_driver = {
-+ .probe = kb9202bl_probe,
-+ .remove = kb9202bl_remove,
-+ .suspend = kb9202bl_suspend,
-+ .resume = kb9202bl_resume,
-+ .driver = {
-+ .name = "kb9202-bl",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static struct platform_device *kb9202bl_device;
-+
-+static int __init kb9202bl_init(void)
-+{
-+ int ret;
-+
-+ ret = platform_driver_register(&kb9202bl_driver);
-+ if (!ret) {
-+ kb9202bl_device = platform_device_alloc("kb9202-bl", -1);
-+ if (!kb9202bl_device)
-+ return -ENOMEM;
-+
-+ ret = platform_device_add(kb9202bl_device);
-+ if (ret) {
-+ platform_device_put(kb9202bl_device);
-+ platform_driver_unregister(&kb9202bl_driver);
-+ }
-+ }
-+ return ret;
-+}
-+
-+static void __exit kb9202bl_exit(void)
-+{
-+ platform_device_unregister(kb9202bl_device);
-+ platform_driver_unregister(&kb9202bl_driver);
-+}
-+
-+module_init(kb9202bl_init);
-+module_exit(kb9202bl_exit);
-+
-+MODULE_AUTHOR("KwikByte <kb9200_dev@kwikbyte.com>");
-+MODULE_DESCRIPTION("KB9202 Backlight Driver");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/drivers/video/s1d15605fb.c linux-2.6-stable/drivers/video/s1d15605fb.c
---- linux-2.6.21/drivers/video/s1d15605fb.c Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/drivers/video/s1d15605fb.c Tue May 8 12:13:31 2007
-@@ -0,0 +1,659 @@
-+/*
-+ * drivers/video/s1d15605.c
-+ *
-+ * Adapted from several sources including:
-+ * 1) Driver for AT91 LCD Controller
-+ * Copyright (C) 2006 Atmel
-+ *
-+ * 2) Copyright (C) 2005 S. Kevin Hester
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ *
-+ * This is a basic framebuffer driver for the Optrex F-51320 128x64 mono LCD
-+ * display. This display uses a clone of the common Epson SED 1531 display
-+ * controller.
-+ *
-+ * I've heavily borrowed code from the vfb.c driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#ifdef DEBUG
-+#define MSG(string, args...) printk("s1d15605fb:" string, ##args)
-+#else
-+#define MSG(string, args...)
-+#endif
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+
-+#include <asm/uaccess.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#ifdef CONFIG_PMAC_BACKLIGHT
-+#include <asm/backlight.h>
-+#endif
-+
-+#define VIDEOWIDTH 128
-+#define VIDEOHEIGHT 64
-+#define VIDEODEPTH 1 /* bits/pixel */
-+#define VIDEOWIDTH_BYTES ((VIDEOWIDTH * VIDEODEPTH) / 8)
-+
-+/* The number of bytes that actually go to the device */
-+#define ACTUALVIDEOMEMSIZE (VIDEOWIDTH_BYTES * VIDEOHEIGHT)
-+#define VIDEOMEMSIZE PAGE_SIZE
-+
-+static struct fb_var_screeninfo s1d15605_default __initdata = {
-+ .xres = VIDEOWIDTH,
-+ .yres = VIDEOHEIGHT,
-+ .xres_virtual = VIDEOWIDTH,
-+ .yres_virtual = VIDEOHEIGHT,
-+ .bits_per_pixel = VIDEODEPTH,
-+ .red = { 0, 1, 0 },
-+ .green = { 0, 1, 0 },
-+ .blue = { 0, 1, 0 },
-+ .activate = FB_ACTIVATE_NOW,
-+ .pixclock = 20000,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+};
-+
-+static struct fb_fix_screeninfo s1d15605_fix __initdata = {
-+ .id = "s1d15605",
-+ .type = FB_TYPE_PACKED_PIXELS,
-+ .visual = FB_VISUAL_MONO10,
-+ .xpanstep = 0,
-+ .ypanstep = 0,
-+ .ywrapstep = 0,
-+ .accel = FB_ACCEL_NONE,
-+};
-+
-+struct s1d15605fb_info {
-+ struct fb_info *info;
-+ char *mmio;
-+ unsigned long reset_pin;
-+ struct platform_device *pdev;
-+};
-+
-+/*
-+ * LCD device interface
-+ */
-+#define RESET_DISPLAY 0xE2
-+#define LCD_BIAS_1_9 0xA2
-+#define ADC_SELECT_REVERSE 0xA1
-+#define COMMON_OUTPUT_NORMAL 0xC0
-+#define V5_RESISTOR_RATIO 0x26
-+#define ELECTRONIC_VOLUME_SET 0x81
-+#define ELECTRONIC_VOLUME_INIT 0x20
-+#define POWER_CONTROL_SET 0x28
-+#define VOLTAGE_REGULATOR 0x02
-+#define VOLTAGE_FOLLOWER 0x01
-+#define BOOSTER_CIRCUIT 0x04
-+#define DISPLAY_ON 0xAF
-+#define START_LINE_SET 0x40
-+#define PAGE_ADDRESS_SET 0xB0
-+#define COLUMN_ADDRESS_HIGH 0x10
-+#define COLUMN_ADDRESS_LOW 0x00
-+#define RESISTOR_RATIO_START 0x20
-+
-+#define NUM_OF_PAGES 8
-+#define NUM_OF_COLUMNS 128
-+
-+#define WRITE_COMMAND(x) __raw_writeb((x), (sinfo)->mmio)
-+#define READ_COMMAND __raw_readb((sinfo)->mmio)
-+#define WRITE_DATA(x) __raw_writeb((x), (sinfo)->mmio + (0x10000))
-+#define READ_DATA __raw_readb((sinfo)->mmio + (0x10000))
-+
-+
-+/*
-+ * s1d15605fb_resize_framebuffer
-+ *
-+ * Free allocated space if different. Allocate on new of changed.
-+ * Returns -ENOMEM if the new framebuffer can not be allocated,
-+ * zero on success.
-+ */
-+static int s1d15605fb_resize_framebuffer(struct s1d15605fb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+ struct fb_fix_screeninfo *fix = &info->fix;
-+ struct fb_var_screeninfo *var = &info->var;
-+ unsigned int new_size;
-+ void *new_vaddr;
-+
-+ new_size = ((var->xres_virtual * var->yres_virtual * var->bits_per_pixel) / 8);
-+
-+ MSG("%s: x (%d) y (%d) bpp (%d): new size 0x%08x\n", __FUNCTION__,
-+ var->xres_virtual, var->yres_virtual, var->bits_per_pixel, new_size);
-+
-+ if (new_size == fix->smem_len)
-+ return 0;
-+
-+ if (fix->smem_len) {
-+ kfree(info->screen_base);
-+ }
-+
-+ new_vaddr = kmalloc(new_size, GFP_KERNEL);
-+
-+ if (!new_vaddr) {
-+ fix->smem_len = 0;
-+ return -ENOMEM;
-+ }
-+
-+ info->screen_base = new_vaddr;
-+ fix->smem_start = (unsigned)new_vaddr;
-+ fix->smem_len = new_size;
-+ fix->line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
-+
-+ dev_info(info->device,
-+ "%luKiB frame buffer at %08lx (mapped at %p)\n",
-+ (unsigned long)info->fix.smem_len / 1024,
-+ (unsigned long)info->fix.smem_start,
-+ info->screen_base);
-+
-+ return 0;
-+}
-+
-+
-+/*
-+ * The s1d15605 seems to be divided into eight 128 pixel wide pages (from top to
-+ * bottom) each page seems to be eight pixels high, where these eight pixels are
-+ * one byte
-+ */
-+static void s1d15605_update(struct fb_info *info)
-+{
-+ struct s1d15605fb_info *sinfo = info->par;
-+ int page, i, row, colmask;
-+ u8 retVal, *rowPtr;
-+
-+ WRITE_COMMAND(START_LINE_SET);
-+ for (page = 0; page < NUM_OF_PAGES; ++page) {
-+ WRITE_COMMAND(PAGE_ADDRESS_SET + page);
-+ WRITE_COMMAND(COLUMN_ADDRESS_HIGH);
-+ WRITE_COMMAND(COLUMN_ADDRESS_LOW);
-+
-+ for (i = 0; i < NUM_OF_COLUMNS; ++i)
-+ {
-+ /* point of opportunity: optimization */
-+ colmask = (1 << (i & 0x7));
-+ rowPtr = (u8*)(info->screen_base);
-+ rowPtr += (VIDEOWIDTH_BYTES * 8 * page);
-+ rowPtr += (i >> 3);
-+ retVal = 0;
-+ for (row = 0; row < 8; ++row)
-+ {
-+ retVal = (retVal >> 1) | (((*rowPtr) & colmask) ? 0x80 : 0);
-+ rowPtr += VIDEOWIDTH_BYTES;
-+ }
-+ WRITE_DATA(retVal);
-+ }
-+ }
-+
-+ WRITE_COMMAND(DISPLAY_ON);
-+}
-+
-+
-+/*
-+ * Setting the video mode has been split into two parts.
-+ * First part, xxxfb_check_var, must not write anything
-+ * to hardware, it should only verify and adjust var.
-+ * This means it doesn't alter par but it does use hardware
-+ * data from it to check this var.
-+ */
-+static int s1d15605_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
-+{
-+ /*
-+ * Some very basic checks
-+ */
-+ if (!var->xres)
-+ var->xres = 1;
-+ if (!var->yres)
-+ var->yres = 1;
-+ if (var->xres > var->xres_virtual)
-+ var->xres_virtual = var->xres;
-+ if (var->yres > var->yres_virtual)
-+ var->yres_virtual = var->yres;
-+
-+ if(var->bits_per_pixel > VIDEODEPTH)
-+ return -EINVAL;
-+
-+ /*
-+ * Memory limit
-+ */
-+ if (((var->yres_virtual * var->bits_per_pixel * var->yres_virtual) >> 3) >
-+ ACTUALVIDEOMEMSIZE)
-+ return -ENOMEM;
-+
-+ /*
-+ * Now that we checked it we alter var. The reason being is that the video
-+ * mode passed in might not work but slight changes to it might make it
-+ * work. This way we let the user know what is acceptable.
-+ */
-+ switch (var->bits_per_pixel) {
-+ case 1:
-+ var->red.offset = var->green.offset = var->blue.offset = 0;
-+ var->red.length = var->green.length = var->blue.length
-+ = var->bits_per_pixel;
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ var->xoffset = var->yoffset = 0;
-+ var->red.msb_right = var->green.msb_right = var->blue.msb_right =
-+ var->transp.msb_right = 0;
-+
-+ return 0;
-+}
-+
-+
-+/*
-+ * This routine actually sets the video mode. It's in here where we
-+ * the hardware state info->par and fix which can be affected by the
-+ * change in par. For this driver it doesn't do much.
-+ */
-+static int s1d15605_set_par(struct fb_info *info)
-+{
-+ int ret;
-+
-+ MSG("%s:\n", __func__);
-+ MSG(" * resolution: %ux%u (%ux%u virtual)\n",
-+ info->var.xres, info->var.yres,
-+ info->var.xres_virtual, info->var.yres_virtual);
-+
-+ ret = s1d15605fb_resize_framebuffer(info->par);
-+
-+ info->fix.visual = FB_VISUAL_MONO10;
-+ return ret;
-+}
-+
-+
-+/*
-+ * Set a single color register. The values supplied are already
-+ * rounded down to the hardware's capabilities (according to the
-+ * entries in the var structure). Return != 0 for invalid regno.
-+ */
-+static int s1d15605_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-+ u_int transp, struct fb_info *info)
-+{
-+ if (regno > 1) /* no. of hw registers - we only do mono now */
-+ return 1;
-+
-+ return 0;
-+}
-+
-+
-+/*
-+ * Currently, the routine will simply shut-off the backlight and prevent
-+ * updates/refreshes. Modify according to application.
-+ *
-+ * 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off
-+ */
-+static int s1d15605_blank(int blank, struct fb_info *info)
-+{
-+#ifdef CONFIG_PMAC_BACKLIGHT
-+ if (blank)
-+ pmac_backlight->props.power = FB_BLANK_POWERDOWN;
-+ else
-+ pmac_backlight->props.power = FB_BLANK_UNBLANK;
-+ backlight_update_status(pmac_backlight);
-+#endif
-+ return 1;
-+}
-+
-+
-+/*
-+ * Pan or Wrap the Display
-+ *
-+ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
-+ */
-+/*
-+static int s1d15605_pan_display(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ if (var->vmode & FB_VMODE_YWRAP) {
-+ if (var->yoffset < 0
-+ || var->yoffset >= info->var.yres_virtual
-+ || var->xoffset)
-+ return -EINVAL;
-+ } else {
-+ if (var->xoffset + var->xres > info->var.xres_virtual ||
-+ var->yoffset + var->yres > info->var.yres_virtual)
-+ return -EINVAL;
-+ }
-+ info->var.xoffset = var->xoffset;
-+ info->var.yoffset = var->yoffset;
-+ if (var->vmode & FB_VMODE_YWRAP)
-+ info->var.vmode |= FB_VMODE_YWRAP;
-+ else
-+ info->var.vmode &= ~FB_VMODE_YWRAP;
-+ return 0;
-+}
-+*/
-+
-+
-+static void s1d15605_copyarea(struct fb_info *info, const struct fb_copyarea *region)
-+{
-+ cfb_copyarea(info, region);
-+ s1d15605_update(info);
-+}
-+
-+
-+static void s1d15605_fillrect (struct fb_info *info, const struct fb_fillrect *rect)
-+{
-+ cfb_fillrect(info, rect);
-+ s1d15605_update(info);
-+}
-+
-+
-+static void s1d15605_imageblit(struct fb_info *p, const struct fb_image *image)
-+{
-+ cfb_imageblit(p, image);
-+ s1d15605_update(p);
-+}
-+
-+
-+/*
-+ * Write the users data to our framebuffer, and then trigger a psuedo DMA
-+ */
-+static ssize_t s1d15605_write(struct file *file, const char *buf,
-+ size_t count, loff_t *ppos)
-+{
-+ unsigned long p = *ppos;
-+ struct inode *inode = file->f_dentry->d_inode;
-+ int fbidx = iminor(inode);
-+ struct fb_info *info = registered_fb[fbidx];
-+ int err;
-+
-+ if (p > info->fix.smem_len)
-+ return -ENOSPC;
-+ if (count >= info->fix.smem_len)
-+ count = info->fix.smem_len;
-+ err = 0;
-+ if (count + p > info->fix.smem_len) {
-+ count = info->fix.smem_len - p;
-+ err = -ENOSPC;
-+ }
-+ if (count) {
-+ char *base_addr;
-+
-+ base_addr = info->screen_base;
-+ count -= copy_from_user(base_addr+p, buf, count);
-+ *ppos += count;
-+ err = -EFAULT;
-+ }
-+
-+ s1d15605_update(info);
-+
-+ if (count)
-+ return count;
-+
-+ return err;
-+}
-+
-+#ifdef USE_PRIVATE_VMA_FXS
-+static void s1d15605_vma_open(struct vm_area_struct *vma)
-+{
-+ // FIXME - store stats in the device data via vm_private_data
-+}
-+
-+
-+static void s1d15605_vma_close(struct vm_area_struct *vma)
-+{
-+ // FIXME - store stats in the device data via vm_private_data
-+}
-+
-+
-+static struct page *s1d15605_vma_nopage(struct vm_area_struct *vma,
-+ unsigned long address, int *type)
-+{
-+ struct page *page;
-+ struct fb_info *info = vma->vm_private_data;
-+
-+ page = virt_to_page(info->screen_base);
-+ get_page(page);
-+
-+ // FIXME - now someone has a link to our page, start periodically blitting
-+ // latest updates to the actual device.
-+
-+ return page;
-+}
-+
-+
-+static struct vm_operations_struct s1d15605_vm_ops = {
-+ .open = s1d15605_vma_open,
-+ .close = s1d15605_vma_close,
-+ .nopage = s1d15605_vma_nopage
-+};
-+
-+
-+/* We don't do much here - because we have special vm_ops */
-+static int s1d15605_mmap(struct fb_info *info, struct vm_area_struct *vma)
-+{
-+ vma->vm_ops = &s1d15605_vm_ops;
-+ vma->vm_flags |= VM_RESERVED;
-+ vma->vm_private_data = info;
-+ s1d15605_vma_open(vma);
-+
-+ return 0;
-+}
-+#endif /* USE_PRIVATE_VMA_FXS */
-+
-+
-+static struct fb_ops s1d15605fb_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = s1d15605_check_var,
-+ .fb_set_par = s1d15605_set_par,
-+ .fb_setcolreg = s1d15605_setcolreg,
-+ .fb_blank = s1d15605_blank,
-+// .fb_pan_display = s1d15605_pan_display,
-+ .fb_fillrect = s1d15605_fillrect,
-+ .fb_copyarea = s1d15605_copyarea,
-+ .fb_imageblit = s1d15605_imageblit,
-+ .fb_write = s1d15605_write,
-+#ifdef USE_PRIVATE_VMA_FXS
-+ .fb_mmap = s1d15605_mmap,
-+#endif
-+};
-+
-+
-+static void s1d15605_device_init(struct s1d15605fb_info *sinfo) {
-+
-+ char value;
-+
-+ /* release the reset line by reading the device - proto hardware */
-+ value = READ_COMMAND;
-+ value = READ_COMMAND;
-+
-+#ifdef CONFIG_MACH_KB9200
-+ /* new boards have dedicated reset line */
-+ gpio_set_value(sinfo->reset_pin, 1);
-+#endif
-+
-+ /* initialize the device within 5ms */
-+ WRITE_COMMAND(RESET_DISPLAY);
-+ WRITE_COMMAND(LCD_BIAS_1_9);
-+ WRITE_COMMAND(ADC_SELECT_REVERSE);
-+ WRITE_COMMAND(COMMON_OUTPUT_NORMAL);
-+ WRITE_COMMAND(V5_RESISTOR_RATIO);
-+ WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
-+ WRITE_COMMAND(ELECTRONIC_VOLUME_INIT);
-+ WRITE_COMMAND(POWER_CONTROL_SET | VOLTAGE_REGULATOR | VOLTAGE_FOLLOWER | BOOSTER_CIRCUIT);
-+ WRITE_COMMAND(DISPLAY_ON);
-+
-+ WRITE_COMMAND(RESISTOR_RATIO_START + 4);
-+ WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
-+ WRITE_COMMAND(0x33);
-+}
-+
-+
-+static int s1d15605fb_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info;
-+ struct s1d15605fb_info *sinfo;
-+ int ret;
-+
-+ MSG("%s\n", __func__);
-+
-+ if (!(info = framebuffer_alloc(sizeof(struct s1d15605fb_info), dev))) {
-+ dev_err(dev, "Cannot allocate framebuffer struct\n");
-+ return -ENOMEM;
-+ }
-+
-+ sinfo = info->par;
-+ sinfo->info = info;
-+ sinfo->pdev = pdev;
-+
-+ if (pdev->num_resources < 2) {
-+ dev_err(dev, "Resources unusable\n");
-+ ret = -ENODEV;
-+ goto free_info;
-+ }
-+
-+ info->fbops = &s1d15605fb_ops;
-+ strcpy(info->fix.id, pdev->name);
-+
-+ info->fix.mmio_start = pdev->resource[0].start;
-+ info->fix.mmio_len = pdev->resource[0].end - pdev->resource[0].start + 1;
-+ sinfo->reset_pin = pdev->resource[1].start;
-+
-+ ret = s1d15605fb_resize_framebuffer(sinfo);
-+ if (ret < 0) {
-+ dev_err(dev, "Cannot resize framebuffer: %d\n", ret);
-+ goto free_fb;
-+ }
-+
-+ if (!request_mem_region(info->fix.mmio_start,
-+ info->fix.mmio_len, pdev->name)) {
-+ ret = -EBUSY;
-+ goto free_fb;
-+ }
-+
-+ sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
-+ if (!sinfo->mmio) {
-+ dev_err(dev, "Cannot map LCD memory region\n");
-+ goto release_mem;
-+ }
-+
-+ s1d15605_device_init(sinfo);
-+
-+ ret = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 1);
-+
-+ if (!ret || (ret == 4))
-+ info->var = s1d15605_default;
-+
-+ info->fix = s1d15605_fix;
-+ info->flags = FBINFO_FLAG_DEFAULT |
-+/* FBINFO_HWACCEL_YPAN | */
-+ FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
-+
-+ ret = register_framebuffer(info);
-+ if (ret < 0) {
-+ dev_err(dev, "Failed to register framebuffer device: %d\n", ret);
-+ goto unmap_mmio;
-+ }
-+
-+ dev_set_drvdata(dev, info);
-+
-+ memset(info->screen_base, 0, info->fix.smem_len);
-+ info->var.activate |= FB_ACTIVATE_NOW;
-+ ret = fb_set_var(info, &info->var);
-+ if (ret) {
-+ dev_warn(dev, "Unable to set display parameters\n");
-+ }
-+
-+ info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW);
-+
-+ dev_dbg(dev, "%s SUCCESS\n", __func__);
-+
-+ dev_info(dev, "Driver $Revision: 1.1 $\n");
-+
-+ return 0;
-+
-+unmap_mmio:
-+ iounmap(sinfo->mmio);
-+release_mem:
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+free_fb:
-+ kfree(info->screen_base);
-+
-+free_info:
-+ framebuffer_release(info);
-+
-+ dev_dbg(dev, "%s FAILED\n", __func__);
-+ return ret;
-+}
-+
-+
-+static int s1d15605fb_remove(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info = dev_get_drvdata(dev);
-+ struct s1d15605fb_info *sinfo = info->par;
-+
-+ if (!sinfo)
-+ return 0;
-+
-+ unregister_framebuffer(info);
-+
-+ iounmap(sinfo->mmio);
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+
-+ kfree(info->screen_base);
-+
-+ dev_set_drvdata(dev, NULL);
-+ framebuffer_release(info);
-+ return 0;
-+}
-+
-+
-+static struct platform_driver s1d15605fb_driver = {
-+ .probe = s1d15605fb_probe,
-+ .remove = s1d15605fb_remove,
-+ .driver = {
-+ .name = "s1d15605fb",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+
-+static int __init s1d15605fb_init(void)
-+{
-+ return platform_driver_register(&s1d15605fb_driver);
-+}
-+
-+
-+static void __exit s1d15605fb_exit(void)
-+{
-+ platform_driver_unregister(&s1d15605fb_driver);
-+}
-+
-+
-+module_init(s1d15605fb_init);
-+module_exit(s1d15605fb_exit);
-+
-+
-+MODULE_AUTHOR("KwikByte");
-+MODULE_DESCRIPTION("Epson S1D15605 LCD Controller framebuffer driver");
-+MODULE_LICENSE("GPL");
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h Tue May 8 12:13:31 2007
-@@ -0,0 +1,61 @@
-+/*
-+ * include/asm-arm/arch-at91/at91_adc.h
-+ *
-+ * Copyright (C) SAN People
-+ *
-+ * Analog-to-Digital Converter (ADC) registers.
-+ * Based on AT91SAM9260 datasheet revision D.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef AT91_ADC_H
-+#define AT91_ADC_H
-+
-+#define AT91_ADC_CR 0x00 /* Control Register */
-+#define AT91_ADC_SWRST (1 << 0) /* Software Reset */
-+#define AT91_ADC_START (1 << 1) /* Start Conversion */
-+
-+#define AT91_ADC_MR 0x04 /* Mode Register */
-+#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
-+#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
-+#define AT91_ADC_TRGSEL_TC0 (0 << 1)
-+#define AT91_ADC_TRGSEL_TC1 (1 << 1)
-+#define AT91_ADC_TRGSEL_TC2 (2 << 1)
-+#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
-+#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
-+#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
-+#define AT91_ADC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
-+#define AT91_ADC_PRESCAL_(x) ((x) << 8)
-+#define AT91_ADC_STARTUP (0x1f << 16) /* Startup Up Time */
-+#define AT91_ADC_STARTUP_(x) ((x) << 16)
-+#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
-+#define AT91_ADC_SHTIM_(x) ((x) << 24)
-+
-+#define AT91_ADC_CHER 0x10 /* Channel Enable Register */
-+#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
-+#define AT91_ADC_CHSR 0x18 /* Channel Status Register */
-+#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */
-+
-+#define AT91_ADC_SR 0x1C /* Status Register */
-+#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */
-+#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */
-+#define AT91_ADC_DRDY (1 << 16) /* Data Ready */
-+#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */
-+#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */
-+#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */
-+
-+#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */
-+#define AT91_ADC_LDATA (0x3ff)
-+
-+#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
-+#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
-+#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
-+
-+#define AT91_ADC_CHR(n) (0x30 + ((n) * 4) /* Channel Data Register N */
-+#define AT91_ADC_DATA (0x3ff)
-+
-+#endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h Tue May 8 12:13:31 2007
-@@ -26,6 +26,9 @@
- #define AT91_MCI_MR 0x04 /* Mode Register */
- #define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */
- #define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */
-+#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */
-+#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */
-+#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */
- #define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */
- #define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */
- #define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h Fri May 11 16:45:00 2007
-@@ -37,7 +37,9 @@
- #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
- #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
-
--#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */
-+#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL only] */
-+
-+#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
- #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
- #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */
- #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h Tue May 8 12:56:33 2007
-@@ -107,185 +107,4 @@
- #define AT91RM9200_UHP_BASE 0x00300000 /* USB Host controller */
-
-
--#if 0
--/*
-- * PIO pin definitions (peripheral A/B multiplexing).
-- */
--#define AT91_PA0_MISO (1 << 0) /* A: SPI Master-In Slave-Out */
--#define AT91_PA0_PCK3 (1 << 0) /* B: PMC Programmable Clock Output 3 */
--#define AT91_PA1_MOSI (1 << 1) /* A: SPI Master-Out Slave-In */
--#define AT91_PA1_PCK0 (1 << 1) /* B: PMC Programmable Clock Output 0 */
--#define AT91_PA2_SPCK (1 << 2) /* A: SPI Serial Clock */
--#define AT91_PA2_IRQ4 (1 << 2) /* B: External Interrupt 4 */
--#define AT91_PA3_NPCS0 (1 << 3) /* A: SPI Peripheral Chip Select 0 */
--#define AT91_PA3_IRQ5 (1 << 3) /* B: External Interrupt 5 */
--#define AT91_PA4_NPCS1 (1 << 4) /* A: SPI Peripheral Chip Select 1 */
--#define AT91_PA4_PCK1 (1 << 4) /* B: PMC Programmable Clock Output 1 */
--#define AT91_PA5_NPCS2 (1 << 5) /* A: SPI Peripheral Chip Select 2 */
--#define AT91_PA5_TXD3 (1 << 5) /* B: USART Transmit Data 3 */
--#define AT91_PA6_NPCS3 (1 << 6) /* A: SPI Peripheral Chip Select 3 */
--#define AT91_PA6_RXD3 (1 << 6) /* B: USART Receive Data 3 */
--#define AT91_PA7_ETXCK_EREFCK (1 << 7) /* A: Ethernet Reference Clock / Transmit Clock */
--#define AT91_PA7_PCK2 (1 << 7) /* B: PMC Programmable Clock Output 2 */
--#define AT91_PA8_ETXEN (1 << 8) /* A: Ethernet Transmit Enable */
--#define AT91_PA8_MCCDB (1 << 8) /* B: MMC Multimedia Card B Command */
--#define AT91_PA9_ETX0 (1 << 9) /* A: Ethernet Transmit Data 0 */
--#define AT91_PA9_MCDB0 (1 << 9) /* B: MMC Multimedia Card B Data 0 */
--#define AT91_PA10_ETX1 (1 << 10) /* A: Ethernet Transmit Data 1 */
--#define AT91_PA10_MCDB1 (1 << 10) /* B: MMC Multimedia Card B Data 1 */
--#define AT91_PA11_ECRS_ECRSDV (1 << 11) /* A: Ethernet Carrier Sense / Data Valid */
--#define AT91_PA11_MCDB2 (1 << 11) /* B: MMC Multimedia Card B Data 2 */
--#define AT91_PA12_ERX0 (1 << 12) /* A: Ethernet Receive Data 0 */
--#define AT91_PA12_MCDB3 (1 << 12) /* B: MMC Multimedia Card B Data 3 */
--#define AT91_PA13_ERX1 (1 << 13) /* A: Ethernet Receive Data 1 */
--#define AT91_PA13_TCLK0 (1 << 13) /* B: TC External Clock Input 0 */
--#define AT91_PA14_ERXER (1 << 14) /* A: Ethernet Receive Error */
--#define AT91_PA14_TCLK1 (1 << 14) /* B: TC External Clock Input 1 */
--#define AT91_PA15_EMDC (1 << 15) /* A: Ethernet Management Data Clock */
--#define AT91_PA15_TCLK2 (1 << 15) /* B: TC External Clock Input 2 */
--#define AT91_PA16_EMDIO (1 << 16) /* A: Ethernet Management Data I/O */
--#define AT91_PA16_IRQ6 (1 << 16) /* B: External Interrupt 6 */
--#define AT91_PA17_TXD0 (1 << 17) /* A: USART Transmit Data 0 */
--#define AT91_PA17_TIOA0 (1 << 17) /* B: TC I/O Line A 0 */
--#define AT91_PA18_RXD0 (1 << 18) /* A: USART Receive Data 0 */
--#define AT91_PA18_TIOB0 (1 << 18) /* B: TC I/O Line B 0 */
--#define AT91_PA19_SCK0 (1 << 19) /* A: USART Serial Clock 0 */
--#define AT91_PA19_TIOA1 (1 << 19) /* B: TC I/O Line A 1 */
--#define AT91_PA20_CTS0 (1 << 20) /* A: USART Clear To Send 0 */
--#define AT91_PA20_TIOB1 (1 << 20) /* B: TC I/O Line B 1 */
--#define AT91_PA21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */
--#define AT91_PA21_TIOA2 (1 << 21) /* B: TC I/O Line A 2 */
--#define AT91_PA22_RXD2 (1 << 22) /* A: USART Receive Data 2 */
--#define AT91_PA22_TIOB2 (1 << 22) /* B: TC I/O Line B 2 */
--#define AT91_PA23_TXD2 (1 << 23) /* A: USART Transmit Data 2 */
--#define AT91_PA23_IRQ3 (1 << 23) /* B: External Interrupt 3 */
--#define AT91_PA24_SCK2 (1 << 24) /* A: USART Serial Clock 2 */
--#define AT91_PA24_PCK1 (1 << 24) /* B: PMC Programmable Clock Output 1 */
--#define AT91_PA25_TWD (1 << 25) /* A: TWI Two-wire Serial Data */
--#define AT91_PA25_IRQ2 (1 << 25) /* B: External Interrupt 2 */
--#define AT91_PA26_TWCK (1 << 26) /* A: TWI Two-wire Serial Clock */
--#define AT91_PA26_IRQ1 (1 << 26) /* B: External Interrupt 1 */
--#define AT91_PA27_MCCK (1 << 27) /* A: MMC Multimedia Card Clock */
--#define AT91_PA27_TCLK3 (1 << 27) /* B: TC External Clock Input 3 */
--#define AT91_PA28_MCCDA (1 << 28) /* A: MMC Multimedia Card A Command */
--#define AT91_PA28_TCLK4 (1 << 28) /* B: TC External Clock Input 4 */
--#define AT91_PA29_MCDA0 (1 << 29) /* A: MMC Multimedia Card A Data 0 */
--#define AT91_PA29_TCLK5 (1 << 29) /* B: TC External Clock Input 5 */
--#define AT91_PA30_DRXD (1 << 30) /* A: DBGU Receive Data */
--#define AT91_PA30_CTS2 (1 << 30) /* B: USART Clear To Send 2 */
--#define AT91_PA31_DTXD (1 << 31) /* A: DBGU Transmit Data */
--#define AT91_PA31_RTS2 (1 << 31) /* B: USART Ready To Send 2 */
--
--#define AT91_PB0_TF0 (1 << 0) /* A: SSC Transmit Frame Sync 0 */
--#define AT91_PB0_RTS3 (1 << 0) /* B: USART Ready To Send 3 */
--#define AT91_PB1_TK0 (1 << 1) /* A: SSC Transmit Clock 0 */
--#define AT91_PB1_CTS3 (1 << 1) /* B: USART Clear To Send 3 */
--#define AT91_PB2_TD0 (1 << 2) /* A: SSC Transmit Data 0 */
--#define AT91_PB2_SCK3 (1 << 2) /* B: USART Serial Clock 3 */
--#define AT91_PB3_RD0 (1 << 3) /* A: SSC Receive Data 0 */
--#define AT91_PB3_MCDA1 (1 << 3) /* B: MMC Multimedia Card A Data 1 */
--#define AT91_PB4_RK0 (1 << 4) /* A: SSC Receive Clock 0 */
--#define AT91_PB4_MCDA2 (1 << 4) /* B: MMC Multimedia Card A Data 2 */
--#define AT91_PB5_RF0 (1 << 5) /* A: SSC Receive Frame Sync 0 */
--#define AT91_PB5_MCDA3 (1 << 5) /* B: MMC Multimedia Card A Data 3 */
--#define AT91_PB6_TF1 (1 << 6) /* A: SSC Transmit Frame Sync 1 */
--#define AT91_PB6_TIOA3 (1 << 6) /* B: TC I/O Line A 3 */
--#define AT91_PB7_TK1 (1 << 7) /* A: SSC Transmit Clock 1 */
--#define AT91_PB7_TIOB3 (1 << 7) /* B: TC I/O Line B 3 */
--#define AT91_PB8_TD1 (1 << 8) /* A: SSC Transmit Data 1 */
--#define AT91_PB8_TIOA4 (1 << 8) /* B: TC I/O Line A 4 */
--#define AT91_PB9_RD1 (1 << 9) /* A: SSC Receive Data 1 */
--#define AT91_PB9_TIOB4 (1 << 9) /* B: TC I/O Line B 4 */
--#define AT91_PB10_RK1 (1 << 10) /* A: SSC Receive Clock 1 */
--#define AT91_PB10_TIOA5 (1 << 10) /* B: TC I/O Line A 5 */
--#define AT91_PB11_RF1 (1 << 11) /* A: SSC Receive Frame Sync 1 */
--#define AT91_PB11_TIOB5 (1 << 11) /* B: TC I/O Line B 5 */
--#define AT91_PB12_TF2 (1 << 12) /* A: SSC Transmit Frame Sync 2 */
--#define AT91_PB12_ETX2 (1 << 12) /* B: Ethernet Transmit Data 2 */
--#define AT91_PB13_TK2 (1 << 13) /* A: SSC Transmit Clock 3 */
--#define AT91_PB13_ETX3 (1 << 13) /* B: Ethernet Transmit Data 3 */
--#define AT91_PB14_TD2 (1 << 14) /* A: SSC Transmit Data 2 */
--#define AT91_PB14_ETXER (1 << 14) /* B: Ethernet Transmit Coding Error */
--#define AT91_PB15_RD2 (1 << 15) /* A: SSC Receive Data 2 */
--#define AT91_PB15_ERX2 (1 << 15) /* B: Ethernet Receive Data 2 */
--#define AT91_PB16_RK2 (1 << 16) /* A: SSC Receive Clock 2 */
--#define AT91_PB16_ERX3 (1 << 16) /* B: Ethernet Receive Data 3 */
--#define AT91_PB17_RF2 (1 << 17) /* A: SSC Receive Frame Sync 2 */
--#define AT91_PB17_ERXDV (1 << 17) /* B: Ethernet Receive Data Valid */
--#define AT91_PB18_RI1 (1 << 18) /* A: USART Ring Indicator 1 */
--#define AT91_PB18_ECOL (1 << 18) /* B: Ethernet Collision Detected */
--#define AT91_PB19_DTR1 (1 << 19) /* A: USART Data Terminal Ready 1 */
--#define AT91_PB19_ERXCK (1 << 19) /* B: Ethernet Receive Clock */
--#define AT91_PB20_TXD1 (1 << 20) /* A: USART Transmit Data 1 */
--#define AT91_PB21_RXD1 (1 << 21) /* A: USART Receive Data 1 */
--#define AT91_PB22_SCK1 (1 << 22) /* A: USART Serial Clock 1 */
--#define AT91_PB23_DCD1 (1 << 23) /* A: USART Data Carrier Detect 1 */
--#define AT91_PB24_CTS1 (1 << 24) /* A: USART Clear To Send 1 */
--#define AT91_PB25_DSR1 (1 << 25) /* A: USART Data Set Ready 1 */
--#define AT91_PB25_EF100 (1 << 25) /* B: Ethernet Force 100 Mbit */
--#define AT91_PB26_RTS1 (1 << 26) /* A: USART Ready To Send 1 */
--#define AT91_PB27_PCK0 (1 << 27) /* B: PMC Programmable Clock Output 0 */
--#define AT91_PB28_FIQ (1 << 28) /* A: Fast Interrupt */
--#define AT91_PB29_IRQ0 (1 << 29) /* A: External Interrupt 0 */
--
--#define AT91_PC0_BFCK (1 << 0) /* A: Burst Flash Clock */
--#define AT91_PC1_BFRDY_SMOE (1 << 1) /* A: Burst Flash Ready / SmartMedia Output Enable */
--#define AT91_PC2_BFAVD (1 << 2) /* A: Burst Flash Address Valid */
--#define AT91_PC3_BFBAA_SMWE (1 << 3) /* A: Burst Flash Address Advance / SmartMedia Write Enable */
--#define AT91_PC4_BFOE (1 << 4) /* A: Burst Flash Output Enable */
--#define AT91_PC5_BFWE (1 << 5) /* A: Burst Flash Write Enable */
--#define AT91_PC6_NWAIT (1 << 6) /* A: SMC Wait Signal */
--#define AT91_PC7_A23 (1 << 7) /* A: Address Bus 23 */
--#define AT91_PC8_A24 (1 << 8) /* A: Address Bus 24 */
--#define AT91_PC9_A25_CFRNW (1 << 9) /* A: Address Bus 25 / Compact Flash Read Not Write */
--#define AT91_PC10_NCS4_CFCS (1 << 10) /* A: SMC Chip Select 4 / Compact Flash Chip Select */
--#define AT91_PC11_NCS5_CFCE1 (1 << 11) /* A: SMC Chip Select 5 / Compact Flash Chip Enable 1 */
--#define AT91_PC12_NCS6_CFCE2 (1 << 12) /* A: SMC Chip Select 6 / Compact Flash Chip Enable 2 */
--#define AT91_PC13_NCS7 (1 << 13) /* A: Chip Select 7 */
--
--#define AT91_PD0_ETX0 (1 << 0) /* A: Ethernet Transmit Data 0 */
--#define AT91_PD1_ETX1 (1 << 1) /* A: Ethernet Transmit Data 1 */
--#define AT91_PD2_ETX2 (1 << 2) /* A: Ethernet Transmit Data 2 */
--#define AT91_PD3_ETX3 (1 << 3) /* A: Ethernet Transmit Data 3 */
--#define AT91_PD4_ETXEN (1 << 4) /* A: Ethernet Transmit Enable */
--#define AT91_PD5_ETXER (1 << 5) /* A: Ethernet Transmit Coding Error */
--#define AT91_PD6_DTXD (1 << 6) /* A: DBGU Transmit Data */
--#define AT91_PD7_PCK0 (1 << 7) /* A: PMC Programmable Clock Output 0 */
--#define AT91_PD7_TSYNC (1 << 7) /* B: ETM Trace Synchronization Signal */
--#define AT91_PD8_PCK1 (1 << 8) /* A: PMC Programmable Clock Output 1 */
--#define AT91_PD8_TCLK (1 << 8) /* B: ETM Trace Clock */
--#define AT91_PD9_PCK2 (1 << 9) /* A: PMC Programmable Clock Output 2 */
--#define AT91_PD9_TPS0 (1 << 9) /* B: ETM Trace ARM Pipeline Status 0 */
--#define AT91_PD10_PCK3 (1 << 10) /* A: PMC Programmable Clock Output 3 */
--#define AT91_PD10_TPS1 (1 << 10) /* B: ETM Trace ARM Pipeline Status 1 */
--#define AT91_PD11_TPS2 (1 << 11) /* B: ETM Trace ARM Pipeline Status 2 */
--#define AT91_PD12_TPK0 (1 << 12) /* B: ETM Trace Packet Port 0 */
--#define AT91_PD13_TPK1 (1 << 13) /* B: ETM Trace Packet Port 1 */
--#define AT91_PD14_TPK2 (1 << 14) /* B: ETM Trace Packet Port 2 */
--#define AT91_PD15_TD0 (1 << 15) /* A: SSC Transmit Data 0 */
--#define AT91_PD15_TPK3 (1 << 15) /* B: ETM Trace Packet Port 3 */
--#define AT91_PD16_TD1 (1 << 16) /* A: SSC Transmit Data 1 */
--#define AT91_PD16_TPK4 (1 << 16) /* B: ETM Trace Packet Port 4 */
--#define AT91_PD17_TD2 (1 << 17) /* A: SSC Transmit Data 2 */
--#define AT91_PD17_TPK5 (1 << 17) /* B: ETM Trace Packet Port 5 */
--#define AT91_PD18_NPCS1 (1 << 18) /* A: SPI Peripheral Chip Select 1 */
--#define AT91_PD18_TPK6 (1 << 18) /* B: ETM Trace Packet Port 6 */
--#define AT91_PD19_NPCS2 (1 << 19) /* A: SPI Peripheral Chip Select 2 */
--#define AT91_PD19_TPK7 (1 << 19) /* B: ETM Trace Packet Port 7 */
--#define AT91_PD20_NPCS3 (1 << 20) /* A: SPI Peripheral Chip Select 3 */
--#define AT91_PD20_TPK8 (1 << 20) /* B: ETM Trace Packet Port 8 */
--#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */
--#define AT91_PD21_TPK9 (1 << 21) /* B: ETM Trace Packet Port 9 */
--#define AT91_PD22_RTS1 (1 << 22) /* A: USART Ready To Send 1 */
--#define AT91_PD22_TPK10 (1 << 22) /* B: ETM Trace Packet Port 10 */
--#define AT91_PD23_RTS2 (1 << 23) /* A: USART Ready To Send 2 */
--#define AT91_PD23_TPK11 (1 << 23) /* B: ETM Trace Packet Port 11 */
--#define AT91_PD24_RTS3 (1 << 24) /* A: USART Ready To Send 3 */
--#define AT91_PD24_TPK12 (1 << 24) /* B: ETM Trace Packet Port 12 */
--#define AT91_PD25_DTR1 (1 << 25) /* A: USART Data Terminal Ready 1 */
--#define AT91_PD25_TPK13 (1 << 25) /* B: ETM Trace Packet Port 13 */
--#define AT91_PD26_TPK14 (1 << 26) /* B: ETM Trace Packet Port 14 */
--#define AT91_PD27_TPK15 (1 << 27) /* B: ETM Trace Packet Port 15 */
--#endif
--
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h Tue May 8 12:56:33 2007
-@@ -117,13 +117,4 @@
- #define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */
-
-
--#if 0
--/*
-- * PIO pin definitions (peripheral A/B multiplexing).
-- */
--
--// TODO: Add
--
--#endif
--
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h Fri May 11 16:20:33 2007
-@@ -67,7 +67,7 @@
- #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
- #define AT91_MATRIX_CS4A_SMC (0 << 4)
- #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
--#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */
-+#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
- #define AT91_MATRIX_CS5A_SMC (0 << 5)
- #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
- #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h Tue May 8 12:56:33 2007
-@@ -98,195 +98,4 @@
- #define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */
-
-
--#if 0
--/*
-- * PIO pin definitions (peripheral A/B multiplexing).
-- */
--#define AT91_PA0_SPI0_MISO (1 << 0) /* A: SPI0 Master In Slave */
--#define AT91_PA0_MCDA0 (1 << 0) /* B: Multimedia Card A Data 0 */
--#define AT91_PA1_SPI0_MOSI (1 << 1) /* A: SPI0 Master Out Slave */
--#define AT91_PA1_MCCDA (1 << 1) /* B: Multimedia Card A Command */
--#define AT91_PA2_SPI0_SPCK (1 << 2) /* A: SPI0 Serial Clock */
--#define AT91_PA2_MCCK (1 << 2) /* B: Multimedia Card Clock */
--#define AT91_PA3_SPI0_NPCS0 (1 << 3) /* A: SPI0 Peripheral Chip Select 0 */
--#define AT91_PA4_SPI0_NPCS1 (1 << 4) /* A: SPI0 Peripheral Chip Select 1 */
--#define AT91_PA4_MCDA1 (1 << 4) /* B: Multimedia Card A Data 1 */
--#define AT91_PA5_SPI0_NPCS2 (1 << 5) /* A: SPI0 Peripheral Chip Select 2 */
--#define AT91_PA5_MCDA2 (1 << 5) /* B: Multimedia Card A Data 2 */
--#define AT91_PA6_SPI0_NPCS3 (1 << 6) /* A: SPI0 Peripheral Chip Select 3 */
--#define AT91_PA6_MCDA3 (1 << 6) /* B: Multimedia Card A Data 3 */
--#define AT91_PA7_TWD (1 << 7) /* A: TWI Two-wire Serial Data */
--#define AT91_PA7_PCK0 (1 << 7) /* B: PMC Programmable clock Output 0 */
--#define AT91_PA8_TWCK (1 << 8) /* A: TWI Two-wire Serial Clock */
--#define AT91_PA8_PCK1 (1 << 8) /* B: PMC Programmable clock Output 1 */
--#define AT91_PA9_DRXD (1 << 9) /* A: DBGU Debug Receive Data */
--#define AT91_PA9_PCK2 (1 << 9) /* B: PMC Programmable clock Output 2 */
--#define AT91_PA10_DTXD (1 << 10) /* A: DBGU Debug Transmit Data */
--#define AT91_PA10_PCK3 (1 << 10) /* B: PMC Programmable clock Output 3 */
--#define AT91_PA11_TSYNC (1 << 11) /* A: Trace Synchronization Signal */
--#define AT91_PA11_SCK1 (1 << 11) /* B: USART1 Serial Clock */
--#define AT91_PA12_TCLK (1 << 12) /* A: Trace Clock */
--#define AT91_PA12_RTS1 (1 << 12) /* B: USART1 Ready To Send */
--#define AT91_PA13_TPS0 (1 << 13) /* A: Trace ARM Pipeline Status 0 */
--#define AT91_PA13_CTS1 (1 << 13) /* B: USART1 Clear To Send */
--#define AT91_PA14_TPS1 (1 << 14) /* A: Trace ARM Pipeline Status 1 */
--#define AT91_PA14_SCK2 (1 << 14) /* B: USART2 Serial Clock */
--#define AT91_PA15_TPS2 (1 << 15) /* A: Trace ARM Pipeline Status 2 */
--#define AT91_PA15_RTS2 (1 << 15) /* B: USART2 Ready To Send */
--#define AT91_PA16_TPK0 (1 << 16) /* A: Trace Packet Port 0 */
--#define AT91_PA16_CTS2 (1 << 16) /* B: USART2 Clear To Send */
--#define AT91_PA17_TPK1 (1 << 17) /* A: Trace Packet Port 1 */
--#define AT91_PA17_TF1 (1 << 17) /* B: SSC1 Transmit Frame Sync */
--#define AT91_PA18_TPK2 (1 << 18) /* A: Trace Packet Port 2 */
--#define AT91_PA18_TK1 (1 << 18) /* B: SSC1 Transmit Clock */
--#define AT91_PA19_TPK3 (1 << 19) /* A: Trace Packet Port 3 */
--#define AT91_PA19_TD1 (1 << 19) /* B: SSC1 Transmit Data */
--#define AT91_PA20_TPK4 (1 << 20) /* A: Trace Packet Port 4 */
--#define AT91_PA20_RD1 (1 << 20) /* B: SSC1 Receive Data */
--#define AT91_PA21_TPK5 (1 << 21) /* A: Trace Packet Port 5 */
--#define AT91_PA21_RK1 (1 << 21) /* B: SSC1 Receive Clock */
--#define AT91_PA22_TPK6 (1 << 22) /* A: Trace Packet Port 6 */
--#define AT91_PA22_RF1 (1 << 22) /* B: SSC1 Receive Frame Sync */
--#define AT91_PA23_TPK7 (1 << 23) /* A: Trace Packet Port 7 */
--#define AT91_PA23_RTS0 (1 << 23) /* B: USART0 Ready To Send */
--#define AT91_PA24_TPK8 (1 << 24) /* A: Trace Packet Port 8 */
--#define AT91_PA24_SPI1_NPCS1 (1 << 24) /* B: SPI1 Peripheral Chip Select 1 */
--#define AT91_PA25_TPK9 (1 << 25) /* A: Trace Packet Port 9 */
--#define AT91_PA25_SPI1_NPCS2 (1 << 25) /* B: SPI1 Peripheral Chip Select 2 */
--#define AT91_PA26_TPK10 (1 << 26) /* A: Trace Packet Port 10 */
--#define AT91_PA26_SPI1_NPCS3 (1 << 26) /* B: SPI1 Peripheral Chip Select 3 */
--#define AT91_PA27_TPK11 (1 << 27) /* A: Trace Packet Port 11 */
--#define AT91_PA27_SPI0_NPCS1 (1 << 27) /* B: SPI0 Peripheral Chip Select 1 */
--#define AT91_PA28_TPK12 (1 << 28) /* A: Trace Packet Port 12 */
--#define AT91_PA28_SPI0_NPCS2 (1 << 28) /* B: SPI0 Peripheral Chip Select 2 */
--#define AT91_PA29_TPK13 (1 << 29) /* A: Trace Packet Port 13 */
--#define AT91_PA29_SPI0_NPCS3 (1 << 29) /* B: SPI0 Peripheral Chip Select 3 */
--#define AT91_PA30_TPK14 (1 << 30) /* A: Trace Packet Port 14 */
--#define AT91_PA30_A23 (1 << 30) /* B: Address Bus bit 23 */
--#define AT91_PA31_TPK15 (1 << 31) /* A: Trace Packet Port 15 */
--#define AT91_PA31_A24 (1 << 31) /* B: Address Bus bit 24 */
--
--#define AT91_PB0_LCDVSYNC (1 << 0) /* A: LCD Vertical Synchronization */
--#define AT91_PB1_LCDHSYNC (1 << 1) /* A: LCD Horizontal Synchronization */
--#define AT91_PB2_LCDDOTCK (1 << 2) /* A: LCD Dot Clock */
--#define AT91_PB2_PCK0 (1 << 2) /* B: PMC Programmable clock Output 0 */
--#define AT91_PB3_LCDDEN (1 << 3) /* A: LCD Data Enable */
--#define AT91_PB4_LCDCC (1 << 4) /* A: LCD Contrast Control */
--#define AT91_PB4_LCDD2 (1 << 4) /* B: LCD Data Bus Bit 2 */
--#define AT91_PB5_LCDD0 (1 << 5) /* A: LCD Data Bus Bit 0 */
--#define AT91_PB5_LCDD3 (1 << 5) /* B: LCD Data Bus Bit 3 */
--#define AT91_PB6_LCDD1 (1 << 6) /* A: LCD Data Bus Bit 1 */
--#define AT91_PB6_LCDD4 (1 << 6) /* B: LCD Data Bus Bit 4 */
--#define AT91_PB7_LCDD2 (1 << 7) /* A: LCD Data Bus Bit 2 */
--#define AT91_PB7_LCDD5 (1 << 7) /* B: LCD Data Bus Bit 5 */
--#define AT91_PB8_LCDD3 (1 << 8) /* A: LCD Data Bus Bit 3 */
--#define AT91_PB8_LCDD6 (1 << 8) /* B: LCD Data Bus Bit 6 */
--#define AT91_PB9_LCDD4 (1 << 9) /* A: LCD Data Bus Bit 4 */
--#define AT91_PB9_LCDD7 (1 << 9) /* B: LCD Data Bus Bit 7 */
--#define AT91_PB10_LCDD5 (1 << 10) /* A: LCD Data Bus Bit 5 */
--#define AT91_PB10_LCDD10 (1 << 10) /* B: LCD Data Bus Bit 10 */
--#define AT91_PB11_LCDD6 (1 << 11) /* A: LCD Data Bus Bit 6 */
--#define AT91_PB11_LCDD11 (1 << 11) /* B: LCD Data Bus Bit 11 */
--#define AT91_PB12_LCDD7 (1 << 12) /* A: LCD Data Bus Bit 7 */
--#define AT91_PB12_LCDD12 (1 << 12) /* B: LCD Data Bus Bit 12 */
--#define AT91_PB13_LCDD8 (1 << 13) /* A: LCD Data Bus Bit 8 */
--#define AT91_PB13_LCDD13 (1 << 13) /* B: LCD Data Bus Bit 13 */
--#define AT91_PB14_LCDD9 (1 << 14) /* A: LCD Data Bus Bit 9 */
--#define AT91_PB14_LCDD14 (1 << 14) /* B: LCD Data Bus Bit 14 */
--#define AT91_PB15_LCDD10 (1 << 15) /* A: LCD Data Bus Bit 10 */
--#define AT91_PB15_LCDD15 (1 << 15) /* B: LCD Data Bus Bit 15 */
--#define AT91_PB16_LCDD11 (1 << 16) /* A: LCD Data Bus Bit 11 */
--#define AT91_PB16_LCDD19 (1 << 16) /* B: LCD Data Bus Bit 19 */
--#define AT91_PB17_LCDD12 (1 << 17) /* A: LCD Data Bus Bit 12 */
--#define AT91_PB17_LCDD20 (1 << 17) /* B: LCD Data Bus Bit 20 */
--#define AT91_PB18_LCDD13 (1 << 18) /* A: LCD Data Bus Bit 13 */
--#define AT91_PB18_LCDD21 (1 << 18) /* B: LCD Data Bus Bit 21 */
--#define AT91_PB19_LCDD14 (1 << 19) /* A: LCD Data Bus Bit 14 */
--#define AT91_PB19_LCDD22 (1 << 19) /* B: LCD Data Bus Bit 22 */
--#define AT91_PB20_LCDD15 (1 << 20) /* A: LCD Data Bus Bit 15 */
--#define AT91_PB20_LCDD23 (1 << 20) /* B: LCD Data Bus Bit 23 */
--#define AT91_PB21_TF0 (1 << 21) /* A: SSC0 Transmit Frame Sync */
--#define AT91_PB21_LCDD16 (1 << 21) /* B: LCD Data Bus Bit 16 */
--#define AT91_PB22_TK0 (1 << 22) /* A: SSC0 Transmit Clock */
--#define AT91_PB22_LCDD17 (1 << 22) /* B: LCD Data Bus Bit 17 */
--#define AT91_PB23_TD0 (1 << 23) /* A: SSC0 Transmit Data */
--#define AT91_PB23_LCDD18 (1 << 23) /* B: LCD Data Bus Bit 18 */
--#define AT91_PB24_RD0 (1 << 24) /* A: SSC0 Receive Data */
--#define AT91_PB24_LCDD19 (1 << 24) /* B: LCD Data Bus Bit 19 */
--#define AT91_PB25_RK0 (1 << 25) /* A: SSC0 Receive Clock */
--#define AT91_PB25_LCDD20 (1 << 25) /* B: LCD Data Bus Bit 20 */
--#define AT91_PB26_RF0 (1 << 26) /* A: SSC0 Receive Frame Sync */
--#define AT91_PB26_LCDD21 (1 << 26) /* B: LCD Data Bus Bit 21 */
--#define AT91_PB27_SPI1_NPCS1 (1 << 27) /* A: SPI1 Peripheral Chip Select 1 */
--#define AT91_PB27_LCDD22 (1 << 27) /* B: LCD Data Bus Bit 22 */
--#define AT91_PB28_SPI1_NPCS0 (1 << 28) /* A: SPI1 Peripheral Chip Select 0 */
--#define AT91_PB28_LCDD23 (1 << 28) /* B: LCD Data Bus Bit 23 */
--#define AT91_PB29_SPI1_SPCK (1 << 29) /* A: SPI1 Serial Clock */
--#define AT91_PB29_IRQ2 (1 << 29) /* B: Interrupt input 2 */
--#define AT91_PB30_SPI1_MISO (1 << 30) /* A: SPI1 Master In Slave */
--#define AT91_PB30_IRQ1 (1 << 30) /* B: Interrupt input 1 */
--#define AT91_PB31_SPI1_MOSI (1 << 31) /* A: SPI1 Master Out Slave */
--#define AT91_PB31_PCK2 (1 << 31) /* B: PMC Programmable clock Output 2 */
--
--#define AT91_PC0_SMOE (1 << 0) /* A: SmartMedia Output Enable */
--#define AT91_PC0_NCS6 (1 << 0) /* B: Chip Select 6 */
--#define AT91_PC1_SMWE (1 << 1) /* A: SmartMedia Write Enable */
--#define AT91_PC1_NCS7 (1 << 1) /* B: Chip Select 7 */
--#define AT91_PC2_NWAIT (1 << 2) /* A: NWAIT */
--#define AT91_PC2_IRQ0 (1 << 2) /* B: Interrupt input 0 */
--#define AT91_PC3_A25_CFRNW (1 << 3) /* A: Address Bus[25] / Compact Flash Read Not Write */
--#define AT91_PC4_NCS4_CFCS0 (1 << 4) /* A: Chip Select 4 / CompactFlash Chip Select 0 */
--#define AT91_PC5_NCS5_CFCS1 (1 << 5) /* A: Chip Select 5 / CompactFlash Chip Select 1 */
--#define AT91_PC6_CFCE1 (1 << 6) /* A: CompactFlash Chip Enable 1 */
--#define AT91_PC7_CFCE2 (1 << 7) /* A: CompactFlash Chip Enable 2 */
--#define AT91_PC8_TXD0 (1 << 8) /* A: USART0 Transmit Data */
--#define AT91_PC8_PCK2 (1 << 8) /* B: PMC Programmable clock Output 2 */
--#define AT91_PC9_RXD0 (1 << 9) /* A: USART0 Receive Data */
--#define AT91_PC9_PCK3 (1 << 9) /* B: PMC Programmable clock Output 3 */
--#define AT91_PC10_RTS0 (1 << 10) /* A: USART0 Ready To Send */
--#define AT91_PC10_SCK0 (1 << 10) /* B: USART0 Serial Clock */
--#define AT91_PC11_CTS0 (1 << 11) /* A: USART0 Clear To Send */
--#define AT91_PC11_FIQ (1 << 11) /* B: AIC Fast Interrupt Input */
--#define AT91_PC12_TXD1 (1 << 12) /* A: USART1 Transmit Data */
--#define AT91_PC12_NCS6 (1 << 12) /* B: Chip Select 6 */
--#define AT91_PC13_RXD1 (1 << 13) /* A: USART1 Receive Data */
--#define AT91_PC13_NCS7 (1 << 13) /* B: Chip Select 7 */
--#define AT91_PC14_TXD2 (1 << 14) /* A: USART2 Transmit Data */
--#define AT91_PC14_SPI1_NPCS2 (1 << 14) /* B: SPI1 Peripheral Chip Select 2 */
--#define AT91_PC15_RXD2 (1 << 15) /* A: USART2 Receive Data */
--#define AT91_PC15_SPI1_NPCS3 (1 << 15) /* B: SPI1 Peripheral Chip Select 3 */
--#define AT91_PC16_D16 (1 << 16) /* A: Data Bus [16] */
--#define AT91_PC16_TCLK0 (1 << 16) /* B: Timer Counter 0 external clock input */
--#define AT91_PC17_D17 (1 << 17) /* A: Data Bus [17] */
--#define AT91_PC17_TCLK1 (1 << 17) /* B: Timer Counter 1 external clock input */
--#define AT91_PC18_D18 (1 << 18) /* A: Data Bus [18] */
--#define AT91_PC18_TCLK2 (1 << 18) /* B: Timer Counter 2 external clock input */
--#define AT91_PC19_D19 (1 << 19) /* A: Data Bus [19] */
--#define AT91_PC19_TIOA0 (1 << 19) /* B: Timer Counter 0 Multipurpose Timer I/O Pin A */
--#define AT91_PC20_D20 (1 << 20) /* A: Data Bus [20] */
--#define AT91_PC20_TIOB0 (1 << 20) /* B: Timer Counter 0 Multipurpose Timer I/O Pin B */
--#define AT91_PC21_D21 (1 << 21) /* A: Data Bus [21] */
--#define AT91_PC21_TIOA1 (1 << 21) /* B: Timer Counter 1 Multipurpose Timer I/O Pin A */
--#define AT91_PC22_D22 (1 << 22) /* A: Data Bus [22] */
--#define AT91_PC22_TIOB1 (1 << 22) /* B: Timer Counter 1 Multipurpose Timer I/O Pin B */
--#define AT91_PC23_D23 (1 << 23) /* A: Data Bus [23] */
--#define AT91_PC23_TIOA2 (1 << 23) /* B: Timer Counter 2 Multipurpose Timer I/O Pin A */
--#define AT91_PC24_D24 (1 << 24) /* A: Data Bus [24] */
--#define AT91_PC24_TIOB2 (1 << 24) /* B: Timer Counter 2 Multipurpose Timer I/O Pin B */
--#define AT91_PC25_D25 (1 << 25) /* A: Data Bus [25] */
--#define AT91_PC25_TF2 (1 << 25) /* B: SSC2 Transmit Frame Sync */
--#define AT91_PC26_D26 (1 << 26) /* A: Data Bus [26] */
--#define AT91_PC26_TK2 (1 << 26) /* B: SSC2 Transmit Clock */
--#define AT91_PC27_D27 (1 << 27) /* A: Data Bus [27] */
--#define AT91_PC27_TD2 (1 << 27) /* B: SSC2 Transmit Data */
--#define AT91_PC28_D28 (1 << 28) /* A: Data Bus [28] */
--#define AT91_PC28_RD2 (1 << 28) /* B: SSC2 Receive Data */
--#define AT91_PC29_D29 (1 << 29) /* A: Data Bus [29] */
--#define AT91_PC29_RK2 (1 << 29) /* B: SSC2 Receive Clock */
--#define AT91_PC30_D30 (1 << 30) /* A: Data Bus [30] */
--#define AT91_PC30_RF2 (1 << 30) /* B: SSC2 Receive Frame Sync */
--#define AT91_PC31_D31 (1 << 31) /* A: Data Bus [31] */
--#define AT91_PC31_PCK1 (1 << 31) /* B: PMC Programmable clock Output 1 */
--#endif
--
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h Tue May 8 12:56:33 2007
-@@ -119,13 +119,5 @@
- #define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */
- #define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */
-
--#if 0
--/*
-- * PIO pin definitions (peripheral A/B multiplexing).
-- */
--
--// TODO: Add
--
--#endif
-
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h Fri May 11 14:53:48 2007
-@@ -0,0 +1,110 @@
-+/*
-+ * include/asm-arm/arch-at91/at91sam9260.h
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * Common definitions.
-+ * Based on AT91SAM9RL datasheet revision A. (Preliminary)
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#ifndef AT91SAM9RL_H
-+#define AT91SAM9RL_H
-+
-+/*
-+ * Peripheral identifiers/interrupts.
-+ */
-+#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
-+#define AT91_ID_SYS 1 /* System Controller */
-+#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */
-+#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */
-+#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */
-+#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */
-+#define AT91SAM9RL_ID_US0 6 /* USART 0 */
-+#define AT91SAM9RL_ID_US1 7 /* USART 1 */
-+#define AT91SAM9RL_ID_US2 8 /* USART 2 */
-+#define AT91SAM9RL_ID_US3 9 /* USART 3 */
-+#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */
-+#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */
-+#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */
-+#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */
-+#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */
-+#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */
-+#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */
-+#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */
-+#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */
-+#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */
-+#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */
-+#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */
-+#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */
-+#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */
-+#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */
-+#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */
-+
-+
-+/*
-+ * User Peripheral physical base addresses.
-+ */
-+#define AT91SAM9RL_BASE_TCB0 0xfffa0000
-+#define AT91SAM9RL_BASE_TC0 0xfffa0000
-+#define AT91SAM9RL_BASE_TC1 0xfffa0040
-+#define AT91SAM9RL_BASE_TC2 0xfffa0080
-+#define AT91SAM9RL_BASE_MCI 0xfffa4000
-+#define AT91SAM9RL_BASE_TWI0 0xfffa8000
-+#define AT91SAM9RL_BASE_TWI1 0xfffac000
-+#define AT91SAM9RL_BASE_US0 0xfffb0000
-+#define AT91SAM9RL_BASE_US1 0xfffb4000
-+#define AT91SAM9RL_BASE_US2 0xfffb8000
-+#define AT91SAM9RL_BASE_US3 0xfffbc000
-+#define AT91SAM9RL_BASE_SSC0 0xfffc0000
-+#define AT91SAM9RL_BASE_SSC1 0xfffc4000
-+#define AT91SAM9RL_BASE_PWMC 0xfffc8000
-+#define AT91SAM9RL_BASE_SPI 0xfffcc000
-+#define AT91SAM9RL_BASE_TSC 0xfffd0000
-+#define AT91SAM9RL_BASE_UDPHS 0xfffd4000
-+#define AT91SAM9RL_BASE_AC97C 0xfffd8000
-+#define AT91_BASE_SYS 0xffffc000
-+
-+
-+/*
-+ * System Peripherals (offset from AT91_BASE_SYS)
-+ */
-+#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
-+#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
-+#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS)
-+#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
-+#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
-+#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
-+#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
-+#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
-+#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
-+#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
-+#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
-+#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS)
-+#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
-+#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
-+#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
-+#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
-+#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
-+#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
-+#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
-+#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
-+#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
-+
-+
-+/*
-+ * Internal Memory.
-+ */
-+#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */
-+#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */
-+
-+#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */
-+#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */
-+
-+#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */
-+#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */
-+
-+#endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h
---- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h Fri May 11 16:18:45 2007
-@@ -0,0 +1,96 @@
-+/*
-+ * include/asm-arm/arch-at91/at91sam9rl_matrix.h
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
-+ * Based on AT91SAM9RL datasheet revision A. (Preliminary)
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#ifndef AT91SAM9RL_MATRIX_H
-+#define AT91SAM9RL_MATRIX_H
-+
-+#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-+#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-+#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-+#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-+#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-+#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
-+#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-+#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-+#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-+#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-+#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-+#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-+
-+#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-+#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-+#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-+#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-+#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
-+#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
-+#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-+#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-+#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-+#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-+#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-+#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-+#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-+#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-+
-+#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-+#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-+#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-+#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-+#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
-+#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
-+#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-+#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-+#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-+#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-+#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-+#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-+
-+#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
-+#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-+#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-+#define AT91_MATRIX_RCB2 (1 << 2)
-+#define AT91_MATRIX_RCB3 (1 << 3)
-+#define AT91_MATRIX_RCB4 (1 << 4)
-+#define AT91_MATRIX_RCB5 (1 << 5)
-+
-+#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */
-+#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-+#define AT91_MATRIX_ITCM_0 (0 << 0)
-+#define AT91_MATRIX_ITCM_16 (5 << 0)
-+#define AT91_MATRIX_ITCM_32 (6 << 0)
-+#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-+#define AT91_MATRIX_DTCM_0 (0 << 4)
-+#define AT91_MATRIX_DTCM_16 (5 << 4)
-+#define AT91_MATRIX_DTCM_32 (6 << 4)
-+
-+#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */
-+#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-+#define AT91_MATRIX_CS1A_SMC (0 << 1)
-+#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-+#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-+#define AT91_MATRIX_CS3A_SMC (0 << 3)
-+#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-+#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-+#define AT91_MATRIX_CS4A_SMC (0 << 4)
-+#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-+#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-+#define AT91_MATRIX_CS5A_SMC (0 << 5)
-+#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-+#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-+#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-+#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
-+#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
-+
-+
-+#endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/board.h linux-2.6-stable/include/asm-arm/arch-at91/board.h
---- linux-2.6.21/include/asm-arm/arch-at91/board.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/board.h Thu May 10 12:21:10 2007
-@@ -62,7 +62,7 @@
- };
- extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
-
-- /* Ethernet */
-+ /* Ethernet (EMAC & MACB) */
- struct at91_eth_data {
- u8 phy_irq_pin; /* PHY IRQ */
- u8 is_rmii; /* using RMII interface? */
-@@ -114,9 +114,31 @@
- };
- extern void __init at91_add_device_serial(void);
-
-+ /* LCD Controller */
-+struct atmel_lcdfb_info;
-+extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
-+
-+ /* AC97 */
-+struct atmel_ac97_data {
-+ u8 reset_pin; /* reset */
-+};
-+extern void __init at91_add_device_ac97(struct atmel_ac97_data *data);
-+
-+ /* ISI */
-+extern void __init at91_add_device_isi(void);
-+
- /* LEDs */
- extern u8 at91_leds_cpu;
- extern u8 at91_leds_timer;
- extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
-
-+struct at91_gpio_led {
-+ u8 index; /* index of LED */
-+ char* name; /* name of LED */
-+ u8 gpio; /* AT91_PIN_xx */
-+ u8 flags; /* 1=active-high */
-+ char* trigger; /* default trigger */
-+};
-+extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr);
-+
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/cpu.h linux-2.6-stable/include/asm-arm/arch-at91/cpu.h
---- linux-2.6.21/include/asm-arm/arch-at91/cpu.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/cpu.h Wed May 9 10:20:54 2007
-@@ -26,6 +26,8 @@
- #define ARCH_ID_AT91SAM9XE256 0x329a93a0
- #define ARCH_ID_AT91SAM9XE512 0x329aa3a0
-
-+#define ARCH_ID_AT91SAM9RL64 0x019b03a0
-+
- static inline unsigned long at91_cpu_identify(void)
- {
- return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
-@@ -68,4 +70,10 @@
- #define cpu_is_at91sam9263() (0)
- #endif
-
-+#ifdef CONFIG_ARCH_AT91SAM9RL
-+#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
-+#else
-+#define cpu_is_at91sam9rl() (0)
-+#endif
-+
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/hardware.h linux-2.6-stable/include/asm-arm/arch-at91/hardware.h
---- linux-2.6.21/include/asm-arm/arch-at91/hardware.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/hardware.h Fri May 11 14:45:12 2007
-@@ -24,6 +24,8 @@
- #include <asm/arch/at91sam9261.h>
- #elif defined(CONFIG_ARCH_AT91SAM9263)
- #include <asm/arch/at91sam9263.h>
-+#elif defined(CONFIG_ARCH_AT91SAM9RL)
-+#include <asm/arch/at91sam9rl.h>
- #else
- #error "Unsupported AT91 processor"
- #endif
-@@ -69,22 +71,5 @@
- /* Clocks */
- #define AT91_SLOW_CLOCK 32768 /* slow clock */
-
--#ifndef __ASSEMBLY__
--#include <asm/io.h>
--
--static inline unsigned int at91_sys_read(unsigned int reg_offset)
--{
-- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
--
-- return __raw_readl(addr + reg_offset);
--}
--
--static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
--{
-- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
--
-- __raw_writel(value, addr + reg_offset);
--}
--#endif
-
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/ics1523.h linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h
---- linux-2.6.21/include/asm-arm/arch-at91/ics1523.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h Tue May 8 12:13:31 2007
-@@ -0,0 +1,154 @@
-+//*----------------------------------------------------------------------------
-+//* ATMEL Microcontroller Software Support - ROUSSET -
-+//*----------------------------------------------------------------------------
-+//* The software is delivered "AS IS" without warranty or condition of any
-+//* kind, either express, implied or statutory. This includes without
-+//* limitation any warranty or condition with respect to merchantability or
-+//* fitness for any particular purpose, or against the infringements of
-+//* intellectual property rights of others.
-+//*----------------------------------------------------------------------------
-+//* File Name : ics1523.h
-+//* Object : Clock Generator Prototyping File.
-+//*
-+//* 1.0 08/28/02 ED : Creation
-+//* 1.2 13/01/03 FB : Update on lib V3
-+//*----------------------------------------------------------------------------
-+
-+#ifndef ics1523_h
-+#define ics1523_h
-+
-+/*-------------------------------------------*/
-+/* ICS1523 TWI Serial Clock Definition */
-+/*-------------------------------------------*/
-+
-+#define ICS_MIN_CLOCK 100 /* Min Frequency Access Clock KHz */
-+#define ICS_MAX_CLOCK 400 /* Max Frequency Access Clock KHz */
-+#define ICS_TRANSFER_RATE ICS_MAX_CLOCK /* Transfer speed to apply */
-+
-+#define ICS_WRITE_CLK_PNB 30 /* TWCK Clock Periods required to write */
-+#define ICS_READ_CLK_PNB 40 /* TWCK Clock Periods required to read */
-+
-+/*-------------------------------------------*/
-+/* ICS1523 Write Operation Definition */
-+/*-------------------------------------------*/
-+
-+#define ICS1523_ACCESS_OK 0 /* OK */
-+#define ICS1523_ACCESS_ERROR -1 /* NOK */
-+
-+/*-------------------------------------------*/
-+/* ICS1523 Device Addresses Definition */
-+/*-------------------------------------------*/
-+
-+#define ICS_ADDR 0x26 /* Device Address */
-+
-+/*--------------------------------------------------*/
-+/* ICS1523 Registers Internal Addresses Definition */
-+/*--------------------------------------------------*/
-+
-+#define ICS_ICR 0x0 /* Input Control Register */
-+#define ICS_LCR 0x1 /* Loop Control Register */
-+#define ICS_FD0 0x2 /* PLL FeedBack Divider LSBs */
-+#define ICS_FD1 0x3 /* PLL FeedBack Divider MSBs */
-+#define ICS_DPAO 0x4 /* Dynamic Phase Aligner Offset */
-+#define ICS_DPAC 0x5 /* Dynamic Phase Aligner Resolution */
-+#define ICS_OE 0x6 /* Output Enables Register */
-+#define ICS_OD 0x7 /* Osc Divider Register */
-+#define ICS_SWRST 0x8 /* DPA & PLL Reset Register */
-+#define ICS_VID 0x10 /* Chip Version Register */
-+#define ICS_RID 0x11 /* Chip Revision Register */
-+#define ICS_SR 0x12 /* Status Register */
-+
-+/*------------------------------------------------------*/
-+/* ICS1523 Input Control Register Bits Definition */
-+/*------------------------------------------------------*/
-+
-+#define ICS_PDEN 0x1 /* Phase Detector Enable */
-+#define ICS_PDPOL 0x2 /* Phase Detector Enable Polarity */
-+#define ICS_REFPOL 0x4 /* External Reference Polarity */
-+#define ICS_FBKPOL 0x8 /* External Feedback Polarity */
-+#define ICS_FBKSEL 0x10 /* External Feedback Select */
-+#define ICS_FUNCSEL 0x20 /* Function Out Select */
-+#define ICS_ENPLS 0x40 /* Enable PLL Lock/Ref Status Output */
-+#define ICS_ENDLS 0x80 /* Enable DPA Lock/Ref Status Output */
-+
-+/*-----------------------------------------------------*/
-+/* ICS1523 Loop Control Register Bits Definition */
-+/*-----------------------------------------------------*/
-+
-+#define ICS_PFD 0x7 /* Phase Detector Gain */
-+#define ICS_PSD 0x30 /* Post-Scaler Divider */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 PLL FeedBack Divider LSBs Definition */
-+/*----------------------------------------------------*/
-+
-+#define ICS_FBDL 0xFF /* PLL FeedBack Divider LSBs */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 PLL FeedBack Divider MSBs Definition */
-+/*----------------------------------------------------*/
-+
-+#define ICS_FBDM 0xF /* PLL FeedBack Divider MSBs */
-+
-+/*------------------------------------------------------------*/
-+/* ICS1523 Dynamic Phase Aligner Offset Bits Definition */
-+/*------------------------------------------------------------*/
-+
-+#define ICS_DPAOS 0x2F /* Dynamic Phase Aligner Offset */
-+#define ICS_FILSEL 0x80 /* Loop Filter Select */
-+
-+/*----------------------------------------------------------------*/
-+/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition */
-+/*----------------------------------------------------------------*/
-+
-+#define ICS_DPARES 0x3 /* Dynamic Phase Aligner Resolution */
-+#define ICS_MMREV 0xFC /* Metal Mask Revision Number */
-+
-+/*-------------------------------------------------------*/
-+/* ICS1523 Output Enables Register Bits Definition */
-+/*-------------------------------------------------------*/
-+
-+#define ICS_OEPCK 0x1 /* Output Enable for PECL PCLK Outputs */
-+#define ICS_OETCK 0x2 /* Output Enable for STTL CLK Output */
-+#define ICS_OEP2 0x4 /* Output Enable for PECL CLK/2 Outputs */
-+#define ICS_OET2 0x8 /* Output Enable for STTL CLK/2 Output */
-+#define ICS_OEF 0x10 /* Output Enable for STTL FUNC Output */
-+#define ICS_CLK2INV 0x20 /* CLK/2 Invert */
-+#define ICS_OSCL 0xC0 /* SSTL Clock Scaler */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 Osc Divider Register Bits Definition */
-+/*----------------------------------------------------*/
-+
-+#define ICS_OSCDIV 0x7F /* Oscillator Divider Modulus */
-+#define ICS_INSEL 0x80 /* Input Select */
-+
-+/*---------------------------------------------------*/
-+/* ICS1523 DPA & PLL Reset Register Definition */
-+/*---------------------------------------------------*/
-+
-+#define ICS_DPAR 0x0A /* DPA Reset Command */
-+#define ICS_PLLR 0x50 /* PLL Reset Command */
-+
-+/*------------------------------------------------*/
-+/* ICS1523 Chip Version Register Definition */
-+/*------------------------------------------------*/
-+
-+#define ICS_CHIPV 0xFF /* Chip Version */
-+
-+/*-------------------------------------------------*/
-+/* ICS1523 Chip Revision Register Definition */
-+/*-------------------------------------------------*/
-+
-+#define ICS_CHIPR 0xFF /* Chip Revision */
-+
-+/*------------------------------------------*/
-+/* ICS1523 Status Register Definition */
-+/*------------------------------------------*/
-+
-+#define ICS_DPALOCK 0x1 /* DPA Lock Status */
-+#define ICS_PLLLOCK 0x2 /* PLL Lock Status */
-+
-+int at91_ics1523_init(void);
-+
-+#endif /* ics1523_h */
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/io.h linux-2.6-stable/include/asm-arm/arch-at91/io.h
---- linux-2.6.21/include/asm-arm/arch-at91/io.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/io.h Fri May 11 14:45:12 2007
-@@ -29,4 +29,22 @@
- #define __mem_pci(a) (a)
-
-
-+#ifndef __ASSEMBLY__
-+
-+static inline unsigned int at91_sys_read(unsigned int reg_offset)
-+{
-+ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-+
-+ return __raw_readl(addr + reg_offset);
-+}
-+
-+static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
-+{
-+ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-+
-+ __raw_writel(value, addr + reg_offset);
-+}
-+
-+#endif
-+
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/irqs.h linux-2.6-stable/include/asm-arm/arch-at91/irqs.h
---- linux-2.6.21/include/asm-arm/arch-at91/irqs.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/irqs.h Fri May 11 14:45:12 2007
-@@ -21,6 +21,7 @@
- #ifndef __ASM_ARCH_IRQS_H
- #define __ASM_ARCH_IRQS_H
-
-+#include <asm/io.h>
- #include <asm/arch/at91_aic.h>
-
- #define NR_AIC_IRQS 32
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/spi.h linux-2.6-stable/include/asm-arm/arch-at91/spi.h
---- linux-2.6.21/include/asm-arm/arch-at91/spi.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/asm-arm/arch-at91/spi.h Tue May 8 14:31:24 2007
-@@ -0,0 +1,54 @@
-+/*
-+ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200
-+ *
-+ * (c) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#ifndef AT91_LEGACY_SPI_H
-+#define AT91_LEGACY_SPI_H
-+
-+#define SPI_MAJOR 153 /* registered device number */
-+
-+#define DEFAULT_SPI_CLK 6000000
-+
-+
-+/* Maximum number of buffers in a single SPI transfer.
-+ * DataFlash uses maximum of 2
-+ * spidev interface supports up to 8.
-+ */
-+#define MAX_SPI_TRANSFERS 8
-+#define NR_SPI_DEVICES 4 /* number of devices on SPI bus */
-+
-+/*
-+ * Describes the buffers for a SPI transfer.
-+ * A transmit & receive buffer must be specified for each transfer
-+ */
-+struct spi_transfer_list {
-+ void* tx[MAX_SPI_TRANSFERS]; /* transmit */
-+ int txlen[MAX_SPI_TRANSFERS];
-+ void* rx[MAX_SPI_TRANSFERS]; /* receive */
-+ int rxlen[MAX_SPI_TRANSFERS];
-+ int nr_transfers; /* number of transfers */
-+ int curr; /* current transfer */
-+};
-+
-+struct spi_local {
-+ unsigned int pcs; /* Peripheral Chip Select value */
-+
-+ struct spi_transfer_list *xfers; /* current transfer list */
-+ dma_addr_t tx, rx; /* DMA address for current transfer */
-+ dma_addr_t txnext, rxnext; /* DMA address for next transfer */
-+};
-+
-+
-+/* Exported functions */
-+extern void spi_access_bus(short device);
-+extern void spi_release_bus(short device);
-+extern int spi_transfer(struct spi_transfer_list* list);
-+
-+#endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/timex.h linux-2.6-stable/include/asm-arm/arch-at91/timex.h
---- linux-2.6.21/include/asm-arm/arch-at91/timex.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/timex.h Wed May 9 10:20:53 2007
-@@ -37,6 +37,11 @@
- #define AT91SAM9_MASTER_CLOCK 99959500
- #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
-
-+#elif defined(CONFIG_ARCH_AT91SAM9RL)
-+
-+#define AT91SAM9_MASTER_CLOCK 100000000
-+#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
-+
- #endif
-
- #endif
-diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/uncompress.h linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h
---- linux-2.6.21/include/asm-arm/arch-at91/uncompress.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h Fri May 11 14:45:12 2007
-@@ -21,7 +21,7 @@
- #ifndef __ASM_ARCH_UNCOMPRESS_H
- #define __ASM_ARCH_UNCOMPRESS_H
-
--#include <asm/hardware.h>
-+#include <asm/io.h>
- #include <asm/arch/at91_dbgu.h>
-
- /*
-diff -urN -x CVS linux-2.6.21/include/linux/clk.h linux-2.6-stable/include/linux/clk.h
---- linux-2.6.21/include/linux/clk.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/linux/clk.h Tue May 8 12:13:31 2007
-@@ -121,4 +121,24 @@
- */
- struct clk *clk_get_parent(struct clk *clk);
-
-+/**
-+ * clk_must_disable - report whether a clock's users must disable it
-+ * @clk: one node in the clock tree
-+ *
-+ * This routine returns true only if the upcoming system state requires
-+ * disabling the specified clock.
-+ *
-+ * It's common for platform power states to constrain certain clocks (and
-+ * their descendants) to be unavailable, while other states allow that
-+ * clock to be active. A platform's power states often include an "all on"
-+ * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and
-+ * operating states which sacrifice functionality for lower power usage.
-+ *
-+ * The constraint value is commonly tested in device driver suspend(), to
-+ * leave clocks active if they are needed for features like wakeup events.
-+ * On platforms that support reduced functionality operating states, the
-+ * constraint may also need to be tested during resume() and probe() calls.
-+ */
-+int clk_must_disable(struct clk *clk);
-+
- #endif
-diff -urN -x CVS linux-2.6.21/include/linux/i2c-id.h linux-2.6-stable/include/linux/i2c-id.h
---- linux-2.6.21/include/linux/i2c-id.h Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/include/linux/i2c-id.h Tue May 8 12:13:31 2007
-@@ -202,6 +202,7 @@
-
- /* --- PCA 9564 based algorithms */
- #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */
-+#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */
-
- /* --- ACPI Embedded controller algorithms */
- #define I2C_HW_ACPI_EC 0x1f0000
-diff -urN -x CVS linux-2.6.21/include/video/atmel_lcdc.h linux-2.6-stable/include/video/atmel_lcdc.h
---- linux-2.6.21/include/video/atmel_lcdc.h Thu Jan 1 02:00:00 1970
-+++ linux-2.6-stable/include/video/atmel_lcdc.h Thu May 10 12:34:01 2007
-@@ -0,0 +1,196 @@
-+/*
-+ * Header file for AT91/AT32 LCD Controller
-+ *
-+ * Data structure and register user interface
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+#ifndef __ATMEL_LCDC_H__
-+#define __ATMEL_LCDC_H__
-+
-+ /* LCD Controller info data structure */
-+struct atmel_lcdfb_info {
-+ spinlock_t lock;
-+ struct fb_info *info;
-+ void __iomem *mmio;
-+ unsigned long irq_base;
-+
-+ unsigned int guard_time;
-+ struct platform_device *pdev;
-+ struct clk *bus_clk;
-+ struct clk *lcdc_clk;
-+ unsigned int default_bpp;
-+ unsigned int default_lcdcon2;
-+ unsigned int default_dmacon;
-+ void (*atmel_lcdfb_power_control)(int on);
-+ struct fb_monspecs *default_monspecs;
-+ u32 pseudo_palette[16];
-+};
-+
-+#define ATMEL_LCDC_DMABADDR1 0x00
-+#define ATMEL_LCDC_DMABADDR2 0x04
-+#define ATMEL_LCDC_DMAFRMPT1 0x08
-+#define ATMEL_LCDC_DMAFRMPT2 0x0c
-+#define ATMEL_LCDC_DMAFRMADD1 0x10
-+#define ATMEL_LCDC_DMAFRMADD2 0x14
-+
-+#define ATMEL_LCDC_DMAFRMCFG 0x18
-+#define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
-+#define ATMEL_LCDC_BLENGTH_OFFSET 24
-+#define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
-+
-+#define ATMEL_LCDC_DMACON 0x1c
-+#define ATMEL_LCDC_DMAEN (0x1 << 0)
-+#define ATMEL_LCDC_DMARST (0x1 << 1)
-+#define ATMEL_LCDC_DMABUSY (0x1 << 2)
-+#define ATMEL_LCDC_DMAUPDT (0x1 << 3)
-+#define ATMEL_LCDC_DMA2DEN (0x1 << 4)
-+
-+#define ATMEL_LCDC_DMA2DCFG 0x20
-+#define ATMEL_LCDC_ADDRINC_OFFSET 0
-+#define ATMEL_LCDC_ADDRINC (0xffff)
-+#define ATMEL_LCDC_PIXELOFF_OFFSET 24
-+#define ATMEL_LCDC_PIXELOFF (0x1f << 24)
-+
-+#define ATMEL_LCDC_LCDCON1 0x0800
-+#define ATMEL_LCDC_BYPASS (1 << 0)
-+#define ATMEL_LCDC_CLKVAL_OFFSET 12
-+#define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
-+#define ATMEL_LCDC_LINCNT (0x7ff << 21)
-+
-+#define ATMEL_LCDC_LCDCON2 0x0804
-+#define ATMEL_LCDC_DISTYPE (3 << 0)
-+#define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
-+#define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
-+#define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
-+#define ATMEL_LCDC_SCANMOD (1 << 2)
-+#define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
-+#define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
-+#define ATMEL_LCDC_IFWIDTH (3 << 3)
-+#define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
-+#define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
-+#define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
-+#define ATMEL_LCDC_PIXELSIZE (7 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
-+#define ATMEL_LCDC_INVVD (1 << 8)
-+#define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
-+#define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
-+#define ATMEL_LCDC_INVFRAME (1 << 9 )
-+#define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
-+#define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
-+#define ATMEL_LCDC_INVLINE (1 << 10)
-+#define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
-+#define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
-+#define ATMEL_LCDC_INVCLK (1 << 11)
-+#define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
-+#define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
-+#define ATMEL_LCDC_INVDVAL (1 << 12)
-+#define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
-+#define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
-+#define ATMEL_LCDC_CLKMOD (1 << 15)
-+#define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
-+#define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
-+#define ATMEL_LCDC_MEMOR (1 << 31)
-+#define ATMEL_LCDC_MEMOR_BIG (0 << 31)
-+#define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
-+
-+#define ATMEL_LCDC_TIM1 0x0808
-+#define ATMEL_LCDC_VFP (0xff << 0)
-+#define ATMEL_LCDC_VBP_OFFSET 8
-+#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
-+#define ATMEL_LCDC_VPW_OFFSET 16
-+#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
-+#define ATMEL_LCDC_VHDLY_OFFSET 24
-+#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
-+
-+#define ATMEL_LCDC_TIM2 0x080c
-+#define ATMEL_LCDC_HBP (0xff << 0)
-+#define ATMEL_LCDC_HPW_OFFSET 8
-+#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
-+#define ATMEL_LCDC_HFP_OFFSET 21
-+#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
-+
-+#define ATMEL_LCDC_LCDFRMCFG 0x0810
-+#define ATMEL_LCDC_LINEVAL (0x7ff << 0)
-+#define ATMEL_LCDC_HOZVAL_OFFSET 21
-+#define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
-+
-+#define ATMEL_LCDC_FIFO 0x0814
-+#define ATMEL_LCDC_FIFOTH (0xffff)
-+
-+#define ATMEL_LCDC_MVAL 0x0818
-+
-+#define ATMEL_LCDC_DP1_2 0x081c
-+#define ATMEL_LCDC_DP4_7 0x0820
-+#define ATMEL_LCDC_DP3_5 0x0824
-+#define ATMEL_LCDC_DP2_3 0x0828
-+#define ATMEL_LCDC_DP5_7 0x082c
-+#define ATMEL_LCDC_DP3_4 0x0830
-+#define ATMEL_LCDC_DP4_5 0x0834
-+#define ATMEL_LCDC_DP6_7 0x0838
-+#define ATMEL_LCDC_DP1_2_VAL (0xff)
-+#define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
-+#define ATMEL_LCDC_DP3_5_VAL (0xfffff)
-+#define ATMEL_LCDC_DP2_3_VAL (0xfff)
-+#define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
-+#define ATMEL_LCDC_DP3_4_VAL (0xffff)
-+#define ATMEL_LCDC_DP4_5_VAL (0xfffff)
-+#define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
-+
-+#define ATMEL_LCDC_PWRCON 0x083c
-+#define ATMEL_LCDC_PWR (1 << 0)
-+#define ATMEL_LCDC_GUARDT_OFFSET 1
-+#define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
-+#define ATMEL_LCDC_BUSY (1 << 31)
-+
-+#define ATMEL_LCDC_CONTRAST_CTR 0x0840
-+#define ATMEL_LCDC_PS (3 << 0)
-+#define ATMEL_LCDC_PS_DIV1 (0 << 0)
-+#define ATMEL_LCDC_PS_DIV2 (1 << 0)
-+#define ATMEL_LCDC_PS_DIV4 (2 << 0)
-+#define ATMEL_LCDC_PS_DIV8 (3 << 0)
-+#define ATMEL_LCDC_POL (1 << 2)
-+#define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
-+#define ATMEL_LCDC_POL_POSITIVE (1 << 2)
-+#define ATMEL_LCDC_ENA (1 << 3)
-+#define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
-+#define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
-+
-+#define ATMEL_LCDC_CONTRAST_VAL 0x0844
-+#define ATMEL_LCDC_CVAL (0xff)
-+
-+#define ATMEL_LCDC_IER 0x0848
-+#define ATMEL_LCDC_IDR 0x084c
-+#define ATMEL_LCDC_IMR 0x0850
-+#define ATMEL_LCDC_ISR 0x0854
-+#define ATMEL_LCDC_ICR 0x0858
-+#define ATMEL_LCDC_LNI (1 << 0)
-+#define ATMEL_LCDC_LSTLNI (1 << 1)
-+#define ATMEL_LCDC_EOFI (1 << 2)
-+#define ATMEL_LCDC_UFLWI (1 << 4)
-+#define ATMEL_LCDC_OWRI (1 << 5)
-+#define ATMEL_LCDC_MERI (1 << 6)
-+
-+#define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
-+
-+#endif /* __ATMEL_LCDC_H__ */
-diff -urN -x CVS linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c
---- linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c Thu Apr 26 05:08:32 2007
-+++ linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c Tue May 8 12:13:58 2007
-@@ -34,8 +34,7 @@
- #include <sound/soc.h>
- #include <sound/soc-dapm.h>
-
--#include <asm/arch/hardware.h>
--#include <asm/arch/at91_pio.h>
-+#include <asm/hardware.h>
- #include <asm/arch/gpio.h>
-
- #include "../codecs/wm8731.h"
-@@ -48,13 +47,6 @@
- #define DBG(x...)
- #endif
-
--#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
--#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
--#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
--#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
--#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
--#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
--
- static struct clk *pck1_clk;
- static struct clk *pllb_clk;
-
-@@ -277,7 +269,6 @@
- static int __init eti_b1_init(void)
- {
- int ret;
-- u32 ssc_pio_lines;
- struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
-
- if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
-@@ -311,19 +302,12 @@
- goto fail_io_unmap;
- }
-
-- ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
-- | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
--
-- /* Reset all PIO registers and assign lines to peripheral A */
-- at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_ODR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_IDR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_ASR, ssc_pio_lines);
-- at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines);
-+ at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */
-+ at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */
-+ at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */
-+ at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */
-+/* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */
-+ at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */
-
- /*
- * Set PCK1 parent to PLLB and its rate to 12 Mhz.
+++ /dev/null
---- linux-2.6.21.1.orig/arch/arm/boot/compressed/head-at91rm9200.S 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/boot/compressed/head-at91rm9200.S 2007-05-28 12:52:16.000000000 +0200
-@@ -61,6 +61,12 @@
- cmp r7, r3
- beq 99f
-
-+ @ FDL Versalink : 1053
-+ mov r3, #(MACH_TYPE_VLINK & 0xff)
-+ orr r3, r3, #(MACH_TYPE_VLINK & 0xff00)
-+ cmp r7, r3
-+ beq 99f
-+
- @ Ajeco 1ARM : 1075
- mov r3, #(MACH_TYPE_ONEARM & 0xff)
- orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00)
---- linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-05-28 13:09:54.000000000 +0200
-@@ -0,0 +1,160 @@
-+/*
-+ * linux/arch/arm/mach-at91/board-vlink.c
-+ *
-+ * Copyright (C) 2005 SAN People
-+ * Copyright (C) 2006,2007 Guthrie Consulting
-+ *
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/mtd/physmap.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91rm9200_mc.h>
-+
-+#include "generic.h"
-+
-+
-+/*
-+ * Serial port configuration.
-+ * 0 .. 3 = USART0 .. USART3
-+ * 4 = DBGU
-+ */
-+static struct at91_uart_config __initdata vlink_uart_config = {
-+ .console_tty = 0, /* ttyS0 */
-+ .nr_tty = 5,
-+ .tty_map = { 4, 1, 0, 3, 2 } /* ttyS0, ..., ttyS4 */
-+};
-+
-+static void __init vlink_map_io(void)
-+{
-+ /* Initialize processor: 18.432 MHz crystal */
-+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
-+
-+ /* Setup the LEDs */
-+// at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
-+
-+ /* Setup the serial ports and console */
-+ at91_init_serial(&vlink_uart_config);
-+}
-+
-+static void __init vlink_init_irq(void)
-+{
-+ at91rm9200_init_interrupts(NULL);
-+}
-+
-+static struct at91_eth_data __initdata vlink_eth_data = {
-+ .phy_irq_pin = AT91_PIN_PC4,
-+ .is_rmii = 1,
-+};
-+
-+static struct at91_usbh_data __initdata vlink_usbh_data = {
-+ .ports = 1,
-+};
-+
-+static struct at91_udc_data __initdata vlink_udc_data = {
-+ .vbus_pin = AT91_PIN_PD4,
-+ .pullup_pin = AT91_PIN_PD5,
-+};
-+
-+static struct at91_mmc_data __initdata vlink_mmc_data = {
-+// .det_pin = AT91_PIN_PB27,
-+ .slot_b = 0,
-+ .wire4 = 1,
-+// .wp_pin = AT91_PIN_PA17,
-+};
-+
-+static struct spi_board_info vlink_spi_devices[] = {
-+ { /* DataFlash chip */
-+ .modalias = "mtd_dataflash",
-+ .chip_select = 0,
-+ .max_speed_hz = 15 * 1000 * 1000,
-+ },
-+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
-+ { /* DataFlash card */
-+ .modalias = "mtd_dataflash",
-+ .chip_select = 3,
-+ .max_speed_hz = 15 * 1000 * 1000,
-+ },
-+#endif
-+};
-+
-+static struct at91_gpio_led vlink_leds[] = {
-+ {
-+ .name = "led0",
-+ .gpio = AT91_PIN_PB1,
-+ .trigger = "heartbeat",
-+ },
-+ {
-+ .name = "led1",
-+ .gpio = AT91_PIN_PB2,
-+ .trigger = "timer",
-+ }
-+};
-+
-+static void __init vlink_board_init(void)
-+{
-+ /* Serial */
-+ at91_add_device_serial();
-+ /* Ethernet */
-+ at91_add_device_eth(&vlink_eth_data);
-+ /* USB Host */
-+ at91_add_device_usbh(&vlink_usbh_data);
-+ /* USB Device */
-+ at91_add_device_udc(&vlink_udc_data);
-+ at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
-+ /* I2C */
-+ at91_add_device_i2c();
-+ /* SPI */
-+ at91_add_device_spi(vlink_spi_devices, ARRAY_SIZE(vlink_spi_devices));
-+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
-+ /* DataFlash card */
-+// at91_set_gpio_output(AT91_PIN_PB22, 0);
-+#else
-+ /* MMC */
-+// at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
-+ at91_add_device_mmc(0, &vlink_mmc_data);
-+#endif
-+ /* LEDs */
-+ at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
-+}
-+
-+MACHINE_START(VLINK, "FDL VersaLink")
-+ /* Maintainer: Guthrie Consulting */
-+ .phys_io = AT91_BASE_SYS,
-+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+ .boot_params = AT91_SDRAM_BASE + 0x100,
-+ .timer = &at91rm9200_timer,
-+ .map_io = vlink_map_io,
-+ .init_irq = vlink_init_irq,
-+ .init_machine = vlink_board_init,
-+MACHINE_END
---- linux-2.6.21.1.orig/arch/arm/mach-at91/Kconfig 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/Kconfig 2007-05-28 13:11:45.000000000 +0200
-@@ -96,6 +96,12 @@
- help
- Select this if you are using Promwad's Chub board.
-
-+config MACH_VLINK
-+ bool "Figment Design Labs VersaLink"
-+ depends on ARCH_AT91RM9200
-+ help
-+ Select this if you are using FDL's VersaLink board
-+
- endif
-
- # ----------------------------------------------------------
---- linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/Makefile 2007-05-28 13:13:15.000000000 +0200
-@@ -29,6 +29,7 @@
- obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
- obj-$(CONFIG_MACH_KAFA) += board-kafa.o
- obj-$(CONFIG_MACH_CHUB) += board-chub.o
-+obj-$(CONFIG_MACH_VLINK) += board-vlink.o
-
- # AT91SAM9260 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
-@@ -51,6 +52,7 @@
- led-$(CONFIG_MACH_CSB637) += leds.o
- led-$(CONFIG_MACH_KB9200) += leds.o
- led-$(CONFIG_MACH_KAFA) += leds.o
-+led-$(CONFIG_MACH_VLINK) += leds.o
- obj-$(CONFIG_LEDS) += $(led-y)
-
- # VGA support
+++ /dev/null
-diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c
---- linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c 2007-05-28 13:33:41.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-05-28 14:43:28.000000000 +0200
-@@ -61,7 +61,7 @@
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
-
- /* Setup the LEDs */
--// at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
-+ at91_init_leds(AT91_PIN_PC14, AT91_PIN_PC15);
-
- /* Setup the serial ports and console */
- at91_init_serial(&vlink_uart_config);
-@@ -81,10 +81,12 @@
- .ports = 1,
- };
-
-+/*
- static struct at91_udc_data __initdata vlink_udc_data = {
- .vbus_pin = AT91_PIN_PD4,
- .pullup_pin = AT91_PIN_PD5,
- };
-+*/
-
- static struct at91_mmc_data __initdata vlink_mmc_data = {
- // .det_pin = AT91_PIN_PB27,
-@@ -108,18 +110,19 @@
- #endif
- };
-
--static struct at91_gpio_led vlink_leds[] = {
-+/*static struct at91_gpio_led vlink_leds[] = {
- {
- .name = "led0",
-- .gpio = AT91_PIN_PB1,
-+ .gpio = AT91_PIN_PC14,
- .trigger = "heartbeat",
- },
- {
- .name = "led1",
-- .gpio = AT91_PIN_PB2,
-+ .gpio = AT91_PIN_PC15,
- .trigger = "timer",
- }
- };
-+*/
-
- static void __init vlink_board_init(void)
- {
-@@ -130,8 +133,8 @@
- /* USB Host */
- at91_add_device_usbh(&vlink_usbh_data);
- /* USB Device */
-- at91_add_device_udc(&vlink_udc_data);
-- at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
-+// at91_add_device_udc(&vlink_udc_data);
-+// at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
- /* I2C */
- at91_add_device_i2c();
- /* SPI */
-@@ -145,7 +148,7 @@
- at91_add_device_mmc(0, &vlink_mmc_data);
- #endif
- /* LEDs */
-- at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
-+// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
- }
-
- MACHINE_START(VLINK, "FDL VersaLink")
-diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile linux-2.6.21.1/arch/arm/mach-at91/Makefile
---- linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile 2007-05-28 13:13:15.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/Makefile 2007-05-28 14:19:06.000000000 +0200
-@@ -52,7 +52,7 @@
- led-$(CONFIG_MACH_CSB637) += leds.o
- led-$(CONFIG_MACH_KB9200) += leds.o
- led-$(CONFIG_MACH_KAFA) += leds.o
--led-$(CONFIG_MACH_VLINK) += leds.o
-+led-$(CONFIG_MACH_VLINK) += vlink_leds.o
- obj-$(CONFIG_LEDS) += $(led-y)
-
- # VGA support
-diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/vlink_leds.c linux-2.6.21.1/arch/arm/mach-at91/vlink_leds.c
---- linux-2.6.21.1.orig/arch/arm/mach-at91/vlink_leds.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.21.1/arch/arm/mach-at91/vlink_leds.c 2007-05-28 14:41:03.000000000 +0200
-@@ -0,0 +1,105 @@
-+/*
-+ * LED driver for Atmel AT91-based boards.
-+ *
-+ * Copyright (C) SAN People (Pty) Ltd
-+ * Modified for FDL VersaLink Copyright (C) Guthrie Consulting
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+*/
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/leds.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+
-+static inline void at91_led_on(unsigned int led)
-+{
-+ at91_set_gpio_value(led, 0);
-+}
-+
-+static inline void at91_led_off(unsigned int led)
-+{
-+ at91_set_gpio_value(led, 1);
-+}
-+
-+static inline void at91_led_toggle(unsigned int led)
-+{
-+ unsigned long is_off = at91_get_gpio_value(led);
-+ if (is_off) {
-+ at91_led_on(led);
-+ at91_led_off(at91_leds_cpu);
-+ }
-+ else {
-+ at91_led_on(at91_leds_cpu);
-+ at91_led_off(led);
-+ }
-+}
-+
-+
-+/*
-+ * Handle LED events.
-+ */
-+
-+/*
-+ * VersaLink has a single bi-coloured LED which changes colour when the
-+ * polarity is reversed
-+ */
-+static void at91_leds_event(led_event_t evt)
-+{
-+ unsigned long flags;
-+
-+ local_irq_save(flags);
-+
-+ switch(evt) {
-+ case led_start: /* System startup */
-+ at91_led_toggle(at91_leds_timer);
-+ break;
-+
-+ case led_stop: /* System stop / suspend */
-+ at91_led_toggle(at91_leds_timer);
-+ break;
-+
-+#ifdef CONFIG_LEDS_TIMER
-+ case led_timer: /* Every 50 timer ticks */
-+ at91_led_toggle(at91_leds_timer);
-+ break;
-+#endif
-+
-+#ifdef CONFIG_LEDS_CPU
-+ case led_idle_start: /* Entering idle state */
-+ at91_led_toggle(at91_leds_timer);
-+ break;
-+
-+ case led_idle_end: /* Exit idle state */
-+ at91_led_toggle(at91_leds_timer);
-+ break;
-+#endif
-+
-+ default:
-+ break;
-+ }
-+
-+ local_irq_restore(flags);
-+}
-+
-+
-+static int __init leds_init(void)
-+{
-+ if (!at91_leds_timer || !at91_leds_cpu)
-+ return -ENODEV;
-+
-+ leds_event = at91_leds_event;
-+
-+ leds_event(led_start);
-+ return 0;
-+}
-+
-+__initcall(leds_init);
+++ /dev/null
---- linux-2.6.21.1.orig/arch/arm/mach-at91/gpio.c 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/gpio.c 2007-05-28 15:30:48.000000000 +0200
-@@ -27,6 +27,7 @@
-
- static struct at91_gpio_bank *gpio;
- static int gpio_banks;
-+static u32 pio_gpio_pin[4] = { 0, 0, 0, 0 };
-
-
- static inline void __iomem *pin_to_controller(unsigned pin)
-@@ -71,9 +72,13 @@
- {
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-+ int bank = (pin - PIN_BASE) / 32;
-
- if (!pio)
- return -EINVAL;
-+
-+ pio_gpio_pin[bank] |= mask;
-+
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_PER);
-@@ -130,10 +135,13 @@
- {
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-+ int bank = (pin - PIN_BASE) / 32;
-
- if (!pio)
- return -EINVAL;
-
-+ pio_gpio_pin[bank] |= mask;
-+
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ODR);
-@@ -151,10 +159,13 @@
- {
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-+ int bank = (pin - PIN_BASE) / 32;
-
- if (!pio)
- return -EINVAL;
-
-+ pio_gpio_pin[bank] |= mask;
-+
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + PIO_PUDR);
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
-@@ -262,6 +273,18 @@
- }
- EXPORT_SYMBOL(at91_get_gpio_value);
-
-+int at91_is_pin_gpio(unsigned pin)
-+{
-+ void __iomem *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+ int bank = (pin - PIN_BASE) / 32;
-+
-+ if (!pio)
-+ return -EINVAL;
-+ return (pio_gpio_pin[bank] & mask) != 0;
-+}
-+EXPORT_SYMBOL(at91_is_pin_gpio);
-+
- /*--------------------------------------------------------------------------*/
-
- #ifdef CONFIG_PM
---- linux-2.6.21.1.orig/drivers/char/Kconfig 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/drivers/char/Kconfig 2007-05-28 15:37:43.000000000 +0200
-@@ -1087,5 +1087,12 @@
- The SPI driver gives user mode access to this serial
- bus on the AT91RM9200 processor.
-
-+config AT91_VLIO
-+ tristate "Versalink LED and GPIO interface"
-+ depends on ARCH_AT91RM9200 && MACH_VLINK
-+ default n
-+ help
-+ Provides a handler GPIO's in userspace
-+
- endmenu
-
---- linux-2.6.21.1.orig/drivers/char/Makefile 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/drivers/char/Makefile 2007-05-28 15:38:11.000000000 +0200
-@@ -95,6 +95,7 @@
- obj-$(CONFIG_TELCLOCK) += tlclk.o
- obj-$(CONFIG_AT91_SPI) += at91_spi.o
- obj-$(CONFIG_AT91_SPIDEV) += at91_spidev.o
-+obj-$(CONFIG_AT91_VLIO) += vlink_giu.o
-
- obj-$(CONFIG_WATCHDOG) += watchdog/
- obj-$(CONFIG_MWAVE) += mwave/
---- linux-2.6.21.1.orig/drivers/char/vlink_giu.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.21.1/drivers/char/vlink_giu.c 2007-05-28 15:39:47.000000000 +0200
-@@ -0,0 +1,256 @@
-+/*
-+ * Driver for FDL Versalink GPIO
-+ *
-+ * Copyright (C) 2005 Guthrie Consulting
-+ * Author: Hamish Guthrie <hamish@prodigi.ch>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/fs.h>
-+#include <linux/errno.h>
-+#include <linux/init.h>
-+#include <linux/types.h>
-+#include <linux/proc_fs.h>
-+#include <linux/fcntl.h>
-+#include <linux/seq_file.h>
-+#include <linux/cdev.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/uaccess.h>
-+
-+static int major; /* default is dynamic major device number */
-+module_param(major, int, 0);
-+MODULE_PARM_DESC(major, "Major device number");
-+
-+#define VIO_NR_DEVS 96
-+
-+struct vio_dev {
-+ struct cdev cdev;
-+};
-+
-+struct vio_dev *vio_devices;
-+static struct class *vio_class;
-+
-+static ssize_t gpio_read(struct file *file, char __user *buf, size_t len,
-+ loff_t *ppos)
-+{
-+ unsigned int pin;
-+ int retval;
-+ char value = '0';
-+
-+ pin = iminor(file->f_dentry->d_inode);
-+
-+ retval = at91_get_gpio_value(PIN_BASE + pin);
-+ if (retval < 0)
-+ return -EFAULT;
-+
-+ value = retval + 0x30;
-+ if (put_user(value, buf))
-+ return -EFAULT;
-+
-+ return 1;
-+}
-+
-+static ssize_t gpio_write(struct file *file, const char __user *data,
-+ size_t len, loff_t *ppos)
-+{
-+ unsigned int pin;
-+ size_t i;
-+ char c;
-+ int retval = 0;
-+
-+ pin = iminor(file->f_dentry->d_inode);
-+
-+ for (i = 0; i < len; i++) {
-+ if (get_user(c, data + i))
-+ return -EFAULT;
-+
-+ switch (c) {
-+ case '0':
-+ case '1':
-+ retval = at91_set_gpio_value(PIN_BASE + pin, (int)c - 0x30);
-+ if (retval < 0)
-+ return -EFAULT;
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (retval < 0)
-+ break;
-+ }
-+
-+ return i;
-+}
-+
-+static int gpio_open(struct inode *inode, struct file *file)
-+{
-+ return nonseekable_open(inode, file);
-+}
-+
-+static int gpio_release(struct inode *inode, struct file *file)
-+{
-+ return 0;
-+}
-+
-+static struct file_operations vio_fops = {
-+ .owner = THIS_MODULE,
-+ .read = gpio_read,
-+ .write = gpio_write,
-+ .open = gpio_open,
-+ .release = gpio_release,
-+};
-+
-+static void vio_setup_cdev(struct vio_dev *dev, int index)
-+{
-+ int err, devno = MKDEV(major, index);
-+
-+ cdev_init(&dev->cdev, &vio_fops);
-+ dev->cdev.owner = THIS_MODULE;
-+ dev->cdev.ops = &vio_fops;
-+ err = cdev_add (&dev->cdev, devno, 1);
-+ if (err)
-+ printk(KERN_NOTICE "vio: Error %d adding vio%d", err, index);
-+}
-+
-+static int vio_remove(struct platform_device *dev)
-+{
-+ int i;
-+ dev_t devno = MKDEV(major, 0);
-+
-+ if (vio_devices) {
-+ for(i=0; i<VIO_NR_DEVS; i++) {
-+ int iodev = at91_is_pin_gpio(PIN_BASE + i);
-+ if (iodev) {
-+ cdev_del(&vio_devices[i].cdev);
-+ class_device_destroy(vio_class, MKDEV(major, i));
-+ }
-+ }
-+ kfree(vio_devices);
-+ }
-+
-+ class_destroy(vio_class);
-+ unregister_chrdev_region(devno, VIO_NR_DEVS);
-+
-+ platform_set_drvdata(dev, NULL);
-+
-+ return 0;
-+}
-+
-+static int vio_probe(struct platform_device *dev)
-+{
-+ int retval, i, j;
-+ dev_t vdev = 0;
-+
-+ if (major) {
-+ vdev = MKDEV(major, 0);
-+ retval = register_chrdev_region(vdev, VIO_NR_DEVS, "vio");
-+ } else {
-+ retval = alloc_chrdev_region(&vdev, 0, VIO_NR_DEVS, "vio");
-+ major = MAJOR(vdev);
-+ }
-+ if (retval < 0) {
-+ printk(KERN_WARNING "vio: can't get major %d\n", major);
-+ return retval;
-+ }
-+
-+ if (major == 0) {
-+ major = retval;
-+ printk(KERN_INFO "vio: major number %d\n", major);
-+ }
-+
-+ vio_class = class_create(THIS_MODULE, "vio");
-+
-+ if (IS_ERR(vio_class)) {
-+ printk(KERN_ERR "vio: Error creating vio class\n");
-+ vio_remove(dev);
-+ return PTR_ERR(vio_class);
-+ }
-+
-+ vio_devices = kmalloc(VIO_NR_DEVS * sizeof(struct vio_dev), GFP_KERNEL);
-+ if (!vio_devices) {
-+ retval = -ENOMEM;
-+ goto fail;
-+ }
-+ memset(vio_devices, 0, VIO_NR_DEVS * sizeof(struct vio_dev));
-+
-+ for (i=0; i<VIO_NR_DEVS/32; i++)
-+ for(j=0; j<32; j++) {
-+ int iodev = at91_is_pin_gpio(PIN_BASE + i*32 + j);
-+ if (iodev) {
-+ vio_setup_cdev(&vio_devices[i*32 + j], i*32 + j);
-+ class_device_create(vio_class, NULL, MKDEV(major, i*32 + j), NULL,
-+ "vio%c%d", i + 'A', j);
-+ }
-+ }
-+
-+ platform_set_drvdata(dev, vio_devices);
-+
-+ return 0;
-+
-+fail:
-+ vio_remove(dev);
-+ return retval;
-+}
-+
-+static struct platform_device *vio_platform_device;
-+
-+static struct platform_driver vio_driver = {
-+ .probe = vio_probe,
-+ .remove = vio_remove,
-+ .driver = {
-+ .name = "vio",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init vio_init(void)
-+{
-+ int retval;
-+
-+ vio_platform_device = platform_device_register_simple("vio", -1, NULL, 0);
-+ if (IS_ERR(vio_platform_device)) {
-+ printk(KERN_WARNING "vio: device registration failed\n");
-+ return PTR_ERR(vio_platform_device);
-+ }
-+
-+ retval = platform_driver_register(&vio_driver);
-+ if (retval < 0) {
-+ printk(KERN_WARNING "vio: driver registration failed\n");
-+ platform_device_unregister(vio_platform_device);
-+ }
-+
-+ return retval;
-+}
-+
-+static void __exit vio_exit(void)
-+{
-+ platform_driver_unregister(&vio_driver);
-+ platform_device_unregister(vio_platform_device);
-+}
-+
-+module_init(vio_init);
-+module_exit(vio_exit);
-+
-+MODULE_AUTHOR("Hamish Guthrie <hamish@prodigi.ch>");
-+MODULE_DESCRIPTION("FDL Versalink GPIO Driver");
-+MODULE_LICENSE("GPL");
+++ /dev/null
---- linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c 2007-05-28 15:53:31.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-05-28 15:58:46.000000000 +0200
-@@ -149,6 +149,33 @@
- #endif
- /* LEDs */
- // at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
-+
-+/* Other LED's */
-+ at91_set_gpio_output(AT91_PIN_PC7, 1); // LED FRONT AP1
-+ at91_set_gpio_output(AT91_PIN_PC8, 1); // LED FRONT BP1
-+ at91_set_gpio_output(AT91_PIN_PB14, 1); // LED BACK AP1
-+ at91_set_gpio_output(AT91_PIN_PB15, 1); // LED BACK BP1
-+ at91_set_gpio_output(AT91_PIN_PB16, 1); // LED BACK AP2
-+ at91_set_gpio_output(AT91_PIN_PB17, 1); // LED BACK BP2
-+
-+/* SIM Cards */
-+ at91_set_gpio_output(AT91_PIN_PB9, 1); // ENBSC3
-+ at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
-+ at91_set_gpio_output(AT91_PIN_PB11, 1); // ENBSC1
-+
-+/* GSM Module Control */
-+ at91_set_gpio_output(AT91_PIN_PB12, 1); // GSMONOFF
-+
-+/* Test jig presence detection */
-+ at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
-+
-+/* Power indicator */
-+ at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
-+
-+/* USB Device control */
-+ at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
-+ at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
-+
- }
-
- MACHINE_START(VLINK, "FDL VersaLink")
+++ /dev/null
---- linux-2.6.21.1.orig/drivers/mtd/devices/at91_dataflash.c 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/drivers/mtd/devices/at91_dataflash.c 2007-05-28 16:10:21.000000000 +0200
-@@ -173,7 +173,7 @@
- };
- #endif
-
--static const char *part_probes[] = { "cmdlinepart", NULL, };
-+static const char *part_probes[] = { "cmdlinepart", "at91part", NULL, };
-
- #endif
-
---- linux-2.6.21.1.orig/drivers/mtd/Kconfig 2007-05-28 12:22:09.000000000 +0200
-+++ linux-2.6.21.1/drivers/mtd/Kconfig 2007-05-28 16:09:16.000000000 +0200
-@@ -157,6 +157,12 @@
- for your particular device. It won't happen automatically. The
- 'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
-
-+config MTD_AT91_PARTS
-+ tristate "Atmel AT91 partitioning support"
-+ depends on MTD_PARTITIONS && ARCH_AT91RM9200 && AT91_SPI
-+ ---help---
-+ Atmel AT91 partitioning support
-+
- comment "User Modules And Translation Layers"
- depends on MTD
-
---- linux-2.6.21.1.orig/drivers/mtd/Makefile 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1/drivers/mtd/Makefile 2007-05-28 16:09:55.000000000 +0200
-@@ -12,6 +12,7 @@
- obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
- obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
- obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
-+obj-$(CONFIG_MTD_AT91_PARTS) += at91part.o
-
- # 'Users' - code which presents functionality to userspace.
- obj-$(CONFIG_MTD_CHAR) += mtdchar.o
+++ /dev/null
---- linux-2.6.21.1.orig/drivers/serial/atmel_serial.c 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/drivers/serial/atmel_serial.c 2007-05-28 16:39:09.000000000 +0200
-@@ -174,7 +174,35 @@
- at91_set_gpio_value(AT91_PIN_PA21, 0);
- else
- at91_set_gpio_value(AT91_PIN_PA21, 1);
-+
-+ /*
-+ * FDL VersaLink adds GPIOS to provide full modem control on
-+ * USART 0 - Drive DTR and RI pins manually
-+ */
-+ if (mctrl & TIOCM_DTR)
-+ at91_set_gpio_value(AT91_PIN_PB6, 0);
-+ else
-+ at91_set_gpio_value(AT91_PIN_PB6, 1);
-+ if (mctrl & TIOCM_RI)
-+ at91_set_gpio_value(AT91_PIN_PB7, 0);
-+ else
-+ at91_set_gpio_value(AT91_PIN_PB7, 1);
- }
-+
-+ /*
-+ * FDL VersaLink adds GPIOS to provide full modem control on
-+ * USART 3 - Drive DTR and RI pins manually
-+ */
-+ if (port->mapbase == AT91RM9200_BASE_US3) {
-+ if (mctrl & TIOCM_DTR)
-+ at91_set_gpio_value(AT91_PIN_PB29, 0);
-+ else
-+ at91_set_gpio_value(AT91_PIN_PB29, 1);
-+ if (mctrl & TIOCM_RI)
-+ at91_set_gpio_value(AT91_PIN_PB2, 0);
-+ else
-+ at91_set_gpio_value(AT91_PIN_PB2, 1);
-+ }
- }
- #endif
-
-@@ -211,8 +239,10 @@
- /*
- * The control signals are active low.
- */
-- if (!(status & ATMEL_US_DCD))
-- ret |= TIOCM_CD;
-+
-+ if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
-+ if (!(status & ATMEL_US_DCD))
-+ ret |= TIOCM_CD;
- if (!(status & ATMEL_US_CTS))
- ret |= TIOCM_CTS;
- if (!(status & ATMEL_US_DSR))
-@@ -220,6 +250,16 @@
- if (!(status & ATMEL_US_RI))
- ret |= TIOCM_RI;
-
-+ /*
-+ * Read the GPIO's for the FDL VersaLink special case
-+ */
-+ if (port->mapbase == AT91RM9200_BASE_US0)
-+ if (!(at91_get_gpio_value(AT91_PIN_PA19)))
-+ ret |= TIOCM_CD;
-+ if (port->mapbase == AT91RM9200_BASE_US3)
-+ if (!(at91_get_gpio_value(AT91_PIN_PA24)))
-+ ret |= TIOCM_CD;
-+
- return ret;
- }
-
-@@ -511,6 +551,34 @@
- }
-
- /*
-+ * USART0 DCD Interrupt handler
-+ */
-+
-+static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id)
-+{
-+ struct uart_port *port = dev_id;
-+ int status = at91_get_gpio_value(irq);
-+
-+ uart_handle_dcd_change(port, !(status));
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/*
-+ * USART3 DCD Interrupt handler
-+ */
-+
-+static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id)
-+{
-+ struct uart_port *port = dev_id;
-+ int status = at91_get_gpio_value(irq);
-+
-+ uart_handle_dcd_change(port, !(status));
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/*
- * Interrupt handler
- */
- static irqreturn_t atmel_interrupt(int irq, void *dev_id)
-@@ -587,6 +655,23 @@
- return retval;
- }
-
-+ if (port->mapbase == AT91RM9200_BASE_US0) {
-+ retval = request_irq(AT91_PIN_PA19, atmel_u0_DCD_interrupt, 0, "atmel_serial", port);
-+ if (retval) {
-+ printk("atmel_serial: atmel_startup - Can't get u0DCD irq\n");
-+ free_irq(port->irq, port);
-+ return retval;
-+ }
-+ }
-+ if (port->mapbase == AT91RM9200_BASE_US3) {
-+ retval = request_irq(AT91_PIN_PA24, atmel_u3_DCD_interrupt, 0, "atmel_serial", port);
-+ if (retval) {
-+ printk("atmel_serial: atmel_startup - Can't get u3DCD irq\n");
-+ free_irq(port->irq, port);
-+ return retval;
-+ }
-+ }
-+
- /*
- * Initialize DMA (if necessary)
- */
-@@ -603,6 +688,10 @@
- kfree(atmel_port->pdc_rx[0].buf);
- }
- free_irq(port->irq, port);
-+ if (port->mapbase == AT91RM9200_BASE_US0)
-+ free_irq(AT91_PIN_PA19, port);
-+ if (port->mapbase == AT91RM9200_BASE_US3)
-+ free_irq(AT91_PIN_PA24, port);
- return -ENOMEM;
- }
- pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
-@@ -636,6 +725,10 @@
- retval = atmel_open_hook(port);
- if (retval) {
- free_irq(port->irq, port);
-+ if (port->mapbase == AT91RM9200_BASE_US0)
-+ free_irq(AT91_PIN_PA19, port);
-+ if (port->mapbase == AT91RM9200_BASE_US3)
-+ free_irq(AT91_PIN_PA24, port);
- return retval;
- }
- }
-@@ -701,6 +794,10 @@
- * Free the interrupt
- */
- free_irq(port->irq, port);
-+ if (port->mapbase == AT91RM9200_BASE_US0)
-+ free_irq(AT91_PIN_PA19, port);
-+ if (port->mapbase == AT91RM9200_BASE_US3)
-+ free_irq(AT91_PIN_PA24, port);
-
- /*
- * If there is a specific "close" function (to unregister
+++ /dev/null
---- linux-2.6.21.1.orig/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 12:22:29.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 16:44:36.000000000 +0200
-@@ -618,7 +618,6 @@
-
-
- #if defined(CONFIG_NEW_LEDS)
--
- static struct platform_device at91_leds = {
- .name = "at91_leds",
- .id = -1,
-@@ -724,6 +723,10 @@
- * We need to drive the pin manually. Default is off (RTS is active low).
- */
- at91_set_gpio_output(AT91_PIN_PA21, 1);
-+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
-+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
-+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
-+ at91_set_deglitch(AT91_PIN_PA19, 1);
- }
-
- static struct resource uart1_resources[] = {
-@@ -835,6 +838,12 @@
- {
- at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
- at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
-+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
-+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
-+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
-+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
-+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
-+ at91_set_deglitch(AT91_PIN_PA24, 1);
- }
-
- struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
+++ /dev/null
---- linux-2.6.21.1/drivers/net/arm/at91_ether.c.old 2007-06-04 18:15:49.000000000 +0200
-+++ linux-2.6.21.1/drivers/net/arm/at91_ether.c 2007-06-04 18:10:36.000000000 +0200
-@@ -146,6 +146,7 @@
- struct at91_private *lp = netdev_priv(dev);
- unsigned int bmsr, bmcr, lpa, mac_cfg;
- unsigned int speed, duplex;
-+ unsigned long timeout = jiffies + HZ;
-
- if (!mii_link_ok(&lp->mii)) { /* no link */
- netif_carrier_off(dev);
-@@ -158,8 +159,15 @@
- read_phy(lp->phy_address, MII_BMSR, &bmsr);
- read_phy(lp->phy_address, MII_BMCR, &bmcr);
- if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */
-- if (!(bmsr & BMSR_ANEGCOMPLETE))
-- return; /* Do nothing - another interrupt generated when negotiation complete */
-+ while (!(bmsr & BMSR_ANEGCOMPLETE)) {
-+ if (time_after(jiffies, timeout)) {
-+ printk("at91_ether: Auto-negotiate timeout\n");
-+ return;
-+ }
-+ read_phy(lp->phy_address, MII_BMSR, &bmsr);
-+ read_phy(lp->phy_address, MII_BMCR, &bmcr);
-+ cpu_relax();
-+ }
-
- read_phy(lp->phy_address, MII_LPA, &lpa);
- if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100;
+++ /dev/null
---- linux-2.6.21.1.old/arch/arm/mach-at91/board-vlink.c 2007-06-04 15:45:19.000000000 +0200
-+++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-06-05 05:27:19.000000000 +0200
-@@ -175,6 +175,7 @@
- /* USB Device control */
- at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
- at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
-+ at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
-
- }
-
+++ /dev/null
---- linux-2.6.21.1.old/drivers/mmc/at91_mci.c 2007-06-05 09:08:57.000000000 +0200
-+++ linux-2.6.21.1/drivers/mmc/at91_mci.c 2007-06-05 10:59:11.000000000 +0200
-@@ -79,7 +79,8 @@
-
- #define DRIVER_NAME "at91_mci"
-
--#undef SUPPORT_4WIRE
-+//#undef SUPPORT_4WIRE
-+#define SUPPORT_4WIRE
-
- #define FL_SENT_COMMAND (1 << 0)
- #define FL_SENT_STOP (1 << 1)
-@@ -132,7 +133,7 @@
- /*
- * Copy from sg to a dma block - used for transfers
- */
--static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
-+static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
- {
- unsigned int len, i, size;
- unsigned *dmabuf = host->buffer;
-@@ -181,7 +182,7 @@
- /*
- * Prepare a dma read
- */
--static void at91mci_pre_dma_read(struct at91mci_host *host)
-+static void at91_mci_pre_dma_read(struct at91mci_host *host)
- {
- int i;
- struct scatterlist *sg;
-@@ -249,23 +250,24 @@
- /*
- * Handle after a dma read
- */
--static void at91mci_post_dma_read(struct at91mci_host *host)
-+static int at91_mci_post_dma_read(struct at91mci_host *host)
- {
- struct mmc_command *cmd;
- struct mmc_data *data;
-+ int completed = 0;
-
- pr_debug("post dma read\n");
-
- cmd = host->cmd;
- if (!cmd) {
- pr_debug("no command\n");
-- return;
-+ return 1;
- }
-
- data = cmd->data;
- if (!data) {
- pr_debug("no data\n");
-- return;
-+ return 1;
- }
-
- while (host->in_use_index < host->transfer_index) {
-@@ -300,39 +302,14 @@
-
- /* Is there another transfer to trigger? */
- if (host->transfer_index < data->sg_len)
-- at91mci_pre_dma_read(host);
-+ at91_mci_pre_dma_read(host);
- else {
-+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
-- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
- }
-
- pr_debug("post dma read done\n");
--}
--
--/*
-- * Handle transmitted data
-- */
--static void at91_mci_handle_transmitted(struct at91mci_host *host)
--{
-- struct mmc_command *cmd;
-- struct mmc_data *data;
--
-- pr_debug("Handling the transmit\n");
--
-- /* Disable the transfer */
-- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
--
-- /* Now wait for cmd ready */
-- at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
-- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
--
-- cmd = host->cmd;
-- if (!cmd) return;
--
-- data = cmd->data;
-- if (!data) return;
--
-- data->bytes_xfered = host->total_length;
-+ return completed;
- }
-
- /*
-@@ -340,10 +317,17 @@
- */
- static void at91_mci_enable(struct at91mci_host *host)
- {
-+ unsigned int mr;
-+
- at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
- at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
- at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
-- at91_mci_write(host, AT91_MCI_MR, AT91_MCI_PDCMODE | 0x34a);
-+ mr = AT91_MCI_PDCMODE | 0x34a;
-+
-+ if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
-+ mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
-+
-+ at91_mci_write(host, AT91_MCI_MR, mr);
-
- /* use Slot A or B (only one at same time) */
- at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
-@@ -359,9 +343,8 @@
-
- /*
- * Send a command
-- * return the interrupts to enable
- */
--static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
-+static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
- {
- unsigned int cmdr, mr;
- unsigned int block_length;
-@@ -372,8 +355,7 @@
-
- host->cmd = cmd;
-
-- /* Not sure if this is needed */
--#if 0
-+ /* Needed for leaving busy state before CMD1 */
- if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
- pr_debug("Clearing timeout\n");
- at91_mci_write(host, AT91_MCI_ARGR, 0);
-@@ -383,7 +365,7 @@
- pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
- }
- }
--#endif
-+
- cmdr = cmd->opcode;
-
- if (mmc_resp_type(cmd) == MMC_RSP_NONE)
-@@ -440,50 +422,48 @@
- at91_mci_write(host, ATMEL_PDC_TCR, 0);
- at91_mci_write(host, ATMEL_PDC_TNPR, 0);
- at91_mci_write(host, ATMEL_PDC_TNCR, 0);
-+ ier = AT91_MCI_CMDRDY;
-+ } else {
-+ /* zero block length in PDC mode */
-+ mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
-+ at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
-+
-+ /*
-+ * Disable the PDC controller
-+ */
-+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-
-- at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
-- at91_mci_write(host, AT91_MCI_CMDR, cmdr);
-- return AT91_MCI_CMDRDY;
-- }
--
-- mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
-- at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
--
-- /*
-- * Disable the PDC controller
-- */
-- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
--
-- if (cmdr & AT91_MCI_TRCMD_START) {
-- data->bytes_xfered = 0;
-- host->transfer_index = 0;
-- host->in_use_index = 0;
-- if (cmdr & AT91_MCI_TRDIR) {
-- /*
-- * Handle a read
-- */
-- host->buffer = NULL;
-- host->total_length = 0;
-+ if (cmdr & AT91_MCI_TRCMD_START) {
-+ data->bytes_xfered = 0;
-+ host->transfer_index = 0;
-+ host->in_use_index = 0;
-+ if (cmdr & AT91_MCI_TRDIR) {
-+ /*
-+ * Handle a read
-+ */
-+ host->buffer = NULL;
-+ host->total_length = 0;
-
-- at91mci_pre_dma_read(host);
-- ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
-- }
-- else {
-- /*
-- * Handle a write
-- */
-- host->total_length = block_length * blocks;
-- host->buffer = dma_alloc_coherent(NULL,
-- host->total_length,
-- &host->physical_address, GFP_KERNEL);
--
-- at91mci_sg_to_dma(host, data);
--
-- pr_debug("Transmitting %d bytes\n", host->total_length);
--
-- at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
-- at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
-- ier = AT91_MCI_TXBUFE;
-+ at91_mci_pre_dma_read(host);
-+ ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
-+ }
-+ else {
-+ /*
-+ * Handle a write
-+ */
-+ host->total_length = block_length * blocks;
-+ host->buffer = dma_alloc_coherent(NULL,
-+ host->total_length,
-+ &host->physical_address, GFP_KERNEL);
-+
-+ at91_mci_sg_to_dma(host, data);
-+
-+ pr_debug("Transmitting %d bytes\n", host->total_length);
-+
-+ at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
-+ at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
-+ ier = AT91_MCI_CMDRDY;
-+ }
- }
- }
-
-@@ -498,39 +478,24 @@
- if (cmdr & AT91_MCI_TRCMD_START) {
- if (cmdr & AT91_MCI_TRDIR)
- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
-- else
-- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
- }
-- return ier;
--}
-
--/*
-- * Wait for a command to complete
-- */
--static void at91mci_process_command(struct at91mci_host *host, struct mmc_command *cmd)
--{
-- unsigned int ier;
--
-- ier = at91_mci_send_command(host, cmd);
--
-- pr_debug("setting ier to %08X\n", ier);
--
-- /* Stop on errors or the required value */
-+ /* Enable selected interrupts */
- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
- }
-
- /*
- * Process the next step in the request
- */
--static void at91mci_process_next(struct at91mci_host *host)
-+static void at91_mci_process_next(struct at91mci_host *host)
- {
- if (!(host->flags & FL_SENT_COMMAND)) {
- host->flags |= FL_SENT_COMMAND;
-- at91mci_process_command(host, host->request->cmd);
-+ at91_mci_send_command(host, host->request->cmd);
- }
- else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
- host->flags |= FL_SENT_STOP;
-- at91mci_process_command(host, host->request->stop);
-+ at91_mci_send_command(host, host->request->stop);
- }
- else
- mmc_request_done(host->mmc, host->request);
-@@ -539,7 +504,7 @@
- /*
- * Handle a command that has been completed
- */
--static void at91mci_completed_command(struct at91mci_host *host)
-+static void at91_mci_completed_command(struct at91mci_host *host)
- {
- struct mmc_command *cmd = host->cmd;
- unsigned int status;
-@@ -583,7 +548,7 @@
- else
- cmd->error = MMC_ERR_NONE;
-
-- at91mci_process_next(host);
-+ at91_mci_process_next(host);
- }
-
- /*
-@@ -595,7 +560,60 @@
- host->request = mrq;
- host->flags = 0;
-
-- at91mci_process_next(host);
-+ at91_mci_process_next(host);
-+}
-+
-+/*
-+ * Handle transmitted data
-+ */
-+static void at91_mci_handle_transmitted(struct at91mci_host *host)
-+{
-+ struct mmc_command *cmd;
-+ struct mmc_data *data;
-+
-+ pr_debug("Handling the transmit\n");
-+
-+ /* Disable the transfer */
-+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+
-+ /* Now wait for cmd ready */
-+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
-+
-+ cmd = host->cmd;
-+ if (!cmd) return;
-+
-+ data = cmd->data;
-+ if (!data) return;
-+
-+ if (cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) {
-+ pr_debug("multiple write : wait for BLKE...\n");
-+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
-+ } else
-+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
-+
-+ data->bytes_xfered = host->total_length;
-+}
-+
-+
-+/*Handle after command sent ready*/
-+static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
-+{
-+ if (!host->cmd)
-+ return 1;
-+ else if (!host->cmd->data) {
-+ if (host->flags & FL_SENT_STOP) {
-+ /*After multi block write, we mus wait for NOTBUSY*/
-+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
-+ } else return 1;
-+ } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
-+ /*After sending multi-block-write command, start DMA transfer*/
-+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
-+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
-+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
-+ }
-+
-+ /* command not completed, have to wait */
-+ return 0;
- }
-
- /*
-@@ -698,29 +716,33 @@
- at91_mci_handle_transmitted(host);
- }
-
-+ if (int_status & AT91_MCI_ENDRX) {
-+ pr_debug("ENDRX\n");
-+ at91_mci_post_dma_read(host);
-+ }
-+
- if (int_status & AT91_MCI_RXBUFF) {
- pr_debug("RX buffer full\n");
-- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
-+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
-+ completed = 1;
- }
-
- if (int_status & AT91_MCI_ENDTX)
- pr_debug("Transmit has ended\n");
-
-- if (int_status & AT91_MCI_ENDRX) {
-- pr_debug("Receive has ended\n");
-- at91mci_post_dma_read(host);
-- }
--
- if (int_status & AT91_MCI_NOTBUSY) {
- pr_debug("Card is ready\n");
-- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
-+ completed = 1;
- }
-
- if (int_status & AT91_MCI_DTIP)
- pr_debug("Data transfer in progress\n");
-
-- if (int_status & AT91_MCI_BLKE)
-+ if (int_status & AT91_MCI_BLKE) {
- pr_debug("Block transfer has ended\n");
-+ completed = 1;
-+ }
-
- if (int_status & AT91_MCI_TXRDY)
- pr_debug("Ready to transmit\n");
-@@ -730,14 +752,14 @@
-
- if (int_status & AT91_MCI_CMDRDY) {
- pr_debug("Command ready\n");
-- completed = 1;
-+ completed = at91_mci_handle_cmdrdy(host);
- }
- }
-
- if (completed) {
- pr_debug("Completed command\n");
- at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
-- at91mci_completed_command(host);
-+ at91_mci_completed_command(host);
- } else
- at91_mci_write(host, AT91_MCI_IDR, int_status);
-
+++ /dev/null
---- linux-2.6.21.1.old/drivers/mmc/at91_mci.c 2007-06-05 11:08:39.000000000 +0200
-+++ linux-2.6.21.1/drivers/mmc/at91_mci.c 2007-06-05 11:28:40.000000000 +0200
-@@ -79,8 +79,7 @@
-
- #define DRIVER_NAME "at91_mci"
-
--//#undef SUPPORT_4WIRE
--#define SUPPORT_4WIRE
-+#undef SUPPORT_4WIRE
-
- #define FL_SENT_COMMAND (1 << 0)
- #define FL_SENT_STOP (1 << 1)
+++ /dev/null
---- linux-2.6.21.5.old/drivers/mtd/devices/at91_dataflash.c 2007-06-13 13:31:24.000000000 +0200
-+++ linux-2.6.21.5/drivers/mtd/devices/at91_dataflash.c 2007-06-19 12:49:48.000000000 +0200
-@@ -161,12 +161,12 @@
- .mask_flags = MTD_WRITEABLE, /* read-only */
- },
- {
-- .name = "kernel",
-+ .name = "knlroot",
- .offset = MTDPART_OFS_NXTBLK,
-- .size = 5 * 32 * 8 * 1056, /* 5 sectors */
-+ .size = 0x320400, /* 5 sectors */
- },
- {
-- .name = "filesystem",
-+ .name = "jffs2",
- .offset = MTDPART_OFS_NXTBLK,
- .size = MTDPART_SIZ_FULL, /* rest = 26 sectors */
- }
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=avr32
-BOARD:=avr32
-BOARDNAME:=Atmel AVR32
-FEATURES:=squashfs
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build firmware images for ATNGW100 board
-endef
-
-KERNEL:=2.6
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-#include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-CONFIG_AP7000_16_BIT_SMC=y
-# CONFIG_AP7000_32_BIT_SMC is not set
-# CONFIG_AP7000_8_BIT_SMC is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-# CONFIG_ATM_DRIVERS is not set
-CONFIG_AVR32=y
-CONFIG_BOARD_ATNGW100=y
-# CONFIG_BOARD_ATSTK1000 is not set
-# CONFIG_BT is not set
-CONFIG_CPU_AT32AP7000=y
-CONFIG_DW_DMAC=y
-CONFIG_ENTRY_ADDRESS=0x90000000
-# CONFIG_GEN_RTC is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ=250
-CONFIG_HZ_250=y
-# CONFIG_HW_RANDOM is not set
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_MACB=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_BLKDEVS=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_DATAFLASH=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-# CONFIG_MTD_M25P80 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_START=0x80000000
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_MTD_SPLIT_ROOTFS=y
-CONFIG_MTD=y
-# CONFIG_OWNERSHIP_TRACE is not set
-CONFIG_PHYS_OFFSET=0x10000000
-CONFIG_PLATFORM_AT32AP=y
-# CONFIG_RTC is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_SERIAL_ATMEL_TTYAT is not set
-CONFIG_SERIAL_ATMEL=y
-# CONFIG_SPI_AT25 is not set
-CONFIG_SPI_ATMEL=y
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_SPI_DEBUG is not set
-CONFIG_SPI_MASTER=y
-# CONFIG_SPI_SPIDEV is not set
-CONFIG_SPI=y
-CONFIG_SUBARCH_AVR32B=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_WATCHDOG is not set
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Image/Prepare
- cp $(LINUX_DIR)/arch/avr32/boot/images/uImage $(KDIR)/uImage
-endef
-
-define Image/BuildKernel
- cp $(KDIR)/uImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-uImage
-endef
-
-define Image/Build
- $(call Image/Build/$(1),$(1))
-endef
-
-define Image/Build/squashfs
- $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
- ( \
- dd if=$(KDIR)/uImage bs=1024k conv=sync; \
- dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
- ) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img
-endef
-
-define Image/Build/jffs2-64k
- ( \
- dd if=$(KDIR)/uImage bs=1024k conv=sync; \
- dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
- ) > $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c avr32-git/arch/avr32/boards/atngw100/flash.c
---- linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/boards/atngw100/flash.c 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,95 @@
-+/*
-+ * ATNGW100 board-specific flash initialization
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/physmap.h>
-+
-+#include <asm/arch/smc.h>
-+
-+static struct smc_config flash_config __initdata = {
-+ .ncs_read_setup = 0,
-+ .nrd_setup = 40,
-+ .ncs_write_setup = 0,
-+ .nwe_setup = 10,
-+
-+ .ncs_read_pulse = 80,
-+ .nrd_pulse = 40,
-+ .ncs_write_pulse = 65,
-+ .nwe_pulse = 55,
-+
-+ .read_cycle = 120,
-+ .write_cycle = 120,
-+
-+ .bus_width = 2,
-+ .nrd_controlled = 1,
-+ .nwe_controlled = 1,
-+ .byte_write = 1,
-+};
-+
-+static struct mtd_partition flash_parts[] = {
-+ {
-+ .name = "u-boot",
-+ .offset = 0x00000000,
-+ .size = 0x00020000, /* 128 KiB */
-+ .mask_flags = MTD_WRITEABLE,
-+ },
-+ {
-+ .name = "root",
-+ .offset = 0x00020000,
-+ .size = 0x007d0000,
-+ },
-+ {
-+ .name = "env",
-+ .offset = 0x007f0000,
-+ .size = 0x00010000,
-+ .mask_flags = MTD_WRITEABLE,
-+ },
-+};
-+
-+static struct physmap_flash_data flash_data = {
-+ .width = 2,
-+ .nr_parts = ARRAY_SIZE(flash_parts),
-+ .parts = flash_parts,
-+};
-+
-+static struct resource flash_resource = {
-+ .start = 0x00000000,
-+ .end = 0x007fffff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device flash_device = {
-+ .name = "physmap-flash",
-+ .id = 0,
-+ .resource = &flash_resource,
-+ .num_resources = 1,
-+ .dev = {
-+ .platform_data = &flash_data,
-+ },
-+};
-+
-+/* This needs to be called after the SMC has been initialized */
-+static int __init atngw100_flash_init(void)
-+{
-+ int ret;
-+
-+ ret = smc_set_configuration(0, &flash_config);
-+ if (ret < 0) {
-+ printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
-+ return ret;
-+ }
-+
-+ platform_device_register(&flash_device);
-+
-+ return 0;
-+}
-+device_initcall(atngw100_flash_init);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/Makefile avr32-git/arch/avr32/boards/atngw100/Makefile
---- linux-2.6.21.3/arch/avr32/boards/atngw100/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/boards/atngw100/Makefile 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1 @@
-+obj-y += setup.o flash.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/setup.c avr32-git/arch/avr32/boards/atngw100/setup.c
---- linux-2.6.21.3/arch/avr32/boards/atngw100/setup.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/boards/atngw100/setup.c 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,131 @@
-+/*
-+ * Board-specific setup code for the ATNGW100 Network Gateway
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/clk.h>
-+#include <linux/etherdevice.h>
-+#include <linux/init.h>
-+#include <linux/linkage.h>
-+#include <linux/platform_device.h>
-+#include <linux/types.h>
-+#include <linux/spi/spi.h>
-+
-+#include <asm/io.h>
-+#include <asm/setup.h>
-+
-+#include <asm/arch/at32ap7000.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/init.h>
-+
-+/* Initialized by bootloader-specific startup code. */
-+struct tag *bootloader_tags __initdata;
-+
-+struct eth_addr {
-+ u8 addr[6];
-+};
-+static struct eth_addr __initdata hw_addr[2];
-+static struct eth_platform_data __initdata eth_data[2];
-+
-+static struct spi_board_info spi0_board_info[] __initdata = {
-+ {
-+ .modalias = "mtd_dataflash",
-+ .max_speed_hz = 10000000,
-+ .chip_select = 0,
-+ },
-+};
-+
-+static struct mci_platform_data __initdata mci0_data = {
-+ .detect_pin = GPIO_PIN_PC(25),
-+ .wp_pin = GPIO_PIN_PE(0),
-+};
-+
-+/*
-+ * The next two functions should go away as the boot loader is
-+ * supposed to initialize the macb address registers with a valid
-+ * ethernet address. But we need to keep it around for a while until
-+ * we can be reasonably sure the boot loader does this.
-+ *
-+ * The phy_id is ignored as the driver will probe for it.
-+ */
-+static int __init parse_tag_ethernet(struct tag *tag)
-+{
-+ int i;
-+
-+ i = tag->u.ethernet.mac_index;
-+ if (i < ARRAY_SIZE(hw_addr))
-+ memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
-+ sizeof(hw_addr[i].addr));
-+
-+ return 0;
-+}
-+__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
-+
-+static void __init set_hw_addr(struct platform_device *pdev)
-+{
-+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ const u8 *addr;
-+ void __iomem *regs;
-+ struct clk *pclk;
-+
-+ if (!res)
-+ return;
-+ if (pdev->id >= ARRAY_SIZE(hw_addr))
-+ return;
-+
-+ addr = hw_addr[pdev->id].addr;
-+ if (!is_valid_ether_addr(addr))
-+ return;
-+
-+ /*
-+ * Since this is board-specific code, we'll cheat and use the
-+ * physical address directly as we happen to know that it's
-+ * the same as the virtual address.
-+ */
-+ regs = (void __iomem __force *)res->start;
-+ pclk = clk_get(&pdev->dev, "pclk");
-+ if (!pclk)
-+ return;
-+
-+ clk_enable(pclk);
-+ __raw_writel((addr[3] << 24) | (addr[2] << 16)
-+ | (addr[1] << 8) | addr[0], regs + 0x98);
-+ __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
-+ clk_disable(pclk);
-+ clk_put(pclk);
-+}
-+
-+struct platform_device *at32_usart_map[1];
-+unsigned int at32_nr_usarts = 1;
-+
-+void __init setup_board(void)
-+{
-+ at32_map_usart(1, 0); /* USART 1: /dev/ttyS0, DB9 */
-+ at32_setup_serial_console(0);
-+}
-+
-+static int __init atngw100_init(void)
-+{
-+ /*
-+ * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
-+ * reserve any pins for it.
-+ */
-+
-+ at32_add_system_devices();
-+
-+ at32_add_device_usart(0);
-+
-+ set_hw_addr(at32_add_device_eth(0, ð_data[0]));
-+ set_hw_addr(at32_add_device_eth(1, ð_data[1]));
-+
-+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+ at32_add_device_mci(0, &mci0_data);
-+ at32_add_device_usba(0);
-+
-+ return 0;
-+}
-+postcore_initcall(atngw100_init);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1000.h avr32-git/arch/avr32/boards/atstk1000/atstk1000.h
---- linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1000.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/boards/atstk1000/atstk1000.h 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,15 @@
-+/*
-+ * ATSTK1000 setup code: Daughterboard interface
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
-+#define __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
-+
-+extern struct atmel_lcdfb_info atstk1000_lcdc_data;
-+
-+#endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1002.c avr32-git/arch/avr32/boards/atstk1000/atstk1002.c
---- linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1002.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/boards/atstk1000/atstk1002.c 2007-06-06 11:33:46.000000000 +0200
-@@ -16,6 +16,8 @@
- #include <linux/types.h>
- #include <linux/spi/spi.h>
-
-+#include <video/atmel_lcdc.h>
-+
- #include <asm/io.h>
- #include <asm/setup.h>
- #include <asm/arch/at32ap7000.h>
-@@ -23,6 +25,7 @@
- #include <asm/arch/init.h>
- #include <asm/arch/portmux.h>
-
-+#include "atstk1000.h"
-
- #define SW2_DEFAULT /* MMCI and UART_A available */
-
-@@ -31,9 +34,7 @@
- };
-
- static struct eth_addr __initdata hw_addr[2];
--
- static struct eth_platform_data __initdata eth_data[2];
--extern struct lcdc_platform_data atstk1000_fb0_data;
-
- static struct spi_board_info spi0_board_info[] __initdata = {
- {
-@@ -41,9 +42,15 @@
- .modalias = "ltv350qv",
- .max_speed_hz = 16000000,
- .chip_select = 1,
-+ .mode = SPI_MODE_3,
- },
- };
-
-+static struct mci_platform_data __initdata mci0_data = {
-+ .detect_pin = GPIO_PIN_NONE,
-+ .wp_pin = GPIO_PIN_NONE,
-+};
-+
- /*
- * The next two functions should go away as the boot loader is
- * supposed to initialize the macb address registers with a valid
-@@ -148,7 +155,12 @@
- set_hw_addr(at32_add_device_eth(0, ð_data[0]));
-
- at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-- at32_add_device_lcdc(0, &atstk1000_fb0_data);
-+ at32_add_device_twi(0);
-+ at32_add_device_mci(0, &mci0_data);
-+ at32_add_device_lcdc(0, &atstk1000_lcdc_data,
-+ fbmem_start, fbmem_size);
-+ at32_add_device_usba(0);
-+ at32_add_device_abdac(0);
-
- return 0;
- }
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/setup.c avr32-git/arch/avr32/boards/atstk1000/setup.c
---- linux-2.6.21.3/arch/avr32/boards/atstk1000/setup.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/boards/atstk1000/setup.c 2007-06-06 11:33:46.000000000 +0200
-@@ -8,43 +8,56 @@
- * published by the Free Software Foundation.
- */
- #include <linux/bootmem.h>
-+#include <linux/fb.h>
- #include <linux/init.h>
- #include <linux/types.h>
- #include <linux/linkage.h>
-
--#include <asm/setup.h>
-+#include <video/atmel_lcdc.h>
-
-+#include <asm/setup.h>
- #include <asm/arch/board.h>
-
-+#include "atstk1000.h"
-+
- /* Initialized by bootloader-specific startup code. */
- struct tag *bootloader_tags __initdata;
-
--struct lcdc_platform_data __initdata atstk1000_fb0_data;
--
--void __init board_setup_fbmem(unsigned long fbmem_start,
-- unsigned long fbmem_size)
--{
-- if (!fbmem_size)
-- return;
--
-- if (!fbmem_start) {
-- void *fbmem;
--
-- fbmem = alloc_bootmem_low_pages(fbmem_size);
-- fbmem_start = __pa(fbmem);
-- } else {
-- pg_data_t *pgdat;
--
-- for_each_online_pgdat(pgdat) {
-- if (fbmem_start >= pgdat->bdata->node_boot_start
-- && fbmem_start <= pgdat->bdata->node_low_pfn)
-- reserve_bootmem_node(pgdat, fbmem_start,
-- fbmem_size);
-- }
-- }
--
-- printk("%luKiB framebuffer memory at address 0x%08lx\n",
-- fbmem_size >> 10, fbmem_start);
-- atstk1000_fb0_data.fbmem_start = fbmem_start;
-- atstk1000_fb0_data.fbmem_size = fbmem_size;
--}
-+static struct fb_videomode __initdata ltv350qv_modes[] = {
-+ {
-+ .name = "320x240 @ 75",
-+ .refresh = 75,
-+ .xres = 320, .yres = 240,
-+ .pixclock = KHZ2PICOS(6891),
-+
-+ .left_margin = 17, .right_margin = 33,
-+ .upper_margin = 10, .lower_margin = 10,
-+ .hsync_len = 16, .vsync_len = 1,
-+
-+ .sync = 0,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+ },
-+};
-+
-+static struct fb_monspecs __initdata atstk1000_default_monspecs = {
-+ .manufacturer = "SNG",
-+ .monitor = "LTV350QV",
-+ .modedb = ltv350qv_modes,
-+ .modedb_len = ARRAY_SIZE(ltv350qv_modes),
-+ .hfmin = 14820,
-+ .hfmax = 22230,
-+ .vfmin = 60,
-+ .vfmax = 90,
-+ .dclkmax = 30000000,
-+};
-+
-+struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
-+ .default_bpp = 24,
-+ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
-+ .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
-+ | ATMEL_LCDC_INVCLK
-+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
-+ | ATMEL_LCDC_MEMOR_BIG),
-+ .default_monspecs = &atstk1000_default_monspecs,
-+ .guard_time = 2,
-+};
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/dw-dmac.c avr32-git/arch/avr32/drivers/dw-dmac.c
---- linux-2.6.21.3/arch/avr32/drivers/dw-dmac.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/drivers/dw-dmac.c 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,761 @@
-+/*
-+ * Driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/dma-controller.h>
-+#include <asm/io.h>
-+
-+#include "dw-dmac.h"
-+
-+#define DMAC_NR_CHANNELS 3
-+#define DMAC_MAX_BLOCKSIZE 4095
-+
-+enum {
-+ CH_STATE_FREE = 0,
-+ CH_STATE_ALLOCATED,
-+ CH_STATE_BUSY,
-+};
-+
-+struct dw_dma_lli {
-+ dma_addr_t sar;
-+ dma_addr_t dar;
-+ dma_addr_t llp;
-+ u32 ctllo;
-+ u32 ctlhi;
-+ u32 sstat;
-+ u32 dstat;
-+};
-+
-+struct dw_dma_block {
-+ struct dw_dma_lli *lli_vaddr;
-+ dma_addr_t lli_dma_addr;
-+};
-+
-+struct dw_dma_channel {
-+ unsigned int state;
-+ int is_cyclic;
-+ struct dma_request_sg *req_sg;
-+ struct dma_request_cyclic *req_cyclic;
-+ unsigned int nr_blocks;
-+ int direction;
-+ struct dw_dma_block *block;
-+};
-+
-+struct dw_dma_controller {
-+ spinlock_t lock;
-+ void * __iomem regs;
-+ struct dma_pool *lli_pool;
-+ struct clk *hclk;
-+ struct dma_controller dma;
-+ struct dw_dma_channel channel[DMAC_NR_CHANNELS];
-+};
-+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
-+
-+#define dmac_writel_hi(dmac, reg, value) \
-+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
-+#define dmac_readl_hi(dmac, reg) \
-+ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
-+#define dmac_writel_lo(dmac, reg, value) \
-+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
-+#define dmac_readl_lo(dmac, reg) \
-+ __raw_readl((dmac)->regs + DW_DMAC_##reg)
-+#define dmac_chan_writel_hi(dmac, chan, reg, value) \
-+ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
-+ + DW_DMAC_CHAN_##reg + 4))
-+#define dmac_chan_readl_hi(dmac, chan, reg) \
-+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
-+#define dmac_chan_writel_lo(dmac, chan, reg, value) \
-+ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
-+#define dmac_chan_readl_lo(dmac, chan, reg) \
-+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
-+#define set_channel_bit(dmac, reg, chan) \
-+ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
-+#define clear_channel_bit(dmac, reg, chan) \
-+ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
-+
-+static int dmac_alloc_channel(struct dma_controller *_dmac)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+ struct dw_dma_channel *chan;
-+ unsigned long flags;
-+ int i;
-+
-+ spin_lock_irqsave(&dmac->lock, flags);
-+ for (i = 0; i < DMAC_NR_CHANNELS; i++)
-+ if (dmac->channel[i].state == CH_STATE_FREE)
-+ break;
-+
-+ if (i < DMAC_NR_CHANNELS) {
-+ chan = &dmac->channel[i];
-+ chan->state = CH_STATE_ALLOCATED;
-+ } else {
-+ i = -EBUSY;
-+ }
-+
-+ spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+ return i;
-+}
-+
-+static void dmac_release_channel(struct dma_controller *_dmac, int channel)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+
-+ BUG_ON(channel >= DMAC_NR_CHANNELS
-+ || dmac->channel[channel].state != CH_STATE_ALLOCATED);
-+
-+ dmac->channel[channel].state = CH_STATE_FREE;
-+}
-+
-+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
-+ unsigned int nr_blocks)
-+{
-+ struct dw_dma_block *block;
-+ void *p;
-+ unsigned int i;
-+
-+ block = kmalloc(nr_blocks * sizeof(*block),
-+ GFP_KERNEL);
-+ if (unlikely(!block))
-+ return NULL;
-+
-+ for (i = 0; i < nr_blocks; i++) {
-+ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
-+ &block[i].lli_dma_addr);
-+ block[i].lli_vaddr = p;
-+ if (unlikely(!p))
-+ goto fail;
-+ }
-+
-+ return block;
-+
-+fail:
-+ for (i = 0; i < nr_blocks; i++) {
-+ if (!block[i].lli_vaddr)
-+ break;
-+ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
-+ block[i].lli_dma_addr);
-+ }
-+ kfree(block);
-+ return NULL;
-+}
-+
-+static void cleanup_channel(struct dw_dma_controller *dmac,
-+ struct dw_dma_channel *chan)
-+{
-+ unsigned int i;
-+
-+ if (chan->nr_blocks > 1) {
-+ for (i = 0; i < chan->nr_blocks; i++)
-+ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
-+ chan->block[i].lli_dma_addr);
-+ kfree(chan->block);
-+ }
-+
-+ chan->state = CH_STATE_ALLOCATED;
-+}
-+
-+static int dmac_prepare_request_sg(struct dma_controller *_dmac,
-+ struct dma_request_sg *req)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+ struct dw_dma_channel *chan;
-+ unsigned long ctlhi, ctllo, cfghi, cfglo;
-+ unsigned long block_size;
-+ unsigned int nr_blocks;
-+ int ret, i, direction;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&dmac->lock, flags);
-+
-+ ret = -EINVAL;
-+ if (req->req.channel >= DMAC_NR_CHANNELS
-+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
-+ || req->block_size > DMAC_MAX_BLOCKSIZE) {
-+ spin_unlock_irqrestore(&dmac->lock, flags);
-+ return -EINVAL;
-+ }
-+
-+ chan = &dmac->channel[req->req.channel];
-+ chan->state = CH_STATE_BUSY;
-+ chan->req_sg = req;
-+ chan->is_cyclic = 0;
-+
-+ /*
-+ * We have marked the channel as busy, so no need to keep the
-+ * lock as long as we only touch the channel-specific
-+ * registers
-+ */
-+ spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+ /*
-+ * There may be limitations in the driver and/or the DMA
-+ * controller that prevents us from sending a whole
-+ * scatterlist item in one go. Taking this into account,
-+ * calculate the number of block transfers we need to set up.
-+ *
-+ * FIXME: Let the peripheral driver know about the maximum
-+ * block size we support. We really don't want to use a
-+ * different block size than what was suggested by the
-+ * peripheral.
-+ *
-+ * Each block will get its own Linked List Item (LLI) below.
-+ */
-+ block_size = req->block_size;
-+ nr_blocks = req->nr_blocks;
-+ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
-+ block_size, nr_blocks, req->nr_sg);
-+
-+ BUG_ON(nr_blocks == 0);
-+ chan->nr_blocks = nr_blocks;
-+
-+ ret = -EINVAL;
-+ cfglo = cfghi = 0;
-+ switch (req->direction) {
-+ case DMA_DIR_MEM_TO_PERIPH:
-+ direction = DMA_TO_DEVICE;
-+ cfghi = req->periph_id << (43 - 32);
-+ break;
-+
-+ case DMA_DIR_PERIPH_TO_MEM:
-+ direction = DMA_FROM_DEVICE;
-+ cfghi = req->periph_id << (39 - 32);
-+ break;
-+ default:
-+ goto out_unclaim_channel;
-+ }
-+
-+ chan->direction = direction;
-+
-+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
-+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
-+
-+ ctlhi = block_size >> req->width;
-+ ctllo = ((req->direction << 20)
-+ // | (1 << 14) | (1 << 11) // source/dest burst trans len
-+ | (req->width << 4) | (req->width << 1)
-+ | (1 << 0)); // interrupt enable
-+
-+ if (nr_blocks == 1) {
-+ /* Only one block: No need to use block chaining */
-+ if (direction == DMA_TO_DEVICE) {
-+ dmac_chan_writel_lo(dmac, req->req.channel, SAR,
-+ req->sg->dma_address);
-+ dmac_chan_writel_lo(dmac, req->req.channel, DAR,
-+ req->data_reg);
-+ ctllo |= 2 << 7; // no dst increment
-+ } else {
-+ dmac_chan_writel_lo(dmac, req->req.channel, SAR,
-+ req->data_reg);
-+ dmac_chan_writel_lo(dmac, req->req.channel, DAR,
-+ req->sg->dma_address);
-+ ctllo |= 2 << 9; // no src increment
-+ }
-+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
-+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
-+ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
-+ } else {
-+ struct dw_dma_lli *lli, *lli_prev = NULL;
-+ int j = 0, offset = 0;
-+
-+ ret = -ENOMEM;
-+ chan->block = allocate_blocks(dmac, nr_blocks);
-+ if (!chan->block)
-+ goto out_unclaim_channel;
-+
-+ if (direction == DMA_TO_DEVICE)
-+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
-+ else
-+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
-+
-+ /*
-+ * Map scatterlist items to blocks. One scatterlist
-+ * item may need more than one block for the reasons
-+ * mentioned above.
-+ */
-+ for (i = 0; i < nr_blocks; i++) {
-+ lli = chan->block[i].lli_vaddr;
-+ if (lli_prev) {
-+ lli_prev->llp = chan->block[i].lli_dma_addr;
-+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+ i - 1, chan->block[i - 1].lli_vaddr,
-+ chan->block[i - 1].lli_dma_addr,
-+ lli_prev->sar, lli_prev->dar, lli_prev->llp,
-+ lli_prev->ctllo, lli_prev->ctlhi);
-+ }
-+ lli->llp = 0;
-+ lli->ctllo = ctllo;
-+ lli->ctlhi = ctlhi;
-+ if (direction == DMA_TO_DEVICE) {
-+ lli->sar = req->sg[j].dma_address + offset;
-+ lli->dar = req->data_reg;
-+ } else {
-+ lli->sar = req->data_reg;
-+ lli->dar = req->sg[j].dma_address + offset;
-+ }
-+ lli_prev = lli;
-+
-+ offset += block_size;
-+ if (offset > req->sg[j].length) {
-+ j++;
-+ offset = 0;
-+ }
-+ }
-+
-+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+ i - 1, chan->block[i - 1].lli_vaddr,
-+ chan->block[i - 1].lli_dma_addr, lli_prev->sar,
-+ lli_prev->dar, lli_prev->llp,
-+ lli_prev->ctllo, lli_prev->ctlhi);
-+
-+ /*
-+ * SAR, DAR and CTL are initialized from the LLI. We
-+ * only have to enable the LLI bits in CTL.
-+ */
-+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
-+ dmac_chan_writel_lo(dmac, req->req.channel, LLP,
-+ chan->block[0].lli_dma_addr);
-+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
-+ }
-+
-+ set_channel_bit(dmac, MASK_XFER, req->req.channel);
-+ set_channel_bit(dmac, MASK_ERROR, req->req.channel);
-+ if (req->req.block_complete)
-+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+ else
-+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+
-+ return 0;
-+
-+out_unclaim_channel:
-+ chan->state = CH_STATE_ALLOCATED;
-+ return ret;
-+}
-+
-+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
-+ struct dma_request_cyclic *req)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+ struct dw_dma_channel *chan;
-+ unsigned long ctlhi, ctllo, cfghi, cfglo;
-+ unsigned long block_size;
-+ int ret, i, direction;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&dmac->lock, flags);
-+
-+ block_size = (req->buffer_size/req->periods) >> req->width;
-+
-+ ret = -EINVAL;
-+ if (req->req.channel >= DMAC_NR_CHANNELS
-+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
-+ || (req->periods == 0)
-+ || block_size > DMAC_MAX_BLOCKSIZE) {
-+ spin_unlock_irqrestore(&dmac->lock, flags);
-+ return -EINVAL;
-+ }
-+
-+ chan = &dmac->channel[req->req.channel];
-+ chan->state = CH_STATE_BUSY;
-+ chan->is_cyclic = 1;
-+ chan->req_cyclic = req;
-+
-+ /*
-+ * We have marked the channel as busy, so no need to keep the
-+ * lock as long as we only touch the channel-specific
-+ * registers
-+ */
-+ spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+ /*
-+ Setup
-+ */
-+ BUG_ON(req->buffer_size % req->periods);
-+ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
-+
-+ chan->nr_blocks = req->periods;
-+
-+ ret = -EINVAL;
-+ cfglo = cfghi = 0;
-+ switch (req->direction) {
-+ case DMA_DIR_MEM_TO_PERIPH:
-+ direction = DMA_TO_DEVICE;
-+ cfghi = req->periph_id << (43 - 32);
-+ break;
-+
-+ case DMA_DIR_PERIPH_TO_MEM:
-+ direction = DMA_FROM_DEVICE;
-+ cfghi = req->periph_id << (39 - 32);
-+ break;
-+ default:
-+ goto out_unclaim_channel;
-+ }
-+
-+ chan->direction = direction;
-+
-+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
-+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
-+
-+ ctlhi = block_size;
-+ ctllo = ((req->direction << 20)
-+ | (req->width << 4) | (req->width << 1)
-+ | (1 << 0)); // interrupt enable
-+
-+ {
-+ struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
-+
-+ ret = -ENOMEM;
-+ chan->block = allocate_blocks(dmac, req->periods);
-+ if (!chan->block)
-+ goto out_unclaim_channel;
-+
-+ if (direction == DMA_TO_DEVICE)
-+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
-+ else
-+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
-+
-+ /*
-+ * Set up a linked list items where each period gets
-+ * an item. The linked list item for the last period
-+ * points back to the star of the buffer making a
-+ * cyclic buffer.
-+ */
-+ for (i = 0; i < req->periods; i++) {
-+ lli = chan->block[i].lli_vaddr;
-+ if (lli_prev) {
-+ lli_prev->llp = chan->block[i].lli_dma_addr;
-+ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+ i - 1, chan->block[i - 1].lli_vaddr,
-+ chan->block[i - 1].lli_dma_addr,
-+ lli_prev->sar, lli_prev->dar, lli_prev->llp,
-+ lli_prev->ctllo, lli_prev->ctlhi);*/
-+ }
-+ lli->llp = 0;
-+ lli->ctllo = ctllo;
-+ lli->ctlhi = ctlhi;
-+ if (direction == DMA_TO_DEVICE) {
-+ lli->sar = req->buffer_start + i*(block_size << req->width);
-+ lli->dar = req->data_reg;
-+ } else {
-+ lli->sar = req->data_reg;
-+ lli->dar = req->buffer_start + i*(block_size << req->width);
-+ }
-+ lli_prev = lli;
-+ }
-+ lli->llp = chan->block[0].lli_dma_addr;
-+
-+ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+ i - 1, chan->block[i - 1].lli_vaddr,
-+ chan->block[i - 1].lli_dma_addr, lli_prev->sar,
-+ lli_prev->dar, lli_prev->llp,
-+ lli_prev->ctllo, lli_prev->ctlhi); */
-+
-+ /*
-+ * SAR, DAR and CTL are initialized from the LLI. We
-+ * only have to enable the LLI bits in CTL.
-+ */
-+ dmac_chan_writel_lo(dmac, req->req.channel, LLP,
-+ chan->block[0].lli_dma_addr);
-+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
-+ }
-+
-+ clear_channel_bit(dmac, MASK_XFER, req->req.channel);
-+ set_channel_bit(dmac, MASK_ERROR, req->req.channel);
-+ if (req->req.block_complete)
-+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+ else
-+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+
-+ return 0;
-+
-+out_unclaim_channel:
-+ chan->state = CH_STATE_ALLOCATED;
-+ return ret;
-+}
-+
-+static int dmac_start_request(struct dma_controller *_dmac,
-+ unsigned int channel)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+
-+ BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+ set_channel_bit(dmac, CH_EN, channel);
-+
-+ return 0;
-+}
-+
-+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
-+ unsigned int channel)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+ struct dw_dma_channel *chan;
-+ dma_addr_t current_pos;
-+
-+ BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+ chan = &dmac->channel[channel];
-+
-+ switch (chan->direction) {
-+ case DMA_TO_DEVICE:
-+ current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
-+ break;
-+ case DMA_FROM_DEVICE:
-+ current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
-+ break;
-+ default:
-+ return 0;
-+ }
-+
-+
-+ if (!current_pos) {
-+ if (chan->is_cyclic) {
-+ current_pos = chan->req_cyclic->buffer_start;
-+ } else {
-+ current_pos = chan->req_sg->sg->dma_address;
-+ }
-+ }
-+
-+ return current_pos;
-+}
-+
-+
-+static int dmac_stop_request(struct dma_controller *_dmac,
-+ unsigned int channel)
-+{
-+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+ struct dw_dma_channel *chan;
-+
-+ BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+ chan = &dmac->channel[channel];
-+ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
-+ chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
-+ dmac_chan_readl_lo(dmac, channel, DAR),
-+ dmac_chan_readl_lo(dmac, channel, LLP),
-+ dmac_chan_readl_hi(dmac, channel, CTL),
-+ dmac_chan_readl_lo(dmac, channel, CTL));
-+
-+ if (chan->state == CH_STATE_BUSY) {
-+ clear_channel_bit(dmac, CH_EN, channel);
-+ cleanup_channel(dmac, &dmac->channel[channel]);
-+ }
-+
-+ return 0;
-+}
-+
-+
-+static void dmac_block_complete(struct dw_dma_controller *dmac)
-+{
-+ struct dw_dma_channel *chan;
-+ unsigned long status, chanid;
-+
-+ status = dmac_readl_lo(dmac, STATUS_BLOCK);
-+
-+ while (status) {
-+ struct dma_request *req;
-+ chanid = __ffs(status);
-+ chan = &dmac->channel[chanid];
-+
-+ if (chan->is_cyclic) {
-+ BUG_ON(!chan->req_cyclic
-+ || !chan->req_cyclic->req.block_complete);
-+ req = &chan->req_cyclic->req;
-+ } else {
-+ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
-+ req = &chan->req_sg->req;
-+ }
-+ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
-+ req->block_complete(req);
-+ status = dmac_readl_lo(dmac, STATUS_BLOCK);
-+ }
-+}
-+
-+static void dmac_xfer_complete(struct dw_dma_controller *dmac)
-+{
-+ struct dw_dma_channel *chan;
-+ struct dma_request *req;
-+ unsigned long status, chanid;
-+
-+ status = dmac_readl_lo(dmac, STATUS_XFER);
-+
-+ while (status) {
-+ chanid = __ffs(status);
-+ chan = &dmac->channel[chanid];
-+
-+ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
-+
-+ req = &chan->req_sg->req;
-+ BUG_ON(!req);
-+ cleanup_channel(dmac, chan);
-+ if (req->xfer_complete)
-+ req->xfer_complete(req);
-+
-+ status = dmac_readl_lo(dmac, STATUS_XFER);
-+ }
-+}
-+
-+static void dmac_error(struct dw_dma_controller *dmac)
-+{
-+ struct dw_dma_channel *chan;
-+ unsigned long status, chanid;
-+
-+ status = dmac_readl_lo(dmac, STATUS_ERROR);
-+
-+ while (status) {
-+ struct dma_request *req;
-+
-+ chanid = __ffs(status);
-+ chan = &dmac->channel[chanid];
-+
-+ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
-+ clear_channel_bit(dmac, CH_EN, chanid);
-+
-+ if (chan->is_cyclic) {
-+ BUG_ON(!chan->req_cyclic);
-+ req = &chan->req_cyclic->req;
-+ } else {
-+ BUG_ON(!chan->req_sg);
-+ req = &chan->req_sg->req;
-+ }
-+
-+ cleanup_channel(dmac, chan);
-+ if (req->error)
-+ req->error(req);
-+
-+ status = dmac_readl_lo(dmac, STATUS_XFER);
-+ }
-+}
-+
-+static irqreturn_t dmac_interrupt(int irq, void *dev_id)
-+{
-+ struct dw_dma_controller *dmac = dev_id;
-+ unsigned long status;
-+ int ret = IRQ_NONE;
-+
-+ spin_lock(&dmac->lock);
-+
-+ status = dmac_readl_lo(dmac, STATUS_INT);
-+
-+ while (status) {
-+ ret = IRQ_HANDLED;
-+ if (status & 0x10)
-+ dmac_error(dmac);
-+ if (status & 0x02)
-+ dmac_block_complete(dmac);
-+ if (status & 0x01)
-+ dmac_xfer_complete(dmac);
-+
-+ status = dmac_readl_lo(dmac, STATUS_INT);
-+ }
-+
-+ spin_unlock(&dmac->lock);
-+ return ret;
-+}
-+
-+static int __devinit dmac_probe(struct platform_device *pdev)
-+{
-+ struct dw_dma_controller *dmac;
-+ struct resource *regs;
-+ int ret;
-+
-+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!regs)
-+ return -ENXIO;
-+
-+ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
-+ if (!dmac)
-+ return -ENOMEM;
-+ memset(dmac, 0, sizeof(*dmac));
-+
-+ dmac->hclk = clk_get(&pdev->dev, "hclk");
-+ if (IS_ERR(dmac->hclk)) {
-+ ret = PTR_ERR(dmac->hclk);
-+ goto out_free_dmac;
-+ }
-+ clk_enable(dmac->hclk);
-+
-+ ret = -ENOMEM;
-+ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
-+ sizeof(struct dw_dma_lli), 4, 0);
-+ if (!dmac->lli_pool)
-+ goto out_disable_clk;
-+
-+ spin_lock_init(&dmac->lock);
-+ dmac->dma.dev = &pdev->dev;
-+ dmac->dma.alloc_channel = dmac_alloc_channel;
-+ dmac->dma.release_channel = dmac_release_channel;
-+ dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
-+ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
-+ dmac->dma.start_request = dmac_start_request;
-+ dmac->dma.stop_request = dmac_stop_request;
-+ dmac->dma.get_current_pos = dmac_get_current_pos;
-+
-+ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+ if (!dmac->regs)
-+ goto out_free_pool;
-+
-+ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
-+ SA_SAMPLE_RANDOM, pdev->name, dmac);
-+ if (ret)
-+ goto out_unmap_regs;
-+
-+ /* Enable the DMA controller */
-+ dmac_writel_lo(dmac, CFG, 1);
-+
-+ register_dma_controller(&dmac->dma);
-+
-+ printk(KERN_INFO
-+ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
-+ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
-+
-+ return 0;
-+
-+out_unmap_regs:
-+ iounmap(dmac->regs);
-+out_free_pool:
-+ dma_pool_destroy(dmac->lli_pool);
-+out_disable_clk:
-+ clk_disable(dmac->hclk);
-+ clk_put(dmac->hclk);
-+out_free_dmac:
-+ kfree(dmac);
-+ return ret;
-+}
-+
-+static struct platform_driver dmac_driver = {
-+ .probe = dmac_probe,
-+ .driver = {
-+ .name = "dmaca",
-+ },
-+};
-+
-+static int __init dmac_init(void)
-+{
-+ return platform_driver_register(&dmac_driver);
-+}
-+subsys_initcall(dmac_init);
-+
-+static void __exit dmac_exit(void)
-+{
-+ platform_driver_unregister(&dmac_driver);
-+}
-+module_exit(dmac_exit);
-+
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/dw-dmac.h avr32-git/arch/avr32/drivers/dw-dmac.h
---- linux-2.6.21.3/arch/avr32/drivers/dw-dmac.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/drivers/dw-dmac.h 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,42 @@
-+/*
-+ * Driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __AVR32_DW_DMAC_H__
-+#define __AVR32_DW_DMAC_H__
-+
-+#define DW_DMAC_CFG 0x398
-+#define DW_DMAC_CH_EN 0x3a0
-+
-+#define DW_DMAC_STATUS_XFER 0x2e8
-+#define DW_DMAC_STATUS_BLOCK 0x2f0
-+#define DW_DMAC_STATUS_ERROR 0x308
-+
-+#define DW_DMAC_MASK_XFER 0x310
-+#define DW_DMAC_MASK_BLOCK 0x318
-+#define DW_DMAC_MASK_ERROR 0x330
-+
-+#define DW_DMAC_CLEAR_XFER 0x338
-+#define DW_DMAC_CLEAR_BLOCK 0x340
-+#define DW_DMAC_CLEAR_ERROR 0x358
-+
-+#define DW_DMAC_STATUS_INT 0x360
-+
-+#define DW_DMAC_CHAN_SAR 0x000
-+#define DW_DMAC_CHAN_DAR 0x008
-+#define DW_DMAC_CHAN_LLP 0x010
-+#define DW_DMAC_CHAN_CTL 0x018
-+#define DW_DMAC_CHAN_SSTAT 0x020
-+#define DW_DMAC_CHAN_DSTAT 0x028
-+#define DW_DMAC_CHAN_SSTATAR 0x030
-+#define DW_DMAC_CHAN_DSTATAR 0x038
-+#define DW_DMAC_CHAN_CFG 0x040
-+#define DW_DMAC_CHAN_SGR 0x048
-+#define DW_DMAC_CHAN_DSR 0x050
-+
-+#endif /* __AVR32_DW_DMAC_H__ */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/Makefile avr32-git/arch/avr32/drivers/Makefile
---- linux-2.6.21.3/arch/avr32/drivers/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/drivers/Makefile 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_DW_DMAC) += dw-dmac.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/Kconfig avr32-git/arch/avr32/Kconfig
---- linux-2.6.21.3/arch/avr32/Kconfig 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/Kconfig 2007-06-06 11:33:46.000000000 +0200
-@@ -57,9 +57,6 @@
- bool
- default n
-
--config GENERIC_BUST_SPINLOCK
-- bool
--
- config GENERIC_HWEIGHT
- bool
- default y
-@@ -68,6 +65,11 @@
- bool
- default y
-
-+config GENERIC_BUG
-+ bool
-+ default y
-+ depends on BUG
-+
- source "init/Kconfig"
-
- menu "System Type and features"
-@@ -106,6 +108,9 @@
- config BOARD_ATSTK1000
- bool "ATSTK1000 evaluation board"
- select BOARD_ATSTK1002 if CPU_AT32AP7000
-+
-+config BOARD_ATNGW100
-+ bool "ATNGW100 Network Gateway"
- endchoice
-
- choice
-@@ -116,6 +121,8 @@
- bool "U-Boot (or similar) bootloader"
- endchoice
-
-+source "arch/avr32/mach-at32ap/Kconfig"
-+
- config LOAD_ADDRESS
- hex
- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
-@@ -164,6 +171,10 @@
- enabling Nexus-compliant debuggers to keep track of the PID of the
- currently executing task.
-
-+config DW_DMAC
-+ tristate "Synopsys DesignWare DMA Controller support"
-+ default y if CPU_AT32AP7000
-+
- # FPU emulation goes here
-
- source "kernel/Kconfig.hz"
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/cpu.c avr32-git/arch/avr32/kernel/cpu.c
---- linux-2.6.21.3/arch/avr32/kernel/cpu.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/cpu.c 2007-06-06 11:33:46.000000000 +0200
-@@ -209,16 +209,17 @@
- void __init setup_processor(void)
- {
- unsigned long config0, config1;
-+ unsigned long features;
- unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
- unsigned tmp;
-
-- config0 = sysreg_read(CONFIG0); /* 0x0000013e; */
-- config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */
-- cpu_id = config0 >> 24;
-- cpu_rev = (config0 >> 16) & 0xff;
-- arch_id = (config0 >> 13) & 0x07;
-- arch_rev = (config0 >> 10) & 0x07;
-- mmu_type = (config0 >> 7) & 0x03;
-+ config0 = sysreg_read(CONFIG0);
-+ config1 = sysreg_read(CONFIG1);
-+ cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
-+ cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
-+ arch_id = SYSREG_BFEXT(AT, config0);
-+ arch_rev = SYSREG_BFEXT(AR, config0);
-+ mmu_type = SYSREG_BFEXT(MMUT, config0);
-
- boot_cpu_data.arch_type = arch_id;
- boot_cpu_data.cpu_type = cpu_id;
-@@ -226,16 +227,16 @@
- boot_cpu_data.cpu_revision = cpu_rev;
- boot_cpu_data.tlb_config = mmu_type;
-
-- tmp = (config1 >> 13) & 0x07;
-+ tmp = SYSREG_BFEXT(ILSZ, config1);
- if (tmp) {
-- boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07);
-- boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f);
-+ boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
-+ boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
- boot_cpu_data.icache.linesz = 1 << (tmp + 1);
- }
-- tmp = (config1 >> 3) & 0x07;
-+ tmp = SYSREG_BFEXT(DLSZ, config1);
- if (tmp) {
-- boot_cpu_data.dcache.ways = 1 << (config1 & 0x07);
-- boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f);
-+ boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
-+ boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
- boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
- }
-
-@@ -250,16 +251,39 @@
- cpu_names[cpu_id], cpu_id, cpu_rev,
- arch_names[arch_id], arch_rev);
- printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
-+
- printk ("CPU: features:");
-- if (config0 & (1 << 6))
-- printk(" fpu");
-- if (config0 & (1 << 5))
-- printk(" java");
-- if (config0 & (1 << 4))
-- printk(" perfctr");
-- if (config0 & (1 << 3))
-+ features = 0;
-+ if (config0 & SYSREG_BIT(CONFIG0_R)) {
-+ features |= AVR32_FEATURE_RMW;
-+ printk(" rmw");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_D)) {
-+ features |= AVR32_FEATURE_DSP;
-+ printk(" dsp");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_S)) {
-+ features |= AVR32_FEATURE_SIMD;
-+ printk(" simd");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_O)) {
-+ features |= AVR32_FEATURE_OCD;
- printk(" ocd");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_P)) {
-+ features |= AVR32_FEATURE_PCTR;
-+ printk(" perfctr");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_J)) {
-+ features |= AVR32_FEATURE_JAVA;
-+ printk(" java");
-+ }
-+ if (config0 & SYSREG_BIT(CONFIG0_F)) {
-+ features |= AVR32_FEATURE_FPU;
-+ printk(" fpu");
-+ }
- printk("\n");
-+ boot_cpu_data.features = features;
- }
-
- #ifdef CONFIG_PROC_FS
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/dma-controller.c avr32-git/arch/avr32/kernel/dma-controller.c
---- linux-2.6.21.3/arch/avr32/kernel/dma-controller.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/kernel/dma-controller.c 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,34 @@
-+/*
-+ * Preliminary DMA controller framework for AVR32
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <asm/dma-controller.h>
-+
-+static LIST_HEAD(controllers);
-+
-+int register_dma_controller(struct dma_controller *dmac)
-+{
-+ static int next_id;
-+
-+ dmac->id = next_id++;
-+ list_add_tail(&dmac->list, &controllers);
-+
-+ return 0;
-+}
-+EXPORT_SYMBOL(register_dma_controller);
-+
-+struct dma_controller *find_dma_controller(int id)
-+{
-+ struct dma_controller *dmac;
-+
-+ list_for_each_entry(dmac, &controllers, list)
-+ if (dmac->id == id)
-+ return dmac;
-+ return NULL;
-+}
-+EXPORT_SYMBOL(find_dma_controller);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/entry-avr32b.S avr32-git/arch/avr32/kernel/entry-avr32b.S
---- linux-2.6.21.3/arch/avr32/kernel/entry-avr32b.S 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/entry-avr32b.S 2007-06-06 11:33:46.000000000 +0200
-@@ -100,55 +100,49 @@
-
- .global tlb_miss_common
- tlb_miss_common:
-- mfsr r0, SYSREG_PTBR
-- mfsr r1, SYSREG_TLBEAR
-+ mfsr r0, SYSREG_TLBEAR
-+ mfsr r1, SYSREG_PTBR
-
- /* Is it the vmalloc space? */
-- bld r1, 31
-+ bld r0, 31
- brcs handle_vmalloc_miss
-
- /* First level lookup */
- pgtbl_lookup:
-- lsr r2, r1, PGDIR_SHIFT
-- ld.w r0, r0[r2 << 2]
-- bld r0, _PAGE_BIT_PRESENT
-+ lsr r2, r0, PGDIR_SHIFT
-+ ld.w r3, r1[r2 << 2]
-+ bfextu r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT
-+ bld r3, _PAGE_BIT_PRESENT
- brcc page_table_not_present
-
-- /* TODO: Check access rights on page table if necessary */
--
- /* Translate to virtual address in P1. */
-- andl r0, 0xf000
-- sbr r0, 31
-+ andl r3, 0xf000
-+ sbr r3, 31
-
- /* Second level lookup */
-- lsl r1, (32 - PGDIR_SHIFT)
-- lsr r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT
-- add r2, r0, r1 << 2
-- ld.w r1, r2[0]
-- bld r1, _PAGE_BIT_PRESENT
-+ ld.w r2, r3[r1 << 2]
-+ mfsr r0, SYSREG_TLBARLO
-+ bld r2, _PAGE_BIT_PRESENT
- brcc page_not_present
-
- /* Mark the page as accessed */
-- sbr r1, _PAGE_BIT_ACCESSED
-- st.w r2[0], r1
-+ sbr r2, _PAGE_BIT_ACCESSED
-+ st.w r3[r1 << 2], r2
-
- /* Drop software flags */
-- andl r1, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
-- mtsr SYSREG_TLBELO, r1
-+ andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
-+ mtsr SYSREG_TLBELO, r2
-
- /* Figure out which entry we want to replace */
-- mfsr r0, SYSREG_TLBARLO
-+ mfsr r1, SYSREG_MMUCR
- clz r2, r0
- brcc 1f
-- mov r1, -1 /* All entries have been accessed, */
-- mtsr SYSREG_TLBARLO, r1 /* so reset TLBAR */
-- mov r2, 0 /* and start at 0 */
--1: mfsr r1, SYSREG_MMUCR
-- lsl r2, 14
-- andl r1, 0x3fff, COH
-- or r1, r2
-- mtsr SYSREG_MMUCR, r1
-+ mov r3, -1 /* All entries have been accessed, */
-+ mov r2, 0 /* so start at 0 */
-+ mtsr SYSREG_TLBARLO, r3 /* and reset TLBAR */
-
-+1: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
-+ mtsr SYSREG_MMUCR, r1
- tlbw
-
- tlbmiss_restore
-@@ -156,8 +150,8 @@
-
- handle_vmalloc_miss:
- /* Simply do the lookup in init's page table */
-- mov r0, lo(swapper_pg_dir)
-- orh r0, hi(swapper_pg_dir)
-+ mov r1, lo(swapper_pg_dir)
-+ orh r1, hi(swapper_pg_dir)
- rjmp pgtbl_lookup
-
-
-@@ -340,12 +334,34 @@
- do_nmi_ll:
- sub sp, 4
- stmts --sp, r0-lr
-- /* FIXME: Make sure RAR_NMI and RSR_NMI are pushed instead of *_EX */
-- rcall save_full_context_ex
-+ mfsr r9, SYSREG_RSR_NMI
-+ mfsr r8, SYSREG_RAR_NMI
-+ bfextu r0, r9, MODE_SHIFT, 3
-+ brne 2f
-+
-+1: pushm r8, r9 /* PC and SR */
- mfsr r12, SYSREG_ECR
- mov r11, sp
- rcall do_nmi
-- rjmp bad_return
-+ popm r8-r9
-+ mtsr SYSREG_RAR_NMI, r8
-+ tst r0, r0
-+ mtsr SYSREG_RSR_NMI, r9
-+ brne 3f
-+
-+ ldmts sp++, r0-lr
-+ sub sp, -4 /* skip r12_orig */
-+ rete
-+
-+2: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR)
-+ stdsp sp[4], r10 /* replace saved SP */
-+ rjmp 1b
-+
-+3: popm lr
-+ sub sp, -4 /* skip sp */
-+ popm r0-r12
-+ sub sp, -4 /* skip r12_orig */
-+ rete
-
- handle_address_fault:
- sub sp, 4
-@@ -630,9 +646,12 @@
- rcall do_IRQ
-
- lddsp r4, sp[REG_SR]
-- andh r4, (MODE_MASK >> 16), COH
-+ bfextu r4, r4, SYSREG_M0_OFFSET, 3
-+ cp.w r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET
-+ breq 2f
-+ cp.w r4, MODE_USER >> SYSREG_M0_OFFSET
- #ifdef CONFIG_PREEMPT
-- brne 2f
-+ brne 3f
- #else
- brne 1f
- #endif
-@@ -649,9 +668,18 @@
- sub sp, -4 /* ignore r12_orig */
- rete
-
-+2: get_thread_info r0
-+ ld.w r1, r0[TI_flags]
-+ bld r1, TIF_CPU_GOING_TO_SLEEP
- #ifdef CONFIG_PREEMPT
--2:
-- get_thread_info r0
-+ brcc 3f
-+#else
-+ brcc 1b
-+#endif
-+ sub r1, pc, . - cpu_idle_skip_sleep
-+ stdsp sp[REG_PC], r1
-+#ifdef CONFIG_PREEMPT
-+3: get_thread_info r0
- ld.w r2, r0[TI_preempt_count]
- cp.w r2, 0
- brne 1b
-@@ -662,12 +690,32 @@
- bld r4, SYSREG_GM_OFFSET
- brcs 1b
- rcall preempt_schedule_irq
-- rjmp 1b
- #endif
-+ rjmp 1b
- .endm
-
- .section .irq.text,"ax",@progbits
-
-+.global cpu_idle_sleep
-+cpu_idle_sleep:
-+ mask_interrupts
-+ get_thread_info r8
-+ ld.w r9, r8[TI_flags]
-+ bld r9, TIF_NEED_RESCHED
-+ brcs cpu_idle_enable_int_and_exit
-+ sbr r9, TIF_CPU_GOING_TO_SLEEP
-+ st.w r8[TI_flags], r9
-+ unmask_interrupts
-+ sleep 0
-+cpu_idle_skip_sleep:
-+ mask_interrupts
-+ ld.w r9, r8[TI_flags]
-+ cbr r9, TIF_CPU_GOING_TO_SLEEP
-+ st.w r8[TI_flags], r9
-+cpu_idle_enable_int_and_exit:
-+ unmask_interrupts
-+ retal r12
-+
- .global irq_level0
- .global irq_level1
- .global irq_level2
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/irq.c avr32-git/arch/avr32/kernel/irq.c
---- linux-2.6.21.3/arch/avr32/kernel/irq.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/irq.c 2007-06-06 11:33:46.000000000 +0200
-@@ -7,15 +7,6 @@
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-- *
-- * This file contains the code used by various IRQ handling routines:
-- * asking for different IRQ's should be done through these routines
-- * instead of just grabbing them. Thus setups with different IRQ numbers
-- * shouldn't result in any weird surprises, and installing new handlers
-- * should be easier.
-- *
-- * IRQ's are in fact implemented a bit like signal handlers for the kernel.
-- * Naturally it's not a 1:1 relation, but there are similarities.
- */
-
- #include <linux/interrupt.h>
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/kprobes.c avr32-git/arch/avr32/kernel/kprobes.c
---- linux-2.6.21.3/arch/avr32/kernel/kprobes.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/kprobes.c 2007-06-06 11:33:46.000000000 +0200
-@@ -179,7 +179,7 @@
- return 1;
- }
-
--static int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
-+int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
- {
- struct kprobe *cur = kprobe_running();
-
-@@ -216,11 +216,6 @@
- if (post_kprobe_handler(args->regs))
- ret = NOTIFY_STOP;
- break;
-- case DIE_FAULT:
-- if (kprobe_running()
-- && kprobe_fault_handler(args->regs, args->trapnr))
-- ret = NOTIFY_STOP;
-- break;
- default:
- break;
- }
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/Makefile avr32-git/arch/avr32/kernel/Makefile
---- linux-2.6.21.3/arch/avr32/kernel/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/Makefile 2007-06-06 11:33:46.000000000 +0200
-@@ -9,6 +9,7 @@
- obj-y += setup.o traps.o semaphore.o ptrace.o
- obj-y += signal.o sys_avr32.o process.o time.o
- obj-y += init_task.o switch_to.o cpu.o
-+obj-y += dma-controller.o
- obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
- obj-$(CONFIG_KPROBES) += kprobes.o
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/module.c avr32-git/arch/avr32/kernel/module.c
---- linux-2.6.21.3/arch/avr32/kernel/module.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/module.c 2007-06-06 11:33:46.000000000 +0200
-@@ -12,10 +12,11 @@
- * published by the Free Software Foundation.
- */
-
--#include <linux/moduleloader.h>
--#include <linux/module.h>
--#include <linux/kernel.h>
-+#include <linux/bug.h>
- #include <linux/elf.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/moduleloader.h>
- #include <linux/vmalloc.h>
-
- void *module_alloc(unsigned long size)
-@@ -315,10 +316,10 @@
- vfree(module->arch.syminfo);
- module->arch.syminfo = NULL;
-
-- return 0;
-+ return module_bug_finalize(hdr, sechdrs, module);
- }
-
- void module_arch_cleanup(struct module *module)
- {
--
-+ module_bug_cleanup(module);
- }
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/process.c avr32-git/arch/avr32/kernel/process.c
---- linux-2.6.21.3/arch/avr32/kernel/process.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/process.c 2007-06-06 11:33:46.000000000 +0200
-@@ -11,6 +11,7 @@
- #include <linux/fs.h>
- #include <linux/ptrace.h>
- #include <linux/reboot.h>
-+#include <linux/uaccess.h>
- #include <linux/unistd.h>
-
- #include <asm/sysreg.h>
-@@ -19,6 +20,8 @@
- void (*pm_power_off)(void) = NULL;
- EXPORT_SYMBOL(pm_power_off);
-
-+extern void cpu_idle_sleep(void);
-+
- /*
- * This file handles the architecture-dependent parts of process handling..
- */
-@@ -27,9 +30,8 @@
- {
- /* endless idle loop with no priority at all */
- while (1) {
-- /* TODO: Enter sleep mode */
- while (!need_resched())
-- cpu_relax();
-+ cpu_idle_sleep();
- preempt_enable_no_resched();
- schedule();
- preempt_disable();
-@@ -114,39 +116,178 @@
- /* do nothing */
- }
-
-+static void dump_mem(const char *str, const char *log_lvl,
-+ unsigned long bottom, unsigned long top)
-+{
-+ unsigned long p;
-+ int i;
-+
-+ printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top);
-+
-+ for (p = bottom & ~31; p < top; ) {
-+ printk("%s%04lx: ", log_lvl, p & 0xffff);
-+
-+ for (i = 0; i < 8; i++, p += 4) {
-+ unsigned int val;
-+
-+ if (p < bottom || p >= top)
-+ printk(" ");
-+ else {
-+ if (__get_user(val, (unsigned int __user *)p)) {
-+ printk("\n");
-+ goto out;
-+ }
-+ printk("%08x ", val);
-+ }
-+ }
-+ printk("\n");
-+ }
-+
-+out:
-+ return;
-+}
-+
-+static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
-+{
-+ return (p > (unsigned long)tinfo)
-+ && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
-+}
-+
-+#ifdef CONFIG_FRAME_POINTER
-+static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
-+ struct pt_regs *regs, const char *log_lvl)
-+{
-+ unsigned long lr, fp;
-+ struct thread_info *tinfo;
-+
-+ if (regs)
-+ fp = regs->r7;
-+ else if (tsk == current)
-+ asm("mov %0, r7" : "=r"(fp));
-+ else
-+ fp = tsk->thread.cpu_context.r7;
-+
-+ /*
-+ * Walk the stack as long as the frame pointer (a) is within
-+ * the kernel stack of the task, and (b) it doesn't move
-+ * downwards.
-+ */
-+ tinfo = task_thread_info(tsk);
-+ printk("%sCall trace:\n", log_lvl);
-+ while (valid_stack_ptr(tinfo, fp)) {
-+ unsigned long new_fp;
-+
-+ lr = *(unsigned long *)fp;
-+#ifdef CONFIG_KALLSYMS
-+ printk("%s [<%08lx>] ", log_lvl, lr);
-+#else
-+ printk(" [<%08lx>] ", lr);
-+#endif
-+ print_symbol("%s\n", lr);
-+
-+ new_fp = *(unsigned long *)(fp + 4);
-+ if (new_fp <= fp)
-+ break;
-+ fp = new_fp;
-+ }
-+ printk("\n");
-+}
-+#else
-+static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
-+ struct pt_regs *regs, const char *log_lvl)
-+{
-+ unsigned long addr;
-+
-+ printk("%sCall trace:\n", log_lvl);
-+
-+ while (!kstack_end(sp)) {
-+ addr = *sp++;
-+ if (kernel_text_address(addr)) {
-+#ifdef CONFIG_KALLSYMS
-+ printk("%s [<%08lx>] ", log_lvl, addr);
-+#else
-+ printk(" [<%08lx>] ", addr);
-+#endif
-+ print_symbol("%s\n", addr);
-+ }
-+ }
-+ printk("\n");
-+}
-+#endif
-+
-+void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
-+ struct pt_regs *regs, const char *log_lvl)
-+{
-+ struct thread_info *tinfo;
-+
-+ if (sp == 0) {
-+ if (tsk)
-+ sp = tsk->thread.cpu_context.ksp;
-+ else
-+ sp = (unsigned long)&tinfo;
-+ }
-+ if (!tsk)
-+ tsk = current;
-+
-+ tinfo = task_thread_info(tsk);
-+
-+ if (valid_stack_ptr(tinfo, sp)) {
-+ dump_mem("Stack: ", log_lvl, sp,
-+ THREAD_SIZE + (unsigned long)tinfo);
-+ show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl);
-+ }
-+}
-+
-+void show_stack(struct task_struct *tsk, unsigned long *stack)
-+{
-+ show_stack_log_lvl(tsk, (unsigned long)stack, NULL, "");
-+}
-+
-+void dump_stack(void)
-+{
-+ unsigned long stack;
-+
-+ show_trace_log_lvl(current, &stack, NULL, "");
-+}
-+EXPORT_SYMBOL(dump_stack);
-+
- static const char *cpu_modes[] = {
- "Application", "Supervisor", "Interrupt level 0", "Interrupt level 1",
- "Interrupt level 2", "Interrupt level 3", "Exception", "NMI"
- };
-
--void show_regs(struct pt_regs *regs)
-+void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
- {
- unsigned long sp = regs->sp;
- unsigned long lr = regs->lr;
- unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT;
-
-- if (!user_mode(regs))
-+ if (!user_mode(regs)) {
- sp = (unsigned long)regs + FRAME_SIZE_FULL;
-
-- print_symbol("PC is at %s\n", instruction_pointer(regs));
-- print_symbol("LR is at %s\n", lr);
-- printk("pc : [<%08lx>] lr : [<%08lx>] %s\n"
-- "sp : %08lx r12: %08lx r11: %08lx\n",
-- instruction_pointer(regs),
-- lr, print_tainted(), sp, regs->r12, regs->r11);
-- printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
-- regs->r10, regs->r9, regs->r8);
-- printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
-- regs->r7, regs->r6, regs->r5, regs->r4);
-- printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
-- regs->r3, regs->r2, regs->r1, regs->r0);
-- printk("Flags: %c%c%c%c%c\n",
-+ printk("%s", log_lvl);
-+ print_symbol("PC is at %s\n", instruction_pointer(regs));
-+ printk("%s", log_lvl);
-+ print_symbol("LR is at %s\n", lr);
-+ }
-+
-+ printk("%spc : [<%08lx>] lr : [<%08lx>] %s\n"
-+ "%ssp : %08lx r12: %08lx r11: %08lx\n",
-+ log_lvl, instruction_pointer(regs), lr, print_tainted(),
-+ log_lvl, sp, regs->r12, regs->r11);
-+ printk("%sr10: %08lx r9 : %08lx r8 : %08lx\n",
-+ log_lvl, regs->r10, regs->r9, regs->r8);
-+ printk("%sr7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
-+ log_lvl, regs->r7, regs->r6, regs->r5, regs->r4);
-+ printk("%sr3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
-+ log_lvl, regs->r3, regs->r2, regs->r1, regs->r0);
-+ printk("%sFlags: %c%c%c%c%c\n", log_lvl,
- regs->sr & SR_Q ? 'Q' : 'q',
- regs->sr & SR_V ? 'V' : 'v',
- regs->sr & SR_N ? 'N' : 'n',
- regs->sr & SR_Z ? 'Z' : 'z',
- regs->sr & SR_C ? 'C' : 'c');
-- printk("Mode bits: %c%c%c%c%c%c%c%c%c\n",
-+ printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
- regs->sr & SR_H ? 'H' : 'h',
- regs->sr & SR_R ? 'R' : 'r',
- regs->sr & SR_J ? 'J' : 'j',
-@@ -156,9 +297,21 @@
- regs->sr & SR_I1M ? '1' : '.',
- regs->sr & SR_I0M ? '0' : '.',
- regs->sr & SR_GM ? 'G' : 'g');
-- printk("CPU Mode: %s\n", cpu_modes[mode]);
-+ printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]);
-+ printk("%sProcess: %s [%d] (task: %p thread: %p)\n",
-+ log_lvl, current->comm, current->pid, current,
-+ task_thread_info(current));
-+}
-+
-+void show_regs(struct pt_regs *regs)
-+{
-+ unsigned long sp = regs->sp;
-+
-+ if (!user_mode(regs))
-+ sp = (unsigned long)regs + FRAME_SIZE_FULL;
-
-- show_trace(NULL, (unsigned long *)sp, regs);
-+ show_regs_log_lvl(regs, "");
-+ show_trace_log_lvl(current, (unsigned long *)sp, regs, "");
- }
- EXPORT_SYMBOL(show_regs);
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/setup.c avr32-git/arch/avr32/kernel/setup.c
---- linux-2.6.21.3/arch/avr32/kernel/setup.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/setup.c 2007-06-06 11:33:46.000000000 +0200
-@@ -8,12 +8,14 @@
-
- #include <linux/clk.h>
- #include <linux/init.h>
-+#include <linux/initrd.h>
- #include <linux/sched.h>
- #include <linux/console.h>
- #include <linux/ioport.h>
- #include <linux/bootmem.h>
- #include <linux/fs.h>
- #include <linux/module.h>
-+#include <linux/pfn.h>
- #include <linux/root_dev.h>
- #include <linux/cpu.h>
- #include <linux/kernel.h>
-@@ -30,13 +32,6 @@
- extern int root_mountflags;
-
- /*
-- * Bootloader-provided information about physical memory
-- */
--struct tag_mem_range *mem_phys;
--struct tag_mem_range *mem_reserved;
--struct tag_mem_range *mem_ramdisk;
--
--/*
- * Initialize loops_per_jiffy as 5000000 (500MIPS).
- * Better make it too large than too small...
- */
-@@ -48,48 +43,193 @@
- static char __initdata command_line[COMMAND_LINE_SIZE];
-
- /*
-- * Should be more than enough, but if you have a _really_ complex
-- * setup, you might need to increase the size of this...
-+ * Standard memory resources
- */
--static struct tag_mem_range __initdata mem_range_cache[32];
--static unsigned mem_range_next_free;
-+static struct resource __initdata kernel_data = {
-+ .name = "Kernel data",
-+ .start = 0,
-+ .end = 0,
-+ .flags = IORESOURCE_MEM,
-+};
-+static struct resource __initdata kernel_code = {
-+ .name = "Kernel code",
-+ .start = 0,
-+ .end = 0,
-+ .flags = IORESOURCE_MEM,
-+ .sibling = &kernel_data,
-+};
-
- /*
-- * Standard memory resources
-+ * Available system RAM and reserved regions as singly linked
-+ * lists. These lists are traversed using the sibling pointer in
-+ * struct resource and are kept sorted at all times.
- */
--static struct resource mem_res[] = {
-- {
-- .name = "Kernel code",
-- .start = 0,
-- .end = 0,
-- .flags = IORESOURCE_MEM
-- },
-- {
-- .name = "Kernel data",
-- .start = 0,
-- .end = 0,
-- .flags = IORESOURCE_MEM,
-- },
--};
-+static struct resource *__initdata system_ram;
-+static struct resource *__initdata reserved = &kernel_code;
-+
-+/*
-+ * We need to allocate these before the bootmem allocator is up and
-+ * running, so we need this "cache". 32 entries are probably enough
-+ * for all but the most insanely complex systems.
-+ */
-+static struct resource __initdata res_cache[32];
-+static unsigned int __initdata res_cache_next_free;
-+
-+static void __init resource_init(void)
-+{
-+ struct resource *mem, *res;
-+ struct resource *new;
-+
-+ kernel_code.start = __pa(init_mm.start_code);
-+
-+ for (mem = system_ram; mem; mem = mem->sibling) {
-+ new = alloc_bootmem_low(sizeof(struct resource));
-+ memcpy(new, mem, sizeof(struct resource));
-+
-+ new->sibling = NULL;
-+ if (request_resource(&iomem_resource, new))
-+ printk(KERN_WARNING "Bad RAM resource %08x-%08x\n",
-+ mem->start, mem->end);
-+ }
-+
-+ for (res = reserved; res; res = res->sibling) {
-+ new = alloc_bootmem_low(sizeof(struct resource));
-+ memcpy(new, res, sizeof(struct resource));
-+
-+ new->sibling = NULL;
-+ if (insert_resource(&iomem_resource, new))
-+ printk(KERN_WARNING
-+ "Bad reserved resource %s (%08x-%08x)\n",
-+ res->name, res->start, res->end);
-+ }
-+}
-+
-+static void __init
-+add_physical_memory(resource_size_t start, resource_size_t end)
-+{
-+ struct resource *new, *next, **pprev;
-+
-+ for (pprev = &system_ram, next = system_ram; next;
-+ pprev = &next->sibling, next = next->sibling) {
-+ if (end < next->start)
-+ break;
-+ if (start <= next->end) {
-+ printk(KERN_WARNING
-+ "Warning: Physical memory map is broken\n");
-+ printk(KERN_WARNING
-+ "Warning: %08x-%08x overlaps %08x-%08x\n",
-+ start, end, next->start, next->end);
-+ return;
-+ }
-+ }
-+
-+ if (res_cache_next_free >= ARRAY_SIZE(res_cache)) {
-+ printk(KERN_WARNING
-+ "Warning: Failed to add physical memory %08x-%08x\n",
-+ start, end);
-+ return;
-+ }
-+
-+ new = &res_cache[res_cache_next_free++];
-+ new->start = start;
-+ new->end = end;
-+ new->name = "System RAM";
-+ new->flags = IORESOURCE_MEM;
-+
-+ *pprev = new;
-+}
-+
-+static int __init
-+add_reserved_region(resource_size_t start, resource_size_t end,
-+ const char *name)
-+{
-+ struct resource *new, *next, **pprev;
-+
-+ if (end < start)
-+ return -EINVAL;
-+
-+ if (res_cache_next_free >= ARRAY_SIZE(res_cache))
-+ return -ENOMEM;
-+
-+ for (pprev = &reserved, next = reserved; next;
-+ pprev = &next->sibling, next = next->sibling) {
-+ if (end < next->start)
-+ break;
-+ if (start <= next->end)
-+ return -EBUSY;
-+ }
-+
-+ new = &res_cache[res_cache_next_free++];
-+ new->start = start;
-+ new->end = end;
-+ new->name = name;
-+ new->flags = IORESOURCE_MEM;
-
--#define kernel_code mem_res[0]
--#define kernel_data mem_res[1]
-+ *pprev = new;
-+
-+ return 0;
-+}
-+
-+static unsigned long __init
-+find_free_region(const struct resource *mem, resource_size_t size,
-+ resource_size_t align)
-+{
-+ struct resource *res;
-+ unsigned long target;
-+
-+ target = ALIGN(mem->start, align);
-+ for (res = reserved; res; res = res->sibling) {
-+ if ((target + size) <= res->start)
-+ break;
-+ if (target <= res->end)
-+ target = ALIGN(res->end + 1, align);
-+ }
-+
-+ if ((target + size) > (mem->end + 1))
-+ return mem->end + 1;
-+
-+ return target;
-+}
-+
-+static int __init
-+alloc_reserved_region(resource_size_t *start, resource_size_t size,
-+ resource_size_t align, const char *name)
-+{
-+ struct resource *mem;
-+ resource_size_t target;
-+ int ret;
-+
-+ for (mem = system_ram; mem; mem = mem->sibling) {
-+ target = find_free_region(mem, size, align);
-+ if (target <= mem->end) {
-+ ret = add_reserved_region(target, target + size - 1,
-+ name);
-+ if (!ret)
-+ *start = target;
-+ return ret;
-+ }
-+ }
-+
-+ return -ENOMEM;
-+}
-
- /*
- * Early framebuffer allocation. Works as follows:
- * - If fbmem_size is zero, nothing will be allocated or reserved.
- * - If fbmem_start is zero when setup_bootmem() is called,
-- * fbmem_size bytes will be allocated from the bootmem allocator.
-+ * a block of fbmem_size bytes will be reserved before bootmem
-+ * initialization. It will be aligned to the largest page size
-+ * that fbmem_size is a multiple of.
- * - If fbmem_start is nonzero, an area of size fbmem_size will be
-- * reserved at the physical address fbmem_start if necessary. If
-- * the area isn't in a memory region known to the kernel, it will
-- * be left alone.
-+ * reserved at the physical address fbmem_start if possible. If
-+ * it collides with other reserved memory, a different block of
-+ * same size will be allocated, just as if fbmem_start was zero.
- *
- * Board-specific code may use these variables to set up platform data
- * for the framebuffer driver if fbmem_size is nonzero.
- */
--static unsigned long __initdata fbmem_start;
--static unsigned long __initdata fbmem_size;
-+resource_size_t __initdata fbmem_start;
-+resource_size_t __initdata fbmem_size;
-
- /*
- * "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for
-@@ -103,48 +243,42 @@
- */
- static int __init early_parse_fbmem(char *p)
- {
-+ int ret;
-+ unsigned long align;
-+
- fbmem_size = memparse(p, &p);
-- if (*p == '@')
-+ if (*p == '@') {
- fbmem_start = memparse(p, &p);
-- return 0;
--}
--early_param("fbmem", early_parse_fbmem);
--
--static inline void __init resource_init(void)
--{
-- struct tag_mem_range *region;
--
-- kernel_code.start = __pa(init_mm.start_code);
-- kernel_code.end = __pa(init_mm.end_code - 1);
-- kernel_data.start = __pa(init_mm.end_code);
-- kernel_data.end = __pa(init_mm.brk - 1);
-+ ret = add_reserved_region(fbmem_start,
-+ fbmem_start + fbmem_size - 1,
-+ "Framebuffer");
-+ if (ret) {
-+ printk(KERN_WARNING
-+ "Failed to reserve framebuffer memory\n");
-+ fbmem_start = 0;
-+ }
-+ }
-
-- for (region = mem_phys; region; region = region->next) {
-- struct resource *res;
-- unsigned long phys_start, phys_end;
--
-- if (region->size == 0)
-- continue;
--
-- phys_start = region->addr;
-- phys_end = phys_start + region->size - 1;
--
-- res = alloc_bootmem_low(sizeof(*res));
-- res->name = "System RAM";
-- res->start = phys_start;
-- res->end = phys_end;
-- res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
--
-- request_resource (&iomem_resource, res);
--
-- if (kernel_code.start >= res->start &&
-- kernel_code.end <= res->end)
-- request_resource (res, &kernel_code);
-- if (kernel_data.start >= res->start &&
-- kernel_data.end <= res->end)
-- request_resource (res, &kernel_data);
-+ if (!fbmem_start) {
-+ if ((fbmem_size & 0x000fffffUL) == 0)
-+ align = 0x100000; /* 1 MiB */
-+ else if ((fbmem_size & 0x0000ffffUL) == 0)
-+ align = 0x10000; /* 64 KiB */
-+ else
-+ align = 0x1000; /* 4 KiB */
-+
-+ ret = alloc_reserved_region(&fbmem_start, fbmem_size,
-+ align, "Framebuffer");
-+ if (ret) {
-+ printk(KERN_WARNING
-+ "Failed to allocate framebuffer memory\n");
-+ fbmem_size = 0;
-+ }
- }
-+
-+ return 0;
- }
-+early_param("fbmem", early_parse_fbmem);
-
- static int __init parse_tag_core(struct tag *tag)
- {
-@@ -157,11 +291,9 @@
- }
- __tagtable(ATAG_CORE, parse_tag_core);
-
--static int __init parse_tag_mem_range(struct tag *tag,
-- struct tag_mem_range **root)
-+static int __init parse_tag_mem(struct tag *tag)
- {
-- struct tag_mem_range *cur, **pprev;
-- struct tag_mem_range *new;
-+ unsigned long start, end;
-
- /*
- * Ignore zero-sized entries. If we're running standalone, the
-@@ -171,34 +303,53 @@
- if (tag->u.mem_range.size == 0)
- return 0;
-
-- /*
-- * Copy the data so the bootmem init code doesn't need to care
-- * about it.
-- */
-- if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache))
-- panic("Physical memory map too complex!\n");
-+ start = tag->u.mem_range.addr;
-+ end = tag->u.mem_range.addr + tag->u.mem_range.size - 1;
-
-- new = &mem_range_cache[mem_range_next_free++];
-- *new = tag->u.mem_range;
-+ add_physical_memory(start, end);
-+ return 0;
-+}
-+__tagtable(ATAG_MEM, parse_tag_mem);
-
-- pprev = root;
-- cur = *root;
-- while (cur) {
-- pprev = &cur->next;
-- cur = cur->next;
-+static int __init parse_tag_rdimg(struct tag *tag)
-+{
-+#ifdef CONFIG_INITRD
-+ struct tag_mem_range *mem = &tag->u.mem_range;
-+ int ret;
-+
-+ if (initrd_start) {
-+ printk(KERN_WARNING
-+ "Warning: Only the first initrd image will be used\n");
-+ return 0;
- }
-
-- *pprev = new;
-- new->next = NULL;
-+ ret = add_reserved_region(mem->start, mem->start + mem->size - 1,
-+ "initrd");
-+ if (ret) {
-+ printk(KERN_WARNING
-+ "Warning: Failed to reserve initrd memory\n");
-+ return ret;
-+ }
-+
-+ initrd_start = (unsigned long)__va(mem->addr);
-+ initrd_end = initrd_start + mem->size;
-+#else
-+ printk(KERN_WARNING "RAM disk image present, but "
-+ "no initrd support in kernel, ignoring\n");
-+#endif
-
- return 0;
- }
-+__tagtable(ATAG_RDIMG, parse_tag_rdimg);
-
--static int __init parse_tag_mem(struct tag *tag)
-+static int __init parse_tag_rsvd_mem(struct tag *tag)
- {
-- return parse_tag_mem_range(tag, &mem_phys);
-+ struct tag_mem_range *mem = &tag->u.mem_range;
-+
-+ return add_reserved_region(mem->addr, mem->addr + mem->size - 1,
-+ "Reserved");
- }
--__tagtable(ATAG_MEM, parse_tag_mem);
-+__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
-
- static int __init parse_tag_cmdline(struct tag *tag)
- {
-@@ -207,12 +358,6 @@
- }
- __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
-
--static int __init parse_tag_rdimg(struct tag *tag)
--{
-- return parse_tag_mem_range(tag, &mem_ramdisk);
--}
--__tagtable(ATAG_RDIMG, parse_tag_rdimg);
--
- static int __init parse_tag_clock(struct tag *tag)
- {
- /*
-@@ -223,12 +368,6 @@
- }
- __tagtable(ATAG_CLOCK, parse_tag_clock);
-
--static int __init parse_tag_rsvd_mem(struct tag *tag)
--{
-- return parse_tag_mem_range(tag, &mem_reserved);
--}
--__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
--
- /*
- * Scan the tag table for this tag, and call its parse function. The
- * tag table is built by the linker from all the __tagtable
-@@ -260,10 +399,137 @@
- t->hdr.tag);
- }
-
-+/*
-+ * Find a free memory region large enough for storing the
-+ * bootmem bitmap.
-+ */
-+static unsigned long __init
-+find_bootmap_pfn(const struct resource *mem)
-+{
-+ unsigned long bootmap_pages, bootmap_len;
-+ unsigned long node_pages = PFN_UP(mem->end - mem->start + 1);
-+ unsigned long bootmap_start;
-+
-+ bootmap_pages = bootmem_bootmap_pages(node_pages);
-+ bootmap_len = bootmap_pages << PAGE_SHIFT;
-+
-+ /*
-+ * Find a large enough region without reserved pages for
-+ * storing the bootmem bitmap. We can take advantage of the
-+ * fact that all lists have been sorted.
-+ *
-+ * We have to check that we don't collide with any reserved
-+ * regions, which includes the kernel image and any RAMDISK
-+ * images.
-+ */
-+ bootmap_start = find_free_region(mem, bootmap_len, PAGE_SIZE);
-+
-+ return bootmap_start >> PAGE_SHIFT;
-+}
-+
-+#define MAX_LOWMEM HIGHMEM_START
-+#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
-+
-+static void __init setup_bootmem(void)
-+{
-+ unsigned bootmap_size;
-+ unsigned long first_pfn, bootmap_pfn, pages;
-+ unsigned long max_pfn, max_low_pfn;
-+ unsigned node = 0;
-+ struct resource *res;
-+
-+ printk(KERN_INFO "Physical memory:\n");
-+ for (res = system_ram; res; res = res->sibling)
-+ printk(" %08x-%08x\n", res->start, res->end);
-+ printk(KERN_INFO "Reserved memory:\n");
-+ for (res = reserved; res; res = res->sibling)
-+ printk(" %08x-%08x: %s\n",
-+ res->start, res->end, res->name);
-+
-+ nodes_clear(node_online_map);
-+
-+ if (system_ram->sibling)
-+ printk(KERN_WARNING "Only using first memory bank\n");
-+
-+ for (res = system_ram; res; res = NULL) {
-+ first_pfn = PFN_UP(res->start);
-+ max_low_pfn = max_pfn = PFN_DOWN(res->end + 1);
-+ bootmap_pfn = find_bootmap_pfn(res);
-+ if (bootmap_pfn > max_pfn)
-+ panic("No space for bootmem bitmap!\n");
-+
-+ if (max_low_pfn > MAX_LOWMEM_PFN) {
-+ max_low_pfn = MAX_LOWMEM_PFN;
-+#ifndef CONFIG_HIGHMEM
-+ /*
-+ * Lowmem is memory that can be addressed
-+ * directly through P1/P2
-+ */
-+ printk(KERN_WARNING
-+ "Node %u: Only %ld MiB of memory will be used.\n",
-+ node, MAX_LOWMEM >> 20);
-+ printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
-+#else
-+#error HIGHMEM is not supported by AVR32 yet
-+#endif
-+ }
-+
-+ /* Initialize the boot-time allocator with low memory only. */
-+ bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
-+ first_pfn, max_low_pfn);
-+
-+ /*
-+ * Register fully available RAM pages with the bootmem
-+ * allocator.
-+ */
-+ pages = max_low_pfn - first_pfn;
-+ free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
-+ PFN_PHYS(pages));
-+
-+ /* Reserve space for the bootmem bitmap... */
-+ reserve_bootmem_node(NODE_DATA(node),
-+ PFN_PHYS(bootmap_pfn),
-+ bootmap_size);
-+
-+ /* ...and any other reserved regions. */
-+ for (res = reserved; res; res = res->sibling) {
-+ if (res->start > PFN_PHYS(max_pfn))
-+ break;
-+
-+ /*
-+ * resource_init will complain about partial
-+ * overlaps, so we'll just ignore such
-+ * resources for now.
-+ */
-+ if (res->start >= PFN_PHYS(first_pfn)
-+ && res->end < PFN_PHYS(max_pfn))
-+ reserve_bootmem_node(
-+ NODE_DATA(node), res->start,
-+ res->end - res->start + 1);
-+ }
-+
-+ node_set_online(node);
-+ }
-+}
-+
- void __init setup_arch (char **cmdline_p)
- {
- struct clk *cpu_clk;
-
-+ init_mm.start_code = (unsigned long)_text;
-+ init_mm.end_code = (unsigned long)_etext;
-+ init_mm.end_data = (unsigned long)_edata;
-+ init_mm.brk = (unsigned long)_end;
-+
-+ /*
-+ * Include .init section to make allocations easier. It will
-+ * be removed before the resource is actually requested.
-+ */
-+ kernel_code.start = __pa(__init_begin);
-+ kernel_code.end = __pa(init_mm.end_code - 1);
-+ kernel_data.start = __pa(init_mm.end_code);
-+ kernel_data.end = __pa(init_mm.brk - 1);
-+
- parse_tags(bootloader_tags);
-
- setup_processor();
-@@ -289,24 +555,16 @@
- ((cpu_hz + 500) / 1000) % 1000);
- }
-
-- init_mm.start_code = (unsigned long) &_text;
-- init_mm.end_code = (unsigned long) &_etext;
-- init_mm.end_data = (unsigned long) &_edata;
-- init_mm.brk = (unsigned long) &_end;
--
- strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
- *cmdline_p = command_line;
- parse_early_param();
-
- setup_bootmem();
-
-- board_setup_fbmem(fbmem_start, fbmem_size);
--
- #ifdef CONFIG_VT
- conswitchp = &dummy_con;
- #endif
-
- paging_init();
--
- resource_init();
- }
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/time.c avr32-git/arch/avr32/kernel/time.c
---- linux-2.6.21.3/arch/avr32/kernel/time.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/time.c 2007-06-06 11:33:46.000000000 +0200
-@@ -1,5 +1,5 @@
- /*
-- * Copyright (C) 2004-2006 Atmel Corporation
-+ * Copyright (C) 2004-2007 Atmel Corporation
- *
- * Based on MIPS implementation arch/mips/kernel/time.c
- * Copyright 2001 MontaVista Software Inc.
-@@ -20,18 +20,25 @@
- #include <linux/init.h>
- #include <linux/profile.h>
- #include <linux/sysdev.h>
-+#include <linux/err.h>
-
- #include <asm/div64.h>
- #include <asm/sysreg.h>
- #include <asm/io.h>
- #include <asm/sections.h>
-
--static cycle_t read_cycle_count(void)
-+/* how many counter cycles in a jiffy? */
-+static u32 cycles_per_jiffy;
-+
-+/* the count value for the next timer interrupt */
-+static u32 expirelo;
-+
-+cycle_t __weak read_cycle_count(void)
- {
- return (cycle_t)sysreg_read(COUNT);
- }
-
--static struct clocksource clocksource_avr32 = {
-+struct clocksource __weak clocksource_avr32 = {
- .name = "avr32",
- .rating = 350,
- .read = read_cycle_count,
-@@ -40,12 +47,20 @@
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
- };
-
-+irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
-+
-+struct irqaction timer_irqaction = {
-+ .handler = timer_interrupt,
-+ .flags = IRQF_DISABLED,
-+ .name = "timer",
-+};
-+
- /*
- * By default we provide the null RTC ops
- */
- static unsigned long null_rtc_get_time(void)
- {
-- return mktime(2004, 1, 1, 0, 0, 0);
-+ return mktime(2007, 1, 1, 0, 0, 0);
- }
-
- static int null_rtc_set_time(unsigned long sec)
-@@ -56,23 +71,14 @@
- static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
- static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
-
--/* how many counter cycles in a jiffy? */
--static unsigned long cycles_per_jiffy;
--
--/* cycle counter value at the previous timer interrupt */
--static unsigned int timerhi, timerlo;
--
--/* the count value for the next timer interrupt */
--static unsigned int expirelo;
--
- static void avr32_timer_ack(void)
- {
-- unsigned int count;
-+ u32 count;
-
- /* Ack this timer interrupt and set the next one */
- expirelo += cycles_per_jiffy;
-+ /* setting COMPARE to 0 stops the COUNT-COMPARE */
- if (expirelo == 0) {
-- printk(KERN_DEBUG "expirelo == 0\n");
- sysreg_write(COMPARE, expirelo + 1);
- } else {
- sysreg_write(COMPARE, expirelo);
-@@ -86,27 +92,56 @@
- }
- }
-
--static unsigned int avr32_hpt_read(void)
-+int __weak avr32_hpt_init(void)
- {
-- return sysreg_read(COUNT);
-+ int ret;
-+ unsigned long mult, shift, count_hz;
-+
-+ count_hz = clk_get_rate(boot_cpu_data.clk);
-+ shift = clocksource_avr32.shift;
-+ mult = clocksource_hz2mult(count_hz, shift);
-+ clocksource_avr32.mult = mult;
-+
-+ {
-+ u64 tmp;
-+
-+ tmp = TICK_NSEC;
-+ tmp <<= shift;
-+ tmp += mult / 2;
-+ do_div(tmp, mult);
-+
-+ cycles_per_jiffy = tmp;
-+ }
-+
-+ ret = setup_irq(0, &timer_irqaction);
-+ if (ret) {
-+ pr_debug("timer: could not request IRQ 0: %d\n", ret);
-+ return -ENODEV;
-+ }
-+
-+ printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
-+ "%lu.%03lu MHz\n",
-+ ((count_hz + 500) / 1000) / 1000,
-+ ((count_hz + 500) / 1000) % 1000);
-+
-+ return 0;
- }
-
- /*
- * Taken from MIPS c0_hpt_timer_init().
- *
-- * Why is it so complicated, and what is "count"? My assumption is
-- * that `count' specifies the "reference cycle", i.e. the cycle since
-- * reset that should mean "zero". The reason COUNT is written twice is
-- * probably to make sure we don't get any timer interrupts while we
-- * are messing with the counter.
-+ * The reason COUNT is written twice is probably to make sure we don't get any
-+ * timer interrupts while we are messing with the counter.
- */
--static void avr32_hpt_init(unsigned int count)
-+int __weak avr32_hpt_start(void)
- {
-- count = sysreg_read(COUNT) - count;
-+ u32 count = sysreg_read(COUNT);
- expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
- sysreg_write(COUNT, expirelo - cycles_per_jiffy);
- sysreg_write(COMPARE, expirelo);
- sysreg_write(COUNT, count);
-+
-+ return 0;
- }
-
- /*
-@@ -115,26 +150,18 @@
- *
- * In UP mode, it is invoked from the (global) timer_interrupt.
- */
--static void local_timer_interrupt(int irq, void *dev_id)
-+void local_timer_interrupt(int irq, void *dev_id)
- {
- if (current->pid)
- profile_tick(CPU_PROFILING);
- update_process_times(user_mode(get_irq_regs()));
- }
-
--static irqreturn_t
--timer_interrupt(int irq, void *dev_id)
-+irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
- {
-- unsigned int count;
--
- /* ack timer interrupt and try to set next interrupt */
-- count = avr32_hpt_read();
- avr32_timer_ack();
-
-- /* Update timerhi/timerlo for intra-jiffy calibration */
-- timerhi += count < timerlo; /* Wrap around */
-- timerlo = count;
--
- /*
- * Call the generic timer interrupt handler
- */
-@@ -153,60 +180,37 @@
- return IRQ_HANDLED;
- }
-
--static struct irqaction timer_irqaction = {
-- .handler = timer_interrupt,
-- .flags = IRQF_DISABLED,
-- .name = "timer",
--};
--
- void __init time_init(void)
- {
-- unsigned long mult, shift, count_hz;
- int ret;
-
-+ /*
-+ * Make sure we don't get any COMPARE interrupts before we can
-+ * handle them.
-+ */
-+ sysreg_write(COMPARE, 0);
-+
- xtime.tv_sec = rtc_get_time();
- xtime.tv_nsec = 0;
-
- set_normalized_timespec(&wall_to_monotonic,
- -xtime.tv_sec, -xtime.tv_nsec);
-
-- printk("Before time_init: count=%08lx, compare=%08lx\n",
-- (unsigned long)sysreg_read(COUNT),
-- (unsigned long)sysreg_read(COMPARE));
--
-- count_hz = clk_get_rate(boot_cpu_data.clk);
-- shift = clocksource_avr32.shift;
-- mult = clocksource_hz2mult(count_hz, shift);
-- clocksource_avr32.mult = mult;
--
-- printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
--
-- {
-- u64 tmp;
--
-- tmp = TICK_NSEC;
-- tmp <<= shift;
-- tmp += mult / 2;
-- do_div(tmp, mult);
--
-- cycles_per_jiffy = tmp;
-+ ret = avr32_hpt_init();
-+ if (ret) {
-+ pr_debug("timer: failed setup: %d\n", ret);
-+ return;
- }
-
-- /* This sets up the high precision timer for the first interrupt. */
-- avr32_hpt_init(avr32_hpt_read());
--
-- printk("After time_init: count=%08lx, compare=%08lx\n",
-- (unsigned long)sysreg_read(COUNT),
-- (unsigned long)sysreg_read(COMPARE));
--
- ret = clocksource_register(&clocksource_avr32);
- if (ret)
-- printk(KERN_ERR
-- "timer: could not register clocksource: %d\n", ret);
-+ pr_debug("timer: could not register clocksource: %d\n", ret);
-
-- ret = setup_irq(0, &timer_irqaction);
-- if (ret)
-- printk("timer: could not request IRQ 0: %d\n", ret);
-+ ret = avr32_hpt_start();
-+ if (ret) {
-+ pr_debug("timer: failed starting: %d\n", ret);
-+ return;
-+ }
- }
-
- static struct sysdev_class timer_class = {
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/traps.c avr32-git/arch/avr32/kernel/traps.c
---- linux-2.6.21.3/arch/avr32/kernel/traps.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/traps.c 2007-06-06 11:33:46.000000000 +0200
-@@ -5,158 +5,25 @@
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
--#undef DEBUG
--#include <linux/sched.h>
-+
-+#include <linux/bug.h>
- #include <linux/init.h>
--#include <linux/module.h>
- #include <linux/kallsyms.h>
-+#include <linux/module.h>
- #include <linux/notifier.h>
-+#include <linux/sched.h>
-+#include <linux/uaccess.h>
-
--#include <asm/traps.h>
--#include <asm/sysreg.h>
- #include <asm/addrspace.h>
--#include <asm/ocd.h>
- #include <asm/mmu_context.h>
--#include <asm/uaccess.h>
--
--static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
--{
-- unsigned long p;
-- int i;
--
-- printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
--
-- for (p = bottom & ~31; p < top; ) {
-- printk("%04lx: ", p & 0xffff);
--
-- for (i = 0; i < 8; i++, p += 4) {
-- unsigned int val;
--
-- if (p < bottom || p >= top)
-- printk(" ");
-- else {
-- if (__get_user(val, (unsigned int __user *)p)) {
-- printk("\n");
-- goto out;
-- }
-- printk("%08x ", val);
-- }
-- }
-- printk("\n");
-- }
--
--out:
-- return;
--}
--
--static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
--{
-- return (p > (unsigned long)tinfo)
-- && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
--}
--
--#ifdef CONFIG_FRAME_POINTER
--static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
-- struct pt_regs *regs)
--{
-- unsigned long lr, fp;
-- struct thread_info *tinfo;
--
-- tinfo = (struct thread_info *)
-- ((unsigned long)sp & ~(THREAD_SIZE - 1));
--
-- if (regs)
-- fp = regs->r7;
-- else if (tsk == current)
-- asm("mov %0, r7" : "=r"(fp));
-- else
-- fp = tsk->thread.cpu_context.r7;
--
-- /*
-- * Walk the stack as long as the frame pointer (a) is within
-- * the kernel stack of the task, and (b) it doesn't move
-- * downwards.
-- */
-- while (valid_stack_ptr(tinfo, fp)) {
-- unsigned long new_fp;
--
-- lr = *(unsigned long *)fp;
-- printk(" [<%08lx>] ", lr);
-- print_symbol("%s\n", lr);
--
-- new_fp = *(unsigned long *)(fp + 4);
-- if (new_fp <= fp)
-- break;
-- fp = new_fp;
-- }
-- printk("\n");
--}
--#else
--static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
-- struct pt_regs *regs)
--{
-- unsigned long addr;
--
-- while (!kstack_end(sp)) {
-- addr = *sp++;
-- if (kernel_text_address(addr)) {
-- printk(" [<%08lx>] ", addr);
-- print_symbol("%s\n", addr);
-- }
-- }
--}
--#endif
--
--void show_trace(struct task_struct *tsk, unsigned long *sp,
-- struct pt_regs *regs)
--{
-- if (regs &&
-- (((regs->sr & MODE_MASK) == MODE_EXCEPTION) ||
-- ((regs->sr & MODE_MASK) == MODE_USER)))
-- return;
--
-- printk ("Call trace:");
--#ifdef CONFIG_KALLSYMS
-- printk("\n");
--#endif
--
-- __show_trace(tsk, sp, regs);
-- printk("\n");
--}
--
--void show_stack(struct task_struct *tsk, unsigned long *sp)
--{
-- unsigned long stack;
--
-- if (!tsk)
-- tsk = current;
-- if (sp == 0) {
-- if (tsk == current) {
-- register unsigned long *real_sp __asm__("sp");
-- sp = real_sp;
-- } else {
-- sp = (unsigned long *)tsk->thread.cpu_context.ksp;
-- }
-- }
--
-- stack = (unsigned long)sp;
-- dump_mem("Stack: ", stack,
-- THREAD_SIZE + (unsigned long)tsk->thread_info);
-- show_trace(tsk, sp, NULL);
--}
--
--void dump_stack(void)
--{
-- show_stack(NULL, NULL);
--}
--EXPORT_SYMBOL(dump_stack);
-+#include <asm/ocd.h>
-+#include <asm/sysreg.h>
-+#include <asm/traps.h>
-
- ATOMIC_NOTIFIER_HEAD(avr32_die_chain);
-
- int register_die_notifier(struct notifier_block *nb)
- {
-- pr_debug("register_die_notifier: %p\n", nb);
--
- return atomic_notifier_chain_register(&avr32_die_chain, nb);
- }
- EXPORT_SYMBOL(register_die_notifier);
-@@ -169,98 +36,108 @@
-
- static DEFINE_SPINLOCK(die_lock);
-
--void __die(const char *str, struct pt_regs *regs, unsigned long err,
-- const char *file, const char *func, unsigned long line)
-+void NORET_TYPE die(const char *str, struct pt_regs *regs, long err)
- {
-- struct task_struct *tsk = current;
- static int die_counter;
-
- console_verbose();
- spin_lock_irq(&die_lock);
- bust_spinlocks(1);
-
-- printk(KERN_ALERT "%s", str);
-- if (file && func)
-- printk(" in %s:%s, line %ld", file, func, line);
-- printk("[#%d]:\n", ++die_counter);
-- print_modules();
-- show_regs(regs);
-- printk("Process %s (pid: %d, stack limit = 0x%p)\n",
-- tsk->comm, tsk->pid, tsk->thread_info + 1);
--
-- if (!user_mode(regs) || in_interrupt()) {
-- dump_mem("Stack: ", regs->sp,
-- THREAD_SIZE + (unsigned long)tsk->thread_info);
-+ printk(KERN_ALERT "Oops: %s, sig: %ld [#%d]\n" KERN_EMERG,
-+ str, err, ++die_counter);
-+#ifdef CONFIG_PREEMPT
-+ printk("PREEMPT ");
-+#endif
-+#ifdef CONFIG_FRAME_POINTER
-+ printk("FRAME_POINTER ");
-+#endif
-+ if (current_cpu_data.features & AVR32_FEATURE_OCD) {
-+ unsigned long did = __mfdr(DBGREG_DID);
-+ printk("chip: 0x%03lx:0x%04lx rev %lu\n",
-+ (did >> 1) & 0x7ff,
-+ (did >> 12) & 0x7fff,
-+ (did >> 28) & 0xf);
-+ } else {
-+ printk("cpu: arch %u r%u / core %u r%u\n",
-+ current_cpu_data.arch_type,
-+ current_cpu_data.arch_revision,
-+ current_cpu_data.cpu_type,
-+ current_cpu_data.cpu_revision);
- }
-
-+ print_modules();
-+ show_regs_log_lvl(regs, KERN_EMERG);
-+ show_stack_log_lvl(current, regs->sp, regs, KERN_EMERG);
- bust_spinlocks(0);
- spin_unlock_irq(&die_lock);
-- do_exit(SIGSEGV);
-+
-+ if (in_interrupt())
-+ panic("Fatal exception in interrupt");
-+
-+ if (panic_on_oops)
-+ panic("Fatal exception");
-+
-+ do_exit(err);
- }
-
--void __die_if_kernel(const char *str, struct pt_regs *regs, unsigned long err,
-- const char *file, const char *func, unsigned long line)
-+void _exception(long signr, struct pt_regs *regs, int code,
-+ unsigned long addr)
- {
-+ siginfo_t info;
-+
- if (!user_mode(regs))
-- __die(str, regs, err, file, func, line);
--}
-+ die("Unhandled exception in kernel mode", regs, signr);
-+
-+ memset(&info, 0, sizeof(info));
-+ info.si_signo = signr;
-+ info.si_code = code;
-+ info.si_addr = (void __user *)addr;
-+ force_sig_info(signr, &info, current);
-
--asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
--{
--#ifdef CONFIG_SUBARCH_AVR32B
- /*
-- * The exception entry always saves RSR_EX. For NMI, this is
-- * wrong; it should be RSR_NMI
-+ * Init gets no signals that it doesn't have a handler for.
-+ * That's all very well, but if it has caused a synchronous
-+ * exception and we ignore the resulting signal, it will just
-+ * generate the same exception over and over again and we get
-+ * nowhere. Better to kill it and let the kernel panic.
- */
-- regs->sr = sysreg_read(RSR_NMI);
--#endif
-+ if (is_init(current)) {
-+ __sighandler_t handler;
-
-- printk("NMI taken!!!!\n");
-- die("NMI", regs, ecr);
-- BUG();
-+ spin_lock_irq(¤t->sighand->siglock);
-+ handler = current->sighand->action[signr-1].sa.sa_handler;
-+ spin_unlock_irq(¤t->sighand->siglock);
-+ if (handler == SIG_DFL) {
-+ /* init has generated a synchronous exception
-+ and it doesn't have a handler for the signal */
-+ printk(KERN_CRIT "init has generated signal %ld "
-+ "but has no handler for it\n", signr);
-+ do_exit(signr);
-+ }
-+ }
-+}
-+
-+asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
-+{
-+ printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
-+ show_regs_log_lvl(regs, KERN_ALERT);
-+ show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
- }
-
- asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
- {
-- printk("Unable to handle critical exception %lu at pc = %08lx!\n",
-- ecr, regs->pc);
-- die("Oops", regs, ecr);
-- BUG();
-+ die("Critical exception", regs, SIGKILL);
- }
-
- asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs)
- {
-- siginfo_t info;
--
-- die_if_kernel("Oops: Address exception in kernel mode", regs, ecr);
--
--#ifdef DEBUG
-- if (ecr == ECR_ADDR_ALIGN_X)
-- pr_debug("Instruction Address Exception at pc = %08lx\n",
-- regs->pc);
-- else if (ecr == ECR_ADDR_ALIGN_R)
-- pr_debug("Data Address Exception (Read) at pc = %08lx\n",
-- regs->pc);
-- else if (ecr == ECR_ADDR_ALIGN_W)
-- pr_debug("Data Address Exception (Write) at pc = %08lx\n",
-- regs->pc);
-- else
-- BUG();
--
-- show_regs(regs);
--#endif
--
-- info.si_signo = SIGBUS;
-- info.si_errno = 0;
-- info.si_code = BUS_ADRALN;
-- info.si_addr = (void __user *)regs->pc;
--
-- force_sig_info(SIGBUS, &info, current);
-+ _exception(SIGBUS, regs, BUS_ADRALN, regs->pc);
- }
-
- /* This way of handling undefined instructions is stolen from ARM */
- static LIST_HEAD(undef_hook);
--static spinlock_t undef_lock = SPIN_LOCK_UNLOCKED;
-+static DEFINE_SPINLOCK(undef_lock);
-
- void register_undef_hook(struct undef_hook *hook)
- {
-@@ -280,7 +157,8 @@
- {
- int cop_nr;
- u32 cpucr;
-- if ( (insn & 0xfdf00000) == 0xf1900000 )
-+
-+ if ((insn & 0xfdf00000) == 0xf1900000)
- /* LDC0 */
- cop_nr = 0;
- else
-@@ -292,136 +170,91 @@
- sysreg_write(CPUCR, cpucr);
-
- cpucr = sysreg_read(CPUCR);
-- if ( !(cpucr & (1 << (24 + cop_nr))) ){
-- printk("Coprocessor #%i not found!\n", cop_nr);
-- return -1;
-- }
-+ if (!(cpucr & (1 << (24 + cop_nr))))
-+ return -ENODEV;
-
- return 0;
- }
-
--#ifdef CONFIG_BUG
--#ifdef CONFIG_DEBUG_BUGVERBOSE
--static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
--{
-- char *file;
-- u16 line;
-- char c;
--
-- if (__get_user(line, (u16 __user *)(regs->pc + 2)))
-- return;
-- if (__get_user(file, (char * __user *)(regs->pc + 4))
-- || (unsigned long)file < PAGE_OFFSET
-- || __get_user(c, file))
-- file = "<bad filename>";
--
-- printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
--}
--#else
--static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
-+int is_valid_bugaddr(unsigned long pc)
- {
-+ unsigned short opcode;
-+
-+ if (pc < PAGE_OFFSET)
-+ return 0;
-+ if (probe_kernel_address((u16 *)pc, opcode))
-+ return 0;
-
-+ return opcode == AVR32_BUG_OPCODE;
- }
--#endif
--#endif
-
- asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs)
- {
- u32 insn;
- struct undef_hook *hook;
-- siginfo_t info;
- void __user *pc;
-+ long code;
-
-- if (!user_mode(regs))
-- goto kernel_trap;
-+ if (!user_mode(regs) && (ecr == ECR_ILLEGAL_OPCODE)) {
-+ enum bug_trap_type type;
-+
-+ type = report_bug(regs->pc);
-+ switch (type) {
-+ case BUG_TRAP_TYPE_NONE:
-+ break;
-+ case BUG_TRAP_TYPE_WARN:
-+ regs->pc += 2;
-+ return;
-+ case BUG_TRAP_TYPE_BUG:
-+ die("Kernel BUG", regs, SIGKILL);
-+ }
-+ }
-
- local_irq_enable();
-
-- pc = (void __user *)instruction_pointer(regs);
-- if (__get_user(insn, (u32 __user *)pc))
-- goto invalid_area;
-+ if (user_mode(regs)) {
-+ pc = (void __user *)instruction_pointer(regs);
-+ if (get_user(insn, (u32 __user *)pc))
-+ goto invalid_area;
-
-- if (ecr == ECR_COPROC_ABSENT) {
-- if (do_cop_absent(insn) == 0)
-+ if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn))
- return;
-- }
-
-- spin_lock_irq(&undef_lock);
-- list_for_each_entry(hook, &undef_hook, node) {
-- if ((insn & hook->insn_mask) == hook->insn_val) {
-- if (hook->fn(regs, insn) == 0) {
-- spin_unlock_irq(&undef_lock);
-- return;
-+ spin_lock_irq(&undef_lock);
-+ list_for_each_entry(hook, &undef_hook, node) {
-+ if ((insn & hook->insn_mask) == hook->insn_val) {
-+ if (hook->fn(regs, insn) == 0) {
-+ spin_unlock_irq(&undef_lock);
-+ return;
-+ }
- }
- }
-+ spin_unlock_irq(&undef_lock);
- }
-- spin_unlock_irq(&undef_lock);
--
--invalid_area:
-
--#ifdef DEBUG
-- printk("Illegal instruction at pc = %08lx\n", regs->pc);
-- if (regs->pc < TASK_SIZE) {
-- unsigned long ptbr, pgd, pte, *p;
--
-- ptbr = sysreg_read(PTBR);
-- p = (unsigned long *)ptbr;
-- pgd = p[regs->pc >> 22];
-- p = (unsigned long *)((pgd & 0x1ffff000) | 0x80000000);
-- pte = p[(regs->pc >> 12) & 0x3ff];
-- printk("page table: 0x%08lx -> 0x%08lx -> 0x%08lx\n", ptbr, pgd, pte);
-- }
--#endif
--
-- info.si_signo = SIGILL;
-- info.si_errno = 0;
-- info.si_addr = (void __user *)regs->pc;
- switch (ecr) {
-- case ECR_ILLEGAL_OPCODE:
-- case ECR_UNIMPL_INSTRUCTION:
-- info.si_code = ILL_ILLOPC;
-- break;
- case ECR_PRIVILEGE_VIOLATION:
-- info.si_code = ILL_PRVOPC;
-+ code = ILL_PRVOPC;
- break;
- case ECR_COPROC_ABSENT:
-- info.si_code = ILL_COPROC;
-+ code = ILL_COPROC;
- break;
- default:
-- BUG();
-+ code = ILL_ILLOPC;
-+ break;
- }
-
-- force_sig_info(SIGILL, &info, current);
-+ _exception(SIGILL, regs, code, regs->pc);
- return;
-
--kernel_trap:
--#ifdef CONFIG_BUG
-- if (__kernel_text_address(instruction_pointer(regs))) {
-- insn = *(u16 *)instruction_pointer(regs);
-- if (insn == AVR32_BUG_OPCODE) {
-- do_bug_verbose(regs, insn);
-- die("Kernel BUG", regs, 0);
-- return;
-- }
-- }
--#endif
--
-- die("Oops: Illegal instruction in kernel code", regs, ecr);
-+invalid_area:
-+ _exception(SIGSEGV, regs, SEGV_MAPERR, regs->pc);
- }
-
- asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs)
- {
-- siginfo_t info;
--
-- printk("Floating-point exception at pc = %08lx\n", regs->pc);
--
-- /* We have no FPU... */
-- info.si_signo = SIGILL;
-- info.si_errno = 0;
-- info.si_addr = (void __user *)regs->pc;
-- info.si_code = ILL_COPROC;
--
-- force_sig_info(SIGILL, &info, current);
-+ /* We have no FPU yet */
-+ _exception(SIGILL, regs, ILL_COPROC, regs->pc);
- }
-
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/vmlinux.lds.c avr32-git/arch/avr32/kernel/vmlinux.lds.c
---- linux-2.6.21.3/arch/avr32/kernel/vmlinux.lds.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/kernel/vmlinux.lds.c 2007-06-06 11:33:46.000000000 +0200
-@@ -26,10 +26,16 @@
- _sinittext = .;
- *(.text.reset)
- *(.init.text)
-+ /*
-+ * .exit.text is discarded at runtime, not
-+ * link time, to deal with references from
-+ * __bug_table
-+ */
-+ *(.exit.text)
- _einittext = .;
- . = ALIGN(4);
- __tagtable_begin = .;
-- *(.taglist)
-+ *(.taglist.init)
- __tagtable_end = .;
- *(.init.data)
- . = ALIGN(16);
-@@ -86,6 +92,8 @@
- __stop___ex_table = .;
- }
-
-+ BUG_TABLE
-+
- RODATA
-
- . = ALIGN(8192);
-@@ -126,7 +134,6 @@
- * thrown away, as cleanup code is never called unless it's a module.
- */
- /DISCARD/ : {
-- *(.exit.text)
- *(.exit.data)
- *(.exitcall.exit)
- }
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/at32ap7000.c avr32-git/arch/avr32/mach-at32ap/at32ap7000.c
---- linux-2.6.21.3/arch/avr32/mach-at32ap/at32ap7000.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mach-at32ap/at32ap7000.c 2007-06-06 11:33:46.000000000 +0200
-@@ -6,6 +6,7 @@
- * published by the Free Software Foundation.
- */
- #include <linux/clk.h>
-+#include <linux/fb.h>
- #include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
-@@ -17,7 +18,10 @@
- #include <asm/arch/portmux.h>
- #include <asm/arch/sm.h>
-
-+#include <video/atmel_lcdc.h>
-+
- #include "clock.h"
-+#include "hmatrix.h"
- #include "pio.h"
- #include "sm.h"
-
-@@ -416,7 +420,15 @@
- .resource = sm_resource,
- .num_resources = ARRAY_SIZE(sm_resource),
- };
--DEV_CLK(pclk, at32_sm, pbb, 0);
-+static struct clk at32_sm_pclk = {
-+ .name = "pclk",
-+ .dev = &at32_sm_device.dev,
-+ .parent = &pbb_clk,
-+ .mode = pbb_clk_mode,
-+ .get_rate = pbb_clk_get_rate,
-+ .users = 1,
-+ .index = 0,
-+};
-
- static struct resource intc0_resource[] = {
- PBMEM(0xfff00400),
-@@ -442,6 +454,7 @@
- .mode = hsb_clk_mode,
- .get_rate = hsb_clk_get_rate,
- .users = 1,
-+ .index = 3,
- };
-
- static struct resource smc0_resource[] = {
-@@ -466,6 +479,68 @@
- .users = 1,
- };
-
-+static struct resource dmaca0_resource[] = {
-+ {
-+ .start = 0xff200000,
-+ .end = 0xff20ffff,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ IRQ(2),
-+};
-+DEFINE_DEV(dmaca, 0);
-+DEV_CLK(hclk, dmaca0, hsb, 10);
-+
-+/* --------------------------------------------------------------------
-+ * HMATRIX
-+ * -------------------------------------------------------------------- */
-+
-+static struct clk hmatrix_clk = {
-+ .name = "hmatrix_clk",
-+ .parent = &pbb_clk,
-+ .mode = pbb_clk_mode,
-+ .get_rate = pbb_clk_get_rate,
-+ .index = 2,
-+ .users = 1,
-+};
-+#define HMATRIX_BASE ((void __iomem *)0xfff00800)
-+
-+#define hmatrix_readl(reg) \
-+ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
-+#define hmatrix_writel(reg,value) \
-+ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
-+
-+/*
-+ * Set bits in the HMATRIX Special Function Register (SFR) used by the
-+ * External Bus Interface (EBI). This can be used to enable special
-+ * features like CompactFlash support, NAND Flash support, etc. on
-+ * certain chipselects.
-+ */
-+static inline void set_ebi_sfr_bits(u32 mask)
-+{
-+ u32 sfr;
-+
-+ clk_enable(&hmatrix_clk);
-+ sfr = hmatrix_readl(SFR4);
-+ sfr |= mask;
-+ hmatrix_writel(SFR4, sfr);
-+ clk_disable(&hmatrix_clk);
-+}
-+
-+/* --------------------------------------------------------------------
-+ * System Timer/Counter (TC)
-+ * -------------------------------------------------------------------- */
-+static struct resource at32_systc0_resource[] = {
-+ PBMEM(0xfff00c00),
-+ IRQ(22),
-+};
-+struct platform_device at32_systc0_device = {
-+ .name = "systc",
-+ .id = 0,
-+ .resource = at32_systc0_resource,
-+ .num_resources = ARRAY_SIZE(at32_systc0_resource),
-+};
-+DEV_CLK(pclk, at32_systc0, pbb, 3);
-+
- /* --------------------------------------------------------------------
- * PIO
- * -------------------------------------------------------------------- */
-@@ -513,6 +588,9 @@
- platform_device_register(&at32_intc0_device);
- platform_device_register(&smc0_device);
- platform_device_register(&pdc_device);
-+ platform_device_register(&dmaca0_device);
-+
-+ platform_device_register(&at32_systc0_device);
-
- platform_device_register(&pio0_device);
- platform_device_register(&pio1_device);
-@@ -816,22 +894,105 @@
- }
-
- /* --------------------------------------------------------------------
-+ * TWI
-+ * -------------------------------------------------------------------- */
-+
-+static struct resource atmel_twi0_resource[] = {
-+ PBMEM(0xffe00800),
-+ IRQ(5),
-+};
-+DEFINE_DEV(atmel_twi, 0);
-+DEV_CLK(pclk,atmel_twi0,pba,2);
-+
-+struct platform_device *__init
-+at32_add_device_twi(unsigned int id)
-+{
-+ struct platform_device *pdev;
-+
-+ switch (id) {
-+ case 0:
-+ pdev = &atmel_twi0_device;
-+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
-+ select_peripheral(PA(7), PERIPH_A, 0); /* SCL */
-+ break;
-+
-+ default:
-+ return NULL;
-+ }
-+
-+ platform_device_register(pdev);
-+ return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ * MMC
-+ * -------------------------------------------------------------------- */
-+static struct mci_platform_data atmel_mci0_data = {
-+ .detect_pin = GPIO_PIN_NONE,
-+ .wp_pin = GPIO_PIN_NONE,
-+};
-+static struct resource atmel_mci0_resource[] = {
-+ PBMEM(0xfff02400),
-+ IRQ(28),
-+};
-+DEFINE_DEV_DATA(atmel_mci, 0);
-+DEV_CLK(mci_clk, atmel_mci0, pbb, 9);
-+
-+struct platform_device *__init
-+at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
-+{
-+ struct platform_device *pdev;
-+
-+ switch (id) {
-+ case 0:
-+ pdev = &atmel_mci0_device;
-+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
-+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
-+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
-+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
-+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
-+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
-+ break;
-+ default:
-+ return NULL;
-+ }
-+
-+ if (data) {
-+ if (data->detect_pin != GPIO_PIN_NONE)
-+ at32_select_gpio(data->detect_pin, 0);
-+ if (data->wp_pin != GPIO_PIN_NONE)
-+ at32_select_gpio(data->wp_pin, 0);
-+ memcpy(pdev->dev.platform_data, data,
-+ sizeof(struct mci_platform_data));
-+ }
-+
-+ platform_device_register(pdev);
-+ return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
- * LCDC
- * -------------------------------------------------------------------- */
--static struct lcdc_platform_data lcdc0_data;
--static struct resource lcdc0_resource[] = {
-+static struct atmel_lcdfb_info atmel_lcdfb0_data;
-+static struct resource atmel_lcdfb0_resource[] = {
- {
- .start = 0xff000000,
- .end = 0xff000fff,
- .flags = IORESOURCE_MEM,
- },
- IRQ(1),
-+ {
-+ /* Placeholder for pre-allocated fb memory */
-+ .start = 0x00000000,
-+ .end = 0x00000000,
-+ .flags = 0,
-+ },
- };
--DEFINE_DEV_DATA(lcdc, 0);
--DEV_CLK(hclk, lcdc0, hsb, 7);
--static struct clk lcdc0_pixclk = {
-- .name = "pixclk",
-- .dev = &lcdc0_device.dev,
-+DEFINE_DEV_DATA(atmel_lcdfb, 0);
-+DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
-+static struct clk atmel_lcdfb0_pixclk = {
-+ .name = "lcdc_clk",
-+ .dev = &atmel_lcdfb0_device.dev,
- .mode = genclk_mode,
- .get_rate = genclk_get_rate,
- .set_rate = genclk_set_rate,
-@@ -840,13 +1001,34 @@
- };
-
- struct platform_device *__init
--at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data)
-+at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
-+ unsigned long fbmem_start, unsigned long fbmem_len)
- {
- struct platform_device *pdev;
-+ struct atmel_lcdfb_info *info;
-+ struct fb_monspecs *monspecs;
-+ struct fb_videomode *modedb;
-+ unsigned int modedb_size;
-+
-+ /*
-+ * Do a deep copy of the fb data, monspecs and modedb. Make
-+ * sure all allocations are done before setting up the
-+ * portmux.
-+ */
-+ monspecs = kmemdup(data->default_monspecs,
-+ sizeof(struct fb_monspecs), GFP_KERNEL);
-+ if (!monspecs)
-+ return NULL;
-+
-+ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
-+ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
-+ if (!modedb)
-+ goto err_dup_modedb;
-+ monspecs->modedb = modedb;
-
- switch (id) {
- case 0:
-- pdev = &lcdc0_device;
-+ pdev = &atmel_lcdfb0_device;
- select_peripheral(PC(19), PERIPH_A, 0); /* CC */
- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
-@@ -879,16 +1061,133 @@
- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
-
-- clk_set_parent(&lcdc0_pixclk, &pll0);
-- clk_set_rate(&lcdc0_pixclk, clk_get_rate(&pll0));
-+ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
-+ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
-+ break;
-+
-+ default:
-+ goto err_invalid_id;
-+ }
-+
-+ if (fbmem_len) {
-+ pdev->resource[2].start = fbmem_start;
-+ pdev->resource[2].end = fbmem_start + fbmem_len - 1;
-+ pdev->resource[2].flags = IORESOURCE_MEM;
-+ }
-+
-+ info = pdev->dev.platform_data;
-+ memcpy(info, data, sizeof(struct atmel_lcdfb_info));
-+ info->default_monspecs = monspecs;
-+
-+ platform_device_register(pdev);
-+ return pdev;
-+
-+err_invalid_id:
-+ kfree(modedb);
-+err_dup_modedb:
-+ kfree(monspecs);
-+ return NULL;
-+}
-+
-+/* --------------------------------------------------------------------
-+ * USB Device Controller
-+ * -------------------------------------------------------------------- */
-+static struct resource usba0_resource[] = {
-+ {
-+ .start = 0xff300000,
-+ .end = 0xff3fffff,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ PBMEM(0xfff03000),
-+ IRQ(31),
-+};
-+DEFINE_DEV(usba, 0);
-+DEV_CLK(pclk, usba0, pbb, 12);
-+DEV_CLK(hclk, usba0, hsb, 6);
-+
-+struct platform_device *__init at32_add_device_usba(unsigned int id)
-+{
-+ struct platform_device *pdev;
-+
-+ switch (id) {
-+ case 0:
-+ pdev = &usba0_device;
-+ /* USB pads are not multiplexed */
- break;
-+ default:
-+ return NULL;
-+ }
-+
-+ platform_device_register(pdev);
-+ return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ * AC97C
-+ * -------------------------------------------------------------------- */
-+static struct resource atmel_ac97c0_resource[] = {
-+ PBMEM(0xfff02800),
-+ IRQ(29),
-+};
-+DEFINE_DEV(atmel_ac97c, 0);
-+DEV_CLK(pclk, atmel_ac97c0, pbb, 10);
-
-+struct platform_device *__init
-+at32_add_device_ac97c(unsigned int id)
-+{
-+ struct platform_device *pdev;
-+
-+ switch (id) {
-+ case 0:
-+ pdev = &atmel_ac97c0_device;
-+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
-+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
-+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
-+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
-+ break;
- default:
- return NULL;
- }
-
-- memcpy(pdev->dev.platform_data, data,
-- sizeof(struct lcdc_platform_data));
-+ platform_device_register(pdev);
-+ return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ * DAC
-+ * -------------------------------------------------------------------- */
-+static struct resource abdac0_resource[] = {
-+ PBMEM(0xfff02000),
-+ IRQ(27),
-+};
-+DEFINE_DEV(abdac, 0);
-+DEV_CLK(pclk, abdac0, pbb, 8);
-+static struct clk abdac0_sample_clk = {
-+ .name = "sample_clk",
-+ .dev = &abdac0_device.dev,
-+ .mode = genclk_mode,
-+ .get_rate = genclk_get_rate,
-+ .set_rate = genclk_set_rate,
-+ .set_parent = genclk_set_parent,
-+ .index = 6,
-+};
-+
-+struct platform_device *__init
-+at32_add_device_abdac(unsigned int id)
-+{
-+ struct platform_device *pdev;
-+
-+ switch (id) {
-+ case 0:
-+ pdev = &abdac0_device;
-+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
-+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
-+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
-+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
-+ break;
-+ default:
-+ return NULL;
-+ }
-
- platform_device_register(pdev);
- return pdev;
-@@ -950,18 +1249,21 @@
- &pbb_clk,
- &at32_sm_pclk,
- &at32_intc0_pclk,
-+ &hmatrix_clk,
- &ebi_clk,
- &hramc_clk,
- &smc0_pclk,
- &smc0_mck,
- &pdc_hclk,
- &pdc_pclk,
-+ &dmaca0_hclk,
- &pico_clk,
- &pio0_mck,
- &pio1_mck,
- &pio2_mck,
- &pio3_mck,
- &pio4_mck,
-+ &at32_systc0_pclk,
- &atmel_usart0_usart,
- &atmel_usart1_usart,
- &atmel_usart2_usart,
-@@ -972,8 +1274,15 @@
- &macb1_pclk,
- &atmel_spi0_spi_clk,
- &atmel_spi1_spi_clk,
-- &lcdc0_hclk,
-- &lcdc0_pixclk,
-+ &atmel_twi0_pclk,
-+ &atmel_mci0_mci_clk,
-+ &atmel_lcdfb0_hck1,
-+ &atmel_lcdfb0_pixclk,
-+ &usba0_pclk,
-+ &usba0_hclk,
-+ &atmel_ac97c0_pclk,
-+ &abdac0_pclk,
-+ &abdac0_sample_clk,
- &gclk0,
- &gclk1,
- &gclk2,
-@@ -1012,7 +1321,8 @@
- genclk_init_parent(&gclk2);
- genclk_init_parent(&gclk3);
- genclk_init_parent(&gclk4);
-- genclk_init_parent(&lcdc0_pixclk);
-+ genclk_init_parent(&atmel_lcdfb0_pixclk);
-+ genclk_init_parent(&abdac0_sample_clk);
-
- /*
- * Turn on all clocks that have at least one user already, and
-@@ -1024,6 +1334,9 @@
- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
- struct clk *clk = at32_clock_list[i];
-
-+ if (clk->users == 0)
-+ continue;
-+
- if (clk->mode == &cpu_clk_mode)
- cpu_mask |= 1 << clk->index;
- else if (clk->mode == &hsb_clk_mode)
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/clock.c avr32-git/arch/avr32/mach-at32ap/clock.c
---- linux-2.6.21.3/arch/avr32/mach-at32ap/clock.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mach-at32ap/clock.c 2007-06-06 11:33:46.000000000 +0200
-@@ -18,7 +18,7 @@
-
- #include "clock.h"
-
--static spinlock_t clk_lock = SPIN_LOCK_UNLOCKED;
-+static DEFINE_SPINLOCK(clk_lock);
-
- struct clk *clk_get(struct device *dev, const char *id)
- {
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/hmatrix.h avr32-git/arch/avr32/mach-at32ap/hmatrix.h
---- linux-2.6.21.3/arch/avr32/mach-at32ap/hmatrix.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/mach-at32ap/hmatrix.h 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,182 @@
-+/*
-+ * Register definitions for High-Speed Bus Matrix
-+ */
-+#ifndef __HMATRIX_H
-+#define __HMATRIX_H
-+
-+/* HMATRIX register offsets */
-+#define HMATRIX_MCFG0 0x0000
-+#define HMATRIX_MCFG1 0x0004
-+#define HMATRIX_MCFG2 0x0008
-+#define HMATRIX_MCFG3 0x000c
-+#define HMATRIX_MCFG4 0x0010
-+#define HMATRIX_MCFG5 0x0014
-+#define HMATRIX_MCFG6 0x0018
-+#define HMATRIX_MCFG7 0x001c
-+#define HMATRIX_MCFG8 0x0020
-+#define HMATRIX_MCFG9 0x0024
-+#define HMATRIX_MCFG10 0x0028
-+#define HMATRIX_MCFG11 0x002c
-+#define HMATRIX_MCFG12 0x0030
-+#define HMATRIX_MCFG13 0x0034
-+#define HMATRIX_MCFG14 0x0038
-+#define HMATRIX_MCFG15 0x003c
-+#define HMATRIX_SCFG0 0x0040
-+#define HMATRIX_SCFG1 0x0044
-+#define HMATRIX_SCFG2 0x0048
-+#define HMATRIX_SCFG3 0x004c
-+#define HMATRIX_SCFG4 0x0050
-+#define HMATRIX_SCFG5 0x0054
-+#define HMATRIX_SCFG6 0x0058
-+#define HMATRIX_SCFG7 0x005c
-+#define HMATRIX_SCFG8 0x0060
-+#define HMATRIX_SCFG9 0x0064
-+#define HMATRIX_SCFG10 0x0068
-+#define HMATRIX_SCFG11 0x006c
-+#define HMATRIX_SCFG12 0x0070
-+#define HMATRIX_SCFG13 0x0074
-+#define HMATRIX_SCFG14 0x0078
-+#define HMATRIX_SCFG15 0x007c
-+#define HMATRIX_PRAS0 0x0080
-+#define HMATRIX_PRBS0 0x0084
-+#define HMATRIX_PRAS1 0x0088
-+#define HMATRIX_PRBS1 0x008c
-+#define HMATRIX_PRAS2 0x0090
-+#define HMATRIX_PRBS2 0x0094
-+#define HMATRIX_PRAS3 0x0098
-+#define HMATRIX_PRBS3 0x009c
-+#define HMATRIX_PRAS4 0x00a0
-+#define HMATRIX_PRBS4 0x00a4
-+#define HMATRIX_PRAS5 0x00a8
-+#define HMATRIX_PRBS5 0x00ac
-+#define HMATRIX_PRAS6 0x00b0
-+#define HMATRIX_PRBS6 0x00b4
-+#define HMATRIX_PRAS7 0x00b8
-+#define HMATRIX_PRBS7 0x00bc
-+#define HMATRIX_PRAS8 0x00c0
-+#define HMATRIX_PRBS8 0x00c4
-+#define HMATRIX_PRAS9 0x00c8
-+#define HMATRIX_PRBS9 0x00cc
-+#define HMATRIX_PRAS10 0x00d0
-+#define HMATRIX_PRBS10 0x00d4
-+#define HMATRIX_PRAS11 0x00d8
-+#define HMATRIX_PRBS11 0x00dc
-+#define HMATRIX_PRAS12 0x00e0
-+#define HMATRIX_PRBS12 0x00e4
-+#define HMATRIX_PRAS13 0x00e8
-+#define HMATRIX_PRBS13 0x00ec
-+#define HMATRIX_PRAS14 0x00f0
-+#define HMATRIX_PRBS14 0x00f4
-+#define HMATRIX_PRAS15 0x00f8
-+#define HMATRIX_PRBS15 0x00fc
-+#define HMATRIX_MRCR 0x0100
-+#define HMATRIX_SFR0 0x0110
-+#define HMATRIX_SFR1 0x0114
-+#define HMATRIX_SFR2 0x0118
-+#define HMATRIX_SFR3 0x011c
-+#define HMATRIX_SFR4 0x0120
-+#define HMATRIX_SFR5 0x0124
-+#define HMATRIX_SFR6 0x0128
-+#define HMATRIX_SFR7 0x012c
-+#define HMATRIX_SFR8 0x0130
-+#define HMATRIX_SFR9 0x0134
-+#define HMATRIX_SFR10 0x0138
-+#define HMATRIX_SFR11 0x013c
-+#define HMATRIX_SFR12 0x0140
-+#define HMATRIX_SFR13 0x0144
-+#define HMATRIX_SFR14 0x0148
-+#define HMATRIX_SFR15 0x014c
-+
-+/* Bitfields in MCFGx */
-+#define HMATRIX_ULBT_OFFSET 0
-+#define HMATRIX_ULBT_SIZE 3
-+
-+/* Bitfields in SCFGx */
-+#define HMATRIX_SLOT_CYCLE_OFFSET 0
-+#define HMATRIX_SLOT_CYCLE_SIZE 8
-+#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
-+#define HMATRIX_DEFMSTR_TYPE_SIZE 2
-+#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
-+#define HMATRIX_FIXED_DEFMSTR_SIZE 4
-+#define HMATRIX_ARBT_OFFSET 24
-+#define HMATRIX_ARBT_SIZE 2
-+
-+/* Bitfields in PRASx */
-+#define HMATRIX_M0PR_OFFSET 0
-+#define HMATRIX_M0PR_SIZE 4
-+#define HMATRIX_M1PR_OFFSET 4
-+#define HMATRIX_M1PR_SIZE 4
-+#define HMATRIX_M2PR_OFFSET 8
-+#define HMATRIX_M2PR_SIZE 4
-+#define HMATRIX_M3PR_OFFSET 12
-+#define HMATRIX_M3PR_SIZE 4
-+#define HMATRIX_M4PR_OFFSET 16
-+#define HMATRIX_M4PR_SIZE 4
-+#define HMATRIX_M5PR_OFFSET 20
-+#define HMATRIX_M5PR_SIZE 4
-+#define HMATRIX_M6PR_OFFSET 24
-+#define HMATRIX_M6PR_SIZE 4
-+#define HMATRIX_M7PR_OFFSET 28
-+#define HMATRIX_M7PR_SIZE 4
-+
-+/* Bitfields in PRBSx */
-+#define HMATRIX_M8PR_OFFSET 0
-+#define HMATRIX_M8PR_SIZE 4
-+#define HMATRIX_M9PR_OFFSET 4
-+#define HMATRIX_M9PR_SIZE 4
-+#define HMATRIX_M10PR_OFFSET 8
-+#define HMATRIX_M10PR_SIZE 4
-+#define HMATRIX_M11PR_OFFSET 12
-+#define HMATRIX_M11PR_SIZE 4
-+#define HMATRIX_M12PR_OFFSET 16
-+#define HMATRIX_M12PR_SIZE 4
-+#define HMATRIX_M13PR_OFFSET 20
-+#define HMATRIX_M13PR_SIZE 4
-+#define HMATRIX_M14PR_OFFSET 24
-+#define HMATRIX_M14PR_SIZE 4
-+#define HMATRIX_M15PR_OFFSET 28
-+#define HMATRIX_M15PR_SIZE 4
-+
-+/* Bitfields in SFR4 */
-+#define HMATRIX_CS1A_OFFSET 1
-+#define HMATRIX_CS1A_SIZE 1
-+#define HMATRIX_CS3A_OFFSET 3
-+#define HMATRIX_CS3A_SIZE 1
-+#define HMATRIX_CS4A_OFFSET 4
-+#define HMATRIX_CS4A_SIZE 1
-+#define HMATRIX_CS5A_OFFSET 5
-+#define HMATRIX_CS5A_SIZE 1
-+#define HMATRIX_DBPUC_OFFSET 8
-+#define HMATRIX_DBPUC_SIZE 1
-+
-+/* Constants for ULBT */
-+#define HMATRIX_ULBT_INFINITE 0
-+#define HMATRIX_ULBT_SINGLE 1
-+#define HMATRIX_ULBT_FOUR_BEAT 2
-+#define HMATRIX_ULBT_EIGHT_BEAT 3
-+#define HMATRIX_ULBT_SIXTEEN_BEAT 4
-+
-+/* Constants for DEFMSTR_TYPE */
-+#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
-+#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
-+#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
-+
-+/* Constants for ARBT */
-+#define HMATRIX_ARBT_ROUND_ROBIN 0
-+#define HMATRIX_ARBT_FIXED_PRIORITY 1
-+
-+/* Bit manipulation macros */
-+#define HMATRIX_BIT(name) \
-+ (1 << HMATRIX_##name##_OFFSET)
-+#define HMATRIX_BF(name,value) \
-+ (((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
-+ << HMATRIX_##name##_OFFSET)
-+#define HMATRIX_BFEXT(name,value) \
-+ (((value) >> HMATRIX_##name##_OFFSET) \
-+ & ((1 << HMATRIX_##name##_SIZE) - 1))
-+#define HMATRIX_BFINS(name,value,old) \
-+ (((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
-+ << HMATRIX_##name##_OFFSET)) \
-+ | HMATRIX_BF(name,value))
-+
-+#endif /* __HMATRIX_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/hsmc.c avr32-git/arch/avr32/mach-at32ap/hsmc.c
---- linux-2.6.21.3/arch/avr32/mach-at32ap/hsmc.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mach-at32ap/hsmc.c 2007-06-06 11:33:46.000000000 +0200
-@@ -75,12 +75,35 @@
- return -EINVAL;
- }
-
-+ switch (config->nwait_mode) {
-+ case 0:
-+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
-+ break;
-+ case 1:
-+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
-+ break;
-+ case 2:
-+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
-+ break;
-+ case 3:
-+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ if (config->tdf_cycles) {
-+ mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
-+ }
-+
- if (config->nrd_controlled)
- mode |= HSMC_BIT(READ_MODE);
- if (config->nwe_controlled)
- mode |= HSMC_BIT(WRITE_MODE);
- if (config->byte_write)
- mode |= HSMC_BIT(BAT);
-+ if (config->tdf_mode)
-+ mode |= HSMC_BIT(TDF_MODE);
-
- pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
- cs, setup, pulse, cycle, mode);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/Kconfig avr32-git/arch/avr32/mach-at32ap/Kconfig
---- linux-2.6.21.3/arch/avr32/mach-at32ap/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/mach-at32ap/Kconfig 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,31 @@
-+if PLATFORM_AT32AP
-+
-+menu "Atmel AVR32 AP options"
-+
-+choice
-+ prompt "AT32AP7000 static memory bus width"
-+ depends on CPU_AT32AP7000
-+ default AP7000_16_BIT_SMC
-+ help
-+ Define the width of the AP7000 external static memory interface.
-+ This is used to determine how to mangle the address and/or data
-+ when doing little-endian port access.
-+
-+ The current code can only support a single external memory bus
-+ width for all chip selects, excluding the flash (which is using
-+ raw access and is thus not affected by any of this.)
-+
-+config AP7000_32_BIT_SMC
-+ bool "32 bit"
-+
-+config AP7000_16_BIT_SMC
-+ bool "16 bit"
-+
-+config AP7000_8_BIT_SMC
-+ bool "8 bit"
-+
-+endchoice
-+
-+endmenu
-+
-+endif # PLATFORM_AT32AP
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/Makefile avr32-git/arch/avr32/mach-at32ap/Makefile
---- linux-2.6.21.3/arch/avr32/mach-at32ap/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mach-at32ap/Makefile 2007-06-06 11:33:46.000000000 +0200
-@@ -1,2 +1,3 @@
- obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
- obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
-+obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/time-tc.c avr32-git/arch/avr32/mach-at32ap/time-tc.c
---- linux-2.6.21.3/arch/avr32/mach-at32ap/time-tc.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/arch/avr32/mach-at32ap/time-tc.c 2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1,218 @@
-+/*
-+ * Copyright (C) 2004-2007 Atmel Corporation
-+ *
-+ * Based on MIPS implementation arch/mips/kernel/time.c
-+ * Copyright 2001 MontaVista Software Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/clocksource.h>
-+#include <linux/time.h>
-+#include <linux/module.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/kernel_stat.h>
-+#include <linux/errno.h>
-+#include <linux/init.h>
-+#include <linux/profile.h>
-+#include <linux/sysdev.h>
-+#include <linux/err.h>
-+
-+#include <asm/div64.h>
-+#include <asm/sysreg.h>
-+#include <asm/io.h>
-+#include <asm/sections.h>
-+
-+#include <asm/arch/time.h>
-+
-+/* how many counter cycles in a jiffy? */
-+static u32 cycles_per_jiffy;
-+
-+/* the count value for the next timer interrupt */
-+static u32 expirelo;
-+
-+/* the I/O registers of the TC module */
-+static void __iomem *ioregs;
-+
-+cycle_t read_cycle_count(void)
-+{
-+ return (cycle_t)timer_read(ioregs, 0, CV);
-+}
-+
-+struct clocksource clocksource_avr32 = {
-+ .name = "avr32",
-+ .rating = 342,
-+ .read = read_cycle_count,
-+ .mask = CLOCKSOURCE_MASK(16),
-+ .shift = 16,
-+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-+};
-+
-+static void avr32_timer_ack(void)
-+{
-+ u16 count = expirelo;
-+
-+ /* Ack this timer interrupt and set the next one, use a u16
-+ * variable so it will wrap around correctly */
-+ count += cycles_per_jiffy;
-+ expirelo = count;
-+ timer_write(ioregs, 0, RC, expirelo);
-+
-+ /* Check to see if we have missed any timer interrupts */
-+ count = timer_read(ioregs, 0, CV);
-+ if ((count - expirelo) < 0x7fff) {
-+ expirelo = count + cycles_per_jiffy;
-+ timer_write(ioregs, 0, RC, expirelo);
-+ }
-+}
-+
-+u32 avr32_hpt_read(void)
-+{
-+ return timer_read(ioregs, 0, CV);
-+}
-+
-+static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
-+{
-+ unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
-+ unsigned int divs[] = { 4, 8, 16, 32 };
-+ int divs_size = sizeof(divs) / sizeof(*divs);
-+ int i = 0;
-+ unsigned long count_hz;
-+ unsigned long shift;
-+ unsigned long mult;
-+ int clock_div = -1;
-+ u64 tmp;
-+
-+ shift = clocksource_avr32.shift;
-+
-+ do {
-+ count_hz = clk_get_rate(pclk) / divs[i];
-+ mult = clocksource_hz2mult(count_hz, shift);
-+ clocksource_avr32.mult = mult;
-+
-+ tmp = TICK_NSEC;
-+ tmp <<= shift;
-+ tmp += mult / 2;
-+ do_div(tmp, mult);
-+
-+ cycles_per_jiffy = tmp;
-+ } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
-+
-+ clock_div = i + 1;
-+
-+ if (clock_div > divs_size) {
-+ pr_debug("timer: could not calculate clock divider\n");
-+ return -EFAULT;
-+ }
-+
-+ /* Set the clock divider */
-+ timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
-+
-+ return 0;
-+}
-+
-+int avr32_hpt_init(unsigned int count)
-+{
-+ struct resource *regs;
-+ struct clk *pclk;
-+ int irq = -1;
-+ int ret = 0;
-+
-+ ret = -ENXIO;
-+
-+ irq = platform_get_irq(&at32_systc0_device, 0);
-+ if (irq < 0) {
-+ pr_debug("timer: could not get irq\n");
-+ goto out_error;
-+ }
-+
-+ pclk = clk_get(&at32_systc0_device.dev, "pclk");
-+ if (IS_ERR(pclk)) {
-+ pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
-+ goto out_error;
-+ }
-+ clk_enable(pclk);
-+
-+ regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
-+ if (!regs) {
-+ pr_debug("timer: could not get resource\n");
-+ goto out_error_clk;
-+ }
-+
-+ ioregs = ioremap(regs->start, regs->end - regs->start + 1);
-+ if (!ioregs) {
-+ pr_debug("timer: could not get ioregs\n");
-+ goto out_error_clk;
-+ }
-+
-+ ret = avr32_timer_calc_div_and_set_jiffies(pclk);
-+ if (ret)
-+ goto out_error_io;
-+
-+ ret = setup_irq(irq, &timer_irqaction);
-+ if (ret) {
-+ pr_debug("timer: could not request irq %d: %d\n",
-+ irq, ret);
-+ goto out_error_io;
-+ }
-+
-+ expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
-+ * cycles_per_jiffy;
-+
-+ /* Enable clock and interrupts on RC compare */
-+ timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
-+ timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
-+ /* Set cycles to first interrupt */
-+ timer_write(ioregs, 0, RC, expirelo);
-+
-+ printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
-+ ioregs, irq);
-+
-+ return 0;
-+
-+out_error_io:
-+ iounmap(ioregs);
-+out_error_clk:
-+ clk_put(pclk);
-+out_error:
-+ return ret;
-+}
-+
-+int avr32_hpt_start(void)
-+{
-+ timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
-+ return 0;
-+}
-+
-+irqreturn_t timer_interrupt(int irq, void *dev_id)
-+{
-+ unsigned int sr = timer_read(ioregs, 0, SR);
-+
-+ if (sr & TIMER_BIT(SR_CPCS)) {
-+ /* ack timer interrupt and try to set next interrupt */
-+ avr32_timer_ack();
-+
-+ /*
-+ * Call the generic timer interrupt handler
-+ */
-+ write_seqlock(&xtime_lock);
-+ do_timer(1);
-+ write_sequnlock(&xtime_lock);
-+
-+ /*
-+ * In UP mode, we call local_timer_interrupt() to do profiling
-+ * and process accounting.
-+ *
-+ * SMP is not supported yet.
-+ */
-+ local_timer_interrupt(irq, dev_id);
-+
-+ return IRQ_HANDLED;
-+ }
-+
-+ return IRQ_NONE;
-+}
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/Makefile avr32-git/arch/avr32/Makefile
---- linux-2.6.21.3/arch/avr32/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/Makefile 2007-06-06 11:33:46.000000000 +0200
-@@ -16,7 +16,7 @@
- CFLAGS_MODULE += -mno-relax
- LDFLAGS_vmlinux += --relax
-
--cpuflags-$(CONFIG_CPU_AP7000) += -mcpu=ap7000
-+cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000
-
- CFLAGS += $(cpuflags-y)
- AFLAGS += $(cpuflags-y)
-@@ -27,9 +27,11 @@
- head-y += arch/avr32/kernel/head.o
- core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/
- core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
-+core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
- core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
- core-y += arch/avr32/kernel/
- core-y += arch/avr32/mm/
-+drivers-y += arch/avr32/drivers/
- libs-y += arch/avr32/lib/
-
- archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/dma-coherent.c avr32-git/arch/avr32/mm/dma-coherent.c
---- linux-2.6.21.3/arch/avr32/mm/dma-coherent.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mm/dma-coherent.c 2007-06-06 11:33:46.000000000 +0200
-@@ -112,16 +112,21 @@
- }
- EXPORT_SYMBOL(dma_free_coherent);
-
--#if 0
- void *dma_alloc_writecombine(struct device *dev, size_t size,
- dma_addr_t *handle, gfp_t gfp)
- {
- struct page *page;
-+ dma_addr_t phys;
-
- page = __dma_alloc(dev, size, handle, gfp);
-+ if (!page)
-+ return NULL;
-+
-+ phys = page_to_phys(page);
-+ *handle = phys;
-
- /* Now, map the page into P3 with write-combining turned on */
-- return __ioremap(page_to_phys(page), size, _PAGE_BUFFER);
-+ return __ioremap(phys, size, _PAGE_BUFFER);
- }
- EXPORT_SYMBOL(dma_alloc_writecombine);
-
-@@ -132,8 +137,7 @@
-
- iounmap(cpu_addr);
-
-- page = bus_to_page(handle);
-+ page = phys_to_page(handle);
- __dma_free(dev, size, page, handle);
- }
- EXPORT_SYMBOL(dma_free_writecombine);
--#endif
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/fault.c avr32-git/arch/avr32/mm/fault.c
---- linux-2.6.21.3/arch/avr32/mm/fault.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mm/fault.c 2007-06-06 11:33:46.000000000 +0200
-@@ -12,73 +12,46 @@
- #include <linux/mm.h>
- #include <linux/module.h>
- #include <linux/pagemap.h>
-+#include <linux/kprobes.h>
-
- #include <asm/kdebug.h>
- #include <asm/mmu_context.h>
- #include <asm/sysreg.h>
--#include <asm/uaccess.h>
- #include <asm/tlb.h>
--
--#ifdef DEBUG
--static void dump_code(unsigned long pc)
--{
-- char *p = (char *)pc;
-- char val;
-- int i;
--
--
-- printk(KERN_DEBUG "Code:");
-- for (i = 0; i < 16; i++) {
-- if (__get_user(val, p + i))
-- break;
-- printk(" %02x", val);
-- }
-- printk("\n");
--}
--#endif
-+#include <asm/uaccess.h>
-
- #ifdef CONFIG_KPROBES
--ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
--
--/* Hook to register for page fault notifications */
--int register_page_fault_notifier(struct notifier_block *nb)
-+static inline int notify_page_fault(struct pt_regs *regs, int trap)
- {
-- return atomic_notifier_chain_register(¬ify_page_fault_chain, nb);
--}
-+ int ret = 0;
-
--int unregister_page_fault_notifier(struct notifier_block *nb)
--{
-- return atomic_notifier_chain_unregister(¬ify_page_fault_chain, nb);
--}
-+ if (!user_mode(regs)) {
-+ if (kprobe_running() && kprobe_fault_handler(regs, trap))
-+ ret = 1;
-+ }
-
--static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
-- int trap, int sig)
--{
-- struct die_args args = {
-- .regs = regs,
-- .trapnr = trap,
-- };
-- return atomic_notifier_call_chain(¬ify_page_fault_chain, val, &args);
-+ return ret;
- }
- #else
--static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
-- int trap, int sig)
-+static inline int notify_page_fault(struct pt_regs *regs, int trap)
- {
-- return NOTIFY_DONE;
-+ return 0;
- }
- #endif
-
-+int exception_trace = 1;
-+
- /*
- * This routine handles page faults. It determines the address and the
- * problem, and then passes it off to one of the appropriate routines.
- *
- * ecr is the Exception Cause Register. Possible values are:
-- * 5: Page not found (instruction access)
- * 6: Protection fault (instruction access)
-- * 12: Page not found (read access)
-- * 13: Page not found (write access)
-- * 14: Protection fault (read access)
-- * 15: Protection fault (write access)
-+ * 15: Protection fault (read access)
-+ * 16: Protection fault (write access)
-+ * 20: Page not found (instruction access)
-+ * 24: Page not found (read access)
-+ * 28: Page not found (write access)
- */
- asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
- {
-@@ -88,10 +61,11 @@
- const struct exception_table_entry *fixup;
- unsigned long address;
- unsigned long page;
-- int writeaccess = 0;
-+ int writeaccess;
-+ long signr;
-+ int code;
-
-- if (notify_page_fault(DIE_PAGE_FAULT, regs,
-- ecr, SIGSEGV) == NOTIFY_STOP)
-+ if (notify_page_fault(regs, ecr))
- return;
-
- address = sysreg_read(TLBEAR);
-@@ -99,6 +73,9 @@
- tsk = current;
- mm = tsk->mm;
-
-+ signr = SIGSEGV;
-+ code = SEGV_MAPERR;
-+
- /*
- * If we're in an interrupt or have no user context, we must
- * not take the fault...
-@@ -125,7 +102,9 @@
- * can handle it...
- */
- good_area:
-- //pr_debug("good area: vm_flags = 0x%lx\n", vma->vm_flags);
-+ code = SEGV_ACCERR;
-+ writeaccess = 0;
-+
- switch (ecr) {
- case ECR_PROTECTION_X:
- case ECR_TLB_MISS_X:
-@@ -176,46 +155,24 @@
- * map. Fix it, but check if it's kernel or user first...
- */
- bad_area:
-- pr_debug("Bad area [%s:%u]: addr %08lx, ecr %lu\n",
-- tsk->comm, tsk->pid, address, ecr);
--
- up_read(&mm->mmap_sem);
-
- if (user_mode(regs)) {
-- /* Hmm...we have to pass address and ecr somehow... */
-- /* tsk->thread.address = address;
-- tsk->thread.error_code = ecr; */
--#ifdef DEBUG
-- show_regs(regs);
-- dump_code(regs->pc);
--
-- page = sysreg_read(PTBR);
-- printk("ptbr = %08lx", page);
-- if (page) {
-- page = ((unsigned long *)page)[address >> 22];
-- printk(" pgd = %08lx", page);
-- if (page & _PAGE_PRESENT) {
-- page &= PAGE_MASK;
-- address &= 0x003ff000;
-- page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
-- printk(" pte = %08lx\n", page);
-- }
-- }
--#endif
-- pr_debug("Sending SIGSEGV to PID %d...\n",
-- tsk->pid);
-- force_sig(SIGSEGV, tsk);
-+ if (exception_trace && printk_ratelimit())
-+ printk("%s%s[%d]: segfault at %08lx pc %08lx "
-+ "sp %08lx ecr %lu\n",
-+ is_init(tsk) ? KERN_EMERG : KERN_INFO,
-+ tsk->comm, tsk->pid, address, regs->pc,
-+ regs->sp, ecr);
-+ _exception(SIGSEGV, regs, code, address);
- return;
- }
-
- no_context:
-- pr_debug("No context\n");
--
- /* Are we prepared to handle this kernel fault? */
- fixup = search_exception_tables(regs->pc);
- if (fixup) {
- regs->pc = fixup->fixup;
-- pr_debug("Found fixup at %08lx\n", fixup->fixup);
- return;
- }
-
-@@ -230,7 +187,6 @@
- printk(KERN_ALERT
- "Unable to handle kernel paging request");
- printk(" at virtual address %08lx\n", address);
-- printk(KERN_ALERT "pc = %08lx\n", regs->pc);
-
- page = sysreg_read(PTBR);
- printk(KERN_ALERT "ptbr = %08lx", page);
-@@ -241,20 +197,20 @@
- page &= PAGE_MASK;
- address &= 0x003ff000;
- page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
-- printk(" pte = %08lx\n", page);
-+ printk(" pte = %08lx", page);
- }
- }
-- die("\nOops", regs, ecr);
-- do_exit(SIGKILL);
-+ printk("\n");
-+ die("Kernel access of bad area", regs, signr);
-+ return;
-
- /*
- * We ran out of memory, or some other thing happened to us
- * that made us unable to handle the page fault gracefully.
- */
- out_of_memory:
-- printk("Out of memory\n");
- up_read(&mm->mmap_sem);
-- if (current->pid == 1) {
-+ if (is_init(current)) {
- yield();
- down_read(&mm->mmap_sem);
- goto survive;
-@@ -267,21 +223,20 @@
- do_sigbus:
- up_read(&mm->mmap_sem);
-
-- /*
-- * Send a sigbus, regardless of whether we were in kernel or
-- * user mode.
-- */
-- /* address, error_code, trap_no, ... */
--#ifdef DEBUG
-- show_regs(regs);
-- dump_code(regs->pc);
--#endif
-- pr_debug("Sending SIGBUS to PID %d...\n", tsk->pid);
-- force_sig(SIGBUS, tsk);
--
- /* Kernel mode? Handle exceptions or die */
-+ signr = SIGBUS;
-+ code = BUS_ADRERR;
- if (!user_mode(regs))
- goto no_context;
-+
-+ if (exception_trace)
-+ printk("%s%s[%d]: bus error at %08lx pc %08lx "
-+ "sp %08lx ecr %lu\n",
-+ is_init(tsk) ? KERN_EMERG : KERN_INFO,
-+ tsk->comm, tsk->pid, address, regs->pc,
-+ regs->sp, ecr);
-+
-+ _exception(SIGBUS, regs, BUS_ADRERR, address);
- }
-
- asmlinkage void do_bus_error(unsigned long addr, int write_access,
-@@ -292,8 +247,7 @@
- addr, write_access ? "write" : "read");
- printk(KERN_INFO "DTLB dump:\n");
- dump_dtlb();
-- die("Bus Error", regs, write_access);
-- do_exit(SIGKILL);
-+ die("Bus Error", regs, SIGKILL);
- }
-
- /*
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/init.c avr32-git/arch/avr32/mm/init.c
---- linux-2.6.21.3/arch/avr32/mm/init.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/arch/avr32/mm/init.c 2007-06-06 11:33:46.000000000 +0200
-@@ -10,11 +10,9 @@
- #include <linux/mm.h>
- #include <linux/swap.h>
- #include <linux/init.h>
--#include <linux/initrd.h>
- #include <linux/mmzone.h>
- #include <linux/bootmem.h>
- #include <linux/pagemap.h>
--#include <linux/pfn.h>
- #include <linux/nodemask.h>
-
- #include <asm/page.h>
-@@ -78,242 +76,6 @@
- printk ("%d pages swap cached\n", cached);
- }
-
--static void __init print_memory_map(const char *what,
-- struct tag_mem_range *mem)
--{
-- printk ("%s:\n", what);
-- for (; mem; mem = mem->next) {
-- printk (" %08lx - %08lx\n",
-- (unsigned long)mem->addr,
-- (unsigned long)(mem->addr + mem->size));
-- }
--}
--
--#define MAX_LOWMEM HIGHMEM_START
--#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
--
--/*
-- * Sort a list of memory regions in-place by ascending address.
-- *
-- * We're using bubble sort because we only have singly linked lists
-- * with few elements.
-- */
--static void __init sort_mem_list(struct tag_mem_range **pmem)
--{
-- int done;
-- struct tag_mem_range **a, **b;
--
-- if (!*pmem)
-- return;
--
-- do {
-- done = 1;
-- a = pmem, b = &(*pmem)->next;
-- while (*b) {
-- if ((*a)->addr > (*b)->addr) {
-- struct tag_mem_range *tmp;
-- tmp = (*b)->next;
-- (*b)->next = *a;
-- *a = *b;
-- *b = tmp;
-- done = 0;
-- }
-- a = &(*a)->next;
-- b = &(*a)->next;
-- }
-- } while (!done);
--}
--
--/*
-- * Find a free memory region large enough for storing the
-- * bootmem bitmap.
-- */
--static unsigned long __init
--find_bootmap_pfn(const struct tag_mem_range *mem)
--{
-- unsigned long bootmap_pages, bootmap_len;
-- unsigned long node_pages = PFN_UP(mem->size);
-- unsigned long bootmap_addr = mem->addr;
-- struct tag_mem_range *reserved = mem_reserved;
-- struct tag_mem_range *ramdisk = mem_ramdisk;
-- unsigned long kern_start = virt_to_phys(_stext);
-- unsigned long kern_end = virt_to_phys(_end);
--
-- bootmap_pages = bootmem_bootmap_pages(node_pages);
-- bootmap_len = bootmap_pages << PAGE_SHIFT;
--
-- /*
-- * Find a large enough region without reserved pages for
-- * storing the bootmem bitmap. We can take advantage of the
-- * fact that all lists have been sorted.
-- *
-- * We have to check explicitly reserved regions as well as the
-- * kernel image and any RAMDISK images...
-- *
-- * Oh, and we have to make sure we don't overwrite the taglist
-- * since we're going to use it until the bootmem allocator is
-- * fully up and running.
-- */
-- while (1) {
-- if ((bootmap_addr < kern_end) &&
-- ((bootmap_addr + bootmap_len) > kern_start))
-- bootmap_addr = kern_end;
--
-- while (reserved &&
-- (bootmap_addr >= (reserved->addr + reserved->size)))
-- reserved = reserved->next;
--
-- if (reserved &&
-- ((bootmap_addr + bootmap_len) >= reserved->addr)) {
-- bootmap_addr = reserved->addr + reserved->size;
-- continue;
-- }
--
-- while (ramdisk &&
-- (bootmap_addr >= (ramdisk->addr + ramdisk->size)))
-- ramdisk = ramdisk->next;
--
-- if (!ramdisk ||
-- ((bootmap_addr + bootmap_len) < ramdisk->addr))
-- break;
--
-- bootmap_addr = ramdisk->addr + ramdisk->size;
-- }
--
-- if ((PFN_UP(bootmap_addr) + bootmap_len) >= (mem->addr + mem->size))
-- return ~0UL;
--
-- return PFN_UP(bootmap_addr);
--}
--
--void __init setup_bootmem(void)
--{
-- unsigned bootmap_size;
-- unsigned long first_pfn, bootmap_pfn, pages;
-- unsigned long max_pfn, max_low_pfn;
-- unsigned long kern_start = virt_to_phys(_stext);
-- unsigned long kern_end = virt_to_phys(_end);
-- unsigned node = 0;
-- struct tag_mem_range *bank, *res;
--
-- sort_mem_list(&mem_phys);
-- sort_mem_list(&mem_reserved);
--
-- print_memory_map("Physical memory", mem_phys);
-- print_memory_map("Reserved memory", mem_reserved);
--
-- nodes_clear(node_online_map);
--
-- if (mem_ramdisk) {
--#ifdef CONFIG_BLK_DEV_INITRD
-- initrd_start = (unsigned long)__va(mem_ramdisk->addr);
-- initrd_end = initrd_start + mem_ramdisk->size;
--
-- print_memory_map("RAMDISK images", mem_ramdisk);
-- if (mem_ramdisk->next)
-- printk(KERN_WARNING
-- "Warning: Only the first RAMDISK image "
-- "will be used\n");
-- sort_mem_list(&mem_ramdisk);
--#else
-- printk(KERN_WARNING "RAM disk image present, but "
-- "no initrd support in kernel!\n");
--#endif
-- }
--
-- if (mem_phys->next)
-- printk(KERN_WARNING "Only using first memory bank\n");
--
-- for (bank = mem_phys; bank; bank = NULL) {
-- first_pfn = PFN_UP(bank->addr);
-- max_low_pfn = max_pfn = PFN_DOWN(bank->addr + bank->size);
-- bootmap_pfn = find_bootmap_pfn(bank);
-- if (bootmap_pfn > max_pfn)
-- panic("No space for bootmem bitmap!\n");
--
-- if (max_low_pfn > MAX_LOWMEM_PFN) {
-- max_low_pfn = MAX_LOWMEM_PFN;
--#ifndef CONFIG_HIGHMEM
-- /*
-- * Lowmem is memory that can be addressed
-- * directly through P1/P2
-- */
-- printk(KERN_WARNING
-- "Node %u: Only %ld MiB of memory will be used.\n",
-- node, MAX_LOWMEM >> 20);
-- printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
--#else
--#error HIGHMEM is not supported by AVR32 yet
--#endif
-- }
--
-- /* Initialize the boot-time allocator with low memory only. */
-- bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
-- first_pfn, max_low_pfn);
--
-- printk("Node %u: bdata = %p, bdata->node_bootmem_map = %p\n",
-- node, NODE_DATA(node)->bdata,
-- NODE_DATA(node)->bdata->node_bootmem_map);
--
-- /*
-- * Register fully available RAM pages with the bootmem
-- * allocator.
-- */
-- pages = max_low_pfn - first_pfn;
-- free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
-- PFN_PHYS(pages));
--
-- /*
-- * Reserve space for the kernel image (if present in
-- * this node)...
-- */
-- if ((kern_start >= PFN_PHYS(first_pfn)) &&
-- (kern_start < PFN_PHYS(max_pfn))) {
-- printk("Node %u: Kernel image %08lx - %08lx\n",
-- node, kern_start, kern_end);
-- reserve_bootmem_node(NODE_DATA(node), kern_start,
-- kern_end - kern_start);
-- }
--
-- /* ...the bootmem bitmap... */
-- reserve_bootmem_node(NODE_DATA(node),
-- PFN_PHYS(bootmap_pfn),
-- bootmap_size);
--
-- /* ...any RAMDISK images... */
-- for (res = mem_ramdisk; res; res = res->next) {
-- if (res->addr > PFN_PHYS(max_pfn))
-- break;
--
-- if (res->addr >= PFN_PHYS(first_pfn)) {
-- printk("Node %u: RAMDISK %08lx - %08lx\n",
-- node,
-- (unsigned long)res->addr,
-- (unsigned long)(res->addr + res->size));
-- reserve_bootmem_node(NODE_DATA(node),
-- res->addr, res->size);
-- }
-- }
--
-- /* ...and any other reserved regions. */
-- for (res = mem_reserved; res; res = res->next) {
-- if (res->addr > PFN_PHYS(max_pfn))
-- break;
--
-- if (res->addr >= PFN_PHYS(first_pfn)) {
-- printk("Node %u: Reserved %08lx - %08lx\n",
-- node,
-- (unsigned long)res->addr,
-- (unsigned long)(res->addr + res->size));
-- reserve_bootmem_node(NODE_DATA(node),
-- res->addr, res->size);
-- }
-- }
--
-- node_set_online(node);
-- }
--}
--
- /*
- * paging_init() sets up the page tables
- *
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/atmeltwi.h avr32-git/drivers/i2c/busses/atmeltwi.h
---- linux-2.6.21.3/drivers/i2c/busses/atmeltwi.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/i2c/busses/atmeltwi.h 2007-06-06 11:33:51.000000000 +0200
-@@ -0,0 +1,117 @@
-+/*
-+ * Register definitions for the Atmel Two-Wire Interface
-+ */
-+
-+#ifndef __ASM_AVR32_TWI_H__
-+#define __ASM_AVR32_TWI_H__
-+
-+/* TWI register offsets */
-+#define TWI_CR 0x0000
-+#define TWI_MMR 0x0004
-+#define TWI_SMR 0x0008
-+#define TWI_IADR 0x000c
-+#define TWI_CWGR 0x0010
-+#define TWI_SR 0x0020
-+#define TWI_IER 0x0024
-+#define TWI_IDR 0x0028
-+#define TWI_IMR 0x002c
-+#define TWI_RHR 0x0030
-+#define TWI_THR 0x0034
-+
-+/* Bitfields in CR */
-+#define TWI_START_OFFSET 0
-+#define TWI_START_SIZE 1
-+#define TWI_STOP_OFFSET 1
-+#define TWI_STOP_SIZE 1
-+#define TWI_MSEN_OFFSET 2
-+#define TWI_MSEN_SIZE 1
-+#define TWI_MSDIS_OFFSET 3
-+#define TWI_MSDIS_SIZE 1
-+#define TWI_SVEN_OFFSET 4
-+#define TWI_SVEN_SIZE 1
-+#define TWI_SVDIS_OFFSET 5
-+#define TWI_SVDIS_SIZE 1
-+#define TWI_SWRST_OFFSET 7
-+#define TWI_SWRST_SIZE 1
-+
-+/* Bitfields in MMR */
-+#define TWI_IADRSZ_OFFSET 8
-+#define TWI_IADRSZ_SIZE 2
-+#define TWI_MREAD_OFFSET 12
-+#define TWI_MREAD_SIZE 1
-+#define TWI_DADR_OFFSET 16
-+#define TWI_DADR_SIZE 7
-+
-+/* Bitfields in SMR */
-+#define TWI_SADR_OFFSET 16
-+#define TWI_SADR_SIZE 7
-+
-+/* Bitfields in IADR */
-+#define TWI_IADR_OFFSET 0
-+#define TWI_IADR_SIZE 24
-+
-+/* Bitfields in CWGR */
-+#define TWI_CLDIV_OFFSET 0
-+#define TWI_CLDIV_SIZE 8
-+#define TWI_CHDIV_OFFSET 8
-+#define TWI_CHDIV_SIZE 8
-+#define TWI_CKDIV_OFFSET 16
-+#define TWI_CKDIV_SIZE 3
-+
-+/* Bitfields in SR */
-+#define TWI_TXCOMP_OFFSET 0
-+#define TWI_TXCOMP_SIZE 1
-+#define TWI_RXRDY_OFFSET 1
-+#define TWI_RXRDY_SIZE 1
-+#define TWI_TXRDY_OFFSET 2
-+#define TWI_TXRDY_SIZE 1
-+#define TWI_SVDIR_OFFSET 3
-+#define TWI_SVDIR_SIZE 1
-+#define TWI_SVACC_OFFSET 4
-+#define TWI_SVACC_SIZE 1
-+#define TWI_GCACC_OFFSET 5
-+#define TWI_GCACC_SIZE 1
-+#define TWI_OVRE_OFFSET 6
-+#define TWI_OVRE_SIZE 1
-+#define TWI_UNRE_OFFSET 7
-+#define TWI_UNRE_SIZE 1
-+#define TWI_NACK_OFFSET 8
-+#define TWI_NACK_SIZE 1
-+#define TWI_ARBLST_OFFSET 9
-+#define TWI_ARBLST_SIZE 1
-+
-+/* Bitfields in RHR */
-+#define TWI_RXDATA_OFFSET 0
-+#define TWI_RXDATA_SIZE 8
-+
-+/* Bitfields in THR */
-+#define TWI_TXDATA_OFFSET 0
-+#define TWI_TXDATA_SIZE 8
-+
-+/* Constants for IADRSZ */
-+#define TWI_IADRSZ_NO_ADDR 0
-+#define TWI_IADRSZ_ONE_BYTE 1
-+#define TWI_IADRSZ_TWO_BYTES 2
-+#define TWI_IADRSZ_THREE_BYTES 3
-+
-+/* Bit manipulation macros */
-+#define TWI_BIT(name) \
-+ (1 << TWI_##name##_OFFSET)
-+#define TWI_BF(name,value) \
-+ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \
-+ << TWI_##name##_OFFSET)
-+#define TWI_BFEXT(name,value) \
-+ (((value) >> TWI_##name##_OFFSET) \
-+ & ((1 << TWI_##name##_SIZE) - 1))
-+#define TWI_BFINS(name,value,old) \
-+ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \
-+ << TWI_##name##_OFFSET)) \
-+ | TWI_BF(name,value))
-+
-+/* Register access macros */
-+#define twi_readl(port,reg) \
-+ __raw_readl((port)->regs + TWI_##reg)
-+#define twi_writel(port,reg,value) \
-+ __raw_writel((value), (port)->regs + TWI_##reg)
-+
-+#endif /* __ASM_AVR32_TWI_H__ */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/i2c-atmeltwi.c avr32-git/drivers/i2c/busses/i2c-atmeltwi.c
---- linux-2.6.21.3/drivers/i2c/busses/i2c-atmeltwi.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/i2c/busses/i2c-atmeltwi.c 2007-06-06 11:33:51.000000000 +0200
-@@ -0,0 +1,348 @@
-+/*
-+ * i2c Support for Atmel's Two-Wire Interface (TWI)
-+ *
-+ * Based on the work of Copyright (C) 2004 Rick Bronson
-+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
-+ * Ported to AVR32 and heavily modified by Espen Krangnes <ekrangnes at atmel.com>
-+ *
-+ * Copyright (C) 2006 Atmel Corporation
-+ *
-+ * Borrowed heavily from the original work by:
-+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+
-+#include <linux/err.h>
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/i2c.h>
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/platform_device.h>
-+#include <linux/completion.h>
-+#include <asm/io.h>
-+#include <linux/time.h>
-+#include "atmeltwi.h"
-+
-+static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE;
-+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
-+MODULE_PARM_DESC(baudrate, "The TWI baudrate");
-+
-+
-+struct atmel_twi {
-+ void __iomem *regs;
-+ struct i2c_adapter adapter;
-+ struct clk *pclk;
-+ spinlock_t lock;
-+ struct completion comp;
-+ u32 intmask;
-+ u8 *buf;
-+ u8 len;
-+ u8 acks_left;
-+ unsigned int irq;
-+
-+};
-+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
-+
-+/*
-+ * Initialize the TWI hardware registers.
-+ */
-+static int __devinit twi_hwinit(struct atmel_twi *twi)
-+{
-+ unsigned long cdiv, ckdiv=0;
-+
-+ twi_writel(twi, IDR, ~0UL);
-+ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/
-+ twi_readl(twi, SR);
-+
-+ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
-+
-+ while (cdiv > 255) {
-+ ckdiv++;
-+ cdiv = cdiv >> 1;
-+ }
-+
-+ if (ckdiv > 7)
-+ return -EINVAL;
-+ else
-+ twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv)
-+ | TWI_BF(CHDIV, cdiv)
-+ | TWI_BF(CLDIV, cdiv)));
-+ return 0;
-+}
-+
-+/*
-+ * Waits for the i2c status register to set the specified bitmask
-+ * Returns 0 if timed out (~100ms).
-+ */
-+static short twi_wait_for_completion(struct atmel_twi *twi,
-+ u32 mask)
-+{
-+ int timeout = msecs_to_jiffies(100);
-+
-+ twi->intmask = mask;
-+ init_completion(&twi->comp);
-+
-+ twi_writel(twi, IER, mask);
-+
-+ if(!wait_for_completion_timeout(&twi->comp, timeout))
-+ return -ETIMEDOUT;
-+
-+ return 0;
-+}
-+
-+/*
-+ * Generic i2c master transfer entrypoint.
-+ */
-+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
-+{
-+ struct atmel_twi *twi = to_atmel_twi(adap);
-+ struct i2c_msg *pmsg;
-+ int i;
-+
-+ /* get first message */
-+ pmsg = msgs;
-+
-+ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
-+
-+ for (i = 0; i < num; i++, pmsg++) {
-+
-+ twi->len = pmsg->len;
-+ twi->buf = pmsg->buf;
-+ twi->acks_left = pmsg->len;
-+ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
-+ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
-+ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
-+
-+ dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n",
-+ i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing",
-+ pmsg->len > 1 ? "s" : "",
-+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
-+
-+ /* enable */
-+ twi_writel(twi, CR, TWI_BIT(MSEN));
-+
-+ if (pmsg->flags & I2C_M_RD) {
-+ twi_writel(twi, CR, TWI_BIT(START));
-+ if ( twi_wait_for_completion(twi,TWI_BIT(RXRDY))==-ETIMEDOUT ) {
-+ dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n",
-+ twi->acks_left);
-+ return -ETIMEDOUT;
-+ }
-+
-+ /* Send Stop, and Wait until transfer is finished */
-+ if ( twi_wait_for_completion(twi,TWI_BIT(TXCOMP))==-ETIMEDOUT ) {
-+ dev_dbg(&adap->dev, "TXCOMP timeout\n");
-+ return -ETIMEDOUT;
-+ }
-+
-+ } else {
-+ twi_writel(twi, THR, twi->buf[0]);
-+ if ( twi_wait_for_completion(twi,TWI_BIT(TXRDY))==-ETIMEDOUT ) {
-+ dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n",
-+ twi->acks_left);
-+ return -ETIMEDOUT;
-+ }
-+ }
-+
-+ /* Disable TWI interface */
-+ twi_writel(twi, CR, TWI_BIT(MSDIS));
-+
-+ } /* end cur msg */
-+
-+ return i;
-+}
-+
-+
-+static irqreturn_t twi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+{
-+ struct atmel_twi *twi = dev_id;
-+ int status = twi_readl(twi, SR);
-+
-+ if (twi->intmask & status){
-+ if (twi->intmask & TWI_BIT(NACK)) {
-+ goto nack;
-+ } else if (twi->intmask & TWI_BIT(RXRDY)){
-+ twi->buf[twi->len - twi->acks_left] = twi_readl(twi,RHR);
-+ if(--twi->acks_left==1)
-+ twi_writel(twi, CR, TWI_BIT(STOP));
-+ if (twi->acks_left==0)
-+ goto complete;
-+ } else if (twi->intmask & TWI_BIT(TXRDY)) {
-+ twi->acks_left--;
-+ if (twi->acks_left==0) {
-+ twi->intmask = TWI_BIT(TXCOMP);
-+ twi_writel(twi, IER, TWI_BIT(TXCOMP));
-+ } else
-+ twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]);
-+ } else if (twi->intmask & TWI_BIT(TXCOMP)) {
-+ goto complete;
-+ }
-+ }
-+
-+ return IRQ_HANDLED;
-+
-+nack:
-+ printk(KERN_INFO "NACK received!\n");
-+
-+complete:
-+ twi_writel(twi, IDR, ~0UL);
-+ complete(&twi->comp);
-+
-+ return IRQ_HANDLED;
-+
-+}
-+
-+
-+/*
-+ * Return list of supported functionality.
-+ */
-+static u32 twi_func(struct i2c_adapter *adapter)
-+{
-+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+/* For now, we only handle combined mode (smbus) */
-+static struct i2c_algorithm twi_algorithm = {
-+ .master_xfer = twi_xfer,
-+ .functionality = twi_func,
-+};
-+
-+/*
-+ * Main initialization routine.
-+ */
-+static int __devinit twi_probe(struct platform_device *pdev)
-+{
-+ struct atmel_twi *twi;
-+ struct resource *regs;
-+ struct clk *pclk;
-+ struct i2c_adapter *adapter;
-+ int rc, irq;
-+
-+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!regs)
-+ return -ENXIO;
-+
-+ pclk = clk_get(&pdev->dev, "pclk");
-+ if (IS_ERR(pclk))
-+ return PTR_ERR(pclk);
-+ clk_enable(pclk);
-+
-+ rc = -ENOMEM;
-+ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
-+ if (!twi) {
-+ dev_err(&pdev->dev, "can't allocate interface!\n");
-+ goto err_alloc_twi;
-+ }
-+
-+ twi->pclk = pclk;
-+ twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+ if (!twi->regs)
-+ goto err_ioremap;
-+
-+ irq = platform_get_irq(pdev,0);
-+ rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
-+ if (rc) {
-+ dev_err(&pdev->dev, "can't bind irq!\n");
-+ goto err_irq;
-+ }
-+ twi->irq = irq;
-+
-+ rc = twi_hwinit(twi);
-+ if (rc) {
-+ dev_err(&pdev->dev, "Unable to set baudrate\n");
-+ goto err_hw_init;
-+ }
-+
-+ adapter = &twi->adapter;
-+ sprintf(adapter->name, "TWI");
-+ adapter->algo = &twi_algorithm;
-+ adapter->class = I2C_CLASS_HWMON;
-+ adapter->dev.parent = &pdev->dev;
-+
-+ platform_set_drvdata(pdev, twi);
-+
-+ rc = i2c_add_adapter(adapter);
-+ if (rc) {
-+ dev_err(&pdev->dev, "Adapter %s registration failed\n",
-+ adapter->name);
-+ goto err_register;
-+ }
-+
-+ dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n",
-+ baudrate/1000, (unsigned long)regs->start);
-+
-+ return 0;
-+
-+
-+err_register:
-+ platform_set_drvdata(pdev, NULL);
-+
-+err_hw_init:
-+ free_irq(irq, twi);
-+
-+err_irq:
-+ iounmap(twi->regs);
-+
-+err_ioremap:
-+ kfree(twi);
-+
-+err_alloc_twi:
-+ clk_disable(pclk);
-+ clk_put(pclk);
-+
-+ return rc;
-+}
-+
-+static int __devexit twi_remove(struct platform_device *pdev)
-+{
-+ struct atmel_twi *twi = platform_get_drvdata(pdev);
-+ int res;
-+
-+ platform_set_drvdata(pdev, NULL);
-+ res = i2c_del_adapter(&twi->adapter);
-+ twi_writel(twi, CR, TWI_BIT(MSDIS));
-+ iounmap(twi->regs);
-+ clk_disable(twi->pclk);
-+ clk_put(twi->pclk);
-+ free_irq(twi->irq, twi);
-+ kfree(twi);
-+
-+ return res;
-+}
-+
-+static struct platform_driver twi_driver = {
-+ .probe = twi_probe,
-+ .remove = __devexit_p(twi_remove),
-+ .driver = {
-+ .name = "atmel_twi",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init atmel_twi_init(void)
-+{
-+ return platform_driver_register(&twi_driver);
-+}
-+
-+static void __exit atmel_twi_exit(void)
-+{
-+ platform_driver_unregister(&twi_driver);
-+}
-+
-+module_init(atmel_twi_init);
-+module_exit(atmel_twi_exit);
-+
-+MODULE_AUTHOR("Espen Krangnes");
-+MODULE_DESCRIPTION("I2C driver for Atmel TWI");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/i2c-gpio.c avr32-git/drivers/i2c/busses/i2c-gpio.c
---- linux-2.6.21.3/drivers/i2c/busses/i2c-gpio.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/i2c/busses/i2c-gpio.c 2007-06-06 11:33:51.000000000 +0200
-@@ -0,0 +1,215 @@
-+/*
-+ * Bitbanging I2C bus driver using the GPIO API
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/i2c.h>
-+#include <linux/i2c-algo-bit.h>
-+#include <linux/i2c-gpio.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/gpio.h>
-+
-+/* Toggle SDA by changing the direction of the pin */
-+static void i2c_gpio_setsda_dir(void *data, int state)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ if (state)
-+ gpio_direction_input(pdata->sda_pin);
-+ else
-+ gpio_direction_output(pdata->sda_pin, 0);
-+}
-+
-+/*
-+ * Toggle SDA by changing the output value of the pin. This is only
-+ * valid for pins configured as open drain (i.e. setting the value
-+ * high effectively turns off the output driver.)
-+ */
-+static void i2c_gpio_setsda_val(void *data, int state)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ gpio_set_value(pdata->sda_pin, state);
-+}
-+
-+/* Toggle SCL by changing the direction of the pin. */
-+static void i2c_gpio_setscl_dir(void *data, int state)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ if (state)
-+ gpio_direction_input(pdata->scl_pin);
-+ else
-+ gpio_direction_output(pdata->scl_pin, 0);
-+}
-+
-+/*
-+ * Toggle SCL by changing the output value of the pin. This is used
-+ * for pins that are configured as open drain and for output-only
-+ * pins. The latter case will break the i2c protocol, but it will
-+ * often work in practice.
-+ */
-+static void i2c_gpio_setscl_val(void *data, int state)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ gpio_set_value(pdata->scl_pin, state);
-+}
-+
-+int i2c_gpio_getsda(void *data)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ return gpio_get_value(pdata->sda_pin);
-+}
-+
-+int i2c_gpio_getscl(void *data)
-+{
-+ struct i2c_gpio_platform_data *pdata = data;
-+
-+ return gpio_get_value(pdata->scl_pin);
-+}
-+
-+static int __init i2c_gpio_probe(struct platform_device *pdev)
-+{
-+ struct i2c_gpio_platform_data *pdata;
-+ struct i2c_algo_bit_data *bit_data;
-+ struct i2c_adapter *adap;
-+ int ret;
-+
-+ pdata = pdev->dev.platform_data;
-+ if (!pdata)
-+ return -ENXIO;
-+
-+ ret = -ENOMEM;
-+ adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
-+ if (!adap)
-+ goto err_alloc_adap;
-+ bit_data = kzalloc(sizeof(struct i2c_algo_bit_data), GFP_KERNEL);
-+ if (!bit_data)
-+ goto err_alloc_bit_data;
-+
-+ ret = gpio_request(pdata->sda_pin, "sda");
-+ if (ret)
-+ goto err_request_sda;
-+ ret = gpio_request(pdata->scl_pin, "scl");
-+ if (ret)
-+ goto err_request_scl;
-+
-+ if (pdata->sda_is_open_drain) {
-+ gpio_direction_output(pdata->sda_pin, 1);
-+ bit_data->setsda = i2c_gpio_setsda_val;
-+ } else {
-+ gpio_direction_input(pdata->sda_pin);
-+ bit_data->setsda = i2c_gpio_setsda_dir;
-+ }
-+
-+ if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
-+ gpio_direction_output(pdata->scl_pin, 1);
-+ bit_data->setscl = i2c_gpio_setscl_val;
-+ } else {
-+ gpio_direction_input(pdata->scl_pin);
-+ bit_data->setscl = i2c_gpio_setscl_dir;
-+ }
-+
-+ if (!pdata->scl_is_output_only)
-+ bit_data->getscl = i2c_gpio_getscl;
-+ bit_data->getsda = i2c_gpio_getsda;
-+
-+ if (pdata->udelay)
-+ bit_data->udelay = pdata->udelay;
-+ else if (pdata->scl_is_output_only)
-+ bit_data->udelay = 50; /* 10 kHz */
-+ else
-+ bit_data->udelay = 5; /* 100 kHz */
-+
-+ if (pdata->timeout)
-+ bit_data->timeout = pdata->timeout;
-+ else
-+ bit_data->timeout = HZ / 10; /* 100 ms */
-+
-+ bit_data->data = pdata;
-+
-+ adap->owner = THIS_MODULE;
-+ snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
-+ adap->algo_data = bit_data;
-+ adap->dev.parent = &pdev->dev;
-+
-+ ret = i2c_bit_add_bus(adap);
-+ if (ret)
-+ goto err_add_bus;
-+
-+ platform_set_drvdata(pdev, adap);
-+
-+ dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
-+ pdata->sda_pin, pdata->scl_pin,
-+ pdata->scl_is_output_only
-+ ? ", no clock stretching" : "");
-+
-+ return 0;
-+
-+err_add_bus:
-+ gpio_free(pdata->scl_pin);
-+err_request_scl:
-+ gpio_free(pdata->sda_pin);
-+err_request_sda:
-+ kfree(bit_data);
-+err_alloc_bit_data:
-+ kfree(adap);
-+err_alloc_adap:
-+ return ret;
-+}
-+
-+static int __exit i2c_gpio_remove(struct platform_device *pdev)
-+{
-+ struct i2c_gpio_platform_data *pdata;
-+ struct i2c_adapter *adap;
-+
-+ adap = platform_get_drvdata(pdev);
-+ pdata = pdev->dev.platform_data;
-+
-+ i2c_del_adapter(adap);
-+ gpio_free(pdata->scl_pin);
-+ gpio_free(pdata->sda_pin);
-+ kfree(adap->algo_data);
-+ kfree(adap);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver i2c_gpio_driver = {
-+ .driver = {
-+ .name = "i2c-gpio",
-+ .owner = THIS_MODULE,
-+ },
-+ .remove = __exit_p(i2c_gpio_remove),
-+};
-+
-+static int __init i2c_gpio_init(void)
-+{
-+ int ret;
-+
-+ ret = platform_driver_probe(&i2c_gpio_driver, i2c_gpio_probe);
-+ if (ret)
-+ printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
-+
-+ return ret;
-+}
-+module_init(i2c_gpio_init);
-+
-+static void __exit i2c_gpio_exit(void)
-+{
-+ platform_driver_unregister(&i2c_gpio_driver);
-+}
-+module_exit(i2c_gpio_exit);
-+
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/Kconfig avr32-git/drivers/i2c/busses/Kconfig
---- linux-2.6.21.3/drivers/i2c/busses/Kconfig 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/i2c/busses/Kconfig 2007-06-06 11:33:51.000000000 +0200
-@@ -5,6 +5,26 @@
- menu "I2C Hardware Bus support"
- depends on I2C
-
-+config I2C_ATMELTWI
-+ tristate "Atmel TWI/I2C"
-+ depends on I2C
-+ help
-+ Atmel on-chip TWI controller. Say Y if you have an AT32 or
-+ AT91-based device and want to use its built-in TWI
-+ functionality. Atmel's TWI is compatible with Philips' I2C
-+ protocol. If in doubt, say NO
-+
-+config I2C_ATMELTWI_BAUDRATE
-+ prompt "Atmel TWI baudrate"
-+ depends on I2C_ATMELTWI
-+ int
-+ default 100000
-+ help
-+ Set the TWI/I2C baudrate. This will alter the default value. A
-+ different baudrate can be set by using a module parameter as well. If
-+ no parameter is provided when loading, this is the value that will be
-+ used.
-+
- config I2C_ALI1535
- tristate "ALI 1535"
- depends on I2C && PCI
-@@ -102,6 +122,14 @@
- This support is also available as a module. If so, the module
- will be called i2c-elektor.
-
-+config I2C_GPIO
-+ tristate "GPIO-based bitbanging I2C"
-+ depends on GENERIC_GPIO
-+ select I2C_ALGOBIT
-+ help
-+ This is a very simple bitbanging I2C driver utilizing the
-+ arch-neutral GPIO API to control the SCL and SDA lines.
-+
- config I2C_HYDRA
- tristate "CHRP Apple Hydra Mac I/O I2C interface"
- depends on I2C && PCI && PPC_CHRP && EXPERIMENTAL
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/Makefile avr32-git/drivers/i2c/busses/Makefile
---- linux-2.6.21.3/drivers/i2c/busses/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/i2c/busses/Makefile 2007-06-06 11:33:51.000000000 +0200
-@@ -11,6 +11,7 @@
- obj-$(CONFIG_I2C_AT91) += i2c-at91.o
- obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
- obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
-+obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
- obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
- obj-$(CONFIG_I2C_I801) += i2c-i801.o
- obj-$(CONFIG_I2C_I810) += i2c-i810.o
-@@ -48,6 +49,7 @@
- obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
- obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
- obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
-+obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o
-
- ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
- EXTRA_CFLAGS += -DDEBUG
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/atmel-mci.c avr32-git/drivers/mmc/atmel-mci.c
---- linux-2.6.21.3/drivers/mmc/atmel-mci.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/mmc/atmel-mci.c 2007-06-06 11:33:56.000000000 +0200
-@@ -0,0 +1,1218 @@
-+/*
-+ * Atmel MultiMedia Card Interface driver
-+ *
-+ * Copyright (C) 2004-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/blkdev.h>
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/mmc/host.h>
-+#include <linux/mmc/protocol.h>
-+
-+#include <asm/dma-controller.h>
-+#include <asm/io.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#include "atmel-mci.h"
-+
-+#define DRIVER_NAME "atmel_mci"
-+
-+#define MCI_CMD_ERROR_FLAGS (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | \
-+ MCI_BIT(RCRCE) | MCI_BIT(RENDE) | \
-+ MCI_BIT(RTOE))
-+#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \
-+ MCI_BIT(OVRE) | MCI_BIT(UNRE))
-+
-+enum {
-+ EVENT_CMD_COMPLETE = 0,
-+ EVENT_CMD_ERROR,
-+ EVENT_DATA_COMPLETE,
-+ EVENT_DATA_ERROR,
-+ EVENT_STOP_SENT,
-+ EVENT_STOP_COMPLETE,
-+ EVENT_STOP_ERROR,
-+ EVENT_DMA_ERROR,
-+ EVENT_CARD_DETECT,
-+};
-+
-+struct atmel_mci_dma {
-+ struct dma_request_sg req;
-+ unsigned short rx_periph_id;
-+ unsigned short tx_periph_id;
-+};
-+
-+struct atmel_mci {
-+ struct mmc_host *mmc;
-+ void __iomem *regs;
-+ struct atmel_mci_dma dma;
-+
-+ struct mmc_request *mrq;
-+ struct mmc_command *cmd;
-+ struct mmc_data *data;
-+
-+ u32 stop_cmdr;
-+ u32 stop_iflags;
-+
-+ struct tasklet_struct tasklet;
-+ unsigned long pending_events;
-+ unsigned long completed_events;
-+ u32 error_status;
-+
-+ int present;
-+ int detect_pin;
-+ int wp_pin;
-+
-+ unsigned long bus_hz;
-+ unsigned long mapbase;
-+ struct clk *mck;
-+ struct platform_device *pdev;
-+
-+#ifdef CONFIG_DEBUG_FS
-+ struct dentry *debugfs_root;
-+ struct dentry *debugfs_regs;
-+ struct dentry *debugfs_req;
-+ struct dentry *debugfs_pending_events;
-+ struct dentry *debugfs_completed_events;
-+#endif
-+};
-+
-+/* Those printks take an awful lot of time... */
-+#ifndef DEBUG
-+static unsigned int fmax = 15000000U;
-+#else
-+static unsigned int fmax = 1000000U;
-+#endif
-+module_param(fmax, uint, 0444);
-+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
-+
-+/* Test bit macros for completed events */
-+#define mci_cmd_is_complete(host) \
-+ test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_cmd_error_is_complete(host) \
-+ test_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_data_is_complete(host) \
-+ test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_data_error_is_complete(host) \
-+ test_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_stop_sent_is_complete(host) \
-+ test_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_stop_is_complete(host) \
-+ test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_stop_error_is_complete(host) \
-+ test_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_dma_error_is_complete(host) \
-+ test_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_card_detect_is_complete(host) \
-+ test_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Test and clear bit macros for pending events */
-+#define mci_clear_cmd_is_pending(host) \
-+ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_is_pending(host) \
-+ test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_clear_data_is_pending(host) \
-+ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_clear_data_error_is_pending(host) \
-+ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_clear_stop_sent_is_pending(host) \
-+ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_clear_stop_is_pending(host) \
-+ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_is_pending(host) \
-+ test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_clear_dma_error_is_pending(host) \
-+ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_clear_card_detect_is_pending(host) \
-+ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+/* Test and set bit macros for completed events */
-+#define mci_set_cmd_is_completed(host) \
-+ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_is_completed(host) \
-+ test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_set_data_is_completed(host) \
-+ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_set_data_error_is_completed(host) \
-+ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_set_stop_sent_is_completed(host) \
-+ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_set_stop_is_completed(host) \
-+ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_is_completed(host) \
-+ test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_set_dma_error_is_completed(host) \
-+ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_set_card_detect_is_completed(host) \
-+ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Set bit macros for completed events */
-+#define mci_set_cmd_complete(host) \
-+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_complete(host) \
-+ set_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_set_data_complete(host) \
-+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_set_data_error_complete(host) \
-+ set_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_set_stop_sent_complete(host) \
-+ set_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_set_stop_complete(host) \
-+ set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_complete(host) \
-+ set_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_set_dma_error_complete(host) \
-+ set_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_set_card_detect_complete(host) \
-+ set_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Set bit macros for pending events */
-+#define mci_set_cmd_pending(host) \
-+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_set_cmd_error_pending(host) \
-+ set_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_set_data_pending(host) \
-+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_set_data_error_pending(host) \
-+ set_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_set_stop_sent_pending(host) \
-+ set_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_set_stop_pending(host) \
-+ set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_set_stop_error_pending(host) \
-+ set_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_set_dma_error_pending(host) \
-+ set_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_set_card_detect_pending(host) \
-+ set_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+/* Clear bit macros for pending events */
-+#define mci_clear_cmd_pending(host) \
-+ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_pending(host) \
-+ clear_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_clear_data_pending(host) \
-+ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_clear_data_error_pending(host) \
-+ clear_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_clear_stop_sent_pending(host) \
-+ clear_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_clear_stop_pending(host) \
-+ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_pending(host) \
-+ clear_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_clear_dma_error_pending(host) \
-+ clear_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_clear_card_detect_pending(host) \
-+ clear_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+
-+#ifdef CONFIG_DEBUG_FS
-+#include <linux/debugfs.h>
-+
-+#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int))
-+
-+struct req_dbg_data {
-+ unsigned int nbytes;
-+ char str[DBG_REQ_BUF_SIZE];
-+};
-+
-+static int req_dbg_open(struct inode *inode, struct file *file)
-+{
-+ struct atmel_mci *host;
-+ struct mmc_request *mrq;
-+ struct mmc_command *cmd, *stop;
-+ struct mmc_data *data;
-+ struct req_dbg_data *priv;
-+ char *str;
-+ unsigned long n = 0;
-+
-+ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
-+ if (!priv)
-+ return -ENOMEM;
-+ str = priv->str;
-+
-+ mutex_lock(&inode->i_mutex);
-+ host = inode->i_private;
-+
-+ spin_lock_irq(&host->mmc->lock);
-+ mrq = host->mrq;
-+ if (mrq) {
-+ cmd = mrq->cmd;
-+ data = mrq->data;
-+ stop = mrq->stop;
-+ n = snprintf(str, DBG_REQ_BUF_SIZE,
-+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
-+ cmd->opcode, cmd->arg, cmd->flags,
-+ cmd->resp[0], cmd->resp[1], cmd->resp[2],
-+ cmd->resp[3], cmd->error);
-+ if (n < DBG_REQ_BUF_SIZE && data)
-+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
-+ "DATA %u * %u (%u) %x (err %u)\n",
-+ data->blocks, data->blksz,
-+ data->bytes_xfered, data->flags,
-+ data->error);
-+ if (n < DBG_REQ_BUF_SIZE && stop)
-+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
-+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
-+ stop->opcode, stop->arg, stop->flags,
-+ stop->resp[0], stop->resp[1],
-+ stop->resp[2], stop->resp[3],
-+ stop->error);
-+ }
-+ spin_unlock_irq(&host->mmc->lock);
-+ mutex_unlock(&inode->i_mutex);
-+
-+ priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
-+ file->private_data = priv;
-+
-+ return 0;
-+}
-+
-+static ssize_t req_dbg_read(struct file *file, char __user *buf,
-+ size_t nbytes, loff_t *ppos)
-+{
-+ struct req_dbg_data *priv = file->private_data;
-+
-+ return simple_read_from_buffer(buf, nbytes, ppos,
-+ priv->str, priv->nbytes);
-+}
-+
-+static int req_dbg_release(struct inode *inode, struct file *file)
-+{
-+ kfree(file->private_data);
-+ return 0;
-+}
-+
-+static const struct file_operations req_dbg_fops = {
-+ .owner = THIS_MODULE,
-+ .open = req_dbg_open,
-+ .llseek = no_llseek,
-+ .read = req_dbg_read,
-+ .release = req_dbg_release,
-+};
-+
-+static int regs_dbg_open(struct inode *inode, struct file *file)
-+{
-+ struct atmel_mci *host;
-+ unsigned int i;
-+ u32 *data;
-+ int ret = -ENOMEM;
-+
-+ mutex_lock(&inode->i_mutex);
-+ host = inode->i_private;
-+ data = kmalloc(inode->i_size, GFP_KERNEL);
-+ if (!data)
-+ goto out;
-+
-+ spin_lock_irq(&host->mmc->lock);
-+ for (i = 0; i < inode->i_size / 4; i++)
-+ data[i] = __raw_readl(host->regs + i * 4);
-+ spin_unlock_irq(&host->mmc->lock);
-+
-+ file->private_data = data;
-+ ret = 0;
-+
-+out:
-+ mutex_unlock(&inode->i_mutex);
-+
-+ return ret;
-+}
-+
-+static ssize_t regs_dbg_read(struct file *file, char __user *buf,
-+ size_t nbytes, loff_t *ppos)
-+{
-+ struct inode *inode = file->f_dentry->d_inode;
-+ int ret;
-+
-+ mutex_lock(&inode->i_mutex);
-+ ret = simple_read_from_buffer(buf, nbytes, ppos,
-+ file->private_data,
-+ file->f_dentry->d_inode->i_size);
-+ mutex_unlock(&inode->i_mutex);
-+
-+ return ret;
-+}
-+
-+static int regs_dbg_release(struct inode *inode, struct file *file)
-+{
-+ kfree(file->private_data);
-+ return 0;
-+}
-+
-+static const struct file_operations regs_dbg_fops = {
-+ .owner = THIS_MODULE,
-+ .open = regs_dbg_open,
-+ .llseek = generic_file_llseek,
-+ .read = regs_dbg_read,
-+ .release = regs_dbg_release,
-+};
-+
-+static void atmci_init_debugfs(struct atmel_mci *host)
-+{
-+ struct mmc_host *mmc;
-+ struct dentry *root, *regs;
-+ struct resource *res;
-+
-+ mmc = host->mmc;
-+ root = debugfs_create_dir(mmc_hostname(mmc), NULL);
-+ if (IS_ERR(root) || !root)
-+ goto err_root;
-+ host->debugfs_root = root;
-+
-+ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops);
-+ if (!regs)
-+ goto err_regs;
-+
-+ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
-+ regs->d_inode->i_size = res->end - res->start + 1;
-+ host->debugfs_regs = regs;
-+
-+ host->debugfs_req = debugfs_create_file("req", 0400, root,
-+ host, &req_dbg_fops);
-+ if (!host->debugfs_req)
-+ goto err_req;
-+
-+ host->debugfs_pending_events
-+ = debugfs_create_u32("pending_events", 0400, root,
-+ (u32 *)&host->pending_events);
-+ if (!host->debugfs_pending_events)
-+ goto err_pending_events;
-+
-+ host->debugfs_completed_events
-+ = debugfs_create_u32("completed_events", 0400, root,
-+ (u32 *)&host->completed_events);
-+ if (!host->debugfs_completed_events)
-+ goto err_completed_events;
-+
-+ return;
-+
-+err_completed_events:
-+ debugfs_remove(host->debugfs_pending_events);
-+err_pending_events:
-+ debugfs_remove(host->debugfs_req);
-+err_req:
-+ debugfs_remove(host->debugfs_regs);
-+err_regs:
-+ debugfs_remove(host->debugfs_root);
-+err_root:
-+ host->debugfs_root = NULL;
-+ dev_err(&host->pdev->dev,
-+ "failed to initialize debugfs for %s\n",
-+ mmc_hostname(mmc));
-+}
-+
-+static void atmci_cleanup_debugfs(struct atmel_mci *host)
-+{
-+ if (host->debugfs_root) {
-+ debugfs_remove(host->debugfs_completed_events);
-+ debugfs_remove(host->debugfs_pending_events);
-+ debugfs_remove(host->debugfs_req);
-+ debugfs_remove(host->debugfs_regs);
-+ debugfs_remove(host->debugfs_root);
-+ host->debugfs_root = NULL;
-+ }
-+}
-+#else
-+static inline void atmci_init_debugfs(struct atmel_mci *host)
-+{
-+
-+}
-+
-+static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
-+{
-+
-+}
-+#endif /* CONFIG_DEBUG_FS */
-+
-+static inline unsigned int ns_to_clocks(struct atmel_mci *host,
-+ unsigned int ns)
-+{
-+ return (ns * (host->bus_hz / 1000000) + 999) / 1000;
-+}
-+
-+static void atmci_set_timeout(struct atmel_mci *host,
-+ struct mmc_data *data)
-+{
-+ static unsigned dtomul_to_shift[] = {
-+ 0, 4, 7, 8, 10, 12, 16, 20
-+ };
-+ unsigned timeout;
-+ unsigned dtocyc, dtomul;
-+
-+ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
-+
-+ for (dtomul = 0; dtomul < 8; dtomul++) {
-+ unsigned shift = dtomul_to_shift[dtomul];
-+ dtocyc = (timeout + (1 << shift) - 1) >> shift;
-+ if (dtocyc < 15)
-+ break;
-+ }
-+
-+ if (dtomul >= 8) {
-+ dtomul = 7;
-+ dtocyc = 15;
-+ }
-+
-+ pr_debug("%s: setting timeout to %u cycles\n",
-+ mmc_hostname(host->mmc),
-+ dtocyc << dtomul_to_shift[dtomul]);
-+ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
-+ | MCI_BF(DTOCYC, dtocyc)));
-+}
-+
-+/*
-+ * Return mask with interrupt flags to be handled for this command.
-+ */
-+static u32 atmci_prepare_command(struct mmc_host *mmc,
-+ struct mmc_command *cmd,
-+ u32 *cmd_flags)
-+{
-+ u32 cmdr;
-+ u32 iflags;
-+
-+ cmd->error = MMC_ERR_NONE;
-+
-+ cmdr = 0;
-+ BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0);
-+ cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr);
-+
-+ if (cmd->flags & MMC_RSP_PRESENT) {
-+ if (cmd->flags & MMC_RSP_136)
-+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
-+ else
-+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
-+ }
-+
-+ /*
-+ * This should really be MAXLAT_5 for CMD2 and ACMD41, but
-+ * it's too difficult to determine whether this is an ACMD or
-+ * not. Better make it 64.
-+ */
-+ cmdr |= MCI_BIT(MAXLAT);
-+
-+ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
-+ cmdr |= MCI_BIT(OPDCMD);
-+
-+ iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS;
-+ if (!(cmd->flags & MMC_RSP_CRC))
-+ iflags &= ~MCI_BIT(RCRCE);
-+
-+ pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
-+ mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags,
-+ (unsigned long)cmdr);
-+
-+ *cmd_flags = cmdr;
-+ return iflags;
-+}
-+
-+static void atmci_start_command(struct atmel_mci *host,
-+ struct mmc_command *cmd,
-+ u32 cmd_flags)
-+{
-+ WARN_ON(host->cmd);
-+ host->cmd = cmd;
-+
-+ mci_writel(host, ARGR, cmd->arg);
-+ mci_writel(host, CMDR, cmd_flags);
-+
-+ if (cmd->data)
-+ dma_start_request(host->dma.req.req.dmac,
-+ host->dma.req.req.channel);
-+}
-+
-+/*
-+ * Returns a mask of flags to be set in the command register when the
-+ * command to start the transfer is to be sent.
-+ */
-+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+ u32 cmd_flags;
-+
-+ WARN_ON(host->data);
-+ host->data = data;
-+
-+ atmci_set_timeout(host, data);
-+ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
-+ | MCI_BF(BLKLEN, data->blksz)));
-+ host->dma.req.block_size = data->blksz;
-+ host->dma.req.nr_blocks = data->blocks;
-+
-+ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
-+ if (data->flags & MMC_DATA_STREAM)
-+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
-+ else if (data->blocks > 1)
-+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
-+ else
-+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
-+
-+ if (data->flags & MMC_DATA_READ) {
-+ cmd_flags |= MCI_BIT(TRDIR);
-+ host->dma.req.nr_sg
-+ = dma_map_sg(&host->pdev->dev, data->sg,
-+ data->sg_len, DMA_FROM_DEVICE);
-+ host->dma.req.periph_id = host->dma.rx_periph_id;
-+ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
-+ host->dma.req.data_reg = host->mapbase + MCI_RDR;
-+ } else {
-+ host->dma.req.nr_sg
-+ = dma_map_sg(&host->pdev->dev, data->sg,
-+ data->sg_len, DMA_TO_DEVICE);
-+ host->dma.req.periph_id = host->dma.tx_periph_id;
-+ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
-+ host->dma.req.data_reg = host->mapbase + MCI_TDR;
-+ }
-+ host->dma.req.sg = data->sg;
-+
-+ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
-+
-+ return cmd_flags;
-+}
-+
-+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+ struct mmc_data *data = mrq->data;
-+ u32 iflags;
-+ u32 cmdflags = 0;
-+
-+ iflags = mci_readl(host, IMR);
-+ if (iflags)
-+ printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR));
-+
-+ WARN_ON(host->mrq != NULL);
-+ host->mrq = mrq;
-+ host->pending_events = 0;
-+ host->completed_events = 0;
-+
-+ iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags);
-+
-+ if (mrq->stop) {
-+ BUG_ON(!data);
-+
-+ host->stop_iflags = atmci_prepare_command(mmc, mrq->stop,
-+ &host->stop_cmdr);
-+ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
-+ if (!(data->flags & MMC_DATA_WRITE))
-+ host->stop_cmdr |= MCI_BIT(TRDIR);
-+ if (data->flags & MMC_DATA_STREAM)
-+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
-+ else
-+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
-+ }
-+ if (data) {
-+ cmdflags |= atmci_prepare_data(mmc, data);
-+ iflags |= MCI_DATA_ERROR_FLAGS;
-+ }
-+
-+ atmci_start_command(host, mrq->cmd, cmdflags);
-+ mci_writel(host, IER, iflags);
-+}
-+
-+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+
-+ if (ios->clock) {
-+ u32 clkdiv;
-+
-+ clkdiv = host->bus_hz / (2 * ios->clock) - 1;
-+ if (clkdiv > 255)
-+ clkdiv = 255;
-+ mci_writel(host, MR, (clkdiv
-+ | MCI_BIT(WRPROOF)
-+ | MCI_BIT(RDPROOF)));
-+ }
-+
-+ switch (ios->bus_width) {
-+ case MMC_BUS_WIDTH_1:
-+ mci_writel(host, SDCR, 0);
-+ break;
-+ case MMC_BUS_WIDTH_4:
-+ mci_writel(host, SDCR, MCI_BIT(SDCBUS));
-+ break;
-+ }
-+
-+ switch (ios->power_mode) {
-+ case MMC_POWER_OFF:
-+ mci_writel(host, CR, MCI_BIT(MCIDIS));
-+ break;
-+ case MMC_POWER_UP:
-+ mci_writel(host, CR, MCI_BIT(SWRST));
-+ break;
-+ case MMC_POWER_ON:
-+ mci_writel(host, CR, MCI_BIT(MCIEN));
-+ break;
-+ }
-+}
-+
-+static int atmci_get_ro(struct mmc_host *mmc)
-+{
-+ int read_only = 0;
-+ struct atmel_mci *host = mmc_priv(mmc);
-+
-+ if (host->wp_pin >= 0) {
-+ read_only = gpio_get_value(host->wp_pin);
-+ pr_debug("%s: card is %s\n", mmc_hostname(mmc),
-+ read_only ? "read-only" : "read-write");
-+ } else {
-+ pr_debug("%s: no pin for checking read-only switch."
-+ " Assuming write-enable.\n", mmc_hostname(mmc));
-+ }
-+
-+ return read_only;
-+}
-+
-+static struct mmc_host_ops atmci_ops = {
-+ .request = atmci_request,
-+ .set_ios = atmci_set_ios,
-+ .get_ro = atmci_get_ro,
-+};
-+
-+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+
-+ WARN_ON(host->cmd || host->data);
-+ host->mrq = NULL;
-+
-+ mmc_request_done(mmc, mrq);
-+}
-+
-+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
-+ u32 flags)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+
-+ atmci_start_command(host, data->stop, host->stop_cmdr | flags);
-+ mci_writel(host, IER, host->stop_iflags);
-+}
-+
-+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
-+{
-+ host->data = NULL;
-+ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
-+ ((data->flags & MMC_DATA_WRITE)
-+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
-+
-+ /*
-+ * Data might complete before command for very short transfers
-+ * (like READ_SCR)
-+ */
-+ if (mci_cmd_is_complete(host)
-+ && (!data->stop || mci_stop_is_complete(host)))
-+ atmci_request_end(host->mmc, data->mrq);
-+}
-+
-+static void atmci_command_error(struct mmc_host *mmc,
-+ struct mmc_command *cmd,
-+ u32 status)
-+{
-+ pr_debug("%s: command error: status=0x%08x\n",
-+ mmc_hostname(mmc), status);
-+
-+ if (status & MCI_BIT(RTOE))
-+ cmd->error = MMC_ERR_TIMEOUT;
-+ else if (status & MCI_BIT(RCRCE))
-+ cmd->error = MMC_ERR_BADCRC;
-+ else
-+ cmd->error = MMC_ERR_FAILED;
-+}
-+
-+static void atmci_tasklet_func(unsigned long priv)
-+{
-+ struct mmc_host *mmc = (struct mmc_host *)priv;
-+ struct atmel_mci *host = mmc_priv(mmc);
-+ struct mmc_request *mrq = host->mrq;
-+ struct mmc_data *data = host->data;
-+
-+ pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n",
-+ host->pending_events, host->completed_events,
-+ mci_readl(host, IMR));
-+
-+ if (mci_clear_cmd_error_is_pending(host)) {
-+ struct mmc_command *cmd;
-+
-+ mci_set_cmd_error_complete(host);
-+ mci_clear_cmd_pending(host);
-+ cmd = host->mrq->cmd;
-+
-+ if (cmd->data) {
-+ dma_stop_request(host->dma.req.req.dmac,
-+ host->dma.req.req.channel);
-+ host->data = NULL;
-+ }
-+
-+ atmci_command_error(mmc, cmd, host->error_status);
-+ atmci_request_end(mmc, cmd->mrq);
-+ }
-+ if (mci_clear_stop_error_is_pending(host)) {
-+ mci_set_stop_error_complete(host);
-+ mci_clear_stop_pending(host);
-+ atmci_command_error(mmc, host->mrq->stop,
-+ host->error_status);
-+ if (!host->data)
-+ atmci_request_end(mmc, host->mrq);
-+ }
-+ if (mci_clear_cmd_is_pending(host)) {
-+ mci_set_cmd_complete(host);
-+ if (!mrq->data || mci_data_is_complete(host)
-+ || mci_data_error_is_complete(host))
-+ atmci_request_end(mmc, mrq);
-+ }
-+ if (mci_clear_stop_is_pending(host)) {
-+ mci_set_stop_complete(host);
-+ if (mci_data_is_complete(host)
-+ || mci_data_error_is_complete(host))
-+ atmci_request_end(mmc, mrq);
-+ }
-+ if (mci_clear_dma_error_is_pending(host)) {
-+ mci_set_dma_error_complete(host);
-+ mci_clear_data_pending(host);
-+
-+ /* DMA controller got bus error => invalid address */
-+ data->error = MMC_ERR_INVALID;
-+
-+ printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n",
-+ mmc_hostname(mmc), host->data->bytes_xfered);
-+
-+ if (data->stop
-+ && !mci_set_stop_sent_is_completed(host))
-+ /* TODO: Check if card is still present */
-+ send_stop_cmd(host->mmc, data, 0);
-+
-+ atmci_data_complete(host, data);
-+ }
-+ if (mci_clear_data_error_is_pending(host)) {
-+ u32 status = host->error_status;
-+
-+ mci_set_data_error_complete(host);
-+ mci_clear_data_pending(host);
-+
-+ dma_stop_request(host->dma.req.req.dmac,
-+ host->dma.req.req.channel);
-+
-+ printk(KERN_DEBUG "%s: data error: status=0x%08x\n",
-+ mmc_hostname(host->mmc), status);
-+
-+ if (status & MCI_BIT(DCRCE)) {
-+ printk(KERN_DEBUG "%s: Data CRC error\n",
-+ mmc_hostname(host->mmc));
-+ data->error = MMC_ERR_BADCRC;
-+ } else if (status & MCI_BIT(DTOE)) {
-+ printk(KERN_DEBUG "%s: Data Timeout error\n",
-+ mmc_hostname(host->mmc));
-+ data->error = MMC_ERR_TIMEOUT;
-+ } else {
-+ printk(KERN_DEBUG "%s: Data FIFO error\n",
-+ mmc_hostname(host->mmc));
-+ data->error = MMC_ERR_FIFO;
-+ }
-+ printk(KERN_DEBUG "%s: Bytes xfered: %u\n",
-+ mmc_hostname(host->mmc), data->bytes_xfered);
-+
-+ if (data->stop
-+ && !mci_set_stop_sent_is_completed(host))
-+ /* TODO: Check if card is still present */
-+ send_stop_cmd(host->mmc, data, 0);
-+
-+ atmci_data_complete(host, data);
-+ }
-+ if (mci_clear_data_is_pending(host)) {
-+ mci_set_data_complete(host);
-+ data->bytes_xfered = data->blocks * data->blksz;
-+ atmci_data_complete(host, data);
-+ }
-+ if (mci_clear_card_detect_is_pending(host)) {
-+ /* Reset controller if card is gone */
-+ if (!host->present) {
-+ mci_writel(host, CR, MCI_BIT(SWRST));
-+ mci_writel(host, IDR, ~0UL);
-+ mci_writel(host, CR, MCI_BIT(MCIEN));
-+ }
-+
-+ /* Clean up queue if present */
-+ if (mrq) {
-+ if (!mci_cmd_is_complete(host)
-+ && !mci_cmd_error_is_complete(host)) {
-+ mrq->cmd->error = MMC_ERR_TIMEOUT;
-+ }
-+ if (mrq->data && !mci_data_is_complete(host)
-+ && !mci_data_error_is_complete(host)) {
-+ dma_stop_request(host->dma.req.req.dmac,
-+ host->dma.req.req.channel);
-+ host->data->error = MMC_ERR_TIMEOUT;
-+ atmci_data_complete(host, data);
-+ }
-+ if (mrq->stop && !mci_stop_is_complete(host)
-+ && !mci_stop_error_is_complete(host)) {
-+ mrq->stop->error = MMC_ERR_TIMEOUT;
-+ }
-+
-+ host->cmd = NULL;
-+ atmci_request_end(mmc, mrq);
-+ }
-+ mmc_detect_change(host->mmc, msecs_to_jiffies(100));
-+ }
-+}
-+
-+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
-+{
-+ struct atmel_mci *host = mmc_priv(mmc);
-+ struct mmc_command *cmd = host->cmd;
-+
-+ /*
-+ * Read the response now so that we're free to send a new
-+ * command immediately.
-+ */
-+ cmd->resp[0] = mci_readl(host, RSPR);
-+ cmd->resp[1] = mci_readl(host, RSPR);
-+ cmd->resp[2] = mci_readl(host, RSPR);
-+ cmd->resp[3] = mci_readl(host, RSPR);
-+
-+ mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS);
-+ host->cmd = NULL;
-+
-+ if (mci_stop_sent_is_complete(host))
-+ mci_set_stop_pending(host);
-+ else
-+ mci_set_cmd_pending(host);
-+
-+ tasklet_schedule(&host->tasklet);
-+}
-+
-+static void atmci_xfer_complete(struct dma_request *_req)
-+{
-+ struct dma_request_sg *req = to_dma_request_sg(_req);
-+ struct atmel_mci_dma *dma;
-+ struct atmel_mci *host;
-+ struct mmc_data *data;
-+
-+ dma = container_of(req, struct atmel_mci_dma, req);
-+ host = container_of(dma, struct atmel_mci, dma);
-+ data = host->data;
-+
-+ if (data->stop && !mci_set_stop_sent_is_completed(host))
-+ send_stop_cmd(host->mmc, data, 0);
-+
-+ if (data->flags & MMC_DATA_READ) {
-+ mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS);
-+ mci_set_data_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+ } else {
-+ /*
-+ * For the WRITE case, wait for NOTBUSY. This function
-+ * is called when everything has been written to the
-+ * controller, not when the card is done programming.
-+ */
-+ mci_writel(host, IER, MCI_BIT(NOTBUSY));
-+ }
-+}
-+
-+static void atmci_dma_error(struct dma_request *_req)
-+{
-+ struct dma_request_sg *req = to_dma_request_sg(_req);
-+ struct atmel_mci_dma *dma;
-+ struct atmel_mci *host;
-+
-+ dma = container_of(req, struct atmel_mci_dma, req);
-+ host = container_of(dma, struct atmel_mci, dma);
-+
-+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+ | MCI_DATA_ERROR_FLAGS));
-+
-+ mci_set_dma_error_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+}
-+
-+static irqreturn_t atmci_interrupt(int irq, void *dev_id)
-+{
-+ struct mmc_host *mmc = dev_id;
-+ struct atmel_mci *host = mmc_priv(mmc);
-+ u32 status, mask, pending;
-+
-+ spin_lock(&mmc->lock);
-+
-+ status = mci_readl(host, SR);
-+ mask = mci_readl(host, IMR);
-+ pending = status & mask;
-+
-+ do {
-+ if (pending & MCI_CMD_ERROR_FLAGS) {
-+ mci_writel(host, IDR, (MCI_BIT(CMDRDY)
-+ | MCI_BIT(NOTBUSY)
-+ | MCI_CMD_ERROR_FLAGS
-+ | MCI_DATA_ERROR_FLAGS));
-+ host->error_status = status;
-+ host->cmd = NULL;
-+ if (mci_stop_sent_is_complete(host))
-+ mci_set_stop_error_pending(host);
-+ else
-+ mci_set_cmd_error_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+ break;
-+ }
-+ if (pending & MCI_DATA_ERROR_FLAGS) {
-+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+ | MCI_DATA_ERROR_FLAGS));
-+ host->error_status = status;
-+ mci_set_data_error_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+ break;
-+ }
-+ if (pending & MCI_BIT(CMDRDY))
-+ atmci_cmd_interrupt(mmc, status);
-+ if (pending & MCI_BIT(NOTBUSY)) {
-+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+ | MCI_DATA_ERROR_FLAGS));
-+ mci_set_data_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+ }
-+
-+ status = mci_readl(host, SR);
-+ mask = mci_readl(host, IMR);
-+ pending = status & mask;
-+ } while (pending);
-+
-+ spin_unlock(&mmc->lock);
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t atmci_detect_change(int irq, void *dev_id)
-+{
-+ struct mmc_host *mmc = dev_id;
-+ struct atmel_mci *host = mmc_priv(mmc);
-+
-+ int present = !gpio_get_value(irq_to_gpio(irq));
-+
-+ if (present != host->present) {
-+ pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
-+ present ? "inserted" : "removed");
-+ host->present = present;
-+ mci_set_card_detect_pending(host);
-+ tasklet_schedule(&host->tasklet);
-+ }
-+ return IRQ_HANDLED;
-+}
-+
-+static int __devinit atmci_probe(struct platform_device *pdev)
-+{
-+ struct mci_platform_data *board;
-+ struct atmel_mci *host;
-+ struct mmc_host *mmc;
-+ struct resource *regs;
-+ int irq;
-+ int ret;
-+
-+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!regs)
-+ return -ENXIO;
-+ irq = platform_get_irq(pdev, 0);
-+ if (irq < 0)
-+ return irq;
-+
-+ board = pdev->dev.platform_data;
-+
-+ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
-+ if (!mmc)
-+ return -ENOMEM;
-+
-+ host = mmc_priv(mmc);
-+ host->pdev = pdev;
-+ host->mmc = mmc;
-+ if (board) {
-+ host->detect_pin = board->detect_pin;
-+ host->wp_pin = board->wp_pin;
-+ } else {
-+ host->detect_pin = -1;
-+ host->detect_pin = -1;
-+ }
-+
-+ host->mck = clk_get(&pdev->dev, "mci_clk");
-+ if (IS_ERR(host->mck)) {
-+ ret = PTR_ERR(host->mck);
-+ goto out_free_host;
-+ }
-+ clk_enable(host->mck);
-+
-+ ret = -ENOMEM;
-+ host->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+ if (!host->regs)
-+ goto out_disable_clk;
-+
-+ host->bus_hz = clk_get_rate(host->mck);
-+ host->mapbase = regs->start;
-+
-+ mmc->ops = &atmci_ops;
-+ mmc->f_min = (host->bus_hz + 511) / 512;
-+ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
-+ mmc->ocr_avail = 0x00100000;
-+ mmc->caps |= MMC_CAP_4_BIT_DATA;
-+
-+ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
-+
-+ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
-+ if (ret)
-+ goto out_unmap;
-+
-+ /* Assume card is present if we don't have a detect pin */
-+ host->present = 1;
-+ if (host->detect_pin >= 0) {
-+ if (gpio_request(host->detect_pin, "mmc_detect")) {
-+ printk(KERN_WARNING "%s: no detect pin available\n",
-+ mmc_hostname(host->mmc));
-+ host->detect_pin = -1;
-+ } else {
-+ host->present = !gpio_get_value(host->detect_pin);
-+ }
-+ }
-+ if (host->wp_pin >= 0) {
-+ if (gpio_request(host->wp_pin, "mmc_wp")) {
-+ printk(KERN_WARNING "%s: no WP pin available\n",
-+ mmc_hostname(host->mmc));
-+ host->wp_pin = -1;
-+ }
-+ }
-+
-+ /* TODO: Get this information from platform data */
-+ ret = -ENOMEM;
-+ host->dma.req.req.dmac = find_dma_controller(0);
-+ if (!host->dma.req.req.dmac) {
-+ printk(KERN_ERR
-+ "mmci: No DMA controller available, aborting\n");
-+ goto out_free_irq;
-+ }
-+ ret = dma_alloc_channel(host->dma.req.req.dmac);
-+ if (ret < 0) {
-+ printk(KERN_ERR
-+ "mmci: Unable to allocate DMA channel, aborting\n");
-+ goto out_free_irq;
-+ }
-+ host->dma.req.req.channel = ret;
-+ host->dma.req.width = DMA_WIDTH_32BIT;
-+ host->dma.req.req.xfer_complete = atmci_xfer_complete;
-+ host->dma.req.req.block_complete = NULL; // atmci_block_complete;
-+ host->dma.req.req.error = atmci_dma_error;
-+ host->dma.rx_periph_id = 0;
-+ host->dma.tx_periph_id = 1;
-+
-+ mci_writel(host, CR, MCI_BIT(SWRST));
-+ mci_writel(host, IDR, ~0UL);
-+ mci_writel(host, CR, MCI_BIT(MCIEN));
-+
-+ platform_set_drvdata(pdev, host);
-+
-+ mmc_add_host(mmc);
-+
-+ if (host->detect_pin >= 0) {
-+ ret = request_irq(gpio_to_irq(host->detect_pin),
-+ atmci_detect_change,
-+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-+ DRIVER_NAME, mmc);
-+ if (ret) {
-+ printk(KERN_ERR
-+ "%s: could not request IRQ %d for detect pin\n",
-+ mmc_hostname(mmc),
-+ gpio_to_irq(host->detect_pin));
-+ gpio_free(host->detect_pin);
-+ host->detect_pin = -1;
-+ }
-+ }
-+
-+ printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n",
-+ mmc_hostname(mmc), host->mapbase, irq);
-+
-+ atmci_init_debugfs(host);
-+
-+ return 0;
-+
-+out_free_irq:
-+ if (host->detect_pin >= 0)
-+ gpio_free(host->detect_pin);
-+ if (host->wp_pin >= 0)
-+ gpio_free(host->wp_pin);
-+ free_irq(irq, mmc);
-+out_unmap:
-+ iounmap(host->regs);
-+out_disable_clk:
-+ clk_disable(host->mck);
-+ clk_put(host->mck);
-+out_free_host:
-+ mmc_free_host(mmc);
-+ return ret;
-+}
-+
-+static int __devexit atmci_remove(struct platform_device *pdev)
-+{
-+ struct atmel_mci *host = platform_get_drvdata(pdev);
-+
-+ platform_set_drvdata(pdev, NULL);
-+
-+ if (host) {
-+ atmci_cleanup_debugfs(host);
-+
-+ if (host->detect_pin >= 0) {
-+ free_irq(gpio_to_irq(host->detect_pin), host->mmc);
-+ cancel_delayed_work(&host->mmc->detect);
-+ gpio_free(host->detect_pin);
-+ }
-+
-+ mmc_remove_host(host->mmc);
-+
-+ mci_writel(host, IDR, ~0UL);
-+ mci_writel(host, CR, MCI_BIT(MCIDIS));
-+ mci_readl(host, SR);
-+
-+ dma_release_channel(host->dma.req.req.dmac,
-+ host->dma.req.req.channel);
-+
-+ if (host->wp_pin >= 0)
-+ gpio_free(host->wp_pin);
-+
-+ free_irq(platform_get_irq(pdev, 0), host->mmc);
-+ iounmap(host->regs);
-+
-+ clk_disable(host->mck);
-+ clk_put(host->mck);
-+
-+ mmc_free_host(host->mmc);
-+ }
-+ return 0;
-+}
-+
-+static struct platform_driver atmci_driver = {
-+ .probe = atmci_probe,
-+ .remove = __devexit_p(atmci_remove),
-+ .driver = {
-+ .name = DRIVER_NAME,
-+ },
-+};
-+
-+static int __init atmci_init(void)
-+{
-+ return platform_driver_register(&atmci_driver);
-+}
-+
-+static void __exit atmci_exit(void)
-+{
-+ platform_driver_unregister(&atmci_driver);
-+}
-+
-+module_init(atmci_init);
-+module_exit(atmci_exit);
-+
-+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/atmel-mci.h avr32-git/drivers/mmc/atmel-mci.h
---- linux-2.6.21.3/drivers/mmc/atmel-mci.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/mmc/atmel-mci.h 2007-06-06 11:33:56.000000000 +0200
-@@ -0,0 +1,192 @@
-+/*
-+ * Atmel MultiMedia Card Interface driver
-+ *
-+ * Copyright (C) 2004-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
-+#define __DRIVERS_MMC_ATMEL_MCI_H__
-+
-+/* MCI register offsets */
-+#define MCI_CR 0x0000
-+#define MCI_MR 0x0004
-+#define MCI_DTOR 0x0008
-+#define MCI_SDCR 0x000c
-+#define MCI_ARGR 0x0010
-+#define MCI_CMDR 0x0014
-+#define MCI_BLKR 0x0018
-+#define MCI_RSPR 0x0020
-+#define MCI_RSPR1 0x0024
-+#define MCI_RSPR2 0x0028
-+#define MCI_RSPR3 0x002c
-+#define MCI_RDR 0x0030
-+#define MCI_TDR 0x0034
-+#define MCI_SR 0x0040
-+#define MCI_IER 0x0044
-+#define MCI_IDR 0x0048
-+#define MCI_IMR 0x004c
-+
-+/* Bitfields in CR */
-+#define MCI_MCIEN_OFFSET 0
-+#define MCI_MCIEN_SIZE 1
-+#define MCI_MCIDIS_OFFSET 1
-+#define MCI_MCIDIS_SIZE 1
-+#define MCI_PWSEN_OFFSET 2
-+#define MCI_PWSEN_SIZE 1
-+#define MCI_PWSDIS_OFFSET 3
-+#define MCI_PWSDIS_SIZE 1
-+#define MCI_SWRST_OFFSET 7
-+#define MCI_SWRST_SIZE 1
-+
-+/* Bitfields in MR */
-+#define MCI_CLKDIV_OFFSET 0
-+#define MCI_CLKDIV_SIZE 8
-+#define MCI_PWSDIV_OFFSET 8
-+#define MCI_PWSDIV_SIZE 3
-+#define MCI_RDPROOF_OFFSET 11
-+#define MCI_RDPROOF_SIZE 1
-+#define MCI_WRPROOF_OFFSET 12
-+#define MCI_WRPROOF_SIZE 1
-+#define MCI_DMAPADV_OFFSET 14
-+#define MCI_DMAPADV_SIZE 1
-+#define MCI_BLKLEN_OFFSET 16
-+#define MCI_BLKLEN_SIZE 16
-+
-+/* Bitfields in DTOR */
-+#define MCI_DTOCYC_OFFSET 0
-+#define MCI_DTOCYC_SIZE 4
-+#define MCI_DTOMUL_OFFSET 4
-+#define MCI_DTOMUL_SIZE 3
-+
-+/* Bitfields in SDCR */
-+#define MCI_SDCSEL_OFFSET 0
-+#define MCI_SDCSEL_SIZE 4
-+#define MCI_SDCBUS_OFFSET 7
-+#define MCI_SDCBUS_SIZE 1
-+
-+/* Bitfields in ARGR */
-+#define MCI_ARG_OFFSET 0
-+#define MCI_ARG_SIZE 32
-+
-+/* Bitfields in CMDR */
-+#define MCI_CMDNB_OFFSET 0
-+#define MCI_CMDNB_SIZE 6
-+#define MCI_RSPTYP_OFFSET 6
-+#define MCI_RSPTYP_SIZE 2
-+#define MCI_SPCMD_OFFSET 8
-+#define MCI_SPCMD_SIZE 3
-+#define MCI_OPDCMD_OFFSET 11
-+#define MCI_OPDCMD_SIZE 1
-+#define MCI_MAXLAT_OFFSET 12
-+#define MCI_MAXLAT_SIZE 1
-+#define MCI_TRCMD_OFFSET 16
-+#define MCI_TRCMD_SIZE 2
-+#define MCI_TRDIR_OFFSET 18
-+#define MCI_TRDIR_SIZE 1
-+#define MCI_TRTYP_OFFSET 19
-+#define MCI_TRTYP_SIZE 2
-+
-+/* Bitfields in BLKR */
-+#define MCI_BCNT_OFFSET 0
-+#define MCI_BCNT_SIZE 16
-+
-+/* Bitfields in RSPRn */
-+#define MCI_RSP_OFFSET 0
-+#define MCI_RSP_SIZE 32
-+
-+/* Bitfields in SR/IER/IDR/IMR */
-+#define MCI_CMDRDY_OFFSET 0
-+#define MCI_CMDRDY_SIZE 1
-+#define MCI_RXRDY_OFFSET 1
-+#define MCI_RXRDY_SIZE 1
-+#define MCI_TXRDY_OFFSET 2
-+#define MCI_TXRDY_SIZE 1
-+#define MCI_BLKE_OFFSET 3
-+#define MCI_BLKE_SIZE 1
-+#define MCI_DTIP_OFFSET 4
-+#define MCI_DTIP_SIZE 1
-+#define MCI_NOTBUSY_OFFSET 5
-+#define MCI_NOTBUSY_SIZE 1
-+#define MCI_ENDRX_OFFSET 6
-+#define MCI_ENDRX_SIZE 1
-+#define MCI_ENDTX_OFFSET 7
-+#define MCI_ENDTX_SIZE 1
-+#define MCI_RXBUFF_OFFSET 14
-+#define MCI_RXBUFF_SIZE 1
-+#define MCI_TXBUFE_OFFSET 15
-+#define MCI_TXBUFE_SIZE 1
-+#define MCI_RINDE_OFFSET 16
-+#define MCI_RINDE_SIZE 1
-+#define MCI_RDIRE_OFFSET 17
-+#define MCI_RDIRE_SIZE 1
-+#define MCI_RCRCE_OFFSET 18
-+#define MCI_RCRCE_SIZE 1
-+#define MCI_RENDE_OFFSET 19
-+#define MCI_RENDE_SIZE 1
-+#define MCI_RTOE_OFFSET 20
-+#define MCI_RTOE_SIZE 1
-+#define MCI_DCRCE_OFFSET 21
-+#define MCI_DCRCE_SIZE 1
-+#define MCI_DTOE_OFFSET 22
-+#define MCI_DTOE_SIZE 1
-+#define MCI_OVRE_OFFSET 30
-+#define MCI_OVRE_SIZE 1
-+#define MCI_UNRE_OFFSET 31
-+#define MCI_UNRE_SIZE 1
-+
-+/* Constants for DTOMUL */
-+#define MCI_DTOMUL_1_CYCLE 0
-+#define MCI_DTOMUL_16_CYCLES 1
-+#define MCI_DTOMUL_128_CYCLES 2
-+#define MCI_DTOMUL_256_CYCLES 3
-+#define MCI_DTOMUL_1024_CYCLES 4
-+#define MCI_DTOMUL_4096_CYCLES 5
-+#define MCI_DTOMUL_65536_CYCLES 6
-+#define MCI_DTOMUL_1048576_CYCLES 7
-+
-+/* Constants for RSPTYP */
-+#define MCI_RSPTYP_NO_RESP 0
-+#define MCI_RSPTYP_48_BIT 1
-+#define MCI_RSPTYP_136_BIT 2
-+
-+/* Constants for SPCMD */
-+#define MCI_SPCMD_NO_SPEC_CMD 0
-+#define MCI_SPCMD_INIT_CMD 1
-+#define MCI_SPCMD_SYNC_CMD 2
-+#define MCI_SPCMD_INT_CMD 4
-+#define MCI_SPCMD_INT_RESP 5
-+
-+/* Constants for TRCMD */
-+#define MCI_TRCMD_NO_TRANS 0
-+#define MCI_TRCMD_START_TRANS 1
-+#define MCI_TRCMD_STOP_TRANS 2
-+
-+/* Constants for TRTYP */
-+#define MCI_TRTYP_BLOCK 0
-+#define MCI_TRTYP_MULTI_BLOCK 1
-+#define MCI_TRTYP_STREAM 2
-+
-+/* Bit manipulation macros */
-+#define MCI_BIT(name) \
-+ (1 << MCI_##name##_OFFSET)
-+#define MCI_BF(name,value) \
-+ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \
-+ << MCI_##name##_OFFSET)
-+#define MCI_BFEXT(name,value) \
-+ (((value) >> MCI_##name##_OFFSET) \
-+ & ((1 << MCI_##name##_SIZE) - 1))
-+#define MCI_BFINS(name,value,old) \
-+ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \
-+ << MCI_##name##_OFFSET)) \
-+ | MCI_BF(name,value))
-+
-+/* Register access macros */
-+#define mci_readl(port,reg) \
-+ __raw_readl((port)->regs + MCI_##reg)
-+#define mci_writel(port,reg,value) \
-+ __raw_writel((value), (port)->regs + MCI_##reg)
-+
-+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/Kconfig avr32-git/drivers/mmc/Kconfig
---- linux-2.6.21.3/drivers/mmc/Kconfig 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/mmc/Kconfig 2007-06-06 11:33:56.000000000 +0200
-@@ -71,6 +71,16 @@
-
- If unsure, say N.
-
-+config MMC_ATMELMCI
-+ tristate "Atmel Multimedia Card Interface support"
-+ depends on AVR32 && MMC
-+ help
-+ This selects the Atmel Multimedia Card Interface. If you have
-+ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
-+ slot, say Y or M here.
-+
-+ If unsure, say N.
-+
- config MMC_WBSD
- tristate "Winbond W83L51xD SD/MMC Card Interface support"
- depends on MMC && ISA_DMA_API
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/Makefile avr32-git/drivers/mmc/Makefile
---- linux-2.6.21.3/drivers/mmc/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/mmc/Makefile 2007-06-06 11:33:56.000000000 +0200
-@@ -23,6 +23,7 @@
- obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
- obj-$(CONFIG_MMC_OMAP) += omap.o
- obj-$(CONFIG_MMC_AT91) += at91_mci.o
-+obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
- obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
-
- mmc_core-y := mmc.o mmc_sysfs.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0001.c avr32-git/drivers/mtd/chips/cfi_cmdset_0001.c
---- linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0001.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/mtd/chips/cfi_cmdset_0001.c 2007-06-06 11:33:56.000000000 +0200
-@@ -47,6 +47,7 @@
- #define I82802AC 0x00ac
- #define MANUFACTURER_ST 0x0020
- #define M50LPW080 0x002F
-+#define AT49BV640D 0x02de
-
- static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -153,6 +154,47 @@
- }
- #endif
-
-+/* Atmel chips don't use the same PRI format as Intel chips */
-+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
-+{
-+ struct map_info *map = mtd->priv;
-+ struct cfi_private *cfi = map->fldrv_priv;
-+ struct cfi_pri_intelext *extp = cfi->cmdset_priv;
-+ struct cfi_pri_atmel atmel_pri;
-+ uint32_t features = 0;
-+
-+ /* Reverse byteswapping */
-+ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
-+ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
-+ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
-+
-+ memcpy(&atmel_pri, extp, sizeof(atmel_pri));
-+ memset((char *)extp + 5, 0, sizeof(*extp) - 5);
-+
-+ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
-+
-+ if (atmel_pri.Features & 0x01) /* chip erase supported */
-+ features |= (1<<0);
-+ if (atmel_pri.Features & 0x02) /* erase suspend supported */
-+ features |= (1<<1);
-+ if (atmel_pri.Features & 0x04) /* program suspend supported */
-+ features |= (1<<2);
-+ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
-+ features |= (1<<9);
-+ if (atmel_pri.Features & 0x20) /* page mode read supported */
-+ features |= (1<<7);
-+ if (atmel_pri.Features & 0x40) /* queued erase supported */
-+ features |= (1<<4);
-+ if (atmel_pri.Features & 0x80) /* Protection bits supported */
-+ features |= (1<<6);
-+
-+ extp->FeatureSupport = features;
-+
-+ /* burst write mode not supported */
-+ cfi->cfiq->BufWriteTimeoutTyp = 0;
-+ cfi->cfiq->BufWriteTimeoutMax = 0;
-+}
-+
- #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
- /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
- static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
-@@ -221,6 +263,7 @@
- }
-
- static struct cfi_fixup cfi_fixup_table[] = {
-+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
- { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
- #endif
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0002.c avr32-git/drivers/mtd/chips/cfi_cmdset_0002.c
---- linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0002.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/mtd/chips/cfi_cmdset_0002.c 2007-06-06 11:33:56.000000000 +0200
-@@ -185,6 +185,10 @@
- extp->TopBottom = 2;
- else
- extp->TopBottom = 3;
-+
-+ /* burst write mode not supported */
-+ cfi->cfiq->BufWriteTimeoutTyp = 0;
-+ cfi->cfiq->BufWriteTimeoutMax = 0;
- }
-
- static void fixup_use_secsi(struct mtd_info *mtd, void *param)
-@@ -217,6 +221,7 @@
- }
-
- static struct cfi_fixup cfi_fixup_table[] = {
-+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- #ifdef AMD_BOOTLOC_BUG
- { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
- #endif
-@@ -229,7 +234,6 @@
- #if !FORCE_WORD_WRITE
- { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
- #endif
-- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- { 0, 0, NULL, NULL }
- };
- static struct cfi_fixup jedec_fixup_table[] = {
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/serial/atmel_serial.c avr32-git/drivers/serial/atmel_serial.c
---- linux-2.6.21.3/drivers/serial/atmel_serial.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/serial/atmel_serial.c 2007-06-06 11:33:59.000000000 +0200
-@@ -114,6 +114,7 @@
- struct uart_port uart; /* uart */
- struct clk *clk; /* uart clock */
- unsigned short suspended; /* is port suspended? */
-+ int break_active; /* break being received */
- };
-
- static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
-@@ -252,6 +253,7 @@
- */
- static void atmel_rx_chars(struct uart_port *port)
- {
-+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- struct tty_struct *tty = port->info->tty;
- unsigned int status, ch, flg;
-
-@@ -267,13 +269,29 @@
- * note that the error handling code is
- * out of the main execution path
- */
-- if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
-+ if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
-+ | ATMEL_US_OVRE | ATMEL_US_RXBRK)
-+ || atmel_port->break_active)) {
- UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
-- if (status & ATMEL_US_RXBRK) {
-+ if (status & ATMEL_US_RXBRK
-+ && !atmel_port->break_active) {
- status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
- port->icount.brk++;
-+ atmel_port->break_active = 1;
-+ UART_PUT_IER(port, ATMEL_US_RXBRK);
- if (uart_handle_break(port))
- goto ignore_char;
-+ } else {
-+ /*
-+ * This is either the end-of-break
-+ * condition or we've received at
-+ * least one character without RXBRK
-+ * being set. In both cases, the next
-+ * RXBRK will indicate start-of-break.
-+ */
-+ UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+ status &= ~ATMEL_US_RXBRK;
-+ atmel_port->break_active = 0;
- }
- if (status & ATMEL_US_PARE)
- port->icount.parity++;
-@@ -352,6 +370,16 @@
- /* Interrupt receive */
- if (pending & ATMEL_US_RXRDY)
- atmel_rx_chars(port);
-+ else if (pending & ATMEL_US_RXBRK) {
-+ /*
-+ * End of break detected. If it came along
-+ * with a character, atmel_rx_chars will
-+ * handle it.
-+ */
-+ UART_PUT_CR(port, ATMEL_US_RSTSTA);
-+ UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+ atmel_port->break_active = 0;
-+ }
-
- // TODO: All reads to CSR will clear these interrupts!
- if (pending & ATMEL_US_RIIC) port->icount.rng++;
-@@ -484,11 +512,16 @@
- unsigned long flags;
- unsigned int mode, imr, quot, baud;
-
-+ /* Get current mode register */
-+ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
-+
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
- quot = uart_get_divisor(port, baud);
-
-- /* Get current mode register */
-- mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
-+ if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
-+ quot /= 8;
-+ mode |= ATMEL_US_USCLKS_MCK_DIV8;
-+ }
-
- /* byte size */
- switch (termios->c_cflag & CSIZE) {
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/serial/atmel_serial.h avr32-git/drivers/serial/atmel_serial.h
---- linux-2.6.21.3/drivers/serial/atmel_serial.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/serial/atmel_serial.h 2007-06-06 11:33:59.000000000 +0200
-@@ -46,6 +46,9 @@
- #define ATMEL_US_USMODE_ISO7816_T1 6
- #define ATMEL_US_USMODE_IRDA 8
- #define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
-+#define ATMEL_US_USCLKS_MCK (0 << 4)
-+#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
-+#define ATMEL_US_USCLKS_SCK (3 << 4)
- #define ATMEL_US_CHRL (3 << 6) /* Character Length */
- #define ATMEL_US_CHRL_5 (0 << 6)
- #define ATMEL_US_CHRL_6 (1 << 6)
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/spi/atmel_spi.c avr32-git/drivers/spi/atmel_spi.c
---- linux-2.6.21.3/drivers/spi/atmel_spi.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/spi/atmel_spi.c 2007-06-06 11:33:59.000000000 +0200
-@@ -22,10 +22,7 @@
- #include <asm/io.h>
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
--
--#ifdef CONFIG_ARCH_AT91
- #include <asm/arch/cpu.h>
--#endif
-
- #include "atmel_spi.h"
-
-@@ -116,16 +113,16 @@
-
- len = as->remaining_bytes;
-
-- tx_dma = xfer->tx_dma;
-- rx_dma = xfer->rx_dma;
-+ tx_dma = xfer->tx_dma + xfer->len - len;
-+ rx_dma = xfer->rx_dma + xfer->len - len;
-
- /* use scratch buffer only when rx or tx data is unspecified */
-- if (rx_dma == INVALID_DMA_ADDRESS) {
-+ if (!xfer->rx_buf) {
- rx_dma = as->buffer_dma;
- if (len > BUFFER_SIZE)
- len = BUFFER_SIZE;
- }
-- if (tx_dma == INVALID_DMA_ADDRESS) {
-+ if (!xfer->tx_buf) {
- tx_dma = as->buffer_dma;
- if (len > BUFFER_SIZE)
- len = BUFFER_SIZE;
-@@ -415,8 +412,8 @@
- csr |= SPI_BIT(NCPHA);
-
- /* TODO: DLYBS and DLYBCT */
-- csr |= SPI_BF(DLYBS, 10);
-- csr |= SPI_BF(DLYBCT, 10);
-+ csr |= SPI_BF(DLYBS, 0);
-+ csr |= SPI_BF(DLYBCT, 0);
-
- /* chipselect must have been muxed as GPIO (e.g. in board setup) */
- npcs_pin = (unsigned int)spi->controller_data;
-@@ -552,10 +549,8 @@
- goto out_free_buffer;
- as->irq = irq;
- as->clk = clk;
--#ifdef CONFIG_ARCH_AT91
- if (!cpu_is_at91rm9200())
- as->new_1 = 1;
--#endif
-
- ret = request_irq(irq, atmel_spi_interrupt, 0,
- pdev->dev.bus_id, master);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/atmel_lcdfb.c avr32-git/drivers/video/atmel_lcdfb.c
---- linux-2.6.21.3/drivers/video/atmel_lcdfb.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/video/atmel_lcdfb.c 2007-06-06 11:34:00.000000000 +0200
-@@ -0,0 +1,752 @@
-+/*
-+ * Driver for AT91/AT32 LCD Controller
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive for
-+ * more details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/gpio.h>
-+
-+#include <video/atmel_lcdc.h>
-+
-+#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
-+#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
-+
-+/* configurable parameters */
-+#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
-+#define ATMEL_LCDC_DMA_BURST_LEN 8
-+
-+#if defined(CONFIG_ARCH_AT91SAM9263)
-+#define ATMEL_LCDC_FIFO_SIZE 2048
-+#else
-+#define ATMEL_LCDC_FIFO_SIZE 512
-+#endif
-+
-+#if defined(CONFIG_ARCH_AT91)
-+#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
-+
-+static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-+ struct fb_var_screeninfo *var)
-+{
-+
-+}
-+#elif defined(CONFIG_AVR32)
-+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
-+ | FBINFO_PARTIAL_PAN_OK \
-+ | FBINFO_HWACCEL_XPAN \
-+ | FBINFO_HWACCEL_YPAN)
-+
-+static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
-+ struct fb_var_screeninfo *var)
-+{
-+ u32 dma2dcfg;
-+ u32 pixeloff;
-+
-+ pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
-+
-+ dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
-+ dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
-+
-+ /* Update configuration */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
-+ lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
-+ | ATMEL_LCDC_DMAUPDT);
-+}
-+#endif
-+
-+
-+static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
-+ .type = FB_TYPE_PACKED_PIXELS,
-+ .visual = FB_VISUAL_TRUECOLOR,
-+ .xpanstep = 0,
-+ .ypanstep = 0,
-+ .ywrapstep = 0,
-+ .accel = FB_ACCEL_NONE,
-+};
-+
-+
-+static void atmel_lcdfb_update_dma(struct fb_info *info,
-+ struct fb_var_screeninfo *var)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ struct fb_fix_screeninfo *fix = &info->fix;
-+ unsigned long dma_addr;
-+
-+ dma_addr = (fix->smem_start + var->yoffset * fix->line_length
-+ + var->xoffset * var->bits_per_pixel / 8);
-+
-+ dma_addr &= ~3UL;
-+
-+ /* Set framebuffer DMA base address and pixel offset */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
-+
-+ atmel_lcdfb_update_dma2d(sinfo, var);
-+}
-+
-+static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+
-+ dma_free_writecombine(info->device, info->fix.smem_len,
-+ info->screen_base, info->fix.smem_start);
-+}
-+
-+/**
-+ * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
-+ * @sinfo: the frame buffer to allocate memory for
-+ */
-+static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+ struct fb_var_screeninfo *var = &info->var;
-+
-+ info->fix.smem_len = (var->xres_virtual * var->yres_virtual
-+ * ((var->bits_per_pixel + 7) / 8));
-+
-+ info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
-+ (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
-+
-+ if (!info->screen_base) {
-+ return -ENOMEM;
-+ }
-+
-+ return 0;
-+}
-+
-+/**
-+ * atmel_lcdfb_check_var - Validates a var passed in.
-+ * @var: frame buffer variable screen structure
-+ * @info: frame buffer structure that represents a single frame buffer
-+ *
-+ * Checks to see if the hardware supports the state requested by
-+ * var passed in. This function does not alter the hardware
-+ * state!!! This means the data stored in struct fb_info and
-+ * struct atmel_lcdfb_info do not change. This includes the var
-+ * inside of struct fb_info. Do NOT change these. This function
-+ * can be called on its own if we intent to only test a mode and
-+ * not actually set it. The stuff in modedb.c is a example of
-+ * this. If the var passed in is slightly off by what the
-+ * hardware can support then we alter the var PASSED in to what
-+ * we can do. If the hardware doesn't support mode change a
-+ * -EINVAL will be returned by the upper layers. You don't need
-+ * to implement this function then. If you hardware doesn't
-+ * support changing the resolution then this function is not
-+ * needed. In this case the driver would just provide a var that
-+ * represents the static state the screen is in.
-+ *
-+ * Returns negative errno on error, or zero on success.
-+ */
-+static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ struct device *dev = info->device;
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned long clk_value_khz;
-+
-+ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
-+
-+ dev_dbg(dev, "%s:\n", __func__);
-+ dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
-+ dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
-+ dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
-+ dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
-+
-+ if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
-+ dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
-+ return -EINVAL;
-+ }
-+
-+ /* Force same alignment for each line */
-+ var->xres = (var->xres + 3) & ~3UL;
-+ var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
-+
-+ var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
-+ var->transp.msb_right = 0;
-+ var->transp.offset = var->transp.length = 0;
-+ var->xoffset = var->yoffset = 0;
-+
-+ switch (var->bits_per_pixel) {
-+ case 2:
-+ case 4:
-+ case 8:
-+ var->red.offset = var->green.offset = var->blue.offset = 0;
-+ var->red.length = var->green.length = var->blue.length
-+ = var->bits_per_pixel;
-+ break;
-+ case 15:
-+ case 16:
-+ var->red.offset = 0;
-+ var->green.offset = 5;
-+ var->blue.offset = 10;
-+ var->red.length = var->green.length = var->blue.length = 5;
-+ break;
-+ case 24:
-+ case 32:
-+ var->red.offset = 0;
-+ var->green.offset = 8;
-+ var->blue.offset = 16;
-+ var->red.length = var->green.length = var->blue.length = 8;
-+ break;
-+ default:
-+ dev_err(dev, "color depth %d not supported\n",
-+ var->bits_per_pixel);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+/**
-+ * atmel_lcdfb_set_par - Alters the hardware state.
-+ * @info: frame buffer structure that represents a single frame buffer
-+ *
-+ * Using the fb_var_screeninfo in fb_info we set the resolution
-+ * of the this particular framebuffer. This function alters the
-+ * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
-+ * not alter var in fb_info since we are using that data. This
-+ * means we depend on the data in var inside fb_info to be
-+ * supported by the hardware. atmel_lcdfb_check_var is always called
-+ * before atmel_lcdfb_set_par to ensure this. Again if you can't
-+ * change the resolution you don't need this function.
-+ *
-+ */
-+static int atmel_lcdfb_set_par(struct fb_info *info)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned long value;
-+ unsigned long clk_value_khz;
-+
-+ dev_dbg(info->device, "%s:\n", __func__);
-+ dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
-+ info->var.xres, info->var.yres,
-+ info->var.xres_virtual, info->var.yres_virtual);
-+
-+ /* Turn off the LCD controller and the DMA controller */
-+ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-+
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
-+
-+ if (info->var.bits_per_pixel <= 8)
-+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
-+ else
-+ info->fix.visual = FB_VISUAL_TRUECOLOR;
-+
-+ info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
-+
-+ /* Re-initialize the DMA engine... */
-+ dev_dbg(info->device, " * update DMA engine\n");
-+ atmel_lcdfb_update_dma(info, &info->var);
-+
-+ /* ...set frame size and burst length = 8 words (?) */
-+ value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
-+ value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
-+
-+ /* Now, the LCDC core... */
-+
-+ /* Set pixel clock */
-+ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
-+
-+ value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
-+
-+ if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
-+ value++;
-+
-+ value = (value / 2) - 1;
-+
-+ if (value <= 0) {
-+ dev_notice(info->device, "Bypassing pixel clock divider\n");
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
-+ } else
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
-+
-+ /* Initialize control register 2 */
-+ value = sinfo->default_lcdcon2;
-+
-+ if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
-+ value |= ATMEL_LCDC_INVLINE_INVERTED;
-+ if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
-+ value |= ATMEL_LCDC_INVFRAME_INVERTED;
-+
-+ switch (info->var.bits_per_pixel) {
-+ case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
-+ case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
-+ case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
-+ case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
-+ case 15: /* fall through */
-+ case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
-+ case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
-+ case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
-+ default: BUG(); break;
-+ }
-+ dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
-+
-+ /* Vertical timing */
-+ value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
-+ value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
-+ value |= info->var.lower_margin;
-+ dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
-+
-+ /* Horizontal timing */
-+ value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
-+ value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
-+ value |= (info->var.left_margin - 1);
-+ dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
-+
-+ /* Display size */
-+ value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
-+ value |= info->var.yres - 1;
-+ lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
-+
-+ /* FIFO Threshold: Use formula from data sheet */
-+ value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
-+ lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
-+
-+ /* Toggle LCD_MODE every frame */
-+ lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
-+
-+ /* Disable all interrupts */
-+ lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
-+
-+ /* Set contrast */
-+ value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
-+ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
-+ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
-+ /* ...wait for DMA engine to become idle... */
-+ while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
-+ msleep(10);
-+
-+ dev_dbg(info->device, " * re-enable DMA engine\n");
-+ /* ...and enable it with updated configuration */
-+ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
-+
-+ dev_dbg(info->device, " * re-enable LCDC core\n");
-+ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-+ (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
-+
-+ dev_dbg(info->device, " * DONE\n");
-+
-+ return 0;
-+}
-+
-+static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
-+{
-+ chan &= 0xffff;
-+ chan >>= 16 - bf->length;
-+ return chan << bf->offset;
-+}
-+
-+/**
-+ * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
-+ * @regno: Which register in the CLUT we are programming
-+ * @red: The red value which can be up to 16 bits wide
-+ * @green: The green value which can be up to 16 bits wide
-+ * @blue: The blue value which can be up to 16 bits wide.
-+ * @transp: If supported the alpha value which can be up to 16 bits wide.
-+ * @info: frame buffer info structure
-+ *
-+ * Set a single color register. The values supplied have a 16 bit
-+ * magnitude which needs to be scaled in this function for the hardware.
-+ * Things to take into consideration are how many color registers, if
-+ * any, are supported with the current color visual. With truecolor mode
-+ * no color palettes are supported. Here a psuedo palette is created
-+ * which we store the value in pseudo_palette in struct fb_info. For
-+ * pseudocolor mode we have a limited color palette. To deal with this
-+ * we can program what color is displayed for a particular pixel value.
-+ * DirectColor is similar in that we can program each color field. If
-+ * we have a static colormap we don't need to implement this function.
-+ *
-+ * Returns negative errno on error, or zero on success. In an
-+ * ideal world, this would have been the case, but as it turns
-+ * out, the other drivers return 1 on failure, so that's what
-+ * we're going to do.
-+ */
-+static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
-+ unsigned int green, unsigned int blue,
-+ unsigned int transp, struct fb_info *info)
-+{
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ unsigned int val;
-+ u32 *pal;
-+ int ret = 1;
-+
-+ if (info->var.grayscale)
-+ red = green = blue = (19595 * red + 38470 * green
-+ + 7471 * blue) >> 16;
-+
-+ switch (info->fix.visual) {
-+ case FB_VISUAL_TRUECOLOR:
-+ if (regno < 16) {
-+ pal = info->pseudo_palette;
-+
-+ val = chan_to_field(red, &info->var.red);
-+ val |= chan_to_field(green, &info->var.green);
-+ val |= chan_to_field(blue, &info->var.blue);
-+
-+ pal[regno] = val;
-+ ret = 0;
-+ }
-+ break;
-+
-+ case FB_VISUAL_PSEUDOCOLOR:
-+ if (regno < 256) {
-+ val = ((red >> 11) & 0x001f);
-+ val |= ((green >> 6) & 0x03e0);
-+ val |= ((blue >> 1) & 0x7c00);
-+
-+ /*
-+ * TODO: intensity bit. Maybe something like
-+ * ~(red[10] ^ green[10] ^ blue[10]) & 1
-+ */
-+
-+ lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
-+ ret = 0;
-+ }
-+ break;
-+ }
-+
-+ return ret;
-+}
-+
-+static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ dev_dbg(info->device, "%s\n", __func__);
-+
-+ atmel_lcdfb_update_dma(info, var);
-+
-+ return 0;
-+}
-+
-+static struct fb_ops atmel_lcdfb_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = atmel_lcdfb_check_var,
-+ .fb_set_par = atmel_lcdfb_set_par,
-+ .fb_setcolreg = atmel_lcdfb_setcolreg,
-+ .fb_pan_display = atmel_lcdfb_pan_display,
-+ .fb_fillrect = cfb_fillrect,
-+ .fb_copyarea = cfb_copyarea,
-+ .fb_imageblit = cfb_imageblit,
-+};
-+
-+static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
-+{
-+ struct fb_info *info = dev_id;
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+ u32 status;
-+
-+ status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
-+ lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
-+ return IRQ_HANDLED;
-+}
-+
-+static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
-+{
-+ struct fb_info *info = sinfo->info;
-+ int ret = 0;
-+
-+ memset_io(info->screen_base, 0, info->fix.smem_len);
-+ info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
-+
-+ dev_info(info->device,
-+ "%luKiB frame buffer at %08lx (mapped at %p)\n",
-+ (unsigned long)info->fix.smem_len / 1024,
-+ (unsigned long)info->fix.smem_start,
-+ info->screen_base);
-+
-+ /* Allocate colormap */
-+ ret = fb_alloc_cmap(&info->cmap, 256, 0);
-+ if (ret < 0)
-+ dev_err(info->device, "Alloc color map failed\n");
-+
-+ return ret;
-+}
-+
-+static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
-+{
-+ if (sinfo->bus_clk)
-+ clk_enable(sinfo->bus_clk);
-+ clk_enable(sinfo->lcdc_clk);
-+}
-+
-+static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
-+{
-+ if (sinfo->bus_clk)
-+ clk_disable(sinfo->bus_clk);
-+ clk_disable(sinfo->lcdc_clk);
-+}
-+
-+
-+static int __init atmel_lcdfb_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info;
-+ struct atmel_lcdfb_info *sinfo;
-+ struct atmel_lcdfb_info *pdata_sinfo;
-+ struct resource *regs = NULL;
-+ struct resource *map = NULL;
-+ int ret;
-+
-+ dev_dbg(dev, "%s BEGIN\n", __func__);
-+
-+ ret = -ENOMEM;
-+ info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
-+ if (!info) {
-+ dev_err(dev, "cannot allocate memory\n");
-+ goto out;
-+ }
-+
-+ sinfo = info->par;
-+
-+ if (dev->platform_data) {
-+ pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
-+ sinfo->default_bpp = pdata_sinfo->default_bpp;
-+ sinfo->default_dmacon = pdata_sinfo->default_dmacon;
-+ sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
-+ sinfo->default_monspecs = pdata_sinfo->default_monspecs;
-+ sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
-+ sinfo->guard_time = pdata_sinfo->guard_time;
-+ } else {
-+ dev_err(dev, "cannot get default configuration\n");
-+ goto free_info;
-+ }
-+ sinfo->info = info;
-+ sinfo->pdev = pdev;
-+
-+ strcpy(info->fix.id, sinfo->pdev->name);
-+ info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
-+ info->pseudo_palette = sinfo->pseudo_palette;
-+ info->fbops = &atmel_lcdfb_ops;
-+
-+ memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
-+ info->fix = atmel_lcdfb_fix;
-+
-+ /* Enable LCDC Clocks */
-+ if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
-+ sinfo->bus_clk = clk_get(dev, "hck1");
-+ if (IS_ERR(sinfo->bus_clk)) {
-+ ret = PTR_ERR(sinfo->bus_clk);
-+ goto free_info;
-+ }
-+ }
-+ sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
-+ if (IS_ERR(sinfo->lcdc_clk)) {
-+ ret = PTR_ERR(sinfo->lcdc_clk);
-+ goto put_bus_clk;
-+ }
-+ atmel_lcdfb_start_clock(sinfo);
-+
-+ ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
-+ info->monspecs.modedb_len, info->monspecs.modedb,
-+ sinfo->default_bpp);
-+ if (!ret) {
-+ dev_err(dev, "no suitable video mode found\n");
-+ goto stop_clk;
-+ }
-+
-+
-+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ if (!regs) {
-+ dev_err(dev, "resources unusable\n");
-+ ret = -ENXIO;
-+ goto stop_clk;
-+ }
-+
-+ sinfo->irq_base = platform_get_irq(pdev, 0);
-+ if (sinfo->irq_base < 0) {
-+ dev_err(dev, "unable to get irq\n");
-+ ret = sinfo->irq_base;
-+ goto stop_clk;
-+ }
-+
-+ /* Initialize video memory */
-+ map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+ if (map) {
-+ /* use a pre-allocated memory buffer */
-+ info->fix.smem_start = map->start;
-+ info->fix.smem_len = map->end - map->start + 1;
-+ if (!request_mem_region(info->fix.smem_start,
-+ info->fix.smem_len, pdev->name)) {
-+ ret = -EBUSY;
-+ goto stop_clk;
-+ }
-+
-+ info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
-+ if (!info->screen_base)
-+ goto release_intmem;
-+ } else {
-+ /* alocate memory buffer */
-+ ret = atmel_lcdfb_alloc_video_memory(sinfo);
-+ if (ret < 0) {
-+ dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
-+ goto stop_clk;
-+ }
-+ }
-+
-+ /* LCDC registers */
-+ info->fix.mmio_start = regs->start;
-+ info->fix.mmio_len = regs->end - regs->start + 1;
-+
-+ if (!request_mem_region(info->fix.mmio_start,
-+ info->fix.mmio_len, pdev->name)) {
-+ ret = -EBUSY;
-+ goto free_fb;
-+ }
-+
-+ sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
-+ if (!sinfo->mmio) {
-+ dev_err(dev, "cannot map LCDC registers\n");
-+ goto release_mem;
-+ }
-+
-+ /* interrupt */
-+ ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
-+ if (ret) {
-+ dev_err(dev, "request_irq failed: %d\n", ret);
-+ goto unmap_mmio;
-+ }
-+
-+ ret = atmel_lcdfb_init_fbinfo(sinfo);
-+ if (ret < 0) {
-+ dev_err(dev, "init fbinfo failed: %d\n", ret);
-+ goto unregister_irqs;
-+ }
-+
-+ /*
-+ * This makes sure that our colour bitfield
-+ * descriptors are correctly initialised.
-+ */
-+ atmel_lcdfb_check_var(&info->var, info);
-+
-+ ret = fb_set_var(info, &info->var);
-+ if (ret) {
-+ dev_warn(dev, "unable to set display parameters\n");
-+ goto free_cmap;
-+ }
-+
-+ dev_set_drvdata(dev, info);
-+
-+ /*
-+ * Tell the world that we're ready to go
-+ */
-+ ret = register_framebuffer(info);
-+ if (ret < 0) {
-+ dev_err(dev, "failed to register framebuffer device: %d\n", ret);
-+ goto free_cmap;
-+ }
-+
-+ /* Power up the LCDC screen */
-+ if (sinfo->atmel_lcdfb_power_control)
-+ sinfo->atmel_lcdfb_power_control(1);
-+
-+ dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
-+ info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
-+
-+ return 0;
-+
-+
-+free_cmap:
-+ fb_dealloc_cmap(&info->cmap);
-+unregister_irqs:
-+ free_irq(sinfo->irq_base, info);
-+unmap_mmio:
-+ iounmap(sinfo->mmio);
-+release_mem:
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+free_fb:
-+ if (map)
-+ iounmap(info->screen_base);
-+ else
-+ atmel_lcdfb_free_video_memory(sinfo);
-+
-+release_intmem:
-+ if (map)
-+ release_mem_region(info->fix.smem_start, info->fix.smem_len);
-+stop_clk:
-+ atmel_lcdfb_stop_clock(sinfo);
-+ clk_put(sinfo->lcdc_clk);
-+put_bus_clk:
-+ if (sinfo->bus_clk)
-+ clk_put(sinfo->bus_clk);
-+free_info:
-+ framebuffer_release(info);
-+out:
-+ dev_dbg(dev, "%s FAILED\n", __func__);
-+ return ret;
-+}
-+
-+static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct fb_info *info = dev_get_drvdata(dev);
-+ struct atmel_lcdfb_info *sinfo = info->par;
-+
-+ if (!sinfo)
-+ return 0;
-+
-+ if (sinfo->atmel_lcdfb_power_control)
-+ sinfo->atmel_lcdfb_power_control(0);
-+ unregister_framebuffer(info);
-+ atmel_lcdfb_stop_clock(sinfo);
-+ clk_put(sinfo->lcdc_clk);
-+ if (sinfo->bus_clk)
-+ clk_put(sinfo->bus_clk);
-+ fb_dealloc_cmap(&info->cmap);
-+ free_irq(sinfo->irq_base, info);
-+ iounmap(sinfo->mmio);
-+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+ if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
-+ iounmap(info->screen_base);
-+ release_mem_region(info->fix.smem_start, info->fix.smem_len);
-+ } else {
-+ atmel_lcdfb_free_video_memory(sinfo);
-+ }
-+
-+ dev_set_drvdata(dev, NULL);
-+ framebuffer_release(info);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver atmel_lcdfb_driver = {
-+ .remove = __exit_p(atmel_lcdfb_remove),
-+ .driver = {
-+ .name = "atmel_lcdfb",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init atmel_lcdfb_init(void)
-+{
-+ return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
-+}
-+
-+static void __exit atmel_lcdfb_exit(void)
-+{
-+ platform_driver_unregister(&atmel_lcdfb_driver);
-+}
-+
-+module_init(atmel_lcdfb_init);
-+module_exit(atmel_lcdfb_exit);
-+
-+MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
-+MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/Kconfig avr32-git/drivers/video/backlight/Kconfig
---- linux-2.6.21.3/drivers/video/backlight/Kconfig 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/video/backlight/Kconfig 2007-06-06 11:34:00.000000000 +0200
-@@ -8,26 +8,44 @@
- Enable this to be able to choose the drivers for controlling the
- backlight and the LCD panel on some platforms, for example on PDAs.
-
--config BACKLIGHT_CLASS_DEVICE
-- tristate "Lowlevel Backlight controls"
-+#
-+# LCD
-+#
-+config LCD_CLASS_DEVICE
-+ tristate "Lowlevel LCD controls"
- depends on BACKLIGHT_LCD_SUPPORT
- default m
- help
-- This framework adds support for low-level control of the LCD
-- backlight. This includes support for brightness and power.
-+ This framework adds support for low-level control of LCD.
-+ Some framebuffer devices connect to platform-specific LCD modules
-+ in order to have a platform-specific way to control the flat panel
-+ (contrast and applying power to the LCD (not to the backlight!)).
-
- To have support for your specific LCD panel you will have to
- select the proper drivers which depend on this option.
-
--config LCD_CLASS_DEVICE
-- tristate "Lowlevel LCD controls"
-+config LCD_LTV350QV
-+ tristate "Samsung LTV350QV LCD Panel"
-+ depends on LCD_CLASS_DEVICE && SPI_MASTER
-+ default n
-+ help
-+ If you have a Samsung LTV350QV LCD panel, say y to include a
-+ power control driver for it. The panel starts up in power
-+ off state, so you need this driver in order to see any
-+ output.
-+
-+ The LTV350QV panel is present on all ATSTK1000 boards.
-+
-+#
-+# Backlight
-+#
-+config BACKLIGHT_CLASS_DEVICE
-+ tristate "Lowlevel Backlight controls"
- depends on BACKLIGHT_LCD_SUPPORT
- default m
- help
-- This framework adds support for low-level control of LCD.
-- Some framebuffer devices connect to platform-specific LCD modules
-- in order to have a platform-specific way to control the flat panel
-- (contrast and applying power to the LCD (not to the backlight!)).
-+ This framework adds support for low-level control of the LCD
-+ backlight. This includes support for brightness and power.
-
- To have support for your specific LCD panel you will have to
- select the proper drivers which depend on this option.
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/ltv350qv.c avr32-git/drivers/video/backlight/ltv350qv.c
---- linux-2.6.21.3/drivers/video/backlight/ltv350qv.c 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/video/backlight/ltv350qv.c 2007-06-06 11:34:00.000000000 +0200
-@@ -0,0 +1,340 @@
-+/*
-+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
-+ *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/lcd.h>
-+#include <linux/module.h>
-+#include <linux/spi/spi.h>
-+
-+#include "ltv350qv.h"
-+
-+#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
-+
-+struct ltv350qv {
-+ struct spi_device *spi;
-+ u8 *buffer;
-+ int power;
-+ struct lcd_device *ld;
-+};
-+
-+/*
-+ * The power-on and power-off sequences are taken from the
-+ * LTV350QV-F04 data sheet from Samsung. The register definitions are
-+ * taken from the S6F2002 command list also from Samsung. Both
-+ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
-+ *
-+ * There's still some voodoo going on here, but it's a lot better than
-+ * in the first incarnation of the driver where all we had was the raw
-+ * numbers from the initialization sequence.
-+ */
-+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
-+{
-+ struct spi_message msg;
-+ struct spi_transfer index_xfer = {
-+ .len = 3,
-+ .cs_change = 1,
-+ };
-+ struct spi_transfer value_xfer = {
-+ .len = 3,
-+ .cs_change = 1,
-+ };
-+
-+ spi_message_init(&msg);
-+
-+ /* register index */
-+ lcd->buffer[0] = LTV_OPC_INDEX;
-+ lcd->buffer[1] = 0x00;
-+ lcd->buffer[2] = reg & 0x7f;
-+ index_xfer.tx_buf = lcd->buffer;
-+ spi_message_add_tail(&index_xfer, &msg);
-+
-+ /* register value */
-+ lcd->buffer[4] = LTV_OPC_DATA;
-+ lcd->buffer[5] = val >> 8;
-+ lcd->buffer[6] = val;
-+ value_xfer.tx_buf = lcd->buffer + 4;
-+ spi_message_add_tail(&value_xfer, &msg);
-+
-+ return spi_sync(lcd->spi, &msg);
-+}
-+
-+/* The comments are taken straight from the data sheet */
-+static int ltv350qv_power_on(struct ltv350qv *lcd)
-+{
-+ int ret;
-+
-+ /* Power On Reset Display off State */
-+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
-+ goto err;
-+ msleep(15);
-+
-+ /* Power Setting Function 1 */
-+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
-+ goto err;
-+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
-+ goto err_power1;
-+
-+ /* Power Setting Function 2 */
-+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+ | LTV_SUPPLY_CURRENT(5)))
-+ goto err_power2;
-+
-+ msleep(55);
-+
-+ /* Instruction Setting */
-+ ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
-+ LTV_NMD | LTV_REV | LTV_NL(0x1d));
-+ ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
-+ LTV_DS_SAME | LTV_CHS_480
-+ | LTV_DF_RGB | LTV_RGB_BGR);
-+ ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
-+ LTV_VSPL_ACTIVE_LOW
-+ | LTV_HSPL_ACTIVE_LOW
-+ | LTV_DPL_SAMPLE_RISING
-+ | LTV_EPL_ACTIVE_LOW
-+ | LTV_SS_RIGHT_TO_LEFT);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
-+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+ LTV_NW_INV_1LINE | LTV_FWI(3));
-+ ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
-+ ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
-+ ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
-+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
-+ if (ret)
-+ goto err_settings;
-+
-+ /* Wait more than 2 frames */
-+ msleep(20);
-+
-+ /* Display On Sequence */
-+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+ LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
-+ | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
-+ | LTV_SUPPLY_CURRENT(5));
-+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+ LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
-+ if (ret)
-+ goto err_disp_on;
-+
-+ /* Display should now be ON. Phew. */
-+ return 0;
-+
-+err_disp_on:
-+ /*
-+ * Try to recover. Error handling probably isn't very useful
-+ * at this point, just make a best effort to switch the panel
-+ * off.
-+ */
-+ ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+ | LTV_SUPPLY_CURRENT(5));
-+ ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+ LTV_NW_INV_1LINE | LTV_FWI(3));
-+err_settings:
-+err_power2:
-+err_power1:
-+ ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
-+ msleep(1);
-+err:
-+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
-+ return -EIO;
-+}
-+
-+static int ltv350qv_power_off(struct ltv350qv *lcd)
-+{
-+ int ret;
-+
-+ /* Display Off Sequence */
-+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+ LTV_VCOM_DISABLE
-+ | LTV_DRIVE_CURRENT(5)
-+ | LTV_SUPPLY_CURRENT(5));
-+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+ LTV_NW_INV_1LINE | LTV_FWI(3));
-+
-+ /* Power down setting 1 */
-+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
-+
-+ /* Wait at least 1 ms */
-+ msleep(1);
-+
-+ /* Power down setting 2 */
-+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
-+
-+ /*
-+ * No point in trying to recover here. If we can't switch the
-+ * panel off, what are we supposed to do other than inform the
-+ * user about the failure?
-+ */
-+ if (ret)
-+ return -EIO;
-+
-+ /* Display power should now be OFF */
-+ return 0;
-+}
-+
-+static int ltv350qv_power(struct ltv350qv *lcd, int power)
-+{
-+ int ret = 0;
-+
-+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
-+ ret = ltv350qv_power_on(lcd);
-+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
-+ ret = ltv350qv_power_off(lcd);
-+
-+ if (!ret)
-+ lcd->power = power;
-+
-+ return ret;
-+}
-+
-+static int ltv350qv_set_power(struct lcd_device *ld, int power)
-+{
-+ struct ltv350qv *lcd;
-+
-+ lcd = class_get_devdata(&ld->class_dev);
-+ return ltv350qv_power(lcd, power);
-+}
-+
-+static int ltv350qv_get_power(struct lcd_device *ld)
-+{
-+ struct ltv350qv *lcd;
-+
-+ lcd = class_get_devdata(&ld->class_dev);
-+ return lcd->power;
-+}
-+
-+static struct lcd_ops ltv_ops = {
-+ .get_power = ltv350qv_get_power,
-+ .set_power = ltv350qv_set_power,
-+};
-+
-+static int __devinit ltv350qv_probe(struct spi_device *spi)
-+{
-+ struct ltv350qv *lcd;
-+ struct lcd_device *ld;
-+ int ret;
-+
-+ lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
-+ if (!lcd)
-+ return -ENOMEM;
-+
-+ lcd->spi = spi;
-+ lcd->power = FB_BLANK_POWERDOWN;
-+ lcd->buffer = kzalloc(8, GFP_KERNEL);
-+
-+ ld = lcd_device_register("ltv350qv", lcd, <v_ops);
-+ if (IS_ERR(ld)) {
-+ ret = PTR_ERR(ld);
-+ goto out_free_lcd;
-+ }
-+ lcd->ld = ld;
-+
-+ ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
-+ if (ret)
-+ goto out_unregister;
-+
-+ dev_set_drvdata(&spi->dev, lcd);
-+
-+ return 0;
-+
-+out_unregister:
-+ lcd_device_unregister(ld);
-+out_free_lcd:
-+ kfree(lcd);
-+ return ret;
-+}
-+
-+static int __devexit ltv350qv_remove(struct spi_device *spi)
-+{
-+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+ lcd_device_unregister(lcd->ld);
-+ kfree(lcd);
-+
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int ltv350qv_suspend(struct spi_device *spi,
-+ pm_message_t state, u32 level)
-+{
-+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+ if (level == SUSPEND_POWER_DOWN)
-+ return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+
-+ return 0;
-+}
-+
-+static int ltv350qv_resume(struct spi_device *spi, u32 level)
-+{
-+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+ if (level == RESUME_POWER_ON)
-+ return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
-+
-+ return 0;
-+}
-+#else
-+#define ltv350qv_suspend NULL
-+#define ltv350qv_resume NULL
-+#endif
-+
-+/* Power down all displays on reboot, poweroff or halt */
-+static void ltv350qv_shutdown(struct spi_device *spi)
-+{
-+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+}
-+
-+static struct spi_driver ltv350qv_driver = {
-+ .driver = {
-+ .name = "ltv350qv",
-+ .bus = &spi_bus_type,
-+ .owner = THIS_MODULE,
-+ },
-+
-+ .probe = ltv350qv_probe,
-+ .remove = __devexit_p(ltv350qv_remove),
-+ .shutdown = ltv350qv_shutdown,
-+ .suspend = ltv350qv_suspend,
-+ .resume = ltv350qv_resume,
-+};
-+
-+static int __init ltv350qv_init(void)
-+{
-+ return spi_register_driver(<v350qv_driver);
-+}
-+
-+static void __exit ltv350qv_exit(void)
-+{
-+ spi_unregister_driver(<v350qv_driver);
-+}
-+module_init(ltv350qv_init);
-+module_exit(ltv350qv_exit);
-+
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
-+MODULE_LICENSE("GPL");
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/ltv350qv.h avr32-git/drivers/video/backlight/ltv350qv.h
---- linux-2.6.21.3/drivers/video/backlight/ltv350qv.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/drivers/video/backlight/ltv350qv.h 2007-06-06 11:34:00.000000000 +0200
-@@ -0,0 +1,95 @@
-+/*
-+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
-+ *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __LTV350QV_H
-+#define __LTV350QV_H
-+
-+#define LTV_OPC_INDEX 0x74
-+#define LTV_OPC_DATA 0x76
-+
-+#define LTV_ID 0x00 /* ID Read */
-+#define LTV_IFCTL 0x01 /* Display Interface Control */
-+#define LTV_DATACTL 0x02 /* Display Data Control */
-+#define LTV_ENTRY_MODE 0x03 /* Entry Mode */
-+#define LTV_GATECTL1 0x04 /* Gate Control 1 */
-+#define LTV_GATECTL2 0x05 /* Gate Control 2 */
-+#define LTV_VBP 0x06 /* Vertical Back Porch */
-+#define LTV_HBP 0x07 /* Horizontal Back Porch */
-+#define LTV_SOTCTL 0x08 /* Source Output Timing Control */
-+#define LTV_PWRCTL1 0x09 /* Power Control 1 */
-+#define LTV_PWRCTL2 0x0a /* Power Control 2 */
-+#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */
-+
-+/* Bit definitions for LTV_IFCTL */
-+#define LTV_IM (1 << 15)
-+#define LTV_NMD (1 << 14)
-+#define LTV_SSMD (1 << 13)
-+#define LTV_REV (1 << 7)
-+#define LTV_NL(x) (((x) & 0x001f) << 0)
-+
-+/* Bit definitions for LTV_DATACTL */
-+#define LTV_DS_SAME (0 << 12)
-+#define LTV_DS_D_TO_S (1 << 12)
-+#define LTV_DS_S_TO_D (2 << 12)
-+#define LTV_CHS_384 (0 << 9)
-+#define LTV_CHS_480 (1 << 9)
-+#define LTV_CHS_492 (2 << 9)
-+#define LTV_DF_RGB (0 << 6)
-+#define LTV_DF_RGBX (1 << 6)
-+#define LTV_DF_XRGB (2 << 6)
-+#define LTV_RGB_RGB (0 << 2)
-+#define LTV_RGB_BGR (1 << 2)
-+#define LTV_RGB_GRB (2 << 2)
-+#define LTV_RGB_RBG (3 << 2)
-+
-+/* Bit definitions for LTV_ENTRY_MODE */
-+#define LTV_VSPL_ACTIVE_LOW (0 << 15)
-+#define LTV_VSPL_ACTIVE_HIGH (1 << 15)
-+#define LTV_HSPL_ACTIVE_LOW (0 << 14)
-+#define LTV_HSPL_ACTIVE_HIGH (1 << 14)
-+#define LTV_DPL_SAMPLE_RISING (0 << 13)
-+#define LTV_DPL_SAMPLE_FALLING (1 << 13)
-+#define LTV_EPL_ACTIVE_LOW (0 << 12)
-+#define LTV_EPL_ACTIVE_HIGH (1 << 12)
-+#define LTV_SS_LEFT_TO_RIGHT (0 << 8)
-+#define LTV_SS_RIGHT_TO_LEFT (1 << 8)
-+#define LTV_STB (1 << 1)
-+
-+/* Bit definitions for LTV_GATECTL1 */
-+#define LTV_CLW(x) (((x) & 0x0007) << 12)
-+#define LTV_GAON (1 << 5)
-+#define LTV_SDR (1 << 3)
-+
-+/* Bit definitions for LTV_GATECTL2 */
-+#define LTV_NW_INV_FRAME (0 << 14)
-+#define LTV_NW_INV_1LINE (1 << 14)
-+#define LTV_NW_INV_2LINE (2 << 14)
-+#define LTV_DSC (1 << 12)
-+#define LTV_GIF (1 << 8)
-+#define LTV_FHN (1 << 7)
-+#define LTV_FTI(x) (((x) & 0x0003) << 4)
-+#define LTV_FWI(x) (((x) & 0x0003) << 0)
-+
-+/* Bit definitions for LTV_SOTCTL */
-+#define LTV_SDT(x) (((x) & 0x0007) << 10)
-+#define LTV_EQ(x) (((x) & 0x0007) << 2)
-+
-+/* Bit definitions for LTV_PWRCTL1 */
-+#define LTV_VCOM_DISABLE (1 << 14)
-+#define LTV_VCOMOUT_ENABLE (1 << 11)
-+#define LTV_POWER_ON (1 << 9)
-+#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */
-+#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */
-+
-+/* Bit definitions for LTV_PWRCTL2 */
-+#define LTV_VCOML_ENABLE (1 << 13)
-+#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */
-+#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */
-+
-+#endif /* __LTV350QV_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/Makefile avr32-git/drivers/video/backlight/Makefile
---- linux-2.6.21.3/drivers/video/backlight/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/video/backlight/Makefile 2007-06-06 11:34:00.000000000 +0200
-@@ -1,6 +1,8 @@
- # Backlight & LCD drivers
-
- obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o
-+obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
-+
- obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
- obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o
- obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/fbmem.c avr32-git/drivers/video/fbmem.c
---- linux-2.6.21.3/drivers/video/fbmem.c 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/video/fbmem.c 2007-06-06 11:34:00.000000000 +0200
-@@ -1198,6 +1198,10 @@
- pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
- #elif defined(__arm__) || defined(__sh__) || defined(__m32r__)
- vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
-+#elif defined(__avr32__)
-+ vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
-+ & ~_PAGE_CACHABLE)
-+ | (_PAGE_BUFFER | _PAGE_DIRTY));
- #elif defined(__ia64__)
- if (efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start))
- vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/Kconfig avr32-git/drivers/video/Kconfig
---- linux-2.6.21.3/drivers/video/Kconfig 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/video/Kconfig 2007-06-06 11:34:00.000000000 +0200
-@@ -674,6 +674,22 @@
- working with S1D13806). Product specs at
- <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm>
-
-+config FB_ATMEL
-+ tristate "AT91/AT32 LCD Controller support"
-+ depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || AVR32)
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ This enables support for the AT91/AT32 LCD Controller.
-+
-+config FB_INTSRAM
-+ bool "Frame Buffer in internal SRAM"
-+ depends on FB_ATMEL && ARCH_AT91SAM9261
-+ help
-+ Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
-+ to let frame buffer in external SDRAM.
-+
- config FB_NVIDIA
- tristate "nVidia Framebuffer Support"
- depends on FB && PCI
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/Makefile avr32-git/drivers/video/Makefile
---- linux-2.6.21.3/drivers/video/Makefile 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/drivers/video/Makefile 2007-06-06 11:34:00.000000000 +0200
-@@ -75,6 +75,7 @@
- obj-$(CONFIG_FB_SA1100) += sa1100fb.o
- obj-$(CONFIG_FB_HIT) += hitfb.o
- obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o
-+obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
- obj-$(CONFIG_FB_PVR2) += pvr2fb.o
- obj-$(CONFIG_FB_VOODOO1) += sstfb.o
- obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-alpha/pgtable.h avr32-git/include/asm-alpha/pgtable.h
---- linux-2.6.21.3/include/asm-alpha/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-alpha/pgtable.h 2007-06-06 11:34:07.000000000 +0200
-@@ -345,10 +345,6 @@
- #define io_remap_pfn_range(vma, start, pfn, size, prot) \
- remap_pfn_range(vma, start, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #define pte_ERROR(e) \
- printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
- #define pmd_ERROR(e) \
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-alpha/scatterlist.h avr32-git/include/asm-alpha/scatterlist.h
---- linux-2.6.21.3/include/asm-alpha/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-alpha/scatterlist.h 2007-06-06 11:34:07.000000000 +0200
-@@ -2,6 +2,7 @@
- #define _ALPHA_SCATTERLIST_H
-
- #include <asm/page.h>
-+#include <asm/types.h>
-
- struct scatterlist {
- struct page *page;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/arch-at91/cpu.h avr32-git/include/asm-arm/arch-at91/cpu.h
---- linux-2.6.21.3/include/asm-arm/arch-at91/cpu.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-arm/arch-at91/cpu.h 2007-06-06 11:34:07.000000000 +0200
-@@ -68,4 +68,10 @@
- #define cpu_is_at91sam9263() (0)
- #endif
-
-+/*
-+ * Since this is ARM, we will never run on any AVR32 CPU. But these
-+ * definitions may reduce clutter in common drivers.
-+ */
-+#define cpu_is_at32ap7000() (0)
-+
- #endif
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/pgtable.h avr32-git/include/asm-arm/pgtable.h
---- linux-2.6.21.3/include/asm-arm/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-arm/pgtable.h 2007-06-06 11:34:10.000000000 +0200
-@@ -395,10 +395,6 @@
- #define io_remap_pfn_range(vma,from,pfn,size,prot) \
- remap_pfn_range(vma, from, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #define pgtable_cache_init() do { } while (0)
-
- #endif /* !__ASSEMBLY__ */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/pgtable-nommu.h avr32-git/include/asm-arm/pgtable-nommu.h
---- linux-2.6.21.3/include/asm-arm/pgtable-nommu.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-arm/pgtable-nommu.h 2007-06-06 11:34:10.000000000 +0200
-@@ -83,10 +83,6 @@
- #define io_remap_page_range remap_page_range
- #define io_remap_pfn_range remap_pfn_range
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
-
- /*
- * All 32bit addresses are effectively valid for vmalloc...
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm26/pgtable.h avr32-git/include/asm-arm26/pgtable.h
---- linux-2.6.21.3/include/asm-arm26/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-arm26/pgtable.h 2007-06-06 11:34:10.000000000 +0200
-@@ -297,10 +297,6 @@
- #define io_remap_pfn_range(vma,from,pfn,size,prot) \
- remap_pfn_range(vma, from, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #endif /* !__ASSEMBLY__ */
-
- #endif /* _ASMARM_PGTABLE_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/board.h avr32-git/include/asm-avr32/arch-at32ap/board.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/board.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/arch-at32ap/board.h 2007-06-06 11:34:10.000000000 +0200
-@@ -6,6 +6,8 @@
-
- #include <linux/types.h>
-
-+#define GPIO_PIN_NONE (-1)
-+
- /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
- void at32_add_system_devices(void);
-
-@@ -30,11 +32,22 @@
- struct platform_device *
- at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
-
--struct lcdc_platform_data {
-- unsigned long fbmem_start;
-- unsigned long fbmem_size;
-+struct platform_device *at32_add_device_twi(unsigned int id);
-+
-+struct mci_platform_data {
-+ int detect_pin;
-+ int wp_pin;
- };
- struct platform_device *
--at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data);
-+at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
-+struct platform_device *at32_add_device_usba(unsigned int id);
-+
-+struct atmel_lcdfb_info;
-+struct platform_device *
-+at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
-+ unsigned long fbmem_start, unsigned long fbmem_len);
-+
-+struct platform_device *at32_add_device_ac97c(unsigned int id);
-+struct platform_device *at32_add_device_abdac(unsigned int id);
-
- #endif /* __ASM_ARCH_BOARD_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/cpu.h avr32-git/include/asm-avr32/arch-at32ap/cpu.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/cpu.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/asm-avr32/arch-at32ap/cpu.h 2007-06-06 11:34:10.000000000 +0200
-@@ -0,0 +1,33 @@
-+/*
-+ * AVR32 and (fake) AT91 CPU identification
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __ASM_ARCH_CPU_H
-+#define __ASM_ARCH_CPU_H
-+
-+/*
-+ * Only AT32AP7000 is defined for now. We can identify the specific
-+ * chip at runtime, but I'm not sure if it's really worth it.
-+ */
-+#ifdef CONFIG_CPU_AT32AP7000
-+# define cpu_is_at32ap7000() (1)
-+#else
-+# define cpu_is_at32ap7000() (0)
-+#endif
-+
-+/*
-+ * Since this is AVR32, we will never run on any AT91 CPU. But these
-+ * definitions may reduce clutter in common drivers.
-+ */
-+#define cpu_is_at91rm9200() (0)
-+#define cpu_is_at91sam9xe() (0)
-+#define cpu_is_at91sam9260() (0)
-+#define cpu_is_at91sam9261() (0)
-+#define cpu_is_at91sam9263() (0)
-+
-+#endif /* __ASM_ARCH_CPU_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/gpio.h avr32-git/include/asm-avr32/arch-at32ap/gpio.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/gpio.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/arch-at32ap/gpio.h 2007-06-06 11:34:11.000000000 +0200
-@@ -14,6 +14,8 @@
- int gpio_get_value(unsigned int gpio);
- void gpio_set_value(unsigned int gpio, int value);
-
-+#include <asm-generic/gpio.h> /* cansleep wrappers */
-+
- static inline int gpio_to_irq(unsigned int gpio)
- {
- return gpio + GPIO_IRQ_BASE;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/io.h avr32-git/include/asm-avr32/arch-at32ap/io.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/io.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/asm-avr32/arch-at32ap/io.h 2007-06-06 11:34:11.000000000 +0200
-@@ -0,0 +1,39 @@
-+#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
-+#define __ASM_AVR32_ARCH_AT32AP_IO_H
-+
-+/* For "bizarre" halfword swapping */
-+#include <linux/byteorder/swabb.h>
-+
-+#if defined(CONFIG_AP7000_32_BIT_SMC)
-+# define __swizzle_addr_b(addr) (addr ^ 3UL)
-+# define __swizzle_addr_w(addr) (addr ^ 2UL)
-+# define __swizzle_addr_l(addr) (addr)
-+# define ioswabb(a, x) (x)
-+# define ioswabw(a, x) (x)
-+# define ioswabl(a, x) (x)
-+# define __mem_ioswabb(a, x) (x)
-+# define __mem_ioswabw(a, x) swab16(x)
-+# define __mem_ioswabl(a, x) swab32(x)
-+#elif defined(CONFIG_AP7000_16_BIT_SMC)
-+# define __swizzle_addr_b(addr) (addr ^ 1UL)
-+# define __swizzle_addr_w(addr) (addr)
-+# define __swizzle_addr_l(addr) (addr)
-+# define ioswabb(a, x) (x)
-+# define ioswabw(a, x) (x)
-+# define ioswabl(a, x) swahw32(x)
-+# define __mem_ioswabb(a, x) (x)
-+# define __mem_ioswabw(a, x) swab16(x)
-+# define __mem_ioswabl(a, x) swahb32(x)
-+#else
-+# define __swizzle_addr_b(addr) (addr)
-+# define __swizzle_addr_w(addr) (addr)
-+# define __swizzle_addr_l(addr) (addr)
-+# define ioswabb(a, x) (x)
-+# define ioswabw(a, x) swab16(x)
-+# define ioswabl(a, x) swab32(x)
-+# define __mem_ioswabb(a, x) (x)
-+# define __mem_ioswabw(a, x) (x)
-+# define __mem_ioswabl(a, x) (x)
-+#endif
-+
-+#endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/smc.h avr32-git/include/asm-avr32/arch-at32ap/smc.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/smc.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/arch-at32ap/smc.h 2007-06-06 11:34:11.000000000 +0200
-@@ -48,10 +48,32 @@
- unsigned int nwe_controlled:1;
-
- /*
-+ * 0: NWAIT is disabled
-+ * 1: Reserved
-+ * 2: NWAIT is frozen mode
-+ * 3: NWAIT in ready mode
-+ */
-+ unsigned int nwait_mode:2;
-+
-+ /*
- * 0: Byte select access type
- * 1: Byte write access type
- */
- unsigned int byte_write:1;
-+
-+ /*
-+ * Number of clock cycles before data is released after
-+ * the rising edge of the read controlling signal
-+ *
-+ * Total cycles from SMC is tdf_cycles + 1
-+ */
-+ unsigned int tdf_cycles:4;
-+
-+ /*
-+ * 0: TDF optimization disabled
-+ * 1: TDF optimization enabled
-+ */
-+ unsigned int tdf_mode:1;
- };
-
- extern int smc_set_configuration(int cs, const struct smc_config *config);
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/time.h avr32-git/include/asm-avr32/arch-at32ap/time.h
---- linux-2.6.21.3/include/asm-avr32/arch-at32ap/time.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/asm-avr32/arch-at32ap/time.h 2007-06-06 11:34:11.000000000 +0200
-@@ -0,0 +1,112 @@
-+/*
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
-+#define _ASM_AVR32_ARCH_AT32AP_TIME_H
-+
-+#include <linux/platform_device.h>
-+
-+extern struct irqaction timer_irqaction;
-+extern struct platform_device at32_systc0_device;
-+extern void local_timer_interrupt(int irq, void *dev_id);
-+
-+#define TIMER_BCR 0x000000c0
-+#define TIMER_BCR_SYNC 0
-+#define TIMER_BMR 0x000000c4
-+#define TIMER_BMR_TC0XC0S 0
-+#define TIMER_BMR_TC1XC1S 2
-+#define TIMER_BMR_TC2XC2S 4
-+#define TIMER_CCR 0x00000000
-+#define TIMER_CCR_CLKDIS 1
-+#define TIMER_CCR_CLKEN 0
-+#define TIMER_CCR_SWTRG 2
-+#define TIMER_CMR 0x00000004
-+#define TIMER_CMR_ABETRG 10
-+#define TIMER_CMR_ACPA 16
-+#define TIMER_CMR_ACPC 18
-+#define TIMER_CMR_AEEVT 20
-+#define TIMER_CMR_ASWTRG 22
-+#define TIMER_CMR_BCPB 24
-+#define TIMER_CMR_BCPC 26
-+#define TIMER_CMR_BEEVT 28
-+#define TIMER_CMR_BSWTRG 30
-+#define TIMER_CMR_BURST 4
-+#define TIMER_CMR_CLKI 3
-+#define TIMER_CMR_CPCDIS 7
-+#define TIMER_CMR_CPCSTOP 6
-+#define TIMER_CMR_CPCTRG 14
-+#define TIMER_CMR_EEVT 10
-+#define TIMER_CMR_EEVTEDG 8
-+#define TIMER_CMR_ENETRG 12
-+#define TIMER_CMR_ETRGEDG 8
-+#define TIMER_CMR_LDBDIS 7
-+#define TIMER_CMR_LDBSTOP 6
-+#define TIMER_CMR_LDRA 16
-+#define TIMER_CMR_LDRB 18
-+#define TIMER_CMR_TCCLKS 0
-+#define TIMER_CMR_WAVE 15
-+#define TIMER_CMR_WAVSEL 13
-+#define TIMER_CV 0x00000010
-+#define TIMER_CV_CV 0
-+#define TIMER_IDR 0x00000028
-+#define TIMER_IDR_COVFS 0
-+#define TIMER_IDR_CPAS 2
-+#define TIMER_IDR_CPBS 3
-+#define TIMER_IDR_CPCS 4
-+#define TIMER_IDR_ETRGS 7
-+#define TIMER_IDR_LDRAS 5
-+#define TIMER_IDR_LDRBS 6
-+#define TIMER_IDR_LOVRS 1
-+#define TIMER_IER 0x00000024
-+#define TIMER_IER_COVFS 0
-+#define TIMER_IER_CPAS 2
-+#define TIMER_IER_CPBS 3
-+#define TIMER_IER_CPCS 4
-+#define TIMER_IER_ETRGS 7
-+#define TIMER_IER_LDRAS 5
-+#define TIMER_IER_LDRBS 6
-+#define TIMER_IER_LOVRS 1
-+#define TIMER_IMR 0x0000002c
-+#define TIMER_IMR_COVFS 0
-+#define TIMER_IMR_CPAS 2
-+#define TIMER_IMR_CPBS 3
-+#define TIMER_IMR_CPCS 4
-+#define TIMER_IMR_ETRGS 7
-+#define TIMER_IMR_LDRAS 5
-+#define TIMER_IMR_LDRBS 6
-+#define TIMER_IMR_LOVRS 1
-+#define TIMER_RA 0x00000014
-+#define TIMER_RA_RA 0
-+#define TIMER_RB 0x00000018
-+#define TIMER_RB_RB 0
-+#define TIMER_RC 0x0000001c
-+#define TIMER_RC_RC 0
-+#define TIMER_SR 0x00000020
-+#define TIMER_SR_CLKSTA 16
-+#define TIMER_SR_COVFS 0
-+#define TIMER_SR_CPAS 2
-+#define TIMER_SR_CPBS 3
-+#define TIMER_SR_CPCS 4
-+#define TIMER_SR_ETRGS 7
-+#define TIMER_SR_LDRAS 5
-+#define TIMER_SR_LDRBS 6
-+#define TIMER_SR_LOVRS 1
-+#define TIMER_SR_MTIOA 17
-+#define TIMER_SR_MTIOB 18
-+
-+/* Bit manipulation macros */
-+#define TIMER_BIT(name) (1 << TIMER_##name)
-+#define TIMER_BF(name,value) ((value) << TIMER_##name)
-+
-+/* Register access macros */
-+#define timer_read(port,instance,reg) \
-+ __raw_readl(port + (0x40 * instance) + TIMER_##reg)
-+#define timer_write(port,instance,reg,value) \
-+ __raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
-+
-+#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/atomic.h avr32-git/include/asm-avr32/atomic.h
---- linux-2.6.21.3/include/asm-avr32/atomic.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/atomic.h 2007-06-06 11:34:11.000000000 +0200
-@@ -173,7 +173,7 @@
- }
-
- #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
--#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
-+#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
-
- #define atomic_sub(i, v) (void)atomic_sub_return(i, v)
- #define atomic_add(i, v) (void)atomic_add_return(i, v)
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/bug.h avr32-git/include/asm-avr32/bug.h
---- linux-2.6.21.3/include/asm-avr32/bug.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/bug.h 2007-06-06 11:34:11.000000000 +0200
-@@ -18,27 +18,53 @@
-
- #ifdef CONFIG_DEBUG_BUGVERBOSE
-
--#define BUG() \
-- do { \
-- asm volatile(".hword %0\n\t" \
-- ".hword %1\n\t" \
-- ".long %2" \
-- : \
-- : "n"(AVR32_BUG_OPCODE), \
-- "i"(__LINE__), "X"(__FILE__)); \
-- } while (0)
-+#define _BUG_OR_WARN(flags) \
-+ asm volatile( \
-+ "1: .hword %0\n" \
-+ " .section __bug_table,\"a\",@progbits\n" \
-+ "2: .long 1b\n" \
-+ " .long %1\n" \
-+ " .short %2\n" \
-+ " .short %3\n" \
-+ " .org 2b + %4\n" \
-+ " .previous" \
-+ : \
-+ : "i"(AVR32_BUG_OPCODE), "i"(__FILE__), \
-+ "i"(__LINE__), "i"(flags), \
-+ "i"(sizeof(struct bug_entry)))
-
- #else
-
-+#define _BUG_OR_WARN(flags) \
-+ asm volatile( \
-+ "1: .hword %0\n" \
-+ " .section __bug_table,\"a\",@progbits\n" \
-+ "2: .long 1b\n" \
-+ " .short %1\n" \
-+ " .org 2b + %2\n" \
-+ " .previous" \
-+ : \
-+ : "i"(AVR32_BUG_OPCODE), "i"(flags), \
-+ "i"(sizeof(struct bug_entry)))
-+
-+#endif /* CONFIG_DEBUG_BUGVERBOSE */
-+
- #define BUG() \
- do { \
-- asm volatile(".hword %0\n\t" \
-- : : "n"(AVR32_BUG_OPCODE)); \
-+ _BUG_OR_WARN(0); \
-+ for (;;); \
- } while (0)
-
--#endif /* CONFIG_DEBUG_BUGVERBOSE */
-+#define WARN_ON(condition) \
-+ ({ \
-+ typeof(condition) __ret_warn_on = (condition); \
-+ if (unlikely(__ret_warn_on)) \
-+ _BUG_OR_WARN(BUGFLAG_WARNING); \
-+ unlikely(__ret_warn_on); \
-+ })
-
- #define HAVE_ARCH_BUG
-+#define HAVE_ARCH_WARN_ON
-
- #endif /* CONFIG_BUG */
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/dma-controller.h avr32-git/include/asm-avr32/dma-controller.h
---- linux-2.6.21.3/include/asm-avr32/dma-controller.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/asm-avr32/dma-controller.h 2007-06-06 11:34:11.000000000 +0200
-@@ -0,0 +1,166 @@
-+/*
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __ASM_AVR32_DMA_CONTROLLER_H
-+#define __ASM_AVR32_DMA_CONTROLLER_H
-+
-+#include <linux/device.h>
-+
-+#define DMA_DIR_MEM_TO_MEM 0x0000
-+#define DMA_DIR_MEM_TO_PERIPH 0x0001
-+#define DMA_DIR_PERIPH_TO_MEM 0x0002
-+#define DMA_DIR_PERIPH_TO_PERIPH 0x0003
-+
-+#define DMA_WIDTH_8BIT 0
-+#define DMA_WIDTH_16BIT 1
-+#define DMA_WIDTH_32BIT 2
-+
-+struct dma_request {
-+ struct dma_controller *dmac;
-+ struct list_head list;
-+
-+ unsigned short channel;
-+
-+ void (*xfer_complete)(struct dma_request *req);
-+ void (*block_complete)(struct dma_request *req);
-+ void (*error)(struct dma_request *req);
-+};
-+
-+struct dma_request_sg {
-+ struct dma_request req;
-+
-+ int nr_sg;
-+ struct scatterlist *sg;
-+ unsigned long block_size;
-+ unsigned int nr_blocks;
-+
-+ dma_addr_t data_reg;
-+ unsigned short periph_id;
-+
-+ unsigned char direction;
-+ unsigned char width;
-+};
-+#define to_dma_request_sg(_req) \
-+ container_of(_req, struct dma_request_sg, req)
-+
-+struct dma_request_cyclic {
-+ struct dma_request req;
-+
-+ int periods;
-+ unsigned long buffer_size;
-+
-+ dma_addr_t buffer_start;
-+ dma_addr_t data_reg;
-+
-+ unsigned short periph_id;
-+ unsigned char direction;
-+ unsigned char width;
-+
-+ void *dev_id;
-+};
-+#define to_dma_request_cyclic(_req) \
-+ container_of(_req, struct dma_request_cyclic, req)
-+
-+struct dma_request_memcpy {
-+ struct dma_request req;
-+
-+ dma_addr_t src_addr;
-+ unsigned int src_width;
-+ unsigned int src_stride;
-+
-+ dma_addr_t dst_addr;
-+ unsigned int dst_width;
-+ unsigned int dst_stride;
-+
-+ size_t length;
-+
-+ unsigned short src_reverse:1;
-+ unsigned short dst_reverse:1;
-+};
-+#define to_dma_request_memcpy(_req) \
-+ container_of(_req, struct dma_request_memcpy, req)
-+
-+struct dma_controller {
-+ struct list_head list;
-+ int id;
-+ struct device *dev;
-+
-+ int (*alloc_channel)(struct dma_controller *dmac);
-+ void (*release_channel)(struct dma_controller *dmac,
-+ int channel);
-+ int (*prepare_request_sg)(struct dma_controller *dmac,
-+ struct dma_request_sg *req);
-+ int (*prepare_request_cyclic)(struct dma_controller *dmac,
-+ struct dma_request_cyclic *req);
-+ int (*prepare_request_memcpy)(struct dma_controller *dmac,
-+ struct dma_request_memcpy *req);
-+ int (*start_request)(struct dma_controller *dmac,
-+ unsigned int channel);
-+ int (*stop_request)(struct dma_controller *dmac,
-+ unsigned int channel);
-+ dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
-+ unsigned int channel);
-+};
-+
-+static inline int
-+dma_alloc_channel(struct dma_controller *dmac)
-+{
-+ return dmac->alloc_channel(dmac);
-+}
-+
-+static inline void
-+dma_release_channel(struct dma_controller *dmac, int chan)
-+{
-+ dmac->release_channel(dmac, chan);
-+}
-+
-+static inline int
-+dma_prepare_request_sg(struct dma_controller *dmac,
-+ struct dma_request_sg *req)
-+{
-+ return dmac->prepare_request_sg(dmac, req);
-+}
-+
-+static inline int
-+dma_prepare_request_cyclic(struct dma_controller *dmac,
-+ struct dma_request_cyclic *req)
-+{
-+ return dmac->prepare_request_cyclic(dmac, req);
-+}
-+
-+static inline int
-+dma_prepare_request_memcpy(struct dma_controller *dmac,
-+ struct dma_request_memcpy *req)
-+{
-+ return dmac->prepare_request_memcpy(dmac, req);
-+}
-+
-+static inline int
-+dma_start_request(struct dma_controller *dmac,
-+ unsigned int channel)
-+{
-+ return dmac->start_request(dmac, channel);
-+}
-+
-+static inline int
-+dma_stop_request(struct dma_controller *dmac,
-+ unsigned int channel)
-+{
-+ return dmac->stop_request(dmac, channel);
-+}
-+
-+static inline dma_addr_t
-+dma_get_current_pos(struct dma_controller *dmac,
-+ unsigned int channel)
-+{
-+ return dmac->get_current_pos(dmac, channel);
-+}
-+
-+extern int register_dma_controller(struct dma_controller *dmac);
-+extern struct dma_controller *find_dma_controller(int id);
-+
-+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/io.h avr32-git/include/asm-avr32/io.h
---- linux-2.6.21.3/include/asm-avr32/io.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/io.h 2007-06-06 11:34:11.000000000 +0200
-@@ -1,13 +1,15 @@
- #ifndef __ASM_AVR32_IO_H
- #define __ASM_AVR32_IO_H
-
-+#include <linux/kernel.h>
- #include <linux/string.h>
--
--#ifdef __KERNEL__
-+#include <linux/types.h>
-
- #include <asm/addrspace.h>
- #include <asm/byteorder.h>
-
-+#include <asm/arch/io.h>
-+
- /* virt_to_phys will only work when address is in P1 or P2 */
- static __inline__ unsigned long virt_to_phys(volatile void *address)
- {
-@@ -36,104 +38,215 @@
- extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
- extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
-
--static inline void writeb(unsigned char b, volatile void __iomem *addr)
-+static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
- {
-- *(volatile unsigned char __force *)addr = b;
-+ *(volatile u8 __force *)addr = v;
- }
--static inline void writew(unsigned short b, volatile void __iomem *addr)
-+static inline void __raw_writew(u16 v, volatile void __iomem *addr)
- {
-- *(volatile unsigned short __force *)addr = b;
-+ *(volatile u16 __force *)addr = v;
- }
--static inline void writel(unsigned int b, volatile void __iomem *addr)
-+static inline void __raw_writel(u32 v, volatile void __iomem *addr)
- {
-- *(volatile unsigned int __force *)addr = b;
-+ *(volatile u32 __force *)addr = v;
- }
--#define __raw_writeb writeb
--#define __raw_writew writew
--#define __raw_writel writel
-
--static inline unsigned char readb(const volatile void __iomem *addr)
-+static inline u8 __raw_readb(const volatile void __iomem *addr)
- {
-- return *(const volatile unsigned char __force *)addr;
-+ return *(const volatile u8 __force *)addr;
- }
--static inline unsigned short readw(const volatile void __iomem *addr)
-+static inline u16 __raw_readw(const volatile void __iomem *addr)
- {
-- return *(const volatile unsigned short __force *)addr;
-+ return *(const volatile u16 __force *)addr;
- }
--static inline unsigned int readl(const volatile void __iomem *addr)
-+static inline u32 __raw_readl(const volatile void __iomem *addr)
- {
-- return *(const volatile unsigned int __force *)addr;
-+ return *(const volatile u32 __force *)addr;
- }
--#define __raw_readb readb
--#define __raw_readw readw
--#define __raw_readl readl
-
--#define writesb(p, d, l) __raw_writesb((unsigned int)p, d, l)
--#define writesw(p, d, l) __raw_writesw((unsigned int)p, d, l)
--#define writesl(p, d, l) __raw_writesl((unsigned int)p, d, l)
-+/* Convert I/O port address to virtual address */
-+#ifndef __io
-+# define __io(p) ((void *)phys_to_uncached(p))
-+#endif
-
--#define readsb(p, d, l) __raw_readsb((unsigned int)p, d, l)
--#define readsw(p, d, l) __raw_readsw((unsigned int)p, d, l)
--#define readsl(p, d, l) __raw_readsl((unsigned int)p, d, l)
-+/*
-+ * Not really sure about the best way to slow down I/O on
-+ * AVR32. Defining it as a no-op until we have an actual test case.
-+ */
-+#define SLOW_DOWN_IO do { } while (0)
-
-+#define __BUILD_MEMORY_SINGLE(pfx, bwl, type) \
-+static inline void \
-+pfx##write##bwl(type val, volatile void __iomem *addr) \
-+{ \
-+ volatile type *__addr; \
-+ type __val; \
-+ \
-+ __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
-+ __val = pfx##ioswab##bwl(__addr, val); \
-+ \
-+ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
-+ \
-+ *__addr = __val; \
-+} \
-+ \
-+static inline type pfx##read##bwl(const volatile void __iomem *addr) \
-+{ \
-+ volatile type *__addr; \
-+ type __val; \
-+ \
-+ __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
-+ \
-+ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
-+ \
-+ __val = *__addr; \
-+ return pfx##ioswab##bwl(__addr, __val); \
-+}
-+
-+#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow) \
-+static inline void pfx##out##bwl##p(type val, unsigned long port) \
-+{ \
-+ volatile type *__addr; \
-+ type __val; \
-+ \
-+ __addr = __io(__swizzle_addr_##bwl(port)); \
-+ __val = pfx##ioswab##bwl(__addr, val); \
-+ \
-+ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
-+ \
-+ *__addr = __val; \
-+ slow; \
-+} \
-+ \
-+static inline type pfx##in##bwl##p(unsigned long port) \
-+{ \
-+ volatile type *__addr; \
-+ type __val; \
-+ \
-+ __addr = __io(__swizzle_addr_##bwl(port)); \
-+ \
-+ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
-+ \
-+ __val = *__addr; \
-+ slow; \
-+ \
-+ return pfx##ioswab##bwl(__addr, __val); \
-+}
-+
-+#define __BUILD_MEMORY_PFX(bus, bwl, type) \
-+ __BUILD_MEMORY_SINGLE(bus, bwl, type)
-+
-+#define BUILDIO_MEM(bwl, type) \
-+ __BUILD_MEMORY_PFX(, bwl, type) \
-+ __BUILD_MEMORY_PFX(__mem_, bwl, type)
-+
-+#define __BUILD_IOPORT_PFX(bus, bwl, type) \
-+ __BUILD_IOPORT_SINGLE(bus, bwl, type, ,) \
-+ __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
-+
-+#define BUILDIO_IOPORT(bwl, type) \
-+ __BUILD_IOPORT_PFX(, bwl, type) \
-+ __BUILD_IOPORT_PFX(__mem_, bwl, type)
-+
-+BUILDIO_MEM(b, u8)
-+BUILDIO_MEM(w, u16)
-+BUILDIO_MEM(l, u32)
-+
-+BUILDIO_IOPORT(b, u8)
-+BUILDIO_IOPORT(w, u16)
-+BUILDIO_IOPORT(l, u32)
-+
-+#define readb_relaxed readb
-+#define readw_relaxed readw
-+#define readl_relaxed readl
-+
-+#define __BUILD_MEMORY_STRING(bwl, type) \
-+static inline void writes##bwl(volatile void __iomem *addr, \
-+ const void *data, unsigned int count) \
-+{ \
-+ const type *__data = data; \
-+ \
-+ while (count--) \
-+ __mem_write##bwl(*__data++, addr); \
-+} \
-+ \
-+static inline void reads##bwl(const volatile void __iomem *addr, \
-+ void *data, unsigned int count) \
-+{ \
-+ type *__data = data; \
-+ \
-+ while (count--) \
-+ *__data++ = __mem_read##bwl(addr); \
-+}
-+
-+#define __BUILD_IOPORT_STRING(bwl, type) \
-+static inline void outs##bwl(unsigned long port, const void *data, \
-+ unsigned int count) \
-+{ \
-+ const type *__data = data; \
-+ \
-+ while (count--) \
-+ __mem_out##bwl(*__data++, port); \
-+} \
-+ \
-+static inline void ins##bwl(unsigned long port, void *data, \
-+ unsigned int count) \
-+{ \
-+ type *__data = data; \
-+ \
-+ while (count--) \
-+ *__data++ = __mem_in##bwl(port); \
-+}
-+
-+#define BUILDSTRING(bwl, type) \
-+ __BUILD_MEMORY_STRING(bwl, type) \
-+ __BUILD_IOPORT_STRING(bwl, type)
-+
-+BUILDSTRING(b, u8)
-+BUILDSTRING(w, u16)
-+BUILDSTRING(l, u32)
-
- /*
- * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
- */
- #ifndef ioread8
-
--#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
-+#define ioread8(p) ((unsigned int)readb(p))
-
--#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
--#define ioread16be(p) ({ unsigned int __v = be16_to_cpu(__raw_readw(p)); __v; })
-+#define ioread16(p) ((unsigned int)readw(p))
-+#define ioread16be(p) ((unsigned int)__raw_readw(p))
-
--#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
--#define ioread32be(p) ({ unsigned int __v = be32_to_cpu(__raw_readl(p)); __v; })
-+#define ioread32(p) ((unsigned int)readl(p))
-+#define ioread32be(p) ((unsigned int)__raw_readl(p))
-
--#define iowrite8(v,p) __raw_writeb(v, p)
-+#define iowrite8(v,p) writeb(v, p)
-
--#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
--#define iowrite16be(v,p) __raw_writew(cpu_to_be16(v), p)
-+#define iowrite16(v,p) writew(v, p)
-+#define iowrite16be(v,p) __raw_writew(v, p)
-
--#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
--#define iowrite32be(v,p) __raw_writel(cpu_to_be32(v), p)
-+#define iowrite32(v,p) writel(v, p)
-+#define iowrite32be(v,p) __raw_writel(v, p)
-
--#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
--#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
--#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
-+#define ioread8_rep(p,d,c) readsb(p,d,c)
-+#define ioread16_rep(p,d,c) readsw(p,d,c)
-+#define ioread32_rep(p,d,c) readsl(p,d,c)
-
--#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
--#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
--#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
-+#define iowrite8_rep(p,s,c) writesb(p,s,c)
-+#define iowrite16_rep(p,s,c) writesw(p,s,c)
-+#define iowrite32_rep(p,s,c) writesl(p,s,c)
-
- #endif
-
--
--/*
-- * These two are only here because ALSA _thinks_ it needs them...
-- */
- static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
- unsigned long count)
- {
-- char *p = to;
-- while (count) {
-- count--;
-- *p = readb(from);
-- p++;
-- from++;
-- }
-+ memcpy(to, (const void __force *)from, count);
- }
-
- static inline void memcpy_toio(volatile void __iomem *to, const void * from,
- unsigned long count)
- {
-- const char *p = from;
-- while (count) {
-- count--;
-- writeb(*p, to);
-- p++;
-- to++;
-- }
-+ memcpy((void __force *)to, from, count);
- }
-
- static inline void memset_io(volatile void __iomem *addr, unsigned char val,
-@@ -142,99 +255,8 @@
- memset((void __force *)addr, val, count);
- }
-
--/*
-- * Bad read/write accesses...
-- */
--extern void __readwrite_bug(const char *fn);
--
- #define IO_SPACE_LIMIT 0xffffffff
-
--/* Convert I/O port address to virtual address */
--#define __io(p) ((void __iomem *)phys_to_uncached(p))
--
--/*
-- * IO port access primitives
-- * -------------------------
-- *
-- * The AVR32 doesn't have special IO access instructions; all IO is memory
-- * mapped. Note that these are defined to perform little endian accesses
-- * only. Their primary purpose is to access PCI and ISA peripherals.
-- *
-- * Note that for a big endian machine, this implies that the following
-- * big endian mode connectivity is in place.
-- *
-- * The machine specific io.h include defines __io to translate an "IO"
-- * address to a memory address.
-- *
-- * Note that we prevent GCC re-ordering or caching values in expressions
-- * by introducing sequence points into the in*() definitions. Note that
-- * __raw_* do not guarantee this behaviour.
-- *
-- * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
-- */
--#define outb(v, p) __raw_writeb(v, __io(p))
--#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
--#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
--
--#define inb(p) __raw_readb(__io(p))
--#define inw(p) le16_to_cpu(__raw_readw(__io(p)))
--#define inl(p) le32_to_cpu(__raw_readl(__io(p)))
--
--static inline void __outsb(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- outb(*(u8 *)addr, port);
-- addr++;
-- }
--}
--
--static inline void __insb(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- *(u8 *)addr = inb(port);
-- addr++;
-- }
--}
--
--static inline void __outsw(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- outw(*(u16 *)addr, port);
-- addr += 2;
-- }
--}
--
--static inline void __insw(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- *(u16 *)addr = inw(port);
-- addr += 2;
-- }
--}
--
--static inline void __outsl(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- outl(*(u32 *)addr, port);
-- addr += 4;
-- }
--}
--
--static inline void __insl(unsigned long port, void *addr, unsigned int count)
--{
-- while (count--) {
-- *(u32 *)addr = inl(port);
-- addr += 4;
-- }
--}
--
--#define outsb(port, addr, count) __outsb(port, addr, count)
--#define insb(port, addr, count) __insb(port, addr, count)
--#define outsw(port, addr, count) __outsw(port, addr, count)
--#define insw(port, addr, count) __insw(port, addr, count)
--#define outsl(port, addr, count) __outsl(port, addr, count)
--#define insl(port, addr, count) __insl(port, addr, count)
--
- extern void __iomem *__ioremap(unsigned long offset, size_t size,
- unsigned long flags);
- extern void __iounmap(void __iomem *addr);
-@@ -292,6 +314,4 @@
- */
- #define xlate_dev_kmem_ptr(p) p
-
--#endif /* __KERNEL__ */
--
- #endif /* __ASM_AVR32_IO_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/kdebug.h avr32-git/include/asm-avr32/kdebug.h
---- linux-2.6.21.3/include/asm-avr32/kdebug.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/kdebug.h 2007-06-06 11:34:11.000000000 +0200
-@@ -12,16 +12,12 @@
-
- int register_die_notifier(struct notifier_block *nb);
- int unregister_die_notifier(struct notifier_block *nb);
--int register_page_fault_notifier(struct notifier_block *nb);
--int unregister_page_fault_notifier(struct notifier_block *nb);
- extern struct atomic_notifier_head avr32_die_chain;
-
- /* Grossly misnamed. */
- enum die_val {
-- DIE_FAULT,
- DIE_BREAKPOINT,
- DIE_SSTEP,
-- DIE_PAGE_FAULT,
- };
-
- static inline int notify_die(enum die_val val, struct pt_regs *regs,
-@@ -35,4 +31,18 @@
- return atomic_notifier_call_chain(&avr32_die_chain, val, &args);
- }
-
-+/*
-+ * These are only here because kprobes.c wants them to implement a
-+ * blatant layering violation. Will hopefully go away soon once all
-+ * architectures are updated.
-+ */
-+static inline int register_page_fault_notifier(struct notifier_block *nb)
-+{
-+ return 0;
-+}
-+static inline int unregister_page_fault_notifier(struct notifier_block *nb)
-+{
-+ return 0;
-+}
-+
- #endif /* __ASM_AVR32_KDEBUG_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/kprobes.h avr32-git/include/asm-avr32/kprobes.h
---- linux-2.6.21.3/include/asm-avr32/kprobes.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/kprobes.h 2007-06-06 11:34:11.000000000 +0200
-@@ -26,6 +26,7 @@
- kprobe_opcode_t insn[MAX_INSN_SIZE];
- };
-
-+extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
- extern int kprobe_exceptions_notify(struct notifier_block *self,
- unsigned long val, void *data);
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/pgtable.h avr32-git/include/asm-avr32/pgtable.h
---- linux-2.6.21.3/include/asm-avr32/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/pgtable.h 2007-06-06 11:34:11.000000000 +0200
-@@ -394,10 +394,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /* No page table caches to initialize (?) */
- #define pgtable_cache_init() do { } while(0)
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/processor.h avr32-git/include/asm-avr32/processor.h
---- linux-2.6.21.3/include/asm-avr32/processor.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/processor.h 2007-06-06 11:34:11.000000000 +0200
-@@ -40,6 +40,14 @@
- TLB_INVALID
- };
-
-+#define AVR32_FEATURE_RMW (1 << 0)
-+#define AVR32_FEATURE_DSP (1 << 1)
-+#define AVR32_FEATURE_SIMD (1 << 2)
-+#define AVR32_FEATURE_OCD (1 << 3)
-+#define AVR32_FEATURE_PCTR (1 << 4)
-+#define AVR32_FEATURE_JAVA (1 << 5)
-+#define AVR32_FEATURE_FPU (1 << 6)
-+
- struct avr32_cpuinfo {
- struct clk *clk;
- unsigned long loops_per_jiffy;
-@@ -48,6 +56,7 @@
- unsigned short arch_revision;
- unsigned short cpu_revision;
- enum tlb_config tlb_config;
-+ unsigned long features;
-
- struct cache_info icache;
- struct cache_info dcache;
-@@ -125,10 +134,10 @@
- #define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc)
-
- struct pt_regs;
--void show_trace(struct task_struct *task, unsigned long *stack,
-- struct pt_regs *regs);
--
- extern unsigned long get_wchan(struct task_struct *p);
-+extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
-+extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
-+ struct pt_regs *regs, const char *log_lvl);
-
- #define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc)
- #define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp)
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/scatterlist.h avr32-git/include/asm-avr32/scatterlist.h
---- linux-2.6.21.3/include/asm-avr32/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/scatterlist.h 2007-06-06 11:34:11.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef __ASM_AVR32_SCATTERLIST_H
- #define __ASM_AVR32_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/setup.h avr32-git/include/asm-avr32/setup.h
---- linux-2.6.21.3/include/asm-avr32/setup.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/setup.h 2007-06-06 11:34:11.000000000 +0200
-@@ -110,7 +110,7 @@
- int (*parse)(struct tag *);
- };
-
--#define __tag __attribute_used__ __attribute__((__section__(".taglist")))
-+#define __tag __attribute_used__ __attribute__((__section__(".taglist.init")))
- #define __tagtable(tag, fn) \
- static struct tagtable __tagtable_##fn __tag = { tag, fn }
-
-@@ -124,19 +124,12 @@
- #define for_each_tag(t,base) \
- for (t = base; t->hdr.size; t = tag_next(t))
-
--extern struct tag_mem_range *mem_phys;
--extern struct tag_mem_range *mem_reserved;
--extern struct tag_mem_range *mem_ramdisk;
--
- extern struct tag *bootloader_tags;
-
--extern void setup_bootmem(void);
--extern void setup_processor(void);
--extern void board_setup_fbmem(unsigned long fbmem_start,
-- unsigned long fbmem_size);
-+extern resource_size_t fbmem_start;
-+extern resource_size_t fbmem_size;
-
--/* Chip-specific hook to enable the use of SDRAM */
--void chip_enable_sdram(void);
-+void setup_processor(void);
-
- #endif /* !__ASSEMBLY__ */
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/sysreg.h avr32-git/include/asm-avr32/sysreg.h
---- linux-2.6.21.3/include/asm-avr32/sysreg.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/sysreg.h 2007-06-06 11:34:11.000000000 +0200
-@@ -7,326 +7,281 @@
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
--#ifndef __ASM_AVR32_SYSREG_H__
--#define __ASM_AVR32_SYSREG_H__
-+#ifndef __ASM_AVR32_SYSREG_H
-+#define __ASM_AVR32_SYSREG_H
-
- /* sysreg register offsets */
--#define SYSREG_SR 0x0000
--#define SYSREG_EVBA 0x0004
--#define SYSREG_ACBA 0x0008
--#define SYSREG_CPUCR 0x000c
--#define SYSREG_ECR 0x0010
--#define SYSREG_RSR_SUP 0x0014
--#define SYSREG_RSR_INT0 0x0018
--#define SYSREG_RSR_INT1 0x001c
--#define SYSREG_RSR_INT2 0x0020
--#define SYSREG_RSR_INT3 0x0024
--#define SYSREG_RSR_EX 0x0028
--#define SYSREG_RSR_NMI 0x002c
--#define SYSREG_RSR_DBG 0x0030
--#define SYSREG_RAR_SUP 0x0034
--#define SYSREG_RAR_INT0 0x0038
--#define SYSREG_RAR_INT1 0x003c
--#define SYSREG_RAR_INT2 0x0040
--#define SYSREG_RAR_INT3 0x0044
--#define SYSREG_RAR_EX 0x0048
--#define SYSREG_RAR_NMI 0x004c
--#define SYSREG_RAR_DBG 0x0050
--#define SYSREG_JECR 0x0054
--#define SYSREG_JOSP 0x0058
--#define SYSREG_JAVA_LV0 0x005c
--#define SYSREG_JAVA_LV1 0x0060
--#define SYSREG_JAVA_LV2 0x0064
--#define SYSREG_JAVA_LV3 0x0068
--#define SYSREG_JAVA_LV4 0x006c
--#define SYSREG_JAVA_LV5 0x0070
--#define SYSREG_JAVA_LV6 0x0074
--#define SYSREG_JAVA_LV7 0x0078
--#define SYSREG_JTBA 0x007c
--#define SYSREG_JBCR 0x0080
--#define SYSREG_CONFIG0 0x0100
--#define SYSREG_CONFIG1 0x0104
--#define SYSREG_COUNT 0x0108
--#define SYSREG_COMPARE 0x010c
--#define SYSREG_TLBEHI 0x0110
--#define SYSREG_TLBELO 0x0114
--#define SYSREG_PTBR 0x0118
--#define SYSREG_TLBEAR 0x011c
--#define SYSREG_MMUCR 0x0120
--#define SYSREG_TLBARLO 0x0124
--#define SYSREG_TLBARHI 0x0128
--#define SYSREG_PCCNT 0x012c
--#define SYSREG_PCNT0 0x0130
--#define SYSREG_PCNT1 0x0134
--#define SYSREG_PCCR 0x0138
--#define SYSREG_BEAR 0x013c
-+#define SYSREG_SR 0x0000
-+#define SYSREG_EVBA 0x0004
-+#define SYSREG_ACBA 0x0008
-+#define SYSREG_CPUCR 0x000c
-+#define SYSREG_ECR 0x0010
-+#define SYSREG_RSR_SUP 0x0014
-+#define SYSREG_RSR_INT0 0x0018
-+#define SYSREG_RSR_INT1 0x001c
-+#define SYSREG_RSR_INT2 0x0020
-+#define SYSREG_RSR_INT3 0x0024
-+#define SYSREG_RSR_EX 0x0028
-+#define SYSREG_RSR_NMI 0x002c
-+#define SYSREG_RSR_DBG 0x0030
-+#define SYSREG_RAR_SUP 0x0034
-+#define SYSREG_RAR_INT0 0x0038
-+#define SYSREG_RAR_INT1 0x003c
-+#define SYSREG_RAR_INT2 0x0040
-+#define SYSREG_RAR_INT3 0x0044
-+#define SYSREG_RAR_EX 0x0048
-+#define SYSREG_RAR_NMI 0x004c
-+#define SYSREG_RAR_DBG 0x0050
-+#define SYSREG_JECR 0x0054
-+#define SYSREG_JOSP 0x0058
-+#define SYSREG_JAVA_LV0 0x005c
-+#define SYSREG_JAVA_LV1 0x0060
-+#define SYSREG_JAVA_LV2 0x0064
-+#define SYSREG_JAVA_LV3 0x0068
-+#define SYSREG_JAVA_LV4 0x006c
-+#define SYSREG_JAVA_LV5 0x0070
-+#define SYSREG_JAVA_LV6 0x0074
-+#define SYSREG_JAVA_LV7 0x0078
-+#define SYSREG_JTBA 0x007c
-+#define SYSREG_JBCR 0x0080
-+#define SYSREG_CONFIG0 0x0100
-+#define SYSREG_CONFIG1 0x0104
-+#define SYSREG_COUNT 0x0108
-+#define SYSREG_COMPARE 0x010c
-+#define SYSREG_TLBEHI 0x0110
-+#define SYSREG_TLBELO 0x0114
-+#define SYSREG_PTBR 0x0118
-+#define SYSREG_TLBEAR 0x011c
-+#define SYSREG_MMUCR 0x0120
-+#define SYSREG_TLBARLO 0x0124
-+#define SYSREG_TLBARHI 0x0128
-+#define SYSREG_PCCNT 0x012c
-+#define SYSREG_PCNT0 0x0130
-+#define SYSREG_PCNT1 0x0134
-+#define SYSREG_PCCR 0x0138
-+#define SYSREG_BEAR 0x013c
-+#define SYSREG_SABAL 0x0300
-+#define SYSREG_SABAH 0x0304
-+#define SYSREG_SABD 0x0308
-
- /* Bitfields in SR */
--#define SYSREG_SR_C_OFFSET 0
--#define SYSREG_SR_C_SIZE 1
--#define SYSREG_Z_OFFSET 1
--#define SYSREG_Z_SIZE 1
--#define SYSREG_SR_N_OFFSET 2
--#define SYSREG_SR_N_SIZE 1
--#define SYSREG_SR_V_OFFSET 3
--#define SYSREG_SR_V_SIZE 1
--#define SYSREG_Q_OFFSET 4
--#define SYSREG_Q_SIZE 1
--#define SYSREG_GM_OFFSET 16
--#define SYSREG_GM_SIZE 1
--#define SYSREG_I0M_OFFSET 17
--#define SYSREG_I0M_SIZE 1
--#define SYSREG_I1M_OFFSET 18
--#define SYSREG_I1M_SIZE 1
--#define SYSREG_I2M_OFFSET 19
--#define SYSREG_I2M_SIZE 1
--#define SYSREG_I3M_OFFSET 20
--#define SYSREG_I3M_SIZE 1
--#define SYSREG_EM_OFFSET 21
--#define SYSREG_EM_SIZE 1
--#define SYSREG_M0_OFFSET 22
--#define SYSREG_M0_SIZE 1
--#define SYSREG_M1_OFFSET 23
--#define SYSREG_M1_SIZE 1
--#define SYSREG_M2_OFFSET 24
--#define SYSREG_M2_SIZE 1
--#define SYSREG_SR_D_OFFSET 26
--#define SYSREG_SR_D_SIZE 1
--#define SYSREG_DM_OFFSET 27
--#define SYSREG_DM_SIZE 1
--#define SYSREG_SR_J_OFFSET 28
--#define SYSREG_SR_J_SIZE 1
--#define SYSREG_R_OFFSET 29
--#define SYSREG_R_SIZE 1
--#define SYSREG_H_OFFSET 30
--#define SYSREG_H_SIZE 1
--
--/* Bitfields in EVBA */
--
--/* Bitfields in ACBA */
-+#define SYSREG_SR_C_OFFSET 0
-+#define SYSREG_SR_C_SIZE 1
-+#define SYSREG_Z_OFFSET 1
-+#define SYSREG_Z_SIZE 1
-+#define SYSREG_SR_N_OFFSET 2
-+#define SYSREG_SR_N_SIZE 1
-+#define SYSREG_SR_V_OFFSET 3
-+#define SYSREG_SR_V_SIZE 1
-+#define SYSREG_Q_OFFSET 4
-+#define SYSREG_Q_SIZE 1
-+#define SYSREG_L_OFFSET 5
-+#define SYSREG_L_SIZE 1
-+#define SYSREG_T_OFFSET 14
-+#define SYSREG_T_SIZE 1
-+#define SYSREG_SR_R_OFFSET 15
-+#define SYSREG_SR_R_SIZE 1
-+#define SYSREG_GM_OFFSET 16
-+#define SYSREG_GM_SIZE 1
-+#define SYSREG_I0M_OFFSET 17
-+#define SYSREG_I0M_SIZE 1
-+#define SYSREG_I1M_OFFSET 18
-+#define SYSREG_I1M_SIZE 1
-+#define SYSREG_I2M_OFFSET 19
-+#define SYSREG_I2M_SIZE 1
-+#define SYSREG_I3M_OFFSET 20
-+#define SYSREG_I3M_SIZE 1
-+#define SYSREG_EM_OFFSET 21
-+#define SYSREG_EM_SIZE 1
-+#define SYSREG_M0_OFFSET 22
-+#define SYSREG_M0_SIZE 1
-+#define SYSREG_M1_OFFSET 23
-+#define SYSREG_M1_SIZE 1
-+#define SYSREG_M2_OFFSET 24
-+#define SYSREG_M2_SIZE 1
-+#define SYSREG_SR_D_OFFSET 26
-+#define SYSREG_SR_D_SIZE 1
-+#define SYSREG_DM_OFFSET 27
-+#define SYSREG_DM_SIZE 1
-+#define SYSREG_SR_J_OFFSET 28
-+#define SYSREG_SR_J_SIZE 1
-+#define SYSREG_H_OFFSET 29
-+#define SYSREG_H_SIZE 1
-
- /* Bitfields in CPUCR */
--#define SYSREG_BI_OFFSET 0
--#define SYSREG_BI_SIZE 1
--#define SYSREG_BE_OFFSET 1
--#define SYSREG_BE_SIZE 1
--#define SYSREG_FE_OFFSET 2
--#define SYSREG_FE_SIZE 1
--#define SYSREG_RE_OFFSET 3
--#define SYSREG_RE_SIZE 1
--#define SYSREG_IBE_OFFSET 4
--#define SYSREG_IBE_SIZE 1
--#define SYSREG_IEE_OFFSET 5
--#define SYSREG_IEE_SIZE 1
--
--/* Bitfields in ECR */
--#define SYSREG_ECR_OFFSET 0
--#define SYSREG_ECR_SIZE 32
--
--/* Bitfields in RSR_SUP */
--
--/* Bitfields in RSR_INT0 */
--
--/* Bitfields in RSR_INT1 */
--
--/* Bitfields in RSR_INT2 */
--
--/* Bitfields in RSR_INT3 */
--
--/* Bitfields in RSR_EX */
--
--/* Bitfields in RSR_NMI */
--
--/* Bitfields in RSR_DBG */
--
--/* Bitfields in RAR_SUP */
--
--/* Bitfields in RAR_INT0 */
--
--/* Bitfields in RAR_INT1 */
--
--/* Bitfields in RAR_INT2 */
--
--/* Bitfields in RAR_INT3 */
--
--/* Bitfields in RAR_EX */
--
--/* Bitfields in RAR_NMI */
--
--/* Bitfields in RAR_DBG */
--
--/* Bitfields in JECR */
--
--/* Bitfields in JOSP */
--
--/* Bitfields in JAVA_LV0 */
--
--/* Bitfields in JAVA_LV1 */
--
--/* Bitfields in JAVA_LV2 */
--
--/* Bitfields in JAVA_LV3 */
--
--/* Bitfields in JAVA_LV4 */
--
--/* Bitfields in JAVA_LV5 */
--
--/* Bitfields in JAVA_LV6 */
--
--/* Bitfields in JAVA_LV7 */
--
--/* Bitfields in JTBA */
--
--/* Bitfields in JBCR */
-+#define SYSREG_BI_OFFSET 0
-+#define SYSREG_BI_SIZE 1
-+#define SYSREG_BE_OFFSET 1
-+#define SYSREG_BE_SIZE 1
-+#define SYSREG_FE_OFFSET 2
-+#define SYSREG_FE_SIZE 1
-+#define SYSREG_RE_OFFSET 3
-+#define SYSREG_RE_SIZE 1
-+#define SYSREG_IBE_OFFSET 4
-+#define SYSREG_IBE_SIZE 1
-+#define SYSREG_IEE_OFFSET 5
-+#define SYSREG_IEE_SIZE 1
-
- /* Bitfields in CONFIG0 */
--#define SYSREG_CONFIG0_D_OFFSET 1
--#define SYSREG_CONFIG0_D_SIZE 1
--#define SYSREG_CONFIG0_S_OFFSET 2
--#define SYSREG_CONFIG0_S_SIZE 1
--#define SYSREG_O_OFFSET 3
--#define SYSREG_O_SIZE 1
--#define SYSREG_P_OFFSET 4
--#define SYSREG_P_SIZE 1
--#define SYSREG_CONFIG0_J_OFFSET 5
--#define SYSREG_CONFIG0_J_SIZE 1
--#define SYSREG_F_OFFSET 6
--#define SYSREG_F_SIZE 1
--#define SYSREG_MMUT_OFFSET 7
--#define SYSREG_MMUT_SIZE 3
--#define SYSREG_AR_OFFSET 10
--#define SYSREG_AR_SIZE 3
--#define SYSREG_AT_OFFSET 13
--#define SYSREG_AT_SIZE 3
--#define SYSREG_PROCESSORREVISION_OFFSET 16
--#define SYSREG_PROCESSORREVISION_SIZE 8
--#define SYSREG_PROCESSORID_OFFSET 24
--#define SYSREG_PROCESSORID_SIZE 8
-+#define SYSREG_CONFIG0_R_OFFSET 0
-+#define SYSREG_CONFIG0_R_SIZE 1
-+#define SYSREG_CONFIG0_D_OFFSET 1
-+#define SYSREG_CONFIG0_D_SIZE 1
-+#define SYSREG_CONFIG0_S_OFFSET 2
-+#define SYSREG_CONFIG0_S_SIZE 1
-+#define SYSREG_CONFIG0_O_OFFSET 3
-+#define SYSREG_CONFIG0_O_SIZE 1
-+#define SYSREG_CONFIG0_P_OFFSET 4
-+#define SYSREG_CONFIG0_P_SIZE 1
-+#define SYSREG_CONFIG0_J_OFFSET 5
-+#define SYSREG_CONFIG0_J_SIZE 1
-+#define SYSREG_CONFIG0_F_OFFSET 6
-+#define SYSREG_CONFIG0_F_SIZE 1
-+#define SYSREG_MMUT_OFFSET 7
-+#define SYSREG_MMUT_SIZE 3
-+#define SYSREG_AR_OFFSET 10
-+#define SYSREG_AR_SIZE 3
-+#define SYSREG_AT_OFFSET 13
-+#define SYSREG_AT_SIZE 3
-+#define SYSREG_PROCESSORREVISION_OFFSET 16
-+#define SYSREG_PROCESSORREVISION_SIZE 8
-+#define SYSREG_PROCESSORID_OFFSET 24
-+#define SYSREG_PROCESSORID_SIZE 8
-
- /* Bitfields in CONFIG1 */
--#define SYSREG_DASS_OFFSET 0
--#define SYSREG_DASS_SIZE 3
--#define SYSREG_DLSZ_OFFSET 3
--#define SYSREG_DLSZ_SIZE 3
--#define SYSREG_DSET_OFFSET 6
--#define SYSREG_DSET_SIZE 4
--#define SYSREG_IASS_OFFSET 10
--#define SYSREG_IASS_SIZE 2
--#define SYSREG_ILSZ_OFFSET 13
--#define SYSREG_ILSZ_SIZE 3
--#define SYSREG_ISET_OFFSET 16
--#define SYSREG_ISET_SIZE 4
--#define SYSREG_DMMUSZ_OFFSET 20
--#define SYSREG_DMMUSZ_SIZE 6
--#define SYSREG_IMMUSZ_OFFSET 26
--#define SYSREG_IMMUSZ_SIZE 6
--
--/* Bitfields in COUNT */
--
--/* Bitfields in COMPARE */
-+#define SYSREG_DASS_OFFSET 0
-+#define SYSREG_DASS_SIZE 3
-+#define SYSREG_DLSZ_OFFSET 3
-+#define SYSREG_DLSZ_SIZE 3
-+#define SYSREG_DSET_OFFSET 6
-+#define SYSREG_DSET_SIZE 4
-+#define SYSREG_IASS_OFFSET 10
-+#define SYSREG_IASS_SIZE 3
-+#define SYSREG_ILSZ_OFFSET 13
-+#define SYSREG_ILSZ_SIZE 3
-+#define SYSREG_ISET_OFFSET 16
-+#define SYSREG_ISET_SIZE 4
-+#define SYSREG_DMMUSZ_OFFSET 20
-+#define SYSREG_DMMUSZ_SIZE 6
-+#define SYSREG_IMMUSZ_OFFSET 26
-+#define SYSREG_IMMUSZ_SIZE 6
-
- /* Bitfields in TLBEHI */
--#define SYSREG_ASID_OFFSET 0
--#define SYSREG_ASID_SIZE 8
--#define SYSREG_TLBEHI_I_OFFSET 8
--#define SYSREG_TLBEHI_I_SIZE 1
--#define SYSREG_TLBEHI_V_OFFSET 9
--#define SYSREG_TLBEHI_V_SIZE 1
--#define SYSREG_VPN_OFFSET 10
--#define SYSREG_VPN_SIZE 22
-+#define SYSREG_ASID_OFFSET 0
-+#define SYSREG_ASID_SIZE 8
-+#define SYSREG_TLBEHI_I_OFFSET 8
-+#define SYSREG_TLBEHI_I_SIZE 1
-+#define SYSREG_TLBEHI_V_OFFSET 9
-+#define SYSREG_TLBEHI_V_SIZE 1
-+#define SYSREG_VPN_OFFSET 10
-+#define SYSREG_VPN_SIZE 22
-
- /* Bitfields in TLBELO */
--#define SYSREG_W_OFFSET 0
--#define SYSREG_W_SIZE 1
--#define SYSREG_TLBELO_D_OFFSET 1
--#define SYSREG_TLBELO_D_SIZE 1
--#define SYSREG_SZ_OFFSET 2
--#define SYSREG_SZ_SIZE 2
--#define SYSREG_AP_OFFSET 4
--#define SYSREG_AP_SIZE 3
--#define SYSREG_B_OFFSET 7
--#define SYSREG_B_SIZE 1
--#define SYSREG_G_OFFSET 8
--#define SYSREG_G_SIZE 1
--#define SYSREG_TLBELO_C_OFFSET 9
--#define SYSREG_TLBELO_C_SIZE 1
--#define SYSREG_PFN_OFFSET 10
--#define SYSREG_PFN_SIZE 22
--
--/* Bitfields in PTBR */
--
--/* Bitfields in TLBEAR */
-+#define SYSREG_W_OFFSET 0
-+#define SYSREG_W_SIZE 1
-+#define SYSREG_TLBELO_D_OFFSET 1
-+#define SYSREG_TLBELO_D_SIZE 1
-+#define SYSREG_SZ_OFFSET 2
-+#define SYSREG_SZ_SIZE 2
-+#define SYSREG_AP_OFFSET 4
-+#define SYSREG_AP_SIZE 3
-+#define SYSREG_B_OFFSET 7
-+#define SYSREG_B_SIZE 1
-+#define SYSREG_G_OFFSET 8
-+#define SYSREG_G_SIZE 1
-+#define SYSREG_TLBELO_C_OFFSET 9
-+#define SYSREG_TLBELO_C_SIZE 1
-+#define SYSREG_PFN_OFFSET 10
-+#define SYSREG_PFN_SIZE 22
-
- /* Bitfields in MMUCR */
--#define SYSREG_E_OFFSET 0
--#define SYSREG_E_SIZE 1
--#define SYSREG_M_OFFSET 1
--#define SYSREG_M_SIZE 1
--#define SYSREG_MMUCR_I_OFFSET 2
--#define SYSREG_MMUCR_I_SIZE 1
--#define SYSREG_MMUCR_N_OFFSET 3
--#define SYSREG_MMUCR_N_SIZE 1
--#define SYSREG_MMUCR_S_OFFSET 4
--#define SYSREG_MMUCR_S_SIZE 1
--#define SYSREG_DLA_OFFSET 8
--#define SYSREG_DLA_SIZE 6
--#define SYSREG_DRP_OFFSET 14
--#define SYSREG_DRP_SIZE 6
--#define SYSREG_ILA_OFFSET 20
--#define SYSREG_ILA_SIZE 6
--#define SYSREG_IRP_OFFSET 26
--#define SYSREG_IRP_SIZE 6
--
--/* Bitfields in TLBARLO */
--
--/* Bitfields in TLBARHI */
--
--/* Bitfields in PCCNT */
--
--/* Bitfields in PCNT0 */
--
--/* Bitfields in PCNT1 */
-+#define SYSREG_E_OFFSET 0
-+#define SYSREG_E_SIZE 1
-+#define SYSREG_M_OFFSET 1
-+#define SYSREG_M_SIZE 1
-+#define SYSREG_MMUCR_I_OFFSET 2
-+#define SYSREG_MMUCR_I_SIZE 1
-+#define SYSREG_MMUCR_N_OFFSET 3
-+#define SYSREG_MMUCR_N_SIZE 1
-+#define SYSREG_MMUCR_S_OFFSET 4
-+#define SYSREG_MMUCR_S_SIZE 1
-+#define SYSREG_DLA_OFFSET 8
-+#define SYSREG_DLA_SIZE 6
-+#define SYSREG_DRP_OFFSET 14
-+#define SYSREG_DRP_SIZE 6
-+#define SYSREG_ILA_OFFSET 20
-+#define SYSREG_ILA_SIZE 6
-+#define SYSREG_IRP_OFFSET 26
-+#define SYSREG_IRP_SIZE 6
-
- /* Bitfields in PCCR */
--
--/* Bitfields in BEAR */
-+#define SYSREG_PCCR_R_OFFSET 1
-+#define SYSREG_PCCR_R_SIZE 1
-+#define SYSREG_PCCR_C_OFFSET 2
-+#define SYSREG_PCCR_C_SIZE 1
-+#define SYSREG_PCCR_S_OFFSET 3
-+#define SYSREG_PCCR_S_SIZE 1
-+#define SYSREG_IEC_OFFSET 4
-+#define SYSREG_IEC_SIZE 1
-+#define SYSREG_IE0_OFFSET 5
-+#define SYSREG_IE0_SIZE 1
-+#define SYSREG_IE1_OFFSET 6
-+#define SYSREG_IE1_SIZE 1
-+#define SYSREG_FC_OFFSET 8
-+#define SYSREG_FC_SIZE 1
-+#define SYSREG_F0_OFFSET 9
-+#define SYSREG_F0_SIZE 1
-+#define SYSREG_F1_OFFSET 10
-+#define SYSREG_F1_SIZE 1
-+#define SYSREG_CONF0_OFFSET 12
-+#define SYSREG_CONF0_SIZE 6
-+#define SYSREG_CONF1_OFFSET 18
-+#define SYSREG_CONF1_SIZE 6
-
- /* Constants for ECR */
--#define ECR_UNRECOVERABLE 0
--#define ECR_TLB_MULTIPLE 1
--#define ECR_BUS_ERROR_WRITE 2
--#define ECR_BUS_ERROR_READ 3
--#define ECR_NMI 4
--#define ECR_ADDR_ALIGN_X 5
--#define ECR_PROTECTION_X 6
--#define ECR_DEBUG 7
--#define ECR_ILLEGAL_OPCODE 8
--#define ECR_UNIMPL_INSTRUCTION 9
--#define ECR_PRIVILEGE_VIOLATION 10
--#define ECR_FPE 11
--#define ECR_COPROC_ABSENT 12
--#define ECR_ADDR_ALIGN_R 13
--#define ECR_ADDR_ALIGN_W 14
--#define ECR_PROTECTION_R 15
--#define ECR_PROTECTION_W 16
--#define ECR_DTLB_MODIFIED 17
--#define ECR_TLB_MISS_X 20
--#define ECR_TLB_MISS_R 24
--#define ECR_TLB_MISS_W 28
-+#define ECR_UNRECOVERABLE 0
-+#define ECR_TLB_MULTIPLE 1
-+#define ECR_BUS_ERROR_WRITE 2
-+#define ECR_BUS_ERROR_READ 3
-+#define ECR_NMI 4
-+#define ECR_ADDR_ALIGN_X 5
-+#define ECR_PROTECTION_X 6
-+#define ECR_DEBUG 7
-+#define ECR_ILLEGAL_OPCODE 8
-+#define ECR_UNIMPL_INSTRUCTION 9
-+#define ECR_PRIVILEGE_VIOLATION 10
-+#define ECR_FPE 11
-+#define ECR_COPROC_ABSENT 12
-+#define ECR_ADDR_ALIGN_R 13
-+#define ECR_ADDR_ALIGN_W 14
-+#define ECR_PROTECTION_R 15
-+#define ECR_PROTECTION_W 16
-+#define ECR_DTLB_MODIFIED 17
-+#define ECR_TLB_MISS_X 20
-+#define ECR_TLB_MISS_R 24
-+#define ECR_TLB_MISS_W 28
-
- /* Bit manipulation macros */
--#define SYSREG_BIT(name) (1 << SYSREG_##name##_OFFSET)
--#define SYSREG_BF(name,value) (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) << SYSREG_##name##_OFFSET)
--#define SYSREG_BFEXT(name,value) (((value) >> SYSREG_##name##_OFFSET) & ((1 << SYSREG_##name##_SIZE) - 1))
--#define SYSREG_BFINS(name,value,old) (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) << SYSREG_##name##_OFFSET)) | SYSREG_BF(name,value))
-+#define SYSREG_BIT(name) \
-+ (1 << SYSREG_##name##_OFFSET)
-+#define SYSREG_BF(name,value) \
-+ (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \
-+ << SYSREG_##name##_OFFSET)
-+#define SYSREG_BFEXT(name,value)\
-+ (((value) >> SYSREG_##name##_OFFSET) \
-+ & ((1 << SYSREG_##name##_SIZE) - 1))
-+#define SYSREG_BFINS(name,value,old) \
-+ (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \
-+ << SYSREG_##name##_OFFSET)) \
-+ | SYSREG_BF(name,value))
-
-+/* Register access macros */
- #ifdef __CHECKER__
- extern unsigned long __builtin_mfsr(unsigned long reg);
- extern void __builtin_mtsr(unsigned long reg, unsigned long value);
- #endif
-
--/* Register access macros */
--#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
--#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
-+#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
-+#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
-
--#endif /* __ASM_AVR32_SYSREG_H__ */
-+#endif /* __ASM_AVR32_SYSREG_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/system.h avr32-git/include/asm-avr32/system.h
---- linux-2.6.21.3/include/asm-avr32/system.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/system.h 2007-06-06 11:34:11.000000000 +0200
-@@ -9,6 +9,7 @@
- #define __ASM_AVR32_SYSTEM_H
-
- #include <linux/compiler.h>
-+#include <linux/linkage.h>
- #include <linux/types.h>
-
- #include <asm/ptrace.h>
-@@ -140,15 +141,9 @@
- sizeof(*(ptr))))
-
- struct pt_regs;
--extern void __die(const char *, struct pt_regs *, unsigned long,
-- const char *, const char *, unsigned long);
--extern void __die_if_kernel(const char *, struct pt_regs *, unsigned long,
-- const char *, const char *, unsigned long);
--
--#define die(msg, regs, err) \
-- __die(msg, regs, err, __FILE__ ":", __FUNCTION__, __LINE__)
--#define die_if_kernel(msg, regs, err) \
-- __die_if_kernel(msg, regs, err, __FILE__ ":", __FUNCTION__, __LINE__)
-+void NORET_TYPE die(const char *str, struct pt_regs *regs, long err);
-+void _exception(long signr, struct pt_regs *regs, int code,
-+ unsigned long addr);
-
- #define arch_align_stack(x) (x)
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/thread_info.h avr32-git/include/asm-avr32/thread_info.h
---- linux-2.6.21.3/include/asm-avr32/thread_info.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/thread_info.h 2007-06-06 11:34:11.000000000 +0200
-@@ -83,6 +83,7 @@
- #define TIF_SINGLE_STEP 6 /* single step after next break */
- #define TIF_MEMDIE 7
- #define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal */
-+#define TIF_CPU_GOING_TO_SLEEP 9 /* CPU is entering sleep 0 mode */
- #define TIF_USERSPACE 31 /* true if FS sets userspace */
-
- #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
-@@ -94,6 +95,7 @@
- #define _TIF_SINGLE_STEP (1 << TIF_SINGLE_STEP)
- #define _TIF_MEMDIE (1 << TIF_MEMDIE)
- #define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
-+#define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
-
- /* XXX: These two masks must never span more than 16 bits! */
- /* work to do on interrupt/exception return */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/uaccess.h avr32-git/include/asm-avr32/uaccess.h
---- linux-2.6.21.3/include/asm-avr32/uaccess.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/uaccess.h 2007-06-06 11:34:11.000000000 +0200
-@@ -181,24 +181,23 @@
-
- #define __get_user_nocheck(x, ptr, size) \
- ({ \
-- typeof(*(ptr)) __gu_val = (typeof(*(ptr)) __force)0; \
-+ unsigned long __gu_val = 0; \
- int __gu_err = 0; \
- \
- switch (size) { \
- case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break; \
- case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break; \
- case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break; \
-- case 8: __get_user_asm("d", __gu_val, ptr, __gu_err); break; \
- default: __gu_err = __get_user_bad(); break; \
- } \
- \
-- x = __gu_val; \
-+ x = (typeof(*(ptr)))__gu_val; \
- __gu_err; \
- })
-
- #define __get_user_check(x, ptr, size) \
- ({ \
-- typeof(*(ptr)) __gu_val = (typeof(*(ptr)) __force)0; \
-+ unsigned long __gu_val = 0; \
- const typeof(*(ptr)) __user * __gu_addr = (ptr); \
- int __gu_err = 0; \
- \
-@@ -216,10 +215,6 @@
- __get_user_asm("w", __gu_val, __gu_addr, \
- __gu_err); \
- break; \
-- case 8: \
-- __get_user_asm("d", __gu_val, __gu_addr, \
-- __gu_err); \
-- break; \
- default: \
- __gu_err = __get_user_bad(); \
- break; \
-@@ -227,7 +222,7 @@
- } else { \
- __gu_err = -EFAULT; \
- } \
-- x = __gu_val; \
-+ x = (typeof(*(ptr)))__gu_val; \
- __gu_err; \
- })
-
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/unaligned.h avr32-git/include/asm-avr32/unaligned.h
---- linux-2.6.21.3/include/asm-avr32/unaligned.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-avr32/unaligned.h 2007-06-06 11:34:11.000000000 +0200
-@@ -6,20 +6,31 @@
- * implementation. The AVR32 AP implementation can handle unaligned
- * words, but halfwords must be halfword-aligned, and doublewords must
- * be word-aligned.
-- *
-- * TODO: Make all this CPU-specific and optimize.
- */
-
--#include <linux/string.h>
-+#include <asm-generic/unaligned.h>
-
--/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
-+#ifdef CONFIG_CPU_AT32AP7000
-
-+/* REVISIT calling memmove() may be smaller for 64-bit values ... */
-+
-+#undef get_unaligned
- #define get_unaligned(ptr) \
-- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
-+ ___get_unaligned(ptr, sizeof((*ptr)))
-+#define ___get_unaligned(ptr, size) \
-+ ((size == 4) ? *(ptr) : __get_unaligned(ptr, size))
-+
-+#undef put_unaligned
-+#define put_unaligned(val, ptr) \
-+ ___put_unaligned((__u64)(val), ptr, sizeof((*ptr)))
-+#define ___put_unaligned(val, ptr, size) \
-+do { \
-+ if (size == 4) \
-+ *(ptr) = (val); \
-+ else \
-+ __put_unaligned(val, ptr, size); \
-+} while (0)
-
--#define put_unaligned(val, ptr) \
-- ({ __typeof__(*(ptr)) __tmp = (val); \
-- memmove((ptr), &__tmp, sizeof(*(ptr))); \
-- (void)0; })
-+#endif
-
- #endif /* __ASM_AVR32_UNALIGNED_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-frv/pgtable.h avr32-git/include/asm-frv/pgtable.h
---- linux-2.6.21.3/include/asm-frv/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-frv/pgtable.h 2007-06-06 11:34:11.000000000 +0200
-@@ -509,10 +509,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
- #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
- #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-frv/scatterlist.h avr32-git/include/asm-frv/scatterlist.h
---- linux-2.6.21.3/include/asm-frv/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-frv/scatterlist.h 2007-06-06 11:34:11.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef _ASM_SCATTERLIST_H
- #define _ASM_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- /*
- * Drivers must set either ->address or (preferred) ->page and ->offset
- * to indicate where data must be transferred to/from.
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-h8300/pgtable.h avr32-git/include/asm-h8300/pgtable.h
---- linux-2.6.21.3/include/asm-h8300/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-h8300/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -55,10 +55,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /*
- * All 32bit addresses are effectively valid for vmalloc...
- * Sort of meaningless for non-VM targets.
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-h8300/scatterlist.h avr32-git/include/asm-h8300/scatterlist.h
---- linux-2.6.21.3/include/asm-h8300/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-h8300/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef _H8300_SCATTERLIST_H
- #define _H8300_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-i386/pgtable.h avr32-git/include/asm-i386/pgtable.h
---- linux-2.6.21.3/include/asm-i386/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-i386/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -519,10 +519,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #include <asm-generic/pgtable.h>
-
- #endif /* _I386_PGTABLE_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-i386/scatterlist.h avr32-git/include/asm-i386/scatterlist.h
---- linux-2.6.21.3/include/asm-i386/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-i386/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef _I386_SCATTERLIST_H
- #define _I386_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ia64/pgtable.h avr32-git/include/asm-ia64/pgtable.h
---- linux-2.6.21.3/include/asm-ia64/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-ia64/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -485,10 +485,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ia64/scatterlist.h avr32-git/include/asm-ia64/scatterlist.h
---- linux-2.6.21.3/include/asm-ia64/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-ia64/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -6,6 +6,8 @@
- * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
- */
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m32r/pgtable.h avr32-git/include/asm-m32r/pgtable.h
---- linux-2.6.21.3/include/asm-m32r/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-m32r/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -381,10 +381,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
- #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
- #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m32r/scatterlist.h avr32-git/include/asm-m32r/scatterlist.h
---- linux-2.6.21.3/include/asm-m32r/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-m32r/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef _ASM_M32R_SCATTERLIST_H
- #define _ASM_M32R_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- char * address; /* Location data is to be transferred to, NULL for
- * highmem page */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68k/pgtable.h avr32-git/include/asm-m68k/pgtable.h
---- linux-2.6.21.3/include/asm-m68k/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-m68k/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -143,10 +143,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /* MMU-specific headers */
-
- #ifdef CONFIG_SUN3
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68knommu/pgtable.h avr32-git/include/asm-m68knommu/pgtable.h
---- linux-2.6.21.3/include/asm-m68knommu/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-m68knommu/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -59,10 +59,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /*
- * All 32bit addresses are effectively valid for vmalloc...
- * Sort of meaningless for non-VM targets.
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68knommu/scatterlist.h avr32-git/include/asm-m68knommu/scatterlist.h
---- linux-2.6.21.3/include/asm-m68knommu/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-m68knommu/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -2,6 +2,7 @@
- #define _M68KNOMMU_SCATTERLIST_H
-
- #include <linux/mm.h>
-+#include <asm/types.h>
-
- struct scatterlist {
- struct page *page;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-mips/pgtable.h avr32-git/include/asm-mips/pgtable.h
---- linux-2.6.21.3/include/asm-mips/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-mips/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -387,10 +387,6 @@
- remap_pfn_range(vma, vaddr, pfn, size, prot)
- #endif
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #include <asm-generic/pgtable.h>
-
- /*
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-mips/scatterlist.h avr32-git/include/asm-mips/scatterlist.h
---- linux-2.6.21.3/include/asm-mips/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-mips/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef __ASM_SCATTERLIST_H
- #define __ASM_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page * page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-parisc/pgtable.h avr32-git/include/asm-parisc/pgtable.h
---- linux-2.6.21.3/include/asm-parisc/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-parisc/pgtable.h 2007-06-06 11:34:12.000000000 +0200
-@@ -528,10 +528,6 @@
-
- #define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /* We provide our own get_unmapped_area to provide cache coherency */
-
- #define HAVE_ARCH_UNMAPPED_AREA
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-parisc/scatterlist.h avr32-git/include/asm-parisc/scatterlist.h
---- linux-2.6.21.3/include/asm-parisc/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-parisc/scatterlist.h 2007-06-06 11:34:12.000000000 +0200
-@@ -2,6 +2,7 @@
- #define _ASM_PARISC_SCATTERLIST_H
-
- #include <asm/page.h>
-+#include <asm/types.h>
-
- struct scatterlist {
- struct page *page;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ppc/pgtable.h avr32-git/include/asm-ppc/pgtable.h
---- linux-2.6.21.3/include/asm-ppc/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-ppc/pgtable.h 2007-06-06 11:34:13.000000000 +0200
-@@ -827,10 +827,6 @@
- remap_pfn_range(vma, vaddr, pfn, size, prot)
- #endif
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- /*
- * No page table caches to initialise
- */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh/pgtable.h avr32-git/include/asm-sh/pgtable.h
---- linux-2.6.21.3/include/asm-sh/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-sh/pgtable.h 2007-06-06 11:34:13.000000000 +0200
-@@ -568,10 +568,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- struct mm_struct;
-
- /*
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh/scatterlist.h avr32-git/include/asm-sh/scatterlist.h
---- linux-2.6.21.3/include/asm-sh/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-sh/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef __ASM_SH_SCATTERLIST_H
- #define __ASM_SH_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page * page; /* Location for highmem page, if any */
- unsigned int offset;/* for highmem, page offset */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh64/pgtable.h avr32-git/include/asm-sh64/pgtable.h
---- linux-2.6.21.3/include/asm-sh64/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-sh64/pgtable.h 2007-06-06 11:34:13.000000000 +0200
-@@ -485,10 +485,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #endif /* !__ASSEMBLY__ */
-
- /*
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh64/scatterlist.h avr32-git/include/asm-sh64/scatterlist.h
---- linux-2.6.21.3/include/asm-sh64/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-sh64/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -11,6 +11,8 @@
- #ifndef __ASM_SH64_SCATTERLIST_H
- #define __ASM_SH64_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page * page; /* Location for highmem page, if any */
- unsigned int offset;/* for highmem, page offset */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sparc64/scatterlist.h avr32-git/include/asm-sparc64/scatterlist.h
---- linux-2.6.21.3/include/asm-sparc64/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-sparc64/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -3,6 +3,7 @@
- #define _SPARC64_SCATTERLIST_H
-
- #include <asm/page.h>
-+#include <asm/types.h>
-
- struct scatterlist {
- struct page *page;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-v850/scatterlist.h avr32-git/include/asm-v850/scatterlist.h
---- linux-2.6.21.3/include/asm-v850/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-v850/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -14,6 +14,8 @@
- #ifndef __V850_SCATTERLIST_H__
- #define __V850_SCATTERLIST_H__
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-x86_64/pgtable.h avr32-git/include/asm-x86_64/pgtable.h
---- linux-2.6.21.3/include/asm-x86_64/pgtable.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-x86_64/pgtable.h 2007-06-06 11:34:13.000000000 +0200
-@@ -413,10 +413,6 @@
- #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
--#define MK_IOSPACE_PFN(space, pfn) (pfn)
--#define GET_IOSPACE(pfn) 0
--#define GET_PFN(pfn) (pfn)
--
- #define HAVE_ARCH_UNMAPPED_AREA
-
- #define pgtable_cache_init() do { } while (0)
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-x86_64/scatterlist.h avr32-git/include/asm-x86_64/scatterlist.h
---- linux-2.6.21.3/include/asm-x86_64/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-x86_64/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -1,6 +1,8 @@
- #ifndef _X8664_SCATTERLIST_H
- #define _X8664_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-xtensa/scatterlist.h avr32-git/include/asm-xtensa/scatterlist.h
---- linux-2.6.21.3/include/asm-xtensa/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/asm-xtensa/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
-@@ -11,6 +11,8 @@
- #ifndef _XTENSA_SCATTERLIST_H
- #define _XTENSA_SCATTERLIST_H
-
-+#include <asm/types.h>
-+
- struct scatterlist {
- struct page *page;
- unsigned int offset;
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/linux/fb.h avr32-git/include/linux/fb.h
---- linux-2.6.21.3/include/linux/fb.h 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/include/linux/fb.h 2007-06-06 11:34:13.000000000 +0200
-@@ -833,7 +833,7 @@
- #define fb_writeq sbus_writeq
- #define fb_memset sbus_memset_io
-
--#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__)
-+#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__) || defined(__avr32__)
-
- #define fb_readb __raw_readb
- #define fb_readw __raw_readw
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/linux/i2c-gpio.h avr32-git/include/linux/i2c-gpio.h
---- linux-2.6.21.3/include/linux/i2c-gpio.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/linux/i2c-gpio.h 2007-06-06 11:34:13.000000000 +0200
-@@ -0,0 +1,38 @@
-+/*
-+ * i2c-gpio interface to platform code
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef _LINUX_I2C_GPIO_H
-+#define _LINUX_I2C_GPIO_H
-+
-+/**
-+ * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
-+ * @sda_pin: GPIO pin ID to use for SDA
-+ * @scl_pin: GPIO pin ID to use for SCL
-+ * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
-+ * @timeout: clock stretching timeout in jiffies. If the slave keeps
-+ * SCL low for longer than this, the transfer will time out.
-+ * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin
-+ * isn't actively driven high when setting the output value high.
-+ * gpio_get_value() must return the actual pin state even if the
-+ * pin is configured as an output.
-+ * @scl_is_open_drain: SCL is set up as open drain. Same requirements
-+ * as for sda_is_open_drain apply.
-+ * @scl_is_output_only: SCL output drivers cannot be turned off.
-+ */
-+struct i2c_gpio_platform_data {
-+ unsigned int sda_pin;
-+ unsigned int scl_pin;
-+ int udelay;
-+ int timeout;
-+ unsigned int sda_is_open_drain:1;
-+ unsigned int scl_is_open_drain:1;
-+ unsigned int scl_is_output_only:1;
-+};
-+
-+#endif /* _LINUX_I2C_GPIO_H */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/video/atmel_lcdc.h avr32-git/include/video/atmel_lcdc.h
---- linux-2.6.21.3/include/video/atmel_lcdc.h 1970-01-01 01:00:00.000000000 +0100
-+++ avr32-git/include/video/atmel_lcdc.h 2007-06-06 11:34:13.000000000 +0200
-@@ -0,0 +1,196 @@
-+/*
-+ * Header file for AT91/AT32 LCD Controller
-+ *
-+ * Data structure and register user interface
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+#ifndef __ATMEL_LCDC_H__
-+#define __ATMEL_LCDC_H__
-+
-+ /* LCD Controller info data structure */
-+struct atmel_lcdfb_info {
-+ spinlock_t lock;
-+ struct fb_info *info;
-+ void __iomem *mmio;
-+ unsigned long irq_base;
-+
-+ unsigned int guard_time;
-+ struct platform_device *pdev;
-+ struct clk *bus_clk;
-+ struct clk *lcdc_clk;
-+ unsigned int default_bpp;
-+ unsigned int default_lcdcon2;
-+ unsigned int default_dmacon;
-+ void (*atmel_lcdfb_power_control)(int on);
-+ struct fb_monspecs *default_monspecs;
-+ u32 pseudo_palette[16];
-+};
-+
-+#define ATMEL_LCDC_DMABADDR1 0x00
-+#define ATMEL_LCDC_DMABADDR2 0x04
-+#define ATMEL_LCDC_DMAFRMPT1 0x08
-+#define ATMEL_LCDC_DMAFRMPT2 0x0c
-+#define ATMEL_LCDC_DMAFRMADD1 0x10
-+#define ATMEL_LCDC_DMAFRMADD2 0x14
-+
-+#define ATMEL_LCDC_DMAFRMCFG 0x18
-+#define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
-+#define ATMEL_LCDC_BLENGTH_OFFSET 24
-+#define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
-+
-+#define ATMEL_LCDC_DMACON 0x1c
-+#define ATMEL_LCDC_DMAEN (0x1 << 0)
-+#define ATMEL_LCDC_DMARST (0x1 << 1)
-+#define ATMEL_LCDC_DMABUSY (0x1 << 2)
-+#define ATMEL_LCDC_DMAUPDT (0x1 << 3)
-+#define ATMEL_LCDC_DMA2DEN (0x1 << 4)
-+
-+#define ATMEL_LCDC_DMA2DCFG 0x20
-+#define ATMEL_LCDC_ADDRINC_OFFSET 0
-+#define ATMEL_LCDC_ADDRINC (0xffff)
-+#define ATMEL_LCDC_PIXELOFF_OFFSET 24
-+#define ATMEL_LCDC_PIXELOFF (0x1f << 24)
-+
-+#define ATMEL_LCDC_LCDCON1 0x0800
-+#define ATMEL_LCDC_BYPASS (1 << 0)
-+#define ATMEL_LCDC_CLKVAL_OFFSET 12
-+#define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
-+#define ATMEL_LCDC_LINCNT (0x7ff << 21)
-+
-+#define ATMEL_LCDC_LCDCON2 0x0804
-+#define ATMEL_LCDC_DISTYPE (3 << 0)
-+#define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
-+#define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
-+#define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
-+#define ATMEL_LCDC_SCANMOD (1 << 2)
-+#define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
-+#define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
-+#define ATMEL_LCDC_IFWIDTH (3 << 3)
-+#define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
-+#define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
-+#define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
-+#define ATMEL_LCDC_PIXELSIZE (7 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
-+#define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
-+#define ATMEL_LCDC_INVVD (1 << 8)
-+#define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
-+#define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
-+#define ATMEL_LCDC_INVFRAME (1 << 9 )
-+#define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
-+#define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
-+#define ATMEL_LCDC_INVLINE (1 << 10)
-+#define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
-+#define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
-+#define ATMEL_LCDC_INVCLK (1 << 11)
-+#define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
-+#define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
-+#define ATMEL_LCDC_INVDVAL (1 << 12)
-+#define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
-+#define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
-+#define ATMEL_LCDC_CLKMOD (1 << 15)
-+#define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
-+#define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
-+#define ATMEL_LCDC_MEMOR (1 << 31)
-+#define ATMEL_LCDC_MEMOR_BIG (0 << 31)
-+#define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
-+
-+#define ATMEL_LCDC_TIM1 0x0808
-+#define ATMEL_LCDC_VFP (0xff << 0)
-+#define ATMEL_LCDC_VBP_OFFSET 8
-+#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
-+#define ATMEL_LCDC_VPW_OFFSET 16
-+#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
-+#define ATMEL_LCDC_VHDLY_OFFSET 24
-+#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
-+
-+#define ATMEL_LCDC_TIM2 0x080c
-+#define ATMEL_LCDC_HBP (0xff << 0)
-+#define ATMEL_LCDC_HPW_OFFSET 8
-+#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
-+#define ATMEL_LCDC_HFP_OFFSET 21
-+#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
-+
-+#define ATMEL_LCDC_LCDFRMCFG 0x0810
-+#define ATMEL_LCDC_LINEVAL (0x7ff << 0)
-+#define ATMEL_LCDC_HOZVAL_OFFSET 21
-+#define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
-+
-+#define ATMEL_LCDC_FIFO 0x0814
-+#define ATMEL_LCDC_FIFOTH (0xffff)
-+
-+#define ATMEL_LCDC_MVAL 0x0818
-+
-+#define ATMEL_LCDC_DP1_2 0x081c
-+#define ATMEL_LCDC_DP4_7 0x0820
-+#define ATMEL_LCDC_DP3_5 0x0824
-+#define ATMEL_LCDC_DP2_3 0x0828
-+#define ATMEL_LCDC_DP5_7 0x082c
-+#define ATMEL_LCDC_DP3_4 0x0830
-+#define ATMEL_LCDC_DP4_5 0x0834
-+#define ATMEL_LCDC_DP6_7 0x0838
-+#define ATMEL_LCDC_DP1_2_VAL (0xff)
-+#define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
-+#define ATMEL_LCDC_DP3_5_VAL (0xfffff)
-+#define ATMEL_LCDC_DP2_3_VAL (0xfff)
-+#define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
-+#define ATMEL_LCDC_DP3_4_VAL (0xffff)
-+#define ATMEL_LCDC_DP4_5_VAL (0xfffff)
-+#define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
-+
-+#define ATMEL_LCDC_PWRCON 0x083c
-+#define ATMEL_LCDC_PWR (1 << 0)
-+#define ATMEL_LCDC_GUARDT_OFFSET 1
-+#define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
-+#define ATMEL_LCDC_BUSY (1 << 31)
-+
-+#define ATMEL_LCDC_CONTRAST_CTR 0x0840
-+#define ATMEL_LCDC_PS (3 << 0)
-+#define ATMEL_LCDC_PS_DIV1 (0 << 0)
-+#define ATMEL_LCDC_PS_DIV2 (1 << 0)
-+#define ATMEL_LCDC_PS_DIV4 (2 << 0)
-+#define ATMEL_LCDC_PS_DIV8 (3 << 0)
-+#define ATMEL_LCDC_POL (1 << 2)
-+#define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
-+#define ATMEL_LCDC_POL_POSITIVE (1 << 2)
-+#define ATMEL_LCDC_ENA (1 << 3)
-+#define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
-+#define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
-+
-+#define ATMEL_LCDC_CONTRAST_VAL 0x0844
-+#define ATMEL_LCDC_CVAL (0xff)
-+
-+#define ATMEL_LCDC_IER 0x0848
-+#define ATMEL_LCDC_IDR 0x084c
-+#define ATMEL_LCDC_IMR 0x0850
-+#define ATMEL_LCDC_ISR 0x0854
-+#define ATMEL_LCDC_ICR 0x0858
-+#define ATMEL_LCDC_LNI (1 << 0)
-+#define ATMEL_LCDC_LSTLNI (1 << 1)
-+#define ATMEL_LCDC_EOFI (1 << 2)
-+#define ATMEL_LCDC_UFLWI (1 << 4)
-+#define ATMEL_LCDC_OWRI (1 << 5)
-+#define ATMEL_LCDC_MERI (1 << 6)
-+
-+#define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
-+
-+#endif /* __ATMEL_LCDC_H__ */
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/MAINTAINERS avr32-git/MAINTAINERS
---- linux-2.6.21.3/MAINTAINERS 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/MAINTAINERS 2007-06-06 11:33:46.000000000 +0200
-@@ -1434,6 +1434,11 @@
- W: http://www.icp-vortex.com/
- S: Supported
-
-+GENERIC GPIO I2C DRIVER
-+P: Haavard Skinnemoen
-+M: hskinnemoen@atmel.com
-+S: Supported
-+
- GENERIC HDLC DRIVER, N2, C101, PCI200SYN and WANXL DRIVERS
- P: Krzysztof Halasa
- M: khc@pm.waw.pl
-diff -Nur -x .gitignore -x .git linux-2.6.21.3/scripts/checkstack.pl avr32-git/scripts/checkstack.pl
---- linux-2.6.21.3/scripts/checkstack.pl 2007-05-24 23:22:47.000000000 +0200
-+++ avr32-git/scripts/checkstack.pl 2007-06-06 11:34:14.000000000 +0200
-@@ -12,6 +12,7 @@
- # sh64 port by Paul Mundt
- # Random bits by Matt Mackall <mpm@selenic.com>
- # M68k port by Geert Uytterhoeven and Andreas Schwab
-+# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
- #
- # Usage:
- # objdump -d vmlinux | stackcheck.pl [arch]
-@@ -37,6 +38,10 @@
- if ($arch eq 'arm') {
- #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64
- $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
-+ } elsif ($arch eq 'avr32') {
-+ #8000008a: 20 1d sub sp,4
-+ #80000ca8: fa cd 05 b0 sub sp,sp,1456
-+ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
- } elsif ($arch =~ /^i[3456]86$/) {
- #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp
- $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o;
+++ /dev/null
-diff -Nur linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c linux-2.6.21.3-owrt/arch/avr32/boards/atngw100/flash.c
---- linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c 2007-06-07 18:34:04.000000000 +0200
-+++ linux-2.6.21.3-owrt/arch/avr32/boards/atngw100/flash.c 2007-06-07 18:36:02.000000000 +0200
-@@ -43,9 +43,14 @@
- .mask_flags = MTD_WRITEABLE,
- },
- {
-- .name = "root",
-+ .name = "kernel",
- .offset = 0x00020000,
-- .size = 0x007d0000,
-+ .size = 0x00100000,
-+ },
-+ {
-+ .name = "rootfs",
-+ .offset = 0x00120000,
-+ .size = 0x006d0000,
- },
- {
- .name = "env",
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mips
-BOARD:=brcm63xx
-BOARDNAME:=Broadcom BCM963xx
-FEATURES:=squashfs jffs2 broken usb atm
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build firmware images for Broadcom based xDSL/routers
- (e.g. Inventel Livebox, Siemens SE515)
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_8139TOO is not set
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_ATM_DRIVERS=y
-CONFIG_AUDIT=y
-CONFIG_AUDIT_GENERIC=y
-CONFIG_BASE_SMALL=0
-CONFIG_BCM963XX=y
-CONFIG_BINFMT_MISC=m
-CONFIG_BITREVERSE=y
-# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_BLK_DEV_IO_TRACE=y
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BROADCOM_PHY is not set
-# CONFIG_BSD_DISKLABEL is not set
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_CFE=y
-CONFIG_CICADA_PHY=m
-# CONFIG_CIFS is not set
-# CONFIG_CLS_U32_MARK is not set
-# CONFIG_CONFIGFS_FS is not set
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-CONFIG_CPU_MIPSR1=y
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_VR41XX is not set
-CONFIG_CRAMFS=y
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_ANUBIS is not set
-CONFIG_CRYPTO_BLKCIPHER=m
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-CONFIG_CRYPTO_CBC=m
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HMAC=y
-# CONFIG_CRYPTO_KHAZAD is not set
-CONFIG_CRYPTO_MD4=y
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_SHA1=y
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_WP512 is not set
-CONFIG_DAVICOM_PHY=m
-# CONFIG_DDB5477 is not set
-CONFIG_DEBUG_FS=y
-CONFIG_DEFAULT_BIC=y
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_DEFAULT_TCP_CONG="bic"
-# CONFIG_DEFAULT_VEGAS is not set
-# CONFIG_DM9000 is not set
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DUMMY=m
-CONFIG_ELF_CORE=y
-CONFIG_EQUALIZER=m
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_FIXED_PHY is not set
-CONFIG_FS_MBCACHE=m
-CONFIG_FS_POSIX_ACL=y
-CONFIG_FUSE_FS=m
-CONFIG_FW_LOADER=m
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-# CONFIG_GENERIC_GPIO is not set
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_HAMRADIO is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HID=m
-CONFIG_HWMON=y
-# CONFIG_HWMON_DEBUG_CHIP is not set
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_INPUT is not set
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IP6_NF_MATCH_FRAG is not set
-# CONFIG_IP6_NF_MATCH_HL is not set
-# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-# CONFIG_IP6_NF_MATCH_OPTS is not set
-# CONFIG_IP6_NF_MATCH_RT is not set
-# CONFIG_IP6_NF_RAW is not set
-# CONFIG_IP6_NF_TARGET_HL is not set
-# CONFIG_IP6_NF_TARGET_LOG is not set
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IP_MROUTE=y
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-CONFIG_IP_NF_TARGET_REJECT=m
-# CONFIG_IP_NF_TARGET_SAME is not set
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_IP_SCTP=m
-CONFIG_IRQ_CPU=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFS_FS is not set
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-CONFIG_KMOD=y
-CONFIG_LBD=y
-# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
-# CONFIG_LLC2 is not set
-CONFIG_LXT_PHY=m
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MAC80211_DEBUGFS is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MARVELL_PHY=m
-CONFIG_MII=m
-# CONFIG_MINIX_FS is not set
-CONFIG_MIPS=y
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_MIPS_MTX1 is not set
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-# CONFIG_MIPS_XXS1500 is not set
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_BCM963XX=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-CONFIG_NETFILTER_NETLINK=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
-# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
-# CONFIG_NET_ACT_IPT is not set
-CONFIG_NET_ACT_SIMP=m
-CONFIG_NET_KEY=y
-CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
-# CONFIG_NET_SCH_CLK_JIFFIES is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NETDEV_1000 is not set
-CONFIG_NLS=y
-CONFIG_NLS_ASCII=m
-# CONFIG_PAGE_SIZE_16KB is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_PAGE_SIZE_8KB is not set
-CONFIG_PHYLIB=m
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_PNPACPI is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-CONFIG_POSIX_MQUEUE=y
-CONFIG_QSEMI_PHY=m
-CONFIG_RELAY=y
-# CONFIG_ROMFS_FS is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCTP_DBG_MSG is not set
-# CONFIG_SCTP_DBG_OBJCNT is not set
-CONFIG_SCTP_HMAC_MD5=y
-# CONFIG_SCTP_HMAC_NONE is not set
-# CONFIG_SCTP_HMAC_SHA1 is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIO=m
-CONFIG_SERIO_I8042=m
-CONFIG_SERIO_LIBPS2=m
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_RAW is not set
-CONFIG_SERIO_SERPORT=m
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-CONFIG_SHAPER=m
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_PTSWARM is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_SMSC_PHY is not set
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SQUASHFS_VMALLOC=y
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-# CONFIG_TC35815 is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_LP is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_VENO is not set
-CONFIG_TIPC=m
-# CONFIG_TIPC_ADVANCED is not set
-# CONFIG_TIPC_DEBUG is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USB_EHCI_HCD is not set
-# CONFIG_USB_GTCO is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_VIA_RHINE is not set
-CONFIG_VLAN_8021Q=m
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WAN_ROUTER=m
-# CONFIG_WATCHDOG is not set
+++ /dev/null
-#
-# Makefile for the Broadcom BCM963xx SoC specific parts of the kernel
-#
-# Copyright (C) 2004 Broadcom Corporation
-#
-obj-y := irq.o prom.o setup.o time.o ser_init.o int-handler.o info.o wdt.o
-
-SRCBASE := $(TOPDIR)
-EXTRA_CFLAGS += -I$(SRCBASE)/include
+++ /dev/null
-/*
- * $Id$
- *
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/autoconf.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-#include <asm/string.h>
-#include <asm/mach-bcm963xx/bootloaders.h>
-
-static char *boot_loader_names[BOOT_LOADER_LAST+1] = {
- [BOOT_LOADER_UNKNOWN] = "Unknown",
- [BOOT_LOADER_CFE] = "CFE",
- [BOOT_LOADER_REDBOOT] = "RedBoot",
- [BOOT_LOADER_CFE2] = "CFEv2"
-};
-
-/* boot loaders specific definitions */
-#define CFE_EPTSEAL 0x43464531 /* CFE1 is the magic number to recognize CFE from other bootloaders */
-
-int boot_loader_type;
-/*
- * Boot loader detection routines
- */
-static int __init detect_cfe(void)
-{
- /*
- * This method only works, when we are booted directly from the CFE.
- */
- uint32_t cfe_handle = (uint32_t) fw_arg0;
- uint32_t cfe_a1_val = (uint32_t) fw_arg1;
- uint32_t cfe_entry = (uint32_t) fw_arg2;
- uint32_t cfe_seal = (uint32_t) fw_arg3;
-
- /* Check for CFE by finding the CFE magic number */
- if (cfe_seal != CFE_EPTSEAL)
- /* We are not booted from CFE */
- return 0;
-
- /* cfe_a1_val must be 0, because only one CPU present in the ADM5120 SoC */
- if (cfe_a1_val != 0)
- return 0;
-
- /* The cfe_handle, and the cfe_entry must be kernel mode addresses */
- if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0))
- return 0;
-
- return 1;
-}
-
-static int __init detect_redboot(void)
-{
- /* On Inventel Livebox, the boot loader is passed as a command line argument, check for it */
- if (!strncmp(arcs_cmdline, "boot_loader=RedBoot", 19))
- return 1;
- return 0;
-}
-
-void __init detect_bootloader(void)
-{
- if (detect_cfe()) {
- boot_loader_type = BOOT_LOADER_CFE;
- }
-
- if (detect_redboot()) {
- boot_loader_type = BOOT_LOADER_REDBOOT;
- }
- else {
- /* Some devices are using CFE, but it is not detected as is */
- boot_loader_type = BOOT_LOADER_CFE2;
- }
- printk("Boot loader is : %s\n", boot_loader_names[boot_loader_type]);
-}
-
-void __init detect_board(void)
-{
- switch (boot_loader_type)
- {
- case BOOT_LOADER_CFE:
- break;
- case BOOT_LOADER_REDBOOT:
- break;
- default:
- break;
- }
-}
-
-EXPORT_SYMBOL(boot_loader_type);
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/*
- * Generic interrupt handler for Broadcom MIPS boards
- */
-
-#include <linux/autoconf.h>
-
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-/*
- * MIPS IRQ Source
- * -------- ------
- * 0 Software (ignored)
- * 1 Software (ignored)
- * 2 Combined hardware interrupt (hw0)
- * 3 Hardware
- * 4 Hardware
- * 5 Hardware
- * 6 Hardware
- * 7 R4k timer
- */
-
- .text
- .set noreorder
- .set noat
- .align 5
- NESTED(brcmIRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI
- .set noreorder
- .set at
-
- jal plat_irq_dispatch
- move a0, sp
-
- j ret_from_irq
- nop
-
- END(brcmIRQ)
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/*
- * Interrupt control functions for Broadcom 963xx MIPS boards
- */
-
-#include <asm/atomic.h>
-
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/signal.h>
-#include <6348_map_part.h>
-#include <6348_intr.h>
-#include <bcm_map_part.h>
-#include <bcm_intr.h>
-
-static void irq_dispatch_int(struct pt_regs *regs)
-{
- unsigned int pendingIrqs;
- static unsigned int irqBit;
- static unsigned int isrNumber = 31;
-
- pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
- if (!pendingIrqs) {
- return;
- }
-
- while (1) {
- irqBit <<= 1;
- isrNumber++;
- if (isrNumber == 32) {
- isrNumber = 0;
- irqBit = 0x1;
- }
- if (pendingIrqs & irqBit) {
- PERF->IrqMask &= ~irqBit; // mask
- do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET);
- break;
- }
- }
-}
-
-static void irq_dispatch_ext(uint32 irq)
-{
- if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
- printk("**** Ext IRQ mask. Should not dispatch ****\n");
- }
- /* disable and clear interrupt in the controller */
- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
- do_IRQ(irq);
-}
-
-
-extern void brcm_timer_interrupt(struct pt_regs *regs);
-
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
-{
- u32 cause;
- while((cause = (read_c0_cause()& CAUSEF_IP))) {
- if (cause & CAUSEF_IP7)
- brcm_timer_interrupt(regs);
- else if (cause & CAUSEF_IP2)
- irq_dispatch_int(regs);
- else if (cause & CAUSEF_IP3)
- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0);
- else if (cause & CAUSEF_IP4)
- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1);
- else if (cause & CAUSEF_IP5)
- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2);
- else if (cause & CAUSEF_IP6)
- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3);
- local_irq_disable();
- }
-}
-
-
-void enable_brcm_irq(unsigned int irq)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
- PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
- }
- else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
- /* enable and clear interrupt in the controller */
- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
- }
- local_irq_restore(flags);
-}
-
-void disable_brcm_irq(unsigned int irq)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
- PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
- }
- else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
- /* disable interrupt in the controller */
- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
- }
- local_irq_restore(flags);
-}
-
-void ack_brcm_irq(unsigned int irq)
-{
- /* Already done in brcm_irq_dispatch */
-}
-
-unsigned int startup_brcm_irq(unsigned int irq)
-{
- enable_brcm_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-unsigned int startup_brcm_none(unsigned int irq)
-{
- return 0;
-}
-
-void end_brcm_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_brcm_irq(irq);
-}
-
-void end_brcm_none(unsigned int irq)
-{
-}
-
-static struct hw_interrupt_type brcm_irq_type = {
- .typename = "MIPS",
- .startup = startup_brcm_irq,
- .shutdown = disable_brcm_irq,
- .enable = enable_brcm_irq,
- .disable = disable_brcm_irq,
- .ack = ack_brcm_irq,
- .end = end_brcm_irq,
- .set_affinity = NULL
-};
-
-static struct hw_interrupt_type brcm_irq_no_end_type = {
- .typename = "MIPS",
- .startup = startup_brcm_none,
- .shutdown = disable_brcm_irq,
- .enable = enable_brcm_irq,
- .disable = disable_brcm_irq,
- .ack = ack_brcm_irq,
- .end = end_brcm_none,
- .set_affinity = NULL
-};
-
-void __init arch_init_irq(void)
-{
- int i;
-
- clear_c0_status(ST0_BEV);
- change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
-
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].chip = &brcm_irq_type;
- }
-}
-
-int request_external_irq(unsigned int irq,
- FN_HANDLER handler,
- unsigned long irqflags,
- const char * devname,
- void *dev_id)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
-
- local_irq_restore(flags);
-
- return( request_irq(irq, handler, irqflags, devname, dev_id) );
-}
-
-/* VxWorks compatibility function(s). */
-
-unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
- unsigned int interruptId)
-{
- int nRet = -1;
- char *devname;
-
- devname = kmalloc(16, GFP_KERNEL);
- if (devname)
- sprintf( devname, "brcm_%d", interruptId );
-
- /* Set the IRQ description to not automatically enable the interrupt at
- * the end of an ISR. The driver that handles the interrupt must
- * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
- * is consistent with interrupt handling on VxWorks.
- */
- irq_desc[interruptId].chip = &brcm_irq_no_end_type;
-
- if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
- {
- printk("BcmHalMapInterrupt : internal IRQ\n");
- nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT, devname, (void *) param );
- }
- else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
- {
- printk("BcmHalMapInterrupt : external IRQ\n");
- nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT, devname, (void *) param );
- }
-
- return( nRet );
-}
-
-
-EXPORT_SYMBOL(enable_brcm_irq);
-EXPORT_SYMBOL(disable_brcm_irq);
-EXPORT_SYMBOL(request_external_irq);
-EXPORT_SYMBOL(BcmHalMapInterrupt);
-
+++ /dev/null
-/*
- Copyright 2004 Broadcom Corp. All Rights Reserved.
- Copyright 2007 OpenWrt,org, Florian Fainelli <florian@openwrt.org>
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-*/
-/*
- * prom.c: PROM library initialization code.
- *
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-#include <linux/blkdev.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/mach-bcm963xx/bootloaders.h>
-#include <asm/mach-bcm963xx/6348_map_part.h>
-
-#include "../cfe/cfe_private.h"
-
-extern void __init detect_bootloader(void);
-extern void serial_init(void);
-extern int boot_loader_type;
-
-#define MACH_BCM MACH_BCM96348
-
-const char *get_system_type(void)
-{
- return "Broadcom BCM963xx";
-}
-
-void __init prom_init(void)
-{
- serial_init();
-
- printk("%s prom init\n", get_system_type() );
-
- PERF->IrqMask = 0;
-
- /* Detect the bootloader */
- detect_bootloader();
-
- /* Do further initialisations depending on the bootloader */
- if (boot_loader_type == BOOT_LOADER_CFE || boot_loader_type == BOOT_LOADER_CFE2) {
- cfe_setup(fw_arg0, fw_arg1, fw_arg2, fw_arg3);
- }
- /* Register 16MB RAM minus the ADSL SDRAM by default */
- add_memory_region(0, (0x01000000 - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
-
- mips_machgroup = MACH_GROUP_BRCM;
- mips_machtype = MACH_BCM;
-}
-
-void __init prom_free_prom_memory(void)
-{
- /* We do not have any memory to free */
-}
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2004 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/*
- * Broadcom bcm63xx serial port initialization, also prepare for printk
- * by registering with console_init
- *
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/console.h>
-#include <linux/sched.h>
-
-#include <asm/addrspace.h>
-#include <asm/irq.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/mc146818rtc.h>
-
-#include <bcm_map_part.h>
-#include <6348_map_part.h>
-#include <board.h>
-
-#define SER63XX_DEFAULT_BAUD 115200
-#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
-#define stUart ((volatile Uart * const) UART_BASE)
-
-// Transmit interrupts
-#define TXINT (TXFIFOEMT | TXUNDERR | TXOVFERR)
-// Receive interrupts
-#define RXINT (RXFIFONE | RXOVFERR)
-
-/* --------------------------------------------------------------------------
- Name: serial_init
- Purpose: Initalize the UART
--------------------------------------------------------------------------- */
-void __init serial_init(void)
-{
- u32 tmpVal = SER63XX_DEFAULT_BAUD;
- ULONG clockFreqHz;
-
-#if defined(CONFIG_BCM96345)
- // Make sure clock is ticking
- PERF->blkEnables |= UART_CLK_EN;
-#endif
-
- /* Dissable channel's receiver and transmitter. */
- stUart->control &= ~(BRGEN|TXEN|RXEN);
-
- /*--------------------------------------------------------------------*/
- /* Write the table value to the clock select register. */
- /* DPullen - this is the equation to use: */
- /* value = clockFreqHz / baud / 32-1; */
- /* (snmod) Actually you should also take into account any necessary */
- /* rounding. Divide by 16, look at lsb, if 0, divide by 2 */
- /* and subtract 1. If 1, just divide by 2 */
- /*--------------------------------------------------------------------*/
- clockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
- tmpVal = (clockFreqHz / tmpVal) / 16;
- if( tmpVal & 0x01 )
- tmpVal /= 2; //Rounding up, so sub is already accounted for
- else
- tmpVal = (tmpVal / 2) - 1; // Rounding down so we must sub 1
- stUart->baudword = tmpVal;
-
- /* Finally, re-enable the transmitter and receiver. */
- stUart->control |= (BRGEN|TXEN|RXEN);
-
- stUart->config = (BITS8SYM | ONESTOP);
- // Set the FIFO interrupt depth ... stUart->fifocfg = 0xAA;
- stUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
- stUart->intMask = 0;
- stUart->intMask = RXINT | TXINT;
-}
-
-
-/* prom_putc()
- * Output a character to the UART
- */
-void prom_putc(char c)
-{
- /* Wait for Tx uffer to empty */
- while (! (READ16(stUart->intStatus) & TXFIFOEMT));
- /* Send character */
- stUart->Data = c;
-}
-
-/* prom_puts()
- * Write a string to the UART
- */
-void prom_puts(const char *s)
-{
- while (*s) {
- if (*s == '\n') {
- prom_putc('\r');
- }
- prom_putc(*s++);
- }
-}
-
-
-/* prom_getc_nowait()
- * Returns a character from the UART
- * Returns -1 if no characters available or corrupted
- */
-int prom_getc_nowait(void)
-{
- uint16 uStatus;
- int cData = -1;
-
- uStatus = READ16(stUart->intStatus);
-
- if (uStatus & RXFIFONE) { /* Do we have a character? */
- cData = READ16(stUart->Data) & 0xff; /* Read character */
- if (uStatus & (RXFRAMERR | RXPARERR)) { /* If we got an error, throw it away */
- cData = -1;
- }
- }
-
- return cData;
-}
-
-/* prom_getc()
- * Returns a charcter from the serial port
- * Will block until it receives a valid character
-*/
-char prom_getc(void)
-{
- int cData = -1;
-
- /* Loop until we get a valid character */
- while(cData == -1) {
- cData = prom_getc_nowait();
- }
- return (char) cData;
-}
-
-/* prom_testc()
- * Returns 0 if no characters available
- */
-int prom_testc(void)
-{
- uint16 uStatus;
-
- uStatus = READ16(stUart->intStatus);
-
- return (uStatus & RXFIFONE);
-}
-
-#if defined (CONFIG_REMOTE_DEBUG)
-/* Prevent other code from writing to the serial port */
-void _putc(char c) { }
-void _puts(const char *ptr) { }
-#else
-/* Low level outputs call prom routines */
-void _putc(char c) {
- prom_putc(c);
-}
-void _puts(const char *ptr) {
- prom_puts(ptr);
-}
-#endif
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/*
- * Generic setup routines for Broadcom 963xx MIPS boards
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/console.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/pm.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bcache.h>
-#include <asm/irq.h>
-#include <asm/time.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/mach-bcm963xx/bootloaders.h>
-
-extern void brcm_time_init(void);
-extern int boot_loader_type;
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <bcm_map_part.h>
-#include <6348_map_part.h>
-#include <bcmpci.h>
-
-static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
-
-/* This function should be in a board specific directory. For now,
- * assume that all boards that include this file use a Broadcom chip
- * with a soft reset bit in the PLL control register.
- */
-static void brcm_machine_restart(char *command)
-{
- const unsigned long ulSoftReset = 0x00000001;
- unsigned long *pulPllCtrl = (unsigned long *) 0xfffe0008;
- *pulPllCtrl |= ulSoftReset;
-}
-
-static void brcm_machine_halt(void)
-{
- printk("System halted\n");
- while (1);
-}
-
-static void mpi_SetLocalPciConfigReg(uint32 reg, uint32 value)
-{
- /* write index then value */
- mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
- mpi->pcicfgdata = value;
-}
-
-static uint32 mpi_GetLocalPciConfigReg(uint32 reg)
-{
- /* write index then get value */
- mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
- return mpi->pcicfgdata;
-}
-
-/*
- * mpi_ResetPcCard: Set/Reset the PcCard
- */
-static void mpi_ResetPcCard(int cardtype, BOOL bReset)
-{
- if (cardtype == MPI_CARDTYPE_NONE) {
- return;
- }
-
- if (cardtype == MPI_CARDTYPE_CARDBUS) {
- bReset = ! bReset;
- }
-
- if (bReset) {
- mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
- } else {
- mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 | PCCARD_CARD_RESET);
- }
-}
-
-/*
- * mpi_ConfigCs: Configure an MPI/EBI chip select
- */
-static void mpi_ConfigCs(uint32 cs, uint32 base, uint32 size, uint32 flags)
-{
- mpi->cs[cs].base = ((base & 0x1FFFFFFF) | size);
- mpi->cs[cs].config = flags;
-}
-
-/*
- * mpi_InitPcmciaSpace
- */
-static void mpi_InitPcmciaSpace(void)
-{
- // ChipSelect 4 controls PCMCIA Memory accesses
- mpi_ConfigCs(PCMCIA_COMMON_BASE, pcmciaMem, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
- // ChipSelect 5 controls PCMCIA Attribute accesses
- mpi_ConfigCs(PCMCIA_ATTRIBUTE_BASE, pcmciaAttr, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
- // ChipSelect 6 controls PCMCIA I/O accesses
- mpi_ConfigCs(PCMCIA_IO_BASE, pcmciaIo, EBI_SIZE_64K, (EBI_WORD_WIDE|EBI_ENABLE));
-
- mpi->pcmcia_cntl2 = ((PCMCIA_ATTR_ACTIVE << RW_ACTIVE_CNT_BIT) |
- (PCMCIA_ATTR_INACTIVE << INACTIVE_CNT_BIT) |
- (PCMCIA_ATTR_CE_SETUP << CE_SETUP_CNT_BIT) |
- (PCMCIA_ATTR_CE_HOLD << CE_HOLD_CNT_BIT));
-
- mpi->pcmcia_cntl2 |= (PCMCIA_HALFWORD_EN | PCMCIA_BYTESWAP_DIS);
-}
-
-/*
- * cardtype_vcc_detect: PC Card's card detect and voltage sense connection
- *
- * CD1#/ CD2#/ VS1#/ VS2#/ Card Initial Vcc
- * CCD1# CCD2# CVS1 CVS2 Type
- *
- * GND GND open open 16-bit 5 vdc
- *
- * GND GND GND open 16-bit 3.3 vdc
- *
- * GND GND open GND 16-bit x.x vdc
- *
- * GND GND GND GND 16-bit 3.3 & x.x vdc
- *
- *====================================================================
- *
- * CVS1 GND CCD1# open CardBus 3.3 vdc
- *
- * GND CVS2 open CCD2# CardBus x.x vdc
- *
- * GND CVS1 CCD2# open CardBus y.y vdc
- *
- * GND CVS2 GND CCD2# CardBus 3.3 & x.x vdc
- *
- * CVS2 GND open CCD1# CardBus x.x & y.y vdc
- *
- * GND CVS1 CCD2# open CardBus 3.3, x.x & y.y vdc
- *
- */
-static int cardtype_vcc_detect(void)
-{
- uint32 data32;
- int cardtype;
-
- cardtype = MPI_CARDTYPE_NONE;
- mpi->pcmcia_cntl1 = 0x0000A000; // Turn on the output enables and drive
- // the CVS pins to 0.
- data32 = mpi->pcmcia_cntl1;
- switch (data32 & 0x00000003) // Test CD1# and CD2#, see if card is plugged in.
- {
- case 0x00000003: // No Card is in the slot.
- printk("mpi: No Card is in the PCMCIA slot\n");
- break;
-
- case 0x00000002: // Partial insertion, No CD2#.
- printk("mpi: Card in the PCMCIA slot partial insertion, no CD2 signal\n");
- break;
-
- case 0x00000001: // Partial insertion, No CD1#.
- printk("mpi: Card in the PCMCIA slot partial insertion, no CD1 signal\n");
- break;
-
- case 0x00000000:
- mpi->pcmcia_cntl1 = 0x0000A0C0; // Turn off the CVS output enables and
- // float the CVS pins.
- mdelay(1);
- data32 = mpi->pcmcia_cntl1;
- // Read the Register.
- switch (data32 & 0x0000000C) // See what is on the CVS pins.
- {
- case 0x00000000: // CVS1 and CVS2 are tied to ground, only 1 option.
- printk("mpi: Detected 3.3 & x.x 16-bit PCMCIA card\n");
- cardtype = MPI_CARDTYPE_PCMCIA;
- break;
-
- case 0x00000004: // CVS1 is open or tied to CCD1/CCD2 and CVS2 is tied to ground.
- // 2 valid voltage options.
- switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
- {
- case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
- // This is not a valid combination.
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
- mpi->pcmcia_cntl1 = 0x0000A080; // Drive CVS1 to a 0.
- mdelay(1);
- data32 = mpi->pcmcia_cntl1;
- if (data32 & 0x00000002) { // CCD2 is tied to CVS2, not valid.
- printk("mpi: Unknown card plugged into slot\n");
- } else { // CCD2 is tied to CVS1.
- printk("mpi: Detected 3.3, x.x and y.y Cardbus card\n");
- cardtype = MPI_CARDTYPE_CARDBUS;
- }
- break;
-
- case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
- // This is not a valid combination.
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- case 0x00000000: // CCD1 and CCD2 are tied to ground.
- printk("mpi: Detected x.x vdc 16-bit PCMCIA card\n");
- cardtype = MPI_CARDTYPE_PCMCIA;
- break;
- }
- break;
-
- case 0x00000008: // CVS2 is open or tied to CCD1/CCD2 and CVS1 is tied to ground.
- // 2 valid voltage options.
- switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
- {
- case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
- // This is not a valid combination.
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
- mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
- mdelay(1);
- data32 = mpi->pcmcia_cntl1;
- if (data32 & 0x00000002) { // CCD2 is tied to CVS1, not valid.
- printk("mpi: Unknown card plugged into slot\n");
- } else {// CCD2 is tied to CVS2.
- printk("mpi: Detected 3.3 and x.x Cardbus card\n");
- cardtype = MPI_CARDTYPE_CARDBUS;
- }
- break;
-
- case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
- // This is not a valid combination.
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- case 0x00000000: // CCD1 and CCD2 are tied to ground.
- cardtype = MPI_CARDTYPE_PCMCIA;
- printk("mpi: Detected 3.3 vdc 16-bit PCMCIA card\n");
- break;
- }
- break;
-
- case 0x0000000C: // CVS1 and CVS2 are open or tied to CCD1/CCD2.
- // 5 valid voltage options.
-
- switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
- {
- case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
- // This is not a valid combination.
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
- // CCD1 is tied to ground.
- mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
- mdelay(1);
- data32 = mpi->pcmcia_cntl1;
- if (data32 & 0x00000002) { // CCD2 is tied to CVS1.
- printk("mpi: Detected y.y vdc Cardbus card\n");
- } else { // CCD2 is tied to CVS2.
- printk("mpi: Detected x.x vdc Cardbus card\n");
- }
- cardtype = MPI_CARDTYPE_CARDBUS;
- break;
-
- case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
- // CCD2 is tied to ground.
-
- mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
- mdelay(1);
- data32 = mpi->pcmcia_cntl1;
- if (data32 & 0x00000001) {// CCD1 is tied to CVS1.
- printk("mpi: Detected 3.3 vdc Cardbus card\n");
- } else { // CCD1 is tied to CVS2.
- printk("mpi: Detected x.x and y.y Cardbus card\n");
- }
- cardtype = MPI_CARDTYPE_CARDBUS;
- break;
-
- case 0x00000000: // CCD1 and CCD2 are tied to ground.
- cardtype = MPI_CARDTYPE_PCMCIA;
- printk("mpi: Detected 5 vdc 16-bit PCMCIA card\n");
- break;
- }
- break;
-
- default:
- printk("mpi: Unknown card plugged into slot\n");
- break;
-
- }
- }
- return cardtype;
-}
-
-/*
- * mpi_DetectPcCard: Detect the plugged in PC-Card
- * Return: < 0 => Unknown card detected
- * 0 => No card detected
- * 1 => 16-bit card detected
- * 2 => 32-bit CardBus card detected
- */
-static int mpi_DetectPcCard(void)
-{
- int cardtype;
-
- cardtype = cardtype_vcc_detect();
- switch(cardtype) {
- case MPI_CARDTYPE_PCMCIA:
- mpi->pcmcia_cntl1 &= ~0x0000e000; // disable enable bits
- //mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
- mpi->pcmcia_cntl1 |= (PCMCIA_ENABLE | PCMCIA_GPIO_ENABLE);
- mpi_InitPcmciaSpace();
- mpi_ResetPcCard(cardtype, FALSE);
- // Hold card in reset for 10ms
- mdelay(10);
- mpi_ResetPcCard(cardtype, TRUE);
- // Let card come out of reset
- mdelay(100);
- break;
- case MPI_CARDTYPE_CARDBUS:
- // 8 => CardBus Enable
- // 1 => PCI Slot Number
- // C => Float VS1 & VS2
- mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & 0xFFFF0000) |
- CARDBUS_ENABLE |
- (CARDBUS_SLOT << 8)|
- VS2_OEN |
- VS1_OEN;
- /* access to this memory window will be to/from CardBus */
- mpi->l2pmremap1 |= CARDBUS_MEM;
-
- // Need to reset the Cardbus Card. There's no CardManager to do this,
- // and we need to be ready for PCI configuration.
- mpi_ResetPcCard(cardtype, FALSE);
- // Hold card in reset for 10ms
- mdelay(10);
- mpi_ResetPcCard(cardtype, TRUE);
- // Let card come out of reset
- mdelay(100);
- break;
- default:
- break;
- }
- return cardtype;
-}
-
-static int mpi_init(void)
-{
- unsigned long data;
- unsigned int chipid, chiprev, sdramsize;
-
- printk("Broadcom BCM963xx MPI\n");
- chipid = (PERF->RevID & 0xFFFF0000) >> 16;
- chiprev = (PERF->RevID & 0xFF);
-
- if (boot_loader_type == BOOT_LOADER_CFE)
- sdramsize = boot_mem_map.map[0].size;
- else
- sdramsize = 0x01000000;
- /*
- * Init the pci interface
- */
- data = GPIO->GPIOMode; // GPIO mode register
- data |= GROUP2_PCI | GROUP1_MII_PCCARD; // PCI internal arbiter + Cardbus
- GPIO->GPIOMode = data; // PCI internal arbiter
-
- /*
- * In the BCM6348 CardBus support is defaulted to Slot 0
- * because there is no external IDSEL for CardBus. To disable
- * the CardBus and allow a standard PCI card in Slot 0
- * set the cbus_idsel field to 0x1f.
- */
- /*
- uData = mpi->pcmcia_cntl1;
- uData |= CARDBUS_IDSEL;
- mpi->pcmcia_cntl1 = uData;
- */
- // Setup PCI I/O Window range. Give 64K to PCI I/O
- mpi->l2piorange = ~(BCM_PCI_IO_SIZE_64KB-1);
- // UBUS to PCI I/O base address
- mpi->l2piobase = BCM_PCI_IO_BASE & BCM_PCI_ADDR_MASK;
- // UBUS to PCI I/O Window remap
- mpi->l2pioremap = (BCM_PCI_IO_BASE | MEM_WINDOW_EN);
-
- // enable PCI related GPIO pins and data swap between system and PCI bus
- mpi->locbuscntrl = (EN_PCI_GPIO | DIR_U2P_NOSWAP);
-
- /* Enable 6348 BusMaster and Memory access mode */
- data = mpi_GetLocalPciConfigReg(PCI_COMMAND);
- data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- mpi_SetLocalPciConfigReg(PCI_COMMAND, data);
-
- /* Configure two 16 MByte PCI to System memory regions. */
- /* These memory regions are used when PCI device is a bus master */
- /* Accesses to the SDRAM from PCI bus will be "byte swapped" for this region */
- mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_3, BCM_HOST_MEM_SPACE1);
- mpi->sp0remap = 0x0;
-
- /* Accesses to the SDRAM from PCI bus will not be "byte swapped" for this region */
- mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_4, BCM_HOST_MEM_SPACE2);
- mpi->sp1remap = 0x0;
- mpi->pcimodesel |= (PCI_BAR2_NOSWAP | 0x40);
-
- if ((chipid == 0x6348) && (chiprev == 0xb0)) {
- mpi->sp0range = ~(sdramsize-1);
- mpi->sp1range = ~(sdramsize-1);
- }
- /*
- * Change 6348 PCI Cfg Reg. offset 0x40 to PCI memory read retry count infinity
- * by set 0 in bit 8~15. This resolve read Bcm4306 srom return 0xffff in
- * first read.
- */
- data = mpi_GetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER);
- data &= ~BRCM_PCI_CONFIG_TIMER_RETRY_MASK;
- data |= 0x00000080;
- mpi_SetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER, data);
-
- /* enable pci interrupt */
- mpi->locintstat |= (EXT_PCI_INT << 16);
-
- mpi_DetectPcCard();
-
- ioport_resource.start = BCM_PCI_IO_BASE;
- ioport_resource.end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB;
-
-#if defined(CONFIG_USB)
- PERF->blkEnables |= USBH_CLK_EN;
- mdelay(100);
- *USBH_NON_OHCI = NON_OHCI_BYTE_SWAP;
-#endif
-
- return 0;
-}
-
-void __init plat_mem_setup(void)
-{
- _machine_restart = brcm_machine_restart;
- _machine_halt = brcm_machine_halt;
- pm_power_off = brcm_machine_halt;
-
- board_time_init = brcm_time_init;
-
- /* mpi initialization */
- mpi_init();
-}
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2004 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/*
- * Setup time for Broadcom 963xx MIPS boards
- */
-
-#include <linux/autoconf.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-
-#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
-#include <asm/div64.h>
-#include <asm/time.h>
-
-#include <6348_map_part.h>
-#include <6348_intr.h>
-#include <bcm_map_part.h>
-#include <bcm_intr.h>
-
-static unsigned long r4k_offset; /* Amount to increment compare reg each time */
-static unsigned long r4k_cur; /* What counter should be at next timer irq */
-
-/* *********************************************************************
- * calculateCpuSpeed()
- * Calculate the BCM6348 CPU speed by reading the PLL strap register
- * and applying the following formula:
- * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
- * Input parameters:
- * none
- * Return value:
- * none
- ********************************************************************* */
-
-static inline unsigned long __init calculateCpuSpeed(void)
-{
- u32 pllStrap = PERF->PllStrap;
- int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
- int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
- int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
-
- return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
-}
-
-
-static inline unsigned long __init cal_r4koff(void)
-{
- mips_hpt_frequency = calculateCpuSpeed() / 2;
- return (mips_hpt_frequency / HZ);
-}
-
-
-/*
- * There are a lot of conceptually broken versions of the MIPS timer interrupt
- * handler floating around. This one is rather different, but the algorithm
- * is provably more robust.
- */
-irqreturn_t brcm_timer_interrupt(struct pt_regs *regs)
-{
- int irq = MIPS_TIMER_INT;
-
- irq_enter();
- kstat_this_cpu.irqs[irq]++;
-
- timer_interrupt(irq, regs);
- irq_exit();
- return IRQ_HANDLED;
-}
-
-
-void __init brcm_time_init(void)
-{
- unsigned int est_freq, flags;
- local_irq_save(flags);
-
- printk("calculating r4koff... ");
- r4k_offset = cal_r4koff();
- printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
-
- est_freq = 2 * r4k_offset * HZ;
- est_freq += 5000; /* round */
- est_freq -= est_freq % 10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
- (est_freq % 1000000) * 100 / 1000000);
- local_irq_restore(flags);
-}
-
-
-void __init plat_timer_setup(struct irqaction *irq)
-{
- r4k_cur = (read_c0_count() + r4k_offset);
- write_c0_compare(r4k_cur);
- set_c0_status(IE_IRQ5);
-}
+++ /dev/null
-/*
- * Watchdog driver for the BCM963xx devices
- *
- * Copyright (C) 2007 OpenWrt.org
- * Florian Fainelli <florian@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/miscdevice.h>
-#include <linux/fs.h>
-#include <linux/init.h>
-#include <linux/notifier.h>
-#include <linux/watchdog.h>
-#include <linux/timer.h>
-#include <linux/jiffies.h>
-#include <linux/completion.h>
-#include <linux/ioport.h>
-
-typedef struct bcm963xx_timer {
- unsigned short unused0;
- unsigned char timer_mask;
-#define TIMER0EN 0x01
-#define TIMER1EN 0x02
-#define TIMER2EN 0x04
- unsigned char timer_ints;
-#define TIMER0 0x01
-#define TIMER1 0x02
-#define TIMER2 0x04
-#define WATCHDOG 0x08
- unsigned long timer_ctl0;
- unsigned long timer_ctl1;
- unsigned long timer_ctl2;
-#define TIMERENABLE 0x80000000
-#define RSTCNTCLR 0x40000000
- unsigned long timer_cnt0;
- unsigned long timer_cnt1;
- unsigned long timer_cnt2;
- unsigned long wdt_def_count;
-
- /* Write 0xff00 0x00ff to Start timer
- * Write 0xee00 0x00ee to Stop and re-load default count
- * Read from this register returns current watch dog count
- */
- unsigned long wdt_ctl;
-
- /* Number of 40-MHz ticks for WD Reset pulse to last */
- unsigned long wdt_rst_count;
-} bcm963xx_timer;
-
-static struct bcm963xx_wdt_device {
- struct completion stop;
- volatile int running;
- struct timer_list timer;
- volatile int queue;
- int default_ticks;
- unsigned long inuse;
-} bcm963xx_wdt_device;
-
-static int ticks = 1000;
-
-#define WDT_BASE 0xfffe0200
-#define WDT ((volatile bcm963xx_timer * const) WDT_BASE)
-
-#define BCM963XX_INTERVAL (HZ/10+1)
-
-static void bcm963xx_wdt_trigger(unsigned long unused)
-{
- if (bcm963xx_wdt_device.running)
- ticks--;
-
- /* Load the default ticking value into the reset counter register */
- WDT->wdt_rst_count = bcm963xx_wdt_device.default_ticks;
-
- if (bcm963xx_wdt_device.queue && ticks) {
- bcm963xx_wdt_device.timer.expires = jiffies + BCM963XX_INTERVAL;
- add_timer(&bcm963xx_wdt_device.timer);
- }
- else {
- complete(&bcm963xx_wdt_device.stop);
- }
-}
-
-static void bcm963xx_wdt_reset(void)
-{
- ticks = bcm963xx_wdt_device.default_ticks;
- /* Also reload default count */
- WDT->wdt_def_count = ticks;
- WDT->wdt_ctl = 0xee00;
- WDT->wdt_ctl = 0x00ee;
-}
-
-static void bcm963xx_wdt_start(void)
-{
- if (!bcm963xx_wdt_device.queue) {
- bcm963xx_wdt_device.queue;
- /* Enable the watchdog by writing 0xff00 ,then 0x00ff to the control register */
- WDT->wdt_ctl = 0xff00;
- WDT->wdt_ctl = 0x00ff;
- bcm963xx_wdt_device.timer.expires = jiffies + BCM963XX_INTERVAL;
- add_timer(&bcm963xx_wdt_device.timer);
- }
- bcm963xx_wdt_device.running++;
-}
-
-static int bcm963xx_wdt_stop(void)
-{
- if (bcm963xx_wdt_device.running)
- bcm963xx_wdt_device.running = 0;
-
- ticks = bcm963xx_wdt_device.default_ticks;
-
- /* Stop the watchdog by writing 0xee00 then 0x00ee to the control register */
- WDT->wdt_ctl = 0xee00;
- WDT->wdt_ctl = 0x00ee;
-
- return -EIO;
-}
-
-static int bcm963xx_wdt_open(struct inode *inode, struct file *file)
-{
- if (test_and_set_bit(0, &bcm963xx_wdt_device.inuse))
- return -EBUSY;
- return nonseekable_open(inode, file);
-}
-
-static int bcm963xx_wdt_release(struct inode *inode, struct file *file)
-{
- clear_bit(0, &bcm963xx_wdt_device.inuse);
- return 0;
-}
-
-static int bcm963xx_wdt_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- void __user *argp = (void __user *)arg;
- unsigned int value;
-
- static struct watchdog_info ident = {
- .options = WDIOF_CARDRESET,
- .identity = "BCM963xx WDT",
- };
-
- switch (cmd) {
- case WDIOC_KEEPALIVE:
- bcm963xx_wdt_reset();
- break;
- case WDIOC_GETSTATUS:
- /* Reading from the control register will return the current value */
- value = WDT->wdt_ctl;
- if ( copy_to_user(argp, &value, sizeof(int)) )
- return -EFAULT;
- break;
- case WDIOC_GETSUPPORT:
- if ( copy_to_user(argp, &ident, sizeof(ident)) )
- return -EFAULT;
- break;
- case WDIOC_SETOPTIONS:
- if ( copy_from_user(&value, argp, sizeof(int)) )
- return -EFAULT;
- switch(value) {
- case WDIOS_ENABLECARD:
- bcm963xx_wdt_start();
- break;
- case WDIOS_DISABLECARD:
- bcm963xx_wdt_stop();
- break;
- default:
- return -EINVAL;
- }
- break;
- default:
- return -ENOTTY;
- }
- return 0;
-}
-
-static int bcm963xx_wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
-{
- if (!count)
- return -EIO;
- bcm963xx_wdt_reset();
- return count;
-}
-
-static const struct file_operations bcm963xx_wdt_fops = {
- .owner = THIS_MODULE,
- .llseek = no_llseek,
- .write = bcm963xx_wdt_write,
- .ioctl = bcm963xx_wdt_ioctl,
- .open = bcm963xx_wdt_open,
- .release = bcm963xx_wdt_release,
-};
-
-static struct miscdevice bcm963xx_wdt_miscdev = {
- .minor = WATCHDOG_MINOR,
- .name = "watchdog",
- .fops = &bcm963xx_wdt_fops,
-};
-
-static void __exit bcm963xx_wdt_exit(void)
-{
- if (bcm963xx_wdt_device.queue ){
- bcm963xx_wdt_device.queue = 0;
- wait_for_completion(&bcm963xx_wdt_device.stop);
- }
- misc_deregister(&bcm963xx_wdt_miscdev);
-}
-
-static int __init bcm963xx_wdt_init(void)
-{
- int ret = 0;
-
- printk("Broadcom BCM963xx Watchdog timer\n");
-
- ret = misc_register(&bcm963xx_wdt_miscdev);
- if (ret) {
- printk(KERN_CRIT "Cannot register miscdev on minor=%d (err=%d)\n", WATCHDOG_MINOR, ret);
- return ret;
- }
- init_completion(&bcm963xx_wdt_device.stop);
- bcm963xx_wdt_device.queue = 0;
-
- clear_bit(0, &bcm963xx_wdt_device.inuse);
-
- init_timer(&bcm963xx_wdt_device.timer);
- bcm963xx_wdt_device.timer.function = bcm963xx_wdt_trigger;
- bcm963xx_wdt_device.timer.data = 0;
-
- bcm963xx_wdt_device.default_ticks = ticks;
- return ret;
-}
-
-
-module_init(bcm963xx_wdt_init);
-module_exit(bcm963xx_wdt_exit);
-
-MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
-MODULE_DESCRIPTION("Broadcom BCM963xx Watchdog driver");
-MODULE_LICENSE("GPL");
+++ /dev/null
-#
-# Makefile for the Broadcom Common Firmware Environment support
-#
-
-obj-y += cfe.o
+++ /dev/null
-/*
- * Broadcom Common Firmware Environment (CFE) support
- *
- * Copyright 2000, 2001, 2002
- * Broadcom Corporation. All rights reserved.
- *
- * Copyright (C) 2006 Michael Buesch
- *
- * Original Authors: Mitch Lichtenberg, Chris Demetriou
- *
- * This software is furnished under license and may be used and copied only
- * in accordance with the following terms and conditions. Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * modified or unmodified copies of this software in source and/or binary
- * form. No title or ownership is transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce and
- * retain this copyright notice and list of conditions as they appear in
- * the source file.
- *
- * 2) No right is granted to use any trade name, trademark, or logo of
- * Broadcom Corporation. The "Broadcom Corporation" name may not be
- * used to endorse or promote products derived from this software
- * without the prior written permission of Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
- * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
- * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
- * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/spinlock.h>
-#include <asm/cfe.h>
-
-#include "cfe_private.h"
-
-
-static cfe_uint_t cfe_handle;
-static int (*cfe_trampoline)(long handle, long iocb);
-
-
-#include <linux/kernel.h>
-
-void __init cfe_setup(unsigned long fwarg0, unsigned long fwarg1,
- unsigned long fwarg2, unsigned long fwarg3)
-{
- if (fwarg3 == 0x80300000) {
- /* WRT54G workaround */
- fwarg3 = CFE_EPTSEAL;
- fwarg2 = 0xBFC00500;
- }
- if (fwarg3 != CFE_EPTSEAL) {
- /* We are not booted from CFE */
- return;
- }
- if (fwarg1 == 0) {
- /* We are on the boot CPU */
- cfe_handle = (cfe_uint_t)fwarg0;
- cfe_trampoline = CFE_TO_PTR(fwarg2);
- }
-}
-
-int cfe_vprintk(const char *fmt, va_list args)
-{
- static char buffer[1024];
- static DEFINE_SPINLOCK(lock);
- static const char pfx[] = "CFE-console: ";
- static const size_t pfx_len = sizeof(pfx) - 1;
- unsigned long flags;
- int len, cnt, pos;
- int handle;
- int res;
-
- if (!cfe_present())
- return -ENODEV;
-
- spin_lock_irqsave(&lock, flags);
- handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
- if (CFE_ISERR(handle)) {
- len = -EIO;
- goto out;
- }
- strcpy(buffer, pfx);
- len = vscnprintf(buffer + pfx_len,
- sizeof(buffer) - pfx_len - 2,
- fmt, args);
- len += pfx_len;
- /* The CFE console requires CR-LF line-ends.
- * Add a CR, if we only terminate lines with a LF.
- * This does only fix CR-LF at the end of the string.
- * So for multiple lines, use multiple cfe_vprintk calls.
- */
- if (len > 1 &&
- buffer[len - 1] == '\n' && buffer[len - 2] != '\r') {
- buffer[len - 1] = '\r';
- buffer[len] = '\n';
- len += 1;
- }
- cnt = len;
- pos = 0;
- while (cnt > 0) {
- res = cfe_write(handle, buffer + pos, len - pos);
- if (CFE_ISERR(res)) {
- len = -EIO;
- goto out;
- }
- cnt -= res;
- pos += res;
- }
-out:
- spin_unlock_irqrestore(&lock, flags);
-
- return len;
-}
-
-int cfe_printk(const char *fmt, ...)
-{
- va_list args;
- int res;
-
- va_start(args, fmt);
- res = cfe_vprintk(fmt, args);
- va_end(args);
-
- return res;
-}
-
-static int cfe_iocb_dispatch(struct cfe_iocb *iocb)
-{
- if (!cfe_present())
- return CFE_ERR_UNSUPPORTED;
- return cfe_trampoline((long)cfe_handle, (long)iocb);
-}
-
-int cfe_present(void)
-{
- return (cfe_trampoline != NULL);
-}
-
-int cfe_close(int handle)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_CLOSE;
- iocb.handle = handle;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_CPUCTL;
- iocb.psize = sizeof(struct cfe_iocb_cpuctl);
- iocb.cpuctl.number = cpu;
- iocb.cpuctl.command = CFE_CPU_CMD_START;
- iocb.cpuctl.gp = gp;
- iocb.cpuctl.sp = sp;
- iocb.cpuctl.a1 = a1;
- iocb.cpuctl.start_addr = (long)fn;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_cpu_stop(int cpu)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_CPUCTL;
- iocb.psize = sizeof(struct cfe_iocb_cpuctl);
- iocb.cpuctl.number = cpu;
- iocb.cpuctl.command = CFE_CPU_CMD_STOP;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_ENV_ENUM;
- iocb.psize = sizeof(struct cfe_iocb_envbuf);
- iocb.envbuf.index = idx;
- iocb.envbuf.name = PTR_TO_CFE(name);
- iocb.envbuf.name_len = namelen;
- iocb.envbuf.val = PTR_TO_CFE(val);
- iocb.envbuf.val_len = vallen;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_enumdev(int idx, char *name, int namelen)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
-
- iocb.fcode = CFE_CMD_DEV_ENUM;
- iocb.psize = sizeof(struct cfe_iocb_envbuf);
- iocb.envbuf.index = idx;
- iocb.envbuf.name = PTR_TO_CFE(name);
- iocb.envbuf.name_len = namelen;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_enummem(int idx, int flags, u64 *start, u64 *length,
- u64 *type)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
-
- iocb.fcode = CFE_CMD_FW_MEMENUM;
- iocb.flags = flags;
- iocb.psize = sizeof(struct cfe_iocb_meminfo);
- iocb.meminfo.index = idx;
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (!CFE_ISERR(iocb.status)) {
- *start = iocb.meminfo.addr;
- *length = iocb.meminfo.size;
- *type = iocb.meminfo.type;
- }
-
- return iocb.status;
-}
-
-int cfe_exit(int warm, int status)
-{
- struct cfe_iocb iocb;
- int err;
-
-printk("CFE REBOOT\n");
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_RESTART;
- if (warm)
- iocb.flags = CFE_FLG_WARMSTART;
- iocb.psize = sizeof(struct cfe_iocb_exitstat);
- iocb.exitstat.status = status;
-
-printk("CALL\n");
- err = cfe_iocb_dispatch(&iocb);
-printk("DONE\n");
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_flushcache(int flags)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_FLUSHCACHE;
- iocb.flags = flags;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_getdevinfo(char *name)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_GETINFO;
- iocb.psize = sizeof(struct cfe_iocb_buf);
- iocb.buffer.ptr = PTR_TO_CFE(name);
- iocb.buffer.length = strlen(name);
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.buffer.devflags;
-}
-
-int cfe_getenv(char *name, char *dest, int destlen)
-{
- struct cfe_iocb iocb;
- int err;
-
- dest[0] = '\0';
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_ENV_GET;
- iocb.psize = sizeof(struct cfe_iocb_envbuf);
- iocb.envbuf.name = PTR_TO_CFE(name);
- iocb.envbuf.name_len = strlen(name);
- iocb.envbuf.val = PTR_TO_CFE(dest);
- iocb.envbuf.val_len = destlen;
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_getfwinfo(struct cfe_fwinfo *info)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_GETINFO;
- iocb.psize = sizeof(struct cfe_iocb_fwinfo);
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return err;
-
- info->version = iocb.fwinfo.version;
- info->totalmem = iocb.fwinfo.totalmem;
- info->flags = iocb.fwinfo.flags;
- info->boardid = iocb.fwinfo.boardid;
- info->bootarea_va = iocb.fwinfo.bootarea_va;
- info->bootarea_pa = iocb.fwinfo.bootarea_pa;
- info->bootarea_size = iocb.fwinfo.bootarea_size;
-
- return iocb.status;
-}
-
-int cfe_getstdhandle(int handletype)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_GETHANDLE;
- iocb.flags = handletype;
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.handle;
-}
-
-int cfe_getticks(s64 *ticks)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_FW_GETTIME;
- iocb.psize = sizeof(struct cfe_iocb_time);
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (!CFE_ISERR(iocb.status))
- *ticks = iocb.time.ticks;
-
- return iocb.status;
-}
-
-int cfe_inpstat(int handle)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_INPSTAT;
- iocb.handle = handle;
- iocb.psize = sizeof(struct cfe_iocb_inpstat);
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.inpstat.status;
-}
-
-int cfe_ioctl(int handle, unsigned int ioctlnum,
- unsigned char *buffer, int length,
- int *retlen, u64 offset)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_IOCTL;
- iocb.handle = handle;
- iocb.psize = sizeof(struct cfe_iocb_buf);
- iocb.buffer.offset = offset;
- iocb.buffer.ioctlcmd = ioctlnum;
- iocb.buffer.ptr = PTR_TO_CFE(buffer);
- iocb.buffer.length = length;
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
- if (retlen)
- *retlen = iocb.buffer.retlen;
-
- return iocb.status;
-}
-
-int cfe_open(char *name)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_OPEN;
- iocb.psize = sizeof(struct cfe_iocb_buf);
- iocb.buffer.ptr = PTR_TO_CFE(name);
- iocb.buffer.length = strlen(name);
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.handle;
-}
-
-int cfe_read(int handle, unsigned char *buffer, int length)
-{
- return cfe_readblk(handle, 0, buffer, length);
-}
-
-int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_READ;
- iocb.handle = handle;
- iocb.psize = sizeof(struct cfe_iocb_buf);
- iocb.buffer.offset = offset;
- iocb.buffer.ptr = PTR_TO_CFE(buffer);
- iocb.buffer.length = length;
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.buffer.retlen;
-}
-
-int cfe_setenv(char *name, char *val)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_ENV_SET;
- iocb.psize = sizeof(struct cfe_iocb_envbuf);
- iocb.envbuf.name = PTR_TO_CFE(name);
- iocb.envbuf.name_len = strlen(name);
- iocb.envbuf.val = PTR_TO_CFE(val);
- iocb.envbuf.val_len = strlen(val);
-
- err = cfe_iocb_dispatch(&iocb);
-
- return (CFE_ISERR(err)) ? err : iocb.status;
-}
-
-int cfe_write(int handle, unsigned char *buffer, int length)
-{
- return cfe_writeblk(handle, 0, buffer, length);
-}
-
-int cfe_writeblk(int handle, s64 offset, unsigned char *buffer, int length)
-{
- struct cfe_iocb iocb;
- int err;
-
- memset(&iocb, 0, sizeof(iocb));
- iocb.fcode = CFE_CMD_DEV_WRITE;
- iocb.handle = handle;
- iocb.psize = sizeof(struct cfe_iocb_buf);
- iocb.buffer.offset = offset;
- iocb.buffer.ptr = PTR_TO_CFE(buffer);
- iocb.buffer.length = length;
-
- err = cfe_iocb_dispatch(&iocb);
- if (CFE_ISERR(err))
- return err;
- if (CFE_ISERR(iocb.status))
- return iocb.status;
-
- return iocb.buffer.retlen;
-}
+++ /dev/null
-/*
- * Broadcom Common Firmware Environment (CFE) support
- *
- * Copyright 2000, 2001, 2002
- * Broadcom Corporation. All rights reserved.
- *
- * Copyright (C) 2006 Michael Buesch
- *
- * Original Authors: Mitch Lichtenberg, Chris Demetriou
- *
- * This software is furnished under license and may be used and copied only
- * in accordance with the following terms and conditions. Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * modified or unmodified copies of this software in source and/or binary
- * form. No title or ownership is transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce and
- * retain this copyright notice and list of conditions as they appear in
- * the source file.
- *
- * 2) No right is granted to use any trade name, trademark, or logo of
- * Broadcom Corporation. The "Broadcom Corporation" name may not be
- * used to endorse or promote products derived from this software
- * without the prior written permission of Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
- * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
- * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
- * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef LINUX_CFE_PRIVATE_H_
-#define LINUX_CFE_PRIVATE_H_
-
-#ifndef __ASSEMBLY__
-
-/* Seal indicating CFE's presence, passed to the kernel. */
-#define CFE_EPTSEAL 0x43464531
-
-#define CFE_CMD_FW_GETINFO 0
-#define CFE_CMD_FW_RESTART 1
-#define CFE_CMD_FW_BOOT 2
-#define CFE_CMD_FW_CPUCTL 3
-#define CFE_CMD_FW_GETTIME 4
-#define CFE_CMD_FW_MEMENUM 5
-#define CFE_CMD_FW_FLUSHCACHE 6
-
-#define CFE_CMD_DEV_GETHANDLE 9
-#define CFE_CMD_DEV_ENUM 10
-#define CFE_CMD_DEV_OPEN 11
-#define CFE_CMD_DEV_INPSTAT 12
-#define CFE_CMD_DEV_READ 13
-#define CFE_CMD_DEV_WRITE 14
-#define CFE_CMD_DEV_IOCTL 15
-#define CFE_CMD_DEV_CLOSE 16
-#define CFE_CMD_DEV_GETINFO 17
-
-#define CFE_CMD_ENV_ENUM 20
-#define CFE_CMD_ENV_GET 22
-#define CFE_CMD_ENV_SET 23
-#define CFE_CMD_ENV_DEL 24
-
-#define CFE_CMD_MAX 32
-
-#define CFE_CMD_VENDOR_USE 0x8000 /* codes above this are for customer use */
-
-typedef u64 cfe_uint_t;
-typedef s64 cfe_int_t;
-typedef s64 cfe_ptr_t;
-
-/* Cast a pointer from native to CFE-API pointer and back */
-#define CFE_TO_PTR(p) ((void *)(unsigned long)(p))
-#define PTR_TO_CFE(p) ((cfe_ptr_t)(unsigned long)(p))
-
-struct cfe_iocb_buf {
- cfe_uint_t offset; /* offset on device (bytes) */
- cfe_ptr_t ptr; /* pointer to a buffer */
- cfe_uint_t length; /* length of this buffer */
- cfe_uint_t retlen; /* returned length (for read ops) */
- union {
- cfe_uint_t ioctlcmd; /* IOCTL command (used only for IOCTLs) */
- cfe_uint_t devflags; /* Returned device info flags */
- };
-};
-
-struct cfe_iocb_inpstat {
- cfe_uint_t status; /* 1 means input available */
-};
-
-struct cfe_iocb_envbuf {
- cfe_int_t index; /* 0-based enumeration index */
- cfe_ptr_t name; /* name string buffer */
- cfe_int_t name_len; /* size of name buffer */
- cfe_ptr_t val; /* value string buffer */
- cfe_int_t val_len; /* size of value string buffer */
-};
-
-struct cfe_iocb_cpuctl {
- cfe_uint_t number; /* cpu number to control */
- cfe_uint_t command; /* command to issue to CPU */
- cfe_uint_t start_addr; /* CPU start address */
- cfe_uint_t gp; /* starting GP value */
- cfe_uint_t sp; /* starting SP value */
- cfe_uint_t a1; /* starting A1 value */
-};
-
-struct cfe_iocb_time {
- cfe_int_t ticks; /* current time in ticks */
-};
-
-struct cfe_iocb_exitstat {
- cfe_int_t status;
-};
-
-struct cfe_iocb_meminfo {
- cfe_int_t index; /* 0-based enumeration index */
- cfe_int_t type; /* type of memory block */
- cfe_uint_t addr; /* physical start address */
- cfe_uint_t size; /* block size */
-};
-
-struct cfe_iocb_fwinfo {
- cfe_int_t version; /* major, minor, eco version */
- cfe_int_t totalmem; /* total installed mem */
- cfe_int_t flags; /* various flags */
- cfe_int_t boardid; /* board ID */
- cfe_int_t bootarea_va; /* VA of boot area */
- cfe_int_t bootarea_pa; /* PA of boot area */
- cfe_int_t bootarea_size; /* size of boot area */
- cfe_int_t reserved1;
- cfe_int_t reserved2;
- cfe_int_t reserved3;
-};
-
-/* CFE I/O Control Block */
-struct cfe_iocb {
- cfe_uint_t fcode; /* IOCB function code */
- cfe_int_t status; /* return status */
- cfe_int_t handle; /* file/device handle */
- cfe_uint_t flags; /* flags for this IOCB */
- cfe_uint_t psize; /* size of parameter list */
- union {
- struct cfe_iocb_buf buffer; /* buffer parameters */
- struct cfe_iocb_inpstat inpstat; /* input status parameters */
- struct cfe_iocb_envbuf envbuf; /* environment function parameters */
- struct cfe_iocb_cpuctl cpuctl; /* CPU control parameters */
- struct cfe_iocb_time time; /* timer parameters */
- struct cfe_iocb_meminfo meminfo; /* memory arena info parameters */
- struct cfe_iocb_fwinfo fwinfo; /* firmware information */
- struct cfe_iocb_exitstat exitstat; /* Exit Status */
- };
-};
-
-
-#include <linux/init.h>
-
-void __init cfe_setup(unsigned long fwarg0, unsigned long fwarg1,
- unsigned long fwarg2, unsigned long fwarg3);
-
-#else /* __ASSEMBLY__ */
-
- .macro cfe_early_init
-#ifdef CONFIG_CFE
- jal cfe_setup
-#endif
- .endm
-
-#endif /* __ASSEMBLY__ */
-#endif /* LINUX_CFE_PRIVATE_H_ */
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#include <bcmpci.h>
-#include <bcm_intr.h>
-#include <bcm_map_part.h>
-#include <6348_intr.h>
-#include <6348_map_part.h>
-
-static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
-
-static char irq_tab_bcm96348[] __initdata = {
- [0] = INTERRUPT_ID_MPI,
- [1] = INTERRUPT_ID_MPI,
-#if defined(CONFIG_USB)
- [USB_HOST_SLOT] = INTERRUPT_ID_USBH
-#endif
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- return irq_tab_bcm96348[slot];
-}
-
-static void bcm96348_fixup(struct pci_dev *dev)
-{
- uint32 memaddr;
- uint32 size;
-
- memaddr = pci_resource_start(dev, 0);
- size = pci_resource_len(dev, 0);
-
- switch (PCI_SLOT(dev->devfn)) {
- case 0:
- // UBUS to PCI address range
- // Memory Window 1. Mask determines which bits are decoded.
- mpi->l2pmrange1 = ~(size-1);
- // UBUS to PCI Memory base address. This is akin to the ChipSelect base
- // register.
- mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
- // UBUS to PCI Remap Address. Replaces the masked address bits in the
- // range register with this setting.
- // Also, enable direct I/O and direct Memory accesses
- mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
- break;
-
- case 1:
- // Memory Window 2
- mpi->l2pmrange2 = ~(size-1);
- // UBUS to PCI Memory base address.
- mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
- // UBUS to PCI Remap Address
- mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
- break;
-
-#if defined(CONFIG_USB)
- case USB_HOST_SLOT:
- dev->resource[0].start = USB_HOST_BASE;
- dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
- break;
-#endif
- }
-}
-
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, PCI_ANY_ID,
- bcm96348_fixup);
-
-/*struct pci_fixup pcibios_fixups[] = {
- { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
- {0}
-};*/
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/addrspace.h>
-
-#include <bcm_intr.h>
-#include <bcm_map_part.h>
-#include <6348_intr.h>
-#include <6348_map_part.h>
-#include <bcmpci.h>
-
-#include <linux/delay.h>
-
-#if defined(CONFIG_USB)
-#if 0
-#define DPRINT(x...) printk(x)
-#else
-#define DPRINT(x...)
-#endif
-
-static int
-pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
-static int
-pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
-
-static bool usb_mem_size_rd = FALSE;
-static uint32 usb_mem_base = 0;
-static uint32 usb_cfg_space_cmd_reg = 0;
-#endif
-static bool pci_mem_size_rd = FALSE;
-
-static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
-
-static void mpi_SetupPciConfigAccess(uint32 addr)
-{
- mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
-}
-
-static void mpi_ClearPciConfigAccess(void)
-{
- mpi->l2pcfgctl = 0x00000000;
-}
-
-#if defined(CONFIG_USB)
-/* --------------------------------------------------------------------------
- Name: pci63xx_int_write
-Abstract: PCI Config write on internal device(s)
- -------------------------------------------------------------------------- */
-static int
-pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
-{
- if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
- return PCIBIOS_SUCCESSFUL;
- }
-
- switch (size) {
- case 1:
- DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
- PCI_SLOT(devfn), where, size, *value);
- break;
- case 2:
- DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
- PCI_SLOT(devfn), where, size, *value);
- switch (where) {
- case PCI_COMMAND:
- usb_cfg_space_cmd_reg = *value;
- break;
- default:
- break;
- }
- break;
- case 4:
- DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
- PCI_SLOT(devfn), where, size, *value);
- switch (where) {
- case PCI_BASE_ADDRESS_0:
- if (*value == 0xffffffff) {
- usb_mem_size_rd = TRUE;
- } else {
- usb_mem_base = *value;
- }
- break;
- default:
- break;
- }
- break;
- default:
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-/* --------------------------------------------------------------------------
- Name: pci63xx_int_read
-Abstract: PCI Config read on internal device(s)
- -------------------------------------------------------------------------- */
-static int
-pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
-{
- uint32 retValue = 0xFFFFFFFF;
-
- if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
- return PCIBIOS_SUCCESSFUL;
- }
-
- // For now, this is specific to the USB Host controller. We can
- // make it more general if we have to...
- // Emulate PCI Config accesses
- switch (where) {
- case PCI_VENDOR_ID:
- case PCI_DEVICE_ID:
- retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
- break;
- case PCI_COMMAND:
- case PCI_STATUS:
- retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
- break;
- case PCI_CLASS_REVISION:
- case PCI_CLASS_DEVICE:
- retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
- break;
- case PCI_BASE_ADDRESS_0:
- if (usb_mem_size_rd) {
- retValue = USB_BAR0_MEM_SIZE;
- } else {
- if (usb_mem_base != 0)
- retValue = usb_mem_base;
- else
- retValue = USB_HOST_BASE;
- }
- usb_mem_size_rd = FALSE;
- break;
- case PCI_CACHE_LINE_SIZE:
- case PCI_LATENCY_TIMER:
- retValue = 0;
- break;
- case PCI_HEADER_TYPE:
- retValue = PCI_HEADER_TYPE_NORMAL;
- break;
- case PCI_SUBSYSTEM_VENDOR_ID:
- retValue = PCI_VENDOR_ID_BROADCOM;
- break;
- case PCI_SUBSYSTEM_ID:
- retValue = 0x6300;
- break;
- case PCI_INTERRUPT_LINE:
- retValue = INTERRUPT_ID_USBH;
- break;
- default:
- break;
- }
-
- switch (size) {
- case 1:
- *value = (retValue >> ((where & 3) << 3)) & 0xff;
- DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
- PCI_SLOT(devfn), where, size, *value);
- break;
- case 2:
- *value = (retValue >> ((where & 3) << 3)) & 0xffff;
- DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
- PCI_SLOT(devfn), where, size, *value);
- break;
- case 4:
- *value = retValue;
- DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
- PCI_SLOT(devfn), where, size, *value);
- break;
- default:
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-#endif
-
-static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
- uint32 data;
-
-#if defined(CONFIG_USB)
- if (PCI_SLOT(devfn) == USB_HOST_SLOT)
- return pci63xx_int_read(devfn, where, val, size);
-#endif
-
- mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
- data = *(uint32 *)ioBase;
- switch(size) {
- case 1:
- *val = (data >> ((where & 3) << 3)) & 0xff;
- break;
- case 2:
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- break;
- case 4:
- *val = data;
- /* Special case for reading PCI device range */
- if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
- if (pci_mem_size_rd) {
- /* bcm6348 PCI memory window minimum size is 64K */
- *val &= PCI_SIZE_64K;
- }
- }
- break;
- default:
- break;
- }
- pci_mem_size_rd = FALSE;
- mpi_ClearPciConfigAccess();
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
- uint32 data;
-
-#if defined(CONFIG_USB)
- if (PCI_SLOT(devfn) == USB_HOST_SLOT)
- return pci63xx_int_write(devfn, where, &val, size);
-#endif
- mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
- data = *(uint32 *)ioBase;
- switch(size) {
- case 1:
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- break;
- case 2:
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- break;
- case 4:
- data = val;
- /* Special case for reading PCI device range */
- if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
- if (val == 0xffffffff)
- pci_mem_size_rd = TRUE;
- }
- break;
- default:
- break;
- }
- *(uint32 *)ioBase = data;
- udelay(500);
- mpi_ClearPciConfigAccess();
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops bcm96348_pci_ops = {
- .read = bcm96348_pcibios_read,
- .write = bcm96348_pcibios_write
-};
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <bcmpci.h>
-
-static struct resource bcm_pci_io_resource = {
- .name = "bcm96348 pci IO space",
- .start = BCM_PCI_IO_BASE,
- .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
- .flags = IORESOURCE_IO
-};
-
-static struct resource bcm_pci_mem_resource = {
- .name = "bcm96348 pci memory space",
- .start = BCM_PCI_MEM_BASE,
- .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
- .flags = IORESOURCE_MEM
-};
-
-extern struct pci_ops bcm96348_pci_ops;
-
-struct pci_controller bcm96348_controller = {
- .pci_ops = &bcm96348_pci_ops,
- .io_resource = &bcm_pci_io_resource,
- .mem_resource = &bcm_pci_mem_resource,
-};
-
-static __init int bcm96348_pci_init(void)
-{
- /* Avoid ISA compat ranges. */
- PCIBIOS_MIN_IO = 0x00000000;
- PCIBIOS_MIN_MEM = 0x00000000;
-
- /* Set I/O resource limits. */
- ioport_resource.end = 0x1fffffff;
- iomem_resource.end = 0xffffffff;
-
- register_pci_controller(&bcm96348_controller);
- return 0;
-}
-
-arch_initcall(bcm96348_pci_init);
+++ /dev/null
-/*
- * $Id$
- * Copyright (C) 2006 Florian Fainelli <florian@openwrt.org>
- * Mike Albon <malbon@openwrt.org>
- * Copyright (C) $Date$ $Author$
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* This is the BCM963xx flash map driver, in its actual state it only supports BCM96348 devices
- * this driver is able to manage both bootloader we found on these boards : CFE and RedBoot
- *
- * RedBoot :
- * - this bootloader allows us to parse partitions and therefore deduce the MTD partition table
- *
- * CFE :
- * - CFE partitionning can be detected as for BCM947xx devices
- *
- */
-
-#include <asm/io.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/vmalloc.h>
-#include <board.h>
-
-#define WINDOW_ADDR 0x1FC00000 /* Real address of the flash */
-#define WINDOW_SIZE 0x400000 /* Size of flash */
-#define BUSWIDTH 2 /* Buswidth */
-#define EXTENDED_SIZE 0xBFC00000 /* Extended flash address */
-#define IMAGE_LEN 10 /* Length of Length Field */
-#define ADDRESS_LEN 12 /* Length of Address field */
-#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y))
-
-extern int boot_loader_type; /* For RedBoot / CFE detection */
-extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long fis_origin);
-static struct mtd_partition *parsed_parts;
-
-static void __exit bcm963xx_mtd_cleanup(void);
-
-static struct mtd_info *bcm963xx_mtd_info;
-
-static struct map_info bcm963xx_map = {
- .name = "bcm963xx",
- .size = WINDOW_SIZE,
- .bankwidth = BUSWIDTH,
- .phys = WINDOW_ADDR,
-};
-
-
-int parse_cfe_partitions( struct mtd_info *master, struct mtd_partition **pparts)
-{
- int nrparts = 2, curpart = 0; // CFE and NVRAM always present.
- struct bcm963xx_cfe_map {
- unsigned char tagVersion[4]; // Version of the image tag
- unsigned char sig_1[20]; // Company Line 1
- unsigned char sig_2[14]; // Company Line 2
- unsigned char chipid[6]; // Chip this image is for
- unsigned char boardid[16]; // Board name
- unsigned char bigEndian[2]; // Map endianness -- 1 BE 0 LE
- unsigned char totalLength[IMAGE_LEN]; //Total length of image
- unsigned char cfeAddress[ADDRESS_LEN]; // Address in memory of CFE
- unsigned char cfeLength[IMAGE_LEN]; // Size of CFE
- unsigned char rootAddress[ADDRESS_LEN]; // Address in memory of rootfs
- unsigned char rootLength[IMAGE_LEN]; // Size of rootfs
- unsigned char kernelAddress[ADDRESS_LEN]; // Address in memory of kernel
- unsigned char kernelLength[IMAGE_LEN]; // Size of kernel
- unsigned char dualImage[2]; // Unused at present
- unsigned char inactiveFlag[2]; // Unused at present
- unsigned char reserved1[74]; // Reserved area not in use
- unsigned char imageCRC[4]; // CRC32 of images
- unsigned char reserved2[16]; // Unused at present
- unsigned char headerCRC[4]; // CRC32 of header excluding tagVersion
- unsigned char reserved3[16]; // Unused at present
- } *buf;
- struct mtd_partition *parts;
- int ret;
- size_t retlen;
- unsigned int rootfsaddr, kerneladdr, spareaddr;
- unsigned int rootfslen, kernellen, sparelen, totallen;
- int namelen = 0;
- int i;
- // Allocate memory for buffer
- buf = vmalloc(sizeof(struct bcm963xx_cfe_map));
-
- if (!buf)
- return -ENOMEM;
-
- // Get the tag
- ret = master->read(master,master->erasesize,sizeof(struct bcm963xx_cfe_map), &retlen, (void *)buf);
- if (retlen != sizeof(struct bcm963xx_cfe_map)){
- vfree(buf);
- return -EIO;
- };
- printk("bcm963xx: CFE boot tag found with version %s and board type %s.\n",buf->tagVersion,buf->boardid);
- // Get the values and calculate
- sscanf(buf->rootAddress,"%u", &rootfsaddr);
- rootfsaddr = rootfsaddr - EXTENDED_SIZE;
- sscanf(buf->rootLength, "%u", &rootfslen);
- sscanf(buf->kernelAddress, "%u", &kerneladdr);
- kerneladdr = kerneladdr - EXTENDED_SIZE;
- sscanf(buf->kernelLength, "%u", &kernellen);
- sscanf(buf->totalLength, "%u", &totallen);
- spareaddr = ROUNDUP(totallen,master->erasesize) + master->erasesize;
- sparelen = master->size - spareaddr - master->erasesize;
- // Determine number of partitions
- namelen = 8;
- if (rootfslen > 0){
- nrparts++;
- namelen =+ 6;
- };
- if (kernellen > 0){
- nrparts++;
- namelen =+ 6;
- };
- if (sparelen > 0){
- nrparts++;
- namelen =+ 6;
- };
- // Ask kernel for more memory.
- parts = kmalloc(sizeof(*parts)*nrparts+10*nrparts, GFP_KERNEL);
- if (!parts){
- vfree(buf);
- return -ENOMEM;
- };
- memset(parts,0,sizeof(*parts)*nrparts+10*nrparts);
- // Start building partition list
- parts[curpart].name = "CFE";
- parts[curpart].offset = 0;
- parts[curpart].size = master->erasesize;
- curpart++;
- if (kernellen > 0){
- parts[curpart].name = "Kernel";
- parts[curpart].offset = kerneladdr;
- parts[curpart].size = kernellen;
- curpart++;
- };
- if (rootfslen > 0){
- parts[curpart].name = "Rootfs";
- parts[curpart].offset = rootfsaddr;
- parts[curpart].size = rootfslen;
- curpart++;
- };
- if (sparelen > 0){
- parts[curpart].name = "OpenWrt";
- parts[curpart].offset = spareaddr;
- parts[curpart].size = sparelen;
- curpart++;
- };
- parts[curpart].name = "NVRAM";
- parts[curpart].offset = master->size - master->erasesize;
- parts[curpart].size = master->erasesize;
- for (i = 0; i < nrparts; i++) {
- printk("bcm963xx: Partition %d is %s offset %x and length %x\n", i, parts[i].name, parts[i].offset, parts[i].size);
- }
- *pparts = parts;
- vfree(buf);
- return nrparts;
-};
-
-static struct mtd_partition bcm963xx_parts[] = {
- { name: "bootloader", size: 0, offset: 0, mask_flags: MTD_WRITEABLE },
- { name: "rootfs", size: 0, offset: 0},
- { name: "jffs2", size: 5 * 0x10000, offset: 57*0x10000}
-};
-
-static int bcm963xx_parts_size = sizeof(bcm963xx_parts) / sizeof(bcm963xx_parts[0]);
-
-static int bcm963xx_detect_cfe(struct mtd_info *master)
-{
- int idoffset = 0x4e0;
- static char idstring[8] = "CFE1CFE1";
- char buf[8];
- int ret;
- size_t retlen;
-
- ret = master->read(master, idoffset, 8, &retlen, (void *)buf);
- printk("bcm963xx: Read Signature value of %s\n", buf);
- return strcmp(idstring,buf);
-}
-
-static int __init bcm963xx_mtd_init(void)
-{
- printk("bcm963xx: 0x%08x at 0x%08x\n", WINDOW_SIZE, WINDOW_ADDR);
- bcm963xx_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE);
-
- if (!bcm963xx_map.virt) {
- printk("bcm963xx: Failed to ioremap\n");
- return -EIO;
- }
-
- simple_map_init(&bcm963xx_map);
-
- bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map);
-
- if (bcm963xx_mtd_info) {
- bcm963xx_mtd_info->owner = THIS_MODULE;
-
- //if (boot_loader_type == BOOT_CFE)
- if (bcm963xx_detect_cfe(bcm963xx_mtd_info) == 0)
- {
- int parsed_nr_parts = 0;
- char * part_type;
- printk("bcm963xx: CFE bootloader detected\n");
- //add_mtd_device(bcm963xx_mtd_info);
- //add_mtd_partitions(bcm963xx_mtd_info, bcm963xx_parts, bcm963xx_parts_size);
- if (parsed_nr_parts == 0) {
- int ret = parse_cfe_partitions(bcm963xx_mtd_info, &parsed_parts);
- if (ret > 0) {
- part_type = "CFE";
- parsed_nr_parts = ret;
- }
- }
- add_mtd_partitions(bcm963xx_mtd_info, parsed_parts, parsed_nr_parts);
- return 0;
- }
- else
- {
- int parsed_nr_parts = 0;
- char * part_type;
-
- if (bcm963xx_mtd_info->size > 0x00400000) {
- printk("Support for extended flash memory size : 0x%08X ; ONLY 64MBIT SUPPORT\n", bcm963xx_mtd_info->size);
- bcm963xx_map.virt = (unsigned long)(EXTENDED_SIZE);
- }
-
-#ifdef CONFIG_MTD_REDBOOT_PARTS
- if (parsed_nr_parts == 0) {
- int ret = parse_redboot_partitions(bcm963xx_mtd_info, &parsed_parts, 0);
- if (ret > 0) {
- part_type = "RedBoot";
- parsed_nr_parts = ret;
- }
- }
-#endif
- add_mtd_partitions(bcm963xx_mtd_info, parsed_parts, parsed_nr_parts);
-
- return 0;
- }
- }
- iounmap(bcm963xx_map.virt);
- return -ENXIO;
-}
-
-static void __exit bcm963xx_mtd_cleanup(void)
-{
- if (bcm963xx_mtd_info) {
- del_mtd_partitions(bcm963xx_mtd_info);
- map_destroy(bcm963xx_mtd_info);
- }
-
- if (bcm963xx_map.virt) {
- iounmap(bcm963xx_map.virt);
- bcm963xx_map.virt = 0;
- }
-}
-
-module_init(bcm963xx_mtd_init);
-module_exit(bcm963xx_mtd_cleanup);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org> Mike Albon <malbon@openwrt.org>");
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-/* Description: Serial port driver for the BCM963XX. */
-
-#define CARDNAME "bcm963xx_serial driver"
-#define VERSION "2.0"
-#define VER_STR CARDNAME " v" VERSION "\n"
-
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-
-/* for definition of struct console */
-#include <linux/console.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <asm/uaccess.h>
-
-#include <bcmtypes.h>
-#include <board.h>
-#include <bcm_map_part.h>
-#include <bcm_intr.h>
-#include <6348_map_part.h>
-#include <6348_intr.h>
-
-static DEFINE_SPINLOCK(bcm963xx_serial_lock);
-
-extern void _putc(char);
-extern void _puts(const char *);
-
-typedef struct bcm_serial {
- volatile Uart *port;
- int type;
- int flags;
- int irq;
- int baud_base;
- int blocked_open;
- unsigned short close_delay;
- unsigned short closing_wait;
- unsigned short line; /* port/line number */
- unsigned short cflags; /* line configuration flag */
- unsigned short x_char; /* xon/xoff character */
- unsigned short read_status_mask; /* mask for read condition */
- unsigned short ignore_status_mask; /* mask for ignore condition */
- unsigned long event; /* mask used in BH */
- int xmit_head; /* Position of the head */
- int xmit_tail; /* Position of the tail */
- int xmit_cnt; /* Count of the chars in the buffer */
- int count; /* indicates how many times it has been opened */
- int magic;
-
- struct async_icount icount; /* keep track of things ... */
- struct tty_struct *tty; /* tty associated */
- struct ktermios normal_termios;
-
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
-
- long session; /* Session of opening process */
- long pgrp; /* pgrp of opening process */
-
- unsigned char is_initialized;
-} Context;
-
-
-/*---------------------------------------------------------------------*/
-/* Define bits in the Interrupt Enable register */
-/*---------------------------------------------------------------------*/
-/* Enable receive interrupt */
-#define RXINT (RXFIFONE|RXOVFERR)
-
-/* Enable transmit interrupt */
-#define TXINT (TXFIFOEMT|TXUNDERR|TXOVFERR)
-
-/* Enable receiver line status interrupt */
-#define LSINT (RXBRK|RXPARERR|RXFRAMERR)
-
-#define BCM_NUM_UARTS 1
-
-#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
-
-
-static struct bcm_serial multi[BCM_NUM_UARTS];
-static struct bcm_serial *lines[BCM_NUM_UARTS];
-static struct tty_driver *serial_driver;
-static struct ktermios *serial_termios[BCM_NUM_UARTS];
-static struct ktermios *serial_termios_locked[BCM_NUM_UARTS];
-
-
-static void bcm_stop(struct tty_struct *tty);
-static void bcm_start(struct tty_struct *tty);
-static inline void receive_chars(struct bcm_serial *info);
-static int startup(struct bcm_serial *info);
-static void shutdown(struct bcm_serial *info);
-static void change_speed(volatile Uart * pUart, tcflag_t cFlag);
-static void bcm63xx_cons_flush_chars(struct tty_struct *tty);
-static int bcm63xx_cons_write(struct tty_struct *tty,
- const unsigned char *buf, int count);
-static int bcm63xx_cons_write_room(struct tty_struct *tty);
-static int bcm_chars_in_buffer(struct tty_struct *tty);
-static void bcm_flush_buffer(struct tty_struct *tty);
-static void bcm_throttle(struct tty_struct *tty);
-static void bcm_unthrottle(struct tty_struct *tty);
-static void bcm_send_xchar(struct tty_struct *tty, char ch);
-static int get_serial_info(struct bcm_serial *info,
- struct serial_struct *retinfo);
-static int set_serial_info(struct bcm_serial *info,
- struct serial_struct *new_info);
-static int get_lsr_info(struct bcm_serial *info, unsigned int *value);
-static void send_break(struct bcm_serial *info, int duration);
-static int bcm_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg);
-static void bcm_set_termios(struct tty_struct *tty,
- struct ktermios *old_termios);
-static void bcm63xx_cons_close(struct tty_struct *tty, struct file *filp);
-static void bcm_hangup(struct tty_struct *tty);
-static int block_til_ready(struct tty_struct *tty, struct file *filp,
- struct bcm_serial *info);
-static int bcm63xx_cons_open(struct tty_struct *tty, struct file *filp);
-static int __init bcm63xx_serialinit(void);
-
-
-/*
- * ------------------------------------------------------------
- * rs_stop () and rs_start ()
- *
- * These routines are called before setting or resetting
- * tty->stopped. They enable or disable transmitter interrupts,
- * as necessary.
- * ------------------------------------------------------------
- */
-static void bcm_stop(struct tty_struct *tty)
-{
-}
-
-static void bcm_start(struct tty_struct *tty)
-{
- _puts(CARDNAME " Start\n");
-}
-
-/*
- * ------------------------------------------------------------
- * receive_char ()
- *
- * This routine deals with inputs from any lines.
- * ------------------------------------------------------------
- */
-static inline void receive_chars(struct bcm_serial *info)
-{
- struct tty_struct *tty = 0;
- struct async_icount *icount;
- int ignore = 0;
- unsigned short status, tmp;
- UCHAR ch = 0;
- while ((status = info->port->intStatus) & RXINT) {
- char flag_char = TTY_NORMAL;
-
- if (status & RXFIFONE)
- ch = info->port->Data; // Read the character
- tty = info->tty; /* now tty points to the proper dev */
- icount = &info->icount;
- if (!tty)
- break;
- if (!tty_buffer_request_room(tty, 1))
- break;
- icount->rx++;
- if (status & RXBRK) {
- flag_char = TTY_BREAK;
- icount->brk++;
- }
- // keep track of the statistics
- if (status & (RXFRAMERR | RXPARERR | RXOVFERR)) {
- if (status & RXPARERR) /* parity error */
- icount->parity++;
- else if (status & RXFRAMERR) /* frame error */
- icount->frame++;
- if (status & RXOVFERR) {
- // Overflow. Reset the RX FIFO
- info->port->fifoctl |= RSTRXFIFOS;
- icount->overrun++;
- }
- // check to see if we should ignore the character
- // and mask off conditions that should be ignored
- if (status & info->ignore_status_mask) {
- if (++ignore > 100)
- break;
- goto ignore_char;
- }
- // Mask off the error conditions we want to ignore
- tmp = status & info->read_status_mask;
- if (tmp & RXPARERR) {
- flag_char = TTY_PARITY;
- } else if (tmp & RXFRAMERR) {
- flag_char = TTY_FRAME;
- }
- if (tmp & RXOVFERR) {
- tty_insert_flip_char(tty, ch, flag_char);
- ch = 0;
- flag_char = TTY_OVERRUN;
- if (!tty_buffer_request_room(tty, 1))
- break;
- }
- }
- tty_insert_flip_char(tty, ch, flag_char);
- }
- ignore_char:;
- tty_flip_buffer_push(tty);
- tty_schedule_flip(tty);
-
-}
-
-
-/*
- * ------------------------------------------------------------
- * bcm_interrupt ()
- *
- * this is the main interrupt routine for the chip.
- * It deals with the multiple ports.
- * ------------------------------------------------------------
- */
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-static irqreturn_t bcm_interrupt(int irq, void *dev)
-#else
-static void bcm_interrupt(int irq, void *dev, struct pt_regs *regs)
-#endif
-{
- struct bcm_serial *info = lines[0];
- UINT16 intStat;
-
- /* get pending interrupt flags from UART */
-
- /* Mask with only the serial interrupts that are enabled */
- intStat = info->port->intStatus & info->port->intMask;
- while (intStat) {
- if (intStat & RXINT)
- receive_chars(info);
- else if (intStat & TXINT)
- info->port->intStatus = TXINT;
- else /* don't know what it was, so let's mask it */
- info->port->intMask &= ~intStat;
-
- intStat = info->port->intStatus & info->port->intMask;
- }
-
- // Clear the interrupt
- enable_brcm_irq(INTERRUPT_ID_UART);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
- return IRQ_HANDLED;
-#endif
-}
-
-/*
- * -------------------------------------------------------------------
- * startup ()
- *
- * various initialization tasks
- * -------------------------------------------------------------------
- */
-static int startup(struct bcm_serial *info)
-{
- // Port is already started...
- return 0;
-}
-
-/*
- * -------------------------------------------------------------------
- * shutdown ()
- *
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- * -------------------------------------------------------------------
- */
-static void shutdown(struct bcm_serial *info)
-{
- unsigned long flags;
- if (!info->is_initialized)
- return;
-
- spin_lock_irqsave(&bcm963xx_serial_lock, flags);
-
- info->port->control &= ~(BRGEN | TXEN | RXEN);
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- info->is_initialized = 0;
-
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
-}
-
-/*
- * -------------------------------------------------------------------
- * change_speed ()
- *
- * Set the baud rate, character size, parity and stop bits.
- * -------------------------------------------------------------------
- */
-static void change_speed(volatile Uart * pUart, tcflag_t cFlag)
-{
- unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
-
- spin_lock_irqsave(&bcm963xx_serial_lock, ulFlags);
- switch (cFlag & (CBAUD | CBAUDEX)) {
- case B115200:
- ulBaud = 115200;
- break;
- case B57600:
- ulBaud = 57600;
- break;
- case B38400:
- ulBaud = 38400;
- break;
- case B19200:
- ulBaud = 19200;
- break;
- case B9600:
- ulBaud = 9600;
- break;
- case B4800:
- ulBaud = 4800;
- break;
- case B2400:
- ulBaud = 2400;
- break;
- case B1800:
- ulBaud = 1800;
- break;
- case B1200:
- ulBaud = 1200;
- break;
- case B600:
- ulBaud = 600;
- break;
- case B300:
- ulBaud = 300;
- break;
- case B200:
- ulBaud = 200;
- break;
- case B150:
- ulBaud = 150;
- break;
- case B134:
- ulBaud = 134;
- break;
- case B110:
- ulBaud = 110;
- break;
- case B75:
- ulBaud = 75;
- break;
- case B50:
- ulBaud = 50;
- break;
- default:
- ulBaud = 115200;
- break;
- }
-
- /* Calculate buad rate. */
- ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
- ulTmp = (ulClockFreqHz / ulBaud) / 16;
- if (ulTmp & 0x01)
- ulTmp /= 2; /* Rounding up, so sub is already accounted for */
- else
- ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
- pUart->baudword = ulTmp;
-
- /* Set character size, stop bits and parity. */
- switch (cFlag & CSIZE) {
- case CS5:
- ulTmp = BITS5SYM; /* select transmit 5 bit data size */
- break;
- case CS6:
- ulTmp = BITS6SYM; /* select transmit 6 bit data size */
- break;
- case CS7:
- ulTmp = BITS7SYM; /* select transmit 7 bit data size */
- break;
- default:
- ulTmp = BITS8SYM; /* select transmit 8 bit data size */
- break;
- }
- if (cFlag & CSTOPB)
- ulTmp |= TWOSTOP; /* select 2 stop bits */
- else
- ulTmp |= ONESTOP; /* select one stop bit */
-
- /* Write these values into the config reg. */
- pUart->config = ulTmp;
- pUart->control &=
- ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
- switch (cFlag & (PARENB | PARODD)) {
- case PARENB | PARODD:
- pUart->control |= RXPARITYEN | TXPARITYEN;
- break;
- case PARENB:
- pUart->control |=
- RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
- break;
- default:
- pUart->control |= 0;
- break;
- }
-
- /* Reset and flush uart */
- pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
- spin_unlock_irqrestore(&bcm963xx_serial_lock, ulFlags);
-}
-
-
-/*
- * -------------------------------------------------------------------
- * bcm_flush_char ()
- *
- * Nothing to flush. Polled I/O is used.
- * -------------------------------------------------------------------
- */
-static void bcm63xx_cons_flush_chars(struct tty_struct *tty)
-{
-}
-
-
-/*
- * -------------------------------------------------------------------
- * bcm63xx_cons_write ()
- *
- * Main output routine using polled I/O.
- * -------------------------------------------------------------------
- */
-static int bcm63xx_cons_write(struct tty_struct *tty,
- const unsigned char *buf, int count)
-{
- int c;
-
- for (c = 0; c < count; c++)
- _putc(buf[c]);
- return count;
-}
-
-/*
- * -------------------------------------------------------------------
- * bcm63xx_cons_write_room ()
- *
- * Compute the amount of space available for writing.
- * -------------------------------------------------------------------
- */
-static int bcm63xx_cons_write_room(struct tty_struct *tty)
-{
- /* Pick a number. Any number. Polled I/O is used. */
- return 1024;
-}
-
-/*
- * -------------------------------------------------------------------
- * bcm_chars_in_buffer ()
- *
- * compute the amount of char left to be transmitted
- * -------------------------------------------------------------------
- */
-static int bcm_chars_in_buffer(struct tty_struct *tty)
-{
- return 0;
-}
-
-/*
- * -------------------------------------------------------------------
- * bcm_flush_buffer ()
- *
- * Empty the output buffer
- * -------------------------------------------------------------------
- */
-static void bcm_flush_buffer(struct tty_struct *tty)
-{
- tty_wakeup(tty);
-}
-
-/*
- * ------------------------------------------------------------
- * bcm_throttle () and bcm_unthrottle ()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled (or not).
- * ------------------------------------------------------------
- */
-static void bcm_throttle(struct tty_struct *tty)
-{
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
- if (I_IXOFF(tty))
- info->x_char = STOP_CHAR(tty);
-}
-
-static void bcm_unthrottle(struct tty_struct *tty)
-{
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- info->x_char = START_CHAR(tty);
- }
-}
-
-static void bcm_send_xchar(struct tty_struct *tty, char ch)
-{
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
- info->x_char = ch;
- if (ch)
- bcm_start(info->tty);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_ioctl () and friends
- * ------------------------------------------------------------
- */
-static int get_serial_info(struct bcm_serial *info,
- struct serial_struct *retinfo)
-{
- struct serial_struct tmp;
-
- if (!retinfo)
- return -EFAULT;
-
- memset(&tmp, 0, sizeof(tmp));
- tmp.type = info->type;
- tmp.line = info->line;
- tmp.port = (int) info->port;
- tmp.irq = info->irq;
- tmp.flags = 0;
- tmp.baud_base = info->baud_base;
- tmp.close_delay = info->close_delay;
- tmp.closing_wait = info->closing_wait;
-
- return copy_to_user(retinfo, &tmp, sizeof(*retinfo));
-}
-
-static int set_serial_info(struct bcm_serial *info,
- struct serial_struct *new_info)
-{
- struct serial_struct new_serial;
- struct bcm_serial old_info;
- int retval = 0;
-
- if (!new_info)
- return -EFAULT;
-
- copy_from_user(&new_serial, new_info, sizeof(new_serial));
- old_info = *info;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
-
- if (info->count > 1)
- return -EBUSY;
-
- /* OK, past this point, all the error checking has been done.
- * At this point, we start making changes.....
- */
- info->baud_base = new_serial.baud_base;
- info->type = new_serial.type;
- info->close_delay = new_serial.close_delay;
- info->closing_wait = new_serial.closing_wait;
- retval = startup(info);
- return retval;
-}
-
-/*
- * get_lsr_info - get line status register info
- *
- * Purpose: Let user call ioctl() to get info when the UART physically
- * is emptied. On bus types like RS485, the transmitter must
- * release the bus after transmitting. This must be done when
- * the transmit shift register is empty, not be done when the
- * transmit holding register is empty. This functionality
- * allows an RS485 driver to be written in user space.
- */
-static int get_lsr_info(struct bcm_serial *info, unsigned int *value)
-{
- return (0);
-}
-
-/*
- * This routine sends a break character out the serial port.
- */
-static void send_break(struct bcm_serial *info, int duration)
-{
- unsigned long flags;
-
- if (!info->port)
- return;
-
- current->state = TASK_INTERRUPTIBLE;
-
- /*save_flags (flags);
- cli(); */
- spin_lock_irqsave(&bcm963xx_serial_lock, flags);
-
- info->port->control |= XMITBREAK;
- schedule_timeout(duration);
- info->port->control &= ~XMITBREAK;
-
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
- //restore_flags (flags);
-}
-
-static int bcm_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- int error;
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
- int retval;
-
- if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
- (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
- (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
- switch (cmd) {
-
- case TCSBRK: /* SVID version: non-zero arg --> no break */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (!arg)
- send_break(info, HZ / 4); /* 1/4 second */
- return 0;
-
- case TCSBRKP: /* support for POSIX tcsendbreak() */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
- return 0;
-
- case TIOCGSOFTCAR:
- error =
- access_ok(VERIFY_WRITE, (void *) arg, sizeof(long));
- if (!error)
- return -EFAULT;
- else {
- put_user(C_CLOCAL(tty) ? 1 : 0,
- (unsigned long *) arg);
- return 0;
- }
-
- case TIOCSSOFTCAR:
- error = get_user(arg, (unsigned long *) arg);
- if (error)
- return error;
- tty->termios->c_cflag =
- ((tty->termios->
- c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
- return 0;
-
- case TIOCGSERIAL:
- error =
- access_ok(VERIFY_WRITE, (void *) arg,
- sizeof(struct serial_struct));
- if (!error)
- return -EFAULT;
- else
- return get_serial_info(info,
- (struct serial_struct *)
- arg);
-
- case TIOCSSERIAL:
- return set_serial_info(info, (struct serial_struct *) arg);
-
- case TIOCSERGETLSR: /* Get line status register */
- error =
- access_ok(VERIFY_WRITE, (void *) arg,
- sizeof(unsigned int));
- if (!error)
- return -EFAULT;
- else
- return get_lsr_info(info, (unsigned int *) arg);
-
- case TIOCSERGSTRUCT:
- error =
- access_ok(VERIFY_WRITE, (void *) arg,
- sizeof(struct bcm_serial));
- if (!error)
- return -EFAULT;
- else {
- copy_to_user((struct bcm_serial *) arg, info,
- sizeof(struct bcm_serial));
- return 0;
- }
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-static void bcm_set_termios(struct tty_struct *tty,
- struct ktermios *old_termios)
-{
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
-
- if (tty->termios->c_cflag != old_termios->c_cflag)
- change_speed(info->port, tty->termios->c_cflag);
-}
-
-/*
- * ------------------------------------------------------------
- * bcm63xx_cons_close()
- *
- * This routine is called when the serial port gets closed. First, we
- * wait for the last remaining data to be sent. Then, we turn off
- * the transmit enable and receive enable flags.
- * ------------------------------------------------------------
- */
-static void bcm63xx_cons_close(struct tty_struct *tty, struct file *filp)
-{
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
- unsigned long flags;
-
- if (!info)
- return;
-
- /*save_flags (flags);
- cli(); */
- spin_lock_irqsave(&bcm963xx_serial_lock, flags);
-
- if (tty_hung_up_p(filp)) {
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
- //restore_flags (flags);
- return;
- }
-
- if ((tty->count == 1) && (info->count != 1)) {
-
- /* Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. Info->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk
- ("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
- "info->count is %d\n", info->count);
- info->count = 1;
- }
-
- if (--info->count < 0) {
- printk("ds_close: bad serial port count for ttys%d: %d\n",
- info->line, info->count);
- info->count = 0;
- }
-
- if (info->count) {
- //restore_flags (flags);
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
- return;
- }
-
- /* Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
-
- /* At this point we stop accepting input. To do this, we
- * disable the receive line status interrupts.
- */
- shutdown(info);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
-#else
- if (tty->driver.flush_buffer)
- tty->driver.flush_buffer(tty);
-#endif
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
-
- tty->closing = 0;
- info->event = 0;
- info->tty = 0;
- if (tty->ldisc.num != tty_ldisc_get(N_TTY)->num) {
- if (tty->ldisc.close)
- (tty->ldisc.close) (tty);
- tty->ldisc = *tty_ldisc_get(N_TTY);
- tty->termios->c_line = N_TTY;
- if (tty->ldisc.open)
- (tty->ldisc.open) (tty);
- }
- if (info->blocked_open) {
- if (info->close_delay) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(info->close_delay);
- }
- wake_up_interruptible(&info->open_wait);
- }
- wake_up_interruptible(&info->close_wait);
-
- //restore_flags (flags);
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
-}
-
-/*
- * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
- */
-static void bcm_hangup(struct tty_struct *tty)
-{
-
- struct bcm_serial *info = (struct bcm_serial *) tty->driver_data;
-
- shutdown(info);
- info->event = 0;
- info->count = 0;
- info->tty = 0;
- wake_up_interruptible(&info->open_wait);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_open() and friends
- * ------------------------------------------------------------
- */
-static int block_til_ready(struct tty_struct *tty, struct file *filp,
- struct bcm_serial *info)
-{
- return 0;
-}
-
-/*
- * This routine is called whenever a serial port is opened. It
- * enables interrupts for a serial port. It also performs the
- * serial-specific initialization for the tty structure.
- */
-static int bcm63xx_cons_open(struct tty_struct *tty, struct file *filp)
-{
- struct bcm_serial *info;
- int retval, line;
-
- // Make sure we're only opening on of the ports we support
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
- line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
-#else
- line = MINOR(tty->device) - tty->driver.minor_start;
-#endif
-
- if ((line < 0) || (line >= BCM_NUM_UARTS))
- return -ENODEV;
-
- info = lines[line];
-
- tty->low_latency = 1;
- info->port->intMask = 0; /* Clear any pending interrupts */
- info->port->intMask = RXINT; /* Enable RX */
-
- info->count++;
- tty->driver_data = info;
- info->tty = tty;
- enable_brcm_irq(INTERRUPT_ID_UART);
-
- // Start up serial port
- retval = startup(info);
- if (retval)
- return retval;
-
- retval = block_til_ready(tty, filp, info);
- if (retval)
- return retval;
-
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
- info->pgrp = process_group(current);
-#else
- info->session = current->session;
- info->pgrp = current->pgrp;
-#endif
-
- return 0;
-}
-
-
-static struct tty_operations rs_ops = {
- .open = bcm63xx_cons_open,
- .close = bcm63xx_cons_close,
- .write = bcm63xx_cons_write,
- .flush_chars = bcm63xx_cons_flush_chars,
- .write_room = bcm63xx_cons_write_room,
- .chars_in_buffer = bcm_chars_in_buffer,
- .flush_buffer = bcm_flush_buffer,
- .ioctl = bcm_ioctl,
- .throttle = bcm_throttle,
- .unthrottle = bcm_unthrottle,
- .send_xchar = bcm_send_xchar,
- .set_termios = bcm_set_termios,
- .stop = bcm_stop,
- .start = bcm_start,
- .hangup = bcm_hangup,
-};
-
-/* --------------------------------------------------------------------------
- Name: bcm63xx_serialinit
- Purpose: Initialize our BCM63xx serial driver
--------------------------------------------------------------------------- */
-static int __init bcm63xx_serialinit(void)
-{
- int i, flags;
- struct bcm_serial *info;
-
- // Print the driver version information
- printk(VER_STR);
- serial_driver = alloc_tty_driver(BCM_NUM_UARTS);
- if (!serial_driver)
- return -ENOMEM;
-
- serial_driver->owner = THIS_MODULE;
- serial_driver->name = "ttyS";
- serial_driver->major = TTY_MAJOR;
- serial_driver->minor_start = 64;
- serial_driver->num = 1;
- serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
- serial_driver->subtype = SERIAL_TYPE_NORMAL;
- serial_driver->init_termios = tty_std_termios;
- serial_driver->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
- serial_driver->flags = TTY_DRIVER_REAL_RAW;
-
- serial_driver->termios = serial_termios;
- serial_driver->termios_locked = serial_termios_locked;
-
- tty_set_operations(serial_driver, &rs_ops);
-
- if (tty_register_driver(serial_driver))
- panic("Couldn't register serial driver\n");
-
- //save_flags(flags); cli();
- spin_lock_irqsave(&bcm963xx_serial_lock, flags);
-
- for (i = 0; i < 1; i++) {
- info = &multi[i];
- lines[i] = info;
- info->magic = SERIAL_MAGIC;
- info->port = (Uart *) ((char *) UART_BASE + (i * 0x20));
- info->tty = 0;
- info->irq = (2 - i) + 8;
- info->line = i;
- info->close_delay = 50;
- info->closing_wait = 3000;
- info->x_char = 0;
- info->event = 0;
- info->count = 0;
- info->blocked_open = 0;
- info->normal_termios = serial_driver->init_termios;
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
-
- /* If we are pointing to address zero then punt - not correctly
- * set up in setup.c to handle this.
- */
- if (!info->port)
- return 0;
- BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
- }
-
- /* order matters here... the trick is that flags
- * is updated... in request_irq - to immediatedly obliterate
- * it is unwise.
- */
- spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
- return 0;
-}
-
-module_init(bcm63xx_serialinit);
-
-/* --------------------------------------------------------------------------
- Name: bcm_console_print
- Purpose: bcm_console_print is registered for printk.
- The console_lock must be held when we get here.
--------------------------------------------------------------------------- */
-static void bcm_console_print(struct console *cons, const char *str,
- unsigned int count)
-{
- unsigned int i;
- //_puts(str);
- for (i = 0; i < count; i++, str++) {
- _putc(*str);
- if (*str == 10) {
- _putc(13);
- }
- }
-}
-
-static struct tty_driver *bcm_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return serial_driver;
-}
-
-static int __init bcm_console_setup(struct console *co, char *options)
-{
- return 0;
-}
-
-static struct console bcm_sercons = {
- .name = "ttyS",
- .write = bcm_console_print,
- .device = bcm_console_device,
- .setup = bcm_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-static int __init bcm63xx_console_init(void)
-{
- register_console(&bcm_sercons);
- return 0;
-}
-
-console_initcall(bcm63xx_console_init);
+++ /dev/null
-/*
- * Broadcom Common Firmware Environment (CFE) support
- *
- * Copyright 2000, 2001, 2002
- * Broadcom Corporation. All rights reserved.
- *
- * Copyright (C) 2006 Michael Buesch
- *
- * Original Authors: Mitch Lichtenberg, Chris Demetriou
- *
- * This software is furnished under license and may be used and copied only
- * in accordance with the following terms and conditions. Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * modified or unmodified copies of this software in source and/or binary
- * form. No title or ownership is transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce and
- * retain this copyright notice and list of conditions as they appear in
- * the source file.
- *
- * 2) No right is granted to use any trade name, trademark, or logo of
- * Broadcom Corporation. The "Broadcom Corporation" name may not be
- * used to endorse or promote products derived from this software
- * without the prior written permission of Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
- * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
- * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
- * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef LINUX_CFE_API_H_
-#define LINUX_CFE_API_H_
-
-#include <linux/types.h>
-
-
-#define CFE_MI_RESERVED 0 /* memory is reserved, do not use */
-#define CFE_MI_AVAILABLE 1 /* memory is available */
-
-#define CFE_FLG_WARMSTART 0x00000001
-#define CFE_FLG_FULL_ARENA 0x00000001
-#define CFE_FLG_ENV_PERMANENT 0x00000001
-
-#define CFE_CPU_CMD_START 1
-#define CFE_CPU_CMD_STOP 0
-
-#define CFE_STDHANDLE_CONSOLE 0
-
-#define CFE_DEV_NETWORK 1
-#define CFE_DEV_DISK 2
-#define CFE_DEV_FLASH 3
-#define CFE_DEV_SERIAL 4
-#define CFE_DEV_CPU 5
-#define CFE_DEV_NVRAM 6
-#define CFE_DEV_CLOCK 7
-#define CFE_DEV_OTHER 8
-#define CFE_DEV_MASK 0x0F
-
-#define CFE_CACHE_FLUSH_D 1
-#define CFE_CACHE_INVAL_I 2
-#define CFE_CACHE_INVAL_D 4
-#define CFE_CACHE_INVAL_L2 8
-
-#define CFE_FWI_64BIT 0x00000001
-#define CFE_FWI_32BIT 0x00000002
-#define CFE_FWI_RELOC 0x00000004
-#define CFE_FWI_UNCACHED 0x00000008
-#define CFE_FWI_MULTICPU 0x00000010
-#define CFE_FWI_FUNCSIM 0x00000020
-#define CFE_FWI_RTLSIM 0x00000040
-
-struct cfe_fwinfo {
- s64 version; /* major, minor, eco version */
- s64 totalmem; /* total installed mem */
- s64 flags; /* various flags */
- s64 boardid; /* board ID */
- s64 bootarea_va; /* VA of boot area */
- s64 bootarea_pa; /* PA of boot area */
- s64 bootarea_size; /* size of boot area */
-};
-
-
-/* The public CFE API */
-
-int cfe_present(void); /* Check if we booted from CFE. Returns bool */
-
-int cfe_getticks(s64 *ticks);
-int cfe_close(int handle);
-int cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1);
-int cfe_cpu_stop(int cpu);
-int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);
-int cfe_enumdev(int idx, char *name, int namelen);
-int cfe_enummem(int idx, int flags, u64 *start, u64 *length,
- u64 *type);
-int cfe_exit(int warm, int status);
-int cfe_flushcache(int flags);
-int cfe_getdevinfo(char *name);
-int cfe_getenv(char *name, char *dest, int destlen);
-int cfe_getfwinfo(struct cfe_fwinfo *info);
-int cfe_getstdhandle(int handletype);
-int cfe_inpstat(int handle);
-int cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
- int length, int *retlen, u64 offset);
-int cfe_open(char *name);
-int cfe_read(int handle, unsigned char *buffer, int length);
-int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length);
-int cfe_setenv(char *name, char *val);
-int cfe_write(int handle, unsigned char *buffer, int length);
-int cfe_writeblk(int handle, s64 offset, unsigned char *buffer,
- int length);
-
-
-/* High level API */
-
-/* Print some information to CFE's console (most likely serial line) */
-int cfe_printk(const char *fmt, ...) __attribute__((format(printf, 1, 2)));
-int cfe_vprintk(const char *fmt, va_list args);
-
-
-
-/* Error codes returned by the low API functions */
-
-#define CFE_ISERR(errcode) (errcode < 0)
-
-#define CFE_OK 0
-#define CFE_ERR -1 /* generic error */
-#define CFE_ERR_INV_COMMAND -2
-#define CFE_ERR_EOF -3
-#define CFE_ERR_IOERR -4
-#define CFE_ERR_NOMEM -5
-#define CFE_ERR_DEVNOTFOUND -6
-#define CFE_ERR_DEVOPEN -7
-#define CFE_ERR_INV_PARAM -8
-#define CFE_ERR_ENVNOTFOUND -9
-#define CFE_ERR_ENVREADONLY -10
-
-#define CFE_ERR_NOTELF -11
-#define CFE_ERR_NOT32BIT -12
-#define CFE_ERR_WRONGENDIAN -13
-#define CFE_ERR_BADELFVERS -14
-#define CFE_ERR_NOTMIPS -15
-#define CFE_ERR_BADELFFMT -16
-#define CFE_ERR_BADADDR -17
-
-#define CFE_ERR_FILENOTFOUND -18
-#define CFE_ERR_UNSUPPORTED -19
-
-#define CFE_ERR_HOSTUNKNOWN -20
-
-#define CFE_ERR_TIMEOUT -21
-
-#define CFE_ERR_PROTOCOLERR -22
-
-#define CFE_ERR_NETDOWN -23
-#define CFE_ERR_NONAMESERVER -24
-
-#define CFE_ERR_NOHANDLES -25
-#define CFE_ERR_ALREADYBOUND -26
-
-#define CFE_ERR_CANNOTSET -27
-#define CFE_ERR_NOMORE -28
-#define CFE_ERR_BADFILESYS -29
-#define CFE_ERR_FSNOTAVAIL -30
-
-#define CFE_ERR_INVBOOTBLOCK -31
-#define CFE_ERR_WRONGDEVTYPE -32
-#define CFE_ERR_BBCHECKSUM -33
-#define CFE_ERR_BOOTPROGCHKSUM -34
-
-#define CFE_ERR_LDRNOTAVAIL -35
-
-#define CFE_ERR_NOTREADY -36
-
-#define CFE_ERR_GETMEM -37
-#define CFE_ERR_SETMEM -38
-
-#define CFE_ERR_NOTCONN -39
-#define CFE_ERR_ADDRINUSE -40
-
-
-#endif /* LINUX_CFE_API_H_ */
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2003 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __6338_INTR_H
-#define __6338_INTR_H
-
-/*=====================================================================*/
-/* BCM6338 External Interrupt Level Assignments */
-/*=====================================================================*/
-#define INTERRUPT_ID_EXTERNAL_0 3
-#define INTERRUPT_ID_EXTERNAL_1 4
-#define INTERRUPT_ID_EXTERNAL_2 5
-#define INTERRUPT_ID_EXTERNAL_3 6
-
-/*=====================================================================*/
-/* BCM6338 Timer Interrupt Level Assignments */
-/*=====================================================================*/
-#define MIPS_TIMER_INT 7
-
-/*=====================================================================*/
-/* Peripheral ISR Table Offset */
-/*=====================================================================*/
-#define INTERNAL_ISR_TABLE_OFFSET 8
-
-/*=====================================================================*/
-/* Logical Peripheral Interrupt IDs */
-/*=====================================================================*/
-
-#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
-#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
-#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
-#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 4)
-#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 5)
-#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 6)
-#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 7)
-#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
-#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
-#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 10)
-#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 11)
-#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 12)
-#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 13)
-#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
-#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
-#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
-#define INTERRUPT_ID_SDIO (INTERNAL_ISR_TABLE_OFFSET + 17)
-
-#endif /* __BCM6338_H */
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2004 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __BCM6338_MAP_H
-#define __BCM6338_MAP_H
-
-#include "bcmtypes.h"
-
-#define PERF_BASE 0xfffe0000
-#define TIMR_BASE 0xfffe0200
-#define UART_BASE 0xfffe0300
-#define GPIO_BASE 0xfffe0400
-#define SPI_BASE 0xfffe0c00
-
-typedef struct PerfControl {
- uint32 RevID;
- uint16 testControl;
- uint16 blkEnables;
-#define EMAC_CLK_EN 0x0010
-#define USBS_CLK_EN 0x0010
-#define SAR_CLK_EN 0x0020
-
-#define SPI_CLK_EN 0x0200
-
- uint32 pll_control;
-#define SOFT_RESET 0x00000001
-
- uint32 IrqMask;
- uint32 IrqStatus;
-
- uint32 ExtIrqCfg;
-#define EI_SENSE_SHFT 0
-#define EI_STATUS_SHFT 5
-#define EI_CLEAR_SHFT 10
-#define EI_MASK_SHFT 15
-#define EI_INSENS_SHFT 20
-#define EI_LEVEL_SHFT 25
-
- uint32 unused[4]; /* (18) */
- uint32 BlockSoftReset; /* (28) */
-#define BSR_SPI 0x00000001
-#define BSR_EMAC 0x00000004
-#define BSR_USBH 0x00000008
-#define BSR_USBS 0x00000010
-#define BSR_ADSL 0x00000020
-#define BSR_DMAMEM 0x00000040
-#define BSR_SAR 0x00000080
-#define BSR_ACLC 0x00000100
-#define BSR_ADSL_MIPS_PLL 0x00000400
-#define BSR_ALL_BLOCKS \
- (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
- BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
-} PerfControl;
-
-#define PERF ((volatile PerfControl * const) PERF_BASE)
-
-
-typedef struct Timer {
- uint16 unused0;
- byte TimerMask;
-#define TIMER0EN 0x01
-#define TIMER1EN 0x02
-#define TIMER2EN 0x04
- byte TimerInts;
-#define TIMER0 0x01
-#define TIMER1 0x02
-#define TIMER2 0x04
-#define WATCHDOG 0x08
- uint32 TimerCtl0;
- uint32 TimerCtl1;
- uint32 TimerCtl2;
-#define TIMERENABLE 0x80000000
-#define RSTCNTCLR 0x40000000
- uint32 TimerCnt0;
- uint32 TimerCnt1;
- uint32 TimerCnt2;
- uint32 WatchDogDefCount;
-
- /* Write 0xff00 0x00ff to Start timer
- * Write 0xee00 0x00ee to Stop and re-load default count
- * Read from this register returns current watch dog count
- */
- uint32 WatchDogCtl;
-
- /* Number of 40-MHz ticks for WD Reset pulse to last */
- uint32 WDResetCount;
-} Timer;
-
-#define TIMER ((volatile Timer * const) TIMR_BASE)
-typedef struct UartChannel {
- byte unused0;
- byte control;
-#define BRGEN 0x80 /* Control register bit defs */
-#define TXEN 0x40
-#define RXEN 0x20
-#define LOOPBK 0x10
-#define TXPARITYEN 0x08
-#define TXPARITYEVEN 0x04
-#define RXPARITYEN 0x02
-#define RXPARITYEVEN 0x01
-
- byte config;
-#define XMITBREAK 0x40
-#define BITS5SYM 0x00
-#define BITS6SYM 0x10
-#define BITS7SYM 0x20
-#define BITS8SYM 0x30
-#define ONESTOP 0x07
-#define TWOSTOP 0x0f
- /* 4-LSBS represent STOP bits/char
- * in 1/8 bit-time intervals. Zero
- * represents 1/8 stop bit interval.
- * Fifteen represents 2 stop bits.
- */
- byte fifoctl;
-#define RSTTXFIFOS 0x80
-#define RSTRXFIFOS 0x40
- /* 5-bit TimeoutCnt is in low bits of this register.
- * This count represents the number of characters
- * idle times before setting receive Irq when below threshold
- */
- uint32 baudword;
- /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
- */
-
- byte txf_levl; /* Read-only fifo depth */
- byte rxf_levl; /* Read-only fifo depth */
- byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
- * RxThreshold. Irq can be asserted
- * when rx fifo> thresh, txfifo<thresh
- */
- byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
- * if these bits are also enabled to GPIO_o
- */
-#define DTREN 0x01
-#define RTSEN 0x02
-
- byte unused1;
- byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
- * detect irq on rising AND falling
- * edges for corresponding GPIO_i
- * if enabled (edge insensitive)
- */
- byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
- * 0 for negedge sense if
- * not configured for edge
- * insensitive (see above)
- * Lower 4 bits: Mask to enable change
- * detection IRQ for corresponding
- * GPIO_i
- */
- byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
- * have changed (may set IRQ).
- * read automatically clears bit
- * Lower 4 bits are actual status
- */
-
- uint16 intMask; /* Same Bit defs for Mask and status */
- uint16 intStatus;
-#define DELTAIP 0x0001
-#define TXUNDERR 0x0002
-#define TXOVFERR 0x0004
-#define TXFIFOTHOLD 0x0008
-#define TXREADLATCH 0x0010
-#define TXFIFOEMT 0x0020
-#define RXUNDERR 0x0040
-#define RXOVFERR 0x0080
-#define RXTIMEOUT 0x0100
-#define RXFIFOFULL 0x0200
-#define RXFIFOTHOLD 0x0400
-#define RXFIFONE 0x0800
-#define RXFRAMERR 0x1000
-#define RXPARERR 0x2000
-#define RXBRK 0x4000
-
- uint16 unused2;
- uint16 Data; /* Write to TX, Read from RX */
- /* bits 11:8 are BRK,PAR,FRM errors */
-
- uint32 unused3;
- uint32 unused4;
-} Uart;
-
-#define UART ((volatile Uart * const) UART_BASE)
-
-typedef struct GpioControl {
- uint32 unused0;
- uint32 GPIODir; /* bits 7:0 */
- uint32 unused1;
- uint32 GPIOio; /* bits 7:0 */
- uint32 LEDCtrl;
-#define LED3_STROBE 0x08000000
-#define LED2_STROBE 0x04000000
-#define LED1_STROBE 0x02000000
-#define LED0_STROBE 0x01000000
-#define LED_TEST 0x00010000
-#define LED3_DISABLE_LINK_ACT 0x00008000
-#define LED2_DISABLE_LINK_ACT 0x00004000
-#define LED1_DISABLE_LINK_ACT 0x00002000
-#define LED0_DISABLE_LINK_ACT 0x00001000
-#define LED_INTERVAL_SET_MASK 0x00000f00
-#define LED_INTERVAL_SET_320MS 0x00000500
-#define LED_INTERVAL_SET_160MS 0x00000400
-#define LED_INTERVAL_SET_80MS 0x00000300
-#define LED_INTERVAL_SET_40MS 0x00000200
-#define LED_INTERVAL_SET_20MS 0x00000100
-#define LED3_ON 0x00000080
-#define LED2_ON 0x00000040
-#define LED1_ON 0x00000020
-#define LED0_ON 0x00000010
-#define LED3_ENABLE 0x00000008
-#define LED2_ENABLE 0x00000004
-#define LED1_ENABLE 0x00000002
-#define LED0_ENABLE 0x00000001
- uint32 SpiSlaveCfg;
-#define SPI_SLAVE_RESET 0x00010000
-#define SPI_RESTRICT 0x00000400
-#define SPI_DELAY_DISABLE 0x00000200
-#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
-#define SPI_SER_ADDR_CFG_MASK 0x0000000c
-#define SPI_MODE 0x00000001
- uint32 vRegConfig;
-} GpioControl;
-
-#define GPIO ((volatile GpioControl * const) GPIO_BASE)
-
-/* Number to mask conversion macro used for GPIODir and GPIOio */
-#define GPIO_NUM_MAX_BITS_MASK 0x0f
-#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
-
-/*
-** Spi Controller
-*/
-
-typedef struct SpiControl {
- uint16 spiCmd; /* (0x0): SPI command */
-#define SPI_CMD_START_IMMEDIATE 3
-
-#define SPI_CMD_COMMAND_SHIFT 0
-#define SPI_CMD_DEVICE_ID_SHIFT 4
-#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
-
- byte spiIntStatus; /* (0x2): SPI interrupt status */
- byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
-
- byte spiIntMask; /* (0x4): SPI interrupt mask */
-#define SPI_INTR_CMD_DONE 0x01
-#define SPI_INTR_CLEAR_ALL 0x1f
-
- byte spiStatus; /* (0x5): SPI status */
-
- byte spiClkCfg; /* (0x6): SPI clock configuration */
-
- byte spiFillByte; /* (0x7): SPI fill byte */
-
- byte unused0;
- byte spiMsgTail; /* (0x9): msgtail */
- byte unused1;
- byte spiRxTail; /* (0xB): rxtail */
-
- uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
-
- byte spiMsgCtl; /* (0x40) control byte */
-#define HALF_DUPLEX_W 1
-#define HALF_DUPLEX_R 2
-#define SPI_MSG_TYPE_SHIFT 6
-#define SPI_BYTE_CNT_SHIFT 0
- byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
- byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
- byte unused3[64]; /* (0xc0 - 0xff) reserved */
-} SpiControl;
-
-#define SPI ((volatile SpiControl * const) SPI_BASE)
-
-/*
-** External Bus Interface
-*/
-typedef struct EbiChipSelect {
- uint32 base; /* base address in upper 24 bits */
-#define EBI_SIZE_8K 0
-#define EBI_SIZE_16K 1
-#define EBI_SIZE_32K 2
-#define EBI_SIZE_64K 3
-#define EBI_SIZE_128K 4
-#define EBI_SIZE_256K 5
-#define EBI_SIZE_512K 6
-#define EBI_SIZE_1M 7
-#define EBI_SIZE_2M 8
-#define EBI_SIZE_4M 9
-#define EBI_SIZE_8M 10
-#define EBI_SIZE_16M 11
-#define EBI_SIZE_32M 12
-#define EBI_SIZE_64M 13
-#define EBI_SIZE_128M 14
-#define EBI_SIZE_256M 15
- uint32 config;
-#define EBI_ENABLE 0x00000001 /* .. enable this range */
-#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
-#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
-#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
-#define EBI_WREN 0x00000020 /* enable posted writes */
-#define EBI_POLARITY 0x00000040 /* .. set to invert something,
- ** don't know what yet */
-#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
-#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
-#define EBI_FIFO 0x00000200 /* .. use fifo */
-#define EBI_RE 0x00000400 /* .. Reverse Endian */
-} EbiChipSelect;
-
-typedef struct MpiRegisters {
- EbiChipSelect cs[1]; /* size chip select configuration */
-} MpiRegisters;
-
-#define MPI ((volatile MpiRegisters * const) MPI_BASE)
-
-
-#endif
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __6345_INTR_H
-#define __6345_INTR_H
-
-
-/*=====================================================================*/
-/* BCM6345 External Interrupt Level Assignments */
-/*=====================================================================*/
-#define INTERRUPT_ID_EXTERNAL_0 3
-#define INTERRUPT_ID_EXTERNAL_1 4
-#define INTERRUPT_ID_EXTERNAL_2 5
-#define INTERRUPT_ID_EXTERNAL_3 6
-
-/*=====================================================================*/
-/* BCM6345 Timer Interrupt Level Assignments */
-/*=====================================================================*/
-#define MIPS_TIMER_INT 7
-
-/*=====================================================================*/
-/* Peripheral ISR Table Offset */
-/*=====================================================================*/
-#define INTERNAL_ISR_TABLE_OFFSET 8
-#define DMA_ISR_TABLE_OFFSET (INTERNAL_ISR_TABLE_OFFSET + 13)
-
-/*=====================================================================*/
-/* Logical Peripheral Interrupt IDs */
-/*=====================================================================*/
-
-/* Internal peripheral interrupt IDs */
-#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
-#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
-#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 3)
-#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 4)
-#define INTERRUPT_ID_USB (INTERNAL_ISR_TABLE_OFFSET + 5)
-#define INTERRUPT_ID_EMAC (INTERNAL_ISR_TABLE_OFFSET + 8)
-#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 12)
-
-/* DMA channel interrupt IDs */
-#define INTERRUPT_ID_EMAC_RX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
-#define INTERRUPT_ID_EMAC_TX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
-#define INTERRUPT_ID_EBI_RX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
-#define INTERRUPT_ID_EBI_TX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
-#define INTERRUPT_ID_RESERVED_RX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
-#define INTERRUPT_ID_RESERVED_TX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
-#define INTERRUPT_ID_USB_BULK_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
-#define INTERRUPT_ID_USB_BULK_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
-#define INTERRUPT_ID_USB_CNTL_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
-#define INTERRUPT_ID_USB_CNTL_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
-#define INTERRUPT_ID_USB_ISO_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
-#define INTERRUPT_ID_USB_ISO_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
-
-
-#endif /* __BCM6345_H */
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __BCM6345_MAP_H
-#define __BCM6345_MAP_H
-
-
-#include "bcmtypes.h"
-#include "6345_intr.h"
-
-typedef struct IntControl {
- uint32 RevID;
- uint16 testControl;
- uint16 blkEnables;
-#define USB_CLK_EN 0x0100
-#define EMAC_CLK_EN 0x0080
-#define UART_CLK_EN 0x0008
-#define CPU_CLK_EN 0x0001
-
- uint32 pll_control;
-#define SOFT_RESET 0x00000001
-
- uint32 IrqMask;
- uint32 IrqStatus;
-
- uint32 ExtIrqCfg;
-#define EI_SENSE_SHFT 0
-#define EI_STATUS_SHFT 4
-#define EI_CLEAR_SHFT 8
-#define EI_MASK_SHFT 12
-#define EI_INSENS_SHFT 16
-#define EI_LEVEL_SHFT 20
-} IntControl;
-
-#define INTC_BASE 0xfffe0000
-#define PERF ((volatile IntControl * const) INTC_BASE)
-
-#define TIMR_BASE 0xfffe0200
-typedef struct Timer {
- uint16 unused0;
- byte TimerMask;
-#define TIMER0EN 0x01
-#define TIMER1EN 0x02
-#define TIMER2EN 0x04
- byte TimerInts;
-#define TIMER0 0x01
-#define TIMER1 0x02
-#define TIMER2 0x04
-#define WATCHDOG 0x08
- uint32 TimerCtl0;
- uint32 TimerCtl1;
- uint32 TimerCtl2;
-#define TIMERENABLE 0x80000000
-#define RSTCNTCLR 0x40000000
- uint32 TimerCnt0;
- uint32 TimerCnt1;
- uint32 TimerCnt2;
- uint32 WatchDogDefCount;
-
- /* Write 0xff00 0x00ff to Start timer
- * Write 0xee00 0x00ee to Stop and re-load default count
- * Read from this register returns current watch dog count
- */
- uint32 WatchDogCtl;
-
- /* Number of 40-MHz ticks for WD Reset pulse to last */
- uint32 WDResetCount;
-} Timer;
-
-#define TIMER ((volatile Timer * const) TIMR_BASE)
-
-typedef struct UartChannel {
- byte unused0;
- byte control;
-#define BRGEN 0x80 /* Control register bit defs */
-#define TXEN 0x40
-#define RXEN 0x20
-#define TXPARITYEN 0x08
-#define TXPARITYEVEN 0x04
-#define RXPARITYEN 0x02
-#define RXPARITYEVEN 0x01
- byte config;
-#define BITS5SYM 0x00
-#define BITS6SYM 0x10
-#define BITS7SYM 0x20
-#define BITS8SYM 0x30
-#define XMITBREAK 0x40
-#define ONESTOP 0x07
-#define TWOSTOP 0x0f
-
- byte fifoctl;
-#define RSTTXFIFOS 0x80
-#define RSTRXFIFOS 0x40
- uint32 baudword;
-
- byte txf_levl;
- byte rxf_levl;
- byte fifocfg;
- byte prog_out;
-
- byte unused1;
- byte DeltaIPEdgeNoSense;
- byte DeltaIPConfig_Mask;
- byte DeltaIP_SyncIP;
- uint16 intMask;
- uint16 intStatus;
-#define TXUNDERR 0x0002
-#define TXOVFERR 0x0004
-#define TXFIFOEMT 0x0020
-#define RXOVFERR 0x0080
-#define RXFIFONE 0x0800
-#define RXFRAMERR 0x1000
-#define RXPARERR 0x2000
-#define RXBRK 0x4000
-
- uint16 unused2;
- uint16 Data;
- uint32 unused3;
- uint32 unused4;
-} Uart;
-
-#define UART_BASE 0xfffe0300
-#define UART ((volatile Uart * const) UART_BASE)
-
-typedef struct GpioControl {
- uint16 unused0;
- byte unused1;
- byte TBusSel;
-
- uint16 unused2;
- uint16 GPIODir;
- byte unused3;
- byte Leds;
- uint16 GPIOio;
-
- uint32 UartCtl;
-} GpioControl;
-
-#define GPIO_BASE 0xfffe0400
-#define GPIO ((volatile GpioControl * const) GPIO_BASE)
-
-#define GPIO_NUM_MAX_BITS_MASK 0x0f
-#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
-
-
-#endif
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2003 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __6348_INTR_H
-#define __6348_INTR_H
-
-
-/*=====================================================================*/
-/* BCM6348 External Interrupt Level Assignments */
-/*=====================================================================*/
-#define INTERRUPT_ID_EXTERNAL_0 3
-#define INTERRUPT_ID_EXTERNAL_1 4
-#define INTERRUPT_ID_EXTERNAL_2 5
-#define INTERRUPT_ID_EXTERNAL_3 6
-
-/*=====================================================================*/
-/* BCM6348 Timer Interrupt Level Assignments */
-/*=====================================================================*/
-#define MIPS_TIMER_INT 7
-
-/*=====================================================================*/
-/* Peripheral ISR Table Offset */
-/*=====================================================================*/
-#define INTERNAL_ISR_TABLE_OFFSET 8
-
-/*=====================================================================*/
-/* Logical Peripheral Interrupt IDs */
-/*=====================================================================*/
-
-#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
-#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
-#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
-#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 4)
-#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 5)
-#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 6)
-#define INTERRUPT_ID_EMAC2 (INTERNAL_ISR_TABLE_OFFSET + 7)
-#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
-#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
-#define INTERRUPT_ID_M2M (INTERNAL_ISR_TABLE_OFFSET + 10)
-#define INTERRUPT_ID_ACLC (INTERNAL_ISR_TABLE_OFFSET + 11)
-#define INTERRUPT_ID_USBH (INTERNAL_ISR_TABLE_OFFSET + 12)
-#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 13)
-#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
-#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
-#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
-#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 17)
-#define INTERRUPT_ID_USB_ISO_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 18)
-#define INTERRUPT_ID_USB_ISO_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 19)
-#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 20)
-#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 21)
-#define INTERRUPT_ID_EMAC2_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 22)
-#define INTERRUPT_ID_EMAC2_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 23)
-#define INTERRUPT_ID_MPI (INTERNAL_ISR_TABLE_OFFSET + 24)
-#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 25)
-
-
-#endif /* __BCM6348_H */
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __BCM6348_MAP_H
-#define __BCM6348_MAP_H
-
-#include "bcmtypes.h"
-
-#define PERF_BASE 0xfffe0000
-#define TIMR_BASE 0xfffe0200
-#define UART_BASE 0xfffe0300
-#define GPIO_BASE 0xfffe0400
-#define MPI_BASE 0xfffe2000 /* MPI control registers */
-#define USB_HOST_BASE 0xfffe1b00 /* USB host registers */
-#define USB_HOST_NON_OHCI 0xfffe1c00 /* USB host non-OHCI registers */
-
-typedef struct PerfControl {
- uint32 RevID;
- uint16 testControl;
- uint16 blkEnables;
-#define EMAC_CLK_EN 0x0010
-#define SAR_CLK_EN 0x0020
-#define USBS_CLK_EN 0x0040
-#define USBH_CLK_EN 0x0100
-
- uint32 pll_control;
-#define SOFT_RESET 0x00000001
-
- uint32 IrqMask;
- uint32 IrqStatus;
-
- uint32 ExtIrqCfg;
-#define EI_SENSE_SHFT 0
-#define EI_STATUS_SHFT 5
-#define EI_CLEAR_SHFT 10
-#define EI_MASK_SHFT 15
-#define EI_INSENS_SHFT 20
-#define EI_LEVEL_SHFT 25
-
- uint32 unused[4]; /* (18) */
- uint32 BlockSoftReset; /* (28) */
-#define BSR_SPI 0x00000001
-#define BSR_EMAC 0x00000004
-#define BSR_USBH 0x00000008
-#define BSR_USBS 0x00000010
-#define BSR_ADSL 0x00000020
-#define BSR_DMAMEM 0x00000040
-#define BSR_SAR 0x00000080
-#define BSR_ACLC 0x00000100
-#define BSR_ADSL_MIPS_PLL 0x00000400
-#define BSR_ALL_BLOCKS \
- (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
- BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
- uint32 unused2[2]; /* (2c) */
- uint32 PllStrap; /* (34) */
-#define PLL_N1_SHFT 20
-#define PLL_N1_MASK (7<<PLL_N1_SHFT)
-#define PLL_N2_SHFT 15
-#define PLL_N2_MASK (0x1f<<PLL_N2_SHFT)
-#define PLL_M1_REF_SHFT 12
-#define PLL_M1_REF_MASK (7<<PLL_M1_REF_SHFT)
-#define PLL_M2_REF_SHFT 9
-#define PLL_M2_REF_MASK (7<<PLL_M2_REF_SHFT)
-#define PLL_M1_CPU_SHFT 6
-#define PLL_M1_CPU_MASK (7<<PLL_M1_CPU_SHFT)
-#define PLL_M1_BUS_SHFT 3
-#define PLL_M1_BUS_MASK (7<<PLL_M1_BUS_SHFT)
-#define PLL_M2_BUS_SHFT 0
-#define PLL_M2_BUS_MASK (7<<PLL_M2_BUS_SHFT)
-} PerfControl;
-
-#define PERF ((volatile PerfControl * const) PERF_BASE)
-
-typedef struct Timer {
- uint16 unused0;
- byte TimerMask;
-#define TIMER0EN 0x01
-#define TIMER1EN 0x02
-#define TIMER2EN 0x04
- byte TimerInts;
-#define TIMER0 0x01
-#define TIMER1 0x02
-#define TIMER2 0x04
-#define WATCHDOG 0x08
- uint32 TimerCtl0;
- uint32 TimerCtl1;
- uint32 TimerCtl2;
-#define TIMERENABLE 0x80000000
-#define RSTCNTCLR 0x40000000
- uint32 TimerCnt0;
- uint32 TimerCnt1;
- uint32 TimerCnt2;
- uint32 WatchDogDefCount;
-
- /* Write 0xff00 0x00ff to Start timer
- * Write 0xee00 0x00ee to Stop and re-load default count
- * Read from this register returns current watch dog count
- */
- uint32 WatchDogCtl;
-
- /* Number of 40-MHz ticks for WD Reset pulse to last */
- uint32 WDResetCount;
-} Timer;
-
-#define TIMER ((volatile Timer * const) TIMR_BASE)
-
-typedef struct UartChannel {
- byte unused0;
- byte control;
-#define BRGEN 0x80 /* Control register bit defs */
-#define TXEN 0x40
-#define RXEN 0x20
-#define LOOPBK 0x10
-#define TXPARITYEN 0x08
-#define TXPARITYEVEN 0x04
-#define RXPARITYEN 0x02
-#define RXPARITYEVEN 0x01
-
- byte config;
-#define XMITBREAK 0x40
-#define BITS5SYM 0x00
-#define BITS6SYM 0x10
-#define BITS7SYM 0x20
-#define BITS8SYM 0x30
-#define ONESTOP 0x07
-#define TWOSTOP 0x0f
- /* 4-LSBS represent STOP bits/char
- * in 1/8 bit-time intervals. Zero
- * represents 1/8 stop bit interval.
- * Fifteen represents 2 stop bits.
- */
- byte fifoctl;
-#define RSTTXFIFOS 0x80
-#define RSTRXFIFOS 0x40
- /* 5-bit TimeoutCnt is in low bits of this register.
- * This count represents the number of characters
- * idle times before setting receive Irq when below threshold
- */
- uint32 baudword;
- /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
- */
-
- byte txf_levl; /* Read-only fifo depth */
- byte rxf_levl; /* Read-only fifo depth */
- byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
- * RxThreshold. Irq can be asserted
- * when rx fifo> thresh, txfifo<thresh
- */
- byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
- * if these bits are also enabled to GPIO_o
- */
-#define DTREN 0x01
-#define RTSEN 0x02
-
- byte unused1;
- byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
- * detect irq on rising AND falling
- * edges for corresponding GPIO_i
- * if enabled (edge insensitive)
- */
- byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
- * 0 for negedge sense if
- * not configured for edge
- * insensitive (see above)
- * Lower 4 bits: Mask to enable change
- * detection IRQ for corresponding
- * GPIO_i
- */
- byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
- * have changed (may set IRQ).
- * read automatically clears bit
- * Lower 4 bits are actual status
- */
-
- uint16 intMask; /* Same Bit defs for Mask and status */
- uint16 intStatus;
-#define DELTAIP 0x0001
-#define TXUNDERR 0x0002
-#define TXOVFERR 0x0004
-#define TXFIFOTHOLD 0x0008
-#define TXREADLATCH 0x0010
-#define TXFIFOEMT 0x0020
-#define RXUNDERR 0x0040
-#define RXOVFERR 0x0080
-#define RXTIMEOUT 0x0100
-#define RXFIFOFULL 0x0200
-#define RXFIFOTHOLD 0x0400
-#define RXFIFONE 0x0800
-#define RXFRAMERR 0x1000
-#define RXPARERR 0x2000
-#define RXBRK 0x4000
-
- uint16 unused2;
- uint16 Data; /* Write to TX, Read from RX */
- /* bits 11:8 are BRK,PAR,FRM errors */
-
- uint32 unused3;
- uint32 unused4;
-} Uart;
-
-#define UART ((volatile Uart * const) UART_BASE)
-
-typedef struct GpioControl {
- uint32 GPIODir_high; /* bits 36:32 */
- uint32 GPIODir; /* bits 31:00 */
- uint32 GPIOio_high; /* bits 36:32 */
- uint32 GPIOio; /* bits 31:00 */
- uint32 LEDCtrl;
-#define LED3_STROBE 0x08000000
-#define LED2_STROBE 0x04000000
-#define LED1_STROBE 0x02000000
-#define LED0_STROBE 0x01000000
-#define LED_TEST 0x00010000
-#define LED3_DISABLE_LINK_ACT 0x00008000
-#define LED2_DISABLE_LINK_ACT 0x00004000
-#define LED1_DISABLE_LINK_ACT 0x00002000
-#define LED0_DISABLE_LINK_ACT 0x00001000
-#define LED_INTERVAL_SET_MASK 0x00000f00
-#define LED_INTERVAL_SET_320MS 0x00000500
-#define LED_INTERVAL_SET_160MS 0x00000400
-#define LED_INTERVAL_SET_80MS 0x00000300
-#define LED_INTERVAL_SET_40MS 0x00000200
-#define LED_INTERVAL_SET_20MS 0x00000100
-#define LED3_ON 0x00000080
-#define LED2_ON 0x00000040
-#define LED1_ON 0x00000020
-#define LED0_ON 0x00000010
-#define LED3_ENABLE 0x00000008
-#define LED2_ENABLE 0x00000004
-#define LED1_ENABLE 0x00000002
-#define LED0_ENABLE 0x00000001
- uint32 SpiSlaveCfg;
-#define SPI_SLAVE_RESET 0x00010000
-#define SPI_RESTRICT 0x00000400
-#define SPI_DELAY_DISABLE 0x00000200
-#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
-#define SPI_SER_ADDR_CFG_MASK 0x0000000c
-#define SPI_MODE 0x00000001
- uint32 GPIOMode;
-#define GROUP4_DIAG 0x00090000
-#define GROUP4_UTOPIA 0x00080000
-#define GROUP4_LEGACY_LED 0x00030000
-#define GROUP4_MII_SNOOP 0x00020000
-#define GROUP4_EXT_EPHY 0x00010000
-#define GROUP3_DIAG 0x00009000
-#define GROUP3_UTOPIA 0x00008000
-#define GROUP3_EXT_MII 0x00007000
-#define GROUP2_DIAG 0x00000900
-#define GROUP2_PCI 0x00000500
-#define GROUP1_DIAG 0x00000090
-#define GROUP1_UTOPIA 0x00000080
-#define GROUP1_SPI_UART 0x00000060
-#define GROUP1_SPI_MASTER 0x00000060
-#define GROUP1_MII_PCCARD 0x00000040
-#define GROUP1_MII_SNOOP 0x00000020
-#define GROUP1_EXT_EPHY 0x00000010
-#define GROUP0_DIAG 0x00000009
-#define GROUP0_EXT_MII 0x00000007
-
-} GpioControl;
-
-#define GPIO ((volatile GpioControl * const) GPIO_BASE)
-
-/* Number to mask conversion macro used for GPIODir and GPIOio */
-#define GPIO_NUM_TOTAL_BITS_MASK 0x3f
-#define GPIO_NUM_MAX_BITS_MASK 0x1f
-#define GPIO_NUM_TO_MASK(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
-
-/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
-#define GPIO_NUM_MAX_BITS_MASK_HIGH 0x07
-#define GPIO_NUM_TO_MASK_HIGH(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
-
-
-/*
-** External Bus Interface
-*/
-typedef struct EbiChipSelect {
- uint32 base; /* base address in upper 24 bits */
-#define EBI_SIZE_8K 0
-#define EBI_SIZE_16K 1
-#define EBI_SIZE_32K 2
-#define EBI_SIZE_64K 3
-#define EBI_SIZE_128K 4
-#define EBI_SIZE_256K 5
-#define EBI_SIZE_512K 6
-#define EBI_SIZE_1M 7
-#define EBI_SIZE_2M 8
-#define EBI_SIZE_4M 9
-#define EBI_SIZE_8M 10
-#define EBI_SIZE_16M 11
-#define EBI_SIZE_32M 12
-#define EBI_SIZE_64M 13
-#define EBI_SIZE_128M 14
-#define EBI_SIZE_256M 15
- uint32 config;
-#define EBI_ENABLE 0x00000001 /* .. enable this range */
-#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
-#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
-#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
-#define EBI_WREN 0x00000020 /* enable posted writes */
-#define EBI_POLARITY 0x00000040 /* .. set to invert something,
- ** don't know what yet */
-#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
-#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
-#define EBI_FIFO 0x00000200 /* .. use fifo */
-#define EBI_RE 0x00000400 /* .. Reverse Endian */
-} EbiChipSelect;
-
-typedef struct MpiRegisters {
- EbiChipSelect cs[7]; /* size chip select configuration */
-#define EBI_CS0_BASE 0
-#define EBI_CS1_BASE 1
-#define EBI_CS2_BASE 2
-#define EBI_CS3_BASE 3
-#define PCMCIA_COMMON_BASE 4
-#define PCMCIA_ATTRIBUTE_BASE 5
-#define PCMCIA_IO_BASE 6
- uint32 unused0[2]; /* reserved */
- uint32 ebi_control; /* ebi control */
- uint32 unused1[4]; /* reserved */
-#define EBI_ACCESS_TIMEOUT 0x000007FF
- uint32 pcmcia_cntl1; /* pcmcia control 1 */
-#define PCCARD_CARD_RESET 0x00040000
-#define CARDBUS_ENABLE 0x00008000
-#define PCMCIA_ENABLE 0x00004000
-#define PCMCIA_GPIO_ENABLE 0x00002000
-#define CARDBUS_IDSEL 0x00001F00
-#define VS2_OEN 0x00000080
-#define VS1_OEN 0x00000040
-#define VS2_OUT 0x00000020
-#define VS1_OUT 0x00000010
-#define VS2_IN 0x00000008
-#define VS1_IN 0x00000004
-#define CD2_IN 0x00000002
-#define CD1_IN 0x00000001
-#define VS_MASK 0x0000000C
-#define CD_MASK 0x00000003
- uint32 unused2; /* reserved */
- uint32 pcmcia_cntl2; /* pcmcia control 2 */
-#define PCMCIA_BYTESWAP_DIS 0x00000002
-#define PCMCIA_HALFWORD_EN 0x00000001
-#define RW_ACTIVE_CNT_BIT 2
-#define INACTIVE_CNT_BIT 8
-#define CE_SETUP_CNT_BIT 16
-#define CE_HOLD_CNT_BIT 24
- uint32 unused3[40]; /* reserved */
-
- uint32 sp0range; /* PCI to internal system bus address space */
- uint32 sp0remap;
- uint32 sp0cfg;
- uint32 sp1range;
- uint32 sp1remap;
- uint32 sp1cfg;
-
- uint32 EndianCfg;
-
- uint32 l2pcfgctl; /* internal system bus to PCI IO/Cfg control */
-#define DIR_CFG_SEL 0x80000000 /* change from PCI I/O access to PCI config access */
-#define DIR_CFG_USEREG 0x40000000 /* use this register info for PCI configuration access */
-#define DEVICE_NUMBER 0x00007C00 /* device number for the PCI configuration access */
-#define FUNC_NUMBER 0x00000300 /* function number for the PCI configuration access */
-#define REG_NUMBER 0x000000FC /* register number for the PCI configuration access */
-#define CONFIG_TYPE 0x00000003 /* configuration type for the PCI configuration access */
-
- uint32 l2pmrange1; /* internal system bus to PCI memory space */
-#define PCI_SIZE_64K 0xFFFF0000
-#define PCI_SIZE_128K 0xFFFE0000
-#define PCI_SIZE_256K 0xFFFC0000
-#define PCI_SIZE_512K 0xFFF80000
-#define PCI_SIZE_1M 0xFFF00000
-#define PCI_SIZE_2M 0xFFE00000
-#define PCI_SIZE_4M 0xFFC00000
-#define PCI_SIZE_8M 0xFF800000
-#define PCI_SIZE_16M 0xFF000000
-#define PCI_SIZE_32M 0xFE000000
- uint32 l2pmbase1; /* kseg0 or kseg1 address & 0x1FFFFFFF */
- uint32 l2pmremap1;
-#define CARDBUS_MEM 0x00000004
-#define MEM_WINDOW_EN 0x00000001
- uint32 l2pmrange2;
- uint32 l2pmbase2;
- uint32 l2pmremap2;
- uint32 l2piorange; /* internal system bus to PCI I/O space */
- uint32 l2piobase;
- uint32 l2pioremap;
-
- uint32 pcimodesel;
-#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
-#define PCI_BAR2_NOSWAP 0x00000002 /* BAR at offset 0x20 */
-#define PCI_BAR1_NOSWAP 0x00000001 /* BAR at affset 0x1c */
-
- uint32 pciintstat; /* PCI interrupt mask/status */
-#define MAILBOX1_SENT 0x08
-#define MAILBOX0_SENT 0x04
-#define MAILBOX1_MSG_RCV 0x02
-#define MAILBOX0_MSG_RCV 0x01
- uint32 locbuscntrl; /* internal system bus control */
-#define DIR_U2P_NOSWAP 0x00000002
-#define EN_PCI_GPIO 0x00000001
- uint32 locintstat; /* internal system bus interrupt mask/status */
-#define CSERR 0x0200
-#define SERR 0x0100
-#define EXT_PCI_INT 0x0080
-#define DIR_FAILED 0x0040
-#define DIR_COMPLETE 0x0020
-#define PCI_CFG 0x0010
- uint32 unused5[7];
-
- uint32 mailbox0;
- uint32 mailbox1;
-
- uint32 pcicfgcntrl; /* internal system bus PCI configuration control */
-#define PCI_CFG_REG_WRITE_EN 0x00000080
-#define PCI_CFG_ADDR 0x0000003C
- uint32 pcicfgdata; /* internal system bus PCI configuration data */
-
- uint32 locch2ctl; /* PCI to interrnal system bus DMA (downstream) local control */
-#define MPI_DMA_HALT 0x00000008 /* idle after finish current memory burst */
-#define MPI_DMA_PKT_HALT 0x00000004 /* idle after an EOP flag is detected */
-#define MPI_DMA_STALL 0x00000002 /* idle after an EOP flag is detected */
-#define MPI_DMA_ENABLE 0x00000001 /* set to enable channel */
- uint32 locch2intStat;
-#define MPI_DMA_NO_DESC 0x00000004 /* no valid descriptors */
-#define MPI_DMA_DONE 0x00000002 /* packet xfer complete */
-#define MPI_DMA_BUFF_DONE 0x00000001 /* buffer done */
- uint32 locch2intMask;
- uint32 unused6;
- uint32 locch2descaddr;
- uint32 locch2status1;
-#define LOCAL_DESC_STATE 0xE0000000
-#define PCI_DESC_STATE 0x1C000000
-#define BYTE_DONE 0x03FFC000
-#define RING_ADDR 0x00003FFF
- uint32 locch2status2;
-#define BUFPTR_OFFSET 0x1FFF0000
-#define PCI_MASTER_STATE 0x000000C0
-#define LOC_MASTER_STATE 0x00000038
-#define CONTROL_STATE 0x00000007
- uint32 unused7;
-
- uint32 locch1Ctl; /*internal system bus to PCI DMA (upstream) local control */
-#define DMA_U2P_LE 0x00000200 /* local bus is little endian */
-#define DMA_U2P_NOSWAP 0x00000100 /* lccal bus is little endian but no data swapped */
- uint32 locch1intstat;
- uint32 locch1intmask;
- uint32 unused8;
- uint32 locch1descaddr;
- uint32 locch1status1;
- uint32 locch1status2;
- uint32 unused9;
-
- uint32 pcich1ctl; /* internal system bus to PCI DMA PCI control */
- uint32 pcich1intstat;
- uint32 pcich1intmask;
- uint32 pcich1descaddr;
- uint32 pcich1status1;
- uint32 pcich1status2;
-
- uint32 pcich2Ctl; /* PCI to internal system bus DMA PCI control */
- uint32 pcich2intstat;
- uint32 pcich2intmask;
- uint32 pcich2descaddr;
- uint32 pcich2status1;
- uint32 pcich2status2;
-
- uint32 perm_id; /* permanent device and vendor id */
- uint32 perm_rev; /* permanent revision id */
-} MpiRegisters;
-
-#define MPI ((volatile MpiRegisters * const) MPI_BASE)
-
-/* PCI configuration address space start offset 0x40 */
-#define BRCM_PCI_CONFIG_TIMER 0x40
-#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK 0x0000FF00
-#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK 0x000000FF
-
-/* USB host non-Open HCI register, USB_HOST_NON_OHCI, bit definitions. */
-#define NON_OHCI_ENABLE_PORT1 0x00000001 /* Use USB port 1 for host, not dev */
-#define NON_OHCI_BYTE_SWAP 0x00000008 /* Swap USB host registers */
-
-#define USBH_NON_OHCI ((volatile unsigned long * const) USB_HOST_NON_OHCI)
-
-#endif
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-//**************************************************************************************
-// File Name : bcmTag.h
-//
-// Description: add tag with validation system to the firmware image file to be uploaded
-// via http
-//
-// Created : 02/28/2002 seanl
-//**************************************************************************************
-
-#ifndef _BCMTAG_H_
-#define _BCMTAG_H_
-
-
-#define BCM_SIG_1 "Broadcom Corporation"
-#define BCM_SIG_2 "ver. 2.0" // was "firmware version 2.0" now it is split 6 char out for chip id.
-
-#define BCM_TAG_VER "6"
-#define BCM_TAG_VER_LAST "26"
-
-// file tag (head) structure all is in clear text except validationTokens (crc, md5, sha1, etc). Total: 128 unsigned chars
-#define TAG_LEN 256
-#define TAG_VER_LEN 4
-#define SIG_LEN 20
-#define SIG_LEN_2 14 // Original second SIG = 20 is now devided into 14 for SIG_LEN_2 and 6 for CHIP_ID
-#define CHIP_ID_LEN 6
-#define IMAGE_LEN 10
-#define ADDRESS_LEN 12
-#define FLAG_LEN 2
-#define TOKEN_LEN 20
-#define BOARD_ID_LEN 16
-#define RESERVED_LEN (TAG_LEN - TAG_VER_LEN - SIG_LEN - SIG_LEN_2 - CHIP_ID_LEN - BOARD_ID_LEN - \
- (4*IMAGE_LEN) - (3*ADDRESS_LEN) - (3*FLAG_LEN) - (2*TOKEN_LEN))
-
-
-// TAG for downloadable image (kernel plus file system)
-typedef struct _FILE_TAG
-{
- unsigned char tagVersion[TAG_VER_LEN]; // tag version. Will be 2 here.
- unsigned char signiture_1[SIG_LEN]; // text line for company info
- unsigned char signiture_2[SIG_LEN_2]; // additional info (can be version number)
- unsigned char chipId[CHIP_ID_LEN]; // chip id
- unsigned char boardId[BOARD_ID_LEN]; // board id
- unsigned char bigEndian[FLAG_LEN]; // if = 1 - big, = 0 - little endia of the host
- unsigned char totalImageLen[IMAGE_LEN]; // the sum of all the following length
- unsigned char cfeAddress[ADDRESS_LEN]; // if non zero, cfe starting address
- unsigned char cfeLen[IMAGE_LEN]; // if non zero, cfe size in clear ASCII text.
- unsigned char rootfsAddress[ADDRESS_LEN]; // if non zero, filesystem starting address
- unsigned char rootfsLen[IMAGE_LEN]; // if non zero, filesystem size in clear ASCII text.
- unsigned char kernelAddress[ADDRESS_LEN]; // if non zero, kernel starting address
- unsigned char kernelLen[IMAGE_LEN]; // if non zero, kernel size in clear ASCII text.
- unsigned char dualImage[FLAG_LEN]; // if 1, dual image
- unsigned char inactiveLen[FLAG_LEN]; // if 1, the image is INACTIVE; if 0, active
- unsigned char reserved[RESERVED_LEN]; // reserved for later use
- unsigned char imageValidationToken[TOKEN_LEN];// image validation token - can be crc, md5, sha; for
- // now will be 4 unsigned char crc
- unsigned char tagValidationToken[TOKEN_LEN]; // validation token for tag(from signiture_1 to end of // mageValidationToken)
-} FILE_TAG, *PFILE_TAG;
-
-#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
-#define CRC_LEN 4
-
-// only included if for bcmTag.exe program
-#ifdef BCMTAG_EXE_USE
-
-static unsigned long Crc32_table[256] = {
- 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
- 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
- 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
- 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
- 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
- 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
- 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
- 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
- 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
- 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
- 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
- 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
- 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
- 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
- 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
- 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
- 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
- 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
- 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
- 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
- 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
- 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
- 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
- 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
- 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
- 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
- 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
- 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
- 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
- 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
- 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
- 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
- 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
- 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
- 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
- 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
- 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
- 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
- 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
- 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
- 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
- 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
- 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
- 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
- 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
- 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
- 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
- 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
- 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
- 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
- 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
- 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
- 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
- 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
- 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
- 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
- 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
- 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
- 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
- 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
- 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
- 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
- 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
- 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
-};
-#endif // BCMTAG_USE
-
-
-#endif // _BCMTAG_H_
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2003 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __BCM_INTR_H
-#define __BCM_INTR_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if defined(CONFIG_BCM96338)
-#include <6338_intr.h>
-#endif
-#if defined(CONFIG_BCM96345)
-#include <6345_intr.h>
-#endif
-#if defined(CONFIG_BCM96348)
-#include <6348_intr.h>
-#endif
-
-/* defines */
-struct pt_regs;
-typedef int (*FN_HANDLER) (int, void *);
-
-/* prototypes */
-extern void enable_brcm_irq(unsigned int irq);
-extern void disable_brcm_irq(unsigned int irq);
-extern int request_external_irq(unsigned int irq,
- FN_HANDLER handler, unsigned long irqflags,
- const char * devname, void *dev_id);
-extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
- unsigned int interruptId);
-extern void dump_intr_regs(void);
-
-/* compatibility definitions */
-#define BcmHalInterruptEnable(irq) enable_brcm_irq( irq )
-#define BcmHalInterruptDisable(irq) disable_brcm_irq( irq )
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2004 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-#ifndef __BCM_MAP_PART_H
-#define __BCM_MAP_PART_H
-
-#if defined(CONFIG_BCM96338)
-#include <6338_map_part.h>
-#endif
-#if defined(CONFIG_BCM96345)
-#include <6345_map_part.h>
-#endif
-#if defined(CONFIG_BCM96348)
-#include <6348_map_part.h>
-#endif
-
-#endif
-
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2004 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-//
-// bcmpci.h - bcm96348 PCI, Cardbus, and PCMCIA definition
-//
-#ifndef BCMPCI_H
-#define BCMPCI_H
-
-/* Memory window in internal system bus address space */
-#define BCM_PCI_MEM_BASE 0x08000000
-/* IO window in internal system bus address space */
-#define BCM_PCI_IO_BASE 0x0C000000
-
-#define BCM_PCI_ADDR_MASK 0x1fffffff
-
-/* Memory window size (range) */
-#define BCM_PCI_MEM_SIZE_16MB 0x01000000
-/* IO window size (range) */
-#define BCM_PCI_IO_SIZE_64KB 0x00010000
-
-/* PCI Configuration and I/O space acesss */
-#define BCM_PCI_CFG(d, f, o) ( (d << 11) | (f << 8) | (o/4 << 2) )
-
-/* fake USB PCI slot */
-#define USB_HOST_SLOT 9
-#define USB_BAR0_MEM_SIZE 0x0800
-
-#define BCM_HOST_MEM_SPACE1 0x10000000
-#define BCM_HOST_MEM_SPACE2 0x00000000
-
-/*
- * EBI bus clock is 33MHz and share with PCI bus
- * each clock cycle is 30ns.
- */
-/* attribute memory access wait cnt for 4306 */
-#define PCMCIA_ATTR_CE_HOLD 3 // data hold time 70ns
-#define PCMCIA_ATTR_CE_SETUP 3 // data setup time 50ns
-#define PCMCIA_ATTR_INACTIVE 6 // time between read/write cycles 180ns. For the total cycle time 600ns (cnt1+cnt2+cnt3+cnt4)
-#define PCMCIA_ATTR_ACTIVE 10 // OE/WE pulse width 300ns
-
-/* common memory access wait cnt for 4306 */
-#define PCMCIA_MEM_CE_HOLD 1 // data hold time 30ns
-#define PCMCIA_MEM_CE_SETUP 1 // data setup time 30ns
-#define PCMCIA_MEM_INACTIVE 2 // time between read/write cycles 40ns. For the total cycle time 250ns (cnt1+cnt2+cnt3+cnt4)
-#define PCMCIA_MEM_ACTIVE 5 // OE/WE pulse width 150ns
-
-#define PCCARD_VCC_MASK 0x00070000 // Mask Reset also
-#define PCCARD_VCC_33V 0x00010000
-#define PCCARD_VCC_50V 0x00020000
-
-typedef enum {
- MPI_CARDTYPE_NONE, // No Card in slot
- MPI_CARDTYPE_PCMCIA, // 16-bit PCMCIA card in slot
- MPI_CARDTYPE_CARDBUS, // 32-bit CardBus card in slot
-} CardType;
-
-#define CARDBUS_SLOT 0 // Slot 0 is default for CardBus
-
-#define pcmciaAttrOffset 0x00200000
-#define pcmciaMemOffset 0x00000000
-// Needs to be right above PCI I/O space. Give 0x8000 (32K) to PCMCIA.
-#define pcmciaIoOffset (BCM_PCI_IO_BASE + 0x80000)
-// Base Address is that mapped into the MPI ChipSelect registers.
-// UBUS bridge MemoryWindow 0 outputs a 0x00 for the base.
-#define pcmciaBase 0xbf000000
-#define pcmciaAttr (pcmciaAttrOffset | pcmciaBase)
-#define pcmciaMem (pcmciaMemOffset | pcmciaBase)
-#define pcmciaIo (pcmciaIoOffset | pcmciaBase)
-
-#endif
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-
-//
-// bcmtypes.h - misc useful typedefs
-//
-#ifndef BCMTYPES_H
-#define BCMTYPES_H
-
-// These are also defined in typedefs.h in the application area, so I need to
-// protect against re-definition.
-
-#ifndef _TYPEDEFS_H_
-typedef unsigned char uint8;
-typedef unsigned short uint16;
-typedef unsigned long uint32;
-typedef signed char int8;
-typedef signed short int16;
-typedef signed long int32;
-#endif
-
-typedef unsigned char byte;
-// typedef unsigned long sem_t;
-
-typedef unsigned long HANDLE,*PULONG,DWORD,*PDWORD;
-typedef signed long LONG,*PLONG;
-
-typedef unsigned int *PUINT;
-typedef signed int INT;
-
-typedef unsigned short *PUSHORT;
-typedef signed short SHORT,*PSHORT;
-typedef unsigned short WORD,*PWORD;
-
-typedef unsigned char *PUCHAR;
-typedef signed char *PCHAR;
-
-typedef void *PVOID;
-
-typedef unsigned char BOOLEAN, *PBOOL, *PBOOLEAN;
-
-typedef unsigned char BYTE,*PBYTE;
-
-//#ifndef __GNUC__
-//The following has been defined in Vxworks internally: vxTypesOld.h
-//redefine under vxworks will cause error
-typedef signed int *PINT;
-
-typedef signed char INT8;
-typedef signed short INT16;
-typedef signed long INT32;
-
-typedef unsigned char UINT8;
-typedef unsigned short UINT16;
-typedef unsigned long UINT32;
-
-typedef unsigned char UCHAR;
-typedef unsigned short USHORT;
-typedef unsigned int UINT;
-typedef unsigned long ULONG;
-
-typedef void VOID;
-typedef unsigned char BOOL;
-
-//#endif /* __GNUC__ */
-
-
-// These are also defined in typedefs.h in the application area, so I need to
-// protect against re-definition.
-#ifndef TYPEDEFS_H
-
-// Maximum and minimum values for a signed 16 bit integer.
-#define MAX_INT16 32767
-#define MIN_INT16 -32768
-
-// Useful for true/false return values. This uses the
-// Taligent notation (k for constant).
-typedef enum
-{
- kFalse = 0,
- kTrue = 1
-} Bool;
-
-#endif
-
-/* macros to protect against unaligned accesses */
-
-#if 0
-/* first arg is an address, second is a value */
-#define PUT16( a, d ) { \
- *((byte *)a) = (byte)((d)>>8); \
- *(((byte *)a)+1) = (byte)(d); \
-}
-
-#define PUT32( a, d ) { \
- *((byte *)a) = (byte)((d)>>24); \
- *(((byte *)a)+1) = (byte)((d)>>16); \
- *(((byte *)a)+2) = (byte)((d)>>8); \
- *(((byte *)a)+3) = (byte)(d); \
-}
-
-/* first arg is an address, returns a value */
-#define GET16( a ) ( \
- (*((byte *)a) << 8) | \
- (*(((byte *)a)+1)) \
-)
-
-#define GET32( a ) ( \
- (*((byte *)a) << 24) | \
- (*(((byte *)a)+1) << 16) | \
- (*(((byte *)a)+2) << 8) | \
- (*(((byte *)a)+3)) \
-)
-#endif
-
-#ifndef YES
-#define YES 1
-#endif
-
-#ifndef NO
-#define NO 0
-#endif
-
-#ifndef IN
-#define IN
-#endif
-
-#ifndef OUT
-#define OUT
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#define READ32(addr) (*(volatile UINT32 *)((ULONG)&addr))
-#define READ16(addr) (*(volatile UINT16 *)((ULONG)&addr))
-#define READ8(addr) (*(volatile UINT8 *)((ULONG)&addr))
-
-#endif
+++ /dev/null
-/*
-<:copyright-gpl
- Copyright 2002 Broadcom Corp. All Rights Reserved.
-
- This program is free software; you can distribute it and/or modify it
- under the terms of the GNU General Public License (Version 2) as
- published by the Free Software Foundation.
-
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-:>
-*/
-/***********************************************************************/
-/* */
-/* MODULE: board.h */
-/* DATE: 97/02/18 */
-/* PURPOSE: Board specific information. This module should include */
-/* all base device addresses and board specific macros. */
-/* */
-/***********************************************************************/
-#ifndef _BOARD_H
-#define _BOARD_H
-
-/*****************************************************************************/
-/* Misc board definitions */
-/*****************************************************************************/
-
-#define DYING_GASP_API
-
-/*****************************************************************************/
-/* Physical Memory Map */
-/*****************************************************************************/
-
-#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
-#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
-
-/*****************************************************************************/
-/* Note that the addresses above are physical addresses and that programs */
-/* have to use converted addresses defined below: */
-/*****************************************************************************/
-#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
-#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
-#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
-
-/*****************************************************************************/
-/* Select the PLL value to get the desired CPU clock frequency. */
-/* */
-/* */
-/*****************************************************************************/
-#define FPERIPH 50000000
-
-#define ONEK 1024
-#define BLK64K (64*ONEK)
-#define FLASH45_BLKS_BOOT_ROM 1
-#define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
-#define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
-
-/*****************************************************************************/
-/* Note that the addresses above are physical addresses and that programs */
-/* have to use converted addresses defined below: */
-/*****************************************************************************/
-#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
-#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
-#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
-
-/*****************************************************************************/
-/* Select the PLL value to get the desired CPU clock frequency. */
-/* */
-/* */
-/*****************************************************************************/
-#define FPERIPH 50000000
-
-#define SDRAM_TYPE_ADDRESS_OFFSET 16
-#define NVRAM_DATA_OFFSET 0x0580
-#define NVRAM_DATA_ID 0x0f1e2d3c
-#define BOARD_SDRAM_TYPE *(unsigned long *) \
- (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
-
-#define ONEK 1024
-#define BLK64K (64*ONEK)
-
-// nvram and psi flash definitions for 45
-#define FLASH45_LENGTH_NVRAM ONEK // 1k nvram
-#define NVRAM_PSI_DEFAULT 24 // default psi in K byes
-
-/*****************************************************************************/
-/* NVRAM Offset and definition */
-/*****************************************************************************/
-
-#define NVRAM_VERSION_NUMBER 2
-#define NVRAM_VERSION_NUMBER_ADDRESS 0
-
-#define NVRAM_BOOTLINE_LEN 256
-#define NVRAM_BOARD_ID_STRING_LEN 16
-#define NVRAM_MAC_ADDRESS_LEN 6
-#define NVRAM_MAC_COUNT_MAX 32
-
-/*****************************************************************************/
-/* Misc Offsets */
-/*****************************************************************************/
-
-#define CFE_VERSION_OFFSET 0x0570
-#define CFE_VERSION_MARK_SIZE 5
-#define CFE_VERSION_SIZE 5
-
-typedef struct
-{
- unsigned long ulVersion;
- char szBootline[NVRAM_BOOTLINE_LEN];
- char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
- unsigned long ulReserved1[2];
- unsigned long ulNumMacAddrs;
- unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
- char chReserved[2];
- unsigned long ulCheckSum;
-} NVRAM_DATA, *PNVRAM_DATA;
-
-
-/*****************************************************************************/
-/* board ioctl calls for flash, led and some other utilities */
-/*****************************************************************************/
-
-
-/* Defines. for board driver */
-#define BOARD_IOCTL_MAGIC 'B'
-#define BOARD_DRV_MAJOR 206
-
-#define MAC_ADDRESS_ANY (unsigned long) -1
-
-#define BOARD_IOCTL_FLASH_INIT \
- _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_FLASH_WRITE \
- _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_FLASH_READ \
- _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_NR_PAGES \
- _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_DUMP_ADDR \
- _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_SET_MEMORY \
- _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_MIPS_SOFT_RESET \
- _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_LED_CTRL \
- _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_ID \
- _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_MAC_ADDRESS \
- _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
- _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_PSI_SIZE \
- _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_SDRAM_SIZE \
- _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_SET_MONITOR_FD \
- _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
- _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_BOOTLINE \
- _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_SET_BOOTLINE \
- _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
- _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_CHIP_ID \
- _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_NUM_ENET \
- _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_CFE_VER \
- _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_ENET_CFG \
- _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
- _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_SET_TRIGGER_EVENT \
- _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_GET_TRIGGER_EVENT \
- _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
- _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
-
-#define BOARD_IOCTL_SET_SES_LED \
- _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
-
-//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
-#define RESET_BUTTON_UP 1
-#define RESET_BUTTON_PRESSDOWN 0
-#define BOARD_IOCTL_GET_RESETHOLD \
- _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
-//>>JUNHON, 2004/09/15
-
-// for the action in BOARD_IOCTL_PARMS for flash operation
-typedef enum
-{
- PERSISTENT,
- NVRAM,
- BCM_IMAGE_CFE,
- BCM_IMAGE_FS,
- BCM_IMAGE_KERNEL,
- BCM_IMAGE_WHOLE,
- SCRATCH_PAD,
- FLASH_SIZE,
-} BOARD_IOCTL_ACTION;
-
-
-typedef struct boardIoctParms
-{
- char *string;
- char *buf;
- int strLen;
- int offset;
- BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
- int result;
-} BOARD_IOCTL_PARMS;
-
-
-// LED defines
-typedef enum
-{
- kLedAdsl,
- kLedWireless,
- kLedUsb,
- kLedHpna,
- kLedWanData,
- kLedPPP,
- kLedVoip,
- kLedSes,
- kLedLan,
- kLedSelfTest,
- kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
-} BOARD_LED_NAME;
-
-typedef enum
-{
- kLedStateOff, /* turn led off */
- kLedStateOn, /* turn led on */
- kLedStateFail, /* turn led on red */
- kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
- kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
- kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
-} BOARD_LED_STATE;
-
-
-// virtual and physical map pair defined in board.c
-typedef struct ledmappair
-{
- BOARD_LED_NAME ledName; // virtual led name
- BOARD_LED_STATE ledInitState; // initial led state when the board boots.
- unsigned short ledMask; // physical GPIO pin mask
- unsigned short ledActiveLow; // reset bit to turn on LED
- unsigned short ledMaskFail; // physical GPIO pin mask for state failure
- unsigned short ledActiveLowFail;// reset bit to turn on LED
-} LED_MAP_PAIR, *PLED_MAP_PAIR;
-
-typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
-
-/* Flash storage address information that is determined by the flash driver. */
-typedef struct flashaddrinfo
-{
- int flash_persistent_start_blk;
- int flash_persistent_number_blk;
- int flash_persistent_length;
- unsigned long flash_persistent_blk_offset;
- int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
- int flash_scratch_pad_number_blk;
- int flash_scratch_pad_length;
- unsigned long flash_scratch_pad_blk_offset;
- int flash_nvram_start_blk;
- int flash_nvram_number_blk;
- int flash_nvram_length;
- unsigned long flash_nvram_blk_offset;
-} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
-
-// scratch pad defines
-/* SP - Persisten Scratch Pad format:
- sp header : 32 bytes
- tokenId-1 : 8 bytes
- tokenId-1 len : 4 bytes
- tokenId-1 data
- ....
- tokenId-n : 8 bytes
- tokenId-n len : 4 bytes
- tokenId-n data
-*/
-
-#define MAGIC_NUM_LEN 8
-#define MAGIC_NUMBER "gOGoBrCm"
-#define TOKEN_NAME_LEN 16
-#define SP_VERSION 1
-#define SP_MAX_LEN 8 * 1024 // 8k buf before psi
-#define SP_RESERVERD 16
-
-typedef struct _SP_HEADER
-{
- char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
- int SPVersion; // version number
- int SPUsedLen; // used sp len
- char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
-} SP_HEADER, *PSP_HEADER;
-
-typedef struct _TOKEN_DEF
-{
- char tokenName[TOKEN_NAME_LEN];
- int tokenLen;
-} SP_TOKEN, *PSP_TOKEN;
-
-
-/*****************************************************************************/
-/* Function Prototypes */
-/*****************************************************************************/
-#if !defined(__ASM_ASM_H)
-void dumpaddr( unsigned char *pAddr, int nLen );
-
-int kerSysNvRamGet(char *string, int strLen, int offset);
-int kerSysNvRamSet(char *string, int strLen, int offset);
-int kerSysPersistentGet(char *string, int strLen, int offset);
-int kerSysPersistentSet(char *string, int strLen, int offset);
-int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
-int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
-int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
-int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
-int kerSysReleaseMacAddress( unsigned char *pucaAddr );
-int kerSysGetSdramSize( void );
-void kerSysGetBootline(char *string, int strLen);
-void kerSysSetBootline(char *string, int strLen);
-void kerSysMipsSoftReset(void);
-void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
-void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
-int kerSysFlashSizeGet(void);
-void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
-void kerSysDeregisterDyingGaspHandler(char *devname);
-void kerSysWakeupMonitorTask( void );
-#endif
-
-#define BOOT_CFE 0
-#define BOOT_REDBOOT 1
-
-extern int boot_loader_type;
-
-#endif /* _BOARD_H */
-
+++ /dev/null
-#define ADSL_SDRAM_IMAGE_SIZE (384*1024)
-
-#define BOOT_LOADER_UNKNOWN 0
-#define BOOT_LOADER_CFE 1
-#define BOOT_LOADER_REDBOOT 2
-#define BOOT_LOADER_CFE2 3
-#define BOOT_LOADER_LAST 3
+++ /dev/null
-#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_has_tlb 1
-#define cpu_has_4kex 4
-#define cpu_has_4ktlb 8
-#define cpu_has_fpu 0
-#define cpu_has_32fpr 0
-#define cpu_has_counter 0x40
-#define cpu_has_watch 0
-#define cpu_has_mips16 0
-#define cpu_has_divec 0x200
-#define cpu_has_vce 0
-#define cpu_has_cache_cdex_p 0
-#define cpu_has_cache_cdex_s 0
-#define cpu_has_prefetch 0x40000
-#define cpu_has_mcheck 0x2000
-#define cpu_has_ejtag 0x4000
-#define cpu_has_llsc 0x10000
-#define cpu_has_vtag_icache 0
-#define cpu_has_dc_aliases 0
-#define cpu_has_ic_fills_f_dc 0
-
-#define cpu_has_nofpuex 0
-#define cpu_has_64bits 0
-#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
-
-#define cpu_has_subset_pcaches 0
-
-#define cpu_dcache_line_size() 16
-#define cpu_icache_line_size() 16
-#define cpu_scache_line_size() 0
-
-#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
+++ /dev/null
-#ifndef _LINUX_ATMRT2684_H
-#define _LINUX_ATMRT2684_H
-
-#include <linux/atm.h>
-#include <linux/if.h> /* For IFNAMSIZ */
-
-#define RT2684_ENCAPS_NULL (0) /* VC-mux */
-#define RT2684_ENCAPS_LLC (1)
-#define RT2684_ENCAPS_AUTODETECT (2) /* Unsuported */
-
-/*
- * This is for the ATM_NEWBACKENDIF call - these are like socket families:
- * the first element of the structure is the backend number and the rest
- * is per-backend specific
- */
-struct atm_newif_rt2684 {
- atm_backend_t backend_num; /* ATM_BACKEND_RT2684 */
- char ifname[IFNAMSIZ];
-};
-
-/*
- * This structure is used to specify a rt2684 interface - either by a
- * positive integer (returned by ATM_NEWBACKENDIF) or the interfaces name
- */
-#define RT2684_FIND_BYNOTHING (0)
-#define RT2684_FIND_BYNUM (1)
-#define RT2684_FIND_BYIFNAME (2)
-struct rt2684_if_spec {
- int method; /* RT2684_FIND_* */
- union {
- char ifname[IFNAMSIZ];
- int devnum;
- } spec;
-};
-
-/*
- * This is for the ATM_SETBACKEND call - these are like socket families:
- * the first element of the structure is the backend number and the rest
- * is per-backend specific
- */
-struct atm_backend_rt2684 {
- atm_backend_t backend_num; /* ATM_BACKEND_RT2684 */
- struct rt2684_if_spec ifspec;
- unsigned char encaps; /* RT2684_ENCAPS_* */
-};
-
-
-#endif /* _LINUX_ATMRT2684_H */
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-LOADADDR = 0x8108c8f4 # RAM start + 16M
-KERNEL_ENTRY = 0x80100000 # Default kernel entry in arch/mips/Makefile
-RAMSIZE = 0x01000000 # 64MB
-
-LOADER_MAKEOPTS= \
- KDIR=$(KDIR) \
- LOADADDR=$(LOADADDR) \
- KERNEL_ENTRY=$(KERNEL_ENTRY) \
- RAMSIZE=$(RAMSIZE)
-
-define trxalign/jffs2-128k
--a 0x20000
-endef
-define trxalign/jffs2-64k
--a 0x10000
-endef
-define trxalign/squashfs
--a 1024
-endef
-
-define Build/Clean
- $(MAKE) -C lzma-loader clean
-endef
-
-define Image/Prepare
- cat $(KDIR)/vmlinux | $(STAGING_DIR)/bin/lzma e -si -so -eos -lc1 -lp2 -pb2 > $(KDIR)/vmlinux.lzma
- rm -f $(KDIR)/loader.gz
- $(MAKE) -C lzma-loader \
- BUILD_DIR="$(KDIR)" \
- TARGET="$(KDIR)" \
- clean install
- echo -ne "\\x00" >> $(KDIR)/loader.gz
-endef
-
-define Image/Build
- $(STAGING_DIR)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).trx -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1)) -f $(KDIR)/root.$(1)
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-
-PKG_NAME := lzma-loader
-PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME)
-
-$(PKG_BUILD_DIR)/.prepared:
- mkdir $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
- touch $@
-
-$(PKG_BUILD_DIR)/loader.gz: $(PKG_BUILD_DIR)/.prepared
- $(MAKE) -C $(PKG_BUILD_DIR) CC="$(TARGET_CC)" \
- LD="$(TARGET_CROSS)ld" CROSS_COMPILE="$(TARGET_CROSS)"
-
-download:
-prepare: $(PKG_BUILD_DIR)/.prepared
-compile: $(PKG_BUILD_DIR)/loader.gz
-install:
-
-ifneq ($(TARGET),)
-install: compile
- $(CP) $(PKG_BUILD_DIR)/loader.gz $(PKG_BUILD_DIR)/loader.elf $(TARGET)/
-endif
-
-clean:
- rm -rf $(PKG_BUILD_DIR)
+++ /dev/null
-/*
- LzmaDecode.c
- LZMA Decoder
-
- LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#include "LzmaDecode.h"
-
-#ifndef Byte
-#define Byte unsigned char
-#endif
-
-#define kNumTopBits 24
-#define kTopValue ((UInt32)1 << kNumTopBits)
-
-#define kNumBitModelTotalBits 11
-#define kBitModelTotal (1 << kNumBitModelTotalBits)
-#define kNumMoveBits 5
-
-typedef struct _CRangeDecoder
-{
- Byte *Buffer;
- Byte *BufferLim;
- UInt32 Range;
- UInt32 Code;
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *InCallback;
- int Result;
- #endif
- int ExtraBytes;
-} CRangeDecoder;
-
-Byte RangeDecoderReadByte(CRangeDecoder *rd)
-{
- if (rd->Buffer == rd->BufferLim)
- {
- #ifdef _LZMA_IN_CB
- UInt32 size;
- rd->Result = rd->InCallback->Read(rd->InCallback, &rd->Buffer, &size);
- rd->BufferLim = rd->Buffer + size;
- if (size == 0)
- #endif
- {
- rd->ExtraBytes = 1;
- return 0xFF;
- }
- }
- return (*rd->Buffer++);
-}
-
-/* #define ReadByte (*rd->Buffer++) */
-#define ReadByte (RangeDecoderReadByte(rd))
-
-void RangeDecoderInit(CRangeDecoder *rd,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- Byte *stream, UInt32 bufferSize
- #endif
- )
-{
- int i;
- #ifdef _LZMA_IN_CB
- rd->InCallback = inCallback;
- rd->Buffer = rd->BufferLim = 0;
- #else
- rd->Buffer = stream;
- rd->BufferLim = stream + bufferSize;
- #endif
- rd->ExtraBytes = 0;
- rd->Code = 0;
- rd->Range = (0xFFFFFFFF);
- for(i = 0; i < 5; i++)
- rd->Code = (rd->Code << 8) | ReadByte;
-}
-
-#define RC_INIT_VAR UInt32 range = rd->Range; UInt32 code = rd->Code;
-#define RC_FLUSH_VAR rd->Range = range; rd->Code = code;
-#define RC_NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | ReadByte; }
-
-UInt32 RangeDecoderDecodeDirectBits(CRangeDecoder *rd, int numTotalBits)
-{
- RC_INIT_VAR
- UInt32 result = 0;
- int i;
- for (i = numTotalBits; i > 0; i--)
- {
- /* UInt32 t; */
- range >>= 1;
-
- result <<= 1;
- if (code >= range)
- {
- code -= range;
- result |= 1;
- }
- /*
- t = (code - range) >> 31;
- t &= 1;
- code -= range & (t - 1);
- result = (result + result) | (1 - t);
- */
- RC_NORMALIZE
- }
- RC_FLUSH_VAR
- return result;
-}
-
-int RangeDecoderBitDecode(CProb *prob, CRangeDecoder *rd)
-{
- UInt32 bound = (rd->Range >> kNumBitModelTotalBits) * *prob;
- if (rd->Code < bound)
- {
- rd->Range = bound;
- *prob += (kBitModelTotal - *prob) >> kNumMoveBits;
- if (rd->Range < kTopValue)
- {
- rd->Code = (rd->Code << 8) | ReadByte;
- rd->Range <<= 8;
- }
- return 0;
- }
- else
- {
- rd->Range -= bound;
- rd->Code -= bound;
- *prob -= (*prob) >> kNumMoveBits;
- if (rd->Range < kTopValue)
- {
- rd->Code = (rd->Code << 8) | ReadByte;
- rd->Range <<= 8;
- }
- return 1;
- }
-}
-
-#define RC_GET_BIT2(prob, mi, A0, A1) \
- UInt32 bound = (range >> kNumBitModelTotalBits) * *prob; \
- if (code < bound) \
- { A0; range = bound; *prob += (kBitModelTotal - *prob) >> kNumMoveBits; mi <<= 1; } \
- else \
- { A1; range -= bound; code -= bound; *prob -= (*prob) >> kNumMoveBits; mi = (mi + mi) + 1; } \
- RC_NORMALIZE
-
-#define RC_GET_BIT(prob, mi) RC_GET_BIT2(prob, mi, ; , ;)
-
-int RangeDecoderBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-{
- int mi = 1;
- int i;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- for(i = numLevels; i > 0; i--)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + mi;
- RC_GET_BIT(prob, mi)
- #else
- mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd);
- #endif
- }
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return mi - (1 << numLevels);
-}
-
-int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-{
- int mi = 1;
- int i;
- int symbol = 0;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- for(i = 0; i < numLevels; i++)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + mi;
- RC_GET_BIT2(prob, mi, ; , symbol |= (1 << i))
- #else
- int bit = RangeDecoderBitDecode(probs + mi, rd);
- mi = mi + mi + bit;
- symbol |= (bit << i);
- #endif
- }
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)
-{
- int symbol = 1;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- do
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + symbol;
- RC_GET_BIT(prob, symbol)
- #else
- symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
- #endif
- }
- while (symbol < 0x100);
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-Byte LzmaLiteralDecodeMatch(CProb *probs, CRangeDecoder *rd, Byte matchByte)
-{
- int symbol = 1;
- #ifdef _LZMA_LOC_OPT
- RC_INIT_VAR
- #endif
- do
- {
- int bit;
- int matchBit = (matchByte >> 7) & 1;
- matchByte <<= 1;
- #ifdef _LZMA_LOC_OPT
- {
- CProb *prob = probs + ((1 + matchBit) << 8) + symbol;
- RC_GET_BIT2(prob, symbol, bit = 0, bit = 1)
- }
- #else
- bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd);
- symbol = (symbol << 1) | bit;
- #endif
- if (matchBit != bit)
- {
- while (symbol < 0x100)
- {
- #ifdef _LZMA_LOC_OPT
- CProb *prob = probs + symbol;
- RC_GET_BIT(prob, symbol)
- #else
- symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
- #endif
- }
- break;
- }
- }
- while (symbol < 0x100);
- #ifdef _LZMA_LOC_OPT
- RC_FLUSH_VAR
- #endif
- return symbol;
-}
-
-#define kNumPosBitsMax 4
-#define kNumPosStatesMax (1 << kNumPosBitsMax)
-
-#define kLenNumLowBits 3
-#define kLenNumLowSymbols (1 << kLenNumLowBits)
-#define kLenNumMidBits 3
-#define kLenNumMidSymbols (1 << kLenNumMidBits)
-#define kLenNumHighBits 8
-#define kLenNumHighSymbols (1 << kLenNumHighBits)
-
-#define LenChoice 0
-#define LenChoice2 (LenChoice + 1)
-#define LenLow (LenChoice2 + 1)
-#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-
-int LzmaLenDecode(CProb *p, CRangeDecoder *rd, int posState)
-{
- if(RangeDecoderBitDecode(p + LenChoice, rd) == 0)
- return RangeDecoderBitTreeDecode(p + LenLow +
- (posState << kLenNumLowBits), kLenNumLowBits, rd);
- if(RangeDecoderBitDecode(p + LenChoice2, rd) == 0)
- return kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid +
- (posState << kLenNumMidBits), kLenNumMidBits, rd);
- return kLenNumLowSymbols + kLenNumMidSymbols +
- RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd);
-}
-
-#define kNumStates 12
-
-#define kStartPosModelIndex 4
-#define kEndPosModelIndex 14
-#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-
-#define kNumPosSlotBits 6
-#define kNumLenToPosStates 4
-
-#define kNumAlignBits 4
-#define kAlignTableSize (1 << kNumAlignBits)
-
-#define kMatchMinLen 2
-
-#define IsMatch 0
-#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-#define IsRepG0 (IsRep + kNumStates)
-#define IsRepG1 (IsRepG0 + kNumStates)
-#define IsRepG2 (IsRepG1 + kNumStates)
-#define IsRep0Long (IsRepG2 + kNumStates)
-#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-#define LenCoder (Align + kAlignTableSize)
-#define RepLenCoder (LenCoder + kNumLenProbs)
-#define Literal (RepLenCoder + kNumLenProbs)
-
-#if Literal != LZMA_BASE_SIZE
-StopCompilingDueBUG
-#endif
-
-#ifdef _LZMA_OUT_READ
-
-typedef struct _LzmaVarState
-{
- CRangeDecoder RangeDecoder;
- Byte *Dictionary;
- UInt32 DictionarySize;
- UInt32 DictionaryPos;
- UInt32 GlobalPos;
- UInt32 Reps[4];
- int lc;
- int lp;
- int pb;
- int State;
- int PreviousIsMatch;
- int RemainLen;
-} LzmaVarState;
-
-int LzmaDecoderInit(
- unsigned char *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- unsigned char *dictionary, UInt32 dictionarySize,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- unsigned char *inStream, UInt32 inSize
- #endif
- )
-{
- LzmaVarState *vs = (LzmaVarState *)buffer;
- CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
- UInt32 i;
- if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState))
- return LZMA_RESULT_NOT_ENOUGH_MEM;
- vs->Dictionary = dictionary;
- vs->DictionarySize = dictionarySize;
- vs->DictionaryPos = 0;
- vs->GlobalPos = 0;
- vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
- vs->lc = lc;
- vs->lp = lp;
- vs->pb = pb;
- vs->State = 0;
- vs->PreviousIsMatch = 0;
- vs->RemainLen = 0;
- dictionary[dictionarySize - 1] = 0;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- RangeDecoderInit(&vs->RangeDecoder,
- #ifdef _LZMA_IN_CB
- inCallback
- #else
- inStream, inSize
- #endif
- );
- return LZMA_RESULT_OK;
-}
-
-int LzmaDecode(unsigned char *buffer,
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed)
-{
- LzmaVarState *vs = (LzmaVarState *)buffer;
- CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
- CRangeDecoder rd = vs->RangeDecoder;
- int state = vs->State;
- int previousIsMatch = vs->PreviousIsMatch;
- Byte previousByte;
- UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
- UInt32 nowPos = 0;
- UInt32 posStateMask = (1 << (vs->pb)) - 1;
- UInt32 literalPosMask = (1 << (vs->lp)) - 1;
- int lc = vs->lc;
- int len = vs->RemainLen;
- UInt32 globalPos = vs->GlobalPos;
-
- Byte *dictionary = vs->Dictionary;
- UInt32 dictionarySize = vs->DictionarySize;
- UInt32 dictionaryPos = vs->DictionaryPos;
-
- if (len == -1)
- {
- *outSizeProcessed = 0;
- return LZMA_RESULT_OK;
- }
-
- while(len > 0 && nowPos < outSize)
- {
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- len--;
- }
- if (dictionaryPos == 0)
- previousByte = dictionary[dictionarySize - 1];
- else
- previousByte = dictionary[dictionaryPos - 1];
-#else
-
-int LzmaDecode(
- Byte *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- unsigned char *inStream, UInt32 inSize,
- #endif
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed)
-{
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
- CProb *p = (CProb *)buffer;
- CRangeDecoder rd;
- UInt32 i;
- int state = 0;
- int previousIsMatch = 0;
- Byte previousByte = 0;
- UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
- UInt32 nowPos = 0;
- UInt32 posStateMask = (1 << pb) - 1;
- UInt32 literalPosMask = (1 << lp) - 1;
- int len = 0;
- if (bufferSize < numProbs * sizeof(CProb))
- return LZMA_RESULT_NOT_ENOUGH_MEM;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- RangeDecoderInit(&rd,
- #ifdef _LZMA_IN_CB
- inCallback
- #else
- inStream, inSize
- #endif
- );
-#endif
-
- *outSizeProcessed = 0;
- while(nowPos < outSize)
- {
- int posState = (int)(
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & posStateMask);
- #ifdef _LZMA_IN_CB
- if (rd.Result != LZMA_RESULT_OK)
- return rd.Result;
- #endif
- if (rd.ExtraBytes != 0)
- return LZMA_RESULT_DATA_ERROR;
- if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0)
- {
- CProb *probs = p + Literal + (LZMA_LIT_SIZE *
- (((
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-
- if (state < 4) state = 0;
- else if (state < 10) state -= 3;
- else state -= 6;
- if (previousIsMatch)
- {
- Byte matchByte;
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- matchByte = dictionary[pos];
- #else
- matchByte = outStream[nowPos - rep0];
- #endif
- previousByte = LzmaLiteralDecodeMatch(probs, &rd, matchByte);
- previousIsMatch = 0;
- }
- else
- previousByte = LzmaLiteralDecode(probs, &rd);
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #endif
- }
- else
- {
- previousIsMatch = 1;
- if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1)
- {
- if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0)
- {
- if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0)
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos;
- #endif
- if (
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- == 0)
- return LZMA_RESULT_DATA_ERROR;
- state = state < 7 ? 9 : 11;
- #ifdef _LZMA_OUT_READ
- pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- continue;
- }
- }
- else
- {
- UInt32 distance;
- if(RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0)
- distance = rep1;
- else
- {
- if(RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0)
- distance = rep2;
- else
- {
- distance = rep3;
- rep3 = rep2;
- }
- rep2 = rep1;
- }
- rep1 = rep0;
- rep0 = distance;
- }
- len = LzmaLenDecode(p + RepLenCoder, &rd, posState);
- state = state < 7 ? 8 : 11;
- }
- else
- {
- int posSlot;
- rep3 = rep2;
- rep2 = rep1;
- rep1 = rep0;
- state = state < 7 ? 7 : 10;
- len = LzmaLenDecode(p + LenCoder, &rd, posState);
- posSlot = RangeDecoderBitTreeDecode(p + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
- kNumPosSlotBits), kNumPosSlotBits, &rd);
- if (posSlot >= kStartPosModelIndex)
- {
- int numDirectBits = ((posSlot >> 1) - 1);
- rep0 = ((2 | ((UInt32)posSlot & 1)) << numDirectBits);
- if (posSlot < kEndPosModelIndex)
- {
- rep0 += RangeDecoderReverseBitTreeDecode(
- p + SpecPos + rep0 - posSlot - 1, numDirectBits, &rd);
- }
- else
- {
- rep0 += RangeDecoderDecodeDirectBits(&rd,
- numDirectBits - kNumAlignBits) << kNumAlignBits;
- rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd);
- }
- }
- else
- rep0 = posSlot;
- rep0++;
- }
- if (rep0 == (UInt32)(0))
- {
- /* it's for stream version */
- len = -1;
- break;
- }
- if (rep0 > nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- {
- return LZMA_RESULT_DATA_ERROR;
- }
- len += kMatchMinLen;
- do
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- len--;
- }
- while(len > 0 && nowPos < outSize);
- }
- }
-
- #ifdef _LZMA_OUT_READ
- vs->RangeDecoder = rd;
- vs->DictionaryPos = dictionaryPos;
- vs->GlobalPos = globalPos + nowPos;
- vs->Reps[0] = rep0;
- vs->Reps[1] = rep1;
- vs->Reps[2] = rep2;
- vs->Reps[3] = rep3;
- vs->State = state;
- vs->PreviousIsMatch = previousIsMatch;
- vs->RemainLen = len;
- #endif
-
- *outSizeProcessed = nowPos;
- return LZMA_RESULT_OK;
-}
+++ /dev/null
-/*
- LzmaDecode.h
- LZMA Decoder interface
-
- LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#ifndef __LZMADECODE_H
-#define __LZMADECODE_H
-
-/* #define _LZMA_IN_CB */
-/* Use callback for input data */
-
-/* #define _LZMA_OUT_READ */
-/* Use read function for output data */
-
-/* #define _LZMA_PROB32 */
-/* It can increase speed on some 32-bit CPUs,
- but memory usage will be doubled in that case */
-
-/* #define _LZMA_LOC_OPT */
-/* Enable local speed optimizations inside code */
-
-#ifndef UInt32
-#ifdef _LZMA_UINT32_IS_ULONG
-#define UInt32 unsigned long
-#else
-#define UInt32 unsigned int
-#endif
-#endif
-
-#ifdef _LZMA_PROB32
-#define CProb UInt32
-#else
-#define CProb unsigned short
-#endif
-
-#define LZMA_RESULT_OK 0
-#define LZMA_RESULT_DATA_ERROR 1
-#define LZMA_RESULT_NOT_ENOUGH_MEM 2
-
-#ifdef _LZMA_IN_CB
-typedef struct _ILzmaInCallback
-{
- int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize);
-} ILzmaInCallback;
-#endif
-
-#define LZMA_BASE_SIZE 1846
-#define LZMA_LIT_SIZE 768
-
-/*
-bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb)
-bufferSize += 100 in case of _LZMA_OUT_READ
-by default CProb is unsigned short,
-but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int)
-*/
-
-#ifdef _LZMA_OUT_READ
-int LzmaDecoderInit(
- unsigned char *buffer, UInt32 bufferSize,
- int lc, int lp, int pb,
- unsigned char *dictionary, UInt32 dictionarySize,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback
- #else
- unsigned char *inStream, UInt32 inSize
- #endif
-);
-#endif
-
-int LzmaDecode(
- unsigned char *buffer,
- #ifndef _LZMA_OUT_READ
- UInt32 bufferSize,
- int lc, int lp, int pb,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- unsigned char *inStream, UInt32 inSize,
- #endif
- #endif
- unsigned char *outStream, UInt32 outSize,
- UInt32 *outSizeProcessed);
-
-#endif
+++ /dev/null
-#
-# Makefile for Broadcom BCM947XX boards
-#
-# Copyright 2001-2003, Broadcom Corporation
-# All Rights Reserved.
-#
-# THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-# KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-# SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-# FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-#
-# Copyright 2004 Manuel Novoa III <mjn3@codepoet.org>
-# Modified to support bzip'd kernels.
-# Of course, it would be better to integrate bunzip capability into CFE.
-#
-# Copyright 2005 Oleg I. Vdovikin <oleg@cs.msu.su>
-# Cleaned up, modified for lzma support, removed from kernel
-#
-
-TEXT_START := 0x80001000
-BZ_TEXT_START := 0x80300000
-
-OBJCOPY := $(CROSS_COMPILE)objcopy -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
-
-CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
- -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \
- -ffunction-sections -pipe -mlong-calls -fno-common \
- -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
-CFLAGS += -DLOADADDR=$(TEXT_START) -D_LZMA_IN_CB
-
-ASFLAGS = $(CFLAGS) -D__ASSEMBLY__ -DBZ_TEXT_START=$(BZ_TEXT_START)
-
-SEDFLAGS := s/BZ_TEXT_START/$(BZ_TEXT_START)/;s/TEXT_START/$(TEXT_START)/
-
-OBJECTS := head.o data.o
-
-all: loader.gz loader.elf
-
-# Don't build dependencies, this may die if $(CC) isn't gcc
-dep:
-
-install:
-
-loader.gz: loader
- gzip -nc9 $< > $@
-
-loader.elf: loader.o
- cp $< $@
-
-loader: loader.o
- $(OBJCOPY) $< $@
-
-loader.o: loader.lds $(OBJECTS)
- $(LD) -static --gc-sections -no-warn-mismatch -T loader.lds -o $@ $(OBJECTS)
-
-loader.lds: loader.lds.in Makefile
- @sed "$(SEDFLAGS)" < $< > $@
-
-data.o: data.lds decompress.image
- $(LD) -no-warn-mismatch -T data.lds -r -o $@ -b binary decompress.image -b elf32-tradlittlemips
-
-data.lds:
- @echo "SECTIONS { .data : { code_start = .; *(.data) code_stop = .; }}" > $@
-
-decompress.image: decompress
- $(OBJCOPY) $< $@
-
-decompress: decompress.lds decompress.o LzmaDecode.o
- $(LD) -static --gc-sections -no-warn-mismatch -T decompress.lds -o $@ decompress.o LzmaDecode.o
-
-decompress.lds: decompress.lds.in Makefile
- @sed "$(SEDFLAGS)" < $< > $@
-
-mrproper: clean
-
-clean:
- rm -f loader.gz loader decompress *.lds *.o *.image
+++ /dev/null
-/*
- * LZMA compressed kernel decompressor for bcm947xx boards
- *
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-The code is intended to decompress kernel, being compressed using lzma utility
-build using 7zip LZMA SDK. This utility is located in the LZMA_Alone directory
-
-decompressor code expects that your .trx file consist of three partitions:
-
-1) decompressor itself (this is gziped code which pmon/cfe will extract and run
-on boot-up instead of real kernel)
-2) LZMA compressed kernel (both streamed and regular modes are supported now)
-3) Root filesystem
-
-Please be sure to apply the following patch for use this new trx layout (it will
-allow using both new and old trx files for root filesystem lookup code)
-
---- linuz/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:24:27.503322896 +0300
-+++ linux/arch/mips/brcm-boards/bcm947xx/setup.c 2005-01-23 19:29:05.237100944 +0300
-@@ -221,7 +221,9 @@
- /* Try looking at TRX header for rootfs offset */
- if (le32_to_cpu(trx->magic) == TRX_MAGIC) {
- bcm947xx_parts[1].offset = off;
-- if (le32_to_cpu(trx->offsets[1]) > off)
-+ if (le32_to_cpu(trx->offsets[2]) > off)
-+ off = le32_to_cpu(trx->offsets[2]);
-+ else if (le32_to_cpu(trx->offsets[1]) > off)
- off = le32_to_cpu(trx->offsets[1]);
- continue;
- }
-
-
-Revision history:
- 0.02 Initial release
- 0.03 Added Mineharu Takahara <mtakahar@yahoo.com> patch to pass actual
- output size to decoder (stream mode compressed input is not
- a requirement anymore)
- 0.04 Reordered functions using lds script
+++ /dev/null
-/*
- * LZMA compressed kernel decompressor for bcm947xx boards
- *
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *
- * Please note, this was code based on the bunzip2 decompressor code
- * by Manuel Novoa III (mjn3@codepoet.org), although the only thing left
- * is an idea and part of original vendor code
- *
- *
- * 12-Mar-2005 Mineharu Takahara <mtakahar@yahoo.com>
- * pass actual output size to decoder (stream mode
- * compressed input is not a requirement anymore)
- *
- * 24-Apr-2005 Oleg I. Vdovikin
- * reordered functions using lds script, removed forward decl
- *
- */
-
-#include "LzmaDecode.h"
-
-#define BCM4710_FLASH 0x1fc00000 /* Flash */
-
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-
-#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
-
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-
-#define cache_unroll(base,op) \
- __asm__ __volatile__( \
- ".set noreorder;\n" \
- ".set mips3;\n" \
- "cache %1, (%0);\n" \
- ".set mips0;\n" \
- ".set reorder\n" \
- : \
- : "r" (base), \
- "i" (op));
-
-static __inline__ void blast_icache(unsigned long size, unsigned long lsize)
-{
- unsigned long start = KSEG0;
- unsigned long end = (start + size);
-
- while(start < end) {
- cache_unroll(start,Index_Invalidate_I);
- start += lsize;
- }
-}
-
-static __inline__ void blast_dcache(unsigned long size, unsigned long lsize)
-{
- unsigned long start = KSEG0;
- unsigned long end = (start + size);
-
- while(start < end) {
- cache_unroll(start,Index_Writeback_Inv_D);
- start += lsize;
- }
-}
-
-#define TRX_MAGIC 0x30524448 /* "HDR0" */
-
-struct trx_header {
- unsigned int magic; /* "HDR0" */
- unsigned int len; /* Length of file including header */
- unsigned int crc32; /* 32-bit CRC from flag_version to end of file */
- unsigned int flag_version; /* 0:15 flags, 16:31 version */
- unsigned int offsets[3]; /* Offsets of partitions from start of header */
-};
-
-/* beyound the image end, size not known in advance */
-extern unsigned char workspace[];
-
-unsigned int offset;
-unsigned char *data;
-
-/* flash access should be aligned, so wrapper is used */
-/* read byte from the flash, all accesses are 32-bit aligned */
-static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
-{
- static unsigned int val;
-
- if (((unsigned int)offset % 4) == 0) {
- val = *(unsigned int *)data;
- data += 4;
- }
-
- *bufferSize = 1;
- *buffer = ((unsigned char *)&val) + (offset++ & 3);
-
- return LZMA_RESULT_OK;
-}
-
-static __inline__ unsigned char get_byte(void)
-{
- unsigned char *buffer;
- UInt32 fake;
-
- return read_byte(0, &buffer, &fake), *buffer;
-}
-
-/* should be the first function */
-void entry(unsigned long icache_size, unsigned long icache_lsize,
- unsigned long dcache_size, unsigned long dcache_lsize)
-{
- unsigned int i; /* temp value */
- unsigned int lc; /* literal context bits */
- unsigned int lp; /* literal pos state bits */
- unsigned int pb; /* pos state bits */
- unsigned int osize; /* uncompressed size */
-
- ILzmaInCallback callback;
- callback.Read = read_byte;
-
- /* look for trx header, 32-bit data access */
- for (data = ((unsigned char *) KSEG1ADDR(BCM4710_FLASH));
- ((struct trx_header *)data)->magic != TRX_MAGIC; data += 65536);
-
- /* compressed kernel is in the partition 0 or 1 */
- if (((struct trx_header *)data)->offsets[1] > 65536)
- data += ((struct trx_header *)data)->offsets[0];
- else
- data += ((struct trx_header *)data)->offsets[1];
-
- offset = 0;
-
- /* lzma args */
- i = get_byte();
- lc = i % 9, i = i / 9;
- lp = i % 5, pb = i / 5;
-
- /* skip rest of the LZMA coder property */
- for (i = 0; i < 4; i++)
- get_byte();
-
- /* read the lower half of uncompressed size in the header */
- osize = ((unsigned int)get_byte()) +
- ((unsigned int)get_byte() << 8) +
- ((unsigned int)get_byte() << 16) +
- ((unsigned int)get_byte() << 24);
-
- /* skip rest of the header (upper half of uncompressed size) */
- for (i = 0; i < 4; i++)
- get_byte();
-
- /* decompress kernel */
- if (LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
- (unsigned char*)LOADADDR, osize, &i) == LZMA_RESULT_OK)
- {
- blast_dcache(dcache_size, dcache_lsize);
- blast_icache(icache_size, icache_lsize);
-
- /* Jump to load address */
- ((void (*)(void)) LOADADDR)();
- }
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-ENTRY(entry)
-SECTIONS {
- . = BZ_TEXT_START;
- .text : {
- *(.text.entry)
- *(.text)
- *(.rodata)
- }
-
- .data : {
- *(.data)
- }
-
- .bss : {
- *(.bss)
- }
-
- workspace = .;
-}
+++ /dev/null
-/* Copyright 2005 Oleg I. Vdovikin (oleg@cs.msu.su) */
-/* cache manipulation adapted from Broadcom code */
-/* idea taken from original bunzip2 decompressor code */
-/* Copyright 2004 Manuel Novoa III (mjn3@codepoet.org) */
-/* Licensed under the linux kernel's version of the GPL.*/
-
-#include <asm/asm.h>
-#include <asm/regdef.h>
-
-#define KSEG0 0x80000000
-
-#define C0_CONFIG $16
-#define C0_TAGLO $28
-#define C0_TAGHI $29
-
-#define CONF1_DA_SHIFT 7 /* D$ associativity */
-#define CONF1_DA_MASK 0x00000380
-#define CONF1_DA_BASE 1
-#define CONF1_DL_SHIFT 10 /* D$ line size */
-#define CONF1_DL_MASK 0x00001c00
-#define CONF1_DL_BASE 2
-#define CONF1_DS_SHIFT 13 /* D$ sets/way */
-#define CONF1_DS_MASK 0x0000e000
-#define CONF1_DS_BASE 64
-#define CONF1_IA_SHIFT 16 /* I$ associativity */
-#define CONF1_IA_MASK 0x00070000
-#define CONF1_IA_BASE 1
-#define CONF1_IL_SHIFT 19 /* I$ line size */
-#define CONF1_IL_MASK 0x00380000
-#define CONF1_IL_BASE 2
-#define CONF1_IS_SHIFT 22 /* Instruction cache sets/way */
-#define CONF1_IS_MASK 0x01c00000
-#define CONF1_IS_BASE 64
-
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-
- .text
- LEAF(startup)
- .set noreorder
-
- /* Copy decompressor code to the right place */
- li t2, BZ_TEXT_START
- add a0, t2, 0
- la a1, code_start
- la a2, code_stop
-$L1:
- lw t0, 0(a1)
- sw t0, 0(a0)
- add a1, 4
- add a0, 4
- blt a1, a2, $L1
- nop
-
- /* At this point we need to invalidate dcache and */
- /* icache before jumping to new code */
-
-1: /* Get cache sizes */
- .set mips32
- mfc0 s0,C0_CONFIG,1
- .set mips0
-
- li s1,CONF1_DL_MASK
- and s1,s0
- beq s1,zero,nodc
- nop
-
- srl s1,CONF1_DL_SHIFT
- li t0,CONF1_DL_BASE
- sll s1,t0,s1 /* s1 has D$ cache line size */
-
- li s2,CONF1_DA_MASK
- and s2,s0
- srl s2,CONF1_DA_SHIFT
- addiu s2,CONF1_DA_BASE /* s2 now has D$ associativity */
-
- li t0,CONF1_DS_MASK
- and t0,s0
- srl t0,CONF1_DS_SHIFT
- li s3,CONF1_DS_BASE
- sll s3,s3,t0 /* s3 has D$ sets per way */
-
- multu s2,s3 /* sets/way * associativity */
- mflo t0 /* total cache lines */
-
- multu s1,t0 /* D$ linesize * lines */
- mflo s2 /* s2 is now D$ size in bytes */
-
- /* Initilize the D$: */
- mtc0 zero,C0_TAGLO
- mtc0 zero,C0_TAGHI
-
- li t0,KSEG0 /* Just an address for the first $ line */
- addu t1,t0,s2 /* + size of cache == end */
-
- .set mips3
-1: cache Index_Writeback_Inv_D,0(t0)
- .set mips0
- bne t0,t1,1b
- addu t0,s1
-
-nodc:
- /* Now we get to do it all again for the I$ */
-
- move s3,zero /* just in case there is no icache */
- move s4,zero
-
- li t0,CONF1_IL_MASK
- and t0,s0
- beq t0,zero,noic
- nop
-
- srl t0,CONF1_IL_SHIFT
- li s3,CONF1_IL_BASE
- sll s3,t0 /* s3 has I$ cache line size */
-
- li t0,CONF1_IA_MASK
- and t0,s0
- srl t0,CONF1_IA_SHIFT
- addiu s4,t0,CONF1_IA_BASE /* s4 now has I$ associativity */
-
- li t0,CONF1_IS_MASK
- and t0,s0
- srl t0,CONF1_IS_SHIFT
- li s5,CONF1_IS_BASE
- sll s5,t0 /* s5 has I$ sets per way */
-
- multu s4,s5 /* sets/way * associativity */
- mflo t0 /* s4 is now total cache lines */
-
- multu s3,t0 /* I$ linesize * lines */
- mflo s4 /* s4 is cache size in bytes */
-
- /* Initilize the I$: */
- mtc0 zero,C0_TAGLO
- mtc0 zero,C0_TAGHI
-
- li t0,KSEG0 /* Just an address for the first $ line */
- addu t1,t0,s4 /* + size of cache == end */
-
- .set mips3
-1: cache Index_Invalidate_I,0(t0)
- .set mips0
- bne t0,t1,1b
- addu t0,s3
-
-noic:
- move a0,s3 /* icache line size */
- move a1,s4 /* icache size */
- move a2,s1 /* dcache line size */
- jal t2
- move a3,s2 /* dcache size */
-
- .set reorder
- END(startup)
+++ /dev/null
-OUTPUT_ARCH(mips)
-ENTRY(startup)
-SECTIONS {
- . = TEXT_START;
- .text : {
- *(.text)
- *(.rodata)
- }
-
- .data : {
- *(.data)
- }
-
- .bss : {
- *(.bss)
- }
-}
+++ /dev/null
-diff -urN linux-2.6.19/arch/mips/Kconfig linux-2.6.19.new/arch/mips/Kconfig
---- linux-2.6.19/arch/mips/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/Kconfig 2006-12-16 18:46:31.000000000 +0100
-@@ -4,6 +4,10 @@
- # Horrible source of confusion. Die, die, die ...
- select EMBEDDED
-
-+config CFE
-+ bool
-+ # Common Firmware Environment
-+
- mainmenu "Linux/MIPS Kernel Configuration"
-
- menu "Machine selection"
-@@ -12,6 +12,18 @@
- prompt "System type"
- default SGI_IP22
-
-+config BCM963XX
-+ bool "Support for Broadcom BCM963xx SoC"
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select HW_HAS_PCI
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select CFE
-+ help
-+ This is a fmaily of boards based on the Broadcom MIPS32
-+
- config MIPS_MTX1
- bool "4G Systems MTX-1 board"
- select DMA_NONCOHERENT
-diff -urN linux-2.6.19/arch/mips/Makefile linux-2.6.19.new/arch/mips/Makefile
---- linux-2.6.19/arch/mips/Makefile 2006-12-16 17:36:29.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/Makefile 2006-12-16 18:46:31.000000000 +0100
-@@ -158,6 +158,19 @@
- #
-
- #
-+# Broadcom BCM963xx SoC
-+#
-+core-$(CONFIG_BCM963XX) += arch/mips/bcm963xx/
-+cflags-$(CONFIG_BCM963XX) += -Iinclude/asm-mips/mach-bcm963xx
-+load-$(CONFIG_BCM963XX) += 0xffffffff80010000
-+
-+
-+#
-+# Common Firmware Environment
-+#
-+core-$(CONFIG_CFE) += arch/mips/cfe/
-+
-+#
- # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
- #
- core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
-diff -urN linux-2.6.19/arch/mips/kernel/cpu-probe.c linux-2.6.19.new/arch/mips/kernel/cpu-probe.c
---- linux-2.6.19/arch/mips/kernel/cpu-probe.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/kernel/cpu-probe.c 2006-12-16 18:46:31.000000000 +0100
-@@ -602,6 +602,25 @@
- return;
- }
-
-+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
-+{
-+ decode_configs(c);
-+ switch (c->processor_id & 0xff00) {
-+ case PRID_IMP_BCM6338:
-+ c->cputype = CPU_BCM6338;
-+ break;
-+ case PRID_IMP_BCM6345:
-+ c->cputype = CPU_BCM6345;
-+ break;
-+ case PRID_IMP_BCM6348:
-+ c->cputype = CPU_BCM6348;
-+ break;
-+ default:
-+ c->cputype = CPU_UNKNOWN;
-+ break;
-+ }
-+}
-+
- static inline void cpu_probe_mips(struct cpuinfo_mips *c)
- {
- decode_configs(c);
-@@ -736,6 +755,9 @@
- case PRID_COMP_LEGACY:
- cpu_probe_legacy(c);
- break;
-+ case PRID_COMP_BROADCOM:
-+ cpu_probe_broadcom(c);
-+ break;
- case PRID_COMP_MIPS:
- cpu_probe_mips(c);
- break;
-diff -urN linux-2.6.19/arch/mips/kernel/proc.c linux-2.6.19.new/arch/mips/kernel/proc.c
---- linux-2.6.19/arch/mips/kernel/proc.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/kernel/proc.c 2006-12-16 18:46:31.000000000 +0100
-@@ -84,6 +84,9 @@
- [CPU_VR4181A] = "NEC VR4181A",
- [CPU_SR71000] = "Sandcraft SR71000",
- [CPU_PR4450] = "Philips PR4450",
-+ [CPU_BCM6338] = "BCM6338",
-+ [CPU_BCM6345] = "BCM6345",
-+ [CPU_BCM6348] = "BCM6348",
- };
-
-
-diff -urN linux-2.6.19/arch/mips/mm/c-r4k.c linux-2.6.19.new/arch/mips/mm/c-r4k.c
---- linux-2.6.19/arch/mips/mm/c-r4k.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/mm/c-r4k.c 2006-12-16 18:46:31.000000000 +0100
-@@ -852,6 +852,13 @@
- if (!(config & MIPS_CONF_M))
- panic("Don't know how to probe P-caches on this cpu.");
-
-+ if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348)
-+ {
-+ printk("bcm963xx: enabling icache and dcache...\n");
-+ /* Enable caches */
-+ write_c0_diag(read_c0_diag() | 0xC0000000);
-+ }
-+
- /*
- * So we seem to be a MIPS32 or MIPS64 CPU
- * So let's probe the I-cache ...
-diff -urN linux-2.6.19/arch/mips/mm/tlbex.c linux-2.6.19.new/arch/mips/mm/tlbex.c
---- linux-2.6.19/arch/mips/mm/tlbex.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/mm/tlbex.c 2006-12-16 18:46:31.000000000 +0100
-@@ -880,6 +880,9 @@
- case CPU_4KSC:
- case CPU_20KC:
- case CPU_25KF:
-+ case CPU_BCM6338:
-+ case CPU_BCM6345:
-+ case CPU_BCM6348:
- tlbw(p);
- break;
-
-diff -urN linux-2.6.19/arch/mips/pci/Makefile linux-2.6.19.new/arch/mips/pci/Makefile
---- linux-2.6.19/arch/mips/pci/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/mips/pci/Makefile 2006-12-16 18:48:18.000000000 +0100
-@@ -17,6 +17,7 @@
- obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
- obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
- obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
-+obj-$(CONFIG_BCM963XX) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
-
- #
- # These are still pretty much in the old state, watch, go blind.
-diff -urN linux-2.6.19/include/asm-mips/bootinfo.h linux-2.6.19.new/include/asm-mips/bootinfo.h
---- linux-2.6.19/include/asm-mips/bootinfo.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/include/asm-mips/bootinfo.h 2006-12-16 18:46:31.000000000 +0100
-@@ -212,6 +212,14 @@
- #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
- #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
-
-+/*
-+ * Valid machtype for group BRCM
-+ */
-+#define MACH_GROUP_BRCM 23 /* Broadcom boards */
-+#define MACH_BCM96338 0
-+#define MACH_BCM96345 1
-+#define MACH_BCM96348 2
-+
- #define CL_SIZE COMMAND_LINE_SIZE
-
- const char *get_system_type(void);
-diff -urN linux-2.6.19/include/asm-mips/cpu.h linux-2.6.19.new/include/asm-mips/cpu.h
---- linux-2.6.19/include/asm-mips/cpu.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/include/asm-mips/cpu.h 2006-12-16 18:46:31.000000000 +0100
-@@ -103,6 +103,13 @@
-
- #define PRID_IMP_SR71000 0x0400
-
-+/* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
-+ */
-+
-+#define PRID_IMP_BCM6338 0x9000
-+#define PRID_IMP_BCM6345 0x8000
-+#define PRID_IMP_BCM6348 0x9100
-+
- /*
- * Definitions for 7:0 on legacy processors
- */
-@@ -200,7 +207,10 @@
- #define CPU_SB1A 62
- #define CPU_74K 63
- #define CPU_R14000 64
--#define CPU_LAST 64
-+#define CPU_BCM6338 65
-+#define CPU_BCM6345 66
-+#define CPU_BCM6348 67
-+#define CPU_LAST 67
-
- /*
- * ISA Level encodings
-diff -urN linux-2.6.19/include/asm-mips/module.h linux-2.6.19.new/include/asm-mips/module.h
---- linux-2.6.19/include/asm-mips/module.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/include/asm-mips/module.h 2006-12-16 19:03:22.000000000 +0100
-@@ -112,6 +112,12 @@
- #define MODULE_PROC_FAMILY "RM9000 "
- #elif defined CONFIG_CPU_SB1
- #define MODULE_PROC_FAMILY "SB1 "
-+#elif defined CONFIG_CPU_BCM6338
-+#define MODULE_PROC_FAMILY "BCM6338 "
-+#elif defined CONFIG_CPU_BCM6345
-+#define MODULE_PROC_FAMILY "BCM6345 "
-+#elif defined CONFIG_CPU_BCM6348
-+#define MODULE_PROC_FAMILY "BCM6348 "
- #else
- #error MODULE_PROC_FAMILY undefined for your processor configuration
- #endif
+++ /dev/null
-diff -urN linux-2.6.21.1/drivers/serial/Makefile linux-2.6.21.1.new/drivers/serial/Makefile
---- linux-2.6.21.1/drivers/serial/Makefile 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1.new/drivers/serial/Makefile 2007-05-30 20:32:27.000000000 +0200
-@@ -60,3 +60,4 @@
- obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
- obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
- obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
-+obj-$(CONFIG_BCM963XX) += bcm63xx_cons.o
+++ /dev/null
-diff -urN linux-2.6.19/drivers/mtd/maps/Kconfig linux-2.6.19.new/drivers/mtd/maps/Kconfig
---- linux-2.6.19/drivers/mtd/maps/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/drivers/mtd/maps/Kconfig 2006-12-18 17:21:07.000000000 +0100
-@@ -224,6 +224,13 @@
- Flash memory access on 4G Systems MTX-1 Board. If you have one of
- these boards and would like to use the flash chips on it, say 'Y'.
-
-+config MTD_BCM963XX
-+ tristate "BCM963xx Flash device"
-+ depends on MIPS && BCM963XX
-+ help
-+ Flash memory access on BCM963xx boards. Currently only works with
-+ RedBoot and CFE.
-+
- config MTD_DILNETPC
- tristate "CFI Flash device mapped on DIL/Net PC"
- depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
-diff -urN linux-2.6.19/drivers/mtd/maps/Makefile linux-2.6.19.new/drivers/mtd/maps/Makefile
---- linux-2.6.19/drivers/mtd/maps/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/drivers/mtd/maps/Makefile 2006-12-18 17:21:07.000000000 +0100
-@@ -70,3 +70,4 @@
- obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
- obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
- obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
-+obj-$(CONFIG_MTD_BCM963XX) += bcm963xx-flash.o
-diff -urN linux-2.6.19/drivers/mtd/redboot.c linux-2.6.19.new/drivers/mtd/redboot.c
---- linux-2.6.19/drivers/mtd/redboot.c 2006-12-18 17:09:14.000000000 +0100
-+++ linux-2.6.19.new/drivers/mtd/redboot.c 2006-12-18 17:14:26.000000000 +0100
-@@ -39,7 +39,7 @@
- return 1;
- }
-
--static int parse_redboot_partitions(struct mtd_info *master,
-+int parse_redboot_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- unsigned long fis_origin)
- {
-@@ -132,6 +132,14 @@
- goto out;
- }
-
-+ if (!fis_origin) {
-+ for (i = 0; i < numslots; i++) {
-+ if (!strncmp(buf[i].name, "RedBoot", 8)) {
-+ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
-+ }
-+ }
-+ }
-+
- for (i = 0; i < numslots; i++) {
- struct fis_list *new_fl, **prev;
-
-@@ -154,9 +162,8 @@
- new_fl->img = &buf[i];
- if (fis_origin) {
- buf[i].flash_base -= fis_origin;
-- } else {
-- buf[i].flash_base &= master->size-1;
- }
-+ buf[i].flash_base &= (master->size << 1) - 1;
-
- /* I'm sure the JFFS2 code has done me permanent damage.
- * I now think the following is _normal_
+++ /dev/null
-diff -urN linux-2.6.19.1/include/linux/atm.h linux-2.6.19.1.new/include/linux/atm.h
---- linux-2.6.19.1/include/linux/atm.h 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/include/linux/atm.h 2007-01-07 18:38:50.000000000 +0100
-@@ -48,6 +48,9 @@
- #define ATM_AAL2 2 /* AAL2 (VBR) */
- #define ATM_AAL34 3 /* AAL3/4 (data) */
- #define ATM_AAL5 5 /* AAL5 (data) */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+#define ATM_BCM_AAL0 14 /* "raw" ATM cells */
-+#endif
-
- /*
- * socket option name coding functions
-diff -urN linux-2.6.19.1/include/linux/atmbr2684.h linux-2.6.19.1.new/include/linux/atmbr2684.h
---- linux-2.6.19.1/include/linux/atmbr2684.h 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/include/linux/atmbr2684.h 2007-01-07 18:24:01.000000000 +0100
-@@ -78,6 +78,10 @@
- __u8 vpn_id[7];
- int send_padding; /* unsupported */
- int min_size; /* we will pad smaller packets than this */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+#define FILTER_PPPOE 1
-+ int proto_filter; /* protocol filter flag, current only PPPoE */
-+#endif
- };
-
- /*
-diff -urN linux-2.6.19.1/include/linux/atmdev.h linux-2.6.19.1.new/include/linux/atmdev.h
---- linux-2.6.19.1/include/linux/atmdev.h 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/include/linux/atmdev.h 2007-01-07 18:37:34.000000000 +0100
-@@ -29,6 +29,10 @@
- #define ATM_DS3_PCR (8000*12)
- /* DS3: 12 cells in a 125 usec time slot */
-
-+#if defined(CONFIG_MIPS_BCM963XX)
-+#define atm_sk(__sk) ((struct atm_vcc *)(__sk)->sk_protinfo)
-+#define ATM_SD(s) (atm_sk((s)->sk))
-+#endif
-
- #define __AAL_STAT_ITEMS \
- __HANDLE_ITEM(tx); /* TX okay */ \
-@@ -111,6 +115,9 @@
- #define ATM_BACKEND_RAW 0
- #define ATM_BACKEND_PPP 1 /* PPPoATM - RFC2364 */
- #define ATM_BACKEND_BR2684 2 /* Bridged RFC1483/2684 */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+#define ATM_BACKEND_RT2684 3 /* Routed RFC1483/2684 */
-+#endif
-
- /* for ATM_GETTYPE */
- #define ATM_ITFTYP_LEN 8 /* maximum length of interface type name */
-@@ -274,6 +281,9 @@
-
-
- enum {
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ ATM_DF_CLOSE, /* close device when last VCC is closed */
-+#endif
- ATM_DF_REMOVED, /* device was removed from atm_devs list */
- };
-
-@@ -285,8 +295,10 @@
- #define ATM_ATMOPT_CLP 1 /* set CLP bit */
-
- struct atm_vcc {
-+#if !defined(CONFIG_MIPS_BCM963XX)
- /* struct sock has to be the first member of atm_vcc */
- struct sock sk;
-+#endif
- unsigned long flags; /* VCC flags (ATM_VF_*) */
- short vpi; /* VPI and VCI (types must be equal */
- /* with sockaddr) */
-@@ -303,6 +315,9 @@
- void *dev_data; /* per-device data */
- void *proto_data; /* per-protocol data */
- struct k_atm_aal_stats *stats; /* pointer to AAL stats group */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ struct sock *sk; /* socket backpointer */
-+#endif
- /* SVC part --- may move later ------------------------------------- */
- short itf; /* interface number */
- struct sockaddr_atmsvc local;
-@@ -332,7 +347,11 @@
-
- struct atm_dev_addr {
- struct sockaddr_atmsvc addr; /* ATM address */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ struct atm_dev_addr *next; /* next address */
-+#else
- struct list_head entry; /* next address */
-+#endif
- };
-
- enum atm_addr_type_t { ATM_ADDR_LOCAL, ATM_ADDR_LECS };
-@@ -346,8 +365,12 @@
- void *dev_data; /* per-device data */
- void *phy_data; /* private PHY date */
- unsigned long flags; /* device flags (ATM_DF_*) */
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ struct atm_dev_addr *local; /* local ATM addresses */
-+#else
- struct list_head local; /* local ATM addresses */
- struct list_head lecs; /* LECS ATM addresses learned via ILMI */
-+#endif
- unsigned char esi[ESI_LEN]; /* ESI ("MAC" addr) */
- struct atm_cirange ci_range; /* VPI/VCI range */
- struct k_atm_dev_stats stats; /* statistics */
-@@ -359,7 +382,9 @@
- struct proc_dir_entry *proc_entry; /* proc entry */
- char *proc_name; /* proc entry name */
- #endif
-+#if !defined(CONFIG_MIPS_BCM963XX)
- struct class_device class_dev; /* sysfs class device */
-+#endif
- struct list_head dev_list; /* linkage */
- };
-
-@@ -416,7 +441,13 @@
- int number,unsigned long *flags); /* number == -1: pick first available */
- struct atm_dev *atm_dev_lookup(int number);
- void atm_dev_deregister(struct atm_dev *dev);
-+#if defined(CONFIG_MIPS_BCM963XX)
-+void shutdown_atm_dev(struct atm_dev *dev);
-+#endif
- void vcc_insert_socket(struct sock *sk);
-+#if defined(CONFIG_MIPS_BCM963XX)
-+void vcc_remove_socket(struct sock *sk);
-+#endif
-
-
- /*
-@@ -432,20 +463,33 @@
-
- static inline void atm_force_charge(struct atm_vcc *vcc,int truesize)
- {
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ atomic_add(truesize, &vcc->sk->sk_rmem_alloc);
-+#else
- atomic_add(truesize, &sk_atm(vcc)->sk_rmem_alloc);
-+#endif
- }
-
-
- static inline void atm_return(struct atm_vcc *vcc,int truesize)
- {
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ atomic_sub(truesize, &vcc->sk->sk_rmem_alloc);
-+#else
- atomic_sub(truesize, &sk_atm(vcc)->sk_rmem_alloc);
-+#endif
- }
-
-
- static inline int atm_may_send(struct atm_vcc *vcc,unsigned int size)
- {
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ return (size + atomic_read(&vcc->sk->sk_wmem_alloc)) <
-+ vcc->sk->sk_sndbuf;
-+#else
- return (size + atomic_read(&sk_atm(vcc)->sk_wmem_alloc)) <
- sk_atm(vcc)->sk_sndbuf;
-+#endif
- }
-
-
-@@ -457,12 +501,20 @@
-
- static inline void atm_dev_put(struct atm_dev *dev)
- {
-+#if defined(CONFIG_MIPS_BCM963XX)
-+ atomic_dec(&dev->refcnt);
-+
-+ if ((atomic_read(&dev->refcnt) == 1) &&
-+ test_bit(ATM_DF_CLOSE,&dev->flags))
-+ shutdown_atm_dev(dev);
-+#else
- if (atomic_dec_and_test(&dev->refcnt)) {
- BUG_ON(!test_bit(ATM_DF_REMOVED, &dev->flags));
- if (dev->ops->dev_close)
- dev->ops->dev_close(dev);
- class_device_put(&dev->class_dev);
- }
-+#endif
- }
-
-
+++ /dev/null
-diff -urN linux-2.6.19.2/drivers/mtd/chips/jedec_probe.c linux-2.6.19.2.new/drivers/mtd/chips/jedec_probe.c
---- linux-2.6.19.2/drivers/mtd/chips/jedec_probe.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.new/drivers/mtd/chips/jedec_probe.c 2007-04-09 22:33:05.000000000 +0200
-@@ -158,6 +158,7 @@
- #define SST49LF030A 0x001C
- #define SST49LF040A 0x0051
- #define SST49LF080A 0x005B
-+#define SST39VF6402B 0x236C
-
- /* Toshiba */
- #define TC58FVT160 0x00C2
-@@ -1494,7 +1495,23 @@
- ERASEINFO(0x1000,256),
- ERASEINFO(0x1000,256)
- }
--
-+ }, {
-+ .mfr_id = MANUFACTURER_SST,
-+ .dev_id = SST39VF6402B,
-+ .name = "SST 39VF6402B",
-+ .uaddr = {
-+ [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */
-+ [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */
-+ },
-+ .DevSize = SIZE_8MiB,
-+ .CmdSet = P_ID_AMD_STD,
-+ .NumEraseRegions= 4,
-+ .regions = {
-+ ERASEINFO(0x2000,256),
-+ ERASEINFO(0x2000,256),
-+ ERASEINFO(0x2000,256),
-+ ERASEINFO(0x2000,256)
-+ }
- }, {
- .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */
- .dev_id = M29W800DT,
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Atheros
- NAME:=Atheros WiFi (default)
- PACKAGES:=kmod-madwifi
-endef
-
-define Profile/Atheros/Description
- Package set compatible with hardware using Atheros WiFi cards
-endef
-$(eval $(call Profile,Atheros))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Broadcom
- NAME:=Broadcom WiFi (default)
- PACKAGES:=kmod-net-bcm43xx
-endef
-
-define Profile/Broadcom/Description
- Package set compatible with hardware using Broadcom WiFi cards
-endef
-$(eval $(call Profile,Broadcom))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Ralink
- NAME:=Ralink WiFi
- PACKAGES:=kmod-rt61
-endef
-$(eval $(call Profile,Ralink))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=cris
-BOARD:=etrax
-BOARDNAME:=Foxboard (ETRAX 100LX)
-FEATURES:=squashfs jffs2
-LINUX_VERSION:=2.6.19.2
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-define Target/Description
- Build fimware images for the FOXBOARD made by acmesystems.it
-endef
-
-define Kernel/Prepare/Fox
- bzcat $(DL_DIR)/$(LINUX_SOURCE) | tar -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
- if [ -d ./files ]; then $(CP) ./files/* $(LINUX_DIR)/; fi
- if [ -d ./patches/generic_2.6 ]; then $(PATCH) $(LINUX_DIR) ./patches/generic_2.6; fi
- if [ -d ./patches/cris ]; then $(PATCH) $(LINUX_DIR) ./patches/cris; fi
- ln -sf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/include/asm-cris/arch-v10 $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/include/asm-cris/arch
- ln -sf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/arch/cris/arch-v10 $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/arch/cris/arch
-endef
-
-define Kernel/Prepare
- $(call Kernel/Prepare/Fox)
-endef
-
-DEFAULT_PACKAGES += foxboard-utils
-
-$(eval $(call RequireCommand,/usr/local/cris/gcc-cris, \
- Please install the binary cris toolchain. \
-))
-
-#include the profiles
--include profiles/*.mk
-
-KERNELNAME:="zImage"
-$(eval $(call BuildKernel))
+++ /dev/null
-define Package/base-files/install-target
- mkdir -p $(1)/root
-endef
-
-
+++ /dev/null
-# Copyright (C) 2006 OpenWrt.org
-
-config interface loopback
- option ifname lo
- option proto static
- option ipaddr 127.0.0.1
- option netmask 255.0.0.0
-
-config interface lan
- option ifname eth0
- option proto static
- option ipaddr 192.168.0.90
- option netmask 255.255.255.0
- #option dns 192.168.0.1
- #option gateway 192.168.0.1
+++ /dev/null
-src snapshots http://www.acmesystems.it/download/owrt/packages
-dest root /
-dest ram /tmp
+++ /dev/null
-root:$1$6upaSrHM$W/0IQ8kf7IYxCxEkJQ2D60:0:0:root:/root:/bin/ash
-nobody:*:65534:65534:nobody:/var:/bin/false
+++ /dev/null
-CONFIG_BASE_SMALL=0
-# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_CRIS=y
-# CONFIG_ETRAX100LX is not set
-CONFIG_ETRAX100LX_V2=y
-# CONFIG_ETRAXFS is not set
-# CONFIG_ETRAXFS_SIM is not set
-CONFIG_ETRAX_ARCH_V10=y
-# CONFIG_ETRAX_ARCH_V32 is not set
-CONFIG_ETRAX_AXISFLASHMAP=y
-# CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE is not set
-CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock1 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200"
-# CONFIG_ETRAX_CSP0_LEDS is not set
-# CONFIG_ETRAX_DEBUG_PORT0 is not set
-# CONFIG_ETRAX_DEBUG_PORT1 is not set
-# CONFIG_ETRAX_DEBUG_PORT2 is not set
-# CONFIG_ETRAX_DEBUG_PORT3 is not set
-CONFIG_ETRAX_DEBUG_PORT_NULL=y
-CONFIG_ETRAX_DEF_R_BUS_CONFIG=0x4
-# CONFIG_ETRAX_DEF_R_PORT_G_DIR is not set
-CONFIG_ETRAX_DEF_R_PORT_PA_DATA=0xf0
-CONFIG_ETRAX_DEF_R_PORT_PA_DIR=0x1c
-CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG=0x00
-CONFIG_ETRAX_DEF_R_PORT_PB_DATA=0x03
-CONFIG_ETRAX_DEF_R_PORT_PB_DIR=0xce
-CONFIG_ETRAX_DEF_R_SDRAM_CONFIG=0x09603737
-CONFIG_ETRAX_DEF_R_SDRAM_TIMING=0x80008002
-CONFIG_ETRAX_DEF_R_WAITSTATES=0x95f8
-CONFIG_ETRAX_DRAM_SIZE=32
-CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000
-CONFIG_ETRAX_DS1302=y
-CONFIG_ETRAX_DS1302_RSTBIT=2
-CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT=y
-CONFIG_ETRAX_DS1302_SCLBIT=1
-CONFIG_ETRAX_DS1302_SDABIT=0
-CONFIG_ETRAX_DS1302_TRICKLE_CHARGE=0
-CONFIG_ETRAX_ETHERNET=y
-CONFIG_ETRAX_FAST_TIMER=y
-CONFIG_ETRAX_FLASH1_SIZE=0
-CONFIG_ETRAX_FLASH_BUSWIDTH=2
-CONFIG_ETRAX_GPIO=y
-CONFIG_ETRAX_I2C=y
-CONFIG_ETRAX_I2C_CLK_PORT=1
-CONFIG_ETRAX_I2C_DATA_PORT=0
-# CONFIG_ETRAX_I2C_EEPROM is not set
-CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C=y
-# CONFIG_ETRAX_IDE is not set
-CONFIG_ETRAX_LED1G=2
-CONFIG_ETRAX_LED1R=2
-CONFIG_ETRAX_LED2G=3
-CONFIG_ETRAX_LED2R=3
-CONFIG_ETRAX_LED3G=2
-CONFIG_ETRAX_LED3R=2
-CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1
-CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
-# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
-# CONFIG_ETRAX_NO_LEDS is not set
-# CONFIG_ETRAX_NO_PHY is not set
-CONFIG_ETRAX_PA_CHANGEABLE_BITS=0xFF
-CONFIG_ETRAX_PA_CHANGEABLE_DIR=0xFF
-CONFIG_ETRAX_PA_LEDS=y
-CONFIG_ETRAX_PB_CHANGEABLE_BITS=0xFF
-CONFIG_ETRAX_PB_CHANGEABLE_DIR=0xFF
-# CONFIG_ETRAX_PB_LEDS is not set
-# CONFIG_ETRAX_PCF8563 is not set
-CONFIG_ETRAX_PTABLE_SECTOR=0
-CONFIG_ETRAX_RESCUE_SER0=y
-# CONFIG_ETRAX_RESCUE_SER1 is not set
-# CONFIG_ETRAX_RESCUE_SER2 is not set
-# CONFIG_ETRAX_RESCUE_SER3 is not set
-# CONFIG_ETRAX_RS485 is not set
-CONFIG_ETRAX_RTC=y
-CONFIG_ETRAX_SDRAM=y
-CONFIG_ETRAX_SER0_CD_ON_PA_BIT=-1
-CONFIG_ETRAX_SER0_CD_ON_PB_BIT=-1
-CONFIG_ETRAX_SER0_DSR_ON_PA_BIT=-1
-CONFIG_ETRAX_SER0_DSR_ON_PB_BIT=-1
-CONFIG_ETRAX_SER0_DTR_ON_PA_BIT=-1
-CONFIG_ETRAX_SER0_DTR_ON_PB_BIT=-1
-# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED is not set
-CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_NONE=y
-# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PA is not set
-# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PB is not set
-CONFIG_ETRAX_SER0_RI_ON_PA_BIT=-1
-CONFIG_ETRAX_SER0_RI_ON_PB_BIT=-1
-CONFIG_ETRAX_SER2_CD_ON_PA_BIT=7
-CONFIG_ETRAX_SER2_CD_ON_PB_BIT=-1
-CONFIG_ETRAX_SER2_DSR_ON_PA_BIT=6
-CONFIG_ETRAX_SER2_DSR_ON_PB_BIT=-1
-CONFIG_ETRAX_SER2_DTR_ON_PA_BIT=4
-CONFIG_ETRAX_SER2_DTR_ON_PB_BIT=-1
-# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED is not set
-# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_NONE is not set
-CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PA=y
-# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PB is not set
-CONFIG_ETRAX_SER2_RI_ON_PA_BIT=5
-CONFIG_ETRAX_SER2_RI_ON_PB_BIT=-1
-CONFIG_ETRAX_SER3_CD_ON_PA_BIT=-1
-CONFIG_ETRAX_SER3_CD_ON_PB_BIT=-1
-CONFIG_ETRAX_SER3_DSR_ON_PA_BIT=-1
-CONFIG_ETRAX_SER3_DSR_ON_PB_BIT=-1
-CONFIG_ETRAX_SER3_DTR_ON_PA_BIT=-1
-CONFIG_ETRAX_SER3_DTR_ON_PB_BIT=-1
-# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED is not set
-CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_NONE=y
-# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_PA is not set
-# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_PB is not set
-CONFIG_ETRAX_SER3_RI_ON_PA_BIT=-1
-CONFIG_ETRAX_SER3_RI_ON_PB_BIT=-1
-CONFIG_ETRAX_SERIAL=y
-# CONFIG_ETRAX_SERIAL_FAST_TIMER is not set
-# CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is not set
-CONFIG_ETRAX_SERIAL_PORT0=y
-# CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT is not set
-# CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN is not set
-CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_IN=y
-CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_OUT=y
-# CONFIG_ETRAX_SERIAL_PORT1 is not set
-CONFIG_ETRAX_SERIAL_PORT2=y
-CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT=y
-CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN=y
-# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_IN is not set
-# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_OUT is not set
-CONFIG_ETRAX_SERIAL_PORT3=y
-CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT=y
-CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN=y
-# CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_IN is not set
-# CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_OUT is not set
-CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS=5
-# CONFIG_ETRAX_SOFT_SHUTDOWN is not set
-# CONFIG_ETRAX_SYNCHRONOUS_SERIAL is not set
-CONFIG_ETRAX_SYSFS_NODES=y
-CONFIG_ETRAX_USB_HOST=y
-CONFIG_ETRAX_USB_HOST_PORT1=y
-CONFIG_ETRAX_USB_HOST_PORT2=y
-# CONFIG_ETRAX_WATCHDOG is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_IOMAP=y
-# CONFIG_GEN_RTC is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_IDE is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQ_PER_CPU=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_MSDOS_FS=y
-CONFIG_MTD=y
-CONFIG_MTDRAM_ABS_POS=0x0
-CONFIG_MTDRAM_ERASE_SIZE=128
-CONFIG_MTDRAM_TOTAL_SIZE=0
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_CONCAT=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-CONFIG_MTD_MTDRAM=y
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_OOM_REBOOT is not set
-# CONFIG_OVERRIDE_SCHED_STARVATION_LIMIT is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SCSI=y
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SMP is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SVINTO_SIM is not set
-# CONFIG_SYSTEM_PROFILER is not set
-CONFIG_UID16=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_UNWIND_INFO is not set
-CONFIG_USB=y
-# CONFIG_USBPCWATCHDOG is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_SERIAL_IR is not set
-CONFIG_USB_STORAGE=y
-CONFIG_VFAT_FS=y
-# CONFIG_VLAN_8021Q is not set
+++ /dev/null
-/*
- * Simple bitbanged-GPIO SPI driver for ETRAX FS et al.
- *
- * Copyright (c) 2007 Axis Communications AB
- *
- * Author: Hans-Peter Nilsson, inspired by earlier work by
- * Andre Spanberg but mostly by copying large parts of
- * spi_s3c24xx_gpio.c, hence also:
- * Copyright (c) 2006 Ben Dooks
- * Copyright (c) 2006 Simtec Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/types.h>
-#include <linux/device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_bitbang.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <asm/io.h>
-#include <asm/arch/board.h>
-
-/* Our main driver state. */
-
-struct crisv32_spi_hw_info {
- struct crisv32_iopin sclk;
- struct crisv32_iopin mosi;
- struct crisv32_iopin miso;
- struct crisv32_iopin cs;
-};
-
-/*
- * The driver state hides behind the spi_bitbang state. We're
- * responsible for allocating that, so we can get a little something
- * for ourselves.
- */
-
-struct crisv32_spi_gpio_devdata {
- struct spi_bitbang bitbang;
- struct crisv32_spi_hw_info pins;
-};
-
-/* Helper function getting the driver state from a spi_device. */
-
-static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
-{
- struct crisv32_spi_gpio_devdata *dd = spi_master_get_devdata(spi->master);
- return &dd->pins;
-}
-
-/* The SPI-bitbang functions: see spi_bitbang.h at EXPAND_BITBANG_TXRX. */
-
-static inline void setsck(struct spi_device *spi, int is_on)
-{
- crisv32_io_set(&spidev_to_hw(spi)->sclk, is_on != 0);
-}
-
-static inline void setmosi(struct spi_device *spi, int is_on)
-{
- crisv32_io_set(&spidev_to_hw(spi)->mosi, is_on != 0);
-}
-
-static inline u32 getmiso(struct spi_device *spi)
-{
- return crisv32_io_rd(&spidev_to_hw(spi)->miso) != 0 ? 1 : 0;
-}
-
-#define spidelay(x) ndelay(x)
-
-#define EXPAND_BITBANG_TXRX
-#include <linux/spi/spi_bitbang.h>
-
-/*
- * SPI-bitbang word transmit-functions for the four SPI modes,
- * dispatching to the inlined functions we just included.
- */
-
-static u32 crisv32_spi_gpio_txrx_mode0(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
-}
-
-static u32 crisv32_spi_gpio_txrx_mode1(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
-}
-
-static u32 crisv32_spi_gpio_txrx_mode2(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
-}
-
-static u32 crisv32_spi_gpio_txrx_mode3(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
-}
-
-/* SPI-bitbang chip-select function. */
-
-static void crisv32_spi_gpio_chipselect(struct spi_device *spi, int value)
-{
- if (spi->mode & SPI_CS_HIGH)
- crisv32_io_set(&spidev_to_hw(spi)->cs,
- value == BITBANG_CS_ACTIVE ? 1 : 0);
- else
- crisv32_io_set(&spidev_to_hw(spi)->cs,
- value == BITBANG_CS_ACTIVE ? 0 : 1);
-}
-
-/* Platform-device probe function. */
-
-static int __devinit crisv32_spi_gpio_probe(struct platform_device *dev)
-{
- struct spi_master *master;
- struct crisv32_spi_gpio_devdata *dd;
- struct resource *res;
- struct crisv32_spi_gpio_controller_data *gc;
- int ret = 0;
-
- /*
- * We need to get the controller data as a hardware resource,
- * or else it wouldn't be available until *after* the
- * spi_bitbang_start call!
- */
- res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
- if (res == NULL) {
- dev_err(&dev->dev, "can't get controller_data resource\n");
- return -EIO;
- }
-
- gc = (struct crisv32_spi_gpio_controller_data *) res->start;
-
- master = spi_alloc_master(&dev->dev, sizeof *dd);
- if (master == NULL) {
- dev_err(&dev->dev, "failed to allocate spi master\n");
- ret = -ENOMEM;
- goto err;
- }
-
- dd = spi_master_get_devdata(master);
- platform_set_drvdata(dev, dd);
-
- /*
- * The device data asks for this driver, and holds the id
- * number, which must be unique among the same-type devices.
- * We use this as the number of this SPI bus.
- */
- master->bus_num = dev->id;
-
- /*
- * Allocate pins. Note that thus being allocated as GPIO, we
- * don't have to deconfigure them at the end or if something
- * fails.
- */
- if ((ret = crisv32_io_get_name(&dd->pins.cs, gc->cs)) != 0
- || (ret = crisv32_io_get_name(&dd->pins.miso, gc->miso)) != 0
- || (ret = crisv32_io_get_name(&dd->pins.mosi, gc->mosi)) != 0
- || (ret = crisv32_io_get_name(&dd->pins.sclk, gc->sclk)) != 0)
- goto err_no_pins;
-
- /* Set directions of the SPI pins. */
- crisv32_io_set_dir(&dd->pins.cs, crisv32_io_dir_out);
- crisv32_io_set_dir(&dd->pins.sclk, crisv32_io_dir_out);
- crisv32_io_set_dir(&dd->pins.miso, crisv32_io_dir_in);
- crisv32_io_set_dir(&dd->pins.mosi, crisv32_io_dir_out);
-
- /* Set state of the SPI pins. */
- dev_dbg(&dev->dev, "cs.port 0x%x, pin: %d\n"
- dd->pins.cs.port, dd->pins.cs.bit);
-
- /*
- * Can't use crisv32_spi_gpio_chipselect(spi, 1) here; we
- * don't have a proper "spi" until after spi_bitbang_start.
- */
- crisv32_io_set(&dd->pins.cs, 1);
- crisv32_io_set(&dd->pins.sclk, 0);
- crisv32_io_set(&dd->pins.mosi, 0);
-
- /* Setup SPI bitbang adapter hooks. */
- dd->bitbang.master = spi_master_get(master);
- dd->bitbang.chipselect = crisv32_spi_gpio_chipselect;
-
- dd->bitbang.txrx_word[SPI_MODE_0] = crisv32_spi_gpio_txrx_mode0;
- dd->bitbang.txrx_word[SPI_MODE_1] = crisv32_spi_gpio_txrx_mode1;
- dd->bitbang.txrx_word[SPI_MODE_2] = crisv32_spi_gpio_txrx_mode2;
- dd->bitbang.txrx_word[SPI_MODE_3] = crisv32_spi_gpio_txrx_mode3;
-
- ret = spi_bitbang_start(&dd->bitbang);
- if (ret)
- goto err_no_bitbang;
-
- printk (KERN_INFO "CRIS v32 SPI driver for GPIO"
- " (cs: %s, miso: %s, mosi: %s, sclk: %s)\n",
- gc->cs, gc->miso, gc->mosi, gc->sclk);
-
- return 0;
-
- err_no_bitbang:
- spi_master_put(dd->bitbang.master);
- err_no_pins:
- platform_set_drvdata(dev, NULL);
- err:
- return ret;
-}
-
-/* Platform-device remove-function. */
-
-static int __devexit crisv32_spi_gpio_remove(struct platform_device *dev)
-{
- struct crisv32_spi_gpio_devdata *dd = platform_get_drvdata(dev);
- int ret;
-
- ret = spi_bitbang_stop(&dd->bitbang);
- if (ret != 0)
- return ret;
-
- spi_master_put(dd->bitbang.master);
- platform_set_drvdata(dev, NULL);
- return 0;
-}
-
-/*
- * For the time being, there's no suspend/resume support to care
- * about, so we let those handlers default to NULL.
- */
-static struct platform_driver crisv32_spi_gpio_drv = {
- .probe = crisv32_spi_gpio_probe,
- .remove = __devexit_p(crisv32_spi_gpio_remove),
- .driver = {
- .name = "spi_crisv32_gpio",
- .owner = THIS_MODULE,
- },
-};
-
-/* Module init function. */
-
-static int __devinit crisv32_spi_gpio_init(void)
-{
- return platform_driver_register(&crisv32_spi_gpio_drv);
-}
-
-/* Module exit function. */
-
-static void __devexit crisv32_spi_gpio_exit(void)
-{
- platform_driver_unregister(&crisv32_spi_gpio_drv);
-}
-
-module_init(crisv32_spi_gpio_init);
-module_exit(crisv32_spi_gpio_exit);
-
-MODULE_DESCRIPTION("CRIS v32 SPI-GPIO Driver");
-MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * SPI port driver for ETRAX FS et al. using a synchronous serial
- * port, but simplified by using the spi_bitbang framework.
- *
- * Copyright (c) 2007 Axis Communications AB
- *
- * Author: Hans-Peter Nilsson, though copying parts of
- * spi_s3c24xx_gpio.c, hence also:
- * Copyright (c) 2006 Ben Dooks
- * Copyright (c) 2006 Simtec Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This driver restricts frequency, polarity, "word" length and endian
- * much more than the hardware does. I'm happy to unrestrict it, but
- * only with what I can test myself (at time of writing, just SD/MMC
- * SPI) and what people actually test and report.
- */
-
-#include <linux/types.h>
-#include <linux/device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_bitbang.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-#include <asm/arch/board.h>
-#include <asm/arch/hwregs/reg_map.h>
-#include <asm/arch/hwregs/reg_rdwr.h>
-#include <asm/arch/hwregs/sser_defs.h>
-#include <asm/arch/dma.h>
-#include <asm/arch/hwregs/dma.h>
-
-/* A size "not much larger" than the max typical transfer size. */
-#define DMA_CHUNKSIZ 512
-
-/*
- * For a transfer expected to take this long, we busy-wait instead of enabling
- * interrupts.
- */
-#define IRQ_USAGE_THRESHOLD_NS 14000
-
-/* A few register access macros to avoid verbiage and reduce typos. */
-#define REG_RD_DI(reg) REG_RD(dma, regi_dmain, reg)
-#define REG_RD_DO(reg) REG_RD(dma, regi_dmaout, reg)
-#define REG_RD_SSER(reg) REG_RD(sser, regi_sser, reg)
-#define REG_WR_DI(reg, val) REG_WR(dma, regi_dmain, reg, val)
-#define REG_WR_DO(reg, val) REG_WR(dma, regi_dmaout, reg, val)
-#define REG_WR_SSER(reg, val) REG_WR(sser, regi_sser, reg, val)
-#define REG_WRINT_DI(reg, val) REG_WR_INT(dma, regi_dmain, reg, val)
-#define REG_WRINT_DO(reg, val) REG_WR_INT(dma, regi_dmaout, reg, val)
-#define REG_WRINT_SSER(reg, val) REG_WR_INT(sser, regi_sser, reg, val)
-#define REG_RDINT_DI(reg) REG_RD_INT(dma, regi_dmain, reg)
-#define REG_RDINT_DO(reg) REG_RD_INT(dma, regi_dmaout, reg)
-#define REG_RDINT_SSER(reg) REG_RD_INT(sser, regi_sser, reg)
-
-#define DMA_WAIT_UNTIL_RESET(inst) \
- do { \
- reg_dma_rw_stat r; \
- do { \
- r = REG_RD(dma, (inst), rw_stat); \
- } while (r.mode != regk_dma_rst); \
- } while (0)
-
-#define DMA_BUSY(inst) (REG_RD(dma, inst, rw_stream_cmd)).busy
-
-/* Our main driver state. */
-struct crisv32_spi_hw_info {
- struct crisv32_regi_n_int sser;
- struct crisv32_regi_n_int dmain;
- struct crisv32_regi_n_int dmaout;
-
- reg_sser_rw_cfg cfg;
- reg_sser_rw_frm_cfg frm_cfg;
- reg_sser_rw_tr_cfg tr_cfg;
- reg_sser_rw_rec_cfg rec_cfg;
- reg_sser_rw_extra extra;
-
- /* We store the speed in kHz, so we can have expressions
- * multiplying 100MHz by * 4 before dividing by it, and still
- * keep it in an u32. */
- u32 effective_speed_kHz;
-
- /*
- * The time in 10s of nanoseconds for half a cycles.
- * For convenience and performance; derived from the above.
- */
- u32 half_cycle_delay_ns;
-
- /* This should be overridable by a module parameter. */
- u32 max_speed_Hz;
-
- /* Pre-computed timout for the max transfer chunk-size. */
- u32 dma_timeout;
-
- struct completion dma_done;
-
- /*
- * If we get a timeout from wait_for_completion_timeout on the
- * above, first look at this before panicking.
- */
- u32 dma_actually_done;
-
- /*
- * Resources don't seem available at the remove call, so we
- * have to save information we get through them.
- */
- struct crisv32_spi_sser_controller_data *gc;
-};
-
-/*
- * The driver state hides behind the spi_bitbang state; we're
- * responsible for allocating that, so we can get a little something
- * for ourselves.
- */
-struct crisv32_spi_sser_devdata {
- struct spi_bitbang bitbang;
- struct crisv32_spi_hw_info hw;
-};
-
-/* Our DMA descriptors that need alignment. */
-struct crisv32_spi_dma_descrs {
- dma_descr_context in_ctxt __attribute__ ((__aligned__(32)));
- dma_descr_context out_ctxt __attribute__ ((__aligned__(32)));
-
- /*
- * The code takes advantage of the fact that in_descr and
- * out_descr are on the same cache-line when working around
- * the cache-bug in TR 106.
- */
- dma_descr_data in_descr __attribute__ ((__aligned__(16)));
- dma_descr_data out_descr __attribute__ ((__aligned__(16)));
-};
-
-/*
- * Whatever needs DMA access is here, besides whatever DMA-able memory
- * comes in transfers.
- */
-struct crisv32_spi_dma_cs {
- struct crisv32_spi_dma_descrs *descrp;
-
- /* Scratch-buffers when the original was non-DMA. */
- u8 rx_buf[DMA_CHUNKSIZ];
- u8 tx_buf[DMA_CHUNKSIZ];
-};
-
-/*
- * Max speed. If set, we won't go faster, promise. May be useful
- * when dealing with weak hardware; misrouted signal paths or various
- * debug-situations.
- */
-static ulong crisv32_spi_speed_limit_Hz = 0;
-
-/* Helper function getting the driver state from a spi_device. */
-
-static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
-{
- struct crisv32_spi_sser_devdata *dd = spi_master_get_devdata(spi->master);
- return &dd->hw;
-}
-
-/* SPI-bitbang word transmit-function for non-DMA. */
-
-static u32 crisv32_spi_sser_txrx_mode3(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- u32 regi_sser = hw->sser.regi;
- reg_sser_rw_ack_intr ack_intr = { .trdy = 1, .rdav = 1 };
- reg_sser_r_intr intr = {0};
- reg_sser_rw_tr_data w_data = { .data = (u8) word };
- reg_sser_r_rec_data r_data;
- u32 i;
-
- /*
- * The timeout reflects one iteration per 10ns (impossible at
- * 200MHz clock even without the ndelay) and a wait for a full
- * byte.
- */
- u32 timeout = 1000000/10*8/hw->effective_speed_kHz;
-
- BUG_ON(bits != 8);
-
- intr = REG_RD_SSER(r_intr);
-
- /*
- * We should never get xruns when we control the transmitter
- * and receiver in register mode. And if we don't have
- * transmitter-ready and data-ready on entry, something's
- * seriously fishy.
- */
- if (!intr.trdy || !intr.rdav || intr.orun || intr.urun)
- panic("sser hardware or SPI driver broken (1) 0x%x\n",
- REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
-
- REG_WR_SSER(rw_ack_intr, ack_intr);
- REG_WR_SSER(rw_tr_data, w_data);
-
- for (i = 0; i < timeout; i++) {
- intr = REG_RD_SSER(r_intr);
- /* Wait for received data. */
- if (intr.rdav)
- break;
- ndelay(10);
- }
-
- if (!(intr.trdy && intr.rdav) || intr.orun || intr.urun)
- panic("sser hardware or SPI driver broken (2) 0x%x\n",
- REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
-
- r_data = REG_RD_SSER(r_rec_data);
- return r_data.data & 0xff;
-}
-
-/*
- * Wait for 1/2 bit-time if the transmitter or receiver is enabled.
- * We need to do this as the data-available indications may arrive
- * right at the edge, with half the last cycle remaining.
- */
-static void inline crisv32_spi_sser_wait_halfabit(struct crisv32_spi_hw_info
- *hw)
-{
- if (hw->cfg.en)
- ndelay(hw->half_cycle_delay_ns);
-}
-
-/*
- * Assert or de-assert chip-select.
- * We have two functions, with the active one assigned to the bitbang
- * slot at setup, to avoid a performance penalty (1% on reads).
- */
-static void crisv32_spi_sser_chip_select_active_high(struct spi_device *spi,
- int value)
-{
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- u32 regi_sser = hw->sser.regi;
-
- /*
- * We may have received data at the "last producing clock
- * edge". Thus we delay for another half a clock cycle.
- */
- crisv32_spi_sser_wait_halfabit(hw);
-
- hw->frm_cfg.frame_pin_use
- = value == BITBANG_CS_ACTIVE ? regk_sser_gio1 : regk_sser_gio0;
- REG_WR_SSER(rw_frm_cfg, hw->frm_cfg);
-}
-
-static void crisv32_spi_sser_chip_select_active_low(struct spi_device *spi,
- int value)
-{
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- u32 regi_sser = hw->sser.regi;
-
- crisv32_spi_sser_wait_halfabit(hw);
- hw->frm_cfg.frame_pin_use
- = value == BITBANG_CS_ACTIVE ? regk_sser_gio0 : regk_sser_gio1;
- REG_WR_SSER(rw_frm_cfg, hw->frm_cfg);
-}
-
-/* Set the transmission speed in Hz. */
-
-static int crisv32_spi_sser_set_speed_Hz(struct crisv32_spi_hw_info *hw,
- u32 Hz)
-{
- u32 kHz;
- u32 ns_delay;
- u32 regi_sser = hw->sser.regi;
-
- if (Hz > hw->max_speed_Hz)
- /*
- * Should we complain? Return error? Current caller
- * sequences want just the max speed.
- */
- Hz = hw->max_speed_Hz;
-
- kHz = Hz/1000;
-
- /*
- * If absolutely needed, we *could* change the base frequency
- * and go lower. Usually, a frequency set higher than wanted
- * is a problem but lower isn't.
- */
- if (Hz < 100000000 / 65536 + 1) {
- printk(KERN_ERR "attempt to set invalid sser speed: %u Hz\n",
- Hz);
- Hz = 100000000 / 65536 + 1;
- }
-
- pr_debug("setting sser speed to %u Hz\n", Hz);
-
- /*
- * Avoid going above the requested speed if there's a
- * remainder for the 100 MHz clock-divider calculation, but
- * don't unnecessarily go below if it's even.
- */
- hw->cfg.clk_div = 100000000/Hz - ((100000000 % Hz) == 0);
-
- /* Make sure there's no ongoing transmission. */
- crisv32_spi_sser_wait_halfabit(hw);
-
- /*
- * Wait for 3 times max of the old and the new clock before and after
- * changing the frequency. Not because of documentation or empirical
- * need, but because it seems sane to do so. The three-bit-times
- * value is because that's the documented time it takes for a reset to
- * take effect.
- */
- ns_delay = 1000000*3/(kHz > hw->effective_speed_kHz
- ? kHz : hw->effective_speed_kHz);
- ndelay(ns_delay);
- REG_WR_SSER(rw_cfg, hw->cfg);
- ndelay(ns_delay);
-
- hw->effective_speed_kHz = kHz;
-
- /*
- * A timeout of twice the time for the largest chunk (not
- * counting DMA overhead) plus one jiffy, should be more than
- * enough for the transmission.
- */
- hw->dma_timeout = 1 + usecs_to_jiffies(1000*2*DMA_CHUNKSIZ*8/kHz);
-
- hw->half_cycle_delay_ns
- = 1000000/2/hw->effective_speed_kHz;
-
- pr_debug(".clk_div %d, half %d, eff %d\n",
- hw->cfg.clk_div, hw->half_cycle_delay_ns,
- hw->effective_speed_kHz);
- return 0;
-}
-
-/*
- * Set up transmitter and receiver for non-DMA access.
- * Unfortunately, it doesn't seem like hispeed works for this mode
- * (mea culpa), so we're stuck with lospeed-mode. A little slower,
- * but that's what you get for not allocating DMA.
- */
-static int crisv32_setup_spi_sser_for_reg_access(struct crisv32_spi_hw_info *hw)
-{
- u32 regi_sser = hw->sser.regi;
-
- reg_sser_rw_cfg cfg = {0};
- reg_sser_rw_frm_cfg frm_cfg = {0};
- reg_sser_rw_tr_cfg tr_cfg = {0};
- reg_sser_rw_rec_cfg rec_cfg = {0};
- reg_sser_rw_intr_mask mask = {0};
- reg_sser_rw_extra extra = {0};
- reg_sser_rw_tr_data tr_data = {0};
- reg_sser_r_intr intr;
-
- cfg.en = 0;
- tr_cfg.tr_en = 1;
- rec_cfg.rec_en = 1;
- REG_WR_SSER(rw_cfg, cfg);
- REG_WR_SSER(rw_tr_cfg, tr_cfg);
- REG_WR_SSER(rw_rec_cfg, rec_cfg);
- REG_WR_SSER(rw_intr_mask, mask);
-
- /*
- * See 23.7.2 SPI in the hardware documentation.
- * Except our configuration uses bulk mode; MMC/SD-SPI
- * isn't isochronous in nature.
- * Step 1.
- */
- cfg.gate_clk = regk_sser_yes;
- cfg.clkgate_in = regk_sser_no;
- cfg.clkgate_ctrl = regk_sser_tr;
-
- /* Step 2. */
- cfg.out_clk_pol = regk_sser_pos;
- cfg.out_clk_src = regk_sser_intern_clk;
-
- /* Step 3. */
- tr_cfg.clk_src = regk_sser_intern;
- rec_cfg.clk_src = regk_sser_intern;
- frm_cfg.clk_src = regk_sser_intern;
-
- /* Step 4. */
- tr_cfg.clk_pol = regk_sser_neg;
- rec_cfg.clk_pol = regk_sser_pos;
- frm_cfg.clk_pol = regk_sser_neg;
-
- /*
- * Step 5: frame pin (PC03 or PD03) is frame; the status pin
- * (PC02, PD02) is configured as input.
- */
- frm_cfg.frame_pin_dir = regk_sser_out;
-
- /*
- * Contrary to the doc example, we don't generate the frame
- * signal "automatically". This setting of the frame pin as
- * constant 1, reflects an inactive /CS setting, for just idle
- * clocking. When we need to transmit or receive data, we
- * change it.
- */
- frm_cfg.frame_pin_use = regk_sser_gio1;
- frm_cfg.status_pin_dir = regk_sser_in;
-
- /*
- * Step 6. This is probably not necessary, as we don't
- * generate the frame signal automatically. Nevertheless,
- * modified for bulk transmission.
- */
- frm_cfg.out_on = regk_sser_tr;
- frm_cfg.out_off = regk_sser_tr;
-
- /* Step 7. Similarly, maybe not necessary. */
- frm_cfg.type = regk_sser_level;
- frm_cfg.level = regk_sser_neg_lo;
-
- /* Step 8. These we have to set according to the bulk mode,
- * which for tr_delay is the same as for iso; a value of 1
- * means in sync with the frame signal. For rec_delay, we
- * start it at the same time as the transmitter. See figure
- * 23.7 in the hw documentation. */
- frm_cfg.tr_delay = 1;
- frm_cfg.rec_delay = 0;
-
- /* Step 9. */
- tr_cfg.sample_size = 7;
- rec_cfg.sample_size = 7;
-
- /* Step 10. */
- frm_cfg.wordrate = 7;
-
- /* Step 11 (but for bulk). */
- tr_cfg.rate_ctrl = regk_sser_bulk;
-
- /*
- * Step 12. Similarly, maybe not necessary; still, modified
- * for bulk.
- */
- tr_cfg.frm_src = regk_sser_intern;
- rec_cfg.frm_src = regk_sser_tx_bulk;
-
- /* Step 13. */
- tr_cfg.mode = regk_sser_lospeed;
- rec_cfg.mode = regk_sser_lospeed;
-
- /* Step 14. */
- tr_cfg.sh_dir = regk_sser_msbfirst;
- rec_cfg.sh_dir = regk_sser_msbfirst;
-
- /*
- * Extra step for bulk-specific settings and other general
- * settings not specified in the SPI config example.
- * It's uncertain whether all of these are needed.
- */
- tr_cfg.bulk_wspace = 1;
- tr_cfg.use_dma = 0;
-
- tr_cfg.urun_stop = 1;
- rec_cfg.orun_stop = 1;
- rec_cfg.use_dma = 0;
-
- rec_cfg.fifo_thr = regk_sser_inf;
- frm_cfg.early_wend = regk_sser_yes;
-
- cfg.clk_dir = regk_sser_out;
- tr_cfg.data_pin_use = regk_sser_dout;
- cfg.base_freq = regk_sser_f100;
-
- /* Setup for the initial frequency given to us. */
- hw->cfg = cfg;
- crisv32_spi_sser_set_speed_Hz(hw, hw->max_speed_Hz);
- cfg = hw->cfg;
-
- /*
- * Write it all, except cfg which is already written by
- * crisv32_spi_sser_set_speed_Hz.
- */
- REG_WR_SSER(rw_frm_cfg, frm_cfg);
- REG_WR_SSER(rw_tr_cfg, tr_cfg);
- REG_WR_SSER(rw_rec_cfg, rec_cfg);
- REG_WR_SSER(rw_extra, extra);
-
- /*
- * The transmit-register needs to be written before the
- * transmitter is enabled, and to get a valid trdy signal
- * waiting for us when we want to transmit a byte. Because
- * the "frame event" is that the transmitter is written, this
- * will cause a dummy 0xff-byte to be transmitted, but that's
- * ok, because /CS is inactive.
- */
- tr_data.data = 0xffff;
- REG_WR_SSER(rw_tr_data, tr_data);
-
- /*
- * We ack everything interrupt-wise; left-over indicators don't have
- * to come from *this* code.
- */
- REG_WRINT_SSER(rw_ack_intr, -1);
-
- /*
- * Wait 3 cycles before enabling, after the transmit register
- * has been written. (This'll be just a few microseconds for
- * e.g. 400 KHz.)
- */
- ndelay(3 * 2 * hw->half_cycle_delay_ns);
- cfg.en = 1;
-
- REG_WR_SSER(rw_cfg, cfg);
-
- /*
- * Now wait for 8 + 3 cycles. The 0xff byte should now have
- * been transmitted and dummy data received.
- */
- ndelay((8 + 3) * 2 * hw->half_cycle_delay_ns);
-
- /*
- * Sanity-check that we have data-available and the
- * transmitter is ready to send new data.
- */
- intr = REG_RD_SSER(r_intr);
- if (!intr.rdav || !intr.trdy)
- panic("sser hw or SPI driver broken (3) 0x%x",
- REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
-
- hw->frm_cfg = frm_cfg;
- hw->tr_cfg = tr_cfg;
- hw->rec_cfg = rec_cfg;
- hw->extra = extra;
- hw->cfg = cfg;
- return 0;
-}
-
-/* Initialization, maybe fault recovery. */
-
-static void crisv32_reset_dma_hw(u32 regi)
-{
- REG_WR_INT(dma, regi, rw_intr_mask, 0);
-
- DMA_RESET(regi);
- DMA_WAIT_UNTIL_RESET(regi);
- DMA_ENABLE(regi);
- REG_WR_INT(dma, regi, rw_ack_intr, -1);
-
- DMA_WR_CMD(regi, regk_dma_set_w_size1);
-}
-
-/* Interrupt from SSER, for use with DMA when only the transmitter is used. */
-
-static irqreturn_t sser_interrupt(int irqno, void *arg)
-{
- struct crisv32_spi_hw_info *hw = arg;
- u32 regi_sser = hw->sser.regi;
- reg_sser_r_intr intr = REG_RD_SSER(r_intr);
-
- if (intr.tidle == 0 && intr.urun == 0) {
- printk(KERN_ERR
- "sser @0x%x: spurious sser intr, flags: 0x%x\n",
- regi_sser, REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
- } else if (intr.urun == 0) {
- hw->dma_actually_done = 1;
- complete(&hw->dma_done);
- } else {
- /*
- * Make any reception time out and notice the error,
- * which it might not otherwise do data was *received*
- * successfully.
- */
- u32 regi_dmain = hw->dmain.regi;
-
- /*
- * Recommended practice before acking urun is to turn
- * off sser. That might not be enough to stop DMA-in
- * from signalling success if the underrun was late in
- * the transmission, so we disable the DMA-in
- * interrupts too.
- */
- REG_WRINT_SSER(rw_cfg, 0);
- REG_WRINT_DI(rw_intr_mask, 0);
- REG_WRINT_DI(rw_ack_intr, -1);
- }
-
- REG_WRINT_SSER(rw_intr_mask, 0);
-
- /*
- * We must at least ack urun together with tidle, but keep it
- * simple and ack them all.
- */
- REG_WRINT_SSER(rw_ack_intr, -1);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Interrupt from receiver DMA connected to SSER, for use when the
- * receiver is used, with or without the transmitter.
- */
-static irqreturn_t rec_dma_interrupt(int irqno, void *arg)
-{
- struct crisv32_spi_hw_info *hw = arg;
- u32 regi_dmain = hw->dmain.regi;
- u32 regi_sser = hw->sser.regi;
- reg_dma_r_intr intr = REG_RD_DI(r_intr);
-
- if (intr.data == 0) {
- printk(KERN_ERR
- "sser @0x%x: spurious rec dma intr, flags: 0x%x\n",
- regi_dmain, REG_TYPE_CONV(u32, reg_dma_r_intr, intr));
- } else {
- hw->dma_actually_done = 1;
- complete(&hw->dma_done);
- }
-
- REG_WRINT_DI(rw_intr_mask, 0);
-
- /* Avoid false underrun indications; stop all sser interrupts. */
- REG_WRINT_SSER(rw_intr_mask, 0);
- REG_WRINT_SSER(rw_ack_intr, -1);
-
- REG_WRINT_DI(rw_ack_intr, -1);
- return IRQ_HANDLED;
-}
-
-/*
- * Set up transmitter and receiver for DMA access. We use settings
- * from the "Atmel fast flash" example.
- */
-static int crisv32_setup_spi_sser_for_dma_access(struct crisv32_spi_hw_info
- *hw)
-{
- int ret;
- u32 regi_sser = hw->sser.regi;
-
- reg_sser_rw_cfg cfg = {0};
- reg_sser_rw_frm_cfg frm_cfg = {0};
- reg_sser_rw_tr_cfg tr_cfg = {0};
- reg_sser_rw_rec_cfg rec_cfg = {0};
- reg_sser_rw_intr_mask mask = {0};
- reg_sser_rw_extra extra = {0};
-
- cfg.en = 0;
- tr_cfg.tr_en = 1;
- rec_cfg.rec_en = 1;
- REG_WR_SSER(rw_cfg, cfg);
- REG_WR_SSER(rw_tr_cfg, tr_cfg);
- REG_WR_SSER(rw_rec_cfg, rec_cfg);
- REG_WR_SSER(rw_intr_mask, mask);
-
- /*
- * See 23.7.5.2 (Atmel fast flash) in the hardware documentation.
- * Step 1.
- */
- cfg.gate_clk = regk_sser_no;
-
- /* Step 2. */
- cfg.out_clk_pol = regk_sser_pos;
-
- /* Step 3. */
- cfg.out_clk_src = regk_sser_intern_clk;
-
- /* Step 4. */
- tr_cfg.sample_size = 1;
- rec_cfg.sample_size = 1;
-
- /* Step 5. */
- frm_cfg.wordrate = 7;
-
- /* Step 6. */
- tr_cfg.clk_src = regk_sser_intern;
- rec_cfg.clk_src = regk_sser_intern;
- frm_cfg.clk_src = regk_sser_intern;
- tr_cfg.clk_pol = regk_sser_neg;
- frm_cfg.clk_pol = regk_sser_neg;
-
- /* Step 7. */
- rec_cfg.clk_pol = regk_sser_pos;
-
- /* Step 8. */
- frm_cfg.tr_delay = 1;
-
- /* Step 9. */
- frm_cfg.rec_delay = 1;
-
- /* Step 10. */
- tr_cfg.sh_dir = regk_sser_msbfirst;
- rec_cfg.sh_dir = regk_sser_msbfirst;
-
- /* Step 11. */
- tr_cfg.frm_src = regk_sser_intern;
- rec_cfg.frm_src = regk_sser_intern;
-
- /* Step 12. */
- tr_cfg.rate_ctrl = regk_sser_iso;
-
- /*
- * Step 13. Note that 0 != tx_null, so we're good regarding
- * the descriptor .md field.
- */
- tr_cfg.eop_stop = 1;
-
- /* Step 14. */
- frm_cfg.frame_pin_use = regk_sser_gio1;
- frm_cfg.frame_pin_dir = regk_sser_out;
-
- /* Step 15. */
- extra.clkon_en = 1;
- extra.clkoff_en = 1;
-
- /* Step 16. We'll modify this value for each "burst". */
- extra.clkoff_cycles = 7;
-
- /* Step 17. */
- cfg.prepare = 1;
-
- /*
- * Things left out from the documented startup procedure.
- * It's uncertain whether all of these are needed.
- */
- frm_cfg.status_pin_dir = regk_sser_in;
- tr_cfg.mode = regk_sser_hispeed;
- rec_cfg.mode = regk_sser_hispeed;
- frm_cfg.out_on = regk_sser_intern_tb;
- frm_cfg.out_off = regk_sser_rec;
- frm_cfg.type = regk_sser_level;
- tr_cfg.use_dma = 1;
- tr_cfg.urun_stop = 1;
- rec_cfg.orun_stop = 1;
- rec_cfg.use_dma = 1;
- rec_cfg.fifo_thr = regk_sser_inf;
- frm_cfg.early_wend = regk_sser_yes;
- cfg.clk_dir = regk_sser_out;
-
- tr_cfg.data_pin_use = regk_sser_dout;
- cfg.base_freq = regk_sser_f100;
-
- REG_WR_SSER(rw_frm_cfg, frm_cfg);
- REG_WR_SSER(rw_tr_cfg, tr_cfg);
- REG_WR_SSER(rw_rec_cfg, rec_cfg);
- REG_WR_SSER(rw_extra, extra);
- REG_WR_SSER(rw_cfg, cfg);
- hw->frm_cfg = frm_cfg;
- hw->tr_cfg = tr_cfg;
- hw->rec_cfg = rec_cfg;
- hw->extra = extra;
- hw->cfg = cfg;
-
- crisv32_spi_sser_set_speed_Hz(hw, hw->max_speed_Hz);
-
- ret = request_irq(hw->sser.irq, sser_interrupt, 0, "sser", hw);
- if (ret != 0)
- goto noirq;
-
- ret = request_irq(hw->dmain.irq, rec_dma_interrupt, 0, "sser rec", hw);
- if (ret != 0)
- goto free_outirq;
-
- crisv32_reset_dma_hw(hw->dmain.regi);
- crisv32_reset_dma_hw(hw->dmaout.regi);
- return 0;
-
- free_outirq:
- free_irq(hw->sser.irq, hw);
- noirq:
- return ret;
-}
-
-/* SPI-master setup function for non-DMA. */
-
-static int crisv32_spi_sser_regs_master_setup(struct spi_device *spi)
-{
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
- int ret = 0;
-
- /* Just do a little initial constraining checks. */
- if (spi->bits_per_word == 0)
- spi->bits_per_word = 8;
-
- if (spi->bits_per_word != 8)
- return -EINVAL;
-
- bitbang->chipselect = (spi->mode & SPI_CS_HIGH) != 0
- ? crisv32_spi_sser_chip_select_active_high
- : crisv32_spi_sser_chip_select_active_low;
-
- if (hw->max_speed_Hz == 0) {
- u32 max_speed_Hz;
-
- /*
- * At this time; at the first call to the SPI master
- * setup function, spi->max_speed_hz reflects the
- * board-init value. It will be changed later on by
- * the protocol master, but at the master setup call
- * is the only time we actually get to see the hw max
- * and thus a reasonable time to init the hw field.
- */
-
- /* The module parameter overrides everything. */
- if (crisv32_spi_speed_limit_Hz != 0)
- max_speed_Hz = crisv32_spi_speed_limit_Hz;
- /*
- * I never could get hispeed mode to work for non-DMA.
- * We adjust the max speed here (where we could
- * presumably fix it), not in the board info file.
- */
- else if (spi->max_speed_hz > 16667000)
- max_speed_Hz = 16667000;
- else
- max_speed_Hz = spi->max_speed_hz;
-
- hw->max_speed_Hz = max_speed_Hz;
- spi->max_speed_hz = max_speed_Hz;
-
- /*
- * We also do one-time initialization of the hardware at this
- * point. We could defer to the return to the probe-function
- * from spi_bitbang_start, but other hardware setup (like
- * subsequent calls to this function before that) would have
- * to be deferred until then too.
- */
- ret = crisv32_setup_spi_sser_for_reg_access(hw);
- if (ret != 0)
- return ret;
-
- ret = spi_bitbang_setup(spi);
- if (ret != 0)
- return ret;
-
- dev_info(&spi->dev,
- "CRIS v32 SPI driver for sser%d\n",
- spi->master->bus_num);
- }
-
- return 0;
-}
-
-/*
- * SPI-master setup_transfer-function used for both DMA and non-DMA
- * (single function for DMA, together with spi_bitbang_setup_transfer
- * for non-DMA).
- */
-
-static int crisv32_spi_sser_common_setup_transfer(struct spi_device *spi,
- struct spi_transfer *t)
-{
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- u8 bits_per_word;
- u32 hz;
- int ret = 0;
-
- if (t) {
- bits_per_word = t->bits_per_word;
- hz = t->speed_hz;
- } else {
- bits_per_word = 0;
- hz = 0;
- }
-
- if (bits_per_word == 0)
- bits_per_word = spi->bits_per_word;
-
- if (bits_per_word != 8)
- return -EINVAL;
-
- if (hz == 0)
- hz = spi->max_speed_hz;
-
- if (hz != hw->effective_speed_kHz*1000 && hz != 0)
- ret = crisv32_spi_sser_set_speed_Hz(hw, hz);
-
- return ret;
-}
-
-/* Helper for a SPI-master setup_transfer function for non-DMA. */
-
-static int crisv32_spi_sser_regs_setup_transfer(struct spi_device *spi,
- struct spi_transfer *t)
-{
- int ret = crisv32_spi_sser_common_setup_transfer(spi, t);
-
- if (ret != 0)
- return ret;
-
- /* Set up the loop-over-buffer parts. */
- return spi_bitbang_setup_transfer (spi, t);
-}
-
-/* SPI-master setup function for DMA. */
-
-static int crisv32_spi_sser_dma_master_setup(struct spi_device *spi)
-{
- /*
- * As we don't dispatch to the spi_bitbang default function,
- * we need to do whatever tests it does; keep it in sync. On
- * the bright side, we can use the spi->controller_state slot;
- * we use it for DMA:able memory for the descriptors and
- * temporary buffers to copy non-DMA:able transfers.
- */
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
- struct crisv32_spi_dma_cs *cs;
- u32 dmasize;
- int ret = 0;
-
- if (hw->max_speed_Hz == 0) {
- struct crisv32_spi_dma_descrs *descrp;
- u32 descrp_dma;
- u32 max_speed_Hz;
-
- /* The module parameter overrides everything. */
- if (crisv32_spi_speed_limit_Hz != 0)
- max_speed_Hz = crisv32_spi_speed_limit_Hz;
- /*
- * See comment at corresponding statement in
- * crisv32_spi_sser_regs_master_setup.
- */
- else
- max_speed_Hz = spi->max_speed_hz;
-
- hw->max_speed_Hz = max_speed_Hz;
- spi->max_speed_hz = max_speed_Hz;
-
- ret = crisv32_setup_spi_sser_for_dma_access(hw);
- if (ret != 0)
- return ret;
-
- /* Allocate some extra for necessary alignment. */
- dmasize = sizeof *cs + 31
- + sizeof(struct crisv32_spi_dma_descrs);
-
- cs = kzalloc(dmasize, GFP_KERNEL | GFP_DMA);
- if (cs == NULL)
- return -ENOMEM;
-
- /*
- * Make descriptors aligned within the allocated area,
- * some-place after cs.
- */
- descrp = (struct crisv32_spi_dma_descrs *)
- (((u32) (cs + 1) + 31) & ~31);
- descrp_dma = virt_to_phys(descrp);
-
- /* Set up the "constant" parts of the descriptors. */
- descrp->out_descr.eol = 1;
- descrp->out_descr.intr = 1;
- descrp->out_descr.out_eop = 1;
- descrp->out_ctxt.saved_data = (dma_descr_data *)
- (descrp_dma
- + offsetof(struct crisv32_spi_dma_descrs, out_descr));
- descrp->out_ctxt.next = 0;
-
- descrp->in_descr.eol = 1;
- descrp->in_descr.intr = 1;
- descrp->in_ctxt.saved_data = (dma_descr_data *)
- (descrp_dma
- + offsetof(struct crisv32_spi_dma_descrs, in_descr));
- descrp->in_ctxt.next = 0;
-
- cs->descrp = descrp;
- spi->controller_state = cs;
-
- init_completion(&hw->dma_done);
-
- dev_info(&spi->dev,
- "CRIS v32 SPI driver for sser%d/DMA\n",
- spi->master->bus_num);
- }
-
- /* Do our extra constraining checks. */
- if (spi->bits_per_word == 0)
- spi->bits_per_word = 8;
-
- if (spi->bits_per_word != 8)
- return -EINVAL;
-
- /* SPI_LSB_FIRST deliberately left out, and we only support mode 3. */
- if ((spi->mode & ~(SPI_TX_1|SPI_CS_HIGH)) != SPI_MODE_3)
- return -EINVAL;
-
- bitbang->chipselect = (spi->mode & SPI_CS_HIGH) != 0
- ? crisv32_spi_sser_chip_select_active_high
- : crisv32_spi_sser_chip_select_active_low;
-
- ret = bitbang->setup_transfer(spi, NULL);
- if (ret != 0)
- return ret;
-
- /* Remember to de-assert chip-select before the first transfer. */
- spin_lock(&bitbang->lock);
- if (!bitbang->busy) {
- bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
- ndelay(hw->half_cycle_delay_ns);
- }
- spin_unlock(&bitbang->lock);
-
- return 0;
-}
-
-/* SPI-master cleanup function for DMA. */
-
-static void crisv32_spi_sser_dma_cleanup(struct spi_device *spi)
-{
- kfree(spi->controller_state);
- spi->controller_state = NULL;
-}
-
-/*
- * Set up DMA transmitter descriptors for a chunk of data.
- * The caller is responsible for working around TR 106.
- */
-static void crisv32_spi_sser_setup_dma_descr_out(u32 regi,
- struct crisv32_spi_dma_cs *cs,
- u32 out_phys, u32 chunk_len)
-{
- BUG_ON(chunk_len > DMA_CHUNKSIZ);
- struct crisv32_spi_dma_descrs *descrp = cs->descrp;
- u32 descrp_dma = virt_to_phys(descrp);
-
- descrp->out_descr.buf = (u8 *) out_phys;
- descrp->out_descr.after = (u8 *) out_phys + chunk_len;
- descrp->out_ctxt.saved_data_buf = (u8 *) out_phys;
-
- DMA_START_CONTEXT(regi,
- descrp_dma
- + offsetof(struct crisv32_spi_dma_descrs, out_ctxt));
-}
-
-/*
- * Set up DMA receiver descriptors for a chunk of data.
- * Also, work around TR 106.
- */
-static void crisv32_spi_sser_setup_dma_descr_in(u32 regi_dmain,
- struct crisv32_spi_dma_cs *cs,
- u32 in_phys, u32 chunk_len)
-{
- BUG_ON(chunk_len > DMA_CHUNKSIZ);
- struct crisv32_spi_dma_descrs *descrp = cs->descrp;
- u32 descrp_dma = virt_to_phys(descrp);
-
- descrp->in_descr.buf = (u8 *) in_phys;
- descrp->in_descr.after = (u8 *) in_phys + chunk_len;
- descrp->in_ctxt.saved_data_buf = (u8 *) in_phys;
-
- flush_dma_descr(&descrp->in_descr, 1);
-
- DMA_START_CONTEXT(regi_dmain,
- descrp_dma
- + offsetof(struct crisv32_spi_dma_descrs, in_ctxt));
-}
-
-/*
- * SPI-bitbang txrx_bufs function for DMA.
- * FIXME: We have SG DMA descriptors; use them.
- * (Requires abandoning the spi_bitbang framework if done reasonably.)
- */
-static int crisv32_spi_sser_dma_txrx_bufs(struct spi_device *spi,
- struct spi_transfer *t)
-{
- struct crisv32_spi_dma_cs *cs = spi->controller_state;
- struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
- u32 len = t->len;
- reg_sser_rw_cfg cfg = hw->cfg;
- reg_sser_rw_tr_cfg tr_cfg = hw->tr_cfg;
- reg_sser_rw_rec_cfg rec_cfg = hw->rec_cfg;
- reg_sser_rw_extra extra = hw->extra;
- u32 regi_sser = hw->sser.regi;
- u32 dmain = 0;
- u32 dmaout = 0;
- u32 regi_dmain = hw->dmain.regi;
- u8 *rx_buf = t->rx_buf;
-
- /*
- * Using IRQ+completion is measured to give an overhead of 14
- * us, so let's instead busy-wait for the time that would be
- * wasted anyway, and get back sooner. We're not counting in
- * other overhead such as the DMA descriptor in the
- * time-expression, which causes us to use busy-wait for
- * data-lengths that actually take a bit longer than
- * IRQ_USAGE_THRESHOLD_NS. Still, with IRQ_USAGE_THRESHOLD_NS
- * = 14000, the threshold is for 20 MHz => 35 bytes, 25 => 44
- * and 50 => 88 and the typical SPI transfer lengths for
- * SDcard are { 1, 2, 7, 512 } bytes so a more complicated
- * would likely give nothing but worse performance due to
- * complexity.
- */
- int use_irq = len * hw->half_cycle_delay_ns
- > IRQ_USAGE_THRESHOLD_NS / 8 / 2;
-
- if (len > DMA_CHUNKSIZ) {
- /*
- * It should be quite easy to adjust the code if the need
- * arises for something much larger than the preallocated
- * buffers (which could themselves easily just be increased)
- * but still what fits in extra.clkoff_cycles: kmalloc a
- * temporary dmaable buffer in this function and free it at
- * the end. No need to optimize rare requests. Until then,
- * we'll keep the code as simple as performance allows.
- * Alternatively or if we need to send even larger data,
- * consider calling self with the required number of "faked"
- * shorter transfers here.
- */
- dev_err(&spi->dev,
- "Trying to transfer %d > max %d bytes:"
- " need to adjust the SPI driver\n",
- len, DMA_CHUNKSIZ);
- return -EMSGSIZE;
- }
-
- /*
- * Need to separately tell the hispeed machinery the number of
- * bits in this transmission.
- */
- extra.clkoff_cycles = len * 8 - 1;
-
- if (t->tx_buf != NULL) {
- if (t->tx_dma == 0) {
- memcpy(cs->tx_buf, t->tx_buf, len);
- dmaout = virt_to_phys(cs->tx_buf);
- } else
- dmaout = t->tx_dma;
-
- crisv32_spi_sser_setup_dma_descr_out(hw->dmaout.regi,
- cs, dmaout,
- len);
-
- /* No need to do anything for TR 106; this DMA only reads. */
- tr_cfg.tr_en = 1;
- tr_cfg.data_pin_use = regk_sser_dout;
- } else {
- tr_cfg.data_pin_use = (spi->mode & SPI_TX_1)
- ? regk_sser_gio1 : regk_sser_gio0;
- tr_cfg.tr_en = 0;
- }
-
- if (rx_buf != 0) {
- if (t->rx_dma == 0)
- dmain = virt_to_phys(cs->rx_buf);
- else
- dmain = t->rx_dma;
-
- crisv32_spi_sser_setup_dma_descr_in(regi_dmain, cs,
- dmain, len);
- rec_cfg.rec_en = 1;
-
- REG_WRINT_SSER(rw_ack_intr, -1);
- REG_WRINT_DI(rw_ack_intr, -1);
-
- /*
- * If we're receiving, use the rec data interrupt from DMA as
- * a signal that the HW is done.
- */
- if (use_irq) {
- reg_sser_rw_intr_mask mask = { .urun = 1 };
- reg_dma_rw_intr_mask dmask = { .data = 1 };
-
- REG_WR_DI(rw_intr_mask, dmask);
-
- /*
- * Catch transmitter underruns too. We don't
- * have to conditionalize that on the
- * transmitter being enabled; it's off when
- * the transmitter is off. Any overruns will
- * be indicated by a timeout, so we don't have
- * to check for that specifically.
- */
- REG_WR_SSER(rw_intr_mask, mask);
- }
- } else {
- rec_cfg.rec_en = 0;
-
- /*
- * Ack previous overrun, underrun and tidle interrupts. Or
- * why not all. We'll get orun and urun "normally" due to the
- * way hispeed is (documented to) work and need to clear them,
- * and we'll have a tidle from a previous transmit if we used
- * to both receive and transmit, but now only transmit.
- */
- REG_WRINT_SSER(rw_ack_intr, -1);
-
- if (use_irq) {
- reg_sser_rw_intr_mask mask = { .urun = 1, .tidle = 1 };
- REG_WR_SSER(rw_intr_mask, mask);
- }
- }
-
- REG_WR_SSER(rw_rec_cfg, rec_cfg);
- REG_WR_SSER(rw_tr_cfg, tr_cfg);
- REG_WR_SSER(rw_extra, extra);
-
- /*
- * Barriers are needed to make sure that the completion inits don't
- * migrate past the register writes due to gcc scheduling.
- */
- mb();
- hw->dma_actually_done = 0;
- INIT_COMPLETION(hw->dma_done);
- mb();
-
- /*
- * Wait until DMA tx FIFO has more than one byte (it reads one
- * directly then one "very quickly") before starting sser tx.
- */
- if (tr_cfg.tr_en) {
- u32 regi_dmaout = hw->dmaout.regi;
- u32 minlen = len > 2 ? 2 : len;
- while ((REG_RD_DO(rw_stat)).buf < minlen)
- ;
- }
-
- /* Wait until DMA-in is finished reading the descriptors. */
- if (rec_cfg.rec_en)
- while (DMA_BUSY(regi_dmain))
- ;
- /*
- * Wait 3 cycles before enabling (with .prepare = 1).
- * FIXME: Can we cut this by some time already passed?
- */
- ndelay(3 * 2 * hw->half_cycle_delay_ns);
- cfg.en = 1;
- REG_WR_SSER(rw_cfg, cfg);
-
- /*
- * Wait 3 more cycles plus 30 ns before letting go.
- * FIXME: Can we do something else before but after the
- * previous cfg write and cut this by the time already passed?
- */
- cfg.prepare = 0;
- hw->cfg = cfg;
- ndelay(3 * 2 * hw->half_cycle_delay_ns + 30);
-
- REG_WR_SSER(rw_cfg, cfg);
-
- /*, We'll disable sser next the time we change the configuration. */
- cfg.en = 0;
- cfg.prepare = 1;
- hw->cfg = cfg;
-
- if (!use_irq) {
- /*
- * We use a timeout corresponding to one iteration per ns,
- * which of course is at least five * insns / loop times as
- * much as reality, but we'll avoid a need for reading hw
- * timers directly.
- */
- u32 countdown = IRQ_USAGE_THRESHOLD_NS;
-
- do
- if (rec_cfg.rec_en == 0) {
- /* Using the transmitter only. */
- reg_sser_r_intr intr = REG_RD_SSER(r_intr);
-
- if (intr.tidle != 0) {
- /*
- * Almost done... Just check if we
- * had a transmitter underrun too.
- */
- if (!intr.urun)
- goto transmission_done;
-
- /*
- * Fall over to the "time is up" case;
- * no need to provide a special path
- * for the error case.
- */
- countdown = 1;
- }
- } else {
- /* Using at least the receiver. */
- if ((REG_RD_DI(r_intr)).data != 0) {
- if ((REG_RD_SSER(r_intr)).urun == 0)
- goto transmission_done;
- countdown = 1;
- }
- }
- while (--countdown != 0);
-
- /*
- * The time is up. Something might be wrong, or perhaps we've
- * started using data lengths where the threshold was about a
- * magnitude wrong. Fall over to IRQ. Remember not to ack
- * interrupts here (but always above, before starting), else
- * we'll have a race condition with the interrupt.
- */
- if (!rec_cfg.rec_en) {
- reg_sser_rw_intr_mask mask = { .urun = 1, .tidle = 1 };
- REG_WR_SSER(rw_intr_mask, mask);
- } else {
- reg_dma_rw_intr_mask dmask = { .data = 1 };
- reg_sser_rw_intr_mask mask = { .urun = 1 };
-
- /*
- * Never mind checking for tr being disabled; urun
- * won't happen then.
- */
- REG_WR_SSER(rw_intr_mask, mask);
- REG_WR_DI(rw_intr_mask, dmask);
- }
- }
-
- if (!wait_for_completion_timeout(&hw->dma_done, hw->dma_timeout)
- /*
- * Have to keep track manually too, else we'll get a timeout
- * indication for being scheduled out too long, while the
- * completion will still have trigged.
- */
- && !hw->dma_actually_done) {
- u32 regi_dmaout = hw->dmaout.regi;
-
- /*
- * Transfer timed out. Should not happen for a
- * working controller, except perhaps if the system is
- * badly conditioned, causing DMA memory bandwidth
- * starvation. Not much to do afterwards, but perhaps
- * reset DMA and sser and hope it works the next time.
- */
- REG_WRINT_SSER(rw_cfg, 0);
- REG_WR_SSER(rw_cfg, cfg);
- REG_WRINT_SSER(rw_intr_mask, 0);
- REG_WRINT_DI(rw_intr_mask, 0);
- REG_WRINT_SSER(rw_ack_intr, -1);
- crisv32_reset_dma_hw(hw->dmain.regi);
- crisv32_reset_dma_hw(hw->dmaout.regi);
-
- dev_err(&spi->dev, "timeout %u bytes %u kHz\n",
- len, hw->effective_speed_kHz);
- dev_err(&spi->dev, "sser=(%x,%x,%x,%x,%x)\n",
- REG_RDINT_SSER(rw_cfg), REG_RDINT_SSER(rw_tr_cfg),
- REG_RDINT_SSER(rw_rec_cfg), REG_RDINT_SSER(rw_extra),
- REG_RDINT_SSER(r_intr));
- dev_err(&spi->dev, "tx=(%x,%x,%x,%x)\n",
- dmaout, REG_RDINT_DO(rw_stat), REG_RDINT_DO(rw_data),
- REG_RDINT_DO(r_intr));
- dev_err(&spi->dev, "rx=(%x,%x,%x,%x)\n",
- dmain, REG_RDINT_DI(rw_stat), REG_RDINT_DI(rw_data),
- REG_RDINT_DI(r_intr));
- return -EIO;
- }
-
- transmission_done:
- /* Wait for the last half-cycle of the last cycle. */
- crisv32_spi_sser_wait_halfabit(hw);
-
- /* Reset for another call. */
- REG_WR_SSER(rw_cfg, cfg);
-
- /*
- * If we had to use the temp DMAable rec buffer, copy it to the right
- * position.
- */
- if (t->rx_buf != 0 && t->rx_dma == 0)
- memcpy (t->rx_buf, cs->rx_buf, len);
-
- /*
- * All clear. The interrupt function disabled the interrupt, we don't
- * have to do more.
- */
- return len;
-}
-
-/* Platform-device probe function. */
-
-static int __devinit crisv32_spi_sser_probe(struct platform_device *dev)
-{
- struct spi_master *master;
- struct crisv32_spi_sser_devdata *dd;
- struct crisv32_spi_hw_info *hw;
- struct resource *res;
- struct crisv32_spi_sser_controller_data *gc;
- int ret;
-
- /*
- * We need to get the controller data as a hardware resource,
- * or else it wouldn't be available until *after* the
- * spi_bitbang_start call!
- */
- res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
- if (res == NULL) {
- dev_err(&dev->dev,
- "can't get controller_data resource at probe\n");
- return -EIO;
- }
-
- gc = (struct crisv32_spi_sser_controller_data *) res->start;
-
- master = spi_alloc_master(&dev->dev, sizeof *dd);
- if (master == NULL) {
- dev_err(&dev->dev, "failed to allocate spi master\n");
- ret = -ENOMEM;
- goto err;
- }
-
- dd = spi_master_get_devdata(master);
- platform_set_drvdata(dev, dd);
-
- /*
- * The device data asks for this driver, and holds the id
- * number, which must be unique among the same-type devices.
- * We use this as the number of this SPI bus.
- */
- master->bus_num = dev->id;
-
- /* Setup SPI bitbang adapter hooks. */
- dd->bitbang.master = spi_master_get(master);
- dd->bitbang.chipselect = crisv32_spi_sser_chip_select_active_low;
-
- hw = &dd->hw;
- hw->gc = gc;
-
- /* Pre-spi_bitbang_start setup. */
- if (gc->using_dma) {
- /* Setup DMA and interrupts. */
- ret = gc->iface_allocate(&hw->sser, &hw->dmain, &hw->dmaout);
- if (ret != 0)
- goto err_no_regs;
-
- dd->bitbang.master->setup = crisv32_spi_sser_dma_master_setup;
- dd->bitbang.setup_transfer
- = crisv32_spi_sser_common_setup_transfer;
- dd->bitbang.txrx_bufs = crisv32_spi_sser_dma_txrx_bufs;
- dd->bitbang.master->cleanup = crisv32_spi_sser_dma_cleanup;
- } else {
- /* Just registers, then. */
- ret = gc->iface_allocate(&hw->sser, NULL, NULL);
- if (ret != 0)
- goto err_no_regs;
-
- dd->bitbang.master->setup
- = crisv32_spi_sser_regs_master_setup;
- dd->bitbang.setup_transfer
- = crisv32_spi_sser_regs_setup_transfer;
- dd->bitbang.master->cleanup = spi_bitbang_cleanup;
-
- /*
- * We can do all modes pretty simply, but I have no
- * simple enough way to test them, so I won't.
- */
- dd->bitbang.txrx_word[SPI_MODE_3]
- = crisv32_spi_sser_txrx_mode3;
- }
-
- ret = spi_bitbang_start(&dd->bitbang);
- if (ret)
- goto err_no_bitbang;
-
- /*
- * We don't have a dev_info here, as initialization that may fail is
- * postponed to the first master->setup call. It's called from
- * spi_bitbang_start (above), where the call-chain doesn't look too
- * close at error return values; we'll get here successfully anyway,
- * so emitting a separate message here is at most confusing.
- */
- dev_dbg(&dev->dev,
- "CRIS v32 SPI driver for sser%d%s present\n",
- master->bus_num,
- gc->using_dma ? "/DMA" : "");
-
- return 0;
-
- err_no_bitbang:
- gc->iface_free();
-
- err_no_regs:
- platform_set_drvdata(dev, NULL);
- spi_master_put(dd->bitbang.master);
-
- err:
- return ret;
-}
-
-/* Platform-device remove-function. */
-
-static int __devexit crisv32_spi_sser_remove(struct platform_device *dev)
-{
- struct crisv32_spi_sser_devdata *dd = platform_get_drvdata(dev);
- struct crisv32_spi_hw_info *hw = &dd->hw;
- struct crisv32_spi_sser_controller_data *gc = hw->gc;
- int ret;
-
- /* We need to stop all bitbanging activity separately. */
- ret = spi_bitbang_stop(&dd->bitbang);
- if (ret != 0)
- return ret;
-
- spi_master_put(dd->bitbang.master);
-
- /*
- * If we get here, the queue is empty and there's no activity;
- * it's safe to flip the switch on the interfaces.
- */
- if (gc->using_dma) {
- u32 regi_dmain = hw->dmain.regi;
- u32 regi_dmaout = hw->dmaout.regi;
- u32 regi_sser = hw->sser.regi;
-
- REG_WRINT_SSER(rw_intr_mask, 0);
- REG_WRINT_DI(rw_intr_mask, 0);
- REG_WRINT_DO(rw_intr_mask, 0);
- hw->cfg.en = 0;
- REG_WR_SSER(rw_cfg, hw->cfg);
- DMA_RESET(regi_dmain);
- DMA_RESET(regi_dmaout);
- free_irq(hw->sser.irq, hw);
- free_irq(hw->dmain.irq, hw);
- }
-
- gc->iface_free();
-
- platform_set_drvdata(dev, NULL);
- return 0;
-}
-
-/*
- * For the time being, there's no suspend/resume support to care
- * about, so those handlers default to NULL.
- */
-static struct platform_driver crisv32_spi_sser_drv = {
- .probe = crisv32_spi_sser_probe,
- .remove = __devexit_p(crisv32_spi_sser_remove),
- .driver = {
- .name = "spi_crisv32_sser",
- .owner = THIS_MODULE,
- },
-};
-
-/* Module init function. */
-
-static int __devinit crisv32_spi_sser_init(void)
-{
- return platform_driver_register(&crisv32_spi_sser_drv);
-}
-
-/* Module exit function. */
-
-static void __devexit crisv32_spi_sser_exit(void)
-{
- platform_driver_unregister(&crisv32_spi_sser_drv);
-}
-
-/* Setter function for speed limit. */
-
-static int crisv32_spi_speed_limit_Hz_setter(const char *val,
- struct kernel_param *kp)
-{
- char *endp;
- ulong num = simple_strtoul(val, &endp, 0);
- if (endp == val
- || *endp != 0
- || num <= 0
- /*
- * We can't go above 100 MHz speed. Actually we can't go
- * above 50 MHz using the sser support but it might make
- * sense trying.
- */
- || num > 100000000)
- return -EINVAL;
- *(ulong *) kp->arg = num;
- return 0;
-}
-
-module_param_call(crisv32_spi_max_speed_hz,
- crisv32_spi_speed_limit_Hz_setter, param_get_ulong,
- &crisv32_spi_speed_limit_Hz, 0644);
-
-module_init(crisv32_spi_sser_init);
-module_exit(crisv32_spi_sser_exit);
-
-MODULE_DESCRIPTION("CRIS v32 SPI-SSER Driver");
-MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
-MODULE_LICENSE("GPL");
+++ /dev/null
-
-/* macros for debug output */
-
-#define hcd_dbg(hcd, fmt, args...) \
- dev_info(hcd->self.controller, fmt, ## args)
-#define hcd_err(hcd, fmt, args...) \
- dev_err(hcd->self.controller, fmt, ## args)
-#define hcd_info(hcd, fmt, args...) \
- dev_info(hcd->self.controller, fmt, ## args)
-#define hcd_warn(hcd, fmt, args...) \
- dev_warn(hcd->self.controller, fmt, ## args)
-
-/*
-#define devdrv_dbg(fmt, args...) \
- printk(KERN_INFO "usb_devdrv dbg: ");printk(fmt, ## args)
-*/
-#define devdrv_dbg(fmt, args...) {}
-
-#define devdrv_err(fmt, args...) \
- printk(KERN_ERR "usb_devdrv error: ");printk(fmt, ## args)
-#define devdrv_info(fmt, args...) \
- printk(KERN_INFO "usb_devdrv: ");printk(fmt, ## args)
-
-#define irq_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_irq dbg: ");printk(fmt, ## args)
-#define irq_err(fmt, args...) \
- printk(KERN_ERR "crisv10_irq error: ");printk(fmt, ## args)
-#define irq_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_irq warn: ");printk(fmt, ## args)
-#define irq_info(fmt, args...) \
- printk(KERN_INFO "crisv10_hcd: ");printk(fmt, ## args)
-
-/*
-#define rh_dbg(fmt, args...) \
- printk(KERN_DEBUG "crisv10_rh dbg: ");printk(fmt, ## args)
-*/
-#define rh_dbg(fmt, args...) {}
-
-#define rh_err(fmt, args...) \
- printk(KERN_ERR "crisv10_rh error: ");printk(fmt, ## args)
-#define rh_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_rh warning: ");printk(fmt, ## args)
-#define rh_info(fmt, args...) \
- printk(KERN_INFO "crisv10_rh: ");printk(fmt, ## args)
-
-/*
-#define tc_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_tc dbg: ");printk(fmt, ## args)
-*/
-#define tc_dbg(fmt, args...) {while(0){}}
-
-#define tc_err(fmt, args...) \
- printk(KERN_ERR "crisv10_tc error: ");printk(fmt, ## args)
-/*
-#define tc_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_tc warning: ");printk(fmt, ## args)
-*/
-#define tc_warn(fmt, args...) {while(0){}}
-
-#define tc_info(fmt, args...) \
- printk(KERN_INFO "crisv10_tc: ");printk(fmt, ## args)
-
-
-/* Debug print-outs for various traffic types */
-
-#define intr_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_intr warning: ");printk(fmt, ## args)
-/*
-#define intr_dbg(fmt, args...) \
- printk(KERN_DEBUG "crisv10_intr dbg: ");printk(fmt, ## args)
-*/
-#define intr_dbg(fmt, args...) {while(0){}}
-
-
-#define isoc_err(fmt, args...) \
- printk(KERN_ERR "crisv10_isoc error: ");printk(fmt, ## args)
-/*
-#define isoc_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_isoc warning: ");printk(fmt, ## args)
-*/
-#define isoc_warn(fmt, args...) {while(0){}}
-
-/*
-#define isoc_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_isoc dbg: ");printk(fmt, ## args)
-*/
-#define isoc_dbg(fmt, args...) {while(0){}}
-
-/*
-#define timer_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_timer warning: ");printk(fmt, ## args)
-*/
-#define timer_warn(fmt, args...) {while(0){}}
-
-/*
-#define timer_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_timer dbg: ");printk(fmt, ## args)
-*/
-#define timer_dbg(fmt, args...) {while(0){}}
-
-
-/* Debug printouts for events related to late finishing of URBs */
-/*
-#define late_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_late dbg: ");printk(fmt, ## args)
-*/
-#define late_dbg(fmt, args...) {while(0){}}
-
-#define late_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_late warning: ");printk(fmt, ## args)
-/*
-#define errno_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_errno dbg: ");printk(fmt, ## args)
-*/
-#define errno_dbg(fmt, args...) {while(0){}}
-
-
-#define dma_dbg(fmt, args...) \
- printk(KERN_INFO "crisv10_dma dbg: ");printk(fmt, ## args)
-#define dma_err(fmt, args...) \
- printk(KERN_ERR "crisv10_dma error: ");printk(fmt, ## args)
-#define dma_warn(fmt, args...) \
- printk(KERN_INFO "crisv10_dma warning: ");printk(fmt, ## args)
-#define dma_info(fmt, args...) \
- printk(KERN_INFO "crisv10_dma: ");printk(fmt, ## args)
-
-
-
-#define str_dir(pipe) \
- (usb_pipeout(pipe) ? "out" : "in")
-#define str_type(pipe) \
- ({ \
- char *s = "?"; \
- switch (usb_pipetype(pipe)) { \
- case PIPE_ISOCHRONOUS: s = "iso"; break; \
- case PIPE_INTERRUPT: s = "intr"; break; \
- case PIPE_CONTROL: s = "ctrl"; break; \
- case PIPE_BULK: s = "bulk"; break; \
- }; \
- s; \
- })
+++ /dev/null
-#ifndef __MTD_MTDRAM_H__
-#define __MTD_MTDRAM_H__
-
-#ifdef __KERNEL__
-#include <linux/mtd/mtd.h>
-int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
- unsigned long size, char *name);
-
-#endif /* __KERNEL__ */
-#endif /* __MTD_MTDRAM_H__ */
+++ /dev/null
-config AXIS_FIMAGE
- bool "Build fimage"
- depends LINUX_2_6_ETRAX
- default y
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-FOXBOARD:=custom MCM 416 816 832
-FOXBOARD_4MB:=MCM 416
-FOXBOARD_8MB:=custom 816 832
-
-define Image/BuildKernel
- for f in $(FOXBOARD); do \
- cp $(KDIR)/vmlinuz_$$$$f $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-zImage_$$$$f; \
- done
-endef
-
-define Image/Prepare
- for f in $(FOXBOARD); do \
- cp $(LINUX_DIR)/arch/cris/boot/zImage_$$$$f $(KDIR)/vmlinuz_$$$$f; \
- done
- $(MAKE) -C e100boot compile
- $(MAKE) -C mkfimage compile
- $(INSTALL_BIN) ./boot_linux $(BIN_DIR)
-endef
-
-define Image/Build/generic
- for f in $(2); do \
- mkfimage $(KDIR)/vmlinuz_$$$$f $(KDIR)/vmlinuz_$$$$f.tmp ; \
- cat $(KDIR)/vmlinuz_$$$$f.tmp $(KDIR)/root.$(1) > $(KDIR)/fimage.$(1)_$$$$f.tmp; \
- dd if=$(KDIR)/fimage.$(1)_$$$$f.tmp of=$(KDIR)/fimage.$(1)_$$$$f bs=$(3) conv=sync; \
- cp $(KDIR)/fimage.$(1)_$$$$f $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-fimage_$$$$f; \
- done
-endef
-
-define Image/Build/jffs2-64k
- $(call prepare_generic_jffs-64k,$(KDIR)/root.jff2-64k)
- $(call Image/Build/generic,$(1),$(FOXBOARD_4MB),4194304)
- $(call Image/Build/generic,$(1),$(FOXBOARD_8MB),8388608)
-endef
-
-define Image/Build/squashfs
- $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
- $(call Image/Build/generic,$(1),$(FOXBOARD_4MB),4194304)
- $(call Image/Build/generic,$(1),$(FOXBOARD_8MB),8388608)
-endef
-
-define Image/Build
- $(call Image/Build/$(1),$(1))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-#!/usr/bin/perl -w
-
-#*****************************************************************************
-#!
-#! FILE NAME : boot_linux
-#!
-#! PARAMETERS : -b <bootimage> the name of the boot image to use
-#! -d <device> the interface to use, e.g., eth1
-#! (defaults is eth0)
-#! -f save it in flash memory at address 0x10000
-#! -F save it in flash memory at address 0
-#! -h show some help
-#! -i <image> name of the image to use (default is fimage)
-#! -o <offset> the offset in the flash where the flashing
-#! starts
-#! -O <offset> the offset in the image file where the
-#! flashing starts from
-#! -p print the resulting etrax100boot command
-#! instead of executing it
-#! -s <size> how much to flash (default is the size of
-#! the flash minus the offset specified using
-#! -o or -f)
-#! -S <size> the size of the flash
-#!
-#! All sizes and offsets above can be specified as decimal
-#! numbers, or as hexadecimal numbers by prefixing them with 0x.
-#! It is also possible to use the suffixes k and M to specify
-#! kilo (1024) or mega (1048576).
-#!
-#! DESCRIPTION: Extract the start of the image and any registers that should
-#! be set from the kimage or fimage file, and then boot it.
-#!
-#! FUNCTIONS : convert_size
-#! extract_hw_settings
-#! get_dword
-#! calculate_sdram_init
-#! sdram_command
-#! print_help
-#!
-#!----------------------------------------------------------------------------
-#! HISTORY
-#!
-#! $Log: boot_linux,v $
-#! Revision 1.16 2004/11/01 16:32:27 starvik
-#! Corrected help text to avoid confusion
-#!
-#! Revision 1.15 2003/01/29 11:48:57 pkj
-#! Calculate a flash size large enough for the given image if the
-#! -S option is not specified.
-#!
-#! Revision 1.14 2002/11/18 14:40:09 pkj
-#! Make use of the --loop option to etrax100boot when initialising
-#! SDRAM memories. This requires a lot fewer options to be passed
-#! to the boot loader.
-#!
-#! Revision 1.13 2002/08/15 16:29:02 pkj
-#! * The -S option now accepts the size in bytes (just like the -s option).
-#! For backwards compatibility it still assumes sizes of 16 and less to
-#! be specified in MB.
-#! * The suffixes k and M can now be used with all sizes and offsets to
-#! specify them in kilo or mega.
-#!
-#! Revision 1.12 2002/08/15 15:27:34 pkj
-#! Use $opts{'x'} instead of $opt_x.
-#!
-#! Revision 1.11 2002/07/04 17:06:39 pkj
-#! * No longer specifies a bootfile by default (not needed any longer).
-#! * Implemented option -b to specify a bootfile.
-#! * Removed references to option -l (it was never implemented).
-#!
-#! Revision 1.10 2002/06/04 11:50:23 starvik
-#! Check if mrs_data is specified in kernelconfig (necessary for MCM)
-#!
-#! Revision 1.9 2002/01/29 10:38:26 pkj
-#! Change illegal to invalid.
-#!
-#! Revision 1.8 2001/09/13 12:32:10 pkj
-#! * Added option -S to specify the size of the flash (in MB), as -s
-#! is used to specify how much to flash nowadays.
-#! * Made the default size of the flash depend on the size of the image
-#! file. If it is bigger than 0x200100 then the flash is assumed to
-#! be 4 MB, otherwise it is assumed to be 2 MB.
-#! * Added verification of various options.
-#!
-#! Revision 1.7 2001/09/13 10:25:11 pkj
-#! Minor clean-up.
-#!
-#! Revision 1.6 2001/06/29 10:05:16 pkj
-#! Corrected check for SDRAM.
-#!
-#! Revision 1.5 2001/06/29 09:11:55 pkj
-#! Synchronised boot_elinux and boot_linux.
-#!
-#!----------------------------------------------------------------------------
-#! (C) Copyright 2001, Axis Communications AB, LUND, SWEDEN
-#!****************************************************************************
-# $Id: boot_linux,v 1.16 2004/11/01 16:32:27 starvik Exp $
-
-#****************** INCLUDE FILES SECTION ************************************
-
-use strict;
-
-use Getopt::Std;
-use File::Basename;
-
-#****************** VARIABLE DECLARATION SECTION *****************************
-
-use vars qw($my_name %opts);
-use vars qw($text_start $cmd);
-use vars qw($image_name $image_size);
-use vars qw($offset $source_offset $flash_size $flashing_size);
-use vars qw($sdram_timing_address $sdram_config_address);
-use vars qw($sdram_precharge $sdram_nop $sdram_refresh $sdram_mrs);
-
-#****************** CONSTANT SECTION *****************************************
-
-# Register addresses
-$sdram_timing_address = "b0000008";
-$sdram_config_address = "b000000c";
-
-# SDRAM commands
-$sdram_precharge = 3;
-$sdram_nop = 0;
-$sdram_refresh = 2;
-$sdram_mrs = 1;
-
-#****************** MAIN PROGRAM SECTION *************************************
-
-# The name of this program.
-$my_name = basename($0);
-
-# Get options
-getopts('b:d:fFhi:o:O:ps:S:', \%opts);
-
-&print_help if ($opts{'h'});
-
-# Name and existance of the image
-$image_name = ($opts{'i'} ? $opts{'i'} : 'fimage');
-die "Could not find the image $image_name!\n" unless (-s $image_name);
-
-if ($opts{'f'} || $opts{'F'})
-{
- $image_size = -s $image_name;
-
- $offset = ($opts{'f'} ? 0x10000 : 0);
-
- $offset = &convert_size($opts{'o'}) if (defined($opts{'o'}));
-
- die("$my_name: Invalid destination offset\n") if ($offset !~ /^\d+$/);
-
- my $base_name = basename($image_name);
- if ($base_name eq 'timage' || $base_name eq 'flash1.img')
- {
- $source_offset = 0;
- }
- else
- {
- $source_offset = $offset;
- }
-
- $source_offset = &convert_size($opts{'O'}) if (defined($opts{'O'}));
-
- die("$my_name: Invalid source offset\n") if ($source_offset !~ /^\d+$/);
- die("$my_name: Source offset > image size\n") if ($source_offset > $image_size);
-
- if (defined($opts{'S'}))
- {
- # Backwards compatibility to allow specifying the flash size in MB
- # without using an M suffix
- $opts{'S'} .= 'M' if ($opts{'S'} =~ /^\d+$/ && $opts{'S'} <= 16);
-
- $flash_size = &convert_size($opts{'S'});
- }
- else
- {
- # Calculate a flash size large enough for the image without the checksum
- # and HWID.
- $flash_size = ($image_size - $source_offset + $offset) & 0xFFFF0000;
- }
-
- die("$my_name: Invalid flash size\n") if ($flash_size !~ /^\d+$/);
- die("$my_name: Destination offset > flash size\n") if ($offset > $flash_size);
- if (defined($opts{'s'}))
- {
- $flashing_size = &convert_size($opts{'s'});
- }
- else
- {
- $flashing_size = $flash_size - $offset;
- }
-
- die("$my_name: Invalid size to flash\n") if ($flashing_size !~ /^\d+$/);
-
- if ($flashing_size > $flash_size - $offset)
- {
- $flashing_size = $flash_size - $offset;
- printf("Warning: Flashing size limited to 0x%lx due to the offset (0x%lx) and flash size (0x%lx).\n", $flashing_size, $offset, $flash_size);
- }
-
- if ($flashing_size > $image_size - $source_offset)
- {
- $flashing_size = $image_size - $source_offset;
- printf("Warning: Flashing size limited to 0x%lx due to the offset (0x%lx) and image size (0x%lx).\n", $flashing_size, $source_offset, $image_size);
- }
-}
-
-# Create the command line to boot the image
-if (system('./etrax100boot --help > /dev/null') == 0)
-{
- $cmd = './etrax100boot';
-}
-elsif (system('svinto_boot --help > /dev/null') == 0)
-{
- $cmd = 'svinto_boot';
-}
-else
-{
- die("Cannot find e100boot program in your PATH!\n");
-}
-
-$cmd .= " --device $opts{'d'}" if ($opts{'d'});
-
-$cmd .= &extract_hw_settings;
-
-$cmd .= " --bootfile $opts{'b'}" if ($opts{'b'});
-$cmd .= " --file $image_name $text_start";
-
-if ($opts{'f'} || $opts{'F'})
-{
- $cmd .= sprintf(" --flash %lx %lx %lx --jump 0",
- hex($text_start) + $source_offset, $offset, $flashing_size);
-}
-else
-{
- $cmd .= " --jump $text_start";
-}
-
-if ($opts{'p'})
-{
- print "Command:\n$cmd\n";
-}
-else
-{
- system($cmd);
-}
-
-exit 0;
-
-#****************** FUNCTION DEFINITION SECTION ******************************
-
-#*****************************************************************************
-##
-## FUNCTION NAME: convert_size
-##
-##****************************************************************************
-
-sub convert_size
-{
- my($arg) = @_;
- my $size;
-
- if ($arg =~ /^0x([\da-fA-F]+)([kM])?$/)
- {
- $size = hex($1);
- }
- elsif ($arg =~ /^(\d+)([kM])?$/)
- {
- $size = $1;
- }
- else
- {
- return -1;
- }
-
- if (!defined($2))
- {
- return $size;
- }
- elsif ($2 eq 'k')
- {
- return $size * 1024;
- }
- elsif ($2 eq 'M')
- {
- return $size * 1048576;
- }
-}
-
-#*****************************************************************************
-##
-## FUNCTION NAME: extract_hw_settings
-##
-##****************************************************************************
-
-sub extract_hw_settings
-{
- my $data;
- my $dbg_port;
- my $sdram_enabled;
- my $return_value = "";
- my $sdram_config;
-
- # The hw information table has the following format
- #
- # "HW_PARAM_MAGIC"
- # text_start (dword)
- # serial debg port (dword)
- # sdram enabled (dword)
- # register address (dword)
- # register value (dword)
- # ...
- # 0
-
- open(FILE, "$image_name") || die("Could not open '$image_name'");
-
- while (<FILE>)
- {
- if (m/HW_PARAM_MAGIC/g)
- {
- # Seek to first byte after magic
- seek(FILE, -length($_) + pos($_), 1);
- last;
- }
- }
-
- $text_start = &get_dword;
- $dbg_port = &get_dword;
- $sdram_enabled = int(&get_dword);
-
- while (1)
- {
- my $register = &get_dword;
- my $value = &get_dword;
-
- last if ($register eq "00000000");
-
- if ($sdram_enabled)
- {
- if ($register eq $sdram_config_address)
- {
- $sdram_config = $value;
- }
- elsif ($register eq $sdram_timing_address)
- {
- $return_value .= &calculate_sdram_init($value, $sdram_config);
- next;
- }
- }
-
- $return_value .= " --setreg $register $value";
- }
-
- close(FILE);
-
- return $return_value;
-}
-
-#*****************************************************************************
-##
-## FUNCTION NAME: get_dword
-##
-##****************************************************************************
-
-sub get_dword
-{
- my $data;
-
- read(FILE, $data, 4);
- return unpack("H8", pack("V", unpack("N", $data)));
-}
-
-#*****************************************************************************
-##
-## FUNCTION NAME: calculate_sdram_init
-##
-##****************************************************************************
-
-sub calculate_sdram_init
-{
- # Refer to ETRAX 100LX Designers Reference for a description of SDRAM
- # initialization
- my $sdram_init_val = hex($_[0]);
- my $sdram_config_val = hex($_[1]);
- my $bus_width = $sdram_config_val & 0x00800000;
- my $speed;
- my $cas_latency;
- my $mrs_data;
- my $temp;
- my $return_value;
- my $value;
-
- $mrs_data = ($sdram_init_val & 0x00ff0000) >> 16;
- $sdram_init_val &= 0x8000ffff; # Make sure mrs data is 0
- $sdram_init_val |= 0x80000000; # Make sure sdram is enabled
- $speed = $sdram_init_val & 0x1000;
- $cas_latency = $sdram_init_val & 0x3;
- if ($speed) # 100 MHz
- {
- $cas_latency += 2;
- }
- else # 50 MHz
- {
- $cas_latency += 1;
- }
-
- # Calculate value of mrs_data
- # CAS latency = 2 && bus_width = 32 => 0x40
- # CAS latency = 3 && bus_width = 32 => 0x60
- # CAS latency = 2 && bus_width = 16 => 0x20
- # CAS latency = 3 && bus_width = 16 => 0x30
- if ($mrs_data == 0)
- {
- if ($bus_width == 0) # 16 bits
- {
- $mrs_data = $cas_latency == 2 ? 0x20 : 0x30;
- }
- else # 32 bits
- {
- $mrs_data = $cas_latency == 2 ? 0x40 : 0x60;
- }
- }
-
- $temp = $sdram_init_val | 0x0000c000; # Disable refresh
- $return_value .= &sdram_command($temp);
- $return_value .= " --pause 20000";
-
- $return_value .= &sdram_command($temp, $sdram_precharge);
- $return_value .= &sdram_command($temp, $sdram_nop);
-
- $return_value .= " --setreg +0 7";
- $return_value .= " --label label1";
- $return_value .= &sdram_command($temp, $sdram_refresh);
- $return_value .= &sdram_command($temp, $sdram_nop);
- $return_value .= " --loop +0 label1";
-
- $return_value .= &sdram_command($temp, $sdram_mrs, $mrs_data);
- $return_value .= &sdram_command($temp, $sdram_nop);
-
- $return_value .= &sdram_command($sdram_init_val);
-
- return $return_value;
-}
-
-#*****************************************************************************
-##
-## FUNCTION NAME: sdram_command
-##
-##****************************************************************************
-
-sub sdram_command
-{
- my($temp, $value, $mrs_data) = @_;
-
- $value ||= 0;
- if ($value == $sdram_mrs)
- {
- $value = sprintf("%lx", $temp | ($value << 9) | ($mrs_data << 16));
- }
- else
- {
- $value = sprintf("%lx", $temp | ($value << 9));
- }
-
- return " --setreg $sdram_timing_address $value";
-}
-
-#*****************************************************************************
-##
-## FUNCTION NAME: print_help
-##
-##****************************************************************************
-
-sub print_help
-{
- print "\nAXIS $my_name, ", '$Revision: 1.16 $ $Date: 2004/11/01 16:32:27 $ ', "\n";
- die <<EOT;
-Copyright (C) 2001-2002 Axis Communications AB
-
-DESCRIPTION:
- This program is used to boot (and flash) a linux image to a box.
- It tries to extract the required ETRAX 100 settings from the image file.
-
-SYNTAX:
- $my_name [options]
-
-OPTIONS:
- -b <bootfile> : The boot image to use.
- -d <device> : The network interface to use, default is eth0.
- -f : Save the image in the flash memory starting at
- address 0x10000.
- -F : Save the image in the flash memory starting at
- address 0.
- -h : Print this help text.
- -i <image> : The path and name of the image to use, default
- is fimage.
- -o <offset> : The offset in the flash where the flashing starts.
- -O <offset> : The offset in the image file where the flashing
- starts from.
- -p : Print the resulting etrax100boot command instead
- of executing it.
- -s <size> : How much to flash (default is the size of the
- flash minus the offset specified using -o or -f).
- -S <size> : The size of the flash.
-
- All sizes and offsets above can be specified as decimal numbers, or as
- hexadecimal numbers by prefixing them with 0x. It is also possible to use
- the suffixes k and M to specify kilo (1024) or mega (1048576).
-
-EOT
-}
-
-#****************** END OF FILE boot_linux ***********************************
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=e100boot
-PKG_VERSION:=0.1
-PKG_RELEASE:=1
-
-PKG_SOURCE:=e100boot.tar.bz2
-PKG_SOURCE_URL:=http://www.acmesystems.it/download/owrt
-PKG_MD5SUM:=
-
-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
-
-CRLF_WORKAROUND=1
-
-include $(INCLUDE_DIR)/package.mk
-
-define Build/Compile
- make -C $(PKG_BUILD_DIR) STRIP=true
-endef
-
-define Build/InstallDev
- $(INSTALL_BIN) $(PKG_BUILD_DIR)/sbl/e100boot $(BIN_DIR)/etrax100boot
-endef
-
-$(eval $(call Build/DefaultTargets))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# $Id$
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=mkfimage
-PKG_VERSION:=0.1
-PKG_RELEASE:=1
-
-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
-
-include $(INCLUDE_DIR)/package.mk
-
-define Build/Compile
- mkdir -p $(PKG_BUILD_DIR)
- cp -r ./src/* $(PKG_BUILD_DIR)
- make -C $(PKG_BUILD_DIR)
-endef
-
-define Build/InstallDev
- $(INSTALL_BIN) $(PKG_BUILD_DIR)/mkfimage $(STAGING_DIR)/bin/mkfimage
-endef
-
-$(eval $(call Build/DefaultTargets))
+++ /dev/null
-
-all: mkfimage
- gcc mkfimage.c -o mkfimage
-
+++ /dev/null
-#include <stdio.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <string.h>
-#include <stdlib.h>
-
-int main(int argc, char **argv){
- unsigned char *buffer = malloc(64 * 1024);
- struct stat s;
- unsigned int size_vmlinux = 0, real_size_vmlinux = 0;
- const unsigned char *magic_str = "ACME_PART_MAGIC";
- unsigned int loop;
- unsigned char *magic;
-
- if(argc != 3){
- printf("%s in out\n", argv[0]);
- return 1;
- }
-
- printf("Generating image\n");
-
- FILE *vmlinux = fopen(argv[1], "r");
- FILE *vmlinux_out = fopen(argv[2], "w");
- if((!vmlinux) || (!vmlinux_out)){
- printf("Error opening a file\n");
- return 1;
- }
-
- stat(argv[1], &s);
- size_vmlinux = s.st_size;
- real_size_vmlinux = (size_vmlinux & 0xffff0000) + 0x10000;
-
- printf("vmlinux = 0x%.08X / 0x%.08X\n", size_vmlinux, real_size_vmlinux);
-
- unsigned int t = fread(buffer, 1, 64 * 1024, vmlinux);
- for(loop = 0; loop < (64 * 1024) - sizeof(magic_str); loop++){
- if(buffer[loop] == magic_str[0]){
- if((magic = strstr(&buffer[loop], magic_str))){
- printf("Magic at 0x%.08X %p %p\n", magic - buffer, magic, buffer);
- printf("Found Magic %X%X%X%X\n",
- buffer[loop + strlen(magic_str)],
- buffer[loop + strlen(magic_str) + 2],
- buffer[loop + strlen(magic_str) + 1],
- buffer[loop + strlen(magic_str) + 3]);
-
- buffer[loop + strlen(magic_str)] = real_size_vmlinux >> 24;
- buffer[loop + strlen(magic_str) + 2] = (real_size_vmlinux >> 16) & 0xff;
- buffer[loop + strlen(magic_str) + 1] = (real_size_vmlinux >> 8) & 0xff;
- buffer[loop + strlen(magic_str) + 3] = (real_size_vmlinux) & 0xff;
-
- printf("Replaced with %.02X%.02X%.02X%.02X\n",
- buffer[loop + strlen(magic_str)],
- buffer[loop + strlen(magic_str) + 2],
- buffer[loop + strlen(magic_str) + 1],
- buffer[loop + strlen(magic_str) + 3]);
-
- }
- }
- }
-
- fwrite(buffer, 1, 64 * 1024, vmlinux_out);
- real_size_vmlinux -= 64 * 1024;
- do {
- real_size_vmlinux -= 64 * 1024;
- memset(buffer, 0, 64 * 1024);
- fread(buffer, 1, 64 * 1024, vmlinux);
- fwrite(buffer, 1, 64 * 1024, vmlinux_out);
- } while (real_size_vmlinux);
-
- return 0;
-}
+++ /dev/null
-diff -urN linux-2.6.19.2.old/include/asm-cris/Kbuild linux-2.6.19.2.dev/include/asm-cris/Kbuild
---- linux-2.6.19.2.old/include/asm-cris/Kbuild 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/Kbuild 2007-02-09 16:51:34.000000000 +0100
-@@ -3,3 +3,6 @@
- header-y += arch-v10/ arch-v32/
-
- unifdef-y += rs485.h
-+unifdef-y += ethernet.h
-+unifdef-y += etraxgpio.h
-+unifdef-y += rtc.h
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/Kbuild linux-2.6.19.2.dev/include/asm-cris/arch-v10/Kbuild
---- linux-2.6.19.2.old/include/asm-cris/arch-v10/Kbuild 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/Kbuild 2007-02-26 21:03:05.000000000 +0100
-@@ -1,2 +1,5 @@
- header-y += ptrace.h
- header-y += user.h
-+header-y += svinto.h
-+header-y += sv_addr_ag.h
-+header-y += sv_addr.agh
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/bug.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/bug.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v10/bug.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/bug.h 2006-06-21 10:29:16.000000000 +0200
-@@ -0,0 +1,66 @@
-+#ifndef __ASM_CRIS_ARCH_BUG_H
-+#define __ASM_CRIS_ARCH_BUG_H
-+
-+#include <linux/stringify.h>
-+
-+#ifdef CONFIG_BUG
-+#ifdef CONFIG_DEBUG_BUGVERBOSE
-+/* The BUG() macro is used for marking obviously incorrect code paths.
-+ * It will cause a message with the file name and line number to be printed,
-+ * and then cause an oops. The message is actually printed by handle_BUG()
-+ * in arch/cris/kernel/traps.c, and the reason we use this method of storing
-+ * the file name and line number is that we do not want to affect the registers
-+ * by calling printk() before causing the oops.
-+ */
-+
-+#define BUG_PREFIX 0x0D7F
-+#define BUG_MAGIC 0x00001234
-+
-+struct bug_frame {
-+ unsigned short prefix;
-+ unsigned int magic;
-+ unsigned short clear;
-+ unsigned short movu;
-+ unsigned short line;
-+ unsigned short jump;
-+ unsigned char* filename;
-+};
-+
-+#if 0
-+/* Unfortunately this version of the macro does not work due to a problem
-+ * with the compiler (aka a bug) when compiling with -O2, which sometimes
-+ * erroneously causes the second input to be stored in a register...
-+ */
-+#define BUG() \
-+ __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
-+ "movu.w %0,$r0\n\t" \
-+ "jump %1\n\t" \
-+ : : "i" (__LINE__), "i" (__FILE__))
-+#else
-+/* This version will have to do for now, until the compiler is fixed.
-+ * The drawbacks of this version are that the file name will appear multiple
-+ * times in the .rodata section, and that __LINE__ and __FILE__ can probably
-+ * not be used like this with newer versions of gcc.
-+ */
-+#define BUG() \
-+ __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
-+ "movu.w " __stringify(__LINE__) ",$r0\n\t"\
-+ "jump 0f\n\t" \
-+ ".section .rodata\n" \
-+ "0:\t.string \"" __FILE__ "\"\n\t" \
-+ ".previous")
-+#endif
-+
-+#else
-+
-+/* This just causes an oops. */
-+#define BUG() (*(int *)0 = 0)
-+
-+#endif
-+
-+#define HAVE_ARCH_BUG
-+#endif
-+
-+#include <asm-generic/bug.h>
-+
-+#endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/ide.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/ide.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v10/ide.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/ide.h 2005-08-23 11:44:36.000000000 +0200
-@@ -32,7 +32,7 @@
- * together in a hwgroup, and will serialize accesses. this is good, because
- * we can't access more than one interface at the same time on ETRAX100.
- */
-- return 4;
-+ return 4;
- }
-
- static inline unsigned long ide_default_io_base(int index)
-@@ -61,15 +61,15 @@
- /* fill in ports for ATA addresses 0 to 7 */
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
-- hw->io_ports[i] = data_port |
-- IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
-+ hw->io_ports[i] = data_port |
-+ IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
- IO_STATE(R_ATA_CTRL_DATA, cs0, active);
- }
-
- /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
-
- hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
-- IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
-+ IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
- IO_STATE(R_ATA_CTRL_DATA, cs1, active);
-
- /* whats this for ? */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/io.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/io.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v10/io.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/io.h 2007-03-06 12:16:16.000000000 +0100
-@@ -56,6 +56,9 @@
- #define LED_RED 0x02
- #define LED_ORANGE (LED_GREEN | LED_RED)
-
-+#if defined(CONFIG_ETRAX_NO_LEDS)
-+#define LED_NETWORK_SET(x)
-+#else
- #if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
- #define LED_NETWORK_SET(x) \
- do { \
-@@ -80,6 +83,7 @@
- LED_ACTIVE_SET_R((x) & LED_RED); \
- } while (0)
- #endif
-+#endif
-
- #ifdef CONFIG_ETRAX_PA_LEDS
- #define LED_NETWORK_SET_G(x) \
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/juliette.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/juliette.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v10/juliette.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/juliette.h 2004-06-03 11:28:57.000000000 +0200
-@@ -0,0 +1,328 @@
-+#ifndef _ASM_JULIETTE_H
-+#define _ASM_JULIETTE_H
-+
-+#include <asm/arch/svinto.h>
-+
-+/* juliette _IOC_TYPE, bits 8 to 15 in ioctl cmd */
-+
-+#define JULIOCTYPE 42
-+
-+/* supported ioctl _IOC_NR's */
-+
-+#define JULSTARTDMA 0x1 /* start a picture asynchronously */
-+
-+/* set parameters */
-+
-+#define SETDEFAULT 0x2 /* CCD/VIDEO/SS1M */
-+#define SETPARAMETERS 0x3 /* CCD/VIDEO */
-+#define SETSIZE 0x4 /* CCD/VIDEO/SS1M */
-+#define SETCOMPRESSION 0x5 /* CCD/VIDEO/SS1M */
-+#define SETCOLORLEVEL 0x6 /* CCD/VIDEO */
-+#define SETBRIGHTNESS 0x7 /* CCD */
-+#define SETROTATION 0x8 /* CCD */
-+#define SETTEXT 0x9 /* CCD/VIDEO/SS1M */
-+#define SETCLOCK 0xa /* CCD/VIDEO/SS1M */
-+#define SETDATE 0xb /* CCD/VIDEO/SS1M */
-+#define SETTIMEFORMAT 0xc /* CCD/VIDEO/SS1M */
-+#define SETDATEFORMAT 0xd /* VIDEO */
-+#define SETTEXTALIGNMENT 0xe /* VIDEO */
-+#define SETFPS 0xf /* CCD/VIDEO/SS1M */
-+#define SETVGA 0xff /* VIDEO */
-+#define SETCOMMENT 0xfe /* CCD/VIDEO */
-+
-+/* get parameters */
-+
-+#define GETDRIVERTYPE 0x10 /* CCD/VIDEO/SS1M */
-+#define GETNBROFCAMERAS 0x11 /* CCD/VIDEO/SS1M */
-+#define GETPARAMETERS 0x12 /* CCD/VIDEO/SS1M */
-+#define GETBUFFERSIZE 0x13 /* CCD/VIDEO/SS1M */
-+#define GETVIDEOTYPE 0x14 /* VIDEO/SS1M */
-+#define GETVIDEOSIGNAL 0x15 /* VIDEO */
-+#define GETMODULATION 0x16 /* VIDEO */
-+#define GETDCYVALUES 0xa0 /* CCD /SS1M */
-+#define GETDCYWIDTH 0xa1 /* CCD /SS1M */
-+#define GETDCYHEIGHT 0xa2 /* CCD /SS1M */
-+#define GETSIZE 0xa3 /* CCD/VIDEO */
-+#define GETCOMPRESSION 0xa4 /* CCD/VIDEO */
-+
-+/* detect and get parameters */
-+
-+#define DETECTMODULATION 0x17 /* VIDEO */
-+#define DETECTVIDEOTYPE 0x18 /* VIDEO */
-+#define DETECTVIDEOSIGNAL 0x19 /* VIDEO */
-+
-+/* configure default parameters */
-+
-+#define CONFIGUREDEFAULT 0x20 /* CCD/VIDEO/SS1M */
-+#define DEFSIZE 0x21 /* CCD/VIDEO/SS1M */
-+#define DEFCOMPRESSION 0x22 /* CCD/VIDEO/SS1M */
-+#define DEFCOLORLEVEL 0x23 /* CCD/VIDEO */
-+#define DEFBRIGHTNESS 0x24 /* CCD */
-+#define DEFROTATION 0x25 /* CCD */
-+#define DEFWHITEBALANCE 0x26 /* CCD */
-+#define DEFEXPOSURE 0x27 /* CCD */
-+#define DEFAUTOEXPWINDOW 0x28 /* CCD */
-+#define DEFTEXT 0x29 /* CCD/VIDEO/SS1M */
-+#define DEFCLOCK 0x2a /* CCD/VIDEO/SS1M */
-+#define DEFDATE 0x2b /* CCD/VIDEO/SS1M */
-+#define DEFTIMEFORMAT 0x2c /* CCD/VIDEO/SS1M */
-+#define DEFDATEFORMAT 0x2d /* VIDEO */
-+#define DEFTEXTALIGNMENT 0x2e /* VIDEO */
-+#define DEFFPS 0x2f /* CCD/VIDEO/SS1M */
-+#define DEFTEXTSTRING 0x30 /* CCD/VIDEO/SS1M */
-+#define DEFHEADERINFO 0x31 /* CCD/VIDEO/SS1M */
-+#define DEFWEXAR 0x32 /* CCD */
-+#define DEFLINEDELAY 0x33 /* CCD */
-+#define DEFDISABLEDVIDEO 0x34 /* VIDEO */
-+#define DEFVIDEOTYPE 0x35 /* VIDEO */
-+#define DEFMODULATION 0x36 /* VIDEO */
-+#define DEFXOFFSET 0x37 /* VIDEO */
-+#define DEFYOFFSET 0x38 /* VIDEO */
-+#define DEFYCMODE 0x39 /* VIDEO */
-+#define DEFVCRMODE 0x3a /* VIDEO */
-+#define DEFSTOREDCYVALUES 0x3b /* CCD/VIDEO/SS1M */
-+#define DEFWCDS 0x3c /* CCD */
-+#define DEFVGA 0x3d /* VIDEO */
-+#define DEFCOMMENT 0x3e /* CCD/VIDEO */
-+#define DEFCOMMENTSIZE 0x3f /* CCD/VIDEO */
-+#define DEFCOMMENTTEXT 0x50 /* CCD/VIDEO */
-+#define DEFSTOREDCYTEXT 0x51 /* VIDEO */
-+
-+
-+#define JULABORTDMA 0x70 /* Abort current DMA transfer */
-+
-+/* juliette general i/o port */
-+
-+#define JIO_READBITS 0x40 /* read and return current port bits */
-+#define JIO_SETBITS 0x41 /* set bits marked by 1 in the argument */
-+#define JIO_CLRBITS 0x42 /* clr bits marked by 1 in the argument */
-+#define JIO_READDIR 0x43 /* read direction, 0=input 1=output */
-+#define JIO_SETINPUT 0x44 /* set direction, 0=unchanged 1=input
-+ returns current dir */
-+#define JIO_SETOUTPUT 0x45 /* set direction, 0=unchanged 1=output
-+ returns current dir */
-+
-+/**** YumYum internal adresses ****/
-+
-+/* Juliette buffer addresses */
-+
-+#define BUFFER1_VIDEO 0x1100
-+#define BUFFER2_VIDEO 0x2800
-+#define ACDC_BUFF_VIDEO 0x0aaa
-+#define BUFFER1 0x1700
-+#define BUFFER2 0x2b01
-+#define ACDC_BUFFER 0x1200
-+#define BUFFER1_SS1M 0x1100
-+#define BUFFER2_SS1M 0x2800
-+#define ACDC_BUFF_SS1M 0x0900
-+
-+/* Juliette parameter memory addresses */
-+
-+#define PA_BUFFER_CNT 0x3f09 /* CCD/VIDEO */
-+#define PA_CCD_BUFFER 0x3f10 /* CCD */
-+#define PA_VIDEO_BUFFER 0x3f10 /* VIDEO */
-+#define PA_DCT_BUFFER 0x3f11 /* CCD/VIDEO */
-+#define PA_TEMP 0x3f12 /* CCD/VIDEO */
-+#define PA_VIDEOLINE_RD 0x3f13 /* VIDEO */
-+#define PA_VIDEOLINE_WR 0x3f14 /* VIDEO */
-+#define PA_VI_HDELAY0 0x3f15 /* VIDEO */
-+#define PA_VI_VDELAY0 0x3f16 /* VIDEO */
-+#define PA_VI_HDELAY1 0x3f17 /* VIDEO */
-+#define PA_VI_VDELAY1 0x3f18 /* VIDEO */
-+#define PA_VI_HDELAY2 0x3f19 /* VIDEO */
-+#define PA_VI_VDELAY2 0x3f1a /* VIDEO */
-+#define PA_VI_HDELAY3 0x3f1b /* VIDEO */
-+#define PA_VI_VDELAY3 0x3f1c /* VIDEO */
-+#define PA_VI_CTRL 0x3f20 /* VIDEO */
-+#define PA_JPEG_CTRL 0x3f22 /* CCD/VIDEO */
-+#define PA_BUFFER_SIZE 0x3f24 /* CCD/VIDEO */
-+#define PA_PAL_NTSC 0x3f25 /* VIDEO */
-+#define PA_MACROBLOCKS 0x3f26 /* CCD/VIDEO */
-+#define PA_COLOR 0x3f27 /* VIDEO */
-+#define PA_MEMCH1CNT2 0x3f28 /* CCD/VIDEO */
-+#define PA_MEMCH1CNT3 0x3f29 /* VIDEO */
-+#define PA_MEMCH1STR2 0x3f2a /* CCD/VIDEO */
-+#define PA_MEMCH1STR3 0x3f2b /* VIDEO */
-+#define PA_BUFFERS 0x3f2c /* CCD/VIDEO */
-+#define PA_PROGRAM 0x3f2d /* CCD/VIDEO */
-+#define PA_ROTATION 0x3f2e /* CCD */
-+#define PA_PC 0x3f30 /* CCD/VIDEO */
-+#define PA_PC2 0x3f31 /* VIDEO */
-+#define PA_ODD_LINE 0x3f32 /* VIDEO */
-+#define PA_EXP_DELAY 0x3f34 /* CCD */
-+#define PA_MACROBLOCK_CNT 0x3f35 /* CCD/VIDEO */
-+#define PA_DRAM_PTR1_L 0x3f36 /* CCD/VIDEO */
-+#define PA_CLPOB_CNT 0x3f37 /* CCD */
-+#define PA_DRAM_PTR1_H 0x3f38 /* CCD/VIDEO */
-+#define PA_DRAM_PTR2_L 0x3f3a /* VIDEO */
-+#define PA_DRAM_PTR2_H 0x3f3c /* VIDEO */
-+#define PA_CCD_LINE_CNT 0x3f3f /* CCD */
-+#define PA_VIDEO_LINE_CNT 0x3f3f /* VIDEO */
-+#define PA_TEXT 0x3f41 /* CCD/VIDEO */
-+#define PA_CAMERA_CHANGED 0x3f42 /* VIDEO */
-+#define PA_TEXTALIGNMENT 0x3f43 /* VIDEO */
-+#define PA_DISABLED 0x3f44 /* VIDEO */
-+#define PA_MACROBLOCKTEXT 0x3f45 /* VIDEO */
-+#define PA_VGA 0x3f46 /* VIDEO */
-+#define PA_ZERO 0x3ffe /* VIDEO */
-+#define PA_NULL 0x3fff /* CCD/VIDEO */
-+
-+typedef enum {
-+ jpeg = 0,
-+ dummy = 1
-+} request_type;
-+
-+typedef enum {
-+ hugesize = 0,
-+ fullsize = 1,
-+ halfsize = 2,
-+ fieldsize = 3
-+} size_type;
-+
-+typedef enum {
-+ min = 0,
-+ low = 1,
-+ medium = 2,
-+ high = 3,
-+ very_high = 4,
-+ very_low = 5,
-+ q1 = 6,
-+ q2 = 7,
-+ q3 = 8,
-+ q4 = 9,
-+ q5 = 10,
-+ q6 = 11
-+} compr_type;
-+
-+typedef enum {
-+ deg_0 = 0,
-+ deg_180 = 1,
-+ deg_90 = 2,
-+ deg_270 = 3
-+} rotation_type;
-+
-+typedef enum {
-+ auto_white = 0,
-+ hold = 1,
-+ fixed_outdoor = 2,
-+ fixed_indoor = 3,
-+ fixed_fluor = 4
-+} white_balance_type;
-+
-+typedef enum {
-+ auto_exp = 0,
-+ fixed_exp = 1
-+} exposure_type;
-+
-+typedef enum {
-+ no_window = 0,
-+ center = 1,
-+ top = 2,
-+ lower = 3,
-+ left = 4,
-+ right = 5,
-+ spot = 6,
-+ cw = 7
-+} exp_window_type;
-+
-+typedef enum {
-+ h_24 = 0,
-+ h_12 = 1,
-+ h_24P = 2
-+} hour_type;
-+
-+typedef enum {
-+ standard = 0,
-+ YYYY_MM_DD = 1,
-+ Www_Mmm_DD_YYYY = 2,
-+ Www_DD_MM_YYYY = 3
-+} date_type;
-+
-+typedef enum {
-+ left_align = 0,
-+ center_align = 1,
-+ right_align = 2
-+} alignment_type;
-+
-+typedef enum {
-+ off = 0,
-+ on = 1,
-+ no = 0,
-+ yes = 1
-+} enable_type;
-+
-+typedef enum {
-+ disabled = 0,
-+ enabled = 1,
-+ extended = 2
-+} comment_type;
-+
-+typedef enum {
-+ pal = 0,
-+ ntsc = 1
-+} video_type;
-+
-+typedef enum {
-+ pal_bghi_ntsc_m = 0,
-+ ntsc_4_43_50hz_pal_4_43_60hz = 1,
-+ pal_n_ntsc_4_43_60hz = 2,
-+ ntsc_n_pal_m = 3,
-+ secam_pal_4_43_60hz = 4
-+} modulation_type;
-+
-+typedef enum {
-+ cam0 = 0,
-+ cam1 = 1,
-+ cam2 = 2,
-+ cam3 = 3,
-+ quad = 32
-+} camera_type;
-+
-+typedef enum {
-+ video_driver = 0,
-+ ccd_driver = 1
-+} driver_type;
-+
-+struct jul_param {
-+ request_type req_type;
-+ size_type size;
-+ compr_type compression;
-+ rotation_type rotation;
-+ int color_level;
-+ int brightness;
-+ white_balance_type white_balance;
-+ exposure_type exposure;
-+ exp_window_type auto_exp_window;
-+ hour_type time_format;
-+ date_type date_format;
-+ alignment_type text_alignment;
-+ enable_type text;
-+ enable_type clock;
-+ enable_type date;
-+ enable_type fps;
-+ enable_type vga;
-+ enable_type comment;
-+};
-+
-+struct video_param {
-+ enable_type disabled;
-+ modulation_type modulation;
-+ video_type video;
-+ enable_type signal;
-+ enable_type vcr;
-+ int xoffset;
-+ int yoffset;
-+};
-+
-+/* The juliette_request structure is used during the JULSTARTDMA asynchronous
-+ * picture-taking ioctl call as an argument to specify a buffer which will get
-+ * the final picture.
-+ */
-+
-+struct juliette_request {
-+ char *buf; /* Pointer to the buffer to hold picture data */
-+ unsigned int buflen; /* Length of the above buffer */
-+ unsigned int size; /* Resulting length, 0 if the picture is not ready */
-+};
-+
-+#endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/Kbuild linux-2.6.19.2.dev/include/asm-cris/arch-v32/Kbuild
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/Kbuild 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/Kbuild 2007-02-09 16:51:34.000000000 +0100
-@@ -1,2 +1,3 @@
- header-y += ptrace.h
- header-y += user.h
-+header-y += cryptocop.h
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/arbiter.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/arbiter.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/arbiter.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/arbiter.h 2006-10-13 14:45:18.000000000 +0200
-@@ -22,6 +22,7 @@
-
- int crisv32_arbiter_allocate_bandwidth(int client, int region,
- unsigned long bandwidth);
-+void crisv32_arbiter_deallocate_bandwidth(int client, int region);
- int crisv32_arbiter_watch(unsigned long start, unsigned long size,
- unsigned long clients, unsigned long accesses,
- watch_callback* cb);
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/bitops.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/bitops.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/bitops.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/bitops.h 2005-08-23 11:44:37.000000000 +0200
-@@ -16,7 +16,7 @@
- __asm__ __volatile__ ("swapnwbr %0\n\t"
- "lz %0,%0"
- : "=r" (res) : "0" (w));
--
-+
- return res;
- }
-
-@@ -28,7 +28,7 @@
- __asm__ __volatile__ ("swapwbr %0\n\t"
- "lz %0,%0"
- : "=r" (res) : "0" (w));
--
-+
- return res;
- }
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/board.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/board.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/board.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/board.h 2007-01-29 15:05:01.000000000 +0100
-@@ -0,0 +1,74 @@
-+/*
-+ * linux/include/asm-cris/arch-v32/board.h
-+ *
-+ * Types for board-specific data.
-+ *
-+ * Copyright (C) 2007 Axis Communications AB
-+ */
-+
-+#ifndef __ARCH_V32_BOARD_H
-+#define __ARCH_V32_BOARD_H
-+
-+/* A tuple for a regi base and an interrupt. */
-+struct crisv32_regi_n_int {
-+ u32 regi;
-+ u32 irq;
-+};
-+
-+/*
-+ * SPI and SD/MMC types, arranged such that the data for mmc_spi is an
-+ * add-on to SPI; the SPI data does not contain anything about SD/MMC
-+ * and the SPI controller driver can't access it. SPI data is
-+ * arranged to allow sharing common functions between SSER and GPIO.
-+ */
-+
-+/* Hardware identification for the bitbanged GPIO SPI controller. */
-+struct crisv32_spi_gpio_controller_data {
-+ /* Names of the pins. */
-+ const char *cs;
-+ const char *miso;
-+ const char *mosi;
-+ const char *sclk;
-+};
-+
-+/* Similar for the SSER SPI controller. */
-+struct crisv32_spi_sser_controller_data {
-+ /* How to connect pins and claim the SSER interface and the DMA
-+ channels. */
-+ int (*iface_allocate)(struct crisv32_regi_n_int *sser,
-+ struct crisv32_regi_n_int *dmain,
-+ struct crisv32_regi_n_int *dmaout);
-+ void (*iface_free)(void);
-+
-+ /* Whether DMA is to be used. */
-+ int using_dma;
-+};
-+
-+struct crisv32_mmc_spi_pinstate;
-+
-+/*
-+ * Regardless of SPI controller, these pins are needed in addition to
-+ * the SPI pins when the used as a SD/MMC SPI controller.
-+ */
-+struct crisv32_mmc_spi_pindata {
-+ /* Names of the pins. */
-+ const char *card_detect;
-+ const char *write_protect;
-+
-+ /* Related private state to interface to the mmc_spi API. */
-+ struct crisv32_mmc_spi_pinstate *pinstate;
-+};
-+
-+/* When SD/MMC SPI on GPIO, here's all the hardware-identifying data. */
-+struct crisv32_mmc_spi_gpio_hwdata {
-+ struct crisv32_spi_gpio_controller_data spi;
-+ struct crisv32_mmc_spi_pindata mmc;
-+};
-+
-+/* Similar for SSER. */
-+struct crisv32_mmc_spi_sser_hwdata {
-+ struct crisv32_spi_sser_controller_data spi;
-+ struct crisv32_mmc_spi_pindata mmc;
-+};
-+
-+#endif /* __ARCH_V32_BOARD_H */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/bug.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/bug.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/bug.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/bug.h 2006-06-21 10:29:16.000000000 +0200
-@@ -0,0 +1,69 @@
-+#ifndef __ASM_CRIS_ARCH_BUG_H
-+#define __ASM_CRIS_ARCH_BUG_H
-+
-+#include <linux/stringify.h>
-+
-+#ifdef CONFIG_BUG
-+#ifdef CONFIG_DEBUG_BUGVERBOSE
-+/* The BUG() macro is used for marking obviously incorrect code paths.
-+ * It will cause a message with the file name and line number to be printed,
-+ * and then cause an oops. The message is actually printed by handle_BUG()
-+ * in arch/cris/kernel/traps.c, and the reason we use this method of storing
-+ * the file name and line number is that we do not want to affect the registers
-+ * by calling printk() before causing the oops (this is not entirely true
-+ * for CRISv32 since we need to modify the $acr register).
-+ */
-+
-+#define BUG_PREFIX 0xFE6F
-+#define BUG_MAGIC 0x00001234
-+
-+struct bug_frame {
-+ unsigned short prefix;
-+ unsigned int magic;
-+ unsigned short clear;
-+ unsigned short movu;
-+ unsigned short line;
-+ unsigned short jump;
-+ unsigned char* filename;
-+};
-+
-+#if 0
-+/* Unfortunately this version of the macro does not work due to a problem
-+ * with the compiler (aka a bug) when compiling with -O2, which sometimes
-+ * erroneously causes the second input to be stored in a register...
-+ */
-+#define BUG() \
-+ __asm__ __volatile__ ("move.d [" __stringify(BUG_MAGIC) "],$acr\n\t"\
-+ "clear.d [$acr]\n\t" \
-+ "movu.w %0,$r0\n\t" \
-+ "jump %1\n\t" \
-+ : : "i" (__LINE__), "i" (__FILE__))
-+#else
-+/* This version will have to do for now, until the compiler is fixed.
-+ * The drawbacks of this version are that the file name will appear multiple
-+ * times in the .rodata section, and that __LINE__ and __FILE__ can probably
-+ * not be used like this with newer versions of gcc.
-+ */
-+#define BUG() \
-+ __asm__ __volatile__ ("move.d " __stringify(BUG_MAGIC) ",$acr\n\t"\
-+ "clear.d [$acr]\n\t" \
-+ "movu.w " __stringify(__LINE__) ",$r0\n\t"\
-+ "jump 0f\n\t" \
-+ ".section .rodata\n" \
-+ "0:\t.string \"" __FILE__ "\"\n\t" \
-+ ".previous")
-+#endif
-+
-+#else
-+
-+/* This just causes an oops. */
-+#define BUG() (*(int *)0 = 0)
-+
-+#endif
-+
-+#define HAVE_ARCH_BUG
-+#endif
-+
-+#include <asm-generic/bug.h>
-+
-+#endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/cache.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/cache.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/cache.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/cache.h 2007-01-05 09:59:53.000000000 +0100
-@@ -1,8 +1,19 @@
- #ifndef _ASM_CRIS_ARCH_CACHE_H
- #define _ASM_CRIS_ARCH_CACHE_H
-
-+#include <asm/arch/hwregs/dma.h>
-+
- /* A cache-line is 32 bytes. */
- #define L1_CACHE_BYTES 32
- #define L1_CACHE_SHIFT 5
-
-+void flush_dma_list(dma_descr_data* descr);
-+void flush_dma_descr(dma_descr_data* descr, int flush_buf);
-+
-+#define flush_dma_context(c) \
-+ flush_dma_list(phys_to_virt((c)->saved_data));
-+
-+void cris_flush_cache_range(void* buf, unsigned long len);
-+void cris_flush_cache(void);
-+
- #endif /* _ASM_CRIS_ARCH_CACHE_H */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/cryptocop.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/cryptocop.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/cryptocop.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/cryptocop.h 2005-04-20 14:33:25.000000000 +0200
-@@ -160,7 +160,7 @@
- cryptocop_source_dma = 0,
- cryptocop_source_des,
- cryptocop_source_3des,
-- cryptocop_source_aes,
-+ cryptocop_source_aes,
- cryptocop_source_md5,
- cryptocop_source_sha1,
- cryptocop_source_csum,
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/delay.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/delay.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/delay.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/delay.h 2006-10-11 19:46:19.000000000 +0200
-@@ -1,6 +1,16 @@
- #ifndef _ASM_CRIS_ARCH_DELAY_H
- #define _ASM_CRIS_ARCH_DELAY_H
-
-+extern void cris_delay10ns(u32 n10ns);
-+#define udelay(u) cris_delay10ns((u)*100)
-+#define ndelay(n) cris_delay10ns(((n)+9)/10)
-+
-+/*
-+ * Not used anymore for udelay or ndelay. Referenced by
-+ * e.g. init/calibrate.c. All other references are likely bugs;
-+ * should be replaced by mdelay, udelay or ndelay.
-+ */
-+
- static inline void
- __delay(int loops)
- {
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/dma.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/dma.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/dma.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/dma.h 2005-05-02 12:43:02.000000000 +0200
-@@ -67,7 +67,7 @@
- dma_ext3
- };
-
--int crisv32_request_dma(unsigned int dmanr, const char * device_id,
-+int crisv32_request_dma(unsigned int dmanr, const char * device_id,
- unsigned options, unsigned bandwidth, enum dma_owner owner);
- void crisv32_free_dma(unsigned int dmanr);
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/Makefile linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/Makefile
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/Makefile 2004-01-07 22:16:18.000000000 +0100
-@@ -126,9 +126,9 @@
-
- # From /n/asic/projects/guinness/design/
- reg_map.h: $(DESIGNDIR)/top/rtl/global.rmap $(DESIGNDIR)/top/mod/modreg.rmap
-- $(RDES2C) -base 0xb0000000 $^
-+ $(RDES2C) -base 0xb0000000 $^
- reg_map_asm.h: $(DESIGNDIR)/top/rtl/global.rmap $(DESIGNDIR)/top/mod/modreg.rmap
-- $(RDES2C) -base 0xb0000000 -asm -outfile $@ $^
-+ $(RDES2C) -base 0xb0000000 -asm -outfile $@ $^
-
- reg_rdwr.h: $(DESIGNDIR)/top/sw/include/reg_rdwr.h
- cat $< | sed -e 's/\$$Id\:/id\:/g' >$@
-@@ -171,14 +171,14 @@
- done
-
- .PHONY: axw
--## %.axw - Generate the specified .axw file (doesn't work for all files
-+## %.axw - Generate the specified .axw file (doesn't work for all files
- ## due to inconsistent naming ir .r files.
- %.axw: axw
- @for RDES in $(REGDESC); do \
- if echo "$$RDES" | grep $* ; then \
- $(RDES2TXT) $$RDES; \
- fi \
-- done
-+ done
-
- .PHONY: clean
- ## clean - Remove .h files and .axw files.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/ata/rtl/ata_regs.r
-- * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
-+ * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
- * last modfied: Mon Apr 11 16:06:25 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/ata_defs_asm.h ../../inst/ata/rtl/ata_regs.r
- * id: $Id: ata_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_core_regs.r
-- * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
-+ * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
- * last modfied: Mon Apr 11 16:06:33 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_core_defs_asm.h ../../inst/bif/rtl/bif_core_regs.r
- * id: $Id: bif_core_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_dma_regs.r
-- * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
-+ * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
- * last modfied: Mon Apr 11 16:06:33 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_dma_defs_asm.h ../../inst/bif/rtl/bif_dma_regs.r
- * id: $Id: bif_dma_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_slave_regs.r
-- * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
-+ * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
- * last modfied: Mon Apr 11 16:06:34 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_slave_defs_asm.h ../../inst/bif/rtl/bif_slave_regs.r
- * id: $Id: bif_slave_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../rtl/config_regs.r
-- * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
-+ * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
- * last modfied: Thu Mar 4 12:34:39 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/config_defs_asm.h ../../rtl/config_regs.r
- * id: $Id: config_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h 2005-04-24 20:31:04.000000000 +0200
-@@ -3,7 +3,7 @@
- version . */
-
- #ifndef _______INST_CRISP_DOC_CPU_VECT_R
--#define _______INST_CRISP_DOC_CPU_VECT_R
-+#define _______INST_CRISP_DOC_CPU_VECT_R
- #define NMI_INTR_VECT 0x00
- #define RESERVED_1_INTR_VECT 0x01
- #define RESERVED_2_INTR_VECT 0x02
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/crisp/doc/cris.r
-- * id: cris.r,v 1.6 2004/05/05 07:41:12 perz Exp
-+ * id: cris.r,v 1.6 2004/05/05 07:41:12 perz Exp
- * last modfied: Mon Apr 11 16:06:39 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/cris_defs_asm.h ../../inst/crisp/doc/cris.r
- * id: $Id: cris_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
-- * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
-+ * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
- * last modfied: Mon Apr 11 16:06:51 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/dma_defs_asm.h ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
- * id: $Id: dma_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/eth/rtl/eth_regs.r
-- * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
-+ * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
- * last modfied: Mon Apr 11 16:07:03 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/eth_defs_asm.h ../../inst/eth/rtl/eth_regs.r
- * id: $Id: eth_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/gio/rtl/gio_regs.r
-- * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
-+ * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
- * last modfied: Mon Apr 11 16:07:47 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/gio_defs_asm.h ../../inst/gio/rtl/gio_regs.r
- * id: $Id: gio_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h 2005-04-24 20:31:04.000000000 +0200
-@@ -3,7 +3,7 @@
- version . */
-
- #ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
--#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
-+#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
- #define MEMARB_INTR_VECT 0x31
- #define GEN_IO_INTR_VECT 0x32
- #define IOP0_INTR_VECT 0x33
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r
-- * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
-+ * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
- * last modfied: Mon Apr 11 16:08:03 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/intr_vect_defs_asm.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r
- * id: $Id: intr_vect_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../mod/irq_nmi.r
- * id: <not found>
- * last modfied: Thu Jan 22 09:22:43 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/irq_nmi_defs_asm.h ../../mod/irq_nmi.r
- * id: $Id: irq_nmi_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/memarb/rtl/guinness/marb_top.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:12:16 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/marb_defs_asm.h ../../inst/memarb/rtl/guinness/marb_top.r
- * id: $Id: marb_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-@@ -313,7 +313,7 @@
- * file: ../../inst/memarb/rtl/guinness/marb_top.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:12:16 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/marb_defs_asm.h ../../inst/memarb/rtl/guinness/marb_top.r
- * id: $Id: marb_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/mmu/doc/mmu_regs.r
-- * id: mmu_regs.r,v 1.12 2004/05/06 13:48:45 mikaeln Exp
-+ * id: mmu_regs.r,v 1.12 2004/05/06 13:48:45 mikaeln Exp
- * last modfied: Mon Apr 11 17:03:20 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/mmu_defs_asm.h ../../inst/mmu/doc/mmu_regs.r
- * id: $Id: mmu_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
-- * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
-+ * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
- * last modfied: Mon Apr 11 16:09:11 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/pinmux_defs_asm.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- * id: $Id: pinmux_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,17 +4,17 @@
- /*
- * This file is autogenerated from
- * file: ../../mod/fakereg.rmap
-- * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
-+ * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
- * last modified: Wed Feb 11 20:53:25 2004
- * file: ../../rtl/global.rmap
-- * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
-+ * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
- * last modified: Mon Aug 18 17:08:23 2003
- * file: ../../mod/modreg.rmap
-- * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
-+ * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
- * last modified: Fri Feb 20 16:40:04 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/reg_map_asm.h -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
-- * id: $Id: reg_map_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
-+ * id: $Id: reg_map_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/rt_trace/rtl/rt_regs.r
-- * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
-+ * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
- * last modfied: Mon Apr 11 16:09:14 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/rt_trace_defs_asm.h ../../inst/rt_trace/rtl/rt_regs.r
- * id: $Id: rt_trace_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/ser/rtl/ser_regs.r
-- * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
-+ * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
- * last modfied: Mon Apr 11 16:09:21 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/ser_defs_asm.h ../../inst/ser/rtl/ser_regs.r
- * id: $Id: ser_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/syncser/rtl/sser_regs.r
-- * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
-+ * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
- * last modfied: Mon Apr 11 16:09:48 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/sser_defs_asm.h ../../inst/syncser/rtl/sser_regs.r
- * id: $Id: sser_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/strcop/rtl/strcop_regs.r
-- * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
-+ * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
- * last modfied: Mon Apr 11 16:09:38 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/strcop_defs_asm.h ../../inst/strcop/rtl/strcop_regs.r
- * id: $Id: strcop_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/strmux/rtl/guinness/strmux_regs.r
-- * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
-+ * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
- * last modfied: Mon Apr 11 16:09:43 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/strmux_defs_asm.h ../../inst/strmux/rtl/guinness/strmux_regs.r
- * id: $Id: strmux_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/timer/rtl/timer_regs.r
-- * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
-+ * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
- * last modfied: Mon Apr 11 16:09:53 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r
- * id: $Id: timer_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ata_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ata_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ata_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ata_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/ata/rtl/ata_regs.r
-- * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
-+ * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
- * last modfied: Mon Apr 11 16:06:25 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile ata_defs.h ../../inst/ata/rtl/ata_regs.r
- * id: $Id: ata_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_core_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_core_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_core_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_core_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_core_regs.r
-- * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
-+ * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
- * last modfied: Mon Apr 11 16:06:33 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_core_defs.h ../../inst/bif/rtl/bif_core_regs.r
- * id: $Id: bif_core_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_dma_regs.r
-- * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
-+ * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
- * last modfied: Mon Apr 11 16:06:33 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_dma_defs.h ../../inst/bif/rtl/bif_dma_regs.r
- * id: $Id: bif_dma_defs.h,v 1.2 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/bif/rtl/bif_slave_regs.r
-- * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
-+ * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
- * last modfied: Mon Apr 11 16:06:34 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_slave_defs.h ../../inst/bif/rtl/bif_slave_regs.r
- * id: $Id: bif_slave_defs.h,v 1.2 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/config_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/config_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/config_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/config_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../rtl/config_regs.r
-- * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
-+ * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
- * last modfied: Thu Mar 4 12:34:39 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile config_defs.h ../../rtl/config_regs.r
- * id: $Id: config_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/cpu_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/cpu_vect.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/cpu_vect.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/cpu_vect.h 2005-04-24 20:30:58.000000000 +0200
-@@ -3,7 +3,7 @@
- version . */
-
- #ifndef _______INST_CRISP_DOC_CPU_VECT_R
--#define _______INST_CRISP_DOC_CPU_VECT_R
-+#define _______INST_CRISP_DOC_CPU_VECT_R
- #define NMI_INTR_VECT 0x00
- #define RESERVED_1_INTR_VECT 0x01
- #define RESERVED_2_INTR_VECT 0x02
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma.h 2006-06-25 17:01:59.000000000 +0200
-@@ -1,6 +1,6 @@
--/* $Id: dma.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
-+/* $Id: dma.h,v 1.8 2006/06/25 15:01:59 starvik Exp $
- *
-- * DMA C definitions and help macros
-+ * DMA C definitions and help macros
- *
- */
-
-@@ -98,10 +98,10 @@
-
- // give stream command
- #define DMA_WR_CMD( inst, cmd_par ) \
-- do { reg_dma_rw_stream_cmd r = {0}; \
-- do { r = REG_RD( dma, inst, rw_stream_cmd ); } while( r.busy ); \
-- r.cmd = (cmd_par); \
-- REG_WR( dma, inst, rw_stream_cmd, r ); \
-+ do { reg_dma_rw_stream_cmd __x = {0}; \
-+ do { __x = REG_RD( dma, inst, rw_stream_cmd ); } while( __x.busy ); \
-+ __x.cmd = (cmd_par); \
-+ REG_WR( dma, inst, rw_stream_cmd, __x ); \
- } while( 0 )
-
- // load: g,c,d:burst
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
-- * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
-+ * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
- * last modfied: Mon Apr 11 16:06:51 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile dma_defs.h ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
- * id: $Id: dma_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs.h 2006-01-26 14:45:30.000000000 +0100
-@@ -3,12 +3,12 @@
-
- /*
- * This file is autogenerated from
-- * file: ../../inst/eth/rtl/eth_regs.r
-- * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
-- * last modfied: Mon Apr 11 16:07:03 2005
-- *
-- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile eth_defs.h ../../inst/eth/rtl/eth_regs.r
-- * id: $Id: eth_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
-+ * file: eth.r
-+ * id: eth_regs.r,v 1.16 2005/05/20 15:41:22 perz Exp
-+ * last modfied: Mon Jan 9 06:06:41 2006
-+ *
-+ * by /n/asic/design/tools/rdesc/rdes2c eth.r
-+ * id: $Id: eth_defs.h,v 1.7 2006/01/26 13:45:30 karljope Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
-@@ -116,26 +116,28 @@
-
- /* Register rw_ga_lo, scope eth, type rw */
- typedef struct {
-- unsigned int table : 32;
-+ unsigned int tbl : 32;
- } reg_eth_rw_ga_lo;
- #define REG_RD_ADDR_eth_rw_ga_lo 16
- #define REG_WR_ADDR_eth_rw_ga_lo 16
-
- /* Register rw_ga_hi, scope eth, type rw */
- typedef struct {
-- unsigned int table : 32;
-+ unsigned int tbl : 32;
- } reg_eth_rw_ga_hi;
- #define REG_RD_ADDR_eth_rw_ga_hi 20
- #define REG_WR_ADDR_eth_rw_ga_hi 20
-
- /* Register rw_gen_ctrl, scope eth, type rw */
- typedef struct {
-- unsigned int en : 1;
-- unsigned int phy : 2;
-- unsigned int protocol : 1;
-- unsigned int loopback : 1;
-- unsigned int flow_ctrl_dis : 1;
-- unsigned int dummy1 : 26;
-+ unsigned int en : 1;
-+ unsigned int phy : 2;
-+ unsigned int protocol : 1;
-+ unsigned int loopback : 1;
-+ unsigned int flow_ctrl : 1;
-+ unsigned int gtxclk_out : 1;
-+ unsigned int phyrst_n : 1;
-+ unsigned int dummy1 : 24;
- } reg_eth_rw_gen_ctrl;
- #define REG_RD_ADDR_eth_rw_gen_ctrl 24
- #define REG_WR_ADDR_eth_rw_gen_ctrl 24
-@@ -150,22 +152,23 @@
- unsigned int oversize : 1;
- unsigned int bad_crc : 1;
- unsigned int duplex : 1;
-- unsigned int max_size : 1;
-- unsigned int dummy1 : 23;
-+ unsigned int max_size : 16;
-+ unsigned int dummy1 : 8;
- } reg_eth_rw_rec_ctrl;
- #define REG_RD_ADDR_eth_rw_rec_ctrl 28
- #define REG_WR_ADDR_eth_rw_rec_ctrl 28
-
- /* Register rw_tr_ctrl, scope eth, type rw */
- typedef struct {
-- unsigned int crc : 1;
-- unsigned int pad : 1;
-- unsigned int retry : 1;
-- unsigned int ignore_col : 1;
-- unsigned int cancel : 1;
-- unsigned int hsh_delay : 1;
-- unsigned int ignore_crs : 1;
-- unsigned int dummy1 : 25;
-+ unsigned int crc : 1;
-+ unsigned int pad : 1;
-+ unsigned int retry : 1;
-+ unsigned int ignore_col : 1;
-+ unsigned int cancel : 1;
-+ unsigned int hsh_delay : 1;
-+ unsigned int ignore_crs : 1;
-+ unsigned int carrier_ext : 1;
-+ unsigned int dummy1 : 24;
- } reg_eth_rw_tr_ctrl;
- #define REG_RD_ADDR_eth_rw_tr_ctrl 32
- #define REG_WR_ADDR_eth_rw_tr_ctrl 32
-@@ -180,13 +183,10 @@
-
- /* Register rw_mgm_ctrl, scope eth, type rw */
- typedef struct {
-- unsigned int mdio : 1;
-- unsigned int mdoe : 1;
-- unsigned int mdc : 1;
-- unsigned int phyclk : 1;
-- unsigned int txdata : 4;
-- unsigned int txen : 1;
-- unsigned int dummy1 : 23;
-+ unsigned int mdio : 1;
-+ unsigned int mdoe : 1;
-+ unsigned int mdc : 1;
-+ unsigned int dummy1 : 29;
- } reg_eth_rw_mgm_ctrl;
- #define REG_RD_ADDR_eth_rw_mgm_ctrl 40
- #define REG_WR_ADDR_eth_rw_mgm_ctrl 40
-@@ -196,17 +196,8 @@
- unsigned int mdio : 1;
- unsigned int exc_col : 1;
- unsigned int urun : 1;
-- unsigned int phyclk : 1;
-- unsigned int txdata : 4;
-- unsigned int txen : 1;
-- unsigned int col : 1;
-- unsigned int crs : 1;
-- unsigned int txclk : 1;
-- unsigned int rxdata : 4;
-- unsigned int rxer : 1;
-- unsigned int rxdv : 1;
-- unsigned int rxclk : 1;
-- unsigned int dummy1 : 13;
-+ unsigned int clk_125 : 1;
-+ unsigned int dummy1 : 28;
- } reg_eth_r_stat;
- #define REG_RD_ADDR_eth_r_stat 44
-
-@@ -274,83 +265,83 @@
-
- /* Register rw_intr_mask, scope eth, type rw */
- typedef struct {
-- unsigned int crc : 1;
-- unsigned int align : 1;
-- unsigned int oversize : 1;
-- unsigned int congestion : 1;
-- unsigned int single_col : 1;
-- unsigned int mult_col : 1;
-- unsigned int late_col : 1;
-- unsigned int deferred : 1;
-- unsigned int carrier_loss : 1;
-- unsigned int sqe_test_err : 1;
-- unsigned int orun : 1;
-- unsigned int urun : 1;
-- unsigned int excessive_col : 1;
-- unsigned int mdio : 1;
-- unsigned int dummy1 : 18;
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
- } reg_eth_rw_intr_mask;
- #define REG_RD_ADDR_eth_rw_intr_mask 76
- #define REG_WR_ADDR_eth_rw_intr_mask 76
-
- /* Register rw_ack_intr, scope eth, type rw */
- typedef struct {
-- unsigned int crc : 1;
-- unsigned int align : 1;
-- unsigned int oversize : 1;
-- unsigned int congestion : 1;
-- unsigned int single_col : 1;
-- unsigned int mult_col : 1;
-- unsigned int late_col : 1;
-- unsigned int deferred : 1;
-- unsigned int carrier_loss : 1;
-- unsigned int sqe_test_err : 1;
-- unsigned int orun : 1;
-- unsigned int urun : 1;
-- unsigned int excessive_col : 1;
-- unsigned int mdio : 1;
-- unsigned int dummy1 : 18;
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
- } reg_eth_rw_ack_intr;
- #define REG_RD_ADDR_eth_rw_ack_intr 80
- #define REG_WR_ADDR_eth_rw_ack_intr 80
-
- /* Register r_intr, scope eth, type r */
- typedef struct {
-- unsigned int crc : 1;
-- unsigned int align : 1;
-- unsigned int oversize : 1;
-- unsigned int congestion : 1;
-- unsigned int single_col : 1;
-- unsigned int mult_col : 1;
-- unsigned int late_col : 1;
-- unsigned int deferred : 1;
-- unsigned int carrier_loss : 1;
-- unsigned int sqe_test_err : 1;
-- unsigned int orun : 1;
-- unsigned int urun : 1;
-- unsigned int excessive_col : 1;
-- unsigned int mdio : 1;
-- unsigned int dummy1 : 18;
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
- } reg_eth_r_intr;
- #define REG_RD_ADDR_eth_r_intr 84
-
- /* Register r_masked_intr, scope eth, type r */
- typedef struct {
-- unsigned int crc : 1;
-- unsigned int align : 1;
-- unsigned int oversize : 1;
-- unsigned int congestion : 1;
-- unsigned int single_col : 1;
-- unsigned int mult_col : 1;
-- unsigned int late_col : 1;
-- unsigned int deferred : 1;
-- unsigned int carrier_loss : 1;
-- unsigned int sqe_test_err : 1;
-- unsigned int orun : 1;
-- unsigned int urun : 1;
-- unsigned int excessive_col : 1;
-- unsigned int mdio : 1;
-- unsigned int dummy1 : 18;
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
- } reg_eth_r_masked_intr;
- #define REG_RD_ADDR_eth_r_masked_intr 88
-
-@@ -360,12 +351,15 @@
- regk_eth_discard = 0x00000000,
- regk_eth_ether = 0x00000000,
- regk_eth_full = 0x00000001,
-+ regk_eth_gmii = 0x00000003,
-+ regk_eth_gtxclk = 0x00000001,
- regk_eth_half = 0x00000000,
- regk_eth_hsh = 0x00000001,
- regk_eth_mii = 0x00000001,
-+ regk_eth_mii_arec = 0x00000002,
- regk_eth_mii_clk = 0x00000000,
-- regk_eth_mii_rec = 0x00000002,
- regk_eth_no = 0x00000000,
-+ regk_eth_phyrst = 0x00000000,
- regk_eth_rec = 0x00000001,
- regk_eth_rw_ga_hi_default = 0x00000000,
- regk_eth_rw_ga_lo_default = 0x00000000,
-@@ -377,8 +371,8 @@
- regk_eth_rw_ma1_lo_default = 0x00000000,
- regk_eth_rw_mgm_ctrl_default = 0x00000000,
- regk_eth_rw_test_ctrl_default = 0x00000000,
-- regk_eth_size1518 = 0x00000000,
-- regk_eth_size1522 = 0x00000001,
-+ regk_eth_size1518 = 0x000005ee,
-+ regk_eth_size1522 = 0x000005f2,
- regk_eth_yes = 0x00000001
- };
- #endif /* __eth_defs_h */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h 2007-02-07 10:36:10.000000000 +0100
-@@ -0,0 +1,384 @@
-+#ifndef __eth_defs_h
-+#define __eth_defs_h
-+
-+/*
-+ * This file is autogenerated from
-+ * file: eth_regs.r
-+ * id: eth_regs.r,v 1.17 2006/02/08 16:47:19 perz Exp perz
-+ * last modfied: Tue Feb 6 13:57:16 2007
-+ *
-+ * by /n/asic/design/io/eth/inst/rdesc/rdes2c eth_regs.r
-+ * id: $Id: eth_defs_fs.h,v 1.1 2007/02/07 09:36:10 karljope Exp $
-+ * Any changes here will be lost.
-+ *
-+ * -*- buffer-read-only: t -*-
-+ */
-+/* Main access macros */
-+#ifndef REG_RD
-+#define REG_RD( scope, inst, reg ) \
-+ REG_READ( reg_##scope##_##reg, \
-+ (inst) + REG_RD_ADDR_##scope##_##reg )
-+#endif
-+
-+#ifndef REG_WR
-+#define REG_WR( scope, inst, reg, val ) \
-+ REG_WRITE( reg_##scope##_##reg, \
-+ (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-+#endif
-+
-+#ifndef REG_RD_VECT
-+#define REG_RD_VECT( scope, inst, reg, index ) \
-+ REG_READ( reg_##scope##_##reg, \
-+ (inst) + REG_RD_ADDR_##scope##_##reg + \
-+ (index) * STRIDE_##scope##_##reg )
-+#endif
-+
-+#ifndef REG_WR_VECT
-+#define REG_WR_VECT( scope, inst, reg, index, val ) \
-+ REG_WRITE( reg_##scope##_##reg, \
-+ (inst) + REG_WR_ADDR_##scope##_##reg + \
-+ (index) * STRIDE_##scope##_##reg, (val) )
-+#endif
-+
-+#ifndef REG_RD_INT
-+#define REG_RD_INT( scope, inst, reg ) \
-+ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
-+#endif
-+
-+#ifndef REG_WR_INT
-+#define REG_WR_INT( scope, inst, reg, val ) \
-+ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-+#endif
-+
-+#ifndef REG_RD_INT_VECT
-+#define REG_RD_INT_VECT( scope, inst, reg, index ) \
-+ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
-+ (index) * STRIDE_##scope##_##reg )
-+#endif
-+
-+#ifndef REG_WR_INT_VECT
-+#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
-+ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
-+ (index) * STRIDE_##scope##_##reg, (val) )
-+#endif
-+
-+#ifndef REG_TYPE_CONV
-+#define REG_TYPE_CONV( type, orgtype, val ) \
-+ ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
-+#endif
-+
-+#ifndef reg_page_size
-+#define reg_page_size 8192
-+#endif
-+
-+#ifndef REG_ADDR
-+#define REG_ADDR( scope, inst, reg ) \
-+ ( (inst) + REG_RD_ADDR_##scope##_##reg )
-+#endif
-+
-+#ifndef REG_ADDR_VECT
-+#define REG_ADDR_VECT( scope, inst, reg, index ) \
-+ ( (inst) + REG_RD_ADDR_##scope##_##reg + \
-+ (index) * STRIDE_##scope##_##reg )
-+#endif
-+
-+/* C-code for register scope eth */
-+
-+/* Register rw_ma0_lo, scope eth, type rw */
-+typedef struct {
-+ unsigned int addr : 32;
-+} reg_eth_rw_ma0_lo;
-+#define REG_RD_ADDR_eth_rw_ma0_lo 0
-+#define REG_WR_ADDR_eth_rw_ma0_lo 0
-+
-+/* Register rw_ma0_hi, scope eth, type rw */
-+typedef struct {
-+ unsigned int addr : 16;
-+ unsigned int dummy1 : 16;
-+} reg_eth_rw_ma0_hi;
-+#define REG_RD_ADDR_eth_rw_ma0_hi 4
-+#define REG_WR_ADDR_eth_rw_ma0_hi 4
-+
-+/* Register rw_ma1_lo, scope eth, type rw */
-+typedef struct {
-+ unsigned int addr : 32;
-+} reg_eth_rw_ma1_lo;
-+#define REG_RD_ADDR_eth_rw_ma1_lo 8
-+#define REG_WR_ADDR_eth_rw_ma1_lo 8
-+
-+/* Register rw_ma1_hi, scope eth, type rw */
-+typedef struct {
-+ unsigned int addr : 16;
-+ unsigned int dummy1 : 16;
-+} reg_eth_rw_ma1_hi;
-+#define REG_RD_ADDR_eth_rw_ma1_hi 12
-+#define REG_WR_ADDR_eth_rw_ma1_hi 12
-+
-+/* Register rw_ga_lo, scope eth, type rw */
-+typedef struct {
-+ unsigned int table : 32;
-+} reg_eth_rw_ga_lo;
-+#define REG_RD_ADDR_eth_rw_ga_lo 16
-+#define REG_WR_ADDR_eth_rw_ga_lo 16
-+
-+/* Register rw_ga_hi, scope eth, type rw */
-+typedef struct {
-+ unsigned int table : 32;
-+} reg_eth_rw_ga_hi;
-+#define REG_RD_ADDR_eth_rw_ga_hi 20
-+#define REG_WR_ADDR_eth_rw_ga_hi 20
-+
-+/* Register rw_gen_ctrl, scope eth, type rw */
-+typedef struct {
-+ unsigned int en : 1;
-+ unsigned int phy : 2;
-+ unsigned int protocol : 1;
-+ unsigned int loopback : 1;
-+ unsigned int flow_ctrl : 1;
-+ unsigned int dummy1 : 26;
-+} reg_eth_rw_gen_ctrl;
-+#define REG_RD_ADDR_eth_rw_gen_ctrl 24
-+#define REG_WR_ADDR_eth_rw_gen_ctrl 24
-+
-+/* Register rw_rec_ctrl, scope eth, type rw */
-+typedef struct {
-+ unsigned int ma0 : 1;
-+ unsigned int ma1 : 1;
-+ unsigned int individual : 1;
-+ unsigned int broadcast : 1;
-+ unsigned int undersize : 1;
-+ unsigned int oversize : 1;
-+ unsigned int bad_crc : 1;
-+ unsigned int duplex : 1;
-+ unsigned int max_size : 1;
-+ unsigned int dummy1 : 23;
-+} reg_eth_rw_rec_ctrl;
-+#define REG_RD_ADDR_eth_rw_rec_ctrl 28
-+#define REG_WR_ADDR_eth_rw_rec_ctrl 28
-+
-+/* Register rw_tr_ctrl, scope eth, type rw */
-+typedef struct {
-+ unsigned int crc : 1;
-+ unsigned int pad : 1;
-+ unsigned int retry : 1;
-+ unsigned int ignore_col : 1;
-+ unsigned int cancel : 1;
-+ unsigned int hsh_delay : 1;
-+ unsigned int ignore_crs : 1;
-+ unsigned int dummy1 : 25;
-+} reg_eth_rw_tr_ctrl;
-+#define REG_RD_ADDR_eth_rw_tr_ctrl 32
-+#define REG_WR_ADDR_eth_rw_tr_ctrl 32
-+
-+/* Register rw_clr_err, scope eth, type rw */
-+typedef struct {
-+ unsigned int clr : 1;
-+ unsigned int dummy1 : 31;
-+} reg_eth_rw_clr_err;
-+#define REG_RD_ADDR_eth_rw_clr_err 36
-+#define REG_WR_ADDR_eth_rw_clr_err 36
-+
-+/* Register rw_mgm_ctrl, scope eth, type rw */
-+typedef struct {
-+ unsigned int mdio : 1;
-+ unsigned int mdoe : 1;
-+ unsigned int mdc : 1;
-+ unsigned int phyclk : 1;
-+ unsigned int txdata : 4;
-+ unsigned int txen : 1;
-+ unsigned int dummy1 : 23;
-+} reg_eth_rw_mgm_ctrl;
-+#define REG_RD_ADDR_eth_rw_mgm_ctrl 40
-+#define REG_WR_ADDR_eth_rw_mgm_ctrl 40
-+
-+/* Register r_stat, scope eth, type r */
-+typedef struct {
-+ unsigned int mdio : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int urun : 1;
-+ unsigned int phyclk : 1;
-+ unsigned int txdata : 4;
-+ unsigned int txen : 1;
-+ unsigned int col : 1;
-+ unsigned int crs : 1;
-+ unsigned int txclk : 1;
-+ unsigned int rxdata : 4;
-+ unsigned int rxer : 1;
-+ unsigned int rxdv : 1;
-+ unsigned int rxclk : 1;
-+ unsigned int dummy1 : 13;
-+} reg_eth_r_stat;
-+#define REG_RD_ADDR_eth_r_stat 44
-+
-+/* Register rs_rec_cnt, scope eth, type rs */
-+typedef struct {
-+ unsigned int crc_err : 8;
-+ unsigned int align_err : 8;
-+ unsigned int oversize : 8;
-+ unsigned int congestion : 8;
-+} reg_eth_rs_rec_cnt;
-+#define REG_RD_ADDR_eth_rs_rec_cnt 48
-+
-+/* Register r_rec_cnt, scope eth, type r */
-+typedef struct {
-+ unsigned int crc_err : 8;
-+ unsigned int align_err : 8;
-+ unsigned int oversize : 8;
-+ unsigned int congestion : 8;
-+} reg_eth_r_rec_cnt;
-+#define REG_RD_ADDR_eth_r_rec_cnt 52
-+
-+/* Register rs_tr_cnt, scope eth, type rs */
-+typedef struct {
-+ unsigned int single_col : 8;
-+ unsigned int mult_col : 8;
-+ unsigned int late_col : 8;
-+ unsigned int deferred : 8;
-+} reg_eth_rs_tr_cnt;
-+#define REG_RD_ADDR_eth_rs_tr_cnt 56
-+
-+/* Register r_tr_cnt, scope eth, type r */
-+typedef struct {
-+ unsigned int single_col : 8;
-+ unsigned int mult_col : 8;
-+ unsigned int late_col : 8;
-+ unsigned int deferred : 8;
-+} reg_eth_r_tr_cnt;
-+#define REG_RD_ADDR_eth_r_tr_cnt 60
-+
-+/* Register rs_phy_cnt, scope eth, type rs */
-+typedef struct {
-+ unsigned int carrier_loss : 8;
-+ unsigned int sqe_err : 8;
-+ unsigned int dummy1 : 16;
-+} reg_eth_rs_phy_cnt;
-+#define REG_RD_ADDR_eth_rs_phy_cnt 64
-+
-+/* Register r_phy_cnt, scope eth, type r */
-+typedef struct {
-+ unsigned int carrier_loss : 8;
-+ unsigned int sqe_err : 8;
-+ unsigned int dummy1 : 16;
-+} reg_eth_r_phy_cnt;
-+#define REG_RD_ADDR_eth_r_phy_cnt 68
-+
-+/* Register rw_test_ctrl, scope eth, type rw */
-+typedef struct {
-+ unsigned int snmp_inc : 1;
-+ unsigned int snmp : 1;
-+ unsigned int backoff : 1;
-+ unsigned int dummy1 : 29;
-+} reg_eth_rw_test_ctrl;
-+#define REG_RD_ADDR_eth_rw_test_ctrl 72
-+#define REG_WR_ADDR_eth_rw_test_ctrl 72
-+
-+/* Register rw_intr_mask, scope eth, type rw */
-+typedef struct {
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
-+} reg_eth_rw_intr_mask;
-+#define REG_RD_ADDR_eth_rw_intr_mask 76
-+#define REG_WR_ADDR_eth_rw_intr_mask 76
-+
-+/* Register rw_ack_intr, scope eth, type rw */
-+typedef struct {
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
-+} reg_eth_rw_ack_intr;
-+#define REG_RD_ADDR_eth_rw_ack_intr 80
-+#define REG_WR_ADDR_eth_rw_ack_intr 80
-+
-+/* Register r_intr, scope eth, type r */
-+typedef struct {
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
-+} reg_eth_r_intr;
-+#define REG_RD_ADDR_eth_r_intr 84
-+
-+/* Register r_masked_intr, scope eth, type r */
-+typedef struct {
-+ unsigned int crc : 1;
-+ unsigned int align : 1;
-+ unsigned int oversize : 1;
-+ unsigned int congestion : 1;
-+ unsigned int single_col : 1;
-+ unsigned int mult_col : 1;
-+ unsigned int late_col : 1;
-+ unsigned int deferred : 1;
-+ unsigned int carrier_loss : 1;
-+ unsigned int sqe_test_err : 1;
-+ unsigned int orun : 1;
-+ unsigned int urun : 1;
-+ unsigned int exc_col : 1;
-+ unsigned int mdio : 1;
-+ unsigned int dummy1 : 18;
-+} reg_eth_r_masked_intr;
-+#define REG_RD_ADDR_eth_r_masked_intr 88
-+
-+
-+/* Constants */
-+enum {
-+ regk_eth_discard = 0x00000000,
-+ regk_eth_ether = 0x00000000,
-+ regk_eth_full = 0x00000001,
-+ regk_eth_half = 0x00000000,
-+ regk_eth_hsh = 0x00000001,
-+ regk_eth_mii = 0x00000001,
-+ regk_eth_mii_arec = 0x00000002,
-+ regk_eth_mii_clk = 0x00000000,
-+ regk_eth_no = 0x00000000,
-+ regk_eth_rec = 0x00000001,
-+ regk_eth_rw_ga_hi_default = 0x00000000,
-+ regk_eth_rw_ga_lo_default = 0x00000000,
-+ regk_eth_rw_gen_ctrl_default = 0x00000000,
-+ regk_eth_rw_intr_mask_default = 0x00000000,
-+ regk_eth_rw_ma0_hi_default = 0x00000000,
-+ regk_eth_rw_ma0_lo_default = 0x00000000,
-+ regk_eth_rw_ma1_hi_default = 0x00000000,
-+ regk_eth_rw_ma1_lo_default = 0x00000000,
-+ regk_eth_rw_mgm_ctrl_default = 0x00000000,
-+ regk_eth_rw_test_ctrl_default = 0x00000000,
-+ regk_eth_size1518 = 0x00000000,
-+ regk_eth_size1522 = 0x00000001,
-+ regk_eth_yes = 0x00000001
-+};
-+#endif /* __eth_defs_h */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/extmem_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/extmem_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/extmem_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/extmem_defs.h 2004-06-04 09:15:33.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/ext_mem/mod/extmem_regs.r
-- * id: extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
-+ * id: extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
- * last modfied: Tue Mar 30 22:26:21 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile extmem_defs.h ../../inst/ext_mem/mod/extmem_regs.r
- * id: $Id: extmem_defs.h,v 1.5 2004/06/04 07:15:33 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/gio_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/gio_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/gio_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/gio_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/gio/rtl/gio_regs.r
-- * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
-+ * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
- * last modfied: Mon Apr 11 16:07:47 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile gio_defs.h ../../inst/gio/rtl/gio_regs.r
- * id: $Id: gio_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect.h 2005-05-23 14:59:21.000000000 +0200
-@@ -3,7 +3,7 @@
- version . */
-
- #ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
--#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
-+#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
- #define MEMARB_INTR_VECT 0x31
- #define GEN_IO_INTR_VECT 0x32
- #define IOP0_INTR_VECT 0x33
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r
-- * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
-+ * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
- * last modfied: Mon Apr 11 16:08:03 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile intr_vect_defs.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r
- * id: $Id: intr_vect_defs.h,v 1.8 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-@@ -209,7 +209,7 @@
- #define REG_RD_ADDR_intr_vect_r_guru 16
-
- /* Register rw_ipi, scope intr_vect, type rw */
--typedef struct
-+typedef struct
- {
- unsigned int vector;
- } reg_intr_vect_rw_ipi;
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/Makefile linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/Makefile
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/Makefile 2004-01-07 21:34:55.000000000 +0100
-@@ -125,14 +125,14 @@
- done
-
- .PHONY: axw
--## %.axw - Generate the specified .axw file (doesn't work for all files
-+## %.axw - Generate the specified .axw file (doesn't work for all files
- ## due to inconsistent naming of .r files.
- %.axw: axw
- @for RDES in $(IOPROCREGDESC); do \
- if echo "$$RDES" | grep $* ; then \
- $(RDES2TXT) $$RDES; \
- fi \
-- done
-+ done
-
- .PHONY: clean
- ## clean - Remove .h files and .axw files.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_crc_par.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_crc_par_defs_asm.h ../../inst/io_proc/rtl/iop_crc_par.r
- * id: $Id: iop_crc_par_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_dmc_in.r
-- * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
-+ * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_in_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_in.r
- * id: $Id: iop_dmc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_dmc_out.r
-- * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
-+ * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_out_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_out.r
- * id: $Id: iop_dmc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_in.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:07 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in.r
- * id: $Id: iop_fifo_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_in_extra.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:08 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
- * id: $Id: iop_fifo_in_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_out.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:09 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_out_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_out.r
- * id: $Id: iop_fifo_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:10 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_out_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r
- * id: $Id: iop_fifo_out_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_mpu.r
-- * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
-+ * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_mpu_defs_asm.h ../../inst/io_proc/rtl/iop_mpu.r
- * id: $Id: iop_mpu_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -1,5 +1,5 @@
- /* Autogenerated Changes here will be lost!
-- * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
-+ * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
- */
- #define iop_version 0
- #define iop_fifo_in0_extra 64
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_sap_in.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sap_in_defs_asm.h ../../inst/io_proc/rtl/iop_sap_in.r
- * id: $Id: iop_sap_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_sap_out.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sap_out_defs_asm.h ../../inst/io_proc/rtl/iop_sap_out.r
- * id: $Id: iop_sap_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_scrc_in.r
-- * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
-+ * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_in_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_in.r
- * id: $Id: iop_scrc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_scrc_out.r
-- * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
-+ * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_out_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_out.r
- * id: $Id: iop_scrc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_spu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_spu_defs_asm.h ../../inst/io_proc/rtl/iop_spu.r
- * id: $Id: iop_spu_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_cfg_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
- * id: $Id: iop_sw_cfg_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_cpu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
- * id: $Id: iop_sw_cpu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_mpu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
- * id: $Id: iop_sw_mpu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_spu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
- * id: $Id: iop_sw_spu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_timer_grp.r
-- * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
-+ * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_timer_grp_defs_asm.h ../../inst/io_proc/rtl/iop_timer_grp.r
- * id: $Id: iop_timer_grp_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_trigger_grp.r
-- * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
-+ * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_trigger_grp_defs_asm.h ../../inst/io_proc/rtl/iop_trigger_grp.r
- * id: $Id: iop_trigger_grp_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/guinness/iop_version.r
-- * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
-+ * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
- * last modfied: Mon Apr 11 16:08:44 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_version_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_version.r
- * id: $Id: iop_version_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_crc_par.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_crc_par_defs.h ../../inst/io_proc/rtl/iop_crc_par.r
- * id: $Id: iop_crc_par_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_dmc_in.r
-- * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
-+ * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
- * id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_dmc_out.r
-- * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
-+ * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_out_defs.h ../../inst/io_proc/rtl/iop_dmc_out.r
- * id: $Id: iop_dmc_out_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_in.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:07 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_defs.h ../../inst/io_proc/rtl/iop_fifo_in.r
- * id: $Id: iop_fifo_in_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_in_extra.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:08 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
- * id: $Id: iop_fifo_in_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_out.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:09 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_out_defs.h ../../inst/io_proc/rtl/iop_fifo_out.r
- * id: $Id: iop_fifo_out_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:10 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_out_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r
- * id: $Id: iop_fifo_out_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_mpu.r
-- * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
-+ * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_mpu_defs.h ../../inst/io_proc/rtl/iop_mpu.r
- * id: $Id: iop_mpu_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h 2004-01-07 16:18:30.000000000 +0100
-@@ -96,189 +96,189 @@
- #define MPU_ADD_RRR(S,N,D) (0x4000008C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_RRS(S,N,D) (0x4000048C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_RSR(S,N,D) (0x4000018C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_RSS(S,N,D) (0x4000058C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_SRR(S,N,D) (0x4000028C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_SRS(S,N,D) (0x4000068C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_SSR(S,N,D) (0x4000038C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADD_SSS(S,N,D) (0x4000078C | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDQ_RIR(S,N,D) (0x10000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDQ_IRR(S,N,D) (0x10000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_IRR_INSTR(S,N,D) (0xC000008C | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ADDX_RIR_INSTR(S,N,D) (0xC000008C | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ADDX_ISR_INSTR(S,N,D) (0xC000028C | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ADDX_SIR_INSTR(S,N,D) (0xC000028C | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ADDX_IRS_INSTR(S,N,D) (0xC000048C | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ADDX_RIS_INSTR(S,N,D) (0xC000048C | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ADDX_ISS_INSTR(S,N,D) (0xC000068C | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ADDX_SIS_INSTR(S,N,D) (0xC000068C | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ADDX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_AND_RRR(S,N,D) (0x4000008A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_RRS(S,N,D) (0x4000048A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_RSR(S,N,D) (0x4000018A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_RSS(S,N,D) (0x4000058A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_SRR(S,N,D) (0x4000028A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_SRS(S,N,D) (0x4000068A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_SSR(S,N,D) (0x4000038A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_AND_SSS(S,N,D) (0x4000078A | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDQ_RIR(S,N,D) (0x08000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDQ_IRR(S,N,D) (0x08000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_RIR_INSTR(S,N,D) (0xC000008A | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ANDX_IRR_INSTR(S,N,D) (0xC000008A | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ANDX_ISR_INSTR(S,N,D) (0xC000028A | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ANDX_SIR_INSTR(S,N,D) (0xC000028A | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ANDX_IRS_INSTR(S,N,D) (0xC000048A | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ANDX_ISS_INSTR(S,N,D) (0xC000068A | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ANDX_RIS_INSTR(S,N,D) (0xC000048A | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ANDX_SIS_INSTR(S,N,D) (0xC000068A | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ANDX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_BA_I(S) (0x60000000 | ((S & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BAR_R(S) (0x62000000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_BAR_S(S) (0x63000000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_BBC_RII(S,N,D) (0x78000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 21)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BBS_RII(S,N,D) (0x7C000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 21)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BNZ_RI(S,D) (0x74400000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BMI_RI(S,D) (0x7FE00000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BPL_RI(S,D) (0x7BE00000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_BZ_RI(S,D) (0x74000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_DI() (0x40000001)
-
- #define MPU_EI() (0x40000003)
-@@ -286,243 +286,243 @@
- #define MPU_HALT() (0x40000002)
-
- #define MPU_JIR_I(S) (0x60200000 | ((S & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_JIR_R(S) (0x62200000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_JIR_S(S) (0x63200000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_JNT() (0x61000000)
-
- #define MPU_JSR_I(S) (0x60400000 | ((S & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_JSR_R(S) (0x62400000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_JSR_S(S) (0x63400000 | ((S & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_LSL_RRR(S,N,D) (0x4000008E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_RRS(S,N,D) (0x4000048E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_RSR(S,N,D) (0x4000018E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_RSS(S,N,D) (0x4000058E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_SRR(S,N,D) (0x4000028E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_SRS(S,N,D) (0x4000068E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_SSR(S,N,D) (0x4000038E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSL_SSS(S,N,D) (0x4000078E | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSLQ_RIR(S,N,D) (0x18000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_RRR(S,N,D) (0x4000008F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_RRS(S,N,D) (0x4000048F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_RSR(S,N,D) (0x4000018F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_RSS(S,N,D) (0x4000058F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_SRR(S,N,D) (0x4000028F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_SRS(S,N,D) (0x4000068F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_SSR(S,N,D) (0x4000038F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSR_SSS(S,N,D) (0x4000078F | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LSRQ_RIR(S,N,D) (0x1C000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_LW_IR(S,D) (0x64400000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_IS(S,D) (0x64600000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_RR(S,D) (0x66400000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_RS(S,D) (0x66600000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_SR(S,D) (0x67400000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_SS(S,D) (0x67600000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_RIR(S,N,D) (0x66400000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_RIS(S,N,D) (0x66600000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_SIR(S,N,D) (0x67400000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_LW_SIS(S,N,D) (0x67600000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_MOVE_RR(S,D) (0x40000081 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVE_RS(S,D) (0x40000481 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVE_SR(S,D) (0x40000181 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVE_SS(S,D) (0x40000581 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVEQ_IR(S,D) (0x24000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVEQ_IS(S,D) (0x2C000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVEX_IR_INSTR(S,D) (0xC0000081 | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVEX_IR_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_MOVEX_IS_INSTR(S,D) (0xC0000481 | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_MOVEX_IS_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_NOP() (0x40000000)
-
- #define MPU_NOT_RR(S,D) (0x40100081 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_NOT_RS(S,D) (0x40100481 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_NOT_SR(S,D) (0x40100181 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_NOT_SS(S,D) (0x40100581 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_RRR(S,N,D) (0x4000008B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_RRS(S,N,D) (0x4000048B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_RSR(S,N,D) (0x4000018B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_RSS(S,N,D) (0x4000058B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_SRR(S,N,D) (0x4000028B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_SRS(S,N,D) (0x4000068B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_SSR(S,N,D) (0x4000038B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_OR_SSS(S,N,D) (0x4000078B | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORQ_RIR(S,N,D) (0x0C000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORQ_IRR(S,N,D) (0x0C000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_RIR_INSTR(S,N,D) (0xC000008B | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ORX_IRR_INSTR(S,N,D) (0xC000008B | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ORX_SIR_INSTR(S,N,D) (0xC000028B | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ORX_ISR_INSTR(S,N,D) (0xC000028B | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ORX_RIS_INSTR(S,N,D) (0xC000048B | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ORX_IRS_INSTR(S,N,D) (0xC000048B | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_ORX_SIS_INSTR(S,N,D) (0xC000068B | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_ORX_ISS_INSTR(S,N,D) (0xC000068B | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_ORX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_RET() (0x63003000)
-@@ -531,232 +531,232 @@
-
- #define MPU_RR_IR(S,D) (0x50000000 | ((S & ((1 << 11) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_RR_SR(S,D) (0x50008000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_RW_RI(S,D) (0x56000000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 11) - 1)) << 0))
--
-+
- #define MPU_RW_RS(S,D) (0x57000000 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_RWQ_II(S,D) (0x58000000 | ((S & ((1 << 16) - 1)) << 11)\
- | ((D & ((1 << 11) - 1)) << 0))
--
-+
- #define MPU_RWQ_IS(S,D) (0x55000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_RWX_II_INSTR(S,D) (0xD4000000 | ((D & ((1 << 11) - 1)) << 0))
--
-+
- #define MPU_RWX_II_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_RWX_IS_INSTR(S,D) (0xD5000000 | ((D & ((1 << 5) - 1)) << 16))
--
-+
- #define MPU_RWX_IS_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_SUB_RRR(S,N,D) (0x4000008D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_RRS(S,N,D) (0x4000048D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_RSR(S,N,D) (0x4000018D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_RSS(S,N,D) (0x4000058D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_SRR(S,N,D) (0x4000028D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_SRS(S,N,D) (0x4000068D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_SSR(S,N,D) (0x4000038D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUB_SSS(S,N,D) (0x4000078D | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBQ_RIR(S,N,D) (0x14000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBX_RIR_INSTR(S,N,D) (0xC000008D | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_SUBX_SIR_INSTR(S,N,D) (0xC000028D | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_SUBX_RIS_INSTR(S,N,D) (0xC000048D | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_SUBX_SIS_INSTR(S,N,D) (0xC000068D | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_SUBX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_SW_RI(S,D) (0x64000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_SW_SI(S,D) (0x64200000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_SW_RR(S,D) (0x66000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_SR(S,D) (0x66200000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_RS(S,D) (0x67000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_SS(S,D) (0x67200000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_RIR(S,N,D) (0x66000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_SIR(S,N,D) (0x66200000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_RIS(S,N,D) (0x67000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SW_SIS(S,N,D) (0x67200000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SWX_II_INSTR(S,D) (0xE4000000 | ((D & ((1 << 16) - 1)) << 0))
--
-+
- #define MPU_SWX_II_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_SWX_IR_INSTR(S,D) (0xE6000000 | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SWX_IR_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_SWX_IS_INSTR(S,D) (0xE7000000 | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SWX_IS_IMM(S,D) (S & 0xFFFFFFFF)
-
- #define MPU_SWX_IIR_INSTR(S,N,D) (0xE6000000 | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SWX_IIR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_SWX_IIS_INSTR(S,N,D) (0xE7000000 | ((N & ((1 << 8) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 11))
--
-+
- #define MPU_SWX_IIS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_XOR_RRR(S,N,D) (0x40000089 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_RRS(S,N,D) (0x40000489 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_RSR(S,N,D) (0x40000189 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_RSS(S,N,D) (0x40000589 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SRR(S,N,D) (0x40000289 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SRS(S,N,D) (0x40000689 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SSR(S,N,D) (0x40000389 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SSS(S,N,D) (0x40000789 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_RR(S,D) (0x40000088 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_RS(S,D) (0x40000488 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SR(S,D) (0x40000188 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XOR_SS(S,D) (0x40000588 | ((S & ((1 << 5) - 1)) << 11)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORQ_RIR(S,N,D) (0x04000000 | ((S & ((1 << 5) - 1)) << 16)\
- | ((N & ((1 << 16) - 1)) << 0)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORQ_IRR(S,N,D) (0x04000000 | ((S & ((1 << 16) - 1)) << 0)\
- | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_RIR_INSTR(S,N,D) (0xC0000089 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_XORX_IRR_INSTR(S,N,D) (0xC0000089 | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_XORX_SIR_INSTR(S,N,D) (0xC0000289 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_XORX_ISR_INSTR(S,N,D) (0xC0000289 | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_XORX_RIS_INSTR(S,N,D) (0xC0000489 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_XORX_IRS_INSTR(S,N,D) (0xC0000489 | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
- #define MPU_XORX_SIS_INSTR(S,N,D) (0xC0000689 | ((S & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
-
- #define MPU_XORX_ISS_INSTR(S,N,D) (0xC0000689 | ((N & ((1 << 5) - 1)) << 16)\
- | ((D & ((1 << 5) - 1)) << 21))
--
-+
- #define MPU_XORX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
-
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h 2005-04-24 20:31:05.000000000 +0200
-@@ -1,5 +1,5 @@
- /* Autogenerated Changes here will be lost!
-- * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
-+ * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
- */
- #define regi_iop_version (regi_iop + 0)
- #define regi_iop_fifo_in0_extra (regi_iop + 64)
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_sap_in.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:45 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sap_in_defs.h ../../inst/io_proc/rtl/iop_sap_in.r
- * id: $Id: iop_sap_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_sap_out.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sap_out_defs.h ../../inst/io_proc/rtl/iop_sap_out.r
- * id: $Id: iop_sap_out_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_scrc_in.r
-- * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
-+ * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_scrc_in_defs.h ../../inst/io_proc/rtl/iop_scrc_in.r
- * id: $Id: iop_scrc_in_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_scrc_out.r
-- * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
-+ * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_scrc_out_defs.h ../../inst/io_proc/rtl/iop_scrc_out.r
- * id: $Id: iop_scrc_out_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/iop_spu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_spu_defs.h ../../inst/io_proc/rtl/iop_spu.r
- * id: $Id: iop_spu_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_cfg_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
- * id: $Id: iop_sw_cfg_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_cpu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
- * id: $Id: iop_sw_cpu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_mpu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
- * id: $Id: iop_sw_mpu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:10:19 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_spu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
- * id: $Id: iop_sw_spu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_timer_grp.r
-- * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
-+ * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_timer_grp_defs.h ../../inst/io_proc/rtl/iop_timer_grp.r
- * id: $Id: iop_timer_grp_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/iop_trigger_grp.r
-- * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
-+ * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
- * last modfied: Mon Apr 11 16:08:46 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_trigger_grp_defs.h ../../inst/io_proc/rtl/iop_trigger_grp.r
- * id: $Id: iop_trigger_grp_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h 2005-04-24 20:31:05.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/io_proc/rtl/guinness/iop_version.r
-- * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
-+ * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
- * last modfied: Mon Apr 11 16:08:44 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_version_defs.h ../../inst/io_proc/rtl/guinness/iop_version.r
- * id: $Id: iop_version_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../mod/irq_nmi.r
- * id: <not found>
- * last modfied: Thu Jan 22 09:22:43 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile irq_nmi_defs.h ../../mod/irq_nmi.r
- * id: $Id: irq_nmi_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h 2004-06-04 09:15:33.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/memarb/rtl/guinness/marb_top.r
- * id: <not found>
- * last modfied: Fri Nov 7 15:36:04 2003
-- *
-+ *
- * by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
- * id: $Id: marb_bp_defs.h,v 1.2 2004/06/04 07:15:33 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -6,7 +6,7 @@
- * file: ../../inst/memarb/rtl/guinness/marb_top.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:12:16 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
- * id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-@@ -265,7 +265,7 @@
- * file: ../../inst/memarb/rtl/guinness/marb_top.r
- * id: <not found>
- * last modfied: Mon Apr 11 16:12:16 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
- * id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/pinmux_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/pinmux_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/pinmux_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/pinmux_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
-- * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
-+ * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
- * last modfied: Mon Apr 11 16:09:11 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- * id: $Id: pinmux_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/reg_map.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/reg_map.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/reg_map.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/reg_map.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,17 +4,17 @@
- /*
- * This file is autogenerated from
- * file: ../../mod/fakereg.rmap
-- * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
-+ * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
- * last modified: Wed Feb 11 20:53:25 2004
- * file: ../../rtl/global.rmap
-- * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
-+ * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
- * last modified: Mon Aug 18 17:08:23 2003
- * file: ../../mod/modreg.rmap
-- * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
-+ * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
- * last modified: Fri Feb 20 16:40:04 2004
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c -map -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/io_proc/rtl/guinness/iop_top.r ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
-- * id: $Id: reg_map.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
-+ * id: $Id: reg_map.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/rt_trace/rtl/rt_regs.r
-- * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
-+ * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
- * last modfied: Mon Apr 11 16:09:14 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile rt_trace_defs.h ../../inst/rt_trace/rtl/rt_regs.r
- * id: $Id: rt_trace_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ser_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ser_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ser_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ser_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/ser/rtl/ser_regs.r
-- * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
-+ * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
- * last modfied: Mon Apr 11 16:09:21 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile ser_defs.h ../../inst/ser/rtl/ser_regs.r
- * id: $Id: ser_defs.h,v 1.10 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/sser_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/sser_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/sser_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/sser_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/syncser/rtl/sser_regs.r
-- * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
-+ * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
- * last modfied: Mon Apr 11 16:09:48 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile sser_defs.h ../../inst/syncser/rtl/sser_regs.r
- * id: $Id: sser_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop.h 2003-10-22 15:27:12.000000000 +0200
-@@ -54,4 +54,4 @@
- hash_iv = 1
- };
-
--
-+
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/strcop/rtl/strcop_regs.r
-- * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
-+ * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
- * last modfied: Mon Apr 11 16:09:38 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile strcop_defs.h ../../inst/strcop/rtl/strcop_regs.r
- * id: $Id: strcop_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strmux_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strmux_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strmux_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strmux_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/strmux/rtl/guinness/strmux_regs.r
-- * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
-+ * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
- * last modfied: Mon Apr 11 16:09:43 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile strmux_defs.h ../../inst/strmux/rtl/guinness/strmux_regs.r
- * id: $Id: strmux_defs.h,v 1.5 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/supp_reg.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/supp_reg.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/supp_reg.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/supp_reg.h 2004-12-17 11:23:03.000000000 +0100
-@@ -37,7 +37,7 @@
- #define RW_MM_TLB_HI 6
- #define RW_MM_TLB_PGD 7
-
--#define BANK_GC 0
-+#define BANK_GC 0
- #define BANK_IM 1
- #define BANK_DM 2
- #define BANK_BP 3
-@@ -63,7 +63,7 @@
- SPEC_REG_WR(SPEC_REG_SRS,b); \
- NOP(); \
- NOP(); \
-- NOP();
-+ NOP();
-
- #define SUPP_REG_WR(r,v) \
- __asm__ __volatile__ ("move %0, $S" STRINGIFYFY(r) "\n\t" \
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/timer_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/timer_defs.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/timer_defs.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/timer_defs.h 2005-04-24 20:30:58.000000000 +0200
-@@ -4,9 +4,9 @@
- /*
- * This file is autogenerated from
- * file: ../../inst/timer/rtl/timer_regs.r
-- * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
-+ * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
- * last modfied: Mon Apr 11 16:09:53 2005
-- *
-+ *
- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile timer_defs.h ../../inst/timer/rtl/timer_regs.r
- * id: $Id: timer_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/ide.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/ide.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/ide.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/ide.h 2005-08-23 11:44:37.000000000 +0200
-@@ -33,7 +33,7 @@
- * together in a hwgroup, and will serialize accesses. this is good, because
- * we can't access more than one interface at the same time on ETRAX100.
- */
-- return ATA_INTR_VECT;
-+ return ATA_INTR_VECT;
- }
-
- static inline unsigned long ide_default_io_base(int index)
-@@ -44,7 +44,7 @@
- * so we can use the io_base to remember that bitfield.
- */
- ctrl2.sel = index;
--
-+
- return REG_TYPE_CONV(unsigned long, reg_ata_rw_ctrl2, ctrl2);
- }
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/io.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/io.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/io.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/io.h 2006-12-06 14:17:02.000000000 +0100
-@@ -1,6 +1,7 @@
- #ifndef _ASM_ARCH_CRIS_IO_H
- #define _ASM_ARCH_CRIS_IO_H
-
-+#include <linux/spinlock.h>
- #include <asm/arch/hwregs/reg_map.h>
- #include <asm/arch/hwregs/reg_rdwr.h>
- #include <asm/arch/hwregs/gio_defs.h>
-@@ -13,10 +14,11 @@
-
- struct crisv32_ioport
- {
-- unsigned long* oe;
-- unsigned long* data;
-- unsigned long* data_in;
-+ volatile unsigned long* oe;
-+ volatile unsigned long* data;
-+ volatile unsigned long* data_in;
- unsigned int pin_count;
-+ spinlock_t lock;
- };
-
- struct crisv32_iopin
-@@ -34,22 +36,37 @@
- extern struct crisv32_iopin crisv32_led3_green;
- extern struct crisv32_iopin crisv32_led3_red;
-
-+extern struct crisv32_iopin crisv32_led_net0_green;
-+extern struct crisv32_iopin crisv32_led_net0_red;
-+extern struct crisv32_iopin crisv32_led_net1_green;
-+extern struct crisv32_iopin crisv32_led_net1_red;
-+
- static inline void crisv32_io_set(struct crisv32_iopin* iopin,
- int val)
- {
-+ long flags;
-+ spin_lock_irqsave(&iopin->port->lock, flags);
-+
- if (val)
- *iopin->port->data |= iopin->bit;
- else
- *iopin->port->data &= ~iopin->bit;
-+
-+ spin_unlock_irqrestore(&iopin->port->lock, flags);
- }
-
- static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
- enum crisv32_io_dir dir)
- {
-+ long flags;
-+ spin_lock_irqsave(&iopin->port->lock, flags);
-+
- if (dir == crisv32_io_dir_in)
- *iopin->port->oe &= ~iopin->bit;
- else
- *iopin->port->oe |= iopin->bit;
-+
-+ spin_unlock_irqrestore(&iopin->port->lock, flags);
- }
-
- static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
-@@ -60,28 +77,51 @@
- int crisv32_io_get(struct crisv32_iopin* iopin,
- unsigned int port, unsigned int pin);
- int crisv32_io_get_name(struct crisv32_iopin* iopin,
-- char* name);
-+ const char* name);
-
- #define LED_OFF 0x00
- #define LED_GREEN 0x01
- #define LED_RED 0x02
- #define LED_ORANGE (LED_GREEN | LED_RED)
-
--#define LED_NETWORK_SET(x) \
-- do { \
-- LED_NETWORK_SET_G((x) & LED_GREEN); \
-- LED_NETWORK_SET_R((x) & LED_RED); \
-+#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
-+#define LED_NETWORK_GRP0_SET(x) \
-+ do { \
-+ LED_NETWORK_GRP0_SET_G((x) & LED_GREEN); \
-+ LED_NETWORK_GRP0_SET_R((x) & LED_RED); \
- } while (0)
-+#else
-+#define LED_NETWORK_GRP0_SET(x) while (0) {}
-+#endif
-+
-+#define LED_NETWORK_GRP0_SET_G(x) \
-+ crisv32_io_set(&crisv32_led_net0_green, !(x));
-+
-+#define LED_NETWORK_GRP0_SET_R(x) \
-+ crisv32_io_set(&crisv32_led_net0_red, !(x));
-+
-+#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
-+#define LED_NETWORK_GRP1_SET(x) \
-+ do { \
-+ LED_NETWORK_GRP1_SET_G((x) & LED_GREEN); \
-+ LED_NETWORK_GRP1_SET_R((x) & LED_RED); \
-+ } while (0)
-+#else
-+#define LED_NETWORK_GRP1_SET(x) while (0) {}
-+#endif
-+
-+#define LED_NETWORK_GRP1_SET_G(x) \
-+ crisv32_io_set(&crisv32_led_net1_green, !(x));
-+
-+#define LED_NETWORK_GRP1_SET_R(x) \
-+ crisv32_io_set(&crisv32_led_net1_red, !(x));
-+
- #define LED_ACTIVE_SET(x) \
- do { \
- LED_ACTIVE_SET_G((x) & LED_GREEN); \
- LED_ACTIVE_SET_R((x) & LED_RED); \
- } while (0)
-
--#define LED_NETWORK_SET_G(x) \
-- crisv32_io_set(&crisv32_led1_green, !(x));
--#define LED_NETWORK_SET_R(x) \
-- crisv32_io_set(&crisv32_led1_red, !(x));
- #define LED_ACTIVE_SET_G(x) \
- crisv32_io_set(&crisv32_led2_green, !(x));
- #define LED_ACTIVE_SET_R(x) \
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/irq.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/irq.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/irq.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/irq.h 2006-10-13 14:45:18.000000000 +0200
-@@ -50,7 +50,7 @@
- #define IRQ_NAME2(nr) nr##_interrupt(void)
- #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
-
--/*
-+/*
- * The reason for setting the S-bit when debugging the kernel is that we want
- * hardware breakpoints to remain active while we are in an exception handler.
- * Note that we cannot simply copy S1, since we may come here from user-space,
-@@ -86,7 +86,7 @@
- "moveq 1, $r11\n\t" \
- "jump ret_from_intr\n\t" \
- "nop\n\t");
--/*
-+/*
- * This is subtle. The timer interrupt is crucial and it should not be disabled
- * for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
- * would have been BLOCK'ed, and then softirq's are run before we return here to
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/juliette.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/juliette.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/juliette.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/juliette.h 2004-06-09 11:20:19.000000000 +0200
-@@ -166,7 +166,7 @@
- #define PA_NULL 0x3fff /* CCD/VIDEO */
-
- typedef enum {
-- jpeg = 0,
-+ jpeg = 0,
- dummy = 1
- } request_type;
-
-@@ -176,8 +176,8 @@
- halfsize = 2,
- fieldsize = 3
- } size_type;
--
--typedef enum {
-+
-+typedef enum {
- min = 0,
- low = 1,
- medium = 2,
-@@ -192,14 +192,14 @@
- q6 = 11
- } compr_type;
-
--typedef enum {
-+typedef enum {
- deg_0 = 0,
- deg_180 = 1,
- deg_90 = 2,
- deg_270 = 3
- } rotation_type;
-
--typedef enum {
-+typedef enum {
- auto_white = 0,
- hold = 1,
- fixed_outdoor = 2,
-@@ -207,12 +207,12 @@
- fixed_fluor = 4
- } white_balance_type;
-
--typedef enum {
-+typedef enum {
- auto_exp = 0,
- fixed_exp = 1
- } exposure_type;
-
--typedef enum {
-+typedef enum {
- no_window = 0,
- center = 1,
- top = 2,
-@@ -242,7 +242,7 @@
- right_align = 2
- } alignment_type;
-
--typedef enum {
-+typedef enum {
- off = 0,
- on = 1,
- no = 0,
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/mmu.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/mmu.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/mmu.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/mmu.h 2004-11-23 19:36:19.000000000 +0100
-@@ -34,7 +34,7 @@
- * +-----+------+--------+-------+--------+-------+---------+
- */
-
--/*
-+/*
- * Defines for accessing the bits. Also define some synonyms for use with
- * the software-based defined bits below.
- */
-@@ -46,7 +46,7 @@
- #define _PAGE_SILENT_READ (1 << 3) /* Same as above. */
- #define _PAGE_GLOBAL (1 << 4) /* Global page. */
-
--/*
-+/*
- * The hardware doesn't care about these bits, but the kernel uses them in
- * software.
- */
-@@ -84,9 +84,9 @@
-
- #define _KERNPG_TABLE (_PAGE_TABLE | _PAGE_KERNEL)
-
--/* CRISv32 can do page protection for execute.
-+/* CRISv32 can do page protection for execute.
- * Write permissions imply read permissions.
-- * Note that the numbers are in Execute-Write-Read order!
-+ * Note that the numbers are in Execute-Write-Read order!
- */
- #define __P000 PAGE_NONE
- #define __P001 PAGE_READONLY
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/offset.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/offset.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/offset.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/offset.h 2005-08-29 09:36:28.000000000 +0200
-@@ -27,7 +27,7 @@
- #define THREAD_usp 4 /* offsetof(struct thread_struct, usp) */
- #define THREAD_ccs 8 /* offsetof(struct thread_struct, ccs) */
-
--#define TASK_pid 149 /* offsetof(struct task_struct, pid) */
-+#define TASK_pid 151 /* offsetof(struct task_struct, pid) */
-
- #define LCLONE_VM 256 /* CLONE_VM */
- #define LCLONE_UNTRACED 8388608 /* CLONE_UNTRACED */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/page.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/page.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/page.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/page.h 2006-10-13 14:45:18.000000000 +0200
-@@ -11,7 +11,7 @@
- * selected bit it's possible to convert between KSEG_x and 0x40000000 where the
- * DRAM really resides. DRAM is virtually at 0xc.
- */
--#ifndef CONFIG_ETRAXFS_SIM
-+#ifndef CONFIG_ETRAXFS_SIM
- #define __pa(x) ((unsigned long)(x) & 0x7fffffff)
- #define __va(x) ((void *)((unsigned long)(x) | 0x80000000))
- #else
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/pinmux.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/pinmux.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/pinmux.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/pinmux.h 2005-07-02 14:30:13.000000000 +0200
-@@ -1,7 +1,7 @@
- #ifndef _ASM_CRIS_ARCH_PINMUX_H
- #define _ASM_CRIS_ARCH_PINMUX_H
-
--#define PORT_B 0
-+#define PORT_B 0
- #define PORT_C 1
- #define PORT_D 2
- #define PORT_E 3
-@@ -34,6 +34,7 @@
- int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
- int crisv32_pinmux_alloc_fixed(enum fixed_function function);
- int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
-+int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
- void crisv32_pinmux_dump(void);
-
- #endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/processor.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/processor.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/processor.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/processor.h 2006-10-13 14:45:18.000000000 +0200
-@@ -19,7 +19,7 @@
- unsigned long ccs; /* Saved flags register. */
- };
-
--/*
-+/*
- * User-space process size. This is hardcoded into a few places, so don't
- * changed it unless everything's clear!
- */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/ptrace.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/ptrace.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/ptrace.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/ptrace.h 2004-10-21 13:51:21.000000000 +0200
-@@ -49,7 +49,7 @@
- #define CCS_SHIFT 10 /* Shift count for each level in CCS */
-
- /* pt_regs not only specifices the format in the user-struct during
-- * ptrace but is also the frame format used in the kernel prologue/epilogues
-+ * ptrace but is also the frame format used in the kernel prologue/epilogues
- * themselves
- */
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/spinlock.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/spinlock.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/spinlock.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/spinlock.h 2007-01-09 10:31:32.000000000 +0100
-@@ -19,7 +19,7 @@
- __asm__ volatile ("move.d %1,%0" \
- : "=m" (lock->lock) \
- : "r" (1) \
-- : "memory");
-+ : "memory");
- }
-
- static inline int _raw_spin_trylock(spinlock_t *lock)
-@@ -80,7 +80,7 @@
- {
- unsigned long flags;
- local_irq_save(flags);
-- _raw_spin_lock(&rw->lock);
-+ _raw_spin_lock(&rw->lock);
-
- rw->counter++;
-
-@@ -92,7 +92,7 @@
- {
- unsigned long flags;
- local_irq_save(flags);
-- _raw_spin_lock(&rw->lock);
-+ _raw_spin_lock(&rw->lock);
-
- rw->counter--;
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/system.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/system.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/system.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/system.h 2006-10-13 14:45:18.000000000 +0200
-@@ -39,7 +39,7 @@
- #define xchg(ptr,x) \
- ((__typeof__(*(ptr)))__xchg((unsigned long) (x),(ptr),sizeof(*(ptr))))
-
--#define tas(ptr) (xchg((ptr),1))
-+#define tas(ptr) (xchg((ptr),1))
-
- struct __xchg_dummy { unsigned long a[100]; };
- #define __xg(x) ((struct __xchg_dummy *)(x))
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/timex.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/timex.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/timex.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/timex.h 2005-08-23 11:44:37.000000000 +0200
-@@ -6,8 +6,8 @@
- #include <asm/arch/hwregs/timer_defs.h>
-
- /*
-- * The clock runs at 100MHz, we divide it by 1000000. If you change anything
-- * here you must check time.c as well.
-+ * The clock runs at 100MHz, we divide it by 1000000. If you change anything
-+ * here you must check time.c as well.
- */
-
- #define CLOCK_TICK_RATE 100000000 /* Underlying frequency of the HZ timer */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/tlb.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/tlb.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/tlb.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/tlb.h 2003-07-02 11:29:45.000000000 +0200
-@@ -2,8 +2,8 @@
- #define _CRIS_ARCH_TLB_H
-
- /*
-- * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
-- * to store the "process" it belongs to (=> fast mm context switch). The
-+ * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
-+ * to store the "process" it belongs to (=> fast mm context switch). The
- * last page_id is never used so we can make TLB entries that never matches.
- */
- #define NUM_TLB_ENTRIES 64
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/uaccess.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/uaccess.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/uaccess.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/uaccess.h 2006-01-04 07:13:04.000000000 +0100
-@@ -1,4 +1,4 @@
--/*
-+/*
- * Authors: Hans-Peter Nilsson (hp@axis.com)
- *
- */
-diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/unistd.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/unistd.h
---- linux-2.6.19.2.old/include/asm-cris/arch-v32/unistd.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/unistd.h 2005-10-31 09:50:44.000000000 +0100
-@@ -16,7 +16,8 @@
- ".endif\n\t" \
- "break 13" \
- : "=r" (__a) \
-- : "r" (__n_)); \
-+ : "r" (__n_) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-@@ -33,7 +34,8 @@
- ".endif\n\t" \
- "break 13" \
- : "=r" (__a) \
-- : "r" (__n_), "0" (__a)); \
-+ : "r" (__n_), "0" (__a) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-@@ -51,7 +53,8 @@
- ".endif\n\t" \
- "break 13" \
- : "=r" (__a) \
-- : "r" (__n_), "0" (__a), "r" (__b)); \
-+ : "r" (__n_), "0" (__a), "r" (__b) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-@@ -70,7 +73,8 @@
- ".endif\n\t" \
- "break 13" \
- : "=r" (__a) \
-- : "r" (__n_), "0" (__a), "r" (__b), "r" (__c)); \
-+ : "r" (__n_), "0" (__a), "r" (__b), "r" (__c) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-@@ -91,12 +95,13 @@
- "break 13" \
- : "=r" (__a) \
- : "r" (__n_), "0" (__a), "r" (__b), \
-- "r" (__c), "r" (__d)); \
-+ "r" (__c), "r" (__d)\
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
- return (type) -1; \
--}
-+}
-
- #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
- type5,arg5) \
-@@ -114,7 +119,8 @@
- "break 13" \
- : "=r" (__a) \
- : "r" (__n_), "0" (__a), "r" (__b), \
-- "r" (__c), "r" (__d), "h" (__e)); \
-+ "r" (__c), "r" (__d), "h" (__e) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-@@ -138,7 +144,8 @@
- "break 13" \
- : "=r" (__a) \
- : "r" (__n_), "0" (__a), "r" (__b), \
-- "r" (__c), "r" (__d), "h" (__e), "x" (__f)); \
-+ "r" (__c), "r" (__d), "h" (__e), "x" (__f) \
-+ : "memory"); \
- if (__a >= 0) \
- return (type) __a; \
- errno = -__a; \
-diff -urN linux-2.6.19.2.old/include/asm-cris/atomic.h linux-2.6.19.2.dev/include/asm-cris/atomic.h
---- linux-2.6.19.2.old/include/asm-cris/atomic.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/atomic.h 2006-07-03 15:11:43.000000000 +0200
-@@ -5,6 +5,7 @@
-
- #include <asm/system.h>
- #include <asm/arch/atomic.h>
-+#include <linux/compiler.h>
-
- /*
- * Atomic operations that C can't guarantee us. Useful for
-@@ -89,7 +90,7 @@
- unsigned long flags;
- int retval;
- cris_atomic_save(v, flags);
-- retval = (v->counter)++;
-+ retval = ++(v->counter);
- cris_atomic_restore(v, flags);
- return retval;
- }
-@@ -99,7 +100,7 @@
- unsigned long flags;
- int retval;
- cris_atomic_save(v, flags);
-- retval = (v->counter)--;
-+ retval = --(v->counter);
- cris_atomic_restore(v, flags);
- return retval;
- }
-diff -urN linux-2.6.19.2.old/include/asm-cris/axisflashmap.h linux-2.6.19.2.dev/include/asm-cris/axisflashmap.h
---- linux-2.6.19.2.old/include/asm-cris/axisflashmap.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/axisflashmap.h 2006-09-07 14:24:25.000000000 +0200
-@@ -15,18 +15,18 @@
- /* The partitiontable_head is located at offset +10: */
- struct partitiontable_head {
- __u16 magic; /* PARTITION_TABLE_MAGIC */
-- __u16 size; /* Length of ptable block (not header) */
-- __u32 checksum; /* simple longword sum */
-+ __u16 size; /* Length of ptable block (entries + end marker) */
-+ __u32 checksum; /* simple longword sum, over entries + end marker */
- };
-
- /* And followed by partition table entries */
- struct partitiontable_entry {
-- __u32 offset; /* Offset is relative to the sector the ptable is in */
-- __u32 size;
-+ __u32 offset; /* relative to the sector the ptable is in */
-+ __u32 size; /* in bytes */
- __u32 checksum; /* simple longword sum */
-- __u16 type;
-- __u16 flags; /* bit 0: ro/rw = 1/0 */
-- __u32 future0; /* 16 bytes reserved for future use */
-+ __u16 type; /* see type codes below */
-+ __u16 flags; /* bit 0: ro/rw = 1/0 */
-+ __u32 future0; /* 16 bytes reserved for future use */
- __u32 future1;
- __u32 future2;
- __u32 future3;
-@@ -35,10 +35,25 @@
- #define PARTITIONTABLE_END_MARKER 0xFFFFFFFF
- #define PARTITIONTABLE_END_MARKER_SIZE 4
-
--/*#define PARTITION_TYPE_RESCUE 0x0000?*/ /* Not used, maybe it should? */
-+#define PARTITIONTABLE_END_PAD 10
-+
-+/* Complete structure for whole partition table */
-+/* note that table may end before CONFIG_ETRAX_PTABLE_ENTRIES by setting
-+ * offset of the last entry + 1 to PARTITIONTABLE_END_MARKER.
-+ */
-+struct partitiontable {
-+ __u8 skip[PARTITION_TABLE_OFFSET];
-+ struct partitiontable_head head;
-+ struct partitiontable_entry entries[];
-+};
-+
- #define PARTITION_TYPE_PARAM 0x0001
- #define PARTITION_TYPE_KERNEL 0x0002
- #define PARTITION_TYPE_JFFS 0x0003
-+#define PARTITION_TYPE_JFFS2 0x0000
-+
-+#define PARTITION_FLAGS_READONLY_MASK 0x0001
-+#define PARTITION_FLAGS_READONLY 0x0001
-
- /* The master mtd for the entire flash. */
- extern struct mtd_info* axisflash_mtd;
-diff -urN linux-2.6.19.2.old/include/asm-cris/bitops.h linux-2.6.19.2.dev/include/asm-cris/bitops.h
---- linux-2.6.19.2.old/include/asm-cris/bitops.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/bitops.h 2007-01-09 10:31:32.000000000 +0100
-@@ -155,7 +155,7 @@
- #include <asm-generic/bitops/hweight.h>
- #include <asm-generic/bitops/find.h>
-
--#include <asm-generic/bitops/ext2-non-atomic.h>
-+//#include <asm-generic/bitops/ext2-non-atomic.h>
-
- #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
- #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
-diff -urN linux-2.6.19.2.old/include/asm-cris/bug.h linux-2.6.19.2.dev/include/asm-cris/bug.h
---- linux-2.6.19.2.old/include/asm-cris/bug.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/bug.h 2006-06-21 10:29:15.000000000 +0200
-@@ -1,4 +1,4 @@
- #ifndef _CRIS_BUG_H
- #define _CRIS_BUG_H
--#include <asm-generic/bug.h>
-+#include <asm/arch/bug.h>
- #endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/delay.h linux-2.6.19.2.dev/include/asm-cris/delay.h
---- linux-2.6.19.2.old/include/asm-cris/delay.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/delay.h 2006-10-11 19:46:19.000000000 +0200
-@@ -13,10 +13,13 @@
-
- extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */
-
-+/* May be defined by arch/delay.h. */
-+#ifndef udelay
- static inline void udelay(unsigned long usecs)
- {
- __delay(usecs * loops_per_usec);
- }
-+#endif
-
- #endif /* defined(_CRIS_DELAY_H) */
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/ethernet.h linux-2.6.19.2.dev/include/asm-cris/ethernet.h
---- linux-2.6.19.2.old/include/asm-cris/ethernet.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/ethernet.h 2006-07-06 07:58:52.000000000 +0200
-@@ -15,4 +15,7 @@
- #define SET_ETH_DUPLEX_AUTO SIOCDEVPRIVATE+3 /* Auto neg duplex */
- #define SET_ETH_DUPLEX_HALF SIOCDEVPRIVATE+4 /* Full duplex */
- #define SET_ETH_DUPLEX_FULL SIOCDEVPRIVATE+5 /* Half duplex */
-+#define SET_ETH_ENABLE_LEDS SIOCDEVPRIVATE+6 /* Enable net LEDs */
-+#define SET_ETH_DISABLE_LEDS SIOCDEVPRIVATE+7 /* Disable net LEDs */
-+#define SET_ETH_AUTONEG SIOCDEVPRIVATE+8
- #endif /* _CRIS_ETHERNET_H */
-diff -urN linux-2.6.19.2.old/include/asm-cris/etraxgpio.h linux-2.6.19.2.dev/include/asm-cris/etraxgpio.h
---- linux-2.6.19.2.old/include/asm-cris/etraxgpio.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/etraxgpio.h 2007-01-09 10:31:32.000000000 +0100
-@@ -16,15 +16,19 @@
- * For ETRAX FS (ARCH_V32):
- * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
- * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
-- * /dev/gpioc minor 2, 18 bit GPIO, each bit can change direction
-- * /dev/gpiod minor 3, 18 bit GPIO, each bit can change direction
-- * /dev/gpioe minor 4, 18 bit GPIO, each bit can change direction
-- * /dev/leds minor 5, Access to leds depending on kernelconfig
-+ * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
-+ * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
-+ * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction
-+ * /dev/leds minor 2, Access to leds depending on kernelconfig
- *
- */
- #ifndef _ASM_ETRAXGPIO_H
- #define _ASM_ETRAXGPIO_H
-
-+#ifndef __KERNEL__
-+#include <linux/autoconf.h>
-+#endif
-+
- /* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */
- #ifdef CONFIG_ETRAX_ARCH_V10
- #define ETRAXGPIO_IOCTYPE 43
-@@ -42,8 +46,13 @@
- #define GPIO_MINOR_C 3
- #define GPIO_MINOR_D 4
- #define GPIO_MINOR_E 5
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+#define GPIO_MINOR_V 6
-+#define GPIO_MINOR_LAST 6
-+#else
- #define GPIO_MINOR_LAST 5
- #endif
-+#endif
-
- /* supported ioctl _IOC_NR's */
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/fasttimer.h linux-2.6.19.2.dev/include/asm-cris/fasttimer.h
---- linux-2.6.19.2.old/include/asm-cris/fasttimer.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/fasttimer.h 2006-12-11 12:22:38.000000000 +0100
-@@ -1,9 +1,9 @@
--/* $Id: fasttimer.h,v 1.3 2004/05/14 10:19:19 starvik Exp $
-+/*
- * linux/include/asm-cris/fasttimer.h
- *
- * Fast timers for ETRAX100LX
- * This may be useful in other OS than Linux so use 2 space indentation...
-- * Copyright (C) 2000, 2002 Axis Communications AB
-+ * Copyright (C) 2000-2006 Axis Communications AB
- */
- #include <linux/time.h> /* struct timeval */
- #include <linux/timex.h>
-@@ -12,11 +12,16 @@
-
- typedef void fast_timer_function_type(unsigned long);
-
-+struct fasttime_t {
-+ unsigned long tv_jiff; /* jiffies */
-+ unsigned long tv_usec; /* microseconds */
-+};
-+
- struct fast_timer{ /* Close to timer_list */
- struct fast_timer *next;
- struct fast_timer *prev;
-- struct timeval tv_set;
-- struct timeval tv_expires;
-+ struct fasttime_t tv_set;
-+ struct fasttime_t tv_expires;
- unsigned long delay_us;
- fast_timer_function_type *function;
- unsigned long data;
-@@ -38,6 +43,6 @@
- void schedule_usleep(unsigned long us);
-
-
--void fast_timer_init(void);
-+int fast_timer_init(void);
-
- #endif
-diff -urN linux-2.6.19.2.old/include/asm-cris/hardirq.h linux-2.6.19.2.dev/include/asm-cris/hardirq.h
---- linux-2.6.19.2.old/include/asm-cris/hardirq.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/hardirq.h 2005-10-31 09:50:43.000000000 +0100
-@@ -1,6 +1,7 @@
- #ifndef __ASM_HARDIRQ_H
- #define __ASM_HARDIRQ_H
-
-+#include <asm/irq.h>
- #include <linux/threads.h>
- #include <linux/cache.h>
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/io.h linux-2.6.19.2.dev/include/asm-cris/io.h
---- linux-2.6.19.2.old/include/asm-cris/io.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/io.h 2006-01-04 07:13:03.000000000 +0100
-@@ -127,8 +127,8 @@
-
- #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
-
--/* The following is junk needed for the arch-independent code but which
-- * we never use in the CRIS port
-+/* I/O port access. Normally there is no I/O space on CRIS but when Cardbus/PCI
-+ * is enable the request is passed through the bridge.
- */
-
- #define IO_SPACE_LIMIT 0xffff
-diff -urN linux-2.6.19.2.old/include/asm-cris/irq_regs.h linux-2.6.19.2.dev/include/asm-cris/irq_regs.h
---- linux-2.6.19.2.old/include/asm-cris/irq_regs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/irq_regs.h 2007-01-09 10:31:32.000000000 +0100
-@@ -0,0 +1 @@
-+#include <asm-generic/irq_regs.h>
-diff -urN linux-2.6.19.2.old/include/asm-cris/pgtable.h linux-2.6.19.2.dev/include/asm-cris/pgtable.h
---- linux-2.6.19.2.old/include/asm-cris/pgtable.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/pgtable.h 2007-01-12 15:41:37.000000000 +0100
-@@ -279,7 +279,7 @@
- #define pte_unmap(pte) do { } while (0)
- #define pte_unmap_nested(pte) do { } while (0)
- #define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
--#define pfn_pte(pfn, prot) __pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot))
-+#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
- #define pte_ERROR(e) \
- printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
-diff -urN linux-2.6.19.2.old/include/asm-cris/semaphore-helper.h linux-2.6.19.2.dev/include/asm-cris/semaphore-helper.h
---- linux-2.6.19.2.old/include/asm-cris/semaphore-helper.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/semaphore-helper.h 2005-08-23 11:44:35.000000000 +0200
-@@ -20,12 +20,12 @@
- /*
- * These two _must_ execute atomically wrt each other.
- */
--extern inline void wake_one_more(struct semaphore * sem)
-+static inline void wake_one_more(struct semaphore * sem)
- {
- atomic_inc(&sem->waking);
- }
-
--extern inline int waking_non_zero(struct semaphore *sem)
-+static inline int waking_non_zero(struct semaphore *sem)
- {
- unsigned long flags;
- int ret = 0;
-@@ -40,7 +40,7 @@
- return ret;
- }
-
--extern inline int waking_non_zero_interruptible(struct semaphore *sem,
-+static inline int waking_non_zero_interruptible(struct semaphore *sem,
- struct task_struct *tsk)
- {
- int ret = 0;
-@@ -59,7 +59,7 @@
- return ret;
- }
-
--extern inline int waking_non_zero_trylock(struct semaphore *sem)
-+static inline int waking_non_zero_trylock(struct semaphore *sem)
- {
- int ret = 1;
- unsigned long flags;
-diff -urN linux-2.6.19.2.old/include/asm-cris/semaphore.h linux-2.6.19.2.dev/include/asm-cris/semaphore.h
---- linux-2.6.19.2.old/include/asm-cris/semaphore.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/semaphore.h 2006-01-04 07:13:03.000000000 +0100
-@@ -51,7 +51,6 @@
- {
- sema_init(sem, 0);
- }
--
- extern void __down(struct semaphore * sem);
- extern int __down_interruptible(struct semaphore * sem);
- extern int __down_trylock(struct semaphore * sem);
-diff -urN linux-2.6.19.2.old/include/asm-cris/smp.h linux-2.6.19.2.dev/include/asm-cris/smp.h
---- linux-2.6.19.2.old/include/asm-cris/smp.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/smp.h 2005-10-31 09:50:43.000000000 +0100
-@@ -4,7 +4,7 @@
- #include <linux/cpumask.h>
-
- extern cpumask_t phys_cpu_present_map;
--#define cpu_possible_map phys_cpu_present_map
-+extern cpumask_t cpu_possible_map;
-
- #define __smp_processor_id() (current_thread_info()->cpu)
-
-diff -urN linux-2.6.19.2.old/include/asm-cris/sync_serial.h linux-2.6.19.2.dev/include/asm-cris/sync_serial.h
---- linux-2.6.19.2.old/include/asm-cris/sync_serial.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/sync_serial.h 2005-11-10 15:43:16.000000000 +0100
-@@ -1,9 +1,9 @@
--/*
-+/*
- * ioctl defines for synchronous serial port driver
- *
- * Copyright (c) 2001-2003 Axis Communications AB
-- *
-- * Author: Mikael Starvik
-+ *
-+ * Author: Mikael Starvik
- *
- */
-
-@@ -24,7 +24,7 @@
- #define SSP150 0
- #define SSP300 1
- #define SSP600 2
--#define SSP1200 3
-+#define SSP1200 3
- #define SSP2400 4
- #define SSP4800 5
- #define SSP9600 6
-@@ -67,6 +67,7 @@
- /* Values for SSP_FRAME_SYNC */
- #define NORMAL_SYNC 1
- #define EARLY_SYNC 2
-+#define SECOND_WORD_SYNC 0x40000
-
- #define BIT_SYNC 4
- #define WORD_SYNC 8
-@@ -86,6 +87,8 @@
- #define CLOCK_GATED 0x10000
- #define CLOCK_NOT_GATED 0x20000
-
-+
-+
- /* Values for SSP_IPOLARITY and SSP_OPOLARITY */
- #define CLOCK_NORMAL 1
- #define CLOCK_INVERT 2
-diff -urN linux-2.6.19.2.old/include/asm-cris/thread_info.h linux-2.6.19.2.dev/include/asm-cris/thread_info.h
---- linux-2.6.19.2.old/include/asm-cris/thread_info.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/thread_info.h 2006-03-22 11:01:27.000000000 +0100
-@@ -32,6 +32,7 @@
- unsigned long flags; /* low level flags */
- __u32 cpu; /* current CPU */
- int preempt_count; /* 0 => preemptable, <0 => BUG */
-+ __u32 tls; /* TLS for this thread */
-
- mm_segment_t addr_limit; /* thread address space:
- 0-0xBFFFFFFF for user-thead
-@@ -82,6 +83,7 @@
- #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
- #define TIF_SIGPENDING 2 /* signal pending */
- #define TIF_NEED_RESCHED 3 /* rescheduling necessary */
-+#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
- #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
- #define TIF_MEMDIE 17
-
-@@ -89,6 +91,7 @@
- #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
- #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
- #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
-+#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
- #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
-
- #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
-diff -urN linux-2.6.19.2.old/include/asm-cris/unistd.h linux-2.6.19.2.dev/include/asm-cris/unistd.h
---- linux-2.6.19.2.old/include/asm-cris/unistd.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/include/asm-cris/unistd.h 2007-01-09 10:31:32.000000000 +0100
-@@ -255,6 +255,7 @@
- #define __NR_io_submit 248
- #define __NR_io_cancel 249
- #define __NR_fadvise64 250
-+/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
- #define __NR_exit_group 252
- #define __NR_lookup_dcookie 253
- #define __NR_epoll_create 254
-@@ -292,10 +293,41 @@
- #define __NR_add_key 286
- #define __NR_request_key 287
- #define __NR_keyctl 288
-+#define __NR_ioprio_set 289
-+#define __NR_ioprio_get 290
-+#define __NR_inotify_init 291
-+#define __NR_inotify_add_watch 292
-+#define __NR_inotify_rm_watch 293
-+#define __NR_migrate_pages 294
-+#define __NR_openat 295
-+#define __NR_mkdirat 296
-+#define __NR_mknodat 297
-+#define __NR_fchownat 298
-+#define __NR_futimesat 299
-+#define __NR_fstatat64 300
-+#define __NR_unlinkat 301
-+#define __NR_renameat 302
-+#define __NR_linkat 303
-+#define __NR_symlinkat 304
-+#define __NR_readlinkat 305
-+#define __NR_fchmodat 306
-+#define __NR_faccessat 307
-+#define __NR_pselect6 308
-+#define __NR_ppoll 309
-+#define __NR_unshare 310
-+#define __NR_set_robust_list 311
-+#define __NR_get_robust_list 312
-+#define __NR_splice 313
-+#define __NR_sync_file_range 314
-+#define __NR_tee 315
-+#define __NR_vmsplice 316
-+#define __NR_move_pages 317
-+#define __NR_getcpu 318
-+#define __NR_epoll_pwait 319
-
- #ifdef __KERNEL__
-
--#define NR_syscalls 289
-+#define NR_syscalls 320
-
- #include <asm/arch/unistd.h>
-
-@@ -321,6 +353,7 @@
- #define __ARCH_WANT_SYS_SIGPENDING
- #define __ARCH_WANT_SYS_SIGPROCMASK
- #define __ARCH_WANT_SYS_RT_SIGACTION
-+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-
- /*
- * "Conditional" syscalls
+++ /dev/null
-diff -urN linux-2.6.19.2.old/arch/cris/Kconfig linux-2.6.19.2.dev/arch/cris/Kconfig
---- linux-2.6.19.2.old/arch/cris/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/Kconfig 2007-01-17 18:17:18.000000000 +0100
-@@ -16,6 +16,10 @@
- config RWSEM_XCHGADD_ALGORITHM
- bool
-
-+config GENERIC_IOMAP
-+ bool
-+ default y
-+
- config GENERIC_FIND_NEXT_BIT
- bool
- default y
-@@ -42,6 +46,29 @@
-
- source "fs/Kconfig.binfmt"
-
-+config GENERIC_HARDIRQS
-+ bool
-+ default y
-+
-+config SMP
-+ bool "SMP"
-+ help
-+ SMP support. Always Say N.
-+
-+config NR_CPUS
-+ int
-+ depends on SMP
-+ default 2
-+
-+config SCHED_MC
-+ bool "Multi-core scheduler support"
-+ depends on SMP
-+ default y
-+ help
-+ Multi-core scheduler support improves the CPU scheduler's decision
-+ making when dealing with multi-core CPU chips at a cost of slightly
-+ increased overhead in some places. If unsure say N here.
-+
- config ETRAX_CMDLINE
- string "Kernel command line"
- default "root=/dev/mtdblock3"
-@@ -70,17 +97,11 @@
- timers).
- This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled.
-
--config PREEMPT
-- bool "Preemptible Kernel"
-- help
-- This option reduces the latency of the kernel when reacting to
-- real-time or interactive events by allowing a low priority process to
-- be preempted even if it is in kernel mode executing a system call.
-- This allows applications to run more reliably even when the system is
-- under load.
-+config OOM_REBOOT
-+ bool "Enable reboot at out of memory"
-
-- Say Y here if you are building a kernel for a desktop, embedded
-- or real-time system. Say N if you are unsure.
-+source "kernel/Kconfig.preempt"
-+source "kernel/Kconfig.sched"
-
- source mm/Kconfig
-
-@@ -107,6 +128,16 @@
- help
- Support the xsim ETRAX Simulator.
-
-+config ETRAXFS
-+ bool "ETRAX-FS-V32"
-+ help
-+ Support CRIS V32.
-+
-+config ETRAXFS_SIM
-+ bool "ETRAX-FS-V32-Simulator"
-+ help
-+ Support CRIS V32 VCS simualtor.
-+
- endchoice
-
- config ETRAX_ARCH_V10
-@@ -114,6 +145,11 @@
- default y if ETRAX100LX || ETRAX100LX_V2
- default n if !(ETRAX100LX || ETRAX100LX_V2)
-
-+config ETRAX_ARCH_V32
-+ bool
-+ default y if ETRAXFS || ETRAXFS_SIM
-+ default n if !(ETRAXFS || ETRAXFS_SIM)
-+
- config ETRAX_DRAM_SIZE
- int "DRAM size (dec, in MB)"
- default "8"
-@@ -121,12 +157,23 @@
- Size of DRAM (decimal in MB) typically 2, 8 or 16.
-
- config ETRAX_FLASH_BUSWIDTH
-- int "Buswidth of flash in bytes"
-+ int "Buswidth of NOR flash in bytes"
- default "2"
- help
-- Width in bytes of the Flash bus (1, 2 or 4). Is usually 2.
-+ Width in bytes of the NOR Flash bus (1, 2 or 4). Is usually 2.
-
--source arch/cris/arch-v10/Kconfig
-+config ETRAX_NANDFLASH_BUSWIDTH
-+ int "Buswidth of NAND flash in bytes"
-+ default "1"
-+ help
-+ Width in bytes of the NAND flash (1 or 2).
-+
-+config ETRAX_FLASH1_SIZE
-+ int "FLASH1 size (dec, in MB. 0 = Unknown)"
-+ default "0"
-+
-+# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
-+source arch/cris/arch/Kconfig
-
- endmenu
-
-@@ -134,7 +181,8 @@
-
- # bring in ETRAX built-in drivers
- menu "Drivers for built-in interfaces"
--source arch/cris/arch-v10/drivers/Kconfig
-+# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
-+source arch/cris/arch/drivers/Kconfig
-
- endmenu
-
-@@ -181,6 +229,10 @@
-
- source "sound/Kconfig"
-
-+source "drivers/pcmcia/Kconfig"
-+
-+source "drivers/pci/Kconfig"
-+
- source "drivers/usb/Kconfig"
-
- source "arch/cris/Kconfig.debug"
-diff -urN linux-2.6.19.2.old/arch/cris/Kconfig.debug linux-2.6.19.2.dev/arch/cris/Kconfig.debug
---- linux-2.6.19.2.old/arch/cris/Kconfig.debug 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/Kconfig.debug 2005-10-31 09:48:02.000000000 +0100
-@@ -1,14 +1,15 @@
- menu "Kernel hacking"
-
-+source "lib/Kconfig.debug"
-+
- #bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC
-+
- config PROFILING
- bool "Kernel profiling support"
-
- config SYSTEM_PROFILER
- bool "System profiling support"
-
--source "lib/Kconfig.debug"
--
- config ETRAX_KGDB
- bool "Use kernel GDB debugger"
- depends on DEBUG_KERNEL
-diff -urN linux-2.6.19.2.old/arch/cris/Makefile linux-2.6.19.2.dev/arch/cris/Makefile
---- linux-2.6.19.2.old/arch/cris/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/Makefile 2006-11-29 17:05:40.000000000 +0100
-@@ -1,4 +1,4 @@
--# $Id: Makefile,v 1.28 2005/03/17 10:44:37 larsv Exp $
-+# $Id: Makefile,v 1.41 2006/11/29 16:05:40 ricardw Exp $
- # cris/Makefile
- #
- # This file is included by the global makefile so that you can add your own
-@@ -10,14 +10,11 @@
- # License. See the file "COPYING" in the main directory of this archive
- # for more details.
-
--# A bug in ld prevents us from having a (constant-value) symbol in a
--# "ORIGIN =" or "LENGTH =" expression.
--
- arch-y := v10
- arch-$(CONFIG_ETRAX_ARCH_V10) := v10
- arch-$(CONFIG_ETRAX_ARCH_V32) := v32
-
--# No config avaiable for make clean etc
-+# No config available for make clean etc
- ifneq ($(arch-y),)
- SARCH := arch-$(arch-y)
- else
-@@ -52,79 +49,58 @@
- # cris object files path
- OBJ_ARCH = $(objtree)/arch/$(ARCH)
-
--target_boot_arch_dir = $(OBJ_ARCH)/$(SARCH)/boot
--target_boot_dir = $(OBJ_ARCH)/boot
--src_boot_dir = $(SRC_ARCH)/boot
--target_compressed_dir = $(OBJ_ARCH)/boot/compressed
--src_compressed_dir = $(SRC_ARCH)/boot/compressed
--target_rescue_dir = $(OBJ_ARCH)/boot/rescue
--src_rescue_dir = $(SRC_ARCH)/boot/rescue
--
--export target_boot_arch_dir target_boot_dir src_boot_dir target_compressed_dir src_compressed_dir target_rescue_dir src_rescue_dir
--
--vmlinux.bin: vmlinux
-- $(OBJCOPY) $(OBJCOPYFLAGS) vmlinux vmlinux.bin
--
--timage: vmlinux.bin
-- cat vmlinux.bin cramfs.img >timage
--
--simimage: timage
-- cp vmlinux.bin simvmlinux.bin
--
--# the following will remake timage without compiling the kernel
--# it does of course require that all object files exist...
--
--cramfs:
--## cramfs - Creates a cramfs image
-- mkcramfs -b 8192 -m romfs_meta.txt root cramfs.img
-- cat vmlinux.bin cramfs.img >timage
--
--clinux: vmlinux.bin decompress.bin rescue.bin
--
--decompress.bin: $(target_boot_dir)
-- @$(MAKE) -f $(src_compressed_dir)/Makefile $(target_compressed_dir)/decompress.bin
--
--$(target_rescue_dir)/rescue.bin: $(target_boot_dir)
-- @$(MAKE) -f $(src_rescue_dir)/Makefile $(target_rescue_dir)/rescue.bin
-+boot := arch/$(ARCH)/boot
-+MACHINE := arch/$(ARCH)/$(SARCH)
-
--zImage: $(target_boot_dir) vmlinux.bin $(target_rescue_dir)/rescue.bin
--## zImage - Compressed kernel (gzip)
-- @$(MAKE) -f $(src_boot_dir)/Makefile zImage
-+all: zImage
-
--$(target_boot_dir): $(target_boot_arch_dir)
-- ln -sfn $< $@
--
--$(target_boot_arch_dir):
-- mkdir -p $@
--
--compressed: zImage
--
--archmrproper:
--archclean:
-- @if [ -d arch/$(ARCH)/boot ]; then \
-- $(MAKE) $(clean)=arch/$(ARCH)/boot ; \
-- fi
-- rm -f timage vmlinux.bin decompress.bin rescue.bin cramfs.img
-- rm -rf $(LD_SCRIPT).tmp
-+zImage Image: vmlinux
-+ $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
-
- archprepare: $(SRC_ARCH)/.links $(srctree)/include/asm-$(ARCH)/.arch
-
- # Create some links to make all tools happy
- $(SRC_ARCH)/.links:
- @rm -rf $(SRC_ARCH)/drivers
-- @ln -sfn $(SRC_ARCH)/$(SARCH)/drivers $(SRC_ARCH)/drivers
-+ @ln -sfn $(SARCH)/drivers $(SRC_ARCH)/drivers
- @rm -rf $(SRC_ARCH)/boot
-- @ln -sfn $(SRC_ARCH)/$(SARCH)/boot $(SRC_ARCH)/boot
-+ @ln -sfn $(SARCH)/boot $(SRC_ARCH)/boot
- @rm -rf $(SRC_ARCH)/lib
-- @ln -sfn $(SRC_ARCH)/$(SARCH)/lib $(SRC_ARCH)/lib
-- @ln -sfn $(SRC_ARCH)/$(SARCH) $(SRC_ARCH)/arch
-- @ln -sfn $(SRC_ARCH)/$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S
-- @ln -sfn $(SRC_ARCH)/$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
-+ @ln -sfn $(SARCH)/lib $(SRC_ARCH)/lib
-+ @rm -rf $(SRC_ARCH)/arch
-+ @ln -sfn $(SARCH) $(SRC_ARCH)/arch
-+ @rm -rf $(SRC_ARCH)/kernel/vmlinux.lds.S
-+ @ln -sfn ../$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S
-+ @rm -rf $(SRC_ARCH)/kernel/asm-offsets.c
-+ @ln -sfn ../$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
- @touch $@
-
- # Create link to sub arch includes
- $(srctree)/include/asm-$(ARCH)/.arch: $(wildcard include/config/arch/*.h)
-- @echo ' Making $(srctree)/include/asm-$(ARCH)/arch -> $(srctree)/include/asm-$(ARCH)/$(SARCH) symlink'
-+ @echo ' SYMLINK include/asm-$(ARCH)/arch -> include/asm-$(ARCH)/$(SARCH)'
- @rm -f include/asm-$(ARCH)/arch
-- @ln -sf $(srctree)/include/asm-$(ARCH)/$(SARCH) $(srctree)/include/asm-$(ARCH)/arch
-+ @ln -sf $(SARCH) $(srctree)/include/asm-$(ARCH)/arch
- @touch $@
-+
-+archclean:
-+ $(Q)if [ -e arch/$(ARCH)/boot ]; then \
-+ $(MAKE) $(clean)=arch/$(ARCH)/boot; \
-+ fi
-+
-+CLEAN_FILES += \
-+ $(MACHINE)/boot/zImage \
-+ $(SRC_ARCH)/.links \
-+ $(srctree)/include/asm-$(ARCH)/.arch
-+
-+MRPROPER_FILES += \
-+ $(SRC_ARCH)/drivers \
-+ $(SRC_ARCH)/boot \
-+ $(SRC_ARCH)/lib \
-+ $(SRC_ARCH)/arch \
-+ $(SRC_ARCH)/kernel/vmlinux.lds.S \
-+ $(SRC_ARCH)/kernel/asm-offsets.c
-+
-+define archhelp
-+ echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
-+ echo '* Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
-+endef
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/README.mm linux-2.6.19.2.dev/arch/cris/arch-v10/README.mm
---- linux-2.6.19.2.old/arch/cris/arch-v10/README.mm 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/README.mm 2005-08-23 11:44:32.000000000 +0200
-@@ -3,6 +3,9 @@
- HISTORY:
-
- $Log: README.mm,v $
-+Revision 1.2 2005/08/23 09:44:32 starvik
-+extern inline -> static inline. Patch provided by Adrian Bunk <bunk@stusta.de>
-+
- Revision 1.1 2001/12/17 13:59:27 bjornw
- Initial revision
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/Makefile 2006-11-29 17:05:40.000000000 +0100
-@@ -1,13 +1,21 @@
- #
--# arch/cris/boot/Makefile
-+# arch/cris/arch-v10/boot/Makefile
- #
--target = $(target_boot_dir)
--src = $(src_boot_dir)
-
--zImage: compressed/vmlinuz
-+OBJCOPY = objcopy-cris
-+OBJCOPYFLAGS = -O binary --remove-section=.bss
-
--compressed/vmlinuz:
-- @$(MAKE) -f $(src)/compressed/Makefile $(target_compressed_dir)/vmlinuz
-+subdir- := compressed rescue
-+targets := Image
-
--clean:
-- @$(MAKE) -f $(src)/compressed/Makefile clean
-+$(obj)/Image: vmlinux FORCE
-+ $(call if_changed,objcopy)
-+ @echo ' Kernel: $@ is ready'
-+
-+$(obj)/compressed/vmlinux: $(obj)/Image FORCE
-+ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
-+ $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
-+
-+$(obj)/zImage: $(obj)/compressed/vmlinux
-+ @cp $< $@
-+ @echo ' Kernel: $@ is ready'
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/Makefile 2006-10-11 17:47:04.000000000 +0200
-@@ -1,45 +1,34 @@
- #
--# create a compressed vmlinuz image from the binary vmlinux.bin file
-+# arch/cris/arch-v10/boot/compressed/Makefile
- #
--target = $(target_compressed_dir)
--src = $(src_compressed_dir)
-
- CC = gcc-cris -melf $(LINUXINCLUDE)
- CFLAGS = -O2
- LD = ld-cris
-+LDFLAGS = -T $(obj)/decompress.ld
-+OBJECTS = $(obj)/head.o $(obj)/misc.o
- OBJCOPY = objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
--OBJECTS = $(target)/head.o $(target)/misc.o
-
--# files to compress
--SYSTEM = $(objtree)/vmlinux.bin
-+quiet_cmd_image = BUILD $@
-+cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
-
--all: $(target_compressed_dir)/vmlinuz
-+targets := vmlinux piggy.gz decompress.o decompress.bin
-
--$(target)/decompress.bin: $(OBJECTS)
-- $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS)
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
-+$(obj)/decompress.o: $(OBJECTS) FORCE
-+ $(call if_changed,ld)
-
--# Create vmlinuz image in top-level build directory
--$(target_compressed_dir)/vmlinuz: $(target) piggy.img $(target)/decompress.bin
-- @echo " COMPR vmlinux.bin --> vmlinuz"
-- @cat $(target)/decompress.bin piggy.img > $(target_compressed_dir)/vmlinuz
-- @rm -f piggy.img
-+$(obj)/decompress.bin: $(obj)/decompress.o FORCE
-+ $(call if_changed,objcopy)
-
--$(target)/head.o: $(src)/head.S
-- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
-+$(obj)/head.o: $(obj)/head.S .config
-+ @$(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
-
--$(target)/misc.o: $(src)/misc.c
-- $(CC) -D__KERNEL__ -c $< -o $@
-+$(obj)/misc.o: $(obj)/misc.c .config
-+ @$(CC) -D__KERNEL__ -c $< -o $@
-
--# gzip the kernel image
--
--piggy.img: $(SYSTEM)
-- @cat $(SYSTEM) | gzip -f -9 > piggy.img
--
--$(target):
-- mkdir -p $(target)
--
--clean:
-- rm -f piggy.img $(objtree)/vmlinuz
-+$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
-+ $(call if_changed,image)
-
-+$(obj)/piggy.gz: $(obj)/../Image FORCE
-+ $(call if_changed,gzip)
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/misc.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/misc.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/misc.c 2006-10-13 14:43:10.000000000 +0200
-@@ -1,7 +1,7 @@
- /*
- * misc.c
- *
-- * $Id: misc.c,v 1.6 2003/10/27 08:04:31 starvik Exp $
-+ * $Id: misc.c,v 1.7 2006/10/13 12:43:10 starvik Exp $
- *
- * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/Makefile 2006-11-30 11:42:39.000000000 +0100
-@@ -1,56 +1,38 @@
- #
--# Makefile for rescue code
-+# Makefile for rescue (bootstrap) code
- #
--target = $(target_rescue_dir)
--src = $(src_rescue_dir)
-
- CC = gcc-cris -mlinux $(LINUXINCLUDE)
- CFLAGS = -O2
--LD = gcc-cris -mlinux -nostdlib
-+AFLAGS = -traditional
-+LD = gcc-cris -mlinux -nostdlib
-+LDFLAGS = -T $(obj)/rescue.ld
- OBJCOPY = objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
-+obj-y = head.o
-+OBJECT = $(obj)/$(obj-y)
-
--all: $(target)/rescue.bin $(target)/testrescue.bin $(target)/kimagerescue.bin
-+targets := rescue.o rescue.bin
-
--$(target)/rescue.bin: $(target) $(target)/head.o
-- $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
--# Place a copy in top-level build directory
-- cp -p $(target)/rescue.bin $(objtree)
-+$(obj)/rescue.o: $(OBJECT) FORCE
-+ $(call if_changed,ld)
-
--$(target)/testrescue.bin: $(target) $(target)/testrescue.o
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/testrescue.o tr.bin
-+$(obj)/rescue.bin: $(obj)/rescue.o FORCE
-+ $(call if_changed,objcopy)
-+ cp -p $(obj)/rescue.bin $(objtree)
-+
-+$(obj)/testrescue.bin: $(obj)/testrescue.o
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/testrescue.o tr.bin
- # Pad it to 784 bytes
- dd if=/dev/zero of=tmp2423 bs=1 count=784
- cat tr.bin tmp2423 >testrescue_tmp.bin
-- dd if=testrescue_tmp.bin of=$(target)/testrescue.bin bs=1 count=784
-+ dd if=testrescue_tmp.bin of=$(obj)/testrescue.bin bs=1 count=784
- rm tr.bin tmp2423 testrescue_tmp.bin
-
--$(target)/kimagerescue.bin: $(target) $(target)/kimagerescue.o
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/kimagerescue.o ktr.bin
-+$(obj)/kimagerescue.bin: $(obj)/kimagerescue.o
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/kimagerescue.o ktr.bin
- # Pad it to 784 bytes, that's what the rescue loader expects
- dd if=/dev/zero of=tmp2423 bs=1 count=784
- cat ktr.bin tmp2423 >kimagerescue_tmp.bin
-- dd if=kimagerescue_tmp.bin of=$(target)/kimagerescue.bin bs=1 count=784
-+ dd if=kimagerescue_tmp.bin of=$(obj)/kimagerescue.bin bs=1 count=784
- rm ktr.bin tmp2423 kimagerescue_tmp.bin
--
--$(target):
-- mkdir -p $(target)
--
--$(target)/head.o: $(src)/head.S
-- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
--
--$(target)/testrescue.o: $(src)/testrescue.S
-- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
--
--$(target)/kimagerescue.o: $(src)/kimagerescue.S
-- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
--
--clean:
-- rm -f $(target)/*.o $(target)/*.bin
--
--fastdep:
--
--modules:
--
--modules-install:
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/head.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/head.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/head.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/head.S 2006-10-13 14:43:10.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: head.S,v 1.7 2005/03/07 12:11:06 starvik Exp $
-+/* $Id: head.S,v 1.9 2006/10/13 12:43:10 starvik Exp $
- *
- * Rescue code, made to reside at the beginning of the
- * flash-memory. when it starts, it checks a partition
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/kimagerescue.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/kimagerescue.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/kimagerescue.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/kimagerescue.S 2006-11-29 17:05:41.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: kimagerescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+/* $Id: kimagerescue.S,v 1.3 2006/11/29 16:05:41 ricardw Exp $
- *
- * Rescue code to be prepended on a kimage and copied to the
- * rescue serial port.
-@@ -7,7 +7,7 @@
- */
-
- #define ASSEMBLER_MACROS_ONLY
--#include <asm/sv_addr_ag.h>
-+#include <asm/arch/sv_addr_ag.h>
-
- #define CODE_START 0x40004000
- #define CODE_LENGTH 784
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/testrescue.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/testrescue.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/testrescue.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/testrescue.S 2006-11-29 17:05:41.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: testrescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+/* $Id: testrescue.S,v 1.2 2006/11/29 16:05:41 ricardw Exp $
- *
- * Simple testcode to download by the rescue block.
- * Just lits some LEDs to show it was downloaded correctly.
-@@ -7,7 +7,7 @@
- */
-
- #define ASSEMBLER_MACROS_ONLY
--#include <asm/sv_addr_ag.h>
-+#include <asm/arch/sv_addr_ag.h>
-
- .text
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/defconfig linux-2.6.19.2.dev/arch/cris/arch-v10/defconfig
---- linux-2.6.19.2.old/arch/cris/arch-v10/defconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/defconfig 2006-01-03 15:48:23.000000000 +0100
-@@ -106,7 +106,6 @@
- CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C=y
- # CONFIG_ETRAX_I2C_EEPROM is not set
- CONFIG_ETRAX_GPIO=y
--CONFIG_ETRAX_PA_BUTTON_BITMASK=02
- CONFIG_ETRAX_PA_CHANGEABLE_DIR=00
- CONFIG_ETRAX_PA_CHANGEABLE_BITS=FF
- CONFIG_ETRAX_PB_CHANGEABLE_DIR=00
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Kconfig
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Kconfig 2007-01-09 10:29:18.000000000 +0100
-@@ -6,6 +6,12 @@
- This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
- controller.
-
-+config ETRAX_NO_PHY
-+ bool "PHY not present"
-+ depends on ETRAX_ETHERNET
-+ help
-+ Enable if PHY is not present.
-+
- choice
- prompt "Network LED behavior"
- depends on ETRAX_ETHERNET
-@@ -90,7 +96,7 @@
-
- config ETRAX_SERIAL_PORT0_DMA6_OUT
- bool "DMA 6"
--
-+ depends on !ETRAX_DEBUG_PORT0
- endchoice
-
- choice
-@@ -103,7 +109,7 @@
-
- config ETRAX_SERIAL_PORT0_DMA7_IN
- bool "DMA 7"
--
-+ depends on !ETRAX_DEBUG_PORT0
- endchoice
-
- choice
-@@ -204,7 +210,7 @@
-
- config ETRAX_SERIAL_PORT1_DMA8_OUT
- bool "DMA 8"
--
-+ depends on !ETRAX_DEBUG_PORT1
- endchoice
-
- choice
-@@ -217,7 +223,7 @@
-
- config ETRAX_SERIAL_PORT1_DMA9_IN
- bool "DMA 9"
--
-+ depends on !ETRAX_DEBUG_PORT1
- endchoice
-
- choice
-@@ -321,7 +327,7 @@
-
- config ETRAX_SERIAL_PORT2_DMA2_OUT
- bool "DMA 2"
--
-+ depends on !ETRAX_DEBUG_PORT2
- endchoice
-
- choice
-@@ -334,7 +340,7 @@
-
- config ETRAX_SERIAL_PORT2_DMA3_IN
- bool "DMA 3"
--
-+ depends on !ETRAX_DEBUG_PORT2
- endchoice
-
- choice
-@@ -435,7 +441,7 @@
-
- config ETRAX_SERIAL_PORT3_DMA4_OUT
- bool "DMA 4"
--
-+ depends on !ETRAX_DEBUG_PORT3
- endchoice
-
- choice
-@@ -448,7 +454,7 @@
-
- config ETRAX_SERIAL_PORT3_DMA5_IN
- bool "DMA 5"
--
-+ depends on !ETRAX_DEBUG_PORT3
- endchoice
-
- choice
-@@ -514,8 +520,7 @@
- bool "RS-485 support"
- depends on ETRAX_SERIAL
- help
-- Enables support for RS-485 serial communication. For a primer on
-- RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
-+ Enables support for RS-485 serial communication.
-
- config ETRAX_RS485_ON_PA
- bool "RS-485 mode on PA"
-@@ -541,6 +546,27 @@
- loopback. Not all products are able to do this in software only.
- Axis 2400/2401 must disable receiver.
-
-+config ETRAX_SYNCHRONOUS_SERIAL
-+ bool "Synchronous serial port driver"
-+ help
-+ Select this to enable the synchronous serial port driver.
-+
-+config ETRAX_SYNCHRONOUS_SERIAL_PORT0
-+ bool "Synchronous serial port 0 enabled (sser1)"
-+ depends on ETRAX_SYNCHRONOUS_SERIAL
-+
-+config ETRAX_SYNCHRONOUS_SERIAL0_DMA
-+ bool "Use DMA for synchronous serial port 0"
-+ depends on ETRAX_SYNCHRONOUS_SERIAL_PORT0
-+
-+config ETRAX_SYNCHRONOUS_SERIAL_PORT1
-+ bool "Synchronous serial port 1 enabled (sser3)"
-+ depends on ETRAX_SYNCHRONOUS_SERIAL
-+
-+config ETRAX_SYNCHRONOUS_SERIAL1_DMA
-+ bool "Use DMA for synchronous serial port 1"
-+ depends on ETRAX_SYNCHRONOUS_SERIAL_PORT1
-+
- config ETRAX_IDE
- bool "ATA/IDE support"
- select IDE
-@@ -604,8 +630,7 @@
- select MTD
- select MTD_CFI
- select MTD_CFI_AMDSTD
-- select MTD_OBSOLETE_CHIPS
-- select MTD_AMDSTD
-+ select MTD_JEDECPROBE
- select MTD_CHAR
- select MTD_BLOCK
- select MTD_PARTITIONS
-@@ -615,6 +640,15 @@
- This option enables MTD mapping of flash devices. Needed to use
- flash memories. If unsure, say Y.
-
-+config ETRAX_AXISFLASHMAP_MTD0WHOLE
-+ bool "MTD0 is whole boot flash device"
-+ depends on ETRAX_AXISFLASHMAP
-+ default N
-+ help
-+ When this option is not set, mtd0 refers to the first partition
-+ on the boot flash device. When set, mtd0 refers to the whole
-+ device, with mtd1 referring to the first partition etc.
-+
- config ETRAX_PTABLE_SECTOR
- int "Byte-offset of partition table sector"
- depends on ETRAX_AXISFLASHMAP
-@@ -715,19 +749,6 @@
- Remember that you need to setup the port directions appropriately in
- the General configuration.
-
--config ETRAX_PA_BUTTON_BITMASK
-- hex "PA-buttons bitmask"
-- depends on ETRAX_GPIO
-- default "02"
-- help
-- This is a bitmask with information about what bits on PA that
-- are used for buttons.
-- Most products has a so called TEST button on PA1, if that's true
-- use 02 here.
-- Use 00 if there are no buttons on PA.
-- If the bitmask is <> 00 a button driver will be included in the gpio
-- driver. ETRAX general I/O support must be enabled.
--
- config ETRAX_PA_CHANGEABLE_DIR
- hex "PA user changeable dir mask"
- depends on ETRAX_GPIO
-@@ -768,6 +789,40 @@
- Bit set = changeable.
- You probably want 00 here.
-
-+config ETRAX_DEF_R_PORT_G_DIR
-+ bool "Port G Output"
-+ help
-+ CONFIG_ETRAX_DEF_R_PORT_G_DIR:
-+ Set the direction of specified pins to output.
-+
-+config ETRAX_DEF_R_PORT_G0_DIR_OUT
-+ bool "G0"
-+ depends on ETRAX_DEF_R_PORT_G_DIR
-+ help
-+ CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT:
-+ Set G0 to output.
-+
-+config ETRAX_DEF_R_PORT_G8_15_DIR_OUT
-+ bool "G8-G15"
-+ depends on ETRAX_DEF_R_PORT_G_DIR
-+ help
-+ CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT:
-+ Set G8-G15 to output.
-+
-+config ETRAX_DEF_R_PORT_G16_23_DIR_OUT
-+ bool "G16-G23"
-+ depends on ETRAX_DEF_R_PORT_G_DIR
-+ help
-+ CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT:
-+ Set G16-G23 to output.
-+
-+config ETRAX_DEF_R_PORT_G24_DIR_OUT
-+ bool "G24"
-+ depends on ETRAX_DEF_R_PORT_G_DIR
-+ help
-+ CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT:
-+ Set G24 to output.
-+
- config ETRAX_RTC
- bool "Real Time Clock support"
- depends on ETRAX_ARCH_V10
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Makefile 2005-12-12 10:05:46.000000000 +0100
-@@ -8,5 +8,5 @@
- obj-$(CONFIG_ETRAX_GPIO) += gpio.o
- obj-$(CONFIG_ETRAX_DS1302) += ds1302.o
- obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o
--
-+obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/axisflashmap.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/axisflashmap.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/axisflashmap.c 2006-11-22 13:26:55.000000000 +0100
-@@ -11,6 +11,26 @@
- * partition split defined below.
- *
- * $Log: axisflashmap.c,v $
-+ * Revision 1.17 2006/11/22 12:26:55 ricardw
-+ * Added CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE option which when enabled puts mtd0
-+ * as whole device, with first partition at mtd1, etc.
-+ *
-+ * Revision 1.16 2006/10/30 15:17:57 pkj
-+ * Avoid a compiler warning.
-+ *
-+ * Revision 1.15 2006/10/13 12:43:10 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.14 2006/08/30 13:20:00 karljope
-+ * Do not use deprecated amd_flash to probe flash memory.
-+ * Probe for flash chip with CFI first and if no chip was found try jedec_probe.
-+ *
-+ * Revision 1.13 2006/01/04 06:09:45 starvik
-+ * Merge of Linux 2.6.15
-+ *
-+ * Revision 1.12 2005/06/21 09:13:06 starvik
-+ * Change const char* to const char[] to save space (from domen@coderock.org).
-+ *
- * Revision 1.11 2004/11/15 10:27:14 starvik
- * Corrected typo (Thanks to Milton Miller <miltonm@bga.com>).
- *
-@@ -300,6 +320,15 @@
- },
- };
-
-+#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
-+/* Main flash device */
-+static struct mtd_partition main_partition = {
-+ .name = "main",
-+ .size = 0,
-+ .offset = 0
-+};
-+#endif
-+
- /*
- * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
- * chips in that order (because the amd_flash-driver is faster).
-@@ -312,12 +341,12 @@
- "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
- map_cs->name, map_cs->size, map_cs->map_priv_1);
-
--#ifdef CONFIG_MTD_AMDSTD
-- mtd_cs = do_map_probe("amd_flash", map_cs);
--#endif
- #ifdef CONFIG_MTD_CFI
-+ mtd_cs = do_map_probe("cfi_probe", map_cs);
-+#endif
-+#ifdef CONFIG_MTD_JEDECPROBE
- if (!mtd_cs) {
-- mtd_cs = do_map_probe("cfi_probe", map_cs);
-+ mtd_cs = do_map_probe("jedec_probe", map_cs);
- }
- #endif
-
-@@ -396,7 +425,7 @@
- struct partitiontable_head *ptable_head = NULL;
- struct partitiontable_entry *ptable;
- int use_default_ptable = 1; /* Until proven otherwise. */
-- const char *pmsg = " /dev/flash%d at 0x%08x, size 0x%08x\n";
-+ const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
-
- if (!(mymtd = flash_probe())) {
- /* There's no reason to use this module if no flash chip can
-@@ -491,6 +520,16 @@
- pidx++;
- }
-
-+#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
-+ if (mymtd) {
-+ main_partition.size = mymtd->size;
-+ err = add_mtd_partitions(mymtd, &main_partition, 1);
-+ if (err)
-+ panic("axisflashmap: Could not initialize "
-+ "partition for whole main mtd device!\n");
-+ }
-+#endif
-+
- if (mymtd) {
- if (use_default_ptable) {
- printk(KERN_INFO " Using default partition table.\n");
-@@ -524,7 +563,7 @@
- }
-
- printk(KERN_INFO " Adding RAM partition for romfs image:\n");
-- printk(pmsg, pidx, romfs_start, romfs_length);
-+ printk(pmsg, pidx, (unsigned)romfs_start, (unsigned)romfs_length);
-
- err = mtdram_init_device(mtd_ram, (void*)romfs_start,
- romfs_length, "romfs");
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/ds1302.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/ds1302.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/ds1302.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/ds1302.c 2006-10-27 16:31:23.000000000 +0200
-@@ -6,136 +6,9 @@
- *!
- *! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
- *!
--*! $Log: ds1302.c,v $
--*! Revision 1.18 2005/01/24 09:11:26 mikaelam
--*! Minor changes to get DS1302 RTC chip driver to work
--*!
--*! Revision 1.17 2005/01/05 06:11:22 starvik
--*! No need to do local_irq_disable after local_irq_save.
--*!
--*! Revision 1.16 2004/12/13 12:21:52 starvik
--*! Added I/O and DMA allocators from Linux 2.4
--*!
--*! Revision 1.14 2004/08/24 06:48:43 starvik
--*! Whitespace cleanup
--*!
--*! Revision 1.13 2004/05/28 09:26:59 starvik
--*! Modified I2C initialization to work in 2.6.
--*!
--*! Revision 1.12 2004/05/14 07:58:03 starvik
--*! Merge of changes from 2.4
--*!
--*! Revision 1.10 2004/02/04 09:25:12 starvik
--*! Merge of Linux 2.6.2
--*!
--*! Revision 1.9 2003/07/04 08:27:37 starvik
--*! Merge of Linux 2.5.74
--*!
--*! Revision 1.8 2003/04/09 05:20:47 starvik
--*! Merge of Linux 2.5.67
--*!
--*! Revision 1.6 2003/01/09 14:42:51 starvik
--*! Merge of Linux 2.5.55
--*!
--*! Revision 1.4 2002/12/11 13:13:57 starvik
--*! Added arch/ to v10 specific includes
--*! Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
--*!
--*! Revision 1.3 2002/11/20 11:56:10 starvik
--*! Merge of Linux 2.5.48
--*!
--*! Revision 1.2 2002/11/18 13:16:06 starvik
--*! Linux 2.5 port of latest 2.4 drivers
--*!
--*! Revision 1.15 2002/10/11 16:14:33 johana
--*! Added CONFIG_ETRAX_DS1302_TRICKLE_CHARGE and initial setting of the
--*! trcklecharge register.
--*!
--*! Revision 1.14 2002/10/10 12:15:38 magnusmn
--*! Added support for having the RST signal on bit g0
--*!
--*! Revision 1.13 2002/05/29 15:16:08 johana
--*! Removed unused variables.
--*!
--*! Revision 1.12 2002/04/10 15:35:25 johana
--*! Moved probe function closer to init function and marked it __init.
--*!
--*! Revision 1.11 2001/06/14 12:35:52 jonashg
--*! The ATA hack is back. It is unfortunately the only way to set g27 to output.
--*!
--*! Revision 1.9 2001/06/14 10:00:14 jonashg
--*! No need for tempudelay to be inline anymore (had to adjust the usec to
--*! loops conversion because of this to make it slow enough to be a udelay).
--*!
--*! Revision 1.8 2001/06/14 08:06:32 jonashg
--*! Made tempudelay delay usecs (well, just a tad more).
--*!
--*! Revision 1.7 2001/06/13 14:18:11 jonashg
--*! Only allow processes with SYS_TIME capability to set time and charge.
--*!
--*! Revision 1.6 2001/06/12 15:22:07 jonashg
--*! * Made init function __init.
--*! * Parameter to out_byte() is unsigned char.
--*! * The magic number 42 has got a name.
--*! * Removed comment about /proc (nothing is exported there).
--*!
--*! Revision 1.5 2001/06/12 14:35:13 jonashg
--*! Gave the module a name and added it to printk's.
--*!
--*! Revision 1.4 2001/05/31 14:53:40 jonashg
--*! Made tempudelay() inline so that the watchdog doesn't reset (see
--*! function comment).
--*!
--*! Revision 1.3 2001/03/26 16:03:06 bjornw
--*! Needs linux/config.h
--*!
--*! Revision 1.2 2001/03/20 19:42:00 bjornw
--*! Use the ETRAX prefix on the DS1302 options
--*!
--*! Revision 1.1 2001/03/20 09:13:50 magnusmn
--*! Linux 2.4 port
--*!
--*! Revision 1.10 2000/07/05 15:38:23 bjornw
--*! Dont update kernel time when a RTC_SET_TIME is done
--*!
--*! Revision 1.9 2000/03/02 15:42:59 macce
--*! * Hack to make RTC work on all 2100/2400
--*!
--*! Revision 1.8 2000/02/23 16:59:18 torbjore
--*! added setup of R_GEN_CONFIG when RTC is connected to the generic port.
--*!
--*! Revision 1.7 2000/01/17 15:51:43 johana
--*! Added RTC_SET_CHARGE ioctl to enable trickle charger.
--*!
--*! Revision 1.6 1999/10/27 13:19:47 bjornw
--*! Added update_xtime_from_cmos which reads back the updated RTC into the kernel.
--*! /dev/rtc calls it now.
--*!
--*! Revision 1.5 1999/10/27 12:39:37 bjornw
--*! Disabled superuser check. Anyone can now set the time.
--*!
--*! Revision 1.4 1999/09/02 13:27:46 pkj
--*! Added shadow for R_PORT_PB_CONFIG.
--*! Renamed port_g_shadow to port_g_data_shadow.
--*!
--*! Revision 1.3 1999/09/02 08:28:06 pkj
--*! Made it possible to select either port PB or the generic port for the RST
--*! signal line to the DS1302 RTC.
--*! Also make sure the RST bit is configured as output on Port PB (if used).
--*!
--*! Revision 1.2 1999/09/01 14:47:20 bjornw
--*! Added support for /dev/rtc operations with ioctl RD_TIME and SET_TIME to read
--*! and set the date. Register as major 121.
--*!
--*! Revision 1.1 1999/09/01 09:45:29 bjornw
--*! Implemented a DS1302 RTC driver.
--*!
--*!
- *! ---------------------------------------------------------------------------
- *!
--*! (C) Copyright 1999, 2000, 2001, 2002, 2003, 2004 Axis Communications AB, LUND, SWEDEN
--*!
--*! $Id: ds1302.c,v 1.18 2005/01/24 09:11:26 mikaelam Exp $
-+*! (C) Copyright 1999-2006 Axis Communications AB, LUND, SWEDEN
- *!
- *!***************************************************************************/
-
-@@ -305,14 +178,7 @@
- void
- ds1302_writereg(int reg, unsigned char val)
- {
--#ifndef CONFIG_ETRAX_RTC_READONLY
- int do_writereg = 1;
--#else
-- int do_writereg = 0;
--
-- if (reg == RTC_TRICKLECHARGER)
-- do_writereg = 1;
--#endif
-
- if (do_writereg) {
- ds1302_wenable();
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/eeprom.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/eeprom.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/eeprom.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/eeprom.c 2006-10-13 14:43:10.000000000 +0200
-@@ -20,6 +20,9 @@
- *! in the spin-lock.
- *!
- *! $Log: eeprom.c,v $
-+*! Revision 1.13 2006/10/13 12:43:10 starvik
-+*! Merge of 2.6.18
-+*!
- *! Revision 1.12 2005/06/19 17:06:46 starvik
- *! Merge of Linux 2.6.12.
- *!
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/gpio.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/gpio.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/gpio.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/gpio.c 2007-02-05 12:54:34.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: gpio.c,v 1.17 2005/06/19 17:06:46 starvik Exp $
-+/* $Id: gpio.c,v 1.28 2007/02/05 11:54:34 pkj Exp $
- *
- * Etrax general port I/O device
- *
-@@ -9,6 +9,40 @@
- * Johan Adolfsson (read/set directions, write, port G)
- *
- * $Log: gpio.c,v $
-+ * Revision 1.28 2007/02/05 11:54:34 pkj
-+ * Merge of Linux 2.6.19
-+ *
-+ * Revision 1.27 2006/12/12 11:08:30 edgar
-+ * In etrax_gpio_wake_up_check(), make flags unsigned long.
-+ *
-+ * Revision 1.26 2006/11/02 10:54:29 pkj
-+ * Restored unique device id for request_irq() which was lost in the
-+ * merge of 2.6.18.
-+ *
-+ * Revision 1.25 2006/10/13 12:43:10 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.24 2006/07/13 07:42:20 starvik
-+ * Set unique device id in request_irq
-+ *
-+ * Revision 1.23 2006/06/21 09:38:46 starvik
-+ * Use correct spinlock macros
-+ *
-+ * Revision 1.22 2005/08/29 07:32:16 starvik
-+ * Merge of 2.6.13
-+ *
-+ * Revision 1.21 2005/08/16 17:10:54 edgar
-+ * dont leave locked spinlocks when returning.
-+ *
-+ * Revision 1.20 2005/08/15 13:10:47 orjanf
-+ * Don't link struct into alarmlist until fully initialized.
-+ *
-+ * Revision 1.19 2005/07/13 11:43:11 karljope
-+ * Corrected typo
-+ *
-+ * Revision 1.18 2005/06/21 12:26:53 starvik
-+ * Improved alarm list locking.
-+ *
- * Revision 1.17 2005/06/19 17:06:46 starvik
- * Merge of Linux 2.6.12.
- *
-@@ -277,7 +311,7 @@
- unsigned int mask = 0;
- struct gpio_private *priv = (struct gpio_private *)file->private_data;
- unsigned long data;
-- spin_lock(&gpio_lock);
-+ spin_lock_irq(&gpio_lock);
- poll_wait(file, &priv->alarm_wq, wait);
- if (priv->minor == GPIO_MINOR_A) {
- unsigned long flags;
-@@ -297,15 +331,17 @@
- data = *R_PORT_PB_DATA;
- else if (priv->minor == GPIO_MINOR_G)
- data = *R_PORT_G_DATA;
-- else
-+ else {
-+ spin_unlock_irq(&gpio_lock);
- return 0;
-+ }
-
- if ((data & priv->highalarm) ||
- (~data & priv->lowalarm)) {
- mask = POLLIN|POLLRDNORM;
- }
-
-- spin_unlock(&gpio_lock);
-+ spin_unlock_irq(&gpio_lock);
-
- DP(printk("gpio_poll ready: mask 0x%08X\n", mask));
-
-@@ -314,10 +350,12 @@
-
- int etrax_gpio_wake_up_check(void)
- {
-- struct gpio_private *priv = alarmlist;
-+ struct gpio_private *priv;
- unsigned long data = 0;
- int ret = 0;
-- spin_lock(&gpio_lock);
-+ unsigned long flags;
-+ spin_lock_irqsave(&gpio_lock, flags);
-+ priv = alarmlist;
- while (priv) {
- if (USE_PORTS(priv)) {
- data = *priv->port;
-@@ -332,12 +370,12 @@
- }
- priv = priv->next;
- }
-- spin_unlock(&gpio_lock);
-+ spin_unlock_irqrestore(&gpio_lock, flags);
- return ret;
- }
-
- static irqreturn_t
--gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+gpio_poll_timer_interrupt(int irq, void *dev_id)
- {
- if (gpio_some_alarms) {
- etrax_gpio_wake_up_check();
-@@ -347,7 +385,7 @@
- }
-
- static irqreturn_t
--gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+gpio_pa_interrupt(int irq, void *dev_id)
- {
- unsigned long tmp;
- spin_lock(&gpio_lock);
-@@ -376,9 +414,6 @@
- struct gpio_private *priv = (struct gpio_private *)file->private_data;
- unsigned char data, clk_mask, data_mask, write_msb;
- unsigned long flags;
--
-- spin_lock(&gpio_lock);
--
- ssize_t retval = count;
- if (priv->minor !=GPIO_MINOR_A && priv->minor != GPIO_MINOR_B) {
- return -EFAULT;
-@@ -394,6 +429,7 @@
- if (clk_mask == 0 || data_mask == 0) {
- return -EPERM;
- }
-+ spin_lock_irq(&gpio_lock);
- write_msb = priv->write_msb;
- D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb));
- while (count--) {
-@@ -425,7 +461,7 @@
- }
- }
- }
-- spin_unlock(&gpio_lock);
-+ spin_unlock_irq(&gpio_lock);
- return retval;
- }
-
-@@ -445,13 +481,12 @@
-
- if (!priv)
- return -ENOMEM;
-+ memset(priv, 0, sizeof(*priv));
-
- priv->minor = p;
-
-- /* initialize the io/alarm struct and link it into our alarmlist */
-+ /* initialize the io/alarm struct */
-
-- priv->next = alarmlist;
-- alarmlist = priv;
- if (USE_PORTS(priv)) { /* A and B */
- priv->port = ports[p];
- priv->shadow = shads[p];
-@@ -476,6 +511,12 @@
-
- filp->private_data = (void *)priv;
-
-+ /* link it into our alarmlist */
-+ spin_lock_irq(&gpio_lock);
-+ priv->next = alarmlist;
-+ alarmlist = priv;
-+ spin_unlock_irq(&gpio_lock);
-+
- return 0;
- }
-
-@@ -485,10 +526,10 @@
- struct gpio_private *p;
- struct gpio_private *todel;
-
-- spin_lock(&gpio_lock);
-+ spin_lock_irq(&gpio_lock);
-
-- p = alarmlist;
-- todel = (struct gpio_private *)filp->private_data;
-+ p = alarmlist;
-+ todel = (struct gpio_private *)filp->private_data;
-
- /* unlink from alarmlist and free the private structure */
-
-@@ -506,12 +547,13 @@
- while (p) {
- if (p->highalarm | p->lowalarm) {
- gpio_some_alarms = 1;
-+ spin_unlock_irq(&gpio_lock);
- return 0;
- }
- p = p->next;
- }
- gpio_some_alarms = 0;
-- spin_unlock(&gpio_lock);
-+ spin_unlock_irq(&gpio_lock);
- return 0;
- }
-
-@@ -691,6 +733,8 @@
- /* Must update gpio_some_alarms */
- struct gpio_private *p = alarmlist;
- int some_alarms;
-+ spin_lock_irq(&gpio_lock);
-+ p = alarmlist;
- some_alarms = 0;
- while (p) {
- if (p->highalarm | p->lowalarm) {
-@@ -700,6 +744,7 @@
- p = p->next;
- }
- gpio_some_alarms = some_alarms;
-+ spin_unlock_irq(&gpio_lock);
- }
- break;
- case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
-@@ -937,11 +982,11 @@
- * in some tests.
- */
- if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
-- IRQF_SHARED | IRQF_DISABLED,"gpio poll", NULL)) {
-+ IRQF_SHARED | IRQF_DISABLED,"gpio poll", gpio_name)) {
- printk(KERN_CRIT "err: timer0 irq for gpio\n");
- }
- if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt,
-- IRQF_SHARED | IRQF_DISABLED,"gpio PA", NULL)) {
-+ IRQF_SHARED | IRQF_DISABLED,"gpio PA", gpio_name)) {
- printk(KERN_CRIT "err: PA irq for gpio\n");
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/i2c.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/i2c.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/i2c.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/i2c.c 2006-10-13 14:43:10.000000000 +0200
-@@ -11,7 +11,25 @@
- *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
- *! don't use PB_I2C if DS1302 uses same bits,
- *! use PB.
-+*! June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
-+*! generates nack on last received byte,
-+*! instead of ack.
-+*! i2c_getack changed data level while clock
-+*! was high, causing DS75 to see a stop condition
-+*!
- *! $Log: i2c.c,v $
-+*! Revision 1.17 2006/10/13 12:43:10 starvik
-+*! Merge of 2.6.18
-+*!
-+*! Revision 1.16 2005/09/29 13:33:35 bjarne
-+*! If "first" should have any purpos it should probably change value....
-+*!
-+*! Revision 1.15 2005/08/29 07:32:16 starvik
-+*! Merge of 2.6.13
-+*!
-+*! Revision 1.14 2005/06/30 18:07:31 starvik
-+*! Added the sendnack patch from 2.4.
-+*!
- *! Revision 1.13 2005/03/07 13:13:07 starvik
- *! Added spinlocks to protect states etc
- *!
-@@ -84,7 +102,7 @@
- *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
- *!
- *!***************************************************************************/
--/* $Id: i2c.c,v 1.13 2005/03/07 13:13:07 starvik Exp $ */
-+/* $Id: i2c.c,v 1.17 2006/10/13 12:43:10 starvik Exp $ */
-
- /****************** INCLUDE FILES SECTION ***********************************/
-
-@@ -480,7 +498,7 @@
- i2c_delay(CLOCK_HIGH_TIME);
- i2c_clk(I2C_CLOCK_LOW);
- i2c_delay(CLOCK_LOW_TIME);
--
-+
- i2c_dir_in();
- }
-
-@@ -622,7 +640,7 @@
- * last received byte needs to be nacked
- * instead of acked
- */
-- i2c_sendack();
-+ i2c_sendnack();
- /*
- * end sequence
- */
-@@ -708,6 +726,7 @@
- if (!first) {
- return res;
- }
-+ first = 0;
-
- /* Setup and enable the Port B I2C interface */
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/pcf8563.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/pcf8563.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/pcf8563.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/pcf8563.c 2006-10-27 17:22:12.000000000 +0200
-@@ -8,14 +8,13 @@
- * low detector are also provided. All address and data are transferred
- * serially via two-line bidirectional I2C-bus. Maximum bus speed is
- * 400 kbits/s. The built-in word address register is incremented
-- * automatically after each written or read bute.
-+ * automatically after each written or read byte.
- *
-- * Copyright (c) 2002, Axis Communications AB
-+ * Copyright (c) 2002-2006, Axis Communications AB
- * All rights reserved.
- *
- * Author: Tobias Anderberg <tobiasa@axis.com>.
- *
-- * $Id: pcf8563.c,v 1.11 2005/03/07 13:13:07 starvik Exp $
- */
-
- #include <linux/module.h>
-@@ -27,93 +26,105 @@
- #include <linux/ioctl.h>
- #include <linux/delay.h>
- #include <linux/bcd.h>
--#include <linux/capability.h>
-
- #include <asm/uaccess.h>
- #include <asm/system.h>
- #include <asm/io.h>
--#include <asm/arch/svinto.h>
- #include <asm/rtc.h>
-+
- #include "i2c.h"
-
--#define PCF8563_MAJOR 121 /* Local major number. */
--#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
--#define PCF8563_NAME "PCF8563"
--#define DRIVER_VERSION "$Revision: 1.11 $"
--
--/* I2C bus slave registers. */
--#define RTC_I2C_READ 0xa3
--#define RTC_I2C_WRITE 0xa2
-+#define PCF8563_MAJOR 121 /* Local major number. */
-+#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
-+#define PCF8563_NAME "PCF8563"
-+#define DRIVER_VERSION "$Revision: 1.18 $"
-
- /* Two simple wrapper macros, saves a few keystrokes. */
- #define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
- #define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
-
- static DEFINE_SPINLOCK(rtc_lock); /* Protect state etc */
--
-+
- static const unsigned char days_in_month[] =
- { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
-
- int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
-
-+/* Cache VL bit value read at driver init since writing the RTC_SECOND
-+ * register clears the VL status.
-+ */
-+static int voltage_low = 0;
-+
- static struct file_operations pcf8563_fops = {
-- .owner = THIS_MODULE,
-- .ioctl = pcf8563_ioctl,
-+ owner: THIS_MODULE,
-+ ioctl: pcf8563_ioctl,
- };
-
- unsigned char
--pcf8563_readreg(int reg)
-+pcf8563_readreg(int reg)
- {
-- unsigned char res = i2c_readreg(RTC_I2C_READ, reg);
-+ unsigned char res = rtc_read(reg);
-
-- /* The PCF8563 does not return 0 for unimplemented bits */
-- switch(reg)
-- {
-+ /* The PCF8563 does not return 0 for unimplemented bits. */
-+ switch (reg) {
- case RTC_SECONDS:
- case RTC_MINUTES:
-- res &= 0x7f;
-- break;
-+ res &= 0x7F;
-+ break;
- case RTC_HOURS:
- case RTC_DAY_OF_MONTH:
-- res &= 0x3f;
-- break;
-+ res &= 0x3F;
-+ break;
-+ case RTC_WEEKDAY:
-+ res &= 0x07;
-+ break;
- case RTC_MONTH:
-- res = (res & 0x1f) - 1; /* PCF8563 returns month in range 1-12 */
-- break;
-+ res &= 0x1F;
-+ break;
-+ case RTC_CONTROL1:
-+ res &= 0xA8;
-+ break;
-+ case RTC_CONTROL2:
-+ res &= 0x1F;
-+ break;
-+ case RTC_CLOCKOUT_FREQ:
-+ case RTC_TIMER_CONTROL:
-+ res &= 0x83;
-+ break;
- }
- return res;
- }
-
- void
--pcf8563_writereg(int reg, unsigned char val)
-+pcf8563_writereg(int reg, unsigned char val)
- {
--#ifdef CONFIG_ETRAX_RTC_READONLY
-- if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
-- return;
--#endif
--
- rtc_write(reg, val);
- }
-
- void
- get_rtc_time(struct rtc_time *tm)
- {
-- tm->tm_sec = rtc_read(RTC_SECONDS);
-- tm->tm_min = rtc_read(RTC_MINUTES);
-+ tm->tm_sec = rtc_read(RTC_SECONDS);
-+ tm->tm_min = rtc_read(RTC_MINUTES);
- tm->tm_hour = rtc_read(RTC_HOURS);
- tm->tm_mday = rtc_read(RTC_DAY_OF_MONTH);
-- tm->tm_mon = rtc_read(RTC_MONTH);
-+ tm->tm_wday = rtc_read(RTC_WEEKDAY);
-+ tm->tm_mon = rtc_read(RTC_MONTH);
- tm->tm_year = rtc_read(RTC_YEAR);
-
-- if (tm->tm_sec & 0x80)
-- printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME);
-+ if (tm->tm_sec & 0x80) {
-+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
-+ "information is no longer guaranteed!\n", PCF8563_NAME);
-+ }
-
-- tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0);
-- tm->tm_sec &= 0x7f;
-- tm->tm_min &= 0x7f;
-- tm->tm_hour &= 0x3f;
-- tm->tm_mday &= 0x3f;
-- tm->tm_mon &= 0x1f;
-+ tm->tm_year = BCD_TO_BIN(tm->tm_year) +
-+ ((tm->tm_mon & 0x80) ? 100 : 0);
-+ tm->tm_sec &= 0x7F;
-+ tm->tm_min &= 0x7F;
-+ tm->tm_hour &= 0x3F;
-+ tm->tm_mday &= 0x3F;
-+ tm->tm_wday &= 0x07; /* Not coded in BCD. */
-+ tm->tm_mon &= 0x1F;
-
- BCD_TO_BIN(tm->tm_sec);
- BCD_TO_BIN(tm->tm_min);
-@@ -126,17 +137,25 @@
- int __init
- pcf8563_init(void)
- {
-- int ret;
-+ static int res = 0;
-+ static int first = 1;
-+
-+ if (!first) {
-+ return res;
-+ }
-+ first = 0;
-
-- if ((ret = i2c_init())) {
-- printk(KERN_CRIT "pcf8563_init: failed to init i2c\n");
-- return ret;
-+ /* Initiate the i2c protocol. */
-+ res = i2c_init();
-+ if (res < 0) {
-+ printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
-+ return res;
- }
-
- /*
- * First of all we need to reset the chip. This is done by
-- * clearing control1, control2 and clk freq, clear the
-- * Voltage Low bit, and resetting all alarms.
-+ * clearing control1, control2 and clk freq and resetting
-+ * all alarms.
- */
- if (rtc_write(RTC_CONTROL1, 0x00) < 0)
- goto err;
-@@ -147,41 +166,44 @@
- if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) < 0)
- goto err;
-
-- /* Clear the VL bit in the seconds register. */
-- ret = rtc_read(RTC_SECONDS);
--
-- if (rtc_write(RTC_SECONDS, (ret & 0x7f)) < 0)
-+ if (rtc_write(RTC_TIMER_CONTROL, 0x03) < 0)
- goto err;
--
-+
- /* Reset the alarms. */
-- if (rtc_write(RTC_MINUTE_ALARM, 0x00) < 0)
-+ if (rtc_write(RTC_MINUTE_ALARM, 0x80) < 0)
- goto err;
--
-- if (rtc_write(RTC_HOUR_ALARM, 0x00) < 0)
-+
-+ if (rtc_write(RTC_HOUR_ALARM, 0x80) < 0)
- goto err;
--
-- if (rtc_write(RTC_DAY_ALARM, 0x00) < 0)
-+
-+ if (rtc_write(RTC_DAY_ALARM, 0x80) < 0)
- goto err;
--
-- if (rtc_write(RTC_WEEKDAY_ALARM, 0x00) < 0)
-+
-+ if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
- goto err;
--
-- /* Check for low voltage, and warn about it.. */
-- if (rtc_read(RTC_SECONDS) & 0x80)
-- printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME);
--
-- return 0;
-+
-+ /* Check for low voltage, and warn about it. */
-+ if (rtc_read(RTC_SECONDS) & 0x80) {
-+ voltage_low = 1;
-+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
-+ "date/time information is no longer guaranteed!\n",
-+ PCF8563_NAME);
-+ }
-+
-+ return res;
-
- err:
- printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
-- return -1;
-+ res = -1;
-+ return res;
- }
-
- void __exit
- pcf8563_exit(void)
- {
- if (unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME) < 0) {
-- printk(KERN_INFO "%s: Unable to unregister device.\n", PCF8563_NAME);
-+ printk(KERN_INFO "%s: Unable to unregister device.\n",
-+ PCF8563_NAME);
- }
- }
-
-@@ -190,7 +212,8 @@
- * POSIX says so!
- */
- int
--pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
-+pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
-+ unsigned long arg)
- {
- /* Some sanity checks. */
- if (_IOC_TYPE(cmd) != RTC_MAGIC)
-@@ -201,123 +224,151 @@
-
- switch (cmd) {
- case RTC_RD_TIME:
-- {
-- struct rtc_time tm;
--
-- spin_lock(&rtc_lock);
-- get_rtc_time(&tm);
-+ {
-+ struct rtc_time tm;
-
-- if (copy_to_user((struct rtc_time *) arg, &tm, sizeof(struct rtc_time))) {
-- spin_unlock(&rtc_lock);
-- return -EFAULT;
-- }
-+ spin_lock(&rtc_lock);
-+ memset(&tm, 0, sizeof tm);
-+ get_rtc_time(&tm);
-
-+ if (copy_to_user((struct rtc_time *) arg, &tm,
-+ sizeof tm)) {
- spin_unlock(&rtc_lock);
-- return 0;
-+ return -EFAULT;
- }
-- break;
-+
-+ spin_unlock(&rtc_lock);
-+
-+ return 0;
-+ }
- case RTC_SET_TIME:
-- {
--#ifdef CONFIG_ETRAX_RTC_READONLY
-+ {
-+ int leap;
-+ int year;
-+ int century;
-+ struct rtc_time tm;
-+
-+ memset(&tm, 0, sizeof tm);
-+ if (!capable(CAP_SYS_TIME))
- return -EPERM;
--#else
-- int leap;
-- int century;
-- struct rtc_time tm;
--
-- memset(&tm, 0, sizeof (struct rtc_time));
-- if (!capable(CAP_SYS_TIME))
-- return -EPERM;
--
-- if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof(struct rtc_time)))
-- return -EFAULT;
--
-- /* Convert from struct tm to struct rtc_time. */
-- tm.tm_year += 1900;
-- tm.tm_mon += 1;
--
-- leap = ((tm.tm_mon == 2) && ((tm.tm_year % 4) == 0)) ? 1 : 0;
--
-- /* Perform some sanity checks. */
-- if ((tm.tm_year < 1970) ||
-- (tm.tm_mon > 12) ||
-- (tm.tm_mday == 0) ||
-- (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
-- (tm.tm_hour >= 24) ||
-- (tm.tm_min >= 60) ||
-- (tm.tm_sec >= 60))
-- return -EINVAL;
--
-- century = (tm.tm_year >= 2000) ? 0x80 : 0;
-- tm.tm_year = tm.tm_year % 100;
--
-- BIN_TO_BCD(tm.tm_year);
-- BIN_TO_BCD(tm.tm_mday);
-- BIN_TO_BCD(tm.tm_hour);
-- BIN_TO_BCD(tm.tm_min);
-- BIN_TO_BCD(tm.tm_sec);
-- tm.tm_mon |= century;
--
-- spin_lock(&rtc_lock);
--
-- rtc_write(RTC_YEAR, tm.tm_year);
-- rtc_write(RTC_MONTH, tm.tm_mon);
-- rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
-- rtc_write(RTC_HOURS, tm.tm_hour);
-- rtc_write(RTC_MINUTES, tm.tm_min);
-- rtc_write(RTC_SECONDS, tm.tm_sec);
-
-- spin_unlock(&rtc_lock);
-+ if (copy_from_user(&tm, (struct rtc_time *) arg,
-+ sizeof tm)) {
-+ return -EFAULT;
-+ }
-
-- return 0;
--#endif /* !CONFIG_ETRAX_RTC_READONLY */
-+ /* Convert from struct tm to struct rtc_time. */
-+ tm.tm_year += 1900;
-+ tm.tm_mon += 1;
-+
-+ /*
-+ * Check if tm.tm_year is a leap year. A year is a leap
-+ * year if it is divisible by 4 but not 100, except
-+ * that years divisible by 400 _are_ leap years.
-+ */
-+ year = tm.tm_year;
-+ leap = (tm.tm_mon == 2) &&
-+ ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
-+
-+ /* Perform some sanity checks. */
-+ if ((tm.tm_year < 1970) ||
-+ (tm.tm_mon > 12) ||
-+ (tm.tm_mday == 0) ||
-+ (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
-+ (tm.tm_wday >= 7) ||
-+ (tm.tm_hour >= 24) ||
-+ (tm.tm_min >= 60) ||
-+ (tm.tm_sec >= 60)) {
-+ return -EINVAL;
- }
-
-- case RTC_VLOW_RD:
-- {
-- int vl_bit = 0;
-+ century = (tm.tm_year >= 2000) ? 0x80 : 0;
-+ tm.tm_year = tm.tm_year % 100;
-
-- if (rtc_read(RTC_SECONDS) & 0x80) {
-- vl_bit = 1;
-- printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
-- "date/time information is no longer guaranteed!\n",
-- PCF8563_NAME);
-- }
-- if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
-- return -EFAULT;
-+ BIN_TO_BCD(tm.tm_year);
-+ BIN_TO_BCD(tm.tm_mon);
-+ BIN_TO_BCD(tm.tm_mday);
-+ BIN_TO_BCD(tm.tm_hour);
-+ BIN_TO_BCD(tm.tm_min);
-+ BIN_TO_BCD(tm.tm_sec);
-+ tm.tm_mon |= century;
-+
-+ spin_lock(&rtc_lock);
-+
-+ rtc_write(RTC_YEAR, tm.tm_year);
-+ rtc_write(RTC_MONTH, tm.tm_mon);
-+ rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
-+ rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
-+ rtc_write(RTC_HOURS, tm.tm_hour);
-+ rtc_write(RTC_MINUTES, tm.tm_min);
-+ rtc_write(RTC_SECONDS, tm.tm_sec);
-+
-+ spin_unlock(&rtc_lock);
-
- return 0;
- }
-+ case RTC_VLOW_RD:
-+ if (voltage_low) {
-+ printk(KERN_WARNING "%s: RTC Voltage Low - "
-+ "reliable date/time information is no "
-+ "longer guaranteed!\n", PCF8563_NAME);
-+ }
-+
-+ if (copy_to_user((int *) arg, &voltage_low, sizeof(int))) {
-+ return -EFAULT;
-+ }
-+
-+ return 0;
-
- case RTC_VLOW_SET:
- {
-- /* Clear the VL bit in the seconds register */
-+ /* Clear the VL bit in the seconds register in case
-+ * the time has not been set already (which would
-+ * have cleared it). This does not really matter
-+ * because of the cached voltage_low value but do it
-+ * anyway for consistency. */
-+
- int ret = rtc_read(RTC_SECONDS);
-
- rtc_write(RTC_SECONDS, (ret & 0x7F));
-
-+ /* Clear the cached value. */
-+ voltage_low = 0;
-+
- return 0;
- }
--
- default:
-- return -ENOTTY;
-+ return -ENOTTY;
- }
-
- return 0;
- }
-
--static int __init
-+static int __init
- pcf8563_register(void)
- {
-- pcf8563_init();
-+ if (pcf8563_init() < 0) {
-+ printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
-+ "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
-+ return -1;
-+ }
-+
- if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
-- printk(KERN_INFO "%s: Unable to get major numer %d for RTC device.\n",
-- PCF8563_NAME, PCF8563_MAJOR);
-+ printk(KERN_INFO "%s: Unable to get major numer %d for RTC "
-+ "device.\n", PCF8563_NAME, PCF8563_MAJOR);
- return -1;
- }
-
-- printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
-- return 0;
-+ printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
-+ DRIVER_VERSION);
-+
-+ /* Check for low voltage, and warn about it. */
-+ if (voltage_low) {
-+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
-+ "information is no longer guaranteed!\n", PCF8563_NAME);
-+ }
-+
-+ return 0;
- }
-
- module_init(pcf8563_register);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/sync_serial.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/sync_serial.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/sync_serial.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/sync_serial.c 2007-02-05 12:56:34.000000000 +0100
-@@ -0,0 +1,1329 @@
-+/*
-+ * Simple synchronous serial port driver for ETRAX 100LX.
-+ *
-+ * Synchronous serial ports are used for continuous streamed data like audio.
-+ * The default setting for this driver is compatible with the STA 013 MP3
-+ * decoder. The driver can easily be tuned to fit other audio encoder/decoders
-+ * and SPI
-+ *
-+ * Copyright (c) 2001-2006 Axis Communications AB
-+ *
-+ * Author: Mikael Starvik, Johan Adolfsson
-+ *
-+ */
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/major.h>
-+#include <linux/sched.h>
-+#include <linux/slab.h>
-+#include <linux/interrupt.h>
-+#include <linux/poll.h>
-+#include <linux/init.h>
-+#include <linux/timer.h>
-+#include <asm/irq.h>
-+#include <asm/dma.h>
-+#include <asm/io.h>
-+#include <asm/arch/svinto.h>
-+#include <asm/uaccess.h>
-+#include <asm/system.h>
-+#include <asm/sync_serial.h>
-+#include <asm/arch/io_interface_mux.h>
-+
-+/* The receiver is a bit tricky beacuse of the continuous stream of data.*/
-+/* */
-+/* Three DMA descriptors are linked together. Each DMA descriptor is */
-+/* responsible for port->bufchunk of a common buffer. */
-+/* */
-+/* +---------------------------------------------+ */
-+/* | +----------+ +----------+ +----------+ | */
-+/* +-> | Descr[0] |-->| Descr[1] |-->| Descr[2] |-+ */
-+/* +----------+ +----------+ +----------+ */
-+/* | | | */
-+/* v v v */
-+/* +-------------------------------------+ */
-+/* | BUFFER | */
-+/* +-------------------------------------+ */
-+/* |<- data_avail ->| */
-+/* readp writep */
-+/* */
-+/* If the application keeps up the pace readp will be right after writep.*/
-+/* If the application can't keep the pace we have to throw away data. */
-+/* The idea is that readp should be ready with the data pointed out by */
-+/* Descr[i] when the DMA has filled in Descr[i+1]. */
-+/* Otherwise we will discard */
-+/* the rest of the data pointed out by Descr1 and set readp to the start */
-+/* of Descr2 */
-+
-+#define SYNC_SERIAL_MAJOR 125
-+
-+/* IN_BUFFER_SIZE should be a multiple of 6 to make sure that 24 bit */
-+/* words can be handled */
-+#define IN_BUFFER_SIZE 12288
-+#define IN_DESCR_SIZE 256
-+#define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
-+#define OUT_BUFFER_SIZE 4096
-+
-+#define DEFAULT_FRAME_RATE 0
-+#define DEFAULT_WORD_RATE 7
-+
-+/* NOTE: Enabling some debug will likely cause overrun or underrun,
-+ * especially if manual mode is use.
-+ */
-+#define DEBUG(x)
-+#define DEBUGREAD(x)
-+#define DEBUGWRITE(x)
-+#define DEBUGPOLL(x)
-+#define DEBUGRXINT(x)
-+#define DEBUGTXINT(x)
-+
-+/* Define some macros to access ETRAX 100 registers */
-+#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
-+ IO_FIELD_(reg##_, field##_, val)
-+#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
-+ IO_STATE_(reg##_, field##_, _##val)
-+
-+typedef struct sync_port
-+{
-+ /* Etrax registers and bits*/
-+ const volatile unsigned * const status;
-+ volatile unsigned * const ctrl_data;
-+ volatile unsigned * const output_dma_first;
-+ volatile unsigned char * const output_dma_cmd;
-+ volatile unsigned char * const output_dma_clr_irq;
-+ volatile unsigned * const input_dma_first;
-+ volatile unsigned char * const input_dma_cmd;
-+ volatile unsigned * const input_dma_descr;
-+ /* 8*4 */
-+ volatile unsigned char * const input_dma_clr_irq;
-+ volatile unsigned * const data_out;
-+ const volatile unsigned * const data_in;
-+ char data_avail_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
-+ char transmitter_ready_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
-+ char input_dma_descr_bit; /* In R_IRQ_MASK2_RD */
-+
-+ char output_dma_bit; /* In R_IRQ_MASK2_RD */
-+ /* End of fields initialised in array */
-+ char started; /* 1 if port has been started */
-+ char port_nbr; /* Port 0 or 1 */
-+ char busy; /* 1 if port is busy */
-+
-+ char enabled; /* 1 if port is enabled */
-+ char use_dma; /* 1 if port uses dma */
-+ char tr_running;
-+
-+ char init_irqs;
-+
-+ unsigned int ctrl_data_shadow; /* Register shadow */
-+ volatile unsigned int out_count; /* Remaining bytes for current transfer */
-+ unsigned char* outp; /* Current position in out_buffer */
-+ /* 16*4 */
-+ volatile unsigned char* volatile readp; /* Next byte to be read by application */
-+ volatile unsigned char* volatile writep; /* Next byte to be written by etrax */
-+ unsigned int in_buffer_size;
-+ unsigned int inbufchunk;
-+ struct etrax_dma_descr out_descr __attribute__ ((aligned(32)));
-+ struct etrax_dma_descr in_descr[NUM_IN_DESCR] __attribute__ ((aligned(32)));
-+ unsigned char out_buffer[OUT_BUFFER_SIZE] __attribute__ ((aligned(32)));
-+ unsigned char in_buffer[IN_BUFFER_SIZE]__attribute__ ((aligned(32)));
-+ unsigned char flip[IN_BUFFER_SIZE] __attribute__ ((aligned(32)));
-+ struct etrax_dma_descr* next_rx_desc;
-+ struct etrax_dma_descr* prev_rx_desc;
-+ int full;
-+
-+ wait_queue_head_t out_wait_q;
-+ wait_queue_head_t in_wait_q;
-+} sync_port;
-+
-+
-+static int etrax_sync_serial_init(void);
-+static void initialize_port(int portnbr);
-+static inline int sync_data_avail(struct sync_port *port);
-+
-+static int sync_serial_open(struct inode *, struct file*);
-+static int sync_serial_release(struct inode*, struct file*);
-+static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
-+
-+static int sync_serial_ioctl(struct inode*, struct file*,
-+ unsigned int cmd, unsigned long arg);
-+static ssize_t sync_serial_write(struct file * file, const char * buf,
-+ size_t count, loff_t *ppos);
-+static ssize_t sync_serial_read(struct file *file, char *buf,
-+ size_t count, loff_t *ppos);
-+
-+#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
-+ defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
-+ (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
-+ defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA))
-+#define SYNC_SER_DMA
-+#endif
-+
-+static void send_word(sync_port* port);
-+static void start_dma(struct sync_port *port, const char* data, int count);
-+static void start_dma_in(sync_port* port);
-+#ifdef SYNC_SER_DMA
-+static irqreturn_t tr_interrupt(int irq, void *dev_id);
-+static irqreturn_t rx_interrupt(int irq, void *dev_id);
-+#endif
-+#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
-+ !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
-+ (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
-+ !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA))
-+#define SYNC_SER_MANUAL
-+#endif
-+#ifdef SYNC_SER_MANUAL
-+static irqreturn_t manual_interrupt(int irq, void *dev_id);
-+#endif
-+
-+/* The ports */
-+static struct sync_port ports[]=
-+{
-+ {
-+ .status = R_SYNC_SERIAL1_STATUS,
-+ .ctrl_data = R_SYNC_SERIAL1_CTRL,
-+ .output_dma_first = R_DMA_CH8_FIRST,
-+ .output_dma_cmd = R_DMA_CH8_CMD,
-+ .output_dma_clr_irq = R_DMA_CH8_CLR_INTR,
-+ .input_dma_first = R_DMA_CH9_FIRST,
-+ .input_dma_cmd = R_DMA_CH9_CMD,
-+ .input_dma_descr = R_DMA_CH9_DESCR,
-+ .input_dma_clr_irq = R_DMA_CH9_CLR_INTR,
-+ .data_out = R_SYNC_SERIAL1_TR_DATA,
-+ .data_in = R_SYNC_SERIAL1_REC_DATA,
-+ .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_data),
-+ .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_ready),
-+ .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma9_descr),
-+ .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma8_eop),
-+ .init_irqs = 1,
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
-+ .use_dma = 1,
-+#else
-+ .use_dma = 0,
-+#endif
-+ },
-+ {
-+ .status = R_SYNC_SERIAL3_STATUS,
-+ .ctrl_data = R_SYNC_SERIAL3_CTRL,
-+ .output_dma_first = R_DMA_CH4_FIRST,
-+ .output_dma_cmd = R_DMA_CH4_CMD,
-+ .output_dma_clr_irq = R_DMA_CH4_CLR_INTR,
-+ .input_dma_first = R_DMA_CH5_FIRST,
-+ .input_dma_cmd = R_DMA_CH5_CMD,
-+ .input_dma_descr = R_DMA_CH5_DESCR,
-+ .input_dma_clr_irq = R_DMA_CH5_CLR_INTR,
-+ .data_out = R_SYNC_SERIAL3_TR_DATA,
-+ .data_in = R_SYNC_SERIAL3_REC_DATA,
-+ .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_data),
-+ .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_ready),
-+ .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma5_descr),
-+ .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma4_eop),
-+ .init_irqs = 1,
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
-+ .use_dma = 1,
-+#else
-+ .use_dma = 0,
-+#endif
-+ }
-+};
-+
-+/* Register shadows */
-+static unsigned sync_serial_prescale_shadow = 0;
-+
-+#define NUMBER_OF_PORTS (sizeof(ports)/sizeof(sync_port))
-+
-+static struct file_operations sync_serial_fops = {
-+ .owner = THIS_MODULE,
-+ .write = sync_serial_write,
-+ .read = sync_serial_read,
-+ .poll = sync_serial_poll,
-+ .ioctl = sync_serial_ioctl,
-+ .open = sync_serial_open,
-+ .release = sync_serial_release
-+};
-+
-+static int __init etrax_sync_serial_init(void)
-+{
-+ ports[0].enabled = 0;
-+ ports[1].enabled = 0;
-+
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
-+ if (cris_request_io_interface(if_sync_serial_1, "sync_ser1")) {
-+ printk(KERN_CRIT "ETRAX100LX sync_serial: Could not allocate IO group for port %d\n", 0);
-+ return -EBUSY;
-+ }
-+#endif
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
-+ if (cris_request_io_interface(if_sync_serial_3, "sync_ser3")) {
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
-+ cris_free_io_interface(if_sync_serial_1);
-+#endif
-+ printk(KERN_CRIT "ETRAX100LX sync_serial: Could not allocate IO group for port %d\n", 1);
-+ return -EBUSY;
-+ }
-+#endif
-+
-+ if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
-+ {
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
-+ cris_free_io_interface(if_sync_serial_3);
-+#endif
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
-+ cris_free_io_interface(if_sync_serial_1);
-+#endif
-+ printk("unable to get major for synchronous serial port\n");
-+ return -EBUSY;
-+ }
-+
-+ /* Deselect synchronous serial ports while configuring. */
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
-+ *R_GEN_CONFIG_II = gen_config_ii_shadow;
-+
-+ /* Initialize Ports */
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
-+ ports[0].enabled = 1;
-+ SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser1, ss1extra);
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
-+ ports[0].use_dma = 1;
-+#else
-+ ports[0].use_dma = 0;
-+#endif
-+ initialize_port(0);
-+#endif
-+
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
-+ ports[1].enabled = 1;
-+ SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser3, ss3extra);
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
-+#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
-+ ports[1].use_dma = 1;
-+#else
-+ ports[1].use_dma = 0;
-+#endif
-+ initialize_port(1);
-+#endif
-+
-+ *R_PORT_PB_I2C = port_pb_i2c_shadow; /* Use PB4/PB7 */
-+
-+ /* Set up timing */
-+ *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow = (
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec) |
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u1, external) |
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec) |
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u3, external) |
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, prescaler, div4) |
-+ IO_FIELD(R_SYNC_SERIAL_PRESCALE, frame_rate, DEFAULT_FRAME_RATE) |
-+ IO_FIELD(R_SYNC_SERIAL_PRESCALE, word_rate, DEFAULT_WORD_RATE) |
-+ IO_STATE(R_SYNC_SERIAL_PRESCALE, warp_mode, normal));
-+
-+ /* Select synchronous ports */
-+ *R_GEN_CONFIG_II = gen_config_ii_shadow;
-+
-+ printk("ETRAX 100LX synchronous serial port driver\n");
-+ return 0;
-+}
-+
-+static void __init initialize_port(int portnbr)
-+{
-+ struct sync_port* port = &ports[portnbr];
-+
-+ DEBUG(printk("Init sync serial port %d\n", portnbr));
-+
-+ port->started = 0;
-+ port->port_nbr = portnbr;
-+ port->busy = 0;
-+ port->tr_running = 0;
-+
-+ port->out_count = 0;
-+ port->outp = port->out_buffer;
-+
-+ port->readp = port->flip;
-+ port->writep = port->flip;
-+ port->in_buffer_size = IN_BUFFER_SIZE;
-+ port->inbufchunk = IN_DESCR_SIZE;
-+ port->next_rx_desc = &port->in_descr[0];
-+ port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR-1];
-+ port->prev_rx_desc->ctrl = d_eol;
-+
-+ init_waitqueue_head(&port->out_wait_q);
-+ init_waitqueue_head(&port->in_wait_q);
-+
-+ port->ctrl_data_shadow =
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, tr_baud, c115k2Hz) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, mode, master_output) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, error, ignore) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, rec_enable, disable) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, f_synctype, normal) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, f_syncsize, word) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, f_sync, on) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_mode, normal) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_halt, stopped) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, bitorder, msb) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, tr_enable, disable) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, buf_empty, lmt_8) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, buf_full, lmt_8) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, flow_ctrl, enabled) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_polarity, neg) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, frame_polarity, normal)|
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, status_polarity, inverted)|
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_driver, normal) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, frame_driver, normal) |
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, status_driver, normal)|
-+ IO_STATE(R_SYNC_SERIAL1_CTRL, def_out0, high);
-+
-+ if (port->use_dma)
-+ port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL, dma_enable, on);
-+ else
-+ port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL, dma_enable, off);
-+
-+ *port->ctrl_data = port->ctrl_data_shadow;
-+}
-+
-+static inline int sync_data_avail(struct sync_port *port)
-+{
-+ int avail;
-+ unsigned char *start;
-+ unsigned char *end;
-+
-+ start = (unsigned char*)port->readp; /* cast away volatile */
-+ end = (unsigned char*)port->writep; /* cast away volatile */
-+ /* 0123456789 0123456789
-+ * ----- - -----
-+ * ^rp ^wp ^wp ^rp
-+ */
-+
-+ if (end >= start)
-+ avail = end - start;
-+ else
-+ avail = port->in_buffer_size - (start - end);
-+ return avail;
-+}
-+
-+static inline int sync_data_avail_to_end(struct sync_port *port)
-+{
-+ int avail;
-+ unsigned char *start;
-+ unsigned char *end;
-+
-+ start = (unsigned char*)port->readp; /* cast away volatile */
-+ end = (unsigned char*)port->writep; /* cast away volatile */
-+ /* 0123456789 0123456789
-+ * ----- -----
-+ * ^rp ^wp ^wp ^rp
-+ */
-+
-+ if (end >= start)
-+ avail = end - start;
-+ else
-+ avail = port->flip + port->in_buffer_size - start;
-+ return avail;
-+}
-+
-+
-+static int sync_serial_open(struct inode *inode, struct file *file)
-+{
-+ int dev = MINOR(inode->i_rdev);
-+ sync_port* port;
-+ int mode;
-+
-+ DEBUG(printk("Open sync serial port %d\n", dev));
-+
-+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
-+ {
-+ DEBUG(printk("Invalid minor %d\n", dev));
-+ return -ENODEV;
-+ }
-+ port = &ports[dev];
-+ /* Allow open this device twice (assuming one reader and one writer) */
-+ if (port->busy == 2)
-+ {
-+ DEBUG(printk("Device is busy.. \n"));
-+ return -EBUSY;
-+ }
-+ if (port->init_irqs) {
-+ if (port->use_dma) {
-+ if (port == &ports[0]){
-+#ifdef SYNC_SER_DMA
-+ if(request_irq(24,
-+ tr_interrupt,
-+ 0,
-+ "synchronous serial 1 dma tr",
-+ &ports[0])) {
-+ printk(KERN_CRIT "Can't allocate sync serial port 1 IRQ");
-+ return -EBUSY;
-+ } else if(request_irq(25,
-+ rx_interrupt,
-+ 0,
-+ "synchronous serial 1 dma rx",
-+ &ports[0])) {
-+ free_irq(24, &port[0]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 1 IRQ");
-+ return -EBUSY;
-+ } else if (cris_request_dma(8,
-+ "synchronous serial 1 dma tr",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_ser1)) {
-+ free_irq(24, &port[0]);
-+ free_irq(25, &port[0]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 1 TX DMA channel");
-+ return -EBUSY;
-+ } else if (cris_request_dma(9,
-+ "synchronous serial 1 dma rec",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_ser1)) {
-+ cris_free_dma(8, NULL);
-+ free_irq(24, &port[0]);
-+ free_irq(25, &port[0]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 1 RX DMA channel");
-+ return -EBUSY;
-+ }
-+#endif
-+ RESET_DMA(8); WAIT_DMA(8);
-+ RESET_DMA(9); WAIT_DMA(9);
-+ *R_DMA_CH8_CLR_INTR = IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr, do);
-+ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH9_CLR_INTR, clr_descr, do);
-+ *R_IRQ_MASK2_SET =
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_eop, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
-+ }
-+ else if (port == &ports[1]){
-+#ifdef SYNC_SER_DMA
-+ if (request_irq(20,
-+ tr_interrupt,
-+ 0,
-+ "synchronous serial 3 dma tr",
-+ &ports[1])) {
-+ printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ");
-+ return -EBUSY;
-+ } else if (request_irq(21,
-+ rx_interrupt,
-+ 0,
-+ "synchronous serial 3 dma rx",
-+ &ports[1])) {
-+ free_irq(20, &ports[1]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ");
-+ return -EBUSY;
-+ } else if (cris_request_dma(4,
-+ "synchronous serial 3 dma tr",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_ser3)) {
-+ free_irq(21, &ports[1]);
-+ free_irq(20, &ports[1]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel");
-+ return -EBUSY;
-+ } else if (cris_request_dma(5,
-+ "synchronous serial 3 dma rec",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_ser3)) {
-+ cris_free_dma(4, NULL);
-+ free_irq(21, &ports[1]);
-+ free_irq(20, &ports[1]);
-+ printk(KERN_CRIT "Can't allocate sync serial port 3 RX DMA channel");
-+ return -EBUSY;
-+ }
-+#endif
-+ RESET_DMA(4); WAIT_DMA(4);
-+ RESET_DMA(5); WAIT_DMA(5);
-+ *R_DMA_CH4_CLR_INTR = IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr, do);
-+ *R_DMA_CH5_CLR_INTR = IO_STATE(R_DMA_CH5_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH5_CLR_INTR, clr_descr, do);
-+ *R_IRQ_MASK2_SET =
-+ IO_STATE(R_IRQ_MASK2_SET, dma4_eop, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma5_descr, set);
-+ }
-+ start_dma_in(port);
-+ port->init_irqs = 0;
-+ } else { /* !port->use_dma */
-+#ifdef SYNC_SER_MANUAL
-+ if (port == &ports[0]) {
-+ if (request_irq(8,
-+ manual_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED,
-+ "synchronous serial manual irq",
-+ &ports[0])) {
-+ printk("Can't allocate sync serial manual irq");
-+ return -EBUSY;
-+ }
-+ } else if (port == &ports[1]) {
-+ if (request_irq(8,
-+ manual_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED,
-+ "synchronous serial manual irq",
-+ &ports[1])) {
-+ printk(KERN_CRIT "Can't allocate sync serial manual irq");
-+ return -EBUSY;
-+ }
-+ }
-+ port->init_irqs = 0;
-+#else
-+ panic("sync_serial: Manual mode not supported.\n");
-+#endif /* SYNC_SER_MANUAL */
-+ }
-+ } /* port->init_irqs */
-+
-+ port->busy++;
-+ /* Start port if we use it as input */
-+ mode = IO_EXTRACT(R_SYNC_SERIAL1_CTRL, mode, port->ctrl_data_shadow);
-+ if (mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_input) ||
-+ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_input) ||
-+ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_bidir) ||
-+ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_bidir)) {
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
-+ port->started = 1;
-+ *port->ctrl_data = port->ctrl_data_shadow;
-+ if (!port->use_dma)
-+ *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
-+ DEBUG(printk("sser%d rec started\n", dev));
-+ }
-+ return 0;
-+}
-+
-+static int sync_serial_release(struct inode *inode, struct file *file)
-+{
-+ int dev = MINOR(inode->i_rdev);
-+ sync_port* port;
-+
-+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
-+ {
-+ DEBUG(printk("Invalid minor %d\n", dev));
-+ return -ENODEV;
-+ }
-+ port = &ports[dev];
-+ if (port->busy)
-+ port->busy--;
-+ if (!port->busy)
-+ *R_IRQ_MASK1_CLR = ((1 << port->data_avail_bit) |
-+ (1 << port->transmitter_ready_bit));
-+
-+ return 0;
-+}
-+
-+
-+
-+static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
-+{
-+ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
-+ unsigned int mask = 0;
-+ sync_port* port;
-+ DEBUGPOLL( static unsigned int prev_mask = 0; );
-+
-+ port = &ports[dev];
-+ poll_wait(file, &port->out_wait_q, wait);
-+ poll_wait(file, &port->in_wait_q, wait);
-+ /* Some room to write */
-+ if (port->out_count < OUT_BUFFER_SIZE)
-+ mask |= POLLOUT | POLLWRNORM;
-+ /* At least an inbufchunk of data */
-+ if (sync_data_avail(port) >= port->inbufchunk)
-+ mask |= POLLIN | POLLRDNORM;
-+
-+ DEBUGPOLL(if (mask != prev_mask)
-+ printk("sync_serial_poll: mask 0x%08X %s %s\n", mask,
-+ mask&POLLOUT?"POLLOUT":"", mask&POLLIN?"POLLIN":"");
-+ prev_mask = mask;
-+ );
-+ return mask;
-+}
-+
-+static int sync_serial_ioctl(struct inode *inode, struct file *file,
-+ unsigned int cmd, unsigned long arg)
-+{
-+ int return_val = 0;
-+ unsigned long flags;
-+
-+ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
-+ sync_port* port;
-+
-+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
-+ {
-+ DEBUG(printk("Invalid minor %d\n", dev));
-+ return -1;
-+ }
-+ port = &ports[dev];
-+
-+ local_irq_save(flags);
-+ /* Disable port while changing config */
-+ if (dev)
-+ {
-+ if (port->use_dma) {
-+ RESET_DMA(4); WAIT_DMA(4);
-+ port->tr_running = 0;
-+ port->out_count = 0;
-+ port->outp = port->out_buffer;
-+ *R_DMA_CH4_CLR_INTR = IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr, do);
-+ }
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
-+ }
-+ else
-+ {
-+ if (port->use_dma) {
-+ RESET_DMA(8); WAIT_DMA(8);
-+ port->tr_running = 0;
-+ port->out_count = 0;
-+ port->outp = port->out_buffer;
-+ *R_DMA_CH8_CLR_INTR = IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr, do);
-+ }
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
-+ }
-+ *R_GEN_CONFIG_II = gen_config_ii_shadow;
-+ local_irq_restore(flags);
-+
-+ switch(cmd)
-+ {
-+ case SSP_SPEED:
-+ if (GET_SPEED(arg) == CODEC)
-+ {
-+ if (dev)
-+ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec);
-+ else
-+ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec);
-+
-+ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, prescaler, GET_FREQ(arg));
-+ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, frame_rate, GET_FRAME_RATE(arg));
-+ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, word_rate, GET_WORD_RATE(arg));
-+ }
-+ else
-+ {
-+ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_baud, GET_SPEED(arg));
-+ if (dev)
-+ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u3, baudrate);
-+ else
-+ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u1, baudrate);
-+ }
-+ break;
-+ case SSP_MODE:
-+ if (arg > 5)
-+ return -EINVAL;
-+ if (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT)
-+ *R_IRQ_MASK1_CLR = 1 << port->data_avail_bit;
-+ else if (!port->use_dma)
-+ *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
-+ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, arg);
-+ break;
-+ case SSP_FRAME_SYNC:
-+ if (arg & NORMAL_SYNC)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, normal);
-+ else if (arg & EARLY_SYNC)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, early);
-+
-+ if (arg & BIT_SYNC)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, bit);
-+ else if (arg & WORD_SYNC)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, word);
-+ else if (arg & EXTENDED_SYNC)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, extended);
-+
-+ if (arg & SYNC_ON)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
-+ else if (arg & SYNC_OFF)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, off);
-+
-+ if (arg & WORD_SIZE_8)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size8bit);
-+ else if (arg & WORD_SIZE_12)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size12bit);
-+ else if (arg & WORD_SIZE_16)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size16bit);
-+ else if (arg & WORD_SIZE_24)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size24bit);
-+ else if (arg & WORD_SIZE_32)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size32bit);
-+
-+ if (arg & BIT_ORDER_MSB)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, msb);
-+ else if (arg & BIT_ORDER_LSB)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, lsb);
-+
-+ if (arg & FLOW_CONTROL_ENABLE)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, enabled);
-+ else if (arg & FLOW_CONTROL_DISABLE)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, disabled);
-+
-+ if (arg & CLOCK_NOT_GATED)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_mode, normal);
-+ else if (arg & CLOCK_GATED)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_mode, gated);
-+
-+ break;
-+ case SSP_IPOLARITY:
-+ /* NOTE!! negedge is considered NORMAL */
-+ if (arg & CLOCK_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, neg);
-+ else if (arg & CLOCK_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, pos);
-+
-+ if (arg & FRAME_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, normal);
-+ else if (arg & FRAME_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, inverted);
-+
-+ if (arg & STATUS_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_polarity, normal);
-+ else if (arg & STATUS_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_polarity, inverted);
-+ break;
-+ case SSP_OPOLARITY:
-+ if (arg & CLOCK_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, normal);
-+ else if (arg & CLOCK_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
-+
-+ if (arg & FRAME_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, normal);
-+ else if (arg & FRAME_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, inverted);
-+
-+ if (arg & STATUS_NORMAL)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_driver, normal);
-+ else if (arg & STATUS_INVERT)
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_driver, inverted);
-+ break;
-+ case SSP_SPI:
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, disabled);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, msb);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size8bit);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, word);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, normal);
-+ if (arg & SPI_SLAVE)
-+ {
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, inverted);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, neg);
-+ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, SLAVE_INPUT);
-+ }
-+ else
-+ {
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, inverted);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
-+ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, MASTER_OUTPUT);
-+ }
-+ break;
-+ case SSP_INBUFCHUNK:
-+#if 0
-+ if (arg > port->in_buffer_size/NUM_IN_DESCR)
-+ return -EINVAL;
-+ port->inbufchunk = arg;
-+ /* Make sure in_buffer_size is a multiple of inbufchunk */
-+ port->in_buffer_size = (port->in_buffer_size/port->inbufchunk) * port->inbufchunk;
-+ DEBUG(printk("inbufchunk %i in_buffer_size: %i\n", port->inbufchunk, port->in_buffer_size));
-+ if (port->use_dma) {
-+ if (port->port_nbr == 0) {
-+ RESET_DMA(9);
-+ WAIT_DMA(9);
-+ } else {
-+ RESET_DMA(5);
-+ WAIT_DMA(5);
-+ }
-+ start_dma_in(port);
-+ }
-+#endif
-+ break;
-+ default:
-+ return_val = -1;
-+ }
-+ /* Make sure we write the config without interruption */
-+ local_irq_save(flags);
-+ /* Set config and enable port */
-+ *port->ctrl_data = port->ctrl_data_shadow;
-+ nop(); nop(); nop(); nop();
-+ *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow;
-+ nop(); nop(); nop(); nop();
-+ if (dev)
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
-+ else
-+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
-+
-+ *R_GEN_CONFIG_II = gen_config_ii_shadow;
-+ /* Reset DMA. At readout from serial port the data could be shifted
-+ * one byte if not resetting DMA.
-+ */
-+ if (port->use_dma) {
-+ if (port->port_nbr == 0) {
-+ RESET_DMA(9);
-+ WAIT_DMA(9);
-+ } else {
-+ RESET_DMA(5);
-+ WAIT_DMA(5);
-+ }
-+ start_dma_in(port);
-+ }
-+ local_irq_restore(flags);
-+ return return_val;
-+}
-+
-+
-+static ssize_t sync_serial_write(struct file * file, const char * buf,
-+ size_t count, loff_t *ppos)
-+{
-+ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
-+ DECLARE_WAITQUEUE(wait, current);
-+ sync_port *port;
-+ unsigned long flags;
-+ unsigned long c, c1;
-+ unsigned long free_outp;
-+ unsigned long outp;
-+ unsigned long out_buffer;
-+
-+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
-+ {
-+ DEBUG(printk("Invalid minor %d\n", dev));
-+ return -ENODEV;
-+ }
-+ port = &ports[dev];
-+
-+ DEBUGWRITE(printk("W d%d c %lu (%d/%d)\n", port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE));
-+ /* Space to end of buffer */
-+ /*
-+ * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE
-+ * outp^ +out_count
-+ ^free_outp
-+ * out_buffer 45<- c ->0123OUT_BUFFER_SIZE
-+ * +out_count outp^
-+ * free_outp
-+ *
-+ */
-+
-+ /* Read variables that may be updated by interrupts */
-+ local_irq_save(flags);
-+ count = count > OUT_BUFFER_SIZE - port->out_count ? OUT_BUFFER_SIZE - port->out_count : count;
-+ outp = (unsigned long)port->outp;
-+ free_outp = outp + port->out_count;
-+ local_irq_restore(flags);
-+ out_buffer = (unsigned long)port->out_buffer;
-+
-+ /* Find out where and how much to write */
-+ if (free_outp >= out_buffer + OUT_BUFFER_SIZE)
-+ free_outp -= OUT_BUFFER_SIZE;
-+ if (free_outp >= outp)
-+ c = out_buffer + OUT_BUFFER_SIZE - free_outp;
-+ else
-+ c = outp - free_outp;
-+ if (c > count)
-+ c = count;
-+
-+// DEBUGWRITE(printk("w op %08lX fop %08lX c %lu\n", outp, free_outp, c));
-+ if (copy_from_user((void*)free_outp, buf, c))
-+ return -EFAULT;
-+
-+ if (c != count) {
-+ buf += c;
-+ c1 = count - c;
-+ DEBUGWRITE(printk("w2 fi %lu c %lu c1 %lu\n", free_outp-out_buffer, c, c1));
-+ if (copy_from_user((void*)out_buffer, buf, c1))
-+ return -EFAULT;
-+ }
-+ local_irq_save(flags);
-+ port->out_count += count;
-+ local_irq_restore(flags);
-+
-+ /* Make sure transmitter/receiver is running */
-+ if (!port->started)
-+ {
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
-+ port->started = 1;
-+ }
-+
-+ *port->ctrl_data = port->ctrl_data_shadow;
-+
-+ if (file->f_flags & O_NONBLOCK) {
-+ local_irq_save(flags);
-+ if (!port->tr_running) {
-+ if (!port->use_dma) {
-+ /* Start sender by writing data */
-+ send_word(port);
-+ /* and enable transmitter ready IRQ */
-+ *R_IRQ_MASK1_SET = 1 << port->transmitter_ready_bit;
-+ } else {
-+ start_dma(port, (unsigned char* volatile )port->outp, c);
-+ }
-+ }
-+ local_irq_restore(flags);
-+ DEBUGWRITE(printk("w d%d c %lu NB\n",
-+ port->port_nbr, count));
-+ return count;
-+ }
-+
-+ /* Sleep until all sent */
-+
-+ add_wait_queue(&port->out_wait_q, &wait);
-+ set_current_state(TASK_INTERRUPTIBLE);
-+ local_irq_save(flags);
-+ if (!port->tr_running) {
-+ if (!port->use_dma) {
-+ /* Start sender by writing data */
-+ send_word(port);
-+ /* and enable transmitter ready IRQ */
-+ *R_IRQ_MASK1_SET = 1 << port->transmitter_ready_bit;
-+ } else {
-+ start_dma(port, port->outp, c);
-+ }
-+ }
-+ local_irq_restore(flags);
-+ schedule();
-+ set_current_state(TASK_RUNNING);
-+ remove_wait_queue(&port->out_wait_q, &wait);
-+ if (signal_pending(current))
-+ {
-+ return -EINTR;
-+ }
-+ DEBUGWRITE(printk("w d%d c %lu\n", port->port_nbr, count));
-+ return count;
-+}
-+
-+static ssize_t sync_serial_read(struct file * file, char * buf,
-+ size_t count, loff_t *ppos)
-+{
-+ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
-+ int avail;
-+ sync_port *port;
-+ unsigned char* start;
-+ unsigned char* end;
-+ unsigned long flags;
-+
-+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
-+ {
-+ DEBUG(printk("Invalid minor %d\n", dev));
-+ return -ENODEV;
-+ }
-+ port = &ports[dev];
-+
-+ DEBUGREAD(printk("R%d c %d ri %lu wi %lu /%lu\n", dev, count, port->readp - port->flip, port->writep - port->flip, port->in_buffer_size));
-+
-+ if (!port->started)
-+ {
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
-+ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
-+ port->started = 1;
-+ }
-+ *port->ctrl_data = port->ctrl_data_shadow;
-+
-+
-+ /* Calculate number of available bytes */
-+ /* Save pointers to avoid that they are modified by interrupt */
-+ local_irq_save(flags);
-+ start = (unsigned char*)port->readp; /* cast away volatile */
-+ end = (unsigned char*)port->writep; /* cast away volatile */
-+ local_irq_restore(flags);
-+ while ((start == end) && !port->full) /* No data */
-+ {
-+ if (file->f_flags & O_NONBLOCK)
-+ {
-+ return -EAGAIN;
-+ }
-+
-+ interruptible_sleep_on(&port->in_wait_q);
-+ if (signal_pending(current))
-+ {
-+ return -EINTR;
-+ }
-+ local_irq_save(flags);
-+ start = (unsigned char*)port->readp; /* cast away volatile */
-+ end = (unsigned char*)port->writep; /* cast away volatile */
-+ local_irq_restore(flags);
-+ }
-+
-+ /* Lazy read, never return wrapped data. */
-+ if (port->full)
-+ avail = port->in_buffer_size;
-+ else if (end > start)
-+ avail = end - start;
-+ else
-+ avail = port->flip + port->in_buffer_size - start;
-+
-+ count = count > avail ? avail : count;
-+ if (copy_to_user(buf, start, count))
-+ return -EFAULT;
-+ /* Disable interrupts while updating readp */
-+ local_irq_save(flags);
-+ port->readp += count;
-+ if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */
-+ port->readp = port->flip;
-+ port->full = 0;
-+ local_irq_restore(flags);
-+ DEBUGREAD(printk("r %d\n", count));
-+ return count;
-+}
-+
-+static void send_word(sync_port* port)
-+{
-+ switch(IO_EXTRACT(R_SYNC_SERIAL1_CTRL, wordsize, port->ctrl_data_shadow))
-+ {
-+ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
-+ port->out_count--;
-+ *port->data_out = *port->outp++;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ break;
-+ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
-+ {
-+ int data = (*port->outp++) << 8;
-+ data |= *port->outp++;
-+ port->out_count-=2;
-+ *port->data_out = data;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ }
-+ break;
-+ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
-+ port->out_count-=2;
-+ *port->data_out = *(unsigned short *)port->outp;
-+ port->outp+=2;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ break;
-+ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
-+ port->out_count-=3;
-+ *port->data_out = *(unsigned int *)port->outp;
-+ port->outp+=3;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ break;
-+ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
-+ port->out_count-=4;
-+ *port->data_out = *(unsigned int *)port->outp;
-+ port->outp+=4;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ break;
-+ }
-+}
-+
-+
-+static void start_dma(struct sync_port* port, const char* data, int count)
-+{
-+ port->tr_running = 1;
-+ port->out_descr.hw_len = 0;
-+ port->out_descr.next = 0;
-+ port->out_descr.ctrl = d_eol | d_eop; /* No d_wait to avoid glitches */
-+ port->out_descr.sw_len = count;
-+ port->out_descr.buf = virt_to_phys((char*)data);
-+ port->out_descr.status = 0;
-+
-+ *port->output_dma_first = virt_to_phys(&port->out_descr);
-+ *port->output_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
-+ DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));
-+}
-+
-+static void start_dma_in(sync_port* port)
-+{
-+ int i;
-+ unsigned long buf;
-+ port->writep = port->flip;
-+
-+ if (port->writep > port->flip + port->in_buffer_size)
-+ {
-+ panic("Offset too large in sync serial driver\n");
-+ return;
-+ }
-+ buf = virt_to_phys(port->in_buffer);
-+ for (i = 0; i < NUM_IN_DESCR; i++) {
-+ port->in_descr[i].sw_len = port->inbufchunk;
-+ port->in_descr[i].ctrl = d_int;
-+ port->in_descr[i].next = virt_to_phys(&port->in_descr[i+1]);
-+ port->in_descr[i].buf = buf;
-+ port->in_descr[i].hw_len = 0;
-+ port->in_descr[i].status = 0;
-+ port->in_descr[i].fifo_len = 0;
-+ buf += port->inbufchunk;
-+ prepare_rx_descriptor(&port->in_descr[i]);
-+ }
-+ /* Link the last descriptor to the first */
-+ port->in_descr[i-1].next = virt_to_phys(&port->in_descr[0]);
-+ port->in_descr[i-1].ctrl |= d_eol;
-+ port->next_rx_desc = &port->in_descr[0];
-+ port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR - 1];
-+ *port->input_dma_first = virt_to_phys(port->next_rx_desc);
-+ *port->input_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
-+}
-+
-+#ifdef SYNC_SER_DMA
-+static irqreturn_t tr_interrupt(int irq, void *dev_id)
-+{
-+ unsigned long ireg = *R_IRQ_MASK2_RD;
-+ int i;
-+ struct etrax_dma_descr *descr;
-+ unsigned int sentl;
-+ int handled = 0;
-+
-+ for (i = 0; i < NUMBER_OF_PORTS; i++)
-+ {
-+ sync_port *port = &ports[i];
-+ if (!port->enabled || !port->use_dma )
-+ continue;
-+
-+ if (ireg & (1 << port->output_dma_bit)) /* IRQ active for the port? */
-+ {
-+ handled = 1;
-+
-+ /* Clear IRQ */
-+ *port->output_dma_clr_irq =
-+ IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do) |
-+ IO_STATE(R_DMA_CH0_CLR_INTR, clr_descr, do);
-+
-+ descr = &port->out_descr;
-+ if (!(descr->status & d_stop)) {
-+ sentl = descr->sw_len;
-+ } else
-+ /* otherwise we find the amount of data sent here */
-+ sentl = descr->hw_len;
-+ port->out_count -= sentl;
-+ port->outp += sentl;
-+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
-+ port->outp = port->out_buffer;
-+ if (port->out_count) {
-+ int c;
-+ c = port->out_buffer + OUT_BUFFER_SIZE - port->outp;
-+ if (c > port->out_count)
-+ c = port->out_count;
-+ DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c));
-+ start_dma(port, port->outp, c);
-+ } else {
-+ DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
-+ port->tr_running = 0;
-+ }
-+ wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */
-+ }
-+ }
-+ return IRQ_RETVAL(handled);
-+} /* tr_interrupt */
-+
-+static irqreturn_t rx_interrupt(int irq, void *dev_id)
-+{
-+ unsigned long ireg = *R_IRQ_MASK2_RD;
-+ int i;
-+ int handled = 0;
-+
-+ for (i = 0; i < NUMBER_OF_PORTS; i++)
-+ {
-+ sync_port *port = &ports[i];
-+
-+ if (!port->enabled || !port->use_dma )
-+ continue;
-+
-+ if (ireg & (1 << port->input_dma_descr_bit)) /* Descriptor interrupt */
-+ {
-+ handled = 1;
-+ while (*port->input_dma_descr != virt_to_phys(port->next_rx_desc)) {
-+
-+ if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) {
-+ int first_size = port->flip + port->in_buffer_size - port->writep;
-+ memcpy(port->writep, phys_to_virt(port->next_rx_desc->buf), first_size);
-+ memcpy(port->flip, phys_to_virt(port->next_rx_desc->buf+first_size), port->inbufchunk - first_size);
-+ port->writep = port->flip + port->inbufchunk - first_size;
-+ } else {
-+ memcpy(port->writep, phys_to_virt(port->next_rx_desc->buf), port->inbufchunk);
-+ port->writep += port->inbufchunk;
-+ if (port->writep >= port->flip + port->in_buffer_size)
-+ port->writep = port->flip;
-+ }
-+ if (port->writep == port->readp)
-+ {
-+ port->full = 1;
-+ }
-+
-+ prepare_rx_descriptor(port->next_rx_desc);
-+ port->next_rx_desc->ctrl |= d_eol;
-+ port->prev_rx_desc->ctrl &= ~d_eol;
-+ port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc);
-+ port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next);
-+ wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */
-+ *port->input_dma_cmd = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
-+ /* DMA has reached end of descriptor */
-+ *port->input_dma_clr_irq =
-+ IO_STATE(R_DMA_CH0_CLR_INTR, clr_descr, do);
-+ }
-+ }
-+ }
-+
-+ return IRQ_RETVAL(handled);
-+} /* rx_interrupt */
-+#endif /* SYNC_SER_DMA */
-+
-+#ifdef SYNC_SER_MANUAL
-+static irqreturn_t manual_interrupt(int irq, void *dev_id)
-+{
-+ int i;
-+ int handled = 0;
-+
-+ for (i = 0; i < NUMBER_OF_PORTS; i++)
-+ {
-+ sync_port* port = &ports[i];
-+
-+ if (!port->enabled || port->use_dma)
-+ {
-+ continue;
-+ }
-+
-+ if (*R_IRQ_MASK1_RD & (1 << port->data_avail_bit)) /* Data received? */
-+ {
-+ handled = 1;
-+ /* Read data */
-+ switch(port->ctrl_data_shadow & IO_MASK(R_SYNC_SERIAL1_CTRL, wordsize))
-+ {
-+ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
-+ *port->writep++ = *(volatile char *)port->data_in;
-+ break;
-+ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
-+ {
-+ int data = *(unsigned short *)port->data_in;
-+ *port->writep = (data & 0x0ff0) >> 4;
-+ *(port->writep + 1) = data & 0x0f;
-+ port->writep+=2;
-+ }
-+ break;
-+ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
-+ *(unsigned short*)port->writep = *(volatile unsigned short *)port->data_in;
-+ port->writep+=2;
-+ break;
-+ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
-+ *(unsigned int*)port->writep = *port->data_in;
-+ port->writep+=3;
-+ break;
-+ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
-+ *(unsigned int*)port->writep = *port->data_in;
-+ port->writep+=4;
-+ break;
-+ }
-+
-+ if (port->writep >= port->flip + port->in_buffer_size) /* Wrap? */
-+ port->writep = port->flip;
-+ if (port->writep == port->readp) {
-+ /* receive buffer overrun, discard oldest data
-+ */
-+ port->readp++;
-+ if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */
-+ port->readp = port->flip;
-+ }
-+ if (sync_data_avail(port) >= port->inbufchunk)
-+ wake_up_interruptible(&port->in_wait_q); /* Wake up application */
-+ }
-+
-+ if (*R_IRQ_MASK1_RD & (1 << port->transmitter_ready_bit)) /* Transmitter ready? */
-+ {
-+ if (port->out_count > 0) /* More data to send */
-+ send_word(port);
-+ else /* transmission finished */
-+ {
-+ *R_IRQ_MASK1_CLR = 1 << port->transmitter_ready_bit; /* Turn off IRQ */
-+ wake_up_interruptible(&port->out_wait_q); /* Wake up application */
-+ }
-+ }
-+ }
-+ return IRQ_RETVAL(handled);
-+}
-+#endif
-+
-+module_init(etrax_sync_serial_init);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/debugport.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/debugport.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/debugport.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/debugport.c 2006-10-30 16:17:57.000000000 +0100
-@@ -12,6 +12,34 @@
- * init_etrax_debug()
- *
- * $Log: debugport.c,v $
-+ * Revision 1.36 2006/10/30 15:17:57 pkj
-+ * Avoid a compiler warning.
-+ *
-+ * Revision 1.35 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.34 2006/09/29 10:32:01 starvik
-+ * Don't reference serial driver if not present
-+ *
-+ * Revision 1.33 2006/09/08 07:59:29 karljope
-+ * Makes v10 boot again when watchdog is enabled
-+ *
-+ * Revision 1.32 2006/06/20 08:23:36 pkj
-+ * Reverted incorrect merge.
-+ *
-+ * Revision 1.31 2006/05/17 12:22:10 edgar
-+ * check port before disable ints
-+ *
-+ * Revision 1.30 2005/11/15 12:08:42 starvik
-+ * Set index when no debug port is defined
-+ *
-+ * Revision 1.29 2005/08/29 07:32:17 starvik
-+ * Merge of 2.6.13
-+ *
-+ * Revision 1.28 2005/07/02 12:29:35 starvik
-+ * Use the generic oops_in_progress instead of the raw_printk hack.
-+ * Moved some functions to achr-independent code.
-+ *
- * Revision 1.27 2005/06/10 10:34:14 starvik
- * Real console support
- *
-@@ -112,6 +140,8 @@
- #include <asm/arch/svinto.h>
- #include <asm/io.h> /* Get SIMCOUT. */
-
-+extern void reset_watchdog(void);
-+
- struct dbg_port
- {
- unsigned int index;
-@@ -188,7 +218,9 @@
- }
- };
-
-+#ifdef CONFIG_ETRAX_SERIAL
- extern struct tty_driver *serial_driver;
-+#endif
-
- struct dbg_port* port =
- #if defined(CONFIG_ETRAX_DEBUG_PORT0)
-@@ -368,11 +400,12 @@
- {
- int i;
- unsigned long flags;
-- local_irq_save(flags);
--
-+
- if (!port)
- return;
--
-+
-+ local_irq_save(flags);
-+
- /* Send data */
- for (i = 0; i < len; i++) {
- /* LF -> CRLF */
-@@ -386,26 +419,16 @@
- ;
- *port->write = buf[i];
- }
-- local_irq_restore(flags);
--}
-
--int raw_printk(const char *fmt, ...)
--{
-- static char buf[1024];
-- int printed_len;
-- static int first = 1;
-- if (first) {
-- /* Force reinitialization of the port to get manual mode. */
-- port->started = 0;
-- start_port(port);
-- first = 0;
-- }
-- va_list args;
-- va_start(args, fmt);
-- printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
-- va_end(args);
-- console_write_direct(NULL, buf, strlen(buf));
-- return printed_len;
-+ /*
-+ * Feed the watchdog, otherwise it will reset the chip during boot.
-+ * The time to send an ordinary boot message line (10-90 chars)
-+ * varies between 1-8ms at 115200. What makes up for the additional
-+ * 90ms that allows the watchdog to bite?
-+ */
-+ reset_watchdog();
-+
-+ local_irq_restore(flags);
- }
-
- static void
-@@ -500,6 +523,7 @@
- return 0;
- }
-
-+
- /* This is a dummy serial device that throws away anything written to it.
- * This is used when no debug output is wanted.
- */
-@@ -555,7 +579,13 @@
- {
- if (port)
- *index = port->index;
-+ else
-+ *index = 0;
-+#ifdef CONFIG_ETRAX_SERIAL
- return port ? serial_driver : &dummy_driver;
-+#else
-+ return &dummy_driver;
-+#endif
- }
-
- static struct console sercons = {
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/entry.S linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/entry.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/entry.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/entry.S 2007-01-09 10:36:17.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: entry.S,v 1.28 2005/06/20 05:06:30 starvik Exp $
-+/* $Id: entry.S,v 1.38 2007/01/09 09:36:17 starvik Exp $
- *
- * linux/arch/cris/entry.S
- *
-@@ -7,6 +7,41 @@
- * Authors: Bjorn Wesen (bjornw@axis.com)
- *
- * $Log: entry.S,v $
-+ * Revision 1.38 2007/01/09 09:36:17 starvik
-+ * Corrected kernel_execve
-+ *
-+ * Revision 1.37 2007/01/09 09:29:18 starvik
-+ * Merge of Linux 2.6.19
-+ *
-+ * Revision 1.36 2006/12/08 13:08:54 orjanf
-+ * Copied from Linux 2.4:
-+ * * Return from an pin-generated NMI the same way as for other interrupts.
-+ * * Reverse check order between external nmi and watchdog nmi to avoid false
-+ * watchdog oops in case of a glitch on the nmi pin.
-+ *
-+ * Revision 1.35 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.34 2006/06/25 15:00:09 starvik
-+ * Merge of Linux 2.6.17
-+ *
-+ * Revision 1.33 2006/05/19 12:23:09 orjanf
-+ * * Moved blocking of ethernet rx/tx irq from ethernet interrupt handler to
-+ * low-level asm interrupt handlers. Fixed in the multiple interrupt handler
-+ * also. Copied from Linux 2.4.
-+ *
-+ * Revision 1.32 2006/03/23 14:53:57 starvik
-+ * Corrected signal handling.
-+ *
-+ * Revision 1.31 2006/03/22 09:56:55 starvik
-+ * Merge of Linux 2.6.16
-+ *
-+ * Revision 1.30 2005/10/31 08:48:03 starvik
-+ * Merge of Linux 2.6.14
-+ *
-+ * Revision 1.29 2005/08/29 07:32:17 starvik
-+ * Merge of 2.6.13
-+ *
- * Revision 1.28 2005/06/20 05:06:30 starvik
- * Remove unnecessary diff to kernel.org tree
- *
-@@ -500,9 +535,8 @@
- ;; deal with pending signals and notify-resume requests
-
- move.d $r9, $r10 ; do_notify_resume syscall/irq param
-- moveq 0, $r11 ; oldset param - 0 in this case
-- move.d $sp, $r12 ; the regs param
-- move.d $r1, $r13 ; the thread_info_flags parameter
-+ move.d $sp, $r11 ; the regs param
-+ move.d $r1, $r12 ; the thread_info_flags parameter
- jsr do_notify_resume
-
- ba _Rexit
-@@ -653,7 +687,7 @@
- ;; special handlers for breakpoint and NMI
- hwbreakpoint:
- push $dccr
-- di
-+ di
- push $r10
- push $r11
- move.d [hw_bp_trig_ptr],$r10
-@@ -678,13 +712,19 @@
- push $r10 ; push orig_r10
- clear.d [$sp=$sp-4] ; frametype == 0, normal frame
-
-+ ;; If there is a glitch on the NMI pin shorter than ~100ns
-+ ;; (i.e. non-active by the time we get here) then the nmi_pin bit
-+ ;; in R_IRQ_MASK0_RD will already be cleared. The watchdog_nmi bit
-+ ;; is cleared by us however (when feeding the watchdog), which is why
-+ ;; we use that bit to determine what brought us here.
-+
- move.d [R_IRQ_MASK0_RD], $r1 ; External NMI or watchdog?
-- and.d 0x80000000, $r1
-- beq wdog
-+ and.d (1<<30), $r1
-+ bne wdog
- move.d $sp, $r10
- jsr handle_nmi
- setf m ; Enable NMI again
-- retb ; Return from NMI
-+ ba _Rexit ; Return the standard way
- nop
- wdog:
- #if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
-@@ -774,23 +814,10 @@
- movem $r13, [$sp]
- push $r10 ; push orig_r10
- clear.d [$sp=$sp-4] ; frametype == 0, normal frame
--
-- moveq 2, $r2 ; first bit we care about is the timer0 irq
-- move.d [R_VECT_MASK_RD], $r0; read the irq bits that triggered the multiple irq
-- move.d $r0, [R_VECT_MASK_CLR] ; Block all active IRQs
--1:
-- btst $r2, $r0 ; check for the irq given by bit r2
-- bpl 2f
-- move.d $r2, $r10 ; First argument to do_IRQ
-- move.d $sp, $r11 ; second argument to do_IRQ
-- jsr do_IRQ
--2:
-- addq 1, $r2 ; next vector bit
-- cmp.b 32, $r2
-- bne 1b ; process all irq's up to and including number 31
-- moveq 0, $r9 ; make ret_from_intr realise we came from an ir
--
-- move.d $r0, [R_VECT_MASK_SET] ; Unblock all the IRQs
-+
-+ move.d $sp, $r10
-+ jsr do_multiple_IRQ
-+
- jump ret_from_intr
-
- do_sigtrap:
-@@ -836,6 +863,13 @@
- pop $r0 ; Restore r0.
- ba do_sigtrap ; SIGTRAP the offending process.
- pop $dccr ; Restore dccr in delay slot.
-+
-+ .global kernel_execve
-+kernel_execve:
-+ move.d __NR_execve, $r9
-+ break 13
-+ ret
-+ nop
-
- .data
-
-@@ -1135,7 +1169,38 @@
- .long sys_add_key
- .long sys_request_key
- .long sys_keyctl
--
-+ .long sys_ioprio_set
-+ .long sys_ioprio_get /* 290 */
-+ .long sys_inotify_init
-+ .long sys_inotify_add_watch
-+ .long sys_inotify_rm_watch
-+ .long sys_migrate_pages
-+ .long sys_openat /* 295 */
-+ .long sys_mkdirat
-+ .long sys_mknodat
-+ .long sys_fchownat
-+ .long sys_futimesat
-+ .long sys_fstatat64 /* 300 */
-+ .long sys_unlinkat
-+ .long sys_renameat
-+ .long sys_linkat
-+ .long sys_symlinkat
-+ .long sys_readlinkat /* 305 */
-+ .long sys_fchmodat
-+ .long sys_faccessat
-+ .long sys_pselect6
-+ .long sys_ppoll
-+ .long sys_unshare /* 310 */
-+ .long sys_set_robust_list
-+ .long sys_get_robust_list
-+ .long sys_splice
-+ .long sys_sync_file_range
-+ .long sys_tee /* 315 */
-+ .long sys_vmsplice
-+ .long sys_move_pages
-+ .long sys_getcpu
-+ .long sys_epoll_pwait
-+
- /*
- * NOTE!! This doesn't have to be exact - we just have
- * to make sure we have _enough_ of the "sys_ni_syscall"
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/fasttimer.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/fasttimer.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/fasttimer.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/fasttimer.c 2007-02-05 12:54:34.000000000 +0100
-@@ -1,97 +1,10 @@
--/* $Id: fasttimer.c,v 1.9 2005/03/04 08:16:16 starvik Exp $
-+/*
- * linux/arch/cris/kernel/fasttimer.c
- *
- * Fast timers for ETRAX100/ETRAX100LX
- * This may be useful in other OS than Linux so use 2 space indentation...
- *
-- * $Log: fasttimer.c,v $
-- * Revision 1.9 2005/03/04 08:16:16 starvik
-- * Merge of Linux 2.6.11.
-- *
-- * Revision 1.8 2005/01/05 06:09:29 starvik
-- * cli()/sti() will be obsolete in 2.6.11.
-- *
-- * Revision 1.7 2005/01/03 13:35:46 starvik
-- * Removed obsolete stuff.
-- * Mark fast timer IRQ as not shared.
-- *
-- * Revision 1.6 2004/05/14 10:18:39 starvik
-- * Export fast_timer_list
-- *
-- * Revision 1.5 2004/05/14 07:58:01 starvik
-- * Merge of changes from 2.4
-- *
-- * Revision 1.4 2003/07/04 08:27:41 starvik
-- * Merge of Linux 2.5.74
-- *
-- * Revision 1.3 2002/12/12 08:26:32 starvik
-- * Don't use C-comments inside CVS comments
-- *
-- * Revision 1.2 2002/12/11 15:42:02 starvik
-- * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
-- *
-- * Revision 1.1 2002/11/18 07:58:06 starvik
-- * Fast timers (from Linux 2.4)
-- *
-- * Revision 1.5 2002/10/15 06:21:39 starvik
-- * Added call to init_waitqueue_head
-- *
-- * Revision 1.4 2002/05/28 17:47:59 johana
-- * Added del_fast_timer()
-- *
-- * Revision 1.3 2002/05/28 16:16:07 johana
-- * Handle empty fast_timer_list
-- *
-- * Revision 1.2 2002/05/27 15:38:42 johana
-- * Made it compile without warnings on Linux 2.4.
-- * (includes, wait_queue, PROC_FS and snprintf)
-- *
-- * Revision 1.1 2002/05/27 15:32:25 johana
-- * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
-- *
-- * Revision 1.8 2001/11/27 13:50:40 pkj
-- * Disable interrupts while stopping the timer and while modifying the
-- * list of active timers in timer1_handler() as it may be interrupted
-- * by other interrupts (e.g., the serial interrupt) which may add fast
-- * timers.
-- *
-- * Revision 1.7 2001/11/22 11:50:32 pkj
-- * * Only store information about the last 16 timers.
-- * * proc_fasttimer_read() now uses an allocated buffer, since it
-- * requires more space than just a page even for only writing the
-- * last 16 timers. The buffer is only allocated on request, so
-- * unless /proc/fasttimer is read, it is never allocated.
-- * * Renamed fast_timer_started to fast_timers_started to match
-- * fast_timers_added and fast_timers_expired.
-- * * Some clean-up.
-- *
-- * Revision 1.6 2000/12/13 14:02:08 johana
-- * Removed volatile for fast_timer_list
-- *
-- * Revision 1.5 2000/12/13 13:55:35 johana
-- * Added DEBUG_LOG, added som cli() and cleanup
-- *
-- * Revision 1.4 2000/12/05 13:48:50 johana
-- * Added range check when writing proc file, modified timer int handling
-- *
-- * Revision 1.3 2000/11/23 10:10:20 johana
-- * More debug/logging possibilities.
-- * Moved GET_JIFFIES_USEC() to timex.h and time.c
-- *
-- * Revision 1.2 2000/11/01 13:41:04 johana
-- * Clean up and bugfixes.
-- * Created new do_gettimeofday_fast() that gets a timeval struct
-- * with time based on jiffies and *R_TIMER0_DATA, uses a table
-- * for fast conversion of timer value to microseconds.
-- * (Much faster the standard do_gettimeofday() and we don't really
-- * wan't to use the true time - we wan't the "uptime" so timers don't screw up
-- * when we change the time.
-- * TODO: Add efficient support for continuous timers as well.
-- *
-- * Revision 1.1 2000/10/26 15:49:16 johana
-- * Added fasttimer, highresolution timers.
-- *
-- * Copyright (C) 2000,2001 2002 Axis Communications AB, Lund, Sweden
-+ * Copyright (C) 2000-2006 Axis Communications AB, Lund, Sweden
- */
-
- #include <linux/errno.h>
-@@ -136,13 +49,13 @@
-
- #define __INLINE__ inline
-
--static int fast_timer_running = 0;
--static int fast_timers_added = 0;
--static int fast_timers_started = 0;
--static int fast_timers_expired = 0;
--static int fast_timers_deleted = 0;
--static int fast_timer_is_init = 0;
--static int fast_timer_ints = 0;
-+static unsigned int fast_timer_running = 0;
-+static unsigned int fast_timers_added = 0;
-+static unsigned int fast_timers_started = 0;
-+static unsigned int fast_timers_expired = 0;
-+static unsigned int fast_timers_deleted = 0;
-+static unsigned int fast_timer_is_init = 0;
-+static unsigned int fast_timer_ints = 0;
-
- struct fast_timer *fast_timer_list = NULL;
-
-@@ -150,8 +63,8 @@
- #define DEBUG_LOG_MAX 128
- static const char * debug_log_string[DEBUG_LOG_MAX];
- static unsigned long debug_log_value[DEBUG_LOG_MAX];
--static int debug_log_cnt = 0;
--static int debug_log_cnt_wrapped = 0;
-+static unsigned int debug_log_cnt = 0;
-+static unsigned int debug_log_cnt_wrapped = 0;
-
- #define DEBUG_LOG(string, value) \
- { \
-@@ -206,41 +119,25 @@
- int timer_delay_settings[NUM_TIMER_STATS];
-
- /* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
--void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
-+void __INLINE__ do_gettimeofday_fast(struct fasttime_t *tv)
- {
-- unsigned long sec = jiffies;
-- unsigned long usec = GET_JIFFIES_USEC();
--
-- usec += (sec % HZ) * (1000000 / HZ);
-- sec = sec / HZ;
--
-- if (usec > 1000000)
-- {
-- usec -= 1000000;
-- sec++;
-- }
-- tv->tv_sec = sec;
-- tv->tv_usec = usec;
-+ tv->tv_jiff = jiffies;
-+ tv->tv_usec = GET_JIFFIES_USEC();
- }
-
--int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
-+int __INLINE__ timeval_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
- {
-- if (t0->tv_sec < t1->tv_sec)
-- {
-+ /* Compare jiffies. Takes care of wrapping */
-+ if (time_before(t0->tv_jiff, t1->tv_jiff))
- return -1;
-- }
-- else if (t0->tv_sec > t1->tv_sec)
-- {
-+ else if (time_after(t0->tv_jiff, t1->tv_jiff))
- return 1;
-- }
-+
-+ /* Compare us */
- if (t0->tv_usec < t1->tv_usec)
-- {
- return -1;
-- }
- else if (t0->tv_usec > t1->tv_usec)
-- {
- return 1;
-- }
- return 0;
- }
-
-@@ -340,7 +237,7 @@
- printk(KERN_WARNING
- "timer name: %s data: 0x%08lX already in list!\n", name, data);
- sanity_failed++;
-- return;
-+ goto done;
- }
- else
- {
-@@ -356,11 +253,11 @@
- t->name = name;
-
- t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
-- t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
-+ t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
- if (t->tv_expires.tv_usec > 1000000)
- {
- t->tv_expires.tv_usec -= 1000000;
-- t->tv_expires.tv_sec++;
-+ t->tv_expires.tv_jiff += HZ;
- }
- #ifdef FAST_TIMER_LOG
- timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
-@@ -401,6 +298,7 @@
-
- D2(printk("start_one_shot_timer: %d us done\n", delay_us));
-
-+done:
- local_irq_restore(flags);
- } /* start_one_shot_timer */
-
-@@ -444,11 +342,18 @@
- /* Timer 1 interrupt handler */
-
- static irqreturn_t
--timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
-+timer1_handler(int irq, void *dev_id)
- {
- struct fast_timer *t;
- unsigned long flags;
-
-+ /* We keep interrupts disabled not only when we modify the
-+ * fast timer list, but any time we hold a reference to a
-+ * timer in the list, since del_fast_timer may be called
-+ * from (another) interrupt context. Thus, the only time
-+ * when interrupts are enabled is when calling the timer
-+ * callback function.
-+ */
- local_irq_save(flags);
-
- /* Clear timer1 irq */
-@@ -466,16 +371,16 @@
- fast_timer_running = 0;
- fast_timer_ints++;
-
-- local_irq_restore(flags);
--
- t = fast_timer_list;
- while (t)
- {
-- struct timeval tv;
-+ struct fasttime_t tv;
-+ fast_timer_function_type *f;
-+ unsigned long d;
-
- /* Has it really expired? */
- do_gettimeofday_fast(&tv);
-- D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
-+ D1(printk("t: %is %06ius\n", tv.tv_jiff, tv.tv_usec));
-
- if (timeval_cmp(&t->tv_expires, &tv) <= 0)
- {
-@@ -486,7 +391,6 @@
- fast_timers_expired++;
-
- /* Remove this timer before call, since it may reuse the timer */
-- local_irq_save(flags);
- if (t->prev)
- {
- t->prev->next = t->next;
-@@ -501,11 +405,21 @@
- }
- t->prev = NULL;
- t->next = NULL;
-- local_irq_restore(flags);
-
-- if (t->function != NULL)
-+ /* Save function callback data before enabling interrupts,
-+ * since the timer may be removed and we don't know how it
-+ * was allocated (e.g. ->function and ->data may become
-+ * overwritten after deletion if the timer was stack-allocated).
-+ */
-+ f = t->function;
-+ d = t->data;
-+
-+ if (f != NULL)
- {
-- t->function(t->data);
-+ /* Run the callback function with interrupts enabled. */
-+ local_irq_restore(flags);
-+ f(d);
-+ local_irq_save(flags);
- }
- else
- {
-@@ -518,16 +432,19 @@
- D1(printk(".\n"));
- }
-
-- local_irq_save(flags);
- if ((t = fast_timer_list) != NULL)
- {
- /* Start next timer.. */
-- long us;
-- struct timeval tv;
-+ long us = 0;
-+ struct fasttime_t tv;
-
- do_gettimeofday_fast(&tv);
-- us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
-- t->tv_expires.tv_usec - tv.tv_usec);
-+
-+ /* time_after_eq takes care of wrapping */
-+ if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
-+ us = ((t->tv_expires.tv_jiff - tv.tv_jiff) * 1000000 / HZ +
-+ t->tv_expires.tv_usec - tv.tv_usec);
-+
- if (us > 0)
- {
- if (!fast_timer_running)
-@@ -537,7 +454,6 @@
- #endif
- start_timer1(us);
- }
-- local_irq_restore(flags);
- break;
- }
- else
-@@ -548,9 +464,10 @@
- D1(printk("e! %d\n", us));
- }
- }
-- local_irq_restore(flags);
- }
-
-+ local_irq_restore(flags);
-+
- if (!t)
- {
- D1(printk("t1 stop!\n"));
-@@ -575,28 +492,17 @@
- void schedule_usleep(unsigned long us)
- {
- struct fast_timer t;
--#ifdef DECLARE_WAITQUEUE
- wait_queue_head_t sleep_wait;
- init_waitqueue_head(&sleep_wait);
-- {
-- DECLARE_WAITQUEUE(wait, current);
--#else
-- struct wait_queue *sleep_wait = NULL;
-- struct wait_queue wait = { current, NULL };
--#endif
-
- D1(printk("schedule_usleep(%d)\n", us));
-- add_wait_queue(&sleep_wait, &wait);
-- set_current_state(TASK_INTERRUPTIBLE);
- start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
- "usleep");
-- schedule();
-- set_current_state(TASK_RUNNING);
-- remove_wait_queue(&sleep_wait, &wait);
-+ /* Uninterruptible sleep on the fast timer. (The condition is somewhat
-+ redundant since the timer is what wakes us up.) */
-+ wait_event(sleep_wait, !fast_timer_pending(&t));
-+
- D1(printk("done schedule_usleep(%d)\n", us));
--#ifdef DECLARE_WAITQUEUE
-- }
--#endif
- }
-
- #ifdef CONFIG_PROC_FS
-@@ -616,7 +522,7 @@
- unsigned long flags;
- int i = 0;
- int num_to_show;
-- struct timeval tv;
-+ struct fasttime_t tv;
- struct fast_timer *t, *nextt;
- static char *bigbuf = NULL;
- static unsigned long used;
-@@ -624,7 +530,8 @@
- if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
- {
- used = 0;
-- bigbuf[0] = '\0';
-+ if (buf)
-+ buf[0] = '\0';
- return 0;
- }
-
-@@ -646,7 +553,7 @@
- used += sprintf(bigbuf + used, "Fast timer running: %s\n",
- fast_timer_running ? "yes" : "no");
- used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
-- (unsigned long)tv.tv_sec,
-+ (unsigned long)tv.tv_jiff,
- (unsigned long)tv.tv_usec);
- #ifdef FAST_TIMER_SANITY_CHECKS
- used += sprintf(bigbuf + used, "Sanity failed: %i\n",
-@@ -696,9 +603,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -718,9 +625,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -738,9 +645,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -761,15 +668,15 @@
- /* " func: 0x%08lX" */
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
- /* , t->function */
- );
-- local_irq_disable();
-+ local_irq_save(flags);
- if (t->next != nextt)
- {
- printk(KERN_WARNING "timer removed!\n");
-@@ -798,7 +705,7 @@
- static struct fast_timer tr[10];
- static int exp_num[10];
-
--static struct timeval tv_exp[100];
-+static struct fasttime_t tv_exp[100];
-
- static void test_timeout(unsigned long data)
- {
-@@ -836,7 +743,7 @@
- int prev_num;
- int j;
-
-- struct timeval tv, tv0, tv1, tv2;
-+ struct fasttime_t tv, tv0, tv1, tv2;
-
- printk("fast_timer_test() start\n");
- do_gettimeofday_fast(&tv);
-@@ -849,7 +756,7 @@
- {
- do_gettimeofday_fast(&tv_exp[j]);
- }
-- printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
-+ printk("fast_timer_test() %is %06i\n", tv.tv_jiff, tv.tv_usec);
-
- for (j = 0; j < 1000; j++)
- {
-@@ -859,11 +766,11 @@
- for (j = 0; j < 100; j++)
- {
- printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
-- tv_exp[j].tv_sec,tv_exp[j].tv_usec,
-- tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
-- tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
-- tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
-- tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
-+ tv_exp[j].tv_jiff,tv_exp[j].tv_usec,
-+ tv_exp[j+1].tv_jiff,tv_exp[j+1].tv_usec,
-+ tv_exp[j+2].tv_jiff,tv_exp[j+2].tv_usec,
-+ tv_exp[j+3].tv_jiff,tv_exp[j+3].tv_usec,
-+ tv_exp[j+4].tv_jiff,tv_exp[j+4].tv_usec);
- j += 4;
- }
- do_gettimeofday_fast(&tv0);
-@@ -895,9 +802,9 @@
- }
- }
- do_gettimeofday_fast(&tv2);
-- printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
-- printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
-- printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
-+ printk("Timers started %is %06i\n", tv0.tv_jiff, tv0.tv_usec);
-+ printk("Timers started at %is %06i\n", tv1.tv_jiff, tv1.tv_usec);
-+ printk("Timers done %is %06i\n", tv2.tv_jiff, tv2.tv_usec);
- DP(printk("buf0:\n");
- printk(buf0);
- printk("buf1:\n");
-@@ -919,9 +826,9 @@
- printk("%-10s set: %6is %06ius exp: %6is %06ius "
- "data: 0x%08X func: 0x%08X\n",
- t->name,
-- t->tv_set.tv_sec,
-+ t->tv_set.tv_jiff,
- t->tv_set.tv_usec,
-- t->tv_expires.tv_sec,
-+ t->tv_expires.tv_jiff,
- t->tv_expires.tv_usec,
- t->data,
- t->function
-@@ -929,10 +836,10 @@
-
- printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
- t->delay_us,
-- tv_exp[j].tv_sec,
-+ tv_exp[j].tv_jiff,
- tv_exp[j].tv_usec,
- exp_num[j],
-- (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
-+ (tv_exp[j].tv_jiff - t->tv_expires.tv_jiff)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
- }
- proc_fasttimer_read(buf5, NULL, 0, 0, 0);
- printk("buf5 after all done:\n");
-@@ -942,7 +849,7 @@
- #endif
-
-
--void fast_timer_init(void)
-+int fast_timer_init(void)
- {
- /* For some reason, request_irq() hangs when called froom time_init() */
- if (!fast_timer_is_init)
-@@ -975,4 +882,6 @@
- fast_timer_test();
- #endif
- }
-+ return 0;
- }
-+__initcall(fast_timer_init);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/head.S linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/head.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/head.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/head.S 2006-10-20 09:33:26.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: head.S,v 1.10 2005/06/20 05:12:54 starvik Exp $
-+/* $Id: head.S,v 1.13 2006/10/20 07:33:26 kjelld Exp $
- *
- * Head of the kernel - alter with care
- *
-@@ -7,6 +7,19 @@
- * Authors: Bjorn Wesen (bjornw@axis.com)
- *
- * $Log: head.S,v $
-+ * Revision 1.13 2006/10/20 07:33:26 kjelld
-+ * If serial port 2 is used, select it in R_GEN_CONFIG.
-+ * If serial port 2 is used, setup the control registers for the port.
-+ * This is done to avoid a puls on the TXD line during start up.
-+ * This puls could disturbe some units (e.g. some Axis 214 with internal
-+ * ver. 1.08).
-+ *
-+ * Revision 1.12 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.11 2005/08/29 07:32:17 starvik
-+ * Merge of 2.6.13
-+ *
- * Revision 1.10 2005/06/20 05:12:54 starvik
- * Remove unnecessary diff to kernel.org tree
- *
-@@ -595,11 +608,17 @@
-
- moveq 0,$r0
-
-+ ;; Select or disable serial port 2
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2
-+ or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
-+#else
-+ or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
-+#endif
-+
- ;; Init interfaces (disable them).
- or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
- | IO_STATE (R_GEN_CONFIG, ata, disable) \
- | IO_STATE (R_GEN_CONFIG, par0, disable) \
-- | IO_STATE (R_GEN_CONFIG, ser2, disable) \
- | IO_STATE (R_GEN_CONFIG, mio, disable) \
- | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
- | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
-@@ -801,6 +820,41 @@
- | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
- move.b $r0,[R_SERIAL1_TR_CTRL]
-
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2
-+ ;; setup the serial port 2 at 115200 baud for debug purposes
-+
-+ moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
-+ | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
-+ | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
-+ move.d $r0,[R_SERIAL2_XOFF]
-+
-+ ; 115.2kbaud for both transmit and receive
-+ move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
-+ | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
-+ move.b $r0,[R_SERIAL2_BAUD]
-+
-+ ; Set up and enable the serial2 receiver.
-+ move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
-+ | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
-+ move.b $r0,[R_SERIAL2_REC_CTRL]
-+
-+ ; Set up and enable the serial2 transmitter.
-+ move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
-+ | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
-+ move.b $r0,[R_SERIAL2_TR_CTRL]
-+#endif
-
- #ifdef CONFIG_ETRAX_SERIAL_PORT3
- ;; setup the serial port 3 at 115200 baud for debug purposes
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/io_interface_mux.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/io_interface_mux.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/io_interface_mux.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/io_interface_mux.c 2006-10-04 20:21:18.000000000 +0200
-@@ -1,10 +1,10 @@
- /* IO interface mux allocator for ETRAX100LX.
-- * Copyright 2004, Axis Communications AB
-- * $Id: io_interface_mux.c,v 1.2 2004/12/21 12:08:38 starvik Exp $
-+ * Copyright 2004-2006, Axis Communications AB
-+ * $Id: io_interface_mux.c,v 1.4 2006/10/04 18:21:18 henriken Exp $
- */
-
-
--/* C.f. ETRAX100LX Designer's Reference 20.9 */
-+/* C.f. ETRAX100LX Designer's Reference 19.9 */
-
- #include <linux/kernel.h>
- #include <linux/slab.h>
-@@ -35,7 +35,7 @@
- struct watcher
- {
- void (*notify)(const unsigned int gpio_in_available,
-- const unsigned int gpio_out_available,
-+ const unsigned int gpio_out_available,
- const unsigned char pa_available,
- const unsigned char pb_available);
- struct watcher *next;
-@@ -45,17 +45,40 @@
- struct if_group
- {
- enum io_if_group group;
-- unsigned char used;
-- enum cris_io_interface owner;
-+ // name - the name of the group 'A' to 'F'
-+ char *name;
-+ // used - a bit mask of all pins in the group in the order listed
-+ // in in the tables in 19.9.1 to 19.9.6. Note that no
-+ // distinction is made between in, out and in/out pins.
-+ unsigned int used;
- };
-
-
- struct interface
- {
- enum cris_io_interface ioif;
-+ // name - the name of the interface
-+ char *name;
-+ // groups - OR'ed together io_if_group flags describing what pin groups
-+ // the interface uses pins in.
- unsigned char groups;
-+ // used - set when the interface is allocated.
- unsigned char used;
- char *owner;
-+ // group_a through group_f - bit masks describing what pins in the
-+ // pin groups the interface uses.
-+ unsigned int group_a;
-+ unsigned int group_b;
-+ unsigned int group_c;
-+ unsigned int group_d;
-+ unsigned int group_e;
-+ unsigned int group_f;
-+
-+ // gpio_g_in, gpio_g_out, gpio_b - bit masks telling what pins in the
-+ // GPIO ports the interface uses. This
-+ // could be reconstucted using the group_X
-+ // masks and a table of what pins the GPIO
-+ // ports use, but that would be messy.
- unsigned int gpio_g_in;
- unsigned int gpio_g_out;
- unsigned char gpio_b;
-@@ -64,26 +87,32 @@
- static struct if_group if_groups[6] = {
- {
- .group = group_a,
-+ .name = "A",
- .used = 0,
- },
- {
- .group = group_b,
-+ .name = "B",
- .used = 0,
- },
- {
- .group = group_c,
-+ .name = "C",
- .used = 0,
- },
- {
- .group = group_d,
-+ .name = "D",
- .used = 0,
- },
- {
- .group = group_e,
-+ .name = "E",
- .used = 0,
- },
- {
- .group = group_f,
-+ .name = "F",
- .used = 0,
- }
- };
-@@ -94,14 +123,32 @@
- /* Begin Non-multiplexed interfaces */
- {
- .ioif = if_eth,
-+ .name = "ethernet",
- .groups = 0,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0,
- .gpio_g_out = 0,
- .gpio_b = 0
- },
- {
- .ioif = if_serial_0,
-+ .name = "serial_0",
- .groups = 0,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0,
- .gpio_g_out = 0,
- .gpio_b = 0
-@@ -109,172 +156,385 @@
- /* End Non-multiplexed interfaces */
- {
- .ioif = if_serial_1,
-+ .name = "serial_1",
- .groups = group_e,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0x0f,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_serial_2,
-+ .name = "serial_2",
- .groups = group_b,
-+
-+ .group_a = 0,
-+ .group_b = 0x0f,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x000000c0,
- .gpio_g_out = 0x000000c0,
- .gpio_b = 0x00
- },
- {
- .ioif = if_serial_3,
-+ .name = "serial_3",
- .groups = group_c,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0x0f,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0xc0000000,
- .gpio_g_out = 0xc0000000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_sync_serial_1,
-- .groups = group_e | group_f, /* if_sync_serial_1 and if_sync_serial_3
-- can be used simultaneously */
-+ .name = "sync_serial_1",
-+ .groups = group_e | group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0x0f,
-+ .group_f = 0x10,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0x10
- },
- {
- .ioif = if_sync_serial_3,
-+ .name = "sync_serial_3",
- .groups = group_c | group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0x0f,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0x80,
-+
- .gpio_g_in = 0xc0000000,
- .gpio_g_out = 0xc0000000,
- .gpio_b = 0x80
- },
- {
- .ioif = if_shared_ram,
-+ .name = "shared_ram",
- .groups = group_a,
-+
-+ .group_a = 0x7f8ff,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x0000ff3e,
- .gpio_g_out = 0x0000ff38,
- .gpio_b = 0x00
- },
- {
- .ioif = if_shared_ram_w,
-+ .name = "shared_ram_w",
- .groups = group_a | group_d,
-+
-+ .group_a = 0x7f8ff,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0xff,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x00ffff3e,
- .gpio_g_out = 0x00ffff38,
- .gpio_b = 0x00
- },
- {
- .ioif = if_par_0,
-+ .name = "par_0",
- .groups = group_a,
-+
-+ .group_a = 0x7fbff,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x0000ff3e,
- .gpio_g_out = 0x0000ff3e,
- .gpio_b = 0x00
- },
- {
- .ioif = if_par_1,
-+ .name = "par_1",
- .groups = group_d,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0x7feff,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x3eff0000,
- .gpio_g_out = 0x3eff0000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_par_w,
-+ .name = "par_w",
- .groups = group_a | group_d,
-+
-+ .group_a = 0x7fbff,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0xff,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x00ffff3e,
- .gpio_g_out = 0x00ffff3e,
- .gpio_b = 0x00
- },
- {
- .ioif = if_scsi8_0,
-- .groups = group_a | group_b | group_f, /* if_scsi8_0 and if_scsi8_1
-- can be used simultaneously */
-+ .name = "scsi8_0",
-+ .groups = group_a | group_b | group_f,
-+
-+ .group_a = 0x7ffff,
-+ .group_b = 0x0f,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0x10,
-+
- .gpio_g_in = 0x0000ffff,
- .gpio_g_out = 0x0000ffff,
- .gpio_b = 0x10
- },
- {
- .ioif = if_scsi8_1,
-- .groups = group_c | group_d | group_f, /* if_scsi8_0 and if_scsi8_1
-- can be used simultaneously */
-+ .name = "scsi8_1",
-+ .groups = group_c | group_d | group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0x0f,
-+ .group_d = 0x7ffff,
-+ .group_e = 0,
-+ .group_f = 0x80,
-+
- .gpio_g_in = 0xffff0000,
- .gpio_g_out = 0xffff0000,
- .gpio_b = 0x80
- },
- {
- .ioif = if_scsi_w,
-+ .name = "scsi_w",
- .groups = group_a | group_b | group_d | group_f,
-+
-+ .group_a = 0x7ffff,
-+ .group_b = 0x0f,
-+ .group_c = 0,
-+ .group_d = 0x601ff,
-+ .group_e = 0,
-+ .group_f = 0x90,
-+
- .gpio_g_in = 0x01ffffff,
- .gpio_g_out = 0x07ffffff,
- .gpio_b = 0x80
- },
- {
- .ioif = if_ata,
-+ .name = "ata",
- .groups = group_a | group_b | group_c | group_d,
-+
-+ .group_a = 0x7ffff,
-+ .group_b = 0x0f,
-+ .group_c = 0x0f,
-+ .group_d = 0x7cfff,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0xf9ffffff,
- .gpio_g_out = 0xffffffff,
- .gpio_b = 0x80
- },
- {
- .ioif = if_csp,
-- .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
-+ .name = "csp",
-+ .groups = group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0xfc,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0xfc
- },
- {
- .ioif = if_i2c,
-- .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
-+ .name = "i2c",
-+ .groups = group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0x03,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0x03
- },
- {
- .ioif = if_usb_1,
-+ .name = "usb_1",
- .groups = group_e | group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0x0f,
-+ .group_f = 0x2c,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0x2c
- },
- {
- .ioif = if_usb_2,
-+ .name = "usb_2",
- .groups = group_d,
-- .gpio_g_in = 0x0e000000,
-- .gpio_g_out = 0x3c000000,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0x33e00,
-+ .group_f = 0,
-+
-+ .gpio_g_in = 0x3e000000,
-+ .gpio_g_out = 0x0c000000,
- .gpio_b = 0x00
- },
- /* GPIO pins */
- {
- .ioif = if_gpio_grp_a,
-+ .name = "gpio_a",
- .groups = group_a,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x0000ff3f,
- .gpio_g_out = 0x0000ff3f,
- .gpio_b = 0x00
- },
- {
- .ioif = if_gpio_grp_b,
-+ .name = "gpio_b",
- .groups = group_b,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x000000c0,
- .gpio_g_out = 0x000000c0,
- .gpio_b = 0x00
- },
- {
- .ioif = if_gpio_grp_c,
-+ .name = "gpio_c",
- .groups = group_c,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0xc0000000,
- .gpio_g_out = 0xc0000000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_gpio_grp_d,
-+ .name = "gpio_d",
- .groups = group_d,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x3fff0000,
- .gpio_g_out = 0x3fff0000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_gpio_grp_e,
-+ .name = "gpio_e",
- .groups = group_e,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0x00
- },
- {
- .ioif = if_gpio_grp_f,
-+ .name = "gpio_f",
- .groups = group_f,
-+
-+ .group_a = 0,
-+ .group_b = 0,
-+ .group_c = 0,
-+ .group_d = 0,
-+ .group_e = 0,
-+ .group_f = 0,
-+
- .gpio_g_in = 0x00000000,
- .gpio_g_out = 0x00000000,
- .gpio_b = 0xff
-@@ -284,11 +544,13 @@
-
- static struct watcher *watchers = NULL;
-
-+// The pins that are free to use in the GPIO ports.
- static unsigned int gpio_in_pins = 0xffffffff;
- static unsigned int gpio_out_pins = 0xffffffff;
- static unsigned char gpio_pb_pins = 0xff;
- static unsigned char gpio_pa_pins = 0xff;
-
-+// Identifiers for the owners of the GPIO pins.
- static enum cris_io_interface gpio_pa_owners[8];
- static enum cris_io_interface gpio_pb_owners[8];
- static enum cris_io_interface gpio_pg_owners[32];
-@@ -318,7 +580,7 @@
- struct watcher *w = watchers;
-
- DBG(printk("io_interface_mux: notifying watchers\n"));
--
-+
- while (NULL != w) {
- w->notify((const unsigned int)gpio_in_pins,
- (const unsigned int)gpio_out_pins,
-@@ -354,37 +616,48 @@
-
- if (interfaces[ioif].used) {
- local_irq_restore(flags);
-- printk(KERN_CRIT "cris_io_interface: Cannot allocate interface for %s, in use by %s\n",
-+ printk(KERN_CRIT "cris_io_interface: Cannot allocate interface %s for %s, in use by %s\n",
-+ interfaces[ioif].name,
- device_id,
- interfaces[ioif].owner);
- return -EBUSY;
- }
-
-- /* Check that all required groups are free before allocating, */
-+ /* Check that all required pins in the used groups are free
-+ * before allocating. */
- group_set = interfaces[ioif].groups;
- while (NULL != (grp = get_group(group_set))) {
-- if (grp->used) {
-- if (grp->group == group_f) {
-- if ((if_sync_serial_1 == ioif) ||
-- (if_sync_serial_3 == ioif)) {
-- if ((grp->owner != if_sync_serial_1) &&
-- (grp->owner != if_sync_serial_3)) {
-- local_irq_restore(flags);
-- return -EBUSY;
-- }
-- } else if ((if_scsi8_0 == ioif) ||
-- (if_scsi8_1 == ioif)) {
-- if ((grp->owner != if_scsi8_0) &&
-- (grp->owner != if_scsi8_1)) {
-- local_irq_restore(flags);
-- return -EBUSY;
-- }
-- }
-- } else {
-- local_irq_restore(flags);
-- return -EBUSY;
-- }
-+ unsigned int if_group_use = 0;
-+
-+ switch(grp->group) {
-+ case group_a:
-+ if_group_use = interfaces[ioif].group_a;
-+ break;
-+ case group_b:
-+ if_group_use = interfaces[ioif].group_b;
-+ break;
-+ case group_c:
-+ if_group_use = interfaces[ioif].group_c;
-+ break;
-+ case group_d:
-+ if_group_use = interfaces[ioif].group_d;
-+ break;
-+ case group_e:
-+ if_group_use = interfaces[ioif].group_e;
-+ break;
-+ case group_f:
-+ if_group_use = interfaces[ioif].group_f;
-+ break;
-+ default:
-+ BUG_ON(1);
- }
-+
-+ if(if_group_use & grp->used) {
-+ local_irq_restore(flags);
-+ printk(KERN_INFO "cris_request_io_interface: group %s needed by %s not available\n", grp->name, interfaces[ioif].name);
-+ return -EBUSY;
-+ }
-+
- group_set = clear_group_from_set(group_set, grp);
- }
-
-@@ -392,22 +665,16 @@
- if (((interfaces[ioif].gpio_g_in & gpio_in_pins) != interfaces[ioif].gpio_g_in) ||
- ((interfaces[ioif].gpio_g_out & gpio_out_pins) != interfaces[ioif].gpio_g_out) ||
- ((interfaces[ioif].gpio_b & gpio_pb_pins) != interfaces[ioif].gpio_b)) {
-- printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %u\n",
-- ioif);
-+ local_irq_restore(flags);
-+ printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %s\n",
-+ interfaces[ioif].name);
- return -EBUSY;
- }
-
-- /* All needed I/O pins and pin groups are free, allocate. */
-- group_set = interfaces[ioif].groups;
-- while (NULL != (grp = get_group(group_set))) {
-- grp->used = 1;
-- grp->owner = ioif;
-- group_set = clear_group_from_set(group_set, grp);
-- }
--
-+ /* Check which registers need to be reconfigured. */
- gens = genconfig_shadow;
- gens_ii = gen_config_ii_shadow;
--
-+
- set_gen_config = 1;
- switch (ioif)
- {
-@@ -494,9 +761,43 @@
- set_gen_config = 0;
- break;
- default:
-- panic("cris_request_io_interface: Bad interface %u submitted for %s\n",
-- ioif,
-- device_id);
-+ local_irq_restore(flags);
-+ printk(KERN_INFO "cris_request_io_interface: Bad interface %u submitted for %s\n",
-+ ioif,
-+ device_id);
-+ return -EBUSY;
-+ }
-+
-+ /* All needed I/O pins and pin groups are free, allocate. */
-+ group_set = interfaces[ioif].groups;
-+ while (NULL != (grp = get_group(group_set))) {
-+ unsigned int if_group_use = 0;
-+
-+ switch(grp->group) {
-+ case group_a:
-+ if_group_use = interfaces[ioif].group_a;
-+ break;
-+ case group_b:
-+ if_group_use = interfaces[ioif].group_b;
-+ break;
-+ case group_c:
-+ if_group_use = interfaces[ioif].group_c;
-+ break;
-+ case group_d:
-+ if_group_use = interfaces[ioif].group_d;
-+ break;
-+ case group_e:
-+ if_group_use = interfaces[ioif].group_e;
-+ break;
-+ case group_f:
-+ if_group_use = interfaces[ioif].group_f;
-+ break;
-+ default:
-+ BUG_ON(1);
-+ }
-+ grp->used |= if_group_use;
-+
-+ group_set = clear_group_from_set(group_set, grp);
- }
-
- interfaces[ioif].used = 1;
-@@ -528,7 +829,7 @@
-
- DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
- gpio_in_pins, gpio_out_pins, gpio_pb_pins));
--
-+
- local_irq_restore(flags);
-
- notify_watchers();
-@@ -559,43 +860,36 @@
- }
- group_set = interfaces[ioif].groups;
- while (NULL != (grp = get_group(group_set))) {
-- if (grp->group == group_f) {
-- switch (ioif)
-- {
-- case if_sync_serial_1:
-- if ((grp->owner == if_sync_serial_1) &&
-- interfaces[if_sync_serial_3].used) {
-- grp->owner = if_sync_serial_3;
-- } else
-- grp->used = 0;
-- break;
-- case if_sync_serial_3:
-- if ((grp->owner == if_sync_serial_3) &&
-- interfaces[if_sync_serial_1].used) {
-- grp->owner = if_sync_serial_1;
-- } else
-- grp->used = 0;
-- break;
-- case if_scsi8_0:
-- if ((grp->owner == if_scsi8_0) &&
-- interfaces[if_scsi8_1].used) {
-- grp->owner = if_scsi8_1;
-- } else
-- grp->used = 0;
-- break;
-- case if_scsi8_1:
-- if ((grp->owner == if_scsi8_1) &&
-- interfaces[if_scsi8_0].used) {
-- grp->owner = if_scsi8_0;
-- } else
-- grp->used = 0;
-- break;
-- default:
-- grp->used = 0;
-- }
-- } else {
-- grp->used = 0;
-+ unsigned int if_group_use = 0;
-+
-+ switch(grp->group) {
-+ case group_a:
-+ if_group_use = interfaces[ioif].group_a;
-+ break;
-+ case group_b:
-+ if_group_use = interfaces[ioif].group_b;
-+ break;
-+ case group_c:
-+ if_group_use = interfaces[ioif].group_c;
-+ break;
-+ case group_d:
-+ if_group_use = interfaces[ioif].group_d;
-+ break;
-+ case group_e:
-+ if_group_use = interfaces[ioif].group_e;
-+ break;
-+ case group_f:
-+ if_group_use = interfaces[ioif].group_f;
-+ break;
-+ default:
-+ BUG_ON(1);
- }
-+
-+ if ((grp->used & if_group_use) != if_group_use) {
-+ BUG_ON(1);
-+ }
-+ grp->used = grp->used & ~if_group_use;
-+
- group_set = clear_group_from_set(group_set, grp);
- }
- interfaces[ioif].used = 0;
-@@ -784,7 +1078,7 @@
-
- for (i = start_bit; i <= stop_bit; i++) {
- owners[i] = if_unclaimed;
-- }
-+ }
- local_irq_restore(flags);
- notify_watchers();
-
-@@ -821,7 +1115,7 @@
- }
-
- void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available,
-- const unsigned int gpio_out_available,
-+ const unsigned int gpio_out_available,
- const unsigned char pa_available,
- const unsigned char pb_available))
- {
-@@ -870,7 +1164,7 @@
-
- module_init(cris_io_interface_init);
-
--
-+
- EXPORT_SYMBOL(cris_request_io_interface);
- EXPORT_SYMBOL(cris_free_io_interface);
- EXPORT_SYMBOL(cris_io_interface_allocate_pins);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/irq.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/irq.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/irq.c 2006-10-30 16:17:03.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: irq.c,v 1.4 2005/01/04 12:22:28 starvik Exp $
-+/* $Id: irq.c,v 1.9 2006/10/30 15:17:03 pkj Exp $
- *
- * linux/arch/cris/kernel/irq.c
- *
-@@ -12,7 +12,9 @@
- */
-
- #include <asm/irq.h>
-+#include <asm/current.h>
- #include <linux/irq.h>
-+#include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/init.h>
-
-@@ -75,8 +77,8 @@
- BUILD_IRQ(13, 0x2000)
- void mmu_bus_fault(void); /* IRQ 14 is the bus fault interrupt */
- void multiple_interrupt(void); /* IRQ 15 is the multiple IRQ interrupt */
--BUILD_IRQ(16, 0x10000)
--BUILD_IRQ(17, 0x20000)
-+BUILD_IRQ(16, 0x10000 | 0x20000) /* ethernet tx interrupt needs to block rx */
-+BUILD_IRQ(17, 0x20000 | 0x10000) /* ...and vice versa */
- BUILD_IRQ(18, 0x40000)
- BUILD_IRQ(19, 0x80000)
- BUILD_IRQ(20, 0x100000)
-@@ -147,6 +149,55 @@
- void do_sigtrap(void); /* from entry.S */
- void gdb_handle_breakpoint(void); /* from entry.S */
-
-+extern void do_IRQ(int irq, struct pt_regs * regs);
-+
-+/* Handle multiple IRQs */
-+void do_multiple_IRQ(struct pt_regs* regs)
-+{
-+ int bit;
-+ unsigned masked;
-+ unsigned mask;
-+ unsigned ethmask = 0;
-+
-+ /* Get interrupts to mask and handle */
-+ mask = masked = *R_VECT_MASK_RD;
-+
-+ /* Never mask timer IRQ */
-+ mask &= ~(IO_MASK(R_VECT_MASK_RD, timer0));
-+
-+ /*
-+ * If either ethernet interrupt (rx or tx) is active then block
-+ * the other one too. Unblock afterwards also.
-+ */
-+ if (mask &
-+ (IO_STATE(R_VECT_MASK_RD, dma0, active) |
-+ IO_STATE(R_VECT_MASK_RD, dma1, active))) {
-+ ethmask = (IO_MASK(R_VECT_MASK_RD, dma0) |
-+ IO_MASK(R_VECT_MASK_RD, dma1));
-+ }
-+
-+ /* Block them */
-+ *R_VECT_MASK_CLR = (mask | ethmask);
-+
-+ /* An extra irq_enter here to prevent softIRQs to run after
-+ * each do_IRQ. This will decrease the interrupt latency.
-+ */
-+ irq_enter();
-+
-+ /* Handle all IRQs */
-+ for (bit = 2; bit < 32; bit++) {
-+ if (masked & (1 << bit)) {
-+ do_IRQ(bit, regs);
-+ }
-+ }
-+
-+ /* This irq_exit() will trigger the soft IRQs. */
-+ irq_exit();
-+
-+ /* Unblock the IRQs again */
-+ *R_VECT_MASK_SET = (masked | ethmask);
-+}
-+
- /* init_IRQ() is called by start_kernel and is responsible for fixing IRQ masks and
- setting the irq vector table.
- */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/kgdb.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/kgdb.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/kgdb.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/kgdb.c 2006-03-22 10:56:55.000000000 +0100
-@@ -18,6 +18,10 @@
- *! Jul 21 1999 Bjorn Wesen eLinux port
- *!
- *! $Log: kgdb.c,v $
-+*! Revision 1.7 2006/03/22 09:56:55 starvik
-+*! Merge of Linux 2.6.16
-+*!
-+*!
- *! Revision 1.6 2005/01/14 10:12:17 starvik
- *! KGDB on separate port.
- *! Console fixes from 2.4.
-@@ -75,7 +79,7 @@
- *!
- *!---------------------------------------------------------------------------
- *!
--*! $Id: kgdb.c,v 1.6 2005/01/14 10:12:17 starvik Exp $
-+*! $Id: kgdb.c,v 1.7 2006/03/22 09:56:55 starvik Exp $
- *!
- *! (C) Copyright 1999, Axis Communications AB, LUND, SWEDEN
- *!
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/process.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/process.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/process.c 2006-10-13 14:43:11.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: process.c,v 1.12 2004/12/27 11:18:32 starvik Exp $
-+/* $Id: process.c,v 1.14 2006/10/13 12:43:11 starvik Exp $
- *
- * linux/arch/cris/kernel/process.c
- *
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/ptrace.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/ptrace.c 2006-10-30 16:17:57.000000000 +0100
-@@ -66,6 +66,7 @@
- ptrace_disable(struct task_struct *child)
- {
- /* Todo - pending singlesteps? */
-+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
-
- /*
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/setup.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/setup.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/setup.c 2006-10-13 14:43:11.000000000 +0200
-@@ -1,4 +1,4 @@
--/*
-+/*
- *
- * linux/arch/cris/arch-v10/kernel/setup.c
- *
-@@ -13,6 +13,7 @@
- #include <linux/seq_file.h>
- #include <linux/proc_fs.h>
- #include <linux/delay.h>
-+#include <linux/param.h>
-
- #ifdef CONFIG_PROC_FS
- #define HAS_FPU 0x0001
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/signal.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/signal.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/signal.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/signal.c 2006-03-22 10:56:55.000000000 +0100
-@@ -41,7 +41,7 @@
- */
- #define RESTART_CRIS_SYS(regs) regs->r10 = regs->orig_r10; regs->irp -= 2;
-
--int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs);
-+void do_signal(int canrestart, struct pt_regs *regs);
-
- /*
- * Atomically swap in the new signal mask, and wait for a signal. Define
-@@ -52,68 +52,16 @@
- sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
- long srp, struct pt_regs *regs)
- {
-- sigset_t saveset;
--
- mask &= _BLOCKABLE;
- spin_lock_irq(¤t->sighand->siglock);
-- saveset = current->blocked;
-- siginitset(¤t->blocked, mask);
-- recalc_sigpending();
-- spin_unlock_irq(¤t->sighand->siglock);
--
-- regs->r10 = -EINTR;
-- while (1) {
-- current->state = TASK_INTERRUPTIBLE;
-- schedule();
-- if (do_signal(0, &saveset, regs))
-- /* We will get here twice: once to call the signal
-- handler, then again to return from the
-- sigsuspend system call. When calling the
-- signal handler, R10 holds the signal number as
-- set through do_signal. The sigsuspend call
-- will return with the restored value set above;
-- always -EINTR. */
-- return regs->r10;
-- }
--}
--
--/* Define dummy arguments to be able to reach the regs argument. (Note that
-- * this arrangement relies on size_t occupying one register.)
-- */
--int
--sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
-- long mof, long srp, struct pt_regs *regs)
--{
-- sigset_t saveset, newset;
--
-- /* XXX: Don't preclude handling different sized sigset_t's. */
-- if (sigsetsize != sizeof(sigset_t))
-- return -EINVAL;
--
-- if (copy_from_user(&newset, unewset, sizeof(newset)))
-- return -EFAULT;
-- sigdelsetmask(&newset, ~_BLOCKABLE);
--
-- spin_lock_irq(¤t->sighand->siglock);
-- saveset = current->blocked;
-- current->blocked = newset;
-+ current->saved_sigmask = current->blocked;
-+ siginitset(¤t->blocked, mask);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
--
-- regs->r10 = -EINTR;
-- while (1) {
-- current->state = TASK_INTERRUPTIBLE;
-- schedule();
-- if (do_signal(0, &saveset, regs))
-- /* We will get here twice: once to call the signal
-- handler, then again to return from the
-- sigsuspend system call. When calling the
-- signal handler, R10 holds the signal number as
-- set through do_signal. The sigsuspend call
-- will return with the restored value set above;
-- always -EINTR. */
-- return regs->r10;
-- }
-+ current->state = TASK_INTERRUPTIBLE;
-+ schedule();
-+ set_thread_flag(TIF_RESTORE_SIGMASK);
-+ return -ERESTARTNOHAND;
- }
-
- int
-@@ -353,8 +301,8 @@
- * user-mode trampoline.
- */
-
--static void setup_frame(int sig, struct k_sigaction *ka,
-- sigset_t *set, struct pt_regs * regs)
-+static int setup_frame(int sig, struct k_sigaction *ka,
-+ sigset_t *set, struct pt_regs * regs)
- {
- struct sigframe __user *frame;
- unsigned long return_ip;
-@@ -402,14 +350,15 @@
-
- wrusp((unsigned long)frame);
-
-- return;
-+ return 0;
-
- give_sigsegv:
- force_sigsegv(sig, current);
-+ return -EFAULT;
- }
-
--static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-- sigset_t *set, struct pt_regs * regs)
-+static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-+ sigset_t *set, struct pt_regs * regs)
- {
- struct rt_sigframe __user *frame;
- unsigned long return_ip;
-@@ -466,21 +415,24 @@
-
- wrusp((unsigned long)frame);
-
-- return;
-+ return 0;
-
- give_sigsegv:
- force_sigsegv(sig, current);
-+ return -EFAULT;
- }
-
- /*
- * OK, we're invoking a handler
- */
-
--static inline void
-+static inline int
- handle_signal(int canrestart, unsigned long sig,
- siginfo_t *info, struct k_sigaction *ka,
- sigset_t *oldset, struct pt_regs * regs)
- {
-+ int ret;
-+
- /* Are we from a system call? */
- if (canrestart) {
- /* If so, check system call restarting.. */
-@@ -510,19 +462,20 @@
-
- /* Set up the stack frame */
- if (ka->sa.sa_flags & SA_SIGINFO)
-- setup_rt_frame(sig, ka, info, oldset, regs);
-+ ret = setup_rt_frame(sig, ka, info, oldset, regs);
- else
-- setup_frame(sig, ka, oldset, regs);
-+ ret = setup_frame(sig, ka, oldset, regs);
-
-- if (ka->sa.sa_flags & SA_ONESHOT)
-- ka->sa.sa_handler = SIG_DFL;
-+ if (ret == 0) {
-+ spin_lock_irq(¤t->sighand->siglock);
-+ sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
-+ if (!(ka->sa.sa_flags & SA_NODEFER))
-+ sigaddset(¤t->blocked,sig);
-+ recalc_sigpending();
-+ spin_unlock_irq(¤t->sighand->siglock);
-+ }
-
-- spin_lock_irq(¤t->sighand->siglock);
-- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
-- if (!(ka->sa.sa_flags & SA_NODEFER))
-- sigaddset(¤t->blocked,sig);
-- recalc_sigpending();
-- spin_unlock_irq(¤t->sighand->siglock);
-+ return ret;
- }
-
- /*
-@@ -537,12 +490,13 @@
- * mode below.
- */
-
--int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
-+void do_signal(int canrestart, struct pt_regs *regs)
- {
- siginfo_t info;
- int signr;
- struct k_sigaction ka;
--
-+ sigset_t *oldset;
-+
- /*
- * We want the common case to go fast, which
- * is why we may in certain cases get here from
-@@ -550,16 +504,26 @@
- * if so.
- */
- if (!user_mode(regs))
-- return 1;
-+ return;
-
-- if (!oldset)
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
-+ oldset = ¤t->saved_sigmask;
-+ else
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- if (signr > 0) {
- /* Whee! Actually deliver the signal. */
-- handle_signal(canrestart, signr, &info, &ka, oldset, regs);
-- return 1;
-+ if (handle_signal(canrestart, signr, &info, &ka, oldset, regs)) {
-+ /* a signal was successfully delivered; the saved
-+ * sigmask will have been stored in the signal frame,
-+ * and will be restored by sigreturn, so we can simply
-+ * clear the TIF_RESTORE_SIGMASK flag */
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
-+ clear_thread_flag(TIF_RESTORE_SIGMASK);
-+ }
-+
-+ return;
- }
-
- /* Did we come from a system call? */
-@@ -575,5 +539,11 @@
- regs->irp -= 2;
- }
- }
-- return 0;
-+
-+ /* if there's no signal to deliver, we just put the saved sigmask
-+ * back */
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
-+ clear_thread_flag(TIF_RESTORE_SIGMASK);
-+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
-+ }
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/time.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/time.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/time.c 2007-01-09 10:29:18.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: time.c,v 1.5 2004/09/29 06:12:46 starvik Exp $
-+/* $Id: time.c,v 1.10 2007/01/09 09:29:18 starvik Exp $
- *
- * linux/arch/cris/arch-v10/kernel/time.c
- *
-@@ -20,6 +20,7 @@
- #include <asm/io.h>
- #include <asm/delay.h>
- #include <asm/rtc.h>
-+#include <asm/irq_regs.h>
-
- /* define this if you need to use print_timestamp */
- /* it will make jiffies at 96 hz instead of 100 hz though */
-@@ -202,8 +203,9 @@
- extern void cris_do_profile(struct pt_regs *regs);
-
- static inline irqreturn_t
--timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+timer_interrupt(int irq, void *dev_id)
- {
-+ struct pt_regs* regs = get_irq_regs();
- /* acknowledge the timer irq */
-
- #ifdef USE_CASCADE_TIMERS
-@@ -222,9 +224,11 @@
- #endif
-
- /* reset watchdog otherwise it resets us! */
--
- reset_watchdog();
-
-+ /* Update statistics. */
-+ update_process_times(user_mode(regs));
-+
- /* call the real timer interrupt handler */
-
- do_timer(1);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/traps.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/traps.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/traps.c 2006-12-11 14:04:24.000000000 +0100
-@@ -1,13 +1,10 @@
--/* $Id: traps.c,v 1.4 2005/04/24 18:47:55 starvik Exp $
-+/*
-+ * Helper functions for trap handlers
- *
-- * linux/arch/cris/arch-v10/traps.c
-+ * Copyright (C) 2000-2006, Axis Communications AB.
- *
-- * Heler functions for trap handlers
-- *
-- * Copyright (C) 2000-2002 Axis Communications AB
-- *
-- * Authors: Bjorn Wesen
-- * Hans-Peter Nilsson
-+ * Authors: Bjorn Wesen
-+ * Hans-Peter Nilsson
- *
- */
-
-@@ -15,124 +12,118 @@
- #include <asm/uaccess.h>
- #include <asm/arch/sv_addr_ag.h>
-
--extern int raw_printk(const char *fmt, ...);
--
--void
--show_registers(struct pt_regs * regs)
-+void
-+show_registers(struct pt_regs *regs)
- {
-- /* We either use rdusp() - the USP register, which might not
-- correspond to the current process for all cases we're called,
-- or we use the current->thread.usp, which is not up to date for
-- the current process. Experience shows we want the USP
-- register. */
-+ /*
-+ * It's possible to use either the USP register or current->thread.usp.
-+ * USP might not correspond to the current process for all cases this
-+ * function is called, and current->thread.usp isn't up to date for the
-+ * current process. Experience shows that using USP is the way to go.
-+ */
- unsigned long usp = rdusp();
-
-- raw_printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n",
-- regs->irp, regs->srp, regs->dccr, usp, regs->mof );
-- raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
-+ printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n",
-+ regs->irp, regs->srp, regs->dccr, usp, regs->mof);
-+
-+ printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
- regs->r0, regs->r1, regs->r2, regs->r3);
-- raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
-+
-+ printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
- regs->r4, regs->r5, regs->r6, regs->r7);
-- raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
-+
-+ printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
- regs->r8, regs->r9, regs->r10, regs->r11);
-- raw_printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n",
-- regs->r12, regs->r13, regs->orig_r10, regs);
-- raw_printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE);
-- raw_printk("Process %s (pid: %d, stackpage=%08lx)\n",
-+
-+ printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n",
-+ regs->r12, regs->r13, regs->orig_r10, (long unsigned)regs);
-+
-+ printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE);
-+
-+ printk("Process %s (pid: %d, stackpage=%08lx)\n",
- current->comm, current->pid, (unsigned long)current);
-
- /*
-- * When in-kernel, we also print out the stack and code at the
-- * time of the fault..
-- */
-- if (! user_mode(regs)) {
-- int i;
-+ * When in-kernel, we also print out the stack and code at the
-+ * time of the fault..
-+ */
-+ if (!user_mode(regs)) {
-+ int i;
-
-- show_stack(NULL, (unsigned long*)usp);
-+ show_stack(NULL, (unsigned long *)usp);
-
-- /* Dump kernel stack if the previous dump wasn't one. */
-+ /*
-+ * If the previous stack-dump wasn't a kernel one, dump the
-+ * kernel stack now.
-+ */
- if (usp != 0)
-- show_stack (NULL, NULL);
-+ show_stack(NULL, NULL);
-
-- raw_printk("\nCode: ");
-- if(regs->irp < PAGE_OFFSET)
-- goto bad;
--
-- /* Often enough the value at regs->irp does not point to
-- the interesting instruction, which is most often the
-- _previous_ instruction. So we dump at an offset large
-- enough that instruction decoding should be in sync at
-- the interesting point, but small enough to fit on a row
-- (sort of). We point out the regs->irp location in a
-- ksymoops-friendly way by wrapping the byte for that
-- address in parentheses. */
-- for(i = -12; i < 12; i++)
-- {
-- unsigned char c;
-- if(__get_user(c, &((unsigned char*)regs->irp)[i])) {
--bad:
-- raw_printk(" Bad IP value.");
-- break;
-- }
-+ printk("\nCode: ");
-+
-+ if (regs->irp < PAGE_OFFSET)
-+ goto bad_value;
-+
-+ /*
-+ * Quite often the value at regs->irp doesn't point to the
-+ * interesting instruction, which often is the previous
-+ * instruction. So dump at an offset large enough that the
-+ * instruction decoding should be in sync at the interesting
-+ * point, but small enough to fit on a row. The regs->irp
-+ * location is pointed out in a ksymoops-friendly way by
-+ * wrapping the byte for that address in parenthesises.
-+ */
-+ for (i = -12; i < 12; i++) {
-+ unsigned char c;
-+
-+ if (__get_user(c, &((unsigned char *)regs->irp)[i])) {
-+bad_value:
-+ printk(" Bad IP value.");
-+ break;
-+ }
-
- if (i == 0)
-- raw_printk("(%02x) ", c);
-+ printk("(%02x) ", c);
- else
-- raw_printk("%02x ", c);
-- }
-- raw_printk("\n");
-- }
-+ printk("%02x ", c);
-+ }
-+ printk("\n");
-+ }
- }
-
--/* Called from entry.S when the watchdog has bitten
-- * We print out something resembling an oops dump, and if
-- * we have the nice doggy development flag set, we halt here
-- * instead of rebooting.
-- */
--
--extern void reset_watchdog(void);
--extern void stop_watchdog(void);
--
--
- void
--watchdog_bite_hook(struct pt_regs *regs)
-+arch_enable_nmi(void)
- {
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- local_irq_disable();
-- stop_watchdog();
-- show_registers(regs);
-- while(1) /* nothing */;
--#else
-- show_registers(regs);
--#endif
-+ asm volatile ("setf m");
- }
-
--/* This is normally the 'Oops' routine */
--void
--die_if_kernel(const char * str, struct pt_regs * regs, long err)
-+extern void (*nmi_handler)(struct pt_regs*);
-+void handle_nmi(struct pt_regs* regs)
- {
-- if(user_mode(regs))
-- return;
--
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- /* This printout might take too long and trigger the
-- * watchdog normally. If we're in the nice doggy
-- * development mode, stop the watchdog during printout.
-- */
-- stop_watchdog();
--#endif
--
-- raw_printk("%s: %04lx\n", str, err & 0xffff);
--
-- show_registers(regs);
-+ if (nmi_handler)
-+ nmi_handler(regs);
-
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- reset_watchdog();
--#endif
-- do_exit(SIGSEGV);
-+ /* Wait until nmi is no longer active. (We enable NMI immediately after
-+ returning from this function, and we don't want it happening while
-+ exiting from the NMI interrupt handler.) */
-+ while(*R_IRQ_MASK0_RD & IO_STATE(R_IRQ_MASK0_RD, nmi_pin, active));
- }
-
--void arch_enable_nmi(void)
-+#ifdef CONFIG_DEBUG_BUGVERBOSE
-+void
-+handle_BUG(struct pt_regs *regs)
- {
-- asm volatile("setf m");
-+ struct bug_frame f;
-+ unsigned char c;
-+ unsigned long irp = regs->irp;
-+
-+ if (__copy_from_user(&f, (const void __user *)(irp - 8), sizeof f))
-+ return;
-+ if (f.prefix != BUG_PREFIX || f.magic != BUG_MAGIC)
-+ return;
-+ if (__get_user(c, f.filename))
-+ f.filename = "<bad filename>";
-+
-+ printk("kernel BUG at %s:%d!\n", f.filename, f.line);
- }
-+#endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksum.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksum.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksum.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksum.S 2005-08-16 12:38:52.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: checksum.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+/* $Id: checksum.S,v 1.2 2005/08/16 10:38:52 edgar Exp $
- * A fast checksum routine using movem
- * Copyright (c) 1998-2001 Axis Communications AB
- *
-@@ -61,8 +61,6 @@
-
- ax
- addq 0,$r12
-- ax ; do it again, since we might have generated a carry
-- addq 0,$r12
-
- subq 10*4,$r11
- bge _mloop
-@@ -88,10 +86,6 @@
- lsrq 16,$r13 ; r13 = checksum >> 16
- and.d $r9,$r12 ; checksum = checksum & 0xffff
- add.d $r13,$r12 ; checksum += r13
-- move.d $r12,$r13 ; do the same again, maybe we got a carry last add
-- lsrq 16,$r13
-- and.d $r9,$r12
-- add.d $r13,$r12
-
- _no_fold:
- cmpq 2,$r11
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksumcopy.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksumcopy.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksumcopy.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksumcopy.S 2005-08-16 12:38:52.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: checksumcopy.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+/* $Id: checksumcopy.S,v 1.2 2005/08/16 10:38:52 edgar Exp $
- * A fast checksum+copy routine using movem
- * Copyright (c) 1998, 2001 Axis Communications AB
- *
-@@ -67,8 +67,6 @@
-
- ax
- addq 0,$r13
-- ax ; do it again, since we might have generated a carry
-- addq 0,$r13
-
- subq 10*4,$r12
- bge _mloop
-@@ -91,10 +89,6 @@
- lsrq 16,$r9 ; r0 = checksum >> 16
- and.d 0xffff,$r13 ; checksum = checksum & 0xffff
- add.d $r9,$r13 ; checksum += r0
-- move.d $r13,$r9 ; do the same again, maybe we got a carry last add
-- lsrq 16,$r9
-- and.d 0xffff,$r13
-- add.d $r9,$r13
-
- _no_fold:
- cmpq 2,$r12
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/dram_init.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/dram_init.S
---- linux-2.6.19.2.old/arch/cris/arch-v10/lib/dram_init.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/dram_init.S 2006-10-13 14:43:11.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: dram_init.S,v 1.4 2003/09/22 09:21:59 starvik Exp $
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
- *
- * DRAM/SDRAM initialization - alter with care
- * This file is intended to be included from other assembler files
-@@ -11,6 +11,9 @@
- * Authors: Mikael Starvik (starvik@axis.com)
- *
- * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
- * Revision 1.4 2003/09/22 09:21:59 starvik
- * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
- * so we need to mask off 12 bits.
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/mm/fault.c linux-2.6.19.2.dev/arch/cris/arch-v10/mm/fault.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/mm/fault.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/mm/fault.c 2006-12-11 12:32:10.000000000 +0100
-@@ -73,7 +73,7 @@
- /* leave it to the MM system fault handler */
- if (miss)
- do_page_fault(address, regs, 0, writeac);
-- else
-+ else
- do_page_fault(address, regs, 1, we);
-
- /* Reload TLB with new entry to avoid an extra miss exception.
-@@ -84,12 +84,13 @@
- local_irq_disable();
- pmd = (pmd_t *)(pgd + pgd_index(address));
- if (pmd_none(*pmd))
-- return;
-+ goto exit;
- pte = *pte_offset_kernel(pmd, address);
- if (!pte_present(pte))
-- return;
-+ goto exit;
- *R_TLB_SELECT = select;
- *R_TLB_HI = cause;
- *R_TLB_LO = pte_val(pte);
-+exit:
- local_irq_restore(flags);
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/mm/tlb.c linux-2.6.19.2.dev/arch/cris/arch-v10/mm/tlb.c
---- linux-2.6.19.2.old/arch/cris/arch-v10/mm/tlb.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v10/mm/tlb.c 2006-08-07 12:08:35.000000000 +0200
-@@ -179,23 +179,26 @@
- switch_mm(struct mm_struct *prev, struct mm_struct *next,
- struct task_struct *tsk)
- {
-- /* make sure we have a context */
-+ if (prev != next) {
-+ /* make sure we have a context */
-+ get_mmu_context(next);
-+
-+ /* remember the pgd for the fault handlers
-+ * this is similar to the pgd register in some other CPU's.
-+ * we need our own copy of it because current and active_mm
-+ * might be invalid at points where we still need to derefer
-+ * the pgd.
-+ */
-
-- get_mmu_context(next);
-+ per_cpu(current_pgd, smp_processor_id()) = next->pgd;
-
-- /* remember the pgd for the fault handlers
-- * this is similar to the pgd register in some other CPU's.
-- * we need our own copy of it because current and active_mm
-- * might be invalid at points where we still need to derefer
-- * the pgd.
-- */
--
-- per_cpu(current_pgd, smp_processor_id()) = next->pgd;
--
-- /* switch context in the MMU */
-+ /* switch context in the MMU */
-
-- D(printk("switching mmu_context to %d (%p)\n", next->context, next));
-+ D(printk("switching mmu_context to %d (%p)\n",
-+ next->context, next));
-
-- *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id);
-+ *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT,
-+ page_id, next->context.page_id);
-+ }
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v32/Kconfig
---- linux-2.6.19.2.old/arch/cris/arch-v32/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/Kconfig 2007-01-09 10:29:18.000000000 +0100
-@@ -1,23 +1,66 @@
-+source drivers/cpufreq/Kconfig
-+
- config ETRAX_DRAM_VIRTUAL_BASE
- hex
- depends on ETRAX_ARCH_V32
- default "c0000000"
-
--config ETRAX_LED1G
-- string "First green LED bit"
-+choice
-+ prompt "Nbr of Ethernet LED groups"
- depends on ETRAX_ARCH_V32
-+ default ETRAX_NBR_LED_GRP_ONE
-+ help
-+ Select how many Ethernet LED groups that can be used. Usually one per Ethernet
-+ interface is a good choice.
-+
-+config ETRAX_NBR_LED_GRP_ZERO
-+ bool "Use zero LED groups"
-+ help
-+ Select this if you do not want any Ethernet LEDs.
-+
-+config ETRAX_NBR_LED_GRP_ONE
-+ bool "Use one LED group"
-+ help
-+ Select this if you want one Ethernet LED group. This LED group can be used for
-+ one or more Ethernet interfaces. However, it is recomended that each Ethernet
-+ interface use a dedicated LED group.
-+
-+config ETRAX_NBR_LED_GRP_TWO
-+ bool "Use two LED groups"
-+ help
-+ Select this if you want two Ethernet LED groups. This is the best choice if you
-+ have more than one Ethernet interface and would like to have separate LEDs for
-+ the interfaces.
-+
-+endchoice
-+
-+config ETRAX_LED_G_NET0
-+ string "Ethernet LED group 0 green LED bit"
-+ depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
- default "PA3"
- help
-- Bit to use for the first green LED (network LED).
-- Most Axis products use bit A3 here.
-+ Bit to use for the green LED in Ethernet LED group 0.
-
--config ETRAX_LED1R
-- string "First red LED bit"
-- depends on ETRAX_ARCH_V32
-+config ETRAX_LED_R_NET0
-+ string "Ethernet LED group 0 red LED bit"
-+ depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
- default "PA4"
- help
-- Bit to use for the first red LED (network LED).
-- Most Axis products use bit A4 here.
-+ Bit to use for the red LED in Ethernet LED group 0.
-+
-+config ETRAX_LED_G_NET1
-+ string "Ethernet group 1 green LED bit"
-+ depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
-+ default ""
-+ help
-+ Bit to use for the green LED in Ethernet LED group 1.
-+
-+config ETRAX_LED_R_NET1
-+ string "Ethernet group 1 red LED bit"
-+ depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
-+ default ""
-+ help
-+ Bit to use for the red LED in Ethernet LED group 1.
-
- config ETRAX_LED2G
- string "Second green LED bit"
-@@ -294,3 +337,22 @@
- help
- Configures the initial data for the general port E bits. Most
- products should use 00000 here.
-+
-+config ETRAX_DEF_GIO_PV_OE
-+ hex "GIO_PV_OE"
-+ depends on ETRAX_VIRTUAL_GPIO
-+ default "0000"
-+ help
-+ Configures the direction of virtual general port V bits. 1 is out,
-+ 0 is in. This is often totally different depending on the product
-+ used. These bits are used for all kinds of stuff. If you don't know
-+ what to use, it is always safe to put all as inputs, although
-+ floating inputs isn't good.
-+
-+config ETRAX_DEF_GIO_PV_OUT
-+ hex "GIO_PV_OUT"
-+ depends on ETRAX_VIRTUAL_GPIO
-+ default "0000"
-+ help
-+ Configures the initial data for the virtual general port V bits.
-+ Most products should use 0000 here.
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/Makefile 2006-11-29 17:05:41.000000000 +0100
-@@ -1,14 +1,21 @@
- #
- # arch/cris/arch-v32/boot/Makefile
- #
--target = $(target_boot_dir)
--src = $(src_boot_dir)
-
--zImage: compressed/vmlinuz
-+OBJCOPY = objcopy-cris
-+OBJCOPYFLAGS = -O binary -R .note -R .comment
-
--compressed/vmlinuz: $(objtree)/vmlinux
-- @$(MAKE) -f $(src)/compressed/Makefile $(objtree)/vmlinuz
-+subdir- := compressed rescue
-+targets := Image
-
--clean:
-- rm -f zImage tools/build compressed/vmlinux.out
-- @$(MAKE) -f $(src)/compressed/Makefile clean
-+$(obj)/Image: vmlinux FORCE
-+ $(call if_changed,objcopy)
-+ @echo ' Kernel: $@ is ready'
-+
-+$(obj)/compressed/vmlinux: $(obj)/Image FORCE
-+ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
-+ $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
-+
-+$(obj)/zImage: $(obj)/compressed/vmlinux
-+ @cp $< $@
-+ @echo ' Kernel: $@ is ready'
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/Makefile 2006-11-29 17:05:42.000000000 +0100
-@@ -1,41 +1,29 @@
- #
--# lx25/arch/cris/arch-v32/boot/compressed/Makefile
-+# arch/cris/arch-v32/boot/compressed/Makefile
- #
--# create a compressed vmlinux image from the original vmlinux files and romfs
--#
--
--target = $(target_compressed_dir)
--src = $(src_compressed_dir)
-
- CC = gcc-cris -mlinux -march=v32 -I $(TOPDIR)/include
- CFLAGS = -O2
- LD = gcc-cris -mlinux -march=v32 -nostdlib
-+LDFLAGS = -T $(obj)/decompress.ld
-+obj-y = head.o misc.o
-+OBJECTS = $(obj)/head.o $(obj)/misc.o
- OBJCOPY = objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
--OBJECTS = $(target)/head.o $(target)/misc.o
--
--# files to compress
--SYSTEM = $(objtree)/vmlinux.bin
--
--all: vmlinuz
--
--$(target)/decompress.bin: $(OBJECTS)
-- $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS)
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
-
--$(objtree)/vmlinuz: $(target) piggy.img $(target)/decompress.bin
-- cat $(target)/decompress.bin piggy.img > $(objtree)/vmlinuz
-- rm -f piggy.img
-- cp $(objtree)/vmlinuz $(src)
-+quiet_cmd_image = BUILD $@
-+cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
-
--$(target)/head.o: $(src)/head.S
-- $(CC) -D__ASSEMBLY__ -c $< -o $@
-+targets := vmlinux piggy.gz decompress.o decompress.bin
-
--# gzip the kernel image
-+$(obj)/decompress.o: $(OBJECTS) FORCE
-+ $(call if_changed,ld)
-
--piggy.img: $(SYSTEM)
-- cat $(SYSTEM) | gzip -f -9 > piggy.img
-+$(obj)/decompress.bin: $(obj)/decompress.o FORCE
-+ $(call if_changed,objcopy)
-
--clean:
-- rm -f piggy.img $(objtree)/vmlinuz vmlinuz.o decompress.o decompress.bin $(OBJECTS)
-+$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
-+ $(call if_changed,image)
-
-+$(obj)/piggy.gz: $(obj)/../Image FORCE
-+ $(call if_changed,gzip)
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/README linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/README
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/README 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/README 2003-08-21 11:37:03.000000000 +0200
-@@ -5,14 +5,14 @@
- This can be slightly confusing because it's a process with many steps.
-
- The kernel object built by the arch/etrax100/Makefile, vmlinux, is split
--by that makefile into text and data binary files, vmlinux.text and
-+by that makefile into text and data binary files, vmlinux.text and
- vmlinux.data.
-
- Those files together with a ROM filesystem can be catted together and
- burned into a flash or executed directly at the DRAM origin.
-
- They can also be catted together and compressed with gzip, which is what
--happens in this makefile. Together they make up piggy.img.
-+happens in this makefile. Together they make up piggy.img.
-
- The decompressor is built into the file decompress.o. It is turned into
- the binary file decompress.bin, which is catted together with piggy.img
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/decompress.ld linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/decompress.ld
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/decompress.ld 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/decompress.ld 2003-08-21 11:57:56.000000000 +0200
-@@ -1,7 +1,7 @@
- /*#OUTPUT_FORMAT(elf32-us-cris) */
- OUTPUT_ARCH (crisv32)
-
--MEMORY
-+MEMORY
- {
- dram : ORIGIN = 0x40700000,
- LENGTH = 0x00100000
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/head.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/head.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/head.S 2007-01-09 10:29:20.000000000 +0100
-@@ -2,19 +2,19 @@
- * Code that sets up the DRAM registers, calls the
- * decompressor to unpack the piggybacked kernel, and jumps.
- *
-- * Copyright (C) 1999 - 2003, Axis Communications AB
-+ * Copyright (C) 1999 - 2006, Axis Communications AB
- */
-
- #define ASSEMBLER_MACROS_ONLY
- #include <asm/arch/hwregs/asm/reg_map_asm.h>
- #include <asm/arch/hwregs/asm/gio_defs_asm.h>
- #include <asm/arch/hwregs/asm/config_defs_asm.h>
--
-+
- #define RAM_INIT_MAGIC 0x56902387
- #define COMMAND_LINE_MAGIC 0x87109563
-
- ;; Exported symbols
--
-+
- .globl input_data
-
- .text
-@@ -29,53 +29,16 @@
- REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
- move.d $r0, [$r1]
-
-- ;; If booting from NAND flash we first have to copy some
-- ;; data from NAND flash to internal RAM to get the code
-- ;; that initializes the SDRAM. Lets copy 20 KB. This
-- ;; code executes at 0x38010000 if booting from NAND and
-- ;; we are guaranted that at least 0x200 bytes are good so
-- ;; lets start from there. The first 8192 bytes in the nand
-- ;; flash is spliced with zeroes and is thus 16384 bytes.
-- move.d 0x38010200, $r10
-- move.d 0x14200, $r11 ; Start offset in NAND flash 0x10200 + 16384
-- move.d 0x5000, $r12 ; Length of copy
--
-- ;; Before this code the tools add a partitiontable so the PC
-- ;; has an offset from the linked address.
--offset1:
-- lapcq ., $r13 ; get PC
-- add.d first_copy_complete-offset1, $r13
--
--#include "../../lib/nand_init.S"
--
--first_copy_complete:
-- ;; Initialze the DRAM registers.
-+ ;; Initialize the DRAM registers.
- cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
- beq dram_init_finished
- nop
-
- #include "../../lib/dram_init.S"
--
-+
- dram_init_finished:
-- lapcq ., $r13 ; get PC
-- add.d second_copy_complete-dram_init_finished, $r13
--
-- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
-- move.d [$r0], $r0
-- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
-- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
-- bne second_copy_complete ; No NAND boot
-- nop
--
-- ;; Copy 2MB from NAND flash to SDRAM (at 2-4MB into the SDRAM)
-- move.d 0x40204000, $r10
-- move.d 0x8000, $r11
-- move.d 0x200000, $r12
-- ba copy_nand_to_ram
-- nop
--second_copy_complete:
--
-- ;; Initiate the PA port.
-+
-+ ;; Initiate the GIO ports.
- move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
- move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
- move.d $r0, [$r1]
-@@ -84,57 +47,74 @@
- move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
- move.d $r0, [$r1]
-
-+ move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PD_OUT, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PD_OE, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PE_OUT, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
-+ move.d $r0, [$r1]
-+
-+ move.d CONFIG_ETRAX_DEF_GIO_PE_OE, $r0
-+ move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
-+ move.d $r0, [$r1]
-+
- ;; Setup the stack to a suitably high address.
-- ;; We assume 8 MB is the minimum DRAM and put
-+ ;; We assume 8 MB is the minimum DRAM and put
- ;; the SP at the top for now.
-
- move.d 0x40800000, $sp
-
-- ;; Figure out where the compressed piggyback image is
-- ;; in the flash (since we wont try to copy it to DRAM
-- ;; before unpacking). It is at _edata, but in flash.
-+ ;; Figure out where the compressed piggyback image is.
-+ ;; It is either in [NOR] flash (we don't want to copy it
-+ ;; to DRAM before unpacking), or copied to DRAM
-+ ;; by the [NAND] flash boot loader.
-+ ;; The piggyback image is at _edata, but relative to where the
-+ ;; image is actually located in memory, not where it is linked
-+ ;; (the decompressor is linked at 0x40700000+ and runs there).
- ;; Use (_edata - herami) as offset to the current PC.
-
-- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
-- move.d [$r0], $r0
-- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
-- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
-- beq hereami2
-- nop
--hereami:
-+hereami:
- lapcq ., $r5 ; get PC
- and.d 0x7fffffff, $r5 ; strip any non-cache bit
-- move.d $r5, $r0 ; save for later - flash address of 'herami'
-+ move.d $r5, $r0 ; source address of 'herami'
- add.d _edata, $r5
- sub.d hereami, $r5 ; r5 = flash address of '_edata'
- move.d hereami, $r1 ; destination
-- ba 2f
-- nop
--hereami2:
-- lapcq ., $r5 ; get PC
-- and.d 0x00ffffff, $r5 ; strip any non-cache bit
-- move.d $r5, $r6
-- or.d 0x40200000, $r6
-- move.d $r6, $r0 ; save for later - flash address of 'herami'
-- add.d _edata, $r5
-- sub.d hereami2, $r5 ; r5 = flash address of '_edata'
-- add.d 0x40200000, $r5
-- move.d hereami2, $r1 ; destination
--2:
-- ;; Copy text+data to DRAM
-
-+ ;; Copy text+data to DRAM
-+
- move.d _edata, $r2 ; end destination
--1: move.w [$r0+], $r3
-- move.w $r3, [$r1+]
-- cmp.d $r2, $r1
-+1: move.w [$r0+], $r3 ; from herami+ source
-+ move.w $r3, [$r1+] ; to hereami+ destination (linked address)
-+ cmp.d $r2, $r1 ; finish when destination == _edata
- bcs 1b
- nop
--
-- move.d input_data, $r0 ; for the decompressor
-+ move.d input_data, $r0 ; for the decompressor
- move.d $r5, [$r0] ; for the decompressor
-
- ;; Clear the decompressors BSS (between _edata and _end)
--
-+
- moveq 0, $r0
- move.d _edata, $r1
- move.d _end, $r2
-@@ -144,40 +124,47 @@
- nop
-
- ;; Save command line magic and address.
-- move.d _cmd_line_magic, $r12
-- move.d $r10, [$r12]
-- move.d _cmd_line_addr, $r12
-- move.d $r11, [$r12]
--
-+ move.d _cmd_line_magic, $r0
-+ move.d $r10, [$r0]
-+ move.d _cmd_line_addr, $r0
-+ move.d $r11, [$r0]
-+
-+ ;; Save boot source indicator
-+ move.d _boot_source, $r0
-+ move.d $r12, [$r0]
-+
- ;; Do the decompression and save compressed size in _inptr
-
- jsr decompress_kernel
- nop
-
-+ ;; Restore boot source indicator
-+ move.d _boot_source, $r12
-+ move.d [$r12], $r12
-+
- ;; Restore command line magic and address.
- move.d _cmd_line_magic, $r10
- move.d [$r10], $r10
- move.d _cmd_line_addr, $r11
- move.d [$r11], $r11
--
-+
- ;; Put start address of root partition in r9 so the kernel can use it
- ;; when mounting from flash
- move.d input_data, $r0
- move.d [$r0], $r9 ; flash address of compressed kernel
- move.d inptr, $r0
- add.d [$r0], $r9 ; size of compressed kernel
-- cmp.d 0x40200000, $r9
-- blo enter_kernel
-- nop
-- sub.d 0x40200000, $r9
-- add.d 0x4000, $r9
--
--enter_kernel:
-+ cmp.d 0x40000000, $r9 ; image in DRAM ?
-+ blo enter_kernel ; no, must be [NOR] flash, jump
-+ nop ; delay slot
-+ and.d 0x001fffff, $r9 ; assume compressed kernel was < 2M
-+
-+enter_kernel:
- ;; Enter the decompressed kernel
- move.d RAM_INIT_MAGIC, $r8 ; Tell kernel that DRAM is initialized
- jump 0x40004000 ; kernel is linked to this address
- nop
--
-+
- .data
-
- input_data:
-@@ -185,8 +172,8 @@
- _cmd_line_magic:
- .dword 0
- _cmd_line_addr:
-+ .dword 0
-+_boot_source:
- .dword 0
--is_nand_boot:
-- .dword 0
--
-+
- #include "../../lib/hw_settings.S"
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/misc.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/misc.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/misc.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/misc.c 2006-11-03 11:35:51.000000000 +0100
-@@ -1,15 +1,15 @@
- /*
- * misc.c
- *
-- * $Id: misc.c,v 1.8 2005/04/24 18:34:29 starvik Exp $
-- *
-- * This is a collection of several routines from gzip-1.0.3
-+ * $Id: misc.c,v 1.12 2006/11/03 10:35:51 pkj Exp $
-+ *
-+ * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- * puts by Nick Holloway 1993, better puts by Martin Mares 1995
- * adoptation for Linux/CRIS Axis Communications AB, 1999
-- *
-+ *
- */
-
- /* where the piggybacked kernel image expects itself to live.
-@@ -20,11 +20,11 @@
-
- #define KERNEL_LOAD_ADR 0x40004000
-
--
- #include <linux/types.h>
- #include <asm/arch/hwregs/reg_rdwr.h>
- #include <asm/arch/hwregs/reg_map.h>
- #include <asm/arch/hwregs/ser_defs.h>
-+#include <asm/arch/hwregs/pinmux_defs.h>
-
- /*
- * gzip declarations
-@@ -66,8 +66,8 @@
- #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
- #define RESERVED 0xC0 /* bit 6,7: reserved */
-
--#define get_byte() inbuf[inptr++]
--
-+#define get_byte() inbuf[inptr++]
-+
- /* Diagnostic functions */
- #ifdef DEBUG
- # define Assert(cond,msg) {if(!(cond)) error(msg);}
-@@ -96,20 +96,20 @@
- static long bytes_out = 0;
- static uch *output_data;
- static unsigned long output_ptr = 0;
--
-+
- static void *malloc(int size);
- static void free(void *where);
- static void error(char *m);
- static void gzip_mark(void **);
- static void gzip_release(void **);
--
-+
- static void puts(const char *);
-
- /* the "heap" is put directly after the BSS ends, at end */
--
-+
- extern int _end;
- static long free_mem_ptr = (long)&_end;
--
-+
- #include "../../../../../lib/inflate.c"
-
- static void *malloc(int size)
-@@ -152,7 +152,7 @@
- rs = REG_RD(ser, regi_ser, rs_stat_din);
- }
- while (!rs.tr_rdy);/* Wait for tranceiver. */
--
-+
- REG_WR(ser, regi_ser, rw_dout, dout);
- }
-
-@@ -209,9 +209,9 @@
- ulg c = crc; /* temporary variable */
- unsigned n;
- uch *in, *out, ch;
--
-+
- in = window;
-- out = &output_data[output_ptr];
-+ out = &output_data[output_ptr];
- for (n = 0; n < outcnt; n++) {
- ch = *out++ = *in++;
- c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
-@@ -225,9 +225,9 @@
- static void
- error(char *x)
- {
-- puts("\n\n");
-+ puts("\r\n\n");
- puts(x);
-- puts("\n\n -- System halted\n");
-+ puts("\r\n\n -- System halted\n");
-
- while(1); /* Halt */
- }
-@@ -246,13 +246,13 @@
- reg_ser_rw_rec_ctrl rec_ctrl;
- reg_ser_rw_tr_baud_div tr_baud;
- reg_ser_rw_rec_baud_div rec_baud;
--
-+
- /* Turn off XOFF. */
- xoff = REG_RD(ser, regi_ser, rw_xoff);
--
-+
- xoff.chr = 0;
- xoff.automatic = regk_ser_no;
--
-+
- REG_WR(ser, regi_ser, rw_xoff, xoff);
-
- /* Set baudrate and stopbits. */
-@@ -260,19 +260,21 @@
- rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
- tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
- rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
--
-+
- tr_ctrl.stop_bits = 1; /* 2 stop bits. */
--
-- /*
-- * The baudrate setup is a bit fishy, but in the end the tranceiver is
-- * set to 4800 and the receiver to 115200. The magic value is
-- * 29.493 MHz.
-+ tr_ctrl.en = 1; /* enable transmitter */
-+ rec_ctrl.en = 1; /* enabler receiver */
-+
-+ /*
-+ * The baudrate setup used to be a bit fishy, but now transmitter and
-+ * receiver are both set to the intended baud rate, 115200.
-+ * The magic value is 29.493 MHz.
- */
- tr_ctrl.base_freq = regk_ser_f29_493;
- rec_ctrl.base_freq = regk_ser_f29_493;
-- tr_baud.div = (29493000 / 8) / 4800;
-+ tr_baud.div = (29493000 / 8) / 115200;
- rec_baud.div = (29493000 / 8) / 115200;
--
-+
- REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
- REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
- REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
-@@ -283,22 +285,28 @@
- decompress_kernel()
- {
- char revision;
--
-+ reg_pinmux_rw_hwprot hwprot;
-+
- /* input_data is set in head.S */
- inbuf = input_data;
--
-+
-+ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
- #ifdef CONFIG_ETRAX_DEBUG_PORT0
- serial_setup(regi_ser0);
- #endif
- #ifdef CONFIG_ETRAX_DEBUG_PORT1
-+ hwprot.ser1 = regk_pinmux_yes;
- serial_setup(regi_ser1);
- #endif
- #ifdef CONFIG_ETRAX_DEBUG_PORT2
-+ hwprot.ser2 = regk_pinmux_yes;
- serial_setup(regi_ser2);
- #endif
- #ifdef CONFIG_ETRAX_DEBUG_PORT3
-+ hwprot.ser3 = regk_pinmux_yes;
- serial_setup(regi_ser3);
- #endif
-+ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
-
- setup_normal_output_buffer();
-
-@@ -307,11 +315,11 @@
- __asm__ volatile ("move $vr,%0" : "=rm" (revision));
- if (revision < 32)
- {
-- puts("You need an ETRAX FS to run Linux 2.6/crisv32.\n");
-+ puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
- while(1);
- }
-
-- puts("Uncompressing Linux...\n");
-+ puts("Uncompressing Linux...\r\n");
- gunzip();
-- puts("Done. Now booting the kernel.\n");
-+ puts("Done. Now booting the kernel.\r\n");
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/Makefile 2007-01-17 14:24:50.000000000 +0100
-@@ -1,36 +1,29 @@
- #
--# Makefile for rescue code
-+# Makefile for rescue (bootstrap) code
- #
--target = $(target_rescue_dir)
--src = $(src_rescue_dir)
-
- CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE)
- CFLAGS = -O2
--LD = gcc-cris -mlinux -march=v32 -nostdlib
-+LD = gcc-cris -mlinux -march=v32 -nostdlib
-+LDFLAGS = -T $(obj)/rescue.ld
-+LDPOSTFLAGS = -lgcc
- OBJCOPY = objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
--
--all: $(target)/rescue.bin
--
--rescue: rescue.bin
-- # do nothing
--
--$(target)/rescue.bin: $(target) $(target)/head.o
-- $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o
-- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
-- cp -p $(target)/rescue.bin $(objtree)
--
--$(target):
-- mkdir -p $(target)
--
--$(target)/head.o: $(src)/head.S
-- $(CC) -D__ASSEMBLY__ -c $< -o $*.o
--
--clean:
-- rm -f $(target)/*.o $(target)/*.bin
--
--fastdep:
--
--modules:
--
--modules-install:
-+obj-y = head.o bootload.o crisv32_nand.o nand_base.o nand_ids.o nand_ecc.o \
-+ lib.o
-+OBJECTS = $(obj)/head.o $(obj)/bootload.o \
-+ $(obj)/crisv32_nand.o $(obj)/nand_base.o \
-+ $(obj)/nand_ids.o $(obj)/nand_ecc.o \
-+ $(obj)/lib.o $(obj)/../../lib/lib.a
-+
-+targets := rescue.o rescue.bin
-+
-+quiet_cmd_ldlibgcc = LD $@
-+cmd_ldlibgcc = $(LD) $(LDFLAGS) $(filter-out FORCE,$^) $(LDPOSTFLAGS) -o $@
-+
-+$(obj)/rescue.o: $(OBJECTS) FORCE
-+ $(call if_changed,ldlibgcc)
-+
-+$(obj)/rescue.bin: $(obj)/rescue.o FORCE
-+ $(call if_changed,objcopy)
-+ cp -p $(obj)/rescue.bin $(objtree)
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/bootload.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/bootload.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/bootload.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/bootload.c 2006-11-28 11:05:39.000000000 +0100
-@@ -0,0 +1,277 @@
-+/*
-+ * bootload.c
-+ * Simple boot loader for NAND chips on Etrax FS
-+ *
-+ * $Id: bootload.c,v 1.8 2006/11/28 10:05:39 ricardw Exp $
-+ *
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+
-+#include "mtd.h"
-+#include "nand.h"
-+
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/pinmux_defs.h>
-+
-+#include "lib.h"
-+
-+#define BOOT_ADDR (CONFIG_ETRAX_PTABLE_SECTOR + 0x40200000)
-+
-+/* bits for nand_rw() `cmd'; or together as needed */
-+
-+#define NANDRW_READ 0x01
-+#define NANDRW_WRITE 0x00
-+#define NANDRW_JFFS2 0x02
-+#define NANDRW_JFFS2_SKIP 0x04
-+
-+#define ROUND_DOWN(value, boundary) ((value) & (~((boundary)-1)))
-+
-+/* set $r8 to RAM_INIT_MAGIC, $r12 to NAND_BOOT_MAGIC then jump */
-+#define BOOT(addr) __asm__ volatile (" \
-+ move.d 0x56902387, $r8\n\
-+ move.d 0x9A9DB001, $r12\n\
-+ jump %0\n\
-+ nop\n\
-+ " : : "r" (addr))
-+
-+#define D(x)
-+
-+extern struct mtd_info *crisv32_nand_flash_probe(void);
-+
-+extern int _end, _bss, _edata;
-+
-+/*
-+ * NAND read/write from U-Boot 1.4.4
-+ * Modified for newer mtd and use of mtd interface instead of nand directly.
-+ *
-+ * cmd: 0: NANDRW_WRITE write, fail on bad block
-+ * 1: NANDRW_READ read, fail on bad block
-+ * 2: NANDRW_WRITE | NANDRW_JFFS2 write, skip bad blocks
-+ * 3: NANDRW_READ | NANDRW_JFFS2 read, data all 0xff for bad blocks
-+ * 7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
-+ */
-+static int
-+nand_rw (struct mtd_info* mtd, int cmd,
-+ size_t start, size_t len,
-+ size_t *retlen, u_char * buf)
-+{
-+ int ret = 0, n, total = 0;
-+
-+ /* eblk (once set) is the start of the erase block containing the
-+ * data being processed.
-+ */
-+ size_t eblk = ~0; /* force mismatch on first pass */
-+ size_t erasesize = mtd->erasesize;
-+
-+ while (len) {
-+ if ((start & (-erasesize)) != eblk) {
-+ /* have crossed into new erase block, deal with
-+ * it if it is marked bad.
-+ */
-+ eblk = start & (-erasesize); /* start of block */
-+ D(
-+ puts("New block ");
-+ putx(eblk);
-+ putnl();
-+ )
-+ if (mtd->block_isbad(mtd, eblk)) {
-+ if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
-+ while (len > 0 &&
-+ start - eblk < erasesize) {
-+ *(buf++) = 0xff;
-+ ++start;
-+ ++total;
-+ --len;
-+ }
-+ continue;
-+ } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
-+ start += erasesize;
-+ continue;
-+ } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
-+ /* skip bad block */
-+ start += erasesize;
-+ continue;
-+ } else {
-+ ret = 1;
-+ break;
-+ }
-+ }
-+ }
-+ /* The ECC will not be calculated correctly if
-+ less than 512 is written or read */
-+ /* Is request at least 512 bytes AND it starts on a proper boundry */
-+ if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
-+ puts("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\r\n");
-+
-+#if 0
-+ buf = (void *) 0x38008000; /* to fixed address, for testing */
-+#endif
-+
-+ if (cmd & NANDRW_READ) {
-+ ret = mtd->read_ecc(mtd, start,
-+ min(len, eblk + erasesize - start),
-+ (size_t *)&n, (u_char*)buf,
-+ NULL, NULL);
-+ } else {
-+ ret = mtd->write_ecc(mtd, start,
-+ min(len, eblk + erasesize - start),
-+ (size_t *)&n, (u_char*)buf,
-+ NULL, NULL);
-+ }
-+
-+ if (ret) {
-+ break;
-+ }
-+
-+ start += n;
-+ buf += n;
-+ total += n;
-+ len -= n;
-+ }
-+ if (retlen)
-+ *retlen = total;
-+
-+ return ret;
-+}
-+
-+
-+void
-+bootload()
-+{
-+ char revision;
-+ struct mtd_info *mtd;
-+
-+ serial_init();
-+
-+ __asm__ volatile ("move $vr,%0" : "=rm" (revision));
-+ if (revision < 32)
-+ {
-+ puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
-+ while(1);
-+ }
-+
-+ puts("\r\n\nETRAX FS NAND boot loader\r\n");
-+ puts("=========================\r\n");
-+ puts("Rev 1, " __DATE__ " " __TIME__ "\r\n");
-+
-+ puts("CPU revision: ");
-+ putx(revision);
-+ putnl();
-+
-+ puts("Bootloader main at ") ;
-+ putx((int) bootload);
-+ putnl();
-+
-+ puts("Data end: ");
-+ putx((long) &_edata);
-+ putnl();
-+
-+ puts("Bss: ");
-+ putx((long) &_bss);
-+ putnl();
-+
-+ puts("Heap: ");
-+ putx((long) &_end);
-+ putnl();
-+
-+#if 0 /* loop calibration */
-+ volatile int i;
-+ puts ("10000 loops...");
-+ for (i = 0; i < 10000; i++)
-+ udelay(1000);
-+ puts("done\r\n");
-+#endif
-+
-+ puts("Identifying nand chip...\r\n");
-+ mtd = crisv32_nand_flash_probe();
-+ puts("Done.\r\n");
-+
-+ if (mtd) {
-+ puts("Chip identified. ");
-+#if 0 /* print chip parameters */
-+ if (mtd->name)
-+ puts(mtd->name);
-+
-+ puts("\r\ntype: ");
-+ putx(mtd->type);
-+ puts("\r\nflags: ");
-+ putx(mtd->flags);
-+ puts("\r\nsize: ");
-+ putx(mtd->size);
-+ puts("\r\nerasesize: ");
-+ putx(mtd->erasesize);
-+ puts("\r\noobblock: ");
-+ putx(mtd->oobblock);
-+ puts("\r\noobsize: ");
-+ putx(mtd->oobsize);
-+ puts("\r\necctype: ");
-+ putx(mtd->ecctype);
-+ puts("\r\neccsize: ");
-+ putx(mtd->eccsize);
-+#endif
-+ putnl();
-+
-+ puts("Bad blocks:\r\n");
-+
-+ int i;
-+ for (i = 0; i < mtd->size; i += mtd->erasesize) {
-+ if (mtd->block_isbad(mtd, i)) {
-+ putx(i);
-+ putnl();
-+ }
-+ }
-+
-+#if 0 /* print oob parameters */
-+ puts("Oob info:\r\n");
-+ puts("useecc: ");
-+ putx(mtd->oobinfo.useecc);
-+ puts("\r\neccbytes: ");
-+ putx(mtd->oobinfo.eccbytes);
-+ puts("\r\neccpos: ");
-+ for (i = 0; i < mtd->oobinfo.eccbytes; i++) {
-+ putx(mtd->oobinfo.eccpos[i]);
-+ putc(' ');
-+ }
-+ putnl();
-+#endif
-+
-+ puts("Bootload in progress...");
-+ int res, copied;
-+ res = nand_rw(mtd,
-+ NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
-+ CONFIG_ETRAX_PTABLE_SECTOR,
-+ 0x200000, /* 2 megs */
-+ &copied,
-+ (void *) BOOT_ADDR);
-+
-+ puts("complete, status ");
-+ putx(res);
-+ puts(", loaded ");
-+ putx(copied);
-+ puts(" bytes\r\n");
-+#if 1
-+ puts("Data in DRAM:\r\n");
-+ putx(* (int *) (BOOT_ADDR + 0));
-+ putc(' ');
-+ putx(* (int *) (BOOT_ADDR + 4));
-+ putc(' ');
-+ putx(* (int *) (BOOT_ADDR + 8));
-+ putnl();
-+#endif
-+
-+ if (res)
-+ error("Corrupt data in NAND flash.");
-+ else
-+ {
-+ puts("Booting...\r\n");
-+ BOOT(BOOT_ADDR);
-+ }
-+ } else
-+ error("No NAND flash chip found to boot from.");
-+
-+ while (1)
-+ ; /* hang around until hell freezes over */
-+}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/crisv32_nand.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/crisv32_nand.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/crisv32_nand.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/crisv32_nand.c 2006-11-21 15:40:02.000000000 +0100
-@@ -0,0 +1,157 @@
-+/*
-+ * Taken from arch/cris/arch-v32/drivers/nandflash.c
-+ * and modified to use for boot loader.
-+ *
-+ * Copyright (c) 2004
-+ *
-+ * Derived from drivers/mtd/nand/spia.c
-+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
-+ *
-+ * $Id: crisv32_nand.c,v 1.2 2006/11/21 14:40:02 ricardw Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include "mtd.h"
-+#include "nand.h"
-+
-+#if 0
-+#include <linux/mtd/partitions.h>
-+#endif
-+
-+#if 0
-+#include <asm/arch/memmap.h>
-+#endif
-+
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/gio_defs.h>
-+#include <asm/arch/hwregs/bif_core_defs.h>
-+
-+#include "lib.h"
-+
-+/* Hardware */
-+
-+#define CE_BIT 4
-+#define CLE_BIT 5
-+#define ALE_BIT 6
-+#define BY_BIT 7
-+
-+#define NAND_RD_ADDR 0x90000000 /* read address */
-+#define NAND_WR_ADDR 0x94000000 /* write address */
-+
-+static struct mtd_info *crisv32_mtd = NULL;
-+
-+/*
-+ * hardware specific access to control-lines
-+ */
-+static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd)
-+{
-+ unsigned long flags;
-+ reg_gio_rw_pa_dout dout = REG_RD(gio, regi_gio, rw_pa_dout);
-+
-+ switch(cmd){
-+ case NAND_CTL_SETCLE:
-+ dout.data |= (1<<CLE_BIT);
-+ break;
-+ case NAND_CTL_CLRCLE:
-+ dout.data &= ~(1<<CLE_BIT);
-+ break;
-+ case NAND_CTL_SETALE:
-+ dout.data |= (1<<ALE_BIT);
-+ break;
-+ case NAND_CTL_CLRALE:
-+ dout.data &= ~(1<<ALE_BIT);
-+ break;
-+ case NAND_CTL_SETNCE:
-+ dout.data &= ~(1<<CE_BIT);
-+ break;
-+ case NAND_CTL_CLRNCE:
-+ dout.data |= (1<<CE_BIT);
-+ break;
-+ }
-+ REG_WR(gio, regi_gio, rw_pa_dout, dout);
-+#if 0
-+ /* read from gpio reg to flush pipeline.
-+ * doesn't seem to be necessary.
-+ */
-+ (void) REG_RD(gio, regi_gio, rw_pa_dout); /* gpio sync */
-+#endif
-+}
-+
-+/*
-+ * read device ready pin
-+ */
-+int crisv32_device_ready(struct mtd_info *mtd)
-+{
-+ reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din);
-+ return ((din.data & (1 << BY_BIT)) >> BY_BIT);
-+}
-+
-+/*
-+ * Main initialization routine
-+ */
-+struct mtd_info* crisv32_nand_flash_probe (void)
-+{
-+ reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, rw_grp3_cfg);
-+ reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe);
-+ struct nand_chip *this;
-+ int err = 0;
-+
-+ /* Allocate memory for MTD device structure and private data */
-+ crisv32_mtd = malloc (sizeof(struct mtd_info) + sizeof (struct nand_chip));
-+ if (!crisv32_mtd) {
-+ puts ("Unable to allocate CRISv32 NAND MTD device structure.\r\n");
-+ err = -ENOMEM;
-+ return NULL;
-+ }
-+
-+ /* Get pointer to private data */
-+ this = (struct nand_chip *) (&crisv32_mtd[1]);
-+
-+ pa_oe.oe |= 1 << CE_BIT;
-+ pa_oe.oe |= 1 << ALE_BIT;
-+ pa_oe.oe |= 1 << CLE_BIT;
-+ pa_oe.oe &= ~ (1 << BY_BIT);
-+ REG_WR(gio, regi_gio, rw_pa_oe, pa_oe);
-+
-+ bif_cfg.gated_csp0 = regk_bif_core_rd;
-+ bif_cfg.gated_csp1 = regk_bif_core_wr;
-+ REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
-+
-+ /* Initialize structures */
-+ memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
-+ memset((char *) this, 0, sizeof(struct nand_chip));
-+
-+ /* Link the private data with the MTD structure */
-+ crisv32_mtd->priv = this;
-+
-+ /* Set address of NAND IO lines */
-+ this->IO_ADDR_R = (void *) NAND_RD_ADDR;
-+ this->IO_ADDR_W = (void *) NAND_WR_ADDR;
-+ this->hwcontrol = crisv32_hwcontrol;
-+ this->dev_ready = crisv32_device_ready;
-+ /* 20 us command delay time */
-+ this->chip_delay = 20;
-+ this->eccmode = NAND_ECC_SOFT;
-+
-+#if 0 /* don't use BBT in boot loader */
-+ /* Enable the following for a flash based bad block table */
-+ this->options = NAND_USE_FLASH_BBT;
-+#endif
-+ /* don't scan for BBT */
-+ this->options = NAND_SKIP_BBTSCAN;
-+
-+ /* Scan to find existance of the device */
-+ if (nand_scan (crisv32_mtd, 1)) {
-+ err = -ENXIO;
-+ puts ("nand_scan failed\r\n");
-+ free (crisv32_mtd);
-+ return NULL;
-+ }
-+
-+ return crisv32_mtd;
-+}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/head.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/head.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/head.S 2007-01-31 16:52:19.000000000 +0100
-@@ -1,14 +1,85 @@
--/* $Id: head.S,v 1.4 2004/11/01 16:10:28 starvik Exp $
-- *
-- * This used to be the rescue code but now that is handled by the
-- * RedBoot based RFL instead. Nothing to see here, move along.
-+/* $Id: head.S,v 1.16 2007/01/31 15:52:19 pkj Exp $
-+ *
-+ * Simple boot loader which can also handle NAND chips.
- */
-
--#include <asm/arch/hwregs/reg_map_asm.h>
--#include <asm/arch/hwregs/config_defs_asm.h>
-+#include <asm/arch/hwregs/asm/reg_map_asm.h>
-+#include <asm/arch/hwregs/asm/config_defs_asm.h>
-+
-+#define RAM_INIT_MAGIC 0x56902387
-+#define NAND_BOOT_MAGIC 0x9A9DB001
-+
-+;; Debugging. Normally all these are set to 0.
-+#define LEDS (0)
-+#define LEDTEST (0)
-+#define FLASH_LEDS_INSTEAD_OF_BOOT (0)
-+#define SERIAL_DUMP (0)
-+#define SERIAL_PORT (0)
-+#define SERIAL_RECEIVE (0)
-+
-+#if LEDS
-+#include <asm/arch/hwregs/asm/gio_defs_asm.h>
-+#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
-+#include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
-+#endif
-+
-+#if SERIAL_DUMP
-+#include <asm/arch/hwregs/asm/ser_defs_asm.h>
-+#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
-+#endif
-+
-+
-+#if (SERIAL_PORT == 0)
-+#define regi_serial regi_ser0
-+#endif
-+#if (SERIAL_PORT == 1)
-+#define regi_serial regi_ser1
-+#endif
-+
-+;; Macros
-+
-+#if LEDS
-+.macro SAY x
-+ orq 31, $r9
-+ and.d ~(\x), $r9
-+ move.d $r9, [$r8]
-+.endm
-+#else
-+.macro SAY x
-+ ;; nothing
-+.endm
-+#endif
-+
-+#if SERIAL_DUMP
-+.macro DISPLAY x
-+ move.d \x, $r6 ; save value
-+ moveq 28, $r5 ; counter / shift amount
-+8:
-+ move.d $r6, $r3 ; fetch value
-+ bsr nybbleout
-+ lsr.d $r5, $r3 ; shift nybble we want (delay slot)
-+ subq 4, $r5 ; count down bits
-+ bpl 8b ; loop
-+ nop
-+ bsr serout
-+ moveq 13, $r3 ; delay slot
-+ bsr serout
-+ moveq 10, $r3 ; delay slot
-+.endm
-+#else
-+.macro DISPLAY x
-+ ;; nothing
-+.endm
-+#endif
-+
-+
-+;; Code
-
- .text
-+start:
-
-+ ;; TODO: Add code for Ronny's search-for-good-block boot rom algorithm
-+
- ;; Start clocks for used blocks.
- move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
- move.d [$r1], $r0
-@@ -17,22 +88,258 @@
- REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
- move.d $r0, [$r1]
-
-- ;; Copy 68KB NAND flash to Internal RAM (if NAND boot)
-- move.d 0x38004000, $r10
-- move.d 0x8000, $r11
-- move.d 0x11000, $r12
-- move.d copy_complete, $r13
-- and.d 0x000fffff, $r13
-- or.d 0x38000000, $r13
-+
-+#if LEDS
-+ ;; set up for led control on PB 0..4
-+ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r8 ; output reg
-+ move.d [$r8], $r9 ; shadow
-+
-+ ;; set up pinmux
-+ move.d REG_ADDR(pinmux, regi_pinmux, rw_pb_gio), $r2
-+ move.d [$r2], $r3
-+ orq 31, $r3
-+ move.d $r3, [$r2]
-+
-+ ;; set up GPIO
-+ ;; set to outputs
-+ move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r2
-+ move.d [$r2], $r3
-+ orq 31, $r3
-+ move.d $r3, [$r2]
-+
-+
-+#if LEDTEST
-+ ;; led test
-+
-+ moveq 0, $r1 ; led 5-bit binary counter
-+1:
-+ or.d 31, $r9
-+ xor $r1, $r9
-+ move.d $r9, [$r8]
-+ addq 1, $r1
-+
-+ move.d 100000000, $r2 ; delay loop (100e6 => 1s @200Mc)
-+2:
-+ bne 2b
-+ subq 1, $r2
-+
-+ ba 1b ; loop
-+ nop
-+#endif
-+
-+#endif
-+
-+
-+check_nand_boot:
-+ ;; Check boot source by checking highest nybble of PC:
-+ ;; If we're running at address 0x0XXXXXXX, we're in flash/eprom/sram
-+ ;; If we're running at address 0x38000000, we're in internal RAM,
-+ ;; so we're most likely coming from NAND.
-+ ;; If we're running at address 0x40000000, we're in SDRAM,
-+ ;; so we've most likely been started by some sort of bootstrapper
-+ ;; e.g. fsboot, which in turn implies NAND, else we would be booting
-+ ;; normally at 0x0XXXXXXX
-+
-+ SAY 1
-+
-+here:
-+ lapcq ., $r0 ; get PC
-+ sub.d (here-start), $r0 ; offset from here
-+ beq normal_boot ; running at address 0 - normal boot
-+ move.d $r0, $r13 ; save offset for later (unused delay slot)
-+ lsrq 28, $r0 ; get highest nybble
-+
-+ SAY 2
-+
-+ ;; Prepare to copy 128KB of the NAND flash to internal RAM
-+ move.d 0x38000200, $r10 ; dest in internal RAM
-+ move.d 0x1fe00, $r12 ; #bytes
-+ cmpq 4, $r0 ; running in RAM => started by fsboot
-+ bhs copy_from_ram
-+ movu.w 0x0200, $r11 ; source in flash (byte address) (DELAY SLOT)
-
- #include "../../lib/nand_init.S"
-
-- ;; No NAND found
-+#if LEDS
-+ ;; must set up registers again (clobbered by nand_init)
-+ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r8 ; output reg
-+ move.d [$r8], $r9 ; shadow
-+#endif
-+
-+ SAY 3
-+
-+ ba copy_complete
-+ nop
-+
-+ ; Since the code above has to reside within the first 256 bytes of
-+ ; NAND flash, verify that the code so far hasn't gone past this
-+ ; limit. If you're considering removing this, you haven't
-+ ; properly understood the problem; see nand_init.S for details.
-+ .org PAGE_SIZE_ADDRESSES ; from nand_init.S
-+ .org PAGE_SIZE_BYTES ; from nand_init.S
-+
-+normal_boot:
-+ SAY 4
-+
-+ ;; Normal NOR boot
- move.d CONFIG_ETRAX_PTABLE_SECTOR, $r10
-- jump $r10 ; Jump to decompresser
-+ jump $r10 ; Jump to decompresser
-+ nop
-+
-+copy_from_ram:
-+ add.d $r13, $r11 ; mem offs + src offs -> src addr
-+1:
-+ move.d [$r11+], $r0 ; read source
-+ subq 4, $r12 ; 4 bytes at a time
-+ bne 1b ; loop until done
-+ move.d $r0, [$r10+] ; write dest (DELAY SLOT)
-+ jump copy_complete ; jump to internal RAM
-+ nop ; delay slot
-+
-+copy_complete:
-+ SAY 5
-+
-+#if FLASH_LEDS_INSTEAD_OF_BOOT
-+
-+flash:
-+
-+ ;; led test
-+
-+ moveq 0, $r1 ; led binary counter
-+1:
-+ or.d 31, $r9
-+ xor $r1, $r9
-+ move.d $r9, [$r8]
-+ addq 1, $r1
-+
-+ move.d 100000000, $r2 ; delay loop (100e6 => 1s)
-+2:
-+ bne 2b
-+ subq 1, $r2
-+
-+ ba 1b ; loop forever
- nop
-+#endif
-
--copy_complete:
-- move.d 0x38000000 + CONFIG_ETRAX_PTABLE_SECTOR, $r10
-- jump $r10 ; Jump to decompresser
-+
-+#if SERIAL_DUMP
-+ ;; dump memory to serial port
-+
-+#if (SERIAL_PORT == 1)
-+ ;; set up serial-1 pins
-+ move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
-+ move.d [$r1], $r0
-+ or.d REG_STATE(pinmux, rw_hwprot, ser1, yes), $r0
-+ move.d $r0, [$r1]
-+#endif
-+
-+ ;; rw_xoff: chr and automatic = 0
-+ move.d REG_ADDR(ser, regi_serial, rw_xoff), $r1
-+ move.d [$r1], $r0
-+ and.d ~(REG_MASK(ser, rw_xoff, automatic) | REG_MASK(ser, rw_xoff, chr)), $r0
-+ move.d $r0, [$r1]
-+
-+ ;; tr control
-+ move.d REG_ADDR(ser, regi_serial, rw_tr_ctrl), $r1
-+ move.d [$r1], $r0
-+ and.d ~(REG_MASK(ser, rw_tr_ctrl, base_freq) | REG_MASK(ser, rw_tr_ctrl, stop_bits)), $r0
-+ or.d REG_STATE(ser, rw_tr_ctrl, stop_bits, bits2) | REG_STATE(ser, rw_tr_ctrl, base_freq, f29_493) | REG_STATE(ser, rw_tr_ctrl, en, yes), $r0
-+ move.d $r0, [$r1]
-+
-+ ;; tr baud
-+ move.d REG_ADDR(ser, regi_serial, rw_tr_baud_div), $r1
-+ move.d [$r1], $r0
-+ move.w (29493000 / 8) / 115200, $r0
-+ move.d $r0, [$r1]
-+
-+#if SERIAL_RECEIVE
-+ ;; rec control
-+ move.d REG_ADDR(ser, regi_serial, rw_rec_ctrl), $r1
-+ move.d [$r1], $r0
-+ and.d ~(REG_MASK(ser, rw_rec_ctrl, base_freq)), $r0
-+ or.d REG_STATE(ser, rw_rec_ctrl, base_freq, f29_493) | REG_STATE(ser, rw_tr_ctrl, en, yes), $r0
-+ move.d $r0, [$r1]
-+
-+ ;; rec baud
-+ move.d REG_ADDR(ser, regi_serial, rw_rec_baud_div), $r1
-+ move.d [$r1], $r0
-+ move.w (29493000 / 8) / 115200, $r0
-+ move.d $r0, [$r1]
-+#endif
-+
-+ ;; dump memory
-+
-+ move.d 0x38000000, $r5 ; pointer
-+
-+ bsr serout
-+ moveq 13, $r3
-+ bsr serout
-+ moveq 10, $r3
-+ bsr serout
-+ moveq 10, $r3
-+
-+1:
-+ movu.b [$r5+], $r3 ; get value
-+ move.d $r3, $r6 ; save
-+
-+ bsr nybbleout
-+ lsrq 4, $r3 ; high nybble (delay slot)
-+
-+ move.d $r6, $r3 ; restore
-+ bsr nybbleout
-+ andq 15, $r3 ; delay slot
-+
-+ movu.b 32, $r3
-+ bsr serout
- nop
-+
-+ move.d $r5, $r3
-+ andq 15, $r3
-+ bne 1b
-+ nop
-+
-+ bsr serout
-+ moveq 13, $r3 ; delay slot
-+ bsr serout
-+ moveq 10, $r3 ; delay slot
-+
-+ ba 1b ; loop forever
-+ nop
-+
-+nybbleout:
-+ cmpq 10, $r3
-+ blo 1f
-+ addq 48, $r3 ; delay slot
-+ addq 7, $r3
-+1:
-+serout:
-+ move.d REG_ADDR(ser, regi_serial, rs_stat_din), $r1
-+ move.d REG_ADDR(ser, regi_serial, rw_dout), $r2
-+2:
-+ move.d [$r1], $r4
-+ btstq REG_BIT(ser, rs_stat_din, tr_rdy), $r4
-+ bpl 2b
-+ nop
-+ ret
-+ move.d $r3, [$r2] ; delay slot
-+
-+#endif
-+
-+;; Init DRAM
-+
-+#include "../../lib/dram_init.S"
-+ move.d RAM_INIT_MAGIC, $r8 ; tell kernel boot loader dram init'd
-+ move.d NAND_BOOT_MAGIC, $r12 ; booted from NAND flash
-+
-+;; TODO: Clear .bss (not needed yet because size of .bss is zero)
-+;; TODO: Change .ld script so that BSS is in DRAM?
-+
-+;; Ok, time to do something. Continue with boot loader in C.
-+;; Must set up minimal C environment first though.
-+
-+ move.d 0x38020000, $sp ; stack pointer at top of internal RAM
-+
-+ move.d bootload, $r10
-+ jump $r10 ; Jump to boot loader
-+ nop
-+
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.c 2006-11-03 11:35:52.000000000 +0100
-@@ -0,0 +1,243 @@
-+/*
-+ * lib.c
-+ * Small practical functions for boot loader
-+ * malloc/free
-+ * memcpy/memset
-+ * writeb/writew/readb/readw
-+ * putc/puts/putnybble/putx
-+ * error/error2/BUG
-+ * serial_init
-+ *
-+ * $Id: lib.c,v 1.4 2006/11/03 10:35:52 pkj Exp $
-+ *
-+ */
-+
-+#include <linux/types.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/ser_defs.h>
-+#include <asm/arch/hwregs/pinmux_defs.h>
-+
-+#include "lib.h"
-+
-+/* the "heap" is put directly after BSS ends, at _end */
-+
-+extern int _end;
-+static long free_mem_ptr = (long)&_end;
-+
-+void *malloc(int size)
-+{
-+ void *p;
-+
-+ if (size <0) error("Malloc error");
-+
-+ free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
-+
-+ p = (void *)free_mem_ptr;
-+ free_mem_ptr += size;
-+
-+ return p;
-+}
-+
-+void free(void *where)
-+{ /* Don't care */
-+}
-+
-+/* I/O */
-+
-+unsigned char readb(const volatile void *addr)
-+{
-+ return *(volatile unsigned char *) addr;
-+}
-+
-+unsigned short readw(const volatile void *addr)
-+{
-+ return *(volatile unsigned short *) addr;
-+}
-+
-+void writeb(unsigned char b, volatile void *addr)
-+{
-+ *(volatile unsigned char *) addr = b;
-+}
-+
-+void writew(unsigned short b, volatile void *addr)
-+{
-+ *(volatile unsigned short *) addr = b;
-+}
-+
-+/* info and error messages to serial console */
-+
-+#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
-+static inline void
-+serout(const char c, reg_scope_instances regi_ser)
-+{
-+ reg_ser_rs_stat_din rs;
-+ reg_ser_rw_dout dout = {.data = c};
-+
-+ do {
-+ rs = REG_RD(ser, regi_ser, rs_stat_din);
-+ }
-+ while (!rs.tr_rdy);/* Wait for tranceiver. */
-+
-+ REG_WR(ser, regi_ser, rw_dout, dout);
-+}
-+
-+
-+void
-+putc(const char c)
-+{
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ serout(c, regi_ser0);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT1
-+ serout(c, regi_ser1);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT2
-+ serout(c, regi_ser2);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT3
-+ serout(c, regi_ser3);
-+#endif
-+}
-+
-+
-+void
-+puts(const char *s)
-+{
-+ while (*s)
-+ putc(*s++);
-+}
-+
-+void
-+putnybble(int n)
-+{
-+ putc("0123456789abcdef"[n & 15]);
-+}
-+
-+void
-+putx(int x)
-+{
-+ int i;
-+
-+ puts("0x");
-+ for (i = 7; i >= 0; i--)
-+ putnybble(x >> 4*i);
-+}
-+
-+void
-+putnl()
-+{
-+ puts("\r\n");
-+}
-+
-+#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
-+
-+void*
-+memset(void* s, int c, size_t n)
-+{
-+ int i;
-+ char *ss = (char*)s;
-+
-+ for (i=0;i<n;i++) ss[i] = c;
-+}
-+
-+void*
-+memcpy(void* __dest, __const void* __src,
-+ size_t __n)
-+{
-+ int i;
-+ char *d = (char *)__dest, *s = (char *)__src;
-+
-+ for (i=0;i<__n;i++) d[i] = s[i];
-+}
-+
-+void
-+error(const char *x)
-+{
-+ puts("\r\n\n");
-+ puts(x);
-+ puts("\r\n\n -- System halted\n");
-+
-+ while(1); /* Halt */
-+}
-+
-+void
-+error2(const char *x, int y, const char *z)
-+{
-+ puts("\r\n\n");
-+ puts(x);
-+ putc(':');
-+ putx(y);
-+ putc(':');
-+ puts(z);
-+ puts("\r\n\n -- System halted\n");
-+
-+ while(1); /* Halt */
-+}
-+
-+static inline void
-+serial_setup(reg_scope_instances regi_ser)
-+{
-+ reg_ser_rw_xoff xoff;
-+ reg_ser_rw_tr_ctrl tr_ctrl;
-+ reg_ser_rw_rec_ctrl rec_ctrl;
-+ reg_ser_rw_tr_baud_div tr_baud;
-+ reg_ser_rw_rec_baud_div rec_baud;
-+
-+ /* Turn off XOFF. */
-+ xoff = REG_RD(ser, regi_ser, rw_xoff);
-+
-+ xoff.chr = 0;
-+ xoff.automatic = regk_ser_no;
-+
-+ REG_WR(ser, regi_ser, rw_xoff, xoff);
-+
-+ /* Set baudrate and stopbits. */
-+ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
-+ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
-+ tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
-+ rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
-+
-+ tr_ctrl.stop_bits = 1; /* 2 stop bits. */
-+ tr_ctrl.en = 1; /* enable transmitter */
-+ rec_ctrl.en = 1; /* enabler receiver */
-+
-+ /*
-+ * The baudrate setup used to be a bit fishy, but now transmitter and
-+ * receiver are both set to the intended baud rate, 115200.
-+ * The magic value is 29.493 MHz.
-+ */
-+ tr_ctrl.base_freq = regk_ser_f29_493;
-+ rec_ctrl.base_freq = regk_ser_f29_493;
-+ tr_baud.div = (29493000 / 8) / 115200;
-+ rec_baud.div = (29493000 / 8) / 115200;
-+
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
-+ REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
-+ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
-+ REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
-+}
-+
-+void
-+serial_init()
-+{
-+ reg_pinmux_rw_hwprot hwprot;
-+
-+ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ serial_setup(regi_ser0);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT1
-+ hwprot.ser1 = regk_pinmux_yes;
-+ serial_setup(regi_ser1);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT2
-+ hwprot.ser2 = regk_pinmux_yes;
-+ serial_setup(regi_ser2);
-+#endif
-+#ifdef CONFIG_ETRAX_DEBUG_PORT3
-+ hwprot.ser3 = regk_pinmux_yes;
-+ serial_setup(regi_ser3);
-+#endif
-+ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
-+}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.h 2006-11-03 11:35:52.000000000 +0100
-@@ -0,0 +1,56 @@
-+/*
-+ * lib.c
-+ * Small practical functions for boot loader
-+ * malloc/free
-+ * memset/memcpy
-+ * putc/puts/putnybble/putd
-+ * writeb/writew/readb/readw
-+ * error/error2/BUG
-+ * serial_init
-+ *
-+ * $Id: lib.h,v 1.3 2006/11/03 10:35:52 pkj Exp $
-+ *
-+ */
-+
-+#ifndef _LIB_H
-+#define _LIB_H
-+
-+#include <linux/types.h>
-+
-+/* nice stuff we need without having any library around */
-+
-+void* memset(void* s, int c, size_t n);
-+void* memcpy(void* __dest, __const void* __src,
-+ size_t __n);
-+
-+#define memzero(s, n) memset ((s), 0, (n))
-+
-+#undef BUG
-+#define BUG() error2("BUG in " __FILE__, __LINE__, __FUNCTION__)
-+
-+void *malloc(int size);
-+void free(void *where);
-+void error(const char *m);
-+void error2(const char *m, int l, const char *f);
-+void serial_init(void);
-+
-+#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
-+void putc(const char);
-+void puts(const char *);
-+void putnybble(int n);
-+void putx(int x);
-+void putnl();
-+#else
-+#define putc(ch)
-+#define puts(str)
-+#define putnybble(nyb)
-+#define putx(x)
-+#define putnl()
-+#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
-+
-+unsigned char readb(const volatile void *addr);
-+unsigned short readw(const volatile void *addr);
-+void writeb(unsigned char b, volatile void *addr);
-+void writew(unsigned short b, volatile void *addr);
-+
-+#endif /* _LIB_H */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd-abi.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd-abi.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd-abi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd-abi.h 2006-09-06 11:21:07.000000000 +0200
-@@ -0,0 +1,121 @@
-+/*
-+ * $Id: mtd-abi.h,v 1.1 2006/09/06 09:21:07 ricardw Exp $
-+ *
-+ * Portions of MTD ABI definition which are shared by kernel and user space
-+ */
-+
-+#ifndef __MTD_ABI_H__
-+#define __MTD_ABI_H__
-+
-+#ifndef __KERNEL__ /* Urgh. The whole point of splitting this out into
-+ separate files was to avoid #ifdef __KERNEL__ */
-+#define __user
-+#endif
-+
-+struct erase_info_user {
-+ uint32_t start;
-+ uint32_t length;
-+};
-+
-+struct mtd_oob_buf {
-+ uint32_t start;
-+ uint32_t length;
-+ unsigned char __user *ptr;
-+};
-+
-+#define MTD_ABSENT 0
-+#define MTD_RAM 1
-+#define MTD_ROM 2
-+#define MTD_NORFLASH 3
-+#define MTD_NANDFLASH 4
-+#define MTD_PEROM 5
-+#define MTD_DATAFLASH 6
-+#define MTD_OTHER 14
-+#define MTD_UNKNOWN 15
-+
-+#define MTD_CLEAR_BITS 1 // Bits can be cleared (flash)
-+#define MTD_SET_BITS 2 // Bits can be set
-+#define MTD_ERASEABLE 4 // Has an erase function
-+#define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible
-+#define MTD_VOLATILE 16 // Set for RAMs
-+#define MTD_XIP 32 // eXecute-In-Place possible
-+#define MTD_OOB 64 // Out-of-band data (NAND flash)
-+#define MTD_ECC 128 // Device capable of automatic ECC
-+#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed
-+#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions
-+
-+// Some common devices / combinations of capabilities
-+#define MTD_CAP_ROM 0
-+#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
-+#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
-+#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
-+#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
-+
-+
-+// Types of automatic ECC/Checksum available
-+#define MTD_ECC_NONE 0 // No automatic ECC available
-+#define MTD_ECC_RS_DiskOnChip 1 // Automatic ECC on DiskOnChip
-+#define MTD_ECC_SW 2 // SW ECC for Toshiba & Samsung devices
-+
-+/* ECC byte placement */
-+#define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended)
-+#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode)
-+#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme
-+#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
-+#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default
-+
-+/* OTP mode selection */
-+#define MTD_OTP_OFF 0
-+#define MTD_OTP_FACTORY 1
-+#define MTD_OTP_USER 2
-+
-+struct mtd_info_user {
-+ uint8_t type;
-+ uint32_t flags;
-+ uint32_t size; // Total size of the MTD
-+ uint32_t erasesize;
-+ uint32_t oobblock; // Size of OOB blocks (e.g. 512)
-+ uint32_t oobsize; // Amount of OOB data per block (e.g. 16)
-+ uint32_t ecctype;
-+ uint32_t eccsize;
-+};
-+
-+struct region_info_user {
-+ uint32_t offset; /* At which this region starts,
-+ * from the beginning of the MTD */
-+ uint32_t erasesize; /* For this region */
-+ uint32_t numblocks; /* Number of blocks in this region */
-+ uint32_t regionindex;
-+};
-+
-+struct otp_info {
-+ uint32_t start;
-+ uint32_t length;
-+ uint32_t locked;
-+};
-+
-+#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
-+#define MEMERASE _IOW('M', 2, struct erase_info_user)
-+#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
-+#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
-+#define MEMLOCK _IOW('M', 5, struct erase_info_user)
-+#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
-+#define MEMGETREGIONCOUNT _IOR('M', 7, int)
-+#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user)
-+#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo)
-+#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo)
-+#define MEMGETBADBLOCK _IOW('M', 11, loff_t)
-+#define MEMSETBADBLOCK _IOW('M', 12, loff_t)
-+#define OTPSELECT _IOR('M', 13, int)
-+#define OTPGETREGIONCOUNT _IOW('M', 14, int)
-+#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info)
-+#define OTPLOCK _IOR('M', 16, struct otp_info)
-+
-+struct nand_oobinfo {
-+ uint32_t useecc;
-+ uint32_t eccbytes;
-+ uint32_t oobfree[8][2];
-+ uint32_t eccpos[32];
-+};
-+
-+#endif /* __MTD_ABI_H__ */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd.h 2006-12-14 07:59:24.000000000 +0100
-@@ -0,0 +1,270 @@
-+/*
-+ * $Id: mtd.h,v 1.5 2006/12/14 06:59:24 ricardw Exp $
-+ *
-+ * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al.
-+ *
-+ * Released under GPL
-+ */
-+
-+#ifndef __MTD_MTD_H__
-+#define __MTD_MTD_H__
-+
-+#ifndef __KERNEL__
-+#error This is a kernel header. Perhaps include mtd-user.h instead?
-+#endif
-+
-+/* only include absolutely necessary linux headers which will not change
-+ * significantly
-+ */
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+
-+#if 0
-+#include <linux/module.h>
-+#include <linux/uio.h>
-+#include <linux/notifier.h>
-+
-+#include <linux/mtd/compatmac.h>
-+#include <mtd/mtd-abi.h>
-+#endif
-+
-+#include "mtd-abi.h"
-+
-+/* local config, we don't want linux/config.h here */
-+/* any undef/define pairs here avoid warnings due to linux autoconf includes */
-+#undef CONFIG_MTD_PARTITIONS
-+#undef CONFIG_MTD_DEBUG
-+#undef CONFIG_MTD_NAND_VERIFY_WRITE
-+#define CONFIG_MTD_NAND_VERIFY_WRITE
-+
-+/* our MTD config */
-+
-+#define NAND_BBT_SUPPORT 0
-+#define NAND_WRITE_SUPPORT 0
-+#define NAND_ERASE_SUPPORT 0
-+#define NAND_MULTICHIP_SUPPORT 0
-+#define NAND_HWECC_SUPPORT 0
-+#define NAND_KVEC_SUPPORT 0
-+
-+
-+#define MTD_CHAR_MAJOR 90
-+#define MTD_BLOCK_MAJOR 31
-+#define MAX_MTD_DEVICES 16
-+
-+#define MTD_ERASE_PENDING 0x01
-+#define MTD_ERASING 0x02
-+#define MTD_ERASE_SUSPEND 0x04
-+#define MTD_ERASE_DONE 0x08
-+#define MTD_ERASE_FAILED 0x10
-+
-+/* If the erase fails, fail_addr might indicate exactly which block failed. If
-+ fail_addr = 0xffffffff, the failure was not at the device level or was not
-+ specific to any particular block. */
-+struct erase_info {
-+ struct mtd_info *mtd;
-+ u_int32_t addr;
-+ u_int32_t len;
-+ u_int32_t fail_addr;
-+ u_long time;
-+ u_long retries;
-+ u_int dev;
-+ u_int cell;
-+ void (*callback) (struct erase_info *self);
-+ u_long priv;
-+ u_char state;
-+ struct erase_info *next;
-+};
-+
-+struct mtd_erase_region_info {
-+ u_int32_t offset; /* At which this region starts, from the beginning of the MTD */
-+ u_int32_t erasesize; /* For this region */
-+ u_int32_t numblocks; /* Number of blocks of erasesize in this region */
-+};
-+
-+struct mtd_info {
-+ u_char type;
-+ u_int32_t flags;
-+ u_int32_t size; // Total size of the MTD
-+
-+ /* "Major" erase size for the device. Naïve users may take this
-+ * to be the only erase size available, or may use the more detailed
-+ * information below if they desire
-+ */
-+ u_int32_t erasesize;
-+
-+ u_int32_t oobblock; // Size of OOB blocks (e.g. 512)
-+ u_int32_t oobsize; // Amount of OOB data per block (e.g. 16)
-+ u_int32_t ecctype;
-+ u_int32_t eccsize;
-+
-+ /*
-+ * Reuse some of the above unused fields in the case of NOR flash
-+ * with configurable programming regions to avoid modifying the
-+ * user visible structure layout/size. Only valid when the
-+ * MTD_PROGRAM_REGIONS flag is set.
-+ * (Maybe we should have an union for those?)
-+ */
-+#define MTD_PROGREGION_SIZE(mtd) (mtd)->oobblock
-+#define MTD_PROGREGION_CTRLMODE_VALID(mtd) (mtd)->oobsize
-+#define MTD_PROGREGION_CTRLMODE_INVALID(mtd) (mtd)->ecctype
-+
-+ // Kernel-only stuff starts here.
-+ char *name;
-+ int index;
-+
-+ // oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO)
-+ struct nand_oobinfo oobinfo;
-+ u_int32_t oobavail; // Number of bytes in OOB area available for fs
-+
-+ /* Data for variable erase regions. If numeraseregions is zero,
-+ * it means that the whole device has erasesize as given above.
-+ */
-+ int numeraseregions;
-+ struct mtd_erase_region_info *eraseregions;
-+
-+ /* This really shouldn't be here. It can go away in 2.5 */
-+ u_int32_t bank_size;
-+
-+ int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
-+
-+ /* This stuff for eXecute-In-Place */
-+ int (*point) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf);
-+
-+ /* We probably shouldn't allow XIP if the unpoint isn't a NULL */
-+ void (*unpoint) (struct mtd_info *mtd, u_char * addr, loff_t from, size_t len);
-+
-+
-+ int (*read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-+ int (*write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
-+
-+ int (*read_ecc) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
-+ int (*write_ecc) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
-+
-+ int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-+ int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
-+
-+ /*
-+ * Methods to access the protection register area, present in some
-+ * flash devices. The user data is one time programmable but the
-+ * factory data is read only.
-+ */
-+ int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
-+ int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-+ int (*get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
-+ int (*read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-+ int (*write_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-+ int (*lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len);
-+
-+#if NAND_KVEC_SUPPORT
-+ /* kvec-based read/write methods. We need these especially for NAND flash,
-+ with its limited number of write cycles per erase.
-+ NB: The 'count' parameter is the number of _vectors_, each of
-+ which contains an (ofs, len) tuple.
-+ */
-+ int (*readv) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen);
-+ int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from,
-+ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
-+ int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
-+ int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to,
-+ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
-+#endif
-+
-+ /* Sync */
-+ void (*sync) (struct mtd_info *mtd);
-+
-+ /* Chip-supported device locking */
-+ int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len);
-+ int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len);
-+
-+ /* Power Management functions */
-+ int (*suspend) (struct mtd_info *mtd);
-+ void (*resume) (struct mtd_info *mtd);
-+
-+ /* Bad block management functions */
-+ int (*block_isbad) (struct mtd_info *mtd, loff_t ofs);
-+ int (*block_markbad) (struct mtd_info *mtd, loff_t ofs);
-+
-+#if 0 /* don't know what this is for */
-+ struct notifier_block reboot_notifier; /* default mode before reboot */
-+#endif
-+
-+ void *priv;
-+
-+ struct module *owner;
-+ int usecount;
-+};
-+
-+#if 0 /* don't need these */
-+ /* Kernel-side ioctl definitions */
-+
-+extern int add_mtd_device(struct mtd_info *mtd);
-+extern int del_mtd_device (struct mtd_info *mtd);
-+
-+extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
-+
-+extern void put_mtd_device(struct mtd_info *mtd);
-+
-+
-+struct mtd_notifier {
-+ void (*add)(struct mtd_info *mtd);
-+ void (*remove)(struct mtd_info *mtd);
-+ struct list_head list;
-+};
-+
-+
-+extern void register_mtd_user (struct mtd_notifier *new);
-+extern int unregister_mtd_user (struct mtd_notifier *old);
-+#endif
-+
-+#if NAND_KVEC_SUPPORT
-+int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
-+ unsigned long count, loff_t to, size_t *retlen);
-+
-+int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
-+ unsigned long count, loff_t from, size_t *retlen);
-+#endif
-+
-+#define MTD_ERASE(mtd, args...) (*(mtd->erase))(mtd, args)
-+#define MTD_POINT(mtd, a,b,c,d) (*(mtd->point))(mtd, a,b,c, (u_char **)(d))
-+#define MTD_UNPOINT(mtd, arg) (*(mtd->unpoint))(mtd, (u_char *)arg)
-+#define MTD_READ(mtd, args...) (*(mtd->read))(mtd, args)
-+#define MTD_WRITE(mtd, args...) (*(mtd->write))(mtd, args)
-+#define MTD_READV(mtd, args...) (*(mtd->readv))(mtd, args)
-+#define MTD_WRITEV(mtd, args...) (*(mtd->writev))(mtd, args)
-+#define MTD_READECC(mtd, args...) (*(mtd->read_ecc))(mtd, args)
-+#define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args)
-+#define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args)
-+#define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args)
-+#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0)
-+
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+void mtd_erase_callback(struct erase_info *instr);
-+#else
-+static inline void mtd_erase_callback(struct erase_info *instr)
-+{
-+ if (instr->callback)
-+ instr->callback(instr);
-+}
-+#endif
-+
-+/*
-+ * Debugging macro and defines
-+ */
-+#define MTD_DEBUG_LEVEL0 (0) /* Quiet */
-+#define MTD_DEBUG_LEVEL1 (1) /* Audible */
-+#define MTD_DEBUG_LEVEL2 (2) /* Loud */
-+#define MTD_DEBUG_LEVEL3 (3) /* Noisy */
-+
-+#ifdef CONFIG_MTD_DEBUG
-+#define DEBUG(n, args...) \
-+ do { \
-+ if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
-+ printk(KERN_INFO args); \
-+ } while(0)
-+#else /* CONFIG_MTD_DEBUG */
-+#define DEBUG(n, args...) do { } while(0)
-+
-+#endif /* CONFIG_MTD_DEBUG */
-+
-+#endif /* __MTD_MTD_H__ */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand.h 2006-11-03 11:35:52.000000000 +0100
-@@ -0,0 +1,521 @@
-+/*
-+ * linux/include/linux/mtd/nand.h
-+ *
-+ * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
-+ * Steven J. Hill <sjhill@realitydiluted.com>
-+ * Thomas Gleixner <tglx@linutronix.de>
-+ *
-+ * $Id: nand.h,v 1.4 2006/11/03 10:35:52 pkj Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Info:
-+ * Contains standard defines and IDs for NAND flash devices
-+ *
-+ * Changelog:
-+ * 01-31-2000 DMW Created
-+ * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
-+ * so it can be used by other NAND flash device
-+ * drivers. I also changed the copyright since none
-+ * of the original contents of this file are specific
-+ * to DoC devices. David can whack me with a baseball
-+ * bat later if I did something naughty.
-+ * 10-11-2000 SJH Added private NAND flash structure for driver
-+ * 10-24-2000 SJH Added prototype for 'nand_scan' function
-+ * 10-29-2001 TG changed nand_chip structure to support
-+ * hardwarespecific function for accessing control lines
-+ * 02-21-2002 TG added support for different read/write adress and
-+ * ready/busy line access function
-+ * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
-+ * command delay times for different chips
-+ * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
-+ * defines in jffs2/wbuf.c
-+ * 08-07-2002 TG forced bad block location to byte 5 of OOB, even if
-+ * CONFIG_MTD_NAND_ECC_JFFS2 is not set
-+ * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
-+ *
-+ * 08-29-2002 tglx nand_chip structure: data_poi for selecting
-+ * internal / fs-driver buffer
-+ * support for 6byte/512byte hardware ECC
-+ * read_ecc, write_ecc extended for different oob-layout
-+ * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
-+ * NAND_YAFFS_OOB
-+ * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
-+ * Split manufacturer and device ID structures
-+ *
-+ * 02-08-2004 tglx added option field to nand structure for chip anomalities
-+ * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
-+ * update of nand_chip structure description
-+ * 01-17-2005 dmarlin added extended commands for AG-AND device and added option
-+ * for BBT_AUTO_REFRESH.
-+ * 01-20-2005 dmarlin added optional pointer to hardware specific callback for
-+ * extra error status checks.
-+ */
-+#ifndef __LINUX_MTD_NAND_H
-+#define __LINUX_MTD_NAND_H
-+
-+#if 0 /* avoid these as much as possible */
-+#include <linux/wait.h>
-+#include <linux/spinlock.h>
-+#include <linux/mtd/mtd.h>
-+#endif
-+
-+#include "mtd.h" /* local */
-+
-+#include <linux/kernel.h> /* we do need this though ... */
-+
-+struct mtd_info;
-+/* Scan and identify a NAND device */
-+extern int nand_scan (struct mtd_info *mtd, int max_chips);
-+/* Free resources held by the NAND device */
-+extern void nand_release (struct mtd_info *mtd);
-+
-+/* Read raw data from the device without ECC */
-+extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
-+
-+
-+/* The maximum number of NAND chips in an array */
-+#define NAND_MAX_CHIPS 8
-+
-+/* This constant declares the max. oobsize / page, which
-+ * is supported now. If you add a chip with bigger oobsize/page
-+ * adjust this accordingly.
-+ */
-+#define NAND_MAX_OOBSIZE 64
-+
-+/*
-+ * Constants for hardware specific CLE/ALE/NCE function
-+*/
-+/* Select the chip by setting nCE to low */
-+#define NAND_CTL_SETNCE 1
-+/* Deselect the chip by setting nCE to high */
-+#define NAND_CTL_CLRNCE 2
-+/* Select the command latch by setting CLE to high */
-+#define NAND_CTL_SETCLE 3
-+/* Deselect the command latch by setting CLE to low */
-+#define NAND_CTL_CLRCLE 4
-+/* Select the address latch by setting ALE to high */
-+#define NAND_CTL_SETALE 5
-+/* Deselect the address latch by setting ALE to low */
-+#define NAND_CTL_CLRALE 6
-+/* Set write protection by setting WP to high. Not used! */
-+#define NAND_CTL_SETWP 7
-+/* Clear write protection by setting WP to low. Not used! */
-+#define NAND_CTL_CLRWP 8
-+
-+/*
-+ * Standard NAND flash commands
-+ */
-+#define NAND_CMD_READ0 0
-+#define NAND_CMD_READ1 1
-+#define NAND_CMD_PAGEPROG 0x10
-+#define NAND_CMD_READOOB 0x50
-+#define NAND_CMD_ERASE1 0x60
-+#define NAND_CMD_STATUS 0x70
-+#define NAND_CMD_STATUS_MULTI 0x71
-+#define NAND_CMD_SEQIN 0x80
-+#define NAND_CMD_READID 0x90
-+#define NAND_CMD_ERASE2 0xd0
-+#define NAND_CMD_RESET 0xff
-+
-+/* Extended commands for large page devices */
-+#define NAND_CMD_READSTART 0x30
-+#define NAND_CMD_CACHEDPROG 0x15
-+
-+/* Extended commands for AG-AND device */
-+/*
-+ * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
-+ * there is no way to distinguish that from NAND_CMD_READ0
-+ * until the remaining sequence of commands has been completed
-+ * so add a high order bit and mask it off in the command.
-+ */
-+#define NAND_CMD_DEPLETE1 0x100
-+#define NAND_CMD_DEPLETE2 0x38
-+#define NAND_CMD_STATUS_MULTI 0x71
-+#define NAND_CMD_STATUS_ERROR 0x72
-+/* multi-bank error status (banks 0-3) */
-+#define NAND_CMD_STATUS_ERROR0 0x73
-+#define NAND_CMD_STATUS_ERROR1 0x74
-+#define NAND_CMD_STATUS_ERROR2 0x75
-+#define NAND_CMD_STATUS_ERROR3 0x76
-+#define NAND_CMD_STATUS_RESET 0x7f
-+#define NAND_CMD_STATUS_CLEAR 0xff
-+
-+/* Status bits */
-+#define NAND_STATUS_FAIL 0x01
-+#define NAND_STATUS_FAIL_N1 0x02
-+#define NAND_STATUS_TRUE_READY 0x20
-+#define NAND_STATUS_READY 0x40
-+#define NAND_STATUS_WP 0x80
-+
-+/*
-+ * Constants for ECC_MODES
-+ */
-+
-+/* No ECC. Usage is not recommended ! */
-+#define NAND_ECC_NONE 0
-+/* Software ECC 3 byte ECC per 256 Byte data */
-+#define NAND_ECC_SOFT 1
-+/* Hardware ECC 3 byte ECC per 256 Byte data */
-+#define NAND_ECC_HW3_256 2
-+/* Hardware ECC 3 byte ECC per 512 Byte data */
-+#define NAND_ECC_HW3_512 3
-+/* Hardware ECC 3 byte ECC per 512 Byte data */
-+#define NAND_ECC_HW6_512 4
-+/* Hardware ECC 8 byte ECC per 512 Byte data */
-+#define NAND_ECC_HW8_512 6
-+/* Hardware ECC 12 byte ECC per 2048 Byte data */
-+#define NAND_ECC_HW12_2048 7
-+
-+/*
-+ * Constants for Hardware ECC
-+ */
-+/* Reset Hardware ECC for read */
-+#define NAND_ECC_READ 0
-+/* Reset Hardware ECC for write */
-+#define NAND_ECC_WRITE 1
-+/* Enable Hardware ECC before syndrom is read back from flash */
-+#define NAND_ECC_READSYN 2
-+
-+/* Bit mask for flags passed to do_nand_read_ecc */
-+#define NAND_GET_DEVICE 0x80
-+
-+
-+/* Option constants for bizarre disfunctionality and real
-+* features
-+*/
-+/* Chip can not auto increment pages */
-+#define NAND_NO_AUTOINCR 0x00000001
-+/* Buswitdh is 16 bit */
-+#define NAND_BUSWIDTH_16 0x00000002
-+/* Device supports partial programming without padding */
-+#define NAND_NO_PADDING 0x00000004
-+/* Chip has cache program function */
-+#define NAND_CACHEPRG 0x00000008
-+/* Chip has copy back function */
-+#define NAND_COPYBACK 0x00000010
-+/* AND Chip which has 4 banks and a confusing page / block
-+ * assignment. See Renesas datasheet for further information */
-+#define NAND_IS_AND 0x00000020
-+/* Chip has a array of 4 pages which can be read without
-+ * additional ready /busy waits */
-+#define NAND_4PAGE_ARRAY 0x00000040
-+/* Chip requires that BBT is periodically rewritten to prevent
-+ * bits from adjacent blocks from 'leaking' in altering data.
-+ * This happens with the Renesas AG-AND chips, possibly others. */
-+#define BBT_AUTO_REFRESH 0x00000080
-+
-+/* Options valid for Samsung large page devices */
-+#define NAND_SAMSUNG_LP_OPTIONS \
-+ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
-+
-+/* Macros to identify the above */
-+#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
-+#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
-+#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
-+#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
-+
-+/* Mask to zero out the chip options, which come from the id table */
-+#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
-+
-+/* Non chip related options */
-+/* Use a flash based bad block table. This option is passed to the
-+ * default bad block table function. */
-+#define NAND_USE_FLASH_BBT 0x00010000
-+/* The hw ecc generator provides a syndrome instead a ecc value on read
-+ * This can only work if we have the ecc bytes directly behind the
-+ * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
-+#define NAND_HWECC_SYNDROME 0x00020000
-+/* This option skips the bbt scan during initialization. */
-+#define NAND_SKIP_BBTSCAN 0x00040000
-+
-+/* Options set by nand scan */
-+/* Nand scan has allocated oob_buf */
-+#define NAND_OOBBUF_ALLOC 0x40000000
-+/* Nand scan has allocated data_buf */
-+#define NAND_DATABUF_ALLOC 0x80000000
-+
-+
-+/*
-+ * nand_state_t - chip states
-+ * Enumeration for NAND flash chip state
-+ */
-+typedef enum {
-+ FL_READY,
-+ FL_READING,
-+ FL_WRITING,
-+ FL_ERASING,
-+ FL_SYNCING,
-+ FL_CACHEDPRG,
-+ FL_PM_SUSPENDED,
-+} nand_state_t;
-+
-+/* Keep gcc happy */
-+struct nand_chip;
-+
-+/**
-+ * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
-+ * @lock: protection lock
-+ * @active: the mtd device which holds the controller currently
-+ * @wq: wait queue to sleep on if a NAND operation is in progress
-+ * used instead of the per chip wait queue when a hw controller is available
-+ */
-+#if NAND_HWECC_SUPPORT
-+struct nand_hw_control {
-+ spinlock_t lock;
-+ struct nand_chip *active;
-+ wait_queue_head_t wq;
-+};
-+#endif
-+
-+/**
-+ * struct nand_chip - NAND Private Flash Chip Data
-+ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
-+ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
-+ * @read_byte: [REPLACEABLE] read one byte from the chip
-+ * @write_byte: [REPLACEABLE] write one byte to the chip
-+ * @read_word: [REPLACEABLE] read one word from the chip
-+ * @write_word: [REPLACEABLE] write one word to the chip
-+ * @write_buf: [REPLACEABLE] write data from the buffer to the chip
-+ * @read_buf: [REPLACEABLE] read data from the chip into the buffer
-+ * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
-+ * @select_chip: [REPLACEABLE] select chip nr
-+ * @block_bad: [REPLACEABLE] check, if the block is bad
-+ * @block_markbad: [REPLACEABLE] mark the block bad
-+ * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
-+ * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
-+ * If set to NULL no access to ready/busy is available and the ready/busy information
-+ * is read from the chip status register
-+ * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
-+ * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
-+ * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
-+ * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
-+ * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
-+ * be provided if a hardware ECC is available
-+ * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
-+ * @scan_bbt: [REPLACEABLE] function to scan bad block table
-+ * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
-+ * @eccsize: [INTERN] databytes used per ecc-calculation
-+ * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
-+ * @eccsteps: [INTERN] number of ecc calculation steps per page
-+ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
-+ * @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
-+ * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
-+ * @state: [INTERN] the current state of the NAND device
-+ * @page_shift: [INTERN] number of address bits in a page (column address bits)
-+ * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
-+ * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
-+ * @chip_shift: [INTERN] number of address bits in one chip
-+ * @data_buf: [INTERN] internal buffer for one page + oob
-+ * @oob_buf: [INTERN] oob buffer for one eraseblock
-+ * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
-+ * @data_poi: [INTERN] pointer to a data buffer
-+ * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
-+ * special functionality. See the defines for further explanation
-+ * @badblockpos: [INTERN] position of the bad block marker in the oob area
-+ * @numchips: [INTERN] number of physical chips
-+ * @chipsize: [INTERN] the size of one chip for multichip arrays
-+ * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
-+ * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
-+ * @autooob: [REPLACEABLE] the default (auto)placement scheme
-+ * @bbt: [INTERN] bad block table pointer
-+ * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
-+ * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
-+ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
-+ * @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
-+ * @priv: [OPTIONAL] pointer to private chip date
-+ * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
-+ * (determine if errors are correctable)
-+ */
-+
-+struct nand_chip {
-+ void __iomem *IO_ADDR_R;
-+ void __iomem *IO_ADDR_W;
-+
-+ u_char (*read_byte)(struct mtd_info *mtd);
-+ void (*write_byte)(struct mtd_info *mtd, u_char byte);
-+ u16 (*read_word)(struct mtd_info *mtd);
-+ void (*write_word)(struct mtd_info *mtd, u16 word);
-+
-+ void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
-+ void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
-+ int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
-+ void (*select_chip)(struct mtd_info *mtd, int chip);
-+ int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
-+ int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
-+ void (*hwcontrol)(struct mtd_info *mtd, int cmd);
-+ int (*dev_ready)(struct mtd_info *mtd);
-+ void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
-+ int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
-+ int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
-+ int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
-+ void (*enable_hwecc)(struct mtd_info *mtd, int mode);
-+ void (*erase_cmd)(struct mtd_info *mtd, int page);
-+ int (*scan_bbt)(struct mtd_info *mtd);
-+ int eccmode;
-+ int eccsize;
-+ int eccbytes;
-+ int eccsteps;
-+ int chip_delay;
-+#if 0 /* no spinlocks or wait queues in boot loader */
-+ spinlock_t chip_lock;
-+ wait_queue_head_t wq;
-+#endif
-+ nand_state_t state;
-+ int page_shift;
-+ int phys_erase_shift;
-+ int bbt_erase_shift;
-+ int chip_shift;
-+ u_char *data_buf;
-+ u_char *oob_buf;
-+ int oobdirty;
-+ u_char *data_poi;
-+ unsigned int options;
-+ int badblockpos;
-+ int numchips;
-+ unsigned long chipsize;
-+ int pagemask;
-+ int pagebuf;
-+ struct nand_oobinfo *autooob;
-+ uint8_t *bbt;
-+ struct nand_bbt_descr *bbt_td;
-+ struct nand_bbt_descr *bbt_md;
-+ struct nand_bbt_descr *badblock_pattern;
-+ struct nand_hw_control *controller;
-+ void *priv;
-+ int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
-+};
-+
-+/*
-+ * NAND Flash Manufacturer ID Codes
-+ */
-+#define NAND_MFR_TOSHIBA 0x98
-+#define NAND_MFR_SAMSUNG 0xec
-+#define NAND_MFR_FUJITSU 0x04
-+#define NAND_MFR_NATIONAL 0x8f
-+#define NAND_MFR_RENESAS 0x07
-+#define NAND_MFR_STMICRO 0x20
-+#define NAND_MFR_HYNIX 0xad
-+
-+/**
-+ * struct nand_flash_dev - NAND Flash Device ID Structure
-+ *
-+ * @name: Identify the device type
-+ * @id: device ID code
-+ * @pagesize: Pagesize in bytes. Either 256 or 512 or 0
-+ * If the pagesize is 0, then the real pagesize
-+ * and the eraseize are determined from the
-+ * extended id bytes in the chip
-+ * @erasesize: Size of an erase block in the flash device.
-+ * @chipsize: Total chipsize in Mega Bytes
-+ * @options: Bitfield to store chip relevant options
-+ */
-+struct nand_flash_dev {
-+ char *name;
-+ int id;
-+ unsigned long pagesize;
-+ unsigned long chipsize;
-+ unsigned long erasesize;
-+ unsigned long options;
-+};
-+
-+/**
-+ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
-+ * @name: Manufacturer name
-+ * @id: manufacturer ID code of device.
-+*/
-+struct nand_manufacturers {
-+ int id;
-+ char * name;
-+};
-+
-+extern struct nand_flash_dev nand_flash_ids[];
-+extern struct nand_manufacturers nand_manuf_ids[];
-+
-+/**
-+ * struct nand_bbt_descr - bad block table descriptor
-+ * @options: options for this descriptor
-+ * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE
-+ * when bbt is searched, then we store the found bbts pages here.
-+ * Its an array and supports up to 8 chips now
-+ * @offs: offset of the pattern in the oob area of the page
-+ * @veroffs: offset of the bbt version counter in the oob are of the page
-+ * @version: version read from the bbt page during scan
-+ * @len: length of the pattern, if 0 no pattern check is performed
-+ * @maxblocks: maximum number of blocks to search for a bbt. This number of
-+ * blocks is reserved at the end of the device where the tables are
-+ * written.
-+ * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
-+ * bad) block in the stored bbt
-+ * @pattern: pattern to identify bad block table or factory marked good /
-+ * bad blocks, can be NULL, if len = 0
-+ *
-+ * Descriptor for the bad block table marker and the descriptor for the
-+ * pattern which identifies good and bad blocks. The assumption is made
-+ * that the pattern and the version count are always located in the oob area
-+ * of the first block.
-+ */
-+struct nand_bbt_descr {
-+ int options;
-+ int pages[NAND_MAX_CHIPS];
-+ int offs;
-+ int veroffs;
-+ uint8_t version[NAND_MAX_CHIPS];
-+ int len;
-+ int maxblocks;
-+ int reserved_block_code;
-+ uint8_t *pattern;
-+};
-+
-+/* Options for the bad block table descriptors */
-+
-+/* The number of bits used per block in the bbt on the device */
-+#define NAND_BBT_NRBITS_MSK 0x0000000F
-+#define NAND_BBT_1BIT 0x00000001
-+#define NAND_BBT_2BIT 0x00000002
-+#define NAND_BBT_4BIT 0x00000004
-+#define NAND_BBT_8BIT 0x00000008
-+/* The bad block table is in the last good block of the device */
-+#define NAND_BBT_LASTBLOCK 0x00000010
-+/* The bbt is at the given page, else we must scan for the bbt */
-+#define NAND_BBT_ABSPAGE 0x00000020
-+/* The bbt is at the given page, else we must scan for the bbt */
-+#define NAND_BBT_SEARCH 0x00000040
-+/* bbt is stored per chip on multichip devices */
-+#define NAND_BBT_PERCHIP 0x00000080
-+/* bbt has a version counter at offset veroffs */
-+#define NAND_BBT_VERSION 0x00000100
-+/* Create a bbt if none axists */
-+#define NAND_BBT_CREATE 0x00000200
-+/* Search good / bad pattern through all pages of a block */
-+#define NAND_BBT_SCANALLPAGES 0x00000400
-+/* Scan block empty during good / bad block scan */
-+#define NAND_BBT_SCANEMPTY 0x00000800
-+/* Write bbt if neccecary */
-+#define NAND_BBT_WRITE 0x00001000
-+/* Read and write back block contents when writing bbt */
-+#define NAND_BBT_SAVECONTENT 0x00002000
-+/* Search good / bad pattern on the first and the second page */
-+#define NAND_BBT_SCAN2NDPAGE 0x00004000
-+
-+/* The maximum number of blocks to scan for a bbt */
-+#define NAND_BBT_SCAN_MAXBLOCKS 4
-+
-+extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
-+extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
-+extern int nand_default_bbt (struct mtd_info *mtd);
-+extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
-+extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
-+extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
-+ size_t * retlen, u_char * buf, u_char * oob_buf,
-+ struct nand_oobinfo *oobsel, int flags);
-+
-+/*
-+* Constants for oob configuration
-+*/
-+#define NAND_SMALL_BADBLOCK_POS 5
-+#define NAND_LARGE_BADBLOCK_POS 0
-+
-+#endif /* __LINUX_MTD_NAND_H */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_base.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_base.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_base.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_base.c 2006-11-10 09:55:58.000000000 +0100
-@@ -0,0 +1,2910 @@
-+/*
-+ * Snitched from drivers/mtd/nand_base.c
-+ * Modified to run outside Linux.
-+ * #if 0'd to remove non-essential functionality
-+ *
-+ * Overview:
-+ * This is the generic MTD driver for NAND flash devices. It should be
-+ * capable of working with almost all NAND chips currently available.
-+ * Basic support for AG-AND chips is provided.
-+ *
-+ * Additional technical information is available on
-+ * http://www.linux-mtd.infradead.org/tech/nand.html
-+ *
-+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
-+ * 2002 Thomas Gleixner (tglx@linutronix.de)
-+ *
-+ * 02-08-2004 tglx: support for strange chips, which cannot auto increment
-+ * pages on read / read_oob
-+ *
-+ * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
-+ * pointed this out, as he marked an auto increment capable chip
-+ * as NOAUTOINCR in the board driver.
-+ * Make reads over block boundaries work too
-+ *
-+ * 04-14-2004 tglx: first working version for 2k page size chips
-+ *
-+ * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
-+ *
-+ * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
-+ * among multiple independend devices. Suggestions and initial patch
-+ * from Ben Dooks <ben-mtd@fluff.org>
-+ *
-+ * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
-+ * Basically, any block not rewritten may lose data when surrounding blocks
-+ * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
-+ * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
-+ * do not lose data, force them to be rewritten when some of the surrounding
-+ * blocks are erased. Rather than tracking a specific nearby block (which
-+ * could itself go bad), use a page address 'mask' to select several blocks
-+ * in the same area, and rewrite the BBT when any of them are erased.
-+ *
-+ * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
-+ * AG-AND chips. If there was a sudden loss of power during an erase operation,
-+ * a "device recovery" operation must be performed when power is restored
-+ * to ensure correct operation.
-+ *
-+ * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
-+ * perform extra error status checks on erase and write failures. This required
-+ * adding a wrapper function for nand_read_ecc.
-+ *
-+ * 08-20-2005 vwool: suspend/resume added
-+ *
-+ * Credits:
-+ * David Woodhouse for adding multichip support
-+ *
-+ * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
-+ * rework for 2K page size chips
-+ *
-+ * TODO:
-+ * Enable cached programming for 2k page size chips
-+ * Check, if mtd->ecctype should be set to MTD_ECC_HW
-+ * if we have HW ecc support.
-+ * The AG-AND chips have nice features for speed improvement,
-+ * which are not supported yet. Read / program 4 pages in one go.
-+ *
-+ * $Id: nand_base.c,v 1.11 2006/11/10 08:55:58 ricardw Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/errno.h>
-+#if 0
-+#include <linux/sched.h>
-+#include <linux/slab.h>
-+#endif
-+
-+#include "mtd.h"
-+#include "nand.h"
-+#include "nand_ecc.h"
-+
-+#if 0
-+#include <linux/mtd/compatmac.h>
-+#include <linux/interrupt.h>
-+#include <linux/bitops.h>
-+#include <asm/io.h>
-+#endif
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+#include <linux/mtd/partitions.h>
-+
-+#endif
-+
-+#include "lib.h"
-+
-+#define GPIO_SYNC 0
-+
-+#undef DEBUG /* from mtd.h */
-+#define DEBUG(n, args...) do { } while(0)
-+
-+#define D(x)
-+
-+/* Define default oob placement schemes for large and small page devices */
-+static struct nand_oobinfo nand_oob_8 = {
-+ .useecc = MTD_NANDECC_AUTOPLACE,
-+ .eccbytes = 3,
-+ .eccpos = {0, 1, 2},
-+ .oobfree = { {3, 2}, {6, 2} }
-+};
-+
-+static struct nand_oobinfo nand_oob_16 = {
-+ .useecc = MTD_NANDECC_AUTOPLACE,
-+ .eccbytes = 6,
-+ .eccpos = {0, 1, 2, 3, 6, 7},
-+ .oobfree = { {8, 8} }
-+};
-+
-+static struct nand_oobinfo nand_oob_64 = {
-+ .useecc = MTD_NANDECC_AUTOPLACE,
-+ .eccbytes = 24,
-+ .eccpos = {
-+ 40, 41, 42, 43, 44, 45, 46, 47,
-+ 48, 49, 50, 51, 52, 53, 54, 55,
-+ 56, 57, 58, 59, 60, 61, 62, 63},
-+ .oobfree = { {2, 38} }
-+};
-+
-+/* This is used for padding purposes in nand_write_oob */
-+#if NAND_WRITE_SUPPORT
-+static u_char ffchars[] = {
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+};
-+#endif
-+
-+/*
-+ * NAND low-level MTD interface functions
-+ */
-+static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
-+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
-+static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
-+
-+static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-+static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
-+ size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-+static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-+static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
-+static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
-+ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-+static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
-+#if NAND_KVEC_SUPPORT
-+static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
-+ unsigned long count, loff_t to, size_t * retlen);
-+static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
-+ unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
-+#endif
-+static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
-+static void nand_sync (struct mtd_info *mtd);
-+
-+/* Some internal functions */
-+static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
-+ struct nand_oobinfo *oobsel, int mode);
-+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
-+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
-+#else
-+#define nand_verify_pages(...) (0)
-+#endif
-+
-+static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
-+
-+/**
-+ * nand_release_device - [GENERIC] release chip
-+ * @mtd: MTD device structure
-+ *
-+ * Deselect, release chip lock and wake up anyone waiting on the device
-+ */
-+static void nand_release_device (struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ /* De-select the NAND device */
-+ this->select_chip(mtd, -1);
-+#if 0
-+
-+ if (this->controller) {
-+ /* Release the controller and the chip */
-+ spin_lock(&this->controller->lock);
-+ this->controller->active = NULL;
-+ this->state = FL_READY;
-+ wake_up(&this->controller->wq);
-+ spin_unlock(&this->controller->lock);
-+ } else {
-+ /* Release the chip */
-+ spin_lock(&this->chip_lock);
-+ this->state = FL_READY;
-+ wake_up(&this->wq);
-+ spin_unlock(&this->chip_lock);
-+ }
-+#endif
-+}
-+
-+/**
-+ * nand_read_byte - [DEFAULT] read one byte from the chip
-+ * @mtd: MTD device structure
-+ *
-+ * Default read function for 8bit buswith
-+ */
-+static u_char nand_read_byte(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ return readb(this->IO_ADDR_R);
-+}
-+
-+/**
-+ * nand_write_byte - [DEFAULT] write one byte to the chip
-+ * @mtd: MTD device structure
-+ * @byte: pointer to data byte to write
-+ *
-+ * Default write function for 8it buswith
-+ */
-+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ writeb(byte, this->IO_ADDR_W);
-+
-+#if GPIO_SYNC
-+ /* Bus sync: Read from address we just wrote.
-+ * This generates no signal to the NAND flash, since only chip
-+ * select lines are pulled out to the chip, and read is not
-+ * gated with chip select for the write area.
-+ * Turns out this is (probably) the wrong way to do it; the
-+ * right way is to set up suitable wait states in the kernel
-+ * config (CONFIG_ETRAX_MEM_GRP3_CONFIG).
-+ */
-+ (void) readb(this->IO_ADDR_W); /* that's right, IO_ADDR_W */
-+#endif
-+}
-+
-+/**
-+ * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
-+ * @mtd: MTD device structure
-+ *
-+ * Default read function for 16bit buswith with
-+ * endianess conversion
-+ */
-+static u_char nand_read_byte16(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
-+}
-+
-+/**
-+ * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
-+ * @mtd: MTD device structure
-+ * @byte: pointer to data byte to write
-+ *
-+ * Default write function for 16bit buswith with
-+ * endianess conversion
-+ */
-+static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
-+}
-+
-+/**
-+ * nand_read_word - [DEFAULT] read one word from the chip
-+ * @mtd: MTD device structure
-+ *
-+ * Default read function for 16bit buswith without
-+ * endianess conversion
-+ */
-+static u16 nand_read_word(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ return readw(this->IO_ADDR_R);
-+}
-+
-+/**
-+ * nand_write_word - [DEFAULT] write one word to the chip
-+ * @mtd: MTD device structure
-+ * @word: data word to write
-+ *
-+ * Default write function for 16bit buswith without
-+ * endianess conversion
-+ */
-+static void nand_write_word(struct mtd_info *mtd, u16 word)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ writew(word, this->IO_ADDR_W);
-+}
-+
-+/**
-+ * nand_select_chip - [DEFAULT] control CE line
-+ * @mtd: MTD device structure
-+ * @chip: chipnumber to select, -1 for deselect
-+ *
-+ * Default select function for 1 chip devices.
-+ */
-+static void nand_select_chip(struct mtd_info *mtd, int chip)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ switch(chip) {
-+ case -1:
-+ this->hwcontrol(mtd, NAND_CTL_CLRNCE);
-+ break;
-+ case 0:
-+ this->hwcontrol(mtd, NAND_CTL_SETNCE);
-+ break;
-+
-+ default:
-+ BUG();
-+ }
-+}
-+
-+/**
-+ * nand_write_buf - [DEFAULT] write buffer to chip
-+ * @mtd: MTD device structure
-+ * @buf: data buffer
-+ * @len: number of bytes to write
-+ *
-+ * Default write function for 8bit buswith
-+ */
-+static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+
-+ for (i=0; i<len; i++)
-+ writeb(buf[i], this->IO_ADDR_W);
-+}
-+
-+/**
-+ * nand_read_buf - [DEFAULT] read chip data into buffer
-+ * @mtd: MTD device structure
-+ * @buf: buffer to store date
-+ * @len: number of bytes to read
-+ *
-+ * Default read function for 8bit buswith
-+ */
-+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+
-+ for (i=0; i<len; i++)
-+ buf[i] = readb(this->IO_ADDR_R);
-+}
-+
-+/**
-+ * nand_verify_buf - [DEFAULT] Verify chip data against buffer
-+ * @mtd: MTD device structure
-+ * @buf: buffer containing the data to compare
-+ * @len: number of bytes to compare
-+ *
-+ * Default verify function for 8bit buswith
-+ */
-+static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+
-+ for (i=0; i<len; i++)
-+ if (buf[i] != readb(this->IO_ADDR_R))
-+ return -EFAULT;
-+
-+ return 0;
-+}
-+
-+/**
-+ * nand_write_buf16 - [DEFAULT] write buffer to chip
-+ * @mtd: MTD device structure
-+ * @buf: data buffer
-+ * @len: number of bytes to write
-+ *
-+ * Default write function for 16bit buswith
-+ */
-+static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+ u16 *p = (u16 *) buf;
-+ len >>= 1;
-+
-+ for (i=0; i<len; i++)
-+ writew(p[i], this->IO_ADDR_W);
-+
-+}
-+
-+/**
-+ * nand_read_buf16 - [DEFAULT] read chip data into buffer
-+ * @mtd: MTD device structure
-+ * @buf: buffer to store date
-+ * @len: number of bytes to read
-+ *
-+ * Default read function for 16bit buswith
-+ */
-+static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+ u16 *p = (u16 *) buf;
-+ len >>= 1;
-+
-+ for (i=0; i<len; i++)
-+ p[i] = readw(this->IO_ADDR_R);
-+}
-+
-+/**
-+ * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
-+ * @mtd: MTD device structure
-+ * @buf: buffer containing the data to compare
-+ * @len: number of bytes to compare
-+ *
-+ * Default verify function for 16bit buswith
-+ */
-+static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
-+{
-+ int i;
-+ struct nand_chip *this = mtd->priv;
-+ u16 *p = (u16 *) buf;
-+ len >>= 1;
-+
-+ for (i=0; i<len; i++)
-+ if (p[i] != readw(this->IO_ADDR_R))
-+ return -EFAULT;
-+
-+ return 0;
-+}
-+
-+/**
-+ * nand_block_bad - [DEFAULT] Read bad block marker from the chip
-+ * @mtd: MTD device structure
-+ * @ofs: offset from device start
-+ * @getchip: 0, if the chip is already selected
-+ *
-+ * Check, if the block is bad.
-+ */
-+static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
-+{
-+ int page, chipnr, res = 0;
-+ struct nand_chip *this = mtd->priv;
-+ u16 bad;
-+
-+ if (getchip) {
-+ page = (int)(ofs >> this->page_shift);
-+ chipnr = (int)(ofs >> this->chip_shift);
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_READING);
-+
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+ } else
-+ page = (int) ofs;
-+
-+ if (this->options & NAND_BUSWIDTH_16) {
-+ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
-+ bad = cpu_to_le16(this->read_word(mtd));
-+ if (this->badblockpos & 0x1)
-+ bad >>= 8;
-+ if ((bad & 0xFF) != 0xff)
-+ res = 1;
-+ } else {
-+ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
-+ if (this->read_byte(mtd) != 0xff)
-+ res = 1;
-+ }
-+
-+ if (getchip) {
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+ }
-+
-+ return res;
-+}
-+
-+/**
-+ * nand_default_block_markbad - [DEFAULT] mark a block bad
-+ * @mtd: MTD device structure
-+ * @ofs: offset from device start
-+ *
-+ * This is the default implementation, which can be overridden by
-+ * a hardware specific driver.
-+*/
-+#if NAND_WRITE_SUPPORT
-+static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ u_char buf[2] = {0, 0};
-+ size_t retlen;
-+ int block;
-+
-+ /* Get block number */
-+ block = ((int) ofs) >> this->bbt_erase_shift;
-+ if (this->bbt)
-+ this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
-+
-+#if NAND_BBT_SUPPORT
-+ /* Do we have a flash based bad block table ? */
-+ if (this->options & NAND_USE_FLASH_BBT)
-+ return nand_update_bbt (mtd, ofs);
-+#endif
-+
-+ /* We write two bytes, so we dont have to mess with 16 bit access */
-+ ofs += mtd->oobsize + (this->badblockpos & ~0x01);
-+ return nand_write_oob (mtd, ofs , 2, &retlen, buf);
-+}
-+#endif
-+
-+/**
-+ * nand_check_wp - [GENERIC] check if the chip is write protected
-+ * @mtd: MTD device structure
-+ * Check, if the device is write protected
-+ *
-+ * The function expects, that the device is already selected
-+ */
-+#if NAND_WRITE_SUPPORT
-+static int nand_check_wp (struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ /* Check the WP bit */
-+ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
-+ return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
-+}
-+#endif
-+
-+/**
-+ * nand_block_checkbad - [GENERIC] Check if a block is marked bad
-+ * @mtd: MTD device structure
-+ * @ofs: offset from device start
-+ * @getchip: 0, if the chip is already selected
-+ * @allowbbt: 1, if its allowed to access the bbt area
-+ *
-+ * Check, if the block is bad. Either by reading the bad block table or
-+ * calling of the scan function.
-+ */
-+static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ if (!this->bbt)
-+ return this->block_bad(mtd, ofs, getchip);
-+
-+#if NAND_BBT_SUPPORT
-+ /* Return info from the table */
-+ return nand_isbad_bbt (mtd, ofs, allowbbt);
-+#endif
-+ BUG(); /* should not happen */
-+}
-+
-+/*
-+ * Wait for the ready pin, after a command
-+ * The timeout is catched later.
-+ */
-+static void nand_wait_ready(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+#if 0
-+ unsigned long timeo = jiffies + 2;
-+#endif
-+
-+ /* wait until command is processed or timeout occures */
-+ do {
-+ if (this->dev_ready(mtd))
-+ return;
-+#if 0
-+ touch_softlockup_watchdog();
-+ } while (time_before(jiffies, timeo));
-+#endif
-+ } while (1);
-+}
-+
-+/**
-+ * nand_command - [DEFAULT] Send command to NAND device
-+ * @mtd: MTD device structure
-+ * @command: the command to be sent
-+ * @column: the column address for this command, -1 if none
-+ * @page_addr: the page address for this command, -1 if none
-+ *
-+ * Send command to NAND device. This function is used for small page
-+ * devices (256/512 Bytes per page)
-+ */
-+static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
-+{
-+ register struct nand_chip *this = mtd->priv;
-+
-+ /* Begin command latch cycle */
-+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
-+ /*
-+ * Write out the command to the device.
-+ */
-+ if (command == NAND_CMD_SEQIN) {
-+ int readcmd;
-+
-+ if (column >= mtd->oobblock) {
-+ /* OOB area */
-+ column -= mtd->oobblock;
-+ readcmd = NAND_CMD_READOOB;
-+ } else if (column < 256) {
-+ /* First 256 bytes --> READ0 */
-+ readcmd = NAND_CMD_READ0;
-+ } else {
-+ column -= 256;
-+ readcmd = NAND_CMD_READ1;
-+ }
-+ this->write_byte(mtd, readcmd);
-+ }
-+ this->write_byte(mtd, command);
-+
-+ /* Set ALE and clear CLE to start address cycle */
-+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
-+
-+ if (column != -1 || page_addr != -1) {
-+ this->hwcontrol(mtd, NAND_CTL_SETALE);
-+
-+ /* Serially input address */
-+ if (column != -1) {
-+ /* Adjust columns for 16 bit buswidth */
-+ if (this->options & NAND_BUSWIDTH_16)
-+ column >>= 1;
-+ this->write_byte(mtd, column);
-+ }
-+ if (page_addr != -1) {
-+ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
-+ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
-+ /* One more address cycle for devices > 32MiB */
-+ if (this->chipsize > (32 << 20))
-+ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
-+ }
-+ /* Latch in address */
-+ this->hwcontrol(mtd, NAND_CTL_CLRALE);
-+ }
-+
-+ /*
-+ * program and erase have their own busy handlers
-+ * status and sequential in needs no delay
-+ */
-+ switch (command) {
-+
-+ case NAND_CMD_PAGEPROG:
-+ case NAND_CMD_ERASE1:
-+ case NAND_CMD_ERASE2:
-+ case NAND_CMD_SEQIN:
-+ case NAND_CMD_STATUS:
-+ return;
-+
-+ case NAND_CMD_RESET:
-+ if (this->dev_ready)
-+ break;
-+ udelay(this->chip_delay);
-+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
-+ this->write_byte(mtd, NAND_CMD_STATUS);
-+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
-+ while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
-+ return;
-+
-+ /* This applies to read commands */
-+ default:
-+ /*
-+ * If we don't have access to the busy pin, we apply the given
-+ * command delay
-+ */
-+ if (!this->dev_ready) {
-+ udelay (this->chip_delay);
-+ return;
-+ }
-+ }
-+ /* Apply this short delay always to ensure that we do wait tWB in
-+ * any case on any machine. */
-+ ndelay (100);
-+
-+ nand_wait_ready(mtd);
-+}
-+
-+/**
-+ * nand_command_lp - [DEFAULT] Send command to NAND large page device
-+ * @mtd: MTD device structure
-+ * @command: the command to be sent
-+ * @column: the column address for this command, -1 if none
-+ * @page_addr: the page address for this command, -1 if none
-+ *
-+ * Send command to NAND device. This is the version for the new large page devices
-+ * We dont have the seperate regions as we have in the small page devices.
-+ * We must emulate NAND_CMD_READOOB to keep the code compatible.
-+ *
-+ */
-+static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
-+{
-+ register struct nand_chip *this = mtd->priv;
-+
-+ /* Emulate NAND_CMD_READOOB */
-+ if (command == NAND_CMD_READOOB) {
-+ column += mtd->oobblock;
-+ command = NAND_CMD_READ0;
-+ }
-+
-+
-+ /* Begin command latch cycle */
-+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
-+ /* Write out the command to the device. */
-+ this->write_byte(mtd, (command & 0xff));
-+ /* End command latch cycle */
-+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
-+
-+ if (column != -1 || page_addr != -1) {
-+ this->hwcontrol(mtd, NAND_CTL_SETALE);
-+
-+ /* Serially input address */
-+ if (column != -1) {
-+ /* Adjust columns for 16 bit buswidth */
-+ if (this->options & NAND_BUSWIDTH_16)
-+ column >>= 1;
-+ this->write_byte(mtd, column & 0xff);
-+ this->write_byte(mtd, column >> 8);
-+ }
-+ if (page_addr != -1) {
-+ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
-+ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
-+ /* One more address cycle for devices > 128MiB */
-+ if (this->chipsize > (128 << 20))
-+ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
-+ }
-+ /* Latch in address */
-+ this->hwcontrol(mtd, NAND_CTL_CLRALE);
-+ }
-+
-+ /*
-+ * program and erase have their own busy handlers
-+ * status, sequential in, and deplete1 need no delay
-+ */
-+ switch (command) {
-+
-+ case NAND_CMD_CACHEDPROG:
-+ case NAND_CMD_PAGEPROG:
-+ case NAND_CMD_ERASE1:
-+ case NAND_CMD_ERASE2:
-+ case NAND_CMD_SEQIN:
-+ case NAND_CMD_STATUS:
-+ case NAND_CMD_DEPLETE1:
-+ return;
-+
-+ /*
-+ * read error status commands require only a short delay
-+ */
-+ case NAND_CMD_STATUS_ERROR:
-+ case NAND_CMD_STATUS_ERROR0:
-+ case NAND_CMD_STATUS_ERROR1:
-+ case NAND_CMD_STATUS_ERROR2:
-+ case NAND_CMD_STATUS_ERROR3:
-+ udelay(this->chip_delay);
-+ return;
-+
-+ case NAND_CMD_RESET:
-+ if (this->dev_ready)
-+ break;
-+ udelay(this->chip_delay);
-+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
-+ this->write_byte(mtd, NAND_CMD_STATUS);
-+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
-+ while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
-+ return;
-+
-+ case NAND_CMD_READ0:
-+ /* Begin command latch cycle */
-+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
-+ /* Write out the start read command */
-+ this->write_byte(mtd, NAND_CMD_READSTART);
-+ /* End command latch cycle */
-+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
-+ /* Fall through into ready check */
-+
-+ /* This applies to read commands */
-+ default:
-+ /*
-+ * If we don't have access to the busy pin, we apply the given
-+ * command delay
-+ */
-+ if (!this->dev_ready) {
-+ udelay (this->chip_delay);
-+ return;
-+ }
-+ }
-+
-+ /* Apply this short delay always to ensure that we do wait tWB in
-+ * any case on any machine. */
-+ ndelay (100);
-+
-+ nand_wait_ready(mtd);
-+}
-+
-+/**
-+ * nand_get_device - [GENERIC] Get chip for selected access
-+ * @this: the nand chip descriptor
-+ * @mtd: MTD device structure
-+ * @new_state: the state which is requested
-+ *
-+ * Get the device and lock it for exclusive access
-+ */
-+static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
-+{
-+ this->state = new_state;
-+ return 0;
-+#if 0
-+ struct nand_chip *active;
-+ spinlock_t *lock;
-+ wait_queue_head_t *wq;
-+ DECLARE_WAITQUEUE (wait, current);
-+
-+ lock = (this->controller) ? &this->controller->lock : &this->chip_lock;
-+ wq = (this->controller) ? &this->controller->wq : &this->wq;
-+retry:
-+ active = this;
-+ spin_lock(lock);
-+
-+ /* Hardware controller shared among independend devices */
-+ if (this->controller) {
-+ if (this->controller->active)
-+ active = this->controller->active;
-+ else
-+ this->controller->active = this;
-+ }
-+ if (active == this && this->state == FL_READY) {
-+ this->state = new_state;
-+ spin_unlock(lock);
-+ return 0;
-+ }
-+ if (new_state == FL_PM_SUSPENDED) {
-+ spin_unlock(lock);
-+ return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
-+ }
-+ set_current_state(TASK_UNINTERRUPTIBLE);
-+ add_wait_queue(wq, &wait);
-+ spin_unlock(lock);
-+ schedule();
-+ remove_wait_queue(wq, &wait);
-+ goto retry;
-+#endif
-+}
-+
-+/**
-+ * nand_wait - [DEFAULT] wait until the command is done
-+ * @mtd: MTD device structure
-+ * @this: NAND chip structure
-+ * @state: state to select the max. timeout value
-+ *
-+ * Wait for command done. This applies to erase and program only
-+ * Erase can take up to 400ms and program up to 20ms according to
-+ * general NAND and SmartMedia specs
-+ *
-+*/
-+static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
-+{
-+
-+#if 0
-+ unsigned long timeo = jiffies;
-+#endif
-+ int status;
-+
-+#if 0
-+ if (state == FL_ERASING)
-+ timeo += (HZ * 400) / 1000;
-+ else
-+ timeo += (HZ * 20) / 1000;
-+#endif
-+
-+ /* Apply this short delay always to ensure that we do wait tWB in
-+ * any case on any machine. */
-+ ndelay (100);
-+
-+ if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
-+ this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
-+ else
-+ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
-+
-+#if 0
-+ while (time_before(jiffies, timeo)) {
-+ /* Check, if we were interrupted */
-+ if (this->state != state)
-+ return 0;
-+#endif
-+ while (1) { /* wait indefinitely */
-+
-+ if (this->dev_ready) {
-+ if (this->dev_ready(mtd))
-+ break;
-+ } else {
-+ if (this->read_byte(mtd) & NAND_STATUS_READY)
-+ break;
-+ }
-+
-+#if 0
-+ cond_resched();
-+#endif
-+ }
-+ status = (int) this->read_byte(mtd);
-+ return status;
-+}
-+
-+/**
-+ * nand_write_page - [GENERIC] write one page
-+ * @mtd: MTD device structure
-+ * @this: NAND chip structure
-+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
-+ * @oob_buf: out of band data buffer
-+ * @oobsel: out of band selecttion structre
-+ * @cached: 1 = enable cached programming if supported by chip
-+ *
-+ * Nand_page_program function is used for write and writev !
-+ * This function will always program a full page of data
-+ * If you call it with a non page aligned buffer, you're lost :)
-+ *
-+ * Cached programming is not supported yet.
-+ */
-+#if NAND_WRITE_SUPPORT
-+static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
-+ u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
-+{
-+ int i, status;
-+ u_char ecc_code[32];
-+ int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
-+ int *oob_config = oobsel->eccpos;
-+ int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
-+ int eccbytes = 0;
-+
-+ /* FIXME: Enable cached programming */
-+ cached = 0;
-+
-+ /* Send command to begin auto page programming */
-+ this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
-+
-+ /* Write out complete page of data, take care of eccmode */
-+ switch (eccmode) {
-+ /* No ecc, write all */
-+ case NAND_ECC_NONE:
-+ puts ("Writing data without ECC to NAND-FLASH is not recommended\r\n");
-+ this->write_buf(mtd, this->data_poi, mtd->oobblock);
-+ break;
-+
-+ /* Software ecc 3/256, write all */
-+ case NAND_ECC_SOFT:
-+ for (; eccsteps; eccsteps--) {
-+ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
-+ for (i = 0; i < 3; i++, eccidx++)
-+ oob_buf[oob_config[eccidx]] = ecc_code[i];
-+ datidx += this->eccsize;
-+ }
-+ this->write_buf(mtd, this->data_poi, mtd->oobblock);
-+ break;
-+ default:
-+ eccbytes = this->eccbytes;
-+ for (; eccsteps; eccsteps--) {
-+ /* enable hardware ecc logic for write */
-+ this->enable_hwecc(mtd, NAND_ECC_WRITE);
-+ this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
-+ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
-+ for (i = 0; i < eccbytes; i++, eccidx++)
-+ oob_buf[oob_config[eccidx]] = ecc_code[i];
-+ /* If the hardware ecc provides syndromes then
-+ * the ecc code must be written immidiately after
-+ * the data bytes (words) */
-+ if (this->options & NAND_HWECC_SYNDROME)
-+ this->write_buf(mtd, ecc_code, eccbytes);
-+ datidx += this->eccsize;
-+ }
-+ break;
-+ }
-+
-+ /* Write out OOB data */
-+ if (this->options & NAND_HWECC_SYNDROME)
-+ this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
-+ else
-+ this->write_buf(mtd, oob_buf, mtd->oobsize);
-+
-+ /* Send command to actually program the data */
-+ this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
-+
-+ if (!cached) {
-+ /* call wait ready function */
-+ status = this->waitfunc (mtd, this, FL_WRITING);
-+
-+ /* See if operation failed and additional status checks are available */
-+ if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
-+ status = this->errstat(mtd, this, FL_WRITING, status, page);
-+ }
-+
-+ /* See if device thinks it succeeded */
-+ if (status & NAND_STATUS_FAIL) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
-+ return -EIO;
-+ }
-+ } else {
-+ /* FIXME: Implement cached programming ! */
-+ /* wait until cache is ready*/
-+ // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
-+ }
-+ return 0;
-+}
-+#endif
-+
-+#if NAND_WRITE_SUPPORT
-+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-+/**
-+ * nand_verify_pages - [GENERIC] verify the chip contents after a write
-+ * @mtd: MTD device structure
-+ * @this: NAND chip structure
-+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
-+ * @numpages: number of pages to verify
-+ * @oob_buf: out of band data buffer
-+ * @oobsel: out of band selecttion structre
-+ * @chipnr: number of the current chip
-+ * @oobmode: 1 = full buffer verify, 0 = ecc only
-+ *
-+ * The NAND device assumes that it is always writing to a cleanly erased page.
-+ * Hence, it performs its internal write verification only on bits that
-+ * transitioned from 1 to 0. The device does NOT verify the whole page on a
-+ * byte by byte basis. It is possible that the page was not completely erased
-+ * or the page is becoming unusable due to wear. The read with ECC would catch
-+ * the error later when the ECC page check fails, but we would rather catch
-+ * it early in the page write stage. Better to write no data than invalid data.
-+ */
-+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
-+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
-+{
-+ int i, j, datidx = 0, oobofs = 0, res = -EIO;
-+ int eccsteps = this->eccsteps;
-+ int hweccbytes;
-+ u_char oobdata[64];
-+
-+ hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
-+
-+ /* Send command to read back the first page */
-+ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
-+
-+ for(;;) {
-+ for (j = 0; j < eccsteps; j++) {
-+ /* Loop through and verify the data */
-+ if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
-+ goto out;
-+ }
-+ datidx += mtd->eccsize;
-+ /* Have we a hw generator layout ? */
-+ if (!hweccbytes)
-+ continue;
-+ if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
-+ goto out;
-+ }
-+ oobofs += hweccbytes;
-+ }
-+
-+ /* check, if we must compare all data or if we just have to
-+ * compare the ecc bytes
-+ */
-+ if (oobmode) {
-+ if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
-+ goto out;
-+ }
-+ } else {
-+ /* Read always, else autoincrement fails */
-+ this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
-+
-+ if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
-+ int ecccnt = oobsel->eccbytes;
-+
-+ for (i = 0; i < ecccnt; i++) {
-+ int idx = oobsel->eccpos[i];
-+ if (oobdata[idx] != oob_buf[oobofs + idx] ) {
-+ DEBUG (MTD_DEBUG_LEVEL0,
-+ "%s: Failed ECC write "
-+ "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
-+ goto out;
-+ }
-+ }
-+ }
-+ }
-+ oobofs += mtd->oobsize - hweccbytes * eccsteps;
-+ page++;
-+ numpages--;
-+
-+ /* Apply delay or wait for ready/busy pin
-+ * Do this before the AUTOINCR check, so no problems
-+ * arise if a chip which does auto increment
-+ * is marked as NOAUTOINCR by the board driver.
-+ * Do this also before returning, so the chip is
-+ * ready for the next command.
-+ */
-+ if (!this->dev_ready)
-+ udelay (this->chip_delay);
-+ else
-+ nand_wait_ready(mtd);
-+
-+ /* All done, return happy */
-+ if (!numpages)
-+ return 0;
-+
-+
-+ /* Check, if the chip supports auto page increment */
-+ if (!NAND_CANAUTOINCR(this))
-+ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
-+ }
-+ /*
-+ * Terminate the read command. We come here in case of an error
-+ * So we must issue a reset command.
-+ */
-+out:
-+ this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
-+ return res;
-+}
-+#endif
-+#endif
-+
-+/**
-+ * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
-+ * @mtd: MTD device structure
-+ * @from: offset to read from
-+ * @len: number of bytes to read
-+ * @retlen: pointer to variable to store the number of read bytes
-+ * @buf: the databuffer to put data
-+ *
-+ * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
-+ * and flags = 0xff
-+ */
-+static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
-+{
-+ return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
-+}
-+
-+
-+/**
-+ * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
-+ * @mtd: MTD device structure
-+ * @from: offset to read from
-+ * @len: number of bytes to read
-+ * @retlen: pointer to variable to store the number of read bytes
-+ * @buf: the databuffer to put data
-+ * @oob_buf: filesystem supplied oob data buffer
-+ * @oobsel: oob selection structure
-+ *
-+ * This function simply calls nand_do_read_ecc with flags = 0xff
-+ */
-+static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
-+ size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
-+{
-+ /* use userspace supplied oobinfo, if zero */
-+ if (oobsel == NULL)
-+ oobsel = &mtd->oobinfo;
-+ return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
-+}
-+
-+
-+/**
-+ * nand_do_read_ecc - [MTD Interface] Read data with ECC
-+ * @mtd: MTD device structure
-+ * @from: offset to read from
-+ * @len: number of bytes to read
-+ * @retlen: pointer to variable to store the number of read bytes
-+ * @buf: the databuffer to put data
-+ * @oob_buf: filesystem supplied oob data buffer (can be NULL)
-+ * @oobsel: oob selection structure
-+ * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
-+ * and how many corrected error bits are acceptable:
-+ * bits 0..7 - number of tolerable errors
-+ * bit 8 - 0 == do not get/release chip, 1 == get/release chip
-+ *
-+ * NAND read with ECC
-+ */
-+int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
-+ size_t * retlen, u_char * buf, u_char * oob_buf,
-+ struct nand_oobinfo *oobsel, int flags)
-+{
-+
-+ int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
-+ int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
-+ struct nand_chip *this = mtd->priv;
-+ u_char *data_poi, *oob_data = oob_buf;
-+ u_char ecc_calc[32];
-+ u_char ecc_code[32];
-+ int eccmode, eccsteps;
-+ int *oob_config, datidx;
-+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
-+ int eccbytes;
-+ int compareecc = 1;
-+ int oobreadlen;
-+
-+
-+ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
-+ D(
-+ puts ("nand_read_ecc: from = ");
-+ putx (from);
-+ puts (", len = ");
-+ putx(len);
-+ putnl();
-+ )
-+
-+ /* Do not allow reads past end of device */
-+ if ((from + len) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
-+ D(puts("nand_read_ecc: Attempt read beyond end of device\r\n"));
-+ *retlen = 0;
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ if (flags & NAND_GET_DEVICE)
-+ nand_get_device (this, mtd, FL_READING);
-+
-+ /* Autoplace of oob data ? Use the default placement scheme */
-+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
-+ oobsel = this->autooob;
-+
-+ eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
-+ oob_config = oobsel->eccpos;
-+
-+ /* Select the NAND device */
-+ chipnr = (int)(from >> this->chip_shift);
-+ this->select_chip(mtd, chipnr);
-+
-+ /* First we calculate the starting page */
-+ realpage = (int) (from >> this->page_shift);
-+ page = realpage & this->pagemask;
-+
-+ /* Get raw starting column */
-+ col = from & (mtd->oobblock - 1);
-+
-+ end = mtd->oobblock;
-+ ecc = this->eccsize;
-+ eccbytes = this->eccbytes;
-+
-+ if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
-+ compareecc = 0;
-+
-+ oobreadlen = mtd->oobsize;
-+ if (this->options & NAND_HWECC_SYNDROME)
-+ oobreadlen -= oobsel->eccbytes;
-+
-+ /* Loop until all data read */
-+ while (read < len) {
-+
-+ int aligned = (!col && (len - read) >= end);
-+ /*
-+ * If the read is not page aligned, we have to read into data buffer
-+ * due to ecc, else we read into return buffer direct
-+ */
-+ if (aligned)
-+ data_poi = &buf[read];
-+ else
-+ data_poi = this->data_buf;
-+
-+ /* Check, if we have this page in the buffer
-+ *
-+ * FIXME: Make it work when we must provide oob data too,
-+ * check the usage of data_buf oob field
-+ */
-+ if (realpage == this->pagebuf && !oob_buf) {
-+ /* aligned read ? */
-+ if (aligned)
-+ memcpy (data_poi, this->data_buf, end);
-+ goto readdata;
-+ }
-+
-+ /* Check, if we must send the read command */
-+ if (sndcmd) {
-+ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
-+ sndcmd = 0;
-+ }
-+
-+ /* get oob area, if we have no oob buffer from fs-driver */
-+ if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
-+ oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
-+ oob_data = &this->data_buf[end];
-+
-+ eccsteps = this->eccsteps;
-+
-+ switch (eccmode) {
-+ case NAND_ECC_NONE: { /* No ECC, Read in a page */
-+#if 0
-+ static unsigned long lastwhinge = 0;
-+ if ((lastwhinge / HZ) != (jiffies / HZ)) {
-+ puts ("Reading data from NAND FLASH without ECC is not recommended\r\n");
-+ lastwhinge = jiffies;
-+ }
-+#endif
-+ this->read_buf(mtd, data_poi, end);
-+ break;
-+ }
-+
-+ case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
-+ this->read_buf(mtd, data_poi, end);
-+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
-+ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
-+ break;
-+
-+ default:
-+#if NAND_HWECC_SUPPORT
-+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
-+ this->enable_hwecc(mtd, NAND_ECC_READ);
-+ this->read_buf(mtd, &data_poi[datidx], ecc);
-+
-+ /* HW ecc with syndrome calculation must read the
-+ * syndrome from flash immidiately after the data */
-+ if (!compareecc) {
-+ /* Some hw ecc generators need to know when the
-+ * syndrome is read from flash */
-+ this->enable_hwecc(mtd, NAND_ECC_READSYN);
-+ this->read_buf(mtd, &oob_data[i], eccbytes);
-+ /* We calc error correction directly, it checks the hw
-+ * generator for an error, reads back the syndrome and
-+ * does the error correction on the fly */
-+ ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
-+ if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
-+ "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
-+ ecc_failed++;
-+ }
-+ } else {
-+ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
-+ }
-+ }
-+#endif
-+ break;
-+ }
-+
-+ /* read oobdata */
-+ this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
-+
-+ /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
-+ if (!compareecc)
-+ goto readoob;
-+
-+ /* Pick the ECC bytes out of the oob data */
-+ for (j = 0; j < oobsel->eccbytes; j++)
-+ ecc_code[j] = oob_data[oob_config[j]];
-+
-+ /* correct data, if neccecary */
-+ for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
-+ ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
-+
-+ /* Get next chunk of ecc bytes */
-+ j += eccbytes;
-+
-+ /* Check, if we have a fs supplied oob-buffer,
-+ * This is the legacy mode. Used by YAFFS1
-+ * Should go away some day
-+ */
-+ if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
-+ int *p = (int *)(&oob_data[mtd->oobsize]);
-+ p[i] = ecc_status;
-+ }
-+
-+ if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
-+ D(
-+ puts ("nand_read_ecc: " "Failed ECC read, page ");
-+ putx (page);
-+ putnl();
-+ )
-+ ecc_failed++;
-+ }
-+ }
-+
-+ readoob:
-+ /* check, if we have a fs supplied oob-buffer */
-+ if (oob_buf) {
-+ /* without autoplace. Legacy mode used by YAFFS1 */
-+ switch(oobsel->useecc) {
-+ case MTD_NANDECC_AUTOPLACE:
-+ case MTD_NANDECC_AUTOPL_USR:
-+ /* Walk through the autoplace chunks */
-+ for (i = 0; oobsel->oobfree[i][1]; i++) {
-+ int from = oobsel->oobfree[i][0];
-+ int num = oobsel->oobfree[i][1];
-+ memcpy(&oob_buf[oob], &oob_data[from], num);
-+ oob += num;
-+ }
-+ break;
-+ case MTD_NANDECC_PLACE:
-+ /* YAFFS1 legacy mode */
-+ oob_data += this->eccsteps * sizeof (int);
-+ default:
-+ oob_data += mtd->oobsize;
-+ }
-+ }
-+ readdata:
-+ /* Partial page read, transfer data into fs buffer */
-+ if (!aligned) {
-+ for (j = col; j < end && read < len; j++)
-+ buf[read++] = data_poi[j];
-+ this->pagebuf = realpage;
-+ } else
-+ read += mtd->oobblock;
-+
-+ /* Apply delay or wait for ready/busy pin
-+ * Do this before the AUTOINCR check, so no problems
-+ * arise if a chip which does auto increment
-+ * is marked as NOAUTOINCR by the board driver.
-+ */
-+ if (!this->dev_ready)
-+ udelay (this->chip_delay);
-+ else
-+ nand_wait_ready(mtd);
-+
-+ if (read == len)
-+ break;
-+
-+ /* For subsequent reads align to page boundary. */
-+ col = 0;
-+ /* Increment page address */
-+ realpage++;
-+
-+ page = realpage & this->pagemask;
-+ /* Check, if we cross a chip boundary */
-+ if (!page) {
-+ chipnr++;
-+ this->select_chip(mtd, -1);
-+ this->select_chip(mtd, chipnr);
-+ }
-+ /* Check, if the chip supports auto page increment
-+ * or if we have hit a block boundary.
-+ */
-+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
-+ sndcmd = 1;
-+ }
-+
-+ /* Deselect and wake up anyone waiting on the device */
-+ if (flags & NAND_GET_DEVICE)
-+ nand_release_device(mtd);
-+
-+ /*
-+ * Return success, if no ECC failures, else -EBADMSG
-+ * fs driver will take care of that, because
-+ * retlen == desired len and result == -EBADMSG
-+ */
-+ *retlen = read;
-+ return ecc_failed ? -EBADMSG : 0;
-+}
-+
-+/**
-+ * nand_read_oob - [MTD Interface] NAND read out-of-band
-+ * @mtd: MTD device structure
-+ * @from: offset to read from
-+ * @len: number of bytes to read
-+ * @retlen: pointer to variable to store the number of read bytes
-+ * @buf: the databuffer to put data
-+ *
-+ * NAND read out-of-band data from the spare area
-+ */
-+static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
-+{
-+ int i, col, page, chipnr;
-+ struct nand_chip *this = mtd->priv;
-+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
-+
-+ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
-+
-+ /* Shift to get page */
-+ page = (int)(from >> this->page_shift);
-+ chipnr = (int)(from >> this->chip_shift);
-+
-+ /* Mask to get column */
-+ col = from & (mtd->oobsize - 1);
-+
-+ /* Initialize return length value */
-+ *retlen = 0;
-+
-+ /* Do not allow reads past end of device */
-+ if ((from + len) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
-+ *retlen = 0;
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd , FL_READING);
-+
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+
-+ /* Send the read command */
-+ this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
-+ /*
-+ * Read the data, if we read more than one page
-+ * oob data, let the device transfer the data !
-+ */
-+ i = 0;
-+ while (i < len) {
-+ int thislen = mtd->oobsize - col;
-+ thislen = min_t(int, thislen, len);
-+ this->read_buf(mtd, &buf[i], thislen);
-+ i += thislen;
-+
-+ /* Read more ? */
-+ if (i < len) {
-+ page++;
-+ col = 0;
-+
-+ /* Check, if we cross a chip boundary */
-+ if (!(page & this->pagemask)) {
-+ chipnr++;
-+ this->select_chip(mtd, -1);
-+ this->select_chip(mtd, chipnr);
-+ }
-+
-+ /* Apply delay or wait for ready/busy pin
-+ * Do this before the AUTOINCR check, so no problems
-+ * arise if a chip which does auto increment
-+ * is marked as NOAUTOINCR by the board driver.
-+ */
-+ if (!this->dev_ready)
-+ udelay (this->chip_delay);
-+ else
-+ nand_wait_ready(mtd);
-+
-+ /* Check, if the chip supports auto page increment
-+ * or if we have hit a block boundary.
-+ */
-+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
-+ /* For subsequent page reads set offset to 0 */
-+ this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
-+ }
-+ }
-+ }
-+
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+
-+ /* Return happy */
-+ *retlen = len;
-+ return 0;
-+}
-+
-+/**
-+ * nand_read_raw - [GENERIC] Read raw data including oob into buffer
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @from: offset to read from
-+ * @len: number of bytes to read
-+ * @ooblen: number of oob data bytes to read
-+ *
-+ * Read raw data including oob into buffer
-+ */
-+int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int page = (int) (from >> this->page_shift);
-+ int chip = (int) (from >> this->chip_shift);
-+ int sndcmd = 1;
-+ int cnt = 0;
-+ int pagesize = mtd->oobblock + mtd->oobsize;
-+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
-+
-+ /* Do not allow reads past end of device */
-+ if ((from + len) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd , FL_READING);
-+
-+ this->select_chip (mtd, chip);
-+
-+ /* Add requested oob length */
-+ len += ooblen;
-+
-+ while (len) {
-+ if (sndcmd)
-+ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
-+ sndcmd = 0;
-+
-+ this->read_buf (mtd, &buf[cnt], pagesize);
-+
-+ len -= pagesize;
-+ cnt += pagesize;
-+ page++;
-+
-+ if (!this->dev_ready)
-+ udelay (this->chip_delay);
-+ else
-+ nand_wait_ready(mtd);
-+
-+ /* Check, if the chip supports auto page increment */
-+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
-+ sndcmd = 1;
-+ }
-+
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+ return 0;
-+}
-+
-+
-+/**
-+ * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
-+ * @mtd: MTD device structure
-+ * @fsbuf: buffer given by fs driver
-+ * @oobsel: out of band selection structre
-+ * @autoplace: 1 = place given buffer into the oob bytes
-+ * @numpages: number of pages to prepare
-+ *
-+ * Return:
-+ * 1. Filesystem buffer available and autoplacement is off,
-+ * return filesystem buffer
-+ * 2. No filesystem buffer or autoplace is off, return internal
-+ * buffer
-+ * 3. Filesystem buffer is given and autoplace selected
-+ * put data from fs buffer into internal buffer and
-+ * retrun internal buffer
-+ *
-+ * Note: The internal buffer is filled with 0xff. This must
-+ * be done only once, when no autoplacement happens
-+ * Autoplacement sets the buffer dirty flag, which
-+ * forces the 0xff fill before using the buffer again.
-+ *
-+*/
-+#if NAND_WRITE_SUPPORT
-+static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
-+ int autoplace, int numpages)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int i, len, ofs;
-+
-+ /* Zero copy fs supplied buffer */
-+ if (fsbuf && !autoplace)
-+ return fsbuf;
-+
-+ /* Check, if the buffer must be filled with ff again */
-+ if (this->oobdirty) {
-+ memset (this->oob_buf, 0xff,
-+ mtd->oobsize << (this->phys_erase_shift - this->page_shift));
-+ this->oobdirty = 0;
-+ }
-+
-+ /* If we have no autoplacement or no fs buffer use the internal one */
-+ if (!autoplace || !fsbuf)
-+ return this->oob_buf;
-+
-+ /* Walk through the pages and place the data */
-+ this->oobdirty = 1;
-+ ofs = 0;
-+ while (numpages--) {
-+ for (i = 0, len = 0; len < mtd->oobavail; i++) {
-+ int to = ofs + oobsel->oobfree[i][0];
-+ int num = oobsel->oobfree[i][1];
-+ memcpy (&this->oob_buf[to], fsbuf, num);
-+ len += num;
-+ fsbuf += num;
-+ }
-+ ofs += mtd->oobavail;
-+ }
-+ return this->oob_buf;
-+}
-+#endif
-+
-+#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
-+
-+/**
-+ * nand_write - [MTD Interface] compability function for nand_write_ecc
-+ * @mtd: MTD device structure
-+ * @to: offset to write to
-+ * @len: number of bytes to write
-+ * @retlen: pointer to variable to store the number of written bytes
-+ * @buf: the data to write
-+ *
-+ * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
-+ *
-+*/
-+#if NAND_WRITE_SUPPORT
-+static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
-+{
-+ return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
-+}
-+#endif
-+
-+/**
-+ * nand_write_ecc - [MTD Interface] NAND write with ECC
-+ * @mtd: MTD device structure
-+ * @to: offset to write to
-+ * @len: number of bytes to write
-+ * @retlen: pointer to variable to store the number of written bytes
-+ * @buf: the data to write
-+ * @eccbuf: filesystem supplied oob data buffer
-+ * @oobsel: oob selection structure
-+ *
-+ * NAND write with ECC
-+ */
-+#if NAND_WRITE_SUPPORT
-+static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
-+ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
-+{
-+ int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
-+ int autoplace = 0, numpages, totalpages;
-+ struct nand_chip *this = mtd->priv;
-+ u_char *oobbuf, *bufstart;
-+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
-+
-+ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
-+
-+ /* Initialize retlen, in case of early exit */
-+ *retlen = 0;
-+
-+ /* Do not allow write past end of device */
-+ if ((to + len) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
-+ return -EINVAL;
-+ }
-+
-+ /* reject writes, which are not page aligned */
-+ if (NOTALIGNED (to) || NOTALIGNED(len)) {
-+ puts ("nand_write_ecc: Attempt to write not page aligned data\r\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_WRITING);
-+
-+ /* Calculate chipnr */
-+ chipnr = (int)(to >> this->chip_shift);
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+
-+ /* Check, if it is write protected */
-+ if (nand_check_wp(mtd))
-+ goto out;
-+
-+ /* if oobsel is NULL, use chip defaults */
-+ if (oobsel == NULL)
-+ oobsel = &mtd->oobinfo;
-+
-+ /* Autoplace of oob data ? Use the default placement scheme */
-+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
-+ oobsel = this->autooob;
-+ autoplace = 1;
-+ }
-+ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
-+ autoplace = 1;
-+
-+ /* Setup variables and oob buffer */
-+ totalpages = len >> this->page_shift;
-+ page = (int) (to >> this->page_shift);
-+ /* Invalidate the page cache, if we write to the cached page */
-+ if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
-+ this->pagebuf = -1;
-+
-+ /* Set it relative to chip */
-+ page &= this->pagemask;
-+ startpage = page;
-+ /* Calc number of pages we can write in one go */
-+ numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
-+ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
-+ bufstart = (u_char *)buf;
-+
-+ /* Loop until all data is written */
-+ while (written < len) {
-+
-+ this->data_poi = (u_char*) &buf[written];
-+ /* Write one page. If this is the last page to write
-+ * or the last page in this block, then use the
-+ * real pageprogram command, else select cached programming
-+ * if supported by the chip.
-+ */
-+ ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
-+ if (ret) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
-+ goto out;
-+ }
-+ /* Next oob page */
-+ oob += mtd->oobsize;
-+ /* Update written bytes count */
-+ written += mtd->oobblock;
-+ if (written == len)
-+ goto cmp;
-+
-+ /* Increment page address */
-+ page++;
-+
-+ /* Have we hit a block boundary ? Then we have to verify and
-+ * if verify is ok, we have to setup the oob buffer for
-+ * the next pages.
-+ */
-+ if (!(page & (ppblock - 1))){
-+ int ofs;
-+ this->data_poi = bufstart;
-+ ret = nand_verify_pages (mtd, this, startpage,
-+ page - startpage,
-+ oobbuf, oobsel, chipnr, (eccbuf != NULL));
-+ if (ret) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
-+ goto out;
-+ }
-+ *retlen = written;
-+
-+ ofs = autoplace ? mtd->oobavail : mtd->oobsize;
-+ if (eccbuf)
-+ eccbuf += (page - startpage) * ofs;
-+ totalpages -= page - startpage;
-+ numpages = min (totalpages, ppblock);
-+ page &= this->pagemask;
-+ startpage = page;
-+ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
-+ autoplace, numpages);
-+ oob = 0;
-+ /* Check, if we cross a chip boundary */
-+ if (!page) {
-+ chipnr++;
-+ this->select_chip(mtd, -1);
-+ this->select_chip(mtd, chipnr);
-+ }
-+ }
-+ }
-+ /* Verify the remaining pages */
-+cmp:
-+ this->data_poi = bufstart;
-+ ret = nand_verify_pages (mtd, this, startpage, totalpages,
-+ oobbuf, oobsel, chipnr, (eccbuf != NULL));
-+ if (!ret)
-+ *retlen = written;
-+ else
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
-+
-+out:
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+
-+ return ret;
-+}
-+#endif
-+
-+
-+/**
-+ * nand_write_oob - [MTD Interface] NAND write out-of-band
-+ * @mtd: MTD device structure
-+ * @to: offset to write to
-+ * @len: number of bytes to write
-+ * @retlen: pointer to variable to store the number of written bytes
-+ * @buf: the data to write
-+ *
-+ * NAND write out-of-band
-+ */
-+#if NAND_WRITE_SUPPORT
-+static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
-+{
-+ int column, page, status, ret = -EIO, chipnr;
-+ struct nand_chip *this = mtd->priv;
-+
-+ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
-+
-+ /* Shift to get page */
-+ page = (int) (to >> this->page_shift);
-+ chipnr = (int) (to >> this->chip_shift);
-+
-+ /* Mask to get column */
-+ column = to & (mtd->oobsize - 1);
-+
-+ /* Initialize return length value */
-+ *retlen = 0;
-+
-+ /* Do not allow write past end of page */
-+ if ((column + len) > mtd->oobsize) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_WRITING);
-+
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+
-+ /* Reset the chip. Some chips (like the Toshiba TC5832DC found
-+ in one of my DiskOnChip 2000 test units) will clear the whole
-+ data page too if we don't do this. I have no clue why, but
-+ I seem to have 'fixed' it in the doc2000 driver in
-+ August 1999. dwmw2. */
-+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-+
-+ /* Check, if it is write protected */
-+ if (nand_check_wp(mtd))
-+ goto out;
-+
-+ /* Invalidate the page cache, if we write to the cached page */
-+ if (page == this->pagebuf)
-+ this->pagebuf = -1;
-+
-+ if (NAND_MUST_PAD(this)) {
-+ /* Write out desired data */
-+ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
-+ /* prepad 0xff for partial programming */
-+ this->write_buf(mtd, ffchars, column);
-+ /* write data */
-+ this->write_buf(mtd, buf, len);
-+ /* postpad 0xff for partial programming */
-+ this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
-+ } else {
-+ /* Write out desired data */
-+ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
-+ /* write data */
-+ this->write_buf(mtd, buf, len);
-+ }
-+ /* Send command to program the OOB data */
-+ this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
-+
-+ status = this->waitfunc (mtd, this, FL_WRITING);
-+
-+ /* See if device thinks it succeeded */
-+ if (status & NAND_STATUS_FAIL) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
-+ ret = -EIO;
-+ goto out;
-+ }
-+ /* Return happy */
-+ *retlen = len;
-+
-+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-+ /* Send command to read back the data */
-+ this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
-+
-+ if (this->verify_buf(mtd, buf, len)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
-+ ret = -EIO;
-+ goto out;
-+ }
-+#endif
-+ ret = 0;
-+out:
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+
-+ return ret;
-+}
-+#endif
-+
-+
-+/**
-+ * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
-+ * @mtd: MTD device structure
-+ * @vecs: the iovectors to write
-+ * @count: number of vectors
-+ * @to: offset to write to
-+ * @retlen: pointer to variable to store the number of written bytes
-+ *
-+ * NAND write with kvec. This just calls the ecc function
-+ */
-+#if NAND_KVEC_SUPPORT
-+#if NAND_WRITE_SUPPORT
-+static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
-+ loff_t to, size_t * retlen)
-+{
-+ return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
-+}
-+#endif
-+#endif
-+
-+/**
-+ * nand_writev_ecc - [MTD Interface] write with iovec with ecc
-+ * @mtd: MTD device structure
-+ * @vecs: the iovectors to write
-+ * @count: number of vectors
-+ * @to: offset to write to
-+ * @retlen: pointer to variable to store the number of written bytes
-+ * @eccbuf: filesystem supplied oob data buffer
-+ * @oobsel: oob selection structure
-+ *
-+ * NAND write with iovec with ecc
-+ */
-+#if NAND_KVEC_SUPPORT
-+#if NAND_WRITE_SUPPORT
-+static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
-+ loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
-+{
-+ int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
-+ int oob, numpages, autoplace = 0, startpage;
-+ struct nand_chip *this = mtd->priv;
-+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
-+ u_char *oobbuf, *bufstart;
-+
-+ /* Preset written len for early exit */
-+ *retlen = 0;
-+
-+ /* Calculate total length of data */
-+ total_len = 0;
-+ for (i = 0; i < count; i++)
-+ total_len += (int) vecs[i].iov_len;
-+
-+ DEBUG (MTD_DEBUG_LEVEL3,
-+ "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
-+
-+ /* Do not allow write past end of page */
-+ if ((to + total_len) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
-+ return -EINVAL;
-+ }
-+
-+ /* reject writes, which are not page aligned */
-+ if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
-+ puts ("nand_write_ecc: Attempt to write not page aligned data\r\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_WRITING);
-+
-+ /* Get the current chip-nr */
-+ chipnr = (int) (to >> this->chip_shift);
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+
-+ /* Check, if it is write protected */
-+ if (nand_check_wp(mtd))
-+ goto out;
-+
-+ /* if oobsel is NULL, use chip defaults */
-+ if (oobsel == NULL)
-+ oobsel = &mtd->oobinfo;
-+
-+ /* Autoplace of oob data ? Use the default placement scheme */
-+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
-+ oobsel = this->autooob;
-+ autoplace = 1;
-+ }
-+ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
-+ autoplace = 1;
-+
-+ /* Setup start page */
-+ page = (int) (to >> this->page_shift);
-+ /* Invalidate the page cache, if we write to the cached page */
-+ if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
-+ this->pagebuf = -1;
-+
-+ startpage = page & this->pagemask;
-+
-+ /* Loop until all kvec' data has been written */
-+ len = 0;
-+ while (count) {
-+ /* If the given tuple is >= pagesize then
-+ * write it out from the iov
-+ */
-+ if ((vecs->iov_len - len) >= mtd->oobblock) {
-+ /* Calc number of pages we can write
-+ * out of this iov in one go */
-+ numpages = (vecs->iov_len - len) >> this->page_shift;
-+ /* Do not cross block boundaries */
-+ numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
-+ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
-+ bufstart = (u_char *)vecs->iov_base;
-+ bufstart += len;
-+ this->data_poi = bufstart;
-+ oob = 0;
-+ for (i = 1; i <= numpages; i++) {
-+ /* Write one page. If this is the last page to write
-+ * then use the real pageprogram command, else select
-+ * cached programming if supported by the chip.
-+ */
-+ ret = nand_write_page (mtd, this, page & this->pagemask,
-+ &oobbuf[oob], oobsel, i != numpages);
-+ if (ret)
-+ goto out;
-+ this->data_poi += mtd->oobblock;
-+ len += mtd->oobblock;
-+ oob += mtd->oobsize;
-+ page++;
-+ }
-+ /* Check, if we have to switch to the next tuple */
-+ if (len >= (int) vecs->iov_len) {
-+ vecs++;
-+ len = 0;
-+ count--;
-+ }
-+ } else {
-+ /* We must use the internal buffer, read data out of each
-+ * tuple until we have a full page to write
-+ */
-+ int cnt = 0;
-+ while (cnt < mtd->oobblock) {
-+ if (vecs->iov_base != NULL && vecs->iov_len)
-+ this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
-+ /* Check, if we have to switch to the next tuple */
-+ if (len >= (int) vecs->iov_len) {
-+ vecs++;
-+ len = 0;
-+ count--;
-+ }
-+ }
-+ this->pagebuf = page;
-+ this->data_poi = this->data_buf;
-+ bufstart = this->data_poi;
-+ numpages = 1;
-+ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
-+ ret = nand_write_page (mtd, this, page & this->pagemask,
-+ oobbuf, oobsel, 0);
-+ if (ret)
-+ goto out;
-+ page++;
-+ }
-+
-+ this->data_poi = bufstart;
-+ ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
-+ if (ret)
-+ goto out;
-+
-+ written += mtd->oobblock * numpages;
-+ /* All done ? */
-+ if (!count)
-+ break;
-+
-+ startpage = page & this->pagemask;
-+ /* Check, if we cross a chip boundary */
-+ if (!startpage) {
-+ chipnr++;
-+ this->select_chip(mtd, -1);
-+ this->select_chip(mtd, chipnr);
-+ }
-+ }
-+ ret = 0;
-+out:
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+
-+ *retlen = written;
-+ return ret;
-+}
-+#endif
-+#endif
-+
-+/**
-+ * single_erease_cmd - [GENERIC] NAND standard block erase command function
-+ * @mtd: MTD device structure
-+ * @page: the page address of the block which will be erased
-+ *
-+ * Standard erase command for NAND chips
-+ */
-+#if NAND_ERASE_SUPPORT
-+static void single_erase_cmd (struct mtd_info *mtd, int page)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ /* Send commands to erase a block */
-+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
-+ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
-+}
-+#endif
-+
-+/**
-+ * multi_erease_cmd - [GENERIC] AND specific block erase command function
-+ * @mtd: MTD device structure
-+ * @page: the page address of the block which will be erased
-+ *
-+ * AND multi block erase command function
-+ * Erase 4 consecutive blocks
-+ */
-+#if NAND_ERASE_SUPPORT
-+static void multi_erase_cmd (struct mtd_info *mtd, int page)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ /* Send commands to erase a block */
-+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
-+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
-+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
-+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
-+ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
-+}
-+#endif
-+
-+/**
-+ * nand_erase - [MTD Interface] erase block(s)
-+ * @mtd: MTD device structure
-+ * @instr: erase instruction
-+ *
-+ * Erase one ore more blocks
-+ */
-+#if NAND_ERASE_SUPPORT
-+static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
-+{
-+ return nand_erase_nand (mtd, instr, 0);
-+}
-+#endif
-+
-+#define BBT_PAGE_MASK 0xffffff3f
-+/**
-+ * nand_erase_intern - [NAND Interface] erase block(s)
-+ * @mtd: MTD device structure
-+ * @instr: erase instruction
-+ * @allowbbt: allow erasing the bbt area
-+ *
-+ * Erase one ore more blocks
-+ */
-+#if NAND_ERASE_SUPPORT
-+int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
-+{
-+ int page, len, status, pages_per_block, ret, chipnr;
-+ struct nand_chip *this = mtd->priv;
-+ int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */
-+ unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */
-+ /* It is used to see if the current page is in the same */
-+ /* 256 block group and the same bank as the bbt. */
-+
-+ DEBUG (MTD_DEBUG_LEVEL3,
-+ "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
-+
-+ /* Start address must align on block boundary */
-+ if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Length must align on block boundary */
-+ if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Do not allow erase past end of device */
-+ if ((instr->len + instr->addr) > mtd->size) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
-+ return -EINVAL;
-+ }
-+
-+ instr->fail_addr = 0xffffffff;
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_ERASING);
-+
-+ /* Shift to get first page */
-+ page = (int) (instr->addr >> this->page_shift);
-+ chipnr = (int) (instr->addr >> this->chip_shift);
-+
-+ /* Calculate pages in each block */
-+ pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
-+
-+ /* Select the NAND device */
-+ this->select_chip(mtd, chipnr);
-+
-+ /* Check the WP bit */
-+ /* Check, if it is write protected */
-+ if (nand_check_wp(mtd)) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
-+ instr->state = MTD_ERASE_FAILED;
-+ goto erase_exit;
-+ }
-+
-+ /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */
-+ if (this->options & BBT_AUTO_REFRESH) {
-+ bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
-+ } else {
-+ bbt_masked_page = 0xffffffff; /* should not match anything */
-+ }
-+
-+ /* Loop through the pages */
-+ len = instr->len;
-+
-+ instr->state = MTD_ERASING;
-+
-+ while (len) {
-+ /* Check if we have a bad block, we do not erase bad blocks ! */
-+ if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
-+ puts ("nand_erase: attempt to erase a bad block at page ");
-+ putx (page);
-+ putnl ();
-+ instr->state = MTD_ERASE_FAILED;
-+ goto erase_exit;
-+ }
-+
-+ /* Invalidate the page cache, if we erase the block which contains
-+ the current cached page */
-+ if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
-+ this->pagebuf = -1;
-+
-+ this->erase_cmd (mtd, page & this->pagemask);
-+
-+ status = this->waitfunc (mtd, this, FL_ERASING);
-+
-+ /* See if operation failed and additional status checks are available */
-+ if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
-+ status = this->errstat(mtd, this, FL_ERASING, status, page);
-+ }
-+
-+ /* See if block erase succeeded */
-+ if (status & NAND_STATUS_FAIL) {
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
-+ instr->state = MTD_ERASE_FAILED;
-+ instr->fail_addr = (page << this->page_shift);
-+ goto erase_exit;
-+ }
-+
-+ /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
-+ if (this->options & BBT_AUTO_REFRESH) {
-+ if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
-+ (page != this->bbt_td->pages[chipnr])) {
-+ rewrite_bbt[chipnr] = (page << this->page_shift);
-+ }
-+ }
-+
-+ /* Increment page address and decrement length */
-+ len -= (1 << this->phys_erase_shift);
-+ page += pages_per_block;
-+
-+ /* Check, if we cross a chip boundary */
-+ if (len && !(page & this->pagemask)) {
-+ chipnr++;
-+ this->select_chip(mtd, -1);
-+ this->select_chip(mtd, chipnr);
-+
-+ /* if BBT requires refresh and BBT-PERCHIP,
-+ * set the BBT page mask to see if this BBT should be rewritten */
-+ if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
-+ bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
-+ }
-+
-+ }
-+ }
-+ instr->state = MTD_ERASE_DONE;
-+
-+erase_exit:
-+
-+ ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
-+#if 0
-+ /* Do call back function */
-+ if (!ret)
-+ mtd_erase_callback(instr);
-+#endif
-+
-+ /* Deselect and wake up anyone waiting on the device */
-+ nand_release_device(mtd);
-+
-+#if NAND_BBT_SUPPORT
-+ /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */
-+ if ((this->options & BBT_AUTO_REFRESH) && (!ret)) {
-+ for (chipnr = 0; chipnr < this->numchips; chipnr++) {
-+ if (rewrite_bbt[chipnr]) {
-+ /* update the BBT for chip */
-+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
-+ chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
-+ nand_update_bbt (mtd, rewrite_bbt[chipnr]);
-+ }
-+ }
-+ }
-+#endif
-+
-+ /* Return more or less happy */
-+ return ret;
-+}
-+#endif
-+
-+/**
-+ * nand_sync - [MTD Interface] sync
-+ * @mtd: MTD device structure
-+ *
-+ * Sync is actually a wait for chip ready function
-+ */
-+#if 0 /* not needed */
-+static void nand_sync (struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
-+
-+ /* Grab the lock and see if the device is available */
-+ nand_get_device (this, mtd, FL_SYNCING);
-+ /* Release it and go back */
-+ nand_release_device (mtd);
-+}
-+#endif
-+
-+
-+/**
-+ * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
-+ * @mtd: MTD device structure
-+ * @ofs: offset relative to mtd start
-+ */
-+static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
-+{
-+ /* Check for invalid offset */
-+ if (ofs > mtd->size)
-+ return -EINVAL;
-+
-+ return nand_block_checkbad (mtd, ofs, 1, 0);
-+}
-+
-+/**
-+ * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
-+ * @mtd: MTD device structure
-+ * @ofs: offset relative to mtd start
-+ */
-+#if NAND_WRITE_SUPPORT
-+static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int ret;
-+
-+ if ((ret = nand_block_isbad(mtd, ofs))) {
-+ /* If it was bad already, return success and do nothing. */
-+ if (ret > 0)
-+ return 0;
-+ return ret;
-+ }
-+
-+ return this->block_markbad(mtd, ofs);
-+}
-+#endif
-+
-+/**
-+ * nand_suspend - [MTD Interface] Suspend the NAND flash
-+ * @mtd: MTD device structure
-+ */
-+#if 0 /* don't need it */
-+static int nand_suspend(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ return nand_get_device (this, mtd, FL_PM_SUSPENDED);
-+}
-+#endif
-+
-+/**
-+ * nand_resume - [MTD Interface] Resume the NAND flash
-+ * @mtd: MTD device structure
-+ */
-+#if 0 /* don't need it */
-+static void nand_resume(struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ if (this->state == FL_PM_SUSPENDED)
-+ nand_release_device(mtd);
-+ else
-+ puts("resume() called for the chip which is not in suspended state\n");
-+
-+}
-+#endif
-+
-+
-+/**
-+ * nand_scan - [NAND Interface] Scan for the NAND device
-+ * @mtd: MTD device structure
-+ * @maxchips: Number of chips to scan for
-+ *
-+ * This fills out all the not initialized function pointers
-+ * with the defaults.
-+ * The flash ID is read and the mtd/chip structures are
-+ * filled with the appropriate values. Buffers are allocated if
-+ * they are not provided by the board driver
-+ *
-+ */
-+int nand_scan (struct mtd_info *mtd, int maxchips)
-+{
-+ int i, nand_maf_id, nand_dev_id, busw, maf_id;
-+ struct nand_chip *this = mtd->priv;
-+
-+ /* Get buswidth to select the correct functions*/
-+ busw = this->options & NAND_BUSWIDTH_16;
-+
-+ /* check for proper chip_delay setup, set 20us if not */
-+ if (!this->chip_delay)
-+ this->chip_delay = 20;
-+
-+ /* check, if a user supplied command function given */
-+ if (this->cmdfunc == NULL)
-+ this->cmdfunc = nand_command;
-+
-+ /* check, if a user supplied wait function given */
-+ if (this->waitfunc == NULL)
-+ this->waitfunc = nand_wait;
-+
-+ if (!this->select_chip)
-+ this->select_chip = nand_select_chip;
-+ if (!this->write_byte)
-+ this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
-+ if (!this->read_byte)
-+ this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
-+ if (!this->write_word)
-+ this->write_word = nand_write_word;
-+ if (!this->read_word)
-+ this->read_word = nand_read_word;
-+ if (!this->block_bad)
-+ this->block_bad = nand_block_bad;
-+#if NAND_WRITE_SUPPORT
-+ if (!this->block_markbad)
-+ this->block_markbad = nand_default_block_markbad;
-+#endif
-+ if (!this->write_buf)
-+ this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
-+ if (!this->read_buf)
-+ this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
-+ if (!this->verify_buf)
-+ this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
-+#if NAND_BBT_SUPPORT
-+ if (!this->scan_bbt)
-+ this->scan_bbt = nand_default_bbt;
-+#endif
-+
-+ /* Select the device */
-+ this->select_chip(mtd, 0);
-+
-+ /* Send the command for reading device ID */
-+ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
-+
-+ /* Read manufacturer and device IDs */
-+ nand_maf_id = this->read_byte(mtd);
-+ nand_dev_id = this->read_byte(mtd);
-+
-+ /* Print and store flash device information */
-+ for (i = 0; nand_flash_ids[i].name != NULL; i++) {
-+
-+ if (nand_dev_id != nand_flash_ids[i].id)
-+ continue;
-+
-+ if (!mtd->name) mtd->name = nand_flash_ids[i].name;
-+ this->chipsize = nand_flash_ids[i].chipsize << 20;
-+
-+ /* New devices have all the information in additional id bytes */
-+ if (!nand_flash_ids[i].pagesize) {
-+ int extid;
-+ /* The 3rd id byte contains non relevant data ATM */
-+ extid = this->read_byte(mtd);
-+ /* The 4th id byte is the important one */
-+ extid = this->read_byte(mtd);
-+ /* Calc pagesize */
-+ mtd->oobblock = 1024 << (extid & 0x3);
-+ extid >>= 2;
-+ /* Calc oobsize */
-+ mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9);
-+ extid >>= 2;
-+ /* Calc blocksize. Blocksize is multiples of 64KiB */
-+ mtd->erasesize = (64 * 1024) << (extid & 0x03);
-+ extid >>= 2;
-+ /* Get buswidth information */
-+ busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
-+
-+ } else {
-+ /* Old devices have this data hardcoded in the
-+ * device id table */
-+ mtd->erasesize = nand_flash_ids[i].erasesize;
-+ mtd->oobblock = nand_flash_ids[i].pagesize;
-+ mtd->oobsize = mtd->oobblock / 32;
-+ busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
-+ }
-+
-+ /* Try to identify manufacturer */
-+ for (maf_id = 0; nand_manuf_ids[maf_id].id != 0x0; maf_id++) {
-+ if (nand_manuf_ids[maf_id].id == nand_maf_id)
-+ break;
-+ }
-+
-+ /* Check, if buswidth is correct. Hardware drivers should set
-+ * this correct ! */
-+ if (busw != (this->options & NAND_BUSWIDTH_16)) {
-+#if 0
-+ puts ("Manufacturer ID: ");
-+ putx (nand_maf_id);
-+ puts (", Chip ID: ");
-+ putx (nand_dev_id);
-+ puts (" (");
-+ puts (nand_manuf_ids[maf_id].name);
-+ putc (' ');
-+ puts (mtd->name);
-+ puts (")\r\n");
-+#endif
-+ puts ("Expected NAND bus width ");
-+ putx ((this->options & NAND_BUSWIDTH_16) ? 16 : 8);
-+ puts (",found ");
-+ putx (busw ? 16 : 8);
-+ putnl();
-+ this->select_chip(mtd, -1);
-+ return 1;
-+ }
-+
-+ /* Calculate the address shift from the page size */
-+ this->page_shift = ffs(mtd->oobblock) - 1;
-+ this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
-+ this->chip_shift = ffs(this->chipsize) - 1;
-+
-+ /* Set the bad block position */
-+ this->badblockpos = mtd->oobblock > 512 ?
-+ NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
-+
-+ /* Get chip options, preserve non chip based options */
-+ this->options &= ~NAND_CHIPOPTIONS_MSK;
-+ this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
-+ /* Set this as a default. Board drivers can override it, if neccecary */
-+ this->options |= NAND_NO_AUTOINCR;
-+ /* Check if this is a not a samsung device. Do not clear the options
-+ * for chips which are not having an extended id.
-+ */
-+ if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
-+ this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
-+
-+#if NAND_ERASE_SUPPORT
-+ /* Check for AND chips with 4 page planes */
-+ if (this->options & NAND_4PAGE_ARRAY)
-+ this->erase_cmd = multi_erase_cmd;
-+ else
-+ this->erase_cmd = single_erase_cmd;
-+#endif
-+
-+ /* Do not replace user supplied command function ! */
-+ if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
-+ this->cmdfunc = nand_command_lp;
-+
-+ puts ("Manufacturer ID / Chip ID: ");
-+ putx (nand_maf_id << 8 | nand_dev_id);
-+ puts (" (");
-+ puts (nand_manuf_ids[maf_id].name);
-+ putc (' ');
-+ puts (nand_flash_ids[i].name);
-+ puts (")\r\n");
-+ break;
-+ }
-+
-+ if (!nand_flash_ids[i].name) {
-+ puts ("No NAND device found!!!\r\n");
-+ this->select_chip(mtd, -1);
-+ return 1;
-+ }
-+
-+#if NAND_MULTICHIP_SUPPORT
-+ for (i=1; i < maxchips; i++) {
-+ this->select_chip(mtd, i);
-+
-+ /* Send the command for reading device ID */
-+ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
-+
-+ /* Read manufacturer and device IDs */
-+ if (nand_maf_id != this->read_byte(mtd) ||
-+ nand_dev_id != this->read_byte(mtd))
-+ break;
-+ }
-+ if (i > 1) {
-+ putx (i);
-+ puts (" NAND chips detected\r\n");
-+ }
-+#endif
-+
-+ /* Allocate buffers, if neccecary */
-+ if (!this->oob_buf) {
-+ size_t len;
-+ len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
-+ this->oob_buf = malloc (len);
-+ if (!this->oob_buf) {
-+ puts ("nand_scan(): Cannot allocate oob_buf\r\n");
-+ return -ENOMEM;
-+ }
-+ this->options |= NAND_OOBBUF_ALLOC;
-+ }
-+
-+ if (!this->data_buf) {
-+ size_t len;
-+ len = mtd->oobblock + mtd->oobsize;
-+ this->data_buf = malloc (len);
-+ if (!this->data_buf) {
-+ if (this->options & NAND_OOBBUF_ALLOC)
-+ free (this->oob_buf);
-+ puts ("nand_scan(): Cannot allocate data_buf\r\n");
-+ return -ENOMEM;
-+ }
-+ this->options |= NAND_DATABUF_ALLOC;
-+ }
-+
-+#if NAND_MULTICHIP_SUPP0RT
-+ /* Store the number of chips and calc total size for mtd */
-+ this->numchips = i;
-+ mtd->size = i * this->chipsize;
-+#else
-+ /* Store the number of chips and calc total size for mtd */
-+ this->numchips = 1;
-+ mtd->size = this->chipsize;
-+#endif
-+
-+ /* Convert chipsize to number of pages per chip -1. */
-+ this->pagemask = (this->chipsize >> this->page_shift) - 1;
-+ /* Preset the internal oob buffer */
-+ memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
-+
-+ /* If no default placement scheme is given, select an
-+ * appropriate one */
-+ if (!this->autooob) {
-+ /* Select the appropriate default oob placement scheme for
-+ * placement agnostic filesystems */
-+ switch (mtd->oobsize) {
-+ case 8:
-+ this->autooob = &nand_oob_8;
-+ break;
-+ case 16:
-+ this->autooob = &nand_oob_16;
-+ break;
-+ case 64:
-+ this->autooob = &nand_oob_64;
-+ break;
-+ default:
-+ puts ("No oob scheme defined for oobsize ");
-+ putx (mtd->oobsize);
-+ putnl ();
-+ BUG();
-+ }
-+ }
-+
-+ /* The number of bytes available for the filesystem to place fs dependend
-+ * oob data */
-+ mtd->oobavail = 0;
-+ for (i = 0; this->autooob->oobfree[i][1]; i++)
-+ mtd->oobavail += this->autooob->oobfree[i][1];
-+
-+ /*
-+ * check ECC mode, default to software
-+ * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
-+ * fallback to software ECC
-+ */
-+ this->eccsize = 256; /* set default eccsize */
-+ this->eccbytes = 3;
-+
-+ switch (this->eccmode) {
-+#if NAND_HWECC_SUPPORT
-+ case NAND_ECC_HW12_2048:
-+ if (mtd->oobblock < 2048) {
-+ puts ("2048 byte HW ECC not possible on ");
-+ putx (mtd->oobblock);
-+ puts (" byte page size, fallback to SW ECC\r\n");
-+ this->eccmode = NAND_ECC_SOFT;
-+ this->calculate_ecc = nand_calculate_ecc;
-+ this->correct_data = nand_correct_data;
-+ } else
-+ this->eccsize = 2048;
-+ break;
-+
-+ case NAND_ECC_HW3_512:
-+ case NAND_ECC_HW6_512:
-+ case NAND_ECC_HW8_512:
-+ if (mtd->oobblock == 256) {
-+ puts ("512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC\r\n");
-+ this->eccmode = NAND_ECC_SOFT;
-+ this->calculate_ecc = nand_calculate_ecc;
-+ this->correct_data = nand_correct_data;
-+ } else
-+ this->eccsize = 512; /* set eccsize to 512 */
-+ break;
-+
-+ case NAND_ECC_HW3_256:
-+ break;
-+#endif
-+
-+ case NAND_ECC_NONE:
-+ puts ("NAND_ECC_NONE selected by board driver. This is not recommended !!\r\n");
-+ this->eccmode = NAND_ECC_NONE;
-+ break;
-+
-+ case NAND_ECC_SOFT:
-+ this->calculate_ecc = nand_calculate_ecc;
-+ this->correct_data = nand_correct_data;
-+ break;
-+
-+ default:
-+ puts ("Invalid NAND_ECC_MODE ");
-+ putx (this->eccmode);
-+ putnl ();
-+ BUG();
-+ }
-+
-+ /* Check hardware ecc function availability and adjust number of ecc bytes per
-+ * calculation step
-+ */
-+ switch (this->eccmode) {
-+ case NAND_ECC_HW12_2048:
-+ this->eccbytes += 4;
-+ case NAND_ECC_HW8_512:
-+ this->eccbytes += 2;
-+ case NAND_ECC_HW6_512:
-+ this->eccbytes += 3;
-+ case NAND_ECC_HW3_512:
-+ case NAND_ECC_HW3_256:
-+ if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
-+ break;
-+ puts ("No ECC functions supplied, Hardware ECC not possible\r\n");
-+ BUG();
-+ }
-+
-+ mtd->eccsize = this->eccsize;
-+
-+ /* Set the number of read / write steps for one page to ensure ECC generation */
-+ switch (this->eccmode) {
-+ case NAND_ECC_HW12_2048:
-+ this->eccsteps = mtd->oobblock / 2048;
-+ break;
-+ case NAND_ECC_HW3_512:
-+ case NAND_ECC_HW6_512:
-+ case NAND_ECC_HW8_512:
-+ this->eccsteps = mtd->oobblock / 512;
-+ break;
-+ case NAND_ECC_HW3_256:
-+ case NAND_ECC_SOFT:
-+ this->eccsteps = mtd->oobblock / 256;
-+ break;
-+
-+ case NAND_ECC_NONE:
-+ this->eccsteps = 1;
-+ break;
-+ }
-+
-+ /* Initialize state, waitqueue and spinlock */
-+ this->state = FL_READY;
-+#if 0
-+ init_waitqueue_head (&this->wq);
-+ spin_lock_init (&this->chip_lock);
-+#endif
-+
-+ /* De-select the device */
-+ this->select_chip(mtd, -1);
-+
-+ /* Invalidate the pagebuffer reference */
-+ this->pagebuf = -1;
-+
-+ /* Fill in remaining MTD driver data */
-+ mtd->type = MTD_NANDFLASH;
-+ mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
-+ mtd->ecctype = MTD_ECC_SW;
-+#if NAND_ERASE_SUPPORT
-+ mtd->erase = nand_erase;
-+#endif
-+#if 0 /* not needed */
-+ mtd->point = NULL;
-+ mtd->unpoint = NULL;
-+#endif
-+ mtd->read = nand_read;
-+#if NAND_WRITE_SUPPORT
-+ mtd->write = nand_write;
-+#endif
-+ mtd->read_ecc = nand_read_ecc;
-+#if NAND_WRITE_SUPPORT
-+ mtd->write_ecc = nand_write_ecc;
-+#endif
-+ mtd->read_oob = nand_read_oob;
-+#if NAND_WRITE_SUPPORT
-+ mtd->write_oob = nand_write_oob;
-+#endif
-+#if NAND_KVEC_SUPPORT
-+ mtd->readv = NULL;
-+#endif
-+#if NAND_WRITE_SUPPORT && NAND_KVEC_SUPPORT
-+ mtd->writev = nand_writev;
-+ mtd->writev_ecc = nand_writev_ecc;
-+#endif
-+#if 0 /* not needed */
-+ mtd->sync = nand_sync;
-+ mtd->lock = NULL;
-+ mtd->unlock = NULL;
-+ mtd->suspend = nand_suspend;
-+ mtd->resume = nand_resume;
-+#endif
-+ mtd->block_isbad = nand_block_isbad;
-+#if NAND_WRITE_SUPPORT
-+ mtd->block_markbad = nand_block_markbad;
-+#endif
-+
-+ /* and make the autooob the default one */
-+ memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
-+
-+#ifdef THIS_MODULE /* normally isn't for us */
-+ mtd->owner = THIS_MODULE;
-+#endif
-+
-+ /* Check, if we should skip the bad block table scan */
-+ if (this->options & NAND_SKIP_BBTSCAN)
-+ return 0;
-+
-+#if NAND_BBT_SUPPORT
-+ /* Build bad block table */
-+ return this->scan_bbt (mtd);
-+#else
-+ return -1;
-+#endif
-+}
-+
-+/**
-+ * nand_release - [NAND Interface] Free resources held by the NAND device
-+ * @mtd: MTD device structure
-+*/
-+#if 0 /* don't need it */
-+void nand_release (struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+#if 0
-+#ifdef CONFIG_MTD_PARTITIONS
-+ /* Deregister partitions */
-+ del_mtd_partitions (mtd);
-+#endif
-+ /* Deregister the device */
-+ del_mtd_device (mtd);
-+#endif
-+
-+ /* Free bad block table memory */
-+ free (this->bbt);
-+ /* Buffer allocated by nand_scan ? */
-+ if (this->options & NAND_OOBBUF_ALLOC)
-+ free (this->oob_buf);
-+ /* Buffer allocated by nand_scan ? */
-+ if (this->options & NAND_DATABUF_ALLOC)
-+ free (this->data_buf);
-+}
-+#endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_bbt.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_bbt.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_bbt.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_bbt.c 2006-11-10 09:55:58.000000000 +0100
-@@ -0,0 +1,1151 @@
-+/*
-+ * drivers/mtd/nand_bbt.c
-+ *
-+ * Overview:
-+ * Bad block table support for the NAND driver
-+ *
-+ * Copyright (C) 2004 Thomas Gleixner (tglx@linutronix.de)
-+ *
-+ * $Id: nand_bbt.c,v 1.5 2006/11/10 08:55:58 ricardw Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Description:
-+ *
-+ * When nand_scan_bbt is called, then it tries to find the bad block table
-+ * depending on the options in the bbt descriptor(s). If a bbt is found
-+ * then the contents are read and the memory based bbt is created. If a
-+ * mirrored bbt is selected then the mirror is searched too and the
-+ * versions are compared. If the mirror has a greater version number
-+ * than the mirror bbt is used to build the memory based bbt.
-+ * If the tables are not versioned, then we "or" the bad block information.
-+ * If one of the bbt's is out of date or does not exist it is (re)created.
-+ * If no bbt exists at all then the device is scanned for factory marked
-+ * good / bad blocks and the bad block tables are created.
-+ *
-+ * For manufacturer created bbts like the one found on M-SYS DOC devices
-+ * the bbt is searched and read but never created
-+ *
-+ * The autogenerated bad block table is located in the last good blocks
-+ * of the device. The table is mirrored, so it can be updated eventually.
-+ * The table is marked in the oob area with an ident pattern and a version
-+ * number which indicates which of both tables is more up to date.
-+ *
-+ * The table uses 2 bits per block
-+ * 11b: block is good
-+ * 00b: block is factory marked bad
-+ * 01b, 10b: block is marked bad due to wear
-+ *
-+ * The memory bad block table uses the following scheme:
-+ * 00b: block is good
-+ * 01b: block is marked bad due to wear
-+ * 10b: block is reserved (to protect the bbt area)
-+ * 11b: block is factory marked bad
-+ *
-+ * Multichip devices like DOC store the bad block info per floor.
-+ *
-+ * Following assumptions are made:
-+ * - bbts start at a page boundary, if autolocated on a block boundary
-+ * - the space neccecary for a bbt in FLASH does not exceed a block boundary
-+ *
-+ */
-+
-+#if 0
-+#include <linux/slab.h>
-+#endif
-+
-+#include <linux/types.h>
-+#include "mtd.h"
-+#include "nand.h"
-+#include "nand_ecc.h"
-+
-+#if 0
-+#include <linux/mtd/compatmac.h>
-+#include <linux/bitops.h>
-+#endif
-+
-+#include <linux/delay.h>
-+
-+#include "lib.h"
-+
-+
-+/**
-+ * check_pattern - [GENERIC] check if a pattern is in the buffer
-+ * @buf: the buffer to search
-+ * @len: the length of buffer to search
-+ * @paglen: the pagelength
-+ * @td: search pattern descriptor
-+ *
-+ * Check for a pattern at the given place. Used to search bad block
-+ * tables and good / bad block identifiers.
-+ * If the SCAN_EMPTY option is set then check, if all bytes except the
-+ * pattern area contain 0xff
-+ *
-+*/
-+static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
-+{
-+ int i, end = 0;
-+ uint8_t *p = buf;
-+
-+ end = paglen + td->offs;
-+ if (td->options & NAND_BBT_SCANEMPTY) {
-+ for (i = 0; i < end; i++) {
-+ if (p[i] != 0xff)
-+ return -1;
-+ }
-+ }
-+ p += end;
-+
-+ /* Compare the pattern */
-+ for (i = 0; i < td->len; i++) {
-+ if (p[i] != td->pattern[i])
-+ return -1;
-+ }
-+
-+ if (td->options & NAND_BBT_SCANEMPTY) {
-+ p += td->len;
-+ end += td->len;
-+ for (i = end; i < len; i++) {
-+ if (*p++ != 0xff)
-+ return -1;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * check_short_pattern - [GENERIC] check if a pattern is in the buffer
-+ * @buf: the buffer to search
-+ * @td: search pattern descriptor
-+ *
-+ * Check for a pattern at the given place. Used to search bad block
-+ * tables and good / bad block identifiers. Same as check_pattern, but
-+ * no optional empty check
-+ *
-+*/
-+static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td)
-+{
-+ int i;
-+ uint8_t *p = buf;
-+
-+ /* Compare the pattern */
-+ for (i = 0; i < td->len; i++) {
-+ if (p[td->offs + i] != td->pattern[i])
-+ return -1;
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * read_bbt - [GENERIC] Read the bad block table starting from page
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @page: the starting page
-+ * @num: the number of bbt descriptors to read
-+ * @bits: number of bits per block
-+ * @offs: offset in the memory table
-+ * @reserved_block_code: Pattern to identify reserved blocks
-+ *
-+ * Read the bad block table starting from page.
-+ *
-+ */
-+static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
-+ int bits, int offs, int reserved_block_code)
-+{
-+ int res, i, j, act = 0;
-+ struct nand_chip *this = mtd->priv;
-+ size_t retlen, len, totlen;
-+ loff_t from;
-+ uint8_t msk = (uint8_t) ((1 << bits) - 1);
-+
-+ totlen = (num * bits) >> 3;
-+ from = ((loff_t)page) << this->page_shift;
-+
-+ while (totlen) {
-+ len = min (totlen, (size_t) (1 << this->bbt_erase_shift));
-+ res = mtd->read_ecc (mtd, from, len, &retlen, buf, NULL, this->autooob);
-+ if (res < 0) {
-+ if (retlen != len) {
-+ puts ("nand_bbt: Error reading bad block table\n");
-+ return res;
-+ }
-+ puts ("nand_bbt: ECC error while reading bad block table\n");
-+ }
-+
-+ /* Analyse data */
-+ for (i = 0; i < len; i++) {
-+ uint8_t dat = buf[i];
-+ for (j = 0; j < 8; j += bits, act += 2) {
-+ uint8_t tmp = (dat >> j) & msk;
-+ if (tmp == msk)
-+ continue;
-+ if (reserved_block_code &&
-+ (tmp == reserved_block_code)) {
-+ puts ("nand_read_bbt: Reserved block at");
-+ putx (((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
-+ putnl ();
-+ this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
-+ continue;
-+ }
-+ /* Leave it for now, if its matured we can move this
-+ * message to MTD_DEBUG_LEVEL0 */
-+ puts ("nand_read_bbt: Bad block at ");
-+ putx (((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
-+ putnl ();
-+ /* Factory marked bad or worn out ? */
-+ if (tmp == 0)
-+ this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
-+ else
-+ this->bbt[offs + (act >> 3)] |= 0x1 << (act & 0x06);
-+ }
-+ }
-+ totlen -= len;
-+ from += len;
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * read_abs_bbt - [GENERIC] Read the bad block table starting at a given page
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @td: descriptor for the bad block table
-+ * @chip: read the table for a specific chip, -1 read all chips.
-+ * Applies only if NAND_BBT_PERCHIP option is set
-+ *
-+ * Read the bad block table for all chips starting at a given page
-+ * We assume that the bbt bits are in consecutive order.
-+*/
-+static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int res = 0, i;
-+ int bits;
-+
-+ bits = td->options & NAND_BBT_NRBITS_MSK;
-+ if (td->options & NAND_BBT_PERCHIP) {
-+ int offs = 0;
-+ for (i = 0; i < this->numchips; i++) {
-+ if (chip == -1 || chip == i)
-+ res = read_bbt (mtd, buf, td->pages[i], this->chipsize >> this->bbt_erase_shift, bits, offs, td->reserved_block_code);
-+ if (res)
-+ return res;
-+ offs += this->chipsize >> (this->bbt_erase_shift + 2);
-+ }
-+ } else {
-+ res = read_bbt (mtd, buf, td->pages[0], mtd->size >> this->bbt_erase_shift, bits, 0, td->reserved_block_code);
-+ if (res)
-+ return res;
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * read_abs_bbts - [GENERIC] Read the bad block table(s) for all chips starting at a given page
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @td: descriptor for the bad block table
-+ * @md: descriptor for the bad block table mirror
-+ *
-+ * Read the bad block table(s) for all chips starting at a given page
-+ * We assume that the bbt bits are in consecutive order.
-+ *
-+*/
-+static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td,
-+ struct nand_bbt_descr *md)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ /* Read the primary version, if available */
-+ if (td->options & NAND_BBT_VERSION) {
-+ nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
-+ td->version[0] = buf[mtd->oobblock + td->veroffs];
-+ puts ("Bad block table at page ");
-+ putx (td->pages[0]);
-+ puts (", version ");
-+ putx (td->version[0]);
-+ putnl ();
-+ }
-+
-+ /* Read the mirror version, if available */
-+ if (md && (md->options & NAND_BBT_VERSION)) {
-+ nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
-+ md->version[0] = buf[mtd->oobblock + md->veroffs];
-+ puts ("Bad block table at page ");
-+ putx (md->pages[0]);
-+ puts (", version ");
-+ putx (md->version[0]);
-+ putnl ();
-+ }
-+
-+ return 1;
-+}
-+
-+/**
-+ * create_bbt - [GENERIC] Create a bad block table by scanning the device
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @bd: descriptor for the good/bad block search pattern
-+ * @chip: create the table for a specific chip, -1 read all chips.
-+ * Applies only if NAND_BBT_PERCHIP option is set
-+ *
-+ * Create a bad block table by scanning the device
-+ * for the given good/bad block identify pattern
-+ */
-+static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int i, j, numblocks, len, scanlen;
-+ int startblock;
-+ loff_t from;
-+ size_t readlen, ooblen;
-+
-+ puts ("Scanning device for bad blocks\n");
-+
-+ if (bd->options & NAND_BBT_SCANALLPAGES)
-+ len = 1 << (this->bbt_erase_shift - this->page_shift);
-+ else {
-+ if (bd->options & NAND_BBT_SCAN2NDPAGE)
-+ len = 2;
-+ else
-+ len = 1;
-+ }
-+
-+ if (!(bd->options & NAND_BBT_SCANEMPTY)) {
-+ /* We need only read few bytes from the OOB area */
-+ scanlen = ooblen = 0;
-+ readlen = bd->len;
-+ } else {
-+ /* Full page content should be read */
-+ scanlen = mtd->oobblock + mtd->oobsize;
-+ readlen = len * mtd->oobblock;
-+ ooblen = len * mtd->oobsize;
-+ }
-+
-+ if (chip == -1) {
-+ /* Note that numblocks is 2 * (real numblocks) here, see i+=2 below as it
-+ * makes shifting and masking less painful */
-+ numblocks = mtd->size >> (this->bbt_erase_shift - 1);
-+ startblock = 0;
-+ from = 0;
-+ } else {
-+ if (chip >= this->numchips) {
-+ puts ("create_bbt(): chipnr (");
-+ putx (chip + 1);
-+ puts (" > available chips ");
-+ putx (this->numchips);
-+ putnl ();
-+ return -EINVAL;
-+ }
-+ numblocks = this->chipsize >> (this->bbt_erase_shift - 1);
-+ startblock = chip * numblocks;
-+ numblocks += startblock;
-+ from = startblock << (this->bbt_erase_shift - 1);
-+ }
-+
-+ for (i = startblock; i < numblocks;) {
-+ int ret;
-+
-+ if (bd->options & NAND_BBT_SCANEMPTY)
-+ if ((ret = nand_read_raw (mtd, buf, from, readlen, ooblen)))
-+ return ret;
-+
-+ for (j = 0; j < len; j++) {
-+ if (!(bd->options & NAND_BBT_SCANEMPTY)) {
-+ size_t retlen;
-+
-+ /* Read the full oob until read_oob is fixed to
-+ * handle single byte reads for 16 bit buswidth */
-+ ret = mtd->read_oob(mtd, from + j * mtd->oobblock,
-+ mtd->oobsize, &retlen, buf);
-+ if (ret)
-+ return ret;
-+
-+ if (check_short_pattern (buf, bd)) {
-+ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
-+ puts ("Bad eraseblock ");
-+ putx (i >> 1);
-+ puts (" at ");
-+ putx ((unsigned int) from);
-+ putnl ();
-+ break;
-+ }
-+ } else {
-+ if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
-+ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
-+ puts ("Bad eraseblock ");
-+ putx (i >> 1);
-+ puts (" at ");
-+ putx ((unsigned int) from);
-+ putnl ();
-+ break;
-+ }
-+ }
-+ }
-+ i += 2;
-+ from += (1 << this->bbt_erase_shift);
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * search_bbt - [GENERIC] scan the device for a specific bad block table
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @td: descriptor for the bad block table
-+ *
-+ * Read the bad block table by searching for a given ident pattern.
-+ * Search is preformed either from the beginning up or from the end of
-+ * the device downwards. The search starts always at the start of a
-+ * block.
-+ * If the option NAND_BBT_PERCHIP is given, each chip is searched
-+ * for a bbt, which contains the bad block information of this chip.
-+ * This is neccecary to provide support for certain DOC devices.
-+ *
-+ * The bbt ident pattern resides in the oob area of the first page
-+ * in a block.
-+ */
-+static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int i, chips;
-+ int bits, startblock, block, dir;
-+ int scanlen = mtd->oobblock + mtd->oobsize;
-+ int bbtblocks;
-+
-+ /* Search direction top -> down ? */
-+ if (td->options & NAND_BBT_LASTBLOCK) {
-+ startblock = (mtd->size >> this->bbt_erase_shift) -1;
-+ dir = -1;
-+ } else {
-+ startblock = 0;
-+ dir = 1;
-+ }
-+
-+ /* Do we have a bbt per chip ? */
-+ if (td->options & NAND_BBT_PERCHIP) {
-+ chips = this->numchips;
-+ bbtblocks = this->chipsize >> this->bbt_erase_shift;
-+ startblock &= bbtblocks - 1;
-+ } else {
-+ chips = 1;
-+ bbtblocks = mtd->size >> this->bbt_erase_shift;
-+ }
-+
-+ /* Number of bits for each erase block in the bbt */
-+ bits = td->options & NAND_BBT_NRBITS_MSK;
-+
-+ for (i = 0; i < chips; i++) {
-+ /* Reset version information */
-+ td->version[i] = 0;
-+ td->pages[i] = -1;
-+ /* Scan the maximum number of blocks */
-+ for (block = 0; block < td->maxblocks; block++) {
-+ int actblock = startblock + dir * block;
-+ /* Read first page */
-+ nand_read_raw (mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
-+ if (!check_pattern(buf, scanlen, mtd->oobblock, td)) {
-+ td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift);
-+ if (td->options & NAND_BBT_VERSION) {
-+ td->version[i] = buf[mtd->oobblock + td->veroffs];
-+ }
-+ break;
-+ }
-+ }
-+ startblock += this->chipsize >> this->bbt_erase_shift;
-+ }
-+ /* Check, if we found a bbt for each requested chip */
-+ for (i = 0; i < chips; i++) {
-+ if (td->pages[i] == -1) {
-+ puts ("Bad block table not found for chip ");
-+ putx (i);
-+ putnl ();
-+ } else {
-+ puts ("Bad block table found at page ");
-+ putx (td->pages[i]);
-+ puts (" version ");
-+ putx (td->version[i]);
-+ putnl ();
-+ }
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * search_read_bbts - [GENERIC] scan the device for bad block table(s)
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @td: descriptor for the bad block table
-+ * @md: descriptor for the bad block table mirror
-+ *
-+ * Search and read the bad block table(s)
-+*/
-+static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf,
-+ struct nand_bbt_descr *td, struct nand_bbt_descr *md)
-+{
-+ /* Search the primary table */
-+ search_bbt (mtd, buf, td);
-+
-+ /* Search the mirror table */
-+ if (md)
-+ search_bbt (mtd, buf, md);
-+
-+ /* Force result check */
-+ return 1;
-+}
-+
-+
-+/**
-+ * write_bbt - [GENERIC] (Re)write the bad block table
-+ *
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @td: descriptor for the bad block table
-+ * @md: descriptor for the bad block table mirror
-+ * @chipsel: selector for a specific chip, -1 for all
-+ *
-+ * (Re)write the bad block table
-+ *
-+*/
-+static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
-+ struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ struct nand_oobinfo oobinfo;
-+ struct erase_info einfo;
-+ int i, j, res, chip = 0;
-+ int bits, startblock, dir, page, offs, numblocks, sft, sftmsk;
-+ int nrchips, bbtoffs, pageoffs;
-+ uint8_t msk[4];
-+ uint8_t rcode = td->reserved_block_code;
-+ size_t retlen, len = 0;
-+ loff_t to;
-+
-+ if (!rcode)
-+ rcode = 0xff;
-+ /* Write bad block table per chip rather than per device ? */
-+ if (td->options & NAND_BBT_PERCHIP) {
-+ numblocks = (int) (this->chipsize >> this->bbt_erase_shift);
-+ /* Full device write or specific chip ? */
-+ if (chipsel == -1) {
-+ nrchips = this->numchips;
-+ } else {
-+ nrchips = chipsel + 1;
-+ chip = chipsel;
-+ }
-+ } else {
-+ numblocks = (int) (mtd->size >> this->bbt_erase_shift);
-+ nrchips = 1;
-+ }
-+
-+ /* Loop through the chips */
-+ for (; chip < nrchips; chip++) {
-+
-+ /* There was already a version of the table, reuse the page
-+ * This applies for absolute placement too, as we have the
-+ * page nr. in td->pages.
-+ */
-+ if (td->pages[chip] != -1) {
-+ page = td->pages[chip];
-+ goto write;
-+ }
-+
-+ /* Automatic placement of the bad block table */
-+ /* Search direction top -> down ? */
-+ if (td->options & NAND_BBT_LASTBLOCK) {
-+ startblock = numblocks * (chip + 1) - 1;
-+ dir = -1;
-+ } else {
-+ startblock = chip * numblocks;
-+ dir = 1;
-+ }
-+
-+ for (i = 0; i < td->maxblocks; i++) {
-+ int block = startblock + dir * i;
-+ /* Check, if the block is bad */
-+ switch ((this->bbt[block >> 2] >> (2 * (block & 0x03))) & 0x03) {
-+ case 0x01:
-+ case 0x03:
-+ continue;
-+ }
-+ page = block << (this->bbt_erase_shift - this->page_shift);
-+ /* Check, if the block is used by the mirror table */
-+ if (!md || md->pages[chip] != page)
-+ goto write;
-+ }
-+ puts ("No space left to write bad block table\r\n");
-+ return -ENOSPC;
-+write:
-+
-+ /* Set up shift count and masks for the flash table */
-+ bits = td->options & NAND_BBT_NRBITS_MSK;
-+ switch (bits) {
-+ case 1: sft = 3; sftmsk = 0x07; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x01; break;
-+ case 2: sft = 2; sftmsk = 0x06; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x03; break;
-+ case 4: sft = 1; sftmsk = 0x04; msk[0] = 0x00; msk[1] = 0x0C; msk[2] = ~rcode; msk[3] = 0x0f; break;
-+ case 8: sft = 0; sftmsk = 0x00; msk[0] = 0x00; msk[1] = 0x0F; msk[2] = ~rcode; msk[3] = 0xff; break;
-+ default: return -EINVAL;
-+ }
-+
-+ bbtoffs = chip * (numblocks >> 2);
-+
-+ to = ((loff_t) page) << this->page_shift;
-+
-+ memcpy (&oobinfo, this->autooob, sizeof(oobinfo));
-+ oobinfo.useecc = MTD_NANDECC_PLACEONLY;
-+
-+ /* Must we save the block contents ? */
-+ if (td->options & NAND_BBT_SAVECONTENT) {
-+ /* Make it block aligned */
-+ to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1));
-+ len = 1 << this->bbt_erase_shift;
-+ res = mtd->read_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
-+ if (res < 0) {
-+ if (retlen != len) {
-+ puts ("nand_bbt: Error reading block for writing the bad block table\r\n");
-+ return res;
-+ }
-+ puts ("nand_bbt: ECC error while reading block for writing bad block table\r\n");
-+ }
-+ /* Calc the byte offset in the buffer */
-+ pageoffs = page - (int)(to >> this->page_shift);
-+ offs = pageoffs << this->page_shift;
-+ /* Preset the bbt area with 0xff */
-+ memset (&buf[offs], 0xff, (size_t)(numblocks >> sft));
-+ /* Preset the bbt's oob area with 0xff */
-+ memset (&buf[len + pageoffs * mtd->oobsize], 0xff,
-+ ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
-+ if (td->options & NAND_BBT_VERSION) {
-+ buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip];
-+ }
-+ } else {
-+ /* Calc length */
-+ len = (size_t) (numblocks >> sft);
-+ /* Make it page aligned ! */
-+ len = (len + (mtd->oobblock-1)) & ~(mtd->oobblock-1);
-+ /* Preset the buffer with 0xff */
-+ memset (buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
-+ offs = 0;
-+ /* Pattern is located in oob area of first page */
-+ memcpy (&buf[len + td->offs], td->pattern, td->len);
-+ if (td->options & NAND_BBT_VERSION) {
-+ buf[len + td->veroffs] = td->version[chip];
-+ }
-+ }
-+
-+ /* walk through the memory table */
-+ for (i = 0; i < numblocks; ) {
-+ uint8_t dat;
-+ dat = this->bbt[bbtoffs + (i >> 2)];
-+ for (j = 0; j < 4; j++ , i++) {
-+ int sftcnt = (i << (3 - sft)) & sftmsk;
-+ /* Do not store the reserved bbt blocks ! */
-+ buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt);
-+ dat >>= 2;
-+ }
-+ }
-+
-+ memset (&einfo, 0, sizeof (einfo));
-+ einfo.mtd = mtd;
-+ einfo.addr = (unsigned long) to;
-+ einfo.len = 1 << this->bbt_erase_shift;
-+ res = nand_erase_nand (mtd, &einfo, 1);
-+ if (res < 0) {
-+ puts ("nand_bbt: Error during block erase: ");
-+ putx (res);
-+ putnl();
-+ return res;
-+ }
-+
-+ res = mtd->write_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
-+ if (res < 0) {
-+ puts ("nand_bbt: Error while writing bad block table ");
-+ putx (res);
-+ putnl ();
-+ return res;
-+ }
-+ puts ("Bad block table written to ");
-+ putx ((unsigned int) to);
-+ puts (", version ");
-+ putx (td->version[chip]);
-+ putnl ();
-+
-+ /* Mark it as used */
-+ td->pages[chip] = page;
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * nand_memory_bbt - [GENERIC] create a memory based bad block table
-+ * @mtd: MTD device structure
-+ * @bd: descriptor for the good/bad block search pattern
-+ *
-+ * The function creates a memory based bbt by scanning the device
-+ * for manufacturer / software marked good / bad blocks
-+*/
-+static inline int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ bd->options &= ~NAND_BBT_SCANEMPTY;
-+ return create_bbt (mtd, this->data_buf, bd, -1);
-+}
-+
-+/**
-+ * check_create - [GENERIC] create and write bbt(s) if neccecary
-+ * @mtd: MTD device structure
-+ * @buf: temporary buffer
-+ * @bd: descriptor for the good/bad block search pattern
-+ *
-+ * The function checks the results of the previous call to read_bbt
-+ * and creates / updates the bbt(s) if neccecary
-+ * Creation is neccecary if no bbt was found for the chip/device
-+ * Update is neccecary if one of the tables is missing or the
-+ * version nr. of one table is less than the other
-+*/
-+static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
-+{
-+ int i, chips, writeops, chipsel, res;
-+ struct nand_chip *this = mtd->priv;
-+ struct nand_bbt_descr *td = this->bbt_td;
-+ struct nand_bbt_descr *md = this->bbt_md;
-+ struct nand_bbt_descr *rd, *rd2;
-+
-+ /* Do we have a bbt per chip ? */
-+ if (td->options & NAND_BBT_PERCHIP)
-+ chips = this->numchips;
-+ else
-+ chips = 1;
-+
-+ for (i = 0; i < chips; i++) {
-+ writeops = 0;
-+ rd = NULL;
-+ rd2 = NULL;
-+ /* Per chip or per device ? */
-+ chipsel = (td->options & NAND_BBT_PERCHIP) ? i : -1;
-+ /* Mirrored table avilable ? */
-+ if (md) {
-+ if (td->pages[i] == -1 && md->pages[i] == -1) {
-+ writeops = 0x03;
-+ goto create;
-+ }
-+
-+ if (td->pages[i] == -1) {
-+ rd = md;
-+ td->version[i] = md->version[i];
-+ writeops = 1;
-+ goto writecheck;
-+ }
-+
-+ if (md->pages[i] == -1) {
-+ rd = td;
-+ md->version[i] = td->version[i];
-+ writeops = 2;
-+ goto writecheck;
-+ }
-+
-+ if (td->version[i] == md->version[i]) {
-+ rd = td;
-+ if (!(td->options & NAND_BBT_VERSION))
-+ rd2 = md;
-+ goto writecheck;
-+ }
-+
-+ if (((int8_t) (td->version[i] - md->version[i])) > 0) {
-+ rd = td;
-+ md->version[i] = td->version[i];
-+ writeops = 2;
-+ } else {
-+ rd = md;
-+ td->version[i] = md->version[i];
-+ writeops = 1;
-+ }
-+
-+ goto writecheck;
-+
-+ } else {
-+ if (td->pages[i] == -1) {
-+ writeops = 0x01;
-+ goto create;
-+ }
-+ rd = td;
-+ goto writecheck;
-+ }
-+create:
-+ /* Create the bad block table by scanning the device ? */
-+ if (!(td->options & NAND_BBT_CREATE))
-+ continue;
-+
-+ /* Create the table in memory by scanning the chip(s) */
-+ create_bbt (mtd, buf, bd, chipsel);
-+
-+ td->version[i] = 1;
-+ if (md)
-+ md->version[i] = 1;
-+writecheck:
-+ /* read back first ? */
-+ if (rd)
-+ read_abs_bbt (mtd, buf, rd, chipsel);
-+ /* If they weren't versioned, read both. */
-+ if (rd2)
-+ read_abs_bbt (mtd, buf, rd2, chipsel);
-+
-+ /* Write the bad block table to the device ? */
-+ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
-+ res = write_bbt (mtd, buf, td, md, chipsel);
-+ if (res < 0)
-+ return res;
-+ }
-+
-+ /* Write the mirror bad block table to the device ? */
-+ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
-+ res = write_bbt (mtd, buf, md, td, chipsel);
-+ if (res < 0)
-+ return res;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/**
-+ * mark_bbt_regions - [GENERIC] mark the bad block table regions
-+ * @mtd: MTD device structure
-+ * @td: bad block table descriptor
-+ *
-+ * The bad block table regions are marked as "bad" to prevent
-+ * accidental erasures / writes. The regions are identified by
-+ * the mark 0x02.
-+*/
-+static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int i, j, chips, block, nrblocks, update;
-+ uint8_t oldval, newval;
-+
-+ /* Do we have a bbt per chip ? */
-+ if (td->options & NAND_BBT_PERCHIP) {
-+ chips = this->numchips;
-+ nrblocks = (int)(this->chipsize >> this->bbt_erase_shift);
-+ } else {
-+ chips = 1;
-+ nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
-+ }
-+
-+ for (i = 0; i < chips; i++) {
-+ if ((td->options & NAND_BBT_ABSPAGE) ||
-+ !(td->options & NAND_BBT_WRITE)) {
-+ if (td->pages[i] == -1) continue;
-+ block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
-+ block <<= 1;
-+ oldval = this->bbt[(block >> 3)];
-+ newval = oldval | (0x2 << (block & 0x06));
-+ this->bbt[(block >> 3)] = newval;
-+ if ((oldval != newval) && td->reserved_block_code)
-+ nand_update_bbt(mtd, block << (this->bbt_erase_shift - 1));
-+ continue;
-+ }
-+ update = 0;
-+ if (td->options & NAND_BBT_LASTBLOCK)
-+ block = ((i + 1) * nrblocks) - td->maxblocks;
-+ else
-+ block = i * nrblocks;
-+ block <<= 1;
-+ for (j = 0; j < td->maxblocks; j++) {
-+ oldval = this->bbt[(block >> 3)];
-+ newval = oldval | (0x2 << (block & 0x06));
-+ this->bbt[(block >> 3)] = newval;
-+ if (oldval != newval) update = 1;
-+ block += 2;
-+ }
-+ /* If we want reserved blocks to be recorded to flash, and some
-+ new ones have been marked, then we need to update the stored
-+ bbts. This should only happen once. */
-+ if (update && td->reserved_block_code)
-+ nand_update_bbt(mtd, (block - 2) << (this->bbt_erase_shift - 1));
-+ }
-+}
-+
-+/**
-+ * nand_scan_bbt - [NAND Interface] scan, find, read and maybe create bad block table(s)
-+ * @mtd: MTD device structure
-+ * @bd: descriptor for the good/bad block search pattern
-+ *
-+ * The function checks, if a bad block table(s) is/are already
-+ * available. If not it scans the device for manufacturer
-+ * marked good / bad blocks and writes the bad block table(s) to
-+ * the selected place.
-+ *
-+ * The bad block table memory is allocated here. It must be freed
-+ * by calling the nand_free_bbt function.
-+ *
-+*/
-+int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int len, res = 0;
-+ uint8_t *buf;
-+ struct nand_bbt_descr *td = this->bbt_td;
-+ struct nand_bbt_descr *md = this->bbt_md;
-+
-+ len = mtd->size >> (this->bbt_erase_shift + 2);
-+ /* Allocate memory (2bit per block) */
-+ this->bbt = malloc (len);
-+ if (!this->bbt) {
-+ puts ("nand_scan_bbt: Out of memory\r\n");
-+ return -ENOMEM;
-+ }
-+ /* Clear the memory bad block table */
-+ memset (this->bbt, 0x00, len);
-+
-+ /* If no primary table decriptor is given, scan the device
-+ * to build a memory based bad block table
-+ */
-+ if (!td) {
-+ if ((res = nand_memory_bbt(mtd, bd))) {
-+ puts ("nand_bbt: Can't scan flash and build the RAM-based BBT\r\n");
-+ free (this->bbt);
-+ this->bbt = NULL;
-+ }
-+ return res;
-+ }
-+
-+ /* Allocate a temporary buffer for one eraseblock incl. oob */
-+ len = (1 << this->bbt_erase_shift);
-+ len += (len >> this->page_shift) * mtd->oobsize;
-+ buf = malloc (len);
-+ if (!buf) {
-+ puts ("nand_bbt: Out of memory\r\n");
-+ free (this->bbt);
-+ this->bbt = NULL;
-+ return -ENOMEM;
-+ }
-+
-+ /* Is the bbt at a given page ? */
-+ if (td->options & NAND_BBT_ABSPAGE) {
-+ res = read_abs_bbts (mtd, buf, td, md);
-+ } else {
-+ /* Search the bad block table using a pattern in oob */
-+ res = search_read_bbts (mtd, buf, td, md);
-+ }
-+
-+ if (res)
-+ res = check_create (mtd, buf, bd);
-+
-+ /* Prevent the bbt regions from erasing / writing */
-+ mark_bbt_region (mtd, td);
-+ if (md)
-+ mark_bbt_region (mtd, md);
-+
-+ free (buf);
-+ return res;
-+}
-+
-+
-+/**
-+ * nand_update_bbt - [NAND Interface] update bad block table(s)
-+ * @mtd: MTD device structure
-+ * @offs: the offset of the newly marked block
-+ *
-+ * The function updates the bad block table(s)
-+*/
-+int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int len, res = 0, writeops = 0;
-+ int chip, chipsel;
-+ uint8_t *buf;
-+ struct nand_bbt_descr *td = this->bbt_td;
-+ struct nand_bbt_descr *md = this->bbt_md;
-+
-+ if (!this->bbt || !td)
-+ return -EINVAL;
-+
-+ len = mtd->size >> (this->bbt_erase_shift + 2);
-+ /* Allocate a temporary buffer for one eraseblock incl. oob */
-+ len = (1 << this->bbt_erase_shift);
-+ len += (len >> this->page_shift) * mtd->oobsize;
-+ buf = malloc (len);
-+ if (!buf) {
-+ puts ("nand_update_bbt: Out of memory\r\n");
-+ return -ENOMEM;
-+ }
-+
-+ writeops = md != NULL ? 0x03 : 0x01;
-+
-+ /* Do we have a bbt per chip ? */
-+ if (td->options & NAND_BBT_PERCHIP) {
-+ chip = (int) (offs >> this->chip_shift);
-+ chipsel = chip;
-+ } else {
-+ chip = 0;
-+ chipsel = -1;
-+ }
-+
-+ td->version[chip]++;
-+ if (md)
-+ md->version[chip]++;
-+
-+ /* Write the bad block table to the device ? */
-+ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
-+ res = write_bbt (mtd, buf, td, md, chipsel);
-+ if (res < 0)
-+ goto out;
-+ }
-+ /* Write the mirror bad block table to the device ? */
-+ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
-+ res = write_bbt (mtd, buf, md, td, chipsel);
-+ }
-+
-+out:
-+ free (buf);
-+ return res;
-+}
-+
-+/* Define some generic bad / good block scan pattern which are used
-+ * while scanning a device for factory marked good / bad blocks. */
-+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
-+
-+static struct nand_bbt_descr smallpage_memorybased = {
-+ .options = NAND_BBT_SCAN2NDPAGE,
-+ .offs = 5,
-+ .len = 1,
-+ .pattern = scan_ff_pattern
-+};
-+
-+static struct nand_bbt_descr largepage_memorybased = {
-+ .options = 0,
-+ .offs = 0,
-+ .len = 2,
-+ .pattern = scan_ff_pattern
-+};
-+
-+static struct nand_bbt_descr smallpage_flashbased = {
-+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
-+ .offs = 5,
-+ .len = 1,
-+ .pattern = scan_ff_pattern
-+};
-+
-+static struct nand_bbt_descr largepage_flashbased = {
-+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
-+ .offs = 0,
-+ .len = 2,
-+ .pattern = scan_ff_pattern
-+};
-+
-+static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 };
-+
-+static struct nand_bbt_descr agand_flashbased = {
-+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
-+ .offs = 0x20,
-+ .len = 6,
-+ .pattern = scan_agand_pattern
-+};
-+
-+/* Generic flash bbt decriptors
-+*/
-+static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
-+static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
-+
-+static struct nand_bbt_descr bbt_main_descr = {
-+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+ .offs = 8,
-+ .len = 4,
-+ .veroffs = 12,
-+ .maxblocks = 4,
-+ .pattern = bbt_pattern
-+};
-+
-+static struct nand_bbt_descr bbt_mirror_descr = {
-+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+ .offs = 8,
-+ .len = 4,
-+ .veroffs = 12,
-+ .maxblocks = 4,
-+ .pattern = mirror_pattern
-+};
-+
-+/**
-+ * nand_default_bbt - [NAND Interface] Select a default bad block table for the device
-+ * @mtd: MTD device structure
-+ *
-+ * This function selects the default bad block table
-+ * support for the device and calls the nand_scan_bbt function
-+ *
-+*/
-+int nand_default_bbt (struct mtd_info *mtd)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ /* Default for AG-AND. We must use a flash based
-+ * bad block table as the devices have factory marked
-+ * _good_ blocks. Erasing those blocks leads to loss
-+ * of the good / bad information, so we _must_ store
-+ * this information in a good / bad table during
-+ * startup
-+ */
-+ if (this->options & NAND_IS_AND) {
-+ /* Use the default pattern descriptors */
-+ if (!this->bbt_td) {
-+ this->bbt_td = &bbt_main_descr;
-+ this->bbt_md = &bbt_mirror_descr;
-+ }
-+ this->options |= NAND_USE_FLASH_BBT;
-+ return nand_scan_bbt (mtd, &agand_flashbased);
-+ }
-+
-+
-+ /* Is a flash based bad block table requested ? */
-+ if (this->options & NAND_USE_FLASH_BBT) {
-+ /* Use the default pattern descriptors */
-+ if (!this->bbt_td) {
-+ this->bbt_td = &bbt_main_descr;
-+ this->bbt_md = &bbt_mirror_descr;
-+ }
-+ if (!this->badblock_pattern) {
-+ this->badblock_pattern = (mtd->oobblock > 512) ?
-+ &largepage_flashbased : &smallpage_flashbased;
-+ }
-+ } else {
-+ this->bbt_td = NULL;
-+ this->bbt_md = NULL;
-+ if (!this->badblock_pattern) {
-+ this->badblock_pattern = (mtd->oobblock > 512) ?
-+ &largepage_memorybased : &smallpage_memorybased;
-+ }
-+ }
-+ return nand_scan_bbt (mtd, this->badblock_pattern);
-+}
-+
-+/**
-+ * nand_isbad_bbt - [NAND Interface] Check if a block is bad
-+ * @mtd: MTD device structure
-+ * @offs: offset in the device
-+ * @allowbbt: allow access to bad block table region
-+ *
-+*/
-+int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt)
-+{
-+ struct nand_chip *this = mtd->priv;
-+ int block;
-+ uint8_t res;
-+
-+ /* Get block number * 2 */
-+ block = (int) (offs >> (this->bbt_erase_shift - 1));
-+ res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
-+
-+ DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
-+ (unsigned int)offs, block >> 1, res);
-+
-+ switch ((int)res) {
-+ case 0x00: return 0;
-+ case 0x01: return 1;
-+ case 0x02: return allowbbt ? 0 : 1;
-+ }
-+ return 1;
-+}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.c 2006-08-04 16:38:14.000000000 +0200
-@@ -0,0 +1,246 @@
-+/*
-+ * This file contains an ECC algorithm from Toshiba that detects and
-+ * corrects 1 bit errors in a 256 byte block of data.
-+ *
-+ * Taken from drivers/mtd/nand/nand_ecc.c, modified for
-+ * NAND flash boot on Etrax FS.
-+ *
-+ * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
-+ * Toshiba America Electronics Components, Inc.
-+ *
-+ * $Id: nand_ecc.c,v 1.1 2006/08/04 14:38:14 ricardw Exp $
-+ *
-+ * This file is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 or (at your option) any
-+ * later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-+ * for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this file; if not, write to the Free Software Foundation, Inc.,
-+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
-+ *
-+ * As a special exception, if other files instantiate templates or use
-+ * macros or inline functions from these files, or you compile these
-+ * files and link them with other works to produce a work based on these
-+ * files, these files do not by themselves cause the resulting work to be
-+ * covered by the GNU General Public License. However the source code for
-+ * these files must still be made available in accordance with section (3)
-+ * of the GNU General Public License.
-+ *
-+ * This exception does not invalidate any other reasons why a work based on
-+ * this file might be covered by the GNU General Public License.
-+ */
-+
-+#include <linux/types.h>
-+#if 0
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#endif
-+#include "nand_ecc.h"
-+
-+/*
-+ * Pre-calculated 256-way 1 byte column parity
-+ */
-+static const u_char nand_ecc_precalc_table[] = {
-+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
-+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
-+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
-+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
-+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
-+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
-+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
-+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
-+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
-+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
-+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
-+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
-+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
-+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
-+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
-+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
-+};
-+
-+
-+/**
-+ * nand_trans_result - [GENERIC] create non-inverted ECC
-+ * @reg2: line parity reg 2
-+ * @reg3: line parity reg 3
-+ * @ecc_code: ecc
-+ *
-+ * Creates non-inverted ECC code from line parity
-+ */
-+static void nand_trans_result(u_char reg2, u_char reg3,
-+ u_char *ecc_code)
-+{
-+ u_char a, b, i, tmp1, tmp2;
-+
-+ /* Initialize variables */
-+ a = b = 0x80;
-+ tmp1 = tmp2 = 0;
-+
-+ /* Calculate first ECC byte */
-+ for (i = 0; i < 4; i++) {
-+ if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
-+ tmp1 |= b;
-+ b >>= 1;
-+ if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
-+ tmp1 |= b;
-+ b >>= 1;
-+ a >>= 1;
-+ }
-+
-+ /* Calculate second ECC byte */
-+ b = 0x80;
-+ for (i = 0; i < 4; i++) {
-+ if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
-+ tmp2 |= b;
-+ b >>= 1;
-+ if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
-+ tmp2 |= b;
-+ b >>= 1;
-+ a >>= 1;
-+ }
-+
-+ /* Store two of the ECC bytes */
-+ ecc_code[0] = tmp1;
-+ ecc_code[1] = tmp2;
-+}
-+
-+/**
-+ * nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
-+ * @mtd: MTD block structure
-+ * @dat: raw data
-+ * @ecc_code: buffer for ECC
-+ */
-+int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
-+{
-+ u_char idx, reg1, reg2, reg3;
-+ int j;
-+
-+ /* Initialize variables */
-+ reg1 = reg2 = reg3 = 0;
-+ ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
-+
-+ /* Build up column parity */
-+ for(j = 0; j < 256; j++) {
-+
-+ /* Get CP0 - CP5 from table */
-+ idx = nand_ecc_precalc_table[dat[j]];
-+ reg1 ^= (idx & 0x3f);
-+
-+ /* All bit XOR = 1 ? */
-+ if (idx & 0x40) {
-+ reg3 ^= (u_char) j;
-+ reg2 ^= ~((u_char) j);
-+ }
-+ }
-+
-+ /* Create non-inverted ECC code from line parity */
-+ nand_trans_result(reg2, reg3, ecc_code);
-+
-+ /* Calculate final ECC code */
-+ ecc_code[0] = ~ecc_code[0];
-+ ecc_code[1] = ~ecc_code[1];
-+ ecc_code[2] = ((~reg1) << 2) | 0x03;
-+ return 0;
-+}
-+
-+/**
-+ * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
-+ * @mtd: MTD block structure
-+ * @dat: raw data read from the chip
-+ * @read_ecc: ECC from the chip
-+ * @calc_ecc: the ECC calculated from raw data
-+ *
-+ * Detect and correct a 1 bit error for 256 byte block
-+ */
-+int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
-+{
-+ u_char a, b, c, d1, d2, d3, add, bit, i;
-+
-+ /* Do error detection */
-+ d1 = calc_ecc[0] ^ read_ecc[0];
-+ d2 = calc_ecc[1] ^ read_ecc[1];
-+ d3 = calc_ecc[2] ^ read_ecc[2];
-+
-+ if ((d1 | d2 | d3) == 0) {
-+ /* No errors */
-+ return 0;
-+ }
-+ else {
-+ a = (d1 ^ (d1 >> 1)) & 0x55;
-+ b = (d2 ^ (d2 >> 1)) & 0x55;
-+ c = (d3 ^ (d3 >> 1)) & 0x54;
-+
-+ /* Found and will correct single bit error in the data */
-+ if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
-+ c = 0x80;
-+ add = 0;
-+ a = 0x80;
-+ for (i=0; i<4; i++) {
-+ if (d1 & c)
-+ add |= a;
-+ c >>= 2;
-+ a >>= 1;
-+ }
-+ c = 0x80;
-+ for (i=0; i<4; i++) {
-+ if (d2 & c)
-+ add |= a;
-+ c >>= 2;
-+ a >>= 1;
-+ }
-+ bit = 0;
-+ b = 0x04;
-+ c = 0x80;
-+ for (i=0; i<3; i++) {
-+ if (d3 & c)
-+ bit |= b;
-+ c >>= 2;
-+ b >>= 1;
-+ }
-+ b = 0x01;
-+ a = dat[add];
-+ a ^= (b << bit);
-+ dat[add] = a;
-+ return 1;
-+ }
-+ else {
-+ i = 0;
-+ while (d1) {
-+ if (d1 & 0x01)
-+ ++i;
-+ d1 >>= 1;
-+ }
-+ while (d2) {
-+ if (d2 & 0x01)
-+ ++i;
-+ d2 >>= 1;
-+ }
-+ while (d3) {
-+ if (d3 & 0x01)
-+ ++i;
-+ d3 >>= 1;
-+ }
-+ if (i == 1) {
-+ /* ECC Code Error Correction */
-+ read_ecc[0] = calc_ecc[0];
-+ read_ecc[1] = calc_ecc[1];
-+ read_ecc[2] = calc_ecc[2];
-+ return 2;
-+ }
-+ else {
-+ /* Uncorrectable Error */
-+ return -1;
-+ }
-+ }
-+ }
-+
-+ /* Should never happen */
-+ return -1;
-+}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.h 2006-08-04 16:38:14.000000000 +0200
-@@ -0,0 +1,30 @@
-+/*
-+ * drivers/mtd/nand_ecc.h
-+ *
-+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
-+ *
-+ * $Id: nand_ecc.h,v 1.1 2006/08/04 14:38:14 ricardw Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This file is the header for the ECC algorithm.
-+ */
-+
-+#ifndef __MTD_NAND_ECC_H__
-+#define __MTD_NAND_ECC_H__
-+
-+struct mtd_info;
-+
-+/*
-+ * Calculate 3 byte ECC code for 256 byte block
-+ */
-+int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
-+
-+/*
-+ * Detect and correct a 1 bit error for 256 byte block
-+ */
-+int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
-+
-+#endif /* __MTD_NAND_ECC_H__ */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ids.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ids.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ids.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ids.c 2006-08-04 16:38:14.000000000 +0200
-@@ -0,0 +1,133 @@
-+/*
-+ * drivers/mtd/nandids.c
-+ *
-+ * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
-+ *
-+ * $Id: nand_ids.c,v 1.1 2006/08/04 14:38:14 ricardw Exp $
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#if 0
-+#include <linux/module.h>
-+#endif
-+
-+#include "nand.h"
-+/*
-+* Chip ID list
-+*
-+* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
-+* options
-+*
-+* Pagesize; 0, 256, 512
-+* 0 get this information from the extended chip ID
-++ 256 256 Byte page size
-+* 512 512 Byte page size
-+*/
-+struct nand_flash_dev nand_flash_ids[] = {
-+ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
-+ {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
-+ {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
-+ {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
-+ {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
-+ {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
-+ {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
-+ {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
-+ {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
-+ {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
-+
-+ {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
-+ {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
-+ {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
-+ {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
-+
-+ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
-+ {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
-+ {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
-+
-+ {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
-+ {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
-+ {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
-+
-+ {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
-+ {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
-+ {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
-+
-+ {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
-+ {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
-+ {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
-+ {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-+ {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-+
-+ {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
-+
-+ /* These are the new chips with large page size. The pagesize
-+ * and the erasesize is determined from the extended id bytes
-+ */
-+ /*512 Megabit */
-+ {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* 1 Gigabit */
-+ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* 2 Gigabit */
-+ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* 4 Gigabit */
-+ {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* 8 Gigabit */
-+ {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* 16 Gigabit */
-+ {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-+ {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+ {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-+
-+ /* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
-+ * The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
-+ * 1 block = 2 pages, but due to plane arrangement the blocks 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7
-+ * Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
-+ * There are more speed improvements for reads and writes possible, but not implemented now
-+ */
-+ {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
-+
-+ {NULL,}
-+};
-+
-+/*
-+* Manufacturer ID list
-+*/
-+struct nand_manufacturers nand_manuf_ids[] = {
-+ {NAND_MFR_TOSHIBA, "Toshiba"},
-+ {NAND_MFR_SAMSUNG, "Samsung"},
-+ {NAND_MFR_FUJITSU, "Fujitsu"},
-+ {NAND_MFR_NATIONAL, "National"},
-+ {NAND_MFR_RENESAS, "Renesas"},
-+ {NAND_MFR_STMICRO, "ST Micro"},
-+ {NAND_MFR_HYNIX, "Hynix"},
-+ {0x0, "Unknown"}
-+};
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/rescue.ld linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/rescue.ld
---- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/rescue.ld 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/rescue.ld 2006-10-18 10:52:47.000000000 +0200
-@@ -1,20 +1,40 @@
--MEMORY
-+/*#OUTPUT_FORMAT(elf32-us-cris) */
-+OUTPUT_ARCH (crisv32)
-+
-+MEMORY
- {
-- flash : ORIGIN = 0x00000000,
-- LENGTH = 0x00100000
-+ bootblk : ORIGIN = 0x38000000,
-+ LENGTH = 0x00004000
-+ intmem : ORIGIN = 0x38004000,
-+ LENGTH = 0x00005000
- }
-
- SECTIONS
- {
- .text :
- {
-- stext = . ;
-+ _stext = . ;
- *(.text)
-- etext = . ;
-- } > flash
-+ *(.rodata)
-+ *(.rodata.*)
-+ _etext = . ;
-+ } > bootblk
- .data :
- {
- *(.data)
-- edata = . ;
-- } > flash
-+ _edata = . ;
-+ } > bootblk
-+ .bss :
-+ {
-+ _bss = . ;
-+ *(.bss)
-+ _end = ALIGN( 0x10 ) ;
-+ } > intmem
-+
-+ /* Get rid of stuff from EXPORT_SYMBOL(foo). */
-+ /DISCARD/ :
-+ {
-+ *(__ksymtab_strings)
-+ *(__ksymtab)
-+ }
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Kconfig
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Kconfig 2007-01-29 16:14:16.000000000 +0100
-@@ -6,14 +6,6 @@
- This option enables the ETRAX FS built-in 10/100Mbit Ethernet
- controller.
-
--config ETRAX_ETHERNET_HW_CSUM
-- bool "Hardware accelerated ethernet checksum and scatter/gather"
-- depends on ETRAX_ETHERNET
-- depends on ETRAX_STREAMCOPROC
-- default y
-- help
-- Hardware acceleration of checksumming and scatter/gather
--
- config ETRAX_ETHERNET_IFACE0
- depends on ETRAX_ETHERNET
- bool "Enable network interface 0"
-@@ -23,6 +15,52 @@
- bool "Enable network interface 1 (uses DMA6 and DMA7)"
-
- choice
-+ prompt "Eth0 led group"
-+ depends on ETRAX_ETHERNET_IFACE0
-+ default ETRAX_ETH0_USE_LEDGRP0
-+
-+config ETRAX_ETH0_USE_LEDGRP0
-+ bool "Use LED grp 0"
-+ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
-+ help
-+ Use LED grp 0 for eth0
-+
-+config ETRAX_ETH0_USE_LEDGRP1
-+ bool "Use LED grp 1"
-+ depends on ETRAX_NBR_LED_GRP_TWO
-+ help
-+ Use LED grp 1 for eth0
-+
-+config ETRAX_ETH0_USE_LEDGRPNULL
-+ bool "Use no LEDs for eth0"
-+ help
-+ Use no LEDs for eth0
-+endchoice
-+
-+choice
-+ prompt "Eth1 led group"
-+ depends on ETRAX_ETHERNET_IFACE1
-+ default ETRAX_ETH1_USE_LEDGRP1
-+
-+config ETRAX_ETH1_USE_LEDGRP0
-+ bool "Use LED grp 0"
-+ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
-+ help
-+ Use LED grp 0 for eth1
-+
-+config ETRAX_ETH1_USE_LEDGRP1
-+ bool "Use LED grp 1"
-+ depends on ETRAX_NBR_LED_GRP_TWO
-+ help
-+ Use LED grp 1 for eth1
-+
-+config ETRAX_ETH1_USE_LEDGRPNULL
-+ bool "Use no LEDs for eth1"
-+ help
-+ Use no LEDs for eth1
-+endchoice
-+
-+choice
- prompt "Network LED behavior"
- depends on ETRAX_ETHERNET
- default ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
-@@ -56,10 +94,25 @@
- config ETRAXFS_SERIAL
- bool "Serial-port support"
- depends on ETRAX_ARCH_V32
-+ select SERIAL_CORE
-+ select SERIAL_CORE_CONSOLE
- help
- Enables the ETRAX FS serial driver for ser0 (ttyS0)
- You probably want this enabled.
-
-+config ETRAX_RS485
-+ bool "RS-485 support"
-+ depends on ETRAXFS_SERIAL
-+ help
-+ Enables support for RS-485 serial communication.
-+
-+config ETRAX_RS485_DISABLE_RECEIVER
-+ bool "Disable serial receiver"
-+ depends on ETRAX_RS485
-+ help
-+ It is necessary to disable the serial receiver to avoid serial
-+ loopback. Not all products are able to do this in software only.
-+
- config ETRAX_SERIAL_PORT0
- bool "Serial port 0 enabled"
- depends on ETRAXFS_SERIAL
-@@ -70,6 +123,31 @@
- ser0 can use dma4 or dma6 for output and dma5 or dma7 for input.
-
- choice
-+ prompt "Ser0 default port type "
-+ depends on ETRAX_SERIAL_PORT0
-+ default ETRAX_SERIAL_PORT0_TYPE_232
-+ help
-+ Type of serial port.
-+
-+config ETRAX_SERIAL_PORT0_TYPE_232
-+ bool "Ser0 is a RS-232 port"
-+ help
-+ Configure serial port 0 to be a RS-232 port.
-+
-+config ETRAX_SERIAL_PORT0_TYPE_485HD
-+ bool "Ser0 is a half duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 0 to be a half duplex (two wires) RS-485 port.
-+
-+config ETRAX_SERIAL_PORT0_TYPE_485FD
-+ bool "Ser0 is a full duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 0 to be a full duplex (four wires) RS-485 port.
-+endchoice
-+
-+choice
- prompt "Ser0 DMA in channel "
- depends on ETRAX_SERIAL_PORT0
- default ETRAX_SERIAL_PORT0_NO_DMA_IN
-@@ -139,6 +217,31 @@
- Enables the ETRAX FS serial driver for ser1 (ttyS1).
-
- choice
-+ prompt "Ser1 default port type"
-+ depends on ETRAX_SERIAL_PORT1
-+ default ETRAX_SERIAL_PORT1_TYPE_232
-+ help
-+ Type of serial port.
-+
-+config ETRAX_SERIAL_PORT1_TYPE_232
-+ bool "Ser1 is a RS-232 port"
-+ help
-+ Configure serial port 1 to be a RS-232 port.
-+
-+config ETRAX_SERIAL_PORT1_TYPE_485HD
-+ bool "Ser1 is a half duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 1 to be a half duplex (two wires) RS-485 port.
-+
-+config ETRAX_SERIAL_PORT1_TYPE_485FD
-+ bool "Ser1 is a full duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 1 to be a full duplex (four wires) RS-485 port.
-+endchoice
-+
-+choice
- prompt "Ser1 DMA in channel "
- depends on ETRAX_SERIAL_PORT1
- default ETRAX_SERIAL_PORT1_NO_DMA_IN
-@@ -210,6 +313,31 @@
- Enables the ETRAX FS serial driver for ser2 (ttyS2).
-
- choice
-+ prompt "Ser2 default port type"
-+ depends on ETRAX_SERIAL_PORT2
-+ default ETRAX_SERIAL_PORT2_TYPE_232
-+ help
-+ What DMA channel to use for ser2
-+
-+config ETRAX_SERIAL_PORT2_TYPE_232
-+ bool "Ser2 is a RS-232 port"
-+ help
-+ Configure serial port 2 to be a RS-232 port.
-+
-+config ETRAX_SERIAL_PORT2_TYPE_485HD
-+ bool "Ser2 is a half duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 2 to be a half duplex (two wires) RS-485 port.
-+
-+config ETRAX_SERIAL_PORT2_TYPE_485FD
-+ bool "Ser2 is a full duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 2 to be a full duplex (four wires) RS-485 port.
-+endchoice
-+
-+choice
- prompt "Ser2 DMA in channel "
- depends on ETRAX_SERIAL_PORT2
- default ETRAX_SERIAL_PORT2_NO_DMA_IN
-@@ -279,6 +407,31 @@
- Enables the ETRAX FS serial driver for ser3 (ttyS3).
-
- choice
-+ prompt "Ser3 default port type"
-+ depends on ETRAX_SERIAL_PORT3
-+ default ETRAX_SERIAL_PORT3_TYPE_232
-+ help
-+ What DMA channel to use for ser3.
-+
-+config ETRAX_SERIAL_PORT3_TYPE_232
-+ bool "Ser3 is a RS-232 port"
-+ help
-+ Configure serial port 3 to be a RS-232 port.
-+
-+config ETRAX_SERIAL_PORT3_TYPE_485HD
-+ bool "Ser3 is a half duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 3 to be a half duplex (two wires) RS-485 port.
-+
-+config ETRAX_SERIAL_PORT3_TYPE_485FD
-+ bool "Ser3 is a full duplex RS-485 port"
-+ depends on ETRAX_RS485
-+ help
-+ Configure serial port 3 to be a full duplex (four wires) RS-485 port.
-+endchoice
-+
-+choice
- prompt "Ser3 DMA in channel "
- depends on ETRAX_SERIAL_PORT3
- default ETRAX_SERIAL_PORT3_NO_DMA_IN
-@@ -341,38 +494,6 @@
- string "Ser 3 CD bit (empty = not used)"
- depends on ETRAX_SERIAL_PORT3
-
--config ETRAX_RS485
-- bool "RS-485 support"
-- depends on ETRAX_SERIAL
-- help
-- Enables support for RS-485 serial communication. For a primer on
-- RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
--
--config ETRAX_RS485_DISABLE_RECEIVER
-- bool "Disable serial receiver"
-- depends on ETRAX_RS485
-- help
-- It is necessary to disable the serial receiver to avoid serial
-- loopback. Not all products are able to do this in software only.
-- Axis 2400/2401 must disable receiver.
--
--config ETRAX_AXISFLASHMAP
-- bool "Axis flash-map support"
-- depends on ETRAX_ARCH_V32
-- select MTD
-- select MTD_CFI
-- select MTD_CFI_AMDSTD
-- select MTD_OBSOLETE_CHIPS
-- select MTD_AMDSTD
-- select MTD_CHAR
-- select MTD_BLOCK
-- select MTD_PARTITIONS
-- select MTD_CONCAT
-- select MTD_COMPLEX_MAPPINGS
-- help
-- This option enables MTD mapping of flash devices. Needed to use
-- flash memories. If unsure, say Y.
--
- config ETRAX_SYNCHRONOUS_SERIAL
- bool "Synchronous serial-port support"
- depends on ETRAX_ARCH_V32
-@@ -405,6 +526,31 @@
- A synchronous serial port can run in manual or DMA mode.
- Selecting this option will make it run in DMA mode.
-
-+config ETRAX_AXISFLASHMAP
-+ bool "Axis flash-map support"
-+ depends on ETRAX_ARCH_V32
-+ select MTD
-+ select MTD_CFI
-+ select MTD_CFI_AMDSTD
-+ select MTD_JEDECPROBE
-+ select MTD_CHAR
-+ select MTD_BLOCK
-+ select MTD_PARTITIONS
-+ select MTD_CONCAT
-+ select MTD_COMPLEX_MAPPINGS
-+ help
-+ This option enables MTD mapping of flash devices. Needed to use
-+ flash memories. If unsure, say Y.
-+
-+config ETRAX_AXISFLASHMAP_MTD0WHOLE
-+ bool "MTD0 is whole boot flash device"
-+ depends on ETRAX_AXISFLASHMAP
-+ default N
-+ help
-+ When this option is not set, mtd0 refers to the first partition
-+ on the boot flash device. When set, mtd0 refers to the whole
-+ device, with mtd1 referring to the first partition etc.
-+
- config ETRAX_PTABLE_SECTOR
- int "Byte-offset of partition table sector"
- depends on ETRAX_AXISFLASHMAP
-@@ -425,11 +571,19 @@
- This option enables MTD mapping of NAND flash devices. Needed to use
- NAND flash memories. If unsure, say Y.
-
-+config ETRAX_NANDBOOT
-+ bool "Boot from NAND flash"
-+ depends on ETRAX_NANDFLASH
-+ help
-+ This options enables booting from NAND flash devices.
-+ Say Y if your boot code, kernel and root file system is in
-+ NAND flash. Say N if they are in NOR flash.
-+
- config ETRAX_I2C
- bool "I2C driver"
- depends on ETRAX_ARCH_V32
- help
-- This option enabled the I2C driver used by e.g. the RTC driver.
-+ This option enables the I2C driver used by e.g. the RTC driver.
-
- config ETRAX_I2C_DATA_PORT
- string "I2C data pin"
-@@ -476,18 +630,19 @@
- Remember that you need to setup the port directions appropriately in
- the General configuration.
-
--config ETRAX_PA_BUTTON_BITMASK
-- hex "PA-buttons bitmask"
-+config ETRAX_VIRTUAL_GPIO
-+ bool "Virtual GPIO support"
- depends on ETRAX_GPIO
-- default "0x02"
- help
-- This is a bitmask (8 bits) with information about what bits on PA
-- that are used for buttons.
-- Most products has a so called TEST button on PA1, if that is true
-- use 0x02 here.
-- Use 00 if there are no buttons on PA.
-- If the bitmask is <> 00 a button driver will be included in the gpio
-- driver. ETRAX general I/O support must be enabled.
-+ Enables the virtual Etrax general port device (major 120, minor 6).
-+ It uses an I/O expander for the I2C-bus.
-+
-+config ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN
-+ int "Virtual GPIO interrupt pin on PA pin"
-+ range 0 7
-+ depends on ETRAX_VIRTUAL_GPIO
-+ help
-+ The pin to use on PA for virtual gpio interrupt.
-
- config ETRAX_PA_CHANGEABLE_DIR
- hex "PA user changeable dir mask"
-@@ -584,6 +739,25 @@
- that a user can change the value on using ioctl's.
- Bit set = changeable.
-
-+config ETRAX_PV_CHANGEABLE_DIR
-+ hex "PV user changeable dir mask"
-+ depends on ETRAX_VIRTUAL_GPIO
-+ default "0x0000"
-+ help
-+ This is a bitmask (16 bits) with information of what bits in PV
-+ that a user can change direction on using ioctl's.
-+ Bit set = changeable.
-+ You probably want 0x0000 here, but it depends on your hardware.
-+
-+config ETRAX_PV_CHANGEABLE_BITS
-+ hex "PV user changeable bits mask"
-+ depends on ETRAX_VIRTUAL_GPIO
-+ default "0x0000"
-+ help
-+ This is a bitmask (16 bits) with information of what bits in PV
-+ that a user can change the value on using ioctl's.
-+ Bit set = changeable.
-+
- config ETRAX_IDE
- bool "ATA/IDE support"
- depends on ETRAX_ARCH_V32
-@@ -603,11 +777,11 @@
- select HOTPLUG
- select PCCARD_NONSTATIC
- help
-- Enabled the ETRAX Carbus driver.
-+ Enabled the ETRAX Carbus driver.
-
- config PCI
- bool
-- depends on ETRAX_CARDBUS
-+ depends on ETRAX_CARDBUS
- default y
-
- config ETRAX_IOP_FW_LOAD
-@@ -623,3 +797,175 @@
- help
- This option enables a driver for the stream co-processor
- for cryptographic operations.
-+
-+source drivers/mmc/Kconfig
-+
-+config ETRAX_SPI_MMC
-+# Make this one of several "choices" (possible simultaneously but
-+# suggested uniquely) when an IOP driver emerges for "real" MMC/SD
-+# protocol support.
-+ tristate
-+ depends on MMC
-+ default MMC
-+ select SPI
-+ select MMC_SPI
-+ select ETRAX_SPI_MMC_BOARD
-+
-+# For the parts that can't be a module (due to restrictions in
-+# framework elsewhere).
-+config ETRAX_SPI_MMC_BOARD
-+ boolean
-+ default n
-+
-+# While the board info is MMC_SPI only, the drivers are written to be
-+# independent of MMC_SPI, so we'll keep SPI non-dependent on the
-+# MMC_SPI config choices (well, except for a single depends-on-line
-+# for the board-info file until a separate non-MMC SPI board file
-+# emerges).
-+# FIXME: When that happens, we'll need to be able to ask for and
-+# configure non-MMC SPI ports together with MMC_SPI ports (if multiple
-+# SPI ports are enabled).
-+
-+config ETRAX_SPI_SSER0
-+ tristate "SPI using synchronous serial port 0 (sser0)"
-+ depends on ETRAX_SPI_MMC
-+ default m if MMC_SPI=m
-+ default y if MMC_SPI=y
-+ default y if MMC_SPI=n
-+ select SPI_ETRAX_SSER
-+ help
-+ Say Y for an MMC/SD socket connected to synchronous serial port 0,
-+ or for devices using the SPI protocol on that port. Say m if you
-+ want to build it as a module, which will be named spi_crisv32_sser.
-+ (You need to select MMC separately.)
-+
-+config ETRAX_SPI_SSER0_DMA
-+ bool "DMA for SPI on sser0 enabled"
-+ depends on ETRAX_SPI_SSER0
-+ depends on !ETRAX_SERIAL_PORT1_DMA4_OUT && !ETRAX_SERIAL_PORT1_DMA5_IN
-+ default y
-+ help
-+ Say Y if using DMA (dma4/dma5) for SPI on synchronous serial port 0.
-+
-+config ETRAX_SPI_MMC_CD_SSER0_PIN
-+ string "MMC/SD card detect pin for SPI on sser0"
-+ depends on ETRAX_SPI_SSER0 && MMC_SPI
-+ default "pd11"
-+ help
-+ The pin to use for SD/MMC card detect. This pin should be pulled up
-+ and grounded when a card is present. If defined as " " (space), no
-+ pin is selected. A card must then always be inserted for proper
-+ action.
-+
-+config ETRAX_SPI_MMC_WP_SSER0_PIN
-+ string "MMC/SD card write-protect pin for SPI on sser0"
-+ depends on ETRAX_SPI_SSER0 && MMC_SPI
-+ default "pd10"
-+ help
-+ The pin to use for the SD/MMC write-protect signal for a memory
-+ card. If defined as " " (space), the card is considered writable.
-+
-+config ETRAX_SPI_SSER1
-+ tristate "SPI using synchronous serial port 1 (sser1)"
-+ depends on ETRAX_SPI_MMC
-+ default m if MMC_SPI=m && ETRAX_SPI_SSER0=n
-+ default y if MMC_SPI=y && ETRAX_SPI_SSER0=n
-+ default y if MMC_SPI=n && ETRAX_SPI_SSER0=n
-+ select SPI_ETRAX_SSER
-+ help
-+ Say Y for an MMC/SD socket connected to synchronous serial port 1,
-+ or for devices using the SPI protocol on that port. Say m if you
-+ want to build it as a module, which will be named spi_crisv32_sser.
-+ (You need to select MMC separately.)
-+
-+config ETRAX_SPI_SSER1_DMA
-+ bool "DMA for SPI on sser1 enabled"
-+ depends on ETRAX_SPI_SSER1 && !ETRAX_ETHERNET_IFACE1
-+ depends on !ETRAX_SERIAL_PORT0_DMA6_OUT && !ETRAX_SERIAL_PORT0_DMA7_IN
-+ default y
-+ help
-+ Say Y if using DMA (dma6/dma7) for SPI on synchronous serial port 1.
-+
-+config ETRAX_SPI_MMC_CD_SSER1_PIN
-+ string "MMC/SD card detect pin for SPI on sser1"
-+ depends on ETRAX_SPI_SSER1 && MMC_SPI
-+ default "pd12"
-+ help
-+ The pin to use for SD/MMC card detect. This pin should be pulled up
-+ and grounded when a card is present. If defined as " " (space), no
-+ pin is selected. A card must then always be inserted for proper
-+ action.
-+
-+config ETRAX_SPI_MMC_WP_SSER1_PIN
-+ string "MMC/SD card write-protect pin for SPI on sser1"
-+ depends on ETRAX_SPI_SSER1 && MMC_SPI
-+ default "pd9"
-+ help
-+ The pin to use for the SD/MMC write-protect signal for a memory
-+ card. If defined as " " (space), the card is considered writable.
-+
-+config ETRAX_SPI_GPIO
-+ tristate "Bitbanged SPI using gpio pins"
-+ depends on ETRAX_SPI_MMC
-+ select SPI_ETRAX_GPIO
-+ default m if MMC_SPI=m && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
-+ default y if MMC_SPI=y && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
-+ default y if MMC_SPI=n && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
-+ help
-+ Say Y for an MMC/SD socket connected to general I/O pins (but not
-+ a complete synchronous serial ports), or for devices using the SPI
-+ protocol on general I/O pins. Slow and slows down the system.
-+ Say m to build it as a module, which will be called spi_crisv32_gpio.
-+ (You need to select MMC separately.)
-+
-+# The default match that of sser0, only because that's how it was tested.
-+config ETRAX_SPI_CS_PIN
-+ string "SPI chip select pin"
-+ depends on ETRAX_SPI_GPIO
-+ default "pc3"
-+ help
-+ The pin to use for SPI chip select.
-+
-+config ETRAX_SPI_CLK_PIN
-+ string "SPI clock pin"
-+ depends on ETRAX_SPI_GPIO
-+ default "pc1"
-+ help
-+ The pin to use for the SPI clock.
-+
-+config ETRAX_SPI_DATAIN_PIN
-+ string "SPI MISO (data in) pin"
-+ depends on ETRAX_SPI_GPIO
-+ default "pc16"
-+ help
-+ The pin to use for SPI data in from the device.
-+
-+config ETRAX_SPI_DATAOUT_PIN
-+ string "SPI MOSI (data out) pin"
-+ depends on ETRAX_SPI_GPIO
-+ default "pc0"
-+ help
-+ The pin to use for SPI data out to the device.
-+
-+config ETRAX_SPI_MMC_CD_GPIO_PIN
-+ string "MMC/SD card detect pin for SPI using gpio (space for none)"
-+ depends on ETRAX_SPI_GPIO && MMC_SPI
-+ default "pd11"
-+ help
-+ The pin to use for SD/MMC card detect. This pin should be pulled up
-+ and grounded when a card is present. If defined as " " (space), no
-+ pin is selected. A card must then always be inserted for proper
-+ action.
-+
-+config ETRAX_SPI_MMC_WP_GPIO_PIN
-+ string "MMC/SD card write-protect pin for SPI using gpio (space for none)"
-+ depends on ETRAX_SPI_GPIO && MMC_SPI
-+ default "pd10"
-+ help
-+ The pin to use for the SD/MMC write-protect signal for a memory
-+ card. If defined as " " (space), the card is considered writable.
-+
-+# Avoid choices causing non-working configs by conditionalizing the inclusion.
-+if ETRAX_SPI_MMC
-+source drivers/spi/Kconfig
-+endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Makefile 2007-01-29 16:14:16.000000000 +0100
-@@ -11,3 +11,4 @@
- obj-$(CONFIG_ETRAX_I2C) += i2c.o
- obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
- obj-$(CONFIG_PCI) += pci/
-+obj-$(CONFIG_ETRAX_SPI_MMC_BOARD) += board_mmcspi.o
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/axisflashmap.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/axisflashmap.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/axisflashmap.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/axisflashmap.c 2007-02-06 17:37:50.000000000 +0100
-@@ -11,7 +11,7 @@
- * partition split defined below.
- *
- * Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
-- * with minor changes.
-+ * with quite a few changes now.
- *
- */
-
-@@ -27,6 +27,8 @@
- #include <linux/mtd/mtdram.h>
- #include <linux/mtd/partitions.h>
-
-+#include <linux/cramfs_fs.h>
-+
- #include <asm/arch/hwregs/config_defs.h>
- #include <asm/axisflashmap.h>
- #include <asm/mmu.h>
-@@ -37,16 +39,24 @@
- #define FLASH_UNCACHED_ADDR KSEG_E
- #define FLASH_CACHED_ADDR KSEG_F
-
-+#define PAGESIZE (512)
-+
- #if CONFIG_ETRAX_FLASH_BUSWIDTH==1
- #define flash_data __u8
- #elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
- #define flash_data __u16
- #elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
--#define flash_data __u16
-+#define flash_data __u32
- #endif
-
- /* From head.S */
--extern unsigned long romfs_start, romfs_length, romfs_in_flash;
-+extern unsigned long romfs_in_flash; /* 1 when romfs_start, _length in flash */
-+extern unsigned long romfs_start, romfs_length;
-+extern unsigned long nand_boot; /* 1 when booted from nand flash */
-+
-+struct partition_name {
-+ char name[6];
-+};
-
- /* The master mtd for the entire flash. */
- struct mtd_info* axisflash_mtd = NULL;
-@@ -112,32 +122,20 @@
- .map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
- };
-
--/* If no partition-table was found, we use this default-set. */
--#define MAX_PARTITIONS 7
--#define NUM_DEFAULT_PARTITIONS 3
-+#define MAX_PARTITIONS 7
-+#ifdef CONFIG_ETRAX_NANDBOOT
-+#define NUM_DEFAULT_PARTITIONS 4
-+#define DEFAULT_ROOTFS_PARTITION_NO 2
-+#define DEFAULT_MEDIA_SIZE 0x2000000 /* 32 megs */
-+#else
-+#define NUM_DEFAULT_PARTITIONS 3
-+#define DEFAULT_ROOTFS_PARTITION_NO (-1)
-+#define DEFAULT_MEDIA_SIZE 0x800000 /* 8 megs */
-+#endif
-
--/*
-- * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
-- * size of one flash block and "filesystem"-partition needs 5 blocks to be able
-- * to use JFFS.
-- */
--static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
-- {
-- .name = "boot firmware",
-- .size = CONFIG_ETRAX_PTABLE_SECTOR,
-- .offset = 0
-- },
-- {
-- .name = "kernel",
-- .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
-- .offset = CONFIG_ETRAX_PTABLE_SECTOR
-- },
-- {
-- .name = "filesystem",
-- .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
-- .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
-- }
--};
-+#if (MAX_PARTITIONS < NUM_DEFAULT_PARTITIONS)
-+#error MAX_PARTITIONS must be >= than NUM_DEFAULT_PARTITIONS
-+#endif
-
- /* Initialize the ones normally used. */
- static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
-@@ -178,6 +176,56 @@
- },
- };
-
-+
-+/* If no partition-table was found, we use this default-set.
-+ * Default flash size is 8MB (NOR). CONFIG_ETRAX_PTABLE_SECTOR is most
-+ * likely the size of one flash block and "filesystem"-partition needs
-+ * to be >=5 blocks to be able to use JFFS.
-+ */
-+static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
-+ {
-+ .name = "boot firmware",
-+ .size = CONFIG_ETRAX_PTABLE_SECTOR,
-+ .offset = 0
-+ },
-+ {
-+ .name = "kernel",
-+ .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
-+ .offset = CONFIG_ETRAX_PTABLE_SECTOR
-+ },
-+#define FILESYSTEM_SECTOR (11 * CONFIG_ETRAX_PTABLE_SECTOR)
-+#ifdef CONFIG_ETRAX_NANDBOOT
-+ {
-+ .name = "rootfs",
-+ .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
-+ .offset = FILESYSTEM_SECTOR
-+ },
-+#undef FILESYSTEM_SECTOR
-+#define FILESYSTEM_SECTOR (21 * CONFIG_ETRAX_PTABLE_SECTOR)
-+#endif
-+ {
-+ .name = "rwfs",
-+ .size = DEFAULT_MEDIA_SIZE - FILESYSTEM_SECTOR,
-+ .offset = FILESYSTEM_SECTOR
-+ }
-+};
-+
-+#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
-+/* Main flash device */
-+static struct mtd_partition main_partition = {
-+ .name = "main",
-+ .size = 0,
-+ .offset = 0
-+};
-+#endif
-+
-+/* Auxilliary partition if we find another flash */
-+static struct mtd_partition aux_partition = {
-+ .name = "aux",
-+ .size = 0,
-+ .offset = 0
-+};
-+
- /*
- * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
- * chips in that order (because the amd_flash-driver is faster).
-@@ -186,23 +234,23 @@
- {
- struct mtd_info *mtd_cs = NULL;
-
-- printk(KERN_INFO
-+ printk(KERN_INFO
- "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
- map_cs->name, map_cs->size, map_cs->map_priv_1);
-
--#ifdef CONFIG_MTD_AMDSTD
-- mtd_cs = do_map_probe("amd_flash", map_cs);
--#endif
- #ifdef CONFIG_MTD_CFI
-+ mtd_cs = do_map_probe("cfi_probe", map_cs);
-+#endif
-+#ifdef CONFIG_MTD_JEDECPROBE
- if (!mtd_cs) {
-- mtd_cs = do_map_probe("cfi_probe", map_cs);
-+ mtd_cs = do_map_probe("jedec_probe", map_cs);
- }
- #endif
-
- return mtd_cs;
- }
-
--/*
-+/*
- * Probe each chip select individually for flash chips. If there are chips on
- * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
- * so that MTD partitions can cross chip boundries.
-@@ -217,22 +265,17 @@
- {
- struct mtd_info *mtd_cse0;
- struct mtd_info *mtd_cse1;
-- struct mtd_info *mtd_nand = NULL;
- struct mtd_info *mtd_total;
-- struct mtd_info *mtds[3];
-+ struct mtd_info *mtds[2];
- int count = 0;
-
- if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
- mtds[count++] = mtd_cse0;
- if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
- mtds[count++] = mtd_cse1;
-+
-
--#ifdef CONFIG_ETRAX_NANDFLASH
-- if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
-- mtds[count++] = mtd_nand;
--#endif
--
-- if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
-+ if (!mtd_cse0 && !mtd_cse1) {
- /* No chip found. */
- return NULL;
- }
-@@ -248,7 +291,7 @@
- */
- mtd_total = mtd_concat_create(mtds,
- count,
-- "cse0+cse1+nand");
-+ "cse0+cse1");
- #else
- printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
- "(mis)configuration!\n", map_cse0.name, map_cse1.name);
-@@ -260,57 +303,155 @@
-
- /* The best we can do now is to only use what we found
- * at cse0.
-- */
-+ */
- mtd_total = mtd_cse0;
- map_destroy(mtd_cse1);
- }
- } else {
-- mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;
--
-+ mtd_total = mtd_cse0 ? mtd_cse0 : mtd_cse1;
-+
- }
-
- return mtd_total;
- }
-
--extern unsigned long crisv32_nand_boot;
--extern unsigned long crisv32_nand_cramfs_offset;
--
- /*
- * Probe the flash chip(s) and, if it succeeds, read the partition-table
- * and register the partitions with MTD.
- */
- static int __init init_axis_flash(void)
- {
-- struct mtd_info *mymtd;
-+ struct mtd_info *main_mtd;
-+ struct mtd_info *aux_mtd = NULL;
- int err = 0;
- int pidx = 0;
- struct partitiontable_head *ptable_head = NULL;
- struct partitiontable_entry *ptable;
-- int use_default_ptable = 1; /* Until proven otherwise. */
-- const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n";
-- static char page[512];
-+ int ptable_ok = 0;
-+ static char page[PAGESIZE];
- size_t len;
-+ int ram_rootfs_partition = -1; /* -1 => no RAM rootfs partition */
-+ int part;
-+
-+ /* We need a root fs. If it resides in RAM, we need to use an
-+ * MTDRAM device, so it must be enabled in the kernel config,
-+ * but its size must be configured as 0 so as not to conflict
-+ * with our usage.
-+ */
-+#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
-+ if (!romfs_in_flash && !nand_boot) {
-+ printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
-+ "device; configure CONFIG_MTD_MTDRAM with size = 0!\n");
-+ panic("This kernel cannot boot from RAM!\n");
-+ }
-+#endif
-
- #ifndef CONFIG_ETRAXFS_SIM
-- mymtd = flash_probe();
-- mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
-- ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);
-+ main_mtd = flash_probe();
-+ if (main_mtd)
-+ printk(KERN_INFO "%s: 0x%08x bytes of NOR flash memory.\n",
-+ main_mtd->name, main_mtd->size);
-+
-+#ifdef CONFIG_ETRAX_NANDFLASH
-+ aux_mtd = crisv32_nand_flash_probe();
-+ if (aux_mtd)
-+ printk(KERN_INFO "%s: 0x%08x bytes of NAND flash memory.\n",
-+ aux_mtd->name, aux_mtd->size);
-
-- if (!mymtd) {
-+#ifdef CONFIG_ETRAX_NANDBOOT
-+ {
-+ struct mtd_info *tmp_mtd;
-+
-+ printk(KERN_INFO "axisflashmap: Set to boot from NAND flash, "
-+ "making NAND flash primary device.\n");
-+ tmp_mtd = main_mtd;
-+ main_mtd = aux_mtd;
-+ aux_mtd = tmp_mtd;
-+ }
-+#endif /* CONFIG_ETRAX_NANDBOOT */
-+#endif /* CONFIG_ETRAX_NANDFLASH */
-+
-+ if (!main_mtd && !aux_mtd) {
- /* There's no reason to use this module if no flash chip can
- * be identified. Make sure that's understood.
- */
- printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
-- } else {
-- printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
-- mymtd->name, mymtd->size);
-- axisflash_mtd = mymtd;
- }
-
-- if (mymtd) {
-- mymtd->owner = THIS_MODULE;
-+#if 0 /* Dump flash memory so we can see what is going on */
-+ if (main_mtd) {
-+ int sectoraddr, i;
-+ for (sectoraddr = 0; sectoraddr < 2*65536+4096; sectoraddr += PAGESIZE) {
-+ main_mtd->read(main_mtd, sectoraddr, PAGESIZE, &len, page);
-+ printk(KERN_INFO
-+ "Sector at %d (length %d):\n",
-+ sectoraddr, len);
-+ for (i = 0; i < PAGESIZE; i += 16) {
-+ printk(KERN_INFO
-+ "%02x %02x %02x %02x %02x %02x %02x %02x "
-+ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
-+ page[i] & 255, page[i+1] & 255,
-+ page[i+2] & 255, page[i+3] & 255,
-+ page[i+4] & 255, page[i+5] & 255,
-+ page[i+6] & 255, page[i+7] & 255,
-+ page[i+8] & 255, page[i+9] & 255,
-+ page[i+10] & 255, page[i+11] & 255,
-+ page[i+12] & 255, page[i+13] & 255,
-+ page[i+14] & 255, page[i+15] & 255);
-+ }
-+
-+ }
-+ }
-+#endif
-+
-+ if (main_mtd) {
-+ main_mtd->owner = THIS_MODULE;
-+ axisflash_mtd = main_mtd;
-+
-+ loff_t ptable_sector = CONFIG_ETRAX_PTABLE_SECTOR;
-+
-+ pidx++; /* First partition (rescue) is always set to the default. */
-+#ifdef CONFIG_ETRAX_NANDBOOT
-+ /* We know where the partition table should be located,
-+ * it will be in first good block after that.
-+ */
-+ int blockstat;
-+ do {
-+ blockstat = main_mtd->block_isbad(main_mtd, ptable_sector);
-+ if (blockstat < 0)
-+ ptable_sector = 0; /* read error */
-+ else if (blockstat)
-+ ptable_sector += main_mtd->erasesize;
-+ } while (blockstat && ptable_sector);
-+#endif
-+ if (ptable_sector) {
-+ main_mtd->read(main_mtd, ptable_sector, PAGESIZE, &len, page);
-+ ptable_head = &((struct partitiontable *) page)->head;
-+ }
-+
-+#if 0 /* Dump partition table so we can see what is going on */
-+ printk(KERN_INFO
-+ "axisflashmap: flash read %d bytes at 0x%08x, data: "
-+ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
-+ len, CONFIG_ETRAX_PTABLE_SECTOR,
-+ page[0] & 255, page[1] & 255,
-+ page[2] & 255, page[3] & 255,
-+ page[4] & 255, page[5] & 255,
-+ page[6] & 255, page[7] & 255);
-+ printk(KERN_INFO
-+ "axisflashmap: partition table offset %d, data: "
-+ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
-+ PARTITION_TABLE_OFFSET,
-+ page[PARTITION_TABLE_OFFSET+0] & 255,
-+ page[PARTITION_TABLE_OFFSET+1] & 255,
-+ page[PARTITION_TABLE_OFFSET+2] & 255,
-+ page[PARTITION_TABLE_OFFSET+3] & 255,
-+ page[PARTITION_TABLE_OFFSET+4] & 255,
-+ page[PARTITION_TABLE_OFFSET+5] & 255,
-+ page[PARTITION_TABLE_OFFSET+6] & 255,
-+ page[PARTITION_TABLE_OFFSET+7] & 255);
-+#endif
- }
-- pidx++; /* First partition is always set to the default. */
-
- if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
- && (ptable_head->size <
-@@ -323,7 +464,6 @@
- /* Looks like a start, sane length and end of a
- * partition table, lets check csum etc.
- */
-- int ptable_ok = 0;
- struct partitiontable_entry *max_addr =
- (struct partitiontable_entry *)
- ((unsigned long)ptable_head + sizeof(*ptable_head) +
-@@ -331,7 +471,7 @@
- unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
- unsigned char *p;
- unsigned long csum = 0;
--
-+
- ptable = (struct partitiontable_entry *)
- ((unsigned long)ptable_head + sizeof(*ptable_head));
-
-@@ -343,108 +483,177 @@
- csum += *p++;
- csum += *p++;
- csum += *p++;
-- }
-+ }
- ptable_ok = (csum == ptable_head->checksum);
-
- /* Read the entries and use/show the info. */
-- printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
-+ printk(KERN_INFO "axisflashmap: "
-+ "Found a%s partition table at 0x%p-0x%p.\n",
- (ptable_ok ? " valid" : "n invalid"), ptable_head,
- max_addr);
-
- /* We have found a working bootblock. Now read the
-- * partition table. Scan the table. It ends when
-- * there is 0xffffffff, that is, empty flash.
-+ * partition table. Scan the table. It ends with 0xffffffff.
- */
- while (ptable_ok
-- && ptable->offset != 0xffffffff
-+ && ptable->offset != PARTITIONTABLE_END_MARKER
- && ptable < max_addr
-- && pidx < MAX_PARTITIONS) {
-+ && pidx < MAX_PARTITIONS - 1) {
-
-- axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
-- axis_partitions[pidx].size = ptable->size;
--
-- printk(pmsg, pidx, axis_partitions[pidx].offset,
-- axis_partitions[pidx].size);
-+ axis_partitions[pidx].offset = offset + ptable->offset;
-+#ifdef CONFIG_ETRAX_NANDFLASH
-+ if (main_mtd->type == MTD_NANDFLASH) {
-+ axis_partitions[pidx].size =
-+ (((ptable+1)->offset ==
-+ PARTITIONTABLE_END_MARKER) ?
-+ main_mtd->size :
-+ ((ptable+1)->offset + offset)) -
-+ (ptable->offset + offset);
-+
-+ } else
-+#endif /* CONFIG_ETRAX_NANDFLASH */
-+ axis_partitions[pidx].size = ptable->size;
-+#ifdef CONFIG_ETRAX_NANDBOOT
-+ /* Save partition number of jffs2 ro partition.
-+ * Needed if RAM booting or root file system in RAM.
-+ */
-+ if (!nand_boot &&
-+ ram_rootfs_partition < 0 && /* not already set */
-+ ptable->type == PARTITION_TYPE_JFFS2 &&
-+ (ptable->flags & PARTITION_FLAGS_READONLY_MASK) ==
-+ PARTITION_FLAGS_READONLY)
-+ ram_rootfs_partition = pidx;
-+#endif /* CONFIG_ETRAX_NANDBOOT */
- pidx++;
- ptable++;
- }
-- use_default_ptable = !ptable_ok;
- }
-
-- if (romfs_in_flash) {
-- /* Add an overlapping device for the root partition (romfs). */
-+ /* Decide whether to use default partition table. */
-+ /* Only use default table if we actually have a device (main_mtd) */
-
-- axis_partitions[pidx].name = "romfs";
-- if (crisv32_nand_boot) {
-- char* data = kmalloc(1024, GFP_KERNEL);
-- int len;
-- int offset = crisv32_nand_cramfs_offset & ~(1024-1);
-- char* tmp;
--
-- mymtd->read(mymtd, offset, 1024, &len, data);
-- tmp = &data[crisv32_nand_cramfs_offset % 512];
-- axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
-- axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
-- kfree(data);
-- } else {
-- axis_partitions[pidx].size = romfs_length;
-- axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
-- }
-+ struct mtd_partition *partition = &axis_partitions[0];
-+ if (main_mtd && !ptable_ok) {
-+ memcpy(axis_partitions, axis_default_partitions,
-+ sizeof(axis_default_partitions));
-+ pidx = NUM_DEFAULT_PARTITIONS;
-+ ram_rootfs_partition = DEFAULT_ROOTFS_PARTITION_NO;
-+ }
-
-+ /* Add artificial partitions for rootfs if necessary */
-+ if (romfs_in_flash) {
-+ /* rootfs is in directly accessible flash memory = NOR flash.
-+ Add an overlapping device for the rootfs partition. */
-+ printk(KERN_INFO "axisflashmap: Adding partition for "
-+ "overlapping root file system image\n");
-+ axis_partitions[pidx].size = romfs_length;
-+ axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
-+ axis_partitions[pidx].name = "romfs";
- axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;
--
-- printk(KERN_INFO
-- " Adding readonly flash partition for romfs image:\n");
-- printk(pmsg, pidx, axis_partitions[pidx].offset,
-- axis_partitions[pidx].size);
-+ ram_rootfs_partition = -1;
- pidx++;
- }
--
-- if (mymtd) {
-- if (use_default_ptable) {
-- printk(KERN_INFO " Using default partition table.\n");
-- err = add_mtd_partitions(mymtd, axis_default_partitions,
-- NUM_DEFAULT_PARTITIONS);
-- } else {
-- err = add_mtd_partitions(mymtd, axis_partitions, pidx);
-+ else if (romfs_length && !nand_boot) {
-+ /* romfs exists in memory, but not in flash, so must be in RAM.
-+ * Configure an MTDRAM partition. */
-+ if (ram_rootfs_partition < 0) { /* none set yet */
-+ ram_rootfs_partition = pidx; /* put it at the end */
-+ pidx++;
- }
-+ printk(KERN_INFO "axisflashmap: Adding partition for "
-+ "root file system image in RAM\n");
-+ axis_partitions[ram_rootfs_partition].size = romfs_length;
-+ axis_partitions[ram_rootfs_partition].offset = romfs_start;
-+ axis_partitions[ram_rootfs_partition].name = "romfs";
-+ axis_partitions[ram_rootfs_partition].mask_flags |=
-+ MTD_WRITEABLE;
-+ }
-
-- if (err) {
-- panic("axisflashmap could not add MTD partitions!\n");
-- }
-+#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
-+ if (main_mtd) {
-+ main_partition.size = main_mtd->size;
-+ err = add_mtd_partitions(main_mtd, &main_partition, 1);
-+ if (err)
-+ panic("axisflashmap: Could not initialize "
-+ "partition for whole main mtd device!\n");
- }
--/* CONFIG_EXTRAXFS_SIM */
- #endif
-
-- if (!romfs_in_flash) {
-- /* Create an RAM device for the root partition (romfs). */
-+ /* Now, register all partitions with mtd.
-+ * We do this one at a time so we can slip in an MTDRAM device
-+ * in the proper place if required. */
-+
-+ for (part = 0; part < pidx; part++) {
-+ if (part == ram_rootfs_partition) {
-+ /* add MTDRAM partition here */
-+ struct mtd_info *mtd_ram;
-+
-+ mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
-+ if (!mtd_ram)
-+ panic("axisflashmap: Couldn't allocate memory "
-+ "for mtd_info!\n");
-+ printk(KERN_INFO "axisflashmap: Adding RAM partition "
-+ "for rootfs image.\n");
-+ err = mtdram_init_device(mtd_ram,
-+ (void *)partition[part].offset,
-+ partition[part].size,
-+ partition[part].name);
-+ if (err)
-+ panic("axisflashmap: Could not initialize "
-+ "MTD RAM device!\n");
-+ /* JFFS2 likes to have an erasesize. Keep potential
-+ * JFFS2 rootfs happy by providing one. Since image
-+ * was most likely created for main mtd, use that
-+ * erasesize, if available. Otherwise, make a guess. */
-+ mtd_ram->erasesize = (main_mtd ? main_mtd->erasesize :
-+ CONFIG_ETRAX_PTABLE_SECTOR);
-+ } else {
-+ err = add_mtd_partitions(main_mtd,
-+ &partition[part], 1);
-+ if (err)
-+ panic("axisflashmap: Could not add mtd "
-+ "partition %d\n", part);
-+ }
-+ }
-
--#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
-- /* No use trying to boot this kernel from RAM. Panic! */
-- printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
-- "device due to kernel (mis)configuration!\n");
-- panic("This kernel cannot boot from RAM!\n");
--#else
-- struct mtd_info *mtd_ram;
-+#endif /* CONFIG_EXTRAXFS_SIM */
-
-- mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
-- GFP_KERNEL);
-- if (!mtd_ram) {
-- panic("axisflashmap couldn't allocate memory for "
-- "mtd_info!\n");
-- }
-+#ifdef CONFIG_ETRAXFS_SIM
-+ /* For simulator, always use a RAM partition.
-+ * The rootfs will be found after the kernel in RAM,
-+ * with romfs_start and romfs_end indicating location and size.
-+ */
-+ struct mtd_info *mtd_ram;
-+
-+ mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
-+ GFP_KERNEL);
-+ if (!mtd_ram) {
-+ panic("axisflashmap: Couldn't allocate memory for "
-+ "mtd_info!\n");
-+ }
-
-- printk(KERN_INFO " Adding RAM partition for romfs image:\n");
-- printk(pmsg, pidx, romfs_start, romfs_length);
-+ printk(KERN_INFO "axisflashmap: Adding RAM partition for romfs, "
-+ "at %u, size %u\n",
-+ (unsigned) romfs_start, (unsigned) romfs_length);
-+
-+ err = mtdram_init_device(mtd_ram, (void*)romfs_start,
-+ romfs_length, "romfs");
-+ if (err) {
-+ panic("axisflashmap: Could not initialize MTD RAM "
-+ "device!\n");
-+ }
-+#endif /* CONFIG_EXTRAXFS_SIM */
-+
-+#ifndef CONFIG_ETRAXFS_SIM
-+ if (aux_mtd) {
-+ aux_partition.size = aux_mtd->size;
-+ err = add_mtd_partitions(aux_mtd, &aux_partition, 1);
-+ if (err)
-+ panic("axisflashmap: Could not initialize "
-+ "aux mtd device!\n");
-
-- err = mtdram_init_device(mtd_ram, (void*)romfs_start,
-- romfs_length, "romfs");
-- if (err) {
-- panic("axisflashmap could not initialize MTD RAM "
-- "device!\n");
-- }
--#endif
- }
-+#endif /* CONFIG_EXTRAXFS_SIM */
-
- return err;
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/board_mmcspi.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/board_mmcspi.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/board_mmcspi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/board_mmcspi.c 2007-01-29 15:51:19.000000000 +0100
-@@ -0,0 +1,686 @@
-+/*
-+ * Somewhat generic "board-side" code to support SPI drivers for chips
-+ * with a CRIS v32 and later. Not really board-specific, and only for
-+ * registration of SPI devices for MMC, hence the "mmcspi" part of the
-+ * name instead of a proper board name.
-+ *
-+ * Copyright (c) 2007 Axis Communications AB
-+ *
-+ * TODO: SDIO interrupt-pin support (though can't be done until
-+ * there's support added in both the mmc_spi and the mmc frameworks).
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/mmc_spi.h>
-+#include <linux/mmc/host.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/pinmux.h>
-+#include <asm/arch/dma.h>
-+#include <linux/err.h>
-+
-+#include <asm/io.h>
-+
-+/* We need some housekeeping. */
-+#define CONCAT_(a, b) a ## b
-+#define CONCAT(a, b) CONCAT_(a, b)
-+#define CONCAT3(a, b, c) CONCAT(CONCAT(a, b), c)
-+
-+/* Grr. Why not define them as usual in autoconf, #ifdef REVEAL_MODULES? */
-+#if !defined(CONFIG_SPI_ETRAX_SSER) && defined(CONFIG_SPI_ETRAX_SSER_MODULE)
-+#define CONFIG_SPI_ETRAX_SSER
-+#endif
-+
-+#if !defined(CONFIG_ETRAX_SPI_SSER0) && defined(CONFIG_ETRAX_SPI_SSER0_MODULE)
-+#define CONFIG_ETRAX_SPI_SSER0
-+#endif
-+
-+#if !defined(CONFIG_ETRAX_SPI_SSER1) && defined(CONFIG_ETRAX_SPI_SSER1_MODULE)
-+#define CONFIG_ETRAX_SPI_SSER1
-+#endif
-+
-+#if !defined(CONFIG_SPI_ETRAX_GPIO) && defined(CONFIG_SPI_ETRAX_GPIO_MODULE)
-+#define CONFIG_SPI_ETRAX_GPIO
-+#endif
-+
-+#define CONFIGURED_PIN(x) ((x) != NULL && *(x) != 0 && *(x) != ' ')
-+
-+/* Helper function to configure an iopin for input. */
-+
-+static int crisv32_config_pin_in(struct crisv32_iopin *pin, const char *name)
-+{
-+ int ret = crisv32_io_get_name(pin, name);
-+ if (ret)
-+ return ret;
-+
-+ crisv32_io_set_dir(pin, crisv32_io_dir_in);
-+ return 0;
-+}
-+
-+/*
-+ * Writable data pointed to by the constant parts of each MMC_SPI bus
-+ * interface. Should only hold MMC-specific state (for the
-+ * MMC-specific pins), nothing SPI-generic.
-+ */
-+
-+struct crisv32_mmc_spi_pinstate {
-+ struct crisv32_iopin write_protect_pin;
-+ struct crisv32_iopin card_detect_pin;
-+
-+ /* We must poll for card-detect, which we do each: */
-+#define CARD_DETECT_CHECK_INTERVAL (2*HZ)
-+ /* We poll using a self-arming workqueue function. */
-+ struct work_struct cd_work;
-+
-+ /* When we detect a change in card presence, we call this
-+ * function, supplied by the mmc_spi framework: */
-+ irqreturn_t (*detectfunc)(int, void *);
-+
-+ /*
-+ * We call that function with this parameter as the second
-+ * one. We must assume the other parameters are unused, as we
-+ * don't have an interrupt context.
-+ */
-+ void *detectfunc_param2;
-+
-+ /* State for the card-detect worker. */
-+ int card_present;
-+};
-+
-+/* Rearming "work" function for card-detect polling. */
-+
-+static void crisv32_cd_worker(void *x)
-+{
-+ struct crisv32_mmc_spi_pinstate *state = x;
-+
-+ /* It's a pull-up, so a card is present when 0. */
-+ int card_present = crisv32_io_rd(&state->card_detect_pin) == 0;
-+
-+ if (card_present != state->card_present) {
-+ state->card_present = card_present;
-+ state->detectfunc(0, state->detectfunc_param2);
-+ }
-+ schedule_delayed_work(&state->cd_work, CARD_DETECT_CHECK_INTERVAL);
-+}
-+
-+/* The parts of MMC-specific configuration common to GPIO and SSER. */
-+
-+static int crisv32_mmcspi_config_common(struct spi_device *spidev,
-+ irqreturn_t (*intfunc)(int, void *),
-+ struct mmc_host *mmc_host,
-+ const struct crisv32_mmc_spi_pindata *pd)
-+{
-+ int ret = 0;
-+ struct crisv32_mmc_spi_pinstate *ps = pd->pinstate;
-+
-+ /*
-+ * If we don't have a card-detect pin, the card must be
-+ * present at startup (including insmod/modprobe). No
-+ * re-scans are done if no card is present at that time.
-+ */
-+ if (CONFIGURED_PIN(pd->card_detect)) {
-+ ret = crisv32_config_pin_in(&ps->card_detect_pin,
-+ pd->card_detect);
-+
-+ if (ret != 0)
-+ goto bad_card_detect;
-+
-+ /* Need to cast away const from pd, unfortunately. */
-+ INIT_WORK(&ps->cd_work, crisv32_cd_worker, (void *) ps);
-+ ps->card_present = 1;
-+ ps->detectfunc = intfunc;
-+ ps->detectfunc_param2 = mmc_host;
-+ crisv32_cd_worker(ps);
-+ } else
-+ ps->detectfunc = NULL;
-+
-+ /*
-+ * We set up for checking for presence of a write-protect pin
-+ * as pin.port being non-NULL.
-+ */
-+ memset(&ps->write_protect_pin, 0, sizeof ps->write_protect_pin);
-+ if (CONFIGURED_PIN(pd->write_protect)) {
-+ ret = crisv32_config_pin_in(&ps->write_protect_pin,
-+ pd->write_protect);
-+
-+ if (ret != 0)
-+ goto bad_write_protect;
-+ }
-+
-+ return 0;
-+
-+ bad_write_protect:
-+ if (ps->detectfunc) {
-+ cancel_rearming_delayed_work(&ps->cd_work);
-+ ps->detectfunc = NULL;
-+ }
-+
-+ bad_card_detect:
-+ return ret;
-+}
-+
-+/* A function to undo crisv32_mmcspi_config_common. */
-+
-+static void crisv32_mmcspi_deconfig_common(const struct
-+ crisv32_mmc_spi_pindata *pd)
-+{
-+ if (pd->pinstate->detectfunc) {
-+ cancel_rearming_delayed_work(&pd->pinstate->cd_work);
-+ pd->pinstate->detectfunc = NULL;
-+ }
-+
-+ /* We don't have to undo the pin allocations, being GPIO. */
-+}
-+
-+/* Helper function for write-protect sense. */
-+
-+static int crisv32_mmcspi_get_ro_helper(struct crisv32_mmc_spi_pinstate *ps)
-+{
-+ return ps->write_protect_pin.port != NULL
-+ && crisv32_io_rd(&ps->write_protect_pin) != 0;
-+}
-+
-+/* The hardware-interface-specific SPI+MMC parts. */
-+
-+#ifdef CONFIG_SPI_ETRAX_SSER
-+static const char crisv32_matching_spi_sser_driver_name[] __init_or_module
-+ = "spi_crisv32_sser";
-+
-+/*
-+ * Make up something we can use in tables and function without
-+ * #ifdef-cluttering.
-+ */
-+#ifdef CONFIG_ETRAX_SPI_SSER0_DMA
-+#define WITH_ETRAX_SPI_SSER0_DMA 1
-+#else
-+#define WITH_ETRAX_SPI_SSER0_DMA 0
-+#endif
-+#ifdef CONFIG_ETRAX_SPI_SSER1_DMA
-+#define WITH_ETRAX_SPI_SSER1_DMA 1
-+#else
-+#define WITH_ETRAX_SPI_SSER1_DMA 0
-+#endif
-+
-+/* Write-protect sense for the SSER interface. */
-+
-+static int crisv32_mmcspi_sser_get_ro(struct device *dev)
-+{
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_sser_hwdata *sser_defs
-+ = spidev->controller_data;
-+ struct crisv32_mmc_spi_pindata *pd = &sser_defs->mmc;
-+ return crisv32_mmcspi_get_ro_helper(pd->pinstate);
-+}
-+
-+/* Initialize the MMC-specific parts of the MMC+SPI interface, SSER. */
-+
-+static int crisv32_mmcspi_sser_init(struct device *dev,
-+ irqreturn_t (*intfunc)(int, void *),
-+ void *xmmc_host)
-+{
-+ struct mmc_host *mmc_host = xmmc_host;
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_sser_hwdata *sser_defs
-+ = spidev->controller_data;
-+ int ret = crisv32_mmcspi_config_common(spidev, intfunc, mmc_host,
-+ &sser_defs->mmc);
-+ if (ret != 0)
-+ return ret;
-+
-+ mmc_host->f_max = spidev->max_speed_hz;
-+
-+ /*
-+ * Let's just set this to ceil(100e6/65536). It wouldn't be
-+ * hard to change the base frequency to support down to 450Hz,
-+ * but there's no apparent requirement from known hardware.
-+ * Would also require adjustments to the SPI code, not just
-+ * here.
-+ *
-+ * On second thought, let's not set f_min unconditionally, as
-+ * mmc doesn't treat it as a limit, but as the frequency to
-+ * use at initialization. We stick with what mmc_spi sets, if
-+ * it fits.
-+ */
-+ if (mmc_host->f_min < 1526)
-+ mmc_host->f_min = 1526;
-+
-+ dev_info(dev, "CRIS v32 mmc_spi support hooked to SPI on sser%d"
-+ " (cd: %s, wp: %s)\n",
-+ spidev->master->bus_num,
-+ CONFIGURED_PIN(sser_defs->mmc.card_detect)
-+ ? sser_defs->mmc.card_detect : "(none)",
-+ CONFIGURED_PIN(sser_defs->mmc.write_protect)
-+ ? sser_defs->mmc.write_protect : "(none)");
-+ return 0;
-+}
-+
-+/* Similarly, to undo crisv32_mmcspi_sser_init. */
-+
-+static void crisv32_mmcspi_sser_exit(struct device *dev, void *xmmc_host)
-+{
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_sser_hwdata *sser_defs
-+ = spidev->controller_data;
-+
-+ crisv32_mmcspi_deconfig_common(&sser_defs->mmc);
-+}
-+
-+/*
-+ * Connect sser and DMA channels and return the proper numbers to use.
-+ *
-+ * This function exists really only to avoid having the following constants
-+ * tabled: regi_sserN, SSERn_INTR_VECT, pinmux_sserN, SYNC_SERn_TX_DMA_NBR,
-+ * SYNC_SERn_RX_DMA_NBR dma_sserN, regi_dmaM, regi_dmaN, DMAm_INTR_VECT,
-+ * DMAn_INTR_VECT. I might have missed some. :-)
-+ */
-+static int crisv32_allocate_sser(struct crisv32_regi_n_int *sserp,
-+ struct crisv32_regi_n_int *dmainp,
-+ struct crisv32_regi_n_int *dmaoutp,
-+ u32 sserno)
-+{
-+ int ret;
-+ u32 regi_sser = sserno == 0 ? regi_sser0 : regi_sser1;
-+ u32 sser_irq = sserno == 0 ? SSER0_INTR_VECT : SSER1_INTR_VECT;
-+ BUG_ON(sserno > 1 || sserp == NULL);
-+
-+ ret = crisv32_pinmux_alloc_fixed(sserno == 0
-+ ? pinmux_sser0 : pinmux_sser1);
-+ if (ret != 0)
-+ return ret;
-+
-+ sserp->regi = regi_sser;
-+ sserp->irq = sser_irq;
-+
-+ if (dmaoutp) {
-+ crisv32_request_dma(sserno == 0
-+ ? SYNC_SER0_TX_DMA_NBR
-+ : SYNC_SER1_TX_DMA_NBR,
-+ "SD/MMC SPI dma tr",
-+ DMA_VERBOSE_ON_ERROR | DMA_PANIC_ON_ERROR,
-+ /* Let's be brave and ask for the
-+ max. Except it's simplex, so
-+ let's request half the max
-+ speed in either direction. */
-+ 50 * 1000 * 1000 / 8 / 2,
-+ sserno == 0 ? dma_sser0 : dma_sser1);
-+ dmaoutp->regi = sserno == 0
-+ ? CONCAT(regi_dma, SYNC_SER0_TX_DMA_NBR)
-+ : CONCAT(regi_dma, SYNC_SER1_TX_DMA_NBR);
-+ dmaoutp->irq = sserno == 0
-+ ? CONCAT3(DMA, SYNC_SER0_TX_DMA_NBR, _INTR_VECT)
-+ : CONCAT3(DMA, SYNC_SER1_TX_DMA_NBR, _INTR_VECT);
-+ }
-+
-+ if (dmainp) {
-+ crisv32_request_dma(sserno == 0
-+ ? SYNC_SER0_RX_DMA_NBR
-+ : SYNC_SER1_RX_DMA_NBR,
-+ "SD/MMC SPI dma rec",
-+ DMA_VERBOSE_ON_ERROR | DMA_PANIC_ON_ERROR,
-+ 50 * 1000 * 1000 / 8 / 2,
-+ sserno == 0 ? dma_sser0 : dma_sser1);
-+ dmainp->regi = sserno == 0
-+ ? CONCAT(regi_dma, SYNC_SER0_RX_DMA_NBR)
-+ : CONCAT(regi_dma, SYNC_SER1_RX_DMA_NBR);
-+ dmainp->irq = sserno == 0
-+ ? CONCAT3(DMA, SYNC_SER0_RX_DMA_NBR, _INTR_VECT)
-+ : CONCAT3(DMA, SYNC_SER1_RX_DMA_NBR, _INTR_VECT);
-+ }
-+
-+ return 0;
-+}
-+
-+/* Undo whatever allocations et. al. that crisv32_allocate_sser did. */
-+
-+static void crisv32_free_sser(u32 sserno, int with_dma)
-+{
-+ int ret;
-+
-+ if (with_dma) {
-+ crisv32_free_dma(sserno == 0
-+ ? SYNC_SER0_RX_DMA_NBR
-+ : SYNC_SER1_RX_DMA_NBR);
-+ crisv32_free_dma(sserno == 0
-+ ? SYNC_SER0_TX_DMA_NBR
-+ : SYNC_SER1_TX_DMA_NBR);
-+ }
-+
-+ ret = crisv32_pinmux_dealloc_fixed(sserno == 0
-+ ? pinmux_sser0 : pinmux_sser1);
-+
-+ if (ret != 0)
-+ panic("%s: crisv32_pinmux_dealloc_fixed returned %d\n",
-+ __FUNCTION__, ret);
-+}
-+
-+/* Convenience-macro to avoid typos causing diffs between sser ports. */
-+
-+#define SSER_CDATA(n) \
-+ { \
-+ { \
-+ .using_dma = WITH_ETRAX_SPI_SSER##n##_DMA, \
-+ .iface_allocate = crisv32_allocate_sser##n, \
-+ .iface_free = crisv32_free_sser##n \
-+ }, \
-+ { \
-+ .card_detect \
-+ = CONFIG_ETRAX_SPI_MMC_CD_SSER##n##_PIN,\
-+ .write_protect \
-+ = CONFIG_ETRAX_SPI_MMC_WP_SSER##n##_PIN,\
-+ .pinstate \
-+ = &crisv32_mmcspi_sser##n##_pinstate \
-+ } \
-+ }
-+
-+#ifdef CONFIG_ETRAX_SPI_SSER0
-+
-+/* Allocate hardware to go with sser0 and fill in the right numbers. */
-+
-+static int crisv32_allocate_sser0(struct crisv32_regi_n_int *sserp,
-+ struct crisv32_regi_n_int *dmainp,
-+ struct crisv32_regi_n_int *dmaoutp)
-+{
-+ return crisv32_allocate_sser(sserp, dmainp, dmaoutp, 0);
-+}
-+
-+/* Undo those allocations. */
-+
-+static void crisv32_free_sser0(void)
-+{
-+ crisv32_free_sser(0, WITH_ETRAX_SPI_SSER0_DMA);
-+}
-+
-+static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_sser0_pinstate;
-+static const struct crisv32_mmc_spi_sser_hwdata crisv32_mmcspi_sser0_cdata
-+ = SSER_CDATA(0);
-+#endif /* CONFIG_ETRAX_SPI_SSER0 */
-+
-+#ifdef CONFIG_ETRAX_SPI_SSER1
-+
-+/* Allocate hardware to go with sser0 and fill in the right numbers. */
-+
-+static int crisv32_allocate_sser1(struct crisv32_regi_n_int *sserp,
-+ struct crisv32_regi_n_int *dmainp,
-+ struct crisv32_regi_n_int *dmaoutp)
-+{
-+ return crisv32_allocate_sser(sserp, dmainp, dmaoutp, 1);
-+}
-+
-+/* Undo those allocations. */
-+
-+static void crisv32_free_sser1(void)
-+{
-+ crisv32_free_sser(1, WITH_ETRAX_SPI_SSER1_DMA);
-+}
-+
-+static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_sser1_pinstate;
-+static const struct crisv32_mmc_spi_sser_hwdata crisv32_mmcspi_sser1_cdata
-+ = SSER_CDATA(1);
-+
-+#endif /* CONFIG_ETRAX_SPI_SSER1 */
-+
-+static struct mmc_spi_platform_data crisv32_mmcspi_sser_pdata = {
-+ .init = crisv32_mmcspi_sser_init,
-+ .exit = __devexit_p(crisv32_mmcspi_sser_exit),
-+ .detect_delay = 0,
-+ .get_ro = crisv32_mmcspi_sser_get_ro,
-+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
-+ .setpower = NULL
-+};
-+
-+#endif /* CONFIG_SPI_ETRAX_SSER */
-+
-+#ifdef CONFIG_SPI_ETRAX_GPIO
-+
-+static const char crisv32_matching_spi_gpio_driver_name[] __init_or_module
-+ = "spi_crisv32_gpio";
-+
-+/* Write-protect sense for the GPIO interface. */
-+
-+static int crisv32_mmcspi_gpio_get_ro(struct device *dev)
-+{
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
-+ = spidev->controller_data;
-+ struct crisv32_mmc_spi_pindata *pd = &gpio_defs->mmc;
-+
-+ return crisv32_mmcspi_get_ro_helper(pd->pinstate);
-+}
-+
-+/* Initialize the MMC-specific parts of the MMC+SPI interface, GPIO. */
-+
-+static int crisv32_mmcspi_gpio_init(struct device *dev,
-+ irqreturn_t (*intfunc)(int, void *),
-+ void *xmmc_host)
-+{
-+ struct mmc_host *mmc_host = xmmc_host;
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
-+ = spidev->controller_data;
-+ int ret = crisv32_mmcspi_config_common(spidev, intfunc, mmc_host,
-+ &gpio_defs->mmc);
-+ if (ret)
-+ return ret;
-+
-+ mmc_host->f_max = spidev->max_speed_hz;
-+
-+ /*
-+ * We don't set f_min, as the mmc code doesn't treat it as a
-+ * limit, but as the frequency to use at initialization. We
-+ * stick with what mmc_spi sets.
-+ */
-+ dev_info(dev, "CRIS v32 mmc_spi support hooked to SPI on GPIO"
-+ " (bus #%d, cd: %s, wp: %s)\n",
-+ spidev->master->bus_num,
-+ CONFIGURED_PIN(gpio_defs->mmc.card_detect)
-+ ? gpio_defs->mmc.card_detect : "(none)",
-+ CONFIGURED_PIN(gpio_defs->mmc.write_protect)
-+ ? gpio_defs->mmc.write_protect : "(none)");
-+ return 0;
-+}
-+
-+/* Similarly, to undo crisv32_mmcspi_gpio_init. */
-+
-+static void crisv32_mmcspi_gpio_exit(struct device *dev, void *xmmc_host)
-+{
-+ struct spi_device *spidev = to_spi_device(dev);
-+ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
-+ = spidev->controller_data;
-+
-+ crisv32_mmcspi_deconfig_common(&gpio_defs->mmc);
-+}
-+
-+static const struct mmc_spi_platform_data crisv32_mmcspi_gpio_pdata = {
-+ .init = crisv32_mmcspi_gpio_init,
-+ .exit = __devexit_p(crisv32_mmcspi_gpio_exit),
-+ .detect_delay = 0,
-+ .get_ro = crisv32_mmcspi_gpio_get_ro,
-+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
-+ .setpower = NULL
-+};
-+
-+static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_gpio_pinstate;
-+static const struct crisv32_mmc_spi_gpio_hwdata crisv32_mmcspi_gpio_cdata = {
-+ {
-+ .cs = CONFIG_ETRAX_SPI_CS_PIN,
-+ .miso = CONFIG_ETRAX_SPI_DATAIN_PIN,
-+ .mosi = CONFIG_ETRAX_SPI_DATAOUT_PIN,
-+ .sclk = CONFIG_ETRAX_SPI_CLK_PIN
-+ },
-+ {
-+ .card_detect = CONFIG_ETRAX_SPI_MMC_CD_GPIO_PIN,
-+ .write_protect = CONFIG_ETRAX_SPI_MMC_WP_GPIO_PIN,
-+ .pinstate = &crisv32_mmcspi_gpio_pinstate
-+ }
-+};
-+#endif /* CONFIG_SPI_ETRAX_GPIO */
-+
-+struct crisv32_s_b_i_and_driver_info {
-+ struct spi_board_info sbi;
-+ const char *driver_name;
-+
-+ /*
-+ * We have to adjust the platform device at time of creation
-+ * below, to allow the Linux DMA framework to handle DMA. In
-+ * the name of simplicity, we state the dma:able property
-+ * twice, a bit redundantly; here and in the controller_data
-+ * structure pointed to by spi_board_info.
-+ */
-+ int dma_able;
-+};
-+
-+/* Convenience-macro to avoid typos causing diffs between sser ports. */
-+
-+#define SSER_CONFIG(n) \
-+ { \
-+ /* \
-+ * No meaningful values for .irq or .chip_select, \
-+ * so we leave them out. \
-+ */ \
-+ { \
-+ .modalias = "mmc_spi", \
-+ .platform_data \
-+ = &crisv32_mmcspi_sser_pdata, \
-+ /* \
-+ * Casting to avoid a compiler const-warning. \
-+ */ \
-+ .controller_data \
-+ = ((void *) \
-+ &crisv32_mmcspi_sser##n##_cdata), \
-+ .max_speed_hz = 50 * 1000 * 1000, \
-+ .bus_num = n, \
-+ /* \
-+ * We only provide one mode, so it must be \
-+ * default. \
-+ */ \
-+ .mode = SPI_MODE_3 \
-+ }, \
-+ crisv32_matching_spi_sser_driver_name, \
-+ WITH_ETRAX_SPI_SSER##n##_DMA \
-+ }
-+
-+static const struct crisv32_s_b_i_and_driver_info
-+crisv32_mmcspi_devices[] __initdata = {
-+#ifdef CONFIG_ETRAX_SPI_SSER0
-+ SSER_CONFIG(0),
-+#endif
-+#ifdef CONFIG_ETRAX_SPI_SSER1
-+ SSER_CONFIG(1),
-+#endif
-+#ifdef CONFIG_SPI_ETRAX_GPIO
-+ {
-+ {
-+ .modalias = "mmc_spi",
-+ .platform_data = &crisv32_mmcspi_gpio_pdata,
-+ /* Casting to avoid a compiler const-warning. */
-+ .controller_data
-+ = (void *) &crisv32_mmcspi_gpio_cdata,
-+
-+ /* No, we can't even reach this number with GPIO. */
-+ .max_speed_hz = 5 * 1000 * 1000,
-+ .bus_num = 2
-+ },
-+ crisv32_matching_spi_gpio_driver_name,
-+ 0
-+ },
-+#endif
-+};
-+
-+/* Must not be __initdata. */
-+static const char controller_data_ptr_name[] = "controller_data_ptr";
-+static u64 allmem_mask = ~(u32) 0;
-+
-+/*
-+ * We have to register the SSER and GPIO "platform_device"s separately
-+ * from the "spi_board_info"s in order to have the drivers separated
-+ * from the hardware instance info.
-+ */
-+
-+static int __init crisv32_register_mmcspi(void)
-+{
-+ int ret;
-+ void *retp;
-+ const struct crisv32_s_b_i_and_driver_info *sbip;
-+
-+ for (sbip = crisv32_mmcspi_devices;
-+ sbip < crisv32_mmcspi_devices
-+ + ARRAY_SIZE(crisv32_mmcspi_devices);
-+ sbip++) {
-+
-+ /*
-+ * We have to pass the controller data as a device
-+ * "resource" (FIXME: too?), so it can be available
-+ * for the setup *before* starting the SPI core -
-+ * which is where .controller_data makes it to the SPI
-+ * structure!
-+ */
-+ struct resource mmcspi_res = {
-+ .start = (resource_size_t) sbip->sbi.controller_data,
-+ .end = (resource_size_t) sbip->sbi.controller_data,
-+ .name = controller_data_ptr_name
-+ };
-+
-+ /*
-+ * Presumably we could pass the irqs and register
-+ * addresses and... as individual resources here
-+ * instead of privately in spi_board_info
-+ * .controller_data, and make that part a bit more
-+ * readable. Maybe not worthwhile.
-+ */
-+ /* Need to cast away const here. FIXME: fix the pdrs API. */
-+ retp = platform_device_alloc(sbip->driver_name,
-+ sbip->sbi.bus_num);
-+ if (IS_ERR_VALUE(PTR_ERR(retp)))
-+ return PTR_ERR(retp);
-+
-+ /*
-+ * We can't use platform_device_register_simple as we
-+ * want to set stuff in the device to mark that we'd
-+ * prefer buffers explicitly passed as DMA-able.
-+ * Disabling/omitting the "if" below, cause testing of
-+ * the non-DMA-mem execution path of a DMA-capable
-+ * driver.
-+ */
-+ if (sbip->dma_able) {
-+ struct platform_device *pdev = retp;
-+
-+ pdev->dev.dma_mask = &allmem_mask;
-+ pdev->dev.coherent_dma_mask = allmem_mask;
-+ }
-+
-+ if ((ret = platform_device_add_resources(retp, &mmcspi_res, 1)) != 0
-+ || (ret = platform_device_add(retp)) != 0) {
-+ platform_device_put(retp);
-+ return ret;
-+ }
-+
-+ /*
-+ * The cost of keeping all info rooted at
-+ * crisv32_mmcspi_devices is the allocation overhead
-+ * for allocating separately each board info (in the
-+ * unlikely event that there's more than one).
-+ */
-+ ret = spi_register_board_info(&sbip->sbi, 1);
-+ if (ret != 0)
-+ return ret;
-+ }
-+
-+ return 0;
-+}
-+#ifdef MODULE
-+#error "Non-module because spi_register_board_info is one-way; there's no unregister function"
-+#endif
-+
-+/*
-+ * Needs to be called before __initcall/module_init because the SPI
-+ * bus scanning happens when the actual driver registers with the SPI
-+ * machinery (spi_bitbang_start/spi_register_master), not when the
-+ * device registers (spi_register_board_info).
-+ */
-+subsys_initcall(crisv32_register_mmcspi);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/cryptocop.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/cryptocop.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/cryptocop.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/cryptocop.c 2007-01-09 10:29:20.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: cryptocop.c,v 1.13 2005/04/21 17:27:55 henriken Exp $
-+/* $Id: cryptocop.c,v 1.22 2007/01/09 09:29:20 starvik Exp $
- *
- * Stream co-processor driver for the ETRAX FS
- *
-@@ -1718,7 +1718,7 @@
- * i = i + 1
- * }
- * i = Nk
-- *
-+ *
- * while (i < (Nb * (Nr + 1))) {
- * temp = w[i - 1]
- * if ((i mod Nk) == 0) {
-@@ -1886,7 +1886,7 @@
- }
-
- static irqreturn_t
--dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+dma_done_interrupt(int irq, void *dev_id)
- {
- struct cryptocop_prio_job *done_job;
- reg_dma_rw_ack_intr ack_intr = {
-@@ -2226,6 +2226,7 @@
- &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out)));
-
- /* Start input DMA. */
-+ flush_dma_context(&pj->iop->ctx_in);
- DMA_START_CONTEXT(regi_dma9, virt_to_phys(&pj->iop->ctx_in));
-
- /* Start output DMA. */
-@@ -3459,7 +3460,7 @@
- int err;
- int i;
- static int initialized = 0;
--
-+
- if (initialized)
- return 0;
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/gpio.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/gpio.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/gpio.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/gpio.c 2007-01-09 10:29:20.000000000 +0100
-@@ -1,68 +1,15 @@
--/* $Id: gpio.c,v 1.16 2005/06/19 17:06:49 starvik Exp $
-- *
-+/*
- * ETRAX CRISv32 general port I/O device
- *
-- * Copyright (c) 1999, 2000, 2001, 2002, 2003 Axis Communications AB
-+ * Copyright (c) 1999-2006 Axis Communications AB
- *
- * Authors: Bjorn Wesen (initial version)
- * Ola Knutsson (LED handling)
- * Johan Adolfsson (read/set directions, write, port G,
- * port to ETRAX FS.
- *
-- * $Log: gpio.c,v $
-- * Revision 1.16 2005/06/19 17:06:49 starvik
-- * Merge of Linux 2.6.12.
-- *
-- * Revision 1.15 2005/05/25 08:22:20 starvik
-- * Changed GPIO port order to fit packages/devices/axis-2.4.
-- *
-- * Revision 1.14 2005/04/24 18:35:08 starvik
-- * Updated with final register headers.
-- *
-- * Revision 1.13 2005/03/15 15:43:00 starvik
-- * dev_id needs to be supplied for shared IRQs.
-- *
-- * Revision 1.12 2005/03/10 17:12:00 starvik
-- * Protect alarm list with spinlock.
-- *
-- * Revision 1.11 2005/01/05 06:08:59 starvik
-- * No need to do local_irq_disable after local_irq_save.
-- *
-- * Revision 1.10 2004/11/19 08:38:31 starvik
-- * Removed old crap.
-- *
-- * Revision 1.9 2004/05/14 07:58:02 starvik
-- * Merge of changes from 2.4
-- *
-- * Revision 1.8 2003/09/11 07:29:50 starvik
-- * Merge of Linux 2.6.0-test5
-- *
-- * Revision 1.7 2003/07/10 13:25:46 starvik
-- * Compiles for 2.5.74
-- * Lindented ethernet.c
-- *
-- * Revision 1.6 2003/07/04 08:27:46 starvik
-- * Merge of Linux 2.5.74
-- *
-- * Revision 1.5 2003/06/10 08:26:37 johana
-- * Etrax -> ETRAX CRISv32
-- *
-- * Revision 1.4 2003/06/05 14:22:48 johana
-- * Initialise some_alarms.
-- *
-- * Revision 1.3 2003/06/05 10:15:46 johana
-- * New INTR_VECT macros.
-- * Enable interrupts in global config.
-- *
-- * Revision 1.2 2003/06/03 15:52:50 johana
-- * Initial CRIS v32 version.
-- *
-- * Revision 1.1 2003/06/03 08:53:15 johana
-- * Copy of os/lx25/arch/cris/arch-v10/drivers/gpio.c version 1.7.
-- *
- */
-
--
- #include <linux/module.h>
- #include <linux/sched.h>
- #include <linux/slab.h>
-@@ -85,6 +32,13 @@
- #include <asm/system.h>
- #include <asm/irq.h>
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+#include "i2c.h"
-+
-+#define VIRT_I2C_ADDR 0x40
-+#endif
-+
-+
- /* The following gio ports on ETRAX FS is available:
- * pa 8 bits, supports interrupts off, hi, low, set, posedge, negedge anyedge
- * pb 18 bits
-@@ -111,6 +65,10 @@
- static wait_queue_head_t *gpio_wq;
- #endif
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
-+ unsigned long arg);
-+#endif
- static int gpio_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg);
- static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
-@@ -148,55 +106,75 @@
- #define GIO_REG_RD_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg )
- #define GIO_REG_WR_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg )
- unsigned long led_dummy;
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+static unsigned long virtual_dummy;
-+static unsigned long virtual_rw_pv_oe = CONFIG_ETRAX_DEF_GIO_PV_OE;
-+static unsigned short cached_virtual_gpio_read = 0;
-+#endif
-
--static volatile unsigned long *data_out[NUM_PORTS] = {
-- GIO_REG_WR_ADDR(rw_pa_dout),
-- GIO_REG_WR_ADDR(rw_pb_dout),
-+static volatile unsigned long *data_out[NUM_PORTS] = {
-+ GIO_REG_WR_ADDR(rw_pa_dout),
-+ GIO_REG_WR_ADDR(rw_pb_dout),
- &led_dummy,
-- GIO_REG_WR_ADDR(rw_pc_dout),
-- GIO_REG_WR_ADDR(rw_pd_dout),
-+ GIO_REG_WR_ADDR(rw_pc_dout),
-+ GIO_REG_WR_ADDR(rw_pd_dout),
- GIO_REG_WR_ADDR(rw_pe_dout),
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ &virtual_dummy,
-+#endif
- };
-
--static volatile unsigned long *data_in[NUM_PORTS] = {
-- GIO_REG_RD_ADDR(r_pa_din),
-- GIO_REG_RD_ADDR(r_pb_din),
-+static volatile unsigned long *data_in[NUM_PORTS] = {
-+ GIO_REG_RD_ADDR(r_pa_din),
-+ GIO_REG_RD_ADDR(r_pb_din),
- &led_dummy,
-- GIO_REG_RD_ADDR(r_pc_din),
-- GIO_REG_RD_ADDR(r_pd_din),
-+ GIO_REG_RD_ADDR(r_pc_din),
-+ GIO_REG_RD_ADDR(r_pd_din),
- GIO_REG_RD_ADDR(r_pe_din),
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ &virtual_dummy,
-+#endif
- };
-
--static unsigned long changeable_dir[NUM_PORTS] = {
-+static unsigned long changeable_dir[NUM_PORTS] = {
- CONFIG_ETRAX_PA_CHANGEABLE_DIR,
- CONFIG_ETRAX_PB_CHANGEABLE_DIR,
- 0,
- CONFIG_ETRAX_PC_CHANGEABLE_DIR,
-- CONFIG_ETRAX_PD_CHANGEABLE_DIR,
-+ CONFIG_ETRAX_PD_CHANGEABLE_DIR,
- CONFIG_ETRAX_PE_CHANGEABLE_DIR,
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ CONFIG_ETRAX_PV_CHANGEABLE_DIR,
-+#endif
- };
-
--static unsigned long changeable_bits[NUM_PORTS] = {
-+static unsigned long changeable_bits[NUM_PORTS] = {
- CONFIG_ETRAX_PA_CHANGEABLE_BITS,
- CONFIG_ETRAX_PB_CHANGEABLE_BITS,
- 0,
- CONFIG_ETRAX_PC_CHANGEABLE_BITS,
- CONFIG_ETRAX_PD_CHANGEABLE_BITS,
- CONFIG_ETRAX_PE_CHANGEABLE_BITS,
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ CONFIG_ETRAX_PV_CHANGEABLE_BITS,
-+#endif
- };
-
--static volatile unsigned long *dir_oe[NUM_PORTS] = {
-- GIO_REG_WR_ADDR(rw_pa_oe),
-- GIO_REG_WR_ADDR(rw_pb_oe),
-+static volatile unsigned long *dir_oe[NUM_PORTS] = {
-+ GIO_REG_WR_ADDR(rw_pa_oe),
-+ GIO_REG_WR_ADDR(rw_pb_oe),
- &led_dummy,
-- GIO_REG_WR_ADDR(rw_pc_oe),
-- GIO_REG_WR_ADDR(rw_pd_oe),
-+ GIO_REG_WR_ADDR(rw_pc_oe),
-+ GIO_REG_WR_ADDR(rw_pd_oe),
- GIO_REG_WR_ADDR(rw_pe_oe),
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ &virtual_rw_pv_oe,
-+#endif
- };
-
-
-
--static unsigned int
-+static unsigned int
- gpio_poll(struct file *file,
- poll_table *wait)
- {
-@@ -278,7 +256,7 @@
- return 0;
-
- if ((data & priv->highalarm) ||
-- (~data & priv->lowalarm)) {
-+ (~data & priv->lowalarm)) {
- mask = POLLIN|POLLRDNORM;
- }
-
-@@ -288,11 +266,26 @@
-
- int etrax_gpio_wake_up_check(void)
- {
-- struct gpio_private *priv = alarmlist;
-+ struct gpio_private *priv;
- unsigned long data = 0;
-+ unsigned long flags;
- int ret = 0;
-+ spin_lock_irqsave(&alarm_lock, flags);
-+ priv = alarmlist;
- while (priv) {
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ if (priv->minor == GPIO_MINOR_V) {
-+ data = (unsigned long)cached_virtual_gpio_read;
-+ }
-+ else {
-+ data = *data_in[priv->minor];
-+ if (priv->minor == GPIO_MINOR_A) {
-+ priv->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
-+ }
-+ }
-+#else
- data = *data_in[priv->minor];
-+#endif
- if ((data & priv->highalarm) ||
- (~data & priv->lowalarm)) {
- DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor));
-@@ -301,11 +294,12 @@
- }
- priv = priv->next;
- }
-+ spin_unlock_irqrestore(&alarm_lock, flags);
- return ret;
- }
-
--static irqreturn_t
--gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+static irqreturn_t
-+gpio_poll_timer_interrupt(int irq, void *dev_id)
- {
- if (gpio_some_alarms) {
- return IRQ_RETVAL(etrax_gpio_wake_up_check());
-@@ -314,14 +308,17 @@
- }
-
- static irqreturn_t
--gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+gpio_pa_interrupt(int irq, void *dev_id)
- {
- reg_gio_rw_intr_mask intr_mask;
- reg_gio_r_masked_intr masked_intr;
- reg_gio_rw_ack_intr ack_intr;
- unsigned long tmp;
- unsigned long tmp2;
--
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ unsigned char enable_gpiov_ack = 0;
-+#endif
-+
- /* Find what PA interrupts are active */
- masked_intr = REG_RD(gio, regi_gio, r_masked_intr);
- tmp = REG_TYPE_CONV(unsigned long, reg_gio_r_masked_intr, masked_intr);
-@@ -331,6 +328,17 @@
- tmp &= (gpio_pa_high_alarms | gpio_pa_low_alarms);
- spin_unlock(&alarm_lock);
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ /* Something changed on virtual GPIO. Interrupt is acked by
-+ * reading the device.
-+ */
-+ if (tmp & (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN)) {
-+ i2c_read(VIRT_I2C_ADDR, (void *)&cached_virtual_gpio_read,
-+ sizeof(cached_virtual_gpio_read));
-+ enable_gpiov_ack = 1;
-+ }
-+#endif
-+
- /* Ack them */
- ack_intr = REG_TYPE_CONV(reg_gio_rw_ack_intr, unsigned long, tmp);
- REG_WR(gio, regi_gio, rw_ack_intr, ack_intr);
-@@ -339,13 +347,21 @@
- intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
- tmp2 = REG_TYPE_CONV(unsigned long, reg_gio_rw_intr_mask, intr_mask);
- tmp2 &= ~tmp;
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ /* Do not disable interrupt on virtual GPIO. Changes on virtual
-+ * pins are only noticed by an interrupt.
-+ */
-+ if (enable_gpiov_ack) {
-+ tmp2 |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
-+ }
-+#endif
- intr_mask = REG_TYPE_CONV(reg_gio_rw_intr_mask, unsigned long, tmp2);
- REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
-
- if (gpio_some_alarms) {
- return IRQ_RETVAL(etrax_gpio_wake_up_check());
- }
-- return IRQ_NONE;
-+ return IRQ_NONE;
- }
-
-
-@@ -358,8 +374,13 @@
- unsigned long shadow;
- volatile unsigned long *port;
- ssize_t retval = count;
-- /* Only bits 0-7 may be used for write operations but allow all
-+ /* Only bits 0-7 may be used for write operations but allow all
- devices except leds... */
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ if (priv->minor == GPIO_MINOR_V) {
-+ return -EFAULT;
-+ }
-+#endif
- if (priv->minor == GPIO_MINOR_LEDS) {
- return -EFAULT;
- }
-@@ -416,25 +437,24 @@
-
- static int
- gpio_open(struct inode *inode, struct file *filp)
--{
-+{
- struct gpio_private *priv;
- int p = iminor(inode);
-
- if (p > GPIO_MINOR_LAST)
- return -EINVAL;
-
-- priv = (struct gpio_private *)kmalloc(sizeof(struct gpio_private),
-+ priv = (struct gpio_private *)kmalloc(sizeof(struct gpio_private),
- GFP_KERNEL);
-
- if (!priv)
- return -ENOMEM;
-+ memset(priv, 0, sizeof(*priv));
-
- priv->minor = p;
-
-- /* initialize the io/alarm struct and link it into our alarmlist */
-+ /* initialize the io/alarm struct */
-
-- priv->next = alarmlist;
-- alarmlist = priv;
- priv->clk_mask = 0;
- priv->data_mask = 0;
- priv->highalarm = 0;
-@@ -443,20 +463,30 @@
-
- filp->private_data = (void *)priv;
-
-+ /* link it into our alarmlist */
-+ spin_lock_irq(&alarm_lock);
-+ priv->next = alarmlist;
-+ alarmlist = priv;
-+ spin_unlock_irq(&alarm_lock);
-+
- return 0;
- }
-
- static int
- gpio_release(struct inode *inode, struct file *filp)
- {
-- struct gpio_private *p = alarmlist;
-- struct gpio_private *todel = (struct gpio_private *)filp->private_data;
-+ struct gpio_private *p;
-+ struct gpio_private *todel;
- /* local copies while updating them: */
- unsigned long a_high, a_low;
- unsigned long some_alarms;
-
- /* unlink from alarmlist and free the private structure */
-
-+ spin_lock_irq(&alarm_lock);
-+ p = alarmlist;
-+ todel = (struct gpio_private *)filp->private_data;
-+
- if (p == todel) {
- alarmlist = todel->next;
- } else {
-@@ -473,6 +503,9 @@
- a_low = 0;
- while (p) {
- if (p->minor == GPIO_MINOR_A) {
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ p->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
-+#endif
- a_high |= p->highalarm;
- a_low |= p->lowalarm;
- }
-@@ -483,23 +516,30 @@
- p = p->next;
- }
-
-- spin_lock(&alarm_lock);
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ /* Variables 'some_alarms' and 'a_low' needs to be set here again
-+ * to ensure that interrupt for virtual GPIO is handled.
-+ */
-+ some_alarms = 1;
-+ a_low |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
-+#endif
-+
- gpio_some_alarms = some_alarms;
- gpio_pa_high_alarms = a_high;
- gpio_pa_low_alarms = a_low;
-- spin_unlock(&alarm_lock);
-+ spin_unlock_irq(&alarm_lock);
-
- return 0;
- }
-
--/* Main device API. ioctl's to read/set/clear bits, as well as to
-+/* Main device API. ioctl's to read/set/clear bits, as well as to
- * set alarms to wait for using a subsequent select().
- */
-
- unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg)
- {
-- /* Set direction 0=unchanged 1=input,
-- * return mask with 1=input
-+ /* Set direction 0=unchanged 1=input,
-+ * return mask with 1=input
- */
- unsigned long flags;
- unsigned long dir_shadow;
-@@ -512,6 +552,10 @@
-
- if (priv->minor == GPIO_MINOR_A)
- dir_shadow ^= 0xFF; /* Only 8 bits */
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ else if (priv->minor == GPIO_MINOR_V)
-+ dir_shadow ^= 0xFFFF; /* Only 16 bits */
-+#endif
- else
- dir_shadow ^= 0x3FFFF; /* Only 18 bits */
- return dir_shadow;
-@@ -546,6 +590,11 @@
- return -EINVAL;
- }
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ if (priv->minor == GPIO_MINOR_V)
-+ return virtual_gpio_ioctl(file, cmd, arg);
-+#endif
-+
- switch (_IOC_NR(cmd)) {
- case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
- // read the port
-@@ -553,8 +602,6 @@
- break;
- case IO_SETBITS:
- local_irq_save(flags);
-- if (arg & 0x04)
-- printk("GPIO SET 2\n");
- // set changeable bits with a 1 in arg
- shadow = *data_out[priv->minor];
- shadow |= (arg & changeable_bits[priv->minor]);
-@@ -563,8 +610,6 @@
- break;
- case IO_CLRBITS:
- local_irq_save(flags);
-- if (arg & 0x04)
-- printk("GPIO CLR 2\n");
- // clear changeable bits with a 1 in arg
- shadow = *data_out[priv->minor];
- shadow &= ~(arg & changeable_bits[priv->minor]);
-@@ -574,52 +619,52 @@
- case IO_HIGHALARM:
- // set alarm when bits with 1 in arg go high
- priv->highalarm |= arg;
-- spin_lock(&alarm_lock);
-+ spin_lock_irqsave(&alarm_lock, flags);
- gpio_some_alarms = 1;
- if (priv->minor == GPIO_MINOR_A) {
- gpio_pa_high_alarms |= arg;
- }
-- spin_unlock(&alarm_lock);
-+ spin_unlock_irqrestore(&alarm_lock, flags);
- break;
- case IO_LOWALARM:
- // set alarm when bits with 1 in arg go low
- priv->lowalarm |= arg;
-- spin_lock(&alarm_lock);
-+ spin_lock_irqsave(&alarm_lock, flags);
- gpio_some_alarms = 1;
- if (priv->minor == GPIO_MINOR_A) {
- gpio_pa_low_alarms |= arg;
- }
-- spin_unlock(&alarm_lock);
-+ spin_unlock_irqrestore(&alarm_lock, flags);
- break;
- case IO_CLRALARM:
- // clear alarm for bits with 1 in arg
- priv->highalarm &= ~arg;
- priv->lowalarm &= ~arg;
-- spin_lock(&alarm_lock);
-+ spin_lock_irqsave(&alarm_lock, flags);
- if (priv->minor == GPIO_MINOR_A) {
-- if (gpio_pa_high_alarms & arg ||
-+ if (gpio_pa_high_alarms & arg ||
- gpio_pa_low_alarms & arg) {
- /* Must update the gpio_pa_*alarms masks */
- }
- }
-- spin_unlock(&alarm_lock);
-+ spin_unlock_irqrestore(&alarm_lock, flags);
- break;
- case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
- /* Read direction 0=input 1=output */
- return *dir_oe[priv->minor];
- case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
-- /* Set direction 0=unchanged 1=input,
-- * return mask with 1=input
-+ /* Set direction 0=unchanged 1=input,
-+ * return mask with 1=input
- */
- return setget_input(priv, arg);
- break;
- case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
-- /* Set direction 0=unchanged 1=output,
-- * return mask with 1=output
-+ /* Set direction 0=unchanged 1=output,
-+ * return mask with 1=output
- */
- return setget_output(priv, arg);
-
-- case IO_CFG_WRITE_MODE:
-+ case IO_CFG_WRITE_MODE:
- {
- unsigned long dir_shadow;
- dir_shadow = *dir_oe[priv->minor];
-@@ -641,7 +686,7 @@
- }
- break;
- }
-- case IO_READ_INBITS:
-+ case IO_READ_INBITS:
- /* *arg is result of reading the input pins */
- val = *data_in[priv->minor];
- if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
-@@ -654,7 +699,7 @@
- if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
- return -EFAULT;
- break;
-- case IO_SETGET_INPUT:
-+ case IO_SETGET_INPUT:
- /* bits set in *arg is set to input,
- * *arg updated with current input pins.
- */
-@@ -684,6 +729,132 @@
- return 0;
- }
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+static int
-+virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+ unsigned long flags;
-+ unsigned short val;
-+ unsigned short shadow;
-+ struct gpio_private *priv = (struct gpio_private *)file->private_data;
-+
-+ switch (_IOC_NR(cmd)) {
-+ case IO_SETBITS:
-+ local_irq_save(flags);
-+ // set changeable bits with a 1 in arg
-+ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ shadow |= ~*dir_oe[priv->minor];
-+ shadow |= (arg & changeable_bits[priv->minor]);
-+ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ local_irq_restore(flags);
-+ break;
-+ case IO_CLRBITS:
-+ local_irq_save(flags);
-+ // clear changeable bits with a 1 in arg
-+ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ shadow |= ~*dir_oe[priv->minor];
-+ shadow &= ~(arg & changeable_bits[priv->minor]);
-+ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ local_irq_restore(flags);
-+ break;
-+ case IO_HIGHALARM:
-+ // set alarm when bits with 1 in arg go high
-+ priv->highalarm |= arg;
-+ spin_lock(&alarm_lock);
-+ gpio_some_alarms = 1;
-+ spin_unlock(&alarm_lock);
-+ break;
-+ case IO_LOWALARM:
-+ // set alarm when bits with 1 in arg go low
-+ priv->lowalarm |= arg;
-+ spin_lock(&alarm_lock);
-+ gpio_some_alarms = 1;
-+ spin_unlock(&alarm_lock);
-+ break;
-+ case IO_CLRALARM:
-+ // clear alarm for bits with 1 in arg
-+ priv->highalarm &= ~arg;
-+ priv->lowalarm &= ~arg;
-+ spin_lock(&alarm_lock);
-+ spin_unlock(&alarm_lock);
-+ break;
-+ case IO_CFG_WRITE_MODE:
-+ {
-+ unsigned long dir_shadow;
-+ dir_shadow = *dir_oe[priv->minor];
-+
-+ priv->clk_mask = arg & 0xFF;
-+ priv->data_mask = (arg >> 8) & 0xFF;
-+ priv->write_msb = (arg >> 16) & 0x01;
-+ /* Check if we're allowed to change the bits and
-+ * the direction is correct
-+ */
-+ if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
-+ (priv->data_mask & changeable_bits[priv->minor]) &&
-+ (priv->clk_mask & dir_shadow) &&
-+ (priv->data_mask & dir_shadow)))
-+ {
-+ priv->clk_mask = 0;
-+ priv->data_mask = 0;
-+ return -EPERM;
-+ }
-+ break;
-+ }
-+ case IO_READ_INBITS:
-+ /* *arg is result of reading the input pins */
-+ val = cached_virtual_gpio_read;
-+ val &= ~*dir_oe[priv->minor];
-+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
-+ return -EFAULT;
-+ return 0;
-+ break;
-+ case IO_READ_OUTBITS:
-+ /* *arg is result of reading the output shadow */
-+ i2c_read(VIRT_I2C_ADDR, (void *)&val, sizeof(val));
-+ val &= *dir_oe[priv->minor];
-+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
-+ return -EFAULT;
-+ break;
-+ case IO_SETGET_INPUT:
-+ {
-+ /* bits set in *arg is set to input,
-+ * *arg updated with current input pins.
-+ */
-+ unsigned short input_mask = ~*dir_oe[priv->minor];
-+ if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
-+ return -EFAULT;
-+ val = setget_input(priv, val);
-+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
-+ return -EFAULT;
-+ if ((input_mask & val) != input_mask) {
-+ /* Input pins changed. All ports desired as input
-+ * should be set to logic 1.
-+ */
-+ unsigned short change = input_mask ^ val;
-+ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ shadow &= ~change;
-+ shadow |= val;
-+ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+ }
-+ break;
-+ }
-+ case IO_SETGET_OUTPUT:
-+ /* bits set in *arg is set to output,
-+ * *arg updated with current output pins.
-+ */
-+ if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
-+ return -EFAULT;
-+ val = setget_output(priv, val);
-+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
-+ return -EFAULT;
-+ break;
-+ default:
-+ return -EINVAL;
-+ } /* switch */
-+ return 0;
-+}
-+#endif /* CONFIG_ETRAX_VIRTUAL_GPIO */
-+
- static int
- gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
- {
-@@ -714,6 +885,66 @@
- .release = gpio_release,
- };
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+static void
-+virtual_gpio_init(void)
-+{
-+ reg_gio_rw_intr_cfg intr_cfg;
-+ reg_gio_rw_intr_mask intr_mask;
-+ unsigned short shadow;
-+
-+ shadow = ~virtual_rw_pv_oe; /* Input ports should be set to logic 1 */
-+ shadow |= CONFIG_ETRAX_DEF_GIO_PV_OUT;
-+ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
-+
-+ /* Set interrupt mask and on what state the interrupt shall trigger.
-+ * For virtual gpio the interrupt shall trigger on logic '0'.
-+ */
-+ intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg);
-+ intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
-+
-+ switch (CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN) {
-+ case 0:
-+ intr_cfg.pa0 = regk_gio_lo;
-+ intr_mask.pa0 = regk_gio_yes;
-+ break;
-+ case 1:
-+ intr_cfg.pa1 = regk_gio_lo;
-+ intr_mask.pa1 = regk_gio_yes;
-+ break;
-+ case 2:
-+ intr_cfg.pa2 = regk_gio_lo;
-+ intr_mask.pa2 = regk_gio_yes;
-+ break;
-+ case 3:
-+ intr_cfg.pa3 = regk_gio_lo;
-+ intr_mask.pa3 = regk_gio_yes;
-+ break;
-+ case 4:
-+ intr_cfg.pa4 = regk_gio_lo;
-+ intr_mask.pa4 = regk_gio_yes;
-+ break;
-+ case 5:
-+ intr_cfg.pa5 = regk_gio_lo;
-+ intr_mask.pa5 = regk_gio_yes;
-+ break;
-+ case 6:
-+ intr_cfg.pa6 = regk_gio_lo;
-+ intr_mask.pa6 = regk_gio_yes;
-+ break;
-+ case 7:
-+ intr_cfg.pa7 = regk_gio_lo;
-+ intr_mask.pa7 = regk_gio_yes;
-+ break;
-+ }
-+
-+ REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg);
-+ REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
-+
-+ gpio_pa_low_alarms |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
-+ gpio_some_alarms = 1;
-+}
-+#endif
-
- /* main driver initialization routine, called from mem.c */
-
-@@ -732,17 +963,18 @@
- }
-
- /* Clear all leds */
-- LED_NETWORK_SET(0);
-+ LED_NETWORK_GRP0_SET(0);
-+ LED_NETWORK_GRP1_SET(0);
- LED_ACTIVE_SET(0);
- LED_DISK_READ(0);
- LED_DISK_WRITE(0);
-
-- printk("ETRAX FS GPIO driver v2.5, (c) 2003-2005 Axis Communications AB\n");
-+ printk("ETRAX FS GPIO driver v2.5, (c) 2003-2006 Axis Communications AB\n");
- /* We call etrax_gpio_wake_up_check() from timer interrupt and
- * from cpu_idle() in kernel/process.c
- * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms
- * in some tests.
-- */
-+ */
- if (request_irq(TIMER_INTR_VECT, gpio_poll_timer_interrupt,
- IRQF_SHARED | IRQF_DISABLED,"gpio poll", &alarmlist)) {
- printk("err: timer0 irq for gpio\n");
-@@ -757,6 +989,10 @@
- intr_mask.gen_io = 1;
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
-
-+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
-+ virtual_gpio_init();
-+#endif
-+
- return res;
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.c 2006-11-06 16:48:06.000000000 +0100
-@@ -8,11 +8,11 @@
- *!
- *! Nov 30 1998 Torbjorn Eliasson Initial version.
- *! Bjorn Wesen Elinux kernel version.
--*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
-+*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
- *! don't use PB_I2C if DS1302 uses same bits,
- *! use PB.
- *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
--*| generates nack on last received byte,
-+*| generates nack on last received byte,
- *| instead of ack.
- *| i2c_getack changed data level while clock
- *| was high, causing DS75 to see a stop condition
-@@ -22,7 +22,7 @@
- *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
- *!
- *!***************************************************************************/
--/* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */
-+/* $Id: i2c.c,v 1.6 2006/11/06 15:48:06 imres Exp $ */
- /****************** INCLUDE FILES SECTION ***********************************/
-
- #include <linux/module.h>
-@@ -60,8 +60,8 @@
- #define I2C_DATA_HIGH 1
- #define I2C_DATA_LOW 0
-
--#define i2c_enable()
--#define i2c_disable()
-+#define i2c_enable()
-+#define i2c_disable()
-
- /* enable or disable output-enable, to select output or input on the i2c bus */
-
-@@ -79,6 +79,8 @@
-
- #define i2c_delay(usecs) udelay(usecs)
-
-+static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
-+
- /****************** VARIABLE SECTION ************************************/
-
- static struct crisv32_iopin cris_i2c_clk;
-@@ -154,7 +156,7 @@
- } else {
- i2c_data(I2C_DATA_LOW);
- }
--
-+
- i2c_delay(CLOCK_LOW_TIME/2);
- i2c_clk(I2C_CLOCK_HIGH);
- i2c_delay(CLOCK_HIGH_TIME);
-@@ -213,7 +215,7 @@
- }
- i2c_clk(I2C_CLOCK_HIGH);
- i2c_delay(CLOCK_HIGH_TIME);
--
-+
- /*
- * we leave the clock low, getbyte is usually followed
- * by sendack/nack, they assume the clock to be low
-@@ -252,6 +254,7 @@
- * generate ACK clock pulse
- */
- i2c_clk(I2C_CLOCK_HIGH);
-+#if 0
- /*
- * Use PORT PB instead of I2C
- * for input. (I2C not working)
-@@ -264,6 +267,8 @@
- i2c_data(1);
- i2c_disable();
- i2c_dir_in();
-+#endif
-+
- /*
- * now wait for ack
- */
-@@ -285,13 +290,15 @@
- * before we enable our output. If we keep data high
- * and enable output, we would generate a stop condition.
- */
-+#if 0
- i2c_data(I2C_DATA_LOW);
--
-+
- /*
- * end clock pulse
- */
- i2c_enable();
- i2c_dir_out();
-+#endif
- i2c_clk(I2C_CLOCK_LOW);
- i2c_delay(CLOCK_HIGH_TIME/4);
- /*
-@@ -338,7 +345,7 @@
- */
- i2c_data(I2C_DATA_HIGH);
- i2c_delay(CLOCK_LOW_TIME);
--
-+
- i2c_dir_in();
- }
-
-@@ -369,24 +376,160 @@
- i2c_delay(CLOCK_HIGH_TIME);
- i2c_clk(I2C_CLOCK_LOW);
- i2c_delay(CLOCK_LOW_TIME);
--
-+
- i2c_dir_in();
- }
-
- /*#---------------------------------------------------------------------------
- *#
-+*# FUNCTION NAME: i2c_write
-+*#
-+*# DESCRIPTION : Writes a value to an I2C device
-+*#
-+*#--------------------------------------------------------------------------*/
-+int
-+i2c_write(unsigned char theSlave, void *data, size_t nbytes)
-+{
-+ int error, cntr = 3;
-+ unsigned char bytes_wrote = 0;
-+ unsigned char value;
-+ unsigned long flags;
-+
-+ spin_lock(&i2c_lock);
-+
-+ do {
-+ error = 0;
-+ /*
-+ * we don't like to be interrupted
-+ */
-+ local_irq_save(flags);
-+
-+ i2c_start();
-+ /*
-+ * send slave address
-+ */
-+ i2c_outbyte((theSlave & 0xfe));
-+ /*
-+ * wait for ack
-+ */
-+ if(!i2c_getack())
-+ error = 1;
-+ /*
-+ * send data
-+ */
-+ for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
-+ memcpy(&value, data + bytes_wrote, sizeof value);
-+ i2c_outbyte(value);
-+ /*
-+ * now it's time to wait for ack
-+ */
-+ if (!i2c_getack())
-+ error |= 4;
-+ }
-+ /*
-+ * end byte stream
-+ */
-+ i2c_stop();
-+ /*
-+ * enable interrupt again
-+ */
-+ local_irq_restore(flags);
-+
-+ } while(error && cntr--);
-+
-+ i2c_delay(CLOCK_LOW_TIME);
-+
-+ spin_unlock(&i2c_lock);
-+
-+ return -error;
-+}
-+
-+/*#---------------------------------------------------------------------------
-+*#
-+*# FUNCTION NAME: i2c_read
-+*#
-+*# DESCRIPTION : Reads a value from an I2C device
-+*#
-+*#--------------------------------------------------------------------------*/
-+int
-+i2c_read(unsigned char theSlave, void *data, size_t nbytes)
-+{
-+ unsigned char b = 0;
-+ unsigned char bytes_read = 0;
-+ int error, cntr = 3;
-+ unsigned long flags;
-+
-+ spin_lock(&i2c_lock);
-+
-+ do {
-+ error = 0;
-+ memset(data, 0, nbytes);
-+ /*
-+ * we don't like to be interrupted
-+ */
-+ local_irq_save(flags);
-+ /*
-+ * generate start condition
-+ */
-+ i2c_start();
-+
-+ /*
-+ * send slave address
-+ */
-+ i2c_outbyte((theSlave | 0x01));
-+ /*
-+ * wait for ack
-+ */
-+ if(!i2c_getack())
-+ error = 1;
-+ /*
-+ * fetch data
-+ */
-+ for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
-+ b = i2c_inbyte();
-+ memcpy(data + bytes_read, &b, sizeof b);
-+
-+ if (bytes_read < (nbytes - 1)) {
-+ i2c_sendack();
-+ }
-+ }
-+ /*
-+ * last received byte needs to be nacked
-+ * instead of acked
-+ */
-+ i2c_sendnack();
-+ /*
-+ * end sequence
-+ */
-+ i2c_stop();
-+ /*
-+ * enable interrupt again
-+ */
-+ local_irq_restore(flags);
-+
-+ } while(error && cntr--);
-+
-+ spin_unlock(&i2c_lock);
-+
-+ return -error;
-+}
-+
-+/*#---------------------------------------------------------------------------
-+*#
- *# FUNCTION NAME: i2c_writereg
- *#
- *# DESCRIPTION : Writes a value to an I2C device
- *#
- *#--------------------------------------------------------------------------*/
- int
--i2c_writereg(unsigned char theSlave, unsigned char theReg,
-+i2c_writereg(unsigned char theSlave, unsigned char theReg,
- unsigned char theValue)
- {
- int error, cntr = 3;
- unsigned long flags;
-
-+ spin_lock(&i2c_lock);
-+
- do {
- error = 0;
- /*
-@@ -431,10 +574,12 @@
- * enable interrupt again
- */
- local_irq_restore(flags);
--
-+
- } while(error && cntr--);
-
- i2c_delay(CLOCK_LOW_TIME);
-+
-+ spin_unlock(&i2c_lock);
-
- return -error;
- }
-@@ -453,6 +598,8 @@
- int error, cntr = 3;
- unsigned long flags;
-
-+ spin_lock(&i2c_lock);
-+
- do {
- error = 0;
- /*
-@@ -463,7 +610,7 @@
- * generate start condition
- */
- i2c_start();
--
-+
- /*
- * send slave address
- */
-@@ -482,7 +629,7 @@
- * now it's time to wait for ack
- */
- if(!i2c_getack())
-- error = 1;
-+ error |= 2;
- /*
- * repeat start condition
- */
-@@ -496,7 +643,7 @@
- * wait for ack
- */
- if(!i2c_getack())
-- error = 1;
-+ error |= 4;
- /*
- * fetch register
- */
-@@ -514,9 +661,11 @@
- * enable interrupt again
- */
- local_irq_restore(flags);
--
-+
- } while(error && cntr--);
-
-+ spin_unlock(&i2c_lock);
-+
- return b;
- }
-
-@@ -546,7 +695,7 @@
- switch (_IOC_NR(cmd)) {
- case I2C_WRITEREG:
- /* write to an i2c slave */
-- D(printk("i2cw %d %d %d\n",
-+ D(printk("i2cw %d %d %d\n",
- I2C_ARGSLAVE(arg),
- I2C_ARGREG(arg),
- I2C_ARGVALUE(arg)));
-@@ -558,18 +707,18 @@
- {
- unsigned char val;
- /* read from an i2c slave */
-- D(printk("i2cr %d %d ",
-+ D(printk("i2cr %d %d ",
- I2C_ARGSLAVE(arg),
- I2C_ARGREG(arg)));
- val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
- D(printk("= %d\n", val));
- return val;
-- }
-+ }
- default:
- return -EINVAL;
-
- }
--
-+
- return 0;
- }
-
-@@ -583,28 +732,53 @@
- int __init
- i2c_init(void)
- {
-- int res;
-+ static int res = 0;
-+ static int first = 1;
-+
-+ if (!first) {
-+ return res;
-+ }
-+ first = 0;
-
-- /* Setup and enable the Port B I2C interface */
-+ /* Setup and enable the DATA and CLK pins */
-
-- crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
-- crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
-+ res = crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
-+ if (res < 0) {
-+ return res;
-+ }
-+
-+ res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
-+ crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
-+
-+ return res;
-+}
-
-- /* register char device */
-
-+int __init
-+i2c_register(void)
-+{
-+
-+ int res;
-+
-+ res = i2c_init();
-+ if (res < 0) {
-+ return res;
-+ }
-+
-+ /* register char device */
- res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
- if(res < 0) {
- printk(KERN_ERR "i2c: couldn't get a major number.\n");
- return res;
- }
-
-- printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n");
--
-+ printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
-+
- return 0;
- }
-
- /* this makes sure that i2c_init is called during boot */
-
--module_init(i2c_init);
-+module_init(i2c_register);
-
- /****************** END OF FILE i2c.c ********************************/
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.h linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.h 2006-11-06 16:48:06.000000000 +0100
-@@ -3,6 +3,8 @@
-
- /* High level I2C actions */
- int __init i2c_init(void);
-+int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
-+int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
- unsigned char i2c_readreg(unsigned char theSlave, unsigned char theReg);
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/iop_fw_load.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/iop_fw_load.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/iop_fw_load.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/iop_fw_load.c 2005-04-07 11:27:46.000000000 +0200
-@@ -67,12 +67,12 @@
- return -ENODEV;
-
- /* get firmware */
-- retval = request_firmware(&fw_entry,
-- fw_name,
-+ retval = request_firmware(&fw_entry,
-+ fw_name,
- &iop_spu_device[spu_inst]);
- if (retval != 0)
- {
-- printk(KERN_ERR
-+ printk(KERN_ERR
- "iop_load_spu: Failed to load firmware \"%s\"\n",
- fw_name);
- return retval;
-@@ -123,7 +123,7 @@
- return retval;
- }
-
--int iop_fw_load_mpu(unsigned char *fw_name)
-+int iop_fw_load_mpu(unsigned char *fw_name)
- {
- const unsigned int start_addr = 0;
- reg_iop_mpu_rw_ctrl mpu_ctrl;
-@@ -135,13 +135,13 @@
- retval = request_firmware(&fw_entry, fw_name, &iop_mpu_device);
- if (retval != 0)
- {
-- printk(KERN_ERR
-+ printk(KERN_ERR
- "iop_load_spu: Failed to load firmware \"%s\"\n",
- fw_name);
- return retval;
- }
- data = (u32 *) fw_entry->data;
--
-+
- /* disable MPU */
- mpu_ctrl.en = regk_iop_mpu_no;
- REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/nandflash.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/nandflash.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/nandflash.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/nandflash.c 2006-10-16 14:56:46.000000000 +0200
-@@ -5,8 +5,8 @@
- *
- * Derived from drivers/mtd/nand/spia.c
- * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
-- *
-- * $Id: nandflash.c,v 1.3 2005/06/01 10:57:12 starvik Exp $
-+ *
-+ * $Id: nandflash.c,v 1.8 2006/10/16 12:56:46 ricardw Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
-@@ -32,37 +32,53 @@
- #define ALE_BIT 6
- #define BY_BIT 7
-
-+/* Bitmask for control pins */
-+#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
-+
-+/* Bitmask for mtd nand control bits */
-+#define CTRL_BITMASK (NAND_NCE | NAND_CLE | NAND_ALE)
-+
-+
- static struct mtd_info *crisv32_mtd = NULL;
--/*
-+/*
- * hardware specific access to control-lines
- */
--static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd)
-+static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
-+ unsigned int ctrl)
- {
- unsigned long flags;
-- reg_gio_rw_pa_dout dout = REG_RD(gio, regi_gio, rw_pa_dout);
-+ reg_gio_rw_pa_dout dout;
-+ struct nand_chip *this = mtd->priv;
-
- local_irq_save(flags);
-- switch(cmd){
-- case NAND_CTL_SETCLE:
-- dout.data |= (1<<CLE_BIT);
-- break;
-- case NAND_CTL_CLRCLE:
-- dout.data &= ~(1<<CLE_BIT);
-- break;
-- case NAND_CTL_SETALE:
-- dout.data |= (1<<ALE_BIT);
-- break;
-- case NAND_CTL_CLRALE:
-- dout.data &= ~(1<<ALE_BIT);
-- break;
-- case NAND_CTL_SETNCE:
-- dout.data |= (1<<CE_BIT);
-- break;
-- case NAND_CTL_CLRNCE:
-- dout.data &= ~(1<<CE_BIT);
-- break;
-+
-+ /* control bits change */
-+ if (ctrl & NAND_CTRL_CHANGE) {
-+ dout = REG_RD(gio, regi_gio, rw_pa_dout);
-+ dout.data &= ~PIN_BITMASK;
-+
-+#if (CE_BIT == 4 && NAND_NCE == 1 && \
-+ CLE_BIT == 5 && NAND_CLE == 2 && \
-+ ALE_BIT == 6 && NAND_ALE == 4)
-+ /* Pins in same order as control bits, but shifted.
-+ * Optimize for this case; works for 2.6.18 */
-+ dout.data |= ((ctrl & CTRL_BITMASK) ^ NAND_NCE) << CE_BIT;
-+#else
-+ /* the slow way */
-+ if (!(ctrl & NAND_NCE))
-+ dout.data |= (1 << CE_BIT);
-+ if (ctrl & NAND_CLE)
-+ dout.data |= (1 << CLE_BIT);
-+ if (ctrl & NAND_ALE)
-+ dout.data |= (1 << ALE_BIT);
-+#endif
-+ REG_WR(gio, regi_gio, rw_pa_dout, dout);
- }
-- REG_WR(gio, regi_gio, rw_pa_dout, dout);
-+
-+ /* command to chip */
-+ if (cmd != NAND_CMD_NONE)
-+ writeb(cmd, this->IO_ADDR_W);
-+
- local_irq_restore(flags);
- }
-
-@@ -129,26 +145,26 @@
- /* Set address of NAND IO lines */
- this->IO_ADDR_R = read_cs;
- this->IO_ADDR_W = write_cs;
-- this->hwcontrol = crisv32_hwcontrol;
-+ this->cmd_ctrl = crisv32_hwcontrol;
- this->dev_ready = crisv32_device_ready;
- /* 20 us command delay time */
-- this->chip_delay = 20;
-- this->eccmode = NAND_ECC_SOFT;
-+ this->chip_delay = 20;
-+ this->ecc.mode = NAND_ECC_SOFT;
-
- /* Enable the following for a flash based bad block table */
-- this->options = NAND_USE_FLASH_BBT;
-+ /* this->options = NAND_USE_FLASH_BBT; */
-
- /* Scan to find existance of the device */
- if (nand_scan (crisv32_mtd, 1)) {
- err = -ENXIO;
- goto out_ior;
- }
--
-+
- return crisv32_mtd;
--
-+
- out_ior:
- iounmap((void *)read_cs);
-- iounmap((void *)write_cs);
-+ iounmap((void *)write_cs);
- out_mtd:
- kfree (crisv32_mtd);
- return NULL;
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pcf8563.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pcf8563.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pcf8563.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pcf8563.c 2006-10-27 17:22:13.000000000 +0200
-@@ -10,7 +10,7 @@
- * 400 kbits/s. The built-in word address register is incremented
- * automatically after each written or read byte.
- *
-- * Copyright (c) 2002-2003, Axis Communications AB
-+ * Copyright (c) 2002-2006, Axis Communications AB
- * All rights reserved.
- *
- * Author: Tobias Anderberg <tobiasa@axis.com>.
-@@ -37,24 +37,27 @@
- #define PCF8563_MAJOR 121 /* Local major number. */
- #define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
- #define PCF8563_NAME "PCF8563"
--#define DRIVER_VERSION "$Revision: 1.1 $"
-+#define DRIVER_VERSION "$Revision: 1.9 $"
-
- /* Two simple wrapper macros, saves a few keystrokes. */
- #define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
- #define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
-
-+static DEFINE_SPINLOCK(rtc_lock); /* Protect state etc */
-+
- static const unsigned char days_in_month[] =
- { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
-
- int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
--int pcf8563_open(struct inode *, struct file *);
--int pcf8563_release(struct inode *, struct file *);
-+
-+/* Cache VL bit value read at driver init since writing the RTC_SECOND
-+ * register clears the VL status.
-+ */
-+static int voltage_low = 0;
-
- static struct file_operations pcf8563_fops = {
- owner: THIS_MODULE,
- ioctl: pcf8563_ioctl,
-- open: pcf8563_open,
-- release: pcf8563_release,
- };
-
- unsigned char
-@@ -62,7 +65,7 @@
- {
- unsigned char res = rtc_read(reg);
-
-- /* The PCF8563 does not return 0 for unimplemented bits */
-+ /* The PCF8563 does not return 0 for unimplemented bits. */
- switch (reg) {
- case RTC_SECONDS:
- case RTC_MINUTES:
-@@ -95,11 +98,6 @@
- void
- pcf8563_writereg(int reg, unsigned char val)
- {
--#ifdef CONFIG_ETRAX_RTC_READONLY
-- if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
-- return;
--#endif
--
- rtc_write(reg, val);
- }
-
-@@ -114,11 +112,13 @@
- tm->tm_mon = rtc_read(RTC_MONTH);
- tm->tm_year = rtc_read(RTC_YEAR);
-
-- if (tm->tm_sec & 0x80)
-+ if (tm->tm_sec & 0x80) {
- printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
- "information is no longer guaranteed!\n", PCF8563_NAME);
-+ }
-
-- tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0);
-+ tm->tm_year = BCD_TO_BIN(tm->tm_year) +
-+ ((tm->tm_mon & 0x80) ? 100 : 0);
- tm->tm_sec &= 0x7F;
- tm->tm_min &= 0x7F;
- tm->tm_hour &= 0x3F;
-@@ -137,8 +137,20 @@
- int __init
- pcf8563_init(void)
- {
-+ static int res = 0;
-+ static int first = 1;
-+
-+ if (!first) {
-+ return res;
-+ }
-+ first = 0;
-+
- /* Initiate the i2c protocol. */
-- i2c_init();
-+ res = i2c_init();
-+ if (res < 0) {
-+ printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
-+ return res;
-+ }
-
- /*
- * First of all we need to reset the chip. This is done by
-@@ -170,31 +182,28 @@
- if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
- goto err;
-
-- if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
-- printk(KERN_INFO "%s: Unable to get major numer %d for RTC device.\n",
-- PCF8563_NAME, PCF8563_MAJOR);
-- return -1;
-+ /* Check for low voltage, and warn about it. */
-+ if (rtc_read(RTC_SECONDS) & 0x80) {
-+ voltage_low = 1;
-+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
-+ "date/time information is no longer guaranteed!\n",
-+ PCF8563_NAME);
- }
-
-- printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
--
-- /* Check for low voltage, and warn about it.. */
-- if (rtc_read(RTC_SECONDS) & 0x80)
-- printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
-- "information is no longer guaranteed!\n", PCF8563_NAME);
--
-- return 0;
-+ return res;
-
- err:
- printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
-- return -1;
-+ res = -1;
-+ return res;
- }
-
- void __exit
- pcf8563_exit(void)
- {
- if (unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME) < 0) {
-- printk(KERN_INFO "%s: Unable to unregister device.\n", PCF8563_NAME);
-+ printk(KERN_INFO "%s: Unable to unregister device.\n",
-+ PCF8563_NAME);
- }
- }
-
-@@ -203,7 +212,8 @@
- * POSIX says so!
- */
- int
--pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
-+pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
-+ unsigned long arg)
- {
- /* Some sanity checks. */
- if (_IOC_TYPE(cmd) != RTC_MAGIC)
-@@ -217,31 +227,35 @@
- {
- struct rtc_time tm;
-
-- memset(&tm, 0, sizeof (struct rtc_time));
-+ spin_lock(&rtc_lock);
-+ memset(&tm, 0, sizeof tm);
- get_rtc_time(&tm);
-
-- if (copy_to_user((struct rtc_time *) arg, &tm, sizeof tm)) {
-+ if (copy_to_user((struct rtc_time *) arg, &tm,
-+ sizeof tm)) {
-+ spin_unlock(&rtc_lock);
- return -EFAULT;
- }
-
-+ spin_unlock(&rtc_lock);
-+
- return 0;
- }
--
- case RTC_SET_TIME:
- {
--#ifdef CONFIG_ETRAX_RTC_READONLY
-- return -EPERM;
--#else
- int leap;
- int year;
- int century;
- struct rtc_time tm;
-
-+ memset(&tm, 0, sizeof tm);
- if (!capable(CAP_SYS_TIME))
- return -EPERM;
-
-- if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof tm))
-+ if (copy_from_user(&tm, (struct rtc_time *) arg,
-+ sizeof tm)) {
- return -EFAULT;
-+ }
-
- /* Convert from struct tm to struct rtc_time. */
- tm.tm_year += 1900;
-@@ -253,7 +267,8 @@
- * that years divisible by 400 _are_ leap years.
- */
- year = tm.tm_year;
-- leap = (tm.tm_mon == 2) && ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
-+ leap = (tm.tm_mon == 2) &&
-+ ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
-
- /* Perform some sanity checks. */
- if ((tm.tm_year < 1970) ||
-@@ -263,19 +278,23 @@
- (tm.tm_wday >= 7) ||
- (tm.tm_hour >= 24) ||
- (tm.tm_min >= 60) ||
-- (tm.tm_sec >= 60))
-+ (tm.tm_sec >= 60)) {
- return -EINVAL;
-+ }
-
- century = (tm.tm_year >= 2000) ? 0x80 : 0;
- tm.tm_year = tm.tm_year % 100;
-
- BIN_TO_BCD(tm.tm_year);
-+ BIN_TO_BCD(tm.tm_mon);
- BIN_TO_BCD(tm.tm_mday);
- BIN_TO_BCD(tm.tm_hour);
- BIN_TO_BCD(tm.tm_min);
- BIN_TO_BCD(tm.tm_sec);
- tm.tm_mon |= century;
-
-+ spin_lock(&rtc_lock);
-+
- rtc_write(RTC_YEAR, tm.tm_year);
- rtc_write(RTC_MONTH, tm.tm_mon);
- rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
-@@ -284,36 +303,40 @@
- rtc_write(RTC_MINUTES, tm.tm_min);
- rtc_write(RTC_SECONDS, tm.tm_sec);
-
-+ spin_unlock(&rtc_lock);
-+
- return 0;
--#endif /* !CONFIG_ETRAX_RTC_READONLY */
- }
--
- case RTC_VLOW_RD:
-- {
-- int vl_bit = 0;
--
-- if (rtc_read(RTC_SECONDS) & 0x80) {
-- vl_bit = 1;
-- printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
-- "date/time information is no longer guaranteed!\n",
-- PCF8563_NAME);
-+ if (voltage_low) {
-+ printk(KERN_WARNING "%s: RTC Voltage Low - "
-+ "reliable date/time information is no "
-+ "longer guaranteed!\n", PCF8563_NAME);
- }
-- if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
-- return -EFAULT;
-
-+ if (copy_to_user((int *) arg, &voltage_low, sizeof(int))) {
-+ return -EFAULT;
-+ }
-+
- return 0;
-- }
-
- case RTC_VLOW_SET:
- {
-- /* Clear the VL bit in the seconds register */
-+ /* Clear the VL bit in the seconds register in case
-+ * the time has not been set already (which would
-+ * have cleared it). This does not really matter
-+ * because of the cached voltage_low value but do it
-+ * anyway for consistency. */
-+
- int ret = rtc_read(RTC_SECONDS);
-
- rtc_write(RTC_SECONDS, (ret & 0x7F));
-
-+ /* Clear the cached value. */
-+ voltage_low = 0;
-+
- return 0;
- }
--
- default:
- return -ENOTTY;
- }
-@@ -321,17 +344,32 @@
- return 0;
- }
-
--int
--pcf8563_open(struct inode *inode, struct file *filp)
-+static int __init
-+pcf8563_register(void)
- {
-- return 0;
--}
-+ if (pcf8563_init() < 0) {
-+ printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
-+ "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
-+ return -1;
-+ }
-+
-+ if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
-+ printk(KERN_INFO "%s: Unable to get major numer %d for RTC "
-+ "device.\n", PCF8563_NAME, PCF8563_MAJOR);
-+ return -1;
-+ }
-+
-+ printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
-+ DRIVER_VERSION);
-+
-+ /* Check for low voltage, and warn about it. */
-+ if (voltage_low) {
-+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
-+ "information is no longer guaranteed!\n", PCF8563_NAME);
-+ }
-
--int
--pcf8563_release(struct inode *inode, struct file *filp)
--{
- return 0;
- }
-
--module_init(pcf8563_init);
-+module_init(pcf8563_register);
- module_exit(pcf8563_exit);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/bios.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/bios.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/bios.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/bios.c 2006-10-13 14:43:15.000000000 +0200
-@@ -60,7 +60,7 @@
- u16 cmd, old_cmd;
- int idx;
- struct resource *r;
--
-+
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for(idx=0; idx<6; idx++) {
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/dma.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/dma.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/dma.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/dma.c 2005-10-31 09:48:04.000000000 +0100
-@@ -62,7 +62,7 @@
- {
- struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
- int order = get_order(size);
--
-+
- if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
- int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
-
-@@ -120,7 +120,7 @@
- void dma_release_declared_memory(struct device *dev)
- {
- struct dma_coherent_mem *mem = dev->dma_mem;
--
-+
- if(!mem)
- return;
- dev->dma_mem = NULL;
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/sync_serial.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/sync_serial.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/sync_serial.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/sync_serial.c 2007-01-09 10:29:20.000000000 +0100
-@@ -50,7 +50,7 @@
- /* readp writep */
- /* */
- /* If the application keeps up the pace readp will be right after writep.*/
--/* If the application can't keep the pace we have to throw away data. */
-+/* If the application can't keep the pace we have to throw away data. */
- /* The idea is that readp should be ready with the data pointed out by */
- /* Descr[i] when the DMA has filled in Descr[i+1]. */
- /* Otherwise we will discard */
-@@ -65,6 +65,7 @@
- #define IN_DESCR_SIZE 256
- #define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
- #define OUT_BUFFER_SIZE 4096
-+#define NUM_OUT_DESCRS 4
-
- #define DEFAULT_FRAME_RATE 0
- #define DEFAULT_WORD_RATE 7
-@@ -112,7 +113,7 @@
-
- dma_descr_data in_descr[NUM_IN_DESCR] __attribute__ ((__aligned__(16)));
- dma_descr_context in_context __attribute__ ((__aligned__(32)));
-- dma_descr_data out_descr __attribute__ ((__aligned__(16)));
-+ dma_descr_data out_descr[NUM_OUT_DESCRS] __attribute__ ((__aligned__(16)));
- dma_descr_context out_context __attribute__ ((__aligned__(32)));
- wait_queue_head_t out_wait_q;
- wait_queue_head_t in_wait_q;
-@@ -130,9 +131,9 @@
-
- static int sync_serial_ioctl(struct inode*, struct file*,
- unsigned int cmd, unsigned long arg);
--static ssize_t sync_serial_write(struct file * file, const char * buf,
-+static ssize_t sync_serial_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
--static ssize_t sync_serial_read(struct file *file, char *buf,
-+static ssize_t sync_serial_read(struct file *file, char *buf,
- size_t count, loff_t *ppos);
-
- #if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
-@@ -146,8 +147,8 @@
- static void start_dma(struct sync_port *port, const char* data, int count);
- static void start_dma_in(sync_port* port);
- #ifdef SYNC_SER_DMA
--static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs);
--static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs);
-+static irqreturn_t tr_interrupt(int irq, void *dev_id);
-+static irqreturn_t rx_interrupt(int irq, void *dev_id);
- #endif
-
- #if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
-@@ -157,7 +158,7 @@
- #define SYNC_SER_MANUAL
- #endif
- #ifdef SYNC_SER_MANUAL
--static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs);
-+static irqreturn_t manual_interrupt(int irq, void *dev_id);
- #endif
-
- /* The ports */
-@@ -201,8 +202,8 @@
- {
- ports[0].enabled = 0;
- ports[1].enabled = 0;
--
-- if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
-+
-+ if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
- {
- printk("unable to get major for synchronous serial port\n");
- return -EBUSY;
-@@ -243,13 +244,13 @@
-
- DEBUG(printk("Init sync serial port %d\n", portnbr));
-
-- port->port_nbr = portnbr;
-+ port->port_nbr = portnbr;
- port->init_irqs = 1;
-
- port->outp = port->out_buffer;
- port->output = 1;
- port->input = 0;
--
-+
- port->readp = port->flip;
- port->writep = port->flip;
- port->in_buffer_size = IN_BUFFER_SIZE;
-@@ -286,11 +287,16 @@
- tr_cfg.sample_size = 7;
- tr_cfg.sh_dir = regk_sser_msbfirst;
- tr_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
-+#if 0
- tr_cfg.rate_ctrl = regk_sser_bulk;
- tr_cfg.data_pin_use = regk_sser_dout;
-+#else
-+ tr_cfg.rate_ctrl = regk_sser_iso;
-+ tr_cfg.data_pin_use = regk_sser_dout;
-+#endif
- tr_cfg.bulk_wspace = 1;
- REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
--
-+
- rec_cfg.sample_size = 7;
- rec_cfg.sh_dir = regk_sser_msbfirst;
- rec_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
-@@ -303,17 +309,17 @@
- int avail;
- unsigned char *start;
- unsigned char *end;
--
-+
- start = (unsigned char*)port->readp; /* cast away volatile */
- end = (unsigned char*)port->writep; /* cast away volatile */
- /* 0123456789 0123456789
- * ----- - -----
- * ^rp ^wp ^wp ^rp
- */
--
-+
- if (end >= start)
- avail = end - start;
-- else
-+ else
- avail = port->in_buffer_size - (start - end);
- return avail;
- }
-@@ -323,17 +329,17 @@
- int avail;
- unsigned char *start;
- unsigned char *end;
--
-+
- start = (unsigned char*)port->readp; /* cast away volatile */
- end = (unsigned char*)port->writep; /* cast away volatile */
- /* 0123456789 0123456789
- * ----- -----
- * ^rp ^wp ^wp ^rp
- */
--
-+
- if (end >= start)
- avail = end - start;
-- else
-+ else
- avail = port->flip + port->in_buffer_size - start;
- return avail;
- }
-@@ -343,10 +349,10 @@
- int dev = iminor(inode);
- sync_port* port;
- reg_dma_rw_cfg cfg = {.en = regk_dma_yes};
-- reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes};
--
-- DEBUG(printk("Open sync serial port %d\n", dev));
-+ reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes};
-
-+ DEBUG(printk("Open sync serial port %d\n", dev));
-+
- if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
- {
- DEBUG(printk("Invalid minor %d\n", dev));
-@@ -354,7 +360,7 @@
- }
- port = &ports[dev];
- /* Allow open this device twice (assuming one reader and one writer) */
-- if (port->busy == 2)
-+ if (port->busy == 2)
- {
- DEBUG(printk("Device is busy.. \n"));
- return -EBUSY;
-@@ -422,8 +428,8 @@
- DMA_VERBOSE_ON_ERROR,
- 0,
- dma_sser1)) {
-- free_irq(21, &ports[1]);
-- free_irq(20, &ports[1]);
-+ free_irq(DMA6_INTR_VECT, &ports[1]);
-+ free_irq(DMA7_INTR_VECT, &ports[1]);
- printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel");
- return -EBUSY;
- } else if (crisv32_request_dma(SYNC_SER1_RX_DMA_NBR,
-@@ -446,7 +452,7 @@
- /* Enable DMA IRQs */
- REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask);
- REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask);
-- /* Set up wordsize = 2 for DMAs. */
-+ /* Set up wordsize = 1 for DMAs. */
- DMA_WR_CMD (port->regi_dmain, regk_dma_set_w_size1);
- DMA_WR_CMD (port->regi_dmaout, regk_dma_set_w_size1);
-
-@@ -497,7 +503,7 @@
- port = &ports[dev];
- if (port->busy)
- port->busy--;
-- if (!port->busy)
-+ if (!port->busy)
- /* XXX */ ;
- return 0;
- }
-@@ -508,17 +514,29 @@
- unsigned int mask = 0;
- sync_port* port;
- DEBUGPOLL( static unsigned int prev_mask = 0; );
--
-+
- port = &ports[dev];
-+
-+ if (!port->started)
-+ {
-+ reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
-+ reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);
-+ cfg.en = regk_sser_yes;
-+ rec_cfg.rec_en = port->input;
-+ REG_WR(sser, port->regi_sser, rw_cfg, cfg);
-+ REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
-+ port->started = 1;
-+ }
-+
- poll_wait(file, &port->out_wait_q, wait);
- poll_wait(file, &port->in_wait_q, wait);
- /* Some room to write */
-- if (port->out_count < OUT_BUFFER_SIZE)
-+ if (port->output && port->out_count < OUT_BUFFER_SIZE)
- mask |= POLLOUT | POLLWRNORM;
- /* At least an inbufchunk of data */
-- if (sync_data_avail(port) >= port->inbufchunk)
-+ if (port->input && sync_data_avail(port) >= port->inbufchunk)
- mask |= POLLIN | POLLRDNORM;
--
-+
- DEBUGPOLL(if (mask != prev_mask)
- printk("sync_serial_poll: mask 0x%08X %s %s\n", mask,
- mask&POLLOUT?"POLLOUT":"", mask&POLLIN?"POLLIN":"");
-@@ -531,14 +549,15 @@
- unsigned int cmd, unsigned long arg)
- {
- int return_val = 0;
-+ int dma_w_size = regk_dma_set_w_size1;
- int dev = iminor(file->f_dentry->d_inode);
- sync_port* port;
- reg_sser_rw_tr_cfg tr_cfg;
- reg_sser_rw_rec_cfg rec_cfg;
-- reg_sser_rw_frm_cfg frm_cfg;
-+ reg_sser_rw_frm_cfg frm_cfg;
- reg_sser_rw_cfg gen_cfg;
- reg_sser_rw_intr_mask intr_mask;
--
-+
- if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
- {
- DEBUG(printk("Invalid minor %d\n", dev));
-@@ -558,9 +577,32 @@
- case SSP_SPEED:
- if (GET_SPEED(arg) == CODEC)
- {
-+ unsigned int freq;
-+
- gen_cfg.base_freq = regk_sser_f32;
-- /* FREQ = 0 => 4 MHz => clk_div = 7*/
-- gen_cfg.clk_div = 6 + (1 << GET_FREQ(arg));
-+
-+ /* Clock divider will internally be
-+ * gen_cfg.clk_div + 1.
-+ */
-+
-+ freq = GET_FREQ(arg);
-+ switch (freq)
-+ {
-+ case FREQ_32kHz:
-+ case FREQ_64kHz:
-+ case FREQ_128kHz:
-+ case FREQ_256kHz:
-+ gen_cfg.clk_div = 125 * (1 << (freq - FREQ_256kHz)) - 1;
-+ break;
-+ case FREQ_512kHz:
-+ gen_cfg.clk_div = 62;
-+ break;
-+ case FREQ_1MHz:
-+ case FREQ_2MHz:
-+ case FREQ_4MHz:
-+ gen_cfg.clk_div = 8 * (1 << freq) - 1;
-+ break;
-+ }
- }
- else
- {
-@@ -625,87 +667,118 @@
- case MASTER_OUTPUT:
- port->output = 1;
- port->input = 0;
-+ frm_cfg.out_on = regk_sser_tr;
-+ frm_cfg.frame_pin_dir = regk_sser_out;
- gen_cfg.clk_dir = regk_sser_out;
- break;
- case SLAVE_OUTPUT:
- port->output = 1;
- port->input = 0;
-+ frm_cfg.frame_pin_dir = regk_sser_in;
- gen_cfg.clk_dir = regk_sser_in;
- break;
- case MASTER_INPUT:
- port->output = 0;
- port->input = 1;
-+ frm_cfg.frame_pin_dir = regk_sser_out;
-+ frm_cfg.out_on = regk_sser_intern_tb;
- gen_cfg.clk_dir = regk_sser_out;
- break;
- case SLAVE_INPUT:
- port->output = 0;
- port->input = 1;
-+ frm_cfg.frame_pin_dir = regk_sser_in;
- gen_cfg.clk_dir = regk_sser_in;
- break;
- case MASTER_BIDIR:
- port->output = 1;
- port->input = 1;
-+ frm_cfg.frame_pin_dir = regk_sser_out;
-+ frm_cfg.out_on = regk_sser_intern_tb;
- gen_cfg.clk_dir = regk_sser_out;
- break;
- case SLAVE_BIDIR:
- port->output = 1;
- port->input = 1;
-+ frm_cfg.frame_pin_dir = regk_sser_in;
- gen_cfg.clk_dir = regk_sser_in;
- break;
- default:
- spin_unlock_irq(&port->lock);
- return -EINVAL;
--
-+
- }
- if (!port->use_dma || (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT))
- intr_mask.rdav = regk_sser_yes;
- break;
- case SSP_FRAME_SYNC:
-- if (arg & NORMAL_SYNC)
-+ if (arg & NORMAL_SYNC) {
-+ frm_cfg.rec_delay = 1;
- frm_cfg.tr_delay = 1;
-+ }
- else if (arg & EARLY_SYNC)
-- frm_cfg.tr_delay = 0;
-+ frm_cfg.rec_delay = frm_cfg.tr_delay = 0;
-+ else if (arg & SECOND_WORD_SYNC) {
-+ frm_cfg.rec_delay = 17;
-+ frm_cfg.tr_delay = 1;
-+ }
-+
-+
-
- tr_cfg.bulk_wspace = frm_cfg.tr_delay;
- frm_cfg.early_wend = regk_sser_yes;
-- if (arg & BIT_SYNC)
-+ if (arg & BIT_SYNC)
- frm_cfg.type = regk_sser_edge;
- else if (arg & WORD_SYNC)
- frm_cfg.type = regk_sser_level;
- else if (arg & EXTENDED_SYNC)
- frm_cfg.early_wend = regk_sser_no;
--
-+
- if (arg & SYNC_ON)
- frm_cfg.frame_pin_use = regk_sser_frm;
- else if (arg & SYNC_OFF)
- frm_cfg.frame_pin_use = regk_sser_gio0;
--
-- if (arg & WORD_SIZE_8)
-+
-+ if (arg & WORD_SIZE_8) {
- rec_cfg.sample_size = tr_cfg.sample_size = 7;
-- else if (arg & WORD_SIZE_12)
-+ dma_w_size = regk_dma_set_w_size1;
-+ }
-+ else if (arg & WORD_SIZE_12) {
- rec_cfg.sample_size = tr_cfg.sample_size = 11;
-- else if (arg & WORD_SIZE_16)
-+ dma_w_size = regk_dma_set_w_size2;
-+ }
-+ else if (arg & WORD_SIZE_16) {
- rec_cfg.sample_size = tr_cfg.sample_size = 15;
-- else if (arg & WORD_SIZE_24)
-+ dma_w_size = regk_dma_set_w_size2;
-+ }
-+ else if (arg & WORD_SIZE_24) {
- rec_cfg.sample_size = tr_cfg.sample_size = 23;
-- else if (arg & WORD_SIZE_32)
-+ dma_w_size = regk_dma_set_w_size2;
-+ }
-+ else if (arg & WORD_SIZE_32) {
- rec_cfg.sample_size = tr_cfg.sample_size = 31;
-+ dma_w_size = regk_dma_set_w_size2;
-+ }
-
- if (arg & BIT_ORDER_MSB)
- rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_msbfirst;
- else if (arg & BIT_ORDER_LSB)
- rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_lsbfirst;
--
-- if (arg & FLOW_CONTROL_ENABLE)
-+
-+ if (arg & FLOW_CONTROL_ENABLE) {
-+ frm_cfg.status_pin_use = regk_sser_frm;
- rec_cfg.fifo_thr = regk_sser_thr16;
-- else if (arg & FLOW_CONTROL_DISABLE)
-+ }
-+ else if (arg & FLOW_CONTROL_DISABLE) {
-+ frm_cfg.status_pin_use = regk_sser_gio0;
- rec_cfg.fifo_thr = regk_sser_inf;
-+ }
-
- if (arg & CLOCK_NOT_GATED)
- gen_cfg.gate_clk = regk_sser_no;
- else if (arg & CLOCK_GATED)
- gen_cfg.gate_clk = regk_sser_yes;
--
-+
- break;
- case SSP_IPOLARITY:
- /* NOTE!! negedge is considered NORMAL */
-@@ -713,12 +786,12 @@
- rec_cfg.clk_pol = regk_sser_neg;
- else if (arg & CLOCK_INVERT)
- rec_cfg.clk_pol = regk_sser_pos;
--
-+
- if (arg & FRAME_NORMAL)
- frm_cfg.level = regk_sser_pos_hi;
- else if (arg & FRAME_INVERT)
- frm_cfg.level = regk_sser_neg_lo;
--
-+
- if (arg & STATUS_NORMAL)
- gen_cfg.hold_pol = regk_sser_pos;
- else if (arg & STATUS_INVERT)
-@@ -726,15 +799,15 @@
- break;
- case SSP_OPOLARITY:
- if (arg & CLOCK_NORMAL)
-- gen_cfg.out_clk_pol = regk_sser_neg;
-- else if (arg & CLOCK_INVERT)
- gen_cfg.out_clk_pol = regk_sser_pos;
--
-+ else if (arg & CLOCK_INVERT)
-+ gen_cfg.out_clk_pol = regk_sser_neg;
-+
- if (arg & FRAME_NORMAL)
- frm_cfg.level = regk_sser_pos_hi;
- else if (arg & FRAME_INVERT)
- frm_cfg.level = regk_sser_neg_lo;
--
-+
- if (arg & STATUS_NORMAL)
- gen_cfg.hold_pol = regk_sser_pos;
- else if (arg & STATUS_INVERT)
-@@ -772,9 +845,10 @@
-
- if (port->started)
- {
-- tr_cfg.tr_en = port->output;
- rec_cfg.rec_en = port->input;
-+ gen_cfg.en = (port->output | port->input);
- }
-+
-
- REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
- REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
-@@ -782,11 +856,24 @@
- REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);
- REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
-
-+
-+ if (cmd == SSP_FRAME_SYNC &&
-+ (arg & (WORD_SIZE_8 | WORD_SIZE_12 | WORD_SIZE_16 | WORD_SIZE_24 | WORD_SIZE_32))) {
-+ int en = gen_cfg.en;
-+ gen_cfg.en = 0;
-+ REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
-+ /* ##### Should DMA be stoped before we change dma size? */
-+ DMA_WR_CMD (port->regi_dmain, dma_w_size);
-+ DMA_WR_CMD (port->regi_dmaout, dma_w_size);
-+ gen_cfg.en = en;
-+ REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
-+ }
-+
- spin_unlock_irq(&port->lock);
- return return_val;
- }
-
--static ssize_t sync_serial_write(struct file * file, const char * buf,
-+static ssize_t sync_serial_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
- {
- int dev = iminor(file->f_dentry->d_inode);
-@@ -807,7 +894,7 @@
-
- DEBUGWRITE(printk("W d%d c %lu (%d/%d)\n", port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE));
- /* Space to end of buffer */
-- /*
-+ /*
- * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE
- * outp^ +out_count
- ^free_outp
-@@ -824,7 +911,7 @@
- free_outp = outp + port->out_count;
- spin_unlock_irqrestore(&port->lock, flags);
- out_buffer = (unsigned long)port->out_buffer;
--
-+
- /* Find out where and how much to write */
- if (free_outp >= out_buffer + OUT_BUFFER_SIZE)
- free_outp -= OUT_BUFFER_SIZE;
-@@ -834,7 +921,7 @@
- c = outp - free_outp;
- if (c > count)
- c = count;
--
-+
- // DEBUGWRITE(printk("w op %08lX fop %08lX c %lu\n", outp, free_outp, c));
- if (copy_from_user((void*)free_outp, buf, c))
- return -EFAULT;
-@@ -854,13 +941,10 @@
- if (!port->started)
- {
- reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
-- reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
- reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);
- cfg.en = regk_sser_yes;
-- tr_cfg.tr_en = port->output;
- rec_cfg.rec_en = port->input;
- REG_WR(sser, port->regi_sser, rw_cfg, cfg);
-- REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
- REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
- port->started = 1;
- }
-@@ -887,7 +971,7 @@
- }
-
- /* Sleep until all sent */
--
-+
- add_wait_queue(&port->out_wait_q, &wait);
- set_current_state(TASK_INTERRUPTIBLE);
- spin_lock_irqsave(&port->lock, flags);
-@@ -916,13 +1000,13 @@
- return count;
- }
-
--static ssize_t sync_serial_read(struct file * file, char * buf,
-+static ssize_t sync_serial_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
- {
- int dev = iminor(file->f_dentry->d_inode);
- int avail;
- sync_port *port;
-- unsigned char* start;
-+ unsigned char* start;
- unsigned char* end;
- unsigned long flags;
-
-@@ -949,7 +1033,7 @@
- port->started = 1;
- }
-
--
-+
- /* Calculate number of available bytes */
- /* Save pointers to avoid that they are modified by interrupt */
- spin_lock_irqsave(&port->lock, flags);
-@@ -958,11 +1042,12 @@
- spin_unlock_irqrestore(&port->lock, flags);
- while ((start == end) && !port->full) /* No data */
- {
-+ DEBUGREAD(printk("&"));
- if (file->f_flags & O_NONBLOCK)
-- {
-+ {
- return -EAGAIN;
- }
--
-+
- interruptible_sleep_on(&port->in_wait_q);
- if (signal_pending(current))
- {
-@@ -979,9 +1064,9 @@
- avail = port->in_buffer_size;
- else if (end > start)
- avail = end - start;
-- else
-+ else
- avail = port->flip + port->in_buffer_size - start;
--
-+
- count = count > avail ? avail : count;
- if (copy_to_user(buf, start, count))
- return -EFAULT;
-@@ -1016,7 +1101,7 @@
- data |= *port->outp++;
- port->out_count-=2;
- tr_data.data = data;
-- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
-+ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
- if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
- port->outp = port->out_buffer;
- }
-@@ -1032,7 +1117,7 @@
- case 24:
- port->out_count-=3;
- tr_data.data = *(unsigned short *)port->outp;
-- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
-+ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
- port->outp+=2;
- tr_data.data = *port->outp++;
- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
-@@ -1042,10 +1127,10 @@
- case 32:
- port->out_count-=4;
- tr_data.data = *(unsigned short *)port->outp;
-- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
-+ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
- port->outp+=2;
- tr_data.data = *(unsigned short *)port->outp;
-- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
-+ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
- port->outp+=2;
- if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
- port->outp = port->out_buffer;
-@@ -1056,15 +1141,27 @@
-
- static void start_dma(struct sync_port* port, const char* data, int count)
- {
-+ int i;
-+ reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
- port->tr_running = 1;
-- port->out_descr.buf = (char*)virt_to_phys((char*)data);
-- port->out_descr.after = port->out_descr.buf + count;
-- port->out_descr.eol = port->out_descr.intr = 1;
-+ for (i = 0; i < NUM_OUT_DESCRS; i++)
-+ {
-+ port->out_descr[i].buf = (char*)virt_to_phys(port->out_buffer + 1024*i);
-+ port->out_descr[i].after = port->out_descr[i].buf + 1024;
-+ port->out_descr[i].eol = 0;
-+ port->out_descr[i].intr = 1;
-+ port->out_descr[i].next = virt_to_phys(&port->out_descr[i+1]);
-+ }
-+ port->out_descr[i-1].next = virt_to_phys(&port->out_descr[0]);
-
-- port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr);
-- port->out_context.saved_data_buf = port->out_descr.buf;
-+ port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr[0]);
-+ port->out_context.saved_data_buf = port->out_descr[0].buf;
-
- DMA_START_CONTEXT(port->regi_dmaout, virt_to_phys((char*)&port->out_context));
-+
-+ tr_cfg.tr_en = regk_sser_yes;
-+ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
-+
- DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));
- }
-
-@@ -1073,7 +1170,7 @@
- int i;
- char* buf;
- port->writep = port->flip;
--
-+
- if (port->writep > port->flip + port->in_buffer_size)
- {
- panic("Offset too large in sync serial driver\n");
-@@ -1099,7 +1196,7 @@
- }
-
- #ifdef SYNC_SER_DMA
--static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+static irqreturn_t tr_interrupt(int irq, void *dev_id)
- {
- reg_dma_r_masked_intr masked;
- reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
-@@ -1108,7 +1205,7 @@
- unsigned int sentl;
- int found = 0;
-
-- for (i = 0; i < NUMBER_OF_PORTS; i++)
-+ for (i = 0; i < NUMBER_OF_PORTS; i++)
- {
- sync_port *port = &ports[i];
- if (!port->enabled || !port->use_dma )
-@@ -1133,18 +1230,21 @@
- if (c > port->out_count)
- c = port->out_count;
- DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c));
-- start_dma(port, port->outp, c);
-+ //start_dma(port, port->outp, c);
- } else {
-- DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
-+ reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
-+ DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
- port->tr_running = 0;
-+ tr_cfg.tr_en = regk_sser_no;
-+ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
- }
- wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */
-- }
-+ }
- }
- return IRQ_RETVAL(found);
- } /* tr_interrupt */
-
--static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+static irqreturn_t rx_interrupt(int irq, void *dev_id)
- {
- reg_dma_r_masked_intr masked;
- reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
-@@ -1152,7 +1252,7 @@
- int i;
- int found = 0;
-
-- for (i = 0; i < NUMBER_OF_PORTS; i++)
-+ for (i = 0; i < NUMBER_OF_PORTS; i++)
- {
- sync_port *port = &ports[i];
-
-@@ -1164,17 +1264,17 @@
- if (masked.data) /* Descriptor interrupt */
- {
- found = 1;
-- while (REG_RD(dma, port->regi_dmain, rw_data) !=
-+ while (REG_RD(dma, port->regi_dmain, rw_data) !=
- virt_to_phys(port->next_rx_desc)) {
--
-+ DEBUGRXINT(printk("!"));
- if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) {
- int first_size = port->flip + port->in_buffer_size - port->writep;
- memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), first_size);
- memcpy(port->flip, phys_to_virt((unsigned)port->next_rx_desc->buf+first_size), port->inbufchunk - first_size);
- port->writep = port->flip + port->inbufchunk - first_size;
- } else {
-- memcpy((char*)port->writep,
-- phys_to_virt((unsigned)port->next_rx_desc->buf),
-+ memcpy((char*)port->writep,
-+ phys_to_virt((unsigned)port->next_rx_desc->buf),
- port->inbufchunk);
- port->writep += port->inbufchunk;
- if (port->writep >= port->flip + port->in_buffer_size)
-@@ -1184,11 +1284,13 @@
- {
- port->full = 1;
- }
--
-- port->next_rx_desc->eol = 0;
-- port->prev_rx_desc->eol = 1;
-- port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc);
-+
-+ port->next_rx_desc->eol = 1;
-+ port->prev_rx_desc->eol = 0;
-+ flush_dma_descr(port->prev_rx_desc,0); // Cache bug workaround
-+ port->prev_rx_desc = port->next_rx_desc;
- port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next);
-+ flush_dma_descr(port->prev_rx_desc,1); // Cache bug workaround
- wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */
- DMA_CONTINUE(port->regi_dmain);
- REG_WR(dma, port->regi_dmain, rw_ack_intr, ack_intr);
-@@ -1201,7 +1303,7 @@
- #endif /* SYNC_SER_DMA */
-
- #ifdef SYNC_SER_MANUAL
--static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+static irqreturn_t manual_interrupt(int irq, void *dev_id)
- {
- int i;
- int found = 0;
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/Makefile 2006-12-06 14:17:02.000000000 +0100
-@@ -1,4 +1,4 @@
--# $Id: Makefile,v 1.11 2004/12/17 10:16:13 starvik Exp $
-+# $Id: Makefile,v 1.13 2006/12/06 13:17:02 starvik Exp $
- #
- # Makefile for the linux kernel.
- #
-@@ -8,7 +8,7 @@
-
- obj-y := entry.o traps.o irq.o debugport.o dma.o pinmux.o \
- process.o ptrace.o setup.o signal.o traps.o time.o \
-- arbiter.o io.o
-+ arbiter.o io.o cache.o cacheflush.o
-
- obj-$(CONFIG_ETRAXFS_SIM) += vcs_hook.o
-
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_ETRAX_KGDB) += kgdb.o kgdb_asm.o
- obj-$(CONFIG_ETRAX_FAST_TIMER) += fasttimer.o
- obj-$(CONFIG_MODULES) += crisksyms.o
-+obj-$(CONFIG_CPU_FREQ) += cpufreq.o
-
- clean:
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/arbiter.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/arbiter.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/arbiter.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/arbiter.c 2006-10-13 14:43:13.000000000 +0200
-@@ -6,7 +6,7 @@
- * bandwidth (e.g. ethernet) and then the remaining slots are divided
- * on all the active clients.
- *
-- * Copyright (c) 2004, 2005 Axis Communications AB.
-+ * Copyright (c) 2004, 2005, 2006 Axis Communications AB.
- */
-
- #include <asm/arch/hwregs/reg_map.h>
-@@ -44,35 +44,88 @@
- {regi_marb_bp3}
- };
-
--static int requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
--static int active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
-+static u8 requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
-+static u8 active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
- static int max_bandwidth[NBR_OF_REGIONS] = {SDRAM_BANDWIDTH, INTMEM_BANDWIDTH};
-
- DEFINE_SPINLOCK(arbiter_lock);
-
--static irqreturn_t
-+static irqreturn_t
- crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs);
-
--static void crisv32_arbiter_config(int region)
-+/*
-+ * "I'm the arbiter, I know the score.
-+ * From square one I'll be watching all 64."
-+ * (memory arbiter slots, that is)
-+ *
-+ * Or in other words:
-+ * Program the memory arbiter slots for "region" according to what's
-+ * in requested_slots[] and active_clients[], while minimizing
-+ * latency. A caller may pass a non-zero positive amount for
-+ * "unused_slots", which must then be the unallocated, remaining
-+ * number of slots, free to hand out to any client.
-+ */
-+
-+static void crisv32_arbiter_config(int region, int unused_slots)
- {
- int slot;
- int client;
- int interval = 0;
-- int val[NBR_OF_SLOTS];
-+
-+ /*
-+ * This vector corresponds to the hardware arbiter slots (see
-+ * the hardware documentation for semantics). We initialize
-+ * each slot with a suitable sentinel value outside the valid
-+ * range {0 .. NBR_OF_CLIENTS - 1} and replace them with
-+ * client indexes. Then it's fed to the hardware.
-+ */
-+ s8 val[NBR_OF_SLOTS];
-
- for (slot = 0; slot < NBR_OF_SLOTS; slot++)
-- val[slot] = NBR_OF_CLIENTS + 1;
-+ val[slot] = -1;
-
- for (client = 0; client < NBR_OF_CLIENTS; client++)
- {
- int pos;
-+ /* Allocate the requested non-zero number of slots, but
-+ * also give clients with zero-requests one slot each
-+ * while stocks last. We do the latter here, in client
-+ * order. This makes sure zero-request clients are the
-+ * first to get to any spare slots, else those slots
-+ * could, when bandwidth is allocated close to the limit,
-+ * all be allocated to low-index non-zero-request clients
-+ * in the default-fill loop below. Another positive but
-+ * secondary effect is a somewhat better spread of the
-+ * zero-bandwidth clients in the vector, avoiding some of
-+ * the latency that could otherwise be caused by the
-+ * partitioning of non-zero-bandwidth clients at low
-+ * indexes and zero-bandwidth clients at high
-+ * indexes. (Note that this spreading can only affect the
-+ * unallocated bandwidth.) All the above only matters for
-+ * memory-intensive situations, of course.
-+ */
- if (!requested_slots[region][client])
-- continue;
-- interval = NBR_OF_SLOTS / requested_slots[region][client];
-+ {
-+ /*
-+ * Skip inactive clients. Also skip zero-slot
-+ * allocations in this pass when there are no known
-+ * free slots.
-+ */
-+ if (!active_clients[region][client] || unused_slots <= 0)
-+ continue;
-+
-+ unused_slots--;
-+
-+ /* Only allocate one slot for this client. */
-+ interval = NBR_OF_SLOTS;
-+ }
-+ else
-+ interval = NBR_OF_SLOTS / requested_slots[region][client];
-+
- pos = 0;
- while (pos < NBR_OF_SLOTS)
- {
-- if (val[pos] != NBR_OF_CLIENTS + 1)
-+ if (val[pos] >= 0)
- pos++;
- else
- {
-@@ -85,7 +138,13 @@
- client = 0;
- for (slot = 0; slot < NBR_OF_SLOTS; slot++)
- {
-- if (val[slot] == NBR_OF_CLIENTS + 1)
-+ /*
-+ * Allocate remaining slots in round-robin
-+ * client-number order for active clients. For this
-+ * pass, we ignore requested bandwidth and previous
-+ * allocations.
-+ */
-+ if (val[slot] < 0)
- {
- int first = client;
- while(!active_clients[region][client]) {
-@@ -100,7 +159,7 @@
- REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot, val[slot]);
- else if (region == INT_REGION)
- REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot, val[slot]);
-- }
-+ }
- }
-
- extern char _stext, _etext;
-@@ -111,18 +170,28 @@
-
- if (initialized)
- return;
--
-+
- initialized = 1;
-
-- /* CPU caches are active. */
-- active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
-- crisv32_arbiter_config(EXT_REGION);
-- crisv32_arbiter_config(INT_REGION);
-+ /*
-+ * CPU caches are always set to active, but with zero
-+ * bandwidth allocated. It should be ok to allocate zero
-+ * bandwidth for the caches, because DMA for other channels
-+ * will supposedly finish, once their programmed amount is
-+ * done, and then the caches will get access according to the
-+ * "fixed scheme" for unclaimed slots. Though, if for some
-+ * use-case somewhere, there's a maximum CPU latency for
-+ * e.g. some interrupt, we have to start allocating specific
-+ * bandwidth for the CPU caches too.
-+ */
-+ active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
-+ crisv32_arbiter_config(EXT_REGION, 0);
-+ crisv32_arbiter_config(INT_REGION, 0);
-
- if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
- "arbiter", NULL))
- printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
--
-+
- #ifndef CONFIG_ETRAX_KGDB
- /* Global watch for writes to kernel text segment. */
- crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
-@@ -130,6 +199,7 @@
- #endif
- }
-
-+/* Main entry for bandwidth allocation. */
-
-
- int crisv32_arbiter_allocate_bandwidth(int client, int region,
-@@ -141,39 +211,76 @@
- int req;
-
- crisv32_arbiter_init();
--
-+
- for (i = 0; i < NBR_OF_CLIENTS; i++)
- {
- total_assigned += requested_slots[region][i];
- total_clients += active_clients[region][i];
- }
-- req = NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
-
-- if (total_assigned + total_clients + req + 1 > NBR_OF_SLOTS)
-+ /* Avoid division by 0 for 0-bandwidth requests. */
-+ req = bandwidth == 0
-+ ? 0 : NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
-+
-+ /*
-+ * We make sure that there are enough slots only for non-zero
-+ * requests. Requesting 0 bandwidth *may* allocate slots,
-+ * though if all bandwidth is allocated, such a client won't
-+ * get any and will have to rely on getting memory access
-+ * according to the fixed scheme that's the default when one
-+ * of the slot-allocated clients doesn't claim their slot.
-+ */
-+ if (total_assigned + req > NBR_OF_SLOTS)
- return -ENOMEM;
-
- active_clients[region][client] = 1;
- requested_slots[region][client] = req;
-- crisv32_arbiter_config(region);
-+ crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
-
- return 0;
- }
-
-+/*
-+ * Main entry for bandwidth deallocation.
-+ *
-+ * Strictly speaking, for a somewhat constant set of clients where
-+ * each client gets a constant bandwidth and is just enabled or
-+ * disabled (somewhat dynamically), no action is necessary here to
-+ * avoid starvation for non-zero-allocation clients, as the allocated
-+ * slots will just be unused. However, handing out those unused slots
-+ * to active clients avoids needless latency if the "fixed scheme"
-+ * would give unclaimed slots to an eager low-index client.
-+ */
-+
-+void crisv32_arbiter_deallocate_bandwidth(int client, int region)
-+{
-+ int i;
-+ int total_assigned = 0;
-+
-+ requested_slots[region][client] = 0;
-+ active_clients[region][client] = 0;
-+
-+ for (i = 0; i < NBR_OF_CLIENTS; i++)
-+ total_assigned += requested_slots[region][i];
-+
-+ crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
-+}
-+
- int crisv32_arbiter_watch(unsigned long start, unsigned long size,
- unsigned long clients, unsigned long accesses,
- watch_callback* cb)
- {
- int i;
--
-+
- crisv32_arbiter_init();
--
-+
- if (start > 0x80000000) {
- printk("Arbiter: %lX doesn't look like a physical address", start);
- return -EFAULT;
- }
-
- spin_lock(&arbiter_lock);
--
-+
- for (i = 0; i < NUMBER_OF_BP; i++) {
- if (!watches[i].used) {
- reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
-@@ -214,7 +321,7 @@
- crisv32_arbiter_init();
-
- spin_lock(&arbiter_lock);
--
-+
- if ((id < 0) || (id >= NUMBER_OF_BP) || (!watches[id].used)) {
- spin_unlock(&arbiter_lock);
- return -EINVAL;
-@@ -239,7 +346,7 @@
-
- extern void show_registers(struct pt_regs *regs);
-
--static irqreturn_t
-+static irqreturn_t
- crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs)
- {
- reg_marb_r_masked_intr masked_intr = REG_RD(marb, regi_marb, r_masked_intr);
-@@ -248,10 +355,10 @@
- reg_marb_bp_r_brk_op r_op;
- reg_marb_bp_r_brk_first_client r_first;
- reg_marb_bp_r_brk_size r_size;
-- reg_marb_bp_rw_ack ack = {0};
-+ reg_marb_bp_rw_ack ack = {0};
- reg_marb_rw_ack_intr ack_intr = {.bp0=1,.bp1=1,.bp2=1,.bp3=1};
- struct crisv32_watch_entry* watch;
--
-+
- if (masked_intr.bp0) {
- watch = &watches[0];
- ack_intr.bp0 = regk_marb_yes;
-@@ -291,6 +398,6 @@
- if (watch->cb)
- watch->cb();
-
--
-+
- return IRQ_HANDLED;
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/asm-offsets.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/asm-offsets.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/asm-offsets.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/asm-offsets.c 2003-06-02 10:39:38.000000000 +0200
-@@ -16,8 +16,8 @@
- {
- #define ENTRY(entry) DEFINE(PT_ ## entry, offsetof(struct pt_regs, entry))
- ENTRY(orig_r10);
-- ENTRY(r13);
-- ENTRY(r12);
-+ ENTRY(r13);
-+ ENTRY(r12);
- ENTRY(r11);
- ENTRY(r10);
- ENTRY(r9);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cache.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cache.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cache.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cache.c 2007-01-23 13:09:57.000000000 +0100
-@@ -0,0 +1,31 @@
-+#include <linux/module.h>
-+#include <asm/io.h>
-+#include <asm/arch/cache.h>
-+#include <asm/arch/hwregs/dma.h>
-+
-+// This file is used to workaround a cache bug, Guinness TR 106
-+
-+inline void flush_dma_descr(dma_descr_data* descr, int flush_buf)
-+{
-+ // Flush descriptor to make sure we get correct in_eop and after
-+ asm volatile ("ftagd [%0]" :: "r" (descr));
-+ // Flush buffer pointed out by descriptor
-+ if (flush_buf)
-+ cris_flush_cache_range(phys_to_virt((unsigned)descr->buf), (unsigned)(descr->after - descr->buf));
-+}
-+
-+void flush_dma_list(dma_descr_data* descr)
-+{
-+ while(1)
-+ {
-+ flush_dma_descr(descr, 1);
-+ if (descr->eol)
-+ break;
-+ descr = phys_to_virt((unsigned)descr->next);
-+ }
-+}
-+
-+EXPORT_SYMBOL(flush_dma_list);
-+EXPORT_SYMBOL(flush_dma_descr);
-+EXPORT_SYMBOL(cris_flush_cache);
-+EXPORT_SYMBOL(cris_flush_cache_range);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cacheflush.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cacheflush.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cacheflush.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cacheflush.S 2006-12-06 14:17:02.000000000 +0100
-@@ -0,0 +1,93 @@
-+ .global cris_flush_cache_range
-+cris_flush_cache_range:
-+ move.d 1024, $r12
-+ cmp.d $r11, $r12
-+ bhi cris_flush_1KB
-+ nop
-+ add.d $r10, $r11
-+cris_flush_last:
-+ addq 32, $r10
-+ cmp.d $r11, $r10
-+ blt cris_flush_last
-+ ftagd [$r10]
-+ ret
-+ nop
-+cris_flush_1KB:
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ftagd [$r10]
-+ addq 32, $r10
-+ ba cris_flush_cache_range
-+ sub.d $r12, $r11
-+
-+ .global cris_flush_cache
-+cris_flush_cache:
-+ moveq 0, $r10
-+cris_flush_line:
-+ move.d 16*1024, $r11
-+ addq 16, $r10
-+ cmp.d $r10, $r11
-+ blt cris_flush_line
-+ fidxd [$r10]
-+ ret
-+ nop
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cpufreq.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cpufreq.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cpufreq.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cpufreq.c 2006-11-03 11:35:52.000000000 +0100
-@@ -0,0 +1,147 @@
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/cpufreq.h>
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/config_defs.h>
-+#include <asm/arch/hwregs/bif_core_defs.h>
-+
-+static int
-+cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, void *data);
-+
-+static struct notifier_block cris_sdram_freq_notifier_block = {
-+ .notifier_call = cris_sdram_freq_notifier
-+};
-+
-+static struct cpufreq_frequency_table cris_freq_table[] = {
-+ {0x01, 6000},
-+ {0x02, 200000},
-+ {0, CPUFREQ_TABLE_END},
-+};
-+
-+static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
-+{
-+ reg_config_rw_clk_ctrl clk_ctrl;
-+ clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
-+ return clk_ctrl.pll ? 200000 : 6000;
-+}
-+
-+static void cris_freq_set_cpu_state (unsigned int state)
-+{
-+ int i;
-+ struct cpufreq_freqs freqs;
-+ reg_config_rw_clk_ctrl clk_ctrl;
-+ clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
-+
-+ for_each_cpu(i) {
-+ freqs.old = cris_freq_get_cpu_frequency(i);
-+ freqs.new = cris_freq_table[state].frequency;
-+ freqs.cpu = i;
-+ }
-+
-+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-+
-+ local_irq_disable();
-+
-+ // Even though we may be SMP they will share the same clock
-+ // so all settings are made on CPU0.
-+ if (cris_freq_table[state].frequency == 200000)
-+ clk_ctrl.pll = 1;
-+ else
-+ clk_ctrl.pll = 0;
-+ REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
-+
-+ local_irq_enable();
-+
-+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-+};
-+
-+static int cris_freq_verify (struct cpufreq_policy *policy)
-+{
-+ return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
-+}
-+
-+static int cris_freq_target (struct cpufreq_policy *policy,
-+ unsigned int target_freq,
-+ unsigned int relation)
-+{
-+ unsigned int newstate = 0;
-+
-+ if (cpufreq_frequency_table_target(policy, cris_freq_table, target_freq, relation, &newstate))
-+ return -EINVAL;
-+
-+ cris_freq_set_cpu_state(newstate);
-+
-+ return 0;
-+}
-+
-+static int cris_freq_cpu_init(struct cpufreq_policy *policy)
-+{
-+ int result;
-+
-+ /* cpuinfo and default policy values */
-+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-+ policy->cpuinfo.transition_latency = 1000000; /* 1ms */
-+ policy->cur = cris_freq_get_cpu_frequency(0);
-+
-+ result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
-+ if (result)
-+ return (result);
-+
-+ cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
-+
-+ return 0;
-+}
-+
-+
-+static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
-+{
-+ cpufreq_frequency_table_put_attr(policy->cpu);
-+ return 0;
-+}
-+
-+
-+static struct freq_attr* cris_freq_attr[] = {
-+ &cpufreq_freq_attr_scaling_available_freqs,
-+ NULL,
-+};
-+
-+static struct cpufreq_driver cris_freq_driver = {
-+ .get = cris_freq_get_cpu_frequency,
-+ .verify = cris_freq_verify,
-+ .target = cris_freq_target,
-+ .init = cris_freq_cpu_init,
-+ .exit = cris_freq_cpu_exit,
-+ .name = "cris_freq",
-+ .owner = THIS_MODULE,
-+ .attr = cris_freq_attr,
-+};
-+
-+static int __init cris_freq_init(void)
-+{
-+ int ret;
-+ ret = cpufreq_register_driver(&cris_freq_driver);
-+ cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
-+ CPUFREQ_TRANSITION_NOTIFIER);
-+ return ret;
-+}
-+
-+static int
-+cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, void *data)
-+{
-+ int i;
-+ struct cpufreq_freqs *freqs = data;
-+ if (val == CPUFREQ_PRECHANGE) {
-+ reg_bif_core_rw_sdram_timing timing =
-+ REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
-+ timing.cpd = (freqs->new == 200000 ? 0 : 1);
-+
-+ if (freqs->new == 200000)
-+ for (i = 0; i < 50000; i++);
-+ REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
-+ }
-+ return 0;
-+}
-+
-+
-+module_init(cris_freq_init);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/crisksyms.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/crisksyms.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/crisksyms.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/crisksyms.c 2006-11-21 04:21:34.000000000 +0100
-@@ -3,6 +3,7 @@
- #include <asm/arch/dma.h>
- #include <asm/arch/intmem.h>
- #include <asm/arch/pinmux.h>
-+#include <asm/arch/io.h>
-
- /* Functions for allocating DMA channels */
- EXPORT_SYMBOL(crisv32_request_dma);
-@@ -16,7 +17,11 @@
-
- /* Functions for handling pinmux */
- EXPORT_SYMBOL(crisv32_pinmux_alloc);
-+EXPORT_SYMBOL(crisv32_pinmux_alloc_fixed);
- EXPORT_SYMBOL(crisv32_pinmux_dealloc);
-+EXPORT_SYMBOL(crisv32_pinmux_dealloc_fixed);
-+EXPORT_SYMBOL(crisv32_io_get_name);
-+EXPORT_SYMBOL(crisv32_io_get);
-
- /* Functions masking/unmasking interrupts */
- EXPORT_SYMBOL(mask_irq);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/debugport.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/debugport.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/debugport.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/debugport.c 2006-10-13 14:43:13.000000000 +0200
-@@ -4,18 +4,13 @@
-
- #include <linux/console.h>
- #include <linux/init.h>
--#include <linux/major.h>
--#include <linux/delay.h>
--#include <linux/tty.h>
- #include <asm/system.h>
--#include <asm/io.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/reg_map.h>
- #include <asm/arch/hwregs/ser_defs.h>
- #include <asm/arch/hwregs/dma_defs.h>
- #include <asm/arch/pinmux.h>
-
--#include <asm/irq.h>
--#include <asm/arch/hwregs/intr_vect_defs.h>
--
- struct dbg_port
- {
- unsigned char nbr;
-@@ -26,7 +21,7 @@
- unsigned int bits;
- };
-
--struct dbg_port ports[] =
-+struct dbg_port ports[] =
- {
- {
- 0,
-@@ -89,15 +84,6 @@
- #endif
- #endif
-
--#ifdef CONFIG_ETRAXFS_SIM
--extern void print_str( const char *str );
--static char buffer[1024];
--static char msg[] = "Debug: ";
--static int buffer_pos = sizeof(msg) - 1;
--#endif
--
--extern struct tty_driver *serial_driver;
--
- static void
- start_port(struct dbg_port* p)
- {
-@@ -118,7 +104,7 @@
- /* Set up serial port registers */
- reg_ser_rw_tr_ctrl tr_ctrl = {0};
- reg_ser_rw_tr_dma_en tr_dma_en = {0};
--
-+
- reg_ser_rw_rec_ctrl rec_ctrl = {0};
- reg_ser_rw_tr_baud_div tr_baud_div = {0};
- reg_ser_rw_rec_baud_div rec_baud_div = {0};
-@@ -148,6 +134,7 @@
- tr_ctrl.data_bits = regk_ser_bits7;
- rec_ctrl.data_bits = regk_ser_bits7;
- }
-+
-
- REG_WR (ser, p->instance, rw_tr_baud_div, tr_baud_div);
- REG_WR (ser, p->instance, rw_rec_baud_div, rec_baud_div);
-@@ -156,124 +143,21 @@
- REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl);
- }
-
--/* No debug */
--#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
--
--static void
--console_write(struct console *co, const char *buf, unsigned int len)
--{
-- return;
--}
--
--/* Target debug */
--#elif !defined(CONFIG_ETRAXFS_SIM)
--
--static void
--console_write_direct(struct console *co, const char *buf, unsigned int len)
--{
-- int i;
-- reg_ser_r_stat_din stat;
-- reg_ser_rw_tr_dma_en tr_dma_en, old;
--
-- /* Switch to manual mode */
-- tr_dma_en = old = REG_RD (ser, port->instance, rw_tr_dma_en);
-- if (tr_dma_en.en == regk_ser_yes) {
-- tr_dma_en.en = regk_ser_no;
-- REG_WR(ser, port->instance, rw_tr_dma_en, tr_dma_en);
-- }
--
-- /* Send data */
-- for (i = 0; i < len; i++) {
-- /* LF -> CRLF */
-- if (buf[i] == '\n') {
-- do {
-- stat = REG_RD (ser, port->instance, r_stat_din);
-- } while (!stat.tr_rdy);
-- REG_WR_INT (ser, port->instance, rw_dout, '\r');
-- }
-- /* Wait until transmitter is ready and send.*/
-- do {
-- stat = REG_RD (ser, port->instance, r_stat_din);
-- } while (!stat.tr_rdy);
-- REG_WR_INT (ser, port->instance, rw_dout, buf[i]);
-- }
--
-- /* Restore mode */
-- if (tr_dma_en.en != old.en)
-- REG_WR(ser, port->instance, rw_tr_dma_en, old);
--}
--
--static void
--console_write(struct console *co, const char *buf, unsigned int len)
--{
-- if (!port)
-- return;
-- console_write_direct(co, buf, len);
--}
--
--
--
--#else
--
--/* VCS debug */
--
--static void
--console_write(struct console *co, const char *buf, unsigned int len)
--{
-- char* pos;
-- pos = memchr(buf, '\n', len);
-- if (pos) {
-- int l = ++pos - buf;
-- memcpy(buffer + buffer_pos, buf, l);
-- memcpy(buffer, msg, sizeof(msg) - 1);
-- buffer[buffer_pos + l] = '\0';
-- print_str(buffer);
-- buffer_pos = sizeof(msg) - 1;
-- if (pos - buf != len) {
-- memcpy(buffer + buffer_pos, pos, len - l);
-- buffer_pos += len - l;
-- }
-- } else {
-- memcpy(buffer + buffer_pos, buf, len);
-- buffer_pos += len;
-- }
--}
--
--#endif
--
--int raw_printk(const char *fmt, ...)
--{
-- static char buf[1024];
-- int printed_len;
-- va_list args;
-- va_start(args, fmt);
-- printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
-- va_end(args);
-- console_write(NULL, buf, strlen(buf));
-- return printed_len;
--}
--
--void
--stupid_debug(char* buf)
--{
-- console_write(NULL, buf, strlen(buf));
--}
--
- #ifdef CONFIG_ETRAX_KGDB
- /* Use polling to get a single character from the kernel debug port */
- int
- getDebugChar(void)
- {
-- reg_ser_rs_status_data stat;
-+ reg_ser_rs_stat_din stat;
- reg_ser_rw_ack_intr ack_intr = { 0 };
-
- do {
-- stat = REG_RD(ser, kgdb_instance, rs_status_data);
-- } while (!stat.data_avail);
-+ stat = REG_RD(ser, kgdb_port->instance, rs_stat_din);
-+ } while (!stat.dav);
-
- /* Ack the data_avail interrupt. */
-- ack_intr.data_avail = 1;
-- REG_WR(ser, kgdb_instance, rw_ack_intr, ack_intr);
-+ ack_intr.dav = 1;
-+ REG_WR(ser, kgdb_port->instance, rw_ack_intr, ack_intr);
-
- return stat.data;
- }
-@@ -282,173 +166,18 @@
- void
- putDebugChar(int val)
- {
-- reg_ser_r_status_data stat;
-+ reg_ser_r_stat_din stat;
- do {
-- stat = REG_RD (ser, kgdb_instance, r_status_data);
-- } while (!stat.tr_ready);
-- REG_WR (ser, kgdb_instance, rw_data_out, REG_TYPE_CONV(reg_ser_rw_data_out, int, val));
-+ stat = REG_RD (ser, kgdb_port->instance, r_stat_din);
-+ } while (!stat.tr_rdy);
-+ REG_WR_INT (ser, kgdb_port->instance, rw_dout, val);
- }
- #endif /* CONFIG_ETRAX_KGDB */
-
--static int __init
--console_setup(struct console *co, char *options)
--{
-- char* s;
--
-- if (options) {
-- port = &ports[co->index];
-- port->baudrate = 115200;
-- port->parity = 'N';
-- port->bits = 8;
-- port->baudrate = simple_strtoul(options, NULL, 10);
-- s = options;
-- while(*s >= '0' && *s <= '9')
-- s++;
-- if (*s) port->parity = *s++;
-- if (*s) port->bits = *s++ - '0';
-- port->started = 0;
-- start_port(port);
-- }
-- return 0;
--}
--
--/* This is a dummy serial device that throws away anything written to it.
-- * This is used when no debug output is wanted.
-- */
--static struct tty_driver dummy_driver;
--
--static int dummy_open(struct tty_struct *tty, struct file * filp)
--{
-- return 0;
--}
--
--static void dummy_close(struct tty_struct *tty, struct file * filp)
--{
--}
--
--static int dummy_write(struct tty_struct * tty,
-- const unsigned char *buf, int count)
--{
-- return count;
--}
--
--static int
--dummy_write_room(struct tty_struct *tty)
--{
-- return 8192;
--}
--
--void __init
--init_dummy_console(void)
--{
-- memset(&dummy_driver, 0, sizeof(struct tty_driver));
-- dummy_driver.driver_name = "serial";
-- dummy_driver.name = "ttyS";
-- dummy_driver.major = TTY_MAJOR;
-- dummy_driver.minor_start = 68;
-- dummy_driver.num = 1; /* etrax100 has 4 serial ports */
-- dummy_driver.type = TTY_DRIVER_TYPE_SERIAL;
-- dummy_driver.subtype = SERIAL_TYPE_NORMAL;
-- dummy_driver.init_termios = tty_std_termios;
-- dummy_driver.init_termios.c_cflag =
-- B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
-- dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
--
-- dummy_driver.open = dummy_open;
-- dummy_driver.close = dummy_close;
-- dummy_driver.write = dummy_write;
-- dummy_driver.write_room = dummy_write_room;
-- if (tty_register_driver(&dummy_driver))
-- panic("Couldn't register dummy serial driver\n");
--}
--
--static struct tty_driver*
--crisv32_console_device(struct console* co, int *index)
--{
-- if (port)
-- *index = port->nbr;
-- return port ? serial_driver : &dummy_driver;
--}
--
--static struct console sercons = {
-- name : "ttyS",
-- write: console_write,
-- read : NULL,
-- device : crisv32_console_device,
-- unblank : NULL,
-- setup : console_setup,
-- flags : CON_PRINTBUFFER,
-- index : -1,
-- cflag : 0,
-- next : NULL
--};
--static struct console sercons0 = {
-- name : "ttyS",
-- write: console_write,
-- read : NULL,
-- device : crisv32_console_device,
-- unblank : NULL,
-- setup : console_setup,
-- flags : CON_PRINTBUFFER,
-- index : 0,
-- cflag : 0,
-- next : NULL
--};
--
--static struct console sercons1 = {
-- name : "ttyS",
-- write: console_write,
-- read : NULL,
-- device : crisv32_console_device,
-- unblank : NULL,
-- setup : console_setup,
-- flags : CON_PRINTBUFFER,
-- index : 1,
-- cflag : 0,
-- next : NULL
--};
--static struct console sercons2 = {
-- name : "ttyS",
-- write: console_write,
-- read : NULL,
-- device : crisv32_console_device,
-- unblank : NULL,
-- setup : console_setup,
-- flags : CON_PRINTBUFFER,
-- index : 2,
-- cflag : 0,
-- next : NULL
--};
--static struct console sercons3 = {
-- name : "ttyS",
-- write: console_write,
-- read : NULL,
-- device : crisv32_console_device,
-- unblank : NULL,
-- setup : console_setup,
-- flags : CON_PRINTBUFFER,
-- index : 3,
-- cflag : 0,
-- next : NULL
--};
--
- /* Register console for printk's, etc. */
- int __init
- init_etrax_debug(void)
- {
-- static int first = 1;
--
-- if (!first) {
-- unregister_console(&sercons);
-- register_console(&sercons0);
-- register_console(&sercons1);
-- register_console(&sercons2);
-- register_console(&sercons3);
-- init_dummy_console();
-- return 0;
-- }
-- first = 0;
-- register_console(&sercons);
- start_port(port);
-
- #ifdef CONFIG_ETRAX_KGDB
-@@ -456,5 +185,3 @@
- #endif /* CONFIG_ETRAX_KGDB */
- return 0;
- }
--
--__initcall(init_etrax_debug);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/dma.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/dma.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/dma.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/dma.c 2007-02-02 08:45:22.000000000 +0100
-@@ -12,6 +12,16 @@
- #include <asm/system.h>
- #include <asm/arch/arbiter.h>
-
-+/*
-+ * The memory region we allocated bandwidth for is stored in
-+ * used_dma_channels as an in-use flag.
-+ */
-+enum dma_region_allocated_marker {
-+ DMA_NO_REGION_ALLOCATED = 0,
-+ DMA_INT_REGION_ALLOCATED = 1,
-+ DMA_EXT_REGION_ALLOCATED = 2
-+};
-+
- static char used_dma_channels[MAX_DMA_CHANNELS];
- static const char * used_dma_channels_users[MAX_DMA_CHANNELS];
-
-@@ -74,7 +84,7 @@
- if (options & DMA_VERBOSE_ON_ERROR) {
- printk("Failed to request DMA %i for %s, only 0-%i valid)\n", dmanr, device_id, MAX_DMA_CHANNELS-1);
- }
--
-+
- if (options & DMA_PANIC_ON_ERROR)
- panic("request_dma error!");
- return -EINVAL;
-@@ -202,13 +212,14 @@
- if (dmanr == 3)
- strmux_cfg.dma3 = regk_strmux_ext3;
- else if (dmanr == 9)
-- strmux_cfg.dma9 = regk_strmux_ext2;
-+ strmux_cfg.dma9 = regk_strmux_ext3;
- else
-- panic("Invalid DMA channel for ext2\n");
-+ panic("Invalid DMA channel for ext3\n");
- break;
- }
-
-- used_dma_channels[dmanr] = 1;
-+ used_dma_channels[dmanr] = options & DMA_INT_MEM
-+ ? DMA_INT_REGION_ALLOCATED : DMA_EXT_REGION_ALLOCATED;
- used_dma_channels_users[dmanr] = device_id;
- REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
- REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg);
-@@ -218,7 +229,12 @@
-
- void crisv32_free_dma(unsigned int dmanr)
- {
-+ int region;
-+
- spin_lock(&dma_lock);
-+ region = used_dma_channels[dmanr] == DMA_INT_REGION_ALLOCATED
-+ ? INT_REGION : EXT_REGION;
- used_dma_channels[dmanr] = 0;
-+ crisv32_arbiter_deallocate_bandwidth(dmanr, region);
- spin_unlock(&dma_lock);
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/entry.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/entry.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/entry.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/entry.S 2007-01-09 10:29:19.000000000 +0100
-@@ -11,7 +11,7 @@
- *
- * Stack layout in 'ret_from_system_call':
- * ptrace needs to have all regs on the stack.
-- * if the order here is changed, it needs to be
-+ * if the order here is changed, it needs to be
- * updated in fork.c:copy_process, signal.c:do_signal,
- * ptrace.c and ptrace.h
- *
-@@ -40,7 +40,7 @@
- .globl sys_call_table
-
- ; Check if preemptive kernel scheduling should be done.
--#ifdef CONFIG_PREEMPT
-+#ifdef CONFIG_PREEMPT
- _resume_kernel:
- di
- ; Load current task struct.
-@@ -81,7 +81,7 @@
- nop
- ba ret_from_sys_call
- nop
--
-+
- ret_from_intr:
- ;; Check for resched if preemptive kernel, or if we're going back to
- ;; user-mode. This test matches the user_regs(regs) macro. Don't simply
-@@ -93,7 +93,7 @@
- bpl _resume_kernel
-
- ; Note that di below is in delay slot.
--
-+
- _resume_userspace:
- di ; So need_resched and sigpending don't change.
-
-@@ -107,19 +107,19 @@
- nop
- ba _Rexit
- nop
--
-+
- ;; The system_call is called by a BREAK instruction, which looks pretty
- ;; much like any other exception.
- ;;
- ;; System calls can't be made from interrupts but we still stack ERP
- ;; to have a complete stack frame.
-- ;;
-+ ;;
- ;; In r9 we have the wanted syscall number. Arguments come in r10,r11,r12,
- ;; r13,mof,srp
- ;;
- ;; This function looks on the _surface_ like spaghetti programming, but it's
-- ;; really designed so that the fast-path does not force cache-loading of
-- ;; non-used instructions. Only the non-common cases cause the outlined code
-+ ;; really designed so that the fast-path does not force cache-loading of
-+ ;; non-used instructions. Only the non-common cases cause the outlined code
- ;; to run..
-
- system_call:
-@@ -151,7 +151,7 @@
- or.d (1<<9), $r0
- move $r0, $ccs
- #endif
--
-+
- movs.w -ENOSYS, $r0
- addoq +PT_r10, $sp, $acr
- move.d $r0, [$acr]
-@@ -166,9 +166,9 @@
- bmi _syscall_trace_entry
- nop
-
--_syscall_traced:
-+_syscall_traced:
- ;; Check for sanity in the requested syscall number.
-- cmpu.w NR_syscalls, $r9
-+ cmpu.w NR_syscalls, $r9
- bhs ret_from_sys_call
- lslq 2, $r9 ; Multiply by 4, in the delay slot.
-
-@@ -177,7 +177,7 @@
- move.d $sp, $r0
- subq 4, $sp
- move.d $r0, [$sp]
--
-+
- ;; The registers carrying parameters (R10-R13) are intact. The optional
- ;; fifth and sixth parameters is in MOF and SRP respectivly. Put them
- ;; back on the stack.
-@@ -185,33 +185,33 @@
- move $srp, [$sp]
- subq 4, $sp
- move $mof, [$sp]
--
-+
- ;; Actually to the system call.
- addo.d +sys_call_table, $r9, $acr
- move.d [$acr], $acr
- jsr $acr
- nop
--
-+
- addq 3*4, $sp ; Pop the mof, srp and regs parameters.
- addoq +PT_r10, $sp, $acr
- move.d $r10, [$acr] ; Save the return value.
-
-- moveq 1, $r9 ; "Parameter" to ret_from_sys_call to
-+ moveq 1, $r9 ; "Parameter" to ret_from_sys_call to
- ; show it was a sys call.
--
-+
- ;; Fall through into ret_from_sys_call to return.
--
-+
- ret_from_sys_call:
- ;; R9 is a parameter:
- ;; >= 1 from syscall
- ;; 0 from irq
--
-+
- ;; Get the current task-struct pointer.
-- movs.w -8192, $r0 ; THREAD_SIZE == 8192
-+ movs.w -8192, $r0 ; THREAD_SIZE == 8192
- and.d $sp, $r0
-
- di ; Make sure need_resched and sigpending don't change.
--
-+
- addoq +TI_flags, $r0, $acr
- move.d [$acr], $r1
- and.d _TIF_ALLWORK_MASK, $r1
-@@ -253,14 +253,14 @@
- move.d $r1, $r9
- ba _resume_userspace
- nop
--
-+
- _work_pending:
- addoq +TI_flags, $r0, $acr
- move.d [$acr], $r10
- btstq TIF_NEED_RESCHED, $r10 ; Need resched?
- bpl _work_notifysig ; No, must be signal/notify.
- nop
--
-+
- _work_resched:
- move.d $r9, $r1 ; Preserve R9.
- jsr schedule
-@@ -281,28 +281,26 @@
- ;; Deal with pending signals and notify-resume requests.
-
- addoq +TI_flags, $r0, $acr
-- move.d [$acr], $r13 ; The thread_info_flags parameter.
-- move.d $r9, $r10 ; do_notify_resume syscall/irq param.
-- moveq 0, $r11 ; oldset param - 0 in this case.
-- move.d $sp, $r12 ; The regs param.
-+ move.d [$acr], $r12 ; The thread_info_flags parameter.
-+ move.d $sp, $r11 ; The regs param.
- jsr do_notify_resume
-- nop
--
-+ move.d $r9, $r10 ; do_notify_resume syscall/irq param.
-+
- ba _Rexit
- nop
-
- ;; We get here as a sidetrack when we've entered a syscall with the
- ;; trace-bit set. We need to call do_syscall_trace and then continue
- ;; with the call.
--
-+
- _syscall_trace_entry:
- ;; PT_r10 in the frame contains -ENOSYS as required, at this point.
--
-+
- jsr do_syscall_trace
- nop
-
- ;; Now re-enter the syscall code to do the syscall itself. We need to
-- ;; restore R9 here to contain the wanted syscall, and the other
-+ ;; restore R9 here to contain the wanted syscall, and the other
- ;; parameter-bearing registers.
- addoq +PT_r9, $sp, $acr
- move.d [$acr], $r9
-@@ -318,10 +316,10 @@
- move [$acr], $mof
- addoq +PT_srp, $sp, $acr
- move [$acr], $srp
--
-+
- ba _syscall_traced
- nop
--
-+
- ;; Resume performs the actual task-switching, by switching stack
- ;; pointers. Input arguments are:
- ;;
-@@ -331,7 +329,7 @@
- ;;
- ;; Returns old current in R10.
-
--resume:
-+resume:
- subq 4, $sp
- move $srp, [$sp] ; Keep old/new PC on the stack.
- add.d $r12, $r10 ; R10 = current tasks tss.
-@@ -341,14 +339,14 @@
-
- addoq +THREAD_usp, $r10, $acr
- move $usp, [$acr] ; Save user-mode stackpointer.
--
-+
- ;; See copy_thread for the reason why register R9 is saved.
- subq 10*4, $sp
- movem $r9, [$sp] ; Save non-scratch registers and R9.
--
-+
- addoq +THREAD_ksp, $r10, $acr
- move.d $sp, [$acr] ; Save kernel SP for old task.
--
-+
- move.d $sp, $r10 ; Return last running task in R10.
- and.d -8192, $r10 ; Get thread_info from stackpointer.
- addoq +TI_task, $r10, $acr
-@@ -360,7 +358,7 @@
-
- addoq +THREAD_usp, $r11, $acr
- move [$acr], $usp ; Restore user-mode stackpointer.
--
-+
- addoq +THREAD_ccs, $r11, $acr
- move [$acr], $ccs ; Restore IRQ enable status.
- move.d [$sp+], $acr
-@@ -407,7 +405,7 @@
- movem [$sp+], $r13
- move.d [$sp+], $acr
- move [$sp], $srs
-- addq 4, $sp
-+ addq 4, $sp
- move [$sp+], $mof
- move [$sp+], $spc
- move [$sp+], $ccs
-@@ -419,7 +417,7 @@
-
- .comm cause_of_death, 4 ;; Don't declare this anywhere.
-
--spurious_interrupt:
-+spurious_interrupt:
- di
- jump hard_reset_now
- nop
-@@ -494,31 +492,38 @@
- ;; thread_info as first parameter
- move.d $r9, $r10
- moveq 5, $r11 ; SIGTRAP as second argument.
-- jsr ugdb_trap_user
-+ jsr ugdb_trap_user
- nop
- jump ret_from_intr ; Use the return routine for interrupts.
- nop
--
--gdb_handle_exception:
-+
-+gdb_handle_exception:
- subq 4, $sp
- move.d $r0, [$sp]
- #ifdef CONFIG_ETRAX_KGDB
-- move $ccs, $r0 ; U-flag not affected by previous insns.
-+ move $ccs, $r0 ; U-flag not affected by previous insns.
- btstq 16, $r0 ; Test the U-flag.
-- bmi _ugdb_handle_exception ; Go to user mode debugging.
-- nop ; Empty delay-slot (cannot pop R0 here).
-+ bmi _ugdb_handle_exception ; Go to user mode debugging.
-+ nop ; Empty delay-slot (cannot pop R0 here).
- ba kgdb_handle_exception ; Go to kernel debugging.
- move.d [$sp+], $r0 ; Restore R0 in delay slot.
- #endif
--
-+
- _ugdb_handle_exception:
- ba do_sigtrap ; SIGTRAP the offending process.
- move.d [$sp+], $r0 ; Restore R0 in delay slot.
-
-+ .global kernel_execve
-+kernel_execve:
-+ move.d __NR_execve, $r9
-+ break 13
-+ ret
-+ nop
-+
- .data
-
- .section .rodata,"a"
--sys_call_table:
-+sys_call_table:
- .long sys_restart_syscall ; 0 - old "setup()" system call, used
- ; for restarting.
- .long sys_exit
-@@ -647,7 +652,7 @@
- .long sys_adjtimex
- .long sys_mprotect /* 125 */
- .long sys_sigprocmask
-- .long sys_ni_syscall /* old "create_module" */
-+ .long sys_ni_syscall /* old "create_module" */
- .long sys_init_module
- .long sys_delete_module
- .long sys_ni_syscall /* 130: old "get_kernel_syms" */
-@@ -789,7 +794,7 @@
- .long sys_clock_getres
- .long sys_clock_nanosleep
- .long sys_statfs64
-- .long sys_fstatfs64
-+ .long sys_fstatfs64
- .long sys_tgkill /* 270 */
- .long sys_utimes
- .long sys_fadvise64_64
-@@ -805,7 +810,43 @@
- .long sys_mq_getsetattr
- .long sys_ni_syscall /* reserved for kexec */
- .long sys_waitid
--
-+ .long sys_ni_syscall /* 285 */ /* available */
-+ .long sys_add_key
-+ .long sys_request_key
-+ .long sys_keyctl
-+ .long sys_ioprio_set
-+ .long sys_ioprio_get /* 290 */
-+ .long sys_inotify_init
-+ .long sys_inotify_add_watch
-+ .long sys_inotify_rm_watch
-+ .long sys_migrate_pages
-+ .long sys_openat /* 295 */
-+ .long sys_mkdirat
-+ .long sys_mknodat
-+ .long sys_fchownat
-+ .long sys_futimesat
-+ .long sys_fstatat64 /* 300 */
-+ .long sys_unlinkat
-+ .long sys_renameat
-+ .long sys_linkat
-+ .long sys_symlinkat
-+ .long sys_readlinkat /* 305 */
-+ .long sys_fchmodat
-+ .long sys_faccessat
-+ .long sys_pselect6
-+ .long sys_ppoll
-+ .long sys_unshare /* 310 */
-+ .long sys_set_robust_list
-+ .long sys_set_robust_list
-+ .long sys_get_robust_list
-+ .long sys_splice
-+ .long sys_sync_file_range
-+ .long sys_tee /* 315 */
-+ .long sys_vmsplice
-+ .long sys_move_pages
-+ .long sys_getcpu
-+ .long sys_epoll_pwait
-+
- /*
- * NOTE!! This doesn't have to be exact - we just have
- * to make sure we have _enough_ of the "sys_ni_syscall"
-@@ -816,4 +857,4 @@
- .rept NR_syscalls - (.-sys_call_table) / 4
- .long sys_ni_syscall
- .endr
--
-+
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/fasttimer.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/fasttimer.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/fasttimer.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/fasttimer.c 2007-01-09 10:29:19.000000000 +0100
-@@ -1,110 +1,10 @@
--/* $Id: fasttimer.c,v 1.11 2005/01/04 11:15:46 starvik Exp $
-+/*
- * linux/arch/cris/kernel/fasttimer.c
- *
- * Fast timers for ETRAX FS
- * This may be useful in other OS than Linux so use 2 space indentation...
- *
-- * $Log: fasttimer.c,v $
-- * Revision 1.11 2005/01/04 11:15:46 starvik
-- * Don't share timer IRQ.
-- *
-- * Revision 1.10 2004/12/07 09:19:38 starvik
-- * Corrected includes.
-- * Use correct interrupt macros.
-- *
-- * Revision 1.9 2004/05/14 10:18:58 starvik
-- * Export fast_timer_list
-- *
-- * Revision 1.8 2004/05/14 07:58:03 starvik
-- * Merge of changes from 2.4
-- *
-- * Revision 1.7 2003/07/10 12:06:14 starvik
-- * Return IRQ_NONE if irq wasn't handled
-- *
-- * Revision 1.6 2003/07/04 08:27:49 starvik
-- * Merge of Linux 2.5.74
-- *
-- * Revision 1.5 2003/06/05 10:16:22 johana
-- * New INTR_VECT macros.
-- *
-- * Revision 1.4 2003/06/03 08:49:45 johana
-- * Fixed typo.
-- *
-- * Revision 1.3 2003/06/02 12:51:27 johana
-- * Now compiles.
-- * Commented some include files that probably can be removed.
-- *
-- * Revision 1.2 2003/06/02 12:09:41 johana
-- * Ported to ETRAX FS using the trig interrupt instead of timer1.
-- *
-- * Revision 1.3 2002/12/12 08:26:32 starvik
-- * Don't use C-comments inside CVS comments
-- *
-- * Revision 1.2 2002/12/11 15:42:02 starvik
-- * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
-- *
-- * Revision 1.1 2002/11/18 07:58:06 starvik
-- * Fast timers (from Linux 2.4)
-- *
-- * Revision 1.5 2002/10/15 06:21:39 starvik
-- * Added call to init_waitqueue_head
-- *
-- * Revision 1.4 2002/05/28 17:47:59 johana
-- * Added del_fast_timer()
-- *
-- * Revision 1.3 2002/05/28 16:16:07 johana
-- * Handle empty fast_timer_list
-- *
-- * Revision 1.2 2002/05/27 15:38:42 johana
-- * Made it compile without warnings on Linux 2.4.
-- * (includes, wait_queue, PROC_FS and snprintf)
-- *
-- * Revision 1.1 2002/05/27 15:32:25 johana
-- * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
-- *
-- * Revision 1.8 2001/11/27 13:50:40 pkj
-- * Disable interrupts while stopping the timer and while modifying the
-- * list of active timers in timer1_handler() as it may be interrupted
-- * by other interrupts (e.g., the serial interrupt) which may add fast
-- * timers.
-- *
-- * Revision 1.7 2001/11/22 11:50:32 pkj
-- * * Only store information about the last 16 timers.
-- * * proc_fasttimer_read() now uses an allocated buffer, since it
-- * requires more space than just a page even for only writing the
-- * last 16 timers. The buffer is only allocated on request, so
-- * unless /proc/fasttimer is read, it is never allocated.
-- * * Renamed fast_timer_started to fast_timers_started to match
-- * fast_timers_added and fast_timers_expired.
-- * * Some clean-up.
-- *
-- * Revision 1.6 2000/12/13 14:02:08 johana
-- * Removed volatile for fast_timer_list
-- *
-- * Revision 1.5 2000/12/13 13:55:35 johana
-- * Added DEBUG_LOG, added som cli() and cleanup
-- *
-- * Revision 1.4 2000/12/05 13:48:50 johana
-- * Added range check when writing proc file, modified timer int handling
-- *
-- * Revision 1.3 2000/11/23 10:10:20 johana
-- * More debug/logging possibilities.
-- * Moved GET_JIFFIES_USEC() to timex.h and time.c
-- *
-- * Revision 1.2 2000/11/01 13:41:04 johana
-- * Clean up and bugfixes.
-- * Created new do_gettimeofday_fast() that gets a timeval struct
-- * with time based on jiffies and *R_TIMER0_DATA, uses a table
-- * for fast conversion of timer value to microseconds.
-- * (Much faster the standard do_gettimeofday() and we don't really
-- * wan't to use the true time - we wan't the "uptime" so timers don't screw up
-- * when we change the time.
-- * TODO: Add efficient support for continuous timers as well.
-- *
-- * Revision 1.1 2000/10/26 15:49:16 johana
-- * Added fasttimer, highresolution timers.
-- *
-- * Copyright (C) 2000,2001 2002, 2003 Axis Communications AB, Lund, Sweden
-+ * Copyright (C) 2000-2006 Axis Communications AB, Lund, Sweden
- */
-
- #include <linux/errno.h>
-@@ -128,13 +28,13 @@
- #include <asm/fasttimer.h>
- #include <linux/proc_fs.h>
-
--/*
-- * timer0 is running at 100MHz and generating jiffies timer ticks
-+/*
-+ * timer0 is running at 100MHz and generating jiffies timer ticks
- * at 100 or 1000 HZ.
- * fasttimer gives an API that gives timers that expire "between" the jiffies
- * giving microsecond resolution (10 ns).
- * fasttimer uses reg_timer_rw_trig register to get interrupt when
-- * r_time reaches a certain value.
-+ * r_time reaches a certain value.
- */
-
-
-@@ -151,19 +51,19 @@
- #define SANITYCHECK(x)
- #endif
-
--#define D1(x)
--#define D2(x)
--#define DP(x)
-+#define D1(x)
-+#define D2(x)
-+#define DP(x)
-
- #define __INLINE__ inline
-
--static int fast_timer_running = 0;
--static int fast_timers_added = 0;
--static int fast_timers_started = 0;
--static int fast_timers_expired = 0;
--static int fast_timers_deleted = 0;
--static int fast_timer_is_init = 0;
--static int fast_timer_ints = 0;
-+static unsigned int fast_timer_running = 0;
-+static unsigned int fast_timers_added = 0;
-+static unsigned int fast_timers_started = 0;
-+static unsigned int fast_timers_expired = 0;
-+static unsigned int fast_timers_deleted = 0;
-+static unsigned int fast_timer_is_init = 0;
-+static unsigned int fast_timer_ints = 0;
-
- struct fast_timer *fast_timer_list = NULL;
-
-@@ -171,8 +71,8 @@
- #define DEBUG_LOG_MAX 128
- static const char * debug_log_string[DEBUG_LOG_MAX];
- static unsigned long debug_log_value[DEBUG_LOG_MAX];
--static int debug_log_cnt = 0;
--static int debug_log_cnt_wrapped = 0;
-+static unsigned int debug_log_cnt = 0;
-+static unsigned int debug_log_cnt_wrapped = 0;
-
- #define DEBUG_LOG(string, value) \
- { \
-@@ -202,48 +102,33 @@
- int timer_div_settings[NUM_TIMER_STATS];
- int timer_delay_settings[NUM_TIMER_STATS];
-
-+struct work_struct fast_work;
-
- static void
--timer_trig_handler(void);
-+timer_trig_handler(void* dummy);
-
-
-
- /* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
--void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
-+void __INLINE__ do_gettimeofday_fast(struct fasttime_t *tv)
- {
-- unsigned long sec = jiffies;
-- unsigned long usec = GET_JIFFIES_USEC();
--
-- usec += (sec % HZ) * (1000000 / HZ);
-- sec = sec / HZ;
--
-- if (usec > 1000000)
-- {
-- usec -= 1000000;
-- sec++;
-- }
-- tv->tv_sec = sec;
-- tv->tv_usec = usec;
-+ tv->tv_jiff = jiffies;
-+ tv->tv_usec = GET_JIFFIES_USEC();
- }
-
--int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
-+int __INLINE__ timeval_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
- {
-- if (t0->tv_sec < t1->tv_sec)
-- {
-+ /* Compare jiffies. Takes care of wrapping */
-+ if (time_before(t0->tv_jiff, t1->tv_jiff))
- return -1;
-- }
-- else if (t0->tv_sec > t1->tv_sec)
-- {
-+ else if (time_after(t0->tv_jiff, t1->tv_jiff))
- return 1;
-- }
-+
-+ /* Compare us */
- if (t0->tv_usec < t1->tv_usec)
-- {
- return -1;
-- }
- else if (t0->tv_usec > t1->tv_usec)
-- {
- return 1;
-- }
- return 0;
- }
-
-@@ -254,20 +139,23 @@
- reg_timer_rw_intr_mask intr_mask;
- reg_timer_rw_trig trig;
- reg_timer_rw_trig_cfg trig_cfg = { 0 };
-- reg_timer_r_time r_time;
--
-- r_time = REG_RD(timer, regi_timer, r_time);
-+ reg_timer_r_time r_time0;
-+ reg_timer_r_time r_time1;
-+ unsigned char trig_wrap;
-+ unsigned char time_wrap;
-
-+ r_time0 = REG_RD(timer, regi_timer, r_time);
-+
- D1(printk("start_timer_trig : %d us freq: %i div: %i\n",
- delay_us, freq_index, div));
- /* Clear trig irq */
- intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
- intr_mask.trig = 0;
- REG_WR(timer, regi_timer, rw_intr_mask, intr_mask);
--
-- /* Set timer values */
-+
-+ /* Set timer values and check if trigger wraps. */
- /* r_time is 100MHz (10 ns resolution) */
-- trig = r_time + delay_us*(1000/10);
-+ trig_wrap = (trig = r_time0 + delay_us*(1000/10)) < r_time0;
-
- timer_div_settings[fast_timers_started % NUM_TIMER_STATS] = trig;
- timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us;
-@@ -275,15 +163,17 @@
- /* Ack interrupt */
- ack_intr.trig = 1;
- REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
--
-+
- /* Start timer */
- REG_WR(timer, regi_timer, rw_trig, trig);
- trig_cfg.tmr = regk_timer_time;
- REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
-
- /* Check if we have already passed the trig time */
-- r_time = REG_RD(timer, regi_timer, r_time);
-- if (r_time < trig) {
-+ r_time1 = REG_RD(timer, regi_timer, r_time);
-+ time_wrap = r_time1 < r_time0;
-+
-+ if ((trig_wrap && !time_wrap) || (r_time1 < trig)) {
- /* No, Enable trig irq */
- intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
- intr_mask.trig = 1;
-@@ -291,16 +181,17 @@
- fast_timers_started++;
- fast_timer_running = 1;
- }
-- else
-+ else
- {
- /* We have passed the time, disable trig point, ack intr */
- trig_cfg.tmr = regk_timer_off;
- REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
- REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
-- /* call the int routine directly */
-- timer_trig_handler();
-+ /* call the int routine */
-+ INIT_WORK(&fast_work, timer_trig_handler, (void*)NULL);
-+ schedule_work(&fast_work);
- }
--
-+
- }
-
- /* In version 1.4 this function takes 27 - 50 us */
-@@ -327,7 +218,7 @@
- {
- printk("timer name: %s data: 0x%08lX already in list!\n", name, data);
- sanity_failed++;
-- return;
-+ goto done;
- }
- else
- {
-@@ -343,11 +234,11 @@
- t->name = name;
-
- t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
-- t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
-+ t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
- if (t->tv_expires.tv_usec > 1000000)
- {
- t->tv_expires.tv_usec -= 1000000;
-- t->tv_expires.tv_sec++;
-+ t->tv_expires.tv_jiff += HZ;
- }
- #ifdef FAST_TIMER_LOG
- timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
-@@ -388,6 +279,7 @@
-
- D2(printk("start_one_shot_timer: %d us done\n", delay_us));
-
-+done:
- local_irq_restore(flags);
- } /* start_one_shot_timer */
-
-@@ -431,26 +323,32 @@
- /* Timer interrupt handler for trig interrupts */
-
- static irqreturn_t
--timer_trig_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+timer_trig_interrupt(int irq, void *dev_id)
- {
- reg_timer_r_masked_intr masked_intr;
--
- /* Check if the timer interrupt is for us (a trig int) */
- masked_intr = REG_RD(timer, regi_timer, r_masked_intr);
- if (!masked_intr.trig)
- return IRQ_NONE;
-- timer_trig_handler();
-+ timer_trig_handler(NULL);
- return IRQ_HANDLED;
- }
-
--static void timer_trig_handler(void)
-+static void timer_trig_handler(void* dummy)
- {
- reg_timer_rw_ack_intr ack_intr = { 0 };
- reg_timer_rw_intr_mask intr_mask;
- reg_timer_rw_trig_cfg trig_cfg = { 0 };
- struct fast_timer *t;
-- unsigned long flags;
-+ unsigned long flags;
-
-+ /* We keep interrupts disabled not only when we modify the
-+ * fast timer list, but any time we hold a reference to a
-+ * timer in the list, since del_fast_timer may be called
-+ * from (another) interrupt context. Thus, the only time
-+ * when interrupts are enabled is when calling the timer
-+ * callback function.
-+ */
- local_irq_save(flags);
-
- /* Clear timer trig interrupt */
-@@ -470,16 +368,17 @@
- fast_timer_running = 0;
- fast_timer_ints++;
-
-- local_irq_restore(flags);
-+ fast_timer_function_type *f;
-+ unsigned long d;
-
- t = fast_timer_list;
- while (t)
- {
-- struct timeval tv;
-+ struct fasttime_t tv;
-
- /* Has it really expired? */
- do_gettimeofday_fast(&tv);
-- D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
-+ D1(printk("t: %is %06ius\n", tv.tv_jiff, tv.tv_usec));
-
- if (timeval_cmp(&t->tv_expires, &tv) <= 0)
- {
-@@ -490,7 +389,6 @@
- fast_timers_expired++;
-
- /* Remove this timer before call, since it may reuse the timer */
-- local_irq_save(flags);
- if (t->prev)
- {
- t->prev->next = t->next;
-@@ -505,11 +403,21 @@
- }
- t->prev = NULL;
- t->next = NULL;
-- local_irq_restore(flags);
-
-- if (t->function != NULL)
-+ /* Save function callback data before enabling interrupts,
-+ * since the timer may be removed and we don't know how it
-+ * was allocated (e.g. ->function and ->data may become
-+ * overwritten after deletion if the timer was stack-allocated).
-+ */
-+ f = t->function;
-+ d = t->data;
-+
-+ if (f != NULL)
- {
-- t->function(t->data);
-+ /* Run the callback function with interrupts enabled. */
-+ local_irq_restore(flags);
-+ f(d);
-+ local_irq_save(flags);
- }
- else
- {
-@@ -522,16 +430,19 @@
- D1(printk(".\n"));
- }
-
-- local_irq_save(flags);
- if ((t = fast_timer_list) != NULL)
- {
- /* Start next timer.. */
-- long us;
-- struct timeval tv;
-+ long us = 0;
-+ struct fasttime_t tv;
-
- do_gettimeofday_fast(&tv);
-- us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
-- t->tv_expires.tv_usec - tv.tv_usec);
-+
-+ /* time_after_eq takes care of wrapping */
-+ if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
-+ us = ((t->tv_expires.tv_jiff - tv.tv_jiff) * 1000000 / HZ +
-+ t->tv_expires.tv_usec - tv.tv_usec);
-+
- if (us > 0)
- {
- if (!fast_timer_running)
-@@ -541,7 +452,6 @@
- #endif
- start_timer_trig(us);
- }
-- local_irq_restore(flags);
- break;
- }
- else
-@@ -552,9 +462,10 @@
- D1(printk("e! %d\n", us));
- }
- }
-- local_irq_restore(flags);
- }
-
-+ local_irq_restore(flags);
-+
- if (!t)
- {
- D1(printk("ttrig stop!\n"));
-@@ -577,28 +488,17 @@
- void schedule_usleep(unsigned long us)
- {
- struct fast_timer t;
--#ifdef DECLARE_WAITQUEUE
- wait_queue_head_t sleep_wait;
- init_waitqueue_head(&sleep_wait);
-- {
-- DECLARE_WAITQUEUE(wait, current);
--#else
-- struct wait_queue *sleep_wait = NULL;
-- struct wait_queue wait = { current, NULL };
--#endif
-
- D1(printk("schedule_usleep(%d)\n", us));
-- add_wait_queue(&sleep_wait, &wait);
-- set_current_state(TASK_INTERRUPTIBLE);
- start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
- "usleep");
-- schedule();
-- set_current_state(TASK_RUNNING);
-- remove_wait_queue(&sleep_wait, &wait);
-+ /* Uninterruptible sleep on the fast timer. (The condition is somewhat
-+ redundant since the timer is what wakes us up.) */
-+ wait_event(sleep_wait, !fast_timer_pending(&t));
-+
- D1(printk("done schedule_usleep(%d)\n", us));
--#ifdef DECLARE_WAITQUEUE
-- }
--#endif
- }
-
- #ifdef CONFIG_PROC_FS
-@@ -638,7 +538,7 @@
- unsigned long flags;
- int i = 0;
- int num_to_show;
-- struct timeval tv;
-+ struct fasttime_t tv;
- struct fast_timer *t, *nextt;
- static char *bigbuf = NULL;
- static unsigned long used;
-@@ -646,7 +546,8 @@
- if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
- {
- used = 0;
-- bigbuf[0] = '\0';
-+ if (buf)
-+ buf[0] = '\0';
- return 0;
- }
-
-@@ -668,7 +569,7 @@
- used += sprintf(bigbuf + used, "Fast timer running: %s\n",
- fast_timer_running ? "yes" : "no");
- used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
-- (unsigned long)tv.tv_sec,
-+ (unsigned long)tv.tv_jiff,
- (unsigned long)tv.tv_usec);
- #ifdef FAST_TIMER_SANITY_CHECKS
- used += sprintf(bigbuf + used, "Sanity failed: %i\n",
-@@ -717,9 +618,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -739,9 +640,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -759,9 +660,9 @@
- "d: %6li us data: 0x%08lX"
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
-@@ -772,7 +673,6 @@
-
- used += sprintf(bigbuf + used, "Active timers:\n");
- local_irq_save(flags);
-- local_irq_save(flags);
- t = fast_timer_list;
- while (t != NULL && (used+100 < BIG_BUF_SIZE))
- {
-@@ -783,15 +683,15 @@
- /* " func: 0x%08lX" */
- "\n",
- t->name,
-- (unsigned long)t->tv_set.tv_sec,
-+ (unsigned long)t->tv_set.tv_jiff,
- (unsigned long)t->tv_set.tv_usec,
-- (unsigned long)t->tv_expires.tv_sec,
-+ (unsigned long)t->tv_expires.tv_jiff,
- (unsigned long)t->tv_expires.tv_usec,
- t->delay_us,
- t->data
- /* , t->function */
- );
-- local_irq_disable();
-+ local_irq_save(flags);
- if (t->next != nextt)
- {
- printk("timer removed!\n");
-@@ -822,7 +722,7 @@
- static struct fast_timer tr[10];
- static int exp_num[10];
-
--static struct timeval tv_exp[100];
-+static struct fasttime_t tv_exp[100];
-
- static void test_timeout(unsigned long data)
- {
-@@ -860,7 +760,7 @@
- int prev_num;
- int j;
-
-- struct timeval tv, tv0, tv1, tv2;
-+ struct fasttime_t tv, tv0, tv1, tv2;
-
- printk("fast_timer_test() start\n");
- do_gettimeofday_fast(&tv);
-@@ -873,7 +773,7 @@
- {
- do_gettimeofday_fast(&tv_exp[j]);
- }
-- printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
-+ printk("fast_timer_test() %is %06i\n", tv.tv_jiff, tv.tv_usec);
-
- for (j = 0; j < 1000; j++)
- {
-@@ -883,11 +783,11 @@
- for (j = 0; j < 100; j++)
- {
- printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
-- tv_exp[j].tv_sec,tv_exp[j].tv_usec,
-- tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
-- tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
-- tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
-- tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
-+ tv_exp[j].tv_jiff,tv_exp[j].tv_usec,
-+ tv_exp[j+1].tv_jiff,tv_exp[j+1].tv_usec,
-+ tv_exp[j+2].tv_jiff,tv_exp[j+2].tv_usec,
-+ tv_exp[j+3].tv_jiff,tv_exp[j+3].tv_usec,
-+ tv_exp[j+4].tv_jiff,tv_exp[j+4].tv_usec);
- j += 4;
- }
- do_gettimeofday_fast(&tv0);
-@@ -919,9 +819,9 @@
- }
- }
- do_gettimeofday_fast(&tv2);
-- printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
-- printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
-- printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
-+ printk("Timers started %is %06i\n", tv0.tv_jiff, tv0.tv_usec);
-+ printk("Timers started at %is %06i\n", tv1.tv_jiff, tv1.tv_usec);
-+ printk("Timers done %is %06i\n", tv2.tv_jiff, tv2.tv_usec);
- DP(printk("buf0:\n");
- printk(buf0);
- printk("buf1:\n");
-@@ -943,9 +843,9 @@
- printk("%-10s set: %6is %06ius exp: %6is %06ius "
- "data: 0x%08X func: 0x%08X\n",
- t->name,
-- t->tv_set.tv_sec,
-+ t->tv_set.tv_jiff,
- t->tv_set.tv_usec,
-- t->tv_expires.tv_sec,
-+ t->tv_expires.tv_jiff,
- t->tv_expires.tv_usec,
- t->data,
- t->function
-@@ -953,10 +853,10 @@
-
- printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
- t->delay_us,
-- tv_exp[j].tv_sec,
-+ tv_exp[j].tv_jiff,
- tv_exp[j].tv_usec,
- exp_num[j],
-- (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
-+ (tv_exp[j].tv_jiff - t->tv_expires.tv_jiff)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
- }
- proc_fasttimer_read(buf5, NULL, 0, 0, 0);
- printk("buf5 after all done:\n");
-@@ -966,7 +866,7 @@
- #endif
-
-
--void fast_timer_init(void)
-+int fast_timer_init(void)
- {
- /* For some reason, request_irq() hangs when called froom time_init() */
- if (!fast_timer_is_init)
-@@ -981,10 +881,10 @@
- proc_register_dynamic(&proc_root, &fasttimer_proc_entry);
- #endif
- #endif /* PROC_FS */
-- if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, IRQF_DISABLED,
-- "fast timer int", NULL))
-+ if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, SA_SHIRQ | SA_INTERRUPT,
-+ "fast timer int", &fast_timer_list))
- {
-- printk("err: timer1 irq\n");
-+ printk("err: fasttimer irq\n");
- }
- fast_timer_is_init = 1;
- #ifdef FAST_TIMER_TEST
-@@ -992,4 +892,6 @@
- fast_timer_test();
- #endif
- }
-+ return 0;
- }
-+__initcall(fast_timer_init);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/head.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/head.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/head.S 2007-01-09 10:29:19.000000000 +0100
-@@ -4,7 +4,6 @@
- * Copyright (C) 2003, Axis Communications AB
- */
-
--
- #define ASSEMBLER_MACROS_ONLY
-
- /*
-@@ -12,14 +11,21 @@
- * -traditional must not be used when assembling this file.
- */
- #include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/memmap.h>
-+#include <asm/arch/hwregs/intr_vect.h>
- #include <asm/arch/hwregs/asm/mmu_defs_asm.h>
- #include <asm/arch/hwregs/asm/reg_map_asm.h>
- #include <asm/arch/hwregs/asm/config_defs_asm.h>
- #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
--
-+#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
-+#include <asm/arch/hwregs/asm/gio_defs_asm.h>
-+
- #define CRAMFS_MAGIC 0x28cd3d45
-+#define JHEAD_MAGIC 0x1FF528A6
-+#define JHEAD_SIZE 8
- #define RAM_INIT_MAGIC 0x56902387
--#define COMMAND_LINE_MAGIC 0x87109563
-+#define COMMAND_LINE_MAGIC 0x87109563
-+#define NAND_BOOT_MAGIC 0x9a9db001
-
- ;; NOTE: R8 and R9 carry information from the decompressor (if the
- ;; kernel was compressed). They must not be used in the code below
-@@ -30,11 +36,10 @@
- .global romfs_start
- .global romfs_length
- .global romfs_in_flash
-+ .global nand_boot
- .global swapper_pg_dir
-- .global crisv32_nand_boot
-- .global crisv32_nand_cramfs_offset
-
-- ;; Dummy section to make it bootable with current VCS simulator
-+ ;; Dummy section to make it bootable with current VCS simulator
- #ifdef CONFIG_ETRAXFS_SIM
- .section ".boot", "ax"
- ba tstart
-@@ -42,13 +47,13 @@
- #endif
-
- .text
--tstart:
-+tstart:
- ;; This is the entry point of the kernel. The CPU is currently in
- ;; supervisor mode.
-- ;;
-+ ;;
- ;; 0x00000000 if flash.
- ;; 0x40004000 if DRAM.
-- ;;
-+ ;;
- di
-
- ;; Start clocks for used blocks.
-@@ -72,20 +77,25 @@
- move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
- move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
- move.d $r1, [$r0]
--
--#ifdef CONFIG_ETRAXFS_SIM
-+
-+#ifdef CONFIG_ETRAXFS_SIM
- ;; Set up minimal flash waitstates
- move.d 0, $r10
- move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
- move.d $r10, [$r11]
--#endif
-+#endif
-
-+#ifdef CONFIG_SMP
-+secondary_cpu_entry: /* Entry point for secondary CPUs */
-+ di
-+#endif
-+
- ;; Setup and enable the MMU. Use same configuration for both the data
- ;; and the instruction MMU.
- ;;
- ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
- ;; bank 1 is the instruction MMU, bank 2 is the data MMU.
--#ifndef CONFIG_ETRAXFS_SIM
-+#ifndef CONFIG_ETRAXFS_SIM
- move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
- | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
- | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
-@@ -96,7 +106,7 @@
- | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0) \
- | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
- | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
--#endif
-+#endif
-
- ;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
- move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
-@@ -146,8 +156,8 @@
- | REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
- | REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
- | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
--#endif
--
-+#endif
-+
- ;; Update instruction MMU.
- move 1, $srs
- nop
-@@ -165,7 +175,7 @@
- move $r0, $s2 ; kbase_hi.
- move $r1, $s1 ; kbase_lo
- move $r2, $s0 ; mm_cfg, virtual memory configuration.
--
-+
- ;; Enable data and instruction MMU.
- move 0, $srs
- moveq 0xf, $r0 ; IMMU, DMMU, DCache, Icache on
-@@ -183,17 +193,11 @@
- nop
- nop
- nop
-- move $s10, $r0
-+ move $s12, $r0
- cmpq 0, $r0
- beq master_cpu
- nop
- slave_cpu:
-- ; A slave waits for cpu_now_booting to be equal to CPU ID.
-- move.d cpu_now_booting, $r1
--slave_wait:
-- cmp.d [$r1], $r0
-- bne slave_wait
-- nop
- ; Time to boot-up. Get stack location provided by master CPU.
- move.d smp_init_current_idle_thread, $r1
- move.d [$r1], $sp
-@@ -203,9 +207,16 @@
- jsr smp_callin
- nop
- master_cpu:
--#endif
-+ /* Set up entry point for secondary CPUs. The boot ROM has set up
-+ * EBP at start of internal memory. The CPU will get there
-+ * later when we issue an IPI to them... */
-+ move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0
-+ move.d secondary_cpu_entry, $r1
-+ move.d $r1, [$r0]
-+#endif
- #ifndef CONFIG_ETRAXFS_SIM
-- ;; Check if starting from DRAM or flash.
-+ ; Check if starting from DRAM (network->RAM boot or unpacked
-+ ; compressed kernel), or directly from flash.
- lapcq ., $r0
- and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
- cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
-@@ -238,6 +249,7 @@
- ;; Copy the text and data section to DRAM. This depends on that the
- ;; variables used below are correctly set up by the linker script.
- ;; The calculated value stored in R4 is used below.
-+ ;; Leave the cramfs file system (piggybacked after the kernel) in flash.
- moveq 0, $r0 ; Source.
- move.d text_start, $r1 ; Destination.
- move.d __vmlinux_end, $r2
-@@ -249,7 +261,7 @@
- blo 1b
- nop
-
-- ;; Keep CRAMFS in flash.
-+ ;; Check for cramfs.
- moveq 0, $r0
- move.d romfs_length, $r1
- move.d $r0, [$r1]
-@@ -257,7 +269,8 @@
- cmp.d CRAMFS_MAGIC, $r0
- bne 1f
- nop
--
-+
-+ ;; Set length and start of cramfs, set romfs_in_flash flag
- addoq +4, $r4, $acr
- move.d [$acr], $r0
- move.d romfs_length, $r1
-@@ -273,35 +286,32 @@
- nop
-
- _inram:
-- ;; Check if booting from NAND flash (in that case we just remember the offset
-- ;; into the flash where cramfs should be).
-- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
-- move.d [$r0], $r0
-- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
-- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
-- bne move_cramfs
-- moveq 1,$r0
-- move.d crisv32_nand_boot, $r1
-- move.d $r0, [$r1]
-- move.d crisv32_nand_cramfs_offset, $r1
-- move.d $r9, [$r1]
-+ ;; Check if booting from NAND flash; if so, set appropriate flags
-+ ;; and move on.
-+ cmp.d NAND_BOOT_MAGIC, $r12
-+ bne move_cramfs ; not nand, jump
- moveq 1, $r0
-- move.d romfs_in_flash, $r1
-+ move.d nand_boot, $r1 ; tell axisflashmap we're booting from NAND
-+ move.d $r0, [$r1]
-+ moveq 0, $r0 ; tell axisflashmap romfs is not in
-+ move.d romfs_in_flash, $r1 ; (directly accessed) flash
- move.d $r0, [$r1]
-- jump _start_it
-+ jump _start_it ; continue with boot
- nop
-
--move_cramfs:
-- ;; Move the cramfs after BSS.
-+move_cramfs:
-+ ;; kernel is in DRAM.
-+ ;; Must figure out if there is a piggybacked rootfs image or not.
-+ ;; Set romfs_length to 0 => no rootfs image available by default.
- moveq 0, $r0
- move.d romfs_length, $r1
- move.d $r0, [$r1]
-
--#ifndef CONFIG_ETRAXFS_SIM
-+#ifndef CONFIG_ETRAXFS_SIM
- ;; The kernel could have been unpacked to DRAM by the loader, but
-- ;; the cramfs image could still be inte the flash immediately
-- ;; following the compressed kernel image. The loaded passes the address
-- ;; of the bute succeeding the last compressed byte in the flash in
-+ ;; the cramfs image could still be in the flash immediately
-+ ;; following the compressed kernel image. The loader passes the address
-+ ;; of the byte succeeding the last compressed byte in the flash in
- ;; register R9 when starting the kernel.
- cmp.d 0x0ffffff8, $r9
- bhs _no_romfs_in_flash ; R9 points outside the flash area.
-@@ -309,12 +319,14 @@
- #else
- ba _no_romfs_in_flash
- nop
--#endif
-+#endif
-+ ;; cramfs rootfs might to be in flash. Check for it.
- move.d [$r9], $r0 ; cramfs_super.magic
- cmp.d CRAMFS_MAGIC, $r0
- bne _no_romfs_in_flash
- nop
-
-+ ;; found cramfs in flash. set address and size, and romfs_in_flash flag.
- addoq +4, $r9, $acr
- move.d [$acr], $r0
- move.d romfs_length, $r1
-@@ -330,29 +342,45 @@
- nop
-
- _no_romfs_in_flash:
-- ;; Look for cramfs.
--#ifndef CONFIG_ETRAXFS_SIM
-+ ;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
-+ ;; after kernel in RAM, as is the case with network->RAM boot.
-+ ;; For cramfs, partition starts with magic and length.
-+ ;; For jffs2, a jhead is prepended which contains with magic and length.
-+ ;; The jhead is not part of the jffs2 partition however.
-+#ifndef CONFIG_ETRAXFS_SIM
- move.d __vmlinux_end, $r0
- #else
-- move.d __end, $r0
--#endif
-+ move.d __end, $r0
-+#endif
- move.d [$r0], $r1
-- cmp.d CRAMFS_MAGIC, $r1
-- bne 2f
-+ cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic?
-+ beq 2f ; yes, jump
-+ nop
-+ cmp.d JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
-+ bne 4f ; no, skip copy
-+ nop
-+ addq 4, $r0 ; location of jffs2 size
-+ move.d [$r0+], $r2 ; fetch jffs2 size -> r2
-+ ; r0 now points to start of jffs2
-+ ba 3f
- nop
-+2:
-+ addoq +4, $r0, $acr ; location of cramfs size
-+ move.d [$acr], $r2 ; fetch cramfs size -> r2
-+ ; r0 still points to start of cramfs
-+3:
-+ ;; Now, move the root fs to after kernel's BSS
-
-- addoq +4, $r0, $acr
-- move.d [$acr], $r2
-- move.d _end, $r1
-+ move.d _end, $r1 ; start of cramfs -> r1
- move.d romfs_start, $r3
-- move.d $r1, [$r3]
-+ move.d $r1, [$r3] ; store at romfs_start (for axisflashmap)
- move.d romfs_length, $r3
-- move.d $r2, [$r3]
-+ move.d $r2, [$r3] ; store size at romfs_length
-
--#ifndef CONFIG_ETRAXFS_SIM
-- add.d $r2, $r0
-+#ifndef CONFIG_ETRAXFS_SIM
-+ add.d $r2, $r0 ; copy from end and downwards
- add.d $r2, $r1
--
-+
- lsrq 1, $r2 ; Size is in bytes, we copy words.
- addq 1, $r2
- 1:
-@@ -364,17 +392,24 @@
- bne 1b
- nop
- #endif
--
--2:
-+
-+4:
-+ ;; BSS move done.
-+ ;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
-+ ;; Also clear nand_boot flag; if we got here, we know we've not
-+ ;; booted from NAND flash.
- moveq 0, $r0
- move.d romfs_in_flash, $r1
- move.d $r0, [$r1]
-+ moveq 0, $r0
-+ move.d nand_boot, $r1
-+ move.d $r0, [$r1]
-
- jump _start_it ; Jump to cached code.
- nop
--
-+
- _start_it:
--
-+
- ;; Check if kernel command line is supplied
- cmp.d COMMAND_LINE_MAGIC, $r10
- bne no_command_line
-@@ -383,9 +418,9 @@
- move.d 256, $r13
- move.d cris_command_line, $r10
- or.d 0x80000000, $r11 ; Make it virtual
--1:
-- move.b [$r11+], $r12
-- move.b $r12, [$r10+]
-+1:
-+ move.b [$r11+], $r1
-+ move.b $r1, [$r10+]
- subq 1, $r13
- bne 1b
- nop
-@@ -401,7 +436,7 @@
- move.d etrax_irv, $r1 ; Set the exception base register and pointer.
- move.d $r0, [$r1]
-
--#ifndef CONFIG_ETRAXFS_SIM
-+#ifndef CONFIG_ETRAXFS_SIM
- ;; Clear the BSS region from _bss_start to _end.
- move.d __bss_start, $r0
- move.d _end, $r1
-@@ -429,17 +464,31 @@
- .data
- etrax_irv:
- .dword 0
-+
-+; Variables for communication with the Axis flash map driver (axisflashmap),
-+; and for setting up memory in arch/cris/kernel/setup.c .
-+
-+; romfs_start is set to the start of the root file system, if it exists
-+; in directly accessible memory (i.e. NOR Flash when booting from Flash,
-+; or RAM when booting directly from a network-downloaded RAM image)
- romfs_start:
- .dword 0
-+
-+; romfs_length is set to the size of the root file system image, if it exists
-+; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
- romfs_length:
- .dword 0
-+
-+; romfs_in_flash is set to 1 if the root file system resides in directly
-+; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
-+; or NAND flash boot.
- romfs_in_flash:
- .dword 0
--crisv32_nand_boot:
-- .dword 0
--crisv32_nand_cramfs_offset:
-- .dword 0
-
-+; nand_boot is set to 1 when the kernel has been booted from NAND flash
-+nand_boot:
-+ .dword 0
-+
- swapper_pg_dir = 0xc0002000
-
- .section ".init.data", "aw"
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/io.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/io.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/io.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/io.c 2006-11-21 00:04:55.000000000 +0100
-@@ -1,7 +1,7 @@
--/*
-+/*
- * Helper functions for I/O pins.
- *
-- * Copyright (c) 2004 Axis Communications AB.
-+ * Copyright (c) 2004, 2006 Axis Communications AB.
- */
-
- #include <linux/types.h>
-@@ -15,6 +15,10 @@
- #include <asm/arch/pinmux.h>
- #include <asm/arch/hwregs/gio_defs.h>
-
-+#ifndef DEBUG
-+#define DEBUG(x)
-+#endif
-+
- struct crisv32_ioport crisv32_ioports[] =
- {
- {
-@@ -46,13 +50,15 @@
- (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_dout),
- (unsigned long*)REG_ADDR(gio, regi_gio, r_pe_din),
- 18
-- }
-+ }
- };
-
- #define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
-
--struct crisv32_iopin crisv32_led1_green;
--struct crisv32_iopin crisv32_led1_red;
-+struct crisv32_iopin crisv32_led_net0_green;
-+struct crisv32_iopin crisv32_led_net0_red;
-+struct crisv32_iopin crisv32_led_net1_green;
-+struct crisv32_iopin crisv32_led_net1_red;
- struct crisv32_iopin crisv32_led2_green;
- struct crisv32_iopin crisv32_led2_red;
- struct crisv32_iopin crisv32_led3_green;
-@@ -76,34 +82,54 @@
- static int __init crisv32_io_init(void)
- {
- int ret = 0;
-+
-+ u32 i;
-+
-+ /* Locks *should* be dynamically initialized. */
-+ for (i = 0; i < ARRAY_SIZE(crisv32_ioports); i++)
-+ spin_lock_init (&crisv32_ioports[i].lock);
-+ spin_lock_init (&dummy_port.lock);
-+
- /* Initialize LEDs */
-- ret += crisv32_io_get_name(&crisv32_led1_green, CONFIG_ETRAX_LED1G);
-- ret += crisv32_io_get_name(&crisv32_led1_red, CONFIG_ETRAX_LED1R);
-+#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
-+ ret += crisv32_io_get_name(&crisv32_led_net0_green, CONFIG_ETRAX_LED_G_NET0);
-+ crisv32_io_set_dir(&crisv32_led_net0_green, crisv32_io_dir_out);
-+ if (strcmp(CONFIG_ETRAX_LED_G_NET0, CONFIG_ETRAX_LED_R_NET0)) {
-+ ret += crisv32_io_get_name(&crisv32_led_net0_red, CONFIG_ETRAX_LED_R_NET0);
-+ crisv32_io_set_dir(&crisv32_led_net0_red, crisv32_io_dir_out);
-+ } else
-+ crisv32_led_net0_red = dummy_led;
-+#endif
-+
-+#ifdef CONFIG_ETRAX_NBR_LED_GRP_TWO
-+ ret += crisv32_io_get_name(&crisv32_led_net1_green, CONFIG_ETRAX_LED_G_NET1);
-+ crisv32_io_set_dir(&crisv32_led_net1_green, crisv32_io_dir_out);
-+ if (strcmp(CONFIG_ETRAX_LED_G_NET1, CONFIG_ETRAX_LED_R_NET1)) {
-+ crisv32_io_get_name(&crisv32_led_net1_red, CONFIG_ETRAX_LED_R_NET1);
-+ crisv32_io_set_dir(&crisv32_led_net1_red, crisv32_io_dir_out);
-+ } else
-+ crisv32_led_net1_red = dummy_led;
-+#endif
-+
- ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_LED2G);
- ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_LED2R);
- ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_LED3G);
- ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_LED3R);
-- crisv32_io_set_dir(&crisv32_led1_green, crisv32_io_dir_out);
-- crisv32_io_set_dir(&crisv32_led1_red, crisv32_io_dir_out);
-+
- crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
- crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
- crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
- crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
-
-- if (!strcmp(CONFIG_ETRAX_LED1G, CONFIG_ETRAX_LED1R))
-- crisv32_led1_red = dummy_led;
-- if (!strcmp(CONFIG_ETRAX_LED2G, CONFIG_ETRAX_LED2R))
-- crisv32_led2_red = dummy_led;
--
- return ret;
- }
-
- __initcall(crisv32_io_init);
-
--int crisv32_io_get(struct crisv32_iopin* iopin,
-+int crisv32_io_get(struct crisv32_iopin* iopin,
- unsigned int port, unsigned int pin)
- {
-- if (port > NBR_OF_PORTS)
-+ if (port > NBR_OF_PORTS)
- return -EINVAL;
- if (port > crisv32_ioports[port].pin_count)
- return -EINVAL;
-@@ -111,14 +137,17 @@
- iopin->bit = 1 << pin;
- iopin->port = &crisv32_ioports[port];
-
-- if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
-+ /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
-+ /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
-+ if (port != 0 && crisv32_pinmux_alloc(port-1, pin, pin, pinmux_gpio))
- return -EIO;
--
-+ DEBUG(printk("crisv32_io_get: Allocated pin %d on port %d\n", pin, port ));
-+
- return 0;
- }
-
- int crisv32_io_get_name(struct crisv32_iopin* iopin,
-- char* name)
-+ const char* name)
- {
- int port;
- int pin;
-@@ -128,7 +157,7 @@
-
- if (toupper(*name) < 'A' || toupper(*name) > 'E')
- return -EINVAL;
--
-+
- port = toupper(*name) - 'A';
- name++;
- pin = simple_strtoul(name, NULL, 10);
-@@ -139,9 +168,12 @@
- iopin->bit = 1 << pin;
- iopin->port = &crisv32_ioports[port];
-
-- if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
-+ /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
-+ /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
-+ if (port != 0 && crisv32_pinmux_alloc(port-1, pin, pin, pinmux_gpio))
- return -EIO;
-
-+ DEBUG(printk("crisv32_io_get_name: Allocated pin %d on port %d\n", pin, port));
- return 0;
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/irq.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/irq.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/irq.c 2006-10-13 14:43:13.000000000 +0200
-@@ -44,10 +44,10 @@
- cpumask_t mask; /* The CPUs to which the IRQ may be allocated. */
- };
-
--struct cris_irq_allocation irq_allocations[NR_IRQS] =
-+struct cris_irq_allocation irq_allocations[NR_IRQS] =
- {[0 ... NR_IRQS - 1] = {0, CPU_MASK_ALL}};
-
--static unsigned long irq_regs[NR_CPUS] =
-+static unsigned long irq_regs[NR_CPUS] =
- {
- regi_irq,
- #ifdef CONFIG_SMP
-@@ -79,9 +79,9 @@
- extern void kgdb_init(void);
- extern void breakpoint(void);
-
--/*
-- * Build the IRQ handler stubs using macros from irq.h. First argument is the
-- * IRQ number, the second argument is the corresponding bit in
-+/*
-+ * Build the IRQ handler stubs using macros from irq.h. First argument is the
-+ * IRQ number, the second argument is the corresponding bit in
- * intr_rw_vect_mask found in asm/arch/hwregs/intr_vect_defs.h.
- */
- BUILD_IRQ(0x31, (1 << 0)) /* memarb */
-@@ -139,7 +139,7 @@
-
- spin_lock_irqsave(&irq_lock, flags);
- intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
--
-+
- /* Remember; 1 let thru, 0 block. */
- intr_mask &= ~(1 << (irq - FIRST_IRQ));
-
-@@ -152,10 +152,10 @@
- {
- int intr_mask;
- unsigned long flags;
--
-+
- spin_lock_irqsave(&irq_lock, flags);
- intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
--
-+
- /* Remember; 1 let thru, 0 block. */
- intr_mask |= (1 << (irq - FIRST_IRQ));
-
-@@ -168,7 +168,7 @@
- {
- int cpu;
- unsigned long flags;
--
-+
- spin_lock_irqsave(&irq_lock, flags);
- cpu = irq_allocations[irq - FIRST_IRQ].cpu;
-
-@@ -178,12 +178,12 @@
- spin_unlock_irqrestore(&irq_lock, flags);
- return smp_processor_id();
- }
--
-+
-
- /* Let the interrupt stay if possible */
- if (cpu_isset(cpu, irq_allocations[irq - FIRST_IRQ].mask))
- goto out;
--
-+
- /* IRQ must be moved to another CPU. */
- cpu = first_cpu(irq_allocations[irq - FIRST_IRQ].mask);
- irq_allocations[irq - FIRST_IRQ].cpu = cpu;
-@@ -287,7 +287,7 @@
- * interrupt from the CPU and software has to sort out which
- * interrupts that happened. There are two special cases here:
- *
-- * 1. Timer interrupts may never be blocked because of the
-+ * 1. Timer interrupts may never be blocked because of the
- * watchdog (refer to comment in include/asr/arch/irq.h)
- * 2. GDB serial port IRQs are unhandled here and will be handled
- * as a single IRQ when it strikes again because the GDB
-@@ -304,33 +304,33 @@
- cpu = smp_processor_id();
-
- /* An extra irq_enter here to prevent softIRQs to run after
-- * each do_IRQ. This will decrease the interrupt latency.
-+ * each do_IRQ. This will decrease the interrupt latency.
- */
- irq_enter();
-
- /* Get which IRQs that happend. */
- masked = REG_RD_INT(intr_vect, irq_regs[cpu], r_masked_vect);
--
-+
- /* Calculate new IRQ mask with these IRQs disabled. */
- mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
- mask &= ~masked;
-
- /* Timer IRQ is never masked */
- if (masked & TIMER_MASK)
-- mask |= TIMER_MASK;
-+ mask |= TIMER_MASK;
-
- /* Block all the IRQs */
- REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
--
-+
- /* Check for timer IRQ and handle it special. */
- if (masked & TIMER_MASK) {
- masked &= ~TIMER_MASK;
-- do_IRQ(TIMER_INTR_VECT, regs);
-+ do_IRQ(TIMER_INTR_VECT, regs);
- }
-
- #ifdef IGNORE_MASK
- /* Remove IRQs that can't be handled as multiple. */
-- masked &= ~IGNORE_MASK;
-+ masked &= ~IGNORE_MASK;
- #endif
-
- /* Handle the rest of the IRQs. */
-@@ -377,7 +377,7 @@
- irq_desc[TIMER_INTR_VECT].status |= IRQ_PER_CPU;
- irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
- irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU;
--
-+
- set_exception_vector(0x00, nmi_interrupt);
- set_exception_vector(0x30, multiple_interrupt);
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb.c 2005-07-06 11:40:49.000000000 +0200
-@@ -25,7 +25,7 @@
- * kgdb usage notes:
- * -----------------
- *
-- * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
-+ * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
- * built with different gcc flags: "-g" is added to get debug infos, and
- * "-fomit-frame-pointer" is omitted to make debugging easier. Since the
- * resulting kernel will be quite big (approx. > 7 MB), it will be stripped
-@@ -118,7 +118,7 @@
- * call to kgdb_init() is necessary in order to allow any breakpoints
- * or error conditions to be properly intercepted and reported to gdb.
- * Two, a breakpoint needs to be generated to begin communication. This
-- * is most easily accomplished by a call to breakpoint().
-+ * is most easily accomplished by a call to breakpoint().
- *
- * The following gdb commands are supported:
- *
-@@ -382,8 +382,8 @@
- int getDebugChar(void);
-
- #ifdef CONFIG_ETRAXFS_SIM
--int getDebugChar(void)
--{
-+int getDebugChar(void)
-+{
- return socketread();
- }
- #endif
-@@ -490,7 +490,7 @@
-
- /********************************** Breakpoint *******************************/
- /* Use an internal stack in the breakpoint and interrupt response routines.
-- FIXME: How do we know the size of this stack is enough?
-+ FIXME: How do we know the size of this stack is enough?
- Global so it can be reached from assembler code. */
- #define INTERNAL_STACK_SIZE 1024
- char internal_stack[INTERNAL_STACK_SIZE];
-@@ -511,7 +511,7 @@
- gdb_cris_strcpy(char *s1, const char *s2)
- {
- char *s = s1;
--
-+
- for (s = s1; (*s++ = *s2++) != '\0'; )
- ;
- return s1;
-@@ -522,7 +522,7 @@
- gdb_cris_strlen(const char *s)
- {
- const char *sc;
--
-+
- for (sc = s; *sc != '\0'; sc++)
- ;
- return (sc - s);
-@@ -534,7 +534,7 @@
- {
- const unsigned char uc = c;
- const unsigned char *su;
--
-+
- for (su = s; 0 < n; ++su, --n)
- if (*su == uc)
- return (void *)su;
-@@ -549,15 +549,15 @@
- char *s1;
- char *sd;
- int x = 0;
--
-+
- for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1)
- x = x * base + (sd - hexchars);
--
-+
- if (endptr) {
- /* Unconverted suffix is stored in endptr unless endptr is NULL. */
- *endptr = s1;
- }
--
-+
- return x;
- }
-
-@@ -629,7 +629,7 @@
- } else if (regno == PID) {
- /* 32-bit register. */
- *valptr = *(unsigned int *)((char *)®.pid);
--
-+
- } else if (regno == SRS) {
- /* 8-bit register. */
- *valptr = (unsigned int)(*(unsigned char *)((char *)®.srs));
-@@ -726,7 +726,7 @@
- *buf++ = highhex (ch);
- *buf++ = lowhex (ch);
- }
--
-+
- /* Terminate properly. */
- *buf = '\0';
- return buf;
-@@ -804,7 +804,7 @@
- continue;
-
- buffer[count] = 0;
--
-+
- if (ch == '#') {
- xmitcsum = hex(getDebugChar()) << 4;
- xmitcsum += hex(getDebugChar());
-@@ -836,7 +836,7 @@
- int checksum;
- int runlen;
- int encode;
--
-+
- do {
- char *src = buffer;
- putDebugChar('$');
-@@ -905,42 +905,42 @@
- {
- char *ptr = output_buffer;
- unsigned int reg_cont;
--
-+
- /* Send trap type (converted to signal) */
-
-- *ptr++ = 'T';
-+ *ptr++ = 'T';
- *ptr++ = highhex(sigval);
- *ptr++ = lowhex(sigval);
-
- if (((reg.exs & 0xff00) >> 8) == 0xc) {
--
-+
- /* Some kind of hardware watchpoint triggered. Find which one
- and determine its type (read/write/access). */
- int S, bp, trig_bits = 0, rw_bits = 0;
- int trig_mask = 0;
- unsigned int *bp_d_regs = &sreg.s3_3;
- /* In a lot of cases, the stopped data address will simply be EDA.
-- In some cases, we adjust it to match the watched data range.
-+ In some cases, we adjust it to match the watched data range.
- (We don't want to change the actual EDA though). */
- unsigned int stopped_data_address;
- /* The S field of EXS. */
- S = (reg.exs & 0xffff0000) >> 16;
--
-+
- if (S & 1) {
- /* Instruction watchpoint. */
- /* FIXME: Check against, and possibly adjust reported EDA. */
- } else {
- /* Data watchpoint. Find the one that triggered. */
- for (bp = 0; bp < 6; bp++) {
--
-+
- /* Dx_RD, Dx_WR in the S field of EXS for this BP. */
- int bitpos_trig = 1 + bp * 2;
- /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
- int bitpos_config = 2 + bp * 4;
--
-+
- /* Get read/write trig bits for this BP. */
- trig_bits = (S & (3 << bitpos_trig)) >> bitpos_trig;
--
-+
- /* Read/write config bits for this BP. */
- rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
- if (trig_bits) {
-@@ -949,11 +949,11 @@
- if ((rw_bits == 0x1 && trig_bits != 0x1) ||
- (rw_bits == 0x2 && trig_bits != 0x2))
- panic("Invalid r/w trigging for this BP");
--
-+
- /* Mark this BP as trigged for future reference. */
- trig_mask |= (1 << bp);
--
-- if (reg.eda >= bp_d_regs[bp * 2] &&
-+
-+ if (reg.eda >= bp_d_regs[bp * 2] &&
- reg.eda <= bp_d_regs[bp * 2 + 1]) {
- /* EDA withing range for this BP; it must be the one
- we're looking for. */
-@@ -972,7 +972,7 @@
-
- /* Read/write config bits for this BP (needed later). */
- rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
--
-+
- if (trig_mask & (1 << bp)) {
- /* EDA within 31 bytes of the configured start address? */
- if (reg.eda + 31 >= bp_d_regs[bp * 2]) {
-@@ -987,12 +987,12 @@
- }
- }
- }
--
-+
- /* No match yet? */
- BUG_ON(bp >= 6);
- /* Note that we report the type according to what the BP is configured
- for (otherwise we'd never report an 'awatch'), not according to how
-- it trigged. We did check that the trigged bits match what the BP is
-+ it trigged. We did check that the trigged bits match what the BP is
- configured for though. */
- if (rw_bits == 0x1) {
- /* read */
-@@ -1110,12 +1110,12 @@
-
- if (sigval == SIGTRAP) {
- /* Break 8, single step or hardware breakpoint exception. */
--
-+
- /* Check IDX field of EXS. */
- if (((reg.exs & 0xff00) >> 8) == 0x18) {
-
- /* Break 8. */
--
-+
- /* Static (compiled) breakpoints must return to the next instruction
- in order to avoid infinite loops (default value of ERP). Dynamic
- (gdb-invoked) must subtract the size of the break instruction from
-@@ -1132,7 +1132,7 @@
- reg.pc -= 2;
- }
- }
--
-+
- } else if (((reg.exs & 0xff00) >> 8) == 0x3) {
- /* Single step. */
- /* Don't fiddle with S1. */
-@@ -1190,10 +1190,10 @@
- unsigned int *bp_d_regs = &sreg.s3_3;
-
- /* The watchpoint allocation scheme is the simplest possible.
-- For example, if a region is watched for read and
-+ For example, if a region is watched for read and
- a write watch is requested, a new watchpoint will
- be used. Also, if a watch for a region that is already
-- covered by one or more existing watchpoints, a new
-+ covered by one or more existing watchpoints, a new
- watchpoint will be used. */
-
- /* First, find a free data watchpoint. */
-@@ -1205,13 +1205,13 @@
- break;
- }
- }
--
-+
- if (bp > 5) {
- /* We're out of watchpoints. */
- gdb_cris_strcpy(output_buffer, error_message[E04]);
- return;
- }
--
-+
- /* Configure the control register first. */
- if (type == '3' || type == '4') {
- /* Trigger on read. */
-@@ -1221,11 +1221,11 @@
- /* Trigger on write. */
- sreg.s0_3 |= (2 << (2 + bp * 4));
- }
--
-+
- /* Ugly pointer arithmetics to configure the watched range. */
- bp_d_regs[bp * 2] = addr;
- bp_d_regs[bp * 2 + 1] = (addr + len - 1);
-- }
-+ }
-
- /* Set the S1 flag to enable watchpoints. */
- reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
-@@ -1258,7 +1258,7 @@
- /* Not in use. */
- gdb_cris_strcpy(output_buffer, error_message[E04]);
- return;
-- }
-+ }
- /* Deconfigure. */
- sreg.s1_3 = 0;
- sreg.s2_3 = 0;
-@@ -1268,8 +1268,8 @@
- unsigned int *bp_d_regs = &sreg.s3_3;
- /* Try to find a watchpoint that is configured for the
- specified range, then check that read/write also matches. */
--
-- /* Ugly pointer arithmetic, since I cannot rely on a
-+
-+ /* Ugly pointer arithmetic, since I cannot rely on a
- single switch (addr) as there may be several watchpoints with
- the same start address for example. */
-
-@@ -1279,7 +1279,7 @@
- /* Matching range. */
- int bitpos = 2 + bp * 4;
- int rw_bits;
--
-+
- /* Read/write bits for this BP. */
- rw_bits = (sreg.s0_3 & (0x3 << bitpos)) >> bitpos;
-
-@@ -1347,7 +1347,7 @@
- (char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
- 16 * sizeof(unsigned int));
- break;
-- }
-+ }
- case 'G':
- /* Write registers. GXX..XX
- Each byte of register data is described by two hex digits.
-@@ -1357,11 +1357,11 @@
- hex2mem((char *)®, &input_buffer[1], sizeof(registers));
- /* Support registers. */
- hex2mem((char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
-- &input_buffer[1] + sizeof(registers),
-+ &input_buffer[1] + sizeof(registers),
- 16 * sizeof(unsigned int));
- gdb_cris_strcpy(output_buffer, "OK");
- break;
--
-+
- case 'P':
- /* Write register. Pn...=r...
- Write register n..., hex value without 0x, with value r...,
-@@ -1393,7 +1393,7 @@
- }
- }
- break;
--
-+
- case 'm':
- /* Read from memory. mAA..AA,LLLL
- AA..AA is the address and LLLL is the length.
-@@ -1416,7 +1416,7 @@
- mem2hex(output_buffer, addr, len);
- }
- break;
--
-+
- case 'X':
- /* Write to memory. XAA..AA,LLLL:XX..XX
- AA..AA is the start address, LLLL is the number of bytes, and
-@@ -1448,7 +1448,7 @@
- }
- }
- break;
--
-+
- case 'c':
- /* Continue execution. cAA..AA
- AA..AA is the address where execution is resumed. If AA..AA is
-@@ -1472,15 +1472,15 @@
- if ((sreg.s0_3 & 0x3fff) == 0) {
- reg.ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
- }
--
-+
- return;
--
-+
- case 's':
- /* Step. sAA..AA
- AA..AA is the address where execution is resumed. If AA..AA is
- omitted, resume at the present address. Success: return to the
- executing thread. Failure: will never know. */
--
-+
- if (input_buffer[1] != '\0') {
- /* FIXME: Doesn't handle address argument. */
- gdb_cris_strcpy(output_buffer, error_message[E04]);
-@@ -1497,7 +1497,7 @@
- return;
-
- case 'Z':
--
-+
- /* Insert breakpoint or watchpoint, Ztype,addr,length.
- Remote protocol says: A remote target shall return an empty string
- for an unrecognized breakpoint or watchpoint packet type. */
-@@ -1522,7 +1522,7 @@
- int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
- int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
- char type = input_buffer[1];
--
-+
- remove_watchpoint(type, addr, len);
- break;
- }
-@@ -1537,14 +1537,14 @@
- output_buffer[2] = lowhex(sigval);
- output_buffer[3] = 0;
- break;
--
-+
- case 'D':
- /* Detach from host. D
- Success: OK, and return to the executing thread.
- Failure: will never know */
- putpacket("OK");
- return;
--
-+
- case 'k':
- case 'r':
- /* kill request or reset request.
-@@ -1552,7 +1552,7 @@
- Failure: will never know. */
- kill_restart();
- break;
--
-+
- case 'C':
- case 'S':
- case '!':
-@@ -1570,7 +1570,7 @@
- and ignored (below)? */
- gdb_cris_strcpy(output_buffer, error_message[E04]);
- break;
--
-+
- default:
- /* The stub should ignore other request and send an empty
- response ($#<checksum>). This way we can extend the protocol and GDB
-@@ -1587,7 +1587,7 @@
- {
- reg_intr_vect_rw_mask intr_mask;
- reg_ser_rw_intr_mask ser_intr_mask;
--
-+
- /* Configure the kgdb serial port. */
- #if defined(CONFIG_ETRAX_KGDB_PORT0)
- /* Note: no shortcut registered (not handled by multiple_interrupt).
-@@ -1597,9 +1597,9 @@
- intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
- intr_mask.ser0 = 1;
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
--
-+
- ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
-- ser_intr_mask.data_avail = regk_ser_yes;
-+ ser_intr_mask.dav = regk_ser_yes;
- REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
- #elif defined(CONFIG_ETRAX_KGDB_PORT1)
- /* Note: no shortcut registered (not handled by multiple_interrupt).
-@@ -1609,9 +1609,9 @@
- intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
- intr_mask.ser1 = 1;
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
--
-+
- ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
-- ser_intr_mask.data_avail = regk_ser_yes;
-+ ser_intr_mask.dav = regk_ser_yes;
- REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
- #elif defined(CONFIG_ETRAX_KGDB_PORT2)
- /* Note: no shortcut registered (not handled by multiple_interrupt).
-@@ -1621,9 +1621,9 @@
- intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
- intr_mask.ser2 = 1;
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
--
-+
- ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
-- ser_intr_mask.data_avail = regk_ser_yes;
-+ ser_intr_mask.dav = regk_ser_yes;
- REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
- #elif defined(CONFIG_ETRAX_KGDB_PORT3)
- /* Note: no shortcut registered (not handled by multiple_interrupt).
-@@ -1635,7 +1635,7 @@
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
-
- ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
-- ser_intr_mask.data_avail = regk_ser_yes;
-+ ser_intr_mask.dav = regk_ser_yes;
- REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
- #endif
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb_asm.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb_asm.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb_asm.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb_asm.S 2006-10-13 14:43:13.000000000 +0200
-@@ -11,7 +11,7 @@
- .globl kgdb_handle_exception
-
- kgdb_handle_exception:
--
-+
- ;; Create a register image of the caller.
- ;;
- ;; First of all, save the ACR on the stack since we need it for address calculations.
-@@ -262,7 +262,7 @@
- ;; Nothing in S15, bank 3
- clear.d [$acr]
- addq 4, $acr
--
-+
- ;; Check what got us here: get IDX field of EXS.
- move $exs, $r10
- and.d 0xff00, $r10
-@@ -307,7 +307,7 @@
- handle_comm:
- move.d internal_stack+1020, $sp ; Use the internal stack which grows upwards
- jsr handle_exception ; Interactive routine
-- nop
-+ nop
-
- ;;
- ;; Return to the caller
-@@ -345,7 +345,7 @@
- ;; Nothing in S6 - S7, bank 0.
- addq 4, $acr
- addq 4, $acr
--
-+
- move.d [$acr], $r0
- move $r0, $s8
- addq 4, $acr
-@@ -507,7 +507,7 @@
- addq 8, $acr
-
- ;; Skip BZ, VR.
-- addq 2, $acr
-+ addq 2, $acr
-
- move [$acr], $pid ; Restore PID
- addq 4, $acr
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/pinmux.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/pinmux.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/pinmux.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/pinmux.c 2006-08-11 10:32:21.000000000 +0200
-@@ -1,7 +1,7 @@
--/*
-+/*
- * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
- * Unassigned pins and GPIO pins can be allocated to a fixed interface
-- * or the I/O processor instead.
-+ * or the I/O processor instead.
- *
- * Copyright (c) 2004 Axis Communications AB.
- */
-@@ -33,9 +33,10 @@
-
- if (!initialized) {
- reg_pinmux_rw_pa pa = REG_RD(pinmux, regi_pinmux, rw_pa);
-+ REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0);
- initialized = 1;
-- pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
-- pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
-+ pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
-+ pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
- REG_WR(pinmux, regi_pinmux, rw_pa, pa);
- crisv32_pinmux_alloc(PORT_B, 0, PORT_PINS - 1, pinmux_gpio);
- crisv32_pinmux_alloc(PORT_C, 0, PORT_PINS - 1, pinmux_gpio);
-@@ -46,124 +47,137 @@
- return 0;
- }
-
--int
--crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
-+/*
-+ * must be called with the pinmux_lock held.
-+ */
-+static int __crisv32_pinmux_alloc(int port, int first_pin, int last_pin,
-+ enum pin_mode mode)
- {
- int i;
-- unsigned long flags;
-
-- crisv32_pinmux_init();
--
-- if (port > PORTS)
-+ if (port >= PORTS ||
-+ first_pin < 0 || last_pin >= PORT_PINS || last_pin < first_pin)
- return -EINVAL;
--
-- spin_lock_irqsave(&pinmux_lock, flags);
--
-- for (i = first_pin; i <= last_pin; i++)
-+
-+ for (i = first_pin; i <= last_pin; i++)
- {
-- if ((pins[port][i] != pinmux_none) && (pins[port][i] != pinmux_gpio) &&
-- (pins[port][i] != mode))
-+ if ((pins[port][i] != pinmux_none)
-+ && (pins[port][i] != pinmux_gpio)
-+ && (pins[port][i] != mode))
- {
-- spin_unlock_irqrestore(&pinmux_lock, flags);
- #ifdef DEBUG
- panic("Pinmux alloc failed!\n");
- #endif
- return -EPERM;
- }
- }
--
-+
- for (i = first_pin; i <= last_pin; i++)
- pins[port][i] = mode;
-
- crisv32_pinmux_set(port);
--
-- spin_unlock_irqrestore(&pinmux_lock, flags);
--
- return 0;
- }
-
- int
-+crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
-+{
-+ int r;
-+ unsigned long flags;
-+
-+ crisv32_pinmux_init();
-+
-+ spin_lock_irqsave(&pinmux_lock, flags);
-+ r = __crisv32_pinmux_alloc(port, first_pin, last_pin, mode);
-+ spin_unlock_irqrestore(&pinmux_lock, flags);
-+ return r;
-+}
-+
-+int
- crisv32_pinmux_alloc_fixed(enum fixed_function function)
- {
- int ret = -EINVAL;
- char saved[sizeof pins];
- unsigned long flags;
--
-+ reg_pinmux_rw_hwprot hwprot;
-+
-+ crisv32_pinmux_init();
-+
- spin_lock_irqsave(&pinmux_lock, flags);
-
- /* Save internal data for recovery */
- memcpy(saved, pins, sizeof pins);
--
-- reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
--
-+
-+ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
-+
- switch(function)
- {
- case pinmux_ser1:
-- ret = crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
- hwprot.ser1 = regk_pinmux_yes;
- break;
- case pinmux_ser2:
-- ret = crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
- hwprot.ser2 = regk_pinmux_yes;
- break;
- case pinmux_ser3:
-- ret = crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
- hwprot.ser3 = regk_pinmux_yes;
- break;
- case pinmux_sser0:
-- ret = crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
- hwprot.sser0 = regk_pinmux_yes;
- break;
- case pinmux_sser1:
-- ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
- hwprot.sser1 = regk_pinmux_yes;
- break;
- case pinmux_ata0:
-- ret = crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
- hwprot.ata0 = regk_pinmux_yes;
- break;
- case pinmux_ata1:
-- ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
- hwprot.ata1 = regk_pinmux_yes;
- break;
- case pinmux_ata2:
-- ret = crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
- hwprot.ata2 = regk_pinmux_yes;
- break;
- case pinmux_ata3:
-- ret = crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
- hwprot.ata2 = regk_pinmux_yes;
- break;
- case pinmux_ata:
-- ret = crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
-- ret |= crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
-+ ret |= __crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
- hwprot.ata = regk_pinmux_yes;
- break;
- case pinmux_eth1:
-- ret = crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
- hwprot.eth1 = regk_pinmux_yes;
- hwprot.eth1_mgm = regk_pinmux_yes;
- break;
- case pinmux_timer:
-- ret = crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
-+ ret = __crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
- hwprot.timer = regk_pinmux_yes;
- spin_unlock_irqrestore(&pinmux_lock, flags);
- return ret;
- }
--
-+
- if (!ret)
- REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
- else
- memcpy(pins, saved, sizeof pins);
--
-- spin_unlock_irqrestore(&pinmux_lock, flags);
--
-- return ret;
-+
-+ spin_unlock_irqrestore(&pinmux_lock, flags);
-+
-+ return ret;
- }
-
- void
-@@ -189,33 +203,126 @@
- #endif
- }
-
--int
--crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
-+/*
-+ * must be called with the pinmux_lock held.
-+ */
-+static int __crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
- {
- int i;
-+
-+ if (port > PORTS)
-+ return -EINVAL;
-+
-+ for (i = first_pin; i <= last_pin; i++)
-+ pins[port][i] = pinmux_none;
-+
-+ crisv32_pinmux_set(port);
-+
-+ return 0;
-+}
-+
-+int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
-+{
-+ int r;
- unsigned long flags;
-
- crisv32_pinmux_init();
-+
-+ spin_lock_irqsave(&pinmux_lock, flags);
-+ r = __crisv32_pinmux_dealloc(port, first_pin, last_pin);
-+ spin_unlock_irqrestore(&pinmux_lock, flags);
-+ return r;
-+}
-
-- if (port > PORTS)
-- return -EINVAL;
-+int
-+crisv32_pinmux_dealloc_fixed(enum fixed_function function)
-+{
-+ int ret = -EINVAL;
-+ char saved[sizeof pins];
-+ unsigned long flags;
-
- spin_lock_irqsave(&pinmux_lock, flags);
-
-- for (i = first_pin; i <= last_pin; i++)
-- pins[port][i] = pinmux_none;
-+ /* Save internal data for recovery */
-+ memcpy(saved, pins, sizeof pins);
-+
-+ reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
-+
-+ switch(function)
-+ {
-+ case pinmux_ser1:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 4, 7);
-+ hwprot.ser1 = regk_pinmux_no;
-+ break;
-+ case pinmux_ser2:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 8, 11);
-+ hwprot.ser2 = regk_pinmux_no;
-+ break;
-+ case pinmux_ser3:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 12, 15);
-+ hwprot.ser3 = regk_pinmux_no;
-+ break;
-+ case pinmux_sser0:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 0, 3);
-+ ret |= __crisv32_pinmux_dealloc(PORT_C, 16, 16);
-+ hwprot.sser0 = regk_pinmux_no;
-+ break;
-+ case pinmux_sser1:
-+ ret = __crisv32_pinmux_dealloc(PORT_D, 0, 4);
-+ hwprot.sser1 = regk_pinmux_no;
-+ break;
-+ case pinmux_ata0:
-+ ret = __crisv32_pinmux_dealloc(PORT_D, 5, 7);
-+ ret |= __crisv32_pinmux_dealloc(PORT_D, 15, 17);
-+ hwprot.ata0 = regk_pinmux_no;
-+ break;
-+ case pinmux_ata1:
-+ ret = __crisv32_pinmux_dealloc(PORT_D, 0, 4);
-+ ret |= __crisv32_pinmux_dealloc(PORT_E, 17, 17);
-+ hwprot.ata1 = regk_pinmux_no;
-+ break;
-+ case pinmux_ata2:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 11, 15);
-+ ret |= __crisv32_pinmux_dealloc(PORT_E, 3, 3);
-+ hwprot.ata2 = regk_pinmux_no;
-+ break;
-+ case pinmux_ata3:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 8, 10);
-+ ret |= __crisv32_pinmux_dealloc(PORT_C, 0, 2);
-+ hwprot.ata2 = regk_pinmux_no;
-+ break;
-+ case pinmux_ata:
-+ ret = __crisv32_pinmux_dealloc(PORT_B, 0, 15);
-+ ret |= __crisv32_pinmux_dealloc(PORT_D, 8, 15);
-+ hwprot.ata = regk_pinmux_no;
-+ break;
-+ case pinmux_eth1:
-+ ret = __crisv32_pinmux_dealloc(PORT_E, 0, 17);
-+ hwprot.eth1 = regk_pinmux_no;
-+ hwprot.eth1_mgm = regk_pinmux_no;
-+ break;
-+ case pinmux_timer:
-+ ret = __crisv32_pinmux_dealloc(PORT_C, 16, 16);
-+ hwprot.timer = regk_pinmux_no;
-+ spin_unlock_irqrestore(&pinmux_lock, flags);
-+ return ret;
-+ }
-+
-+ if (!ret)
-+ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
-+ else
-+ memcpy(pins, saved, sizeof pins);
-
-- crisv32_pinmux_set(port);
- spin_unlock_irqrestore(&pinmux_lock, flags);
--
-- return 0;
-+
-+ return ret;
- }
-
- void
- crisv32_pinmux_dump(void)
- {
- int i, j;
--
-+
- crisv32_pinmux_init();
-
- for (i = 0; i < PORTS; i++)
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/process.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/process.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/process.c 2006-10-13 14:43:13.000000000 +0200
-@@ -74,9 +74,9 @@
- #else
- {
- reg_timer_rw_wd_ctrl wd_ctrl = {0};
--
-+
- stop_watchdog();
--
-+
- wd_ctrl.key = 16; /* Arbitrary key. */
- wd_ctrl.cnt = 1; /* Minimum time. */
- wd_ctrl.cmd = regk_timer_start;
-@@ -141,7 +141,7 @@
- {
- struct pt_regs *childregs;
- struct switch_stack *swstack;
--
-+
- /*
- * Put the pt_regs structure at the end of the new kernel stack page and
- * fix it up. Note: the task_struct doubles as the kernel stack for the
-@@ -152,7 +152,7 @@
- p->set_child_tid = p->clear_child_tid = NULL;
- childregs->r10 = 0; /* Child returns 0 after a fork/clone. */
-
-- /* Set a new TLS ?
-+ /* Set a new TLS ?
- * The TLS is in $mof beacuse it is the 5th argument to sys_clone.
- */
- if (p->mm && (clone_flags & CLONE_SETTLS)) {
-@@ -165,20 +165,20 @@
- /* Paramater to ret_from_sys_call. 0 is don't restart the syscall. */
- swstack->r9 = 0;
-
-- /*
-+ /*
- * We want to return into ret_from_sys_call after the _resume.
- * ret_from_fork will call ret_from_sys_call.
- */
- swstack->return_ip = (unsigned long) ret_from_fork;
--
-+
- /* Fix the user-mode and kernel-mode stackpointer. */
-- p->thread.usp = usp;
-+ p->thread.usp = usp;
- p->thread.ksp = (unsigned long) swstack;
-
- return 0;
- }
-
--/*
-+/*
- * Be aware of the "magic" 7th argument in the four system-calls below.
- * They need the latest stackframe, which is put as the 7th argument by
- * entry.S. The previous arguments are dummies or actually used, but need
-@@ -200,7 +200,7 @@
-
- /* FIXME: Is parent_tid/child_tid really third/fourth argument? Update lib? */
- asmlinkage int
--sys_clone(unsigned long newusp, unsigned long flags, int *parent_tid, int *child_tid,
-+sys_clone(unsigned long newusp, unsigned long flags, int *parent_tid, int *child_tid,
- unsigned long tls, long srp, struct pt_regs *regs)
- {
- if (!newusp)
-@@ -209,11 +209,11 @@
- return do_fork(flags, newusp, regs, 0, parent_tid, child_tid);
- }
-
--/*
-+/*
- * vfork is a system call in i386 because of register-pressure - maybe
- * we can remove it and handle it in libc but we put it here until then.
- */
--asmlinkage int
-+asmlinkage int
- sys_vfork(long r10, long r11, long r12, long r13, long mof, long srp,
- struct pt_regs *regs)
- {
-@@ -222,7 +222,7 @@
-
- /* sys_execve() executes a new program. */
- asmlinkage int
--sys_execve(const char *fname, char **argv, char **envp, long r13, long mof, long srp,
-+sys_execve(const char *fname, char **argv, char **envp, long r13, long mof, long srp,
- struct pt_regs *regs)
- {
- int error;
-@@ -254,13 +254,13 @@
- unsigned long usp = rdusp();
- printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
- regs->erp, regs->srp, regs->ccs, usp, regs->mof);
--
-+
- printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
- regs->r0, regs->r1, regs->r2, regs->r3);
--
-+
- printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
- regs->r4, regs->r5, regs->r6, regs->r7);
--
-+
- printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
- regs->r8, regs->r9, regs->r10, regs->r11);
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/ptrace.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/ptrace.c 2006-03-22 10:56:56.000000000 +0100
-@@ -20,7 +20,7 @@
- #include <asm/processor.h>
- #include <asm/arch/hwregs/supp_reg.h>
-
--/*
-+/*
- * Determines which bits in CCS the user has access to.
- * 1 = access, 0 = no access.
- */
-@@ -84,7 +84,7 @@
- *
- * Make sure the single step bit is not set.
- */
--void
-+void
- ptrace_disable(struct task_struct *child)
- {
- unsigned long tmp;
-@@ -105,7 +105,7 @@
- unsigned long __user *datap = (unsigned long __user *)data;
-
- switch (request) {
-- /* Read word at location address. */
-+ /* Read word at location address. */
- case PTRACE_PEEKTEXT:
- case PTRACE_PEEKDATA: {
- unsigned long tmp;
-@@ -122,11 +122,11 @@
- tmp = *(unsigned long*)addr;
- } else {
- copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
--
-+
- if (copied != sizeof(tmp))
- break;
- }
--
-+
- ret = put_user(tmp,datap);
- break;
- }
-@@ -143,18 +143,18 @@
- ret = put_user(tmp, datap);
- break;
- }
--
-+
- /* Write the word at location address. */
- case PTRACE_POKETEXT:
- case PTRACE_POKEDATA:
- ret = 0;
--
-+
- if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
- break;
--
-+
- ret = -EIO;
- break;
--
-+
- /* Write the word at location address in the USER area. */
- case PTRACE_POKEUSR:
- ret = -EIO;
-@@ -178,10 +178,10 @@
- case PTRACE_SYSCALL:
- case PTRACE_CONT:
- ret = -EIO;
--
-+
- if (!valid_signal(data))
- break;
--
-+
- /* Continue means no single-step. */
- put_reg(child, PT_SPC, 0);
-
-@@ -198,27 +198,27 @@
- else {
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
- }
--
-+
- child->exit_code = data;
--
-+
- /* TODO: make sure any pending breakpoint is killed */
- wake_up_process(child);
- ret = 0;
--
-+
- break;
--
-+
- /* Make the child exit by sending it a sigkill. */
- case PTRACE_KILL:
- ret = 0;
--
-+
- if (child->exit_state == EXIT_ZOMBIE)
- break;
--
-+
- child->exit_code = SIGKILL;
--
-+
- /* Deconfigure single-step and h/w bp. */
- ptrace_disable(child);
--
-+
- /* TODO: make sure any pending breakpoint is killed */
- wake_up_process(child);
- break;
-@@ -227,7 +227,7 @@
- case PTRACE_SINGLESTEP: {
- unsigned long tmp;
- ret = -EIO;
--
-+
- /* Set up SPC if not set already (in which case we have
- no other choice but to trust it). */
- if (!get_reg(child, PT_SPC)) {
-@@ -240,7 +240,7 @@
-
- if (!valid_signal(data))
- break;
--
-+
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
- /* TODO: set some clever breakpoint mechanism... */
-@@ -259,15 +259,15 @@
- case PTRACE_GETREGS: {
- int i;
- unsigned long tmp;
--
-+
- for (i = 0; i <= PT_MAX; i++) {
- tmp = get_reg(child, i);
--
-+
- if (put_user(tmp, datap)) {
- ret = -EFAULT;
- goto out_tsk;
- }
--
-+
- datap++;
- }
-
-@@ -279,22 +279,22 @@
- case PTRACE_SETREGS: {
- int i;
- unsigned long tmp;
--
-+
- for (i = 0; i <= PT_MAX; i++) {
- if (get_user(tmp, datap)) {
- ret = -EFAULT;
- goto out_tsk;
- }
--
-+
- if (i == PT_CCS) {
- tmp &= CCS_MASK;
- tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
- }
--
-+
- put_reg(child, i, tmp);
- datap++;
- }
--
-+
- ret = 0;
- break;
- }
-@@ -304,6 +304,7 @@
- break;
- }
-
-+out_tsk:
- return ret;
- }
-
-@@ -311,15 +312,15 @@
- {
- if (!test_thread_flag(TIF_SYSCALL_TRACE))
- return;
--
-+
- if (!(current->ptrace & PT_PTRACED))
- return;
--
-+
- /* the 0x80 provides a way for the tracing parent to distinguish
- between a syscall stop and SIGTRAP delivery */
- ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
- ? 0x80 : 0));
--
-+
- /*
- * This isn't the same as continuing with a signal, but it will do for
- * normal use.
-@@ -338,7 +339,7 @@
- int copied;
- int opsize = 0;
-
-- /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
-+ /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
- copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
- if (copied != sizeof(opcode))
- return 0;
-@@ -361,7 +362,7 @@
- opsize = 6;
- break;
- default:
-- panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
-+ panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
- opcode, pc);
- }
-
-@@ -378,7 +379,7 @@
- /* Delay slot bit set. Report as stopped on proper
- instruction. */
- if (spc) {
-- /* Rely on SPC if set. FIXME: We might want to check
-+ /* Rely on SPC if set. FIXME: We might want to check
- that EXS indicates we stopped due to a single-step
- exception. */
- pc = spc;
-@@ -422,7 +423,7 @@
- register int old_srs;
-
- #ifdef CONFIG_ETRAX_KGDB
-- /* Ignore write, but pretend it was ok if value is 0
-+ /* Ignore write, but pretend it was ok if value is 0
- (we don't want POKEUSR/SETREGS failing unnessecarily). */
- return (data == 0) ? ret : -1;
- #endif
-@@ -431,7 +432,7 @@
- if (!bp_owner)
- bp_owner = pid;
- else if (bp_owner != pid) {
-- /* Ignore write, but pretend it was ok if value is 0
-+ /* Ignore write, but pretend it was ok if value is 0
- (we don't want POKEUSR/SETREGS failing unnessecarily). */
- return (data == 0) ? ret : -1;
- }
-@@ -440,7 +441,7 @@
- SPEC_REG_RD(SPEC_REG_SRS, old_srs);
- /* Switch to BP bank. */
- SUPP_BANK_SEL(BANK_BP);
--
-+
- switch (regno - PT_BP) {
- case 0:
- SUPP_REG_WR(0, data); break;
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/setup.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/setup.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/setup.c 2006-10-13 14:43:13.000000000 +0200
-@@ -40,12 +40,12 @@
-
- {"ETRAX 100LX", 10, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
- | HAS_MMU | HAS_MMU_BUG},
--
-+
- {"ETRAX 100LX v2", 11, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
- | HAS_MMU},
--
-+
- {"ETRAX FS", 32, 32, HAS_ETHERNET100 | HAS_ATA | HAS_MMU},
--
-+
- {"Unknown", 0, 0, 0}
- };
-
-@@ -67,7 +67,7 @@
- #endif
-
- revision = rdvr();
--
-+
- for (i = 0; i < entries; i++) {
- if (cpinfo[i].rev == revision) {
- info = &cpinfo[i];
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/signal.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/signal.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/signal.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/signal.c 2006-03-22 10:56:56.000000000 +0100
-@@ -50,7 +50,7 @@
- unsigned char retcode[8]; /* Trampoline code. */
- };
-
--int do_signal(int restart, sigset_t *oldset, struct pt_regs *regs);
-+void do_signal(int restart, struct pt_regs *regs);
- void keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
- struct pt_regs *regs);
- /*
-@@ -61,74 +61,16 @@
- sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
- long srp, struct pt_regs *regs)
- {
-- sigset_t saveset;
--
- mask &= _BLOCKABLE;
--
- spin_lock_irq(¤t->sighand->siglock);
--
-- saveset = current->blocked;
--
-+ current->saved_sigmask = current->blocked;
- siginitset(¤t->blocked, mask);
--
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
--
-- regs->r10 = -EINTR;
--
-- while (1) {
-- current->state = TASK_INTERRUPTIBLE;
-- schedule();
--
-- if (do_signal(0, &saveset, regs)) {
-- /*
-- * This point is reached twice: once to call
-- * the signal handler, then again to return
-- * from the sigsuspend system call. When
-- * calling the signal handler, R10 hold the
-- * signal number as set by do_signal(). The
-- * sigsuspend call will always return with
-- * the restored value above; -EINTR.
-- */
-- return regs->r10;
-- }
-- }
--}
--
--/* Define some dummy arguments to be able to reach the regs argument. */
--int
--sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
-- long mof, long srp, struct pt_regs *regs)
--{
-- sigset_t saveset;
-- sigset_t newset;
--
-- if (sigsetsize != sizeof(sigset_t))
-- return -EINVAL;
--
-- if (copy_from_user(&newset, unewset, sizeof(newset)))
-- return -EFAULT;
--
-- sigdelsetmask(&newset, ~_BLOCKABLE);
-- spin_lock_irq(¤t->sighand->siglock);
--
-- saveset = current->blocked;
-- current->blocked = newset;
--
-- recalc_sigpending();
-- spin_unlock_irq(¤t->sighand->siglock);
--
-- regs->r10 = -EINTR;
--
-- while (1) {
-- current->state = TASK_INTERRUPTIBLE;
-- schedule();
--
-- if (do_signal(0, &saveset, regs)) {
-- /* See comment in function above. */
-- return regs->r10;
-- }
-- }
-+ current->state = TASK_INTERRUPTIBLE;
-+ schedule();
-+ set_thread_flag(TIF_RESTORE_SIGMASK);
-+ return -ERESTARTNOHAND;
- }
-
- int
-@@ -263,7 +205,7 @@
- unsigned long oldccs = regs->ccs;
-
- frame = (struct rt_signal_frame *) rdusp();
--
-+
- /*
- * Since the signal is stacked on a dword boundary, the frame
- * should be dword aligned here as well. It it's not, then the
-@@ -285,7 +227,7 @@
-
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
--
-+
- if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
- goto badframe;
-
-@@ -311,7 +253,7 @@
-
- err = 0;
- usp = rdusp();
--
-+
- /*
- * Copy the registers. They are located first in sc, so it's
- * possible to use sc directly.
-@@ -351,7 +293,7 @@
- * which performs the syscall sigreturn(), or a provided user-mode
- * trampoline.
- */
--static void
-+static int
- setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
- struct pt_regs * regs)
- {
-@@ -388,7 +330,7 @@
- /* Trampoline - the desired return ip is in the signal return page. */
- return_ip = cris_signal_return_page;
-
-- /*
-+ /*
- * This is movu.w __NR_sigreturn, r9; break 13;
- *
- * WE DO NOT USE IT ANY MORE! It's only left here for historical
-@@ -402,7 +344,7 @@
-
- if (err)
- goto give_sigsegv;
--
-+
- /*
- * Set up registers for signal handler.
- *
-@@ -417,16 +359,17 @@
- /* Actually move the USP to reflect the stacked frame. */
- wrusp((unsigned long)frame);
-
-- return;
-+ return 0;
-
- give_sigsegv:
- if (sig == SIGSEGV)
- ka->sa.sa_handler = SIG_DFL;
--
-+
- force_sig(SIGSEGV, current);
-+ return -EFAULT;
- }
-
--static void
-+static int
- setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
- sigset_t *set, struct pt_regs * regs)
- {
-@@ -441,11 +384,11 @@
- goto give_sigsegv;
-
- /* TODO: what is the current->exec_domain stuff and invmap ? */
--
-+
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
- err |= copy_siginfo_to_user(&frame->info, info);
--
-+
- if (err)
- goto give_sigsegv;
-
-@@ -467,7 +410,7 @@
- /* Trampoline - the desired return ip is in the signal return page. */
- return_ip = cris_signal_return_page + 6;
-
-- /*
-+ /*
- * This is movu.w __NR_rt_sigreturn, r9; break 13;
- *
- * WE DO NOT USE IT ANY MORE! It's only left here for historical
-@@ -478,7 +421,7 @@
-
- err |= __put_user(__NR_rt_sigreturn,
- (short __user*)(frame->retcode+2));
--
-+
- err |= __put_user(0xe93d, (short __user*)(frame->retcode+4));
- }
-
-@@ -503,21 +446,24 @@
- /* Actually move the usp to reflect the stacked frame. */
- wrusp((unsigned long)frame);
-
-- return;
-+ return 0;
-
- give_sigsegv:
- if (sig == SIGSEGV)
- ka->sa.sa_handler = SIG_DFL;
--
-+
- force_sig(SIGSEGV, current);
-+ return -EFAULT;
- }
-
- /* Invoke a singal handler to, well, handle the signal. */
--static inline void
-+static inline int
- handle_signal(int canrestart, unsigned long sig,
- siginfo_t *info, struct k_sigaction *ka,
- sigset_t *oldset, struct pt_regs * regs)
- {
-+ int ret;
-+
- /* Check if this got called from a system call. */
- if (canrestart) {
- /* If so, check system call restarting. */
-@@ -561,19 +507,23 @@
-
- /* Set up the stack frame. */
- if (ka->sa.sa_flags & SA_SIGINFO)
-- setup_rt_frame(sig, ka, info, oldset, regs);
-+ ret = setup_rt_frame(sig, ka, info, oldset, regs);
- else
-- setup_frame(sig, ka, oldset, regs);
-+ ret = setup_frame(sig, ka, oldset, regs);
-
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
-
-- spin_lock_irq(¤t->sighand->siglock);
-- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
-- if (!(ka->sa.sa_flags & SA_NODEFER))
-- sigaddset(¤t->blocked,sig);
-- recalc_sigpending();
-- spin_unlock_irq(¤t->sighand->siglock);
-+ if (ret == 0) {
-+ spin_lock_irq(¤t->sighand->siglock);
-+ sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
-+ if (!(ka->sa.sa_flags & SA_NODEFER))
-+ sigaddset(¤t->blocked,sig);
-+ recalc_sigpending();
-+ spin_unlock_irq(¤t->sighand->siglock);
-+ }
-+
-+ return ret;
- }
-
- /*
-@@ -587,12 +537,13 @@
- * we can use user_mode(regs) to see if we came directly from kernel or user
- * mode below.
- */
--int
--do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
-+void
-+do_signal(int canrestart, struct pt_regs *regs)
- {
- int signr;
- siginfo_t info;
- struct k_sigaction ka;
-+ sigset_t *oldset;
-
- /*
- * The common case should go fast, which is why this point is
-@@ -600,17 +551,27 @@
- * without doing anything.
- */
- if (!user_mode(regs))
-- return 1;
-+ return;
-
-- if (!oldset)
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
-+ oldset = ¤t->saved_sigmask;
-+ else
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
--
-+
- if (signr > 0) {
-- /* Deliver the signal. */
-- handle_signal(canrestart, signr, &info, &ka, oldset, regs);
-- return 1;
-+ /* Whee! Actually deliver the signal. */
-+ if (handle_signal(canrestart, signr, &info, &ka, oldset, regs)) {
-+ /* a signal was successfully delivered; the saved
-+ * sigmask will have been stored in the signal frame,
-+ * and will be restored by sigreturn, so we can simply
-+ * clear the TIF_RESTORE_SIGMASK flag */
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
-+ clear_thread_flag(TIF_RESTORE_SIGMASK);
-+ }
-+
-+ return;
- }
-
- /* Got here from a system call? */
-@@ -621,14 +582,19 @@
- regs->r10 == -ERESTARTNOINTR) {
- RESTART_CRIS_SYS(regs);
- }
--
-+
- if (regs->r10 == -ERESTART_RESTARTBLOCK){
- regs->r10 = __NR_restart_syscall;
- regs->erp -= 2;
- }
- }
--
-- return 0;
-+
-+ /* if there's no signal to deliver, we just put the saved sigmask
-+ * back */
-+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
-+ clear_thread_flag(TIF_RESTORE_SIGMASK);
-+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
-+ }
- }
-
- asmlinkage void
-@@ -651,7 +617,7 @@
- sys_kill(ti->task->pid, sig);
- }
-
--void
-+void
- keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
- struct pt_regs *regs)
- {
-@@ -666,7 +632,7 @@
- regs->ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
- /* Assume the SPC is valid and interesting. */
- regs->spc = oldspc;
--
-+
- } else if (oldccs & (1 << (S_CCS_BITNR + CCS_SHIFT))) {
- /* If a h/w bp was set in the signal handler we need
- to keep the S flag. */
-@@ -679,7 +645,7 @@
- have forgotten all about it. */
- regs->spc = 0;
- regs->ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
-- }
-+ }
- }
-
- /* Set up the trampolines on the signal return page. */
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/smp.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/smp.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/smp.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/smp.c 2007-01-09 10:29:19.000000000 +0100
-@@ -20,6 +20,7 @@
- #define IPI_SCHEDULE 1
- #define IPI_CALL 2
- #define IPI_FLUSH_TLB 4
-+#define IPI_BOOT 8
-
- #define FLUSH_ALL (void*)0xffffffff
-
-@@ -30,6 +31,8 @@
- cpumask_t cpu_online_map = CPU_MASK_NONE;
- EXPORT_SYMBOL(cpu_online_map);
- cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
-+cpumask_t cpu_possible_map;
-+EXPORT_SYMBOL(cpu_possible_map);
- EXPORT_SYMBOL(phys_cpu_present_map);
-
- /* Variables used during SMP boot */
-@@ -55,7 +58,7 @@
- extern int setup_irq(int, struct irqaction *);
-
- /* Mode registers */
--static unsigned long irq_regs[NR_CPUS] =
-+static unsigned long irq_regs[NR_CPUS] =
- {
- regi_irq,
- regi_irq2
-@@ -97,6 +100,7 @@
-
- cpu_set(0, cpu_online_map);
- cpu_set(0, phys_cpu_present_map);
-+ cpu_set(0, cpu_possible_map);
- }
-
- void __init smp_cpus_done(unsigned int max_cpus)
-@@ -109,6 +113,7 @@
- {
- unsigned timeout;
- struct task_struct *idle;
-+ cpumask_t cpu_mask = CPU_MASK_NONE;
-
- idle = fork_idle(cpuid);
- if (IS_ERR(idle))
-@@ -120,6 +125,12 @@
- smp_init_current_idle_thread = task_thread_info(idle);
- cpu_now_booting = cpuid;
-
-+ /* Kick it */
-+ cpu_set(cpuid, cpu_online_map);
-+ cpu_set(cpuid, cpu_mask);
-+ send_ipi(IPI_BOOT, 0, cpu_mask);
-+ cpu_clear(cpuid, cpu_online_map);
-+
- /* Wait for CPU to come online */
- for (timeout = 0; timeout < 10000; timeout++) {
- if(cpu_online(cpuid)) {
-@@ -142,7 +153,7 @@
- * specific stuff such as the local timer and the MMU. */
- void __init smp_callin(void)
- {
-- extern void cpu_idle(void);
-+ extern void cpu_idle(void);
-
- int cpu = cpu_now_booting;
- reg_intr_vect_rw_mask vect_mask = {0};
-@@ -190,8 +201,8 @@
-
- /* cache_decay_ticks is used by the scheduler to decide if a process
- * is "hot" on one CPU. A higher value means a higher penalty to move
-- * a process to another CPU. Our cache is rather small so we report
-- * 1 tick.
-+ * a process to another CPU. Our cache is rather small so we report
-+ * 1 tick.
- */
- unsigned long cache_decay_ticks = 1;
-
-@@ -205,14 +216,14 @@
- {
- cpumask_t cpu_mask = CPU_MASK_NONE;
- cpu_set(cpu, cpu_mask);
-- send_ipi(IPI_SCHEDULE, 0, cpu_mask);
-+ send_ipi(IPI_SCHEDULE, 0, cpu_mask);
- }
-
- /* TLB flushing
- *
- * Flush needs to be done on the local CPU and on any other CPU that
- * may have the same mapping. The mm->cpu_vm_mask is used to keep track
-- * of which CPUs that a specific process has been executed on.
-+ * of which CPUs that a specific process has been executed on.
- */
- void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
- {
-@@ -244,7 +255,7 @@
- cpu_set(smp_processor_id(), mm->cpu_vm_mask);
- }
-
--void flush_tlb_page(struct vm_area_struct *vma,
-+void flush_tlb_page(struct vm_area_struct *vma,
- unsigned long addr)
- {
- __flush_tlb_page(vma, addr);
-@@ -252,8 +263,8 @@
- }
-
- /* Inter processor interrupts
-- *
-- * The IPIs are used for:
-+ *
-+ * The IPIs are used for:
- * * Force a schedule on a CPU
- * * FLush TLB on other CPUs
- * * Call a function on other CPUs
-@@ -341,7 +352,7 @@
- else if (flush_vma == FLUSH_ALL)
- __flush_tlb_mm(flush_mm);
- else
-- __flush_tlb_page(flush_vma, flush_addr);
-+ __flush_tlb_page(flush_vma, flush_addr);
- }
-
- ipi.vector = 0;
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/time.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/time.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/time.c 2007-01-09 10:29:19.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: time.c,v 1.19 2005/04/29 05:40:09 starvik Exp $
-+/* $Id: time.c,v 1.25 2007/01/09 09:29:19 starvik Exp $
- *
- * linux/arch/cris/arch-v32/kernel/time.c
- *
-@@ -14,12 +14,14 @@
- #include <linux/sched.h>
- #include <linux/init.h>
- #include <linux/threads.h>
-+#include <linux/cpufreq.h>
- #include <asm/types.h>
- #include <asm/signal.h>
- #include <asm/io.h>
- #include <asm/delay.h>
- #include <asm/rtc.h>
- #include <asm/irq.h>
-+#include <asm/irq_regs.h>
-
- #include <asm/arch/hwregs/reg_map.h>
- #include <asm/arch/hwregs/reg_rdwr.h>
-@@ -31,7 +33,7 @@
- #define ETRAX_WD_HZ 763 /* watchdog counts at 763 Hz */
- #define ETRAX_WD_CNT ((2*ETRAX_WD_HZ)/HZ + 1) /* Number of 763 counts before watchdog bites */
-
--unsigned long timer_regs[NR_CPUS] =
-+unsigned long timer_regs[NR_CPUS] =
- {
- regi_timer,
- #ifdef CONFIG_SMP
-@@ -44,6 +46,15 @@
- extern int setup_irq(int, struct irqaction *);
- extern int have_rtc;
-
-+#ifdef CONFIG_CPU_FREQ
-+static int
-+cris_time_freq_notifier(struct notifier_block *nb, unsigned long val, void *data);
-+
-+static struct notifier_block cris_time_freq_notifier_block = {
-+ .notifier_call = cris_time_freq_notifier
-+};
-+#endif
-+
- unsigned long get_ns_in_jiffie(void)
- {
- reg_timer_r_tmr0_data data;
-@@ -63,7 +74,7 @@
- static unsigned long jiffies_p = 0;
-
- /*
-- * cache volatile jiffies temporarily; we have IRQs turned off.
-+ * cache volatile jiffies temporarily; we have IRQs turned off.
- */
- unsigned long jiffies_t;
-
-@@ -82,7 +93,7 @@
- */
- if( jiffies_t == jiffies_p ) {
- if( count > count_p ) {
-- /* Timer wrapped, use new count and prescale
-+ /* Timer wrapped, use new count and prescale
- * increase the time corresponding to one jiffie
- */
- usec_count = 1000000/HZ;
-@@ -101,7 +112,7 @@
- * The watchdog timer is an 8-bit timer with a configurable start value.
- * Once started the whatchdog counts downwards with a frequency of 763 Hz
- * (100/131072 MHz). When the watchdog counts down to 1, it generates an
-- * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
-+ * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
- * chip.
- */
- /* This gives us 1.3 ms to do something useful when the NMI comes */
-@@ -124,7 +135,7 @@
- {
- #if defined(CONFIG_ETRAX_WATCHDOG)
- reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
--
-+
- /* only keep watchdog happy as long as we have memory left! */
- if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
- /* reset the watchdog with the inverse of the old key */
-@@ -139,7 +150,7 @@
-
- /* stop the watchdog - we still need the correct key */
-
--void
-+void
- stop_watchdog(void)
- {
- #if defined(CONFIG_ETRAX_WATCHDOG)
-@@ -149,7 +160,7 @@
- wd_ctrl.cmd = regk_timer_stop;
- wd_ctrl.key = watchdog_key;
- REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl);
--#endif
-+#endif
- }
-
- extern void show_registers(struct pt_regs *regs);
-@@ -160,7 +171,8 @@
- #if defined(CONFIG_ETRAX_WATCHDOG)
- extern int cause_of_death;
-
-- raw_printk("Watchdog bite\n");
-+ oops_in_progress = 1;
-+ printk("Watchdog bite\n");
-
- /* Check if forced restart or unexpected watchdog */
- if (cause_of_death == 0xbedead) {
-@@ -169,8 +181,9 @@
-
- /* Unexpected watchdog, stop the watchdog and dump registers*/
- stop_watchdog();
-- raw_printk("Oops: bitten by watchdog\n");
-- show_registers(regs);
-+ printk("Oops: bitten by watchdog\n");
-+ show_registers(regs);
-+ oops_in_progress = 0;
- #ifndef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
- reset_watchdog();
- #endif
-@@ -191,8 +204,9 @@
- extern void cris_do_profile(struct pt_regs *regs);
-
- static inline irqreturn_t
--timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+timer_interrupt(int irq, void *dev_id)
- {
-+ struct pt_regs* regs = get_irq_regs();
- int cpu = smp_processor_id();
- reg_timer_r_masked_intr masked_intr;
- reg_timer_rw_ack_intr ack_intr = { 0 };
-@@ -226,7 +240,7 @@
- * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
- * called as close as possible to 500 ms before the new second starts.
- *
-- * The division here is not time critical since it will run once in
-+ * The division here is not time critical since it will run once in
- * 11 minutes
- */
- if ((time_status & STA_UNSYNC) == 0 &&
-@@ -246,7 +260,7 @@
- */
-
- static struct irqaction irq_timer = {
-- .mask = timer_interrupt,
-+ .handler = timer_interrupt,
- .flags = IRQF_SHARED | IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "timer"
-@@ -262,7 +276,7 @@
-
- /* Setup the etrax timers
- * Base frequency is 100MHz, divider 1000000 -> 100 HZ
-- * We use timer0, so timer1 is free.
-+ * We use timer0, so timer1 is free.
- * The trig timer is used by the fasttimer API if enabled.
- */
-
-@@ -284,11 +298,11 @@
- {
- reg_intr_vect_rw_mask intr_mask;
-
-- /* probe for the RTC and read it if it exists
-- * Before the RTC can be probed the loops_per_usec variable needs
-- * to be initialized to make usleep work. A better value for
-- * loops_per_usec is calculated by the kernel later once the
-- * clock has started.
-+ /* probe for the RTC and read it if it exists
-+ * Before the RTC can be probed the loops_per_usec variable needs
-+ * to be initialized to make usleep work. A better value for
-+ * loops_per_usec is calculated by the kernel later once the
-+ * clock has started.
- */
- loops_per_usec = 50;
-
-@@ -297,7 +311,7 @@
- xtime.tv_sec = 0;
- xtime.tv_nsec = 0;
- have_rtc = 0;
-- } else {
-+ } else {
- /* get the current time */
- have_rtc = 1;
- update_xtime_from_cmos();
-@@ -316,9 +330,9 @@
- intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
- intr_mask.timer = 1;
- REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
--
-+
- /* now actually register the timer irq handler that calls timer_interrupt() */
--
-+
- setup_irq(TIMER_INTR_VECT, &irq_timer);
-
- /* enable watchdog if we should use one */
-@@ -330,10 +344,7 @@
- /* If we use the hardware watchdog, we want to trap it as an NMI
- and dump registers before it resets us. For this to happen, we
- must set the "m" NMI enable flag (which once set, is unset only
-- when an NMI is taken).
--
-- The same goes for the external NMI, but that doesn't have any
-- driver or infrastructure support yet. */
-+ when an NMI is taken). */
- {
- unsigned long flags;
- local_save_flags(flags);
-@@ -341,4 +352,27 @@
- local_irq_restore(flags);
- }
- #endif
-+
-+#ifdef CONFIG_CPU_FREQ
-+ cpufreq_register_notifier(&cris_time_freq_notifier_block,
-+ CPUFREQ_TRANSITION_NOTIFIER);
-+#endif
-+}
-+
-+#ifdef CONFIG_CPU_FREQ
-+static int
-+cris_time_freq_notifier(struct notifier_block *nb, unsigned long val, void *data)
-+{
-+ struct cpufreq_freqs *freqs = data;
-+ if (val == CPUFREQ_POSTCHANGE) {
-+ reg_timer_r_tmr0_data data;
-+ reg_timer_rw_tmr0_div div = (freqs->new * 500) / HZ;
-+ do
-+ {
-+ data = REG_RD(timer, timer_regs[freqs->cpu], r_tmr0_data);
-+ } while (data > 20);
-+ REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div);
-+ }
-+ return 0;
- }
-+#endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/traps.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/traps.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/traps.c 2006-12-11 14:04:24.000000000 +0100
-@@ -1,50 +1,43 @@
- /*
-- * Copyright (C) 2003, Axis Communications AB.
-+ * Copyright (C) 2003-2006, Axis Communications AB.
- */
-
- #include <linux/ptrace.h>
- #include <asm/uaccess.h>
--
- #include <asm/arch/hwregs/supp_reg.h>
--
--extern void reset_watchdog(void);
--extern void stop_watchdog(void);
--
--extern int raw_printk(const char *fmt, ...);
-+#include <asm/arch/hwregs/intr_vect_defs.h>
-
- void
- show_registers(struct pt_regs *regs)
- {
- /*
- * It's possible to use either the USP register or current->thread.usp.
-- * USP might not correspond to the current proccess for all cases this
-+ * USP might not correspond to the current process for all cases this
- * function is called, and current->thread.usp isn't up to date for the
-- * current proccess. Experience shows that using USP is the way to go.
-+ * current process. Experience shows that using USP is the way to go.
- */
-- unsigned long usp;
-+ unsigned long usp = rdusp();
- unsigned long d_mmu_cause;
- unsigned long i_mmu_cause;
-
-- usp = rdusp();
-+ printk("CPU: %d\n", smp_processor_id());
-
-- raw_printk("CPU: %d\n", smp_processor_id());
-+ printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
-+ regs->erp, regs->srp, regs->ccs, usp, regs->mof);
-
-- raw_printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
-- regs->erp, regs->srp, regs->ccs, usp, regs->mof);
-+ printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
-+ regs->r0, regs->r1, regs->r2, regs->r3);
-
-- raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
-- regs->r0, regs->r1, regs->r2, regs->r3);
-+ printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
-+ regs->r4, regs->r5, regs->r6, regs->r7);
-
-- raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
-- regs->r4, regs->r5, regs->r6, regs->r7);
-+ printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
-+ regs->r8, regs->r9, regs->r10, regs->r11);
-
-- raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
-- regs->r8, regs->r9, regs->r10, regs->r11);
-+ printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
-+ regs->r12, regs->r13, regs->orig_r10, regs->acr);
-
-- raw_printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
-- regs->r12, regs->r13, regs->orig_r10, regs->acr);
--
-- raw_printk("sp: %08lx\n", regs);
-+ printk(" sp: %08lx\n", (unsigned long)regs);
-
- SUPP_BANK_SEL(BANK_IM);
- SUPP_REG_RD(RW_MM_CAUSE, i_mmu_cause);
-@@ -52,18 +45,20 @@
- SUPP_BANK_SEL(BANK_DM);
- SUPP_REG_RD(RW_MM_CAUSE, d_mmu_cause);
-
-- raw_printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
-- raw_printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
-+ printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
-+ printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
-
-- raw_printk("Process %s (pid: %d, stackpage: %08lx)\n",
-- current->comm, current->pid, (unsigned long) current);
-+ printk("Process %s (pid: %d, stackpage=%08lx)\n",
-+ current->comm, current->pid, (unsigned long)current);
-
-- /* Show additional info if in kernel-mode. */
-+ /*
-+ * When in-kernel, we also print out the stack and code at the
-+ * time of the fault..
-+ */
- if (!user_mode(regs)) {
- int i;
-- unsigned char c;
-
-- show_stack(NULL, (unsigned long *) usp);
-+ show_stack(NULL, (unsigned long *)usp);
-
- /*
- * If the previous stack-dump wasn't a kernel one, dump the
-@@ -72,7 +67,7 @@
- if (usp != 0)
- show_stack(NULL, NULL);
-
-- raw_printk("\nCode: ");
-+ printk("\nCode: ");
-
- if (regs->erp < PAGE_OFFSET)
- goto bad_value;
-@@ -84,76 +79,65 @@
- * instruction decoding should be in sync at the interesting
- * point, but small enough to fit on a row. The regs->erp
- * location is pointed out in a ksymoops-friendly way by
-- * wrapping the byte for that address in parenthesis.
-+ * wrapping the byte for that address in parenthesises.
- */
- for (i = -12; i < 12; i++) {
-- if (__get_user(c, &((unsigned char *) regs->erp)[i])) {
-+ unsigned char c;
-+
-+ if (__get_user(c, &((unsigned char *)regs->erp)[i])) {
- bad_value:
-- raw_printk(" Bad IP value.");
-+ printk(" Bad IP value.");
- break;
- }
-
- if (i == 0)
-- raw_printk("(%02x) ", c);
-+ printk("(%02x) ", c);
- else
-- raw_printk("%02x ", c);
-+ printk("%02x ", c);
- }
--
-- raw_printk("\n");
-+ printk("\n");
- }
- }
-
--/*
-- * This gets called from entry.S when the watchdog has bitten. Show something
-- * similiar to an Oops dump, and if the kernel if configured to be a nice doggy;
-- * halt instead of reboot.
-- */
- void
--watchdog_bite_hook(struct pt_regs *regs)
-+arch_enable_nmi(void)
- {
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- local_irq_disable();
-- stop_watchdog();
-- show_registers(regs);
--
-- while (1)
-- ; /* Do nothing. */
--#else
-- show_registers(regs);
--#endif
-+ unsigned long flags;
-+
-+ local_save_flags(flags);
-+ flags |= (1 << 30); /* NMI M flag is at bit 30 */
-+ local_irq_restore(flags);
- }
-
--/* This is normally the Oops function. */
--void
--die_if_kernel(const char *str, struct pt_regs *regs, long err)
-+extern void (*nmi_handler)(struct pt_regs*);
-+void handle_nmi(struct pt_regs* regs)
- {
-- if (user_mode(regs))
-- return;
-+ reg_intr_vect_r_nmi r;
-
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- /*
-- * This printout might take too long and could trigger
-- * the watchdog normally. If NICE_DOGGY is set, simply
-- * stop the watchdog during the printout.
-- */
-- stop_watchdog();
--#endif
--
-- raw_printk("%s: %04lx\n", str, err & 0xffff);
-+ if (nmi_handler)
-+ nmi_handler(regs);
-
-- show_registers(regs);
--
--#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-- reset_watchdog();
--#endif
--
-- do_exit(SIGSEGV);
-+ /* Wait until nmi is no longer active. */
-+ do {
-+ r = REG_RD(intr_vect, regi_irq, r_nmi);
-+ } while (r.ext == regk_intr_vect_on);
- }
-
--void arch_enable_nmi(void)
-+#ifdef CONFIG_DEBUG_BUGVERBOSE
-+void
-+handle_BUG(struct pt_regs *regs)
- {
-- unsigned long flags;
-- local_save_flags(flags);
-- flags |= (1<<30); /* NMI M flag is at bit 30 */
-- local_irq_restore(flags);
-+ struct bug_frame f;
-+ unsigned char c;
-+ unsigned long erp = regs->erp;
-+
-+ if (__copy_from_user(&f, (const void __user *)(erp - 8), sizeof f))
-+ return;
-+ if (f.prefix != BUG_PREFIX || f.magic != BUG_MAGIC)
-+ return;
-+ if (__get_user(c, f.filename))
-+ f.filename = "<bad filename>";
-+
-+ printk("kernel BUG at %s:%d!\n", f.filename, f.line);
- }
-+#endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,96 +0,0 @@
--// $Id: vcs_hook.c,v 1.2 2003/08/12 12:01:06 starvik Exp $
--//
--// Call simulator hook. This is the part running in the
--// simulated program.
--//
--
--#include "vcs_hook.h"
--#include <stdarg.h>
--#include <asm/arch-v32/hwregs/reg_map.h>
--#include <asm/arch-v32/hwregs/intr_vect_defs.h>
--
--#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
--#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
--
--#define HOOK_DATA(offset) ((unsigned*) HOOK_MEM_BASE_ADDR)[offset]
--#define VHOOK_DATA(offset) ((volatile unsigned*) HOOK_MEM_BASE_ADDR)[offset]
--#define HOOK_TRIG(funcid) do { *((unsigned *) HOOK_TRIG_ADDR) = funcid; } while(0)
--#define HOOK_DATA_BYTE(offset) ((unsigned char*) HOOK_MEM_BASE_ADDR)[offset]
--
--
--// ------------------------------------------------------------------ hook_call
--int hook_call( unsigned id, unsigned pcnt, ...) {
-- va_list ap;
-- unsigned i;
-- unsigned ret;
--#ifdef USING_SOS
-- PREEMPT_OFF_SAVE();
--#endif
--
-- // pass parameters
-- HOOK_DATA(0) = id;
--
-- /* Have to make hook_print_str a special case since we call with a
-- parameter of byte type. Should perhaps be a separate
-- hook_call. */
--
-- if (id == hook_print_str) {
-- int i;
-- char *str;
--
-- HOOK_DATA(1) = pcnt;
--
-- va_start(ap, pcnt);
-- str = (char*)va_arg(ap,unsigned);
--
-- for (i=0; i!=pcnt; i++) {
-- HOOK_DATA_BYTE(8+i) = str[i];
-- }
-- HOOK_DATA_BYTE(8+i) = 0; /* null byte */
-- }
-- else {
-- va_start(ap, pcnt);
-- for( i = 1; i <= pcnt; i++ ) HOOK_DATA(i) = va_arg(ap,unsigned);
-- va_end(ap);
-- }
--
-- // read from mem to make sure data has propagated to memory before trigging
-- *((volatile unsigned*) HOOK_MEM_BASE_ADDR);
--
-- // trigger hook
-- HOOK_TRIG(id);
--
-- // wait for call to finish
-- while( VHOOK_DATA(0) > 0 ) {}
--
-- // extract return value
--
-- ret = VHOOK_DATA(1);
--
--#ifdef USING_SOS
-- PREEMPT_RESTORE();
--#endif
-- return ret;
--}
--
--unsigned
--hook_buf(unsigned i)
--{
-- return (HOOK_DATA(i));
--}
--
--void print_str( const char *str ) {
-- int i;
-- for (i=1; str[i]; i++); /* find null at end of string */
-- hook_call(hook_print_str, i, str);
--}
--
--// --------------------------------------------------------------- CPU_KICK_DOG
--void CPU_KICK_DOG(void) {
-- (void) hook_call( hook_kick_dog, 0 );
--}
--
--// ------------------------------------------------------- CPU_WATCHDOG_TIMEOUT
--void CPU_WATCHDOG_TIMEOUT( unsigned t ) {
-- (void) hook_call( hook_dog_timeout, 1, t );
--}
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.h linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.h
---- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,42 +0,0 @@
--// $Id: vcs_hook.h,v 1.1 2003/08/12 12:01:06 starvik Exp $
--//
--// Call simulator hook functions
--
--#ifndef HOOK_H
--#define HOOK_H
--
--int hook_call( unsigned id, unsigned pcnt, ...);
--
--enum hook_ids {
-- hook_debug_on = 1,
-- hook_debug_off,
-- hook_stop_sim_ok,
-- hook_stop_sim_fail,
-- hook_alloc_shared,
-- hook_ptr_shared,
-- hook_free_shared,
-- hook_file2shared,
-- hook_cmp_shared,
-- hook_print_params,
-- hook_sim_time,
-- hook_stop_sim,
-- hook_kick_dog,
-- hook_dog_timeout,
-- hook_rand,
-- hook_srand,
-- hook_rand_range,
-- hook_print_str,
-- hook_print_hex,
-- hook_cmp_offset_shared,
-- hook_fill_random_shared,
-- hook_alloc_random_data,
-- hook_calloc_random_data,
-- hook_print_int,
-- hook_print_uint,
-- hook_fputc,
-- hook_init_fd,
-- hook_sbrk
--
--};
--
--#endif
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/lib/Makefile
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/Makefile 2006-10-11 19:29:20.000000000 +0200
-@@ -2,5 +2,5 @@
- # Makefile for Etrax-specific library files..
- #
-
--lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o spinlock.o
-+lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o spinlock.o delay.o
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksum.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksum.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksum.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksum.S 2005-08-15 15:53:12.000000000 +0200
-@@ -7,15 +7,15 @@
-
- .globl csum_partial
- csum_partial:
--
-+
- ;; r10 - src
- ;; r11 - length
- ;; r12 - checksum
-
- ;; check for breakeven length between movem and normal word looping versions
-- ;; we also do _NOT_ want to compute a checksum over more than the
-+ ;; we also do _NOT_ want to compute a checksum over more than the
- ;; actual length when length < 40
--
-+
- cmpu.w 80,$r11
- blo _word_loop
- nop
-@@ -24,17 +24,17 @@
- ;; this overhead is why we have a check above for breakeven length
- ;; only r0 - r8 have to be saved, the other ones are clobber-able
- ;; according to the ABI
--
-+
- subq 9*4,$sp
- subq 10*4,$r11 ; update length for the first loop
- movem $r8,[$sp]
--
-+
- ;; do a movem checksum
-
- _mloop: movem [$r10+],$r9 ; read 10 longwords
-
- ;; perform dword checksumming on the 10 longwords
--
-+
- add.d $r0,$r12
- addc $r1,$r12
- addc $r2,$r12
-@@ -48,9 +48,8 @@
-
- ;; fold the carry into the checksum, to avoid having to loop the carry
- ;; back into the top
--
-+
- addc 0,$r12
-- addc 0,$r12 ; do it again, since we might have generated a carry
-
- subq 10*4,$r11
- bge _mloop
-@@ -68,34 +67,30 @@
-
- ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below.
- ;; r9 and r13 can be used as temporaries.
--
-+
- moveq -1,$r9 ; put 0xffff in r9, faster than move.d 0xffff,r9
- lsrq 16,$r9
--
-+
- move.d $r12,$r13
- lsrq 16,$r13 ; r13 = checksum >> 16
- and.d $r9,$r12 ; checksum = checksum & 0xffff
- add.d $r13,$r12 ; checksum += r13
-- move.d $r12,$r13 ; do the same again, maybe we got a carry last add
-- lsrq 16,$r13
-- and.d $r9,$r12
-- add.d $r13,$r12
-
- _no_fold:
- cmpq 2,$r11
- blt _no_words
- nop
--
-+
- ;; checksum the rest of the words
--
-+
- subq 2,$r11
--
-+
- _wloop: subq 2,$r11
- bge _wloop
- addu.w [$r10+],$r12
--
-+
- addq 2,$r11
--
-+
- _no_words:
- ;; see if we have one odd byte more
- cmpq 1,$r11
-@@ -104,7 +99,7 @@
- ret
- move.d $r12,$r10
-
--_do_byte:
-+_do_byte:
- ;; copy and checksum the last byte
- addu.b [$r10],$r12
- ret
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksumcopy.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksumcopy.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksumcopy.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksumcopy.S 2005-08-15 15:53:12.000000000 +0200
-@@ -3,23 +3,23 @@
- * Copyright (c) 1998, 2001, 2003 Axis Communications AB
- *
- * Authors: Bjorn Wesen
-- *
-+ *
- * csum_partial_copy_nocheck(const char *src, char *dst,
- * int len, unsigned int sum)
- */
-
- .globl csum_partial_copy_nocheck
--csum_partial_copy_nocheck:
--
-+csum_partial_copy_nocheck:
-+
- ;; r10 - src
- ;; r11 - dst
- ;; r12 - length
- ;; r13 - checksum
-
- ;; check for breakeven length between movem and normal word looping versions
-- ;; we also do _NOT_ want to compute a checksum over more than the
-+ ;; we also do _NOT_ want to compute a checksum over more than the
- ;; actual length when length < 40
--
-+
- cmpu.w 80,$r12
- blo _word_loop
- nop
-@@ -28,19 +28,19 @@
- ;; this overhead is why we have a check above for breakeven length
- ;; only r0 - r8 have to be saved, the other ones are clobber-able
- ;; according to the ABI
--
-+
- subq 9*4,$sp
- subq 10*4,$r12 ; update length for the first loop
- movem $r8,[$sp]
--
-+
- ;; do a movem copy and checksum
--
-+
- 1: ;; A failing userspace access (the read) will have this as PC.
- _mloop: movem [$r10+],$r9 ; read 10 longwords
- movem $r9,[$r11+] ; write 10 longwords
-
- ;; perform dword checksumming on the 10 longwords
--
-+
- add.d $r0,$r13
- addc $r1,$r13
- addc $r2,$r13
-@@ -54,9 +54,8 @@
-
- ;; fold the carry into the checksum, to avoid having to loop the carry
- ;; back into the top
--
-+
- addc 0,$r13
-- addc 0,$r13 ; do it again, since we might have generated a carry
-
- subq 10*4,$r12
- bge _mloop
-@@ -74,34 +73,30 @@
-
- ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below
- ;; r9 can be used as temporary.
--
-+
- move.d $r13,$r9
- lsrq 16,$r9 ; r0 = checksum >> 16
- and.d 0xffff,$r13 ; checksum = checksum & 0xffff
- add.d $r9,$r13 ; checksum += r0
-- move.d $r13,$r9 ; do the same again, maybe we got a carry last add
-- lsrq 16,$r9
-- and.d 0xffff,$r13
-- add.d $r9,$r13
--
-+
- _no_fold:
- cmpq 2,$r12
- blt _no_words
- nop
--
-+
- ;; copy and checksum the rest of the words
--
-+
- subq 2,$r12
--
-+
- 2: ;; A failing userspace access for the read below will have this as PC.
- _wloop: move.w [$r10+],$r9
- addu.w $r9,$r13
- subq 2,$r12
- bge _wloop
- move.w $r9,[$r11+]
--
-+
- addq 2,$r12
--
-+
- _no_words:
- ;; see if we have one odd byte more
- cmpq 1,$r12
-@@ -110,7 +105,7 @@
- ret
- move.d $r13,$r10
-
--_do_byte:
-+_do_byte:
- ;; copy and checksum the last byte
- 3: ;; A failing userspace access for the read below will have this as PC.
- move.b [$r10],$r9
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/delay.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/delay.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/delay.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/delay.c 2006-10-16 01:08:41.000000000 +0200
-@@ -0,0 +1,28 @@
-+/*
-+ * Precise Delay Loops for ETRAX FS
-+ *
-+ * Copyright (C) 2006 Axis Communications AB.
-+ *
-+ */
-+
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/timer_defs.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/module.h>
-+
-+/*
-+ * On ETRAX FS, we can check the free-running read-only 100MHz timer
-+ * getting 32-bit 10ns precision, theoretically good for 42.94967295
-+ * seconds. Unsigned arithmetic and careful expression handles
-+ * wrapping.
-+ */
-+
-+void cris_delay10ns(u32 n10ns)
-+{
-+ u32 t0 = REG_RD(timer, regi_timer, r_time);
-+ while (REG_RD(timer, regi_timer, r_time) - t0 < n10ns)
-+ ;
-+}
-+EXPORT_SYMBOL(cris_delay10ns);
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/dram_init.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/dram_init.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/dram_init.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/dram_init.S 2006-11-28 11:06:19.000000000 +0100
-@@ -1,14 +1,14 @@
--/* $Id: dram_init.S,v 1.4 2005/04/24 18:48:32 starvik Exp $
-- *
-+/* $Id: dram_init.S,v 1.9 2006/11/28 10:06:19 ricardw Exp $
-+ *
- * DRAM/SDRAM initialization - alter with care
- * This file is intended to be included from other assembler files
- *
-- * Note: This file may not modify r8 or r9 because they are used to
-- * carry information from the decompresser to the kernel
-+ * Note: This file may not modify r8 .. r12 because they are used to
-+ * carry information from the decompressor to the kernel
- *
- * Copyright (C) 2000-2003 Axis Communications AB
- *
-- * Authors: Mikael Starvik (starvik@axis.com)
-+ * Authors: Mikael Starvik (starvik@axis.com)
- */
-
- /* Just to be certain the config file is included, we include it here
-@@ -18,13 +18,13 @@
-
- #include <asm/arch/hwregs/asm/reg_map_asm.h>
- #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
--
-- ;; WARNING! The registers r8 and r9 are used as parameters carrying
-- ;; information from the decompressor (if the kernel was compressed).
-+
-+ ;; WARNING! The registers r8 .. r12 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
- ;; They should not be used in the code below.
-
- ; Refer to BIF MDS for a description of SDRAM initialization
--
-+
- ; Bank configuration
- move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
- move.d CONFIG_ETRAX_SDRAM_GRP0_CONFIG, $r1
-@@ -33,7 +33,7 @@
- move.d CONFIG_ETRAX_SDRAM_GRP1_CONFIG, $r1
- move.d $r1, [$r0]
-
-- ; Calculate value of mrs_data
-+ ; Calculate value of mrs_data
- ; CAS latency = 2 && bus_width = 32 => 0x40
- ; CAS latency = 3 && bus_width = 32 => 0x60
- ; CAS latency = 2 && bus_width = 16 => 0x20
-@@ -43,7 +43,7 @@
- move.d CONFIG_ETRAX_SDRAM_COMMAND, $r2
- bne _set_timing
- nop
--
-+
- move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2
- move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
- and.d 0x07, $r1 ; Get CAS latency
-@@ -51,7 +51,7 @@
- beq _bw_check
- nop
- move.d 0x60, $r4
--
-+
- _bw_check:
- ; Assume that group 0 width is equal to group 1. This assumption
- ; is wrong for a group 1 only hardware (such as the grand old
-@@ -67,23 +67,27 @@
- move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
- and.d ~(3 << reg_bif_core_rw_sdram_timing___ref___lsb), $r1
- move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
-- move.d $r1, [$r0]
-+ move.d $r1, [$r0]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-
- ; Issue NOP command
- move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
- moveq regk_bif_core_nop, $r1
- move.d $r1, [$r5]
--
-+
- ; Wait 200us
- move.d 10000, $r2
- 1: bne 1b
- subq 1, $r2
--
-+
- ; Issue initialization command sequence
-- move.d _sdram_commands_start, $r2
-- and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-- move.d _sdram_commands_end, $r3
-- and.d 0x000fffff, $r3
-+ lapc.d _sdram_commands_start, $r2 ; position-independent
-+ lapc.d _sdram_commands_end, $r3 ; position-independent
-+
- 1: clear.d $r6
- move.b [$r2+], $r6 ; Load command
- or.d $r4, $r6 ; Add calculated mrs
-@@ -100,7 +104,7 @@
- move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
- move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
- move.d $r1, [$r0]
--
-+
- ; Initialization finished
- ba _sdram_commands_end
- nop
-@@ -116,4 +120,4 @@
- .byte regk_bif_core_ref ; refresh
- .byte regk_bif_core_ref ; refresh
- .byte regk_bif_core_mrs ; mrs
--_sdram_commands_end:
-+_sdram_commands_end:
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/hw_settings.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/hw_settings.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/hw_settings.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/hw_settings.S 2006-10-13 14:43:15.000000000 +0200
-@@ -1,25 +1,25 @@
- /*
-- * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $
-- *
-+ * $Id: hw_settings.S,v 1.5 2006/10/13 12:43:15 starvik Exp $
-+ *
- * This table is used by some tools to extract hardware parameters.
- * The table should be included in the kernel and the decompressor.
- * Don't forget to update the tools if you change this table.
- *
- * Copyright (C) 2001 Axis Communications AB
- *
-- * Authors: Mikael Starvik (starvik@axis.com)
-+ * Authors: Mikael Starvik (starvik@axis.com)
- */
-
- #include <asm/arch/hwregs/asm/reg_map_asm.h>
- #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
- #include <asm/arch/hwregs/asm/gio_defs_asm.h>
--
-+
- .ascii "HW_PARAM_MAGIC" ; Magic number
- .dword 0xc0004000 ; Kernel start address
-
- ; Debug port
- #ifdef CONFIG_ETRAX_DEBUG_PORT0
-- .dword 0
-+ .dword 0
- #elif defined(CONFIG_ETRAX_DEBUG_PORT1)
- .dword 1
- #elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-@@ -28,9 +28,9 @@
- .dword 3
- #else
- .dword 4 ; No debug
--#endif
-+#endif
-
-- ; Register values
-+ ; Register values
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
- .dword CONFIG_ETRAX_MEM_GRP1_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/memset.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/memset.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/memset.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/memset.c 2003-07-02 05:00:14.000000000 +0200
-@@ -66,7 +66,7 @@
-
- {
- register char *dst __asm__ ("r13") = pdst;
--
-+
- /* This is NONPORTABLE, but since this whole routine is */
- /* grossly nonportable that doesn't matter. */
-
-@@ -156,7 +156,7 @@
- }
-
- /* Either we directly starts copying, using dword copying
-- in a loop, or we copy as much as possible with 'movem'
-+ in a loop, or we copy as much as possible with 'movem'
- and then the last block (<44 bytes) is copied here.
- This will work since 'movem' will have updated src,dst,n. */
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/nand_init.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/nand_init.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/nand_init.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/nand_init.S 2007-01-31 16:52:19.000000000 +0100
-@@ -9,14 +9,16 @@
- ##
- ## Some notes about the bug/feature for future reference:
- ## The bootrom copies the first 127 KB from NAND flash to internal
--## memory. The problem is that it does a bytewise copy. NAND flashes
--## does autoincrement on the address so for a 16-bite device each
--## read/write increases the address by two. So the copy loop in the
-+## memory. The problem is that it does a bytewise copy, copying
-+## a single byte from the lowest byte of the bus for each address.
-+## NAND flashes autoincrement on the address so for a 16 bit device
-+## each read/write increases the address by two. So the copy loop in the
- ## bootrom will discard every second byte. This is solved by inserting
--## zeroes in every second byte in the first erase block.
-+## zeroes in every second byte in the first erase block, in order
-+## to get contiguous code.
- ##
- ## The bootrom also incorrectly assumes that it can read the flash
--## linear with only one read command but the flash will actually
-+## linearly with only one read command but the flash will actually
- ## switch between normal area and spare area if you do that so we
- ## can't trust more than the first 256 bytes.
- ##
-@@ -29,14 +31,16 @@
- #include <asm/arch/hwregs/asm/config_defs_asm.h>
-
- ;; There are 8-bit NAND flashes and 16-bit NAND flashes.
--;; We need to treat them slightly different.
--#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
--#define PAGE_SIZE 256
-+;; We need to treat them slightly differently.
-+#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
-+#define PAGE_SIZE_ADDRESSES 256
- #else
--#error 2
--#define PAGE_SIZE 512
-+#define PAGE_SIZE_ADDRESSES 512
- #endif
-+
-+;; Block size for erase
- #define ERASE_BLOCK 16384
-+#define PAGE_SIZE_BYTES 512
-
- ;; GPIO pins connected to NAND flash
- #define CE 4
-@@ -49,6 +53,7 @@
- #define NAND_WR_ADDR 0x94000000
-
- #define READ_CMD 0x00
-+#define RESET_CMD 0xFF
-
- ;; Readability macros
- #define CSP_MASK \
-@@ -58,6 +63,10 @@
- REG_STATE(bif_core, rw_grp3_cfg, gated_csp0, rd) | \
- REG_STATE(bif_core, rw_grp3_cfg, gated_csp1, wr)
-
-+;; Normally we initialize GPIO and bus interfaces.
-+;; This is strictly not necessary; boot ROM does this for us.
-+#define INTERFACE_SETUP (1)
-+
- ;;----------------------------------------------------------------------------
- ;; Macros to set/clear GPIO bits
-
-@@ -71,16 +80,41 @@
- move.d $r9, [$r2]
- .endm
-
-+.macro GPIO_SYNC
-+;; Originally, we read back data written to nand flash in order
-+;; to flush the pipeline. It turned out however, that the real
-+;; culprit was a lack of wait states.
-+;; This macro remains in the code however in case this conclusion
-+;; is wrong too.
-+;;
-+;; move.d [$r2], $r9 ; read back to flush pipeline
-+.endm
-+
- ;;----------------------------------------------------------------------------
-+;; Read value from bus to temporary register to sync with previous write
-+;; This generates no signal to the NAND flash, since only chip select lines are
-+;; pulled out to the chip, and read is not gated with chip select for the write
-+;; area.
-
--nand_boot:
-- ;; Check if nand boot was selected
-- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
-- move.d [$r0], $r0
-- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
-- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
-- bne normal_boot ; No NAND boot
-- nop
-+.macro BUS_SYNC r
-+ move.b [$r1], \r
-+.endm
-+
-+;;----------------------------------------------------------------------------
-+;; Delay macro
-+;; x = delay = 10*x + 20 ns, e.g. DELAY 25 => 270ns delay, max 63 (650 ns)
-+;;(@200Mc)
-+;; r is temp reg used
-+;; Macro currently not used, save for a rainy day.
-+
-+.macro DELAY x, r
-+ clear.d \r
-+ addq (\x),\r ; addq zero-extends its argument
-+7: bne 7b
-+ subq 1, \r
-+.endm
-+
-+;;----------------------------------------------------------------------------
-
- copy_nand_to_ram:
- ;; copy_nand_to_ram
-@@ -88,7 +122,6 @@
- ;; r10 - destination
- ;; r11 - source offset
- ;; r12 - size
-- ;; r13 - Address to jump to after completion
- ;; Note : r10-r12 are clobbered on return
- ;; Registers used:
- ;; r0 - NAND_RD_ADDR
-@@ -96,83 +129,99 @@
- ;; r2 - reg_gio_rw_pa_dout
- ;; r3 - reg_gio_r_pa_din
- ;; r4 - tmp
-- ;; r5 - byte counter within a page
-- ;; r6 - reg_pinmux_rw_pa
-- ;; r7 - reg_gio_rw_pa_oe
-- ;; r8 - reg_bif_core_rw_grp3_cfg
-+ ;; r5 - byte counter within a page / tmp2
-+ ;; r6 - r_bootsel masked w/ 0x18
-+ ;; r7 - n/u
-+ ;; r8 - n/u
- ;; r9 - reg_gio_rw_pa_dout shadow
-- move.d 0x90000000, $r0
-- move.d 0x94000000, $r1
-+ move.d NAND_RD_ADDR, $r0
-+ move.d NAND_WR_ADDR, $r1
- move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r2
- move.d REG_ADDR(gio, regi_gio, r_pa_din), $r3
-- move.d REG_ADDR(pinmux, regi_pinmux, rw_pa), $r6
-- move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r7
-- move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r8
-
--#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
-+#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
- lsrq 1, $r11
- #endif
-+
-+#if INTERFACE_SETUP
-+ ;; Set up pinmux
-+ move.d REG_ADDR(pinmux, regi_pinmux, rw_pa), $r5
-+ move.d [$r5], $r4
-+ or.b 0xf0, $r4 ; bits 4,5,6,7
-+ move.d $r4, [$r5]
-+
- ;; Set up GPIO
-- move.d [$r2], $r9
-- move.d [$r7], $r4
-+ move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r5
-+ move.d [$r5], $r4
- or.b (1<<ALE) | (1 << CLE) | (1<<CE), $r4
-- move.d $r4, [$r7]
-+ move.d $r4, [$r5]
-
-+#endif
- ;; Set up bif
-- move.d [$r8], $r4
-- and.d CSP_MASK, $r4
-+ move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r5
-+ move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r4 ; wait states
-+ and.d ~CSP_MASK, $r4
- or.d CSP_VAL, $r4
-- move.d $r4, [$r8]
-+ move.d $r4, [$r5]
-+
-+ move.d [$r2], $r9 ; fetch PA DOUT to shadow register
-+
-+ ;; figure out how many address cycles the flash needs
-+ move.d REG_ADDR(config, regi_config, r_bootsel), $r5
-+ move.d [$r5], $r6
-+ andq 0x18, $r6 ; mask out bs3,4 (00=>3, 08=>4, 18=>5 cycles)
-
- 1: ;; Copy one page
- CLR CE
- SET CLE
-+ GPIO_SYNC
- moveq READ_CMD, $r4
- move.b $r4, [$r1]
-- moveq 20, $r4
--2: bne 2b
-- subq 1, $r4
-+ BUS_SYNC $r4
- CLR CLE
- SET ALE
-- clear.w [$r1] ; Column address = 0
-- move.d $r11, $r4
-+ GPIO_SYNC
-+ clear.b [$r1] ; Column address = 0
-+ move.d $r11, $r4 ; Address
-+ lsrq 9, $r4 ; Row address is A9 and up
-+ move.b $r4, [$r1] ; Row address byte #0
- lsrq 8, $r4
-- move.b $r4, [$r1] ; Row address
-+ cmpq 0x08, $r6 ; 8 => Z, 0 => C, 18h => NZ,NC
-+ bcs 4f ; C (3 cycles) => jump
-+ move.b $r4, [$r1] ; Row address byte #1 (DELAY SLOT) (no flagset)
-+ beq 3f ; Z (4 cycles) => jump
-+ lsrq 8, $r4 ; (DELAY SLOT)
-+ move.b $r4, [$r1] ; Row address byte #2 (5 cyc only)
- lsrq 8, $r4
-- move.b $r4, [$r1] ; Row adddress
-- moveq 20, $r4
--2: bne 2b
-- subq 1, $r4
-+3:
-+ move.b $r4, [$r1] ; Row address byte #3 (5 cyc) or #2 (4 cyc)
-+4:
-+ BUS_SYNC $r4
- CLR ALE
-+ GPIO_SYNC
-+
- 2: move.d [$r3], $r4
- and.d 1 << BY, $r4
- beq 2b
-- movu.w PAGE_SIZE, $r5
-+ nop
-+ movu.w PAGE_SIZE_ADDRESSES, $r5
- 2: ; Copy one byte/word
--#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
-+#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
- move.w [$r0], $r4
- #else
- move.b [$r0], $r4
- #endif
- subq 1, $r5
- bne 2b
--#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
-+#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
- move.w $r4, [$r10+]
-- subu.w PAGE_SIZE*2, $r12
- #else
- move.b $r4, [$r10+]
-- subu.w PAGE_SIZE, $r12
- #endif
-- bpl 1b
-- addu.w PAGE_SIZE, $r11
-+ subu.w PAGE_SIZE_BYTES, $r12
-+ bhi 1b
-+ addu.w PAGE_SIZE_ADDRESSES, $r11
-
-- ;; End of copy
-- jump $r13
-- nop
-+ SET CE
-
-- ;; This will warn if the code above is too large. If you consider
-- ;; to remove this you don't understand the bug/feature.
-- .org 256
-- .org ERASE_BLOCK
--
--normal_boot:
-+ ;; End of copy
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/spinlock.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/spinlock.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/spinlock.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/spinlock.S 2006-05-24 11:38:43.000000000 +0200
-@@ -1,22 +1,22 @@
- ;; Core of the spinlock implementation
- ;;
--;; Copyright (C) 2004 Axis Communications AB.
-+;; Copyright (C) 2004 Axis Communications AB.
- ;;
--;; Author: Mikael Starvik
--
-+;; Author: Mikael Starvik
-
-+
- .global cris_spin_lock
- .global cris_spin_trylock
-
- .text
--
-+
- cris_spin_lock:
- clearf p
--1: test.d [$r10]
-+1: test.b [$r10]
- beq 1b
- clearf p
- ax
-- clear.d [$r10]
-+ clear.b [$r10]
- bcs 1b
- clearf p
- ret
-@@ -24,10 +24,10 @@
-
- cris_spin_trylock:
- clearf p
--1: move.d [$r10], $r11
-+1: move.b [$r10], $r11
- ax
-- clear.d [$r10]
-+ clear.b [$r10]
- bcs 1b
- clearf p
- ret
-- move.d $r11,$r10
-+ movu.b $r11,$r10
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/string.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/string.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/lib/string.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/string.c 2003-07-02 05:00:14.000000000 +0200
-@@ -48,8 +48,8 @@
- register char *dst __asm__ ("r13") = pdst;
- register const char *src __asm__ ("r11") = psrc;
- register int n __asm__ ("r12") = pn;
--
--
-+
-+
- /* When src is aligned but not dst, this makes a few extra needless
- cycles. I believe it would take as many to check that the
- re-alignment was unnecessary. */
-@@ -117,13 +117,13 @@
- ;; Restore registers from stack \n\
- movem [$sp+],$r10"
-
-- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
-+ /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
- /* Inputs */ : "0" (dst), "1" (src), "2" (n));
--
-+
- }
-
- /* Either we directly starts copying, using dword copying
-- in a loop, or we copy as much as possible with 'movem'
-+ in a loop, or we copy as much as possible with 'movem'
- and then the last block (<44 bytes) is copied here.
- This will work since 'movem' will have updated src,dst,n. */
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/init.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/init.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/mm/init.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/init.c 2006-10-13 14:43:14.000000000 +0200
-@@ -34,12 +34,12 @@
- unsigned long mmu_kbase_hi;
- unsigned long mmu_kbase_lo;
- unsigned short mmu_page_id;
--
-- /*
-+
-+ /*
- * Make sure the current pgd table points to something sane, even if it
- * is most probably not used until the next switch_mm.
- */
-- per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;
-+ per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;
-
- #ifdef CONFIG_SMP
- {
-@@ -65,7 +65,7 @@
- REG_STATE(mmu, rw_mm_cfg, seg_d, page) |
- REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
- REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
--#ifndef CONFIG_ETRAXFS_SIM
-+#ifndef CONFIG_ETRAXFS_SIM
- REG_STATE(mmu, rw_mm_cfg, seg_a, page) |
- #else
- REG_STATE(mmu, rw_mm_cfg, seg_a, linear) |
-@@ -115,7 +115,7 @@
- SUPP_REG_WR(RW_MM_KBASE_HI, mmu_kbase_hi);
- SUPP_REG_WR(RW_MM_KBASE_LO, mmu_kbase_lo);
- SUPP_REG_WR(RW_MM_TLB_HI, mmu_page_id);
--
-+
- /* Update the data MMU. */
- SUPP_BANK_SEL(BANK_DM);
- SUPP_REG_WR(RW_MM_CFG, mmu_config);
-@@ -125,7 +125,7 @@
-
- SPEC_REG_WR(SPEC_REG_PID, 0);
-
-- /*
-+ /*
- * The MMU has been enabled ever since head.S but just to make it
- * totally obvious enable it here as well.
- */
-@@ -133,7 +133,7 @@
- SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */
- }
-
--void __init
-+void __init
- paging_init(void)
- {
- int i;
-@@ -160,13 +160,13 @@
- for (i = 1; i < MAX_NR_ZONES; i++)
- zones_size[i] = 0;
-
-- /*
-+ /*
- * Use free_area_init_node instead of free_area_init, because it is
-- * designed for systems where the DRAM starts at an address
-+ * designed for systems where the DRAM starts at an address
- * substantially higher than 0, like us (we start at PAGE_OFFSET). This
- * saves space in the mem_map page array.
- */
- free_area_init_node(0, &contig_page_data, zones_size, PAGE_OFFSET >> PAGE_SHIFT, 0);
--
-+
- mem_map = contig_page_data.node_mem_map;
- }
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/intmem.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/intmem.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/mm/intmem.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/intmem.c 2006-01-02 12:27:04.000000000 +0100
-@@ -27,7 +27,7 @@
- {
- static int initiated = 0;
- if (!initiated) {
-- struct intmem_allocation* alloc =
-+ struct intmem_allocation* alloc =
- (struct intmem_allocation*)kmalloc(sizeof *alloc, GFP_KERNEL);
- INIT_LIST_HEAD(&intmem_allocations);
- intmem_virtual = ioremap(MEM_INTMEM_START, MEM_INTMEM_SIZE);
-@@ -44,7 +44,7 @@
- struct intmem_allocation* allocation;
- struct intmem_allocation* tmp;
- void* ret = NULL;
--
-+
- preempt_disable();
- crisv32_intmem_init();
-
-@@ -55,7 +55,7 @@
- if (allocation->status == STATUS_FREE &&
- allocation->size >= size + alignment) {
- if (allocation->size > size + alignment) {
-- struct intmem_allocation* alloc =
-+ struct intmem_allocation* alloc =
- (struct intmem_allocation*)
- kmalloc(sizeof *alloc, GFP_ATOMIC);
- alloc->status = STATUS_FREE;
-@@ -73,13 +73,13 @@
- allocation->offset += alignment;
- list_add_tail(&tmp->entry, &allocation->entry);
- }
-- }
-+ }
- allocation->status = STATUS_ALLOCATED;
- allocation->size = size;
- ret = (void*)((int)intmem_virtual + allocation->offset);
- }
- }
-- preempt_enable();
-+ preempt_enable();
- return ret;
- }
-
-@@ -96,22 +96,22 @@
-
- list_for_each_entry_safe(allocation, tmp, &intmem_allocations, entry) {
- if (allocation->offset == (int)(addr - intmem_virtual)) {
-- struct intmem_allocation* prev =
-- list_entry(allocation->entry.prev,
-+ struct intmem_allocation* prev =
-+ list_entry(allocation->entry.prev,
- struct intmem_allocation, entry);
-- struct intmem_allocation* next =
-- list_entry(allocation->entry.next,
-+ struct intmem_allocation* next =
-+ list_entry(allocation->entry.next,
- struct intmem_allocation, entry);
-
- allocation->status = STATUS_FREE;
- /* Join with prev and/or next if also free */
-- if (prev->status == STATUS_FREE) {
-+ if ((prev != &intmem_allocations) && (prev->status == STATUS_FREE)) {
- prev->size += allocation->size;
- list_del(&allocation->entry);
- kfree(allocation);
- allocation = prev;
- }
-- if (next->status == STATUS_FREE) {
-+ if ((next != &intmem_allocations) && (next->status == STATUS_FREE)) {
- allocation->size += next->size;
- list_del(&next->entry);
- kfree(next);
-@@ -125,13 +125,13 @@
-
- void* crisv32_intmem_phys_to_virt(unsigned long addr)
- {
-- return (void*)(addr - MEM_INTMEM_START+
-+ return (void*)(addr - MEM_INTMEM_START+
- (unsigned long)intmem_virtual);
- }
-
- unsigned long crisv32_intmem_virt_to_phys(void* addr)
- {
-- return (unsigned long)((unsigned long )addr -
-+ return (unsigned long)((unsigned long )addr -
- (unsigned long)intmem_virtual + MEM_INTMEM_START);
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/mmu.S linux-2.6.19.2.dev/arch/cris/arch-v32/mm/mmu.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/mm/mmu.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/mmu.S 2006-08-04 10:10:20.000000000 +0200
-@@ -1,3 +1,5 @@
-+; WARNING : The refill handler has been modified, see below !!!
-+
- /*
- * Copyright (C) 2003 Axis Communications AB
- *
-@@ -9,7 +11,7 @@
-
- #include <asm/page.h>
- #include <asm/pgtable.h>
--
-+
- ; Save all register. Must save in same order as struct pt_regs.
- .macro SAVE_ALL
- subq 12, $sp
-@@ -29,11 +31,11 @@
- subq 14*4, $sp
- movem $r13, [$sp]
- subq 4, $sp
-- move.d $r10, [$sp]
-+ move.d $r10, [$sp]
- .endm
-
- ; Bus fault handler. Extracts relevant information and calls mm subsystem
--; to handle the fault.
-+; to handle the fault.
- .macro MMU_BUS_FAULT_HANDLER handler, mmu, we, ex
- .globl \handler
- \handler:
-@@ -45,7 +47,7 @@
- orq \ex << 1, $r13 ; execute?
- move $s3, $r10 ; rw_mm_cause
- and.d ~8191, $r10 ; Get faulting page start address
--
-+
- jsr do_page_fault
- nop
- ba ret_from_intr
-@@ -59,15 +61,28 @@
- ; The code below handles case 1 and calls the mm subsystem for case 2 and 3.
- ; Do not touch this code without very good reasons and extensive testing.
- ; Note that the code is optimized to minimize stalls (makes the code harder
--; to read).
-+; to read).
-+;
-+; WARNING !!!
-+; Modified by Mikael Asker 060725: added a workaround for strange TLB
-+; behavior. If the same PTE is present in more than one set, the TLB
-+; doesn't recognize it and we get stuck in a loop of refill exceptions.
-+; The workaround detects such loops and exits them by flushing
-+; the TLB contents. The problem and workaround were verified
-+; in VCS by Mikael Starvik.
- ;
- ; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each
--; PMD holds 16 MB of virtual memory.
-+; PMD holds 16 MB of virtual memory.
- ; Bits 0-12 : Offset within a page
- ; Bits 13-23 : PTE offset within a PMD
- ; Bits 24-31 : PMD offset within the PGD
--
-+
- .macro MMU_REFILL_HANDLER handler, mmu
-+ .data
-+1: .dword 0 ; refill_count
-+ ; == 0 <=> last_refill_cause is invalid\r
-+2: .dword 0 ; last_refill_cause\r
-+ .text
- .globl \handler
- \handler:
- subq 4, $sp
-@@ -76,40 +91,88 @@
- subq 4, $sp
- move \mmu, $srs ; Select MMU support register bank
- move.d $acr, [$sp]
-- subq 4, $sp
-- move.d $r0, [$sp]
--#ifdef CONFIG_SMP
-+ subq 12, $sp\r
-+ move.d 1b, $acr ; Point to refill_count\r
-+ movem $r2, [$sp]\r
-+\r
-+ test.d [$acr] ; refill_count == 0 ?
-+ beq 5f ; yes, last_refill_cause is invalid\r
-+ move.d $acr, $r1\r
-+\r
-+ ; last_refill_cause is valid, investigate cause\r
-+ addq 4, $r1 ; Point to last_refill_cause\r
-+ move $s3, $r0 ; Get rw_mm_cause\r
-+ move.d [$r1], $r2 ; Get last_refill_cause\r
-+ cmp.d $r0, $r2 ; rw_mm_cause == last_refill_cause ?\r
-+ beq 6f ; yes, increment count\r
-+ moveq 1, $r2\r
-+\r
-+ ; rw_mm_cause != last_refill_cause\r
-+ move.d $r2, [$acr] ; refill_count = 1\r
-+ move.d $r0, [$r1] ; last_refill_cause = rw_mm_cause\r
-+\r
-+3: ; Probably not in a loop, continue normal processing
-+#ifdef CONFIG_SMP
- move $s7, $acr ; PGD
- #else
- move.d per_cpu__current_pgd, $acr ; PGD
- #endif
- ; Look up PMD in PGD
-- move $s3, $r0 ; rw_mm_cause
- lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31)
- move.d [$acr], $acr ; PGD for the current process
- addi $r0.d, $acr, $acr
- move $s3, $r0 ; rw_mm_cause
- move.d [$acr], $acr ; Get PMD
-- beq 1f
-+ beq 8f
- ; Look up PTE in PMD
- lsrq PAGE_SHIFT, $r0
- and.w PAGE_MASK, $acr ; Remove PMD flags
- and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23)
- addi $r0.d, $acr, $acr
- move.d [$acr], $acr ; Get PTE
-- beq 2f
-- move.d [$sp+], $r0 ; Pop r0 in delayslot
-+ beq 9f
-+ movem [$sp], $r2 ; Restore r0-r2 in delay slot
-+ addq 12, $sp
- ; Store in TLB
- move $acr, $s5
-- ; Return
-+4: ; Return
- move.d [$sp+], $acr
- move [$sp], $srs
- addq 4, $sp
- rete
- rfe
--1: ; PMD missing, let the mm subsystem fix it up.
-- move.d [$sp+], $r0 ; Pop r0
--2: ; PTE missing, let the mm subsystem fix it up.
-+\r
-+5: ; last_refill_cause is invalid\r
-+ moveq 1, $r2\r
-+ addq 4, $r1 ; Point to last_refill_cause\r
-+ move.d $r2, [$acr] ; refill_count = 1\r
-+ move $s3, $r0 ; Get rw_mm_cause\r
-+ ba 3b ; Continue normal processing\r
-+ move.d $r0,[$r1] ; last_refill_cause = rw_mm_cause\r
-+\r
-+6: ; rw_mm_cause == last_refill_cause\r
-+ move.d [$acr], $r2 ; Get refill_count\r
-+ cmpq 4, $r2 ; refill_count > 4 ?\r
-+ bhi 7f ; yes\r
-+ addq 1, $r2 ; refill_count++
-+ ba 3b ; Continue normal processing
-+ move.d $r2, [$acr]
-+\r
-+7: ; refill_count > 4, error
-+ subq 4, $sp\r
-+ move $srp, [$sp]
-+ jsr __flush_tlb_all
-+ move.d $acr, $r0 ; Save pointer to refill_count
-+ move [$sp+], $srp
-+ clear.d [$r0] ; refill_count = 0
-+ movem [$sp], $r2
-+ ba 4b ; Return
-+ addq 12, $sp
-+\r
-+8: ; PMD missing, let the mm subsystem fix it up.
-+ movem [$sp], $r2 ; Restore r0-r2
-+9: ; PTE missing, let the mm subsystem fix it up.
-+ addq 12, $sp
- move.d [$sp+], $acr
- move [$sp], $srs
- addq 4, $sp
-@@ -128,7 +191,7 @@
- ba ret_from_intr
- nop
- .endm
--
-+
- ; This is the MMU bus fault handlers.
-
- MMU_REFILL_HANDLER i_mmu_refill, 1
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/tlb.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/tlb.c
---- linux-2.6.19.2.old/arch/cris/arch-v32/mm/tlb.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/tlb.c 2006-08-07 12:06:44.000000000 +0200
-@@ -2,7 +2,7 @@
- * Low level TLB handling.
- *
- * Copyright (C) 2000-2003, Axis Communications AB.
-- *
-+ *
- * Authors: Bjorn Wesen <bjornw@axis.com>
- * Tobias Anderberg <tobiasa@axis.com>, CRISv32 port.
- */
-@@ -79,7 +79,7 @@
- void
- __flush_tlb_mm(struct mm_struct *mm)
- {
-- int i;
-+ int i;
- int mmu;
- unsigned long flags;
- unsigned long page_id;
-@@ -90,7 +90,7 @@
-
- if (page_id == NO_CONTEXT)
- return;
--
-+
- /* Mark the TLB entries that match the page_id as invalid. */
- local_save_flags(flags);
- local_irq_disable();
-@@ -99,15 +99,15 @@
- SUPP_BANK_SEL(mmu);
- for (i = 0; i < NUM_TLB_ENTRIES; i++) {
- UPDATE_TLB_SEL_IDX(i);
--
-+
- /* Get the page_id */
- SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);
-
- /* Check if the page_id match. */
- if ((tlb_hi & 0xff) == page_id) {
- mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid,
-- INVALID_PAGEID)
-- | REG_FIELD(mmu, rw_mm_tlb_hi, vpn,
-+ INVALID_PAGEID)
-+ | REG_FIELD(mmu, rw_mm_tlb_hi, vpn,
- i & 0xf));
-
- UPDATE_TLB_HILO(mmu_tlb_hi, 0);
-@@ -135,7 +135,7 @@
- return;
-
- addr &= PAGE_MASK;
--
-+
- /*
- * Invalidate those TLB entries that match both the mm context and the
- * requested virtual address.
-@@ -150,11 +150,11 @@
- SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);
-
- /* Check if page_id and address matches */
-- if (((tlb_hi & 0xff) == page_id) &&
-+ if (((tlb_hi & 0xff) == page_id) &&
- ((tlb_hi & PAGE_MASK) == addr)) {
- mmu_tlb_hi = REG_FIELD(mmu, rw_mm_tlb_hi, pid,
- INVALID_PAGEID) | addr;
--
-+
- UPDATE_TLB_HILO(mmu_tlb_hi, 0);
- }
- }
-@@ -178,33 +178,35 @@
- static DEFINE_SPINLOCK(mmu_context_lock);
-
- /* Called in schedule() just before actually doing the switch_to. */
--void
-+void
- switch_mm(struct mm_struct *prev, struct mm_struct *next,
- struct task_struct *tsk)
--{
-- int cpu = smp_processor_id();
--
-- /* Make sure there is a MMU context. */
-- spin_lock(&mmu_context_lock);
-- get_mmu_context(next);
-- cpu_set(cpu, next->cpu_vm_mask);
-- spin_unlock(&mmu_context_lock);
--
-- /*
-- * Remember the pgd for the fault handlers. Keep a seperate copy of it
-- * because current and active_mm might be invalid at points where
-- * there's still a need to derefer the pgd.
-- */
-- per_cpu(current_pgd, cpu) = next->pgd;
--
-- /* Switch context in the MMU. */
-- if (tsk && task_thread_info(tsk))
-- {
-- SPEC_REG_WR(SPEC_REG_PID, next->context.page_id | task_thread_info(tsk)->tls);
-- }
-- else
-- {
-- SPEC_REG_WR(SPEC_REG_PID, next->context.page_id);
-- }
-+{
-+ if (prev != next) {
-+ int cpu = smp_processor_id();
-+
-+ /* Make sure there is a MMU context. */
-+ spin_lock(&mmu_context_lock);
-+ get_mmu_context(next);
-+ cpu_set(cpu, next->cpu_vm_mask);
-+ spin_unlock(&mmu_context_lock);
-+
-+ /*
-+ * Remember the pgd for the fault handlers. Keep a seperate copy of it
-+ * because current and active_mm might be invalid at points where
-+ * there's still a need to derefer the pgd.
-+ */
-+ per_cpu(current_pgd, cpu) = next->pgd;
-+
-+ /* Switch context in the MMU. */
-+ if (tsk && task_thread_info(tsk))
-+ {
-+ SPEC_REG_WR(SPEC_REG_PID, next->context.page_id | task_thread_info(tsk)->tls);
-+ }
-+ else
-+ {
-+ SPEC_REG_WR(SPEC_REG_PID, next->context.page_id);
-+ }
-+ }
- }
-
-diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/vmlinux.lds.S linux-2.6.19.2.dev/arch/cris/arch-v32/vmlinux.lds.S
---- linux-2.6.19.2.old/arch/cris/arch-v32/vmlinux.lds.S 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/arch-v32/vmlinux.lds.S 2006-10-13 14:43:11.000000000 +0200
-@@ -5,11 +5,11 @@
- * script. It is for example quite vital that all generated sections
- * that are used are actually named here, otherwise the linker will
- * put them at the end, where the init stuff is which is FREED after
-- * the kernel has booted.
-- */
-+ * the kernel has booted.
-+ */
-
- #include <asm-generic/vmlinux.lds.h>
--
-+
- jiffies = jiffies_64;
- SECTIONS
- {
-@@ -20,7 +20,7 @@
- /* The boot section is only necessary until the VCS top level testbench */
- /* includes both flash and DRAM. */
- .boot : { *(.boot) }
--
-+
- . = DRAM_VIRTUAL_BASE + 0x4000; /* See head.S and pages reserved at the start. */
-
- _text = .; /* Text and read-only data. */
-@@ -35,7 +35,7 @@
- *(.text.__*)
- }
-
-- _etext = . ; /* End of text section. */
-+ _etext = . ; /* End of text section. */
- __etext = .;
-
- . = ALIGN(4); /* Exception table. */
-@@ -59,7 +59,7 @@
-
- . = ALIGN(8192); /* Init code and data. */
- __init_begin = .;
-- .init.text : {
-+ .init.text : {
- _sinittext = .;
- *(.init.text)
- _einittext = .;
-@@ -81,7 +81,7 @@
- *(.initcall5.init);
- *(.initcall6.init);
- *(.initcall7.init);
-- __initcall_end = .;
-+ __initcall_end = .;
- }
-
- .con_initcall.init : {
-@@ -94,20 +94,20 @@
- __per_cpu_start = .;
- .data.percpu : { *(.data.percpu) }
- __per_cpu_end = .;
--
-+
- .init.ramfs : {
- __initramfs_start = .;
- *(.init.ramfs)
- __initramfs_end = .;
-- /*
-+ /*
- * We fill to the next page, so we can discard all init
- * pages without needing to consider what payload might be
- * appended to the kernel image.
- */
-- FILL (0);
-+ FILL (0);
- . = ALIGN (8192);
- }
--
-+
- __vmlinux_end = .; /* Last address of the physical file. */
- __init_end = .;
-
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/crisksyms.c linux-2.6.19.2.dev/arch/cris/kernel/crisksyms.c
---- linux-2.6.19.2.old/arch/cris/kernel/crisksyms.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/crisksyms.c 2006-11-03 13:49:17.000000000 +0100
-@@ -9,7 +9,7 @@
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/tty.h>
--
-+
- #include <asm/semaphore.h>
- #include <asm/processor.h>
- #include <asm/uaccess.h>
-@@ -28,6 +28,7 @@
- extern void __ashldi3(void);
- extern void __ashrdi3(void);
- extern void __lshrdi3(void);
-+extern void __negdi2(void);
- extern void iounmap(volatile void * __iomem);
-
- /* Platform dependent support */
-@@ -35,18 +36,7 @@
- EXPORT_SYMBOL(get_cmos_time);
- EXPORT_SYMBOL(loops_per_usec);
-
--/* String functions */
--EXPORT_SYMBOL(memcmp);
--EXPORT_SYMBOL(memmove);
--EXPORT_SYMBOL(strstr);
--EXPORT_SYMBOL(strcpy);
--EXPORT_SYMBOL(strchr);
--EXPORT_SYMBOL(strcmp);
--EXPORT_SYMBOL(strlen);
--EXPORT_SYMBOL(strcat);
--EXPORT_SYMBOL(strncat);
--EXPORT_SYMBOL(strncmp);
--EXPORT_SYMBOL(strncpy);
-+EXPORT_SYMBOL(ktime_get_ts);
-
- /* Math functions */
- EXPORT_SYMBOL(__Udiv);
-@@ -56,6 +46,7 @@
- EXPORT_SYMBOL(__ashldi3);
- EXPORT_SYMBOL(__ashrdi3);
- EXPORT_SYMBOL(__lshrdi3);
-+EXPORT_SYMBOL(__negdi2);
-
- /* Memory functions */
- EXPORT_SYMBOL(__ioremap);
-@@ -85,4 +76,4 @@
- EXPORT_SYMBOL(del_fast_timer);
- EXPORT_SYMBOL(schedule_usleep);
- #endif
--
-+EXPORT_SYMBOL(csum_partial);
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/irq.c linux-2.6.19.2.dev/arch/cris/kernel/irq.c
---- linux-2.6.19.2.old/arch/cris/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/irq.c 2007-01-09 10:29:20.000000000 +0100
-@@ -92,14 +92,16 @@
- asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
- {
- unsigned long sp;
-+ struct pt_regs *old_regs = set_irq_regs(regs);
- irq_enter();
- sp = rdsp();
- if (unlikely((sp & (PAGE_SIZE - 1)) < (PAGE_SIZE/8))) {
- printk("do_IRQ: stack overflow: %lX\n", sp);
- show_stack(NULL, (unsigned long *)sp);
- }
-- __do_IRQ(irq, regs);
-+ __do_IRQ(irq);
- irq_exit();
-+ set_irq_regs(old_regs);
- }
-
- void weird_irq(void)
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/process.c linux-2.6.19.2.dev/arch/cris/kernel/process.c
---- linux-2.6.19.2.old/arch/cris/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/process.c 2006-06-25 17:00:10.000000000 +0200
-@@ -1,4 +1,4 @@
--/* $Id: process.c,v 1.21 2005/03/04 08:16:17 starvik Exp $
-+/* $Id: process.c,v 1.26 2006/06/25 15:00:10 starvik Exp $
- *
- * linux/arch/cris/kernel/process.c
- *
-@@ -8,6 +8,21 @@
- * Authors: Bjorn Wesen (bjornw@axis.com)
- *
- * $Log: process.c,v $
-+ * Revision 1.26 2006/06/25 15:00:10 starvik
-+ * Merge of Linux 2.6.17
-+ *
-+ * Revision 1.25 2006/03/22 09:56:56 starvik
-+ * Merge of Linux 2.6.16
-+ *
-+ * Revision 1.24 2006/01/04 06:09:48 starvik
-+ * Merge of Linux 2.6.15
-+ *
-+ * Revision 1.23 2005/08/29 07:32:19 starvik
-+ * Merge of 2.6.13
-+ *
-+ * Revision 1.22 2005/08/18 08:33:18 starvik
-+ * Corrected signature of machine_restart
-+ *
- * Revision 1.21 2005/03/04 08:16:17 starvik
- * Merge of Linux 2.6.11.
- *
-@@ -195,12 +210,18 @@
- */
- void (*pm_idle)(void);
-
-+extern void default_idle(void);
-+
-+void (*pm_power_off)(void);
-+EXPORT_SYMBOL(pm_power_off);
-+
- /*
- * The idle thread. There's no useful work to be
- * done, so just try to conserve power and have a
- * low exit latency (ie sit in a loop waiting for
- * somebody to say that they'd like to reschedule)
- */
-+
- void cpu_idle (void)
- {
- /* endless idle loop with no priority at all */
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/profile.c linux-2.6.19.2.dev/arch/cris/kernel/profile.c
---- linux-2.6.19.2.old/arch/cris/kernel/profile.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/profile.c 2004-10-05 08:22:44.000000000 +0200
-@@ -42,7 +42,7 @@
- return count;
- }
-
--static ssize_t
-+static ssize_t
- write_cris_profile(struct file *file, const char __user *buf,
- size_t count, loff_t *ppos)
- {
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/kernel/ptrace.c
---- linux-2.6.19.2.old/arch/cris/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/ptrace.c 2006-03-23 15:54:02.000000000 +0100
-@@ -8,6 +8,9 @@
- * Authors: Bjorn Wesen
- *
- * $Log: ptrace.c,v $
-+ * Revision 1.11 2006/03/23 14:54:02 starvik
-+ * Corrected signal handling.
-+ *
- * Revision 1.10 2004/09/22 11:50:01 orjanf
- * * Moved get_reg/put_reg to arch-specific files.
- * * Added functions to access debug registers (CRISv32).
-@@ -82,13 +85,13 @@
- /* notification of userspace execution resumption
- * - triggered by current->work.notify_resume
- */
--extern int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs);
-+extern int do_signal(int canrestart, struct pt_regs *regs);
-
-
--void do_notify_resume(int canrestart, sigset_t *oldset, struct pt_regs *regs,
-+void do_notify_resume(int canrestart, struct pt_regs *regs,
- __u32 thread_info_flags )
- {
- /* deal with pending signal delivery */
- if (thread_info_flags & _TIF_SIGPENDING)
-- do_signal(canrestart,oldset,regs);
-+ do_signal(canrestart,regs);
- }
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/semaphore.c linux-2.6.19.2.dev/arch/cris/kernel/semaphore.c
---- linux-2.6.19.2.old/arch/cris/kernel/semaphore.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/semaphore.c 2005-10-31 09:48:05.000000000 +0100
-@@ -4,7 +4,7 @@
- */
-
- #include <linux/sched.h>
--#include <linux/init.h>
-+#include <asm/semaphore.h>
- #include <asm/semaphore-helper.h>
-
- /*
-@@ -95,6 +95,7 @@
- tsk->state = TASK_RUNNING; \
- remove_wait_queue(&sem->wait, &wait);
-
-+
- void __sched __down(struct semaphore * sem)
- {
- DOWN_VAR
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/setup.c linux-2.6.19.2.dev/arch/cris/kernel/setup.c
---- linux-2.6.19.2.old/arch/cris/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/setup.c 2007-01-09 10:29:20.000000000 +0100
-@@ -18,7 +18,7 @@
- #include <linux/screen_info.h>
- #include <linux/utsname.h>
- #include <linux/pfn.h>
--
-+#include <linux/cpu.h>
- #include <asm/setup.h>
-
- /*
-@@ -36,6 +36,8 @@
-
- extern unsigned long romfs_start, romfs_length, romfs_in_flash; /* from head.S */
-
-+static struct cpu cpu_devices[NR_CPUS];
-+
- extern void show_etrax_copyright(void); /* arch-vX/kernel/setup.c */
-
- /* This mainly sets up the memory area, and can be really confusing.
-@@ -187,4 +189,14 @@
- .show = show_cpuinfo,
- };
-
-+static int __init topology_init(void)
-+{
-+ int i;
-+
-+ for_each_possible_cpu(i) {
-+ return register_cpu(&cpu_devices[i], i);
-+ }
-+}
-+
-+subsys_initcall(topology_init);
-
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/sys_cris.c linux-2.6.19.2.dev/arch/cris/kernel/sys_cris.c
---- linux-2.6.19.2.old/arch/cris/kernel/sys_cris.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/sys_cris.c 2007-01-09 10:29:20.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: sys_cris.c,v 1.6 2004/03/11 11:38:40 starvik Exp $
-+/* $Id: sys_cris.c,v 1.7 2007/01/09 09:29:20 starvik Exp $
- *
- * linux/arch/cris/kernel/sys_cris.c
- *
-@@ -172,3 +172,4 @@
- return -ENOSYS;
- }
- }
-+
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/time.c linux-2.6.19.2.dev/arch/cris/kernel/time.c
---- linux-2.6.19.2.old/arch/cris/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/time.c 2007-01-09 10:29:20.000000000 +0100
-@@ -1,4 +1,4 @@
--/* $Id: time.c,v 1.18 2005/03/04 08:16:17 starvik Exp $
-+/* $Id: time.c,v 1.23 2007/01/09 09:29:20 starvik Exp $
- *
- * linux/arch/cris/kernel/time.c
- *
-@@ -172,10 +172,6 @@
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
-
-- printk(KERN_DEBUG
-- "rtc: sec 0x%x min 0x%x hour 0x%x day 0x%x mon 0x%x year 0x%x\n",
-- sec, min, hour, day, mon, year);
--
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
-@@ -208,11 +204,11 @@
- cris_do_profile(struct pt_regs* regs)
- {
-
--#if CONFIG_SYSTEM_PROFILER
-+#ifdef CONFIG_SYSTEM_PROFILER
- cris_profile_sample(regs);
- #endif
-
--#if CONFIG_PROFILING
-+#ifdef CONFIG_PROFILING
- profile_tick(CPU_PROFILING, regs);
- #endif
- }
-@@ -222,10 +218,15 @@
- */
- unsigned long long sched_clock(void)
- {
-- return (unsigned long long)jiffies * (1000000000 / HZ);
-+ unsigned long long ns;
-+
-+ ns = jiffies;
-+ ns *= 1000000000 / HZ;
-+ ns += get_ns_in_jiffie();
-+ return ns;
- }
-
--static int
-+static int
- __init init_udelay(void)
- {
- loops_per_usec = (loops_per_jiffy * HZ) / 1000000;
-diff -urN linux-2.6.19.2.old/arch/cris/kernel/traps.c linux-2.6.19.2.dev/arch/cris/kernel/traps.c
---- linux-2.6.19.2.old/arch/cris/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/kernel/traps.c 2006-12-11 14:04:23.000000000 +0100
-@@ -1,66 +1,78 @@
--/* $Id: traps.c,v 1.11 2005/01/24 16:03:19 orjanf Exp $
-- *
-+/*
- * linux/arch/cris/traps.c
- *
-- * Here we handle the break vectors not used by the system call
-- * mechanism, as well as some general stack/register dumping
-+ * Here we handle the break vectors not used by the system call
-+ * mechanism, as well as some general stack/register dumping
- * things.
-- *
-- * Copyright (C) 2000-2002 Axis Communications AB
-+ *
-+ * Copyright (C) 2000-2006 Axis Communications AB
- *
- * Authors: Bjorn Wesen
-- * Hans-Peter Nilsson
-+ * Hans-Peter Nilsson
- *
- */
-
- #include <linux/init.h>
- #include <linux/module.h>
-+
- #include <asm/pgtable.h>
- #include <asm/uaccess.h>
-
-+extern void arch_enable_nmi(void);
-+extern void stop_watchdog(void);
-+extern void reset_watchdog(void);
-+extern void show_registers(struct pt_regs *regs);
-+
-+#ifdef CONFIG_DEBUG_BUGVERBOSE
-+extern void handle_BUG(struct pt_regs *regs);
-+#else
-+#define handle_BUG(regs)
-+#endif
-+
- static int kstack_depth_to_print = 24;
-
--extern int raw_printk(const char *fmt, ...);
-+void (*nmi_handler)(struct pt_regs*);
-
--void show_trace(unsigned long * stack)
-+void
-+show_trace(unsigned long *stack)
- {
- unsigned long addr, module_start, module_end;
- extern char _stext, _etext;
- int i;
-
-- raw_printk("\nCall Trace: ");
-+ printk("\nCall Trace: ");
-
-- i = 1;
-- module_start = VMALLOC_START;
-- module_end = VMALLOC_END;
-+ i = 1;
-+ module_start = VMALLOC_START;
-+ module_end = VMALLOC_END;
-
-- while (((long) stack & (THREAD_SIZE-1)) != 0) {
-- if (__get_user (addr, stack)) {
-+ while (((long)stack & (THREAD_SIZE-1)) != 0) {
-+ if (__get_user(addr, stack)) {
- /* This message matches "failing address" marked
- s390 in ksymoops, so lines containing it will
- not be filtered out by ksymoops. */
-- raw_printk ("Failing address 0x%lx\n", (unsigned long)stack);
-+ printk("Failing address 0x%lx\n", (unsigned long)stack);
- break;
- }
- stack++;
-
-- /*
-- * If the address is either in the text segment of the
-- * kernel, or in the region which contains vmalloc'ed
-- * memory, it *may* be the address of a calling
-- * routine; if so, print it so that someone tracing
-- * down the cause of the crash will be able to figure
-- * out the call path that was taken.
-- */
-- if (((addr >= (unsigned long) &_stext) &&
-- (addr <= (unsigned long) &_etext)) ||
-- ((addr >= module_start) && (addr <= module_end))) {
-- if (i && ((i % 8) == 0))
-- raw_printk("\n ");
-- raw_printk("[<%08lx>] ", addr);
-- i++;
-- }
-- }
-+ /*
-+ * If the address is either in the text segment of the
-+ * kernel, or in the region which contains vmalloc'ed
-+ * memory, it *may* be the address of a calling
-+ * routine; if so, print it so that someone tracing
-+ * down the cause of the crash will be able to figure
-+ * out the call path that was taken.
-+ */
-+ if (((addr >= (unsigned long)&_stext) &&
-+ (addr <= (unsigned long)&_etext)) ||
-+ ((addr >= module_start) && (addr <= module_end))) {
-+ if (i && ((i % 8) == 0))
-+ printk("\n ");
-+ printk("[<%08lx>] ", addr);
-+ i++;
-+ }
-+ }
- }
-
- /*
-@@ -78,109 +90,150 @@
- * with the ksymoops maintainer.
- */
-
--void
-+void
- show_stack(struct task_struct *task, unsigned long *sp)
- {
-- unsigned long *stack, addr;
-- int i;
-+ unsigned long *stack, addr;
-+ int i;
-
- /*
- * debugging aid: "show_stack(NULL);" prints a
- * back trace.
- */
-
-- if(sp == NULL) {
-+ if (sp == NULL) {
- if (task)
- sp = (unsigned long*)task->thread.ksp;
- else
- sp = (unsigned long*)rdsp();
- }
-
-- stack = sp;
-+ stack = sp;
-
-- raw_printk("\nStack from %08lx:\n ", (unsigned long)stack);
-- for(i = 0; i < kstack_depth_to_print; i++) {
-- if (((long) stack & (THREAD_SIZE-1)) == 0)
-- break;
-- if (i && ((i % 8) == 0))
-- raw_printk("\n ");
-- if (__get_user (addr, stack)) {
-+ printk("\nStack from %08lx:\n ", (unsigned long)stack);
-+ for (i = 0; i < kstack_depth_to_print; i++) {
-+ if (((long)stack & (THREAD_SIZE-1)) == 0)
-+ break;
-+ if (i && ((i % 8) == 0))
-+ printk("\n ");
-+ if (__get_user(addr, stack)) {
- /* This message matches "failing address" marked
- s390 in ksymoops, so lines containing it will
- not be filtered out by ksymoops. */
-- raw_printk ("Failing address 0x%lx\n", (unsigned long)stack);
-+ printk("Failing address 0x%lx\n", (unsigned long)stack);
- break;
- }
- stack++;
-- raw_printk("%08lx ", addr);
-- }
-+ printk("%08lx ", addr);
-+ }
- show_trace(sp);
- }
-
--static void (*nmi_handler)(struct pt_regs*);
--extern void arch_enable_nmi(void);
-+#if 0
-+/* displays a short stack trace */
-
--void set_nmi_handler(void (*handler)(struct pt_regs*))
-+int
-+show_stack(void)
- {
-- nmi_handler = handler;
-- arch_enable_nmi();
-+ unsigned long *sp = (unsigned long *)rdusp();
-+ int i;
-+
-+ printk("Stack dump [0x%08lx]:\n", (unsigned long)sp);
-+ for (i = 0; i < 16; i++)
-+ printk("sp + %d: 0x%08lx\n", i*4, sp[i]);
-+ return 0;
- }
-+#endif
-
--void handle_nmi(struct pt_regs* regs)
-+void
-+dump_stack(void)
- {
-- if (nmi_handler)
-- nmi_handler(regs);
-+ show_stack(NULL, NULL);
-+}
-+
-+EXPORT_SYMBOL(dump_stack);
-+
-+void
-+set_nmi_handler(void (*handler)(struct pt_regs*))
-+{
-+ nmi_handler = handler;
-+ arch_enable_nmi();
- }
-
- #ifdef CONFIG_DEBUG_NMI_OOPS
--void oops_nmi_handler(struct pt_regs* regs)
-+void
-+oops_nmi_handler(struct pt_regs* regs)
- {
-- stop_watchdog();
-- raw_printk("NMI!\n");
-- show_registers(regs);
-+ stop_watchdog();
-+ oops_in_progress = 1;
-+ printk("NMI!\n");
-+ show_registers(regs);
-+ oops_in_progress = 0;
- }
-
--static int
--__init oops_nmi_register(void)
-+static int __init
-+oops_nmi_register(void)
- {
-- set_nmi_handler(oops_nmi_handler);
-- return 0;
-+ set_nmi_handler(oops_nmi_handler);
-+ return 0;
- }
-
- __initcall(oops_nmi_register);
-
- #endif
-
--#if 0
--/* displays a short stack trace */
--
--int
--show_stack()
-+/*
-+ * This gets called from entry.S when the watchdog has bitten. Show something
-+ * similiar to an Oops dump, and if the kernel is configured to be a nice
-+ * doggy, then halt instead of reboot.
-+ */
-+void
-+watchdog_bite_hook(struct pt_regs *regs)
- {
-- unsigned long *sp = (unsigned long *)rdusp();
-- int i;
-- raw_printk("Stack dump [0x%08lx]:\n", (unsigned long)sp);
-- for(i = 0; i < 16; i++)
-- raw_printk("sp + %d: 0x%08lx\n", i*4, sp[i]);
-- return 0;
--}
-+#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-+ local_irq_disable();
-+ stop_watchdog();
-+ show_registers(regs);
-+
-+ while (1)
-+ ; /* Do nothing. */
-+#else
-+ show_registers(regs);
- #endif
-+}
-
--void dump_stack(void)
-+/* This is normally the Oops function. */
-+void
-+die_if_kernel(const char *str, struct pt_regs *regs, long err)
- {
-- show_stack(NULL, NULL);
--}
-+ if (user_mode(regs))
-+ return;
-
--EXPORT_SYMBOL(dump_stack);
-+#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-+ /*
-+ * This printout might take too long and could trigger
-+ * the watchdog normally. If NICE_DOGGY is set, simply
-+ * stop the watchdog during the printout.
-+ */
-+ stop_watchdog();
-+#endif
-
--void __init
--trap_init(void)
--{
-- /* Nothing needs to be done */
-+ handle_BUG(regs);
-+
-+ printk("%s: %04lx\n", str, err & 0xffff);
-+
-+ show_registers(regs);
-+
-+ oops_in_progress = 0;
-+
-+#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
-+ reset_watchdog();
-+#endif
-+ do_exit(SIGSEGV);
- }
-
--void spinning_cpu(void* addr)
-+void __init
-+trap_init(void)
- {
-- raw_printk("CPU %d spinning on %X\n", smp_processor_id(), addr);
-- dump_stack();
-+ /* Nothing needs to be done */
- }
-diff -urN linux-2.6.19.2.old/arch/cris/mm/fault.c linux-2.6.19.2.dev/arch/cris/mm/fault.c
---- linux-2.6.19.2.old/arch/cris/mm/fault.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/mm/fault.c 2006-09-29 13:14:06.000000000 +0200
-@@ -1,11 +1,27 @@
- /*
- * linux/arch/cris/mm/fault.c
- *
-- * Copyright (C) 2000, 2001 Axis Communications AB
-+ * Copyright (C) 2000-2006 Axis Communications AB
-+ *
-+ * Authors: Bjorn Wesen
- *
-- * Authors: Bjorn Wesen
-- *
- * $Log: fault.c,v $
-+ * Revision 1.25 2006/09/29 11:14:06 orjanf
-+ * * Use arch-independent macro to get irp/erp for v10/v32.
-+ *
-+ * Revision 1.24 2006/09/29 10:58:09 orjanf
-+ * * Added user mode SIGSEGV printk.
-+ *
-+ * Revision 1.23 2006/06/20 07:42:56 pkj
-+ * Removed an unnecessary reference to raw_printk().
-+ *
-+ * Revision 1.22 2005/08/29 07:32:20 starvik
-+ * Merge of 2.6.13
-+ *
-+ * Revision 1.21 2005/07/02 12:29:37 starvik
-+ * Use the generic oops_in_progress instead of the raw_printk hack.
-+ * Moved some functions to achr-independent code.
-+ *
- * Revision 1.20 2005/03/04 08:16:18 starvik
- * Merge of Linux 2.6.11.
- *
-@@ -135,7 +151,6 @@
-
- extern int find_fixup_code(struct pt_regs *);
- extern void die_if_kernel(const char *, struct pt_regs *, long);
--extern int raw_printk(const char *fmt, ...);
-
- /* debug of low-level TLB reload */
- #undef DEBUG
-@@ -164,8 +179,8 @@
- * address.
- *
- * error_code:
-- * bit 0 == 0 means no page found, 1 means protection fault
-- * bit 1 == 0 means read, 1 means write
-+ * bit 0 == 0 means no page found, 1 means protection fault
-+ * bit 1 == 0 means read, 1 means write
- *
- * If this routine detects a bad access, it returns 1, otherwise it
- * returns 0.
-@@ -180,9 +195,9 @@
- struct vm_area_struct * vma;
- siginfo_t info;
-
-- D(printk("Page fault for %lX on %X at %lX, prot %d write %d\n",
-- address, smp_processor_id(), instruction_pointer(regs),
-- protection, writeaccess));
-+ D(printk("Page fault for %lX on %X at %lX, prot %d write %d\n",
-+ address, smp_processor_id(), instruction_pointer(regs),
-+ protection, writeaccess));
-
- tsk = current;
-
-@@ -318,6 +333,8 @@
- /* info.si_code has been set above */
- info.si_addr = (void *)address;
- force_sig_info(SIGSEGV, &info, tsk);
-+ printk(KERN_NOTICE "%s (pid %d) segfaults for page address %08lx at pc %08lx\n",
-+ tsk->comm, tsk->pid, address, instruction_pointer(regs));
- return;
- }
-
-@@ -325,7 +342,7 @@
-
- /* Are we prepared to handle this kernel fault?
- *
-- * (The kernel has valid exception-points in the source
-+ * (The kernel has valid exception-points in the source
- * when it acesses user-memory. When it fails in one
- * of those points, we find it in a table and do a jump
- * to some fixup code that loads an appropriate error
-@@ -340,13 +357,17 @@
- * terminate things with extreme prejudice.
- */
-
-- if ((unsigned long) (address) < PAGE_SIZE)
-- raw_printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
-- else
-- raw_printk(KERN_ALERT "Unable to handle kernel access");
-- raw_printk(" at virtual address %08lx\n",address);
-+ if (!oops_in_progress) {
-+ oops_in_progress = 1;
-+ if ((unsigned long) (address) < PAGE_SIZE)
-+ printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
-+ else
-+ printk(KERN_ALERT "Unable to handle kernel access");
-+ printk(" at virtual address %08lx\n",address);
-
-- die_if_kernel("Oops", regs, (writeaccess << 1) | protection);
-+ die_if_kernel("Oops", regs, (writeaccess << 1) | protection);
-+ oops_in_progress = 0;
-+ }
-
- do_exit(SIGKILL);
-
-@@ -405,8 +426,8 @@
- /* Since we're two-level, we don't need to do both
- * set_pgd and set_pmd (they do the same thing). If
- * we go three-level at some point, do the right thing
-- * with pgd_present and set_pgd here.
-- *
-+ * with pgd_present and set_pgd here.
-+ *
- * Also, since the vmalloc area is global, we don't
- * need to copy individual PTE's, it is enough to
- * copy the pgd pointer into the pte page of the
-diff -urN linux-2.6.19.2.old/arch/cris/mm/init.c linux-2.6.19.2.dev/arch/cris/mm/init.c
---- linux-2.6.19.2.old/arch/cris/mm/init.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/arch/cris/mm/init.c 2006-06-25 17:00:10.000000000 +0200
-@@ -7,6 +7,15 @@
- * Authors: Bjorn Wesen (bjornw@axis.com)
- *
- * $Log: init.c,v $
-+ * Revision 1.14 2006/06/25 15:00:10 starvik
-+ * Merge of Linux 2.6.17
-+ *
-+ * Revision 1.13 2005/06/20 05:30:00 starvik
-+ * Remove unnecessary diff to kernel.org tree
-+ *
-+ * Revision 1.12 2004/08/16 12:37:24 starvik
-+ * Merge of Linux 2.6.8
-+ *
- * Revision 1.11 2004/05/28 09:28:56 starvik
- * Calculation of loops_per_usec moved because initalization order has changed
- * in Linux 2.6.
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/drivers/ide/cris/ide-cris.c linux-2.6.19.2.dev/drivers/ide/cris/ide-cris.c
---- linux-2.6.19.2.orig/drivers/ide/cris/ide-cris.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/ide/cris/ide-cris.c 2006-12-06 14:17:02.000000000 +0100
-@@ -1,8 +1,8 @@
--/* $Id: cris-ide-driver.patch,v 1.1 2005/06/29 21:39:07 akpm Exp $
-+/* $Id: ide-cris.c,v 1.10 2006/12/06 13:17:02 starvik Exp $
- *
- * Etrax specific IDE functions, like init and PIO-mode setting etc.
- * Almost the entire ide.c is used for the rest of the Etrax ATA driver.
-- * Copyright (c) 2000-2005 Axis Communications AB
-+ * Copyright (c) 2000-2006 Axis Communications AB
- *
- * Authors: Bjorn Wesen (initial version)
- * Mikael Starvik (crisv32 port)
-@@ -43,8 +43,8 @@
-
- #define IDE_REGISTER_TIMEOUT 300
-
--#define LOWDB(x)
--#define D(x)
-+#define LOWDB(x)
-+#define D(x)
-
- enum /* Transfer types */
- {
-@@ -88,12 +88,50 @@
- #define ATA_PIO0_STROBE 39
- #define ATA_PIO0_HOLD 9
-
--int
-+/*
-+ * On ETRAX FS, an interrupt remains latched and active until ack:ed.
-+ * Further, ATA acks are without effect as long as INTRQ is asserted, as the
-+ * corresponding ATA interrupt is continuously set to active. There will be a
-+ * clearing ack at the usual cris_ide_ack_intr call, but that serves just to
-+ * gracefully handle an actual spurious interrupt or similar situation (which
-+ * will cause an early return without further actions, see the ide_intr
-+ * function).
-+ *
-+ * However, the normal case at time of this writing is that nothing has
-+ * changed from when INTRQ was asserted until the cris_ide_ack_intr call; no
-+ * ATA registers written and no status register read, so INTRQ will *remain*
-+ * asserted, thus *another* interrupt will be latched, and will be seen as a
-+ * spurious interrupt after the "real" interrupt is serviced. With lots of
-+ * ATA traffic (as in a trivial file-copy between two drives), this will trig
-+ * the condition desc->irqs_unhandled > 99900 in
-+ * kernel/irq/spurious.c:note_interrupt and the system will halt.
-+ *
-+ * To actually get rid of the interrupt corresponding to the current INTRQ
-+ * assertion, we make a second ack after the next ATA register read or write;
-+ * i.e. when INTRQ must be deasserted. At that time, we don't have the hwif
-+ * pointer available, so we need to stash a local copy (safe, because it'll be
-+ * set and cleared within the same spin_lock_irqsave region). The pointer
-+ * serves doubly as a boolean flag that an ack is needed. The caller must
-+ * NULL the pointer after the "second ack".
-+ */
-+
-+static ide_hwif_t *hwif_to_ack;
-+
-+static int
- cris_ide_ack_intr(ide_hwif_t* hwif)
- {
-- reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,
-+ /*
-+ * The interrupt is shared so we need to find the interface bit number
-+ * to ack. We define the ATA I/O register addresses to have the
-+ * format of ata rw_ctrl2 register contents, conveniently holding this
-+ * number.
-+ */
-+ reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,
- int, hwif->io_ports[0]);
- REG_WR_INT(ata, regi_ata, rw_ack_intr, 1 << ctrl2.sel);
-+
-+ /* Prepare to ack again, see above. */
-+ hwif_to_ack = hwif;
- return 1;
- }
-
-@@ -122,8 +160,24 @@
-
- static void
- cris_ide_write_command(unsigned long command)
--{
-+{
- REG_WR_INT(ata, regi_ata, rw_ctrl2, command); /* write data to the drive's register */
-+
-+ /*
-+ * Perform a pending ack if needed; see hwif_ack definition. Perhaps
-+ * we should check closer that this call is really a part of the
-+ * preparation to read the ATA status register or write to the ATA
-+ * command register (causing deassert of INTRQ; see the ATA standard),
-+ * but at time of this writing (and expected to sanely remain so), the
-+ * first ATA register activity after an cris_ide_ack_intr call is
-+ * certain to do exactly that.
-+ */
-+ if (hwif_to_ack) {
-+ /* The drive may take this long to deassert INTRQ. */
-+ ndelay(400);
-+ cris_ide_ack_intr(hwif_to_ack);
-+ hwif_to_ack = NULL;
-+ }
- }
-
- static void
-@@ -160,8 +214,8 @@
- {
- reg_ata_rw_ctrl2 ctrl2 = {0};
- ctrl2.addr = addr;
-- ctrl2.cs1 = cs1;
-- ctrl2.cs0 = cs0;
-+ ctrl2.cs1 = !cs1;
-+ ctrl2.cs0 = !cs0;
- return REG_TYPE_CONV(int, reg_ata_rw_ctrl2, ctrl2);
- }
-
-@@ -184,14 +238,14 @@
-
- intr_mask.bus0 = regk_ata_yes;
- intr_mask.bus1 = regk_ata_yes;
-- intr_mask.bus2 = regk_ata_yes;
-+ intr_mask.bus2 = regk_ata_yes;
- intr_mask.bus3 = regk_ata_yes;
-
- REG_WR(ata, regi_ata, rw_intr_mask, intr_mask);
-
- crisv32_request_dma(2, "ETRAX FS built-in ATA", DMA_VERBOSE_ON_ERROR, 0, dma_ata);
- crisv32_request_dma(3, "ETRAX FS built-in ATA", DMA_VERBOSE_ON_ERROR, 0, dma_ata);
--
-+
- crisv32_pinmux_alloc_fixed(pinmux_ata);
- crisv32_pinmux_alloc_fixed(pinmux_ata0);
- crisv32_pinmux_alloc_fixed(pinmux_ata1);
-@@ -204,14 +258,15 @@
- DMA_ENABLE(regi_dma3);
-
- DMA_WR_CMD (regi_dma2, regk_dma_set_w_size2);
-- DMA_WR_CMD (regi_dma3, regk_dma_set_w_size2);
-+ DMA_WR_CMD (regi_dma3, regk_dma_set_w_size2);
- }
-
- static dma_descr_context mycontext __attribute__ ((__aligned__(32)));
-
- #define cris_dma_descr_type dma_descr_data
--#define cris_pio_read regk_ata_rd
--#define cris_ultra_mask 0x7
-+#define cris_pio_read (regk_ata_rd << 24)
-+#define cris_ultra_mask 0x0 /* 0x7 for UDMA */
-+#define IRQ ATA_INTR_VECT
- #define MAX_DESCR_SIZE 0xffffffffUL
-
- static unsigned long
-@@ -226,6 +281,8 @@
- d->buf = (char*)virt_to_phys(buf);
- d->after = d->buf + len;
- d->eol = last;
-+ /* assume descriptors are consecutively placed in memory */
-+ d->next = last ? 0 : (cris_dma_descr_type*)virt_to_phys(d+1);
- }
-
- static void
-@@ -237,8 +294,10 @@
- mycontext.saved_data = (dma_descr_data*)virt_to_phys(d);
- mycontext.saved_data_buf = d->buf;
- /* start the dma channel */
-+ if (dir)
-+ flush_dma_context(&mycontext); // Cache bug workaround
- DMA_START_CONTEXT(dir ? regi_dma3 : regi_dma2, virt_to_phys(&mycontext));
--
-+
- /* initiate a multi word dma read using PIO handshaking */
- trf_cnt.cnt = len >> 1;
- /* Due to a "feature" the transfer count has to be one extra word for UDMA. */
-@@ -248,7 +307,7 @@
-
- ctrl2.rw = dir ? regk_ata_rd : regk_ata_wr;
- ctrl2.trf_mode = regk_ata_dma;
-- ctrl2.hsh = type == TYPE_PIO ? regk_ata_pio :
-+ ctrl2.hsh = type == TYPE_PIO ? regk_ata_pio :
- type == TYPE_DMA ? regk_ata_dma : regk_ata_udma;
- ctrl2.multi = regk_ata_yes;
- ctrl2.dma_size = regk_ata_word;
-@@ -339,7 +398,7 @@
- #define ATA_PIO0_STROBE 19
- #define ATA_PIO0_HOLD 4
-
--int
-+int
- cris_ide_ack_intr(ide_hwif_t* hwif)
- {
- return 1;
-@@ -348,13 +407,13 @@
- static inline int
- cris_ide_busy(void)
- {
-- return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy) ;
-+ return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy) ;
- }
-
- static inline int
- cris_ide_ready(void)
- {
-- return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, tr_rdy) ;
-+ return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, tr_rdy) ;
- }
-
- static inline int
-@@ -364,12 +423,12 @@
- *data = (unsigned short)status;
- return status & IO_MASK(R_ATA_STATUS_DATA, dav);
- }
--
-+
- static void
- cris_ide_write_command(unsigned long command)
- {
-- *R_ATA_CTRL_DATA = command;
--}
-+ *R_ATA_CTRL_DATA = command;
-+}
-
- static void
- cris_ide_set_speed(int type, int setup, int strobe, int hold)
-@@ -406,8 +465,8 @@
- cris_ide_reg_addr(unsigned long addr, int cs0, int cs1)
- {
- return IO_FIELD(R_ATA_CTRL_DATA, addr, addr) |
-- IO_FIELD(R_ATA_CTRL_DATA, cs0, cs0) |
-- IO_FIELD(R_ATA_CTRL_DATA, cs1, cs1);
-+ IO_FIELD(R_ATA_CTRL_DATA, cs0, cs0 ? 0 : 1) |
-+ IO_FIELD(R_ATA_CTRL_DATA, cs1, cs1 ? 0 : 1);
- }
-
- static __init void
-@@ -484,6 +543,7 @@
- #define cris_dma_descr_type etrax_dma_descr
- #define cris_pio_read IO_STATE(R_ATA_CTRL_DATA, rw, read)
- #define cris_ultra_mask 0x0
-+#define IRQ 4
- #define MAX_DESCR_SIZE 0x10000UL
-
- static unsigned long
-@@ -497,8 +557,8 @@
- {
- d->buf = virt_to_phys(buf);
- d->sw_len = len == MAX_DESCR_SIZE ? 0 : len;
-- if (last)
-- d->ctrl |= d_eol;
-+ d->ctrl = last ? d_eol : 0;
-+ d->next = last ? 0 : virt_to_phys(d+1); /* assumes descr's in array */
- }
-
- static void cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int dir, int type, int len)
-@@ -521,14 +581,14 @@
- *R_DMA_CH2_FIRST = virt_to_phys(d);
- *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, start);
- }
--
-+
- /* initiate a multi word dma read using DMA handshaking */
-
- *R_ATA_TRANSFER_CNT =
- IO_FIELD(R_ATA_TRANSFER_CNT, count, len >> 1);
-
- cmd = dir ? IO_STATE(R_ATA_CTRL_DATA, rw, read) : IO_STATE(R_ATA_CTRL_DATA, rw, write);
-- cmd |= type == TYPE_PIO ? IO_STATE(R_ATA_CTRL_DATA, handsh, pio) :
-+ cmd |= type == TYPE_PIO ? IO_STATE(R_ATA_CTRL_DATA, handsh, pio) :
- IO_STATE(R_ATA_CTRL_DATA, handsh, dma);
- *R_ATA_CTRL_DATA =
- cmd |
-@@ -570,7 +630,7 @@
- }
-
- #endif
--
-+
- void
- cris_ide_outw(unsigned short data, unsigned long reg) {
- int timeleft;
-@@ -597,7 +657,7 @@
- if(!timeleft)
- printk("ATA timeout reg 0x%lx := 0x%x\n", reg, data);
-
-- cris_ide_write_command(reg|data); /* write data to the drive's register */
-+ cris_ide_write_command(reg|data); /* write data to the drive's register */
-
- timeleft = IDE_REGISTER_TIMEOUT;
- /* wait for transmitter ready */
-@@ -684,13 +744,15 @@
- static void cris_atapi_output_bytes(ide_drive_t *drive, void *, unsigned int);
- static int cris_dma_off (ide_drive_t *drive);
- static int cris_dma_on (ide_drive_t *drive);
-+static int cris_dma_host_off (ide_drive_t *drive);
-+static int cris_dma_host_on (ide_drive_t *drive);
-
- static void tune_cris_ide(ide_drive_t *drive, u8 pio)
- {
- int setup, strobe, hold;
-
- switch(pio)
-- {
-+ {
- case 0:
- setup = ATA_PIO0_SETUP;
- strobe = ATA_PIO0_STROBE;
-@@ -715,7 +777,7 @@
- setup = ATA_PIO4_SETUP;
- strobe = ATA_PIO4_STROBE;
- hold = ATA_PIO4_HOLD;
-- break;
-+ break;
- default:
- return;
- }
-@@ -733,7 +795,7 @@
- }
-
- switch(speed)
-- {
-+ {
- case XFER_UDMA_0:
- cyc = ATA_UDMA0_CYC;
- dvs = ATA_UDMA0_DVS;
-@@ -765,7 +827,7 @@
- if (speed >= XFER_UDMA_0)
- cris_ide_set_speed(TYPE_UDMA, cyc, dvs, 0);
- else
-- cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
-+ cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
-
- return 0;
- }
-@@ -790,11 +852,13 @@
-
- for(h = 0; h < MAX_HWIFS; h++) {
- ide_hwif_t *hwif = &ide_hwifs[h];
-- ide_setup_ports(&hw, cris_ide_base_address(h),
-+ memset(&hw, 0, sizeof(hw));
-+ ide_setup_ports(&hw, cris_ide_base_address(h),
- ide_offsets,
- 0, 0, cris_ide_ack_intr,
-- ide_default_irq(0));
-+ IRQ);
- ide_register_hw(&hw, &hwif);
-+ hwif->irq = IRQ;
- hwif->mmio = 2;
- hwif->chipset = ide_etrax100;
- hwif->tuneproc = &tune_cris_ide;
-@@ -814,13 +878,15 @@
- hwif->OUTBSYNC = &cris_ide_outbsync;
- hwif->INB = &cris_ide_inb;
- hwif->INW = &cris_ide_inw;
-- hwif->ide_dma_host_off = &cris_dma_off;
-- hwif->ide_dma_host_on = &cris_dma_on;
-+ hwif->ide_dma_host_off = &cris_dma_host_off;
-+ hwif->ide_dma_host_on = &cris_dma_host_on;
- hwif->ide_dma_off_quietly = &cris_dma_off;
-+ hwif->ide_dma_on = &cris_dma_on;
- hwif->udma_four = 0;
- hwif->ultra_mask = cris_ultra_mask;
- hwif->mwdma_mask = 0x07; /* Multiword DMA 0-2 */
- hwif->swdma_mask = 0x07; /* Singleword DMA 0-2 */
-+ hwif->rqsize = 256;
- }
-
- /* Reset pulse */
-@@ -835,13 +901,25 @@
- cris_ide_set_speed(TYPE_UDMA, ATA_UDMA2_CYC, ATA_UDMA2_DVS, 0);
- }
-
-+static int cris_dma_host_off (ide_drive_t *drive)
-+{
-+ return 0;
-+}
-+
-+static int cris_dma_host_on (ide_drive_t *drive)
-+{
-+ return 0;
-+}
-+
- static int cris_dma_off (ide_drive_t *drive)
- {
-+ drive->using_dma = 0;
- return 0;
- }
-
- static int cris_dma_on (ide_drive_t *drive)
- {
-+ drive->using_dma = 1;
- return 0;
- }
-
-@@ -958,30 +1036,28 @@
- size += sg_dma_len(sg);
- }
-
-- /* did we run out of descriptors? */
--
-- if(count >= MAX_DMA_DESCRS) {
-- printk("%s: too few DMA descriptors\n", drive->name);
-- return 1;
-- }
--
-- /* however, this case is more difficult - rw_trf_cnt cannot be more
-- than 65536 words per transfer, so in that case we need to either
-+ /* rw_trf_cnt cannot be more than 131072 words per transfer,
-+ (- 1 word for UDMA CRC) so in that case we need to either:
- 1) use a DMA interrupt to re-trigger rw_trf_cnt and continue with
- the descriptors, or
- 2) simply do the request here, and get dma_intr to only ide_end_request on
- those blocks that were actually set-up for transfer.
-+ (The ide framework will issue a new request for the remainder)
- */
-
-- if(ata_tot_size + size > 131072) {
-+ if(ata_tot_size + size > 262140) {
- printk("too large total ATA DMA request, %d + %d!\n", ata_tot_size, (int)size);
- return 1;
- }
-
-- /* If size > MAX_DESCR_SIZE it has to be splitted into new descriptors. Since we
-- don't handle size > 131072 only one split is necessary */
-+ /* If size > MAX_DESCR_SIZE it has to be splitted into new descriptors. */
-
-- if(size > MAX_DESCR_SIZE) {
-+ while (size > MAX_DESCR_SIZE) {
-+ /* did we run out of descriptors? */
-+ if(count >= MAX_DMA_DESCRS) {
-+ printk("%s: too few DMA descriptors\n", drive->name);
-+ return 1;
-+ }
- cris_ide_fill_descriptor(&ata_descrs[count], (void*)addr, MAX_DESCR_SIZE, 0);
- count++;
- ata_tot_size += MAX_DESCR_SIZE;
-@@ -989,6 +1065,11 @@
- addr += MAX_DESCR_SIZE;
- }
-
-+ /* did we run out of descriptors? */
-+ if(count >= MAX_DMA_DESCRS) {
-+ printk("%s: too few DMA descriptors\n", drive->name);
-+ return 1;
-+ }
- cris_ide_fill_descriptor(&ata_descrs[count], (void*)addr, size,i ? 0 : 1);
- count++;
- ata_tot_size += size;
-@@ -1050,8 +1131,12 @@
-
- if (id && (id->capability & 1)) {
- if (ide_use_dma(drive)) {
-- if (cris_config_drive_for_dma(drive))
-- return hwif->ide_dma_on(drive);
-+ if (cris_config_drive_for_dma(drive)) {
-+ if (hwif->ide_dma_on)
-+ return hwif->ide_dma_on(drive);
-+ else
-+ return 1;
-+ }
- }
- }
-
---- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/serial/crisv10.c 2007-01-09 10:30:54.000000000 +0100
-@@ -2,7 +2,7 @@
- *
- * Serial port driver for the ETRAX 100LX chip
- *
-- * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
-+ * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Axis Communications AB
- *
- * Many, many authors. Based once upon a time on serial.c for 16x50.
- *
-@@ -445,6 +445,7 @@
-
- #include <asm/io.h>
- #include <asm/irq.h>
-+#include <asm/dma.h>
- #include <asm/system.h>
- #include <asm/bitops.h>
- #include <linux/delay.h>
-@@ -454,8 +455,9 @@
- /* non-arch dependent serial structures are in linux/serial.h */
- #include <linux/serial.h>
- /* while we keep our own stuff (struct e100_serial) in a local .h file */
--#include "serial.h"
-+#include "crisv10.h"
- #include <asm/fasttimer.h>
-+#include <asm/arch/io_interface_mux.h>
-
- #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
- #ifndef CONFIG_ETRAX_FAST_TIMER
-@@ -586,11 +588,10 @@
- static void change_speed(struct e100_serial *info);
- static void rs_throttle(struct tty_struct * tty);
- static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
--static int rs_write(struct tty_struct * tty, int from_user,
-+static int rs_write(struct tty_struct * tty,
- const unsigned char *buf, int count);
- #ifdef CONFIG_ETRAX_RS485
--static int e100_write_rs485(struct tty_struct * tty, int from_user,
-- const unsigned char *buf, int count);
-+static int e100_write_rs485(struct tty_struct * tty, const unsigned char *buf, int count);
- #endif
- static int get_lsr_info(struct e100_serial * info, unsigned int *value);
-
-@@ -677,20 +678,39 @@
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 2,
-+ .dma_owner = dma_ser0,
-+ .io_if = if_serial_0,
- #ifdef CONFIG_ETRAX_SERIAL_PORT0
- .enabled = 1,
- #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
- .dma_out_enabled = 1,
-+ .dma_out_nbr = SER0_TX_DMA_NBR,
-+ .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
-+ .dma_out_irq_flags = IRQF_DISABLED,
-+ .dma_out_irq_description = "serial 0 dma tr",
- #else
- .dma_out_enabled = 0,
-+ .dma_out_nbr = UINT_MAX,
-+ .dma_out_irq_nbr = 0,
-+ .dma_out_irq_flags = 0,
-+ .dma_out_irq_description = NULL,
- #endif
- #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
- .dma_in_enabled = 1,
-+ .dma_in_nbr = SER0_RX_DMA_NBR,
-+ .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
-+ .dma_in_irq_flags = IRQF_DISABLED,
-+ .dma_in_irq_description = "serial 0 dma rec",
- #else
-- .dma_in_enabled = 0
-+ .dma_in_enabled = 0,
-+ .dma_in_nbr = UINT_MAX,
-+ .dma_in_irq_nbr = 0,
-+ .dma_in_irq_flags = 0,
-+ .dma_in_irq_description = NULL,
- #endif
- #else
- .enabled = 0,
-+ .io_if_description = NULL,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
- #endif
-@@ -712,20 +732,42 @@
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 3,
-+ .dma_owner = dma_ser1,
-+ .io_if = if_serial_1,
- #ifdef CONFIG_ETRAX_SERIAL_PORT1
- .enabled = 1,
-+ .io_if_description = "ser1",
- #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
- .dma_out_enabled = 1,
-+ .dma_out_nbr = SER1_TX_DMA_NBR,
-+ .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
-+ .dma_out_irq_flags = IRQF_DISABLED,
-+ .dma_out_irq_description = "serial 1 dma tr",
- #else
- .dma_out_enabled = 0,
-+ .dma_out_nbr = UINT_MAX,
-+ .dma_out_irq_nbr = 0,
-+ .dma_out_irq_flags = 0,
-+ .dma_out_irq_description = NULL,
- #endif
- #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
- .dma_in_enabled = 1,
-+ .dma_in_nbr = SER1_RX_DMA_NBR,
-+ .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
-+ .dma_in_irq_flags = IRQF_DISABLED,
-+ .dma_in_irq_description = "serial 1 dma rec",
- #else
-- .dma_in_enabled = 0
-+ .dma_in_enabled = 0,
-+ .dma_in_enabled = 0,
-+ .dma_in_nbr = UINT_MAX,
-+ .dma_in_irq_nbr = 0,
-+ .dma_in_irq_flags = 0,
-+ .dma_in_irq_description = NULL,
- #endif
- #else
- .enabled = 0,
-+ .io_if_description = NULL,
-+ .dma_in_irq_nbr = 0,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
- #endif
-@@ -746,20 +788,40 @@
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 0,
-+ .dma_owner = dma_ser2,
-+ .io_if = if_serial_2,
- #ifdef CONFIG_ETRAX_SERIAL_PORT2
- .enabled = 1,
-+ .io_if_description = "ser2",
- #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
- .dma_out_enabled = 1,
-+ .dma_out_nbr = SER2_TX_DMA_NBR,
-+ .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
-+ .dma_out_irq_flags = IRQF_DISABLED,
-+ .dma_out_irq_description = "serial 2 dma tr",
- #else
- .dma_out_enabled = 0,
-+ .dma_in_nbr = UINT_MAX,
-+ .dma_in_irq_nbr = 0,
-+ .dma_in_irq_flags = 0,
-+ .dma_in_irq_description = NULL,
- #endif
- #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
- .dma_in_enabled = 1,
-+ .dma_in_nbr = SER2_RX_DMA_NBR,
-+ .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
-+ .dma_in_irq_flags = IRQF_DISABLED,
-+ .dma_in_irq_description = "serial 2 dma rec",
- #else
-- .dma_in_enabled = 0
-+ .dma_in_enabled = 0,
-+ .dma_in_nbr = UINT_MAX,
-+ .dma_in_irq_nbr = 0,
-+ .dma_in_irq_flags = 0,
-+ .dma_in_irq_description = NULL,
- #endif
- #else
- .enabled = 0,
-+ .io_if_description = NULL,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
- #endif
-@@ -780,20 +842,40 @@
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 1,
-+ .dma_owner = dma_ser3,
-+ .io_if = if_serial_3,
- #ifdef CONFIG_ETRAX_SERIAL_PORT3
- .enabled = 1,
-+ .io_if_description = "ser3",
- #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
- .dma_out_enabled = 1,
-+ .dma_out_nbr = SER3_TX_DMA_NBR,
-+ .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
-+ .dma_out_irq_flags = IRQF_DISABLED,
-+ .dma_out_irq_description = "serial 3 dma tr",
- #else
- .dma_out_enabled = 0,
-+ .dma_out_nbr = UINT_MAX,
-+ .dma_out_irq_nbr = 0,
-+ .dma_out_irq_flags = 0,
-+ .dma_out_irq_description = NULL,
- #endif
- #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
- .dma_in_enabled = 1,
-+ .dma_in_nbr = SER3_RX_DMA_NBR,
-+ .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
-+ .dma_in_irq_flags = IRQF_DISABLED,
-+ .dma_in_irq_description = "serial 3 dma rec",
- #else
-- .dma_in_enabled = 0
-+ .dma_in_enabled = 0,
-+ .dma_in_nbr = UINT_MAX,
-+ .dma_in_irq_nbr = 0,
-+ .dma_in_irq_flags = 0,
-+ .dma_in_irq_description = NULL
- #endif
- #else
- .enabled = 0,
-+ .io_if_description = NULL,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
- #endif
-@@ -1414,12 +1496,11 @@
- {
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- *e100_modem_pins[info->line].dtr_shadow &= ~mask;
- *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
- #ifdef SERIAL_DEBUG_IO
-@@ -1438,12 +1519,11 @@
- {
- #ifndef CONFIG_SVINTO_SIM
- unsigned long flags;
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- info->rx_ctrl &= ~E100_RTS_MASK;
- info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
- info->port[REG_REC_CTRL] = info->rx_ctrl;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- #ifdef SERIAL_DEBUG_IO
- printk("ser%i rts %i\n", info->line, set);
- #endif
-@@ -1461,12 +1541,11 @@
- unsigned char mask = e100_modem_pins[info->line].ri_mask;
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- *e100_modem_pins[info->line].ri_shadow &= ~mask;
- *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
- #endif
- }
-@@ -1479,12 +1558,11 @@
- unsigned char mask = e100_modem_pins[info->line].cd_mask;
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- *e100_modem_pins[info->line].cd_shadow &= ~mask;
- *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
- #endif
- }
-@@ -1558,8 +1636,7 @@
- /* Disable output DMA channel for the serial port in question
- * ( set to something other then serialX)
- */
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
- if (info->line == 0) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
-@@ -1587,7 +1664,7 @@
- }
- }
- *R_GEN_CONFIG = genconfig_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
-
-@@ -1595,8 +1672,7 @@
- {
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
- /* Enable output DMA channel for the serial port in question */
- if (info->line == 0) {
-@@ -1613,7 +1689,7 @@
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
- }
- *R_GEN_CONFIG = genconfig_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
- static void e100_disable_rxdma_channel(struct e100_serial *info)
-@@ -1623,8 +1699,7 @@
- /* Disable input DMA channel for the serial port in question
- * ( set to something other then serialX)
- */
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- if (info->line == 0) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
- IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
-@@ -1651,7 +1726,7 @@
- }
- }
- *R_GEN_CONFIG = genconfig_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
-
-@@ -1659,8 +1734,7 @@
- {
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- /* Enable input DMA channel for the serial port in question */
- if (info->line == 0) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
-@@ -1676,7 +1750,7 @@
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
- }
- *R_GEN_CONFIG = genconfig_shadow;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
- #ifdef SERIAL_HANDLE_EARLY_ERRORS
-@@ -1783,7 +1857,7 @@
- }
-
- static int
--e100_write_rs485(struct tty_struct *tty, int from_user,
-+e100_write_rs485(struct tty_struct *tty,
- const unsigned char *buf, int count)
- {
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
-@@ -1796,7 +1870,7 @@
- */
- info->rs485.enabled = 1;
- /* rs_write now deals with RS485 if enabled */
-- count = rs_write(tty, from_user, buf, count);
-+ count = rs_write(tty, buf, count);
- info->rs485.enabled = old_enabled;
- return count;
- }
-@@ -1834,7 +1908,7 @@
- unsigned long flags;
- unsigned long xoff;
-
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
- CIRC_CNT(info->xmit.head,
- info->xmit.tail,SERIAL_XMIT_SIZE)));
-@@ -1846,7 +1920,7 @@
- }
-
- *((unsigned long *)&info->port[REG_XOFF]) = xoff;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
- }
-
-@@ -1858,7 +1932,7 @@
- unsigned long flags;
- unsigned long xoff;
-
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
- CIRC_CNT(info->xmit.head,
- info->xmit.tail,SERIAL_XMIT_SIZE)));
-@@ -1873,7 +1947,7 @@
- info->xmit.head != info->xmit.tail && info->xmit.buf)
- e100_enable_serial_tx_ready_irq(info);
-
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
- }
-
-@@ -2053,8 +2127,7 @@
- static void flush_timeout_function(unsigned long data);
- #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
- unsigned long timer_flags; \
-- save_flags(timer_flags); \
-- cli(); \
-+ local_irq_save(timer_flags); \
- if (fast_timers[info->line].function == NULL) { \
- serial_fast_timer_started++; \
- TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
-@@ -2068,7 +2141,7 @@
- else { \
- TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
- } \
-- restore_flags(timer_flags); \
-+ local_irq_restore(timer_flags); \
- }
- #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
-
-@@ -2097,8 +2170,7 @@
- {
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
-
- if (!info->first_recv_buffer)
- info->first_recv_buffer = buffer;
-@@ -2111,7 +2183,7 @@
- if (info->recv_cnt > info->max_recv_cnt)
- info->max_recv_cnt = info->recv_cnt;
-
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
- static int
-@@ -2131,11 +2203,7 @@
- info->icount.rx++;
- } else {
- struct tty_struct *tty = info->tty;
-- *tty->flip.char_buf_ptr = data;
-- *tty->flip.flag_buf_ptr = flag;
-- tty->flip.flag_buf_ptr++;
-- tty->flip.char_buf_ptr++;
-- tty->flip.count++;
-+ tty_insert_flip_char(tty, data, flag);
- info->icount.rx++;
- }
-
-@@ -2320,7 +2388,6 @@
- */
- return;
- #endif
-- info->tty->flip.count = 0;
- if (info->uses_dma_in) {
- /* reset the input dma channel to be sure it works */
-
-@@ -2482,70 +2549,21 @@
- {
- struct tty_struct *tty;
- struct etrax_recv_buffer *buffer;
-- unsigned int length;
- unsigned long flags;
-- int max_flip_size;
--
-- if (!info->first_recv_buffer)
-- return;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
-+ tty = info->tty;
-
-- if (!(tty = info->tty)) {
-- restore_flags(flags);
-+ if (!tty) {
-+ local_irq_restore(flags);
- return;
- }
-
-- length = tty->flip.count;
-- /* Don't flip more than the ldisc has room for.
-- * The return value from ldisc.receive_room(tty) - might not be up to
-- * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
-- * processed and not accounted for yet.
-- * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
-- * Lets buffer data here and let flow control take care of it.
-- * Since we normally flip large chunks, the ldisc don't react
-- * with throttle until too late if we flip to much.
-- */
-- max_flip_size = tty->ldisc.receive_room(tty);
-- if (max_flip_size < 0)
-- max_flip_size = 0;
-- if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
-- length + info->recv_cnt + /* We have this queued */
-- 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
-- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
-- /* check TTY_THROTTLED first so it indicates our state */
-- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
-- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
-- rs_throttle(tty);
-- }
--#if 0
-- else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
-- length + info->recv_cnt + /* We have this queued */
-- SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
-- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
-- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
-- rs_throttle(tty);
-- }
--#endif
-- }
--
-- if (max_flip_size > TTY_FLIPBUF_SIZE)
-- max_flip_size = TTY_FLIPBUF_SIZE;
--
-- while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
-+ while ((buffer = info->first_recv_buffer)) {
- unsigned int count = buffer->length;
-
-- if (length + count > max_flip_size)
-- count = max_flip_size - length;
--
-- memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
-- memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
-- tty->flip.flag_buf_ptr[length] = buffer->error;
--
-- length += count;
-+ tty_insert_flip_string(tty, buffer->buffer, count);
- info->recv_cnt -= count;
-- DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
-
- if (count == buffer->length) {
- info->first_recv_buffer = buffer->next;
-@@ -2560,24 +2578,7 @@
- if (!info->first_recv_buffer)
- info->last_recv_buffer = NULL;
-
-- tty->flip.count = length;
-- DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
-- DEBUG_LOG(info->line, "ldisc %lu\n",
-- tty->ldisc.chars_in_buffer(tty));
-- DEBUG_LOG(info->line, "flip.count %lu\n",
-- tty->flip.count);
-- }
-- );
-- restore_flags(flags);
--
-- DFLIP(
-- if (1) {
-- DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
-- DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
-- DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
-- }
--
-- );
-+ local_irq_restore(flags);
-
- /* this includes a check for low-latency */
- tty_flip_buffer_push(tty);
-@@ -2722,21 +2723,7 @@
- printk("!NO TTY!\n");
- return info;
- }
-- if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
-- /* check TTY_THROTTLED first so it indicates our state */
-- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
-- DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
-- rs_throttle(tty);
-- }
-- }
-- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
-- DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
-- tty->flip.work.func((void *) tty);
-- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
-- DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
-- return info; /* if TTY_DONT_FLIP is set */
-- }
-- }
-+
- /* Read data and status at the same time */
- data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
- more_data:
-@@ -2789,27 +2776,25 @@
- DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
- info->errorcode = ERRCODE_INSERT_BREAK;
- } else {
-+ unsigned char data = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
-+ char flag = TTY_NORMAL;
- if (info->errorcode == ERRCODE_INSERT_BREAK) {
-- info->icount.brk++;
-- *tty->flip.char_buf_ptr = 0;
-- *tty->flip.flag_buf_ptr = TTY_BREAK;
-- tty->flip.flag_buf_ptr++;
-- tty->flip.char_buf_ptr++;
-- tty->flip.count++;
-+ struct tty_struct *tty = info->tty;
-+ tty_insert_flip_char(tty, 0, flag);
- info->icount.rx++;
- }
-- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
-
- if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
- info->icount.parity++;
-- *tty->flip.flag_buf_ptr = TTY_PARITY;
-+ flag = TTY_PARITY;
- } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
- info->icount.overrun++;
-- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
-+ flag = TTY_OVERRUN;
- } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
- info->icount.frame++;
-- *tty->flip.flag_buf_ptr = TTY_FRAME;
-+ flag = TTY_FRAME;
- }
-+ tty_insert_flip_char(tty, data, flag);
- info->errorcode = 0;
- }
- info->break_detected_cnt = 0;
-@@ -2825,16 +2810,12 @@
- log_int(rdpc(), 0, 0);
- }
- );
-- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
-- *tty->flip.flag_buf_ptr = 0;
-+ tty_insert_flip_char(tty, IO_EXTRACT(R_SERIAL0_READ, data_in, data_read), TTY_NORMAL);
- } else {
- DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
- }
-
-
-- tty->flip.flag_buf_ptr++;
-- tty->flip.char_buf_ptr++;
-- tty->flip.count++;
- info->icount.rx++;
- data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
- if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
-@@ -2972,7 +2953,7 @@
- if (info->x_char) {
- unsigned char rstat;
- DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- rstat = info->port[REG_STATUS];
- DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
-
-@@ -2981,7 +2962,7 @@
- info->x_char = 0;
- /* We must enable since it is disabled in ser_interrupt */
- e100_enable_serial_tx_ready_irq(info);
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return;
- }
- if (info->uses_dma_out) {
-@@ -2989,7 +2970,7 @@
- int i;
- /* We only use normal tx interrupt when sending x_char */
- DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- rstat = info->port[REG_STATUS];
- DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
- e100_disable_serial_tx_ready_irq(info);
-@@ -3002,7 +2983,7 @@
- nop();
-
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return;
- }
- /* Normal char-by-char interrupt */
-@@ -3016,7 +2997,7 @@
- }
- DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
- /* Send a byte, rs485 timing is critical so turn of ints */
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
- info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
- info->icount.tx++;
-@@ -3040,7 +3021,7 @@
- /* We must enable since it is disabled in ser_interrupt */
- e100_enable_serial_tx_ready_irq(info);
- }
-- restore_flags(flags);
-+ local_irq_restore(flags);
-
- if (CIRC_CNT(info->xmit.head,
- info->xmit.tail,
-@@ -3065,7 +3046,7 @@
- int handled = 0;
- static volatile unsigned long reentered_ready_mask = 0;
-
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- irq_mask1_rd = *R_IRQ_MASK1_RD;
- /* First handle all rx interrupts with ints disabled */
- info = rs_table;
-@@ -3110,7 +3091,7 @@
- /* Unblock the serial interrupt */
- *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
-
-- sti();
-+ local_irq_enable();
- ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
- info = rs_table;
- for (i = 0; i < NR_PORTS; i++) {
-@@ -3123,11 +3104,11 @@
- ready_mask <<= 2;
- }
- /* handle_ser_tx_interrupt enables tr_ready interrupts */
-- cli();
-+ local_irq_disable();
- /* Handle reentered TX interrupt */
- irq_mask1_rd = reentered_ready_mask;
- }
-- cli();
-+ local_irq_disable();
- tx_started = 0;
- } else {
- unsigned long ready_mask;
-@@ -3143,7 +3124,7 @@
- }
- }
-
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return IRQ_RETVAL(handled);
- } /* ser_interrupt */
- #endif
-@@ -3192,13 +3173,12 @@
- if (!xmit_page)
- return -ENOMEM;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
-
- /* if it was already initialized, skip this */
-
- if (info->flags & ASYNC_INITIALIZED) {
-- restore_flags(flags);
-+ local_irq_restore(flags);
- free_page(xmit_page);
- return 0;
- }
-@@ -3324,7 +3304,7 @@
-
- info->flags |= ASYNC_INITIALIZED;
-
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return 0;
- }
-
-@@ -3375,8 +3355,7 @@
- info->irq);
- #endif
-
-- save_flags(flags);
-- cli(); /* Disable interrupts */
-+ local_irq_save(flags);
-
- if (info->xmit.buf) {
- free_page((unsigned long)info->xmit.buf);
-@@ -3400,7 +3379,7 @@
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
-
-@@ -3492,8 +3471,7 @@
-
- #ifndef CONFIG_SVINTO_SIM
- /* start with default settings and then fill in changes */
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- /* 8 bit, no/even parity */
- info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
- IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
-@@ -3557,7 +3535,7 @@
- }
-
- *((unsigned long *)&info->port[REG_XOFF]) = xoff;
-- restore_flags(flags);
-+ local_irq_restore(flags);
- #endif /* !CONFIG_SVINTO_SIM */
-
- update_char_time(info);
-@@ -3585,13 +3563,12 @@
-
- /* this protection might not exactly be necessary here */
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- start_transmit(info);
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
--static int rs_raw_write(struct tty_struct * tty, int from_user,
-+static int rs_raw_write(struct tty_struct * tty,
- const unsigned char *buf, int count)
- {
- int c, ret = 0;
-@@ -3614,72 +3591,37 @@
- SIMCOUT(buf, count);
- return count;
- #endif
-- save_flags(flags);
-+ local_save_flags(flags);
- DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
- DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
-
-
-- /* the cli/restore_flags pairs below are needed because the
-+ /* the local_irq_disable/restore_flags pairs below are needed because the
- * DMA interrupt handler moves the info->xmit values. the memcpy
- * needs to be in the critical region unfortunately, because we
- * need to read xmit values, memcpy, write xmit values in one
- * atomic operation... this could perhaps be avoided by more clever
- * design.
- */
-- if (from_user) {
-- mutex_lock(&tmp_buf_mutex);
-- while (1) {
-- int c1;
-- c = CIRC_SPACE_TO_END(info->xmit.head,
-- info->xmit.tail,
-- SERIAL_XMIT_SIZE);
-- if (count < c)
-- c = count;
-- if (c <= 0)
-- break;
--
-- c -= copy_from_user(tmp_buf, buf, c);
-- if (!c) {
-- if (!ret)
-- ret = -EFAULT;
-- break;
-- }
-- cli();
-- c1 = CIRC_SPACE_TO_END(info->xmit.head,
-- info->xmit.tail,
-- SERIAL_XMIT_SIZE);
-- if (c1 < c)
-- c = c1;
-- memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
-- info->xmit.head = ((info->xmit.head + c) &
-- (SERIAL_XMIT_SIZE-1));
-- restore_flags(flags);
-- buf += c;
-- count -= c;
-- ret += c;
-- }
-- mutex_unlock(&tmp_buf_mutex);
-- } else {
-- cli();
-- while (count) {
-- c = CIRC_SPACE_TO_END(info->xmit.head,
-- info->xmit.tail,
-- SERIAL_XMIT_SIZE);
--
-- if (count < c)
-- c = count;
-- if (c <= 0)
-- break;
--
-- memcpy(info->xmit.buf + info->xmit.head, buf, c);
-- info->xmit.head = (info->xmit.head + c) &
-- (SERIAL_XMIT_SIZE-1);
-- buf += c;
-- count -= c;
-- ret += c;
-- }
-- restore_flags(flags);
-+ local_irq_disable();
-+ while (count) {
-+ c = CIRC_SPACE_TO_END(info->xmit.head,
-+ info->xmit.tail,
-+ SERIAL_XMIT_SIZE);
-+
-+ if (count < c)
-+ c = count;
-+ if (c <= 0)
-+ break;
-+
-+ memcpy(info->xmit.buf + info->xmit.head, buf, c);
-+ info->xmit.head = (info->xmit.head + c) &
-+ (SERIAL_XMIT_SIZE-1);
-+ buf += c;
-+ count -= c;
-+ ret += c;
- }
-+ local_irq_restore(flags);
-
- /* enable transmitter if not running, unless the tty is stopped
- * this does not need IRQ protection since if tr_running == 0
-@@ -3698,7 +3640,7 @@
- } /* raw_raw_write() */
-
- static int
--rs_write(struct tty_struct * tty, int from_user,
-+rs_write(struct tty_struct * tty,
- const unsigned char *buf, int count)
- {
- #if defined(CONFIG_ETRAX_RS485)
-@@ -3725,7 +3667,7 @@
- }
- #endif /* CONFIG_ETRAX_RS485 */
-
-- count = rs_raw_write(tty, from_user, buf, count);
-+ count = rs_raw_write(tty, buf, count);
-
- #if defined(CONFIG_ETRAX_RS485)
- if (info->rs485.enabled)
-@@ -3793,10 +3735,9 @@
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- info->xmit.head = info->xmit.tail = 0;
-- restore_flags(flags);
-+ local_irq_restore(flags);
-
- wake_up_interruptible(&tty->write_wait);
-
-@@ -3818,7 +3759,7 @@
- {
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-- save_flags(flags); cli();
-+ local_irq_save(flags);
- if (info->uses_dma_out) {
- /* Put the DMA on hold and disable the channel */
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
-@@ -3835,7 +3776,7 @@
- DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
- info->x_char = ch;
- e100_enable_serial_tx_ready_irq(info);
-- restore_flags(flags);
-+ local_irq_restore(flags);
- }
-
- /*
-@@ -4085,61 +4026,6 @@
- return 0;
- }
-
--
--static int
--set_modem_info(struct e100_serial * info, unsigned int cmd,
-- unsigned int *value)
--{
-- unsigned int arg;
--
-- if (copy_from_user(&arg, value, sizeof(int)))
-- return -EFAULT;
--
-- switch (cmd) {
-- case TIOCMBIS:
-- if (arg & TIOCM_RTS) {
-- e100_rts(info, 1);
-- }
-- if (arg & TIOCM_DTR) {
-- e100_dtr(info, 1);
-- }
-- /* Handle FEMALE behaviour */
-- if (arg & TIOCM_RI) {
-- e100_ri_out(info, 1);
-- }
-- if (arg & TIOCM_CD) {
-- e100_cd_out(info, 1);
-- }
-- break;
-- case TIOCMBIC:
-- if (arg & TIOCM_RTS) {
-- e100_rts(info, 0);
-- }
-- if (arg & TIOCM_DTR) {
-- e100_dtr(info, 0);
-- }
-- /* Handle FEMALE behaviour */
-- if (arg & TIOCM_RI) {
-- e100_ri_out(info, 0);
-- }
-- if (arg & TIOCM_CD) {
-- e100_cd_out(info, 0);
-- }
-- break;
-- case TIOCMSET:
-- e100_rts(info, arg & TIOCM_RTS);
-- e100_dtr(info, arg & TIOCM_DTR);
-- /* Handle FEMALE behaviour */
-- e100_ri_out(info, arg & TIOCM_RI);
-- e100_cd_out(info, arg & TIOCM_CD);
-- break;
-- default:
-- return -EINVAL;
-- }
-- return 0;
--}
--
--
- static void
- rs_break(struct tty_struct *tty, int break_state)
- {
-@@ -4149,8 +4035,7 @@
- if (!info->port)
- return;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- if (break_state == -1) {
- /* Go to manual mode and set the txd pin to 0 */
- info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
-@@ -4158,7 +4043,42 @@
- info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
- }
- info->port[REG_TR_CTRL] = info->tx_ctrl;
-- restore_flags(flags);
-+ local_irq_restore(flags);
-+}
-+
-+static int
-+rs_tiocmset(struct tty_struct *tty, struct file * file, unsigned int set, unsigned int clear)
-+{
-+ struct e100_serial * info = (struct e100_serial *)tty->driver_data;
-+
-+ if (clear & TIOCM_RTS) {
-+ e100_rts(info, 0);
-+ }
-+ if (clear & TIOCM_DTR) {
-+ e100_dtr(info, 0);
-+ }
-+ /* Handle FEMALE behaviour */
-+ if (clear & TIOCM_RI) {
-+ e100_ri_out(info, 0);
-+ }
-+ if (clear & TIOCM_CD) {
-+ e100_cd_out(info, 0);
-+ }
-+
-+ if (set & TIOCM_RTS) {
-+ e100_rts(info, 1);
-+ }
-+ if (set & TIOCM_DTR) {
-+ e100_dtr(info, 1);
-+ }
-+ /* Handle FEMALE behaviour */
-+ if (set & TIOCM_RI) {
-+ e100_ri_out(info, 1);
-+ }
-+ if (set & TIOCM_CD) {
-+ e100_cd_out(info, 1);
-+ }
-+ return 0;
- }
-
- static int
-@@ -4177,10 +4097,6 @@
- switch (cmd) {
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *) arg);
-- case TIOCMBIS:
-- case TIOCMBIC:
-- case TIOCMSET:
-- return set_modem_info(info, cmd, (unsigned int *) arg);
- case TIOCGSERIAL:
- return get_serial_info(info,
- (struct serial_struct *) arg);
-@@ -4212,7 +4128,7 @@
- if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
- return -EFAULT;
-
-- return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
-+ return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
- }
- #endif
-
-@@ -4242,46 +4158,6 @@
-
- }
-
--/* In debugport.c - register a console write function that uses the normal
-- * serial driver
-- */
--typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
--
--extern debugport_write_function debug_write_function;
--
--static int rs_debug_write_function(int i, const char *buf, unsigned int len)
--{
-- int cnt;
-- int written = 0;
-- struct tty_struct *tty;
-- static int recurse_cnt = 0;
--
-- tty = rs_table[i].tty;
-- if (tty) {
-- unsigned long flags;
-- if (recurse_cnt > 5) /* We skip this debug output */
-- return 1;
--
-- local_irq_save(flags);
-- recurse_cnt++;
-- local_irq_restore(flags);
-- do {
-- cnt = rs_write(tty, 0, buf + written, len);
-- if (cnt >= 0) {
-- written += cnt;
-- buf += cnt;
-- len -= cnt;
-- } else
-- len = cnt;
-- } while(len > 0);
-- local_irq_save(flags);
-- recurse_cnt--;
-- local_irq_restore(flags);
-- return 1;
-- }
-- return 0;
--}
--
- /*
- * ------------------------------------------------------------
- * rs_close()
-@@ -4303,11 +4179,10 @@
-
- /* interrupts are disabled for this entire function */
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
-
- if (tty_hung_up_p(filp)) {
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return;
- }
-
-@@ -4334,7 +4209,7 @@
- info->count = 0;
- }
- if (info->count) {
-- restore_flags(flags);
-+ local_irq_restore(flags);
- return;
- }
- info->flags |= ASYNC_CLOSING;
-@@ -4388,7 +4263,7 @@
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
-- restore_flags(flags);
-+ local_irq_restore(flags);
-
- /* port closed */
-
-@@ -4410,6 +4285,28 @@
- #endif
- }
- #endif
-+
-+ /*
-+ * Release any allocated DMA irq's.
-+ */
-+ if (info->dma_in_enabled) {
-+ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
-+ free_irq(info->dma_in_irq_nbr,
-+ info);
-+ info->uses_dma_in = 0;
-+#ifdef SERIAL_DEBUG_OPEN
-+ printk("DMA irq '%s' freed\n", info->dma_in_irq_description);
-+#endif
-+ }
-+ if (info->dma_out_enabled) {
-+ free_irq(info->dma_out_irq_nbr,
-+ info);
-+ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
-+ info->uses_dma_out = 0;
-+#ifdef SERIAL_DEBUG_OPEN
-+ printk("DMA irq '%s' freed\n", info->dma_out_irq_description);
-+#endif
-+ }
- }
-
- /*
-@@ -4485,7 +4382,7 @@
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
-- interruptible_sleep_on(&info->close_wait);
-+ wait_event_interruptible(info->close_wait, 0);
- #ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- return -EAGAIN;
-@@ -4523,21 +4420,19 @@
- printk("block_til_ready before block: ttyS%d, count = %d\n",
- info->line, info->count);
- #endif
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- if (!tty_hung_up_p(filp)) {
- extra_count++;
- info->count--;
- }
-- restore_flags(flags);
-+ local_irq_restore(flags);
- info->blocked_open++;
- while (1) {
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
- /* assert RTS and DTR */
- e100_rts(info, 1);
- e100_dtr(info, 1);
-- restore_flags(flags);
-+ local_irq_restore(flags);
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
-@@ -4589,9 +4484,9 @@
- struct e100_serial *info;
- int retval, line;
- unsigned long page;
-+ int allocated_resources = 0;
-
- /* find which port we want to open */
--
- line = tty->index;
-
- if (line < 0 || line >= NR_PORTS)
-@@ -4632,7 +4527,7 @@
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
-- interruptible_sleep_on(&info->close_wait);
-+ wait_event_interruptible(info->close_wait, 0);
- #ifdef SERIAL_DO_RESTART
- return ((info->flags & ASYNC_HUP_NOTIFY) ?
- -EAGAIN : -ERESTARTSYS);
-@@ -4642,12 +4537,79 @@
- }
-
- /*
-+ * If DMA is enabled try to allocate the irq's.
-+ */
-+ if (info->count == 1) {
-+ allocated_resources = 1;
-+ if (info->dma_in_enabled) {
-+ if (request_irq(info->dma_in_irq_nbr,
-+ rec_interrupt,
-+ info->dma_in_irq_flags,
-+ info->dma_in_irq_description,
-+ info)) {
-+ printk(KERN_WARNING "DMA irq '%s' busy; falling back to non-DMA mode\n", info->dma_in_irq_description);
-+ /* Make sure we never try to use DMA in for the port again. */
-+ info->dma_in_enabled = 0;
-+ } else if (cris_request_dma(info->dma_in_nbr,
-+ info->dma_in_irq_description,
-+ DMA_VERBOSE_ON_ERROR,
-+ info->dma_owner)) {
-+ free_irq(info->dma_in_irq_nbr, info);
-+ printk(KERN_WARNING "DMA '%s' busy; falling back to non-DMA mode\n", info->dma_in_irq_description);
-+ /* Make sure we never try to use DMA in for the port again. */
-+ info->dma_in_enabled = 0;
-+ }
-+#ifdef SERIAL_DEBUG_OPEN
-+ else printk("DMA irq '%s' allocated\n", info->dma_in_irq_description);
-+#endif
-+ }
-+ if (info->dma_out_enabled) {
-+ if (request_irq(info->dma_out_irq_nbr,
-+ tr_interrupt,
-+ info->dma_out_irq_flags,
-+ info->dma_out_irq_description,
-+ info)) {
-+ printk(KERN_WARNING "DMA irq '%s' busy; falling back to non-DMA mode\n", info->dma_out_irq_description);
-+ /* Make sure we never try to use DMA out for the port again. */
-+ info->dma_out_enabled = 0;
-+ } else if (cris_request_dma(info->dma_out_nbr,
-+ info->dma_out_irq_description,
-+ DMA_VERBOSE_ON_ERROR,
-+ info->dma_owner)) {
-+ free_irq(info->dma_out_irq_nbr, info);
-+ printk(KERN_WARNING "DMA '%s' busy; falling back to non-DMA mode\n", info->dma_out_irq_description);
-+ /* Make sure we never try to use DMA in for the port again. */
-+ info->dma_out_enabled = 0;
-+ }
-+#ifdef SERIAL_DEBUG_OPEN
-+ else printk("DMA irq '%s' allocated\n", info->dma_out_irq_description);
-+#endif
-+ }
-+ }
-+
-+ /*
- * Start up the serial port
- */
-
- retval = startup(info);
-- if (retval)
-- return retval;
-+ if (retval) {
-+ if (allocated_resources) {
-+ if (info->dma_out_enabled) {
-+ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
-+ free_irq(info->dma_out_irq_nbr,
-+ info);
-+ }
-+ if (info->dma_in_enabled) {
-+ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
-+ free_irq(info->dma_in_irq_nbr,
-+ info);
-+ }
-+ }
-+ /* FIXME Decrease count info->count here too? */
-+ return retval;
-+
-+ }
-+
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
-@@ -4655,6 +4617,19 @@
- printk("rs_open returning after block_til_ready with %d\n",
- retval);
- #endif
-+ if (allocated_resources) {
-+ if (info->dma_out_enabled) {
-+ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
-+ free_irq(info->dma_out_irq_nbr,
-+ info);
-+ }
-+ if (info->dma_in_enabled) {
-+ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
-+ free_irq(info->dma_in_irq_nbr,
-+ info);
-+ }
-+ }
-+
- return retval;
- }
-
-@@ -4844,6 +4819,7 @@
- .send_xchar = rs_send_xchar,
- .wait_until_sent = rs_wait_until_sent,
- .read_proc = rs_read_proc,
-+ .tiocmset = rs_tiocmset
- };
-
- static int __init
-@@ -4863,7 +4839,22 @@
- #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
- init_timer(&flush_timer);
- flush_timer.function = timed_flush_handler;
-- mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
-+ mod_timer(&flush_timer, jiffies + 5);
-+#endif
-+
-+#if defined(CONFIG_ETRAX_RS485)
-+#if defined(CONFIG_ETRAX_RS485_ON_PA)
-+ if (cris_io_interface_allocate_pins(if_ser0, 'a', rs485_pa_bit, rs485_pa_bit)) {
-+ printk(KERN_CRIT "ETRAX100LX serial: Could not allocate RS485 pin\n");
-+ return -EBUSY;
-+ }
-+#endif
-+#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
-+ if (cris_io_interface_allocate_pins(if_ser0, 'g', rs485_pa_bit, rs485_port_g_bit)) {
-+ printk(KERN_CRIT "ETRAX100LX serial: Could not allocate RS485 pin\n");
-+ return -EBUSY;
-+ }
-+#endif
- #endif
-
- /* Initialize the tty_driver structure */
-@@ -4888,6 +4879,14 @@
- /* do some initializing for the separate ports */
-
- for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
-+ if (info->enabled) {
-+ if (cris_request_io_interface(info->io_if, info->io_if_description)) {
-+ printk(KERN_CRIT "ETRAX100LX async serial: Could not allocate IO pins for %s, port %d\n",
-+ info->io_if_description,
-+ i);
-+ info->enabled = 0;
-+ }
-+ }
- info->uses_dma_in = 0;
- info->uses_dma_out = 0;
- info->line = i;
-@@ -4939,64 +4938,16 @@
- #endif
-
- #ifndef CONFIG_SVINTO_SIM
-+#ifndef CONFIG_ETRAX_KGDB
- /* Not needed in simulator. May only complicate stuff. */
- /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
-
-- if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", NULL))
-- panic("irq8");
--
--#ifdef CONFIG_ETRAX_SERIAL_PORT0
--#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
-- if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 0 dma tr", NULL))
-- panic("irq22");
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
-- if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 0 dma rec", NULL))
-- panic("irq23");
--#endif
--#endif
--
--#ifdef CONFIG_ETRAX_SERIAL_PORT1
--#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
-- if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 1 dma tr", NULL))
-- panic("irq24");
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
-- if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 1 dma rec", NULL))
-- panic("irq25");
--#endif
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT2
-- /* DMA Shared with par0 (and SCSI0 and ATA) */
--#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
-- if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma tr", NULL))
-- panic("irq18");
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
-- if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma rec", NULL))
-- panic("irq19");
--#endif
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT3
-- /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
--#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
-- if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma tr", NULL))
-- panic("irq20");
--#endif
--#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
-- if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma rec", NULL))
-- panic("irq21");
--#endif
--#endif
-+ if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", driver))
-+ panic("%s: Failed to request irq8", __FUNCTION__);
-
--#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
-- if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, IRQF_SHARED | IRQF_DISABLED,
-- "fast serial dma timeout", NULL)) {
-- printk(KERN_CRIT "err: timer1 irq\n");
-- }
- #endif
- #endif /* CONFIG_SVINTO_SIM */
-- debug_write_function = rs_debug_write_function;
-+
- return 0;
- }
-
---- linux-2.6.19.2.orig/drivers/serial/crisv10.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/serial/crisv10.h 2006-10-13 14:44:38.000000000 +0200
-@@ -9,6 +9,8 @@
-
- #include <linux/circ_buf.h>
- #include <asm/termios.h>
-+#include <asm/dma.h>
-+#include <asm/arch/io_interface_mux.h>
-
- /* Software state per channel */
-
-@@ -61,6 +63,19 @@
- u8 dma_in_enabled:1; /* Set to 1 if DMA should be used */
-
- /* end of fields defined in rs_table[] in .c-file */
-+ int dma_owner;
-+ unsigned int dma_in_nbr;
-+ unsigned int dma_out_nbr;
-+ unsigned int dma_in_irq_nbr;
-+ unsigned int dma_out_irq_nbr;
-+ unsigned long dma_in_irq_flags;
-+ unsigned long dma_out_irq_flags;
-+ char *dma_in_irq_description;
-+ char *dma_out_irq_description;
-+
-+ enum cris_io_interface io_if;
-+ char *io_if_description;
-+
- u8 uses_dma_in; /* Set to 1 if DMA is used */
- u8 uses_dma_out; /* Set to 1 if DMA is used */
- u8 forced_eop; /* a fifo eop has been forced */
---- linux-2.6.19.2.orig/drivers/serial/crisv32.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/serial/crisv32.c 2007-01-05 09:59:53.000000000 +0100
-@@ -0,0 +1,2333 @@
-+/* $Id: crisv32.c,v 1.78 2007/01/05 08:59:53 starvik Exp $
-+ *
-+ * Serial port driver for the ETRAX FS chip
-+ *
-+ * Copyright (C) 1998-2006 Axis Communications AB
-+ *
-+ * Many, many authors. Based once upon a time on serial.c for 16x50.
-+ *
-+ * Johan Adolfsson - port to ETRAX FS
-+ * Mikael Starvik - port to serial_core framework
-+ *
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/console.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/serial_core.h>
-+
-+#include <asm/io.h>
-+#include <asm/irq.h>
-+#include <asm/system.h>
-+#include <asm/uaccess.h>
-+
-+#include <asm/arch/dma.h>
-+#include <asm/arch/system.h>
-+#include <asm/arch/pinmux.h>
-+#include <asm/arch/hwregs/dma.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/ser_defs.h>
-+#include <asm/arch/hwregs/dma_defs.h>
-+#include <asm/arch/hwregs/gio_defs.h>
-+#include <asm/arch/hwregs/intr_vect_defs.h>
-+#include <asm/arch/hwregs/reg_map.h>
-+
-+#define UART_NR 5 /* 4 ports + dummy port */
-+#define SERIAL_RECV_DESCRIPTORS 8
-+
-+/* We only buffer 255 characters here, no need for more tx descriptors. */
-+#define SERIAL_TX_DESCRIPTORS 4
-+
-+/* Kept for experimental purposes. */
-+#define ETRAX_SER_FIFO_SIZE 1
-+#define SERIAL_DESCR_BUF_SIZE 256
-+#define regi_NULL 0
-+#define DMA_WAIT_UNTIL_RESET(inst) \
-+ do { \
-+ reg_dma_rw_stat r; \
-+ do { \
-+ r = REG_RD(dma, (inst), rw_stat); \
-+ } while (r.mode != regk_dma_rst); \
-+ } while (0)
-+
-+/* Macro to set up control lines for a port. */
-+#define SETUP_PINS(port) \
-+ if (serial_cris_ports[port].used) { \
-+ if (strcmp(CONFIG_ETRAX_SER##port##_DTR_BIT, "")) \
-+ crisv32_io_get_name(&serial_cris_ports[port].dtr_pin, \
-+ CONFIG_ETRAX_SER##port##_DTR_BIT); \
-+ else \
-+ serial_cris_ports[port].dtr_pin = dummy_pin; \
-+ if (strcmp(CONFIG_ETRAX_SER##port##_DSR_BIT, "")) \
-+ crisv32_io_get_name(&serial_cris_ports[port].dsr_pin, \
-+ CONFIG_ETRAX_SER##port##_DSR_BIT); \
-+ else \
-+ serial_cris_ports[port].dsr_pin = dummy_pin; \
-+ if (strcmp(CONFIG_ETRAX_SER##port##_RI_BIT, "")) \
-+ crisv32_io_get_name(&serial_cris_ports[port].ri_pin, \
-+ CONFIG_ETRAX_SER##port##_RI_BIT); \
-+ else \
-+ serial_cris_ports[port].ri_pin = dummy_pin; \
-+ if (strcmp(CONFIG_ETRAX_SER##port##_CD_BIT, "")) \
-+ crisv32_io_get_name(&serial_cris_ports[port].cd_pin, \
-+ CONFIG_ETRAX_SER##port##_CD_BIT); \
-+ else \
-+ serial_cris_ports[port].cd_pin = dummy_pin; \
-+ }
-+
-+/* Set a serial port register if anything has changed. */
-+#define MODIFY_REG(instance, reg, var) \
-+ if (REG_RD_INT(ser, instance, reg) \
-+ != REG_TYPE_CONV(int, reg_ser_##reg, var)) \
-+ REG_WR(ser, instance, reg, var);
-+
-+/*
-+ * Regarding RS485 operation in crisv32 serial driver.
-+ * ---------------------------------------------------
-+ * RS485 can be run in two modes, full duplex using four wires (485FD) and
-+ * half duplex using two wires (485HD). The default mode of each serial port
-+ * is configured in the kernel configuration. The available modes are:
-+ * RS-232, RS-485 half duplex, and RS-485 full duplex.
-+ *
-+ * In the 485HD mode the direction of the data bus must be able to switch.
-+ * The direction of the transceiver is controlled by the RTS signal. Hence
-+ * the auto_rts function in the ETRAX FS chip is enabled in this mode, which
-+ * automatically toggle RTS when transmitting. The initial direction of the
-+ * port is receiving.
-+ *
-+ * In the 485FD mode two transceivers will be used, one in each direction.
-+ * Usually the hardware can handle both 485HD and 485FD, which implies that
-+ * one of the transceivers can change direction. Consequently that transceiver
-+ * must be tied to operate in the opposite direction of the other one, setting
-+ * and keeping RTS to a fixed value do this.
-+ *
-+ * There are two special "ioctl" that can configure the ports. These two are
-+ * left for backward compatible with older applications. The effects of using
-+ * them are described below:
-+ * The TIOCSERSETRS485:
-+ * This ioctl sets a serial port in 232 mode to 485HD mode or vise versa. The
-+ * state of the port is kept when closing the port. Note that this ioctl has no
-+ * effect on a serial port in the 485FD mode.
-+ * The TIOCSERWRRS485:
-+ * This ioctl set a serial port in 232 mode to 485HD mode and writes the data
-+ * "included" in the ioctl to the port. The port will then stay in 485HD mode.
-+ * Using this ioctl on a serial port in the 485HD mode will transmit the data
-+ * without changing the mode. Using this ioctl on a serial port in 485FD mode
-+ * will not change the mode and simply send the data using the 485FD mode.
-+ */
-+
-+#define TYPE_232 0
-+#define TYPE_485HD 1
-+#define TYPE_485FD 2
-+
-+struct etrax_recv_buffer {
-+ struct etrax_recv_buffer *next;
-+ unsigned short length;
-+ unsigned char error;
-+ unsigned char pad;
-+
-+ unsigned char buffer[0];
-+};
-+
-+struct uart_cris_port {
-+ struct uart_port port;
-+
-+ int initialized;
-+ int used;
-+ int irq;
-+
-+ /* Used to check if port enabled as well by testing for zero. */
-+ reg_scope_instances regi_ser;
-+ reg_scope_instances regi_dmain;
-+ reg_scope_instances regi_dmaout;
-+
-+ struct crisv32_iopin dtr_pin;
-+ struct crisv32_iopin dsr_pin;
-+ struct crisv32_iopin ri_pin;
-+ struct crisv32_iopin cd_pin;
-+
-+ struct dma_descr_context tr_context_descr
-+ __attribute__ ((__aligned__(32)));
-+ struct dma_descr_data tr_descr[SERIAL_TX_DESCRIPTORS]
-+ __attribute__ ((__aligned__(32)));
-+ struct dma_descr_context rec_context_descr
-+ __attribute__ ((__aligned__(32)));
-+ struct dma_descr_data rec_descr[SERIAL_RECV_DESCRIPTORS]
-+ __attribute__ ((__aligned__(32)));
-+
-+ /* This is the first one in the list the HW is working on now. */
-+ struct dma_descr_data* first_tx_descr;
-+
-+ /* This is the last one in the list the HW is working on now. */
-+ struct dma_descr_data* last_tx_descr;
-+
-+ /* This is how many characters the HW is working on now. */
-+ unsigned int tx_pending_chars;
-+
-+ int tx_started;
-+ unsigned int cur_rec_descr;
-+ struct etrax_recv_buffer *first_recv_buffer;
-+ struct etrax_recv_buffer *last_recv_buffer;
-+
-+ unsigned int recv_cnt;
-+ unsigned int max_recv_cnt;
-+
-+ /* The time for 1 char, in usecs. */
-+ unsigned long char_time_usec;
-+
-+ /* Last tx usec in the jiffies. */
-+ unsigned long last_tx_active_usec;
-+
-+ /* Last tx time in jiffies. */
-+ unsigned long last_tx_active;
-+
-+ /* Last rx usec in the jiffies. */
-+ unsigned long last_rx_active_usec;
-+
-+ /* Last rx time in jiffies. */
-+ unsigned long last_rx_active;
-+
-+#ifdef CONFIG_ETRAX_RS485
-+ /* RS-485 support, duh. */
-+ struct rs485_control rs485;
-+#endif
-+ int port_type;
-+};
-+
-+extern struct uart_driver serial_cris_driver;
-+static struct uart_port *console_port;
-+static int console_baud = 115200;
-+static struct uart_cris_port serial_cris_ports[UART_NR] = {
-+{
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0
-+ .used = 1,
-+ .irq = SER0_INTR_VECT,
-+ .regi_ser = regi_ser0,
-+ /*
-+ * We initialize the dma stuff like this to get a compiler error
-+ * if a CONFIG is missing
-+ */
-+ .regi_dmain =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
-+ regi_dma7,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_IN
-+ regi_NULL,
-+# endif
-+
-+ .regi_dmaout =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
-+ regi_dma6,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_OUT
-+ regi_NULL,
-+# endif
-+
-+# ifdef CONFIG_ETRAX_RS485
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_TYPE_485HD
-+ .port_type = TYPE_485HD,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT0_TYPE_485FD
-+ .port_type = TYPE_485FD,
-+# endif
-+# endif
-+#else
-+ .regi_ser = regi_NULL,
-+ .regi_dmain = regi_NULL,
-+ .regi_dmaout = regi_NULL,
-+#endif
-+}, /* ttyS0 */
-+{
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1
-+ .used = 1,
-+ .irq = SER1_INTR_VECT,
-+ .regi_ser = regi_ser1,
-+ .regi_dmain =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
-+ regi_dma5,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_NO_DMA_IN
-+ regi_NULL,
-+# endif
-+
-+ .regi_dmaout =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
-+ regi_dma4,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_NO_DMA_OUT
-+ regi_NULL,
-+# endif
-+
-+# ifdef CONFIG_ETRAX_RS485
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_TYPE_485HD
-+ .port_type = TYPE_485HD,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT1_TYPE_485FD
-+ .port_type = TYPE_485FD,
-+# endif
-+# endif
-+#else
-+ .regi_ser = regi_NULL,
-+ .regi_dmain = regi_NULL,
-+ .regi_dmaout = regi_NULL,
-+#endif
-+}, /* ttyS1 */
-+{
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2
-+ .used = 1,
-+ .irq = SER2_INTR_VECT,
-+ .regi_ser = regi_ser2,
-+ .regi_dmain =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
-+ regi_dma3,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_IN
-+ regi_NULL,
-+# endif
-+
-+ .regi_dmaout =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
-+ regi_dma2,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_OUT
-+ regi_NULL,
-+# endif
-+
-+# ifdef CONFIG_ETRAX_RS485
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_TYPE_485HD
-+ .port_type = TYPE_485HD,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT2_TYPE_485FD
-+ .port_type = TYPE_485FD,
-+# endif
-+# endif
-+#else
-+ .regi_ser = regi_NULL,
-+ .regi_dmain = regi_NULL,
-+ .regi_dmaout = regi_NULL,
-+#endif
-+}, /* ttyS2 */
-+{
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3
-+ .used = 1,
-+ .irq = SER3_INTR_VECT,
-+ .regi_ser = regi_ser3,
-+ .regi_dmain =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
-+ regi_dma9,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_IN
-+ regi_NULL,
-+# endif
-+
-+ .regi_dmaout =
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
-+ regi_dma8,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_OUT
-+ regi_NULL,
-+# endif
-+
-+# ifdef CONFIG_ETRAX_RS485
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_TYPE_485HD
-+ .port_type = TYPE_485HD,
-+# endif
-+# ifdef CONFIG_ETRAX_SERIAL_PORT3_TYPE_485FD
-+ .port_type = TYPE_485FD,
-+# endif
-+# endif
-+#else
-+ .regi_ser = regi_NULL,
-+ .regi_dmain = regi_NULL,
-+ .regi_dmaout = regi_NULL,
-+#endif
-+}, /* ttyS3 */
-+{
-+#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
-+ .used = 1,
-+#endif
-+ .regi_ser = regi_NULL
-+} /* Dummy console port */
-+
-+};
-+
-+/* Dummy pin used for unused CD, DSR, DTR and RI signals. */
-+static unsigned long io_dummy;
-+static struct crisv32_ioport dummy_port =
-+{
-+ &io_dummy,
-+ &io_dummy,
-+ &io_dummy,
-+ 18
-+};
-+static struct crisv32_iopin dummy_pin =
-+{
-+ &dummy_port,
-+ 0
-+};
-+
-+static int selected_console =
-+#if defined(CONFIG_ETRAX_DEBUG_PORT0)
-+0;
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+1;
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+2;
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+3;
-+#else /* CONFIG_ETRAX_DEBUG_PORT_NULL */
-+4;
-+#endif
-+
-+extern void reset_watchdog(void);
-+
-+/*
-+ * Interrupts are disabled on entering
-+ */
-+static void
-+cris_console_write(struct console *co, const char *s, unsigned int count)
-+{
-+ struct uart_cris_port *up;
-+ int i;
-+ reg_ser_r_stat_din stat;
-+ reg_ser_rw_tr_dma_en tr_dma_en, old;
-+
-+ up = &serial_cris_ports[selected_console];
-+
-+ /*
-+ * This function isn't covered by the struct uart_ops, so we
-+ * have to check manually that the port really is there,
-+ * configured and live.
-+ */
-+ if (!up->regi_ser)
-+ return;
-+
-+ /* Switch to manual mode. */
-+ tr_dma_en = old = REG_RD (ser, up->regi_ser, rw_tr_dma_en);
-+ if (tr_dma_en.en == regk_ser_yes) {
-+ tr_dma_en.en = regk_ser_no;
-+ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
-+ }
-+
-+ /* Send data. */
-+ for (i = 0; i < count; i++) {
-+ /* LF -> CRLF */
-+ if (s[i] == '\n') {
-+ do {
-+ stat = REG_RD (ser, up->regi_ser, r_stat_din);
-+ } while (!stat.tr_rdy);
-+ REG_WR_INT (ser, up->regi_ser, rw_dout, '\r');
-+ }
-+ /* Wait until transmitter is ready and send. */
-+ do {
-+ stat = REG_RD (ser, up->regi_ser, r_stat_din);
-+ } while (!stat.tr_rdy);
-+ REG_WR_INT (ser, up->regi_ser, rw_dout, s[i]);
-+
-+ /* Feed watchdog, because this may take looong time. */
-+ reset_watchdog();
-+ }
-+
-+ /* Restore mode. */
-+ if (tr_dma_en.en != old.en)
-+ REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
-+}
-+
-+static void cris_serial_port_init(struct uart_port *port, int line);
-+static int __init
-+cris_console_setup(struct console *co, char *options)
-+{
-+ struct uart_port *port;
-+ int baud = 115200;
-+ int bits = 8;
-+ int parity = 'n';
-+ int flow = 'n';
-+
-+ if (co->index >= UART_NR)
-+ co->index = 0;
-+ if (options)
-+ selected_console = co->index;
-+ port = &serial_cris_ports[selected_console].port;
-+ console_port = port;
-+
-+ if (options)
-+ uart_parse_options(options, &baud, &parity, &bits, &flow);
-+ console_baud = baud;
-+ cris_serial_port_init(port, selected_console);
-+ co->index = port->line;
-+ uart_set_options(port, co, baud, parity, bits, flow);
-+
-+ return 0;
-+}
-+
-+static struct tty_driver*
-+cris_console_device(struct console* co, int *index)
-+{
-+ struct uart_driver *p = co->data;
-+ *index = selected_console;
-+ return p->tty_driver;
-+}
-+
-+static struct console cris_console = {
-+ .name = "ttyS",
-+ .write = cris_console_write,
-+ .device = cris_console_device,
-+ .setup = cris_console_setup,
-+ .flags = CON_PRINTBUFFER,
-+ .index = -1,
-+ .data = &serial_cris_driver,
-+};
-+
-+#define SERIAL_CRIS_CONSOLE &cris_console
-+
-+struct uart_driver serial_cris_driver = {
-+ .owner = THIS_MODULE,
-+ .driver_name = "serial",
-+ .dev_name = "ttyS",
-+ .major = TTY_MAJOR,
-+ .minor = 64,
-+ .nr = UART_NR,
-+ .cons = SERIAL_CRIS_CONSOLE,
-+};
-+
-+static int inline crisv32_serial_get_rts(struct uart_cris_port *up)
-+{
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ /*
-+ * Return what the user has controlled rts to or
-+ * what the pin is? (if auto_rts is used it differs during tx)
-+ */
-+ reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
-+ return !(rstat.rts_n == regk_ser_active);
-+}
-+
-+/*
-+ * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
-+ * 0=0V , 1=3.3V
-+ */
-+static inline void crisv32_serial_set_rts(struct uart_cris_port *up, int set)
-+{
-+ reg_scope_instances regi_ser = up->regi_ser;
-+
-+#ifdef CONFIG_ETRAX_RS485
-+ /* Never toggle RTS if port is in 485 mode. If port is in 485FD mode we
-+ * do not want to send with the reciever and for 485HD mode auto_rts
-+ * take care of the RTS for us.
-+ */
-+ if (!up->rs485.enabled) {
-+#else
-+ {
-+#endif
-+ unsigned long flags;
-+ reg_ser_rw_rec_ctrl rec_ctrl;
-+
-+ local_irq_save(flags);
-+ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
-+ if (set)
-+ rec_ctrl.rts_n = regk_ser_active;
-+ else
-+ rec_ctrl.rts_n = regk_ser_inactive;
-+ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
-+ local_irq_restore(flags);
-+ }
-+}
-+
-+/* Input */
-+static int inline crisv32_serial_get_cts(struct uart_cris_port *up)
-+{
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
-+ return (rstat.cts_n == regk_ser_active);
-+}
-+
-+/*
-+ * Send a single character for XON/XOFF purposes. We do it in this separate
-+ * function instead of the alternative support port.x_char, in the ...start_tx
-+ * function, so we don't mix up this case with possibly enabling transmission
-+ * of queued-up data (in case that's disabled after *receiving* an XOFF or
-+ * negative CTS). This function is used for both DMA and non-DMA case; see HW
-+ * docs specifically blessing sending characters manually when DMA for
-+ * transmission is enabled and running. We may be asked to transmit despite
-+ * the transmitter being disabled by a ..._stop_tx call so we need to enable
-+ * it temporarily but restore the state afterwards.
-+ *
-+ * Beware: I'm not sure how the RS-485 stuff is supposed to work. Using
-+ * XON/XOFF seems problematic if there are several controllers, but if it's
-+ * actually RS-422 (multi-drop; one sender and multiple receivers), it might
-+ * Just Work, so don't bail out just because it looks a little suspicious.
-+ */
-+
-+void serial_cris_send_xchar(struct uart_port *port, char ch)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ reg_ser_rw_dout dout = { .data = ch };
-+ reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
-+ reg_ser_r_stat_din rstat;
-+ reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ unsigned long flags;
-+
-+ /*
-+ * Wait for tr_rdy in case a character is already being output. Make
-+ * sure we have integrity between the register reads and the writes
-+ * below, but don't busy-wait with interrupts off and the port lock
-+ * taken.
-+ */
-+ spin_lock_irqsave(&port->lock, flags);
-+ do {
-+ spin_unlock_irqrestore(&port->lock, flags);
-+ spin_lock_irqsave(&port->lock, flags);
-+ prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
-+ rstat = REG_RD(ser, regi_ser, r_stat_din);
-+ } while (!rstat.tr_rdy);
-+
-+ /*
-+ * Ack an interrupt if one was just issued for the previous character
-+ * that was output. This is required for non-DMA as the interrupt is
-+ * used as the only indicator that the transmitter is ready and it
-+ * isn't while this x_char is being transmitted.
-+ */
-+ REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
-+
-+ /* Enable the transmitter in case it was disabled. */
-+ tr_ctrl.stop = 0;
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
-+
-+ /*
-+ * Finally, send the blessed character; nothing should stop it now,
-+ * except for an xoff-detected state, which we'll handle below.
-+ */
-+ REG_WR(ser, regi_ser, rw_dout, dout);
-+ up->port.icount.tx++;
-+
-+ /* There might be an xoff state to clear. */
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+
-+ /*
-+ * Clear any xoff state that *may* have been there to
-+ * inhibit transmission of the character.
-+ */
-+ if (rstat.xoff_detect) {
-+ reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
-+ REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
-+ reg_ser_rw_tr_dma_en tr_dma_en
-+ = REG_RD(ser, regi_ser, rw_tr_dma_en);
-+
-+ /*
-+ * If we had an xoff state but cleared it, instead sneak in a
-+ * disabled state for the transmitter, after the character we
-+ * sent. Thus we keep the port disabled, just as if the xoff
-+ * state was still in effect (or actually, as if stop_tx had
-+ * been called, as we stop DMA too).
-+ */
-+ prev_tr_ctrl.stop = 1;
-+
-+ tr_dma_en.en = 0;
-+ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
-+ }
-+
-+ /* Restore "previous" enabled/disabled state of the transmitter. */
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
-+
-+ spin_unlock_irqrestore(&port->lock, flags);
-+}
-+
-+static void transmit_chars_dma(struct uart_cris_port *up);
-+
-+/*
-+ * Do not spin_lock_irqsave or disable interrupts by other means here; it's
-+ * already done by the caller.
-+ */
-+
-+static void serial_cris_start_tx(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ reg_ser_rw_tr_ctrl tr_ctrl;
-+
-+ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
-+ tr_ctrl.stop = regk_ser_no;
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
-+ if (!up->regi_dmaout) {
-+ reg_ser_rw_intr_mask intr_mask =
-+ REG_RD(ser, regi_ser, rw_intr_mask);
-+ intr_mask.tr_rdy = regk_ser_yes;
-+ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
-+ } else {
-+ /*
-+ * We're called possibly to re-enable transmission after it
-+ * has been disabled. If so, DMA needs to be re-enabled.
-+ */
-+ reg_ser_rw_tr_dma_en tr_dma_en = { .en = 1 };
-+ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
-+ transmit_chars_dma(up);
-+ }
-+}
-+
-+/*
-+ * This function handles both the DMA and non-DMA case by ordering the
-+ * transmitter to stop of after the current character. We don't need to wait
-+ * for any such character to be completely transmitted; we do that where it
-+ * matters, like in serial_cris_set_termios. Don't busy-wait here; see
-+ * Documentation/serial/driver: this function is called within
-+ * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
-+ * There's no documented need to set the txd pin to any particular value;
-+ * break setting is controlled solely by serial_cris_break_ctl.
-+ */
-+
-+static void serial_cris_stop_tx(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ reg_ser_rw_tr_ctrl tr_ctrl;
-+ reg_ser_rw_intr_mask intr_mask;
-+ reg_ser_rw_tr_dma_en tr_dma_en = {0};
-+ reg_ser_rw_xoff_clr xoff_clr = {0};
-+
-+ /*
-+ * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
-+ * interested in as we're not transmitting any characters. For the
-+ * DMA case, that interrupt is already turned off, but no reason to
-+ * waste code on conditionals here.
-+ */
-+ intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
-+ intr_mask.tr_rdy = regk_ser_no;
-+ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
-+
-+ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
-+ tr_ctrl.stop = 1;
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
-+
-+ /*
-+ * Always clear possible hardware xoff-detected state here, no need to
-+ * unnecessary consider mctrl settings and when they change. We clear
-+ * it here rather than in start_tx: both functions are called as the
-+ * effect of XOFF processing, but start_tx is also called when upper
-+ * levels tell the driver that there are more characters to send, so
-+ * avoid adding code there.
-+ */
-+ xoff_clr.clr = 1;
-+ REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
-+
-+ /*
-+ * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
-+ * those single characters without also giving go-ahead for queued up
-+ * DMA data.
-+ */
-+ tr_dma_en.en = 0;
-+ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
-+}
-+
-+static void serial_cris_stop_rx(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
-+
-+ rec_ctrl.en = regk_ser_no;
-+ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
-+}
-+
-+static void serial_cris_enable_ms(struct uart_port *port)
-+{
-+}
-+
-+static void check_modem_status(struct uart_cris_port *up)
-+{
-+}
-+
-+static unsigned int serial_cris_tx_empty(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned long flags;
-+ unsigned int ret;
-+ reg_ser_r_stat_din rstat = {0};
-+
-+ spin_lock_irqsave(&up->port.lock, flags);
-+ if (up->regi_dmaout) {
-+ /*
-+ * For DMA, before looking at r_stat, we need to check that we
-+ * either haven't actually started or that end-of-list is
-+ * reached, else a tr_empty indication is just an internal
-+ * state. The caller qualifies, if needed, that the
-+ * port->info.xmit buffer is empty, so we don't need to
-+ * check that.
-+ */
-+ reg_dma_rw_stat status = REG_RD(dma, up->regi_dmaout, rw_stat);
-+
-+ if (!up->tx_started) {
-+ ret = 1;
-+ goto done;
-+ }
-+
-+ if (status.list_state != regk_dma_data_at_eol) {
-+ ret = 0;
-+ goto done;
-+ }
-+ }
-+
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+ ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
-+
-+ done:
-+ spin_unlock_irqrestore(&up->port.lock, flags);
-+ return ret;
-+}
-+static unsigned int serial_cris_get_mctrl(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned int ret;
-+
-+ ret = 0;
-+ if (crisv32_serial_get_rts(up))
-+ ret |= TIOCM_RTS;
-+ if (crisv32_io_rd(&up->dtr_pin))
-+ ret |= TIOCM_DTR;
-+ if (crisv32_io_rd(&up->cd_pin))
-+ ret |= TIOCM_CD;
-+ if (crisv32_io_rd(&up->ri_pin))
-+ ret |= TIOCM_RI;
-+ if (!crisv32_io_rd(&up->dsr_pin))
-+ ret |= TIOCM_DSR;
-+ if (crisv32_serial_get_cts(up))
-+ ret |= TIOCM_CTS;
-+ return ret;
-+}
-+
-+static void serial_cris_set_mctrl(struct uart_port *port, unsigned int mctrl)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+
-+ crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0);
-+ crisv32_io_set(&up->dtr_pin, mctrl & TIOCM_DTR ? 1 : 0);
-+ crisv32_io_set(&up->ri_pin, mctrl & TIOCM_RNG ? 1 : 0);
-+ crisv32_io_set(&up->cd_pin, mctrl & TIOCM_CD ? 1 : 0);
-+}
-+
-+static void serial_cris_break_ctl(struct uart_port *port, int break_state)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned long flags;
-+ reg_ser_rw_tr_ctrl tr_ctrl;
-+ reg_ser_rw_tr_dma_en tr_dma_en;
-+ reg_ser_rw_intr_mask intr_mask;
-+
-+ spin_lock_irqsave(&up->port.lock, flags);
-+ tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
-+ tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
-+ intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
-+
-+ if (break_state != 0) { /* Send break */
-+ /*
-+ * We need to disable DMA (if used) or tr_rdy interrupts if no
-+ * DMA. No need to make this conditional on use of DMA;
-+ * disabling will be a no-op for the other mode.
-+ */
-+ intr_mask.tr_rdy = regk_ser_no;
-+ tr_dma_en.en = 0;
-+
-+ /*
-+ * Stop transmission and set the txd pin to 0 after the
-+ * current character. The txd setting will take effect after
-+ * any current transmission has completed.
-+ */
-+ tr_ctrl.stop = 1;
-+ tr_ctrl.txd = 0;
-+ } else {
-+ /* Re-enable either transmit DMA or the serial interrupt. */
-+ if (up->regi_dmaout)
-+ tr_dma_en.en = 1;
-+ else
-+ intr_mask.tr_rdy = regk_ser_yes;
-+
-+
-+ tr_ctrl.stop = 0;
-+ tr_ctrl.txd = 1;
-+ }
-+ REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
-+ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
-+ REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
-+
-+ spin_unlock_irqrestore(&up->port.lock, flags);
-+}
-+
-+/*
-+ * The output DMA channel is free - use it to send as many chars as
-+ * possible.
-+ */
-+
-+static void
-+transmit_chars_dma(struct uart_cris_port *up)
-+{
-+ struct dma_descr_data *descr, *pending_descr, *dmapos;
-+ struct dma_descr_data *last_tx_descr;
-+ struct circ_buf *xmit = &up->port.info->xmit;
-+ unsigned int sentl = 0;
-+ reg_dma_rw_ack_intr ack_intr = { .data = regk_dma_yes };
-+ reg_dma_rw_stat status;
-+ reg_scope_instances regi_dmaout = up->regi_dmaout;
-+ unsigned int chars_in_q;
-+ unsigned int chars_to_send;
-+
-+ /* Acknowledge dma data descriptor irq, if there was one. */
-+ REG_WR(dma, regi_dmaout, rw_ack_intr, ack_intr);
-+
-+ /*
-+ * First get the amount of bytes sent during the last DMA transfer,
-+ * and update xmit accordingly.
-+ */
-+ status = REG_RD(dma, regi_dmaout, rw_stat);
-+ if (status.list_state == regk_dma_data_at_eol || !up->tx_started)
-+ dmapos = phys_to_virt((int)up->last_tx_descr->next);
-+ else
-+ dmapos = phys_to_virt(REG_RD_INT(dma, regi_dmaout, rw_data));
-+
-+ pending_descr = up->first_tx_descr;
-+ while (pending_descr != dmapos) {
-+ sentl += pending_descr->after - pending_descr->buf;
-+ pending_descr->after = pending_descr->buf = NULL;
-+ pending_descr = phys_to_virt((int)pending_descr->next);
-+ }
-+
-+ up->first_tx_descr = pending_descr;
-+ last_tx_descr = up->last_tx_descr;
-+
-+ /* Update stats. */
-+ up->port.icount.tx += sentl;
-+
-+ up->tx_pending_chars -= sentl;
-+
-+ /* Update xmit buffer. */
-+ xmit->tail = (xmit->tail + sentl) & (UART_XMIT_SIZE - 1);
-+
-+ /*
-+ * Find out the largest amount of consecutive bytes we want to send
-+ * now.
-+ */
-+ chars_in_q = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
-+
-+ if (chars_in_q == 0)
-+ /* Tell upper layers that we're now idle. */
-+ goto done;
-+
-+ /* Some of those characters are actually pending output. */
-+ chars_to_send = chars_in_q - up->tx_pending_chars;
-+
-+ /*
-+ * Clamp the new number of pending chars to the advertised
-+ * one.
-+ */
-+ if (chars_to_send + up->tx_pending_chars > up->port.fifosize)
-+ chars_to_send = up->port.fifosize - up->tx_pending_chars;
-+
-+ /* If we don't want to send any, we're done. */
-+ if (chars_to_send == 0)
-+ goto done;
-+
-+ descr = phys_to_virt((int)last_tx_descr->next);
-+
-+ /*
-+ * We can't send anything if we could make the condition in
-+ * the while-loop above (reaping finished descriptors) be met
-+ * immediately before the first iteration. However, don't
-+ * mistake the full state for the empty state.
-+ */
-+ if ((descr == up->first_tx_descr && up->tx_pending_chars != 0)
-+ || descr->next == up->first_tx_descr)
-+ goto done;
-+
-+ /* Set up the descriptor for output. */
-+ descr->buf = (void*)virt_to_phys(xmit->buf + xmit->tail
-+ + up->tx_pending_chars);
-+ descr->after = descr->buf + chars_to_send;
-+ descr->eol = 1;
-+ descr->out_eop = 0;
-+ descr->intr = 1;
-+ descr->wait = 0;
-+ descr->in_eop = 0;
-+ descr->md = 0;
-+ /*
-+ * Make sure GCC doesn't move this eol clear before the eol set
-+ * above.
-+ */
-+ barrier();
-+ last_tx_descr->eol = 0;
-+
-+ up->last_tx_descr = descr;
-+ up->tx_pending_chars += chars_to_send;
-+
-+ if (!up->tx_started) {
-+ up->tx_started = 1;
-+ up->tr_context_descr.next = 0;
-+ up->tr_context_descr.saved_data
-+ = (dma_descr_data*)virt_to_phys(descr);
-+ up->tr_context_descr.saved_data_buf = descr->buf;
-+ DMA_START_CONTEXT(regi_dmaout,
-+ virt_to_phys(&up->tr_context_descr));
-+ } else
-+ DMA_CONTINUE_DATA(regi_dmaout);
-+
-+ /* DMA is now running (hopefully). */
-+
-+ done:
-+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-+ uart_write_wakeup(&up->port);
-+}
-+
-+static void
-+transmit_chars_no_dma(struct uart_cris_port *up)
-+{
-+ int count;
-+ struct circ_buf *xmit = &up->port.info->xmit;
-+
-+ reg_scope_instances regi_ser = up->regi_ser;
-+ reg_ser_r_stat_din rstat;
-+ reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
-+
-+ if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
-+ /* No more to send, so disable the interrupt. */
-+ reg_ser_rw_intr_mask intr_mask;
-+ intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
-+ intr_mask.tr_rdy = 0;
-+ intr_mask.tr_empty = 0;
-+ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
-+ return;
-+ }
-+
-+ count = ETRAX_SER_FIFO_SIZE;
-+ do {
-+ reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
-+ REG_WR(ser, regi_ser, rw_dout, dout);
-+ REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
-+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
-+ up->port.icount.tx++;
-+ if (xmit->head == xmit->tail)
-+ break;
-+ rstat = REG_RD(ser, regi_ser, r_stat_din);
-+ } while ((--count > 0) && rstat.tr_rdy);
-+
-+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-+ uart_write_wakeup(&up->port);
-+} /* transmit_chars_no_dma */
-+
-+static struct etrax_recv_buffer *
-+alloc_recv_buffer(unsigned int size)
-+{
-+ struct etrax_recv_buffer *buffer;
-+
-+ if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
-+ panic("%s: Could not allocate %d bytes buffer\n",
-+ __FUNCTION__, size);
-+
-+ buffer->next = NULL;
-+ buffer->length = 0;
-+ buffer->error = TTY_NORMAL;
-+
-+ return buffer;
-+}
-+
-+static void
-+append_recv_buffer(struct uart_cris_port *up,
-+ struct etrax_recv_buffer *buffer)
-+{
-+ unsigned long flags;
-+
-+ local_irq_save(flags);
-+
-+ if (!up->first_recv_buffer)
-+ up->first_recv_buffer = buffer;
-+ else
-+ up->last_recv_buffer->next = buffer;
-+
-+ up->last_recv_buffer = buffer;
-+
-+ up->recv_cnt += buffer->length;
-+ if (up->recv_cnt > up->max_recv_cnt)
-+ up->max_recv_cnt = up->recv_cnt;
-+
-+ local_irq_restore(flags);
-+}
-+
-+static int
-+add_char_and_flag(struct uart_cris_port *up, unsigned char data,
-+ unsigned char flag)
-+{
-+ struct etrax_recv_buffer *buffer;
-+
-+ buffer = alloc_recv_buffer(4);
-+ buffer->length = 1;
-+ buffer->error = flag;
-+ buffer->buffer[0] = data;
-+
-+ append_recv_buffer(up, buffer);
-+
-+ up->port.icount.rx++;
-+
-+ return 1;
-+}
-+
-+static void
-+flush_to_flip_buffer(struct uart_cris_port *up)
-+{
-+ struct tty_struct *tty;
-+ struct etrax_recv_buffer *buffer;
-+
-+ tty = up->port.info->tty;
-+ if (!up->first_recv_buffer || !tty)
-+ return;
-+
-+ while ((buffer = up->first_recv_buffer)) {
-+ unsigned int count = (unsigned int)
-+ tty_insert_flip_string(tty, buffer->buffer,
-+ buffer->length);
-+
-+ up->recv_cnt -= count;
-+
-+ if (count == buffer->length) {
-+ up->first_recv_buffer = buffer->next;
-+ kfree(buffer);
-+ } else {
-+ buffer->length -= count;
-+ memmove(buffer->buffer, buffer->buffer + count,
-+ buffer->length);
-+ buffer->error = TTY_NORMAL;
-+ }
-+ }
-+
-+ if (!up->first_recv_buffer)
-+ up->last_recv_buffer = NULL;
-+
-+ /* This call includes a check for low-latency. */
-+ tty_flip_buffer_push(tty);
-+}
-+
-+static unsigned int
-+handle_descr_data(struct uart_cris_port *up, struct dma_descr_data *descr,
-+ unsigned int recvl)
-+{
-+ struct etrax_recv_buffer *buffer
-+ = phys_to_virt((unsigned long)descr->buf) - sizeof *buffer;
-+
-+ if (up->recv_cnt + recvl > 65536) {
-+ printk(KERN_ERR "Too much pending incoming data on %s!"
-+ " Dropping %u bytes.\n", up->port.info->tty->name,
-+ recvl);
-+ return 0;
-+ }
-+
-+ buffer->length = recvl;
-+
-+ append_recv_buffer(up, buffer);
-+
-+ flush_to_flip_buffer(up);
-+
-+ buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE);
-+ descr->buf = (void*)virt_to_phys(buffer->buffer);
-+ descr->after = descr->buf + SERIAL_DESCR_BUF_SIZE;
-+
-+ return recvl;
-+}
-+
-+static unsigned int
-+handle_all_descr_data(struct uart_cris_port *up)
-+{
-+ struct dma_descr_data *descr
-+ = &up->rec_descr[(up->cur_rec_descr - 1)
-+ % SERIAL_RECV_DESCRIPTORS];
-+ struct dma_descr_data *prev_descr;
-+ unsigned int recvl;
-+ unsigned int ret = 0;
-+ reg_scope_instances regi_dmain = up->regi_dmain;
-+
-+ while (1) {
-+ prev_descr = descr;
-+ descr = &up->rec_descr[up->cur_rec_descr];
-+
-+ if (descr == phys_to_virt(REG_RD(dma, regi_dmain, rw_data)))
-+ break;
-+
-+ if (++up->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
-+ up->cur_rec_descr = 0;
-+
-+ /* Find out how many bytes were read. */
-+ recvl = descr->after - descr->buf;
-+
-+ /* Update stats. */
-+ up->port.icount.rx += recvl;
-+
-+ ret += handle_descr_data(up, descr, recvl);
-+ descr->eol = 1;
-+ /*
-+ * Make sure GCC doesn't move this eol clear before the
-+ * eol set above.
-+ */
-+ barrier();
-+ prev_descr->eol = 0;
-+ flush_dma_descr(descr,1); // Cache bug workaround
-+ flush_dma_descr(prev_descr,0); // Cache bug workaround
-+ }
-+
-+ return ret;
-+}
-+
-+static void
-+receive_chars_dma(struct uart_cris_port *up)
-+{
-+ reg_ser_r_stat_din rstat;
-+ reg_dma_rw_ack_intr ack_intr = {0};
-+
-+ /* Acknowledge both dma_descr and dma_eop irq. */
-+ ack_intr.data = 1;
-+ ack_intr.in_eop = 1;
-+ REG_WR(dma, up->regi_dmain, rw_ack_intr, ack_intr);
-+
-+ handle_all_descr_data(up);
-+
-+ /* Read the status register to detect errors. */
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+
-+ if (rstat.framing_err | rstat.par_err | rstat.orun) {
-+ /*
-+ * If we got an error, we must reset it by reading the
-+ * rs_stat_din register and put the data in buffer manually.
-+ */
-+ reg_ser_rs_stat_din stat_din;
-+ stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
-+
-+ if (stat_din.par_err)
-+ add_char_and_flag(up, stat_din.data, TTY_PARITY);
-+ else if (stat_din.orun)
-+ add_char_and_flag(up, stat_din.data, TTY_OVERRUN);
-+ else if (stat_din.framing_err)
-+ add_char_and_flag(up, stat_din.data, TTY_FRAME);
-+ }
-+
-+ /* Restart the receiving DMA, in case it got stuck on an EOL. */
-+ DMA_CONTINUE_DATA(up->regi_dmain);
-+}
-+
-+void receive_chars_no_dma(struct uart_cris_port *up)
-+{
-+ reg_ser_rs_stat_din stat_din;
-+ reg_ser_r_stat_din rstat;
-+ struct tty_struct *tty;
-+ struct uart_icount *icount;
-+ int max_count = 16;
-+ char flag;
-+ reg_ser_rw_ack_intr ack_intr = { 0 };
-+
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+ up->last_rx_active_usec = GET_JIFFIES_USEC();
-+ up->last_rx_active = jiffies;
-+ icount = &up->port.icount;
-+ tty = up->port.info->tty;
-+
-+ do {
-+ stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
-+
-+ flag = TTY_NORMAL;
-+ ack_intr.dav = 1;
-+ REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
-+ icount->rx++;
-+
-+ if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
-+ if (stat_din.data == 0x00 &&
-+ stat_din.framing_err) {
-+ /* Most likely a break. */
-+ flag = TTY_BREAK;
-+ icount->brk++;
-+ } else if (stat_din.par_err) {
-+ flag = TTY_PARITY;
-+ icount->parity++;
-+ } else if (stat_din.orun) {
-+ flag = TTY_OVERRUN;
-+ icount->overrun++;
-+ } else if (stat_din.framing_err) {
-+ flag = TTY_FRAME;
-+ icount->frame++;
-+ }
-+ }
-+
-+ /*
-+ * If this becomes important, we probably *could* handle this
-+ * gracefully by keeping track of the unhandled character.
-+ */
-+ if (!tty_insert_flip_char(tty, stat_din.data, flag))
-+ panic("%s: No tty buffer space", __FUNCTION__);
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+ } while (rstat.dav && (max_count-- > 0));
-+ spin_unlock(&up->port.lock);
-+ tty_flip_buffer_push(tty);
-+ spin_lock(&up->port.lock);
-+} /* receive_chars_no_dma */
-+
-+/*
-+ * DMA output channel interrupt handler.
-+ * this interrupt is called from DMA2(ser2), DMA8(ser3), DMA6(ser0) or
-+ * DMA4(ser1) when they have finished a descriptor with the intr flag set.
-+ */
-+
-+static irqreturn_t
-+dma_tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
-+ reg_dma_r_masked_intr masked_intr;
-+ reg_scope_instances regi_dmaout;
-+ int handled = 0;
-+
-+ spin_lock(&up->port.lock);
-+ regi_dmaout = up->regi_dmaout;
-+ if (!regi_dmaout) {
-+ spin_unlock(&up->port.lock);
-+ return IRQ_NONE;
-+ }
-+
-+ /*
-+ * Check for dma_descr (don't need to check for dma_eop in
-+ * output DMA for serial).
-+ */
-+ masked_intr = REG_RD(dma, regi_dmaout, r_masked_intr);
-+
-+ if (masked_intr.data) {
-+ /* We can send a new dma bunch. make it so. */
-+
-+ /*
-+ * Read jiffies_usec first.
-+ * We want this time to be as late as possible.
-+ */
-+ up->last_tx_active_usec = GET_JIFFIES_USEC();
-+ up->last_tx_active = jiffies;
-+ transmit_chars_dma(up);
-+ handled = 1;
-+ }
-+ check_modem_status(up);
-+ spin_unlock(&up->port.lock);
-+ return IRQ_RETVAL(handled);
-+}
-+
-+/* DMA input channel interrupt handler. */
-+
-+static irqreturn_t
-+dma_rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
-+ reg_dma_r_masked_intr masked_intr;
-+ reg_scope_instances regi_dmain;
-+ int handled = 0;
-+
-+ spin_lock(&up->port.lock);
-+ regi_dmain = up->regi_dmain;
-+ if (!regi_dmain) {
-+ spin_unlock(&up->port.lock);
-+ return IRQ_NONE;
-+ }
-+
-+ /* Check for both dma_eop and dma_descr for the input dma channel. */
-+ masked_intr = REG_RD(dma, regi_dmain, r_masked_intr);
-+ if (masked_intr.data || masked_intr.in_eop) {
-+ /* We have received something. */
-+ receive_chars_dma(up);
-+ handled = 1;
-+ }
-+ check_modem_status(up);
-+ spin_unlock(&up->port.lock);
-+ return IRQ_RETVAL(handled);
-+}
-+
-+/* "Normal" serial port interrupt handler - both rx and tx. */
-+
-+static irqreturn_t
-+ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
-+ reg_scope_instances regi_ser;
-+ int handled = 0;
-+
-+ spin_lock(&up->port.lock);
-+ if (up->regi_dmain && up->regi_dmaout) {
-+ spin_unlock(&up->port.lock);
-+ return IRQ_NONE;
-+ }
-+
-+ regi_ser = up->regi_ser;
-+
-+ if (regi_ser) {
-+ reg_ser_r_masked_intr masked_intr;
-+ masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
-+ /*
-+ * Check what interrupts are active before taking
-+ * actions. If DMA is used the interrupt shouldn't
-+ * be enabled.
-+ */
-+ if (masked_intr.dav) {
-+ receive_chars_no_dma(up);
-+ handled = 1;
-+ }
-+ check_modem_status(up);
-+
-+ if (masked_intr.tr_rdy) {
-+ transmit_chars_no_dma(up);
-+ handled = 1;
-+ }
-+ }
-+ spin_unlock(&up->port.lock);
-+ return IRQ_RETVAL(handled);
-+} /* ser_interrupt */
-+
-+static int start_recv_dma(struct uart_cris_port *up)
-+{
-+ struct dma_descr_data *descr = up->rec_descr;
-+ struct etrax_recv_buffer *buffer;
-+ int i;
-+
-+ /* Set up the receiving descriptors. */
-+ for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
-+ buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE);
-+ descr[i].next = (void*)virt_to_phys(&descr[i+1]);
-+ descr[i].buf = (void*)virt_to_phys(buffer->buffer);
-+ descr[i].after = descr[i].buf + SERIAL_DESCR_BUF_SIZE;
-+ descr[i].eol = 0;
-+ descr[i].out_eop = 0;
-+ descr[i].intr = 1;
-+ descr[i].wait = 0;
-+ descr[i].in_eop = 0;
-+ descr[i].md = 0;
-+
-+ }
-+
-+ /* Link the last descriptor to the first. */
-+ descr[i-1].next = (void*)virt_to_phys(&descr[0]);
-+
-+ /* And mark it as end of list. */
-+ descr[i-1].eol = 1;
-+
-+ /* Start with the first descriptor in the list. */
-+ up->cur_rec_descr = 0;
-+ up->rec_context_descr.next = 0;
-+ up->rec_context_descr.saved_data
-+ = (dma_descr_data *)virt_to_phys(&descr[up->cur_rec_descr]);
-+ up->rec_context_descr.saved_data_buf = descr[up->cur_rec_descr].buf;
-+
-+ /* Start the DMA. */
-+ DMA_START_CONTEXT(up->regi_dmain,
-+ virt_to_phys(&up->rec_context_descr));
-+
-+ /* Input DMA should be running now. */
-+ return 1;
-+}
-+
-+
-+static void start_receive(struct uart_cris_port *up)
-+{
-+ reg_scope_instances regi_dmain = up->regi_dmain;
-+ if (regi_dmain) {
-+ start_recv_dma(up);
-+ }
-+}
-+
-+
-+static void start_transmitter(struct uart_cris_port *up)
-+{
-+ int i;
-+ reg_scope_instances regi_dmaout = up->regi_dmaout;
-+ if (regi_dmaout) {
-+ for (i = 0; i < SERIAL_TX_DESCRIPTORS; i++) {
-+ memset(&up->tr_descr[i], 0, sizeof(up->tr_descr[i]));
-+ up->tr_descr[i].eol = 1;
-+ up->tr_descr[i].intr = 1;
-+ up->tr_descr[i].next = (dma_descr_data *)
-+ virt_to_phys(&up->tr_descr[i+1]);
-+ }
-+ up->tr_descr[i-1].next = (dma_descr_data *)
-+ virt_to_phys(&up->tr_descr[0]);
-+ up->first_tx_descr = &up->tr_descr[0];
-+
-+ /*
-+ * We'll be counting up to up->last_tx_descr->next from
-+ * up->first_tx_descr when starting DMA, so we should make
-+ * them the same for the very first round. If instead we'd
-+ * set last_tx_descr = first_tx_descr, we'd rely on
-+ * accidentally working code and data as we'd take a pass over
-+ * the first, unused, descriptor.
-+ */
-+ up->last_tx_descr = &up->tr_descr[i-1];
-+ up->tx_started = 0;
-+ up->tx_pending_chars = 0;
-+ }
-+}
-+
-+static int serial_cris_startup(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned long flags;
-+ reg_intr_vect_rw_mask intr_mask;
-+ reg_ser_rw_intr_mask ser_intr_mask = {0};
-+ reg_dma_rw_intr_mask dmain_intr_mask = {0};
-+ reg_dma_rw_intr_mask dmaout_intr_mask = {0};
-+ reg_dma_rw_cfg cfg = {.en = 1};
-+ reg_scope_instances regi_dma;
-+
-+ spin_lock_irqsave(&up->port.lock, flags);
-+
-+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
-+
-+ dmain_intr_mask.data = dmain_intr_mask.in_eop = regk_dma_yes;
-+ dmaout_intr_mask.data = regk_dma_yes;
-+ if (!up->regi_dmain)
-+ ser_intr_mask.dav = regk_ser_yes;
-+
-+ if (port->line == 0) {
-+ if (request_irq(SER0_INTR_VECT, ser_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED, "ser0",
-+ &serial_cris_ports[0]))
-+ panic("irq ser0");
-+ /* Enable the ser0 irq in global config. */
-+ intr_mask.ser0 = 1;
-+ /* Port ser0 can use dma6 for tx and dma7 for rx. */
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
-+ if (request_irq(DMA6_INTR_VECT, dma_tr_interrupt,
-+ IRQF_DISABLED, "serial 0 dma tr",
-+ &serial_cris_ports[0]))
-+ panic("irq ser0txdma");
-+ crisv32_request_dma(6, "ser0", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser0);
-+ /* Enable the dma6 irq in global config. */
-+ intr_mask.dma6 = 1;
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
-+ if (request_irq(DMA7_INTR_VECT, dma_rec_interrupt,
-+ IRQF_DISABLED, "serial 0 dma rec",
-+ &serial_cris_ports[0]))
-+ panic("irq ser0rxdma");
-+ crisv32_request_dma(7, "ser0", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser0);
-+ /* Enable the dma7 irq in global config. */
-+ intr_mask.dma7 = 1;
-+#endif
-+ } else if (port->line == 1) {
-+ if (request_irq(SER1_INTR_VECT, ser_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED, "ser1",
-+ &serial_cris_ports[1]))
-+ panic("irq ser1");
-+ /* Enable the ser1 irq in global config. */
-+ intr_mask.ser1 = 1;
-+
-+ /* Port ser1 can use dma4 for tx and dma5 for rx. */
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
-+ if (request_irq(DMA4_INTR_VECT, dma_tr_interrupt,
-+ IRQF_DISABLED, "serial 1 dma tr",
-+ &serial_cris_ports[1]))
-+ panic("irq ser1txdma");
-+ crisv32_request_dma(4, "ser1", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser1);
-+ /* Enable the dma4 irq in global config. */
-+ intr_mask.dma4 = 1;
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
-+ if (request_irq(DMA5_INTR_VECT, dma_rec_interrupt,
-+ IRQF_DISABLED, "serial 1 dma rec",
-+ &serial_cris_ports[1]))
-+ panic("irq ser1rxdma");
-+ crisv32_request_dma(5, "ser1", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser1);
-+ /* Enable the dma5 irq in global config. */
-+ intr_mask.dma5 = 1;
-+#endif
-+ } else if (port->line == 2) {
-+ if (request_irq(SER2_INTR_VECT, ser_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED, "ser2",
-+ &serial_cris_ports[2]))
-+ panic("irq ser2");
-+ /* Enable the ser2 irq in global config. */
-+ intr_mask.ser2 = 1;
-+
-+ /* Port ser2 can use dma2 for tx and dma3 for rx. */
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
-+ if (request_irq(DMA2_INTR_VECT, dma_tr_interrupt,
-+ IRQF_DISABLED, "serial 2 dma tr",
-+ &serial_cris_ports[2]))
-+ panic("irq ser2txdma");
-+ crisv32_request_dma(2, "ser2", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser2);
-+ /* Enable the dma2 irq in global config. */
-+ intr_mask.dma2 = 1;
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
-+ if (request_irq(DMA3_INTR_VECT, dma_rec_interrupt,
-+ IRQF_DISABLED, "serial 2 dma rec",
-+ &serial_cris_ports[2]))
-+ panic("irq ser2rxdma");
-+ crisv32_request_dma(3, "ser2", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser2);
-+ /* Enable the dma3 irq in global config. */
-+ intr_mask.dma3 = 1;
-+#endif
-+ } else if (port->line == 3) {
-+ if (request_irq(SER3_INTR_VECT, ser_interrupt,
-+ IRQF_SHARED | IRQF_DISABLED, "ser3",
-+ &serial_cris_ports[3]))
-+ panic("irq ser3" );
-+ /* Enable the ser3 irq in global config. */
-+ intr_mask.ser3 = 1;
-+
-+ /* Port ser3 can use dma8 for tx and dma9 for rx. */
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
-+ if (request_irq(DMA8_INTR_VECT, dma_tr_interrupt,
-+ IRQF_DISABLED, "serial 3 dma tr",
-+ &serial_cris_ports[3]))
-+ panic("irq ser3txdma");
-+ crisv32_request_dma(8, "ser3", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser3);
-+ /* Enable the dma2 irq in global config. */
-+ intr_mask.dma8 = 1;
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
-+ if (request_irq(DMA9_INTR_VECT, dma_rec_interrupt,
-+ IRQF_DISABLED, "serial 3 dma rec",
-+ &serial_cris_ports[3]))
-+ panic("irq ser3rxdma");
-+ crisv32_request_dma(9, "ser3", DMA_PANIC_ON_ERROR, 0,
-+ dma_ser3);
-+ /* Enable the dma3 irq in global config. */
-+ intr_mask.dma9 = 1;
-+#endif
-+ }
-+
-+ /*
-+ * Reset the DMA channels and make sure their interrupts are cleared.
-+ */
-+
-+ regi_dma = up->regi_dmain;
-+ if (regi_dma) {
-+ reg_dma_rw_ack_intr ack_intr = { 0 };
-+ DMA_RESET(regi_dma);
-+ /* Wait until reset cycle is complete. */
-+ DMA_WAIT_UNTIL_RESET(regi_dma);
-+ REG_WR(dma, regi_dma, rw_cfg, cfg);
-+ /* Make sure the irqs are cleared. */
-+ ack_intr.group = 1;
-+ ack_intr.ctxt = 1;
-+ ack_intr.data = 1;
-+ ack_intr.in_eop = 1;
-+ ack_intr.stream_cmd = 1;
-+ REG_WR(dma, regi_dma, rw_ack_intr, ack_intr);
-+ }
-+ regi_dma = up->regi_dmaout;
-+ if (regi_dma) {
-+ reg_dma_rw_ack_intr ack_intr = { 0 };
-+ DMA_RESET(regi_dma);
-+ /* Wait until reset cycle is complete. */
-+ DMA_WAIT_UNTIL_RESET(regi_dma);
-+ REG_WR(dma, regi_dma, rw_cfg, cfg);
-+ /* Make sure the irqs are cleared. */
-+ ack_intr.group = 1;
-+ ack_intr.ctxt = 1;
-+ ack_intr.data = 1;
-+ ack_intr.in_eop = 1;
-+ ack_intr.stream_cmd = 1;
-+ REG_WR(dma, regi_dma, rw_ack_intr, ack_intr);
-+ }
-+
-+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
-+ REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
-+ if (up->regi_dmain)
-+ REG_WR(dma, up->regi_dmain, rw_intr_mask, dmain_intr_mask);
-+ if (up->regi_dmaout)
-+ REG_WR(dma, up->regi_dmaout, rw_intr_mask, dmaout_intr_mask);
-+
-+ start_receive(up);
-+ start_transmitter(up);
-+
-+ serial_cris_set_mctrl(&up->port, up->port.mctrl);
-+ spin_unlock_irqrestore(&up->port.lock, flags);
-+
-+ return 0;
-+}
-+
-+static void serial_cris_shutdown(struct uart_port *port)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned long flags;
-+ reg_intr_vect_rw_mask intr_mask;
-+
-+ spin_lock_irqsave(&up->port.lock, flags);
-+
-+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
-+ serial_cris_stop_tx(port);
-+ serial_cris_stop_rx(port);
-+
-+ if (port->line == 0) {
-+ intr_mask.ser0 = 0;
-+ free_irq(SER0_INTR_VECT, &serial_cris_ports[0]);
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
-+ intr_mask.dma6 = 0;
-+ crisv32_free_dma(6);
-+ free_irq(DMA6_INTR_VECT, &serial_cris_ports[0]);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
-+ intr_mask.dma7 = 0;
-+ crisv32_free_dma(7);
-+ free_irq(DMA7_INTR_VECT, &serial_cris_ports[0]);
-+#endif
-+ } else if (port->line == 1) {
-+ intr_mask.ser1 = 0;
-+ free_irq(SER1_INTR_VECT, &serial_cris_ports[1]);
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
-+ intr_mask.dma4 = 0;
-+ crisv32_free_dma(4);
-+ free_irq(DMA4_INTR_VECT, &serial_cris_ports[1]);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
-+ intr_mask.dma5 = 0;
-+ crisv32_free_dma(5);
-+ free_irq(DMA5_INTR_VECT, &serial_cris_ports[1]);
-+#endif
-+ } else if (port->line == 2) {
-+ intr_mask.ser2 = 0;
-+ free_irq(SER2_INTR_VECT, &serial_cris_ports[2]);
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
-+ intr_mask.dma2 = 0;
-+ crisv32_free_dma(2);
-+ free_irq(DMA2_INTR_VECT, &serial_cris_ports[2]);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
-+ intr_mask.dma3 = 0;
-+ crisv32_free_dma(3);
-+ free_irq(DMA3_INTR_VECT, &serial_cris_ports[2]);
-+#endif
-+ } else if (port->line == 3) {
-+ intr_mask.ser3 = 0;
-+ free_irq(SER3_INTR_VECT, &serial_cris_ports[3]);
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
-+ intr_mask.dma8 = 0;
-+ crisv32_free_dma(8);
-+ free_irq(DMA8_INTR_VECT, &serial_cris_ports[3]);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
-+ intr_mask.dma9 = 0;
-+ crisv32_free_dma(9);
-+ free_irq(DMA9_INTR_VECT, &serial_cris_ports[3]);
-+#endif
-+ }
-+
-+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
-+
-+ serial_cris_set_mctrl(&up->port, up->port.mctrl);
-+
-+ if (up->regi_dmain) {
-+ struct etrax_recv_buffer *rb;
-+ struct etrax_recv_buffer *rb_next;
-+ int i;
-+ struct dma_descr_data *descr;
-+
-+ /*
-+ * In case of DMA and receive errors, there might be pending
-+ * receive buffers still linked here and not flushed upwards.
-+ * Release them.
-+ */
-+ for (rb = up->first_recv_buffer; rb != NULL; rb = rb_next) {
-+ rb_next = rb->next;
-+ kfree (rb);
-+ }
-+ up->first_recv_buffer = NULL;
-+ up->last_recv_buffer = NULL;
-+
-+ /*
-+ * Also release buffers that were attached to the DMA
-+ * before we shut down the hardware above.
-+ */
-+ for (i = 0, descr = up->rec_descr;
-+ i < SERIAL_RECV_DESCRIPTORS;
-+ i++)
-+ if (descr[i].buf) {
-+ rb = phys_to_virt((u32) descr[i].buf)
-+ - sizeof *rb;
-+ kfree(rb);
-+ descr[i].buf = NULL;
-+ }
-+ }
-+
-+ spin_unlock_irqrestore(&up->port.lock, flags);
-+
-+}
-+
-+static void
-+serial_cris_set_termios(struct uart_port *port, struct termios *termios,
-+ struct termios *old)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ unsigned long flags;
-+ reg_ser_rw_xoff xoff;
-+ reg_ser_rw_xoff_clr xoff_clr = {0};
-+ reg_ser_rw_tr_ctrl tx_ctrl = {0};
-+ reg_ser_rw_tr_dma_en tx_dma_en = {0};
-+ reg_ser_rw_rec_ctrl rx_ctrl = {0};
-+ reg_ser_rw_tr_baud_div tx_baud_div = {0};
-+ reg_ser_rw_rec_baud_div rx_baud_div = {0};
-+ reg_ser_r_stat_din rstat;
-+ int baud;
-+
-+ if (old &&
-+ termios->c_cflag == old->c_cflag &&
-+ termios->c_iflag == old->c_iflag)
-+ return;
-+
-+ /* Start with default settings and then fill in changes. */
-+
-+ /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
-+ tx_ctrl.base_freq = regk_ser_f29_493;
-+ tx_ctrl.en = 0;
-+ tx_ctrl.stop = 0;
-+#ifdef CONFIG_ETRAX_RS485
-+ if (up->rs485.enabled && (up->port_type != TYPE_485FD)) {
-+ tx_ctrl.auto_rts = regk_ser_yes;
-+ } else
-+#endif
-+ tx_ctrl.auto_rts = regk_ser_no;
-+ tx_ctrl.txd = 1;
-+ tx_ctrl.auto_cts = 0;
-+ /* Rx: 8 bit, no/even parity. */
-+ if (up->regi_dmain) {
-+ rx_ctrl.dma_mode = 1;
-+ rx_ctrl.auto_eop = 1;
-+ }
-+ rx_ctrl.dma_err = regk_ser_stop;
-+ rx_ctrl.sampling = regk_ser_majority;
-+ rx_ctrl.timeout = 1;
-+
-+#ifdef CONFIG_ETRAX_RS485
-+ if (up->rs485.enabled && (up->port_type != TYPE_485FD)) {
-+# ifdef CONFIG_ETRAX_RS485_DISABLE_RECEIVER
-+ rx_ctrl.half_duplex = regk_ser_yes;
-+# endif
-+ rx_ctrl.rts_n = up->rs485.rts_after_sent ?
-+ regk_ser_active : regk_ser_inactive;
-+ } else if (up->port_type == TYPE_485FD) {
-+ rx_ctrl.rts_n = regk_ser_active;
-+ } else
-+#endif
-+ rx_ctrl.rts_n = regk_ser_inactive;
-+
-+ /* Common for tx and rx: 8N1. */
-+ tx_ctrl.data_bits = regk_ser_bits8;
-+ rx_ctrl.data_bits = regk_ser_bits8;
-+ tx_ctrl.par = regk_ser_even;
-+ rx_ctrl.par = regk_ser_even;
-+ tx_ctrl.par_en = regk_ser_no;
-+ rx_ctrl.par_en = regk_ser_no;
-+
-+ tx_ctrl.stop_bits = regk_ser_bits1;
-+
-+
-+ /* Change baud-rate and write it to the hardware. */
-+
-+ /* baud_clock = base_freq / (divisor*8)
-+ * divisor = base_freq / (baud_clock * 8)
-+ * base_freq is either:
-+ * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
-+ * 20.493MHz is used for standard baudrates
-+ */
-+
-+ /*
-+ * For the console port we keep the original baudrate here. Not very
-+ * beautiful.
-+ */
-+ if ((port != console_port) || old)
-+ baud = uart_get_baud_rate(port, termios, old, 0,
-+ port->uartclk / 8);
-+ else
-+ baud = console_baud;
-+
-+ tx_baud_div.div = 29493000 / (8 * baud);
-+ /* Rx uses same as tx. */
-+ rx_baud_div.div = tx_baud_div.div;
-+ rx_ctrl.base_freq = tx_ctrl.base_freq;
-+
-+ if ((termios->c_cflag & CSIZE) == CS7) {
-+ /* Set 7 bit mode. */
-+ tx_ctrl.data_bits = regk_ser_bits7;
-+ rx_ctrl.data_bits = regk_ser_bits7;
-+ }
-+
-+ if (termios->c_cflag & CSTOPB) {
-+ /* Set 2 stop bit mode. */
-+ tx_ctrl.stop_bits = regk_ser_bits2;
-+ }
-+
-+ if (termios->c_cflag & PARENB) {
-+ /* Enable parity. */
-+ tx_ctrl.par_en = regk_ser_yes;
-+ rx_ctrl.par_en = regk_ser_yes;
-+ }
-+
-+ if (termios->c_cflag & CMSPAR) {
-+ if (termios->c_cflag & PARODD) {
-+ /* Set mark parity if PARODD and CMSPAR. */
-+ tx_ctrl.par = regk_ser_mark;
-+ rx_ctrl.par = regk_ser_mark;
-+ } else {
-+ tx_ctrl.par = regk_ser_space;
-+ rx_ctrl.par = regk_ser_space;
-+ }
-+ } else {
-+ if (termios->c_cflag & PARODD) {
-+ /* Set odd parity. */
-+ tx_ctrl.par = regk_ser_odd;
-+ rx_ctrl.par = regk_ser_odd;
-+ }
-+ }
-+
-+ if (termios->c_cflag & CRTSCTS) {
-+ /* Enable automatic CTS handling. */
-+ tx_ctrl.auto_cts = regk_ser_yes;
-+ }
-+
-+ /* Make sure the tx and rx are enabled. */
-+ tx_ctrl.en = regk_ser_yes;
-+ rx_ctrl.en = regk_ser_yes;
-+
-+ /*
-+ * Wait for tr_idle in case a character is being output, so it won't
-+ * be damaged by the changes we do below. It seems the termios
-+ * changes "sometimes" (we can't see e.g. a tcsetattr TCSANOW
-+ * parameter here) should take place no matter what state. However,
-+ * in case we should wait, we may have a non-empty transmitter state
-+ * as we tell the upper layers that we're all done when we've passed
-+ * characters to the hardware, but we don't wait for them being
-+ * actually shifted out.
-+ */
-+ spin_lock_irqsave(&port->lock, flags);
-+
-+ /*
-+ * None of our interrupts re-enable DMA, so it's thankfully ok to
-+ * disable it once, outside the loop.
-+ */
-+ tx_dma_en.en = 0;
-+ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
-+ do {
-+ /*
-+ * Make sure we have integrity between the read r_stat status
-+ * and us writing the registers below, but don't busy-wait
-+ * with interrupts off. We need to keep the port lock though
-+ * (if we go SMP), so nobody else writes characters.
-+ */
-+ local_irq_restore(flags);
-+ local_irq_save(flags);
-+ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
-+ } while (!rstat.tr_idle);
-+
-+ /* Actually write the control regs (if modified) to the hardware. */
-+
-+ uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
-+ MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
-+ MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
-+
-+ MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
-+ MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
-+
-+ tx_dma_en.en = up->regi_dmaout != 0;
-+ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
-+
-+ xoff = REG_RD(ser, up->regi_ser, rw_xoff);
-+
-+ if (up->port.info && (up->port.info->tty->termios->c_iflag & IXON)) {
-+ xoff.chr = STOP_CHAR(up->port.info->tty);
-+ xoff.automatic = regk_ser_yes;
-+ } else
-+ xoff.automatic = regk_ser_no;
-+
-+ MODIFY_REG(up->regi_ser, rw_xoff, xoff);
-+
-+ /*
-+ * Make sure we don't start in an automatically shut-off state due to
-+ * a previous early exit.
-+ */
-+ xoff_clr.clr = 1;
-+ REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
-+
-+ serial_cris_set_mctrl(&up->port, up->port.mctrl);
-+ spin_unlock_irqrestore(&up->port.lock, flags);
-+}
-+
-+static const char *
-+serial_cris_type(struct uart_port *port)
-+{
-+ return "CRISv32";
-+}
-+
-+static void serial_cris_release_port(struct uart_port *port)
-+{
-+}
-+
-+static int serial_cris_request_port(struct uart_port *port)
-+{
-+ return 0;
-+}
-+
-+static void serial_cris_config_port(struct uart_port *port, int flags)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ up->port.type = PORT_CRIS;
-+}
-+
-+#if defined(CONFIG_ETRAX_RS485)
-+
-+static void cris_set_rs485_mode(struct uart_cris_port* up) {
-+ reg_ser_rw_tr_ctrl tr_ctrl;
-+ reg_ser_rw_rec_ctrl rec_ctrl;
-+ reg_scope_instances regi_ser = up->regi_ser;
-+
-+ if (up->port_type == TYPE_485FD)
-+ /* We do not want to change anything if we are in 485FD mode */
-+ return;
-+
-+ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
-+ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
-+
-+ /* Set port in RS-485 mode */
-+ if (up->rs485.enabled) {
-+ tr_ctrl.auto_rts = regk_ser_yes;
-+ rec_ctrl.rts_n = up->rs485.rts_after_sent ?
-+ regk_ser_active : regk_ser_inactive;
-+#ifdef CONFIG_ETRAX_RS485_DISABLE_RECEIVER
-+ rec_ctrl.half_duplex = regk_ser_yes;
-+#endif
-+ }
-+ /* Set port to RS-232 mode */
-+ else {
-+ rec_ctrl.rts_n = regk_ser_inactive;
-+ tr_ctrl.auto_rts = regk_ser_no;
-+ rec_ctrl.half_duplex = regk_ser_no;
-+ }
-+
-+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
-+ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
-+}
-+
-+/* Enable/disable RS-485 mode on selected port. */
-+static int
-+cris_enable_rs485(struct uart_cris_port* up, struct rs485_control *r)
-+{
-+ if (up->port_type == TYPE_485FD)
-+ /* Port in 485FD mode can not chage mode */
-+ goto out;
-+
-+ up->rs485.enabled = 0x1 & r->enabled;
-+ up->rs485.rts_on_send = 0x01 & r->rts_on_send;
-+ up->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
-+ up->rs485.delay_rts_before_send = r->delay_rts_before_send;
-+
-+ cris_set_rs485_mode(up);
-+ out:
-+ return 0;
-+}
-+
-+
-+/* Enable RS485 mode on port and send the data. Port will stay
-+ * in 485 mode after the data has been sent.
-+ */
-+static int
-+cris_write_rs485(struct uart_cris_port* up, const unsigned char *buf,
-+ int count)
-+{
-+ up->rs485.enabled = 1;
-+
-+ /* Set the port in RS485 mode */
-+ cris_set_rs485_mode(up);
-+
-+ /* Send the data */
-+ count = serial_cris_driver.tty_driver->write(up->port.info->tty, buf, count);
-+
-+ return count;
-+}
-+
-+#endif /* CONFIG_ETRAX_RS485 */
-+
-+static int serial_cris_ioctl(struct uart_port *port, unsigned int cmd,
-+ unsigned long arg)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+
-+ switch (cmd) {
-+#if defined(CONFIG_ETRAX_RS485)
-+ case TIOCSERSETRS485: {
-+ struct rs485_control rs485ctrl;
-+ if (copy_from_user(&rs485ctrl, (struct rs485_control*) arg,
-+ sizeof(rs485ctrl)))
-+ return -EFAULT;
-+
-+ return cris_enable_rs485(up, &rs485ctrl);
-+ }
-+
-+ case TIOCSERWRRS485: {
-+ struct rs485_write rs485wr;
-+ if (copy_from_user(&rs485wr, (struct rs485_write*)arg,
-+ sizeof(rs485wr)))
-+ return -EFAULT;
-+
-+ return cris_write_rs485(up, rs485wr.outc, rs485wr.outc_size);
-+ }
-+#endif
-+ default:
-+ return -ENOIOCTLCMD;
-+ }
-+
-+ return 0;
-+}
-+
-+static const struct uart_ops serial_cris_pops = {
-+ .tx_empty = serial_cris_tx_empty,
-+ .set_mctrl = serial_cris_set_mctrl,
-+ .get_mctrl = serial_cris_get_mctrl,
-+ .stop_tx = serial_cris_stop_tx,
-+ .start_tx = serial_cris_start_tx,
-+ .send_xchar = serial_cris_send_xchar,
-+ .stop_rx = serial_cris_stop_rx,
-+ .enable_ms = serial_cris_enable_ms,
-+ .break_ctl = serial_cris_break_ctl,
-+ .startup = serial_cris_startup,
-+ .shutdown = serial_cris_shutdown,
-+ .set_termios = serial_cris_set_termios,
-+ .type = serial_cris_type,
-+ .release_port = serial_cris_release_port,
-+ .request_port = serial_cris_request_port,
-+ .config_port = serial_cris_config_port,
-+ .ioctl = serial_cris_ioctl,
-+};
-+
-+/*
-+ * It's too easy to break CONFIG_ETRAX_DEBUG_PORT_NULL and the
-+ * no-config choices by adding and moving code to before a necessary
-+ * early exit in all functions for the special case of
-+ * up->regi_ser == 0. This collection of dummy functions lets us
-+ * avoid that. Maybe there should be a generic table of dummy serial
-+ * functions?
-+ */
-+
-+static unsigned int serial_cris_tx_empty_dummy(struct uart_port *port)
-+{
-+ return TIOCSER_TEMT;
-+}
-+
-+static void serial_cris_set_mctrl_dummy(struct uart_port *port,
-+ unsigned int mctrl)
-+{
-+}
-+
-+static unsigned int serial_cris_get_mctrl_dummy(struct uart_port *port)
-+{
-+ return 0;
-+}
-+
-+static void serial_cris_stop_tx_dummy(struct uart_port *port)
-+{
-+}
-+
-+static void serial_cris_start_tx_dummy(struct uart_port *port)
-+{
-+ /* Discard outbound characters. */
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ struct circ_buf *xmit = &up->port.info->xmit;
-+ xmit->tail = xmit->head;
-+ uart_write_wakeup(port);
-+}
-+
-+#define serial_cris_stop_rx_dummy serial_cris_stop_tx_dummy
-+
-+#define serial_cris_enable_ms_dummy serial_cris_stop_tx_dummy
-+
-+static void serial_cris_break_ctl_dummy(struct uart_port *port,
-+ int break_state)
-+{
-+}
-+
-+static int serial_cris_startup_dummy(struct uart_port *port)
-+{
-+ return 0;
-+}
-+
-+#define serial_cris_shutdown_dummy serial_cris_stop_tx_dummy
-+
-+static void
-+serial_cris_set_termios_dummy(struct uart_port *port, struct termios *termios,
-+ struct termios *old)
-+{
-+}
-+
-+#define serial_cris_release_port_dummy serial_cris_stop_tx_dummy
-+#define serial_cris_request_port_dummy serial_cris_startup_dummy
-+
-+static const struct uart_ops serial_cris_dummy_pops = {
-+ /*
-+ * We *could* save one or two of those with different
-+ * signature by casting and knowledge of the ABI, but it's
-+ * just not worth the maintenance headache.
-+ * For the ones we don't define here, the default (usually meaning
-+ * "unimplemented") makes sense.
-+ */
-+ .tx_empty = serial_cris_tx_empty_dummy,
-+ .set_mctrl = serial_cris_set_mctrl_dummy,
-+ .get_mctrl = serial_cris_get_mctrl_dummy,
-+ .stop_tx = serial_cris_stop_tx_dummy,
-+ .start_tx = serial_cris_start_tx_dummy,
-+ .stop_rx = serial_cris_stop_rx_dummy,
-+ .enable_ms = serial_cris_enable_ms_dummy,
-+ .break_ctl = serial_cris_break_ctl_dummy,
-+ .startup = serial_cris_startup_dummy,
-+ .shutdown = serial_cris_shutdown_dummy,
-+ .set_termios = serial_cris_set_termios_dummy,
-+
-+ /* This one we keep the same. */
-+ .type = serial_cris_type,
-+
-+ .release_port = serial_cris_release_port_dummy,
-+ .request_port = serial_cris_request_port_dummy,
-+
-+ /*
-+ * This one we keep the same too, as long as it doesn't do
-+ * anything else but to set the type.
-+ */
-+ .config_port = serial_cris_config_port,
-+};
-+
-+static void cris_serial_port_init(struct uart_port *port, int line)
-+{
-+ struct uart_cris_port *up = (struct uart_cris_port *)port;
-+ static int first = 1;
-+
-+ if (up->initialized)
-+ return;
-+ up->initialized = 1;
-+ port->line = line;
-+ spin_lock_init(&port->lock);
-+ port->ops =
-+ up->regi_ser == 0 ? &serial_cris_dummy_pops :
-+ &serial_cris_pops;
-+ port->irq = up->irq;
-+ port->iobase = up->regi_ser ? up->regi_ser : 1;
-+ port->uartclk = 29493000;
-+
-+ /*
-+ * We can't fit any more than 255 here (unsigned char), though
-+ * actually UART_XMIT_SIZE characters could be pending output (if it
-+ * wasn't for the single test in transmit_chars_dma). At time of this
-+ * writing, the definition of "fifosize" is here the amount of
-+ * characters that can be pending output after a start_tx call until
-+ * tx_empty returns 1: see serial_core.c:uart_wait_until_sent. This
-+ * matters for timeout calculations unfortunately, but keeping larger
-+ * amounts at the DMA wouldn't win much so let's just play nice.
-+ */
-+ port->fifosize = 255;
-+ port->flags = UPF_BOOT_AUTOCONF;
-+
-+#ifdef CONFIG_ETRAX_RS485
-+ /* Set sane defaults. */
-+ up->rs485.rts_on_send = 0;
-+ up->rs485.rts_after_sent = 1;
-+ up->rs485.delay_rts_before_send = 0;
-+ if (up->port_type > TYPE_232)
-+ up->rs485.enabled = 1;
-+ else
-+ up->rs485.enabled = 0;
-+#endif
-+
-+ if (first) {
-+ first = 0;
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0
-+ SETUP_PINS(0);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1
-+ SETUP_PINS(1);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2
-+ SETUP_PINS(2);
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3
-+ SETUP_PINS(3);
-+#endif
-+ }
-+}
-+
-+static int __init serial_cris_init(void)
-+{
-+ int ret, i;
-+ reg_ser_rw_rec_ctrl rec_ctrl;
-+ printk(KERN_INFO "Serial: CRISv32 driver $Revision: 1.78 $ ");
-+
-+ ret = uart_register_driver(&serial_cris_driver);
-+ if (ret)
-+ goto out;
-+
-+ for (i = 0; i < UART_NR; i++) {
-+ if (serial_cris_ports[i].used) {
-+#ifdef CONFIG_ETRAX_RS485
-+ /* Make sure that the RTS pin stays low when allocating
-+ * pins for a port in 485 mode.
-+ */
-+ if (serial_cris_ports[i].port_type > TYPE_232) {
-+ rec_ctrl = REG_RD(ser, serial_cris_ports[i].regi_ser, rw_rec_ctrl);
-+ rec_ctrl.rts_n = regk_ser_active;
-+ REG_WR(ser, serial_cris_ports[i].regi_ser, rw_rec_ctrl, rec_ctrl);
-+ }
-+#endif
-+ switch (serial_cris_ports[i].regi_ser) {
-+ case regi_ser1:
-+ if (crisv32_pinmux_alloc_fixed(pinmux_ser1)) {
-+ printk("Failed to allocate pins for ser1, disable port\n");
-+ serial_cris_ports[i].used = 0;
-+ continue;
-+ }
-+ break;
-+ case regi_ser2:
-+ if (crisv32_pinmux_alloc_fixed(pinmux_ser2)) {
-+ printk("Failed to allocate pins for ser2, disable port\n");
-+ serial_cris_ports[i].used = 0;
-+ continue;
-+ }
-+ break;
-+ case regi_ser3:
-+ if (crisv32_pinmux_alloc_fixed(pinmux_ser3)) {
-+ printk("Failed to allocate pins for ser3, disable port\n");
-+ serial_cris_ports[i].used = 0;
-+ continue;
-+ }
-+ break;
-+ }
-+
-+ struct uart_port *port = &serial_cris_ports[i].port;
-+ cris_console.index = i;
-+ cris_serial_port_init(port, i);
-+ uart_add_one_port(&serial_cris_driver, port);
-+ }
-+ }
-+
-+out:
-+ return ret;
-+}
-+
-+static void __exit serial_cris_exit(void)
-+{
-+ int i;
-+ for (i = 0; i < UART_NR; i++)
-+ if (serial_cris_ports[i].used) {
-+ switch (serial_cris_ports[i].regi_ser) {
-+ case regi_ser1:
-+ crisv32_pinmux_dealloc_fixed(pinmux_ser1);
-+ break;
-+ case regi_ser2:
-+ crisv32_pinmux_dealloc_fixed(pinmux_ser2);
-+ break;
-+ case regi_ser3:
-+ crisv32_pinmux_dealloc_fixed(pinmux_ser3);
-+ break;
-+ }
-+ uart_remove_one_port(&serial_cris_driver,
-+ &serial_cris_ports[i].port);
-+ }
-+ uart_unregister_driver(&serial_cris_driver);
-+}
-+
-+module_init(serial_cris_init);
-+module_exit(serial_cris_exit);
---- linux-2.6.19.2.orig/drivers/usb/host/hc_crisv10.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.c 2007-02-26 20:58:29.000000000 +0100
-@@ -1,219 +1,51 @@
- /*
-- * usb-host.c: ETRAX 100LX USB Host Controller Driver (HCD)
- *
-- * Copyright (c) 2002, 2003 Axis Communications AB.
-+ * ETRAX 100LX USB Host Controller Driver
-+ *
-+ * Copyright (C) 2005, 2006 Axis Communications AB
-+ *
-+ * Author: Konrad Eriksson <konrad.eriksson@axis.se>
-+ *
- */
-
-+#include <linux/module.h>
- #include <linux/kernel.h>
--#include <linux/delay.h>
--#include <linux/ioport.h>
--#include <linux/sched.h>
--#include <linux/slab.h>
--#include <linux/errno.h>
--#include <linux/unistd.h>
--#include <linux/interrupt.h>
- #include <linux/init.h>
--#include <linux/list.h>
-+#include <linux/moduleparam.h>
- #include <linux/spinlock.h>
-+#include <linux/usb.h>
-+#include <linux/platform_device.h>
-
--#include <asm/uaccess.h>
- #include <asm/io.h>
- #include <asm/irq.h>
--#include <asm/dma.h>
--#include <asm/system.h>
--#include <asm/arch/svinto.h>
-+#include <asm/arch/dma.h>
-+#include <asm/arch/io_interface_mux.h>
-
--#include <linux/usb.h>
--/* Ugly include because we don't live with the other host drivers. */
--#include <../drivers/usb/core/hcd.h>
--#include <../drivers/usb/core/usb.h>
--
--#include "hc_crisv10.h"
-+#include "../core/hcd.h"
-+#include "../core/hub.h"
-+#include "hc-crisv10.h"
-+#include "hc-cris-dbg.h"
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Host Controller settings */
-+/***************************************************************************/
-+/***************************************************************************/
-+
-+#define VERSION "1.00"
-+#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
-+#define DESCRIPTION "ETRAX 100LX USB Host Controller"
-
- #define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
- #define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
- #define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
-
--static const char *usb_hcd_version = "$Revision: 1.2 $";
--
--#undef KERN_DEBUG
--#define KERN_DEBUG ""
--
--
--#undef USB_DEBUG_RH
--#undef USB_DEBUG_EPID
--#undef USB_DEBUG_SB
--#undef USB_DEBUG_DESC
--#undef USB_DEBUG_URB
--#undef USB_DEBUG_TRACE
--#undef USB_DEBUG_BULK
--#undef USB_DEBUG_CTRL
--#undef USB_DEBUG_INTR
--#undef USB_DEBUG_ISOC
--
--#ifdef USB_DEBUG_RH
--#define dbg_rh(format, arg...) printk(KERN_DEBUG __FILE__ ": (RH) " format "\n" , ## arg)
--#else
--#define dbg_rh(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_EPID
--#define dbg_epid(format, arg...) printk(KERN_DEBUG __FILE__ ": (EPID) " format "\n" , ## arg)
--#else
--#define dbg_epid(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_SB
--#define dbg_sb(format, arg...) printk(KERN_DEBUG __FILE__ ": (SB) " format "\n" , ## arg)
--#else
--#define dbg_sb(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_CTRL
--#define dbg_ctrl(format, arg...) printk(KERN_DEBUG __FILE__ ": (CTRL) " format "\n" , ## arg)
--#else
--#define dbg_ctrl(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_BULK
--#define dbg_bulk(format, arg...) printk(KERN_DEBUG __FILE__ ": (BULK) " format "\n" , ## arg)
--#else
--#define dbg_bulk(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_INTR
--#define dbg_intr(format, arg...) printk(KERN_DEBUG __FILE__ ": (INTR) " format "\n" , ## arg)
--#else
--#define dbg_intr(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_ISOC
--#define dbg_isoc(format, arg...) printk(KERN_DEBUG __FILE__ ": (ISOC) " format "\n" , ## arg)
--#else
--#define dbg_isoc(format, arg...) do {} while (0)
--#endif
--
--#ifdef USB_DEBUG_TRACE
--#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
--#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
--#else
--#define DBFENTER do {} while (0)
--#define DBFEXIT do {} while (0)
--#endif
--
--#define usb_pipeslow(pipe) (((pipe) >> 26) & 1)
--
--/*-------------------------------------------------------------------
-- Virtual Root Hub
-- -------------------------------------------------------------------*/
--
--static __u8 root_hub_dev_des[] =
--{
-- 0x12, /* __u8 bLength; */
-- 0x01, /* __u8 bDescriptorType; Device */
-- 0x00, /* __le16 bcdUSB; v1.0 */
-- 0x01,
-- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
-- 0x00, /* __u8 bDeviceSubClass; */
-- 0x00, /* __u8 bDeviceProtocol; */
-- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
-- 0x00, /* __le16 idVendor; */
-- 0x00,
-- 0x00, /* __le16 idProduct; */
-- 0x00,
-- 0x00, /* __le16 bcdDevice; */
-- 0x00,
-- 0x00, /* __u8 iManufacturer; */
-- 0x02, /* __u8 iProduct; */
-- 0x01, /* __u8 iSerialNumber; */
-- 0x01 /* __u8 bNumConfigurations; */
--};
--
--/* Configuration descriptor */
--static __u8 root_hub_config_des[] =
--{
-- 0x09, /* __u8 bLength; */
-- 0x02, /* __u8 bDescriptorType; Configuration */
-- 0x19, /* __le16 wTotalLength; */
-- 0x00,
-- 0x01, /* __u8 bNumInterfaces; */
-- 0x01, /* __u8 bConfigurationValue; */
-- 0x00, /* __u8 iConfiguration; */
-- 0x40, /* __u8 bmAttributes; Bit 7: Bus-powered */
-- 0x00, /* __u8 MaxPower; */
--
-- /* interface */
-- 0x09, /* __u8 if_bLength; */
-- 0x04, /* __u8 if_bDescriptorType; Interface */
-- 0x00, /* __u8 if_bInterfaceNumber; */
-- 0x00, /* __u8 if_bAlternateSetting; */
-- 0x01, /* __u8 if_bNumEndpoints; */
-- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
-- 0x00, /* __u8 if_bInterfaceSubClass; */
-- 0x00, /* __u8 if_bInterfaceProtocol; */
-- 0x00, /* __u8 if_iInterface; */
--
-- /* endpoint */
-- 0x07, /* __u8 ep_bLength; */
-- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
-- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
-- 0x03, /* __u8 ep_bmAttributes; Interrupt */
-- 0x08, /* __le16 ep_wMaxPacketSize; 8 Bytes */
-- 0x00,
-- 0xff /* __u8 ep_bInterval; 255 ms */
--};
--
--static __u8 root_hub_hub_des[] =
--{
-- 0x09, /* __u8 bLength; */
-- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
-- 0x02, /* __u8 bNbrPorts; */
-- 0x00, /* __u16 wHubCharacteristics; */
-- 0x00,
-- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
-- 0x00, /* __u8 bHubContrCurrent; 0 mA */
-- 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
-- 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
--};
--
--static DEFINE_TIMER(bulk_start_timer, NULL, 0, 0);
--static DEFINE_TIMER(bulk_eot_timer, NULL, 0, 0);
--
--/* We want the start timer to expire before the eot timer, because the former might start
-- traffic, thus making it unnecessary for the latter to time out. */
--#define BULK_START_TIMER_INTERVAL (HZ/10) /* 100 ms */
--#define BULK_EOT_TIMER_INTERVAL (HZ/10+2) /* 120 ms */
--
--#define OK(x) len = (x); dbg_rh("OK(%d): line: %d", x, __LINE__); break
--#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
--{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
--
--#define SLAB_FLAG (in_interrupt() ? SLAB_ATOMIC : SLAB_KERNEL)
--#define KMALLOC_FLAG (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL)
--
--/* Most helpful debugging aid */
--#define assert(expr) ((void) ((expr) ? 0 : (err("assert failed at line %d",__LINE__))))
--
--/* Alternative assert define which stops after a failed assert. */
--/*
--#define assert(expr) \
--{ \
-- if (!(expr)) { \
-- err("assert failed at line %d",__LINE__); \
-- while (1); \
-- } \
--}
--*/
--
-+/* Number of physical ports in Etrax 100LX */
-+#define USB_ROOT_HUB_PORTS 2
-
--/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it dynamically?
-- To adjust it dynamically we would have to get an interrupt when we reach the end
-- of the rx descriptor list, or when we get close to the end, and then allocate more
-- descriptors. */
--
--#define NBR_OF_RX_DESC 512
--#define RX_DESC_BUF_SIZE 1024
--#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
-+const char hc_name[] = "hc-crisv10";
-+const char product_desc[] = DESCRIPTION;
-
- /* The number of epids is, among other things, used for pre-allocating
- ctrl, bulk and isoc EP descriptors (one for each epid).
-@@ -221,4332 +53,4632 @@
- #define NBR_OF_EPIDS 32
-
- /* Support interrupt traffic intervals up to 128 ms. */
--#define MAX_INTR_INTERVAL 128
-+#define MAX_INTR_INTERVAL 128
-
--/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP table
-- must be "invalid". By this we mean that we shouldn't care about epid attentions
-- for this epid, or at least handle them differently from epid attentions for "valid"
-- epids. This define determines which one to use (don't change it). */
--#define INVALID_EPID 31
-+/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
-+ table must be "invalid". By this we mean that we shouldn't care about epid
-+ attentions for this epid, or at least handle them differently from epid
-+ attentions for "valid" epids. This define determines which one to use
-+ (don't change it). */
-+#define INVALID_EPID 31
- /* A special epid for the bulk dummys. */
--#define DUMMY_EPID 30
--
--/* This is just a software cache for the valid entries in R_USB_EPT_DATA. */
--static __u32 epid_usage_bitmask;
--
--/* A bitfield to keep information on in/out traffic is needed to uniquely identify
-- an endpoint on a device, since the most significant bit which indicates traffic
-- direction is lacking in the ep_id field (ETRAX epids can handle both in and
-- out traffic on endpoints that are otherwise identical). The USB framework, however,
-- relies on them to be handled separately. For example, bulk IN and OUT urbs cannot
-- be queued in the same list, since they would block each other. */
--static __u32 epid_out_traffic;
--
--/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
-- Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be cache aligned. */
--static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
--static volatile USB_IN_Desc_t RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
--
--/* Pointers into RxDescList. */
--static volatile USB_IN_Desc_t *myNextRxDesc;
--static volatile USB_IN_Desc_t *myLastRxDesc;
--static volatile USB_IN_Desc_t *myPrevRxDesc;
--
--/* EP descriptors must be 32-bit aligned. */
--static volatile USB_EP_Desc_t TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
--static volatile USB_EP_Desc_t TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
--/* After each enabled bulk EP (IN or OUT) we put two disabled EP descriptors with the eol flag set,
-- causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
-- gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
-- EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
-- in each frame. */
--static volatile USB_EP_Desc_t TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
--
--static volatile USB_EP_Desc_t TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
--static volatile USB_SB_Desc_t TxIsocSB_zout __attribute__ ((aligned (4)));
--
--static volatile USB_EP_Desc_t TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
--static volatile USB_SB_Desc_t TxIntrSB_zout __attribute__ ((aligned (4)));
--
--/* A zout transfer makes a memory access at the address of its buf pointer, which means that setting
-- this buf pointer to 0 will cause an access to the flash. In addition to this, setting sw_len to 0
-- results in a 16/32 bytes (depending on DMA burst size) transfer. Instead, we set it to 1, and point
-- it to this buffer. */
--static int zout_buffer[4] __attribute__ ((aligned (4)));
-+#define DUMMY_EPID 30
-
--/* Cache for allocating new EP and SB descriptors. */
--static kmem_cache_t *usb_desc_cache;
-+/* Module settings */
-
--/* Cache for the registers allocated in the top half. */
--static kmem_cache_t *top_half_reg_cache;
-+MODULE_DESCRIPTION(DESCRIPTION);
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
-
--/* Cache for the data allocated in the isoc descr top half. */
--static kmem_cache_t *isoc_compl_cache;
-
--static struct usb_bus *etrax_usb_bus;
-+/* Module parameters */
-
--/* This is a circular (double-linked) list of the active urbs for each epid.
-- The head is never removed, and new urbs are linked onto the list as
-- urb_entry_t elements. Don't reference urb_list directly; use the wrapper
-- functions instead. Note that working with these lists might require spinlock
-- protection. */
--static struct list_head urb_list[NBR_OF_EPIDS];
-+/* 0 = No ports enabled
-+ 1 = Only port 1 enabled (on board ethernet on devboard)
-+ 2 = Only port 2 enabled (external connector on devboard)
-+ 3 = Both ports enabled
-+*/
-+static unsigned int ports = 3;
-+module_param(ports, uint, S_IRUGO);
-+MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
-
--/* Read about the need and usage of this lock in submit_ctrl_urb. */
--static spinlock_t urb_list_lock;
-
--/* Used when unlinking asynchronously. */
--static struct list_head urb_unlink_list;
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Shared global variables for this module */
-+/***************************************************************************/
-+/***************************************************************************/
-
--/* for returning string descriptors in UTF-16LE */
--static int ascii2utf (char *ascii, __u8 *utf, int utfmax)
--{
-- int retval;
-+/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
-+static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-
-- for (retval = 0; *ascii && utfmax > 1; utfmax -= 2, retval += 2) {
-- *utf++ = *ascii++ & 0x7f;
-- *utf++ = 0;
-- }
-- return retval;
--}
-+static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-
--static int usb_root_hub_string (int id, int serial, char *type, __u8 *data, int len)
--{
-- char buf [30];
-+/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
-+static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
-+static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
-
-- // assert (len > (2 * (sizeof (buf) + 1)));
-- // assert (strlen (type) <= 8);
-+static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-+static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
-
-- // language ids
-- if (id == 0) {
-- *data++ = 4; *data++ = 3; /* 4 bytes data */
-- *data++ = 0; *data++ = 0; /* some language id */
-- return 4;
--
-- // serial number
-- } else if (id == 1) {
-- sprintf (buf, "%x", serial);
--
-- // product description
-- } else if (id == 2) {
-- sprintf (buf, "USB %s Root Hub", type);
--
-- // id 3 == vendor description
--
-- // unsupported IDs --> "stall"
-- } else
-- return 0;
--
-- data [0] = 2 + ascii2utf (buf, data + 2, len - 2);
-- data [1] = 3;
-- return data [0];
--}
-+static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-
--/* Wrappers around the list functions (include/linux/list.h). */
-+/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
-+ causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
-+ gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
-+ EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
-+ in each frame. */
-+static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
-
--static inline int urb_list_empty(int epid)
-+/* List of URB pointers, where each points to the active URB for a epid.
-+ For Bulk, Ctrl and Intr this means which URB that currently is added to
-+ DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
-+ URB has completed is the queue examined and the first URB in queue is
-+ removed and moved to the activeUrbList while its state change to STARTED and
-+ its transfer(s) gets added to DMA list (exception Isoc where URBs enter
-+ state STARTED directly and added transfers added to DMA lists). */
-+static struct urb *activeUrbList[NBR_OF_EPIDS];
-+
-+/* Additional software state info for each epid */
-+static struct etrax_epid epid_state[NBR_OF_EPIDS];
-+
-+/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
-+ even if there is new data waiting to be processed */
-+static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
-+static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
-+
-+/* We want the start timer to expire before the eot timer, because the former
-+ might start traffic, thus making it unnecessary for the latter to time
-+ out. */
-+#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
-+#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
-+
-+/* Delay before a URB completion happen when it's scheduled to be delayed */
-+#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
-+
-+/* Simplifying macros for checking software state info of a epid */
-+/* ----------------------------------------------------------------------- */
-+#define epid_inuse(epid) epid_state[epid].inuse
-+#define epid_out_traffic(epid) epid_state[epid].out_traffic
-+#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
-+#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* DEBUG FUNCTIONS */
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Note that these functions are always available in their "__" variants,
-+ for use in error situations. The "__" missing variants are controlled by
-+ the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
-+static void __dump_urb(struct urb* purb)
- {
-- return list_empty(&urb_list[epid]);
-+ struct crisv10_urb_priv *urb_priv = purb->hcpriv;
-+ int urb_num = -1;
-+ if(urb_priv) {
-+ urb_num = urb_priv->urb_num;
-+ }
-+ printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
-+ printk("dev :0x%08lx\n", (unsigned long)purb->dev);
-+ printk("pipe :0x%08x\n", purb->pipe);
-+ printk("status :%d\n", purb->status);
-+ printk("transfer_flags :0x%08x\n", purb->transfer_flags);
-+ printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
-+ printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
-+ printk("actual_length :%d\n", purb->actual_length);
-+ printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
-+ printk("start_frame :%d\n", purb->start_frame);
-+ printk("number_of_packets :%d\n", purb->number_of_packets);
-+ printk("interval :%d\n", purb->interval);
-+ printk("error_count :%d\n", purb->error_count);
-+ printk("context :0x%08lx\n", (unsigned long)purb->context);
-+ printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
-+}
-+
-+static void __dump_in_desc(volatile struct USB_IN_Desc *in)
-+{
-+ printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
-+ printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
-+ printk(" command : 0x%04x\n", in->command);
-+ printk(" next : 0x%08lx\n", in->next);
-+ printk(" buf : 0x%08lx\n", in->buf);
-+ printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
-+ printk(" status : 0x%04x\n\n", in->status);
-+}
-+
-+static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
-+{
-+ char tt = (sb->command & 0x30) >> 4;
-+ char *tt_string;
-+
-+ switch (tt) {
-+ case 0:
-+ tt_string = "zout";
-+ break;
-+ case 1:
-+ tt_string = "in";
-+ break;
-+ case 2:
-+ tt_string = "out";
-+ break;
-+ case 3:
-+ tt_string = "setup";
-+ break;
-+ default:
-+ tt_string = "unknown (weird)";
-+ }
-+
-+ printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
-+ printk(" command:0x%04x (", sb->command);
-+ printk("rem:%d ", (sb->command & 0x3f00) >> 8);
-+ printk("full:%d ", (sb->command & 0x40) >> 6);
-+ printk("tt:%d(%s) ", tt, tt_string);
-+ printk("intr:%d ", (sb->command & 0x8) >> 3);
-+ printk("eot:%d ", (sb->command & 0x2) >> 1);
-+ printk("eol:%d)", sb->command & 0x1);
-+ printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
-+ printk(" next:0x%08lx", sb->next);
-+ printk(" buf:0x%08lx\n", sb->buf);
-+}
-+
-+
-+static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
-+{
-+ printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
-+ printk(" command:0x%04x (", ep->command);
-+ printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
-+ printk("enable:%d ", (ep->command & 0x10) >> 4);
-+ printk("intr:%d ", (ep->command & 0x8) >> 3);
-+ printk("eof:%d ", (ep->command & 0x2) >> 1);
-+ printk("eol:%d)", ep->command & 0x1);
-+ printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
-+ printk(" next:0x%08lx", ep->next);
-+ printk(" sub:0x%08lx\n", ep->sub);
- }
-
--/* Returns first urb for this epid, or NULL if list is empty. */
--static inline struct urb *urb_list_first(int epid)
-+static inline void __dump_ep_list(int pipe_type)
- {
-- struct urb *first_urb = 0;
-+ volatile struct USB_EP_Desc *ep;
-+ volatile struct USB_EP_Desc *first_ep;
-+ volatile struct USB_SB_Desc *sb;
-+
-+ switch (pipe_type)
-+ {
-+ case PIPE_BULK:
-+ first_ep = &TxBulkEPList[0];
-+ break;
-+ case PIPE_CONTROL:
-+ first_ep = &TxCtrlEPList[0];
-+ break;
-+ case PIPE_INTERRUPT:
-+ first_ep = &TxIntrEPList[0];
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ first_ep = &TxIsocEPList[0];
-+ break;
-+ default:
-+ warn("Cannot dump unknown traffic type");
-+ return;
-+ }
-+ ep = first_ep;
-+
-+ printk("\n\nDumping EP list...\n\n");
-+
-+ do {
-+ __dump_ep_desc(ep);
-+ /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
-+ sb = ep->sub ? phys_to_virt(ep->sub) : 0;
-+ while (sb) {
-+ __dump_sb_desc(sb);
-+ sb = sb->next ? phys_to_virt(sb->next) : 0;
-+ }
-+ ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
-
-- if (!urb_list_empty(epid)) {
-- /* Get the first urb (i.e. head->next). */
-- urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
-- first_urb = urb_entry->urb;
-- }
-- return first_urb;
-+ } while (ep != first_ep);
- }
-
--/* Adds an urb_entry last in the list for this epid. */
--static inline void urb_list_add(struct urb *urb, int epid)
-+static inline void __dump_ept_data(int epid)
- {
-- urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), KMALLOC_FLAG);
-- assert(urb_entry);
-+ unsigned long flags;
-+ __u32 r_usb_ept_data;
-
-- urb_entry->urb = urb;
-- list_add_tail(&urb_entry->list, &urb_list[epid]);
-+ if (epid < 0 || epid > 31) {
-+ printk("Cannot dump ept data for invalid epid %d\n", epid);
-+ return;
-+ }
-+
-+ local_irq_save(flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ r_usb_ept_data = *R_USB_EPT_DATA;
-+ local_irq_restore(flags);
-+
-+ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
-+ if (r_usb_ept_data == 0) {
-+ /* No need for more detailed printing. */
-+ return;
-+ }
-+ printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
-+ printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
-+ printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
-+ printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
-+ printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
-+ printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
-+ printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
-+ printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
-+ printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
-+ printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
-+ printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
-+ printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
-+}
-+
-+static inline void __dump_ept_data_iso(int epid)
-+{
-+ unsigned long flags;
-+ __u32 ept_data;
-+
-+ if (epid < 0 || epid > 31) {
-+ printk("Cannot dump ept data for invalid epid %d\n", epid);
-+ return;
-+ }
-+
-+ local_irq_save(flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ ept_data = *R_USB_EPT_DATA_ISO;
-+ local_irq_restore(flags);
-+
-+ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
-+ if (ept_data == 0) {
-+ /* No need for more detailed printing. */
-+ return;
-+ }
-+ printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
-+ ept_data));
-+ printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
-+ ept_data));
-+ printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
-+ ept_data));
-+ printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
-+ ept_data));
-+ printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
-+ ept_data));
-+ printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
-+ ept_data));
- }
-
--/* Search through the list for an element that contains this urb. (The list
-- is expected to be short and the one we are about to delete will often be
-- the first in the list.) */
--static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid)
-+static inline void __dump_ept_data_list(void)
- {
-- struct list_head *entry;
-- struct list_head *tmp;
-- urb_entry_t *urb_entry;
--
-- list_for_each_safe(entry, tmp, &urb_list[epid]) {
-- urb_entry = list_entry(entry, urb_entry_t, list);
-- assert(urb_entry);
-- assert(urb_entry->urb);
--
-- if (urb_entry->urb == urb) {
-- return urb_entry;
-- }
-- }
-- return 0;
--}
-+ int i;
-
--/* Delete an urb from the list. */
--static inline void urb_list_del(struct urb *urb, int epid)
--{
-- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
-- assert(urb_entry);
-+ printk("Dumping the whole R_USB_EPT_DATA list\n");
-
-- /* Delete entry and free. */
-- list_del(&urb_entry->list);
-- kfree(urb_entry);
-+ for (i = 0; i < 32; i++) {
-+ __dump_ept_data(i);
-+ }
-+}
-+
-+static void debug_epid(int epid) {
-+ int i;
-+
-+ if(epid_isoc(epid)) {
-+ __dump_ept_data_iso(epid);
-+ } else {
-+ __dump_ept_data(epid);
-+ }
-+
-+ printk("Bulk:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
-+ }
-+ }
-+
-+ printk("Ctrl:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
-+ }
-+ }
-+
-+ printk("Intr:\n");
-+ for(i = 0; i < MAX_INTR_INTERVAL; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
-+ }
-+ }
-+
-+ printk("Isoc:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
-+ }
-+ }
-+
-+ __dump_ept_data_list();
-+ __dump_ep_list(PIPE_INTERRUPT);
-+ printk("\n\n");
-+}
-+
-+
-+
-+char* hcd_status_to_str(__u8 bUsbStatus) {
-+ static char hcd_status_str[128];
-+ hcd_status_str[0] = '\0';
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
-+ strcat(hcd_status_str, "ourun ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
-+ strcat(hcd_status_str, "perror ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
-+ strcat(hcd_status_str, "device_mode ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
-+ strcat(hcd_status_str, "host_mode ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
-+ strcat(hcd_status_str, "started ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
-+ strcat(hcd_status_str, "running ");
-+ }
-+ return hcd_status_str;
-+}
-+
-+
-+char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
-+ static char sblist_to_str_buff[128];
-+ char tmp[32], tmp2[32];
-+ sblist_to_str_buff[0] = '\0';
-+ while(sb_desc != NULL) {
-+ switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
-+ case 0: sprintf(tmp, "zout"); break;
-+ case 1: sprintf(tmp, "in"); break;
-+ case 2: sprintf(tmp, "out"); break;
-+ case 3: sprintf(tmp, "setup"); break;
-+ }
-+ sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
-+ strcat(sblist_to_str_buff, tmp2);
-+ if(sb_desc->next != 0) {
-+ sb_desc = phys_to_virt(sb_desc->next);
-+ } else {
-+ sb_desc = NULL;
-+ }
-+ }
-+ return sblist_to_str_buff;
-+}
-+
-+char* port_status_to_str(__u16 wPortStatus) {
-+ static char port_status_str[128];
-+ port_status_str[0] = '\0';
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
-+ strcat(port_status_str, "connected ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
-+ strcat(port_status_str, "enabled ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
-+ strcat(port_status_str, "suspended ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
-+ strcat(port_status_str, "reset ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
-+ strcat(port_status_str, "full-speed ");
-+ } else {
-+ strcat(port_status_str, "low-speed ");
-+ }
-+ return port_status_str;
-+}
-+
-+
-+char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
-+ static char endpoint_to_str_buff[128];
-+ char tmp[32];
-+ int epnum = ed->bEndpointAddress & 0x0F;
-+ int dir = ed->bEndpointAddress & 0x80;
-+ int type = ed->bmAttributes & 0x03;
-+ endpoint_to_str_buff[0] = '\0';
-+ sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
-+ switch(type) {
-+ case 0:
-+ sprintf(tmp, " ctrl");
-+ break;
-+ case 1:
-+ sprintf(tmp, " isoc");
-+ break;
-+ case 2:
-+ sprintf(tmp, " bulk");
-+ break;
-+ case 3:
-+ sprintf(tmp, " intr");
-+ break;
-+ }
-+ strcat(endpoint_to_str_buff, tmp);
-+ if(dir) {
-+ sprintf(tmp, " in");
-+ } else {
-+ sprintf(tmp, " out");
-+ }
-+ strcat(endpoint_to_str_buff, tmp);
-+
-+ return endpoint_to_str_buff;
-+}
-+
-+/* Debug helper functions for Transfer Controller */
-+char* pipe_to_str(unsigned int pipe) {
-+ static char pipe_to_str_buff[128];
-+ char tmp[64];
-+ sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
-+ sprintf(tmp, " type:%s", str_type(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+
-+ sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+ sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+ return pipe_to_str_buff;
- }
-
--/* Move an urb to the end of the list. */
--static inline void urb_list_move_last(struct urb *urb, int epid)
--{
-- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
-- assert(urb_entry);
--
-- list_move_tail(&urb_entry->list, &urb_list[epid]);
--}
-
--/* Get the next urb in the list. */
--static inline struct urb *urb_list_next(struct urb *urb, int epid)
--{
-- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
-+#define USB_DEBUG_DESC 1
-
-- assert(urb_entry);
-+#ifdef USB_DEBUG_DESC
-+#define dump_in_desc(x) __dump_in_desc(x)
-+#define dump_sb_desc(...) __dump_sb_desc(...)
-+#define dump_ep_desc(x) __dump_ep_desc(x)
-+#define dump_ept_data(x) __dump_ept_data(x)
-+#else
-+#define dump_in_desc(...) do {} while (0)
-+#define dump_sb_desc(...) do {} while (0)
-+#define dump_ep_desc(...) do {} while (0)
-+#endif
-
-- if (urb_entry->list.next != &urb_list[epid]) {
-- struct list_head *elem = urb_entry->list.next;
-- urb_entry = list_entry(elem, urb_entry_t, list);
-- return urb_entry->urb;
-- } else {
-- return NULL;
-- }
--}
-
-+/* Uncomment this to enable massive function call trace
-+ #define USB_DEBUG_TRACE */
-
-+#ifdef USB_DEBUG_TRACE
-+#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
-+#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
-+#else
-+#define DBFENTER do {} while (0)
-+#define DBFEXIT do {} while (0)
-+#endif
-
--/* For debug purposes only. */
--static inline void urb_list_dump(int epid)
--{
-- struct list_head *entry;
-- struct list_head *tmp;
-- urb_entry_t *urb_entry;
-- int i = 0;
--
-- info("Dumping urb list for epid %d", epid);
--
-- list_for_each_safe(entry, tmp, &urb_list[epid]) {
-- urb_entry = list_entry(entry, urb_entry_t, list);
-- info(" entry %d, urb = 0x%lx", i, (unsigned long)urb_entry->urb);
-- }
--}
-+#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
-+{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
-
--static void init_rx_buffers(void);
--static int etrax_rh_unlink_urb(struct urb *urb);
--static void etrax_rh_send_irq(struct urb *urb);
--static void etrax_rh_init_int_timer(struct urb *urb);
--static void etrax_rh_int_timer_do(unsigned long ptr);
--
--static int etrax_usb_setup_epid(struct urb *urb);
--static int etrax_usb_lookup_epid(struct urb *urb);
--static int etrax_usb_allocate_epid(void);
--static void etrax_usb_free_epid(int epid);
--
--static int etrax_remove_from_sb_list(struct urb *urb);
--
--static void* etrax_usb_buffer_alloc(struct usb_bus* bus, size_t size,
-- unsigned mem_flags, dma_addr_t *dma);
--static void etrax_usb_buffer_free(struct usb_bus *bus, size_t size, void *addr, dma_addr_t dma);
--
--static void etrax_usb_add_to_bulk_sb_list(struct urb *urb, int epid);
--static void etrax_usb_add_to_ctrl_sb_list(struct urb *urb, int epid);
--static void etrax_usb_add_to_intr_sb_list(struct urb *urb, int epid);
--static void etrax_usb_add_to_isoc_sb_list(struct urb *urb, int epid);
--
--static int etrax_usb_submit_bulk_urb(struct urb *urb);
--static int etrax_usb_submit_ctrl_urb(struct urb *urb);
--static int etrax_usb_submit_intr_urb(struct urb *urb);
--static int etrax_usb_submit_isoc_urb(struct urb *urb);
--
--static int etrax_usb_submit_urb(struct urb *urb, unsigned mem_flags);
--static int etrax_usb_unlink_urb(struct urb *urb, int status);
--static int etrax_usb_get_frame_number(struct usb_device *usb_dev);
--
--static irqreturn_t etrax_usb_tx_interrupt(int irq, void *vhc);
--static irqreturn_t etrax_usb_rx_interrupt(int irq, void *vhc);
--static irqreturn_t etrax_usb_hc_interrupt_top_half(int irq, void *vhc);
--static void etrax_usb_hc_interrupt_bottom_half(void *data);
--
--static void etrax_usb_isoc_descr_interrupt_bottom_half(void *data);
--
--
--/* The following is a list of interrupt handlers for the host controller interrupts we use.
-- They are called from etrax_usb_hc_interrupt_bottom_half. */
--static void etrax_usb_hc_isoc_eof_interrupt(void);
--static void etrax_usb_hc_bulk_eot_interrupt(int timer_induced);
--static void etrax_usb_hc_epid_attn_interrupt(usb_interrupt_registers_t *reg);
--static void etrax_usb_hc_port_status_interrupt(usb_interrupt_registers_t *reg);
--static void etrax_usb_hc_ctl_status_interrupt(usb_interrupt_registers_t *reg);
--
--static int etrax_rh_submit_urb (struct urb *urb);
--
--/* Forward declaration needed because they are used in the rx interrupt routine. */
--static void etrax_usb_complete_urb(struct urb *urb, int status);
--static void etrax_usb_complete_bulk_urb(struct urb *urb, int status);
--static void etrax_usb_complete_ctrl_urb(struct urb *urb, int status);
--static void etrax_usb_complete_intr_urb(struct urb *urb, int status);
--static void etrax_usb_complete_isoc_urb(struct urb *urb, int status);
-+/* Most helpful debugging aid */
-+#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
-
--static int etrax_usb_hc_init(void);
--static void etrax_usb_hc_cleanup(void);
-
--static struct usb_operations etrax_usb_device_operations =
--{
-- .get_frame_number = etrax_usb_get_frame_number,
-- .submit_urb = etrax_usb_submit_urb,
-- .unlink_urb = etrax_usb_unlink_urb,
-- .buffer_alloc = etrax_usb_buffer_alloc,
-- .buffer_free = etrax_usb_buffer_free
--};
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Forward declarations */
-+/***************************************************************************/
-+/***************************************************************************/
-+void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
-+
-+void rh_port_status_change(__u16[]);
-+int rh_clear_port_feature(__u8, __u16);
-+int rh_set_port_feature(__u8, __u16);
-+static void rh_disable_port(unsigned int port);
-+
-+static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
-+ int timer);
-+
-+static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
-+ int mem_flags);
-+static void tc_free_epid(struct usb_host_endpoint *ep);
-+static int tc_allocate_epid(void);
-+static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
-+static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
-+ int status);
-+
-+static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
-+ int mem_flags);
-+static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
-+
-+static inline struct urb *urb_list_first(int epid);
-+static inline void urb_list_add(struct urb *urb, int epid,
-+ int mem_flags);
-+static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
-+static inline void urb_list_del(struct urb *urb, int epid);
-+static inline void urb_list_move_last(struct urb *urb, int epid);
-+static inline struct urb *urb_list_next(struct urb *urb, int epid);
-+
-+int create_sb_for_urb(struct urb *urb, int mem_flags);
-+int init_intr_urb(struct urb *urb, int mem_flags);
-+
-+static inline void etrax_epid_set(__u8 index, __u32 data);
-+static inline void etrax_epid_clear_error(__u8 index);
-+static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
-+ __u8 toggle);
-+static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
-+static inline __u32 etrax_epid_get(__u8 index);
-+
-+/* We're accessing the same register position in Etrax so
-+ when we do full access the internal difference doesn't matter */
-+#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
-+#define etrax_epid_iso_get(index) etrax_epid_get(index)
-+
-+
-+static void tc_dma_process_isoc_urb(struct urb *urb);
-+static void tc_dma_process_queue(int epid);
-+static void tc_dma_unlink_intr_urb(struct urb *urb);
-+static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
-+static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
-+
-+static void tc_bulk_start_timer_func(unsigned long dummy);
-+static void tc_bulk_eot_timer_func(unsigned long dummy);
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Host Controler Driver block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* HCD operations */
-+static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
-+static int crisv10_hcd_reset(struct usb_hcd *);
-+static int crisv10_hcd_start(struct usb_hcd *);
-+static void crisv10_hcd_stop(struct usb_hcd *);
-+#ifdef CONFIG_PM
-+static int crisv10_hcd_suspend(struct device *, u32, u32);
-+static int crisv10_hcd_resume(struct device *, u32);
-+#endif /* CONFIG_PM */
-+static int crisv10_hcd_get_frame(struct usb_hcd *);
-+
-+static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
-+static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
-+static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
-+
-+static int rh_status_data_request(struct usb_hcd *, char *);
-+static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
-+
-+#ifdef CONFIG_PM
-+static int crisv10_hcd_hub_suspend(struct usb_hcd *);
-+static int crisv10_hcd_hub_resume(struct usb_hcd *);
-+#endif /* CONFIG_PM */
-+#ifdef CONFIG_USB_OTG
-+static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
-+#endif /* CONFIG_USB_OTG */
-+
-+/* host controller driver interface */
-+static const struct hc_driver crisv10_hc_driver =
-+ {
-+ .description = hc_name,
-+ .product_desc = product_desc,
-+ .hcd_priv_size = sizeof(struct crisv10_hcd),
-+
-+ /* Attaching IRQ handler manualy in probe() */
-+ /* .irq = crisv10_hcd_irq, */
-+
-+ .flags = HCD_USB11,
-+
-+ /* called to init HCD and root hub */
-+ .reset = crisv10_hcd_reset,
-+ .start = crisv10_hcd_start,
-+
-+ /* cleanly make HCD stop writing memory and doing I/O */
-+ .stop = crisv10_hcd_stop,
-+
-+ /* return current frame number */
-+ .get_frame_number = crisv10_hcd_get_frame,
-+
-+
-+ /* Manage i/o requests via the Transfer Controller */
-+ .urb_enqueue = tc_urb_enqueue,
-+ .urb_dequeue = tc_urb_dequeue,
-+
-+ /* hw synch, freeing endpoint resources that urb_dequeue can't */
-+ .endpoint_disable = tc_endpoint_disable,
-+
-+
-+ /* Root Hub support */
-+ .hub_status_data = rh_status_data_request,
-+ .hub_control = rh_control_request,
-+#ifdef CONFIG_PM
-+ .hub_suspend = rh_suspend_request,
-+ .hub_resume = rh_resume_request,
-+#endif /* CONFIG_PM */
-+#ifdef CONFIG_USB_OTG
-+ .start_port_reset = crisv10_hcd_start_port_reset,
-+#endif /* CONFIG_USB_OTG */
-+ };
-
--/* Note that these functions are always available in their "__" variants, for use in
-- error situations. The "__" missing variants are controlled by the USB_DEBUG_DESC/
-- USB_DEBUG_URB macros. */
--static void __dump_urb(struct urb* purb)
--{
-- printk("\nurb :0x%08lx\n", (unsigned long)purb);
-- printk("dev :0x%08lx\n", (unsigned long)purb->dev);
-- printk("pipe :0x%08x\n", purb->pipe);
-- printk("status :%d\n", purb->status);
-- printk("transfer_flags :0x%08x\n", purb->transfer_flags);
-- printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
-- printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
-- printk("actual_length :%d\n", purb->actual_length);
-- printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
-- printk("start_frame :%d\n", purb->start_frame);
-- printk("number_of_packets :%d\n", purb->number_of_packets);
-- printk("interval :%d\n", purb->interval);
-- printk("error_count :%d\n", purb->error_count);
-- printk("context :0x%08lx\n", (unsigned long)purb->context);
-- printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
--}
-
--static void __dump_in_desc(volatile USB_IN_Desc_t *in)
--{
-- printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
-- printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
-- printk(" command : 0x%04x\n", in->command);
-- printk(" next : 0x%08lx\n", in->next);
-- printk(" buf : 0x%08lx\n", in->buf);
-- printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
-- printk(" status : 0x%04x\n\n", in->status);
--}
-+/*
-+ * conversion between pointers to a hcd and the corresponding
-+ * crisv10_hcd
-+ */
-
--static void __dump_sb_desc(volatile USB_SB_Desc_t *sb)
-+static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
- {
-- char tt = (sb->command & 0x30) >> 4;
-- char *tt_string;
--
-- switch (tt) {
-- case 0:
-- tt_string = "zout";
-- break;
-- case 1:
-- tt_string = "in";
-- break;
-- case 2:
-- tt_string = "out";
-- break;
-- case 3:
-- tt_string = "setup";
-- break;
-- default:
-- tt_string = "unknown (weird)";
-- }
--
-- printk("\n USB_SB_Desc at 0x%08lx\n", (unsigned long)sb);
-- printk(" command : 0x%04x\n", sb->command);
-- printk(" rem : %d\n", (sb->command & 0x3f00) >> 8);
-- printk(" full : %d\n", (sb->command & 0x40) >> 6);
-- printk(" tt : %d (%s)\n", tt, tt_string);
-- printk(" intr : %d\n", (sb->command & 0x8) >> 3);
-- printk(" eot : %d\n", (sb->command & 0x2) >> 1);
-- printk(" eol : %d\n", sb->command & 0x1);
-- printk(" sw_len : 0x%04x (%d)\n", sb->sw_len, sb->sw_len);
-- printk(" next : 0x%08lx\n", sb->next);
-- printk(" buf : 0x%08lx\n\n", sb->buf);
-+ return (struct crisv10_hcd *) hcd->hcd_priv;
- }
-
--
--static void __dump_ep_desc(volatile USB_EP_Desc_t *ep)
-+static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
- {
-- printk("\nUSB_EP_Desc at 0x%08lx\n", (unsigned long)ep);
-- printk(" command : 0x%04x\n", ep->command);
-- printk(" ep_id : %d\n", (ep->command & 0x1f00) >> 8);
-- printk(" enable : %d\n", (ep->command & 0x10) >> 4);
-- printk(" intr : %d\n", (ep->command & 0x8) >> 3);
-- printk(" eof : %d\n", (ep->command & 0x2) >> 1);
-- printk(" eol : %d\n", ep->command & 0x1);
-- printk(" hw_len : 0x%04x (%d)\n", ep->hw_len, ep->hw_len);
-- printk(" next : 0x%08lx\n", ep->next);
-- printk(" sub : 0x%08lx\n\n", ep->sub);
-+ return container_of((void *) hcd, struct usb_hcd, hcd_priv);
- }
-
--static inline void __dump_ep_list(int pipe_type)
-+/* check if specified port is in use */
-+static inline int port_in_use(unsigned int port)
- {
-- volatile USB_EP_Desc_t *ep;
-- volatile USB_EP_Desc_t *first_ep;
-- volatile USB_SB_Desc_t *sb;
--
-- switch (pipe_type)
-- {
-- case PIPE_BULK:
-- first_ep = &TxBulkEPList[0];
-- break;
-- case PIPE_CONTROL:
-- first_ep = &TxCtrlEPList[0];
-- break;
-- case PIPE_INTERRUPT:
-- first_ep = &TxIntrEPList[0];
-- break;
-- case PIPE_ISOCHRONOUS:
-- first_ep = &TxIsocEPList[0];
-- break;
-- default:
-- warn("Cannot dump unknown traffic type");
-- return;
-- }
-- ep = first_ep;
--
-- printk("\n\nDumping EP list...\n\n");
--
-- do {
-- __dump_ep_desc(ep);
-- /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
-- sb = ep->sub ? phys_to_virt(ep->sub) : 0;
-- while (sb) {
-- __dump_sb_desc(sb);
-- sb = sb->next ? phys_to_virt(sb->next) : 0;
-- }
-- ep = (volatile USB_EP_Desc_t *)(phys_to_virt(ep->next));
--
-- } while (ep != first_ep);
-+ return ports & (1 << port);
- }
-
--static inline void __dump_ept_data(int epid)
-+/* number of ports in use */
-+static inline unsigned int num_ports(void)
- {
-- unsigned long flags;
-- __u32 r_usb_ept_data;
--
-- if (epid < 0 || epid > 31) {
-- printk("Cannot dump ept data for invalid epid %d\n", epid);
-- return;
-- }
--
-- save_flags(flags);
-- cli();
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- r_usb_ept_data = *R_USB_EPT_DATA;
-- restore_flags(flags);
--
-- printk("\nR_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
-- if (r_usb_ept_data == 0) {
-- /* No need for more detailed printing. */
-- return;
-- }
-- printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
-- printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
-- printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
-- printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
-- printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
-- printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
-- printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
-- printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
-- printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
-- printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
-- printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
-- printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
-+ unsigned int i, num = 0;
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
-+ if (port_in_use(i))
-+ num++;
-+ return num;
- }
-
--static inline void __dump_ept_data_list(void)
-+/* map hub port number to the port number used internally by the HC */
-+static inline unsigned int map_port(unsigned int port)
- {
-- int i;
--
-- printk("Dumping the whole R_USB_EPT_DATA list\n");
--
-- for (i = 0; i < 32; i++) {
-- __dump_ept_data(i);
-- }
-+ unsigned int i, num = 0;
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
-+ if (port_in_use(i))
-+ if (++num == port)
-+ return i;
-+ return -1;
- }
--#ifdef USB_DEBUG_DESC
--#define dump_in_desc(...) __dump_in_desc(...)
--#define dump_sb_desc(...) __dump_sb_desc(...)
--#define dump_ep_desc(...) __dump_ep_desc(...)
--#else
--#define dump_in_desc(...) do {} while (0)
--#define dump_sb_desc(...) do {} while (0)
--#define dump_ep_desc(...) do {} while (0)
--#endif
-
--#ifdef USB_DEBUG_URB
--#define dump_urb(x) __dump_urb(x)
--#else
--#define dump_urb(x) do {} while (0)
-+/* size of descriptors in slab cache */
-+#ifndef MAX
-+#define MAX(x, y) ((x) > (y) ? (x) : (y))
- #endif
-
--static void init_rx_buffers(void)
--{
-- int i;
-
-- DBFENTER;
-+/******************************************************************/
-+/* Hardware Interrupt functions */
-+/******************************************************************/
-+
-+/* Fast interrupt handler for HC */
-+static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
-+{
-+ struct usb_hcd *hcd = vcd;
-+ struct crisv10_irq_reg reg;
-+ __u32 irq_mask;
-+ unsigned long flags;
-+
-+ DBFENTER;
-+
-+ ASSERT(hcd != NULL);
-+ reg.hcd = hcd;
-+
-+ /* Turn of other interrupts while handling these sensitive cases */
-+ local_irq_save(flags);
-+
-+ /* Read out which interrupts that are flaged */
-+ irq_mask = *R_USB_IRQ_MASK_READ;
-+ reg.r_usb_irq_mask_read = irq_mask;
-+
-+ /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
-+ R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
-+ clears the ourun and perror fields of R_USB_STATUS. */
-+ reg.r_usb_status = *R_USB_STATUS;
-+
-+ /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
-+ interrupts. */
-+ reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
-+
-+ /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
-+ port_status interrupt. */
-+ reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
-+ reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
-+
-+ /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
-+ /* Note: the lower 11 bits contain the actual frame number, sent with each
-+ sof. */
-+ reg.r_usb_fm_number = *R_USB_FM_NUMBER;
-+
-+ /* Interrupts are handled in order of priority. */
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
-+ crisv10_hcd_port_status_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
-+ crisv10_hcd_epid_attn_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
-+ crisv10_hcd_ctl_status_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
-+ crisv10_hcd_isoc_eof_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
-+ /* Update/restart the bulk start timer since obviously the channel is
-+ running. */
-+ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-+ /* Update/restart the bulk eot timer since we just received an bulk eot
-+ interrupt. */
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+
-+ /* Check for finished bulk transfers on epids */
-+ check_finished_bulk_tx_epids(hcd, 0);
-+ }
-+ local_irq_restore(flags);
-+
-+ DBFEXIT;
-+ return IRQ_HANDLED;
-+}
-+
-+
-+void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
-+ struct usb_hcd *hcd = reg->hcd;
-+ struct crisv10_urb_priv *urb_priv;
-+ int epid;
-+ DBFENTER;
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
-+ struct urb *urb;
-+ __u32 ept_data;
-+ int error_code;
-+
-+ if (epid == DUMMY_EPID || epid == INVALID_EPID) {
-+ /* We definitely don't care about these ones. Besides, they are
-+ always disabled, so any possible disabling caused by the
-+ epid attention interrupt is irrelevant. */
-+ warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
-+ continue;
-+ }
-+
-+ if(!epid_inuse(epid)) {
-+ irq_err("Epid attention on epid:%d that isn't in use\n", epid);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ debug_epid(epid);
-+ continue;
-+ }
-+
-+ /* Note that although there are separate R_USB_EPT_DATA and
-+ R_USB_EPT_DATA_ISO registers, they are located at the same address and
-+ are of the same size. In other words, this read should be ok for isoc
-+ also. */
-+ ept_data = etrax_epid_get(epid);
-+ error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
-+
-+ /* Get the active URB for this epid. We blatantly assume
-+ that only this URB could have caused the epid attention. */
-+ urb = activeUrbList[epid];
-+ if (urb == NULL) {
-+ irq_err("Attention on epid:%d error:%d with no active URB.\n",
-+ epid, error_code);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ debug_epid(epid);
-+ continue;
-+ }
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
-+ if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+
-+ /* Isoc traffic doesn't have error_count_in/error_count_out. */
-+ if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
-+ (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
-+ IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
-+ /* Check if URB allready is marked for late-finish, we can get
-+ several 3rd error for Intr traffic when a device is unplugged */
-+ if(urb_priv->later_data == NULL) {
-+ /* 3rd error. */
-+ irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe),
-+ (unsigned int)urb, urb_priv->urb_num);
-+
-+ tc_finish_urb_later(hcd, urb, -EPROTO);
-+ }
-+
-+ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
-+ irq_warn("Perror for epid:%d\n", epid);
-+ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-+
-+ if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
-+ /* invalid ep_id */
-+ panic("Perror because of invalid epid."
-+ " Deconfigured too early?");
-+ } else {
-+ /* past eof1, near eof, zout transfer, setup transfer */
-+ /* Dump the urb and the relevant EP descriptor. */
-+ panic("Something wrong with DMA descriptor contents."
-+ " Too much traffic inserted?");
-+ }
-+ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-+ /* buffer ourun */
-+ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-
-- for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
-- RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-- RxDescList[i].command = 0;
-- RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
-- RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-- RxDescList[i].hw_len = 0;
-- RxDescList[i].status = 0;
--
-- /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as USB_IN_Desc
-- for the relevant fields.) */
-- prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
-+ panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
-+ } else {
-+ irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-+ }
-
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ stall)) {
-+ /* Not really a protocol error, just says that the endpoint gave
-+ a stall response. Note that error_code cannot be stall for isoc. */
-+ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-+ panic("Isoc traffic cannot stall");
- }
-
-- RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-- RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
-- RxDescList[i].next = virt_to_phys(&RxDescList[0]);
-- RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-- RxDescList[i].hw_len = 0;
-- RxDescList[i].status = 0;
-+ tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
-+ tc_finish_urb(hcd, urb, -EPIPE);
-+
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ bus_error)) {
-+ /* Two devices responded to a transaction request. Must be resolved
-+ by software. FIXME: Reset ports? */
-+ panic("Bus error for epid %d."
-+ " Two devices responded to transaction request\n",
-+ epid);
-+
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ buffer_error)) {
-+ /* DMA overrun or underrun. */
-+ irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+
-+ /* It seems that error_code = buffer_error in
-+ R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
-+ are the same error. */
-+ tc_finish_urb(hcd, urb, -EPROTO);
-+ } else {
-+ irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+ dump_ept_data(epid);
-+ }
-+ }
-+ }
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
-+{
-+ __u16 port_reg[USB_ROOT_HUB_PORTS];
-+ DBFENTER;
-+ port_reg[0] = reg->r_usb_rh_port_status_1;
-+ port_reg[1] = reg->r_usb_rh_port_status_2;
-+ rh_port_status_change(port_reg);
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
-+{
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv *urb_priv;
-+
-+ DBFENTER;
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-+
-+ /* Only check epids that are in use, is valid and has SB list */
-+ if (!epid_inuse(epid) || epid == INVALID_EPID ||
-+ TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
-+ /* Nothing here to see. */
-+ continue;
-+ }
-+ ASSERT(epid_isoc(epid));
-+
-+ /* Get the active URB for this epid (if any). */
-+ urb = activeUrbList[epid];
-+ if (urb == 0) {
-+ isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
-+ continue;
-+ }
-+ if(!epid_out_traffic(epid)) {
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ if (urb_priv->urb_state == NOT_STARTED) {
-+ /* If ASAP is not set and urb->start_frame is the current frame,
-+ start the transfer. */
-+ if (!(urb->transfer_flags & URB_ISO_ASAP) &&
-+ (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
-+ /* EP should not be enabled if we're waiting for start_frame */
-+ ASSERT((TxIsocEPList[epid].command &
-+ IO_STATE(USB_EP_command, enable, yes)) == 0);
-+
-+ isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
-+ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ /* This urb is now active. */
-+ urb_priv->urb_state = STARTED;
-+ continue;
-+ }
-+ }
-+ }
-+ }
-+
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
-+{
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
-+
-+ DBFENTER;
-+ ASSERT(crisv10_hcd);
-+
-+ irq_dbg("ctr_status_irq, controller status: %s\n",
-+ hcd_status_to_str(reg->r_usb_status));
-+
-+ /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
-+ list for the corresponding epid? */
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-+ panic("USB controller got ourun.");
-+ }
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
-+
-+ /* Before, etrax_usb_do_intr_recover was called on this epid if it was
-+ an interrupt pipe. I don't see how re-enabling all EP descriptors
-+ will help if there was a programming error. */
-+ panic("USB controller got perror.");
-+ }
-+
-+ /* Keep track of USB Controller, if it's running or not */
-+ if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
-+ crisv10_hcd->running = 1;
-+ } else {
-+ crisv10_hcd->running = 0;
-+ }
-+
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
-+ /* We should never operate in device mode. */
-+ panic("USB controller in device mode.");
-+ }
-+
-+ /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
-+ using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
-+ set_bit(HCD_FLAG_SAW_IRQ, ®->hcd->flags);
-+
-+ DBFEXIT;
-+}
-+
-+
-+/******************************************************************/
-+/* Host Controller interface functions */
-+/******************************************************************/
-+
-+static inline void crisv10_ready_wait(void) {
-+ volatile int timeout = 10000;
-+ /* Check the busy bit of USB controller in Etrax */
-+ while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for USB controller to be idle\n");
-+ }
-+}
-+
-+/* reset host controller */
-+static int crisv10_hcd_reset(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "reset\n");
-+
-+
-+ /* Reset the USB interface. */
-+ /*
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
-+ nop();
-+ */
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* start host controller */
-+static int crisv10_hcd_start(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "start\n");
-+
-+ crisv10_ready_wait();
-+
-+ /* Start processing of USB traffic. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+
-+ nop();
-+
-+ hcd->state = HC_STATE_RUNNING;
-+
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* stop host controller */
-+static void crisv10_hcd_stop(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "stop\n");
-+ crisv10_hcd_reset(hcd);
-+ DBFEXIT;
-+}
-+
-+/* return the current frame number */
-+static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ DBFEXIT;
-+ return (*R_USB_FM_NUMBER & 0x7ff);
-+}
-+
-+#ifdef CONFIG_USB_OTG
-+
-+static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+#endif /* CONFIG_USB_OTG */
-+
-+
-+/******************************************************************/
-+/* Root Hub functions */
-+/******************************************************************/
-+
-+/* root hub status */
-+static const struct usb_hub_status rh_hub_status =
-+ {
-+ .wHubStatus = 0,
-+ .wHubChange = 0,
-+ };
-+
-+/* root hub descriptor */
-+static const u8 rh_hub_descr[] =
-+ {
-+ 0x09, /* bDescLength */
-+ 0x29, /* bDescriptorType */
-+ USB_ROOT_HUB_PORTS, /* bNbrPorts */
-+ 0x00, /* wHubCharacteristics */
-+ 0x00,
-+ 0x01, /* bPwrOn2pwrGood */
-+ 0x00, /* bHubContrCurrent */
-+ 0x00, /* DeviceRemovable */
-+ 0xff /* PortPwrCtrlMask */
-+ };
-+
-+/* Actual holder of root hub status*/
-+struct crisv10_rh rh;
-+
-+/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
-+int rh_init(void) {
-+ int i;
-+ /* Reset port status flags */
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
-+ rh.wPortChange[i] = 0;
-+ rh.wPortStatusPrev[i] = 0;
-+ }
-+ return 0;
-+}
-+
-+#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
-+ (1<<USB_PORT_FEAT_ENABLE)|\
-+ (1<<USB_PORT_FEAT_SUSPEND)|\
-+ (1<<USB_PORT_FEAT_RESET))
-+
-+/* Handle port status change interrupt (called from bottom part interrupt) */
-+void rh_port_status_change(__u16 port_reg[]) {
-+ int i;
-+ __u16 wChange;
-+
-+ for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
-+ /* Xor out changes since last read, masked for important flags */
-+ wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
-+ /* Or changes together with (if any) saved changes */
-+ rh.wPortChange[i] |= wChange;
-+ /* Save new status */
-+ rh.wPortStatusPrev[i] = port_reg[i];
-+
-+ if(wChange) {
-+ rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
-+ port_status_to_str(wChange),
-+ port_status_to_str(port_reg[i]));
-+ }
-+ }
-+}
-+
-+/* Construct port status change bitmap for the root hub */
-+static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
-+{
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ unsigned int i;
-+
-+ DBFENTER;
-+ /*
-+ * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
-+ * return bitmap indicating ports with status change
-+ */
-+ *buf = 0;
-+ spin_lock(&crisv10_hcd->lock);
-+ for (i = 1; i <= crisv10_hcd->num_ports; i++) {
-+ if (rh.wPortChange[map_port(i)]) {
-+ *buf |= (1 << i);
-+ rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
-+ port_status_to_str(rh.wPortChange[map_port(i)]),
-+ port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
-+ }
-+ }
-+ spin_unlock(&crisv10_hcd->lock);
-+ DBFEXIT;
-+ return *buf == 0 ? 0 : 1;
-+}
-+
-+/* Handle a control request for the root hub (called from hcd_driver) */
-+static int rh_control_request(struct usb_hcd *hcd,
-+ u16 typeReq,
-+ u16 wValue,
-+ u16 wIndex,
-+ char *buf,
-+ u16 wLength) {
-+
-+ struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ int retval = 0;
-+ int len;
-+ DBFENTER;
-+
-+ switch (typeReq) {
-+ case GetHubDescriptor:
-+ rh_dbg("GetHubDescriptor\n");
-+ len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
-+ memcpy(buf, rh_hub_descr, len);
-+ buf[2] = crisv10_hcd->num_ports;
-+ break;
-+ case GetHubStatus:
-+ rh_dbg("GetHubStatus\n");
-+ len = min_t(unsigned int, sizeof rh_hub_status, wLength);
-+ memcpy(buf, &rh_hub_status, len);
-+ break;
-+ case GetPortStatus:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
-+ port_status_to_str(rh.wPortChange[map_port(wIndex)]),
-+ port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
-+ *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
-+ *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
-+ break;
-+ case SetHubFeature:
-+ rh_dbg("SetHubFeature\n");
-+ case ClearHubFeature:
-+ rh_dbg("ClearHubFeature\n");
-+ switch (wValue) {
-+ case C_HUB_OVER_CURRENT:
-+ case C_HUB_LOCAL_POWER:
-+ rh_warn("Not implemented hub request:%d \n", typeReq);
-+ /* not implemented */
-+ break;
-+ default:
-+ goto error;
-+ }
-+ break;
-+ case SetPortFeature:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ if(rh_set_port_feature(map_port(wIndex), wValue))
-+ goto error;
-+ break;
-+ case ClearPortFeature:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ if(rh_clear_port_feature(map_port(wIndex), wValue))
-+ goto error;
-+ break;
-+ default:
-+ rh_warn("Unknown hub request: %d\n", typeReq);
-+ error:
-+ retval = -EPIPE;
-+ }
-+ DBFEXIT;
-+ return retval;
-+}
-+
-+int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
-+ __u8 bUsbCommand = 0;
-+ switch(wFeature) {
-+ case USB_PORT_FEAT_RESET:
-+ rh_dbg("SetPortFeature: reset\n");
-+ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
-+ goto set;
-+ break;
-+ case USB_PORT_FEAT_SUSPEND:
-+ rh_dbg("SetPortFeature: suspend\n");
-+ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
-+ goto set;
-+ break;
-+ case USB_PORT_FEAT_POWER:
-+ rh_dbg("SetPortFeature: power\n");
-+ break;
-+ case USB_PORT_FEAT_C_CONNECTION:
-+ rh_dbg("SetPortFeature: c_connection\n");
-+ break;
-+ case USB_PORT_FEAT_C_RESET:
-+ rh_dbg("SetPortFeature: c_reset\n");
-+ break;
-+ case USB_PORT_FEAT_C_OVER_CURRENT:
-+ rh_dbg("SetPortFeature: c_over_current\n");
-+ break;
-+
-+ set:
-+ /* Select which port via the port_sel field */
-+ bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
-+
-+ /* Make sure the controller isn't busy. */
-+ crisv10_ready_wait();
-+ /* Send out the actual command to the USB controller */
-+ *R_USB_COMMAND = bUsbCommand;
-+
-+ /* If port reset then also bring USB controller into running state */
-+ if(wFeature == USB_PORT_FEAT_RESET) {
-+ /* Wait a while for controller to first become started after port reset */
-+ udelay(12000); /* 12ms blocking wait */
-+
-+ /* Make sure the controller isn't busy. */
-+ crisv10_ready_wait();
-+
-+ /* If all enabled ports were disabled the host controller goes down into
-+ started mode, so we need to bring it back into the running state.
-+ (This is safe even if it's already in the running state.) */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+ }
-+
-+ break;
-+ default:
-+ rh_dbg("SetPortFeature: unknown feature\n");
-+ return -1;
-+ }
-+ return 0;
-+}
-+
-+int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
-+ switch(wFeature) {
-+ case USB_PORT_FEAT_ENABLE:
-+ rh_dbg("ClearPortFeature: enable\n");
-+ rh_disable_port(bPort);
-+ break;
-+ case USB_PORT_FEAT_SUSPEND:
-+ rh_dbg("ClearPortFeature: suspend\n");
-+ break;
-+ case USB_PORT_FEAT_POWER:
-+ rh_dbg("ClearPortFeature: power\n");
-+ break;
-+
-+ case USB_PORT_FEAT_C_ENABLE:
-+ rh_dbg("ClearPortFeature: c_enable\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_SUSPEND:
-+ rh_dbg("ClearPortFeature: c_suspend\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_CONNECTION:
-+ rh_dbg("ClearPortFeature: c_connection\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_OVER_CURRENT:
-+ rh_dbg("ClearPortFeature: c_over_current\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_RESET:
-+ rh_dbg("ClearPortFeature: c_reset\n");
-+ goto clear;
-+ clear:
-+ rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
-+ break;
-+ default:
-+ rh_dbg("ClearPortFeature: unknown feature\n");
-+ return -1;
-+ }
-+ return 0;
-+}
-+
-+
-+#ifdef CONFIG_PM
-+/* Handle a suspend request for the root hub (called from hcd_driver) */
-+static int rh_suspend_request(struct usb_hcd *hcd)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+/* Handle a resume request for the root hub (called from hcd_driver) */
-+static int rh_resume_request(struct usb_hcd *hcd)
-+{
-+ return 0; /* no-op for now */
-+}
-+#endif /* CONFIG_PM */
-+
-+
-+
-+/* Wrapper function for workaround port disable registers in USB controller */
-+static void rh_disable_port(unsigned int port) {
-+ volatile int timeout = 10000;
-+ volatile char* usb_portx_disable;
-+ switch(port) {
-+ case 0:
-+ usb_portx_disable = R_USB_PORT1_DISABLE;
-+ break;
-+ case 1:
-+ usb_portx_disable = R_USB_PORT2_DISABLE;
-+ break;
-+ default:
-+ /* Invalid port index */
-+ return;
-+ }
-+ /* Set disable flag in special register */
-+ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
-+ /* Wait until not enabled anymore */
-+ while((rh.wPortStatusPrev[port] &
-+ IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for port %d to become disabled\n", port);
-+ }
-+ /* clear disable flag in special register */
-+ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
-+ rh_info("Physical port %d disabled\n", port+1);
-+}
-+
-+
-+/******************************************************************/
-+/* Transfer Controller (TC) functions */
-+/******************************************************************/
-+
-+/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
-+ dynamically?
-+ To adjust it dynamically we would have to get an interrupt when we reach
-+ the end of the rx descriptor list, or when we get close to the end, and
-+ then allocate more descriptors. */
-+#define NBR_OF_RX_DESC 512
-+#define RX_DESC_BUF_SIZE 1024
-+#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
-
-- myNextRxDesc = &RxDescList[0];
-- myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
-- myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
-
-- *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
-- *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
-+/* Local variables for Transfer Controller */
-+/* --------------------------------------- */
-
-- DBFEXIT;
--}
-+/* This is a circular (double-linked) list of the active urbs for each epid.
-+ The head is never removed, and new urbs are linked onto the list as
-+ urb_entry_t elements. Don't reference urb_list directly; use the wrapper
-+ functions instead (which includes spin_locks) */
-+static struct list_head urb_list[NBR_OF_EPIDS];
-
--static void init_tx_bulk_ep(void)
--{
-- int i;
-+/* Read about the need and usage of this lock in submit_ctrl_urb. */
-+/* Lock for URB lists for each EPID */
-+static spinlock_t urb_list_lock;
-
-- DBFENTER;
-+/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
-+static spinlock_t etrax_epid_lock;
-
-- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-- CHECK_ALIGN(&TxBulkEPList[i]);
-- TxBulkEPList[i].hw_len = 0;
-- TxBulkEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
-- TxBulkEPList[i].sub = 0;
-- TxBulkEPList[i].next = virt_to_phys(&TxBulkEPList[i + 1]);
--
-- /* Initiate two EPs, disabled and with the eol flag set. No need for any
-- preserved epid. */
--
-- /* The first one has the intr flag set so we get an interrupt when the DMA
-- channel is about to become disabled. */
-- CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
-- TxBulkDummyEPList[i][0].hw_len = 0;
-- TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-- IO_STATE(USB_EP_command, eol, yes) |
-- IO_STATE(USB_EP_command, intr, yes));
-- TxBulkDummyEPList[i][0].sub = 0;
-- TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
--
-- /* The second one. */
-- CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
-- TxBulkDummyEPList[i][1].hw_len = 0;
-- TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-- IO_STATE(USB_EP_command, eol, yes));
-- TxBulkDummyEPList[i][1].sub = 0;
-- /* The last dummy's next pointer is the same as the current EP's next pointer. */
-- TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
-- }
-+/* Lock for dma8 sub0 handling */
-+static spinlock_t etrax_dma8_sub0_lock;
-
-- /* Configure the last one. */
-- CHECK_ALIGN(&TxBulkEPList[i]);
-- TxBulkEPList[i].hw_len = 0;
-- TxBulkEPList[i].command = (IO_STATE(USB_EP_command, eol, yes) |
-- IO_FIELD(USB_EP_command, epid, i));
-- TxBulkEPList[i].sub = 0;
-- TxBulkEPList[i].next = virt_to_phys(&TxBulkEPList[0]);
--
-- /* No need configuring dummy EPs for the last one as it will never be used for
-- bulk traffic (i == INVALD_EPID at this point). */
--
-- /* Set up to start on the last EP so we will enable it when inserting traffic
-- for the first time (imitating the situation where the DMA has stopped
-- because there was no more traffic). */
-- *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
-- /* No point in starting the bulk channel yet.
-- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
-- DBFEXIT;
--}
-+/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
-+ Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
-+ cache aligned. */
-+static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
-+static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
-
--static void init_tx_ctrl_ep(void)
--{
-- int i;
-+/* Pointers into RxDescList. */
-+static volatile struct USB_IN_Desc *myNextRxDesc;
-+static volatile struct USB_IN_Desc *myLastRxDesc;
-
-- DBFENTER;
-+/* A zout transfer makes a memory access at the address of its buf pointer,
-+ which means that setting this buf pointer to 0 will cause an access to the
-+ flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
-+ (depending on DMA burst size) transfer.
-+ Instead, we set it to 1, and point it to this buffer. */
-+static int zout_buffer[4] __attribute__ ((aligned (4)));
-
-- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-- CHECK_ALIGN(&TxCtrlEPList[i]);
-- TxCtrlEPList[i].hw_len = 0;
-- TxCtrlEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
-- TxCtrlEPList[i].sub = 0;
-- TxCtrlEPList[i].next = virt_to_phys(&TxCtrlEPList[i + 1]);
-- }
-+/* Cache for allocating new EP and SB descriptors. */
-+static kmem_cache_t *usb_desc_cache;
-
-- CHECK_ALIGN(&TxCtrlEPList[i]);
-- TxCtrlEPList[i].hw_len = 0;
-- TxCtrlEPList[i].command = (IO_STATE(USB_EP_command, eol, yes) |
-- IO_FIELD(USB_EP_command, epid, i));
-+/* Cache for the data allocated in the isoc descr top half. */
-+static kmem_cache_t *isoc_compl_cache;
-
-- TxCtrlEPList[i].sub = 0;
-- TxCtrlEPList[i].next = virt_to_phys(&TxCtrlEPList[0]);
-+/* Cache for the data allocated when delayed finishing of URBs */
-+static kmem_cache_t *later_data_cache;
-
-- *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[0]);
-- *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
-
-- DBFEXIT;
-+/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
-+ and disable iso_eof interrupt. We only need these interrupts when we have
-+ Isoc data endpoints (consumes CPU cycles).
-+ FIXME: This could be more fine granular, so this interrupt is only enabled
-+ when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
-+static int isoc_epid_counter;
-+
-+/* Protecting wrapper functions for R_USB_EPT_x */
-+/* -------------------------------------------- */
-+static inline void etrax_epid_set(__u8 index, __u32 data) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ *R_USB_EPT_DATA = data;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline void etrax_epid_clear_error(__u8 index) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ *R_USB_EPT_DATA &=
-+ ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
-+ IO_MASK(R_USB_EPT_DATA, error_count_out) |
-+ IO_MASK(R_USB_EPT_DATA, error_code));
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
-+ __u8 toggle) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ if(dirout) {
-+ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
-+ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
-+ } else {
-+ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
-+ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
-+ }
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
-+ unsigned long flags;
-+ __u8 toggle;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ if (dirout) {
-+ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
-+ } else {
-+ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
-+ }
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+ return toggle;
-+}
-+
-+
-+static inline __u32 etrax_epid_get(__u8 index) {
-+ unsigned long flags;
-+ __u32 data;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ data = *R_USB_EPT_DATA;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+ return data;
-+}
-+
-+
-+
-+
-+/* Main functions for Transfer Controller */
-+/* -------------------------------------- */
-+
-+/* Init structs, memories and lists used by Transfer Controller */
-+int tc_init(struct usb_hcd *hcd) {
-+ int i;
-+ /* Clear software state info for all epids */
-+ memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
-+
-+ /* Set Invalid and Dummy as being in use and disabled */
-+ epid_state[INVALID_EPID].inuse = 1;
-+ epid_state[DUMMY_EPID].inuse = 1;
-+ epid_state[INVALID_EPID].disabled = 1;
-+ epid_state[DUMMY_EPID].disabled = 1;
-+
-+ /* Clear counter for how many Isoc epids we have sat up */
-+ isoc_epid_counter = 0;
-+
-+ /* Initialize the urb list by initiating a head for each list.
-+ Also reset list hodling active URB for each epid */
-+ for (i = 0; i < NBR_OF_EPIDS; i++) {
-+ INIT_LIST_HEAD(&urb_list[i]);
-+ activeUrbList[i] = NULL;
-+ }
-+
-+ /* Init lock for URB lists */
-+ spin_lock_init(&urb_list_lock);
-+ /* Init lock for Etrax R_USB_EPT register */
-+ spin_lock_init(&etrax_epid_lock);
-+ /* Init lock for Etrax dma8 sub0 handling */
-+ spin_lock_init(&etrax_dma8_sub0_lock);
-+
-+ /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
-+
-+ /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
-+ allocate SB descriptors from this cache. This is ok since
-+ sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
-+ usb_desc_cache = kmem_cache_create("usb_desc_cache",
-+ sizeof(struct USB_EP_Desc), 0,
-+ SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(usb_desc_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+ /* Create slab cache for speedy allocation of memory for isoc bottom-half
-+ interrupt handling */
-+ isoc_compl_cache =
-+ kmem_cache_create("isoc_compl_cache",
-+ sizeof(struct crisv10_isoc_complete_data),
-+ 0, SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(isoc_compl_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+ /* Create slab cache for speedy allocation of memory for later URB finish
-+ struct */
-+ later_data_cache =
-+ kmem_cache_create("later_data_cache",
-+ sizeof(struct urb_later_data),
-+ 0, SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(later_data_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+
-+ /* Initiate the bulk start timer. */
-+ init_timer(&bulk_start_timer);
-+ bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
-+ bulk_start_timer.function = tc_bulk_start_timer_func;
-+ add_timer(&bulk_start_timer);
-+
-+
-+ /* Initiate the bulk eot timer. */
-+ init_timer(&bulk_eot_timer);
-+ bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
-+ bulk_eot_timer.function = tc_bulk_eot_timer_func;
-+ bulk_eot_timer.data = (unsigned long)hcd;
-+ add_timer(&bulk_eot_timer);
-+
-+ return 0;
-+}
-+
-+/* Uninitialize all resources used by Transfer Controller */
-+void tc_destroy(void) {
-+
-+ /* Destroy all slab cache */
-+ kmem_cache_destroy(usb_desc_cache);
-+ kmem_cache_destroy(isoc_compl_cache);
-+ kmem_cache_destroy(later_data_cache);
-+
-+ /* Remove timers */
-+ del_timer(&bulk_start_timer);
-+ del_timer(&bulk_eot_timer);
-+}
-+
-+static void restart_dma8_sub0(void) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
-+ /* Verify that the dma is not running */
-+ if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
-+ struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
-+ while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
-+ ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
-+ }
-+ /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
-+ * ep->next is already a physical address; no need for a virt_to_phys. */
-+ *R_DMA_CH8_SUB0_EP = ep->next;
-+ /* Restart the DMA */
-+ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
-+ }
-+ spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
-+}
-+
-+/* queue an URB with the transfer controller (called from hcd_driver) */
-+static int tc_urb_enqueue(struct usb_hcd *hcd,
-+ struct usb_host_endpoint *ep,
-+ struct urb *urb,
-+ gfp_t mem_flags) {
-+ int epid;
-+ int retval;
-+ int bustime = 0;
-+ int maxpacket;
-+ unsigned long flags;
-+ struct crisv10_urb_priv *urb_priv;
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ DBFENTER;
-+
-+ if(!(crisv10_hcd->running)) {
-+ /* The USB Controller is not running, probably because no device is
-+ attached. No idea to enqueue URBs then */
-+ tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
-+ (unsigned int)urb);
-+ return -ENOENT;
-+ }
-+
-+ maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-+ /* Special case check for In Isoc transfers. Specification states that each
-+ In Isoc transfer consists of one packet and therefore it should fit into
-+ the transfer-buffer of an URB.
-+ We do the check here to be sure (an invalid scenario can be produced with
-+ parameters to the usbtest suite) */
-+ if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
-+ (urb->transfer_buffer_length < maxpacket)) {
-+ tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
-+ return -EMSGSIZE;
-+ }
-+
-+ /* Check if there is enough bandwidth for periodic transfer */
-+ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
-+ /* only check (and later claim) if not already claimed */
-+ if (urb->bandwidth == 0) {
-+ bustime = usb_check_bandwidth(urb->dev, urb);
-+ if (bustime < 0) {
-+ tc_err("Not enough periodic bandwidth\n");
-+ return -ENOSPC;
-+ }
-+ }
-+ }
-+
-+ /* Check if there is a epid for URBs destination, if not this function
-+ set up one. */
-+ epid = tc_setup_epid(ep, urb, mem_flags);
-+ if (epid < 0) {
-+ tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
-+ DBFEXIT;
-+ return -ENOMEM;
-+ }
-+
-+ if(urb == activeUrbList[epid]) {
-+ tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
-+ return -ENXIO;
-+ }
-+
-+ if(urb_list_entry(urb, epid)) {
-+ tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
-+ return -ENXIO;
-+ }
-+
-+ /* If we actively have flaged endpoint as disabled then refuse submition */
-+ if(epid_state[epid].disabled) {
-+ return -ENOENT;
-+ }
-+
-+ /* Allocate and init HC-private data for URB */
-+ if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
-+ DBFEXIT;
-+ return -ENOMEM;
-+ }
-+ urb_priv = urb->hcpriv;
-+
-+ tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
-+ (unsigned int)urb, urb_priv->urb_num, epid,
-+ pipe_to_str(urb->pipe), urb->transfer_buffer_length);
-+
-+ /* Create and link SBs required for this URB */
-+ retval = create_sb_for_urb(urb, mem_flags);
-+ if(retval != 0) {
-+ tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
-+ urb_priv->urb_num);
-+ urb_priv_free(hcd, urb);
-+ DBFEXIT;
-+ return retval;
-+ }
-+
-+ /* Init intr EP pool if this URB is a INTR transfer. This pool is later
-+ used when inserting EPs in the TxIntrEPList. We do the alloc here
-+ so we can't run out of memory later */
-+ if(usb_pipeint(urb->pipe)) {
-+ retval = init_intr_urb(urb, mem_flags);
-+ if(retval != 0) {
-+ tc_warn("Failed to init Intr URB\n");
-+ urb_priv_free(hcd, urb);
-+ DBFEXIT;
-+ return retval;
-+ }
-+ }
-+
-+ /* Disable other access when inserting USB */
-+ local_irq_save(flags);
-+
-+ /* Claim bandwidth, if needed */
-+ if(bustime) {
-+ usb_claim_bandwidth(urb->dev, urb, bustime, 0);
-+ }
-+
-+ /* Add URB to EP queue */
-+ urb_list_add(urb, epid, mem_flags);
-+
-+ if(usb_pipeisoc(urb->pipe)) {
-+ /* Special processing of Isoc URBs. */
-+ tc_dma_process_isoc_urb(urb);
-+ } else {
-+ /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
-+ tc_dma_process_queue(epid);
-+ }
-+
-+ local_irq_restore(flags);
-+
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* remove an URB from the transfer controller queues (called from hcd_driver)*/
-+static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv;
-+ unsigned long flags;
-+ int epid;
-+
-+ DBFENTER;
-+ /* Disable interrupts here since a descriptor interrupt for the isoc epid
-+ will modify the sb list. This could possibly be done more granular, but
-+ urb_dequeue should not be used frequently anyway.
-+ */
-+ local_irq_save(flags);
-+
-+ urb_priv = urb->hcpriv;
-+
-+ if (!urb_priv) {
-+ /* This happens if a device driver calls unlink on an urb that
-+ was never submitted (lazy driver) or if the urb was completed
-+ while dequeue was being called. */
-+ tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
-+ local_irq_restore(flags);
-+ return 0;
-+ }
-+ epid = urb_priv->epid;
-+
-+ tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
-+ that isn't active can be dequeued by just removing it from the queue */
-+ if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
-+ usb_pipeint(urb->pipe)) {
-+
-+ /* Check if URB haven't gone further than the queue */
-+ if(urb != activeUrbList[epid]) {
-+ ASSERT(urb_priv->later_data == NULL);
-+ tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
-+ " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
-+ str_dir(urb->pipe), str_type(urb->pipe), epid);
-+
-+ /* Finish the URB with error status from USB core */
-+ tc_finish_urb(hcd, urb, urb->status);
-+ local_irq_restore(flags);
-+ return 0;
-+ }
-+ }
-+
-+ /* Set URB status to Unlink for handling when interrupt comes. */
-+ urb_priv->urb_state = UNLINK;
-+
-+ /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Check if EP still is enabled */
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ /* Kicking dummy list out of the party. */
-+ TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Check if EP still is enabled */
-+ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
-+ finish_isoc_urb(). Because there might the case when URB is dequeued
-+ but there are other valid URBs waiting */
-+
-+ /* Check if In Isoc EP still is enabled */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ break;
-+ case PIPE_INTERRUPT:
-+ /* Special care is taken for interrupt URBs. EPs are unlinked in
-+ tc_finish_urb */
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ /* Asynchronous unlink, finish the URB later from scheduled or other
-+ event (data finished, error) */
-+ tc_finish_urb_later(hcd, urb, urb->status);
-+
-+ local_irq_restore(flags);
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+
-+static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
-+ volatile int timeout = 10000;
-+ struct urb* urb;
-+ struct crisv10_urb_priv* urb_priv;
-+ unsigned long flags;
-+
-+ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+
-+ int type = epid_state[epid].type;
-+
-+ /* Setting this flag will cause enqueue() to return -ENOENT for new
-+ submitions on this endpoint and finish_urb() wont process queue further */
-+ epid_state[epid].disabled = 1;
-+
-+ switch(type) {
-+ case PIPE_BULK:
-+ /* Check if EP still is enabled */
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
-+
-+ /* Do busy-wait until DMA not using this EP descriptor anymore */
-+ while((*R_DMA_CH8_SUB0_EP ==
-+ virt_to_phys(&TxBulkEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+
-+ case PIPE_CONTROL:
-+ /* Check if EP still is enabled */
-+ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
-+
-+ /* Do busy-wait until DMA not using this EP descriptor anymore */
-+ while((*R_DMA_CH8_SUB1_EP ==
-+ virt_to_phys(&TxCtrlEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+
-+ case PIPE_INTERRUPT:
-+ local_irq_save(flags);
-+ /* Disable all Intr EPs belonging to epid */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* Disable EP */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+ local_irq_restore(flags);
-+ break;
-+
-+ case PIPE_ISOCHRONOUS:
-+ /* Check if EP still is enabled */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
-+ /* The EP was enabled, disable it. */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+ }
-+
-+ local_irq_save(flags);
-+
-+ /* Finish if there is active URB for this endpoint */
-+ if(activeUrbList[epid] != NULL) {
-+ urb = activeUrbList[epid];
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv);
-+ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
-+ ASSERT(activeUrbList[epid] == NULL);
-+ }
-+
-+ /* Finish any queued URBs for this endpoint. There won't be any resubmitions
-+ because epid_disabled causes enqueue() to fail for this endpoint */
-+ while((urb = urb_list_first(epid)) != NULL) {
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ tc_finish_urb(hcd, urb, -ENOENT);
-+ }
-+ epid_state[epid].disabled = 0;
-+ local_irq_restore(flags);
-+}
-+
-+/* free resources associated with an endpoint (called from hcd_driver) */
-+static void tc_endpoint_disable(struct usb_hcd *hcd,
-+ struct usb_host_endpoint *ep) {
-+ DBFENTER;
-+ /* Only free epid if it has been allocated. We get two endpoint_disable
-+ requests for ctrl endpoints so ignore the second one */
-+ if(ep->hcpriv != NULL) {
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ int epid = ep_priv->epid;
-+ tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
-+ (unsigned int)ep, (unsigned int)ep->hcpriv,
-+ endpoint_to_str(&(ep->desc)), epid);
-+
-+ tc_sync_finish_epid(hcd, epid);
-+
-+ ASSERT(activeUrbList[epid] == NULL);
-+ ASSERT(list_empty(&urb_list[epid]));
-+
-+ tc_free_epid(ep);
-+ } else {
-+ tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
-+ (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
-+ }
-+ DBFEXIT;
-+}
-+
-+static void tc_finish_urb_later_proc(void *data) {
-+ unsigned long flags;
-+ struct urb_later_data* uld = (struct urb_later_data*)data;
-+ local_irq_save(flags);
-+ if(uld->urb == NULL) {
-+ late_dbg("Later finish of URB = NULL (allready finished)\n");
-+ } else {
-+ struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
-+ ASSERT(urb_priv);
-+ if(urb_priv->urb_num == uld->urb_num) {
-+ late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
-+ urb_priv->urb_num);
-+ if(uld->status != uld->urb->status) {
-+ errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
-+ uld->urb->status, uld->status);
-+ }
-+ if(uld != urb_priv->later_data) {
-+ panic("Scheduled uld not same as URBs uld\n");
-+ }
-+ tc_finish_urb(uld->hcd, uld->urb, uld->status);
-+ } else {
-+ late_warn("Ignoring later finish of URB:0x%x[%d]"
-+ ", urb_num doesn't match current URB:0x%x[%d]",
-+ (unsigned int)(uld->urb), uld->urb_num,
-+ (unsigned int)(uld->urb), urb_priv->urb_num);
-+ }
-+ }
-+ local_irq_restore(flags);
-+ kmem_cache_free(later_data_cache, uld);
-+}
-+
-+static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
-+ int status) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ struct urb_later_data* uld;
-+
-+ ASSERT(urb_priv);
-+
-+ if(urb_priv->later_data != NULL) {
-+ /* Later-finish allready scheduled for this URB, just update status to
-+ return when finishing later */
-+ errno_dbg("Later-finish schedule change URB status:%d with new"
-+ " status:%d\n", urb_priv->later_data->status, status);
-+
-+ urb_priv->later_data->status = status;
-+ return;
-+ }
-+
-+ uld = kmem_cache_alloc(later_data_cache, SLAB_ATOMIC);
-+ ASSERT(uld);
-+
-+ uld->hcd = hcd;
-+ uld->urb = urb;
-+ uld->urb_num = urb_priv->urb_num;
-+ uld->status = status;
-+
-+ INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
-+ urb_priv->later_data = uld;
-+
-+ /* Schedule the finishing of the URB to happen later */
-+ schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
-+}
-+
-+static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
-+ int status);
-+
-+static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid;
-+ char toggle;
-+ int urb_num;
-+
-+ DBFENTER;
-+ ASSERT(urb_priv != NULL);
-+ epid = urb_priv->epid;
-+ urb_num = urb_priv->urb_num;
-+
-+ if(urb != activeUrbList[epid]) {
-+ if(urb_list_entry(urb, epid)) {
-+ /* Remove this URB from the list. Only happens when URB are finished
-+ before having been processed (dequeing) */
-+ urb_list_del(urb, epid);
-+ } else {
-+ tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
-+ " epid:%d\n", (unsigned int)urb, urb_num, epid);
-+ }
-+ }
-+
-+ /* Cancel any pending later-finish of this URB */
-+ if(urb_priv->later_data) {
-+ urb_priv->later_data->urb = NULL;
-+ }
-+
-+ /* For an IN pipe, we always set the actual length, regardless of whether
-+ there was an error or not (which means the device driver can use the data
-+ if it wants to). */
-+ if(usb_pipein(urb->pipe)) {
-+ urb->actual_length = urb_priv->rx_offset;
-+ } else {
-+ /* Set actual_length for OUT urbs also; the USB mass storage driver seems
-+ to want that. */
-+ if (status == 0 && urb->status == -EINPROGRESS) {
-+ urb->actual_length = urb->transfer_buffer_length;
-+ } else {
-+ /* We wouldn't know of any partial writes if there was an error. */
-+ urb->actual_length = 0;
-+ }
-+ }
-+
-+
-+ /* URB status mangling */
-+ if(urb->status == -EINPROGRESS) {
-+ /* The USB core hasn't changed the status, let's set our finish status */
-+ urb->status = status;
-+
-+ if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
-+ usb_pipein(urb->pipe) &&
-+ (urb->actual_length != urb->transfer_buffer_length)) {
-+ /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
-+ max length) is to be treated as an error. */
-+ errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
-+ " data:%d\n", (unsigned int)urb, urb_num,
-+ urb->actual_length);
-+ urb->status = -EREMOTEIO;
-+ }
-+
-+ if(urb_priv->urb_state == UNLINK) {
-+ /* URB has been requested to be unlinked asynchronously */
-+ urb->status = -ECONNRESET;
-+ errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
-+ (unsigned int)urb, urb_num, urb->status);
-+ }
-+ } else {
-+ /* The USB Core wants to signal some error via the URB, pass it through */
-+ }
-+
-+ /* use completely different finish function for Isoc URBs */
-+ if(usb_pipeisoc(urb->pipe)) {
-+ tc_finish_isoc_urb(hcd, urb, status);
-+ return;
-+ }
-+
-+ /* Do special unlinking of EPs for Intr traffic */
-+ if(usb_pipeint(urb->pipe)) {
-+ tc_dma_unlink_intr_urb(urb);
-+ }
-+
-+ /* Release allocated bandwidth for periodic transfers */
-+ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
-+ usb_release_bandwidth(urb->dev, urb, 0);
-+
-+ /* This URB is active on EP */
-+ if(urb == activeUrbList[epid]) {
-+ /* We need to fiddle with the toggle bits because the hardware doesn't do
-+ it for us. */
-+ toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
-+ usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-+ usb_pipeout(urb->pipe), toggle);
-+
-+ /* Checks for Ctrl and Bulk EPs */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Check so Bulk EP realy is disabled before finishing active URB */
-+ ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
-+ IO_STATE(USB_EP_command, enable, no));
-+ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
-+ process Bulk EP. */
-+ TxBulkEPList[epid].sub = 0;
-+ /* No need to wait for the DMA before changing the next pointer.
-+ The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
-+ the last one (INVALID_EPID) for actual traffic. */
-+ TxBulkEPList[epid].next =
-+ virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Check so Ctrl EP realy is disabled before finishing active URB */
-+ ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
-+ IO_STATE(USB_EP_command, enable, no));
-+ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
-+ process Ctrl EP. */
-+ TxCtrlEPList[epid].sub = 0;
-+ break;
-+ }
-+ }
-+
-+ /* Free HC-private URB data*/
-+ urb_priv_free(hcd, urb);
-+
-+ if(urb->status) {
-+ errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
-+ (unsigned int)urb, urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb->actual_length, urb->status);
-+ } else {
-+ tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
-+ (unsigned int)urb, urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb->actual_length, urb->status);
-+ }
-+
-+ /* If we just finished an active URB, clear active pointer. */
-+ if (urb == activeUrbList[epid]) {
-+ /* Make URB not active on EP anymore */
-+ activeUrbList[epid] = NULL;
-+
-+ if(urb->status == 0) {
-+ /* URB finished sucessfully, process queue to see if there are any more
-+ URBs waiting before we call completion function.*/
-+ if(crisv10_hcd->running) {
-+ /* Only process queue if USB controller is running */
-+ tc_dma_process_queue(epid);
-+ } else {
-+ tc_warn("No processing of queue for epid:%d, USB Controller not"
-+ " running\n", epid);
-+ }
-+ }
-+ }
-+
-+ /* Hand the URB from HCD to its USB device driver, using its completion
-+ functions */
-+ usb_hcd_giveback_urb (hcd, urb);
-+
-+ /* Check the queue once more if the URB returned with error, because we
-+ didn't do it before the completion function because the specification
-+ states that the queue should not restart until all it's unlinked
-+ URBs have been fully retired, with the completion functions run */
-+ if(crisv10_hcd->running) {
-+ /* Only process queue if USB controller is running */
-+ tc_dma_process_queue(epid);
-+ } else {
-+ tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
-+ epid);
-+ }
-+
-+ DBFEXIT;
-+}
-+
-+static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
-+ int status) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid, i;
-+ volatile int timeout = 10000;
-+
-+ ASSERT(urb_priv);
-+ epid = urb_priv->epid;
-+
-+ ASSERT(usb_pipeisoc(urb->pipe));
-+
-+ /* Set that all isoc packets have status and length set before
-+ completing the urb. */
-+ for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
-+ urb->iso_frame_desc[i].actual_length = 0;
-+ urb->iso_frame_desc[i].status = -EPROTO;
-+ }
-+
-+ /* Check if the URB is currently active (done or error) */
-+ if(urb == activeUrbList[epid]) {
-+ /* Check if there are another In Isoc URB queued for this epid */
-+ if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
-+ /* Move it from queue to active and mark it started so Isoc transfers
-+ won't be interrupted.
-+ All Isoc URBs data transfers are already added to DMA lists so we
-+ don't have to insert anything in DMA lists here. */
-+ activeUrbList[epid] = urb_list_first(epid);
-+ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
-+ STARTED;
-+ urb_list_del(activeUrbList[epid], epid);
-+
-+ if(urb->status) {
-+ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
-+ " status:%d, new waiting URB:0x%x[%d]\n",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb_priv->isoc_packet_counter,
-+ urb->number_of_packets, urb->status,
-+ (unsigned int)activeUrbList[epid],
-+ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
-+ }
-+
-+ } else { /* No other URB queued for this epid */
-+ if(urb->status) {
-+ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
-+ " status:%d, no new URB waiting\n",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb_priv->isoc_packet_counter,
-+ urb->number_of_packets, urb->status);
-+ }
-+
-+ /* Check if EP is still enabled, then shut it down. */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
-+
-+ /* Should only occur for In Isoc EPs where SB isn't consumed. */
-+ ASSERT(usb_pipein(urb->pipe));
-+
-+ /* Disable it and wait for it to stop */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ /* Ah, the luxury of busy-wait. */
-+ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
-+ }
-+ }
-+
-+ /* Unlink SB to say that epid is finished. */
-+ TxIsocEPList[epid].sub = 0;
-+ TxIsocEPList[epid].hw_len = 0;
-+
-+ /* No URB active for EP anymore */
-+ activeUrbList[epid] = NULL;
-+ }
-+ } else { /* Finishing of not active URB (queued up with SBs thought) */
-+ isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
-+ " SB queued but not active\n",
-+ (unsigned int)urb, str_dir(urb->pipe),
-+ urb_priv->isoc_packet_counter, urb->number_of_packets,
-+ urb->status);
-+ if(usb_pipeout(urb->pipe)) {
-+ /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
-+ struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
-+
-+ iter_sb = TxIsocEPList[epid].sub ?
-+ phys_to_virt(TxIsocEPList[epid].sub) : 0;
-+ prev_sb = 0;
-+
-+ /* SB that is linked before this URBs first SB */
-+ while (iter_sb && (iter_sb != urb_priv->first_sb)) {
-+ prev_sb = iter_sb;
-+ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ }
-+
-+ if (iter_sb == 0) {
-+ /* Unlink of the URB currently being transmitted. */
-+ prev_sb = 0;
-+ iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
-+ }
-+
-+ while (iter_sb && (iter_sb != urb_priv->last_sb)) {
-+ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ }
-+
-+ if (iter_sb) {
-+ next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ } else {
-+ /* This should only happen if the DMA has completed
-+ processing the SB list for this EP while interrupts
-+ are disabled. */
-+ isoc_dbg("Isoc urb not found, already sent?\n");
-+ next_sb = 0;
-+ }
-+ if (prev_sb) {
-+ prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
-+ } else {
-+ TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
-+ }
-+ }
-+ }
-+
-+ /* Free HC-private URB data*/
-+ urb_priv_free(hcd, urb);
-+
-+ usb_release_bandwidth(urb->dev, urb, 0);
-+
-+ /* Hand the URB from HCD to its USB device driver, using its completion
-+ functions */
-+ usb_hcd_giveback_urb (hcd, urb);
-+}
-+
-+static __u32 urb_num = 0;
-+
-+/* allocate and initialize URB private data */
-+static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
-+ int mem_flags) {
-+ struct crisv10_urb_priv *urb_priv;
-+
-+ urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
-+ if (!urb_priv)
-+ return -ENOMEM;
-+ memset(urb_priv, 0, sizeof *urb_priv);
-+
-+ urb_priv->epid = epid;
-+ urb_priv->urb_state = NOT_STARTED;
-+
-+ urb->hcpriv = urb_priv;
-+ /* Assign URB a sequence number, and increment counter */
-+ urb_priv->urb_num = urb_num;
-+ urb_num++;
-+ return 0;
-+}
-+
-+/* free URB private data */
-+static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
-+ int i;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv != 0);
-+
-+ /* Check it has any SBs linked that needs to be freed*/
-+ if(urb_priv->first_sb != NULL) {
-+ struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
-+ int i = 0;
-+ first_sb = urb_priv->first_sb;
-+ last_sb = urb_priv->last_sb;
-+ ASSERT(last_sb);
-+ while(first_sb != last_sb) {
-+ next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
-+ kmem_cache_free(usb_desc_cache, first_sb);
-+ first_sb = next_sb;
-+ i++;
-+ }
-+ kmem_cache_free(usb_desc_cache, last_sb);
-+ i++;
-+ }
-+
-+ /* Check if it has any EPs in its Intr pool that also needs to be freed */
-+ if(urb_priv->intr_ep_pool_length > 0) {
-+ for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
-+ kfree(urb_priv->intr_ep_pool[i]);
-+ }
-+ /*
-+ tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb);
-+ */
-+ }
-+
-+ kfree(urb_priv);
-+ urb->hcpriv = NULL;
-+}
-+
-+static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
-+ struct crisv10_ep_priv *ep_priv;
-+
-+ ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
-+ if (!ep_priv)
-+ return -ENOMEM;
-+ memset(ep_priv, 0, sizeof *ep_priv);
-+
-+ ep->hcpriv = ep_priv;
-+ return 0;
-+}
-+
-+static void ep_priv_free(struct usb_host_endpoint *ep) {
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ ASSERT(ep_priv);
-+ kfree(ep_priv);
-+ ep->hcpriv = NULL;
-+}
-+
-+/* EPID handling functions, managing EP-list in Etrax through wrappers */
-+/* ------------------------------------------------------------------- */
-+
-+/* Sets up a new EPID for an endpoint or returns existing if found */
-+static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
-+ int mem_flags) {
-+ int epid;
-+ char devnum, endpoint, out_traffic, slow;
-+ int maxlen;
-+ __u32 epid_data;
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+
-+ DBFENTER;
-+
-+ /* Check if a valid epid already is setup for this endpoint */
-+ if(ep_priv != NULL) {
-+ return ep_priv->epid;
-+ }
-+
-+ /* We must find and initiate a new epid for this urb. */
-+ epid = tc_allocate_epid();
-+
-+ if (epid == -1) {
-+ /* Failed to allocate a new epid. */
-+ DBFEXIT;
-+ return epid;
-+ }
-+
-+ /* We now have a new epid to use. Claim it. */
-+ epid_state[epid].inuse = 1;
-+
-+ /* Init private data for new endpoint */
-+ if(ep_priv_create(ep, mem_flags) != 0) {
-+ return -ENOMEM;
-+ }
-+ ep_priv = ep->hcpriv;
-+ ep_priv->epid = epid;
-+
-+ devnum = usb_pipedevice(urb->pipe);
-+ endpoint = usb_pipeendpoint(urb->pipe);
-+ slow = (urb->dev->speed == USB_SPEED_LOW);
-+ maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-+
-+ if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
-+ /* We want both IN and OUT control traffic to be put on the same
-+ EP/SB list. */
-+ out_traffic = 1;
-+ } else {
-+ out_traffic = usb_pipeout(urb->pipe);
-+ }
-+
-+ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-+ epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
-+ /* FIXME: Change any to the actual port? */
-+ IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
-+ etrax_epid_iso_set(epid, epid_data);
-+ } else {
-+ epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
-+ IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
-+ /* FIXME: Change any to the actual port? */
-+ IO_STATE(R_USB_EPT_DATA, port, any) |
-+ IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
-+ IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
-+ IO_FIELD(R_USB_EPT_DATA, dev, devnum);
-+ etrax_epid_set(epid, epid_data);
-+ }
-+
-+ epid_state[epid].out_traffic = out_traffic;
-+ epid_state[epid].type = usb_pipetype(urb->pipe);
-+
-+ tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
-+ (unsigned int)ep, epid, devnum, endpoint, maxlen,
-+ str_type(urb->pipe), out_traffic ? "out" : "in",
-+ slow ? "low" : "full");
-+
-+ /* Enable Isoc eof interrupt if we set up the first Isoc epid */
-+ if(usb_pipeisoc(urb->pipe)) {
-+ isoc_epid_counter++;
-+ if(isoc_epid_counter == 1) {
-+ isoc_warn("Enabled Isoc eof interrupt\n");
-+ *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
-+ }
-+ }
-+
-+ DBFEXIT;
-+ return epid;
-+}
-+
-+static void tc_free_epid(struct usb_host_endpoint *ep) {
-+ unsigned long flags;
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ int epid;
-+ volatile int timeout = 10000;
-+
-+ DBFENTER;
-+
-+ if (ep_priv == NULL) {
-+ tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
-+ DBFEXIT;
-+ return;
-+ }
-+
-+ epid = ep_priv->epid;
-+
-+ /* Disable Isoc eof interrupt if we free the last Isoc epid */
-+ if(epid_isoc(epid)) {
-+ ASSERT(isoc_epid_counter > 0);
-+ isoc_epid_counter--;
-+ if(isoc_epid_counter == 0) {
-+ *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
-+ isoc_warn("Disabled Isoc eof interrupt\n");
-+ }
-+ }
-+
-+ /* Take lock manualy instead of in epid_x_x wrappers,
-+ because we need to be polling here */
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for epid:%d to drop hold\n", epid);
-+ }
-+ /* This will, among other things, set the valid field to 0. */
-+ *R_USB_EPT_DATA = 0;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+
-+ /* Free resource in software state info list */
-+ epid_state[epid].inuse = 0;
-+
-+ /* Free private endpoint data */
-+ ep_priv_free(ep);
-+
-+ DBFEXIT;
-+}
-+
-+static int tc_allocate_epid(void) {
-+ int i;
-+ DBFENTER;
-+ for (i = 0; i < NBR_OF_EPIDS; i++) {
-+ if (!epid_inuse(i)) {
-+ DBFEXIT;
-+ return i;
-+ }
-+ }
-+
-+ tc_warn("Found no free epids\n");
-+ DBFEXIT;
-+ return -1;
- }
-
-
--static void init_tx_intr_ep(void)
--{
-- int i;
-+/* Wrappers around the list functions (include/linux/list.h). */
-+/* ---------------------------------------------------------- */
-+static inline int __urb_list_empty(int epid) {
-+ int retval;
-+ retval = list_empty(&urb_list[epid]);
-+ return retval;
-+}
-
-- DBFENTER;
-+/* Returns first urb for this epid, or NULL if list is empty. */
-+static inline struct urb *urb_list_first(int epid) {
-+ unsigned long flags;
-+ struct urb *first_urb = 0;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ if (!__urb_list_empty(epid)) {
-+ /* Get the first urb (i.e. head->next). */
-+ urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
-+ first_urb = urb_entry->urb;
-+ }
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return first_urb;
-+}
-
-- /* Read comment at zout_buffer declaration for an explanation to this. */
-- TxIntrSB_zout.sw_len = 1;
-- TxIntrSB_zout.next = 0;
-- TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-- TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, zout) |
-- IO_STATE(USB_SB_command, full, yes) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
-- CHECK_ALIGN(&TxIntrEPList[i]);
-- TxIntrEPList[i].hw_len = 0;
-- TxIntrEPList[i].command =
-- (IO_STATE(USB_EP_command, eof, yes) |
-- IO_STATE(USB_EP_command, enable, yes) |
-- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-- TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-- TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
-- }
-+/* Adds an urb_entry last in the list for this epid. */
-+static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
-+ ASSERT(urb_entry);
-+
-+ urb_entry->urb = urb;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ list_add_tail(&urb_entry->list, &urb_list[epid]);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+}
-
-- CHECK_ALIGN(&TxIntrEPList[i]);
-- TxIntrEPList[i].hw_len = 0;
-- TxIntrEPList[i].command =
-- (IO_STATE(USB_EP_command, eof, yes) |
-- IO_STATE(USB_EP_command, eol, yes) |
-- IO_STATE(USB_EP_command, enable, yes) |
-- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-- TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-- TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
--
-- *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
-- *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
-- DBFEXIT;
-+/* Search through the list for an element that contains this urb. (The list
-+ is expected to be short and the one we are about to delete will often be
-+ the first in the list.)
-+ Should be protected by spin_locks in calling function */
-+static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
-+ struct list_head *entry;
-+ struct list_head *tmp;
-+ urb_entry_t *urb_entry;
-+
-+ list_for_each_safe(entry, tmp, &urb_list[epid]) {
-+ urb_entry = list_entry(entry, urb_entry_t, list);
-+ ASSERT(urb_entry);
-+ ASSERT(urb_entry->urb);
-+
-+ if (urb_entry->urb == urb) {
-+ return urb_entry;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/* Same function as above but for global use. Protects list by spinlock */
-+static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return (urb_entry);
- }
-
--static void init_tx_isoc_ep(void)
--{
-- int i;
-+/* Delete an urb from the list. */
-+static inline void urb_list_del(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ /* Delete entry and free. */
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ list_del(&urb_entry->list);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ kfree(urb_entry);
-+}
-
-- DBFENTER;
-+/* Move an urb to the end of the list. */
-+static inline void urb_list_move_last(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ list_del(&urb_entry->list);
-+ list_add_tail(&urb_entry->list, &urb_list[epid]);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+}
-
-- /* Read comment at zout_buffer declaration for an explanation to this. */
-- TxIsocSB_zout.sw_len = 1;
-- TxIsocSB_zout.next = 0;
-- TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-- TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, zout) |
-- IO_STATE(USB_SB_command, full, yes) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- /* The last isochronous EP descriptor is a dummy. */
--
-- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-- CHECK_ALIGN(&TxIsocEPList[i]);
-- TxIsocEPList[i].hw_len = 0;
-- TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
-- TxIsocEPList[i].sub = 0;
-- TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
-+/* Get the next urb in the list. */
-+static inline struct urb *urb_list_next(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ if (urb_entry->list.next != &urb_list[epid]) {
-+ struct list_head *elem = urb_entry->list.next;
-+ urb_entry = list_entry(elem, urb_entry_t, list);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return urb_entry->urb;
-+ } else {
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return NULL;
-+ }
-+}
-+
-+struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
-+ int mem_flags) {
-+ struct USB_EP_Desc *ep_desc;
-+ ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(ep_desc == NULL)
-+ return NULL;
-+ memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
-+
-+ ep_desc->hw_len = 0;
-+ ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
-+ IO_STATE(USB_EP_command, enable, yes));
-+ if(sb_desc == NULL) {
-+ ep_desc->sub = 0;
-+ } else {
-+ ep_desc->sub = virt_to_phys(sb_desc);
-+ }
-+ return ep_desc;
-+}
-+
-+#define TT_ZOUT 0
-+#define TT_IN 1
-+#define TT_OUT 2
-+#define TT_SETUP 3
-+
-+#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
-+#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
-+#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
-+
-+/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
-+ SBs. Also used by create_sb_in() to avoid same allocation procedure at two
-+ places */
-+struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
-+ int datalen, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+ memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
-+
-+ sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
-+ IO_STATE(USB_SB_command, eot, yes);
-+
-+ sb_desc->sw_len = datalen;
-+ if(data != NULL) {
-+ sb_desc->buf = virt_to_phys(data);
-+ } else {
-+ sb_desc->buf = 0;
-+ }
-+ if(sb_prev != NULL) {
-+ sb_prev->next = virt_to_phys(sb_desc);
-+ }
-+ return sb_desc;
-+}
-+
-+/* Creates a copy of an existing SB by allocation space for it and copy
-+ settings */
-+struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+
-+ memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
-+ return sb_desc;
-+}
-+
-+/* A specific create_sb function for creation of in SBs. This is due to
-+ that datalen in In SBs shows how many packets we are expecting. It also
-+ sets up the rem field to show if how many bytes we expect in last packet
-+ if it's not a full one */
-+struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
-+ int maxlen, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = create_sb(sb_prev, TT_IN, NULL,
-+ datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+ sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
-+ return sb_desc;
-+}
-+
-+void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
-+ sb_desc->command |= flags;
-+}
-+
-+int create_sb_for_urb(struct urb *urb, int mem_flags) {
-+ int is_out = !usb_pipein(urb->pipe);
-+ int type = usb_pipetype(urb->pipe);
-+ int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
-+ int buf_len = urb->transfer_buffer_length;
-+ void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
-+ struct USB_SB_Desc *sb_desc = NULL;
-+
-+ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv != NULL);
-+
-+ switch(type) {
-+ case PIPE_CONTROL:
-+ /* Setup stage */
-+ sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+
-+ /* Attach first SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+
-+ if (is_out) { /* Out Control URB */
-+ /* If this Control OUT transfer has an optional data stage we add
-+ an OUT token before the mandatory IN (status) token */
-+ if ((buf_len > 0) && buf) {
-+ sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+
-+ /* Status stage */
-+ /* The data length has to be exactly 1. This is due to a requirement
-+ of the USB specification that a host must be prepared to receive
-+ data in the status phase */
-+ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ } else { /* In control URB */
-+ /* Data stage */
-+ sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* Status stage */
-+ /* Read comment at zout_buffer declaration for an explanation to this. */
-+ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* Set descriptor interrupt flag for in URBs so we can finish URB after
-+ zout-packet has been sent */
-+ set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
-+ }
-+ /* Set end-of-list flag in last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+ /* Attach last SB to URB */
-+ urb_priv->last_sb = sb_desc;
-+ break;
-+
-+ case PIPE_BULK:
-+ if (is_out) { /* Out Bulk URB */
-+ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* The full field is set to yes, even if we don't actually check that
-+ this is a full-length transfer (i.e., that transfer_buffer_length %
-+ maxlen = 0).
-+ Setting full prevents the USB controller from sending an empty packet
-+ in that case. However, if URB_ZERO_PACKET was set we want that. */
-+ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ } else { /* In Bulk URB */
-+ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ }
-+ /* Set end-of-list flag for last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+ break;
-+
-+ case PIPE_INTERRUPT:
-+ if(is_out) { /* Out Intr URB */
-+ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* The full field is set to yes, even if we don't actually check that
-+ this is a full-length transfer (i.e., that transfer_buffer_length %
-+ maxlen = 0).
-+ Setting full prevents the USB controller from sending an empty packet
-+ in that case. However, if URB_ZERO_PACKET was set we want that. */
-+ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ /* Only generate TX interrupt if it's a Out URB*/
-+ set_sb_cmds(sb_desc, CMD_INTR);
-+
-+ } else { /* In Intr URB */
-+ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ }
-+ /* Set end-of-list flag for last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ if(is_out) { /* Out Isoc URB */
-+ int i;
-+ if(urb->number_of_packets == 0) {
-+ tc_err("Can't create SBs for Isoc URB with zero packets\n");
-+ return -EPIPE;
-+ }
-+ /* Create one SB descriptor for each packet and link them together. */
-+ for(i = 0; i < urb->number_of_packets; i++) {
-+ if (urb->iso_frame_desc[i].length > 0) {
-+
-+ sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
-+ urb->iso_frame_desc[i].offset,
-+ urb->iso_frame_desc[i].length, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* Check if it's a full length packet */
-+ if (urb->iso_frame_desc[i].length ==
-+ usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+
-+ } else { /* zero length packet */
-+ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ /* Attach first SB descriptor to URB */
-+ if (i == 0) {
-+ urb_priv->first_sb = sb_desc;
-+ }
-+ }
-+ /* Set interrupt and end-of-list flags in last SB */
-+ set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
-+ /* Attach last SB descriptor to URB */
-+ urb_priv->last_sb = sb_desc;
-+ tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
-+ urb->number_of_packets, (unsigned int)urb);
-+ } else { /* In Isoc URB */
-+ /* Actual number of packets is not relevant for periodic in traffic as
-+ long as it is more than zero. Set to 1 always. */
-+ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* Set end-of-list flags for SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+ }
-+ break;
-+ default:
-+ tc_err("Unknown pipe-type\n");
-+ return -EPIPE;
-+ break;
-+ }
-+ return 0;
-+}
-+
-+int init_intr_urb(struct urb *urb, int mem_flags) {
-+ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ struct USB_EP_Desc* ep_desc;
-+ int interval;
-+ int i;
-+ int ep_count;
-+
-+ ASSERT(urb_priv != NULL);
-+ ASSERT(usb_pipeint(urb->pipe));
-+ /* We can't support interval longer than amount of eof descriptors in
-+ TxIntrEPList */
-+ if(urb->interval > MAX_INTR_INTERVAL) {
-+ tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
-+ MAX_INTR_INTERVAL);
-+ return -EINVAL;
-+ }
-+
-+ /* We assume that the SB descriptors already have been setup */
-+ ASSERT(urb_priv->first_sb != NULL);
-+
-+ /* Round of the interval to 2^n, it is obvious that this code favours
-+ smaller numbers, but that is actually a good thing */
-+ /* FIXME: The "rounding error" for larger intervals will be quite
-+ large. For in traffic this shouldn't be a problem since it will only
-+ mean that we "poll" more often. */
-+ interval = urb->interval;
-+ for (i = 0; interval; i++) {
-+ interval = interval >> 1;
-+ }
-+ urb_priv->interval = 1 << (i - 1);
-+
-+ /* We can only have max interval for Out Interrupt due to that we can only
-+ handle one linked in EP for a certain epid in the Intr descr array at the
-+ time. The USB Controller in the Etrax 100LX continues to process Intr EPs
-+ so we have no way of knowing which one that caused the actual transfer if
-+ we have several linked in. */
-+ if(usb_pipeout(urb->pipe)) {
-+ urb_priv->interval = MAX_INTR_INTERVAL;
-+ }
-+
-+ /* Calculate amount of EPs needed */
-+ ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
-+
-+ for(i = 0; i < ep_count; i++) {
-+ ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
-+ if(ep_desc == NULL) {
-+ /* Free any descriptors that we may have allocated before failure */
-+ while(i > 0) {
-+ i--;
-+ kfree(urb_priv->intr_ep_pool[i]);
-+ }
-+ return -ENOMEM;
-+ }
-+ urb_priv->intr_ep_pool[i] = ep_desc;
-+ }
-+ urb_priv->intr_ep_pool_length = ep_count;
-+ return 0;
-+}
-+
-+/* DMA RX/TX functions */
-+/* ----------------------- */
-+
-+static void tc_dma_init_rx_list(void) {
-+ int i;
-+
-+ /* Setup descriptor list except last one */
-+ for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
-+ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-+ RxDescList[i].command = 0;
-+ RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
-+ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-+ RxDescList[i].hw_len = 0;
-+ RxDescList[i].status = 0;
-+
-+ /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
-+ USB_IN_Desc for the relevant fields.) */
-+ prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
-+
-+ }
-+ /* Special handling of last descriptor */
-+ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-+ RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
-+ RxDescList[i].next = virt_to_phys(&RxDescList[0]);
-+ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-+ RxDescList[i].hw_len = 0;
-+ RxDescList[i].status = 0;
-+
-+ /* Setup list pointers that show progress in list */
-+ myNextRxDesc = &RxDescList[0];
-+ myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
-+
-+ flush_etrax_cache();
-+ /* Point DMA to first descriptor in list and start it */
-+ *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
-+ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
-+}
-+
-+
-+static void tc_dma_init_tx_bulk_list(void) {
-+ int i;
-+ volatile struct USB_EP_Desc *epDescr;
-+
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ epDescr = &(TxBulkEPList[i]);
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
-+
-+ /* Initiate two EPs, disabled and with the eol flag set. No need for any
-+ preserved epid. */
-+
-+ /* The first one has the intr flag set so we get an interrupt when the DMA
-+ channel is about to become disabled. */
-+ CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
-+ TxBulkDummyEPList[i][0].hw_len = 0;
-+ TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_STATE(USB_EP_command, intr, yes));
-+ TxBulkDummyEPList[i][0].sub = 0;
-+ TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
-+
-+ /* The second one. */
-+ CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
-+ TxBulkDummyEPList[i][1].hw_len = 0;
-+ TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-+ IO_STATE(USB_EP_command, eol, yes));
-+ TxBulkDummyEPList[i][1].sub = 0;
-+ /* The last dummy's next pointer is the same as the current EP's next pointer. */
-+ TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
-+ }
-+
-+ /* Special handling of last descr in list, make list circular */
-+ epDescr = &TxBulkEPList[i];
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxBulkEPList[0]);
-+
-+ /* Init DMA sub-channel pointers to last item in each list */
-+ *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
-+ /* No point in starting the bulk channel yet.
-+ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
-+}
-+
-+static void tc_dma_init_tx_ctrl_list(void) {
-+ int i;
-+ volatile struct USB_EP_Desc *epDescr;
-+
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ epDescr = &(TxCtrlEPList[i]);
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
-+ }
-+ /* Special handling of last descr in list, make list circular */
-+ epDescr = &TxCtrlEPList[i];
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
-+
-+ /* Init DMA sub-channel pointers to last item in each list */
-+ *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
-+ /* No point in starting the ctrl channel yet.
-+ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
-+}
-+
-+
-+static void tc_dma_init_tx_intr_list(void) {
-+ int i;
-+
-+ TxIntrSB_zout.sw_len = 1;
-+ TxIntrSB_zout.next = 0;
-+ TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-+ TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-+ IO_STATE(USB_SB_command, tt, zout) |
-+ IO_STATE(USB_SB_command, full, yes) |
-+ IO_STATE(USB_SB_command, eot, yes) |
-+ IO_STATE(USB_SB_command, eol, yes));
-+
-+ for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
-+ CHECK_ALIGN(&TxIntrEPList[i]);
-+ TxIntrEPList[i].hw_len = 0;
-+ TxIntrEPList[i].command =
-+ (IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, enable, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-+ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
-+ }
-+
-+ /* Special handling of last descr in list, make list circular */
-+ CHECK_ALIGN(&TxIntrEPList[i]);
-+ TxIntrEPList[i].hw_len = 0;
-+ TxIntrEPList[i].command =
-+ (IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_STATE(USB_EP_command, enable, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-+ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
-+
-+ intr_dbg("Initiated Intr EP descriptor list\n");
-+
-+
-+ /* Connect DMA 8 sub-channel 2 to first in list */
-+ *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
-+}
-+
-+static void tc_dma_init_tx_isoc_list(void) {
-+ int i;
-+
-+ DBFENTER;
-+
-+ /* Read comment at zout_buffer declaration for an explanation to this. */
-+ TxIsocSB_zout.sw_len = 1;
-+ TxIsocSB_zout.next = 0;
-+ TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-+ TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-+ IO_STATE(USB_SB_command, tt, zout) |
-+ IO_STATE(USB_SB_command, full, yes) |
-+ IO_STATE(USB_SB_command, eot, yes) |
-+ IO_STATE(USB_SB_command, eol, yes));
-+
-+ /* The last isochronous EP descriptor is a dummy. */
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ CHECK_ALIGN(&TxIsocEPList[i]);
-+ TxIsocEPList[i].hw_len = 0;
-+ TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
-+ TxIsocEPList[i].sub = 0;
-+ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
-+ }
-+
-+ CHECK_ALIGN(&TxIsocEPList[i]);
-+ TxIsocEPList[i].hw_len = 0;
-+
-+ /* Must enable the last EP descr to get eof interrupt. */
-+ TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
-+ IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
-+ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
-+
-+ *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
-+ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
-+}
-+
-+static int tc_dma_init(struct usb_hcd *hcd) {
-+ tc_dma_init_rx_list();
-+ tc_dma_init_tx_bulk_list();
-+ tc_dma_init_tx_ctrl_list();
-+ tc_dma_init_tx_intr_list();
-+ tc_dma_init_tx_isoc_list();
-+
-+ if (cris_request_dma(USB_TX_DMA_NBR,
-+ "ETRAX 100LX built-in USB (Tx)",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_usb)) {
-+ err("Could not allocate DMA ch 8 for USB");
-+ return -EBUSY;
-+ }
-+
-+ if (cris_request_dma(USB_RX_DMA_NBR,
-+ "ETRAX 100LX built-in USB (Rx)",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_usb)) {
-+ err("Could not allocate DMA ch 9 for USB");
-+ return -EBUSY;
-+ }
-+
-+ *R_IRQ_MASK2_SET =
-+ /* Note that these interrupts are not used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
-+ /* Sub channel 1 (ctrl) descr. interrupts are used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
-+ /* Sub channel 3 (isoc) descr. interrupts are used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
-+
-+ /* Note that the dma9_descr interrupt is not used. */
-+ *R_IRQ_MASK2_SET =
-+ IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
-+
-+ if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
-+ "ETRAX 100LX built-in USB (Rx)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
-+ return -EBUSY;
-+ }
-+
-+ if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
-+ "ETRAX 100LX built-in USB (Tx)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
-+ return -EBUSY;
-+ }
-+
-+ return 0;
-+}
-+
-+static void tc_dma_destroy(void) {
-+ free_irq(ETRAX_USB_RX_IRQ, NULL);
-+ free_irq(ETRAX_USB_TX_IRQ, NULL);
-+
-+ cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
-+ cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
-+
-+}
-+
-+static void tc_dma_link_intr_urb(struct urb *urb);
-+
-+/* Handle processing of Bulk, Ctrl and Intr queues */
-+static void tc_dma_process_queue(int epid) {
-+ struct urb *urb;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ unsigned long flags;
-+ char toggle;
-+
-+ if(epid_state[epid].disabled) {
-+ /* Don't process any URBs on a disabled endpoint */
-+ return;
-+ }
-+
-+ /* Do not disturb us while fiddling with EPs and epids */
-+ local_irq_save(flags);
-+
-+ /* For bulk, Ctrl and Intr can we only have one URB active at a time for
-+ a specific EP. */
-+ if(activeUrbList[epid] != NULL) {
-+ /* An URB is already active on EP, skip checking queue */
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ urb = urb_list_first(epid);
-+ if(urb == NULL) {
-+ /* No URB waiting in EP queue. Nothing do to */
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv != NULL);
-+ ASSERT(urb_priv->urb_state == NOT_STARTED);
-+ ASSERT(!usb_pipeisoc(urb->pipe));
-+
-+ /* Remove this URB from the queue and move it to active */
-+ activeUrbList[epid] = urb;
-+ urb_list_del(urb, epid);
-+
-+ urb_priv->urb_state = STARTED;
-+
-+ /* Reset error counters (regardless of which direction this traffic is). */
-+ etrax_epid_clear_error(epid);
-+
-+ /* Special handling of Intr EP lists */
-+ if(usb_pipeint(urb->pipe)) {
-+ tc_dma_link_intr_urb(urb);
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ /* Software must preset the toggle bits for Bulk and Ctrl */
-+ if(usb_pipecontrol(urb->pipe)) {
-+ /* Toggle bits are initialized only during setup transaction in a
-+ CTRL transfer */
-+ etrax_epid_set_toggle(epid, 0, 0);
-+ etrax_epid_set_toggle(epid, 1, 0);
-+ } else {
-+ toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-+ usb_pipeout(urb->pipe));
-+ etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
-+ }
-+
-+ tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
-+ (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
-+ sblist_to_str(urb_priv->first_sb));
-+
-+ /* We start the DMA sub channel without checking if it's running or not,
-+ because:
-+ 1) If it's already running, issuing the start command is a nop.
-+ 2) We avoid a test-and-set race condition. */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Assert that the EP descriptor is disabled. */
-+ ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-+
-+ /* Set up and enable the EP descriptor. */
-+ TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ TxBulkEPList[epid].hw_len = 0;
-+ TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ /* Check if the dummy list is already with us (if several urbs were queued). */
-+ if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
-+ tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
-+ (unsigned long)urb, epid);
-+
-+ /* We don't need to check if the DMA is at this EP or not before changing the
-+ next pointer, since we will do it in one 32-bit write (EP descriptors are
-+ 32-bit aligned). */
-+ TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
-+ }
-+
-+ restart_dma8_sub0();
-+
-+ /* Update/restart the bulk start timer since we just started the channel.*/
-+ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-+ /* Update/restart the bulk eot timer since we just inserted traffic. */
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Assert that the EP descriptor is disabled. */
-+ ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-+
-+ /* Set up and enable the EP descriptor. */
-+ TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ TxCtrlEPList[epid].hw_len = 0;
-+ TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
-+ break;
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+static void tc_dma_link_intr_urb(struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ volatile struct USB_EP_Desc *tmp_ep;
-+ struct USB_EP_Desc *ep_desc;
-+ int i = 0, epid;
-+ int pool_idx = 0;
-+
-+ ASSERT(urb_priv != NULL);
-+ epid = urb_priv->epid;
-+ ASSERT(urb_priv->interval > 0);
-+ ASSERT(urb_priv->intr_ep_pool_length > 0);
-+
-+ tmp_ep = &TxIntrEPList[0];
-+
-+ /* Only insert one EP descriptor in list for Out Intr URBs.
-+ We can only handle Out Intr with interval of 128ms because
-+ it's not possible to insert several Out Intr EPs because they
-+ are not consumed by the DMA. */
-+ if(usb_pipeout(urb->pipe)) {
-+ ep_desc = urb_priv->intr_ep_pool[0];
-+ ASSERT(ep_desc);
-+ ep_desc->next = tmp_ep->next;
-+ tmp_ep->next = virt_to_phys(ep_desc);
-+ i++;
-+ } else {
-+ /* Loop through Intr EP descriptor list and insert EP for URB at
-+ specified interval */
-+ do {
-+ /* Each EP descriptor with eof flag sat signals a new frame */
-+ if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
-+ /* Insert a EP from URBs EP pool at correct interval */
-+ if ((i % urb_priv->interval) == 0) {
-+ ep_desc = urb_priv->intr_ep_pool[pool_idx];
-+ ASSERT(ep_desc);
-+ ep_desc->next = tmp_ep->next;
-+ tmp_ep->next = virt_to_phys(ep_desc);
-+ pool_idx++;
-+ ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
- }
-+ i++;
-+ }
-+ tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
-+ } while(tmp_ep != &TxIntrEPList[0]);
-+ }
-+
-+ intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
-+ sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
-+
-+ /* We start the DMA sub channel without checking if it's running or not,
-+ because:
-+ 1) If it's already running, issuing the start command is a nop.
-+ 2) We avoid a test-and-set race condition. */
-+ *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
-+}
-+
-+static void tc_dma_process_isoc_urb(struct urb *urb) {
-+ unsigned long flags;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid;
-+
-+ /* Do not disturb us while fiddling with EPs and epids */
-+ local_irq_save(flags);
-+
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->first_sb);
-+ epid = urb_priv->epid;
-+
-+ if(activeUrbList[epid] == NULL) {
-+ /* EP is idle, so make this URB active */
-+ activeUrbList[epid] = urb;
-+ urb_list_del(urb, epid);
-+ ASSERT(TxIsocEPList[epid].sub == 0);
-+ ASSERT(!(TxIsocEPList[epid].command &
-+ IO_STATE(USB_EP_command, enable, yes)));
-+
-+ /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
-+ if(usb_pipein(urb->pipe)) {
-+ /* Each EP for In Isoc will have only one SB descriptor, setup when
-+ submitting the first active urb. We do it here by copying from URBs
-+ pre-allocated SB. */
-+ memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
-+ sizeof(TxIsocSBList[epid]));
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
-+ } else {
-+ /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+
-+ isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
-+ " last_sb::0x%x\n",
-+ (unsigned int)urb, urb_priv->urb_num, epid,
-+ (unsigned int)(urb_priv->first_sb),
-+ (unsigned int)(urb_priv->last_sb));
-+ }
-+
-+ if (urb->transfer_flags & URB_ISO_ASAP) {
-+ /* The isoc transfer should be started as soon as possible. The
-+ start_frame field is a return value if URB_ISO_ASAP was set. Comparing
-+ R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
-+ token is sent 2 frames later. I'm not sure how this affects usage of
-+ the start_frame field by the device driver, or how it affects things
-+ when USB_ISO_ASAP is not set, so therefore there's no compensation for
-+ the 2 frame "lag" here. */
-+ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
-+ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+ urb_priv->urb_state = STARTED;
-+ isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
-+ urb->start_frame);
-+ } else {
-+ /* Not started yet. */
-+ urb_priv->urb_state = NOT_STARTED;
-+ isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
-+ (unsigned int)urb);
-+ }
-+
-+ } else {
-+ /* An URB is already active on the EP. Leave URB in queue and let
-+ finish_isoc_urb process it after current active URB */
-+ ASSERT(TxIsocEPList[epid].sub != 0);
-+
-+ if(usb_pipein(urb->pipe)) {
-+ /* Because there already is a active In URB on this epid we do nothing
-+ and the finish_isoc_urb() function will handle switching to next URB*/
-+
-+ } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
-+ struct USB_SB_Desc *temp_sb_desc;
-+
-+ /* Set state STARTED to all Out Isoc URBs added to SB list because we
-+ don't know how many of them that are finished before descr interrupt*/
-+ urb_priv->urb_state = STARTED;
-+
-+ /* Find end of current SB list by looking for SB with eol flag sat */
-+ temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
-+ while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
-+ IO_STATE(USB_SB_command, eol, yes)) {
-+ ASSERT(temp_sb_desc->next);
-+ temp_sb_desc = phys_to_virt(temp_sb_desc->next);
-+ }
-+
-+ isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
-+ " sub:0x%x eol:0x%x\n",
-+ (unsigned int)urb, urb_priv->urb_num,
-+ (unsigned int)(urb_priv->first_sb),
-+ (unsigned int)(urb_priv->last_sb), epid,
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)temp_sb_desc);
-+
-+ /* Next pointer must be set before eol is removed. */
-+ temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
-+ /* Clear the previous end of list flag since there is a new in the
-+ added SB descriptor list. */
-+ temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
-+
-+ if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
-+ __u32 epid_data;
-+ /* 8.8.5 in Designer's Reference says we should check for and correct
-+ any errors in the EP here. That should not be necessary if
-+ epid_attn is handled correctly, so we assume all is ok. */
-+ epid_data = etrax_epid_iso_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
-+ " URB:0x%x[%d]\n",
-+ IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+
-+ /* The SB list was exhausted. */
-+ if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
-+ /* The new sublist did not get processed before the EP was
-+ disabled. Setup the EP again. */
-+
-+ if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
-+ isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
-+ ", restarting from this URBs SB:0x%x\n",
-+ epid, (unsigned int)temp_sb_desc,
-+ (unsigned int)(urb_priv->first_sb));
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
-+ /* Enable the EP again so data gets processed this time */
-+ TxIsocEPList[epid].command |=
-+ IO_STATE(USB_EP_command, enable, yes);
-+
-+ } else {
-+ /* The EP has been disabled but not at end this URB (god knows
-+ where). This should generate an epid_attn so we should not be
-+ here */
-+ isoc_warn("EP was disabled on sb:0x%x before SB list for"
-+ " URB:0x%x[%d] got processed\n",
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ } else {
-+ /* This might happend if we are slow on this function and isn't
-+ an error. */
-+ isoc_dbg("EP was disabled and finished with SBs from appended"
-+ " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ }
-+ }
-+ }
-+
-+ /* Start the DMA sub channel */
-+ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
-+
-+ local_irq_restore(flags);
-+}
-+
-+static void tc_dma_unlink_intr_urb(struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+ volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
-+ the list. */
-+ int count = 0;
-+ volatile int timeout = 10000;
-+ int epid;
-+
-+ /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
-+ List". */
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->intr_ep_pool_length > 0);
-+ epid = urb_priv->epid;
-+
-+ /* First disable all Intr EPs belonging to epid for this URB */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* Disable EP */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+
-+ /* Now unlink all EPs belonging to this epid from Descr list */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* This is the one we should unlink. */
-+ unlink_ep = next_ep;
-+
-+ /* Actually unlink the EP from the DMA list. */
-+ curr_ep->next = unlink_ep->next;
-+
-+ /* Wait until the DMA is no longer at this descriptor. */
-+ while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
-+ }
-+
-+ count++;
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+ if(count != urb_priv->intr_ep_pool_length) {
-+ intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ } else {
-+ intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb);
-+ }
-+}
-+
-+static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
-+ int timer) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ __u32 epid_data;
-+
-+ /* Protect TxEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ /* A finished EP descriptor is disabled and has a valid sub pointer */
-+ if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
-+ (TxBulkEPList[epid].sub != 0)) {
-+
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+ /* Sanity checks */
-+ ASSERT(urb);
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Only handle finished out Bulk EPs here,
-+ and let RX interrupt take care of the rest */
-+ if(!epid_out_traffic(epid)) {
-+ continue;
-+ }
-+
-+ if(timer) {
-+ tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
-+ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ } else {
-+ tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
-+ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ }
-+
-+ if(urb_priv->urb_state == UNLINK) {
-+ /* This Bulk URB is requested to be unlinked, that means that the EP
-+ has been disabled and we might not have sent all data */
-+ tc_finish_urb(hcd, urb, urb->status);
-+ continue;
-+ }
-+
-+ ASSERT(urb_priv->urb_state == STARTED);
-+ if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
-+ tc_err("Endpoint got disabled before reaching last sb\n");
-+ }
-+
-+ epid_data = etrax_epid_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ /* This means that the endpoint has no error, is disabled
-+ and had inserted traffic, i.e. transfer successfully completed. */
-+ tc_finish_urb(hcd, urb, 0);
-+ } else {
-+ /* Shouldn't happen. We expect errors to be caught by epid
-+ attention. */
-+ tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
-+ epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
-+ }
-+ } else {
-+ tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
-+ }
-+ }
-+
-+ local_irq_restore(flags);
-+}
-+
-+static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ __u32 epid_data;
-+
-+ /* Protect TxEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if(epid == DUMMY_EPID)
-+ continue;
-+
-+ /* A finished EP descriptor is disabled and has a valid sub pointer */
-+ if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
-+ (TxCtrlEPList[epid].sub != 0)) {
-+
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+
-+ if(urb == NULL) {
-+ tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ /* Sanity checks */
-+ ASSERT(usb_pipein(urb->pipe));
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
-+ tc_err("Endpoint got disabled before reaching last sb\n");
-+ }
-+
-+ epid_data = etrax_epid_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ /* This means that the endpoint has no error, is disabled
-+ and had inserted traffic, i.e. transfer successfully completed. */
-+
-+ /* Check if RX-interrupt for In Ctrl has been processed before
-+ finishing the URB */
-+ if(urb_priv->ctrl_rx_done) {
-+ tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+ tc_finish_urb(hcd, urb, 0);
-+ } else {
-+ /* If we get zout descriptor interrupt before RX was done for a
-+ In Ctrl transfer, then we flag that and it will be finished
-+ in the RX-Interrupt */
-+ urb_priv->ctrl_zout_done = 1;
-+ tc_dbg("Got zout descr interrupt before RX interrupt\n");
-+ }
-+ } else {
-+ /* Shouldn't happen. We expect errors to be caught by epid
-+ attention. */
-+ tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
-+ __dump_ep_desc(&(TxCtrlEPList[epid]));
-+ __dump_ept_data(epid);
-+ }
-+ }
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+/* This function goes through all epids that are setup for Out Isoc transfers
-+ and marks (isoc_out_done) all queued URBs that the DMA has finished
-+ transfer for.
-+ No URB completetion is done here to make interrupt routine return quickly.
-+ URBs are completed later with help of complete_isoc_bottom_half() that
-+ becomes schedules when this functions is finished. */
-+static void check_finished_isoc_tx_epids(void) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ struct USB_SB_Desc* sb_desc;
-+ int epid_done;
-+
-+ /* Protect TxIsocEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
-+ !epid_out_traffic(epid)) {
-+ /* Nothing here to see. */
-+ continue;
-+ }
-+ ASSERT(epid_inuse(epid));
-+ ASSERT(epid_isoc(epid));
-+
-+ sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
-+ /* Find the last descriptor of the currently active URB for this ep.
-+ This is the first descriptor in the sub list marked for a descriptor
-+ interrupt. */
-+ while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
-+ sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
-+ }
-+ ASSERT(sb_desc);
-+
-+ isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
-+ epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)sb_desc);
-+
-+ urb = activeUrbList[epid];
-+ if(urb == NULL) {
-+ isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ epid_done = 0;
-+ while(urb && !epid_done) {
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->urb_state == STARTED ||
-+ urb_priv->urb_state == UNLINK);
-+
-+ if (sb_desc != urb_priv->last_sb) {
-+ /* This urb has been sent. */
-+ urb_priv->isoc_out_done = 1;
-+
-+ } else { /* Found URB that has last_sb as the interrupt reason */
-+
-+ /* Check if EP has been disabled, meaning that all transfers are done*/
-+ if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
-+ ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
-+ IO_STATE(USB_SB_command, eol, yes));
-+ ASSERT(sb_desc->next == 0);
-+ urb_priv->isoc_out_done = 1;
-+ } else {
-+ isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ /* Stop looking any further in queue */
-+ epid_done = 1;
-+ }
-+
-+ if (!epid_done) {
-+ if(urb == activeUrbList[epid]) {
-+ urb = urb_list_first(epid);
-+ } else {
-+ urb = urb_list_next(urb, epid);
-+ }
-+ }
-+ } /* END: while(urb && !epid_done) */
-+ }
-+
-+ local_irq_restore(flags);
-+}
-+
-+
-+/* This is where the Out Isoc URBs are realy completed. This function is
-+ scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
-+ are done. This functions completes all URBs earlier marked with
-+ isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
-+
-+static void complete_isoc_bottom_half(void *data) {
-+ struct crisv10_isoc_complete_data *comp_data;
-+ struct usb_iso_packet_descriptor *packet;
-+ struct crisv10_urb_priv * urb_priv;
-+ unsigned long flags;
-+ struct urb* urb;
-+ int epid_done;
-+ int epid;
-+ int i;
-+
-+ comp_data = (struct crisv10_isoc_complete_data*)data;
-+
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-+ if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
-+ /* Only check valid Out Isoc epids */
-+ continue;
-+ }
-+
-+ isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
-+
-+ /* The descriptor interrupt handler has marked all transmitted Out Isoc
-+ URBs with isoc_out_done. Now we traverse all epids and for all that
-+ have out Isoc traffic we traverse its URB list and complete the
-+ transmitted URBs. */
-+ epid_done = 0;
-+ while (!epid_done) {
-+
-+ /* Get the active urb (if any) */
-+ urb = activeUrbList[epid];
-+ if (urb == 0) {
-+ isoc_dbg("No active URB on epid:%d anymore\n", epid);
-+ epid_done = 1;
-+ continue;
-+ }
-+
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ if (!(urb_priv->isoc_out_done)) {
-+ /* We have reached URB that isn't flaged done yet, stop traversing. */
-+ isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
-+ " before not yet flaged URB:0x%x[%d]\n",
-+ epid, (unsigned int)urb, urb_priv->urb_num);
-+ epid_done = 1;
-+ continue;
-+ }
-+
-+ /* This urb has been sent. */
-+ isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+
-+ /* Set ok on transfered packets for this URB and finish it */
-+ for (i = 0; i < urb->number_of_packets; i++) {
-+ packet = &urb->iso_frame_desc[i];
-+ packet->status = 0;
-+ packet->actual_length = packet->length;
-+ }
-+ urb_priv->isoc_packet_counter = urb->number_of_packets;
-+ tc_finish_urb(comp_data->hcd, urb, 0);
-+
-+ } /* END: while(!epid_done) */
-+ } /* END: for(epid...) */
-+
-+ local_irq_restore(flags);
-+ kmem_cache_free(isoc_compl_cache, comp_data);
-+}
-+
-+
-+static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+
-+ /* Protect TxintrEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
-+ /* Nothing to see on this epid. Only check valid Out Intr epids */
-+ continue;
-+ }
-+
-+ urb = activeUrbList[epid];
-+ if(urb == 0) {
-+ intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
-+ are inserted.*/
-+ curr_ep = &TxIntrEPList[0];
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if(next_ep == urb_priv->intr_ep_pool[0]) {
-+ /* We found the Out Intr EP for this epid */
-+
-+ /* Disable it so it doesn't get processed again */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ /* Finish the active Out Intr URB with status OK */
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != &TxIntrEPList[1]);
-+
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
-+static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
-+ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
-+ ASSERT(hcd);
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
-+ restart_dma8_sub0();
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
-+ check_finished_ctrl_tx_epids(hcd);
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
-+ check_finished_intr_tx_epids(hcd);
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
-+ struct crisv10_isoc_complete_data* comp_data;
-+
-+ /* Flag done Out Isoc for later completion */
-+ check_finished_isoc_tx_epids();
-+
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
-+ /* Schedule bottom half of Out Isoc completion function. This function
-+ finishes the URBs marked with isoc_out_done */
-+ comp_data = (struct crisv10_isoc_complete_data*)
-+ kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
-+ ASSERT(comp_data != NULL);
-+ comp_data ->hcd = hcd;
-+
-+ INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
-+ schedule_work(&comp_data->usb_bh);
-+ }
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
-+static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
-+ unsigned long flags;
-+ struct urb *urb;
-+ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
-+ struct crisv10_urb_priv *urb_priv;
-+ int epid = 0;
-+ int real_error;
-+
-+ ASSERT(hcd);
-+
-+ /* Clear this interrupt. */
-+ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
-+
-+ /* Custom clear interrupt for this interrupt */
-+ /* The reason we cli here is that we call the driver's callback functions. */
-+ local_irq_save(flags);
-+
-+ /* Note that this while loop assumes that all packets span only
-+ one rx descriptor. */
-+ while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
-+ epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+
-+ ASSERT(epid_inuse(epid));
-+ if (!urb) {
-+ dma_err("No urb for epid %d in rx interrupt\n", epid);
-+ goto skip_out;
-+ }
-+
-+ /* Check if any errors on epid */
-+ real_error = 0;
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
-+ __u32 r_usb_ept_data;
-+
-+ if (usb_pipeisoc(urb->pipe)) {
-+ r_usb_ept_data = etrax_epid_iso_get(epid);
-+ if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
-+ (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
-+ (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
-+ /* Not an error, just a failure to receive an expected iso
-+ in packet in this frame. This is not documented
-+ in the designers reference. Continue processing.
-+ */
-+ } else real_error = 1;
-+ } else real_error = 1;
-+ }
-+
-+ if(real_error) {
-+ dma_err("Error in RX descr on epid:%d for URB 0x%x",
-+ epid, (unsigned int)urb);
-+ dump_ept_data(epid);
-+ dump_in_desc(myNextRxDesc);
-+ goto skip_out;
-+ }
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->urb_state == STARTED ||
-+ urb_priv->urb_state == UNLINK);
-+
-+ if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
-+ (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
-+ (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
-+
-+ /* We get nodata for empty data transactions, and the rx descriptor's
-+ hw_len field is not valid in that case. No data to copy in other
-+ words. */
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-+ /* No data to copy */
-+ } else {
-+ /*
-+ dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
-+ (unsigned int)urb, epid, myNextRxDesc->hw_len,
-+ urb_priv->rx_offset);
-+ */
-+ /* Only copy data if URB isn't flaged to be unlinked*/
-+ if(urb_priv->urb_state != UNLINK) {
-+ /* Make sure the data fits in the buffer. */
-+ if(urb_priv->rx_offset + myNextRxDesc->hw_len
-+ <= urb->transfer_buffer_length) {
-+
-+ /* Copy the data to URBs buffer */
-+ memcpy(urb->transfer_buffer + urb_priv->rx_offset,
-+ phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
-+ urb_priv->rx_offset += myNextRxDesc->hw_len;
-+ } else {
-+ /* Signal overflow when returning URB */
-+ urb->status = -EOVERFLOW;
-+ tc_finish_urb_later(hcd, urb, urb->status);
-+ }
-+ }
-+ }
-+
-+ /* Check if it was the last packet in the transfer */
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
-+ /* Special handling for In Ctrl URBs. */
-+ if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
-+ !(urb_priv->ctrl_zout_done)) {
-+ /* Flag that RX part of Ctrl transfer is done. Because zout descr
-+ interrupt hasn't happend yet will the URB be finished in the
-+ TX-Interrupt. */
-+ urb_priv->ctrl_rx_done = 1;
-+ tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
-+ " for zout\n", (unsigned int)urb);
-+ } else {
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ }
-+ } else { /* ISOC RX */
-+ /*
-+ isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
-+ epid, (unsigned int)urb);
-+ */
-+
-+ struct usb_iso_packet_descriptor *packet;
-+
-+ if (urb_priv->urb_state == UNLINK) {
-+ isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
-+ goto skip_out;
-+ } else if (urb_priv->urb_state == NOT_STARTED) {
-+ isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
-+ goto skip_out;
-+ }
-+
-+ packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
-+ ASSERT(packet);
-+ packet->status = 0;
-+
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-+ /* We get nodata for empty data transactions, and the rx descriptor's
-+ hw_len field is not valid in that case. We copy 0 bytes however to
-+ stay in synch. */
-+ packet->actual_length = 0;
-+ } else {
-+ packet->actual_length = myNextRxDesc->hw_len;
-+ /* Make sure the data fits in the buffer. */
-+ ASSERT(packet->actual_length <= packet->length);
-+ memcpy(urb->transfer_buffer + packet->offset,
-+ phys_to_virt(myNextRxDesc->buf), packet->actual_length);
-+ if(packet->actual_length > 0)
-+ isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
-+ packet->actual_length, urb_priv->isoc_packet_counter,
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+
-+ /* Increment the packet counter. */
-+ urb_priv->isoc_packet_counter++;
-+
-+ /* Note that we don't care about the eot field in the rx descriptor's
-+ status. It will always be set for isoc traffic. */
-+ if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
-+ /* Complete the urb with status OK. */
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ }
-+
-+ skip_out:
-+ myNextRxDesc->status = 0;
-+ myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
-+ myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
-+ myLastRxDesc = myNextRxDesc;
-+ myNextRxDesc = phys_to_virt(myNextRxDesc->next);
-+ flush_etrax_cache();
-+ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
-+ }
-+
-+ local_irq_restore(flags);
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static void tc_bulk_start_timer_func(unsigned long dummy) {
-+ /* We might enable an EP descriptor behind the current DMA position when
-+ it's about to decide that there are no more bulk traffic and it should
-+ stop the bulk channel.
-+ Therefore we periodically check if the bulk channel is stopped and there
-+ is an enabled bulk EP descriptor, in which case we start the bulk
-+ channel. */
-+
-+ if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
-+ int epid;
-+
-+ timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
-+ epid);
-+ restart_dma8_sub0();
-+
-+ /* Restart the bulk eot timer since we just started the bulk channel.*/
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+
-+ /* No need to search any further. */
-+ break;
-+ }
-+ }
-+ } else {
-+ timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
-+ }
-+}
-+
-+static void tc_bulk_eot_timer_func(unsigned long dummy) {
-+ struct usb_hcd *hcd = (struct usb_hcd*)dummy;
-+ ASSERT(hcd);
-+ /* Because of a race condition in the top half, we might miss a bulk eot.
-+ This timer "simulates" a bulk eot if we don't get one for a while,
-+ hopefully correcting the situation. */
-+ timer_dbg("bulk_eot_timer timed out.\n");
-+ check_finished_bulk_tx_epids(hcd, 1);
-+}
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Device driver block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* Forward declarations for device driver functions */
-+static int devdrv_hcd_probe(struct device *);
-+static int devdrv_hcd_remove(struct device *);
-+#ifdef CONFIG_PM
-+static int devdrv_hcd_suspend(struct device *, u32, u32);
-+static int devdrv_hcd_resume(struct device *, u32);
-+#endif /* CONFIG_PM */
-+
-+/* the device */
-+static struct platform_device *devdrv_hc_platform_device;
-+
-+/* device driver interface */
-+static struct device_driver devdrv_hc_device_driver = {
-+ .name = (char *) hc_name,
-+ .bus = &platform_bus_type,
-+
-+ .probe = devdrv_hcd_probe,
-+ .remove = devdrv_hcd_remove,
-+
-+#ifdef CONFIG_PM
-+ .suspend = devdrv_hcd_suspend,
-+ .resume = devdrv_hcd_resume,
-+#endif /* CONFIG_PM */
-+};
-
-- CHECK_ALIGN(&TxIsocEPList[i]);
-- TxIsocEPList[i].hw_len = 0;
--
-- /* Must enable the last EP descr to get eof interrupt. */
-- TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
-- IO_STATE(USB_EP_command, eof, yes) |
-- IO_STATE(USB_EP_command, eol, yes) |
-- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-- TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
-- TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
--
-- *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
-- *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
--
-- DBFEXIT;
--}
--
--static void etrax_usb_unlink_intr_urb(struct urb *urb)
-+/* initialize the host controller and driver */
-+static int __init_or_module devdrv_hcd_probe(struct device *dev)
- {
-- volatile USB_EP_Desc_t *first_ep; /* First EP in the list. */
-- volatile USB_EP_Desc_t *curr_ep; /* Current EP, the iterator. */
-- volatile USB_EP_Desc_t *next_ep; /* The EP after current. */
-- volatile USB_EP_Desc_t *unlink_ep; /* The one we should remove from the list. */
--
-- int epid;
--
-- /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the List". */
--
-- DBFENTER;
--
-- epid = ((etrax_urb_priv_t *)urb->hcpriv)->epid;
--
-- first_ep = &TxIntrEPList[0];
-- curr_ep = first_ep;
--
--
-- /* Note that this loop removes all EP descriptors with this epid. This assumes
-- that all EP descriptors belong to the one and only urb for this epid. */
--
-- do {
-- next_ep = (USB_EP_Desc_t *)phys_to_virt(curr_ep->next);
--
-- if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
--
-- dbg_intr("Found EP to unlink for epid %d", epid);
--
-- /* This is the one we should unlink. */
-- unlink_ep = next_ep;
--
-- /* Actually unlink the EP from the DMA list. */
-- curr_ep->next = unlink_ep->next;
--
-- /* Wait until the DMA is no longer at this descriptor. */
-- while (*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep));
-+ struct usb_hcd *hcd;
-+ struct crisv10_hcd *crisv10_hcd;
-+ int retval;
-+
-+ /* Check DMA burst length */
-+ if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
-+ IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
-+ devdrv_err("Invalid DMA burst length in Etrax 100LX,"
-+ " needs to be 32\n");
-+ return -EPERM;
-+ }
-+
-+ hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
-+ if (!hcd)
-+ return -ENOMEM;
-+
-+ crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ spin_lock_init(&crisv10_hcd->lock);
-+ crisv10_hcd->num_ports = num_ports();
-+ crisv10_hcd->running = 0;
-+
-+ dev_set_drvdata(dev, crisv10_hcd);
-+
-+ devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
-+ ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
-+
-+ /* Print out chip version read from registers */
-+ int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
-+ int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
-+ if(rev_min == 0) {
-+ devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
-+ } else {
-+ devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
-+ }
-+
-+ devdrv_info("Bulk timer interval, start:%d eot:%d\n",
-+ BULK_START_TIMER_INTERVAL,
-+ BULK_EOT_TIMER_INTERVAL);
-+
-+
-+ /* Init root hub data structures */
-+ if(rh_init()) {
-+ devdrv_err("Failed init data for Root Hub\n");
-+ retval = -ENOMEM;
-+ }
-+
-+ if(port_in_use(0)) {
-+ if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
-+ printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+ devdrv_info("Claimed interface for USB physical port 1\n");
-+ }
-+ if(port_in_use(1)) {
-+ if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
-+ /* Free first interface if second failed to be claimed */
-+ if(port_in_use(0)) {
-+ cris_free_io_interface(if_usb_1);
-+ }
-+ printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+ devdrv_info("Claimed interface for USB physical port 2\n");
-+ }
-+
-+ /* Init transfer controller structs and locks */
-+ if((retval = tc_init(hcd)) != 0) {
-+ goto out;
-+ }
-+
-+ /* Attach interrupt functions for DMA and init DMA controller */
-+ if((retval = tc_dma_init(hcd)) != 0) {
-+ goto out;
-+ }
-+
-+ /* Attach the top IRQ handler for USB controller interrupts */
-+ if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
-+ "ETRAX 100LX built-in USB (HC)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+
-+ /* iso_eof is only enabled when isoc traffic is running. */
-+ *R_USB_IRQ_MASK_SET =
-+ /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
-+ IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
-+
-+
-+ crisv10_ready_wait();
-+ /* Reset the USB interface. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
-+
-+ /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
-+ 0x2A30 (10800), to guarantee that control traffic gets 10% of the
-+ bandwidth, and periodic transfer may allocate the rest (90%).
-+ This doesn't work though.
-+ The value 11960 is chosen to be just after the SOF token, with a couple
-+ of bit times extra for possible bit stuffing. */
-+ *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
-+
-+ crisv10_ready_wait();
-+ /* Configure the USB interface as a host controller. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
-+
-+
-+ /* Check so controller not busy before enabling ports */
-+ crisv10_ready_wait();
-+
-+ /* Enable selected USB ports */
-+ if(port_in_use(0)) {
-+ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
-+ } else {
-+ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
-+ }
-+ if(port_in_use(1)) {
-+ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
-+ } else {
-+ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
-+ }
-+
-+ crisv10_ready_wait();
-+ /* Start processing of USB traffic. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+
-+ /* Do not continue probing initialization before USB interface is done */
-+ crisv10_ready_wait();
-+
-+ /* Register our Host Controller to USB Core
-+ * Finish the remaining parts of generic HCD initialization: allocate the
-+ * buffers of consistent memory, register the bus
-+ * and call the driver's reset() and start() routines. */
-+ retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
-+ if (retval != 0) {
-+ devdrv_err("Failed registering HCD driver\n");
-+ goto out;
-+ }
-+
-+ return 0;
-+
-+ out:
-+ devdrv_hcd_remove(dev);
-+ return retval;
-+}
-+
-+
-+/* cleanup after the host controller and driver */
-+static int __init_or_module devdrv_hcd_remove(struct device *dev)
-+{
-+ struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
-+ struct usb_hcd *hcd;
-+
-+ if (!crisv10_hcd)
-+ return 0;
-+ hcd = crisv10_hcd_to_hcd(crisv10_hcd);
-+
-+
-+ /* Stop USB Controller in Etrax 100LX */
-+ crisv10_hcd_reset(hcd);
-+
-+ usb_remove_hcd(hcd);
-+ devdrv_dbg("Removed HCD from USB Core\n");
-+
-+ /* Free USB Controller IRQ */
-+ free_irq(ETRAX_USB_HC_IRQ, NULL);
-+
-+ /* Free resources */
-+ tc_dma_destroy();
-+ tc_destroy();
-+
-+
-+ if(port_in_use(0)) {
-+ cris_free_io_interface(if_usb_1);
-+ }
-+ if(port_in_use(1)) {
-+ cris_free_io_interface(if_usb_2);
-+ }
-+
-+ devdrv_dbg("Freed all claimed resources\n");
-+
-+ return 0;
-+}
-+
-+
-+#ifdef CONFIG_PM
-+
-+static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+#endif /* CONFIG_PM */
-+
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Module block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* register driver */
-+static int __init module_hcd_init(void)
-+{
-+
-+ if (usb_disabled())
-+ return -ENODEV;
-+
-+ /* Here we select enabled ports by following defines created from
-+ menuconfig */
-+#ifndef CONFIG_ETRAX_USB_HOST_PORT1
-+ ports &= ~(1<<0);
-+#endif
-+#ifndef CONFIG_ETRAX_USB_HOST_PORT2
-+ ports &= ~(1<<1);
-+#endif
-
-- /* Now we are free to remove it and its SB descriptor.
-- Note that it is assumed here that there is only one sb in the
-- sb list for this ep. */
-- kmem_cache_free(usb_desc_cache, phys_to_virt(unlink_ep->sub));
-- kmem_cache_free(usb_desc_cache, (USB_EP_Desc_t *)unlink_ep);
-- }
-+ printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
-
-- curr_ep = phys_to_virt(curr_ep->next);
-+ devdrv_hc_platform_device =
-+ platform_device_register_simple((char *) hc_name, 0, NULL, 0);
-
-- } while (curr_ep != first_ep);
-- urb->hcpriv = NULL;
-+ if (IS_ERR(devdrv_hc_platform_device))
-+ return PTR_ERR(devdrv_hc_platform_device);
-+ return driver_register(&devdrv_hc_device_driver);
-+ /*
-+ * Note that we do not set the DMA mask for the device,
-+ * i.e. we pretend that we will use PIO, since no specific
-+ * allocation routines are needed for DMA buffers. This will
-+ * cause the HCD buffer allocation routines to fall back to
-+ * kmalloc().
-+ */
- }
-
--void etrax_usb_do_intr_recover(int epid)
--{
-- USB_EP_Desc_t *first_ep, *tmp_ep;
-+/* unregister driver */
-+static void __exit module_hcd_exit(void)
-+{
-+ driver_unregister(&devdrv_hc_device_driver);
-+}
-
-- DBFENTER;
--
-- first_ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB2_EP);
-- tmp_ep = first_ep;
--
-- /* What this does is simply to walk the list of interrupt
-- ep descriptors and enable those that are disabled. */
--
-- do {
-- if (IO_EXTRACT(USB_EP_command, epid, tmp_ep->command) == epid &&
-- !(tmp_ep->command & IO_MASK(USB_EP_command, enable))) {
-- tmp_ep->command |= IO_STATE(USB_EP_command, enable, yes);
-- }
--
-- tmp_ep = (USB_EP_Desc_t *)phys_to_virt(tmp_ep->next);
--
-- } while (tmp_ep != first_ep);
--
--
-- DBFEXIT;
--}
--
--static int etrax_rh_unlink_urb (struct urb *urb)
--{
-- etrax_hc_t *hc;
--
-- DBFENTER;
--
-- hc = urb->dev->bus->hcpriv;
--
-- if (hc->rh.urb == urb) {
-- hc->rh.send = 0;
-- del_timer(&hc->rh.rh_int_timer);
-- }
--
-- DBFEXIT;
-- return 0;
--}
--
--static void etrax_rh_send_irq(struct urb *urb)
--{
-- __u16 data = 0;
-- etrax_hc_t *hc = urb->dev->bus->hcpriv;
-- DBFENTER;
--
--/*
-- dbg_rh("R_USB_FM_NUMBER : 0x%08X", *R_USB_FM_NUMBER);
-- dbg_rh("R_USB_FM_REMAINING: 0x%08X", *R_USB_FM_REMAINING);
--*/
--
-- data |= (hc->rh.wPortChange_1) ? (1 << 1) : 0;
-- data |= (hc->rh.wPortChange_2) ? (1 << 2) : 0;
--
-- *((__u16 *)urb->transfer_buffer) = cpu_to_le16(data);
-- /* FIXME: Why is actual_length set to 1 when data is 2 bytes?
-- Since only 1 byte is used, why not declare data as __u8? */
-- urb->actual_length = 1;
-- urb->status = 0;
--
-- if (hc->rh.send && urb->complete) {
-- dbg_rh("wPortChange_1: 0x%04X", hc->rh.wPortChange_1);
-- dbg_rh("wPortChange_2: 0x%04X", hc->rh.wPortChange_2);
--
-- urb->complete(urb, NULL);
-- }
--
-- DBFEXIT;
--}
--
--static void etrax_rh_init_int_timer(struct urb *urb)
--{
-- etrax_hc_t *hc;
--
-- DBFENTER;
--
-- hc = urb->dev->bus->hcpriv;
-- hc->rh.interval = urb->interval;
-- init_timer(&hc->rh.rh_int_timer);
-- hc->rh.rh_int_timer.function = etrax_rh_int_timer_do;
-- hc->rh.rh_int_timer.data = (unsigned long)urb;
-- /* FIXME: Is the jiffies resolution enough? All intervals < 10 ms will be mapped
-- to 0, and the rest to the nearest lower 10 ms. */
-- hc->rh.rh_int_timer.expires = jiffies + ((HZ * hc->rh.interval) / 1000);
-- add_timer(&hc->rh.rh_int_timer);
--
-- DBFEXIT;
--}
--
--static void etrax_rh_int_timer_do(unsigned long ptr)
--{
-- struct urb *urb;
-- etrax_hc_t *hc;
--
-- DBFENTER;
--
-- urb = (struct urb*)ptr;
-- hc = urb->dev->bus->hcpriv;
--
-- if (hc->rh.send) {
-- etrax_rh_send_irq(urb);
-- }
--
-- DBFEXIT;
--}
--
--static int etrax_usb_setup_epid(struct urb *urb)
--{
-- int epid;
-- char devnum, endpoint, out_traffic, slow;
-- int maxlen;
-- unsigned long flags;
--
-- DBFENTER;
--
-- epid = etrax_usb_lookup_epid(urb);
-- if ((epid != -1)){
-- /* An epid that fits this urb has been found. */
-- DBFEXIT;
-- return epid;
-- }
--
-- /* We must find and initiate a new epid for this urb. */
-- epid = etrax_usb_allocate_epid();
--
-- if (epid == -1) {
-- /* Failed to allocate a new epid. */
-- DBFEXIT;
-- return epid;
-- }
--
-- /* We now have a new epid to use. Initiate it. */
-- set_bit(epid, (void *)&epid_usage_bitmask);
--
-- devnum = usb_pipedevice(urb->pipe);
-- endpoint = usb_pipeendpoint(urb->pipe);
-- slow = usb_pipeslow(urb->pipe);
-- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-- if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
-- /* We want both IN and OUT control traffic to be put on the same EP/SB list. */
-- out_traffic = 1;
-- } else {
-- out_traffic = usb_pipeout(urb->pipe);
-- }
--
-- save_flags(flags);
-- cli();
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
--
-- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- *R_USB_EPT_DATA_ISO = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
-- /* FIXME: Change any to the actual port? */
-- IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
-- IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
-- IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
-- IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
-- } else {
-- *R_USB_EPT_DATA = IO_STATE(R_USB_EPT_DATA, valid, yes) |
-- IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
-- /* FIXME: Change any to the actual port? */
-- IO_STATE(R_USB_EPT_DATA, port, any) |
-- IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
-- IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
-- IO_FIELD(R_USB_EPT_DATA, dev, devnum);
-- }
--
-- restore_flags(flags);
--
-- if (out_traffic) {
-- set_bit(epid, (void *)&epid_out_traffic);
-- } else {
-- clear_bit(epid, (void *)&epid_out_traffic);
-- }
--
-- dbg_epid("Setting up epid %d with devnum %d, endpoint %d and max_len %d (%s)",
-- epid, devnum, endpoint, maxlen, out_traffic ? "OUT" : "IN");
--
-- DBFEXIT;
-- return epid;
--}
--
--static void etrax_usb_free_epid(int epid)
--{
-- unsigned long flags;
--
-- DBFENTER;
--
-- if (!test_bit(epid, (void *)&epid_usage_bitmask)) {
-- warn("Trying to free unused epid %d", epid);
-- DBFEXIT;
-- return;
-- }
--
-- save_flags(flags);
-- cli();
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- while (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold));
-- /* This will, among other things, set the valid field to 0. */
-- *R_USB_EPT_DATA = 0;
-- restore_flags(flags);
--
-- clear_bit(epid, (void *)&epid_usage_bitmask);
--
--
-- dbg_epid("Freed epid %d", epid);
--
-- DBFEXIT;
--}
--
--static int etrax_usb_lookup_epid(struct urb *urb)
--{
-- int i;
-- __u32 data;
-- char devnum, endpoint, slow, out_traffic;
-- int maxlen;
-- unsigned long flags;
--
-- DBFENTER;
--
-- devnum = usb_pipedevice(urb->pipe);
-- endpoint = usb_pipeendpoint(urb->pipe);
-- slow = usb_pipeslow(urb->pipe);
-- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-- if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
-- /* We want both IN and OUT control traffic to be put on the same EP/SB list. */
-- out_traffic = 1;
-- } else {
-- out_traffic = usb_pipeout(urb->pipe);
-- }
--
-- /* Step through att epids. */
-- for (i = 0; i < NBR_OF_EPIDS; i++) {
-- if (test_bit(i, (void *)&epid_usage_bitmask) &&
-- test_bit(i, (void *)&epid_out_traffic) == out_traffic) {
--
-- save_flags(flags);
-- cli();
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, i);
-- nop();
--
-- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- data = *R_USB_EPT_DATA_ISO;
-- restore_flags(flags);
--
-- if ((IO_MASK(R_USB_EPT_DATA_ISO, valid) & data) &&
-- (IO_EXTRACT(R_USB_EPT_DATA_ISO, dev, data) == devnum) &&
-- (IO_EXTRACT(R_USB_EPT_DATA_ISO, ep, data) == endpoint) &&
-- (IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len, data) == maxlen)) {
-- dbg_epid("Found epid %d for devnum %d, endpoint %d (%s)",
-- i, devnum, endpoint, out_traffic ? "OUT" : "IN");
-- DBFEXIT;
-- return i;
-- }
-- } else {
-- data = *R_USB_EPT_DATA;
-- restore_flags(flags);
--
-- if ((IO_MASK(R_USB_EPT_DATA, valid) & data) &&
-- (IO_EXTRACT(R_USB_EPT_DATA, dev, data) == devnum) &&
-- (IO_EXTRACT(R_USB_EPT_DATA, ep, data) == endpoint) &&
-- (IO_EXTRACT(R_USB_EPT_DATA, low_speed, data) == slow) &&
-- (IO_EXTRACT(R_USB_EPT_DATA, max_len, data) == maxlen)) {
-- dbg_epid("Found epid %d for devnum %d, endpoint %d (%s)",
-- i, devnum, endpoint, out_traffic ? "OUT" : "IN");
-- DBFEXIT;
-- return i;
-- }
-- }
-- }
-- }
--
-- DBFEXIT;
-- return -1;
--}
--
--static int etrax_usb_allocate_epid(void)
--{
-- int i;
--
-- DBFENTER;
--
-- for (i = 0; i < NBR_OF_EPIDS; i++) {
-- if (!test_bit(i, (void *)&epid_usage_bitmask)) {
-- dbg_epid("Found free epid %d", i);
-- DBFEXIT;
-- return i;
-- }
-- }
--
-- dbg_epid("Found no free epids");
-- DBFEXIT;
-- return -1;
--}
--
--static int etrax_usb_submit_urb(struct urb *urb, unsigned mem_flags)
--{
-- etrax_hc_t *hc;
-- int ret = -EINVAL;
--
-- DBFENTER;
--
-- if (!urb->dev || !urb->dev->bus) {
-- return -ENODEV;
-- }
-- if (usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)) <= 0) {
-- info("Submit urb to pipe with maxpacketlen 0, pipe 0x%X\n", urb->pipe);
-- return -EMSGSIZE;
-- }
--
-- if (urb->timeout) {
-- /* FIXME. */
-- warn("urb->timeout specified, ignoring.");
-- }
--
-- hc = (etrax_hc_t*)urb->dev->bus->hcpriv;
--
-- if (usb_pipedevice(urb->pipe) == hc->rh.devnum) {
-- /* This request is for the Virtual Root Hub. */
-- ret = etrax_rh_submit_urb(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_BULK) {
--
-- ret = etrax_usb_submit_bulk_urb(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
--
-- ret = etrax_usb_submit_ctrl_urb(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
-- int bustime;
--
-- if (urb->bandwidth == 0) {
-- bustime = usb_check_bandwidth(urb->dev, urb);
-- if (bustime < 0) {
-- ret = bustime;
-- } else {
-- ret = etrax_usb_submit_intr_urb(urb);
-- if (ret == 0)
-- usb_claim_bandwidth(urb->dev, urb, bustime, 0);
-- }
-- } else {
-- /* Bandwidth already set. */
-- ret = etrax_usb_submit_intr_urb(urb);
-- }
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- int bustime;
--
-- if (urb->bandwidth == 0) {
-- bustime = usb_check_bandwidth(urb->dev, urb);
-- if (bustime < 0) {
-- ret = bustime;
-- } else {
-- ret = etrax_usb_submit_isoc_urb(urb);
-- if (ret == 0)
-- usb_claim_bandwidth(urb->dev, urb, bustime, 0);
-- }
-- } else {
-- /* Bandwidth already set. */
-- ret = etrax_usb_submit_isoc_urb(urb);
-- }
-- }
--
-- DBFEXIT;
--
-- if (ret != 0)
-- printk("Submit URB error %d\n", ret);
--
-- return ret;
--}
--
--static int etrax_usb_unlink_urb(struct urb *urb, int status)
--{
-- etrax_hc_t *hc;
-- etrax_urb_priv_t *urb_priv;
-- int epid;
-- unsigned int flags;
--
-- DBFENTER;
--
-- if (!urb) {
-- return -EINVAL;
-- }
--
-- /* Disable interrupts here since a descriptor interrupt for the isoc epid
-- will modify the sb list. This could possibly be done more granular, but
-- unlink_urb should not be used frequently anyway.
-- */
--
-- save_flags(flags);
-- cli();
--
-- if (!urb->dev || !urb->dev->bus) {
-- restore_flags(flags);
-- return -ENODEV;
-- }
-- if (!urb->hcpriv) {
-- /* This happens if a device driver calls unlink on an urb that
-- was never submitted (lazy driver) or if the urb was completed
-- while unlink was being called. */
-- restore_flags(flags);
-- return 0;
-- }
-- if (urb->transfer_flags & URB_ASYNC_UNLINK) {
-- /* FIXME. */
-- /* If URB_ASYNC_UNLINK is set:
-- unlink
-- move to a separate urb list
-- call complete at next sof with ECONNRESET
--
-- If not:
-- wait 1 ms
-- unlink
-- call complete with ENOENT
-- */
-- warn("URB_ASYNC_UNLINK set, ignoring.");
-- }
--
-- /* One might think that urb->status = -EINPROGRESS would be a requirement for unlinking,
-- but that doesn't work for interrupt and isochronous traffic since they are completed
-- repeatedly, and urb->status is set then. That may in itself be a bug though. */
--
-- hc = urb->dev->bus->hcpriv;
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- epid = urb_priv->epid;
--
-- /* Set the urb status (synchronous unlink). */
-- urb->status = -ENOENT;
-- urb_priv->urb_state = UNLINK;
--
-- if (usb_pipedevice(urb->pipe) == hc->rh.devnum) {
-- int ret;
-- ret = etrax_rh_unlink_urb(urb);
-- DBFEXIT;
-- restore_flags(flags);
-- return ret;
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_BULK) {
--
-- dbg_bulk("Unlink of bulk urb (0x%lx)", (unsigned long)urb);
--
-- if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-- /* The EP was enabled, disable it and wait. */
-- TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
--
-- /* Ah, the luxury of busy-wait. */
-- while (*R_DMA_CH8_SUB0_EP == virt_to_phys(&TxBulkEPList[epid]));
-- }
-- /* Kicking dummy list out of the party. */
-- TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
--
-- dbg_ctrl("Unlink of ctrl urb (0x%lx)", (unsigned long)urb);
--
-- if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-- /* The EP was enabled, disable it and wait. */
-- TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
--
-- /* Ah, the luxury of busy-wait. */
-- while (*R_DMA_CH8_SUB1_EP == virt_to_phys(&TxCtrlEPList[epid]));
-- }
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
--
-- dbg_intr("Unlink of intr urb (0x%lx)", (unsigned long)urb);
--
-- /* Separate function because it's a tad more complicated. */
-- etrax_usb_unlink_intr_urb(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
--
-- dbg_isoc("Unlink of isoc urb (0x%lx)", (unsigned long)urb);
--
-- if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-- /* The EP was enabled, disable it and wait. */
-- TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
--
-- /* Ah, the luxury of busy-wait. */
-- while (*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid]));
-- }
-- }
--
-- /* Note that we need to remove the urb from the urb list *before* removing its SB
-- descriptors. (This means that the isoc eof handler might get a null urb when we
-- are unlinking the last urb.) */
--
-- if (usb_pipetype(urb->pipe) == PIPE_BULK) {
--
-- urb_list_del(urb, epid);
-- TxBulkEPList[epid].sub = 0;
-- etrax_remove_from_sb_list(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
--
-- urb_list_del(urb, epid);
-- TxCtrlEPList[epid].sub = 0;
-- etrax_remove_from_sb_list(urb);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
--
-- urb_list_del(urb, epid);
-- /* Sanity check (should never happen). */
-- assert(urb_list_empty(epid));
--
-- /* Release allocated bandwidth. */
-- usb_release_bandwidth(urb->dev, urb, 0);
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
--
-- if (usb_pipeout(urb->pipe)) {
--
-- USB_SB_Desc_t *iter_sb, *prev_sb, *next_sb;
--
-- if (__urb_list_entry(urb, epid)) {
--
-- urb_list_del(urb, epid);
-- iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
-- prev_sb = 0;
-- while (iter_sb && (iter_sb != urb_priv->first_sb)) {
-- prev_sb = iter_sb;
-- iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-- }
--
-- if (iter_sb == 0) {
-- /* Unlink of the URB currently being transmitted. */
-- prev_sb = 0;
-- iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
-- }
--
-- while (iter_sb && (iter_sb != urb_priv->last_sb)) {
-- iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-- }
-- if (iter_sb) {
-- next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-- } else {
-- /* This should only happen if the DMA has completed
-- processing the SB list for this EP while interrupts
-- are disabled. */
-- dbg_isoc("Isoc urb not found, already sent?");
-- next_sb = 0;
-- }
-- if (prev_sb) {
-- prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
-- } else {
-- TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
-- }
--
-- etrax_remove_from_sb_list(urb);
-- if (urb_list_empty(epid)) {
-- TxIsocEPList[epid].sub = 0;
-- dbg_isoc("Last isoc out urb epid %d", epid);
-- } else if (next_sb || prev_sb) {
-- dbg_isoc("Re-enable isoc out epid %d", epid);
--
-- TxIsocEPList[epid].hw_len = 0;
-- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-- } else {
-- TxIsocEPList[epid].sub = 0;
-- dbg_isoc("URB list non-empty and no SB list, EP disabled");
-- }
-- } else {
-- dbg_isoc("Urb 0x%p not found, completed already?", urb);
-- }
-- } else {
--
-- urb_list_del(urb, epid);
--
-- /* For in traffic there is only one SB descriptor for each EP even
-- though there may be several urbs (all urbs point at the same SB). */
-- if (urb_list_empty(epid)) {
-- /* No more urbs, remove the SB. */
-- TxIsocEPList[epid].sub = 0;
-- etrax_remove_from_sb_list(urb);
-- } else {
-- TxIsocEPList[epid].hw_len = 0;
-- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-- }
-- }
-- /* Release allocated bandwidth. */
-- usb_release_bandwidth(urb->dev, urb, 1);
-- }
-- /* Free the epid if urb list is empty. */
-- if (urb_list_empty(epid)) {
-- etrax_usb_free_epid(epid);
-- }
-- restore_flags(flags);
--
-- /* Must be done before calling completion handler. */
-- kfree(urb_priv);
-- urb->hcpriv = 0;
--
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
--
-- DBFEXIT;
-- return 0;
--}
--
--static int etrax_usb_get_frame_number(struct usb_device *usb_dev)
--{
-- DBFENTER;
-- DBFEXIT;
-- return (*R_USB_FM_NUMBER & 0x7ff);
--}
--
--static irqreturn_t etrax_usb_tx_interrupt(int irq, void *vhc)
--{
-- DBFENTER;
--
-- /* This interrupt handler could be used when unlinking EP descriptors. */
--
-- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
-- USB_EP_Desc_t *ep;
--
-- //dbg_bulk("dma8_sub0_descr (BULK) intr.");
--
-- /* It should be safe clearing the interrupt here, since we don't expect to get a new
-- one until we restart the bulk channel. */
-- *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
--
-- /* Wait while the DMA is running (though we don't expect it to be). */
-- while (*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd));
--
-- /* Advance the DMA to the next EP descriptor. */
-- ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
--
-- //dbg_bulk("descr intr: DMA is at 0x%lx", (unsigned long)ep);
--
-- /* ep->next is already a physical address; no need for a virt_to_phys. */
-- *R_DMA_CH8_SUB0_EP = ep->next;
--
-- /* Start the DMA bulk channel again. */
-- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
-- }
-- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
-- struct urb *urb;
-- int epid;
-- etrax_urb_priv_t *urb_priv;
-- unsigned long int flags;
--
-- dbg_ctrl("dma8_sub1_descr (CTRL) intr.");
-- *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
--
-- /* The complete callback gets called so we cli. */
-- save_flags(flags);
-- cli();
--
-- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-- if ((TxCtrlEPList[epid].sub == 0) ||
-- (epid == DUMMY_EPID) ||
-- (epid == INVALID_EPID)) {
-- /* Nothing here to see. */
-- continue;
-- }
--
-- /* Get the first urb (if any). */
-- urb = urb_list_first(epid);
--
-- if (urb) {
--
-- /* Sanity check. */
-- assert(usb_pipetype(urb->pipe) == PIPE_CONTROL);
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- if (urb_priv->urb_state == WAITING_FOR_DESCR_INTR) {
-- assert(!(TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
--
-- etrax_usb_complete_urb(urb, 0);
-- }
-- }
-- }
-- restore_flags(flags);
-- }
-- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
-- dbg_intr("dma8_sub2_descr (INTR) intr.");
-- *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
-- }
-- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
-- struct urb *urb;
-- int epid;
-- int epid_done;
-- etrax_urb_priv_t *urb_priv;
-- USB_SB_Desc_t *sb_desc;
--
-- usb_isoc_complete_data_t *comp_data = NULL;
--
-- /* One or more isoc out transfers are done. */
-- dbg_isoc("dma8_sub3_descr (ISOC) intr.");
--
-- /* For each isoc out EP search for the first sb_desc with the intr flag
-- set. This descriptor must be the last packet from an URB. Then
-- traverse the URB list for the EP until the URB with urb_priv->last_sb
-- matching the intr-marked sb_desc is found. All URBs before this have
-- been sent.
-- */
--
-- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-- /* Skip past epids with no SB lists, epids used for in traffic,
-- and special (dummy, invalid) epids. */
-- if ((TxIsocEPList[epid].sub == 0) ||
-- (test_bit(epid, (void *)&epid_out_traffic) == 0) ||
-- (epid == DUMMY_EPID) ||
-- (epid == INVALID_EPID)) {
-- /* Nothing here to see. */
-- continue;
-- }
-- sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
--
-- /* Find the last descriptor of the currently active URB for this ep.
-- This is the first descriptor in the sub list marked for a descriptor
-- interrupt. */
-- while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
-- sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
-- }
-- assert(sb_desc);
--
-- dbg_isoc("Check epid %d, sub 0x%p, SB 0x%p",
-- epid,
-- phys_to_virt(TxIsocEPList[epid].sub),
-- sb_desc);
--
-- epid_done = 0;
--
-- /* Get the first urb (if any). */
-- urb = urb_list_first(epid);
-- assert(urb);
--
-- while (urb && !epid_done) {
--
-- /* Sanity check. */
-- assert(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
--
-- if (!usb_pipeout(urb->pipe)) {
-- /* descr interrupts are generated only for out pipes. */
-- epid_done = 1;
-- continue;
-- }
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- if (sb_desc != urb_priv->last_sb) {
--
-- /* This urb has been sent. */
-- dbg_isoc("out URB 0x%p sent", urb);
--
-- urb_priv->urb_state = TRANSFER_DONE;
--
-- } else if ((sb_desc == urb_priv->last_sb) &&
-- !(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
--
-- assert((sb_desc->command & IO_MASK(USB_SB_command, eol)) == IO_STATE(USB_SB_command, eol, yes));
-- assert(sb_desc->next == 0);
--
-- dbg_isoc("out URB 0x%p last in list, epid disabled", urb);
-- TxIsocEPList[epid].sub = 0;
-- TxIsocEPList[epid].hw_len = 0;
-- urb_priv->urb_state = TRANSFER_DONE;
--
-- epid_done = 1;
--
-- } else {
-- epid_done = 1;
-- }
-- if (!epid_done) {
-- urb = urb_list_next(urb, epid);
-- }
-- }
--
-- }
--
-- *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
--
-- comp_data = (usb_isoc_complete_data_t*)kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
-- assert(comp_data != NULL);
--
-- INIT_WORK(&comp_data->usb_bh, etrax_usb_isoc_descr_interrupt_bottom_half, comp_data);
-- schedule_work(&comp_data->usb_bh);
-- }
--
-- DBFEXIT;
-- return IRQ_HANDLED;
--}
--
--static void etrax_usb_isoc_descr_interrupt_bottom_half(void *data)
--{
-- usb_isoc_complete_data_t *comp_data = (usb_isoc_complete_data_t*)data;
--
-- struct urb *urb;
-- int epid;
-- int epid_done;
-- etrax_urb_priv_t *urb_priv;
--
-- DBFENTER;
--
-- dbg_isoc("dma8_sub3_descr (ISOC) bottom half.");
--
-- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-- unsigned long flags;
--
-- save_flags(flags);
-- cli();
--
-- epid_done = 0;
--
-- /* The descriptor interrupt handler has marked all transmitted isoch. out
-- URBs with TRANSFER_DONE. Now we traverse all epids and for all that
-- have isoch. out traffic traverse its URB list and complete the
-- transmitted URB.
-- */
--
-- while (!epid_done) {
--
-- /* Get the first urb (if any). */
-- urb = urb_list_first(epid);
-- if (urb == 0) {
-- epid_done = 1;
-- continue;
-- }
--
-- if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) {
-- epid_done = 1;
-- continue;
-- }
--
-- if (!usb_pipeout(urb->pipe)) {
-- /* descr interrupts are generated only for out pipes. */
-- epid_done = 1;
-- continue;
-- }
--
-- dbg_isoc("Check epid %d, SB 0x%p", epid, (char*)TxIsocEPList[epid].sub);
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- if (urb_priv->urb_state == TRANSFER_DONE) {
-- int i;
-- struct usb_iso_packet_descriptor *packet;
--
-- /* This urb has been sent. */
-- dbg_isoc("Completing isoc out URB 0x%p", urb);
--
-- for (i = 0; i < urb->number_of_packets; i++) {
-- packet = &urb->iso_frame_desc[i];
-- packet->status = 0;
-- packet->actual_length = packet->length;
-- }
--
-- etrax_usb_complete_isoc_urb(urb, 0);
--
-- if (urb_list_empty(epid)) {
-- etrax_usb_free_epid(epid);
-- epid_done = 1;
-- }
-- } else {
-- epid_done = 1;
-- }
-- }
-- restore_flags(flags);
--
-- }
-- kmem_cache_free(isoc_compl_cache, comp_data);
--
-- DBFEXIT;
--}
--
--
--
--static irqreturn_t etrax_usb_rx_interrupt(int irq, void *vhc)
--{
-- struct urb *urb;
-- etrax_urb_priv_t *urb_priv;
-- int epid = 0;
-- unsigned long flags;
--
-- /* Isoc diagnostics. */
-- static int curr_fm = 0;
-- static int prev_fm = 0;
--
-- DBFENTER;
--
-- /* Clear this interrupt. */
-- *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
--
-- /* Note that this while loop assumes that all packets span only
-- one rx descriptor. */
--
-- /* The reason we cli here is that we call the driver's callback functions. */
-- save_flags(flags);
-- cli();
--
-- while (myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
--
-- epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
-- urb = urb_list_first(epid);
--
-- //printk("eop for epid %d, first urb 0x%lx\n", epid, (unsigned long)urb);
--
-- if (!urb) {
-- err("No urb for epid %d in rx interrupt", epid);
-- __dump_ept_data(epid);
-- goto skip_out;
-- }
--
-- /* Note that we cannot indescriminately assert(usb_pipein(urb->pipe)) since
-- ctrl pipes are not. */
--
-- if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
-- __u32 r_usb_ept_data;
-- int no_error = 0;
--
-- assert(test_bit(epid, (void *)&epid_usage_bitmask));
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- r_usb_ept_data = *R_USB_EPT_DATA_ISO;
--
-- if ((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
-- (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
-- (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
-- /* Not an error, just a failure to receive an expected iso
-- in packet in this frame. This is not documented
-- in the designers reference.
-- */
-- no_error++;
-- } else {
-- warn("R_USB_EPT_DATA_ISO for epid %d = 0x%x", epid, r_usb_ept_data);
-- }
-- } else {
-- r_usb_ept_data = *R_USB_EPT_DATA;
-- warn("R_USB_EPT_DATA for epid %d = 0x%x", epid, r_usb_ept_data);
-- }
--
-- if (!no_error){
-- warn("error in rx desc->status, epid %d, first urb = 0x%lx",
-- epid, (unsigned long)urb);
-- __dump_in_desc(myNextRxDesc);
--
-- warn("R_USB_STATUS = 0x%x", *R_USB_STATUS);
--
-- /* Check that ept was disabled when error occurred. */
-- switch (usb_pipetype(urb->pipe)) {
-- case PIPE_BULK:
-- assert(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-- break;
-- case PIPE_CONTROL:
-- assert(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-- break;
-- case PIPE_INTERRUPT:
-- assert(!(TxIntrEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-- break;
-- case PIPE_ISOCHRONOUS:
-- assert(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-- break;
-- default:
-- warn("etrax_usb_rx_interrupt: bad pipetype %d in urb 0x%p",
-- usb_pipetype(urb->pipe),
-- urb);
-- }
-- etrax_usb_complete_urb(urb, -EPROTO);
-- goto skip_out;
-- }
-- }
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
-- (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
-- (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
--
-- if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-- /* We get nodata for empty data transactions, and the rx descriptor's
-- hw_len field is not valid in that case. No data to copy in other
-- words. */
-- } else {
-- /* Make sure the data fits in the buffer. */
-- assert(urb_priv->rx_offset + myNextRxDesc->hw_len
-- <= urb->transfer_buffer_length);
--
-- memcpy(urb->transfer_buffer + urb_priv->rx_offset,
-- phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
-- urb_priv->rx_offset += myNextRxDesc->hw_len;
-- }
--
-- if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
-- if ((usb_pipetype(urb->pipe) == PIPE_CONTROL) &&
-- ((TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)) ==
-- IO_STATE(USB_EP_command, enable, yes))) {
-- /* The EP is still enabled, so the OUT packet used to ack
-- the in data is probably not processed yet. If the EP
-- sub pointer has not moved beyond urb_priv->last_sb mark
-- it for a descriptor interrupt and complete the urb in
-- the descriptor interrupt handler.
-- */
-- USB_SB_Desc_t *sub = TxCtrlEPList[urb_priv->epid].sub ? phys_to_virt(TxCtrlEPList[urb_priv->epid].sub) : 0;
--
-- while ((sub != NULL) && (sub != urb_priv->last_sb)) {
-- sub = sub->next ? phys_to_virt(sub->next) : 0;
-- }
-- if (sub != NULL) {
-- /* The urb has not been fully processed. */
-- urb_priv->urb_state = WAITING_FOR_DESCR_INTR;
-- } else {
-- warn("(CTRL) epid enabled and urb (0x%p) processed, ep->sub=0x%p", urb, (char*)TxCtrlEPList[urb_priv->epid].sub);
-- etrax_usb_complete_urb(urb, 0);
-- }
-- } else {
-- etrax_usb_complete_urb(urb, 0);
-- }
-- }
--
-- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
--
-- struct usb_iso_packet_descriptor *packet;
--
-- if (urb_priv->urb_state == UNLINK) {
-- info("Ignoring rx data for urb being unlinked.");
-- goto skip_out;
-- } else if (urb_priv->urb_state == NOT_STARTED) {
-- info("What? Got rx data for urb that isn't started?");
-- goto skip_out;
-- }
--
-- packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
-- packet->status = 0;
--
-- if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-- /* We get nodata for empty data transactions, and the rx descriptor's
-- hw_len field is not valid in that case. We copy 0 bytes however to
-- stay in synch. */
-- packet->actual_length = 0;
-- } else {
-- packet->actual_length = myNextRxDesc->hw_len;
-- /* Make sure the data fits in the buffer. */
-- assert(packet->actual_length <= packet->length);
-- memcpy(urb->transfer_buffer + packet->offset,
-- phys_to_virt(myNextRxDesc->buf), packet->actual_length);
-- }
--
-- /* Increment the packet counter. */
-- urb_priv->isoc_packet_counter++;
--
-- /* Note that we don't care about the eot field in the rx descriptor's status.
-- It will always be set for isoc traffic. */
-- if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
--
-- /* Out-of-synch diagnostics. */
-- curr_fm = (*R_USB_FM_NUMBER & 0x7ff);
-- if (((prev_fm + urb_priv->isoc_packet_counter) % (0x7ff + 1)) != curr_fm) {
-- /* This test is wrong, if there is more than one isoc
-- in endpoint active it will always calculate wrong
-- since prev_fm is shared by all endpoints.
--
-- FIXME Make this check per URB using urb->start_frame.
-- */
-- dbg_isoc("Out of synch? Previous frame = %d, current frame = %d",
-- prev_fm, curr_fm);
--
-- }
-- prev_fm = curr_fm;
--
-- /* Complete the urb with status OK. */
-- etrax_usb_complete_isoc_urb(urb, 0);
-- }
-- }
--
-- skip_out:
--
-- /* DMA IN cache bug. Flush the DMA IN buffer from the cache. (struct etrax_dma_descr
-- has the same layout as USB_IN_Desc for the relevant fields.) */
-- prepare_rx_descriptor((struct etrax_dma_descr*)myNextRxDesc);
--
-- myPrevRxDesc = myNextRxDesc;
-- myPrevRxDesc->command |= IO_MASK(USB_IN_command, eol);
-- myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
-- myLastRxDesc = myPrevRxDesc;
--
-- myNextRxDesc->status = 0;
-- myNextRxDesc = phys_to_virt(myNextRxDesc->next);
-- }
--
-- restore_flags(flags);
--
-- DBFEXIT;
--
-- return IRQ_HANDLED;
--}
--
--
--/* This function will unlink the SB descriptors associated with this urb. */
--static int etrax_remove_from_sb_list(struct urb *urb)
--{
-- USB_SB_Desc_t *next_sb, *first_sb, *last_sb;
-- etrax_urb_priv_t *urb_priv;
-- int i = 0;
--
-- DBFENTER;
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- /* Just a sanity check. Since we don't fiddle with the DMA list the EP descriptor
-- doesn't really need to be disabled, it's just that we expect it to be. */
-- if (usb_pipetype(urb->pipe) == PIPE_BULK) {
-- assert(!(TxBulkEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
-- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
-- assert(!(TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
-- }
--
-- first_sb = urb_priv->first_sb;
-- last_sb = urb_priv->last_sb;
--
-- assert(first_sb);
-- assert(last_sb);
--
-- while (first_sb != last_sb) {
-- next_sb = (USB_SB_Desc_t *)phys_to_virt(first_sb->next);
-- kmem_cache_free(usb_desc_cache, first_sb);
-- first_sb = next_sb;
-- i++;
-- }
-- kmem_cache_free(usb_desc_cache, last_sb);
-- i++;
-- dbg_sb("%d SB descriptors freed", i);
-- /* Compare i with urb->number_of_packets for Isoc traffic.
-- Should be same when calling unlink_urb */
--
-- DBFEXIT;
--
-- return i;
--}
--
--static int etrax_usb_submit_bulk_urb(struct urb *urb)
--{
-- int epid;
-- int empty;
-- unsigned long flags;
-- etrax_urb_priv_t *urb_priv;
--
-- DBFENTER;
--
-- /* Epid allocation, empty check and list add must be protected.
-- Read about this in etrax_usb_submit_ctrl_urb. */
--
-- spin_lock_irqsave(&urb_list_lock, flags);
-- epid = etrax_usb_setup_epid(urb);
-- if (epid == -1) {
-- DBFEXIT;
-- spin_unlock_irqrestore(&urb_list_lock, flags);
-- return -ENOMEM;
-- }
-- empty = urb_list_empty(epid);
-- urb_list_add(urb, epid);
-- spin_unlock_irqrestore(&urb_list_lock, flags);
--
-- dbg_bulk("Adding bulk %s urb 0x%lx to %s list, epid %d",
-- usb_pipein(urb->pipe) ? "IN" : "OUT", (unsigned long)urb, empty ? "empty" : "", epid);
--
-- /* Mark the urb as being in progress. */
-- urb->status = -EINPROGRESS;
--
-- /* Setup the hcpriv data. */
-- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
-- assert(urb_priv != NULL);
-- /* This sets rx_offset to 0. */
-- urb_priv->urb_state = NOT_STARTED;
-- urb->hcpriv = urb_priv;
--
-- if (empty) {
-- etrax_usb_add_to_bulk_sb_list(urb, epid);
-- }
--
-- DBFEXIT;
--
-- return 0;
--}
--
--static void etrax_usb_add_to_bulk_sb_list(struct urb *urb, int epid)
--{
-- USB_SB_Desc_t *sb_desc;
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- unsigned long flags;
-- char maxlen;
--
-- DBFENTER;
--
-- dbg_bulk("etrax_usb_add_to_bulk_sb_list, urb 0x%lx", (unsigned long)urb);
--
-- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
--
-- sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(sb_desc != NULL);
-- memset(sb_desc, 0, sizeof(USB_SB_Desc_t));
--
--
-- if (usb_pipeout(urb->pipe)) {
--
-- dbg_bulk("Grabbing bulk OUT, urb 0x%lx, epid %d", (unsigned long)urb, epid);
--
-- /* This is probably a sanity check of the bulk transaction length
-- not being larger than 64 kB. */
-- if (urb->transfer_buffer_length > 0xffff) {
-- panic("urb->transfer_buffer_length > 0xffff");
-- }
--
-- sb_desc->sw_len = urb->transfer_buffer_length;
--
-- /* The rem field is don't care if it's not a full-length transfer, so setting
-- it shouldn't hurt. Also, rem isn't used for OUT traffic. */
-- sb_desc->command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, out) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- /* The full field is set to yes, even if we don't actually check that this is
-- a full-length transfer (i.e., that transfer_buffer_length % maxlen = 0).
-- Setting full prevents the USB controller from sending an empty packet in
-- that case. However, if URB_ZERO_PACKET was set we want that. */
-- if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
-- sb_desc->command |= IO_STATE(USB_SB_command, full, yes);
-- }
--
-- sb_desc->buf = virt_to_phys(urb->transfer_buffer);
-- sb_desc->next = 0;
--
-- } else if (usb_pipein(urb->pipe)) {
--
-- dbg_bulk("Grabbing bulk IN, urb 0x%lx, epid %d", (unsigned long)urb, epid);
--
-- sb_desc->sw_len = urb->transfer_buffer_length ?
-- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
--
-- /* The rem field is don't care if it's not a full-length transfer, so setting
-- it shouldn't hurt. */
-- sb_desc->command =
-- (IO_FIELD(USB_SB_command, rem,
-- urb->transfer_buffer_length % maxlen) |
-- IO_STATE(USB_SB_command, tt, in) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- sb_desc->buf = 0;
-- sb_desc->next = 0;
-- }
--
-- urb_priv->first_sb = sb_desc;
-- urb_priv->last_sb = sb_desc;
-- urb_priv->epid = epid;
--
-- urb->hcpriv = urb_priv;
--
-- /* Reset toggle bits and reset error count. */
-- save_flags(flags);
-- cli();
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
--
-- /* FIXME: Is this a special case since the hold field is checked,
-- or should we check hold in a lot of other cases as well? */
-- if (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) {
-- panic("Hold was set in %s", __FUNCTION__);
-- }
--
-- /* Reset error counters (regardless of which direction this traffic is). */
-- *R_USB_EPT_DATA &=
-- ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
-- IO_MASK(R_USB_EPT_DATA, error_count_out));
--
-- /* Software must preset the toggle bits. */
-- if (usb_pipeout(urb->pipe)) {
-- char toggle =
-- usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
-- *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
-- *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
-- } else {
-- char toggle =
-- usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
-- *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
-- *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
-- }
--
-- /* Assert that the EP descriptor is disabled. */
-- assert(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
--
-- /* The reason we set the EP's sub pointer directly instead of
-- walking the SB list and linking it last in the list is that we only
-- have one active urb at a time (the rest are queued). */
--
-- /* Note that we cannot have interrupts running when we have set the SB descriptor
-- but the EP is not yet enabled. If a bulk eot happens for another EP, we will
-- find this EP disabled and with a SB != 0, which will make us think that it's done. */
-- TxBulkEPList[epid].sub = virt_to_phys(sb_desc);
-- TxBulkEPList[epid].hw_len = 0;
-- /* Note that we don't have to fill in the ep_id field since this
-- was done when we allocated the EP descriptors in init_tx_bulk_ep. */
--
-- /* Check if the dummy list is already with us (if several urbs were queued). */
-- if (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0])) {
--
-- dbg_bulk("Inviting dummy list to the party for urb 0x%lx, epid %d",
-- (unsigned long)urb, epid);
--
-- /* The last EP in the dummy list already has its next pointer set to
-- TxBulkEPList[epid].next. */
--
-- /* We don't need to check if the DMA is at this EP or not before changing the
-- next pointer, since we will do it in one 32-bit write (EP descriptors are
-- 32-bit aligned). */
-- TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
-- }
-- /* Enable the EP descr. */
-- dbg_bulk("Enabling bulk EP for urb 0x%lx, epid %d", (unsigned long)urb, epid);
-- TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
--
-- /* Everything is set up, safe to enable interrupts again. */
-- restore_flags(flags);
--
-- /* If the DMA bulk channel isn't running, we need to restart it if it
-- has stopped at the last EP descriptor (DMA stopped because there was
-- no more traffic) or if it has stopped at a dummy EP with the intr flag
-- set (DMA stopped because we were too slow in inserting new traffic). */
-- if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
--
-- USB_EP_Desc_t *ep;
-- ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
-- dbg_bulk("DMA channel not running in add");
-- dbg_bulk("DMA is at 0x%lx", (unsigned long)ep);
--
-- if (*R_DMA_CH8_SUB0_EP == virt_to_phys(&TxBulkEPList[NBR_OF_EPIDS - 1]) ||
-- (ep->command & 0x8) >> 3) {
-- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
-- /* Update/restart the bulk start timer since we just started the channel. */
-- mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-- /* Update/restart the bulk eot timer since we just inserted traffic. */
-- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-- }
-- }
--
-- DBFEXIT;
--}
--
--static void etrax_usb_complete_bulk_urb(struct urb *urb, int status)
--{
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- int epid = urb_priv->epid;
-- unsigned long flags;
--
-- DBFENTER;
--
-- if (status)
-- warn("Completing bulk urb with status %d.", status);
--
-- dbg_bulk("Completing bulk urb 0x%lx for epid %d", (unsigned long)urb, epid);
--
-- /* Update the urb list. */
-- urb_list_del(urb, epid);
--
-- /* For an IN pipe, we always set the actual length, regardless of whether there was
-- an error or not (which means the device driver can use the data if it wants to). */
-- if (usb_pipein(urb->pipe)) {
-- urb->actual_length = urb_priv->rx_offset;
-- } else {
-- /* Set actual_length for OUT urbs also; the USB mass storage driver seems
-- to want that. We wouldn't know of any partial writes if there was an error. */
-- if (status == 0) {
-- urb->actual_length = urb->transfer_buffer_length;
-- } else {
-- urb->actual_length = 0;
-- }
-- }
--
-- /* FIXME: Is there something of the things below we shouldn't do if there was an error?
-- Like, maybe we shouldn't toggle the toggle bits, or maybe we shouldn't insert more traffic. */
--
-- save_flags(flags);
-- cli();
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
--
-- /* We need to fiddle with the toggle bits because the hardware doesn't do it for us. */
-- if (usb_pipeout(urb->pipe)) {
-- char toggle =
-- IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
-- usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-- usb_pipeout(urb->pipe), toggle);
-- } else {
-- char toggle =
-- IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
-- usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-- usb_pipeout(urb->pipe), toggle);
-- }
-- restore_flags(flags);
--
-- /* Remember to free the SBs. */
-- etrax_remove_from_sb_list(urb);
-- kfree(urb_priv);
-- urb->hcpriv = 0;
--
-- /* If there are any more urb's in the list we'd better start sending */
-- if (!urb_list_empty(epid)) {
--
-- struct urb *new_urb;
--
-- /* Get the first urb. */
-- new_urb = urb_list_first(epid);
-- assert(new_urb);
--
-- dbg_bulk("More bulk for epid %d", epid);
--
-- etrax_usb_add_to_bulk_sb_list(new_urb, epid);
-- }
--
-- urb->status = status;
--
-- /* We let any non-zero status from the layer above have precedence. */
-- if (status == 0) {
-- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
-- is to be treated as an error. */
-- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
-- if (usb_pipein(urb->pipe) &&
-- (urb->actual_length !=
-- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)))) {
-- urb->status = -EREMOTEIO;
-- }
-- }
-- }
--
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
--
-- if (urb_list_empty(epid)) {
-- /* This means that this EP is now free, deconfigure it. */
-- etrax_usb_free_epid(epid);
--
-- /* No more traffic; time to clean up.
-- Must set sub pointer to 0, since we look at the sub pointer when handling
-- the bulk eot interrupt. */
--
-- dbg_bulk("No bulk for epid %d", epid);
--
-- TxBulkEPList[epid].sub = 0;
--
-- /* Unlink the dummy list. */
--
-- dbg_bulk("Kicking dummy list out of party for urb 0x%lx, epid %d",
-- (unsigned long)urb, epid);
--
-- /* No need to wait for the DMA before changing the next pointer.
-- The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
-- the last one (INVALID_EPID) for actual traffic. */
-- TxBulkEPList[epid].next =
-- virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
-- }
--
-- DBFEXIT;
--}
--
--static int etrax_usb_submit_ctrl_urb(struct urb *urb)
--{
-- int epid;
-- int empty;
-- unsigned long flags;
-- etrax_urb_priv_t *urb_priv;
--
-- DBFENTER;
--
-- /* FIXME: Return -ENXIO if there is already a queued urb for this endpoint? */
--
-- /* Epid allocation, empty check and list add must be protected.
--
-- Epid allocation because if we find an existing epid for this endpoint an urb might be
-- completed (emptying the list) before we add the new urb to the list, causing the epid
-- to be de-allocated. We would then start the transfer with an invalid epid -> epid attn.
--
-- Empty check and add because otherwise we might conclude that the list is not empty,
-- after which it becomes empty before we add the new urb to the list, causing us not to
-- insert the new traffic into the SB list. */
--
-- spin_lock_irqsave(&urb_list_lock, flags);
-- epid = etrax_usb_setup_epid(urb);
-- if (epid == -1) {
-- spin_unlock_irqrestore(&urb_list_lock, flags);
-- DBFEXIT;
-- return -ENOMEM;
-- }
-- empty = urb_list_empty(epid);
-- urb_list_add(urb, epid);
-- spin_unlock_irqrestore(&urb_list_lock, flags);
--
-- dbg_ctrl("Adding ctrl urb 0x%lx to %s list, epid %d",
-- (unsigned long)urb, empty ? "empty" : "", epid);
--
-- /* Mark the urb as being in progress. */
-- urb->status = -EINPROGRESS;
--
-- /* Setup the hcpriv data. */
-- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
-- assert(urb_priv != NULL);
-- /* This sets rx_offset to 0. */
-- urb_priv->urb_state = NOT_STARTED;
-- urb->hcpriv = urb_priv;
--
-- if (empty) {
-- etrax_usb_add_to_ctrl_sb_list(urb, epid);
-- }
--
-- DBFEXIT;
--
-- return 0;
--}
--
--static void etrax_usb_add_to_ctrl_sb_list(struct urb *urb, int epid)
--{
-- USB_SB_Desc_t *sb_desc_setup;
-- USB_SB_Desc_t *sb_desc_data;
-- USB_SB_Desc_t *sb_desc_status;
--
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
--
-- unsigned long flags;
-- char maxlen;
--
-- DBFENTER;
--
-- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
--
-- sb_desc_setup = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(sb_desc_setup != NULL);
-- sb_desc_status = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(sb_desc_status != NULL);
--
-- /* Initialize the mandatory setup SB descriptor (used only in control transfers) */
-- sb_desc_setup->sw_len = 8;
-- sb_desc_setup->command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, setup) |
-- IO_STATE(USB_SB_command, full, yes) |
-- IO_STATE(USB_SB_command, eot, yes));
--
-- sb_desc_setup->buf = virt_to_phys(urb->setup_packet);
--
-- if (usb_pipeout(urb->pipe)) {
-- dbg_ctrl("Transfer for epid %d is OUT", epid);
--
-- /* If this Control OUT transfer has an optional data stage we add an OUT token
-- before the mandatory IN (status) token, hence the reordered SB list */
--
-- sb_desc_setup->next = virt_to_phys(sb_desc_status);
-- if (urb->transfer_buffer) {
--
-- dbg_ctrl("This OUT transfer has an extra data stage");
--
-- sb_desc_data = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(sb_desc_data != NULL);
--
-- sb_desc_setup->next = virt_to_phys(sb_desc_data);
--
-- sb_desc_data->sw_len = urb->transfer_buffer_length;
-- sb_desc_data->command = (IO_STATE(USB_SB_command, tt, out) |
-- IO_STATE(USB_SB_command, full, yes) |
-- IO_STATE(USB_SB_command, eot, yes));
-- sb_desc_data->buf = virt_to_phys(urb->transfer_buffer);
-- sb_desc_data->next = virt_to_phys(sb_desc_status);
-- }
--
-- sb_desc_status->sw_len = 1;
-- sb_desc_status->command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, in) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, intr, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- sb_desc_status->buf = 0;
-- sb_desc_status->next = 0;
--
-- } else if (usb_pipein(urb->pipe)) {
--
-- dbg_ctrl("Transfer for epid %d is IN", epid);
-- dbg_ctrl("transfer_buffer_length = %d", urb->transfer_buffer_length);
-- dbg_ctrl("rem is calculated to %d", urb->transfer_buffer_length % maxlen);
--
-- sb_desc_data = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(sb_desc_data != NULL);
--
-- sb_desc_setup->next = virt_to_phys(sb_desc_data);
--
-- sb_desc_data->sw_len = urb->transfer_buffer_length ?
-- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
-- dbg_ctrl("sw_len got %d", sb_desc_data->sw_len);
--
-- sb_desc_data->command =
-- (IO_FIELD(USB_SB_command, rem,
-- urb->transfer_buffer_length % maxlen) |
-- IO_STATE(USB_SB_command, tt, in) |
-- IO_STATE(USB_SB_command, eot, yes));
--
-- sb_desc_data->buf = 0;
-- sb_desc_data->next = virt_to_phys(sb_desc_status);
--
-- /* Read comment at zout_buffer declaration for an explanation to this. */
-- sb_desc_status->sw_len = 1;
-- sb_desc_status->command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, zout) |
-- IO_STATE(USB_SB_command, full, yes) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, intr, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- sb_desc_status->buf = virt_to_phys(&zout_buffer[0]);
-- sb_desc_status->next = 0;
-- }
--
-- urb_priv->first_sb = sb_desc_setup;
-- urb_priv->last_sb = sb_desc_status;
-- urb_priv->epid = epid;
--
-- urb_priv->urb_state = STARTED;
--
-- /* Reset toggle bits and reset error count, remember to di and ei */
-- /* Warning: it is possible that this locking doesn't work with bottom-halves */
--
-- save_flags(flags);
-- cli();
--
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- if (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) {
-- panic("Hold was set in %s", __FUNCTION__);
-- }
--
--
-- /* FIXME: Compare with etrax_usb_add_to_bulk_sb_list where the toggle bits
-- are set to a specific value. Why the difference? Read "Transfer and Toggle Bits
-- in Designer's Reference, p. 8 - 11. */
-- *R_USB_EPT_DATA &=
-- ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
-- IO_MASK(R_USB_EPT_DATA, error_count_out) |
-- IO_MASK(R_USB_EPT_DATA, t_in) |
-- IO_MASK(R_USB_EPT_DATA, t_out));
--
-- /* Since we use the rx interrupt to complete ctrl urbs, we can enable interrupts now
-- (i.e. we don't check the sub pointer on an eot interrupt like we do for bulk traffic). */
-- restore_flags(flags);
--
-- /* Assert that the EP descriptor is disabled. */
-- assert(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
--
-- /* Set up and enable the EP descriptor. */
-- TxCtrlEPList[epid].sub = virt_to_phys(sb_desc_setup);
-- TxCtrlEPList[epid].hw_len = 0;
-- TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
--
-- /* We start the DMA sub channel without checking if it's running or not, because:
-- 1) If it's already running, issuing the start command is a nop.
-- 2) We avoid a test-and-set race condition. */
-- *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
--
-- DBFEXIT;
--}
--
--static void etrax_usb_complete_ctrl_urb(struct urb *urb, int status)
--{
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- int epid = urb_priv->epid;
--
-- DBFENTER;
--
-- if (status)
-- warn("Completing ctrl urb with status %d.", status);
--
-- dbg_ctrl("Completing ctrl epid %d, urb 0x%lx", epid, (unsigned long)urb);
--
-- /* Remove this urb from the list. */
-- urb_list_del(urb, epid);
--
-- /* For an IN pipe, we always set the actual length, regardless of whether there was
-- an error or not (which means the device driver can use the data if it wants to). */
-- if (usb_pipein(urb->pipe)) {
-- urb->actual_length = urb_priv->rx_offset;
-- }
--
-- /* FIXME: Is there something of the things below we shouldn't do if there was an error?
-- Like, maybe we shouldn't insert more traffic. */
--
-- /* Remember to free the SBs. */
-- etrax_remove_from_sb_list(urb);
-- kfree(urb_priv);
-- urb->hcpriv = 0;
--
-- /* If there are any more urbs in the list we'd better start sending. */
-- if (!urb_list_empty(epid)) {
-- struct urb *new_urb;
--
-- /* Get the first urb. */
-- new_urb = urb_list_first(epid);
-- assert(new_urb);
--
-- dbg_ctrl("More ctrl for epid %d, first urb = 0x%lx", epid, (unsigned long)new_urb);
--
-- etrax_usb_add_to_ctrl_sb_list(new_urb, epid);
-- }
--
-- urb->status = status;
--
-- /* We let any non-zero status from the layer above have precedence. */
-- if (status == 0) {
-- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
-- is to be treated as an error. */
-- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
-- if (usb_pipein(urb->pipe) &&
-- (urb->actual_length !=
-- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)))) {
-- urb->status = -EREMOTEIO;
-- }
-- }
-- }
--
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
--
-- if (urb_list_empty(epid)) {
-- /* No more traffic. Time to clean up. */
-- etrax_usb_free_epid(epid);
-- /* Must set sub pointer to 0. */
-- dbg_ctrl("No ctrl for epid %d", epid);
-- TxCtrlEPList[epid].sub = 0;
-- }
--
-- DBFEXIT;
--}
--
--static int etrax_usb_submit_intr_urb(struct urb *urb)
--{
--
-- int epid;
--
-- DBFENTER;
--
-- if (usb_pipeout(urb->pipe)) {
-- /* Unsupported transfer type.
-- We don't support interrupt out traffic. (If we do, we can't support
-- intervals for neither in or out traffic, but are forced to schedule all
-- interrupt traffic in one frame.) */
-- return -EINVAL;
-- }
--
-- epid = etrax_usb_setup_epid(urb);
-- if (epid == -1) {
-- DBFEXIT;
-- return -ENOMEM;
-- }
--
-- if (!urb_list_empty(epid)) {
-- /* There is already a queued urb for this endpoint. */
-- etrax_usb_free_epid(epid);
-- return -ENXIO;
-- }
--
-- urb->status = -EINPROGRESS;
--
-- dbg_intr("Add intr urb 0x%lx, to list, epid %d", (unsigned long)urb, epid);
--
-- urb_list_add(urb, epid);
-- etrax_usb_add_to_intr_sb_list(urb, epid);
--
-- return 0;
--
-- DBFEXIT;
--}
--
--static void etrax_usb_add_to_intr_sb_list(struct urb *urb, int epid)
--{
--
-- volatile USB_EP_Desc_t *tmp_ep;
-- volatile USB_EP_Desc_t *first_ep;
--
-- char maxlen;
-- int interval;
-- int i;
--
-- etrax_urb_priv_t *urb_priv;
--
-- DBFENTER;
--
-- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-- interval = urb->interval;
--
-- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
-- assert(urb_priv != NULL);
-- urb->hcpriv = urb_priv;
--
-- first_ep = &TxIntrEPList[0];
--
-- /* Round of the interval to 2^n, it is obvious that this code favours
-- smaller numbers, but that is actually a good thing */
-- /* FIXME: The "rounding error" for larger intervals will be quite
-- large. For in traffic this shouldn't be a problem since it will only
-- mean that we "poll" more often. */
-- for (i = 0; interval; i++) {
-- interval = interval >> 1;
-- }
-- interval = 1 << (i - 1);
--
-- dbg_intr("Interval rounded to %d", interval);
--
-- tmp_ep = first_ep;
-- i = 0;
-- do {
-- if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
-- if ((i % interval) == 0) {
-- /* Insert the traffic ep after tmp_ep */
-- USB_EP_Desc_t *ep_desc;
-- USB_SB_Desc_t *sb_desc;
--
-- dbg_intr("Inserting EP for epid %d", epid);
--
-- ep_desc = (USB_EP_Desc_t *)
-- kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- sb_desc = (USB_SB_Desc_t *)
-- kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
-- assert(ep_desc != NULL);
-- CHECK_ALIGN(ep_desc);
-- assert(sb_desc != NULL);
--
-- ep_desc->sub = virt_to_phys(sb_desc);
-- ep_desc->hw_len = 0;
-- ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
-- IO_STATE(USB_EP_command, enable, yes));
--
--
-- /* Round upwards the number of packets of size maxlen
-- that this SB descriptor should receive. */
-- sb_desc->sw_len = urb->transfer_buffer_length ?
-- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
-- sb_desc->next = 0;
-- sb_desc->buf = 0;
-- sb_desc->command =
-- (IO_FIELD(USB_SB_command, rem, urb->transfer_buffer_length % maxlen) |
-- IO_STATE(USB_SB_command, tt, in) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- ep_desc->next = tmp_ep->next;
-- tmp_ep->next = virt_to_phys(ep_desc);
-- }
-- i++;
-- }
-- tmp_ep = (USB_EP_Desc_t *)phys_to_virt(tmp_ep->next);
-- } while (tmp_ep != first_ep);
--
--
-- /* Note that first_sb/last_sb doesn't apply to interrupt traffic. */
-- urb_priv->epid = epid;
--
-- /* We start the DMA sub channel without checking if it's running or not, because:
-- 1) If it's already running, issuing the start command is a nop.
-- 2) We avoid a test-and-set race condition. */
-- *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
--
-- DBFEXIT;
--}
--
--
--
--static void etrax_usb_complete_intr_urb(struct urb *urb, int status)
--{
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- int epid = urb_priv->epid;
--
-- DBFENTER;
--
-- if (status)
-- warn("Completing intr urb with status %d.", status);
--
-- dbg_intr("Completing intr epid %d, urb 0x%lx", epid, (unsigned long)urb);
--
-- urb->status = status;
-- urb->actual_length = urb_priv->rx_offset;
--
-- dbg_intr("interrupt urb->actual_length = %d", urb->actual_length);
--
-- /* We let any non-zero status from the layer above have precedence. */
-- if (status == 0) {
-- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
-- is to be treated as an error. */
-- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
-- if (urb->actual_length !=
-- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
-- urb->status = -EREMOTEIO;
-- }
-- }
-- }
--
-- /* The driver will resubmit the URB so we need to remove it first */
-- etrax_usb_unlink_urb(urb, 0);
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
--
-- DBFEXIT;
--}
--
--
--static int etrax_usb_submit_isoc_urb(struct urb *urb)
--{
-- int epid;
-- unsigned long flags;
--
-- DBFENTER;
--
-- dbg_isoc("Submitting isoc urb = 0x%lx", (unsigned long)urb);
--
-- /* Epid allocation, empty check and list add must be protected.
-- Read about this in etrax_usb_submit_ctrl_urb. */
--
-- spin_lock_irqsave(&urb_list_lock, flags);
-- /* Is there an active epid for this urb ? */
-- epid = etrax_usb_setup_epid(urb);
-- if (epid == -1) {
-- DBFEXIT;
-- spin_unlock_irqrestore(&urb_list_lock, flags);
-- return -ENOMEM;
-- }
--
-- /* Ok, now we got valid endpoint, lets insert some traffic */
--
-- urb->status = -EINPROGRESS;
--
-- /* Find the last urb in the URB_List and add this urb after that one.
-- Also add the traffic, that is do an etrax_usb_add_to_isoc_sb_list. This
-- is important to make this in "real time" since isochronous traffic is
-- time sensitive. */
--
-- dbg_isoc("Adding isoc urb to (possibly empty) list");
-- urb_list_add(urb, epid);
-- etrax_usb_add_to_isoc_sb_list(urb, epid);
-- spin_unlock_irqrestore(&urb_list_lock, flags);
--
-- DBFEXIT;
--
-- return 0;
--}
--
--static void etrax_usb_check_error_isoc_ep(const int epid)
--{
-- unsigned long int flags;
-- int error_code;
-- __u32 r_usb_ept_data;
--
-- /* We can't read R_USB_EPID_ATTN here since it would clear the iso_eof,
-- bulk_eot and epid_attn interrupts. So we just check the status of
-- the epid without testing if for it in R_USB_EPID_ATTN. */
--
--
-- save_flags(flags);
-- cli();
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- /* Note that although there are separate R_USB_EPT_DATA and R_USB_EPT_DATA_ISO
-- registers, they are located at the same address and are of the same size.
-- In other words, this read should be ok for isoc also. */
-- r_usb_ept_data = *R_USB_EPT_DATA;
-- restore_flags(flags);
--
-- error_code = IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data);
--
-- if (r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, hold)) {
-- warn("Hold was set for epid %d.", epid);
-- return;
-- }
--
-- if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, no_error)) {
--
-- /* This indicates that the SB list of the ept was completed before
-- new data was appended to it. This is not an error, but indicates
-- large system or USB load and could possibly cause trouble for
-- very timing sensitive USB device drivers so we log it.
-- */
-- info("Isoc. epid %d disabled with no error", epid);
-- return;
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, stall)) {
-- /* Not really a protocol error, just says that the endpoint gave
-- a stall response. Note that error_code cannot be stall for isoc. */
-- panic("Isoc traffic cannot stall");
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, bus_error)) {
-- /* Two devices responded to a transaction request. Must be resolved
-- by software. FIXME: Reset ports? */
-- panic("Bus error for epid %d."
-- " Two devices responded to transaction request",
-- epid);
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, buffer_error)) {
-- /* DMA overrun or underrun. */
-- warn("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
--
-- /* It seems that error_code = buffer_error in
-- R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
-- are the same error. */
-- }
--}
--
--
--static void etrax_usb_add_to_isoc_sb_list(struct urb *urb, int epid)
--{
--
-- int i = 0;
--
-- etrax_urb_priv_t *urb_priv;
-- USB_SB_Desc_t *prev_sb_desc, *next_sb_desc, *temp_sb_desc;
--
-- DBFENTER;
--
-- prev_sb_desc = next_sb_desc = temp_sb_desc = NULL;
--
-- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), GFP_ATOMIC);
-- assert(urb_priv != NULL);
--
-- urb->hcpriv = urb_priv;
-- urb_priv->epid = epid;
--
-- if (usb_pipeout(urb->pipe)) {
--
-- if (urb->number_of_packets == 0) panic("etrax_usb_add_to_isoc_sb_list 0 packets\n");
--
-- dbg_isoc("Transfer for epid %d is OUT", epid);
-- dbg_isoc("%d packets in URB", urb->number_of_packets);
--
-- /* Create one SB descriptor for each packet and link them together. */
-- for (i = 0; i < urb->number_of_packets; i++) {
-- if (!urb->iso_frame_desc[i].length)
-- continue;
--
-- next_sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_ATOMIC);
-- assert(next_sb_desc != NULL);
--
-- if (urb->iso_frame_desc[i].length > 0) {
--
-- next_sb_desc->command = (IO_STATE(USB_SB_command, tt, out) |
-- IO_STATE(USB_SB_command, eot, yes));
--
-- next_sb_desc->sw_len = urb->iso_frame_desc[i].length;
-- next_sb_desc->buf = virt_to_phys((char*)urb->transfer_buffer + urb->iso_frame_desc[i].offset);
--
-- /* Check if full length transfer. */
-- if (urb->iso_frame_desc[i].length ==
-- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
-- next_sb_desc->command |= IO_STATE(USB_SB_command, full, yes);
-- }
-- } else {
-- dbg_isoc("zero len packet");
-- next_sb_desc->command = (IO_FIELD(USB_SB_command, rem, 0) |
-- IO_STATE(USB_SB_command, tt, zout) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, full, yes));
--
-- next_sb_desc->sw_len = 1;
-- next_sb_desc->buf = virt_to_phys(&zout_buffer[0]);
-- }
--
-- /* First SB descriptor that belongs to this urb */
-- if (i == 0)
-- urb_priv->first_sb = next_sb_desc;
-- else
-- prev_sb_desc->next = virt_to_phys(next_sb_desc);
--
-- prev_sb_desc = next_sb_desc;
-- }
--
-- next_sb_desc->command |= (IO_STATE(USB_SB_command, intr, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
-- next_sb_desc->next = 0;
-- urb_priv->last_sb = next_sb_desc;
--
-- } else if (usb_pipein(urb->pipe)) {
--
-- dbg_isoc("Transfer for epid %d is IN", epid);
-- dbg_isoc("transfer_buffer_length = %d", urb->transfer_buffer_length);
-- dbg_isoc("rem is calculated to %d", urb->iso_frame_desc[urb->number_of_packets - 1].length);
--
-- /* Note that in descriptors for periodic traffic are not consumed. This means that
-- the USB controller never propagates in the SB list. In other words, if there already
-- is an SB descriptor in the list for this EP we don't have to do anything. */
-- if (TxIsocEPList[epid].sub == 0) {
-- dbg_isoc("Isoc traffic not already running, allocating SB");
--
-- next_sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_ATOMIC);
-- assert(next_sb_desc != NULL);
--
-- next_sb_desc->command = (IO_STATE(USB_SB_command, tt, in) |
-- IO_STATE(USB_SB_command, eot, yes) |
-- IO_STATE(USB_SB_command, eol, yes));
--
-- next_sb_desc->next = 0;
-- next_sb_desc->sw_len = 1; /* Actual number of packets is not relevant
-- for periodic in traffic as long as it is more
-- than zero. Set to 1 always. */
-- next_sb_desc->buf = 0;
--
-- /* The rem field is don't care for isoc traffic, so we don't set it. */
--
-- /* Only one SB descriptor that belongs to this urb. */
-- urb_priv->first_sb = next_sb_desc;
-- urb_priv->last_sb = next_sb_desc;
--
-- } else {
--
-- dbg_isoc("Isoc traffic already running, just setting first/last_sb");
--
-- /* Each EP for isoc in will have only one SB descriptor, setup when submitting the
-- already active urb. Note that even though we may have several first_sb/last_sb
-- pointing at the same SB descriptor, they are freed only once (when the list has
-- become empty). */
-- urb_priv->first_sb = phys_to_virt(TxIsocEPList[epid].sub);
-- urb_priv->last_sb = phys_to_virt(TxIsocEPList[epid].sub);
-- return;
-- }
--
-- }
--
-- /* Find the spot to insert this urb and add it. */
-- if (TxIsocEPList[epid].sub == 0) {
-- /* First SB descriptor inserted in this list (in or out). */
-- dbg_isoc("Inserting SB desc first in list");
-- TxIsocEPList[epid].hw_len = 0;
-- TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
--
-- } else {
-- /* Isochronous traffic is already running, insert new traffic last (only out). */
-- dbg_isoc("Inserting SB desc last in list");
-- temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
-- while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
-- IO_STATE(USB_SB_command, eol, yes)) {
-- assert(temp_sb_desc->next);
-- temp_sb_desc = phys_to_virt(temp_sb_desc->next);
-- }
-- dbg_isoc("Appending list on desc 0x%p", temp_sb_desc);
--
-- /* Next pointer must be set before eol is removed. */
-- temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
-- /* Clear the previous end of list flag since there is a new in the
-- added SB descriptor list. */
-- temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
--
-- if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
-- /* 8.8.5 in Designer's Reference says we should check for and correct
-- any errors in the EP here. That should not be necessary if epid_attn
-- is handled correctly, so we assume all is ok. */
-- dbg_isoc("EP disabled");
-- etrax_usb_check_error_isoc_ep(epid);
--
-- /* The SB list was exhausted. */
-- if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
-- /* The new sublist did not get processed before the EP was
-- disabled. Setup the EP again. */
-- dbg_isoc("Set EP sub to new list");
-- TxIsocEPList[epid].hw_len = 0;
-- TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-- }
-- }
-- }
--
-- if (urb->transfer_flags & URB_ISO_ASAP) {
-- /* The isoc transfer should be started as soon as possible. The start_frame
-- field is a return value if URB_ISO_ASAP was set. Comparing R_USB_FM_NUMBER
-- with a USB Chief trace shows that the first isoc IN token is sent 2 frames
-- later. I'm not sure how this affects usage of the start_frame field by the
-- device driver, or how it affects things when USB_ISO_ASAP is not set, so
-- therefore there's no compensation for the 2 frame "lag" here. */
-- urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
-- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-- urb_priv->urb_state = STARTED;
-- dbg_isoc("URB_ISO_ASAP set, urb->start_frame set to %d", urb->start_frame);
-- } else {
-- /* Not started yet. */
-- urb_priv->urb_state = NOT_STARTED;
-- dbg_isoc("urb_priv->urb_state set to NOT_STARTED");
-- }
--
-- /* We start the DMA sub channel without checking if it's running or not, because:
-- 1) If it's already running, issuing the start command is a nop.
-- 2) We avoid a test-and-set race condition. */
-- *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
--
-- DBFEXIT;
--}
--
--static void etrax_usb_complete_isoc_urb(struct urb *urb, int status)
--{
-- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- int epid = urb_priv->epid;
-- int auto_resubmit = 0;
--
-- DBFENTER;
-- dbg_isoc("complete urb 0x%p, status %d", urb, status);
--
-- if (status)
-- warn("Completing isoc urb with status %d.", status);
--
-- if (usb_pipein(urb->pipe)) {
-- int i;
--
-- /* Make that all isoc packets have status and length set before
-- completing the urb. */
-- for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++) {
-- urb->iso_frame_desc[i].actual_length = 0;
-- urb->iso_frame_desc[i].status = -EPROTO;
-- }
--
-- urb_list_del(urb, epid);
--
-- if (!list_empty(&urb_list[epid])) {
-- ((etrax_urb_priv_t *)(urb_list_first(epid)->hcpriv))->urb_state = STARTED;
-- } else {
-- unsigned long int flags;
-- if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-- /* The EP was enabled, disable it and wait. */
-- TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
--
-- /* Ah, the luxury of busy-wait. */
-- while (*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid]));
-- }
--
-- etrax_remove_from_sb_list(urb);
-- TxIsocEPList[epid].sub = 0;
-- TxIsocEPList[epid].hw_len = 0;
--
-- save_flags(flags);
-- cli();
-- etrax_usb_free_epid(epid);
-- restore_flags(flags);
-- }
--
-- urb->hcpriv = 0;
-- kfree(urb_priv);
--
-- /* Release allocated bandwidth. */
-- usb_release_bandwidth(urb->dev, urb, 0);
-- } else if (usb_pipeout(urb->pipe)) {
-- int freed_descr;
--
-- dbg_isoc("Isoc out urb complete 0x%p", urb);
--
-- /* Update the urb list. */
-- urb_list_del(urb, epid);
--
-- freed_descr = etrax_remove_from_sb_list(urb);
-- dbg_isoc("freed %d descriptors of %d packets", freed_descr, urb->number_of_packets);
-- assert(freed_descr == urb->number_of_packets);
-- urb->hcpriv = 0;
-- kfree(urb_priv);
--
-- /* Release allocated bandwidth. */
-- usb_release_bandwidth(urb->dev, urb, 0);
-- }
--
-- urb->status = status;
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
--
-- if (auto_resubmit) {
-- /* Check that urb was not unlinked by the complete callback. */
-- if (__urb_list_entry(urb, epid)) {
-- /* Move this one down the list. */
-- urb_list_move_last(urb, epid);
--
-- /* Mark the now first urb as started (may already be). */
-- ((etrax_urb_priv_t *)(urb_list_first(epid)->hcpriv))->urb_state = STARTED;
--
-- /* Must set this to 0 since this urb is still active after
-- completion. */
-- urb_priv->isoc_packet_counter = 0;
-- } else {
-- warn("(ISOC) automatic resubmit urb 0x%p removed by complete.", urb);
-- }
-- }
--
-- DBFEXIT;
--}
--
--static void etrax_usb_complete_urb(struct urb *urb, int status)
--{
-- switch (usb_pipetype(urb->pipe)) {
-- case PIPE_BULK:
-- etrax_usb_complete_bulk_urb(urb, status);
-- break;
-- case PIPE_CONTROL:
-- etrax_usb_complete_ctrl_urb(urb, status);
-- break;
-- case PIPE_INTERRUPT:
-- etrax_usb_complete_intr_urb(urb, status);
-- break;
-- case PIPE_ISOCHRONOUS:
-- etrax_usb_complete_isoc_urb(urb, status);
-- break;
-- default:
-- err("Unknown pipetype");
-- }
--}
--
--
--
--static irqreturn_t etrax_usb_hc_interrupt_top_half(int irq, void *vhc)
--{
-- usb_interrupt_registers_t *reg;
-- unsigned long flags;
-- __u32 irq_mask;
-- __u8 status;
-- __u32 epid_attn;
-- __u16 port_status_1;
-- __u16 port_status_2;
-- __u32 fm_number;
--
-- DBFENTER;
--
-- /* Read critical registers into local variables, do kmalloc afterwards. */
-- save_flags(flags);
-- cli();
--
-- irq_mask = *R_USB_IRQ_MASK_READ;
-- /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that R_USB_STATUS
-- must be read before R_USB_EPID_ATTN since reading the latter clears the
-- ourun and perror fields of R_USB_STATUS. */
-- status = *R_USB_STATUS;
--
-- /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn interrupts. */
-- epid_attn = *R_USB_EPID_ATTN;
--
-- /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
-- port_status interrupt. */
-- port_status_1 = *R_USB_RH_PORT_STATUS_1;
-- port_status_2 = *R_USB_RH_PORT_STATUS_2;
--
-- /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
-- /* Note: the lower 11 bits contain the actual frame number, sent with each sof. */
-- fm_number = *R_USB_FM_NUMBER;
--
-- restore_flags(flags);
--
-- reg = (usb_interrupt_registers_t *)kmem_cache_alloc(top_half_reg_cache, SLAB_ATOMIC);
--
-- assert(reg != NULL);
--
-- reg->hc = (etrax_hc_t *)vhc;
--
-- /* Now put register values into kmalloc'd area. */
-- reg->r_usb_irq_mask_read = irq_mask;
-- reg->r_usb_status = status;
-- reg->r_usb_epid_attn = epid_attn;
-- reg->r_usb_rh_port_status_1 = port_status_1;
-- reg->r_usb_rh_port_status_2 = port_status_2;
-- reg->r_usb_fm_number = fm_number;
--
-- INIT_WORK(®->usb_bh, etrax_usb_hc_interrupt_bottom_half, reg);
-- schedule_work(®->usb_bh);
--
-- DBFEXIT;
--
-- return IRQ_HANDLED;
--}
--
--static void etrax_usb_hc_interrupt_bottom_half(void *data)
--{
-- usb_interrupt_registers_t *reg = (usb_interrupt_registers_t *)data;
-- __u32 irq_mask = reg->r_usb_irq_mask_read;
--
-- DBFENTER;
--
-- /* Interrupts are handled in order of priority. */
-- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
-- etrax_usb_hc_epid_attn_interrupt(reg);
-- }
-- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
-- etrax_usb_hc_port_status_interrupt(reg);
-- }
-- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
-- etrax_usb_hc_ctl_status_interrupt(reg);
-- }
-- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
-- etrax_usb_hc_isoc_eof_interrupt();
-- }
-- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
-- /* Update/restart the bulk start timer since obviously the channel is running. */
-- mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-- /* Update/restart the bulk eot timer since we just received an bulk eot interrupt. */
-- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
--
-- etrax_usb_hc_bulk_eot_interrupt(0);
-- }
--
-- kmem_cache_free(top_half_reg_cache, reg);
--
-- DBFEXIT;
--}
--
--
--void etrax_usb_hc_isoc_eof_interrupt(void)
--{
-- struct urb *urb;
-- etrax_urb_priv_t *urb_priv;
-- int epid;
-- unsigned long flags;
--
-- DBFENTER;
--
-- /* Do not check the invalid epid (it has a valid sub pointer). */
-- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
--
-- /* Do not check the invalid epid (it has a valid sub pointer). */
-- if ((epid == DUMMY_EPID) || (epid == INVALID_EPID))
-- continue;
--
-- /* Disable interrupts to block the isoc out descriptor interrupt handler
-- from being called while the isoc EPID list is being checked.
-- */
-- save_flags(flags);
-- cli();
--
-- if (TxIsocEPList[epid].sub == 0) {
-- /* Nothing here to see. */
-- restore_flags(flags);
-- continue;
-- }
--
-- /* Get the first urb (if any). */
-- urb = urb_list_first(epid);
-- if (urb == 0) {
-- warn("Ignoring NULL urb");
-- restore_flags(flags);
-- continue;
-- }
-- if (usb_pipein(urb->pipe)) {
--
-- /* Sanity check. */
-- assert(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
--
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- if (urb_priv->urb_state == NOT_STARTED) {
--
-- /* If ASAP is not set and urb->start_frame is the current frame,
-- start the transfer. */
-- if (!(urb->transfer_flags & URB_ISO_ASAP) &&
-- (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
--
-- dbg_isoc("Enabling isoc IN EP descr for epid %d", epid);
-- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
--
-- /* This urb is now active. */
-- urb_priv->urb_state = STARTED;
-- continue;
-- }
-- }
-- }
-- restore_flags(flags);
-- }
--
-- DBFEXIT;
--
--}
--
--void etrax_usb_hc_bulk_eot_interrupt(int timer_induced)
--{
-- int epid;
--
-- /* The technique is to run one urb at a time, wait for the eot interrupt at which
-- point the EP descriptor has been disabled. */
--
-- DBFENTER;
-- dbg_bulk("bulk eot%s", timer_induced ? ", called by timer" : "");
--
-- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
--
-- if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
-- (TxBulkEPList[epid].sub != 0)) {
--
-- struct urb *urb;
-- etrax_urb_priv_t *urb_priv;
-- unsigned long flags;
-- __u32 r_usb_ept_data;
--
-- /* Found a disabled EP descriptor which has a non-null sub pointer.
-- Verify that this ctrl EP descriptor got disabled no errors.
-- FIXME: Necessary to check error_code? */
-- dbg_bulk("for epid %d?", epid);
--
-- /* Get the first urb. */
-- urb = urb_list_first(epid);
--
-- /* FIXME: Could this happen for valid reasons? Why did it disappear? Because of
-- wrong unlinking? */
-- if (!urb) {
-- warn("NULL urb for epid %d", epid);
-- continue;
-- }
--
-- assert(urb);
-- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
-- assert(urb_priv);
--
-- /* Sanity checks. */
-- assert(usb_pipetype(urb->pipe) == PIPE_BULK);
-- if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
-- err("bulk endpoint got disabled before reaching last sb");
-- }
--
-- /* For bulk IN traffic, there seems to be a race condition between
-- between the bulk eot and eop interrupts, or rather an uncertainty regarding
-- the order in which they happen. Normally we expect the eop interrupt from
-- DMA channel 9 to happen before the eot interrupt.
--
-- Therefore, we complete the bulk IN urb in the rx interrupt handler instead. */
--
-- if (usb_pipein(urb->pipe)) {
-- dbg_bulk("in urb, continuing");
-- continue;
-- }
--
-- save_flags(flags);
-- cli();
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- r_usb_ept_data = *R_USB_EPT_DATA;
-- restore_flags(flags);
--
-- if (IO_EXTRACT(R_USB_EPT_DATA, error_code, r_usb_ept_data) ==
-- IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-- /* This means that the endpoint has no error, is disabled
-- and had inserted traffic, i.e. transfer successfully completed. */
-- etrax_usb_complete_bulk_urb(urb, 0);
-- } else {
-- /* Shouldn't happen. We expect errors to be caught by epid attention. */
-- err("Found disabled bulk EP desc, error_code != no_error");
-- }
-- }
-- }
--
-- /* Normally, we should find (at least) one disabled EP descriptor with a valid sub pointer.
-- However, because of the uncertainty in the deliverance of the eop/eot interrupts, we may
-- not. Also, we might find two disabled EPs when handling an eot interrupt, and then find
-- none the next time. */
--
-- DBFEXIT;
--
--}
--
--void etrax_usb_hc_epid_attn_interrupt(usb_interrupt_registers_t *reg)
--{
-- /* This function handles the epid attention interrupt. There are a variety of reasons
-- for this interrupt to happen (Designer's Reference, p. 8 - 22 for the details):
--
-- invalid ep_id - Invalid epid in an EP (EP disabled).
-- stall - Not strictly an error condition (EP disabled).
-- 3rd error - Three successive transaction errors (EP disabled).
-- buffer ourun - Buffer overrun or underrun (EP disabled).
-- past eof1 - Intr or isoc transaction proceeds past EOF1.
-- near eof - Intr or isoc transaction would not fit inside the frame.
-- zout transfer - If zout transfer for a bulk endpoint (EP disabled).
-- setup transfer - If setup transfer for a non-ctrl endpoint (EP disabled). */
--
-- int epid;
--
--
-- DBFENTER;
--
-- assert(reg != NULL);
--
-- /* Note that we loop through all epids. We still want to catch errors for
-- the invalid one, even though we might handle them differently. */
-- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
--
-- if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
--
-- struct urb *urb;
-- __u32 r_usb_ept_data;
-- unsigned long flags;
-- int error_code;
--
-- save_flags(flags);
-- cli();
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-- nop();
-- /* Note that although there are separate R_USB_EPT_DATA and R_USB_EPT_DATA_ISO
-- registers, they are located at the same address and are of the same size.
-- In other words, this read should be ok for isoc also. */
-- r_usb_ept_data = *R_USB_EPT_DATA;
-- restore_flags(flags);
--
-- /* First some sanity checks. */
-- if (epid == INVALID_EPID) {
-- /* FIXME: What if it became disabled? Could seriously hurt interrupt
-- traffic. (Use do_intr_recover.) */
-- warn("Got epid_attn for INVALID_EPID (%d).", epid);
-- err("R_USB_EPT_DATA = 0x%x", r_usb_ept_data);
-- err("R_USB_STATUS = 0x%x", reg->r_usb_status);
-- continue;
-- } else if (epid == DUMMY_EPID) {
-- /* We definitely don't care about these ones. Besides, they are
-- always disabled, so any possible disabling caused by the
-- epid attention interrupt is irrelevant. */
-- warn("Got epid_attn for DUMMY_EPID (%d).", epid);
-- continue;
-- }
--
-- /* Get the first urb in the urb list for this epid. We blatantly assume
-- that only the first urb could have caused the epid attention.
-- (For bulk and ctrl, only one urb is active at any one time. For intr
-- and isoc we remove them once they are completed.) */
-- urb = urb_list_first(epid);
--
-- if (urb == NULL) {
-- err("Got epid_attn for epid %i with no urb.", epid);
-- err("R_USB_EPT_DATA = 0x%x", r_usb_ept_data);
-- err("R_USB_STATUS = 0x%x", reg->r_usb_status);
-- continue;
-- }
--
-- switch (usb_pipetype(urb->pipe)) {
-- case PIPE_BULK:
-- warn("Got epid attn for bulk endpoint, epid %d", epid);
-- break;
-- case PIPE_CONTROL:
-- warn("Got epid attn for control endpoint, epid %d", epid);
-- break;
-- case PIPE_INTERRUPT:
-- warn("Got epid attn for interrupt endpoint, epid %d", epid);
-- break;
-- case PIPE_ISOCHRONOUS:
-- warn("Got epid attn for isochronous endpoint, epid %d", epid);
-- break;
-- }
--
-- if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) {
-- if (r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, hold)) {
-- warn("Hold was set for epid %d.", epid);
-- continue;
-- }
-- }
--
-- /* Even though error_code occupies bits 22 - 23 in both R_USB_EPT_DATA and
-- R_USB_EPT_DATA_ISOC, we separate them here so we don't forget in other places. */
-- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- error_code = IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data);
-- } else {
-- error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, r_usb_ept_data);
-- }
--
-- /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
-- if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
--
-- /* Isoc traffic doesn't have error_count_in/error_count_out. */
-- if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
-- (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, r_usb_ept_data) == 3 ||
-- IO_EXTRACT(R_USB_EPT_DATA, error_count_out, r_usb_ept_data) == 3)) {
-- /* 3rd error. */
-- warn("3rd error for epid %i", epid);
-- etrax_usb_complete_urb(urb, -EPROTO);
--
-- } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
--
-- warn("Perror for epid %d", epid);
--
-- if (!(r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
-- /* invalid ep_id */
-- panic("Perror because of invalid epid."
-- " Deconfigured too early?");
-- } else {
-- /* past eof1, near eof, zout transfer, setup transfer */
--
-- /* Dump the urb and the relevant EP descriptor list. */
--
-- __dump_urb(urb);
-- __dump_ept_data(epid);
-- __dump_ep_list(usb_pipetype(urb->pipe));
--
-- panic("Something wrong with DMA descriptor contents."
-- " Too much traffic inserted?");
-- }
-- } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-- /* buffer ourun */
-- panic("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
-- }
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, stall)) {
-- /* Not really a protocol error, just says that the endpoint gave
-- a stall response. Note that error_code cannot be stall for isoc. */
-- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-- panic("Isoc traffic cannot stall");
-- }
--
-- warn("Stall for epid %d", epid);
-- etrax_usb_complete_urb(urb, -EPIPE);
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, bus_error)) {
-- /* Two devices responded to a transaction request. Must be resolved
-- by software. FIXME: Reset ports? */
-- panic("Bus error for epid %d."
-- " Two devices responded to transaction request",
-- epid);
--
-- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, buffer_error)) {
-- /* DMA overrun or underrun. */
-- warn("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
--
-- /* It seems that error_code = buffer_error in
-- R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
-- are the same error. */
-- etrax_usb_complete_urb(urb, -EPROTO);
-- }
-- }
-- }
--
-- DBFEXIT;
--
--}
--
--void etrax_usb_bulk_start_timer_func(unsigned long dummy)
--{
--
-- /* We might enable an EP descriptor behind the current DMA position when it's about
-- to decide that there are no more bulk traffic and it should stop the bulk channel.
-- Therefore we periodically check if the bulk channel is stopped and there is an
-- enabled bulk EP descriptor, in which case we start the bulk channel. */
-- dbg_bulk("bulk_start_timer timed out.");
--
-- if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
-- int epid;
--
-- dbg_bulk("Bulk DMA channel not running.");
--
-- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-- if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-- dbg_bulk("Found enabled EP for epid %d, starting bulk channel.\n",
-- epid);
-- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
--
-- /* Restart the bulk eot timer since we just started the bulk channel. */
-- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
--
-- /* No need to search any further. */
-- break;
-- }
-- }
-- } else {
-- dbg_bulk("Bulk DMA channel running.");
-- }
--}
--
--void etrax_usb_hc_port_status_interrupt(usb_interrupt_registers_t *reg)
--{
-- etrax_hc_t *hc = reg->hc;
-- __u16 r_usb_rh_port_status_1 = reg->r_usb_rh_port_status_1;
-- __u16 r_usb_rh_port_status_2 = reg->r_usb_rh_port_status_2;
--
-- DBFENTER;
--
-- /* The Etrax RH does not include a wPortChange register, so this has to be handled in software
-- (by saving the old port status value for comparison when the port status interrupt happens).
-- See section 11.16.2.6.2 in the USB 1.1 spec for details. */
--
-- dbg_rh("hc->rh.prev_wPortStatus_1 = 0x%x", hc->rh.prev_wPortStatus_1);
-- dbg_rh("hc->rh.prev_wPortStatus_2 = 0x%x", hc->rh.prev_wPortStatus_2);
-- dbg_rh("r_usb_rh_port_status_1 = 0x%x", r_usb_rh_port_status_1);
-- dbg_rh("r_usb_rh_port_status_2 = 0x%x", r_usb_rh_port_status_2);
--
-- /* C_PORT_CONNECTION is set on any transition. */
-- hc->rh.wPortChange_1 |=
-- ((r_usb_rh_port_status_1 & (1 << RH_PORT_CONNECTION)) !=
-- (hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_CONNECTION))) ?
-- (1 << RH_PORT_CONNECTION) : 0;
--
-- hc->rh.wPortChange_2 |=
-- ((r_usb_rh_port_status_2 & (1 << RH_PORT_CONNECTION)) !=
-- (hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_CONNECTION))) ?
-- (1 << RH_PORT_CONNECTION) : 0;
--
-- /* C_PORT_ENABLE is _only_ set on a one to zero transition, i.e. when
-- the port is disabled, not when it's enabled. */
-- hc->rh.wPortChange_1 |=
-- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_ENABLE))
-- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_ENABLE))) ?
-- (1 << RH_PORT_ENABLE) : 0;
--
-- hc->rh.wPortChange_2 |=
-- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_ENABLE))
-- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_ENABLE))) ?
-- (1 << RH_PORT_ENABLE) : 0;
--
-- /* C_PORT_SUSPEND is set to one when the device has transitioned out
-- of the suspended state, i.e. when suspend goes from one to zero. */
-- hc->rh.wPortChange_1 |=
-- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_SUSPEND))
-- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_SUSPEND))) ?
-- (1 << RH_PORT_SUSPEND) : 0;
--
-- hc->rh.wPortChange_2 |=
-- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_SUSPEND))
-- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_SUSPEND))) ?
-- (1 << RH_PORT_SUSPEND) : 0;
--
--
-- /* C_PORT_RESET is set when reset processing on this port is complete. */
-- hc->rh.wPortChange_1 |=
-- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_RESET))
-- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_RESET))) ?
-- (1 << RH_PORT_RESET) : 0;
--
-- hc->rh.wPortChange_2 |=
-- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_RESET))
-- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_RESET))) ?
-- (1 << RH_PORT_RESET) : 0;
--
-- /* Save the new values for next port status change. */
-- hc->rh.prev_wPortStatus_1 = r_usb_rh_port_status_1;
-- hc->rh.prev_wPortStatus_2 = r_usb_rh_port_status_2;
--
-- dbg_rh("hc->rh.wPortChange_1 set to 0x%x", hc->rh.wPortChange_1);
-- dbg_rh("hc->rh.wPortChange_2 set to 0x%x", hc->rh.wPortChange_2);
--
-- DBFEXIT;
--
--}
--
--void etrax_usb_hc_ctl_status_interrupt(usb_interrupt_registers_t *reg)
--{
-- DBFENTER;
--
-- /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
-- list for the corresponding epid? */
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-- panic("USB controller got ourun.");
-- }
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
--
-- /* Before, etrax_usb_do_intr_recover was called on this epid if it was
-- an interrupt pipe. I don't see how re-enabling all EP descriptors
-- will help if there was a programming error. */
-- panic("USB controller got perror.");
-- }
--
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
-- /* We should never operate in device mode. */
-- panic("USB controller in device mode.");
-- }
--
-- /* These if-statements could probably be nested. */
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, host_mode)) {
-- info("USB controller in host mode.");
-- }
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, started)) {
-- info("USB controller started.");
-- }
-- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, running)) {
-- info("USB controller running.");
-- }
--
-- DBFEXIT;
--
--}
--
--
--static int etrax_rh_submit_urb(struct urb *urb)
--{
-- struct usb_device *usb_dev = urb->dev;
-- etrax_hc_t *hc = usb_dev->bus->hcpriv;
-- unsigned int pipe = urb->pipe;
-- struct usb_ctrlrequest *cmd = (struct usb_ctrlrequest *) urb->setup_packet;
-- void *data = urb->transfer_buffer;
-- int leni = urb->transfer_buffer_length;
-- int len = 0;
-- int stat = 0;
--
-- __u16 bmRType_bReq;
-- __u16 wValue;
-- __u16 wIndex;
-- __u16 wLength;
--
-- DBFENTER;
--
-- /* FIXME: What is this interrupt urb that is sent to the root hub? */
-- if (usb_pipetype (pipe) == PIPE_INTERRUPT) {
-- dbg_rh("Root-Hub submit IRQ: every %d ms", urb->interval);
-- hc->rh.urb = urb;
-- hc->rh.send = 1;
-- /* FIXME: We could probably remove this line since it's done
-- in etrax_rh_init_int_timer. (Don't remove it from
-- etrax_rh_init_int_timer though.) */
-- hc->rh.interval = urb->interval;
-- etrax_rh_init_int_timer(urb);
-- DBFEXIT;
--
-- return 0;
-- }
--
-- bmRType_bReq = cmd->bRequestType | (cmd->bRequest << 8);
-- wValue = le16_to_cpu(cmd->wValue);
-- wIndex = le16_to_cpu(cmd->wIndex);
-- wLength = le16_to_cpu(cmd->wLength);
--
-- dbg_rh("bmRType_bReq : 0x%04x (%d)", bmRType_bReq, bmRType_bReq);
-- dbg_rh("wValue : 0x%04x (%d)", wValue, wValue);
-- dbg_rh("wIndex : 0x%04x (%d)", wIndex, wIndex);
-- dbg_rh("wLength : 0x%04x (%d)", wLength, wLength);
--
-- switch (bmRType_bReq) {
--
-- /* Request Destination:
-- without flags: Device,
-- RH_INTERFACE: interface,
-- RH_ENDPOINT: endpoint,
-- RH_CLASS means HUB here,
-- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
-- */
--
-- case RH_GET_STATUS:
-- *(__u16 *) data = cpu_to_le16 (1);
-- OK (2);
--
-- case RH_GET_STATUS | RH_INTERFACE:
-- *(__u16 *) data = cpu_to_le16 (0);
-- OK (2);
--
-- case RH_GET_STATUS | RH_ENDPOINT:
-- *(__u16 *) data = cpu_to_le16 (0);
-- OK (2);
--
-- case RH_GET_STATUS | RH_CLASS:
-- *(__u32 *) data = cpu_to_le32 (0);
-- OK (4); /* hub power ** */
--
-- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
-- if (wIndex == 1) {
-- *((__u16*)data) = cpu_to_le16(hc->rh.prev_wPortStatus_1);
-- *((__u16*)data + 1) = cpu_to_le16(hc->rh.wPortChange_1);
-- } else if (wIndex == 2) {
-- *((__u16*)data) = cpu_to_le16(hc->rh.prev_wPortStatus_2);
-- *((__u16*)data + 1) = cpu_to_le16(hc->rh.wPortChange_2);
-- } else {
-- dbg_rh("RH_GET_STATUS whith invalid wIndex!");
-- OK(0);
-- }
--
-- OK(4);
--
-- case RH_CLEAR_FEATURE | RH_ENDPOINT:
-- switch (wValue) {
-- case (RH_ENDPOINT_STALL):
-- OK (0);
-- }
-- break;
--
-- case RH_CLEAR_FEATURE | RH_CLASS:
-- switch (wValue) {
-- case (RH_C_HUB_OVER_CURRENT):
-- OK (0); /* hub power over current ** */
-- }
-- break;
--
-- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
-- switch (wValue) {
-- case (RH_PORT_ENABLE):
-- if (wIndex == 1) {
--
-- dbg_rh("trying to do disable port 1");
--
-- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
--
-- while (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes));
-- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
-- dbg_rh("Port 1 is disabled");
--
-- } else if (wIndex == 2) {
--
-- dbg_rh("trying to do disable port 2");
--
-- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
--
-- while (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes));
-- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
-- dbg_rh("Port 2 is disabled");
--
-- } else {
-- dbg_rh("RH_CLEAR_FEATURE->RH_PORT_ENABLE "
-- "with invalid wIndex == %d!", wIndex);
-- }
--
-- OK (0);
-- case (RH_PORT_SUSPEND):
-- /* Opposite to suspend should be resume, so we'll do a resume. */
-- /* FIXME: USB 1.1, 11.16.2.2 says:
-- "Clearing the PORT_SUSPEND feature causes a host-initiated resume
-- on the specified port. If the port is not in the Suspended state,
-- the hub should treat this request as a functional no-operation."
-- Shouldn't we check if the port is in a suspended state before
-- resuming? */
--
-- /* Make sure the controller isn't busy. */
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- if (wIndex == 1) {
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port1) |
-- IO_STATE(R_USB_COMMAND, port_cmd, resume) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
-- } else if (wIndex == 2) {
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port2) |
-- IO_STATE(R_USB_COMMAND, port_cmd, resume) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
-- } else {
-- dbg_rh("RH_CLEAR_FEATURE->RH_PORT_SUSPEND "
-- "with invalid wIndex == %d!", wIndex);
-- }
--
-- OK (0);
-- case (RH_PORT_POWER):
-- OK (0); /* port power ** */
-- case (RH_C_PORT_CONNECTION):
-- if (wIndex == 1) {
-- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_CONNECTION);
-- } else if (wIndex == 2) {
-- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_CONNECTION);
-- } else {
-- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_CONNECTION "
-- "with invalid wIndex == %d!", wIndex);
-- }
--
-- OK (0);
-- case (RH_C_PORT_ENABLE):
-- if (wIndex == 1) {
-- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_ENABLE);
-- } else if (wIndex == 2) {
-- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_ENABLE);
-- } else {
-- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_ENABLE "
-- "with invalid wIndex == %d!", wIndex);
-- }
-- OK (0);
-- case (RH_C_PORT_SUSPEND):
--/*** WR_RH_PORTSTAT(RH_PS_PSSC); */
-- OK (0);
-- case (RH_C_PORT_OVER_CURRENT):
-- OK (0); /* port power over current ** */
-- case (RH_C_PORT_RESET):
-- if (wIndex == 1) {
-- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_RESET);
-- } else if (wIndex == 2) {
-- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_RESET);
-- } else {
-- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_RESET "
-- "with invalid index == %d!", wIndex);
-- }
--
-- OK (0);
--
-- }
-- break;
--
-- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
-- switch (wValue) {
-- case (RH_PORT_SUSPEND):
--
-- /* Make sure the controller isn't busy. */
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- if (wIndex == 1) {
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port1) |
-- IO_STATE(R_USB_COMMAND, port_cmd, suspend) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
-- } else if (wIndex == 2) {
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port2) |
-- IO_STATE(R_USB_COMMAND, port_cmd, suspend) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
-- } else {
-- dbg_rh("RH_SET_FEATURE->RH_PORT_SUSPEND "
-- "with invalid wIndex == %d!", wIndex);
-- }
--
-- OK (0);
-- case (RH_PORT_RESET):
-- if (wIndex == 1) {
--
-- port_1_reset:
-- dbg_rh("Doing reset of port 1");
--
-- /* Make sure the controller isn't busy. */
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port1) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
--
-- /* We must wait at least 10 ms for the device to recover.
-- 15 ms should be enough. */
-- udelay(15000);
--
-- /* Wait for reset bit to go low (should be done by now). */
-- while (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes));
--
-- /* If the port status is
-- 1) connected and enabled then there is a device and everything is fine
-- 2) neither connected nor enabled then there is no device, also fine
-- 3) connected and not enabled then we try again
-- (Yes, there are other port status combinations besides these.) */
--
-- if ((hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) &&
-- (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no))) {
-- dbg_rh("Connected device on port 1, but port not enabled?"
-- " Trying reset again.");
-- goto port_2_reset;
-- }
--
-- /* Diagnostic printouts. */
-- if ((hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, no)) &&
-- (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no))) {
-- dbg_rh("No connected device on port 1");
-- } else if ((hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) &&
-- (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes))) {
-- dbg_rh("Connected device on port 1, port 1 enabled");
-- }
--
-- } else if (wIndex == 2) {
--
-- port_2_reset:
-- dbg_rh("Doing reset of port 2");
--
-- /* Make sure the controller isn't busy. */
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- /* Issue the reset command. */
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, port2) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
--
-- /* We must wait at least 10 ms for the device to recover.
-- 15 ms should be enough. */
-- udelay(15000);
--
-- /* Wait for reset bit to go low (should be done by now). */
-- while (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, reset, yes));
--
-- /* If the port status is
-- 1) connected and enabled then there is a device and everything is fine
-- 2) neither connected nor enabled then there is no device, also fine
-- 3) connected and not enabled then we try again
-- (Yes, there are other port status combinations besides these.) */
--
-- if ((hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, yes)) &&
-- (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no))) {
-- dbg_rh("Connected device on port 2, but port not enabled?"
-- " Trying reset again.");
-- goto port_2_reset;
-- }
--
-- /* Diagnostic printouts. */
-- if ((hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, no)) &&
-- (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no))) {
-- dbg_rh("No connected device on port 2");
-- } else if ((hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, yes)) &&
-- (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes))) {
-- dbg_rh("Connected device on port 2, port 2 enabled");
-- }
--
-- } else {
-- dbg_rh("RH_SET_FEATURE->RH_PORT_RESET with invalid wIndex = %d", wIndex);
-- }
--
-- /* Make sure the controller isn't busy. */
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- /* If all enabled ports were disabled the host controller goes down into
-- started mode, so we need to bring it back into the running state.
-- (This is safe even if it's already in the running state.) */
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, nop) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
--
-- dbg_rh("...Done");
-- OK(0);
--
-- case (RH_PORT_POWER):
-- OK (0); /* port power ** */
-- case (RH_PORT_ENABLE):
-- /* There is no port enable command in the host controller, so if the
-- port is already enabled, we do nothing. If not, we reset the port
-- (with an ugly goto). */
--
-- if (wIndex == 1) {
-- if (hc->rh.prev_wPortStatus_1 &
-- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no)) {
-- goto port_1_reset;
-- }
-- } else if (wIndex == 2) {
-- if (hc->rh.prev_wPortStatus_2 &
-- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no)) {
-- goto port_2_reset;
-- }
-- } else {
-- dbg_rh("RH_SET_FEATURE->RH_GET_STATUS with invalid wIndex = %d", wIndex);
-- }
-- OK (0);
-- }
-- break;
--
-- case RH_SET_ADDRESS:
-- hc->rh.devnum = wValue;
-- dbg_rh("RH address set to: %d", hc->rh.devnum);
-- OK (0);
--
-- case RH_GET_DESCRIPTOR:
-- switch ((wValue & 0xff00) >> 8) {
-- case (0x01): /* device descriptor */
-- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_dev_des), wLength));
-- memcpy (data, root_hub_dev_des, len);
-- OK (len);
-- case (0x02): /* configuration descriptor */
-- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_config_des), wLength));
-- memcpy (data, root_hub_config_des, len);
-- OK (len);
-- case (0x03): /* string descriptors */
-- len = usb_root_hub_string (wValue & 0xff,
-- 0xff, "ETRAX 100LX",
-- data, wLength);
-- if (len > 0) {
-- OK(min(leni, len));
-- } else {
-- stat = -EPIPE;
-- }
--
-- }
-- break;
--
-- case RH_GET_DESCRIPTOR | RH_CLASS:
-- root_hub_hub_des[2] = hc->rh.numports;
-- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_hub_des), wLength));
-- memcpy (data, root_hub_hub_des, len);
-- OK (len);
--
-- case RH_GET_CONFIGURATION:
-- *(__u8 *) data = 0x01;
-- OK (1);
--
-- case RH_SET_CONFIGURATION:
-- OK (0);
--
-- default:
-- stat = -EPIPE;
-- }
--
-- urb->actual_length = len;
-- urb->status = stat;
-- urb->dev = NULL;
-- if (urb->complete) {
-- urb->complete(urb, NULL);
-- }
-- DBFEXIT;
--
-- return 0;
--}
--
--static void
--etrax_usb_bulk_eot_timer_func(unsigned long dummy)
--{
-- /* Because of a race condition in the top half, we might miss a bulk eot.
-- This timer "simulates" a bulk eot if we don't get one for a while, hopefully
-- correcting the situation. */
-- dbg_bulk("bulk_eot_timer timed out.");
-- etrax_usb_hc_bulk_eot_interrupt(1);
--}
--
--static void*
--etrax_usb_buffer_alloc(struct usb_bus* bus, size_t size,
-- unsigned mem_flags, dma_addr_t *dma)
--{
-- return kmalloc(size, mem_flags);
--}
--
--static void
--etrax_usb_buffer_free(struct usb_bus *bus, size_t size, void *addr, dma_addr_t dma)
--{
-- kfree(addr);
--}
--
--
--static struct device fake_device;
--
--static int __init etrax_usb_hc_init(void)
--{
-- static etrax_hc_t *hc;
-- struct usb_bus *bus;
-- struct usb_device *usb_rh;
-- int i;
--
-- DBFENTER;
--
-- info("ETRAX 100LX USB-HCD %s (c) 2001-2003 Axis Communications AB\n", usb_hcd_version);
--
-- hc = kmalloc(sizeof(etrax_hc_t), GFP_KERNEL);
-- assert(hc != NULL);
--
-- /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
-- /* Note that we specify sizeof(USB_EP_Desc_t) as the size, but also allocate
-- SB descriptors from this cache. This is ok since sizeof(USB_EP_Desc_t) ==
-- sizeof(USB_SB_Desc_t). */
--
-- usb_desc_cache = kmem_cache_create("usb_desc_cache", sizeof(USB_EP_Desc_t), 0,
-- SLAB_HWCACHE_ALIGN, 0, 0);
-- assert(usb_desc_cache != NULL);
--
-- top_half_reg_cache = kmem_cache_create("top_half_reg_cache",
-- sizeof(usb_interrupt_registers_t),
-- 0, SLAB_HWCACHE_ALIGN, 0, 0);
-- assert(top_half_reg_cache != NULL);
--
-- isoc_compl_cache = kmem_cache_create("isoc_compl_cache",
-- sizeof(usb_isoc_complete_data_t),
-- 0, SLAB_HWCACHE_ALIGN, 0, 0);
-- assert(isoc_compl_cache != NULL);
--
-- etrax_usb_bus = bus = usb_alloc_bus(&etrax_usb_device_operations);
-- hc->bus = bus;
-- bus->bus_name="ETRAX 100LX";
-- bus->hcpriv = hc;
--
-- /* Initialize RH to the default address.
-- And make sure that we have no status change indication */
-- hc->rh.numports = 2; /* The RH has two ports */
-- hc->rh.devnum = 1;
-- hc->rh.wPortChange_1 = 0;
-- hc->rh.wPortChange_2 = 0;
--
-- /* Also initate the previous values to zero */
-- hc->rh.prev_wPortStatus_1 = 0;
-- hc->rh.prev_wPortStatus_2 = 0;
--
-- /* Initialize the intr-traffic flags */
-- /* FIXME: This isn't used. (Besides, the error field isn't initialized.) */
-- hc->intr.sleeping = 0;
-- hc->intr.wq = NULL;
--
-- epid_usage_bitmask = 0;
-- epid_out_traffic = 0;
--
-- /* Mark the invalid epid as being used. */
-- set_bit(INVALID_EPID, (void *)&epid_usage_bitmask);
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, INVALID_EPID);
-- nop();
-- /* The valid bit should still be set ('invalid' is in our world; not the hardware's). */
-- *R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, yes) |
-- IO_FIELD(R_USB_EPT_DATA, max_len, 1));
--
-- /* Mark the dummy epid as being used. */
-- set_bit(DUMMY_EPID, (void *)&epid_usage_bitmask);
-- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, DUMMY_EPID);
-- nop();
-- *R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, no) |
-- IO_FIELD(R_USB_EPT_DATA, max_len, 1));
--
-- /* Initialize the urb list by initiating a head for each list. */
-- for (i = 0; i < NBR_OF_EPIDS; i++) {
-- INIT_LIST_HEAD(&urb_list[i]);
-- }
-- spin_lock_init(&urb_list_lock);
--
-- INIT_LIST_HEAD(&urb_unlink_list);
--
--
-- /* Initiate the bulk start timer. */
-- init_timer(&bulk_start_timer);
-- bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
-- bulk_start_timer.function = etrax_usb_bulk_start_timer_func;
-- add_timer(&bulk_start_timer);
--
--
-- /* Initiate the bulk eot timer. */
-- init_timer(&bulk_eot_timer);
-- bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
-- bulk_eot_timer.function = etrax_usb_bulk_eot_timer_func;
-- add_timer(&bulk_eot_timer);
--
-- /* Set up the data structures for USB traffic. Note that this must be done before
-- any interrupt that relies on sane DMA list occurrs. */
-- init_rx_buffers();
-- init_tx_bulk_ep();
-- init_tx_ctrl_ep();
-- init_tx_intr_ep();
-- init_tx_isoc_ep();
--
-- device_initialize(&fake_device);
-- kobject_set_name(&fake_device.kobj, "etrax_usb");
-- kobject_add(&fake_device.kobj);
-- kobject_uevent(&fake_device.kobj, KOBJ_ADD);
-- hc->bus->controller = &fake_device;
-- usb_register_bus(hc->bus);
--
-- *R_IRQ_MASK2_SET =
-- /* Note that these interrupts are not used. */
-- IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
-- /* Sub channel 1 (ctrl) descr. interrupts are used. */
-- IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
-- IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
-- /* Sub channel 3 (isoc) descr. interrupts are used. */
-- IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
--
-- /* Note that the dma9_descr interrupt is not used. */
-- *R_IRQ_MASK2_SET =
-- IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
-- IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
--
-- /* FIXME: Enable iso_eof only when isoc traffic is running. */
-- *R_USB_IRQ_MASK_SET =
-- IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) |
-- IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
-- IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
-- IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
-- IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
--
--
-- if (request_irq(ETRAX_USB_HC_IRQ, etrax_usb_hc_interrupt_top_half, 0,
-- "ETRAX 100LX built-in USB (HC)", hc)) {
-- err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
-- etrax_usb_hc_cleanup();
-- DBFEXIT;
-- return -1;
-- }
--
-- if (request_irq(ETRAX_USB_RX_IRQ, etrax_usb_rx_interrupt, 0,
-- "ETRAX 100LX built-in USB (Rx)", hc)) {
-- err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
-- etrax_usb_hc_cleanup();
-- DBFEXIT;
-- return -1;
-- }
--
-- if (request_irq(ETRAX_USB_TX_IRQ, etrax_usb_tx_interrupt, 0,
-- "ETRAX 100LX built-in USB (Tx)", hc)) {
-- err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
-- etrax_usb_hc_cleanup();
-- DBFEXIT;
-- return -1;
-- }
--
-- /* R_USB_COMMAND:
-- USB commands in host mode. The fields in this register should all be
-- written to in one write. Do not read-modify-write one field at a time. A
-- write to this register will trigger events in the USB controller and an
-- incomplete command may lead to unpredictable results, and in worst case
-- even to a deadlock in the controller.
-- (Note however that the busy field is read-only, so no need to write to it.) */
--
-- /* Check the busy bit before writing to R_USB_COMMAND. */
--
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- /* Reset the USB interface. */
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, nop) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
--
-- /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to 0x2A30 (10800),
-- to guarantee that control traffic gets 10% of the bandwidth, and periodic transfer may
-- allocate the rest (90%). This doesn't work though. Read on for a lenghty explanation.
--
-- While there is a difference between rev. 2 and rev. 3 of the ETRAX 100LX regarding the NAK
-- behaviour, it doesn't solve this problem. What happens is that a control transfer will not
-- be interrupted in its data stage when PSTART happens (the point at which periodic traffic
-- is started). Thus, if PSTART is set to 10800 and its IN or OUT token is NAKed until just before
-- PSTART happens, it will continue the IN/OUT transfer as long as it's ACKed. After it's done,
-- there may be too little time left for an isochronous transfer, causing an epid attention
-- interrupt due to perror. The work-around for this is to let the control transfers run at the
-- end of the frame instead of at the beginning, and will be interrupted just fine if it doesn't
-- fit into the frame. However, since there will *always* be a control transfer at the beginning
-- of the frame, regardless of what we set PSTART to, that transfer might be a 64-byte transfer
-- which consumes up to 15% of the frame, leaving only 85% for periodic traffic. The solution to
-- this would be to 'dummy allocate' 5% of the frame with the usb_claim_bandwidth function to make
-- sure that the periodic transfers that are inserted will always fit in the frame.
--
-- The idea was suggested that a control transfer could be split up into several 8 byte transfers,
-- so that it would be interrupted by PSTART, but since this can't be done for an IN transfer this
-- hasn't been implemented.
--
-- The value 11960 is chosen to be just after the SOF token, with a couple of bit times extra
-- for possible bit stuffing. */
--
-- *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
--
--#ifdef CONFIG_ETRAX_USB_HOST_PORT1
-- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
--#endif
--
--#ifdef CONFIG_ETRAX_USB_HOST_PORT2
-- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
--#endif
--
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- /* Configure the USB interface as a host controller. */
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, nop) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
--
-- /* Note: Do not reset any ports here. Await the port status interrupts, to have a controlled
-- sequence of resetting the ports. If we reset both ports now, and there are devices
-- on both ports, we will get a bus error because both devices will answer the set address
-- request. */
--
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- /* Start processing of USB traffic. */
-- *R_USB_COMMAND =
-- IO_STATE(R_USB_COMMAND, port_sel, nop) |
-- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
--
-- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
--
-- usb_rh = usb_alloc_dev(NULL, hc->bus, 0);
-- hc->bus->root_hub = usb_rh;
-- usb_rh->state = USB_STATE_ADDRESS;
-- usb_rh->speed = USB_SPEED_FULL;
-- usb_rh->devnum = 1;
-- hc->bus->devnum_next = 2;
-- usb_rh->ep0.desc.wMaxPacketSize = __const_cpu_to_le16(64);
-- usb_get_device_descriptor(usb_rh, USB_DT_DEVICE_SIZE);
-- usb_new_device(usb_rh);
--
-- DBFEXIT;
--
-- return 0;
--}
--
--static void etrax_usb_hc_cleanup(void)
--{
-- DBFENTER;
--
-- free_irq(ETRAX_USB_HC_IRQ, NULL);
-- free_irq(ETRAX_USB_RX_IRQ, NULL);
-- free_irq(ETRAX_USB_TX_IRQ, NULL);
--
-- usb_deregister_bus(etrax_usb_bus);
--
-- /* FIXME: call kmem_cache_destroy here? */
--
-- DBFEXIT;
--}
-
--module_init(etrax_usb_hc_init);
--module_exit(etrax_usb_hc_cleanup);
-+/* Module hooks */
-+module_init(module_hcd_init);
-+module_exit(module_hcd_exit);
---- linux-2.6.19.2.orig/drivers/usb/host/hc-crisv10.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.c 2007-02-26 20:58:29.000000000 +0100
-@@ -0,0 +1,4684 @@
-+/*
-+ *
-+ * ETRAX 100LX USB Host Controller Driver
-+ *
-+ * Copyright (C) 2005, 2006 Axis Communications AB
-+ *
-+ * Author: Konrad Eriksson <konrad.eriksson@axis.se>
-+ *
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/moduleparam.h>
-+#include <linux/spinlock.h>
-+#include <linux/usb.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/io.h>
-+#include <asm/irq.h>
-+#include <asm/arch/dma.h>
-+#include <asm/arch/io_interface_mux.h>
-+
-+#include "../core/hcd.h"
-+#include "../core/hub.h"
-+#include "hc-crisv10.h"
-+#include "hc-cris-dbg.h"
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Host Controller settings */
-+/***************************************************************************/
-+/***************************************************************************/
-+
-+#define VERSION "1.00"
-+#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
-+#define DESCRIPTION "ETRAX 100LX USB Host Controller"
-+
-+#define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
-+#define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
-+#define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
-+
-+/* Number of physical ports in Etrax 100LX */
-+#define USB_ROOT_HUB_PORTS 2
-+
-+const char hc_name[] = "hc-crisv10";
-+const char product_desc[] = DESCRIPTION;
-+
-+/* The number of epids is, among other things, used for pre-allocating
-+ ctrl, bulk and isoc EP descriptors (one for each epid).
-+ Assumed to be > 1 when initiating the DMA lists. */
-+#define NBR_OF_EPIDS 32
-+
-+/* Support interrupt traffic intervals up to 128 ms. */
-+#define MAX_INTR_INTERVAL 128
-+
-+/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
-+ table must be "invalid". By this we mean that we shouldn't care about epid
-+ attentions for this epid, or at least handle them differently from epid
-+ attentions for "valid" epids. This define determines which one to use
-+ (don't change it). */
-+#define INVALID_EPID 31
-+/* A special epid for the bulk dummys. */
-+#define DUMMY_EPID 30
-+
-+/* Module settings */
-+
-+MODULE_DESCRIPTION(DESCRIPTION);
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
-+
-+
-+/* Module parameters */
-+
-+/* 0 = No ports enabled
-+ 1 = Only port 1 enabled (on board ethernet on devboard)
-+ 2 = Only port 2 enabled (external connector on devboard)
-+ 3 = Both ports enabled
-+*/
-+static unsigned int ports = 3;
-+module_param(ports, uint, S_IRUGO);
-+MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Shared global variables for this module */
-+/***************************************************************************/
-+/***************************************************************************/
-+
-+/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
-+static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-+
-+static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-+
-+/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
-+static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
-+static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
-+
-+static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-+static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
-+
-+static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
-+
-+/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
-+ causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
-+ gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
-+ EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
-+ in each frame. */
-+static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
-+
-+/* List of URB pointers, where each points to the active URB for a epid.
-+ For Bulk, Ctrl and Intr this means which URB that currently is added to
-+ DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
-+ URB has completed is the queue examined and the first URB in queue is
-+ removed and moved to the activeUrbList while its state change to STARTED and
-+ its transfer(s) gets added to DMA list (exception Isoc where URBs enter
-+ state STARTED directly and added transfers added to DMA lists). */
-+static struct urb *activeUrbList[NBR_OF_EPIDS];
-+
-+/* Additional software state info for each epid */
-+static struct etrax_epid epid_state[NBR_OF_EPIDS];
-+
-+/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
-+ even if there is new data waiting to be processed */
-+static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
-+static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
-+
-+/* We want the start timer to expire before the eot timer, because the former
-+ might start traffic, thus making it unnecessary for the latter to time
-+ out. */
-+#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
-+#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
-+
-+/* Delay before a URB completion happen when it's scheduled to be delayed */
-+#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
-+
-+/* Simplifying macros for checking software state info of a epid */
-+/* ----------------------------------------------------------------------- */
-+#define epid_inuse(epid) epid_state[epid].inuse
-+#define epid_out_traffic(epid) epid_state[epid].out_traffic
-+#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
-+#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* DEBUG FUNCTIONS */
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Note that these functions are always available in their "__" variants,
-+ for use in error situations. The "__" missing variants are controlled by
-+ the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
-+static void __dump_urb(struct urb* purb)
-+{
-+ struct crisv10_urb_priv *urb_priv = purb->hcpriv;
-+ int urb_num = -1;
-+ if(urb_priv) {
-+ urb_num = urb_priv->urb_num;
-+ }
-+ printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
-+ printk("dev :0x%08lx\n", (unsigned long)purb->dev);
-+ printk("pipe :0x%08x\n", purb->pipe);
-+ printk("status :%d\n", purb->status);
-+ printk("transfer_flags :0x%08x\n", purb->transfer_flags);
-+ printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
-+ printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
-+ printk("actual_length :%d\n", purb->actual_length);
-+ printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
-+ printk("start_frame :%d\n", purb->start_frame);
-+ printk("number_of_packets :%d\n", purb->number_of_packets);
-+ printk("interval :%d\n", purb->interval);
-+ printk("error_count :%d\n", purb->error_count);
-+ printk("context :0x%08lx\n", (unsigned long)purb->context);
-+ printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
-+}
-+
-+static void __dump_in_desc(volatile struct USB_IN_Desc *in)
-+{
-+ printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
-+ printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
-+ printk(" command : 0x%04x\n", in->command);
-+ printk(" next : 0x%08lx\n", in->next);
-+ printk(" buf : 0x%08lx\n", in->buf);
-+ printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
-+ printk(" status : 0x%04x\n\n", in->status);
-+}
-+
-+static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
-+{
-+ char tt = (sb->command & 0x30) >> 4;
-+ char *tt_string;
-+
-+ switch (tt) {
-+ case 0:
-+ tt_string = "zout";
-+ break;
-+ case 1:
-+ tt_string = "in";
-+ break;
-+ case 2:
-+ tt_string = "out";
-+ break;
-+ case 3:
-+ tt_string = "setup";
-+ break;
-+ default:
-+ tt_string = "unknown (weird)";
-+ }
-+
-+ printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
-+ printk(" command:0x%04x (", sb->command);
-+ printk("rem:%d ", (sb->command & 0x3f00) >> 8);
-+ printk("full:%d ", (sb->command & 0x40) >> 6);
-+ printk("tt:%d(%s) ", tt, tt_string);
-+ printk("intr:%d ", (sb->command & 0x8) >> 3);
-+ printk("eot:%d ", (sb->command & 0x2) >> 1);
-+ printk("eol:%d)", sb->command & 0x1);
-+ printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
-+ printk(" next:0x%08lx", sb->next);
-+ printk(" buf:0x%08lx\n", sb->buf);
-+}
-+
-+
-+static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
-+{
-+ printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
-+ printk(" command:0x%04x (", ep->command);
-+ printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
-+ printk("enable:%d ", (ep->command & 0x10) >> 4);
-+ printk("intr:%d ", (ep->command & 0x8) >> 3);
-+ printk("eof:%d ", (ep->command & 0x2) >> 1);
-+ printk("eol:%d)", ep->command & 0x1);
-+ printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
-+ printk(" next:0x%08lx", ep->next);
-+ printk(" sub:0x%08lx\n", ep->sub);
-+}
-+
-+static inline void __dump_ep_list(int pipe_type)
-+{
-+ volatile struct USB_EP_Desc *ep;
-+ volatile struct USB_EP_Desc *first_ep;
-+ volatile struct USB_SB_Desc *sb;
-+
-+ switch (pipe_type)
-+ {
-+ case PIPE_BULK:
-+ first_ep = &TxBulkEPList[0];
-+ break;
-+ case PIPE_CONTROL:
-+ first_ep = &TxCtrlEPList[0];
-+ break;
-+ case PIPE_INTERRUPT:
-+ first_ep = &TxIntrEPList[0];
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ first_ep = &TxIsocEPList[0];
-+ break;
-+ default:
-+ warn("Cannot dump unknown traffic type");
-+ return;
-+ }
-+ ep = first_ep;
-+
-+ printk("\n\nDumping EP list...\n\n");
-+
-+ do {
-+ __dump_ep_desc(ep);
-+ /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
-+ sb = ep->sub ? phys_to_virt(ep->sub) : 0;
-+ while (sb) {
-+ __dump_sb_desc(sb);
-+ sb = sb->next ? phys_to_virt(sb->next) : 0;
-+ }
-+ ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
-+
-+ } while (ep != first_ep);
-+}
-+
-+static inline void __dump_ept_data(int epid)
-+{
-+ unsigned long flags;
-+ __u32 r_usb_ept_data;
-+
-+ if (epid < 0 || epid > 31) {
-+ printk("Cannot dump ept data for invalid epid %d\n", epid);
-+ return;
-+ }
-+
-+ local_irq_save(flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ r_usb_ept_data = *R_USB_EPT_DATA;
-+ local_irq_restore(flags);
-+
-+ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
-+ if (r_usb_ept_data == 0) {
-+ /* No need for more detailed printing. */
-+ return;
-+ }
-+ printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
-+ printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
-+ printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
-+ printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
-+ printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
-+ printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
-+ printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
-+ printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
-+ printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
-+ printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
-+ printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
-+ printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
-+}
-+
-+static inline void __dump_ept_data_iso(int epid)
-+{
-+ unsigned long flags;
-+ __u32 ept_data;
-+
-+ if (epid < 0 || epid > 31) {
-+ printk("Cannot dump ept data for invalid epid %d\n", epid);
-+ return;
-+ }
-+
-+ local_irq_save(flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ ept_data = *R_USB_EPT_DATA_ISO;
-+ local_irq_restore(flags);
-+
-+ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
-+ if (ept_data == 0) {
-+ /* No need for more detailed printing. */
-+ return;
-+ }
-+ printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
-+ ept_data));
-+ printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
-+ ept_data));
-+ printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
-+ ept_data));
-+ printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
-+ ept_data));
-+ printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
-+ ept_data));
-+ printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
-+ ept_data));
-+}
-+
-+static inline void __dump_ept_data_list(void)
-+{
-+ int i;
-+
-+ printk("Dumping the whole R_USB_EPT_DATA list\n");
-+
-+ for (i = 0; i < 32; i++) {
-+ __dump_ept_data(i);
-+ }
-+}
-+
-+static void debug_epid(int epid) {
-+ int i;
-+
-+ if(epid_isoc(epid)) {
-+ __dump_ept_data_iso(epid);
-+ } else {
-+ __dump_ept_data(epid);
-+ }
-+
-+ printk("Bulk:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
-+ }
-+ }
-+
-+ printk("Ctrl:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
-+ }
-+ }
-+
-+ printk("Intr:\n");
-+ for(i = 0; i < MAX_INTR_INTERVAL; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
-+ }
-+ }
-+
-+ printk("Isoc:\n");
-+ for(i = 0; i < 32; i++) {
-+ if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
-+ epid) {
-+ printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
-+ }
-+ }
-+
-+ __dump_ept_data_list();
-+ __dump_ep_list(PIPE_INTERRUPT);
-+ printk("\n\n");
-+}
-+
-+
-+
-+char* hcd_status_to_str(__u8 bUsbStatus) {
-+ static char hcd_status_str[128];
-+ hcd_status_str[0] = '\0';
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
-+ strcat(hcd_status_str, "ourun ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
-+ strcat(hcd_status_str, "perror ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
-+ strcat(hcd_status_str, "device_mode ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
-+ strcat(hcd_status_str, "host_mode ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
-+ strcat(hcd_status_str, "started ");
-+ }
-+ if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
-+ strcat(hcd_status_str, "running ");
-+ }
-+ return hcd_status_str;
-+}
-+
-+
-+char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
-+ static char sblist_to_str_buff[128];
-+ char tmp[32], tmp2[32];
-+ sblist_to_str_buff[0] = '\0';
-+ while(sb_desc != NULL) {
-+ switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
-+ case 0: sprintf(tmp, "zout"); break;
-+ case 1: sprintf(tmp, "in"); break;
-+ case 2: sprintf(tmp, "out"); break;
-+ case 3: sprintf(tmp, "setup"); break;
-+ }
-+ sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
-+ strcat(sblist_to_str_buff, tmp2);
-+ if(sb_desc->next != 0) {
-+ sb_desc = phys_to_virt(sb_desc->next);
-+ } else {
-+ sb_desc = NULL;
-+ }
-+ }
-+ return sblist_to_str_buff;
-+}
-+
-+char* port_status_to_str(__u16 wPortStatus) {
-+ static char port_status_str[128];
-+ port_status_str[0] = '\0';
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
-+ strcat(port_status_str, "connected ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
-+ strcat(port_status_str, "enabled ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
-+ strcat(port_status_str, "suspended ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
-+ strcat(port_status_str, "reset ");
-+ }
-+ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
-+ strcat(port_status_str, "full-speed ");
-+ } else {
-+ strcat(port_status_str, "low-speed ");
-+ }
-+ return port_status_str;
-+}
-+
-+
-+char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
-+ static char endpoint_to_str_buff[128];
-+ char tmp[32];
-+ int epnum = ed->bEndpointAddress & 0x0F;
-+ int dir = ed->bEndpointAddress & 0x80;
-+ int type = ed->bmAttributes & 0x03;
-+ endpoint_to_str_buff[0] = '\0';
-+ sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
-+ switch(type) {
-+ case 0:
-+ sprintf(tmp, " ctrl");
-+ break;
-+ case 1:
-+ sprintf(tmp, " isoc");
-+ break;
-+ case 2:
-+ sprintf(tmp, " bulk");
-+ break;
-+ case 3:
-+ sprintf(tmp, " intr");
-+ break;
-+ }
-+ strcat(endpoint_to_str_buff, tmp);
-+ if(dir) {
-+ sprintf(tmp, " in");
-+ } else {
-+ sprintf(tmp, " out");
-+ }
-+ strcat(endpoint_to_str_buff, tmp);
-+
-+ return endpoint_to_str_buff;
-+}
-+
-+/* Debug helper functions for Transfer Controller */
-+char* pipe_to_str(unsigned int pipe) {
-+ static char pipe_to_str_buff[128];
-+ char tmp[64];
-+ sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
-+ sprintf(tmp, " type:%s", str_type(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+
-+ sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+ sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
-+ strcat(pipe_to_str_buff, tmp);
-+ return pipe_to_str_buff;
-+}
-+
-+
-+#define USB_DEBUG_DESC 1
-+
-+#ifdef USB_DEBUG_DESC
-+#define dump_in_desc(x) __dump_in_desc(x)
-+#define dump_sb_desc(...) __dump_sb_desc(...)
-+#define dump_ep_desc(x) __dump_ep_desc(x)
-+#define dump_ept_data(x) __dump_ept_data(x)
-+#else
-+#define dump_in_desc(...) do {} while (0)
-+#define dump_sb_desc(...) do {} while (0)
-+#define dump_ep_desc(...) do {} while (0)
-+#endif
-+
-+
-+/* Uncomment this to enable massive function call trace
-+ #define USB_DEBUG_TRACE */
-+
-+#ifdef USB_DEBUG_TRACE
-+#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
-+#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
-+#else
-+#define DBFENTER do {} while (0)
-+#define DBFEXIT do {} while (0)
-+#endif
-+
-+#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
-+{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
-+
-+/* Most helpful debugging aid */
-+#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
-+
-+
-+/***************************************************************************/
-+/***************************************************************************/
-+/* Forward declarations */
-+/***************************************************************************/
-+/***************************************************************************/
-+void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
-+void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
-+
-+void rh_port_status_change(__u16[]);
-+int rh_clear_port_feature(__u8, __u16);
-+int rh_set_port_feature(__u8, __u16);
-+static void rh_disable_port(unsigned int port);
-+
-+static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
-+ int timer);
-+
-+static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
-+ int mem_flags);
-+static void tc_free_epid(struct usb_host_endpoint *ep);
-+static int tc_allocate_epid(void);
-+static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
-+static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
-+ int status);
-+
-+static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
-+ int mem_flags);
-+static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
-+
-+static inline struct urb *urb_list_first(int epid);
-+static inline void urb_list_add(struct urb *urb, int epid,
-+ int mem_flags);
-+static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
-+static inline void urb_list_del(struct urb *urb, int epid);
-+static inline void urb_list_move_last(struct urb *urb, int epid);
-+static inline struct urb *urb_list_next(struct urb *urb, int epid);
-+
-+int create_sb_for_urb(struct urb *urb, int mem_flags);
-+int init_intr_urb(struct urb *urb, int mem_flags);
-+
-+static inline void etrax_epid_set(__u8 index, __u32 data);
-+static inline void etrax_epid_clear_error(__u8 index);
-+static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
-+ __u8 toggle);
-+static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
-+static inline __u32 etrax_epid_get(__u8 index);
-+
-+/* We're accessing the same register position in Etrax so
-+ when we do full access the internal difference doesn't matter */
-+#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
-+#define etrax_epid_iso_get(index) etrax_epid_get(index)
-+
-+
-+static void tc_dma_process_isoc_urb(struct urb *urb);
-+static void tc_dma_process_queue(int epid);
-+static void tc_dma_unlink_intr_urb(struct urb *urb);
-+static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
-+static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
-+
-+static void tc_bulk_start_timer_func(unsigned long dummy);
-+static void tc_bulk_eot_timer_func(unsigned long dummy);
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Host Controler Driver block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* HCD operations */
-+static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
-+static int crisv10_hcd_reset(struct usb_hcd *);
-+static int crisv10_hcd_start(struct usb_hcd *);
-+static void crisv10_hcd_stop(struct usb_hcd *);
-+#ifdef CONFIG_PM
-+static int crisv10_hcd_suspend(struct device *, u32, u32);
-+static int crisv10_hcd_resume(struct device *, u32);
-+#endif /* CONFIG_PM */
-+static int crisv10_hcd_get_frame(struct usb_hcd *);
-+
-+static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
-+static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
-+static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
-+
-+static int rh_status_data_request(struct usb_hcd *, char *);
-+static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
-+
-+#ifdef CONFIG_PM
-+static int crisv10_hcd_hub_suspend(struct usb_hcd *);
-+static int crisv10_hcd_hub_resume(struct usb_hcd *);
-+#endif /* CONFIG_PM */
-+#ifdef CONFIG_USB_OTG
-+static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
-+#endif /* CONFIG_USB_OTG */
-+
-+/* host controller driver interface */
-+static const struct hc_driver crisv10_hc_driver =
-+ {
-+ .description = hc_name,
-+ .product_desc = product_desc,
-+ .hcd_priv_size = sizeof(struct crisv10_hcd),
-+
-+ /* Attaching IRQ handler manualy in probe() */
-+ /* .irq = crisv10_hcd_irq, */
-+
-+ .flags = HCD_USB11,
-+
-+ /* called to init HCD and root hub */
-+ .reset = crisv10_hcd_reset,
-+ .start = crisv10_hcd_start,
-+
-+ /* cleanly make HCD stop writing memory and doing I/O */
-+ .stop = crisv10_hcd_stop,
-+
-+ /* return current frame number */
-+ .get_frame_number = crisv10_hcd_get_frame,
-+
-+
-+ /* Manage i/o requests via the Transfer Controller */
-+ .urb_enqueue = tc_urb_enqueue,
-+ .urb_dequeue = tc_urb_dequeue,
-+
-+ /* hw synch, freeing endpoint resources that urb_dequeue can't */
-+ .endpoint_disable = tc_endpoint_disable,
-+
-+
-+ /* Root Hub support */
-+ .hub_status_data = rh_status_data_request,
-+ .hub_control = rh_control_request,
-+#ifdef CONFIG_PM
-+ .hub_suspend = rh_suspend_request,
-+ .hub_resume = rh_resume_request,
-+#endif /* CONFIG_PM */
-+#ifdef CONFIG_USB_OTG
-+ .start_port_reset = crisv10_hcd_start_port_reset,
-+#endif /* CONFIG_USB_OTG */
-+ };
-+
-+
-+/*
-+ * conversion between pointers to a hcd and the corresponding
-+ * crisv10_hcd
-+ */
-+
-+static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
-+{
-+ return (struct crisv10_hcd *) hcd->hcd_priv;
-+}
-+
-+static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
-+{
-+ return container_of((void *) hcd, struct usb_hcd, hcd_priv);
-+}
-+
-+/* check if specified port is in use */
-+static inline int port_in_use(unsigned int port)
-+{
-+ return ports & (1 << port);
-+}
-+
-+/* number of ports in use */
-+static inline unsigned int num_ports(void)
-+{
-+ unsigned int i, num = 0;
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
-+ if (port_in_use(i))
-+ num++;
-+ return num;
-+}
-+
-+/* map hub port number to the port number used internally by the HC */
-+static inline unsigned int map_port(unsigned int port)
-+{
-+ unsigned int i, num = 0;
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
-+ if (port_in_use(i))
-+ if (++num == port)
-+ return i;
-+ return -1;
-+}
-+
-+/* size of descriptors in slab cache */
-+#ifndef MAX
-+#define MAX(x, y) ((x) > (y) ? (x) : (y))
-+#endif
-+
-+
-+/******************************************************************/
-+/* Hardware Interrupt functions */
-+/******************************************************************/
-+
-+/* Fast interrupt handler for HC */
-+static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
-+{
-+ struct usb_hcd *hcd = vcd;
-+ struct crisv10_irq_reg reg;
-+ __u32 irq_mask;
-+ unsigned long flags;
-+
-+ DBFENTER;
-+
-+ ASSERT(hcd != NULL);
-+ reg.hcd = hcd;
-+
-+ /* Turn of other interrupts while handling these sensitive cases */
-+ local_irq_save(flags);
-+
-+ /* Read out which interrupts that are flaged */
-+ irq_mask = *R_USB_IRQ_MASK_READ;
-+ reg.r_usb_irq_mask_read = irq_mask;
-+
-+ /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
-+ R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
-+ clears the ourun and perror fields of R_USB_STATUS. */
-+ reg.r_usb_status = *R_USB_STATUS;
-+
-+ /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
-+ interrupts. */
-+ reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
-+
-+ /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
-+ port_status interrupt. */
-+ reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
-+ reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
-+
-+ /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
-+ /* Note: the lower 11 bits contain the actual frame number, sent with each
-+ sof. */
-+ reg.r_usb_fm_number = *R_USB_FM_NUMBER;
-+
-+ /* Interrupts are handled in order of priority. */
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
-+ crisv10_hcd_port_status_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
-+ crisv10_hcd_epid_attn_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
-+ crisv10_hcd_ctl_status_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
-+ crisv10_hcd_isoc_eof_irq(®);
-+ }
-+ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
-+ /* Update/restart the bulk start timer since obviously the channel is
-+ running. */
-+ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-+ /* Update/restart the bulk eot timer since we just received an bulk eot
-+ interrupt. */
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+
-+ /* Check for finished bulk transfers on epids */
-+ check_finished_bulk_tx_epids(hcd, 0);
-+ }
-+ local_irq_restore(flags);
-+
-+ DBFEXIT;
-+ return IRQ_HANDLED;
-+}
-+
-+
-+void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
-+ struct usb_hcd *hcd = reg->hcd;
-+ struct crisv10_urb_priv *urb_priv;
-+ int epid;
-+ DBFENTER;
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
-+ struct urb *urb;
-+ __u32 ept_data;
-+ int error_code;
-+
-+ if (epid == DUMMY_EPID || epid == INVALID_EPID) {
-+ /* We definitely don't care about these ones. Besides, they are
-+ always disabled, so any possible disabling caused by the
-+ epid attention interrupt is irrelevant. */
-+ warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
-+ continue;
-+ }
-+
-+ if(!epid_inuse(epid)) {
-+ irq_err("Epid attention on epid:%d that isn't in use\n", epid);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ debug_epid(epid);
-+ continue;
-+ }
-+
-+ /* Note that although there are separate R_USB_EPT_DATA and
-+ R_USB_EPT_DATA_ISO registers, they are located at the same address and
-+ are of the same size. In other words, this read should be ok for isoc
-+ also. */
-+ ept_data = etrax_epid_get(epid);
-+ error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
-+
-+ /* Get the active URB for this epid. We blatantly assume
-+ that only this URB could have caused the epid attention. */
-+ urb = activeUrbList[epid];
-+ if (urb == NULL) {
-+ irq_err("Attention on epid:%d error:%d with no active URB.\n",
-+ epid, error_code);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ debug_epid(epid);
-+ continue;
-+ }
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
-+ if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+
-+ /* Isoc traffic doesn't have error_count_in/error_count_out. */
-+ if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
-+ (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
-+ IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
-+ /* Check if URB allready is marked for late-finish, we can get
-+ several 3rd error for Intr traffic when a device is unplugged */
-+ if(urb_priv->later_data == NULL) {
-+ /* 3rd error. */
-+ irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe),
-+ (unsigned int)urb, urb_priv->urb_num);
-+
-+ tc_finish_urb_later(hcd, urb, -EPROTO);
-+ }
-+
-+ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
-+ irq_warn("Perror for epid:%d\n", epid);
-+ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-+
-+ if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
-+ /* invalid ep_id */
-+ panic("Perror because of invalid epid."
-+ " Deconfigured too early?");
-+ } else {
-+ /* past eof1, near eof, zout transfer, setup transfer */
-+ /* Dump the urb and the relevant EP descriptor. */
-+ panic("Something wrong with DMA descriptor contents."
-+ " Too much traffic inserted?");
-+ }
-+ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-+ /* buffer ourun */
-+ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-+
-+ panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
-+ } else {
-+ irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
-+ __dump_urb(urb);
-+ debug_epid(epid);
-+ }
-+
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ stall)) {
-+ /* Not really a protocol error, just says that the endpoint gave
-+ a stall response. Note that error_code cannot be stall for isoc. */
-+ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-+ panic("Isoc traffic cannot stall");
-+ }
-+
-+ tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
-+ tc_finish_urb(hcd, urb, -EPIPE);
-+
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ bus_error)) {
-+ /* Two devices responded to a transaction request. Must be resolved
-+ by software. FIXME: Reset ports? */
-+ panic("Bus error for epid %d."
-+ " Two devices responded to transaction request\n",
-+ epid);
-+
-+ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
-+ buffer_error)) {
-+ /* DMA overrun or underrun. */
-+ irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+
-+ /* It seems that error_code = buffer_error in
-+ R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
-+ are the same error. */
-+ tc_finish_urb(hcd, urb, -EPROTO);
-+ } else {
-+ irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
-+ str_dir(urb->pipe), str_type(urb->pipe));
-+ dump_ept_data(epid);
-+ }
-+ }
-+ }
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
-+{
-+ __u16 port_reg[USB_ROOT_HUB_PORTS];
-+ DBFENTER;
-+ port_reg[0] = reg->r_usb_rh_port_status_1;
-+ port_reg[1] = reg->r_usb_rh_port_status_2;
-+ rh_port_status_change(port_reg);
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
-+{
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv *urb_priv;
-+
-+ DBFENTER;
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-+
-+ /* Only check epids that are in use, is valid and has SB list */
-+ if (!epid_inuse(epid) || epid == INVALID_EPID ||
-+ TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
-+ /* Nothing here to see. */
-+ continue;
-+ }
-+ ASSERT(epid_isoc(epid));
-+
-+ /* Get the active URB for this epid (if any). */
-+ urb = activeUrbList[epid];
-+ if (urb == 0) {
-+ isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
-+ continue;
-+ }
-+ if(!epid_out_traffic(epid)) {
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ if (urb_priv->urb_state == NOT_STARTED) {
-+ /* If ASAP is not set and urb->start_frame is the current frame,
-+ start the transfer. */
-+ if (!(urb->transfer_flags & URB_ISO_ASAP) &&
-+ (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
-+ /* EP should not be enabled if we're waiting for start_frame */
-+ ASSERT((TxIsocEPList[epid].command &
-+ IO_STATE(USB_EP_command, enable, yes)) == 0);
-+
-+ isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
-+ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ /* This urb is now active. */
-+ urb_priv->urb_state = STARTED;
-+ continue;
-+ }
-+ }
-+ }
-+ }
-+
-+ DBFEXIT;
-+}
-+
-+void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
-+{
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
-+
-+ DBFENTER;
-+ ASSERT(crisv10_hcd);
-+
-+ irq_dbg("ctr_status_irq, controller status: %s\n",
-+ hcd_status_to_str(reg->r_usb_status));
-+
-+ /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
-+ list for the corresponding epid? */
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
-+ panic("USB controller got ourun.");
-+ }
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
-+
-+ /* Before, etrax_usb_do_intr_recover was called on this epid if it was
-+ an interrupt pipe. I don't see how re-enabling all EP descriptors
-+ will help if there was a programming error. */
-+ panic("USB controller got perror.");
-+ }
-+
-+ /* Keep track of USB Controller, if it's running or not */
-+ if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
-+ crisv10_hcd->running = 1;
-+ } else {
-+ crisv10_hcd->running = 0;
-+ }
-+
-+ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
-+ /* We should never operate in device mode. */
-+ panic("USB controller in device mode.");
-+ }
-+
-+ /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
-+ using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
-+ set_bit(HCD_FLAG_SAW_IRQ, ®->hcd->flags);
-+
-+ DBFEXIT;
-+}
-+
-+
-+/******************************************************************/
-+/* Host Controller interface functions */
-+/******************************************************************/
-+
-+static inline void crisv10_ready_wait(void) {
-+ volatile int timeout = 10000;
-+ /* Check the busy bit of USB controller in Etrax */
-+ while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for USB controller to be idle\n");
-+ }
-+}
-+
-+/* reset host controller */
-+static int crisv10_hcd_reset(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "reset\n");
-+
-+
-+ /* Reset the USB interface. */
-+ /*
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
-+ nop();
-+ */
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* start host controller */
-+static int crisv10_hcd_start(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "start\n");
-+
-+ crisv10_ready_wait();
-+
-+ /* Start processing of USB traffic. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+
-+ nop();
-+
-+ hcd->state = HC_STATE_RUNNING;
-+
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* stop host controller */
-+static void crisv10_hcd_stop(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ hcd_dbg(hcd, "stop\n");
-+ crisv10_hcd_reset(hcd);
-+ DBFEXIT;
-+}
-+
-+/* return the current frame number */
-+static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
-+{
-+ DBFENTER;
-+ DBFEXIT;
-+ return (*R_USB_FM_NUMBER & 0x7ff);
-+}
-+
-+#ifdef CONFIG_USB_OTG
-+
-+static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+#endif /* CONFIG_USB_OTG */
-+
-+
-+/******************************************************************/
-+/* Root Hub functions */
-+/******************************************************************/
-+
-+/* root hub status */
-+static const struct usb_hub_status rh_hub_status =
-+ {
-+ .wHubStatus = 0,
-+ .wHubChange = 0,
-+ };
-+
-+/* root hub descriptor */
-+static const u8 rh_hub_descr[] =
-+ {
-+ 0x09, /* bDescLength */
-+ 0x29, /* bDescriptorType */
-+ USB_ROOT_HUB_PORTS, /* bNbrPorts */
-+ 0x00, /* wHubCharacteristics */
-+ 0x00,
-+ 0x01, /* bPwrOn2pwrGood */
-+ 0x00, /* bHubContrCurrent */
-+ 0x00, /* DeviceRemovable */
-+ 0xff /* PortPwrCtrlMask */
-+ };
-+
-+/* Actual holder of root hub status*/
-+struct crisv10_rh rh;
-+
-+/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
-+int rh_init(void) {
-+ int i;
-+ /* Reset port status flags */
-+ for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
-+ rh.wPortChange[i] = 0;
-+ rh.wPortStatusPrev[i] = 0;
-+ }
-+ return 0;
-+}
-+
-+#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
-+ (1<<USB_PORT_FEAT_ENABLE)|\
-+ (1<<USB_PORT_FEAT_SUSPEND)|\
-+ (1<<USB_PORT_FEAT_RESET))
-+
-+/* Handle port status change interrupt (called from bottom part interrupt) */
-+void rh_port_status_change(__u16 port_reg[]) {
-+ int i;
-+ __u16 wChange;
-+
-+ for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
-+ /* Xor out changes since last read, masked for important flags */
-+ wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
-+ /* Or changes together with (if any) saved changes */
-+ rh.wPortChange[i] |= wChange;
-+ /* Save new status */
-+ rh.wPortStatusPrev[i] = port_reg[i];
-+
-+ if(wChange) {
-+ rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
-+ port_status_to_str(wChange),
-+ port_status_to_str(port_reg[i]));
-+ }
-+ }
-+}
-+
-+/* Construct port status change bitmap for the root hub */
-+static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
-+{
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ unsigned int i;
-+
-+ DBFENTER;
-+ /*
-+ * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
-+ * return bitmap indicating ports with status change
-+ */
-+ *buf = 0;
-+ spin_lock(&crisv10_hcd->lock);
-+ for (i = 1; i <= crisv10_hcd->num_ports; i++) {
-+ if (rh.wPortChange[map_port(i)]) {
-+ *buf |= (1 << i);
-+ rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
-+ port_status_to_str(rh.wPortChange[map_port(i)]),
-+ port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
-+ }
-+ }
-+ spin_unlock(&crisv10_hcd->lock);
-+ DBFEXIT;
-+ return *buf == 0 ? 0 : 1;
-+}
-+
-+/* Handle a control request for the root hub (called from hcd_driver) */
-+static int rh_control_request(struct usb_hcd *hcd,
-+ u16 typeReq,
-+ u16 wValue,
-+ u16 wIndex,
-+ char *buf,
-+ u16 wLength) {
-+
-+ struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ int retval = 0;
-+ int len;
-+ DBFENTER;
-+
-+ switch (typeReq) {
-+ case GetHubDescriptor:
-+ rh_dbg("GetHubDescriptor\n");
-+ len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
-+ memcpy(buf, rh_hub_descr, len);
-+ buf[2] = crisv10_hcd->num_ports;
-+ break;
-+ case GetHubStatus:
-+ rh_dbg("GetHubStatus\n");
-+ len = min_t(unsigned int, sizeof rh_hub_status, wLength);
-+ memcpy(buf, &rh_hub_status, len);
-+ break;
-+ case GetPortStatus:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
-+ port_status_to_str(rh.wPortChange[map_port(wIndex)]),
-+ port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
-+ *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
-+ *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
-+ break;
-+ case SetHubFeature:
-+ rh_dbg("SetHubFeature\n");
-+ case ClearHubFeature:
-+ rh_dbg("ClearHubFeature\n");
-+ switch (wValue) {
-+ case C_HUB_OVER_CURRENT:
-+ case C_HUB_LOCAL_POWER:
-+ rh_warn("Not implemented hub request:%d \n", typeReq);
-+ /* not implemented */
-+ break;
-+ default:
-+ goto error;
-+ }
-+ break;
-+ case SetPortFeature:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ if(rh_set_port_feature(map_port(wIndex), wValue))
-+ goto error;
-+ break;
-+ case ClearPortFeature:
-+ if (!wIndex || wIndex > crisv10_hcd->num_ports)
-+ goto error;
-+ if(rh_clear_port_feature(map_port(wIndex), wValue))
-+ goto error;
-+ break;
-+ default:
-+ rh_warn("Unknown hub request: %d\n", typeReq);
-+ error:
-+ retval = -EPIPE;
-+ }
-+ DBFEXIT;
-+ return retval;
-+}
-+
-+int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
-+ __u8 bUsbCommand = 0;
-+ switch(wFeature) {
-+ case USB_PORT_FEAT_RESET:
-+ rh_dbg("SetPortFeature: reset\n");
-+ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
-+ goto set;
-+ break;
-+ case USB_PORT_FEAT_SUSPEND:
-+ rh_dbg("SetPortFeature: suspend\n");
-+ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
-+ goto set;
-+ break;
-+ case USB_PORT_FEAT_POWER:
-+ rh_dbg("SetPortFeature: power\n");
-+ break;
-+ case USB_PORT_FEAT_C_CONNECTION:
-+ rh_dbg("SetPortFeature: c_connection\n");
-+ break;
-+ case USB_PORT_FEAT_C_RESET:
-+ rh_dbg("SetPortFeature: c_reset\n");
-+ break;
-+ case USB_PORT_FEAT_C_OVER_CURRENT:
-+ rh_dbg("SetPortFeature: c_over_current\n");
-+ break;
-+
-+ set:
-+ /* Select which port via the port_sel field */
-+ bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
-+
-+ /* Make sure the controller isn't busy. */
-+ crisv10_ready_wait();
-+ /* Send out the actual command to the USB controller */
-+ *R_USB_COMMAND = bUsbCommand;
-+
-+ /* If port reset then also bring USB controller into running state */
-+ if(wFeature == USB_PORT_FEAT_RESET) {
-+ /* Wait a while for controller to first become started after port reset */
-+ udelay(12000); /* 12ms blocking wait */
-+
-+ /* Make sure the controller isn't busy. */
-+ crisv10_ready_wait();
-+
-+ /* If all enabled ports were disabled the host controller goes down into
-+ started mode, so we need to bring it back into the running state.
-+ (This is safe even if it's already in the running state.) */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+ }
-+
-+ break;
-+ default:
-+ rh_dbg("SetPortFeature: unknown feature\n");
-+ return -1;
-+ }
-+ return 0;
-+}
-+
-+int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
-+ switch(wFeature) {
-+ case USB_PORT_FEAT_ENABLE:
-+ rh_dbg("ClearPortFeature: enable\n");
-+ rh_disable_port(bPort);
-+ break;
-+ case USB_PORT_FEAT_SUSPEND:
-+ rh_dbg("ClearPortFeature: suspend\n");
-+ break;
-+ case USB_PORT_FEAT_POWER:
-+ rh_dbg("ClearPortFeature: power\n");
-+ break;
-+
-+ case USB_PORT_FEAT_C_ENABLE:
-+ rh_dbg("ClearPortFeature: c_enable\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_SUSPEND:
-+ rh_dbg("ClearPortFeature: c_suspend\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_CONNECTION:
-+ rh_dbg("ClearPortFeature: c_connection\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_OVER_CURRENT:
-+ rh_dbg("ClearPortFeature: c_over_current\n");
-+ goto clear;
-+ case USB_PORT_FEAT_C_RESET:
-+ rh_dbg("ClearPortFeature: c_reset\n");
-+ goto clear;
-+ clear:
-+ rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
-+ break;
-+ default:
-+ rh_dbg("ClearPortFeature: unknown feature\n");
-+ return -1;
-+ }
-+ return 0;
-+}
-+
-+
-+#ifdef CONFIG_PM
-+/* Handle a suspend request for the root hub (called from hcd_driver) */
-+static int rh_suspend_request(struct usb_hcd *hcd)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+/* Handle a resume request for the root hub (called from hcd_driver) */
-+static int rh_resume_request(struct usb_hcd *hcd)
-+{
-+ return 0; /* no-op for now */
-+}
-+#endif /* CONFIG_PM */
-+
-+
-+
-+/* Wrapper function for workaround port disable registers in USB controller */
-+static void rh_disable_port(unsigned int port) {
-+ volatile int timeout = 10000;
-+ volatile char* usb_portx_disable;
-+ switch(port) {
-+ case 0:
-+ usb_portx_disable = R_USB_PORT1_DISABLE;
-+ break;
-+ case 1:
-+ usb_portx_disable = R_USB_PORT2_DISABLE;
-+ break;
-+ default:
-+ /* Invalid port index */
-+ return;
-+ }
-+ /* Set disable flag in special register */
-+ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
-+ /* Wait until not enabled anymore */
-+ while((rh.wPortStatusPrev[port] &
-+ IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for port %d to become disabled\n", port);
-+ }
-+ /* clear disable flag in special register */
-+ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
-+ rh_info("Physical port %d disabled\n", port+1);
-+}
-+
-+
-+/******************************************************************/
-+/* Transfer Controller (TC) functions */
-+/******************************************************************/
-+
-+/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
-+ dynamically?
-+ To adjust it dynamically we would have to get an interrupt when we reach
-+ the end of the rx descriptor list, or when we get close to the end, and
-+ then allocate more descriptors. */
-+#define NBR_OF_RX_DESC 512
-+#define RX_DESC_BUF_SIZE 1024
-+#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
-+
-+
-+/* Local variables for Transfer Controller */
-+/* --------------------------------------- */
-+
-+/* This is a circular (double-linked) list of the active urbs for each epid.
-+ The head is never removed, and new urbs are linked onto the list as
-+ urb_entry_t elements. Don't reference urb_list directly; use the wrapper
-+ functions instead (which includes spin_locks) */
-+static struct list_head urb_list[NBR_OF_EPIDS];
-+
-+/* Read about the need and usage of this lock in submit_ctrl_urb. */
-+/* Lock for URB lists for each EPID */
-+static spinlock_t urb_list_lock;
-+
-+/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
-+static spinlock_t etrax_epid_lock;
-+
-+/* Lock for dma8 sub0 handling */
-+static spinlock_t etrax_dma8_sub0_lock;
-+
-+/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
-+ Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
-+ cache aligned. */
-+static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
-+static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
-+
-+/* Pointers into RxDescList. */
-+static volatile struct USB_IN_Desc *myNextRxDesc;
-+static volatile struct USB_IN_Desc *myLastRxDesc;
-+
-+/* A zout transfer makes a memory access at the address of its buf pointer,
-+ which means that setting this buf pointer to 0 will cause an access to the
-+ flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
-+ (depending on DMA burst size) transfer.
-+ Instead, we set it to 1, and point it to this buffer. */
-+static int zout_buffer[4] __attribute__ ((aligned (4)));
-+
-+/* Cache for allocating new EP and SB descriptors. */
-+static kmem_cache_t *usb_desc_cache;
-+
-+/* Cache for the data allocated in the isoc descr top half. */
-+static kmem_cache_t *isoc_compl_cache;
-+
-+/* Cache for the data allocated when delayed finishing of URBs */
-+static kmem_cache_t *later_data_cache;
-+
-+
-+/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
-+ and disable iso_eof interrupt. We only need these interrupts when we have
-+ Isoc data endpoints (consumes CPU cycles).
-+ FIXME: This could be more fine granular, so this interrupt is only enabled
-+ when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
-+static int isoc_epid_counter;
-+
-+/* Protecting wrapper functions for R_USB_EPT_x */
-+/* -------------------------------------------- */
-+static inline void etrax_epid_set(__u8 index, __u32 data) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ *R_USB_EPT_DATA = data;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline void etrax_epid_clear_error(__u8 index) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ *R_USB_EPT_DATA &=
-+ ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
-+ IO_MASK(R_USB_EPT_DATA, error_count_out) |
-+ IO_MASK(R_USB_EPT_DATA, error_code));
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
-+ __u8 toggle) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ if(dirout) {
-+ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
-+ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
-+ } else {
-+ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
-+ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
-+ }
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+}
-+
-+static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
-+ unsigned long flags;
-+ __u8 toggle;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ if (dirout) {
-+ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
-+ } else {
-+ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
-+ }
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+ return toggle;
-+}
-+
-+
-+static inline __u32 etrax_epid_get(__u8 index) {
-+ unsigned long flags;
-+ __u32 data;
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
-+ nop();
-+ data = *R_USB_EPT_DATA;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+ return data;
-+}
-+
-+
-+
-+
-+/* Main functions for Transfer Controller */
-+/* -------------------------------------- */
-+
-+/* Init structs, memories and lists used by Transfer Controller */
-+int tc_init(struct usb_hcd *hcd) {
-+ int i;
-+ /* Clear software state info for all epids */
-+ memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
-+
-+ /* Set Invalid and Dummy as being in use and disabled */
-+ epid_state[INVALID_EPID].inuse = 1;
-+ epid_state[DUMMY_EPID].inuse = 1;
-+ epid_state[INVALID_EPID].disabled = 1;
-+ epid_state[DUMMY_EPID].disabled = 1;
-+
-+ /* Clear counter for how many Isoc epids we have sat up */
-+ isoc_epid_counter = 0;
-+
-+ /* Initialize the urb list by initiating a head for each list.
-+ Also reset list hodling active URB for each epid */
-+ for (i = 0; i < NBR_OF_EPIDS; i++) {
-+ INIT_LIST_HEAD(&urb_list[i]);
-+ activeUrbList[i] = NULL;
-+ }
-+
-+ /* Init lock for URB lists */
-+ spin_lock_init(&urb_list_lock);
-+ /* Init lock for Etrax R_USB_EPT register */
-+ spin_lock_init(&etrax_epid_lock);
-+ /* Init lock for Etrax dma8 sub0 handling */
-+ spin_lock_init(&etrax_dma8_sub0_lock);
-+
-+ /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
-+
-+ /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
-+ allocate SB descriptors from this cache. This is ok since
-+ sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
-+ usb_desc_cache = kmem_cache_create("usb_desc_cache",
-+ sizeof(struct USB_EP_Desc), 0,
-+ SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(usb_desc_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+ /* Create slab cache for speedy allocation of memory for isoc bottom-half
-+ interrupt handling */
-+ isoc_compl_cache =
-+ kmem_cache_create("isoc_compl_cache",
-+ sizeof(struct crisv10_isoc_complete_data),
-+ 0, SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(isoc_compl_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+ /* Create slab cache for speedy allocation of memory for later URB finish
-+ struct */
-+ later_data_cache =
-+ kmem_cache_create("later_data_cache",
-+ sizeof(struct urb_later_data),
-+ 0, SLAB_HWCACHE_ALIGN, 0, 0);
-+ if(later_data_cache == NULL) {
-+ return -ENOMEM;
-+ }
-+
-+
-+ /* Initiate the bulk start timer. */
-+ init_timer(&bulk_start_timer);
-+ bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
-+ bulk_start_timer.function = tc_bulk_start_timer_func;
-+ add_timer(&bulk_start_timer);
-+
-+
-+ /* Initiate the bulk eot timer. */
-+ init_timer(&bulk_eot_timer);
-+ bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
-+ bulk_eot_timer.function = tc_bulk_eot_timer_func;
-+ bulk_eot_timer.data = (unsigned long)hcd;
-+ add_timer(&bulk_eot_timer);
-+
-+ return 0;
-+}
-+
-+/* Uninitialize all resources used by Transfer Controller */
-+void tc_destroy(void) {
-+
-+ /* Destroy all slab cache */
-+ kmem_cache_destroy(usb_desc_cache);
-+ kmem_cache_destroy(isoc_compl_cache);
-+ kmem_cache_destroy(later_data_cache);
-+
-+ /* Remove timers */
-+ del_timer(&bulk_start_timer);
-+ del_timer(&bulk_eot_timer);
-+}
-+
-+static void restart_dma8_sub0(void) {
-+ unsigned long flags;
-+ spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
-+ /* Verify that the dma is not running */
-+ if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
-+ struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
-+ while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
-+ ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
-+ }
-+ /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
-+ * ep->next is already a physical address; no need for a virt_to_phys. */
-+ *R_DMA_CH8_SUB0_EP = ep->next;
-+ /* Restart the DMA */
-+ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
-+ }
-+ spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
-+}
-+
-+/* queue an URB with the transfer controller (called from hcd_driver) */
-+static int tc_urb_enqueue(struct usb_hcd *hcd,
-+ struct usb_host_endpoint *ep,
-+ struct urb *urb,
-+ gfp_t mem_flags) {
-+ int epid;
-+ int retval;
-+ int bustime = 0;
-+ int maxpacket;
-+ unsigned long flags;
-+ struct crisv10_urb_priv *urb_priv;
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ DBFENTER;
-+
-+ if(!(crisv10_hcd->running)) {
-+ /* The USB Controller is not running, probably because no device is
-+ attached. No idea to enqueue URBs then */
-+ tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
-+ (unsigned int)urb);
-+ return -ENOENT;
-+ }
-+
-+ maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-+ /* Special case check for In Isoc transfers. Specification states that each
-+ In Isoc transfer consists of one packet and therefore it should fit into
-+ the transfer-buffer of an URB.
-+ We do the check here to be sure (an invalid scenario can be produced with
-+ parameters to the usbtest suite) */
-+ if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
-+ (urb->transfer_buffer_length < maxpacket)) {
-+ tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
-+ return -EMSGSIZE;
-+ }
-+
-+ /* Check if there is enough bandwidth for periodic transfer */
-+ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
-+ /* only check (and later claim) if not already claimed */
-+ if (urb->bandwidth == 0) {
-+ bustime = usb_check_bandwidth(urb->dev, urb);
-+ if (bustime < 0) {
-+ tc_err("Not enough periodic bandwidth\n");
-+ return -ENOSPC;
-+ }
-+ }
-+ }
-+
-+ /* Check if there is a epid for URBs destination, if not this function
-+ set up one. */
-+ epid = tc_setup_epid(ep, urb, mem_flags);
-+ if (epid < 0) {
-+ tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
-+ DBFEXIT;
-+ return -ENOMEM;
-+ }
-+
-+ if(urb == activeUrbList[epid]) {
-+ tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
-+ return -ENXIO;
-+ }
-+
-+ if(urb_list_entry(urb, epid)) {
-+ tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
-+ return -ENXIO;
-+ }
-+
-+ /* If we actively have flaged endpoint as disabled then refuse submition */
-+ if(epid_state[epid].disabled) {
-+ return -ENOENT;
-+ }
-+
-+ /* Allocate and init HC-private data for URB */
-+ if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
-+ DBFEXIT;
-+ return -ENOMEM;
-+ }
-+ urb_priv = urb->hcpriv;
-+
-+ tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
-+ (unsigned int)urb, urb_priv->urb_num, epid,
-+ pipe_to_str(urb->pipe), urb->transfer_buffer_length);
-+
-+ /* Create and link SBs required for this URB */
-+ retval = create_sb_for_urb(urb, mem_flags);
-+ if(retval != 0) {
-+ tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
-+ urb_priv->urb_num);
-+ urb_priv_free(hcd, urb);
-+ DBFEXIT;
-+ return retval;
-+ }
-+
-+ /* Init intr EP pool if this URB is a INTR transfer. This pool is later
-+ used when inserting EPs in the TxIntrEPList. We do the alloc here
-+ so we can't run out of memory later */
-+ if(usb_pipeint(urb->pipe)) {
-+ retval = init_intr_urb(urb, mem_flags);
-+ if(retval != 0) {
-+ tc_warn("Failed to init Intr URB\n");
-+ urb_priv_free(hcd, urb);
-+ DBFEXIT;
-+ return retval;
-+ }
-+ }
-+
-+ /* Disable other access when inserting USB */
-+ local_irq_save(flags);
-+
-+ /* Claim bandwidth, if needed */
-+ if(bustime) {
-+ usb_claim_bandwidth(urb->dev, urb, bustime, 0);
-+ }
-+
-+ /* Add URB to EP queue */
-+ urb_list_add(urb, epid, mem_flags);
-+
-+ if(usb_pipeisoc(urb->pipe)) {
-+ /* Special processing of Isoc URBs. */
-+ tc_dma_process_isoc_urb(urb);
-+ } else {
-+ /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
-+ tc_dma_process_queue(epid);
-+ }
-+
-+ local_irq_restore(flags);
-+
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+/* remove an URB from the transfer controller queues (called from hcd_driver)*/
-+static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv;
-+ unsigned long flags;
-+ int epid;
-+
-+ DBFENTER;
-+ /* Disable interrupts here since a descriptor interrupt for the isoc epid
-+ will modify the sb list. This could possibly be done more granular, but
-+ urb_dequeue should not be used frequently anyway.
-+ */
-+ local_irq_save(flags);
-+
-+ urb_priv = urb->hcpriv;
-+
-+ if (!urb_priv) {
-+ /* This happens if a device driver calls unlink on an urb that
-+ was never submitted (lazy driver) or if the urb was completed
-+ while dequeue was being called. */
-+ tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
-+ local_irq_restore(flags);
-+ return 0;
-+ }
-+ epid = urb_priv->epid;
-+
-+ tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
-+ that isn't active can be dequeued by just removing it from the queue */
-+ if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
-+ usb_pipeint(urb->pipe)) {
-+
-+ /* Check if URB haven't gone further than the queue */
-+ if(urb != activeUrbList[epid]) {
-+ ASSERT(urb_priv->later_data == NULL);
-+ tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
-+ " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
-+ str_dir(urb->pipe), str_type(urb->pipe), epid);
-+
-+ /* Finish the URB with error status from USB core */
-+ tc_finish_urb(hcd, urb, urb->status);
-+ local_irq_restore(flags);
-+ return 0;
-+ }
-+ }
-+
-+ /* Set URB status to Unlink for handling when interrupt comes. */
-+ urb_priv->urb_state = UNLINK;
-+
-+ /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Check if EP still is enabled */
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ /* Kicking dummy list out of the party. */
-+ TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Check if EP still is enabled */
-+ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
-+ finish_isoc_urb(). Because there might the case when URB is dequeued
-+ but there are other valid URBs waiting */
-+
-+ /* Check if In Isoc EP still is enabled */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ break;
-+ case PIPE_INTERRUPT:
-+ /* Special care is taken for interrupt URBs. EPs are unlinked in
-+ tc_finish_urb */
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ /* Asynchronous unlink, finish the URB later from scheduled or other
-+ event (data finished, error) */
-+ tc_finish_urb_later(hcd, urb, urb->status);
-+
-+ local_irq_restore(flags);
-+ DBFEXIT;
-+ return 0;
-+}
-+
-+
-+static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
-+ volatile int timeout = 10000;
-+ struct urb* urb;
-+ struct crisv10_urb_priv* urb_priv;
-+ unsigned long flags;
-+
-+ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+
-+ int type = epid_state[epid].type;
-+
-+ /* Setting this flag will cause enqueue() to return -ENOENT for new
-+ submitions on this endpoint and finish_urb() wont process queue further */
-+ epid_state[epid].disabled = 1;
-+
-+ switch(type) {
-+ case PIPE_BULK:
-+ /* Check if EP still is enabled */
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
-+
-+ /* Do busy-wait until DMA not using this EP descriptor anymore */
-+ while((*R_DMA_CH8_SUB0_EP ==
-+ virt_to_phys(&TxBulkEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+
-+ case PIPE_CONTROL:
-+ /* Check if EP still is enabled */
-+ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ /* The EP was enabled, disable it. */
-+ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
-+
-+ /* Do busy-wait until DMA not using this EP descriptor anymore */
-+ while((*R_DMA_CH8_SUB1_EP ==
-+ virt_to_phys(&TxCtrlEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+
-+ case PIPE_INTERRUPT:
-+ local_irq_save(flags);
-+ /* Disable all Intr EPs belonging to epid */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* Disable EP */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+ local_irq_restore(flags);
-+ break;
-+
-+ case PIPE_ISOCHRONOUS:
-+ /* Check if EP still is enabled */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
-+ /* The EP was enabled, disable it. */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
-+ " epid:%d\n", epid);
-+ }
-+ }
-+ break;
-+ }
-+
-+ local_irq_save(flags);
-+
-+ /* Finish if there is active URB for this endpoint */
-+ if(activeUrbList[epid] != NULL) {
-+ urb = activeUrbList[epid];
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv);
-+ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
-+ ASSERT(activeUrbList[epid] == NULL);
-+ }
-+
-+ /* Finish any queued URBs for this endpoint. There won't be any resubmitions
-+ because epid_disabled causes enqueue() to fail for this endpoint */
-+ while((urb = urb_list_first(epid)) != NULL) {
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
-+ (urb == activeUrbList[epid]) ? "active" : "queued",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), epid, urb->status,
-+ (urb_priv->later_data) ? "later-sched" : "");
-+
-+ tc_finish_urb(hcd, urb, -ENOENT);
-+ }
-+ epid_state[epid].disabled = 0;
-+ local_irq_restore(flags);
-+}
-+
-+/* free resources associated with an endpoint (called from hcd_driver) */
-+static void tc_endpoint_disable(struct usb_hcd *hcd,
-+ struct usb_host_endpoint *ep) {
-+ DBFENTER;
-+ /* Only free epid if it has been allocated. We get two endpoint_disable
-+ requests for ctrl endpoints so ignore the second one */
-+ if(ep->hcpriv != NULL) {
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ int epid = ep_priv->epid;
-+ tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
-+ (unsigned int)ep, (unsigned int)ep->hcpriv,
-+ endpoint_to_str(&(ep->desc)), epid);
-+
-+ tc_sync_finish_epid(hcd, epid);
-+
-+ ASSERT(activeUrbList[epid] == NULL);
-+ ASSERT(list_empty(&urb_list[epid]));
-+
-+ tc_free_epid(ep);
-+ } else {
-+ tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
-+ (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
-+ }
-+ DBFEXIT;
-+}
-+
-+static void tc_finish_urb_later_proc(void *data) {
-+ unsigned long flags;
-+ struct urb_later_data* uld = (struct urb_later_data*)data;
-+ local_irq_save(flags);
-+ if(uld->urb == NULL) {
-+ late_dbg("Later finish of URB = NULL (allready finished)\n");
-+ } else {
-+ struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
-+ ASSERT(urb_priv);
-+ if(urb_priv->urb_num == uld->urb_num) {
-+ late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
-+ urb_priv->urb_num);
-+ if(uld->status != uld->urb->status) {
-+ errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
-+ uld->urb->status, uld->status);
-+ }
-+ if(uld != urb_priv->later_data) {
-+ panic("Scheduled uld not same as URBs uld\n");
-+ }
-+ tc_finish_urb(uld->hcd, uld->urb, uld->status);
-+ } else {
-+ late_warn("Ignoring later finish of URB:0x%x[%d]"
-+ ", urb_num doesn't match current URB:0x%x[%d]",
-+ (unsigned int)(uld->urb), uld->urb_num,
-+ (unsigned int)(uld->urb), urb_priv->urb_num);
-+ }
-+ }
-+ local_irq_restore(flags);
-+ kmem_cache_free(later_data_cache, uld);
-+}
-+
-+static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
-+ int status) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ struct urb_later_data* uld;
-+
-+ ASSERT(urb_priv);
-+
-+ if(urb_priv->later_data != NULL) {
-+ /* Later-finish allready scheduled for this URB, just update status to
-+ return when finishing later */
-+ errno_dbg("Later-finish schedule change URB status:%d with new"
-+ " status:%d\n", urb_priv->later_data->status, status);
-+
-+ urb_priv->later_data->status = status;
-+ return;
-+ }
-+
-+ uld = kmem_cache_alloc(later_data_cache, SLAB_ATOMIC);
-+ ASSERT(uld);
-+
-+ uld->hcd = hcd;
-+ uld->urb = urb;
-+ uld->urb_num = urb_priv->urb_num;
-+ uld->status = status;
-+
-+ INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
-+ urb_priv->later_data = uld;
-+
-+ /* Schedule the finishing of the URB to happen later */
-+ schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
-+}
-+
-+static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
-+ int status);
-+
-+static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
-+ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid;
-+ char toggle;
-+ int urb_num;
-+
-+ DBFENTER;
-+ ASSERT(urb_priv != NULL);
-+ epid = urb_priv->epid;
-+ urb_num = urb_priv->urb_num;
-+
-+ if(urb != activeUrbList[epid]) {
-+ if(urb_list_entry(urb, epid)) {
-+ /* Remove this URB from the list. Only happens when URB are finished
-+ before having been processed (dequeing) */
-+ urb_list_del(urb, epid);
-+ } else {
-+ tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
-+ " epid:%d\n", (unsigned int)urb, urb_num, epid);
-+ }
-+ }
-+
-+ /* Cancel any pending later-finish of this URB */
-+ if(urb_priv->later_data) {
-+ urb_priv->later_data->urb = NULL;
-+ }
-+
-+ /* For an IN pipe, we always set the actual length, regardless of whether
-+ there was an error or not (which means the device driver can use the data
-+ if it wants to). */
-+ if(usb_pipein(urb->pipe)) {
-+ urb->actual_length = urb_priv->rx_offset;
-+ } else {
-+ /* Set actual_length for OUT urbs also; the USB mass storage driver seems
-+ to want that. */
-+ if (status == 0 && urb->status == -EINPROGRESS) {
-+ urb->actual_length = urb->transfer_buffer_length;
-+ } else {
-+ /* We wouldn't know of any partial writes if there was an error. */
-+ urb->actual_length = 0;
-+ }
-+ }
-+
-+
-+ /* URB status mangling */
-+ if(urb->status == -EINPROGRESS) {
-+ /* The USB core hasn't changed the status, let's set our finish status */
-+ urb->status = status;
-+
-+ if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
-+ usb_pipein(urb->pipe) &&
-+ (urb->actual_length != urb->transfer_buffer_length)) {
-+ /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
-+ max length) is to be treated as an error. */
-+ errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
-+ " data:%d\n", (unsigned int)urb, urb_num,
-+ urb->actual_length);
-+ urb->status = -EREMOTEIO;
-+ }
-+
-+ if(urb_priv->urb_state == UNLINK) {
-+ /* URB has been requested to be unlinked asynchronously */
-+ urb->status = -ECONNRESET;
-+ errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
-+ (unsigned int)urb, urb_num, urb->status);
-+ }
-+ } else {
-+ /* The USB Core wants to signal some error via the URB, pass it through */
-+ }
-+
-+ /* use completely different finish function for Isoc URBs */
-+ if(usb_pipeisoc(urb->pipe)) {
-+ tc_finish_isoc_urb(hcd, urb, status);
-+ return;
-+ }
-+
-+ /* Do special unlinking of EPs for Intr traffic */
-+ if(usb_pipeint(urb->pipe)) {
-+ tc_dma_unlink_intr_urb(urb);
-+ }
-+
-+ /* Release allocated bandwidth for periodic transfers */
-+ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
-+ usb_release_bandwidth(urb->dev, urb, 0);
-+
-+ /* This URB is active on EP */
-+ if(urb == activeUrbList[epid]) {
-+ /* We need to fiddle with the toggle bits because the hardware doesn't do
-+ it for us. */
-+ toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
-+ usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-+ usb_pipeout(urb->pipe), toggle);
-+
-+ /* Checks for Ctrl and Bulk EPs */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Check so Bulk EP realy is disabled before finishing active URB */
-+ ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
-+ IO_STATE(USB_EP_command, enable, no));
-+ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
-+ process Bulk EP. */
-+ TxBulkEPList[epid].sub = 0;
-+ /* No need to wait for the DMA before changing the next pointer.
-+ The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
-+ the last one (INVALID_EPID) for actual traffic. */
-+ TxBulkEPList[epid].next =
-+ virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Check so Ctrl EP realy is disabled before finishing active URB */
-+ ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
-+ IO_STATE(USB_EP_command, enable, no));
-+ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
-+ process Ctrl EP. */
-+ TxCtrlEPList[epid].sub = 0;
-+ break;
-+ }
-+ }
-+
-+ /* Free HC-private URB data*/
-+ urb_priv_free(hcd, urb);
-+
-+ if(urb->status) {
-+ errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
-+ (unsigned int)urb, urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb->actual_length, urb->status);
-+ } else {
-+ tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
-+ (unsigned int)urb, urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb->actual_length, urb->status);
-+ }
-+
-+ /* If we just finished an active URB, clear active pointer. */
-+ if (urb == activeUrbList[epid]) {
-+ /* Make URB not active on EP anymore */
-+ activeUrbList[epid] = NULL;
-+
-+ if(urb->status == 0) {
-+ /* URB finished sucessfully, process queue to see if there are any more
-+ URBs waiting before we call completion function.*/
-+ if(crisv10_hcd->running) {
-+ /* Only process queue if USB controller is running */
-+ tc_dma_process_queue(epid);
-+ } else {
-+ tc_warn("No processing of queue for epid:%d, USB Controller not"
-+ " running\n", epid);
-+ }
-+ }
-+ }
-+
-+ /* Hand the URB from HCD to its USB device driver, using its completion
-+ functions */
-+ usb_hcd_giveback_urb (hcd, urb);
-+
-+ /* Check the queue once more if the URB returned with error, because we
-+ didn't do it before the completion function because the specification
-+ states that the queue should not restart until all it's unlinked
-+ URBs have been fully retired, with the completion functions run */
-+ if(crisv10_hcd->running) {
-+ /* Only process queue if USB controller is running */
-+ tc_dma_process_queue(epid);
-+ } else {
-+ tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
-+ epid);
-+ }
-+
-+ DBFEXIT;
-+}
-+
-+static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
-+ int status) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid, i;
-+ volatile int timeout = 10000;
-+
-+ ASSERT(urb_priv);
-+ epid = urb_priv->epid;
-+
-+ ASSERT(usb_pipeisoc(urb->pipe));
-+
-+ /* Set that all isoc packets have status and length set before
-+ completing the urb. */
-+ for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
-+ urb->iso_frame_desc[i].actual_length = 0;
-+ urb->iso_frame_desc[i].status = -EPROTO;
-+ }
-+
-+ /* Check if the URB is currently active (done or error) */
-+ if(urb == activeUrbList[epid]) {
-+ /* Check if there are another In Isoc URB queued for this epid */
-+ if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
-+ /* Move it from queue to active and mark it started so Isoc transfers
-+ won't be interrupted.
-+ All Isoc URBs data transfers are already added to DMA lists so we
-+ don't have to insert anything in DMA lists here. */
-+ activeUrbList[epid] = urb_list_first(epid);
-+ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
-+ STARTED;
-+ urb_list_del(activeUrbList[epid], epid);
-+
-+ if(urb->status) {
-+ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
-+ " status:%d, new waiting URB:0x%x[%d]\n",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb_priv->isoc_packet_counter,
-+ urb->number_of_packets, urb->status,
-+ (unsigned int)activeUrbList[epid],
-+ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
-+ }
-+
-+ } else { /* No other URB queued for this epid */
-+ if(urb->status) {
-+ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
-+ " status:%d, no new URB waiting\n",
-+ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
-+ str_type(urb->pipe), urb_priv->isoc_packet_counter,
-+ urb->number_of_packets, urb->status);
-+ }
-+
-+ /* Check if EP is still enabled, then shut it down. */
-+ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
-+
-+ /* Should only occur for In Isoc EPs where SB isn't consumed. */
-+ ASSERT(usb_pipein(urb->pipe));
-+
-+ /* Disable it and wait for it to stop */
-+ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ /* Ah, the luxury of busy-wait. */
-+ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
-+ }
-+ }
-+
-+ /* Unlink SB to say that epid is finished. */
-+ TxIsocEPList[epid].sub = 0;
-+ TxIsocEPList[epid].hw_len = 0;
-+
-+ /* No URB active for EP anymore */
-+ activeUrbList[epid] = NULL;
-+ }
-+ } else { /* Finishing of not active URB (queued up with SBs thought) */
-+ isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
-+ " SB queued but not active\n",
-+ (unsigned int)urb, str_dir(urb->pipe),
-+ urb_priv->isoc_packet_counter, urb->number_of_packets,
-+ urb->status);
-+ if(usb_pipeout(urb->pipe)) {
-+ /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
-+ struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
-+
-+ iter_sb = TxIsocEPList[epid].sub ?
-+ phys_to_virt(TxIsocEPList[epid].sub) : 0;
-+ prev_sb = 0;
-+
-+ /* SB that is linked before this URBs first SB */
-+ while (iter_sb && (iter_sb != urb_priv->first_sb)) {
-+ prev_sb = iter_sb;
-+ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ }
-+
-+ if (iter_sb == 0) {
-+ /* Unlink of the URB currently being transmitted. */
-+ prev_sb = 0;
-+ iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
-+ }
-+
-+ while (iter_sb && (iter_sb != urb_priv->last_sb)) {
-+ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ }
-+
-+ if (iter_sb) {
-+ next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
-+ } else {
-+ /* This should only happen if the DMA has completed
-+ processing the SB list for this EP while interrupts
-+ are disabled. */
-+ isoc_dbg("Isoc urb not found, already sent?\n");
-+ next_sb = 0;
-+ }
-+ if (prev_sb) {
-+ prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
-+ } else {
-+ TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
-+ }
-+ }
-+ }
-+
-+ /* Free HC-private URB data*/
-+ urb_priv_free(hcd, urb);
-+
-+ usb_release_bandwidth(urb->dev, urb, 0);
-+
-+ /* Hand the URB from HCD to its USB device driver, using its completion
-+ functions */
-+ usb_hcd_giveback_urb (hcd, urb);
-+}
-+
-+static __u32 urb_num = 0;
-+
-+/* allocate and initialize URB private data */
-+static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
-+ int mem_flags) {
-+ struct crisv10_urb_priv *urb_priv;
-+
-+ urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
-+ if (!urb_priv)
-+ return -ENOMEM;
-+ memset(urb_priv, 0, sizeof *urb_priv);
-+
-+ urb_priv->epid = epid;
-+ urb_priv->urb_state = NOT_STARTED;
-+
-+ urb->hcpriv = urb_priv;
-+ /* Assign URB a sequence number, and increment counter */
-+ urb_priv->urb_num = urb_num;
-+ urb_num++;
-+ return 0;
-+}
-+
-+/* free URB private data */
-+static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
-+ int i;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv != 0);
-+
-+ /* Check it has any SBs linked that needs to be freed*/
-+ if(urb_priv->first_sb != NULL) {
-+ struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
-+ int i = 0;
-+ first_sb = urb_priv->first_sb;
-+ last_sb = urb_priv->last_sb;
-+ ASSERT(last_sb);
-+ while(first_sb != last_sb) {
-+ next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
-+ kmem_cache_free(usb_desc_cache, first_sb);
-+ first_sb = next_sb;
-+ i++;
-+ }
-+ kmem_cache_free(usb_desc_cache, last_sb);
-+ i++;
-+ }
-+
-+ /* Check if it has any EPs in its Intr pool that also needs to be freed */
-+ if(urb_priv->intr_ep_pool_length > 0) {
-+ for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
-+ kfree(urb_priv->intr_ep_pool[i]);
-+ }
-+ /*
-+ tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb);
-+ */
-+ }
-+
-+ kfree(urb_priv);
-+ urb->hcpriv = NULL;
-+}
-+
-+static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
-+ struct crisv10_ep_priv *ep_priv;
-+
-+ ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
-+ if (!ep_priv)
-+ return -ENOMEM;
-+ memset(ep_priv, 0, sizeof *ep_priv);
-+
-+ ep->hcpriv = ep_priv;
-+ return 0;
-+}
-+
-+static void ep_priv_free(struct usb_host_endpoint *ep) {
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ ASSERT(ep_priv);
-+ kfree(ep_priv);
-+ ep->hcpriv = NULL;
-+}
-+
-+/* EPID handling functions, managing EP-list in Etrax through wrappers */
-+/* ------------------------------------------------------------------- */
-+
-+/* Sets up a new EPID for an endpoint or returns existing if found */
-+static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
-+ int mem_flags) {
-+ int epid;
-+ char devnum, endpoint, out_traffic, slow;
-+ int maxlen;
-+ __u32 epid_data;
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+
-+ DBFENTER;
-+
-+ /* Check if a valid epid already is setup for this endpoint */
-+ if(ep_priv != NULL) {
-+ return ep_priv->epid;
-+ }
-+
-+ /* We must find and initiate a new epid for this urb. */
-+ epid = tc_allocate_epid();
-+
-+ if (epid == -1) {
-+ /* Failed to allocate a new epid. */
-+ DBFEXIT;
-+ return epid;
-+ }
-+
-+ /* We now have a new epid to use. Claim it. */
-+ epid_state[epid].inuse = 1;
-+
-+ /* Init private data for new endpoint */
-+ if(ep_priv_create(ep, mem_flags) != 0) {
-+ return -ENOMEM;
-+ }
-+ ep_priv = ep->hcpriv;
-+ ep_priv->epid = epid;
-+
-+ devnum = usb_pipedevice(urb->pipe);
-+ endpoint = usb_pipeendpoint(urb->pipe);
-+ slow = (urb->dev->speed == USB_SPEED_LOW);
-+ maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
-+
-+ if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
-+ /* We want both IN and OUT control traffic to be put on the same
-+ EP/SB list. */
-+ out_traffic = 1;
-+ } else {
-+ out_traffic = usb_pipeout(urb->pipe);
-+ }
-+
-+ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-+ epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
-+ /* FIXME: Change any to the actual port? */
-+ IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
-+ IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
-+ etrax_epid_iso_set(epid, epid_data);
-+ } else {
-+ epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
-+ IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
-+ /* FIXME: Change any to the actual port? */
-+ IO_STATE(R_USB_EPT_DATA, port, any) |
-+ IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
-+ IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
-+ IO_FIELD(R_USB_EPT_DATA, dev, devnum);
-+ etrax_epid_set(epid, epid_data);
-+ }
-+
-+ epid_state[epid].out_traffic = out_traffic;
-+ epid_state[epid].type = usb_pipetype(urb->pipe);
-+
-+ tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
-+ (unsigned int)ep, epid, devnum, endpoint, maxlen,
-+ str_type(urb->pipe), out_traffic ? "out" : "in",
-+ slow ? "low" : "full");
-+
-+ /* Enable Isoc eof interrupt if we set up the first Isoc epid */
-+ if(usb_pipeisoc(urb->pipe)) {
-+ isoc_epid_counter++;
-+ if(isoc_epid_counter == 1) {
-+ isoc_warn("Enabled Isoc eof interrupt\n");
-+ *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
-+ }
-+ }
-+
-+ DBFEXIT;
-+ return epid;
-+}
-+
-+static void tc_free_epid(struct usb_host_endpoint *ep) {
-+ unsigned long flags;
-+ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
-+ int epid;
-+ volatile int timeout = 10000;
-+
-+ DBFENTER;
-+
-+ if (ep_priv == NULL) {
-+ tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
-+ DBFEXIT;
-+ return;
-+ }
-+
-+ epid = ep_priv->epid;
-+
-+ /* Disable Isoc eof interrupt if we free the last Isoc epid */
-+ if(epid_isoc(epid)) {
-+ ASSERT(isoc_epid_counter > 0);
-+ isoc_epid_counter--;
-+ if(isoc_epid_counter == 0) {
-+ *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
-+ isoc_warn("Disabled Isoc eof interrupt\n");
-+ }
-+ }
-+
-+ /* Take lock manualy instead of in epid_x_x wrappers,
-+ because we need to be polling here */
-+ spin_lock_irqsave(&etrax_epid_lock, flags);
-+
-+ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
-+ nop();
-+ while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for epid:%d to drop hold\n", epid);
-+ }
-+ /* This will, among other things, set the valid field to 0. */
-+ *R_USB_EPT_DATA = 0;
-+ spin_unlock_irqrestore(&etrax_epid_lock, flags);
-+
-+ /* Free resource in software state info list */
-+ epid_state[epid].inuse = 0;
-+
-+ /* Free private endpoint data */
-+ ep_priv_free(ep);
-+
-+ DBFEXIT;
-+}
-+
-+static int tc_allocate_epid(void) {
-+ int i;
-+ DBFENTER;
-+ for (i = 0; i < NBR_OF_EPIDS; i++) {
-+ if (!epid_inuse(i)) {
-+ DBFEXIT;
-+ return i;
-+ }
-+ }
-+
-+ tc_warn("Found no free epids\n");
-+ DBFEXIT;
-+ return -1;
-+}
-+
-+
-+/* Wrappers around the list functions (include/linux/list.h). */
-+/* ---------------------------------------------------------- */
-+static inline int __urb_list_empty(int epid) {
-+ int retval;
-+ retval = list_empty(&urb_list[epid]);
-+ return retval;
-+}
-+
-+/* Returns first urb for this epid, or NULL if list is empty. */
-+static inline struct urb *urb_list_first(int epid) {
-+ unsigned long flags;
-+ struct urb *first_urb = 0;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ if (!__urb_list_empty(epid)) {
-+ /* Get the first urb (i.e. head->next). */
-+ urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
-+ first_urb = urb_entry->urb;
-+ }
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return first_urb;
-+}
-+
-+/* Adds an urb_entry last in the list for this epid. */
-+static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
-+ ASSERT(urb_entry);
-+
-+ urb_entry->urb = urb;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ list_add_tail(&urb_entry->list, &urb_list[epid]);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+}
-+
-+/* Search through the list for an element that contains this urb. (The list
-+ is expected to be short and the one we are about to delete will often be
-+ the first in the list.)
-+ Should be protected by spin_locks in calling function */
-+static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
-+ struct list_head *entry;
-+ struct list_head *tmp;
-+ urb_entry_t *urb_entry;
-+
-+ list_for_each_safe(entry, tmp, &urb_list[epid]) {
-+ urb_entry = list_entry(entry, urb_entry_t, list);
-+ ASSERT(urb_entry);
-+ ASSERT(urb_entry->urb);
-+
-+ if (urb_entry->urb == urb) {
-+ return urb_entry;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/* Same function as above but for global use. Protects list by spinlock */
-+static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return (urb_entry);
-+}
-+
-+/* Delete an urb from the list. */
-+static inline void urb_list_del(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ /* Delete entry and free. */
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ list_del(&urb_entry->list);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ kfree(urb_entry);
-+}
-+
-+/* Move an urb to the end of the list. */
-+static inline void urb_list_move_last(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ list_del(&urb_entry->list);
-+ list_add_tail(&urb_entry->list, &urb_list[epid]);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+}
-+
-+/* Get the next urb in the list. */
-+static inline struct urb *urb_list_next(struct urb *urb, int epid) {
-+ unsigned long flags;
-+ urb_entry_t *urb_entry;
-+
-+ spin_lock_irqsave(&urb_list_lock, flags);
-+ urb_entry = __urb_list_entry(urb, epid);
-+ ASSERT(urb_entry);
-+
-+ if (urb_entry->list.next != &urb_list[epid]) {
-+ struct list_head *elem = urb_entry->list.next;
-+ urb_entry = list_entry(elem, urb_entry_t, list);
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return urb_entry->urb;
-+ } else {
-+ spin_unlock_irqrestore(&urb_list_lock, flags);
-+ return NULL;
-+ }
-+}
-+
-+struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
-+ int mem_flags) {
-+ struct USB_EP_Desc *ep_desc;
-+ ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(ep_desc == NULL)
-+ return NULL;
-+ memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
-+
-+ ep_desc->hw_len = 0;
-+ ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
-+ IO_STATE(USB_EP_command, enable, yes));
-+ if(sb_desc == NULL) {
-+ ep_desc->sub = 0;
-+ } else {
-+ ep_desc->sub = virt_to_phys(sb_desc);
-+ }
-+ return ep_desc;
-+}
-+
-+#define TT_ZOUT 0
-+#define TT_IN 1
-+#define TT_OUT 2
-+#define TT_SETUP 3
-+
-+#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
-+#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
-+#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
-+
-+/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
-+ SBs. Also used by create_sb_in() to avoid same allocation procedure at two
-+ places */
-+struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
-+ int datalen, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+ memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
-+
-+ sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
-+ IO_STATE(USB_SB_command, eot, yes);
-+
-+ sb_desc->sw_len = datalen;
-+ if(data != NULL) {
-+ sb_desc->buf = virt_to_phys(data);
-+ } else {
-+ sb_desc->buf = 0;
-+ }
-+ if(sb_prev != NULL) {
-+ sb_prev->next = virt_to_phys(sb_desc);
-+ }
-+ return sb_desc;
-+}
-+
-+/* Creates a copy of an existing SB by allocation space for it and copy
-+ settings */
-+struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+
-+ memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
-+ return sb_desc;
-+}
-+
-+/* A specific create_sb function for creation of in SBs. This is due to
-+ that datalen in In SBs shows how many packets we are expecting. It also
-+ sets up the rem field to show if how many bytes we expect in last packet
-+ if it's not a full one */
-+struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
-+ int maxlen, int mem_flags) {
-+ struct USB_SB_Desc *sb_desc;
-+ sb_desc = create_sb(sb_prev, TT_IN, NULL,
-+ datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
-+ if(sb_desc == NULL)
-+ return NULL;
-+ sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
-+ return sb_desc;
-+}
-+
-+void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
-+ sb_desc->command |= flags;
-+}
-+
-+int create_sb_for_urb(struct urb *urb, int mem_flags) {
-+ int is_out = !usb_pipein(urb->pipe);
-+ int type = usb_pipetype(urb->pipe);
-+ int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
-+ int buf_len = urb->transfer_buffer_length;
-+ void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
-+ struct USB_SB_Desc *sb_desc = NULL;
-+
-+ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv != NULL);
-+
-+ switch(type) {
-+ case PIPE_CONTROL:
-+ /* Setup stage */
-+ sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+
-+ /* Attach first SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+
-+ if (is_out) { /* Out Control URB */
-+ /* If this Control OUT transfer has an optional data stage we add
-+ an OUT token before the mandatory IN (status) token */
-+ if ((buf_len > 0) && buf) {
-+ sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+
-+ /* Status stage */
-+ /* The data length has to be exactly 1. This is due to a requirement
-+ of the USB specification that a host must be prepared to receive
-+ data in the status phase */
-+ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ } else { /* In control URB */
-+ /* Data stage */
-+ sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* Status stage */
-+ /* Read comment at zout_buffer declaration for an explanation to this. */
-+ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* Set descriptor interrupt flag for in URBs so we can finish URB after
-+ zout-packet has been sent */
-+ set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
-+ }
-+ /* Set end-of-list flag in last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+ /* Attach last SB to URB */
-+ urb_priv->last_sb = sb_desc;
-+ break;
-+
-+ case PIPE_BULK:
-+ if (is_out) { /* Out Bulk URB */
-+ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* The full field is set to yes, even if we don't actually check that
-+ this is a full-length transfer (i.e., that transfer_buffer_length %
-+ maxlen = 0).
-+ Setting full prevents the USB controller from sending an empty packet
-+ in that case. However, if URB_ZERO_PACKET was set we want that. */
-+ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ } else { /* In Bulk URB */
-+ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ }
-+ /* Set end-of-list flag for last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+ break;
-+
-+ case PIPE_INTERRUPT:
-+ if(is_out) { /* Out Intr URB */
-+ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* The full field is set to yes, even if we don't actually check that
-+ this is a full-length transfer (i.e., that transfer_buffer_length %
-+ maxlen = 0).
-+ Setting full prevents the USB controller from sending an empty packet
-+ in that case. However, if URB_ZERO_PACKET was set we want that. */
-+ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ /* Only generate TX interrupt if it's a Out URB*/
-+ set_sb_cmds(sb_desc, CMD_INTR);
-+
-+ } else { /* In Intr URB */
-+ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ }
-+ /* Set end-of-list flag for last SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+
-+ break;
-+ case PIPE_ISOCHRONOUS:
-+ if(is_out) { /* Out Isoc URB */
-+ int i;
-+ if(urb->number_of_packets == 0) {
-+ tc_err("Can't create SBs for Isoc URB with zero packets\n");
-+ return -EPIPE;
-+ }
-+ /* Create one SB descriptor for each packet and link them together. */
-+ for(i = 0; i < urb->number_of_packets; i++) {
-+ if (urb->iso_frame_desc[i].length > 0) {
-+
-+ sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
-+ urb->iso_frame_desc[i].offset,
-+ urb->iso_frame_desc[i].length, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+
-+ /* Check if it's a full length packet */
-+ if (urb->iso_frame_desc[i].length ==
-+ usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+
-+ } else { /* zero length packet */
-+ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ set_sb_cmds(sb_desc, CMD_FULL);
-+ }
-+ /* Attach first SB descriptor to URB */
-+ if (i == 0) {
-+ urb_priv->first_sb = sb_desc;
-+ }
-+ }
-+ /* Set interrupt and end-of-list flags in last SB */
-+ set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
-+ /* Attach last SB descriptor to URB */
-+ urb_priv->last_sb = sb_desc;
-+ tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
-+ urb->number_of_packets, (unsigned int)urb);
-+ } else { /* In Isoc URB */
-+ /* Actual number of packets is not relevant for periodic in traffic as
-+ long as it is more than zero. Set to 1 always. */
-+ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
-+ if(sb_desc == NULL)
-+ return -ENOMEM;
-+ /* Set end-of-list flags for SB */
-+ set_sb_cmds(sb_desc, CMD_EOL);
-+
-+ /* Attach SB to URB */
-+ urb_priv->first_sb = sb_desc;
-+ urb_priv->last_sb = sb_desc;
-+ }
-+ break;
-+ default:
-+ tc_err("Unknown pipe-type\n");
-+ return -EPIPE;
-+ break;
-+ }
-+ return 0;
-+}
-+
-+int init_intr_urb(struct urb *urb, int mem_flags) {
-+ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ struct USB_EP_Desc* ep_desc;
-+ int interval;
-+ int i;
-+ int ep_count;
-+
-+ ASSERT(urb_priv != NULL);
-+ ASSERT(usb_pipeint(urb->pipe));
-+ /* We can't support interval longer than amount of eof descriptors in
-+ TxIntrEPList */
-+ if(urb->interval > MAX_INTR_INTERVAL) {
-+ tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
-+ MAX_INTR_INTERVAL);
-+ return -EINVAL;
-+ }
-+
-+ /* We assume that the SB descriptors already have been setup */
-+ ASSERT(urb_priv->first_sb != NULL);
-+
-+ /* Round of the interval to 2^n, it is obvious that this code favours
-+ smaller numbers, but that is actually a good thing */
-+ /* FIXME: The "rounding error" for larger intervals will be quite
-+ large. For in traffic this shouldn't be a problem since it will only
-+ mean that we "poll" more often. */
-+ interval = urb->interval;
-+ for (i = 0; interval; i++) {
-+ interval = interval >> 1;
-+ }
-+ urb_priv->interval = 1 << (i - 1);
-+
-+ /* We can only have max interval for Out Interrupt due to that we can only
-+ handle one linked in EP for a certain epid in the Intr descr array at the
-+ time. The USB Controller in the Etrax 100LX continues to process Intr EPs
-+ so we have no way of knowing which one that caused the actual transfer if
-+ we have several linked in. */
-+ if(usb_pipeout(urb->pipe)) {
-+ urb_priv->interval = MAX_INTR_INTERVAL;
-+ }
-+
-+ /* Calculate amount of EPs needed */
-+ ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
-+
-+ for(i = 0; i < ep_count; i++) {
-+ ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
-+ if(ep_desc == NULL) {
-+ /* Free any descriptors that we may have allocated before failure */
-+ while(i > 0) {
-+ i--;
-+ kfree(urb_priv->intr_ep_pool[i]);
-+ }
-+ return -ENOMEM;
-+ }
-+ urb_priv->intr_ep_pool[i] = ep_desc;
-+ }
-+ urb_priv->intr_ep_pool_length = ep_count;
-+ return 0;
-+}
-+
-+/* DMA RX/TX functions */
-+/* ----------------------- */
-+
-+static void tc_dma_init_rx_list(void) {
-+ int i;
-+
-+ /* Setup descriptor list except last one */
-+ for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
-+ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-+ RxDescList[i].command = 0;
-+ RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
-+ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-+ RxDescList[i].hw_len = 0;
-+ RxDescList[i].status = 0;
-+
-+ /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
-+ USB_IN_Desc for the relevant fields.) */
-+ prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
-+
-+ }
-+ /* Special handling of last descriptor */
-+ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
-+ RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
-+ RxDescList[i].next = virt_to_phys(&RxDescList[0]);
-+ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
-+ RxDescList[i].hw_len = 0;
-+ RxDescList[i].status = 0;
-+
-+ /* Setup list pointers that show progress in list */
-+ myNextRxDesc = &RxDescList[0];
-+ myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
-+
-+ flush_etrax_cache();
-+ /* Point DMA to first descriptor in list and start it */
-+ *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
-+ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
-+}
-+
-+
-+static void tc_dma_init_tx_bulk_list(void) {
-+ int i;
-+ volatile struct USB_EP_Desc *epDescr;
-+
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ epDescr = &(TxBulkEPList[i]);
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
-+
-+ /* Initiate two EPs, disabled and with the eol flag set. No need for any
-+ preserved epid. */
-+
-+ /* The first one has the intr flag set so we get an interrupt when the DMA
-+ channel is about to become disabled. */
-+ CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
-+ TxBulkDummyEPList[i][0].hw_len = 0;
-+ TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_STATE(USB_EP_command, intr, yes));
-+ TxBulkDummyEPList[i][0].sub = 0;
-+ TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
-+
-+ /* The second one. */
-+ CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
-+ TxBulkDummyEPList[i][1].hw_len = 0;
-+ TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
-+ IO_STATE(USB_EP_command, eol, yes));
-+ TxBulkDummyEPList[i][1].sub = 0;
-+ /* The last dummy's next pointer is the same as the current EP's next pointer. */
-+ TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
-+ }
-+
-+ /* Special handling of last descr in list, make list circular */
-+ epDescr = &TxBulkEPList[i];
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxBulkEPList[0]);
-+
-+ /* Init DMA sub-channel pointers to last item in each list */
-+ *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
-+ /* No point in starting the bulk channel yet.
-+ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
-+}
-+
-+static void tc_dma_init_tx_ctrl_list(void) {
-+ int i;
-+ volatile struct USB_EP_Desc *epDescr;
-+
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ epDescr = &(TxCtrlEPList[i]);
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
-+ }
-+ /* Special handling of last descr in list, make list circular */
-+ epDescr = &TxCtrlEPList[i];
-+ CHECK_ALIGN(epDescr);
-+ epDescr->hw_len = 0;
-+ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, i);
-+ epDescr->sub = 0;
-+ epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
-+
-+ /* Init DMA sub-channel pointers to last item in each list */
-+ *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
-+ /* No point in starting the ctrl channel yet.
-+ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
-+}
-+
-+
-+static void tc_dma_init_tx_intr_list(void) {
-+ int i;
-+
-+ TxIntrSB_zout.sw_len = 1;
-+ TxIntrSB_zout.next = 0;
-+ TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-+ TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-+ IO_STATE(USB_SB_command, tt, zout) |
-+ IO_STATE(USB_SB_command, full, yes) |
-+ IO_STATE(USB_SB_command, eot, yes) |
-+ IO_STATE(USB_SB_command, eol, yes));
-+
-+ for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
-+ CHECK_ALIGN(&TxIntrEPList[i]);
-+ TxIntrEPList[i].hw_len = 0;
-+ TxIntrEPList[i].command =
-+ (IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, enable, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-+ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
-+ }
-+
-+ /* Special handling of last descr in list, make list circular */
-+ CHECK_ALIGN(&TxIntrEPList[i]);
-+ TxIntrEPList[i].hw_len = 0;
-+ TxIntrEPList[i].command =
-+ (IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_STATE(USB_EP_command, enable, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
-+ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
-+
-+ intr_dbg("Initiated Intr EP descriptor list\n");
-+
-+
-+ /* Connect DMA 8 sub-channel 2 to first in list */
-+ *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
-+}
-+
-+static void tc_dma_init_tx_isoc_list(void) {
-+ int i;
-+
-+ DBFENTER;
-+
-+ /* Read comment at zout_buffer declaration for an explanation to this. */
-+ TxIsocSB_zout.sw_len = 1;
-+ TxIsocSB_zout.next = 0;
-+ TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
-+ TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
-+ IO_STATE(USB_SB_command, tt, zout) |
-+ IO_STATE(USB_SB_command, full, yes) |
-+ IO_STATE(USB_SB_command, eot, yes) |
-+ IO_STATE(USB_SB_command, eol, yes));
-+
-+ /* The last isochronous EP descriptor is a dummy. */
-+ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
-+ CHECK_ALIGN(&TxIsocEPList[i]);
-+ TxIsocEPList[i].hw_len = 0;
-+ TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
-+ TxIsocEPList[i].sub = 0;
-+ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
-+ }
-+
-+ CHECK_ALIGN(&TxIsocEPList[i]);
-+ TxIsocEPList[i].hw_len = 0;
-+
-+ /* Must enable the last EP descr to get eof interrupt. */
-+ TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
-+ IO_STATE(USB_EP_command, eof, yes) |
-+ IO_STATE(USB_EP_command, eol, yes) |
-+ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
-+ TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
-+ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
-+
-+ *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
-+ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
-+}
-+
-+static int tc_dma_init(struct usb_hcd *hcd) {
-+ tc_dma_init_rx_list();
-+ tc_dma_init_tx_bulk_list();
-+ tc_dma_init_tx_ctrl_list();
-+ tc_dma_init_tx_intr_list();
-+ tc_dma_init_tx_isoc_list();
-+
-+ if (cris_request_dma(USB_TX_DMA_NBR,
-+ "ETRAX 100LX built-in USB (Tx)",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_usb)) {
-+ err("Could not allocate DMA ch 8 for USB");
-+ return -EBUSY;
-+ }
-+
-+ if (cris_request_dma(USB_RX_DMA_NBR,
-+ "ETRAX 100LX built-in USB (Rx)",
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_usb)) {
-+ err("Could not allocate DMA ch 9 for USB");
-+ return -EBUSY;
-+ }
-+
-+ *R_IRQ_MASK2_SET =
-+ /* Note that these interrupts are not used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
-+ /* Sub channel 1 (ctrl) descr. interrupts are used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
-+ /* Sub channel 3 (isoc) descr. interrupts are used. */
-+ IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
-+
-+ /* Note that the dma9_descr interrupt is not used. */
-+ *R_IRQ_MASK2_SET =
-+ IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
-+ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
-+
-+ if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
-+ "ETRAX 100LX built-in USB (Rx)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
-+ return -EBUSY;
-+ }
-+
-+ if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
-+ "ETRAX 100LX built-in USB (Tx)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
-+ return -EBUSY;
-+ }
-+
-+ return 0;
-+}
-+
-+static void tc_dma_destroy(void) {
-+ free_irq(ETRAX_USB_RX_IRQ, NULL);
-+ free_irq(ETRAX_USB_TX_IRQ, NULL);
-+
-+ cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
-+ cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
-+
-+}
-+
-+static void tc_dma_link_intr_urb(struct urb *urb);
-+
-+/* Handle processing of Bulk, Ctrl and Intr queues */
-+static void tc_dma_process_queue(int epid) {
-+ struct urb *urb;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ unsigned long flags;
-+ char toggle;
-+
-+ if(epid_state[epid].disabled) {
-+ /* Don't process any URBs on a disabled endpoint */
-+ return;
-+ }
-+
-+ /* Do not disturb us while fiddling with EPs and epids */
-+ local_irq_save(flags);
-+
-+ /* For bulk, Ctrl and Intr can we only have one URB active at a time for
-+ a specific EP. */
-+ if(activeUrbList[epid] != NULL) {
-+ /* An URB is already active on EP, skip checking queue */
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ urb = urb_list_first(epid);
-+ if(urb == NULL) {
-+ /* No URB waiting in EP queue. Nothing do to */
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ urb_priv = urb->hcpriv;
-+ ASSERT(urb_priv != NULL);
-+ ASSERT(urb_priv->urb_state == NOT_STARTED);
-+ ASSERT(!usb_pipeisoc(urb->pipe));
-+
-+ /* Remove this URB from the queue and move it to active */
-+ activeUrbList[epid] = urb;
-+ urb_list_del(urb, epid);
-+
-+ urb_priv->urb_state = STARTED;
-+
-+ /* Reset error counters (regardless of which direction this traffic is). */
-+ etrax_epid_clear_error(epid);
-+
-+ /* Special handling of Intr EP lists */
-+ if(usb_pipeint(urb->pipe)) {
-+ tc_dma_link_intr_urb(urb);
-+ local_irq_restore(flags);
-+ return;
-+ }
-+
-+ /* Software must preset the toggle bits for Bulk and Ctrl */
-+ if(usb_pipecontrol(urb->pipe)) {
-+ /* Toggle bits are initialized only during setup transaction in a
-+ CTRL transfer */
-+ etrax_epid_set_toggle(epid, 0, 0);
-+ etrax_epid_set_toggle(epid, 1, 0);
-+ } else {
-+ toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
-+ usb_pipeout(urb->pipe));
-+ etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
-+ }
-+
-+ tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
-+ (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
-+ sblist_to_str(urb_priv->first_sb));
-+
-+ /* We start the DMA sub channel without checking if it's running or not,
-+ because:
-+ 1) If it's already running, issuing the start command is a nop.
-+ 2) We avoid a test-and-set race condition. */
-+ switch(usb_pipetype(urb->pipe)) {
-+ case PIPE_BULK:
-+ /* Assert that the EP descriptor is disabled. */
-+ ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-+
-+ /* Set up and enable the EP descriptor. */
-+ TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ TxBulkEPList[epid].hw_len = 0;
-+ TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ /* Check if the dummy list is already with us (if several urbs were queued). */
-+ if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
-+ tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
-+ (unsigned long)urb, epid);
-+
-+ /* We don't need to check if the DMA is at this EP or not before changing the
-+ next pointer, since we will do it in one 32-bit write (EP descriptors are
-+ 32-bit aligned). */
-+ TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
-+ }
-+
-+ restart_dma8_sub0();
-+
-+ /* Update/restart the bulk start timer since we just started the channel.*/
-+ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
-+ /* Update/restart the bulk eot timer since we just inserted traffic. */
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+ break;
-+ case PIPE_CONTROL:
-+ /* Assert that the EP descriptor is disabled. */
-+ ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
-+
-+ /* Set up and enable the EP descriptor. */
-+ TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ TxCtrlEPList[epid].hw_len = 0;
-+ TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+
-+ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
-+ break;
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+static void tc_dma_link_intr_urb(struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ volatile struct USB_EP_Desc *tmp_ep;
-+ struct USB_EP_Desc *ep_desc;
-+ int i = 0, epid;
-+ int pool_idx = 0;
-+
-+ ASSERT(urb_priv != NULL);
-+ epid = urb_priv->epid;
-+ ASSERT(urb_priv->interval > 0);
-+ ASSERT(urb_priv->intr_ep_pool_length > 0);
-+
-+ tmp_ep = &TxIntrEPList[0];
-+
-+ /* Only insert one EP descriptor in list for Out Intr URBs.
-+ We can only handle Out Intr with interval of 128ms because
-+ it's not possible to insert several Out Intr EPs because they
-+ are not consumed by the DMA. */
-+ if(usb_pipeout(urb->pipe)) {
-+ ep_desc = urb_priv->intr_ep_pool[0];
-+ ASSERT(ep_desc);
-+ ep_desc->next = tmp_ep->next;
-+ tmp_ep->next = virt_to_phys(ep_desc);
-+ i++;
-+ } else {
-+ /* Loop through Intr EP descriptor list and insert EP for URB at
-+ specified interval */
-+ do {
-+ /* Each EP descriptor with eof flag sat signals a new frame */
-+ if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
-+ /* Insert a EP from URBs EP pool at correct interval */
-+ if ((i % urb_priv->interval) == 0) {
-+ ep_desc = urb_priv->intr_ep_pool[pool_idx];
-+ ASSERT(ep_desc);
-+ ep_desc->next = tmp_ep->next;
-+ tmp_ep->next = virt_to_phys(ep_desc);
-+ pool_idx++;
-+ ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
-+ }
-+ i++;
-+ }
-+ tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
-+ } while(tmp_ep != &TxIntrEPList[0]);
-+ }
-+
-+ intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
-+ sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
-+
-+ /* We start the DMA sub channel without checking if it's running or not,
-+ because:
-+ 1) If it's already running, issuing the start command is a nop.
-+ 2) We avoid a test-and-set race condition. */
-+ *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
-+}
-+
-+static void tc_dma_process_isoc_urb(struct urb *urb) {
-+ unsigned long flags;
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ int epid;
-+
-+ /* Do not disturb us while fiddling with EPs and epids */
-+ local_irq_save(flags);
-+
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->first_sb);
-+ epid = urb_priv->epid;
-+
-+ if(activeUrbList[epid] == NULL) {
-+ /* EP is idle, so make this URB active */
-+ activeUrbList[epid] = urb;
-+ urb_list_del(urb, epid);
-+ ASSERT(TxIsocEPList[epid].sub == 0);
-+ ASSERT(!(TxIsocEPList[epid].command &
-+ IO_STATE(USB_EP_command, enable, yes)));
-+
-+ /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
-+ if(usb_pipein(urb->pipe)) {
-+ /* Each EP for In Isoc will have only one SB descriptor, setup when
-+ submitting the first active urb. We do it here by copying from URBs
-+ pre-allocated SB. */
-+ memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
-+ sizeof(TxIsocSBList[epid]));
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
-+ } else {
-+ /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+
-+ isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
-+ " last_sb::0x%x\n",
-+ (unsigned int)urb, urb_priv->urb_num, epid,
-+ (unsigned int)(urb_priv->first_sb),
-+ (unsigned int)(urb_priv->last_sb));
-+ }
-+
-+ if (urb->transfer_flags & URB_ISO_ASAP) {
-+ /* The isoc transfer should be started as soon as possible. The
-+ start_frame field is a return value if URB_ISO_ASAP was set. Comparing
-+ R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
-+ token is sent 2 frames later. I'm not sure how this affects usage of
-+ the start_frame field by the device driver, or how it affects things
-+ when USB_ISO_ASAP is not set, so therefore there's no compensation for
-+ the 2 frame "lag" here. */
-+ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
-+ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
-+ urb_priv->urb_state = STARTED;
-+ isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
-+ urb->start_frame);
-+ } else {
-+ /* Not started yet. */
-+ urb_priv->urb_state = NOT_STARTED;
-+ isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
-+ (unsigned int)urb);
-+ }
-+
-+ } else {
-+ /* An URB is already active on the EP. Leave URB in queue and let
-+ finish_isoc_urb process it after current active URB */
-+ ASSERT(TxIsocEPList[epid].sub != 0);
-+
-+ if(usb_pipein(urb->pipe)) {
-+ /* Because there already is a active In URB on this epid we do nothing
-+ and the finish_isoc_urb() function will handle switching to next URB*/
-+
-+ } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
-+ struct USB_SB_Desc *temp_sb_desc;
-+
-+ /* Set state STARTED to all Out Isoc URBs added to SB list because we
-+ don't know how many of them that are finished before descr interrupt*/
-+ urb_priv->urb_state = STARTED;
-+
-+ /* Find end of current SB list by looking for SB with eol flag sat */
-+ temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
-+ while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
-+ IO_STATE(USB_SB_command, eol, yes)) {
-+ ASSERT(temp_sb_desc->next);
-+ temp_sb_desc = phys_to_virt(temp_sb_desc->next);
-+ }
-+
-+ isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
-+ " sub:0x%x eol:0x%x\n",
-+ (unsigned int)urb, urb_priv->urb_num,
-+ (unsigned int)(urb_priv->first_sb),
-+ (unsigned int)(urb_priv->last_sb), epid,
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)temp_sb_desc);
-+
-+ /* Next pointer must be set before eol is removed. */
-+ temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
-+ /* Clear the previous end of list flag since there is a new in the
-+ added SB descriptor list. */
-+ temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
-+
-+ if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
-+ __u32 epid_data;
-+ /* 8.8.5 in Designer's Reference says we should check for and correct
-+ any errors in the EP here. That should not be necessary if
-+ epid_attn is handled correctly, so we assume all is ok. */
-+ epid_data = etrax_epid_iso_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
-+ " URB:0x%x[%d]\n",
-+ IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+
-+ /* The SB list was exhausted. */
-+ if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
-+ /* The new sublist did not get processed before the EP was
-+ disabled. Setup the EP again. */
-+
-+ if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
-+ isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
-+ ", restarting from this URBs SB:0x%x\n",
-+ epid, (unsigned int)temp_sb_desc,
-+ (unsigned int)(urb_priv->first_sb));
-+ TxIsocEPList[epid].hw_len = 0;
-+ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
-+ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
-+ /* Enable the EP again so data gets processed this time */
-+ TxIsocEPList[epid].command |=
-+ IO_STATE(USB_EP_command, enable, yes);
-+
-+ } else {
-+ /* The EP has been disabled but not at end this URB (god knows
-+ where). This should generate an epid_attn so we should not be
-+ here */
-+ isoc_warn("EP was disabled on sb:0x%x before SB list for"
-+ " URB:0x%x[%d] got processed\n",
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ } else {
-+ /* This might happend if we are slow on this function and isn't
-+ an error. */
-+ isoc_dbg("EP was disabled and finished with SBs from appended"
-+ " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ }
-+ }
-+ }
-+
-+ /* Start the DMA sub channel */
-+ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
-+
-+ local_irq_restore(flags);
-+}
-+
-+static void tc_dma_unlink_intr_urb(struct urb *urb) {
-+ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
-+ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+ volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
-+ the list. */
-+ int count = 0;
-+ volatile int timeout = 10000;
-+ int epid;
-+
-+ /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
-+ List". */
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->intr_ep_pool_length > 0);
-+ epid = urb_priv->epid;
-+
-+ /* First disable all Intr EPs belonging to epid for this URB */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* Disable EP */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+
-+ /* Now unlink all EPs belonging to this epid from Descr list */
-+ first_ep = &TxIntrEPList[0];
-+ curr_ep = first_ep;
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
-+ /* This is the one we should unlink. */
-+ unlink_ep = next_ep;
-+
-+ /* Actually unlink the EP from the DMA list. */
-+ curr_ep->next = unlink_ep->next;
-+
-+ /* Wait until the DMA is no longer at this descriptor. */
-+ while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
-+ (timeout-- > 0));
-+ if(timeout == 0) {
-+ warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
-+ }
-+
-+ count++;
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != first_ep);
-+
-+ if(count != urb_priv->intr_ep_pool_length) {
-+ intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ } else {
-+ intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
-+ urb_priv->intr_ep_pool_length, (unsigned int)urb);
-+ }
-+}
-+
-+static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
-+ int timer) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ __u32 epid_data;
-+
-+ /* Protect TxEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ /* A finished EP descriptor is disabled and has a valid sub pointer */
-+ if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
-+ (TxBulkEPList[epid].sub != 0)) {
-+
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+ /* Sanity checks */
-+ ASSERT(urb);
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Only handle finished out Bulk EPs here,
-+ and let RX interrupt take care of the rest */
-+ if(!epid_out_traffic(epid)) {
-+ continue;
-+ }
-+
-+ if(timer) {
-+ tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
-+ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ } else {
-+ tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
-+ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
-+ urb_priv->urb_num);
-+ }
-+
-+ if(urb_priv->urb_state == UNLINK) {
-+ /* This Bulk URB is requested to be unlinked, that means that the EP
-+ has been disabled and we might not have sent all data */
-+ tc_finish_urb(hcd, urb, urb->status);
-+ continue;
-+ }
-+
-+ ASSERT(urb_priv->urb_state == STARTED);
-+ if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
-+ tc_err("Endpoint got disabled before reaching last sb\n");
-+ }
-+
-+ epid_data = etrax_epid_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ /* This means that the endpoint has no error, is disabled
-+ and had inserted traffic, i.e. transfer successfully completed. */
-+ tc_finish_urb(hcd, urb, 0);
-+ } else {
-+ /* Shouldn't happen. We expect errors to be caught by epid
-+ attention. */
-+ tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
-+ epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
-+ }
-+ } else {
-+ tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
-+ }
-+ }
-+
-+ local_irq_restore(flags);
-+}
-+
-+static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ __u32 epid_data;
-+
-+ /* Protect TxEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if(epid == DUMMY_EPID)
-+ continue;
-+
-+ /* A finished EP descriptor is disabled and has a valid sub pointer */
-+ if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
-+ (TxCtrlEPList[epid].sub != 0)) {
-+
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+
-+ if(urb == NULL) {
-+ tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ /* Sanity checks */
-+ ASSERT(usb_pipein(urb->pipe));
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
-+ tc_err("Endpoint got disabled before reaching last sb\n");
-+ }
-+
-+ epid_data = etrax_epid_get(epid);
-+ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
-+ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
-+ /* This means that the endpoint has no error, is disabled
-+ and had inserted traffic, i.e. transfer successfully completed. */
-+
-+ /* Check if RX-interrupt for In Ctrl has been processed before
-+ finishing the URB */
-+ if(urb_priv->ctrl_rx_done) {
-+ tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+ tc_finish_urb(hcd, urb, 0);
-+ } else {
-+ /* If we get zout descriptor interrupt before RX was done for a
-+ In Ctrl transfer, then we flag that and it will be finished
-+ in the RX-Interrupt */
-+ urb_priv->ctrl_zout_done = 1;
-+ tc_dbg("Got zout descr interrupt before RX interrupt\n");
-+ }
-+ } else {
-+ /* Shouldn't happen. We expect errors to be caught by epid
-+ attention. */
-+ tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
-+ __dump_ep_desc(&(TxCtrlEPList[epid]));
-+ __dump_ept_data(epid);
-+ }
-+ }
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+/* This function goes through all epids that are setup for Out Isoc transfers
-+ and marks (isoc_out_done) all queued URBs that the DMA has finished
-+ transfer for.
-+ No URB completetion is done here to make interrupt routine return quickly.
-+ URBs are completed later with help of complete_isoc_bottom_half() that
-+ becomes schedules when this functions is finished. */
-+static void check_finished_isoc_tx_epids(void) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ struct USB_SB_Desc* sb_desc;
-+ int epid_done;
-+
-+ /* Protect TxIsocEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
-+ !epid_out_traffic(epid)) {
-+ /* Nothing here to see. */
-+ continue;
-+ }
-+ ASSERT(epid_inuse(epid));
-+ ASSERT(epid_isoc(epid));
-+
-+ sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
-+ /* Find the last descriptor of the currently active URB for this ep.
-+ This is the first descriptor in the sub list marked for a descriptor
-+ interrupt. */
-+ while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
-+ sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
-+ }
-+ ASSERT(sb_desc);
-+
-+ isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
-+ epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
-+ (unsigned int)sb_desc);
-+
-+ urb = activeUrbList[epid];
-+ if(urb == NULL) {
-+ isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ epid_done = 0;
-+ while(urb && !epid_done) {
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->urb_state == STARTED ||
-+ urb_priv->urb_state == UNLINK);
-+
-+ if (sb_desc != urb_priv->last_sb) {
-+ /* This urb has been sent. */
-+ urb_priv->isoc_out_done = 1;
-+
-+ } else { /* Found URB that has last_sb as the interrupt reason */
-+
-+ /* Check if EP has been disabled, meaning that all transfers are done*/
-+ if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
-+ ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
-+ IO_STATE(USB_SB_command, eol, yes));
-+ ASSERT(sb_desc->next == 0);
-+ urb_priv->isoc_out_done = 1;
-+ } else {
-+ isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+ /* Stop looking any further in queue */
-+ epid_done = 1;
-+ }
-+
-+ if (!epid_done) {
-+ if(urb == activeUrbList[epid]) {
-+ urb = urb_list_first(epid);
-+ } else {
-+ urb = urb_list_next(urb, epid);
-+ }
-+ }
-+ } /* END: while(urb && !epid_done) */
-+ }
-+
-+ local_irq_restore(flags);
-+}
-+
-+
-+/* This is where the Out Isoc URBs are realy completed. This function is
-+ scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
-+ are done. This functions completes all URBs earlier marked with
-+ isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
-+
-+static void complete_isoc_bottom_half(void *data) {
-+ struct crisv10_isoc_complete_data *comp_data;
-+ struct usb_iso_packet_descriptor *packet;
-+ struct crisv10_urb_priv * urb_priv;
-+ unsigned long flags;
-+ struct urb* urb;
-+ int epid_done;
-+ int epid;
-+ int i;
-+
-+ comp_data = (struct crisv10_isoc_complete_data*)data;
-+
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
-+ if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
-+ /* Only check valid Out Isoc epids */
-+ continue;
-+ }
-+
-+ isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
-+ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
-+
-+ /* The descriptor interrupt handler has marked all transmitted Out Isoc
-+ URBs with isoc_out_done. Now we traverse all epids and for all that
-+ have out Isoc traffic we traverse its URB list and complete the
-+ transmitted URBs. */
-+ epid_done = 0;
-+ while (!epid_done) {
-+
-+ /* Get the active urb (if any) */
-+ urb = activeUrbList[epid];
-+ if (urb == 0) {
-+ isoc_dbg("No active URB on epid:%d anymore\n", epid);
-+ epid_done = 1;
-+ continue;
-+ }
-+
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ if (!(urb_priv->isoc_out_done)) {
-+ /* We have reached URB that isn't flaged done yet, stop traversing. */
-+ isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
-+ " before not yet flaged URB:0x%x[%d]\n",
-+ epid, (unsigned int)urb, urb_priv->urb_num);
-+ epid_done = 1;
-+ continue;
-+ }
-+
-+ /* This urb has been sent. */
-+ isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
-+ (unsigned int)urb, urb_priv->urb_num);
-+
-+ /* Set ok on transfered packets for this URB and finish it */
-+ for (i = 0; i < urb->number_of_packets; i++) {
-+ packet = &urb->iso_frame_desc[i];
-+ packet->status = 0;
-+ packet->actual_length = packet->length;
-+ }
-+ urb_priv->isoc_packet_counter = urb->number_of_packets;
-+ tc_finish_urb(comp_data->hcd, urb, 0);
-+
-+ } /* END: while(!epid_done) */
-+ } /* END: for(epid...) */
-+
-+ local_irq_restore(flags);
-+ kmem_cache_free(isoc_compl_cache, comp_data);
-+}
-+
-+
-+static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
-+ unsigned long flags;
-+ int epid;
-+ struct urb *urb;
-+ struct crisv10_urb_priv * urb_priv;
-+ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
-+ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
-+
-+ /* Protect TxintrEPList */
-+ local_irq_save(flags);
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
-+ /* Nothing to see on this epid. Only check valid Out Intr epids */
-+ continue;
-+ }
-+
-+ urb = activeUrbList[epid];
-+ if(urb == 0) {
-+ intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
-+ continue;
-+ }
-+
-+ /* Sanity check. */
-+ ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
-+ ASSERT(usb_pipeout(urb->pipe));
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+
-+ /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
-+ are inserted.*/
-+ curr_ep = &TxIntrEPList[0];
-+ do {
-+ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
-+ if(next_ep == urb_priv->intr_ep_pool[0]) {
-+ /* We found the Out Intr EP for this epid */
-+
-+ /* Disable it so it doesn't get processed again */
-+ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
-+
-+ /* Finish the active Out Intr URB with status OK */
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ curr_ep = phys_to_virt(curr_ep->next);
-+ } while (curr_ep != &TxIntrEPList[1]);
-+
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
-+static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
-+ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
-+ ASSERT(hcd);
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
-+ restart_dma8_sub0();
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
-+ check_finished_ctrl_tx_epids(hcd);
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
-+ check_finished_intr_tx_epids(hcd);
-+ }
-+
-+ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
-+ struct crisv10_isoc_complete_data* comp_data;
-+
-+ /* Flag done Out Isoc for later completion */
-+ check_finished_isoc_tx_epids();
-+
-+ /* Clear this interrupt */
-+ *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
-+ /* Schedule bottom half of Out Isoc completion function. This function
-+ finishes the URBs marked with isoc_out_done */
-+ comp_data = (struct crisv10_isoc_complete_data*)
-+ kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
-+ ASSERT(comp_data != NULL);
-+ comp_data ->hcd = hcd;
-+
-+ INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
-+ schedule_work(&comp_data->usb_bh);
-+ }
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
-+static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
-+ unsigned long flags;
-+ struct urb *urb;
-+ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
-+ struct crisv10_urb_priv *urb_priv;
-+ int epid = 0;
-+ int real_error;
-+
-+ ASSERT(hcd);
-+
-+ /* Clear this interrupt. */
-+ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
-+
-+ /* Custom clear interrupt for this interrupt */
-+ /* The reason we cli here is that we call the driver's callback functions. */
-+ local_irq_save(flags);
-+
-+ /* Note that this while loop assumes that all packets span only
-+ one rx descriptor. */
-+ while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
-+ epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
-+ /* Get the active URB for this epid */
-+ urb = activeUrbList[epid];
-+
-+ ASSERT(epid_inuse(epid));
-+ if (!urb) {
-+ dma_err("No urb for epid %d in rx interrupt\n", epid);
-+ goto skip_out;
-+ }
-+
-+ /* Check if any errors on epid */
-+ real_error = 0;
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
-+ __u32 r_usb_ept_data;
-+
-+ if (usb_pipeisoc(urb->pipe)) {
-+ r_usb_ept_data = etrax_epid_iso_get(epid);
-+ if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
-+ (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
-+ (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
-+ /* Not an error, just a failure to receive an expected iso
-+ in packet in this frame. This is not documented
-+ in the designers reference. Continue processing.
-+ */
-+ } else real_error = 1;
-+ } else real_error = 1;
-+ }
-+
-+ if(real_error) {
-+ dma_err("Error in RX descr on epid:%d for URB 0x%x",
-+ epid, (unsigned int)urb);
-+ dump_ept_data(epid);
-+ dump_in_desc(myNextRxDesc);
-+ goto skip_out;
-+ }
-+
-+ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
-+ ASSERT(urb_priv);
-+ ASSERT(urb_priv->urb_state == STARTED ||
-+ urb_priv->urb_state == UNLINK);
-+
-+ if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
-+ (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
-+ (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
-+
-+ /* We get nodata for empty data transactions, and the rx descriptor's
-+ hw_len field is not valid in that case. No data to copy in other
-+ words. */
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-+ /* No data to copy */
-+ } else {
-+ /*
-+ dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
-+ (unsigned int)urb, epid, myNextRxDesc->hw_len,
-+ urb_priv->rx_offset);
-+ */
-+ /* Only copy data if URB isn't flaged to be unlinked*/
-+ if(urb_priv->urb_state != UNLINK) {
-+ /* Make sure the data fits in the buffer. */
-+ if(urb_priv->rx_offset + myNextRxDesc->hw_len
-+ <= urb->transfer_buffer_length) {
-+
-+ /* Copy the data to URBs buffer */
-+ memcpy(urb->transfer_buffer + urb_priv->rx_offset,
-+ phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
-+ urb_priv->rx_offset += myNextRxDesc->hw_len;
-+ } else {
-+ /* Signal overflow when returning URB */
-+ urb->status = -EOVERFLOW;
-+ tc_finish_urb_later(hcd, urb, urb->status);
-+ }
-+ }
-+ }
-+
-+ /* Check if it was the last packet in the transfer */
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
-+ /* Special handling for In Ctrl URBs. */
-+ if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
-+ !(urb_priv->ctrl_zout_done)) {
-+ /* Flag that RX part of Ctrl transfer is done. Because zout descr
-+ interrupt hasn't happend yet will the URB be finished in the
-+ TX-Interrupt. */
-+ urb_priv->ctrl_rx_done = 1;
-+ tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
-+ " for zout\n", (unsigned int)urb);
-+ } else {
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ }
-+ } else { /* ISOC RX */
-+ /*
-+ isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
-+ epid, (unsigned int)urb);
-+ */
-+
-+ struct usb_iso_packet_descriptor *packet;
-+
-+ if (urb_priv->urb_state == UNLINK) {
-+ isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
-+ goto skip_out;
-+ } else if (urb_priv->urb_state == NOT_STARTED) {
-+ isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
-+ goto skip_out;
-+ }
-+
-+ packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
-+ ASSERT(packet);
-+ packet->status = 0;
-+
-+ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
-+ /* We get nodata for empty data transactions, and the rx descriptor's
-+ hw_len field is not valid in that case. We copy 0 bytes however to
-+ stay in synch. */
-+ packet->actual_length = 0;
-+ } else {
-+ packet->actual_length = myNextRxDesc->hw_len;
-+ /* Make sure the data fits in the buffer. */
-+ ASSERT(packet->actual_length <= packet->length);
-+ memcpy(urb->transfer_buffer + packet->offset,
-+ phys_to_virt(myNextRxDesc->buf), packet->actual_length);
-+ if(packet->actual_length > 0)
-+ isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
-+ packet->actual_length, urb_priv->isoc_packet_counter,
-+ (unsigned int)urb, urb_priv->urb_num);
-+ }
-+
-+ /* Increment the packet counter. */
-+ urb_priv->isoc_packet_counter++;
-+
-+ /* Note that we don't care about the eot field in the rx descriptor's
-+ status. It will always be set for isoc traffic. */
-+ if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
-+ /* Complete the urb with status OK. */
-+ tc_finish_urb(hcd, urb, 0);
-+ }
-+ }
-+
-+ skip_out:
-+ myNextRxDesc->status = 0;
-+ myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
-+ myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
-+ myLastRxDesc = myNextRxDesc;
-+ myNextRxDesc = phys_to_virt(myNextRxDesc->next);
-+ flush_etrax_cache();
-+ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
-+ }
-+
-+ local_irq_restore(flags);
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static void tc_bulk_start_timer_func(unsigned long dummy) {
-+ /* We might enable an EP descriptor behind the current DMA position when
-+ it's about to decide that there are no more bulk traffic and it should
-+ stop the bulk channel.
-+ Therefore we periodically check if the bulk channel is stopped and there
-+ is an enabled bulk EP descriptor, in which case we start the bulk
-+ channel. */
-+
-+ if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
-+ int epid;
-+
-+ timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
-+
-+ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
-+ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
-+ timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
-+ epid);
-+ restart_dma8_sub0();
-+
-+ /* Restart the bulk eot timer since we just started the bulk channel.*/
-+ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
-+
-+ /* No need to search any further. */
-+ break;
-+ }
-+ }
-+ } else {
-+ timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
-+ }
-+}
-+
-+static void tc_bulk_eot_timer_func(unsigned long dummy) {
-+ struct usb_hcd *hcd = (struct usb_hcd*)dummy;
-+ ASSERT(hcd);
-+ /* Because of a race condition in the top half, we might miss a bulk eot.
-+ This timer "simulates" a bulk eot if we don't get one for a while,
-+ hopefully correcting the situation. */
-+ timer_dbg("bulk_eot_timer timed out.\n");
-+ check_finished_bulk_tx_epids(hcd, 1);
-+}
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Device driver block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* Forward declarations for device driver functions */
-+static int devdrv_hcd_probe(struct device *);
-+static int devdrv_hcd_remove(struct device *);
-+#ifdef CONFIG_PM
-+static int devdrv_hcd_suspend(struct device *, u32, u32);
-+static int devdrv_hcd_resume(struct device *, u32);
-+#endif /* CONFIG_PM */
-+
-+/* the device */
-+static struct platform_device *devdrv_hc_platform_device;
-+
-+/* device driver interface */
-+static struct device_driver devdrv_hc_device_driver = {
-+ .name = (char *) hc_name,
-+ .bus = &platform_bus_type,
-+
-+ .probe = devdrv_hcd_probe,
-+ .remove = devdrv_hcd_remove,
-+
-+#ifdef CONFIG_PM
-+ .suspend = devdrv_hcd_suspend,
-+ .resume = devdrv_hcd_resume,
-+#endif /* CONFIG_PM */
-+};
-+
-+/* initialize the host controller and driver */
-+static int __init_or_module devdrv_hcd_probe(struct device *dev)
-+{
-+ struct usb_hcd *hcd;
-+ struct crisv10_hcd *crisv10_hcd;
-+ int retval;
-+
-+ /* Check DMA burst length */
-+ if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
-+ IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
-+ devdrv_err("Invalid DMA burst length in Etrax 100LX,"
-+ " needs to be 32\n");
-+ return -EPERM;
-+ }
-+
-+ hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
-+ if (!hcd)
-+ return -ENOMEM;
-+
-+ crisv10_hcd = hcd_to_crisv10_hcd(hcd);
-+ spin_lock_init(&crisv10_hcd->lock);
-+ crisv10_hcd->num_ports = num_ports();
-+ crisv10_hcd->running = 0;
-+
-+ dev_set_drvdata(dev, crisv10_hcd);
-+
-+ devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
-+ ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
-+
-+ /* Print out chip version read from registers */
-+ int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
-+ int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
-+ if(rev_min == 0) {
-+ devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
-+ } else {
-+ devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
-+ }
-+
-+ devdrv_info("Bulk timer interval, start:%d eot:%d\n",
-+ BULK_START_TIMER_INTERVAL,
-+ BULK_EOT_TIMER_INTERVAL);
-+
-+
-+ /* Init root hub data structures */
-+ if(rh_init()) {
-+ devdrv_err("Failed init data for Root Hub\n");
-+ retval = -ENOMEM;
-+ }
-+
-+ if(port_in_use(0)) {
-+ if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
-+ printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+ devdrv_info("Claimed interface for USB physical port 1\n");
-+ }
-+ if(port_in_use(1)) {
-+ if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
-+ /* Free first interface if second failed to be claimed */
-+ if(port_in_use(0)) {
-+ cris_free_io_interface(if_usb_1);
-+ }
-+ printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+ devdrv_info("Claimed interface for USB physical port 2\n");
-+ }
-+
-+ /* Init transfer controller structs and locks */
-+ if((retval = tc_init(hcd)) != 0) {
-+ goto out;
-+ }
-+
-+ /* Attach interrupt functions for DMA and init DMA controller */
-+ if((retval = tc_dma_init(hcd)) != 0) {
-+ goto out;
-+ }
-+
-+ /* Attach the top IRQ handler for USB controller interrupts */
-+ if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
-+ "ETRAX 100LX built-in USB (HC)", hcd)) {
-+ err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
-+ retval = -EBUSY;
-+ goto out;
-+ }
-+
-+ /* iso_eof is only enabled when isoc traffic is running. */
-+ *R_USB_IRQ_MASK_SET =
-+ /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
-+ IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
-+ IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
-+
-+
-+ crisv10_ready_wait();
-+ /* Reset the USB interface. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
-+
-+ /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
-+ 0x2A30 (10800), to guarantee that control traffic gets 10% of the
-+ bandwidth, and periodic transfer may allocate the rest (90%).
-+ This doesn't work though.
-+ The value 11960 is chosen to be just after the SOF token, with a couple
-+ of bit times extra for possible bit stuffing. */
-+ *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
-+
-+ crisv10_ready_wait();
-+ /* Configure the USB interface as a host controller. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
-+
-+
-+ /* Check so controller not busy before enabling ports */
-+ crisv10_ready_wait();
-+
-+ /* Enable selected USB ports */
-+ if(port_in_use(0)) {
-+ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
-+ } else {
-+ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
-+ }
-+ if(port_in_use(1)) {
-+ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
-+ } else {
-+ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
-+ }
-+
-+ crisv10_ready_wait();
-+ /* Start processing of USB traffic. */
-+ *R_USB_COMMAND =
-+ IO_STATE(R_USB_COMMAND, port_sel, nop) |
-+ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
-+ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
-+
-+ /* Do not continue probing initialization before USB interface is done */
-+ crisv10_ready_wait();
-+
-+ /* Register our Host Controller to USB Core
-+ * Finish the remaining parts of generic HCD initialization: allocate the
-+ * buffers of consistent memory, register the bus
-+ * and call the driver's reset() and start() routines. */
-+ retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
-+ if (retval != 0) {
-+ devdrv_err("Failed registering HCD driver\n");
-+ goto out;
-+ }
-+
-+ return 0;
-+
-+ out:
-+ devdrv_hcd_remove(dev);
-+ return retval;
-+}
-+
-+
-+/* cleanup after the host controller and driver */
-+static int __init_or_module devdrv_hcd_remove(struct device *dev)
-+{
-+ struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
-+ struct usb_hcd *hcd;
-+
-+ if (!crisv10_hcd)
-+ return 0;
-+ hcd = crisv10_hcd_to_hcd(crisv10_hcd);
-+
-+
-+ /* Stop USB Controller in Etrax 100LX */
-+ crisv10_hcd_reset(hcd);
-+
-+ usb_remove_hcd(hcd);
-+ devdrv_dbg("Removed HCD from USB Core\n");
-+
-+ /* Free USB Controller IRQ */
-+ free_irq(ETRAX_USB_HC_IRQ, NULL);
-+
-+ /* Free resources */
-+ tc_dma_destroy();
-+ tc_destroy();
-+
-+
-+ if(port_in_use(0)) {
-+ cris_free_io_interface(if_usb_1);
-+ }
-+ if(port_in_use(1)) {
-+ cris_free_io_interface(if_usb_2);
-+ }
-+
-+ devdrv_dbg("Freed all claimed resources\n");
-+
-+ return 0;
-+}
-+
-+
-+#ifdef CONFIG_PM
-+
-+static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
-+{
-+ return 0; /* no-op for now */
-+}
-+
-+#endif /* CONFIG_PM */
-+
-+
-+
-+/*************************************************************/
-+/*************************************************************/
-+/* Module block */
-+/*************************************************************/
-+/*************************************************************/
-+
-+/* register driver */
-+static int __init module_hcd_init(void)
-+{
-+
-+ if (usb_disabled())
-+ return -ENODEV;
-+
-+ /* Here we select enabled ports by following defines created from
-+ menuconfig */
-+#ifndef CONFIG_ETRAX_USB_HOST_PORT1
-+ ports &= ~(1<<0);
-+#endif
-+#ifndef CONFIG_ETRAX_USB_HOST_PORT2
-+ ports &= ~(1<<1);
-+#endif
-+
-+ printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
-+
-+ devdrv_hc_platform_device =
-+ platform_device_register_simple((char *) hc_name, 0, NULL, 0);
-+
-+ if (IS_ERR(devdrv_hc_platform_device))
-+ return PTR_ERR(devdrv_hc_platform_device);
-+ return driver_register(&devdrv_hc_device_driver);
-+ /*
-+ * Note that we do not set the DMA mask for the device,
-+ * i.e. we pretend that we will use PIO, since no specific
-+ * allocation routines are needed for DMA buffers. This will
-+ * cause the HCD buffer allocation routines to fall back to
-+ * kmalloc().
-+ */
-+}
-+
-+/* unregister driver */
-+static void __exit module_hcd_exit(void)
-+{
-+ driver_unregister(&devdrv_hc_device_driver);
-+}
-+
-+
-+/* Module hooks */
-+module_init(module_hcd_init);
-+module_exit(module_hcd_exit);
---- linux-2.6.19.2.orig/drivers/usb/host/hc_crisv10.h 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/usb/host/hc_crisv10.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,289 +0,0 @@
--#ifndef __LINUX_ETRAX_USB_H
--#define __LINUX_ETRAX_USB_H
--
--#include <linux/types.h>
--#include <linux/list.h>
--
--typedef struct USB_IN_Desc {
-- volatile __u16 sw_len;
-- volatile __u16 command;
-- volatile unsigned long next;
-- volatile unsigned long buf;
-- volatile __u16 hw_len;
-- volatile __u16 status;
--} USB_IN_Desc_t;
--
--typedef struct USB_SB_Desc {
-- volatile __u16 sw_len;
-- volatile __u16 command;
-- volatile unsigned long next;
-- volatile unsigned long buf;
-- __u32 dummy;
--} USB_SB_Desc_t;
--
--typedef struct USB_EP_Desc {
-- volatile __u16 hw_len;
-- volatile __u16 command;
-- volatile unsigned long sub;
-- volatile unsigned long next;
-- __u32 dummy;
--} USB_EP_Desc_t;
--
--struct virt_root_hub {
-- int devnum;
-- void *urb;
-- void *int_addr;
-- int send;
-- int interval;
-- int numports;
-- struct timer_list rh_int_timer;
-- volatile __u16 wPortChange_1;
-- volatile __u16 wPortChange_2;
-- volatile __u16 prev_wPortStatus_1;
-- volatile __u16 prev_wPortStatus_2;
--};
--
--struct etrax_usb_intr_traffic {
-- int sleeping;
-- int error;
-- struct wait_queue *wq;
--};
--
--typedef struct etrax_usb_hc {
-- struct usb_bus *bus;
-- struct virt_root_hub rh;
-- struct etrax_usb_intr_traffic intr;
--} etrax_hc_t;
--
--typedef enum {
-- STARTED,
-- NOT_STARTED,
-- UNLINK,
-- TRANSFER_DONE,
-- WAITING_FOR_DESCR_INTR
--} etrax_usb_urb_state_t;
--
--
--
--typedef struct etrax_usb_urb_priv {
-- /* The first_sb field is used for freeing all SB descriptors belonging
-- to an urb. The corresponding ep descriptor's sub pointer cannot be
-- used for this since the DMA advances the sub pointer as it processes
-- the sb list. */
-- USB_SB_Desc_t *first_sb;
-- /* The last_sb field referes to the last SB descriptor that belongs to
-- this urb. This is important to know so we can free the SB descriptors
-- that ranges between first_sb and last_sb. */
-- USB_SB_Desc_t *last_sb;
--
-- /* The rx_offset field is used in ctrl and bulk traffic to keep track
-- of the offset in the urb's transfer_buffer where incoming data should be
-- copied to. */
-- __u32 rx_offset;
--
-- /* Counter used in isochronous transfers to keep track of the
-- number of packets received/transmitted. */
-- __u32 isoc_packet_counter;
--
-- /* This field is used to pass information about the urb's current state between
-- the various interrupt handlers (thus marked volatile). */
-- volatile etrax_usb_urb_state_t urb_state;
--
-- /* Connection between the submitted urb and ETRAX epid number */
-- __u8 epid;
--
-- /* The rx_data_list field is used for periodic traffic, to hold
-- received data for later processing in the the complete_urb functions,
-- where the data us copied to the urb's transfer_buffer. Basically, we
-- use this intermediate storage because we don't know when it's safe to
-- reuse the transfer_buffer (FIXME?). */
-- struct list_head rx_data_list;
--} etrax_urb_priv_t;
--
--/* This struct is for passing data from the top half to the bottom half. */
--typedef struct usb_interrupt_registers
--{
-- etrax_hc_t *hc;
-- __u32 r_usb_epid_attn;
-- __u8 r_usb_status;
-- __u16 r_usb_rh_port_status_1;
-- __u16 r_usb_rh_port_status_2;
-- __u32 r_usb_irq_mask_read;
-- __u32 r_usb_fm_number;
-- struct work_struct usb_bh;
--} usb_interrupt_registers_t;
--
--/* This struct is for passing data from the isoc top half to the isoc bottom half. */
--typedef struct usb_isoc_complete_data
--{
-- struct urb *urb;
-- struct work_struct usb_bh;
--} usb_isoc_complete_data_t;
--
--/* This struct holds data we get from the rx descriptors for DMA channel 9
-- for periodic traffic (intr and isoc). */
--typedef struct rx_data
--{
-- void *data;
-- int length;
-- struct list_head list;
--} rx_data_t;
--
--typedef struct urb_entry
--{
-- struct urb *urb;
-- struct list_head list;
--} urb_entry_t;
--
--/* ---------------------------------------------------------------------------
-- Virtual Root HUB
-- ------------------------------------------------------------------------- */
--/* destination of request */
--#define RH_INTERFACE 0x01
--#define RH_ENDPOINT 0x02
--#define RH_OTHER 0x03
--
--#define RH_CLASS 0x20
--#define RH_VENDOR 0x40
--
--/* Requests: bRequest << 8 | bmRequestType */
--#define RH_GET_STATUS 0x0080
--#define RH_CLEAR_FEATURE 0x0100
--#define RH_SET_FEATURE 0x0300
--#define RH_SET_ADDRESS 0x0500
--#define RH_GET_DESCRIPTOR 0x0680
--#define RH_SET_DESCRIPTOR 0x0700
--#define RH_GET_CONFIGURATION 0x0880
--#define RH_SET_CONFIGURATION 0x0900
--#define RH_GET_STATE 0x0280
--#define RH_GET_INTERFACE 0x0A80
--#define RH_SET_INTERFACE 0x0B00
--#define RH_SYNC_FRAME 0x0C80
--/* Our Vendor Specific Request */
--#define RH_SET_EP 0x2000
--
--
--/* Hub port features */
--#define RH_PORT_CONNECTION 0x00
--#define RH_PORT_ENABLE 0x01
--#define RH_PORT_SUSPEND 0x02
--#define RH_PORT_OVER_CURRENT 0x03
--#define RH_PORT_RESET 0x04
--#define RH_PORT_POWER 0x08
--#define RH_PORT_LOW_SPEED 0x09
--#define RH_C_PORT_CONNECTION 0x10
--#define RH_C_PORT_ENABLE 0x11
--#define RH_C_PORT_SUSPEND 0x12
--#define RH_C_PORT_OVER_CURRENT 0x13
--#define RH_C_PORT_RESET 0x14
--
--/* Hub features */
--#define RH_C_HUB_LOCAL_POWER 0x00
--#define RH_C_HUB_OVER_CURRENT 0x01
--
--#define RH_DEVICE_REMOTE_WAKEUP 0x00
--#define RH_ENDPOINT_STALL 0x01
--
--/* Our Vendor Specific feature */
--#define RH_REMOVE_EP 0x00
--
--
--#define RH_ACK 0x01
--#define RH_REQ_ERR -1
--#define RH_NACK 0x00
--
--/* Field definitions for */
--
--#define USB_IN_command__eol__BITNR 0 /* command macros */
--#define USB_IN_command__eol__WIDTH 1
--#define USB_IN_command__eol__no 0
--#define USB_IN_command__eol__yes 1
--
--#define USB_IN_command__intr__BITNR 3
--#define USB_IN_command__intr__WIDTH 1
--#define USB_IN_command__intr__no 0
--#define USB_IN_command__intr__yes 1
--
--#define USB_IN_status__eop__BITNR 1 /* status macros. */
--#define USB_IN_status__eop__WIDTH 1
--#define USB_IN_status__eop__no 0
--#define USB_IN_status__eop__yes 1
--
--#define USB_IN_status__eot__BITNR 5
--#define USB_IN_status__eot__WIDTH 1
--#define USB_IN_status__eot__no 0
--#define USB_IN_status__eot__yes 1
--
--#define USB_IN_status__error__BITNR 6
--#define USB_IN_status__error__WIDTH 1
--#define USB_IN_status__error__no 0
--#define USB_IN_status__error__yes 1
--
--#define USB_IN_status__nodata__BITNR 7
--#define USB_IN_status__nodata__WIDTH 1
--#define USB_IN_status__nodata__no 0
--#define USB_IN_status__nodata__yes 1
--
--#define USB_IN_status__epid__BITNR 8
--#define USB_IN_status__epid__WIDTH 5
--
--#define USB_EP_command__eol__BITNR 0
--#define USB_EP_command__eol__WIDTH 1
--#define USB_EP_command__eol__no 0
--#define USB_EP_command__eol__yes 1
--
--#define USB_EP_command__eof__BITNR 1
--#define USB_EP_command__eof__WIDTH 1
--#define USB_EP_command__eof__no 0
--#define USB_EP_command__eof__yes 1
--
--#define USB_EP_command__intr__BITNR 3
--#define USB_EP_command__intr__WIDTH 1
--#define USB_EP_command__intr__no 0
--#define USB_EP_command__intr__yes 1
--
--#define USB_EP_command__enable__BITNR 4
--#define USB_EP_command__enable__WIDTH 1
--#define USB_EP_command__enable__no 0
--#define USB_EP_command__enable__yes 1
--
--#define USB_EP_command__hw_valid__BITNR 5
--#define USB_EP_command__hw_valid__WIDTH 1
--#define USB_EP_command__hw_valid__no 0
--#define USB_EP_command__hw_valid__yes 1
--
--#define USB_EP_command__epid__BITNR 8
--#define USB_EP_command__epid__WIDTH 5
--
--#define USB_SB_command__eol__BITNR 0 /* command macros. */
--#define USB_SB_command__eol__WIDTH 1
--#define USB_SB_command__eol__no 0
--#define USB_SB_command__eol__yes 1
--
--#define USB_SB_command__eot__BITNR 1
--#define USB_SB_command__eot__WIDTH 1
--#define USB_SB_command__eot__no 0
--#define USB_SB_command__eot__yes 1
--
--#define USB_SB_command__intr__BITNR 3
--#define USB_SB_command__intr__WIDTH 1
--#define USB_SB_command__intr__no 0
--#define USB_SB_command__intr__yes 1
--
--#define USB_SB_command__tt__BITNR 4
--#define USB_SB_command__tt__WIDTH 2
--#define USB_SB_command__tt__zout 0
--#define USB_SB_command__tt__in 1
--#define USB_SB_command__tt__out 2
--#define USB_SB_command__tt__setup 3
--
--
--#define USB_SB_command__rem__BITNR 8
--#define USB_SB_command__rem__WIDTH 6
--
--#define USB_SB_command__full__BITNR 6
--#define USB_SB_command__full__WIDTH 1
--#define USB_SB_command__full__no 0
--#define USB_SB_command__full__yes 1
--
--#endif
---- linux-2.6.19.2.orig/drivers/usb/host/hc-crisv10.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.h 2006-01-27 13:59:58.000000000 +0100
-@@ -0,0 +1,330 @@
-+#ifndef __LINUX_ETRAX_USB_H
-+#define __LINUX_ETRAX_USB_H
-+
-+#include <linux/types.h>
-+#include <linux/list.h>
-+
-+struct USB_IN_Desc {
-+ volatile __u16 sw_len;
-+ volatile __u16 command;
-+ volatile unsigned long next;
-+ volatile unsigned long buf;
-+ volatile __u16 hw_len;
-+ volatile __u16 status;
-+};
-+
-+struct USB_SB_Desc {
-+ volatile __u16 sw_len;
-+ volatile __u16 command;
-+ volatile unsigned long next;
-+ volatile unsigned long buf;
-+};
-+
-+struct USB_EP_Desc {
-+ volatile __u16 hw_len;
-+ volatile __u16 command;
-+ volatile unsigned long sub;
-+ volatile unsigned long next;
-+};
-+
-+
-+/* Root Hub port status struct */
-+struct crisv10_rh {
-+ volatile __u16 wPortChange[2];
-+ volatile __u16 wPortStatusPrev[2];
-+};
-+
-+/* HCD description */
-+struct crisv10_hcd {
-+ spinlock_t lock;
-+ __u8 num_ports;
-+ __u8 running;
-+};
-+
-+
-+/* Endpoint HC private data description */
-+struct crisv10_ep_priv {
-+ int epid;
-+};
-+
-+/* Additional software state info for a USB Controller epid */
-+struct etrax_epid {
-+ __u8 inuse; /* !0 = setup in Etrax and used for a endpoint */
-+ __u8 disabled; /* !0 = Temporarly disabled to avoid resubmission */
-+ __u8 type; /* Setup as: PIPE_BULK, PIPE_CONTROL ... */
-+ __u8 out_traffic; /* !0 = This epid is for out traffic */
-+};
-+
-+/* Struct to hold information of scheduled later URB completion */
-+struct urb_later_data {
-+ struct work_struct ws;
-+ struct usb_hcd *hcd;
-+ struct urb *urb;
-+ int urb_num;
-+ int status;
-+};
-+
-+
-+typedef enum {
-+ STARTED,
-+ NOT_STARTED,
-+ UNLINK,
-+} crisv10_urb_state_t;
-+
-+
-+struct crisv10_urb_priv {
-+ /* Sequence number for this URB. Every new submited URB gets this from
-+ a incrementing counter. Used when a URB is scheduled for later finish to
-+ be sure that the intended URB hasn't already been completed (device
-+ drivers has a tendency to reuse URBs once they are completed, causing us
-+ to not be able to single old ones out only based on the URB pointer.) */
-+ __u32 urb_num;
-+
-+ /* The first_sb field is used for freeing all SB descriptors belonging
-+ to an urb. The corresponding ep descriptor's sub pointer cannot be
-+ used for this since the DMA advances the sub pointer as it processes
-+ the sb list. */
-+ struct USB_SB_Desc *first_sb;
-+
-+ /* The last_sb field referes to the last SB descriptor that belongs to
-+ this urb. This is important to know so we can free the SB descriptors
-+ that ranges between first_sb and last_sb. */
-+ struct USB_SB_Desc *last_sb;
-+
-+ /* The rx_offset field is used in ctrl and bulk traffic to keep track
-+ of the offset in the urb's transfer_buffer where incoming data should be
-+ copied to. */
-+ __u32 rx_offset;
-+
-+ /* Counter used in isochronous transfers to keep track of the
-+ number of packets received/transmitted. */
-+ __u32 isoc_packet_counter;
-+
-+ /* Flag that marks if this Isoc Out URB has finished it's transfer. Used
-+ because several URBs can be finished before list is processed */
-+ __u8 isoc_out_done;
-+
-+ /* This field is used to pass information about the urb's current state
-+ between the various interrupt handlers (thus marked volatile). */
-+ volatile crisv10_urb_state_t urb_state;
-+
-+ /* In Ctrl transfers consist of (at least) 3 packets: SETUP, IN and ZOUT.
-+ When DMA8 sub-channel 2 has processed the SB list for this sequence we
-+ get a interrupt. We also get a interrupt for In transfers and which
-+ one of these interrupts that comes first depends of data size and device.
-+ To be sure that we have got both interrupts before we complete the URB
-+ we have these to flags that shows which part that has completed.
-+ We can then check when we get one of the interrupts that if the other has
-+ occured it's safe for us to complete the URB, otherwise we set appropriate
-+ flag and do the completion when we get the other interrupt. */
-+ volatile unsigned char ctrl_zout_done;
-+ volatile unsigned char ctrl_rx_done;
-+
-+ /* Connection between the submitted urb and ETRAX epid number */
-+ __u8 epid;
-+
-+ /* The rx_data_list field is used for periodic traffic, to hold
-+ received data for later processing in the the complete_urb functions,
-+ where the data us copied to the urb's transfer_buffer. Basically, we
-+ use this intermediate storage because we don't know when it's safe to
-+ reuse the transfer_buffer (FIXME?). */
-+ struct list_head rx_data_list;
-+
-+
-+ /* The interval time rounded up to closest 2^N */
-+ int interval;
-+
-+ /* Pool of EP descriptors needed if it's a INTR transfer.
-+ Amount of EPs in pool correspons to how many INTR that should
-+ be inserted in TxIntrEPList (max 128, defined by MAX_INTR_INTERVAL) */
-+ struct USB_EP_Desc* intr_ep_pool[128];
-+
-+ /* The mount of EPs allocated for this INTR URB */
-+ int intr_ep_pool_length;
-+
-+ /* Pointer to info struct if URB is scheduled to be finished later */
-+ struct urb_later_data* later_data;
-+};
-+
-+
-+/* This struct is for passing data from the top half to the bottom half irq
-+ handlers */
-+struct crisv10_irq_reg {
-+ struct usb_hcd* hcd;
-+ __u32 r_usb_epid_attn;
-+ __u8 r_usb_status;
-+ __u16 r_usb_rh_port_status_1;
-+ __u16 r_usb_rh_port_status_2;
-+ __u32 r_usb_irq_mask_read;
-+ __u32 r_usb_fm_number;
-+ struct work_struct usb_bh;
-+};
-+
-+
-+/* This struct is for passing data from the isoc top half to the isoc bottom
-+ half. */
-+struct crisv10_isoc_complete_data {
-+ struct usb_hcd *hcd;
-+ struct urb *urb;
-+ struct work_struct usb_bh;
-+};
-+
-+/* Entry item for URB lists for each endpint */
-+typedef struct urb_entry
-+{
-+ struct urb *urb;
-+ struct list_head list;
-+} urb_entry_t;
-+
-+/* ---------------------------------------------------------------------------
-+ Virtual Root HUB
-+ ------------------------------------------------------------------------- */
-+/* destination of request */
-+#define RH_INTERFACE 0x01
-+#define RH_ENDPOINT 0x02
-+#define RH_OTHER 0x03
-+
-+#define RH_CLASS 0x20
-+#define RH_VENDOR 0x40
-+
-+/* Requests: bRequest << 8 | bmRequestType */
-+#define RH_GET_STATUS 0x0080
-+#define RH_CLEAR_FEATURE 0x0100
-+#define RH_SET_FEATURE 0x0300
-+#define RH_SET_ADDRESS 0x0500
-+#define RH_GET_DESCRIPTOR 0x0680
-+#define RH_SET_DESCRIPTOR 0x0700
-+#define RH_GET_CONFIGURATION 0x0880
-+#define RH_SET_CONFIGURATION 0x0900
-+#define RH_GET_STATE 0x0280
-+#define RH_GET_INTERFACE 0x0A80
-+#define RH_SET_INTERFACE 0x0B00
-+#define RH_SYNC_FRAME 0x0C80
-+/* Our Vendor Specific Request */
-+#define RH_SET_EP 0x2000
-+
-+
-+/* Hub port features */
-+#define RH_PORT_CONNECTION 0x00
-+#define RH_PORT_ENABLE 0x01
-+#define RH_PORT_SUSPEND 0x02
-+#define RH_PORT_OVER_CURRENT 0x03
-+#define RH_PORT_RESET 0x04
-+#define RH_PORT_POWER 0x08
-+#define RH_PORT_LOW_SPEED 0x09
-+#define RH_C_PORT_CONNECTION 0x10
-+#define RH_C_PORT_ENABLE 0x11
-+#define RH_C_PORT_SUSPEND 0x12
-+#define RH_C_PORT_OVER_CURRENT 0x13
-+#define RH_C_PORT_RESET 0x14
-+
-+/* Hub features */
-+#define RH_C_HUB_LOCAL_POWER 0x00
-+#define RH_C_HUB_OVER_CURRENT 0x01
-+
-+#define RH_DEVICE_REMOTE_WAKEUP 0x00
-+#define RH_ENDPOINT_STALL 0x01
-+
-+/* Our Vendor Specific feature */
-+#define RH_REMOVE_EP 0x00
-+
-+
-+#define RH_ACK 0x01
-+#define RH_REQ_ERR -1
-+#define RH_NACK 0x00
-+
-+/* Field definitions for */
-+
-+#define USB_IN_command__eol__BITNR 0 /* command macros */
-+#define USB_IN_command__eol__WIDTH 1
-+#define USB_IN_command__eol__no 0
-+#define USB_IN_command__eol__yes 1
-+
-+#define USB_IN_command__intr__BITNR 3
-+#define USB_IN_command__intr__WIDTH 1
-+#define USB_IN_command__intr__no 0
-+#define USB_IN_command__intr__yes 1
-+
-+#define USB_IN_status__eop__BITNR 1 /* status macros. */
-+#define USB_IN_status__eop__WIDTH 1
-+#define USB_IN_status__eop__no 0
-+#define USB_IN_status__eop__yes 1
-+
-+#define USB_IN_status__eot__BITNR 5
-+#define USB_IN_status__eot__WIDTH 1
-+#define USB_IN_status__eot__no 0
-+#define USB_IN_status__eot__yes 1
-+
-+#define USB_IN_status__error__BITNR 6
-+#define USB_IN_status__error__WIDTH 1
-+#define USB_IN_status__error__no 0
-+#define USB_IN_status__error__yes 1
-+
-+#define USB_IN_status__nodata__BITNR 7
-+#define USB_IN_status__nodata__WIDTH 1
-+#define USB_IN_status__nodata__no 0
-+#define USB_IN_status__nodata__yes 1
-+
-+#define USB_IN_status__epid__BITNR 8
-+#define USB_IN_status__epid__WIDTH 5
-+
-+#define USB_EP_command__eol__BITNR 0
-+#define USB_EP_command__eol__WIDTH 1
-+#define USB_EP_command__eol__no 0
-+#define USB_EP_command__eol__yes 1
-+
-+#define USB_EP_command__eof__BITNR 1
-+#define USB_EP_command__eof__WIDTH 1
-+#define USB_EP_command__eof__no 0
-+#define USB_EP_command__eof__yes 1
-+
-+#define USB_EP_command__intr__BITNR 3
-+#define USB_EP_command__intr__WIDTH 1
-+#define USB_EP_command__intr__no 0
-+#define USB_EP_command__intr__yes 1
-+
-+#define USB_EP_command__enable__BITNR 4
-+#define USB_EP_command__enable__WIDTH 1
-+#define USB_EP_command__enable__no 0
-+#define USB_EP_command__enable__yes 1
-+
-+#define USB_EP_command__hw_valid__BITNR 5
-+#define USB_EP_command__hw_valid__WIDTH 1
-+#define USB_EP_command__hw_valid__no 0
-+#define USB_EP_command__hw_valid__yes 1
-+
-+#define USB_EP_command__epid__BITNR 8
-+#define USB_EP_command__epid__WIDTH 5
-+
-+#define USB_SB_command__eol__BITNR 0 /* command macros. */
-+#define USB_SB_command__eol__WIDTH 1
-+#define USB_SB_command__eol__no 0
-+#define USB_SB_command__eol__yes 1
-+
-+#define USB_SB_command__eot__BITNR 1
-+#define USB_SB_command__eot__WIDTH 1
-+#define USB_SB_command__eot__no 0
-+#define USB_SB_command__eot__yes 1
-+
-+#define USB_SB_command__intr__BITNR 3
-+#define USB_SB_command__intr__WIDTH 1
-+#define USB_SB_command__intr__no 0
-+#define USB_SB_command__intr__yes 1
-+
-+#define USB_SB_command__tt__BITNR 4
-+#define USB_SB_command__tt__WIDTH 2
-+#define USB_SB_command__tt__zout 0
-+#define USB_SB_command__tt__in 1
-+#define USB_SB_command__tt__out 2
-+#define USB_SB_command__tt__setup 3
-+
-+
-+#define USB_SB_command__rem__BITNR 8
-+#define USB_SB_command__rem__WIDTH 6
-+
-+#define USB_SB_command__full__BITNR 6
-+#define USB_SB_command__full__WIDTH 1
-+#define USB_SB_command__full__no 0
-+#define USB_SB_command__full__yes 1
-+
-+#endif
-diff -urN linux-2.6.19.2.orig/drivers/net/cris/Makefile linux-2.6.19.2.dev/drivers/net/cris/Makefile
---- linux-2.6.19.2.orig/drivers/net/cris/Makefile 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/net/cris/Makefile 2005-01-04 13:09:12.000000000 +0100
-@@ -1 +1,2 @@
- obj-$(CONFIG_ETRAX_ARCH_V10) += eth_v10.o
-+obj-$(CONFIG_ETRAX_ARCH_V32) += eth_v32.o
-diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v10.c linux-2.6.19.2.dev/drivers/net/cris/eth_v10.c
---- linux-2.6.19.2.orig/drivers/net/cris/eth_v10.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/net/cris/eth_v10.c 2007-01-15 16:35:48.000000000 +0100
-@@ -1,221 +1,10 @@
--/* $Id: ethernet.c,v 1.31 2004/10/18 14:49:03 starvik Exp $
-- *
-- * e100net.c: A network driver for the ETRAX 100LX network controller.
-+/*
-+ * Driver for the ETRAX 100LX network controller.
- *
-- * Copyright (c) 1998-2002 Axis Communications AB.
-+ * Copyright (c) 1998-2006 Axis Communications AB.
- *
- * The outline of this driver comes from skeleton.c.
- *
-- * $Log: ethernet.c,v $
-- * Revision 1.31 2004/10/18 14:49:03 starvik
-- * Use RX interrupt as random source
-- *
-- * Revision 1.30 2004/09/29 10:44:04 starvik
-- * Enabed MAC-address output again
-- *
-- * Revision 1.29 2004/08/24 07:14:05 starvik
-- * Make use of generic MDIO interface and constants.
-- *
-- * Revision 1.28 2004/08/20 09:37:11 starvik
-- * Added support for Intel LXT972A. Creds to Randy Scarborough.
-- *
-- * Revision 1.27 2004/08/16 12:37:22 starvik
-- * Merge of Linux 2.6.8
-- *
-- * Revision 1.25 2004/06/21 10:29:57 starvik
-- * Merge of Linux 2.6.7
-- *
-- * Revision 1.23 2004/06/09 05:29:22 starvik
-- * Avoid any race where R_DMA_CH1_FIRST is NULL (may trigger cache bug).
-- *
-- * Revision 1.22 2004/05/14 07:58:03 starvik
-- * Merge of changes from 2.4
-- *
-- * Revision 1.20 2004/03/11 11:38:40 starvik
-- * Merge of Linux 2.6.4
-- *
-- * Revision 1.18 2003/12/03 13:45:46 starvik
-- * Use hardware pad for short packets to prevent information leakage.
-- *
-- * Revision 1.17 2003/07/04 08:27:37 starvik
-- * Merge of Linux 2.5.74
-- *
-- * Revision 1.16 2003/04/24 08:28:22 starvik
-- * New LED behaviour: LED off when no link
-- *
-- * Revision 1.15 2003/04/09 05:20:47 starvik
-- * Merge of Linux 2.5.67
-- *
-- * Revision 1.13 2003/03/06 16:11:01 henriken
-- * Off by one error in group address register setting.
-- *
-- * Revision 1.12 2003/02/27 17:24:19 starvik
-- * Corrected Rev to Revision
-- *
-- * Revision 1.11 2003/01/24 09:53:21 starvik
-- * Oops. Initialize GA to 0, not to 1
-- *
-- * Revision 1.10 2003/01/24 09:50:55 starvik
-- * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
-- *
-- * Revision 1.9 2002/12/13 07:40:58 starvik
-- * Added basic ethtool interface
-- * Handled out of memory when allocating new buffers
-- *
-- * Revision 1.8 2002/12/11 13:13:57 starvik
-- * Added arch/ to v10 specific includes
-- * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
-- *
-- * Revision 1.7 2002/11/26 09:41:42 starvik
-- * Added e100_set_config (standard interface to set media type)
-- * Added protection against preemptive scheduling
-- * Added standard MII ioctls
-- *
-- * Revision 1.6 2002/11/21 07:18:18 starvik
-- * Timers must be initialized in 2.5.48
-- *
-- * Revision 1.5 2002/11/20 11:56:11 starvik
-- * Merge of Linux 2.5.48
-- *
-- * Revision 1.4 2002/11/18 07:26:46 starvik
-- * Linux 2.5 port of latest Linux 2.4 ethernet driver
-- *
-- * Revision 1.33 2002/10/02 20:16:17 hp
-- * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
-- *
-- * Revision 1.32 2002/09/16 06:05:58 starvik
-- * Align memory returned by dev_alloc_skb
-- * Moved handling of sent packets to interrupt to avoid reference counting problem
-- *
-- * Revision 1.31 2002/09/10 13:28:23 larsv
-- * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
-- * for supported functionality by issuing special ioctls, i.e. wireless
-- * extensions.
-- *
-- * Revision 1.30 2002/05/07 18:50:08 johana
-- * Correct spelling in comments.
-- *
-- * Revision 1.29 2002/05/06 05:38:49 starvik
-- * Performance improvements:
-- * Large packets are not copied (breakpoint set to 256 bytes)
-- * The cache bug workaround is delayed until half of the receive list
-- * has been used
-- * Added transmit list
-- * Transmit interrupts are only enabled when transmit queue is full
-- *
-- * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
-- * Performance improvements:
-- * Large packets are not copied (breakpoint set to 256 bytes)
-- * The cache bug workaround is delayed until half of the receive list
-- * has been used.
-- * Added transmit list
-- * Transmit interrupts are only enabled when transmit queue is full
-- *
-- * Revision 1.28 2002/04/22 11:47:21 johana
-- * Fix according to 2.4.19-pre7. time_after/time_before and
-- * missing end of comment.
-- * The patch has a typo for ethernet.c in e100_clear_network_leds(),
-- * that is fixed here.
-- *
-- * Revision 1.27 2002/04/12 11:55:11 bjornw
-- * Added TODO
-- *
-- * Revision 1.26 2002/03/15 17:11:02 bjornw
-- * Use prepare_rx_descriptor after the CPU has touched the receiving descs
-- *
-- * Revision 1.25 2002/03/08 13:07:53 bjornw
-- * Unnecessary spinlock removed
-- *
-- * Revision 1.24 2002/02/20 12:57:43 fredriks
-- * Replaced MIN() with min().
-- *
-- * Revision 1.23 2002/02/20 10:58:14 fredriks
-- * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
-- *
-- * Revision 1.22 2002/01/30 07:48:22 matsfg
-- * Initiate R_NETWORK_TR_CTRL
-- *
-- * Revision 1.21 2001/11/23 11:54:49 starvik
-- * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
-- * Removed compiler warnings
-- *
-- * Revision 1.20 2001/11/12 19:26:00 pkj
-- * * Corrected e100_negotiate() to not assign half to current_duplex when
-- * it was supposed to compare them...
-- * * Cleaned up failure handling in e100_open().
-- * * Fixed compiler warnings.
-- *
-- * Revision 1.19 2001/11/09 07:43:09 starvik
-- * Added full duplex support
-- * Added ioctl to set speed and duplex
-- * Clear LED timer only runs when LED is lit
-- *
-- * Revision 1.18 2001/10/03 14:40:43 jonashg
-- * Update rx_bytes counter.
-- *
-- * Revision 1.17 2001/06/11 12:43:46 olof
-- * Modified defines for network LED behavior
-- *
-- * Revision 1.16 2001/05/30 06:12:46 markusl
-- * TxDesc.next should not be set to NULL
-- *
-- * Revision 1.15 2001/05/29 10:27:04 markusl
-- * Updated after review remarks:
-- * +Use IO_EXTRACT
-- * +Handle underrun
-- *
-- * Revision 1.14 2001/05/29 09:20:14 jonashg
-- * Use driver name on printk output so one can tell which driver that complains.
-- *
-- * Revision 1.13 2001/05/09 12:35:59 johana
-- * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
-- *
-- * Revision 1.12 2001/04/05 11:43:11 tobiasa
-- * Check dev before panic.
-- *
-- * Revision 1.11 2001/04/04 11:21:05 markusl
-- * Updated according to review remarks
-- *
-- * Revision 1.10 2001/03/26 16:03:06 bjornw
-- * Needs linux/config.h
-- *
-- * Revision 1.9 2001/03/19 14:47:48 pkj
-- * * Make sure there is always a pause after the network LEDs are
-- * changed so they will not look constantly lit during heavy traffic.
-- * * Always use HZ when setting times relative to jiffies.
-- * * Use LED_NETWORK_SET() when setting the network LEDs.
-- *
-- * Revision 1.8 2001/02/27 13:52:48 bjornw
-- * malloc.h -> slab.h
-- *
-- * Revision 1.7 2001/02/23 13:46:38 bjornw
-- * Spellling check
-- *
-- * Revision 1.6 2001/01/26 15:21:04 starvik
-- * Don't disable interrupts while reading MDIO registers (MDIO is slow)
-- * Corrected promiscuous mode
-- * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
-- *
-- * Revision 1.5 2000/11/29 17:22:22 bjornw
-- * Get rid of the udword types legacy stuff
-- *
-- * Revision 1.4 2000/11/22 16:36:09 bjornw
-- * Please marketing by using the correct case when spelling Etrax.
-- *
-- * Revision 1.3 2000/11/21 16:43:04 bjornw
-- * Minor short->int change
-- *
-- * Revision 1.2 2000/11/08 14:27:57 bjornw
-- * 2.4 port
-- *
-- * Revision 1.1 2000/11/06 13:56:00 bjornw
-- * Verbatim copy of the 1.24 version of e100net.c from elinux
-- *
-- * Revision 1.24 2000/10/04 15:55:23 bjornw
-- * * Use virt_to_phys etc. for DMA addresses
-- * * Removed bogus CHECKSUM_UNNECESSARY
-- *
-- *
- */
-
-
-@@ -251,6 +40,7 @@
- #include <asm/bitops.h>
- #include <asm/ethernet.h>
- #include <asm/cache.h>
-+#include <asm/arch/io_interface_mux.h>
-
- //#define ETHDEBUG
- #define D(x)
-@@ -280,6 +70,9 @@
- * by this lock as well.
- */
- spinlock_t lock;
-+
-+ spinlock_t led_lock; /* Protect LED state */
-+ spinlock_t transceiver_lock; /* Protect transceiver state. */
- };
-
- typedef struct etrax_eth_descr
-@@ -296,8 +89,6 @@
- void (*check_duplex)(struct net_device* dev);
- };
-
--struct transceiver_ops* transceiver;
--
- /* Duplex settings */
- enum duplex
- {
-@@ -308,7 +99,7 @@
-
- /* Dma descriptors etc. */
-
--#define MAX_MEDIA_DATA_SIZE 1518
-+#define MAX_MEDIA_DATA_SIZE 1522
-
- #define MIN_PACKET_LEN 46
- #define ETHER_HEAD_LEN 14
-@@ -332,9 +123,9 @@
- #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
-
- /*Intel LXT972A specific*/
--#define MDIO_INT_STATUS_REG_2 0x0011
--#define MDIO_INT_FULL_DUPLEX_IND ( 1 << 9 )
--#define MDIO_INT_SPEED ( 1 << 14 )
-+#define MDIO_INT_STATUS_REG_2 0x0011
-+#define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
-+#define MDIO_INT_SPEED (1 << 14)
-
- /* Network flash constants */
- #define NET_FLASH_TIME (HZ/50) /* 20 ms */
-@@ -345,8 +136,8 @@
- #define NO_NETWORK_ACTIVITY 0
- #define NETWORK_ACTIVITY 1
-
--#define NBR_OF_RX_DESC 64
--#define NBR_OF_TX_DESC 256
-+#define NBR_OF_RX_DESC 32
-+#define NBR_OF_TX_DESC 16
-
- /* Large packets are sent directly to upper layers while small packets are */
- /* copied (to reduce memory waste). The following constant decides the breakpoint */
-@@ -368,7 +159,6 @@
- static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
- to be processed */
- static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
--static etrax_eth_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
-
- static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
-
-@@ -378,7 +168,6 @@
- static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
-
- static unsigned int network_rec_config_shadow = 0;
--static unsigned int mdio_phy_addr; /* Transciever address */
-
- static unsigned int network_tr_ctrl_shadow = 0;
-
-@@ -412,7 +201,7 @@
- static void e100_tx_timeout(struct net_device *dev);
- static struct net_device_stats *e100_get_stats(struct net_device *dev);
- static void set_multicast_list(struct net_device *dev);
--static void e100_hardware_send_packet(char *buf, int length);
-+static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
- static void update_rx_stats(struct net_device_stats *);
- static void update_tx_stats(struct net_device_stats *);
- static int e100_probe_transceiver(struct net_device* dev);
-@@ -435,7 +224,10 @@
- static void e100_set_network_leds(int active);
-
- static const struct ethtool_ops e100_ethtool_ops;
--
-+#if defined(CONFIG_ETRAX_NO_PHY)
-+static void dummy_check_speed(struct net_device* dev);
-+static void dummy_check_duplex(struct net_device* dev);
-+#else
- static void broadcom_check_speed(struct net_device* dev);
- static void broadcom_check_duplex(struct net_device* dev);
- static void tdk_check_speed(struct net_device* dev);
-@@ -444,16 +236,29 @@
- static void intel_check_duplex(struct net_device* dev);
- static void generic_check_speed(struct net_device* dev);
- static void generic_check_duplex(struct net_device* dev);
-+#endif
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void e100_netpoll(struct net_device* dev);
-+#endif
-+
-+static int autoneg_normal = 1;
-
- struct transceiver_ops transceivers[] =
- {
-+#if defined(CONFIG_ETRAX_NO_PHY)
-+ {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
-+#else
- {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
- {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
- {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
-- {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
-+ {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
- {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
-+#endif
- };
-
-+struct transceiver_ops* transceiver = &transceivers[0];
-+static unsigned int mdio_phy_addr = 0; /* PHY address on MDIO bus */
-+
- #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
-
- /*
-@@ -468,18 +273,26 @@
- etrax_ethernet_init(void)
- {
- struct net_device *dev;
-- struct net_local* np;
-+ struct net_local* np;
- int i, err;
-
- printk(KERN_INFO
-- "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2003 Axis Communications AB\n");
--
-+ "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2006 Axis Communications AB\n");
-+
-+ if (cris_request_io_interface(if_eth, cardname)) {
-+ printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
-+ return -EBUSY;
-+ }
-+
- dev = alloc_etherdev(sizeof(struct net_local));
-- np = dev->priv;
--
- if (!dev)
- return -ENOMEM;
-+
-+ np = netdev_priv(dev);
-
-+ /* we do our own locking */
-+ dev->features |= NETIF_F_LLTX;
-+
- dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
-
- /* now setup our etrax specific stuff */
-@@ -495,18 +308,26 @@
- dev->get_stats = e100_get_stats;
- dev->set_multicast_list = set_multicast_list;
- dev->set_mac_address = e100_set_mac_address;
-- dev->ethtool_ops = &e100_ethtool_ops;
-+ dev->ethtool_ops = &e100_ethtool_ops;
- dev->do_ioctl = e100_ioctl;
-- dev->set_config = e100_set_config;
-+ dev->set_config = e100_set_config;
- dev->tx_timeout = e100_tx_timeout;
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+ dev->poll_controller = e100_netpoll;
-+#endif
-+
-+ spin_lock_init(&np->lock);
-+ spin_lock_init(&np->led_lock);
-+ spin_lock_init(&np->transceiver_lock);
-
- /* Initialise the list of Etrax DMA-descriptors */
-
- /* Initialise receive descriptors */
-
- for (i = 0; i < NBR_OF_RX_DESC; i++) {
-- /* Allocate two extra cachelines to make sure that buffer used by DMA
-- * does not share cacheline with any other data (to avoid cache bug)
-+ /* Allocate two extra cachelines to make sure that buffer used
-+ * by DMA does not share cacheline with any other data (to
-+ * avoid cache bug)
- */
- RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
- if (!RxDescList[i].skb)
-@@ -517,6 +338,7 @@
- RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
- RxDescList[i].descr.status = 0;
- RxDescList[i].descr.hw_len = 0;
-+
- prepare_rx_descriptor(&RxDescList[i].descr);
- }
-
-@@ -542,7 +364,6 @@
-
- myNextRxDesc = &RxDescList[0];
- myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
-- myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
- myFirstTxDesc = &TxDescList[0];
- myNextTxDesc = &TxDescList[0];
- myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
-@@ -563,18 +384,19 @@
- current_speed = 10;
- current_speed_selection = 0; /* Auto */
- speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
-- duplex_timer.data = (unsigned long)dev;
-+ speed_timer.data = (unsigned long)dev;
- speed_timer.function = e100_check_speed;
-
- clear_led_timer.function = e100_clear_network_leds;
-+ clear_led_timer.data = (unsigned long)dev;
-
- full_duplex = 0;
- current_duplex = autoneg;
- duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
-- duplex_timer.data = (unsigned long)dev;
-+ duplex_timer.data = (unsigned long)dev;
- duplex_timer.function = e100_check_duplex;
-
-- /* Initialize mii interface */
-+ /* Initialize mii interface */
- np->mii_if.phy_id = mdio_phy_addr;
- np->mii_if.phy_id_mask = 0x1f;
- np->mii_if.reg_num_mask = 0x1f;
-@@ -586,6 +408,9 @@
- /* unwanted addresses are matched */
- *R_NETWORK_GA_0 = 0x00000000;
- *R_NETWORK_GA_1 = 0x00000000;
-+
-+ /* Initialize next time the led can flash */
-+ led_next_time = jiffies;
- return 0;
- }
-
-@@ -596,7 +421,7 @@
- static int
- e100_set_mac_address(struct net_device *dev, void *p)
- {
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
- struct sockaddr *addr = p;
- int i;
-
-@@ -680,17 +505,36 @@
- /* allocate the irq corresponding to the transmitting DMA */
-
- if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
-- cardname, (void *)dev)) {
-+ cardname, (void *)dev)) {
- goto grace_exit1;
- }
-
- /* allocate the irq corresponding to the network errors etc */
-
- if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
-- cardname, (void *)dev)) {
-+ cardname, (void *)dev)) {
- goto grace_exit2;
- }
-
-+ /*
-+ * Always allocate the DMA channels after the IRQ,
-+ * and clean up on failure.
-+ */
-+
-+ if (cris_request_dma(NETWORK_TX_DMA_NBR,
-+ cardname,
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_eth)) {
-+ goto grace_exit3;
-+ }
-+
-+ if (cris_request_dma(NETWORK_RX_DMA_NBR,
-+ cardname,
-+ DMA_VERBOSE_ON_ERROR,
-+ dma_eth)) {
-+ goto grace_exit4;
-+ }
-+
- /* give the HW an idea of what MAC address we want */
-
- *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
-@@ -705,6 +549,7 @@
-
- *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
- #else
-+ SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
- SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
-@@ -724,8 +569,7 @@
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
- *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
-
-- save_flags(flags);
-- cli();
-+ local_irq_save(flags);
-
- /* enable the irq's for ethernet DMA */
-
-@@ -757,12 +601,13 @@
-
- *R_DMA_CH0_FIRST = 0;
- *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
-+ netif_start_queue(dev);
-
-- restore_flags(flags);
-+ local_irq_restore(flags);
-
- /* Probe for transceiver */
- if (e100_probe_transceiver(dev))
-- goto grace_exit3;
-+ goto grace_exit5;
-
- /* Start duplex/speed timers */
- add_timer(&speed_timer);
-@@ -771,10 +616,14 @@
- /* We are now ready to accept transmit requeusts from
- * the queueing layer of the networking.
- */
-- netif_start_queue(dev);
-+ netif_carrier_on(dev);
-
- return 0;
-
-+grace_exit5:
-+ cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
-+grace_exit4:
-+ cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
- grace_exit3:
- free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
- grace_exit2:
-@@ -785,7 +634,13 @@
- return -EAGAIN;
- }
-
--
-+#if defined(CONFIG_ETRAX_NO_PHY)
-+static void
-+dummy_check_speed(struct net_device* dev)
-+{
-+ current_speed = 100;
-+}
-+#else
- static void
- generic_check_speed(struct net_device* dev)
- {
-@@ -821,15 +676,18 @@
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
- current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
- }
--
-+#endif
- static void
- e100_check_speed(unsigned long priv)
- {
- struct net_device* dev = (struct net_device*)priv;
-+ struct net_local *np = netdev_priv(dev);
- static int led_initiated = 0;
- unsigned long data;
- int old_speed = current_speed;
-
-+ spin_lock(&np->transceiver_lock);
-+
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR);
- if (!(data & BMSR_LSTATUS)) {
- current_speed = 0;
-@@ -837,14 +695,22 @@
- transceiver->check_speed(dev);
- }
-
-+ spin_lock(&np->led_lock);
- if ((old_speed != current_speed) || !led_initiated) {
- led_initiated = 1;
- e100_set_network_leds(NO_NETWORK_ACTIVITY);
-+ if (current_speed)
-+ netif_carrier_on(dev);
-+ else
-+ netif_carrier_off(dev);
- }
-+ spin_unlock(&np->led_lock);
-
- /* Reinitialize the timer. */
- speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
- add_timer(&speed_timer);
-+
-+ spin_unlock(&np->transceiver_lock);
- }
-
- static void
-@@ -857,7 +723,7 @@
- ADVERTISE_10HALF | ADVERTISE_10FULL);
-
- switch (current_speed_selection) {
-- case 10 :
-+ case 10:
- if (current_duplex == full)
- data |= ADVERTISE_10FULL;
- else if (current_duplex == half)
-@@ -866,7 +732,7 @@
- data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
- break;
-
-- case 100 :
-+ case 100:
- if (current_duplex == full)
- data |= ADVERTISE_100FULL;
- else if (current_duplex == half)
-@@ -875,45 +741,54 @@
- data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
- break;
-
-- case 0 : /* Auto */
-+ case 0: /* Auto */
- if (current_duplex == full)
- data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
- else if (current_duplex == half)
- data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
- else
- data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
-- ADVERTISE_100HALF | ADVERTISE_100FULL;
-+ ADVERTISE_100HALF | ADVERTISE_100FULL;
- break;
-
-- default : /* assume autoneg speed and duplex */
-+ default: /* assume autoneg speed and duplex */
- data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
-- ADVERTISE_100HALF | ADVERTISE_100FULL;
-+ ADVERTISE_100HALF | ADVERTISE_100FULL;
-+ break;
- }
-
- e100_set_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE, data);
-
- /* Renegotiate with link partner */
-- data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
-- data |= BMCR_ANENABLE | BMCR_ANRESTART;
--
-+ if (autoneg_normal) {
-+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
-+ data |= BMCR_ANENABLE | BMCR_ANRESTART;
-+ }
- e100_set_mdio_reg(dev, mdio_phy_addr, MII_BMCR, data);
- }
-
- static void
- e100_set_speed(struct net_device* dev, unsigned long speed)
- {
-+ struct net_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->transceiver_lock);
- if (speed != current_speed_selection) {
- current_speed_selection = speed;
- e100_negotiate(dev);
- }
-+ spin_unlock(&np->transceiver_lock);
- }
-
- static void
- e100_check_duplex(unsigned long priv)
- {
- struct net_device *dev = (struct net_device *)priv;
-- struct net_local *np = (struct net_local *)dev->priv;
-- int old_duplex = full_duplex;
-+ struct net_local *np = netdev_priv(dev);
-+ int old_duplex;
-+
-+ spin_lock(&np->transceiver_lock);
-+ old_duplex = full_duplex;
- transceiver->check_duplex(dev);
- if (old_duplex != full_duplex) {
- /* Duplex changed */
-@@ -925,12 +800,20 @@
- duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
- add_timer(&duplex_timer);
- np->mii_if.full_duplex = full_duplex;
-+ spin_unlock(&np->transceiver_lock);
- }
--
-+#if defined(CONFIG_ETRAX_NO_PHY)
-+static void
-+dummy_check_duplex(struct net_device* dev)
-+{
-+ full_duplex = 1;
-+}
-+#else
- static void
- generic_check_duplex(struct net_device* dev)
- {
- unsigned long data;
-+
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
- if ((data & ADVERTISE_10FULL) ||
- (data & ADVERTISE_100FULL))
-@@ -943,6 +826,7 @@
- tdk_check_duplex(struct net_device* dev)
- {
- unsigned long data;
-+
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
- full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
- }
-@@ -951,6 +835,7 @@
- broadcom_check_duplex(struct net_device* dev)
- {
- unsigned long data;
-+
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
- full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
- }
-@@ -959,26 +844,35 @@
- intel_check_duplex(struct net_device* dev)
- {
- unsigned long data;
-+
- data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
- full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
- }
--
-+#endif
- static void
- e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
- {
-+ struct net_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->transceiver_lock);
- if (new_duplex != current_duplex) {
- current_duplex = new_duplex;
- e100_negotiate(dev);
- }
-+ spin_unlock(&np->transceiver_lock);
- }
-
- static int
- e100_probe_transceiver(struct net_device* dev)
- {
-+#if !defined(CONFIG_ETRAX_NO_PHY)
- unsigned int phyid_high;
- unsigned int phyid_low;
- unsigned int oui;
- struct transceiver_ops* ops = NULL;
-+ struct net_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->transceiver_lock);
-
- /* Probe MDIO physical address */
- for (mdio_phy_addr = 0; mdio_phy_addr <= 31; mdio_phy_addr++) {
-@@ -986,7 +880,7 @@
- break;
- }
- if (mdio_phy_addr == 32)
-- return -ENODEV;
-+ return -ENODEV;
-
- /* Get manufacturer */
- phyid_high = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID1);
-@@ -999,6 +893,8 @@
- }
- transceiver = ops;
-
-+ spin_unlock(&np->transceiver_lock);
-+#endif
- return 0;
- }
-
-@@ -1006,7 +902,7 @@
- e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
- {
- unsigned short cmd; /* Data to be sent on MDIO port */
-- int data; /* Data read from MDIO */
-+ int data; /* Data read from MDIO */
- int bitCounter;
-
- /* Start of frame, OP Code, Physical Address, Register Address */
-@@ -1082,6 +978,7 @@
- e100_receive_mdio_bit()
- {
- unsigned char bit;
-+
- *R_NETWORK_MGM_CTRL = 0;
- bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
- udelay(1);
-@@ -1117,7 +1014,7 @@
- static void
- e100_tx_timeout(struct net_device *dev)
- {
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
- unsigned long flags;
-
- spin_lock_irqsave(&np->lock, flags);
-@@ -1139,8 +1036,7 @@
- e100_reset_transceiver(dev);
-
- /* and get rid of the packets that never got an interrupt */
-- while (myFirstTxDesc != myNextTxDesc)
-- {
-+ while (myFirstTxDesc != myNextTxDesc) {
- dev_kfree_skb(myFirstTxDesc->skb);
- myFirstTxDesc->skb = 0;
- myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
-@@ -1166,7 +1062,7 @@
- static int
- e100_send_packet(struct sk_buff *skb, struct net_device *dev)
- {
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
- unsigned char *buf = skb->data;
- unsigned long flags;
-
-@@ -1179,7 +1075,7 @@
-
- dev->trans_start = jiffies;
-
-- e100_hardware_send_packet(buf, skb->len);
-+ e100_hardware_send_packet(np, buf, skb->len);
-
- myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
-
-@@ -1202,13 +1098,15 @@
- e100rxtx_interrupt(int irq, void *dev_id)
- {
- struct net_device *dev = (struct net_device *)dev_id;
-- struct net_local *np = (struct net_local *)dev->priv;
-- unsigned long irqbits = *R_IRQ_MASK2_RD;
-+ struct net_local *np = netdev_priv(dev);
-+ unsigned long irqbits;
-
-- /* Disable RX/TX IRQs to avoid reentrancy */
-- *R_IRQ_MASK2_CLR =
-- IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
-- IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
-+ /*
-+ * Note that both rx and tx interrupts are blocked at this point,
-+ * regardless of which got us here.
-+ */
-+
-+ irqbits = *R_IRQ_MASK2_RD;
-
- /* Handle received packets */
- if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
-@@ -1224,7 +1122,7 @@
- * allocate a new buffer to put a packet in.
- */
- e100_rx(dev);
-- ((struct net_local *)dev->priv)->stats.rx_packets++;
-+ np->stats.rx_packets++;
- /* restart/continue on the channel, for safety */
- *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
- /* clear dma channel 1 eop/descr irq bits */
-@@ -1239,8 +1137,7 @@
-
- /* Report any packets that have been sent */
- while (myFirstTxDesc != phys_to_virt(*R_DMA_CH0_FIRST) &&
-- myFirstTxDesc != myNextTxDesc)
-- {
-+ (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
- np->stats.tx_bytes += myFirstTxDesc->skb->len;
- np->stats.tx_packets++;
-
-@@ -1249,19 +1146,15 @@
- dev_kfree_skb_irq(myFirstTxDesc->skb);
- myFirstTxDesc->skb = 0;
- myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
-+ /* Wake up queue. */
-+ netif_wake_queue(dev);
- }
-
- if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
-- /* acknowledge the eop interrupt and wake up queue */
-+ /* acknowledge the eop interrupt. */
- *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
-- netif_wake_queue(dev);
- }
-
-- /* Enable RX/TX IRQs again */
-- *R_IRQ_MASK2_SET =
-- IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
-- IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
--
- return IRQ_HANDLED;
- }
-
-@@ -1269,7 +1162,7 @@
- e100nw_interrupt(int irq, void *dev_id)
- {
- struct net_device *dev = (struct net_device *)dev_id;
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
- unsigned long irqbits = *R_IRQ_MASK0_RD;
-
- /* check for underrun irq */
-@@ -1291,7 +1184,6 @@
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
- *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
-- *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
- np->stats.tx_errors++;
- D(printk("ethernet excessive collisions!\n"));
- }
-@@ -1304,12 +1196,13 @@
- {
- struct sk_buff *skb;
- int length = 0;
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
- unsigned char *skb_data_ptr;
- #ifdef ETHDEBUG
- int i;
- #endif
--
-+ etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
-+ spin_lock(&np->led_lock);
- if (!led_active && time_after(jiffies, led_next_time)) {
- /* light the network leds depending on the current speed. */
- e100_set_network_leds(NETWORK_ACTIVITY);
-@@ -1319,9 +1212,10 @@
- led_active = 1;
- mod_timer(&clear_led_timer, jiffies + HZ/10);
- }
-+ spin_unlock(&np->led_lock);
-
- length = myNextRxDesc->descr.hw_len - 4;
-- ((struct net_local *)dev->priv)->stats.rx_bytes += length;
-+ np->stats.rx_bytes += length;
-
- #ifdef ETHDEBUG
- printk("Got a packet of length %d:\n", length);
-@@ -1341,7 +1235,7 @@
- if (!skb) {
- np->stats.rx_errors++;
- printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
-- return;
-+ goto update_nextrxdesc;
- }
-
- skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
-@@ -1358,15 +1252,15 @@
- else {
- /* Large packet, send directly to upper layers and allocate new
- * memory (aligned to cache line boundary to avoid bug).
-- * Before sending the skb to upper layers we must make sure that
-- * skb->data points to the aligned start of the packet.
-+ * Before sending the skb to upper layers we must make sure
-+ * that skb->data points to the aligned start of the packet.
- */
- int align;
- struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
- if (!new_skb) {
- np->stats.rx_errors++;
- printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
-- return;
-+ goto update_nextrxdesc;
- }
- skb = myNextRxDesc->skb;
- align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
-@@ -1382,9 +1276,10 @@
- /* Send the packet to the upper layers */
- netif_rx(skb);
-
-+ update_nextrxdesc:
- /* Prepare for next packet */
- myNextRxDesc->descr.status = 0;
-- myPrevRxDesc = myNextRxDesc;
-+ prevRxDesc = myNextRxDesc;
- myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
-
- rx_queue_len++;
-@@ -1392,9 +1287,9 @@
- /* Check if descriptors should be returned */
- if (rx_queue_len == RX_QUEUE_THRESHOLD) {
- flush_etrax_cache();
-- myPrevRxDesc->descr.ctrl |= d_eol;
-+ prevRxDesc->descr.ctrl |= d_eol;
- myLastRxDesc->descr.ctrl &= ~d_eol;
-- myLastRxDesc = myPrevRxDesc;
-+ myLastRxDesc = prevRxDesc;
- rx_queue_len = 0;
- }
- }
-@@ -1403,7 +1298,7 @@
- static int
- e100_close(struct net_device *dev)
- {
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
-
- printk(KERN_INFO "Closing %s.\n", dev->name);
-
-@@ -1431,6 +1326,9 @@
- free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
- free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
-
-+ cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
-+ cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
-+
- /* Update the statistics here. */
-
- update_rx_stats(&np->stats);
-@@ -1448,46 +1346,56 @@
- {
- struct mii_ioctl_data *data = if_mii(ifr);
- struct net_local *np = netdev_priv(dev);
-+ int ret = 0;
-+ int old_autoneg;
-
- spin_lock(&np->lock); /* Preempt protection */
- switch (cmd) {
-- case SIOCGMIIPHY: /* Get PHY address */
-+ case SIOCGMIIPHY: /* Get PHY address */
- data->phy_id = mdio_phy_addr;
- break;
-- case SIOCGMIIREG: /* Read MII register */
-+ case SIOCGMIIREG: /* Read MII register */
- data->val_out = e100_get_mdio_reg(dev, mdio_phy_addr, data->reg_num);
- break;
-- case SIOCSMIIREG: /* Write MII register */
-+ case SIOCSMIIREG: /* Write MII register */
- e100_set_mdio_reg(dev, mdio_phy_addr, data->reg_num, data->val_in);
- break;
-+
- /* The ioctls below should be considered obsolete but are */
- /* still present for compatability with old scripts/apps */
-- case SET_ETH_SPEED_10: /* 10 Mbps */
-+ case SET_ETH_SPEED_10: /* 10 Mbps */
- e100_set_speed(dev, 10);
- break;
-- case SET_ETH_SPEED_100: /* 100 Mbps */
-+ case SET_ETH_SPEED_100: /* 100 Mbps */
- e100_set_speed(dev, 100);
- break;
-- case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
-+ case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
- e100_set_speed(dev, 0);
- break;
-- case SET_ETH_DUPLEX_HALF: /* Half duplex. */
-+ case SET_ETH_DUPLEX_HALF: /* Half duplex */
- e100_set_duplex(dev, half);
- break;
-- case SET_ETH_DUPLEX_FULL: /* Full duplex. */
-+ case SET_ETH_DUPLEX_FULL: /* Full duplex */
- e100_set_duplex(dev, full);
- break;
-- case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex*/
-+ case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
- e100_set_duplex(dev, autoneg);
- break;
-+ case SET_ETH_AUTONEG:
-+ old_autoneg = autoneg_normal;
-+ autoneg_normal = *(int*)data;
-+ if (autoneg_normal != old_autoneg)
-+ e100_negotiate(dev);
-+ break;
- default:
-+ spin_unlock(&np->lock);
- return -EINVAL;
- }
- spin_unlock(&np->lock);
-- return 0;
-+ return ret;
- }
-
--static int e100_set_settings(struct net_device *dev,
-+static int e100_get_settings(struct net_device *dev,
- struct ethtool_cmd *ecmd)
- {
- ecmd->supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
-@@ -1565,7 +1473,8 @@
- static int
- e100_set_config(struct net_device *dev, struct ifmap *map)
- {
-- struct net_local *np = (struct net_local *)dev->priv;
-+ struct net_local *np = netdev_priv(dev);
-+
- spin_lock(&np->lock); /* Preempt protection */
-
- switch(map->port) {
-@@ -1574,21 +1483,25 @@
- e100_set_speed(dev, 0);
- e100_set_duplex(dev, autoneg);
- break;
-+
- case IF_PORT_10BASET:
- e100_set_speed(dev, 10);
- e100_set_duplex(dev, autoneg);
- break;
-+
- case IF_PORT_100BASET:
- case IF_PORT_100BASETX:
- e100_set_speed(dev, 100);
- e100_set_duplex(dev, autoneg);
- break;
-+
- case IF_PORT_100BASEFX:
- case IF_PORT_10BASE2:
- case IF_PORT_AUI:
- spin_unlock(&np->lock);
- return -EOPNOTSUPP;
- break;
-+
- default:
- printk(KERN_ERR "%s: Invalid media selected", dev->name);
- spin_unlock(&np->lock);
-@@ -1602,6 +1515,7 @@
- update_rx_stats(struct net_device_stats *es)
- {
- unsigned long r = *R_REC_COUNTERS;
-+
- /* update stats relevant to reception errors */
- es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
- es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
-@@ -1613,11 +1527,11 @@
- update_tx_stats(struct net_device_stats *es)
- {
- unsigned long r = *R_TR_COUNTERS;
-+
- /* update stats relevant to transmission errors */
- es->collisions +=
- IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
- IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
-- es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
- }
-
- /*
-@@ -1627,8 +1541,9 @@
- static struct net_device_stats *
- e100_get_stats(struct net_device *dev)
- {
-- struct net_local *lp = (struct net_local *)dev->priv;
-+ struct net_local *lp = netdev_priv(dev);
- unsigned long flags;
-+
- spin_lock_irqsave(&lp->lock, flags);
-
- update_rx_stats(&lp->stats);
-@@ -1640,21 +1555,21 @@
-
- /*
- * Set or clear the multicast filter for this adaptor.
-- * num_addrs == -1 Promiscuous mode, receive all packets
-- * num_addrs == 0 Normal mode, clear multicast list
-- * num_addrs > 0 Multicast mode, receive normal and MC packets,
-- * and do best-effort filtering.
-+ * num_addrs == -1 Promiscuous mode, receive all packets
-+ * num_addrs == 0 Normal mode, clear multicast list
-+ * num_addrs > 0 Multicast mode, receive normal and MC packets,
-+ * and do best-effort filtering.
- */
- static void
- set_multicast_list(struct net_device *dev)
- {
-- struct net_local *lp = (struct net_local *)dev->priv;
-+ struct net_local *lp = netdev_priv(dev);
- int num_addr = dev->mc_count;
- unsigned long int lo_bits;
- unsigned long int hi_bits;
-+
- spin_lock(&lp->lock);
-- if (dev->flags & IFF_PROMISC)
-- {
-+ if (dev->flags & IFF_PROMISC) {
- /* promiscuous mode */
- lo_bits = 0xfffffffful;
- hi_bits = 0xfffffffful;
-@@ -1684,9 +1599,10 @@
- struct dev_mc_list *dmi = dev->mc_list;
- int i;
- char *baddr;
-+
- lo_bits = 0x00000000ul;
- hi_bits = 0x00000000ul;
-- for (i=0; i<num_addr; i++) {
-+ for (i = 0; i < num_addr; i++) {
- /* Calculate the hash index for the GA registers */
-
- hash_ix = 0;
-@@ -1713,8 +1629,7 @@
-
- if (hash_ix >= 32) {
- hi_bits |= (1 << (hash_ix-32));
-- }
-- else {
-+ } else {
- lo_bits |= (1 << hash_ix);
- }
- dmi = dmi->next;
-@@ -1729,10 +1644,11 @@
- }
-
- void
--e100_hardware_send_packet(char *buf, int length)
-+e100_hardware_send_packet(struct net_local *np, char *buf, int length)
- {
- D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
-
-+ spin_lock(&np->led_lock);
- if (!led_active && time_after(jiffies, led_next_time)) {
- /* light the network leds depending on the current speed. */
- e100_set_network_leds(NETWORK_ACTIVITY);
-@@ -1742,15 +1658,16 @@
- led_active = 1;
- mod_timer(&clear_led_timer, jiffies + HZ/10);
- }
-+ spin_unlock(&np->led_lock);
-
- /* configure the tx dma descriptor */
- myNextTxDesc->descr.sw_len = length;
- myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
- myNextTxDesc->descr.buf = virt_to_phys(buf);
-
-- /* Move end of list */
-- myLastTxDesc->descr.ctrl &= ~d_eol;
-- myLastTxDesc = myNextTxDesc;
-+ /* Move end of list */
-+ myLastTxDesc->descr.ctrl &= ~d_eol;
-+ myLastTxDesc = myNextTxDesc;
-
- /* Restart DMA channel */
- *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
-@@ -1759,6 +1676,11 @@
- static void
- e100_clear_network_leds(unsigned long dummy)
- {
-+ struct net_device *dev = (struct net_device *)dummy;
-+ struct net_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->led_lock);
-+
- if (led_active && time_after(jiffies, led_next_time)) {
- e100_set_network_leds(NO_NETWORK_ACTIVITY);
-
-@@ -1766,6 +1688,8 @@
- led_next_time = jiffies + NET_FLASH_PAUSE;
- led_active = 0;
- }
-+
-+ spin_unlock(&np->led_lock);
- }
-
- static void
-@@ -1786,19 +1710,25 @@
- #else
- LED_NETWORK_SET(LED_OFF);
- #endif
-- }
-- else if (light_leds) {
-+ } else if (light_leds) {
- if (current_speed == 10) {
- LED_NETWORK_SET(LED_ORANGE);
- } else {
- LED_NETWORK_SET(LED_GREEN);
- }
-- }
-- else {
-+ } else {
- LED_NETWORK_SET(LED_OFF);
- }
- }
-
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void
-+e100_netpoll(struct net_device* netdev)
-+{
-+ e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
-+}
-+#endif
-+
- static int
- etrax_init_module(void)
- {
-diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v32.c linux-2.6.19.2.dev/drivers/net/cris/eth_v32.c
---- linux-2.6.19.2.orig/drivers/net/cris/eth_v32.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/net/cris/eth_v32.c 2007-02-06 11:10:37.000000000 +0100
-@@ -0,0 +1,2305 @@
-+/*
-+ * Driver for the ETRAX FS network controller.
-+ *
-+ * Copyright (c) 2003-2006 Axis Communications AB.
-+ */
-+
-+#include <linux/module.h>
-+
-+#include <linux/kernel.h>
-+#include <linux/sched.h>
-+#include <linux/delay.h>
-+#include <linux/types.h>
-+#include <linux/fcntl.h>
-+#include <linux/interrupt.h>
-+#include <linux/ptrace.h>
-+#include <linux/ioport.h>
-+#include <linux/in.h>
-+#include <linux/slab.h>
-+#include <linux/string.h>
-+#include <linux/spinlock.h>
-+#include <linux/errno.h>
-+#include <linux/init.h>
-+#include <linux/cpufreq.h>
-+
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/skbuff.h>
-+#include <linux/ethtool.h>
-+#include <linux/mii.h>
-+
-+#include <asm/io.h> /* LED_* I/O functions */
-+#include <asm/irq.h>
-+#include <asm/arch/hwregs/reg_map.h>
-+#include <asm/arch/hwregs/reg_rdwr.h>
-+#include <asm/arch/hwregs/dma.h>
-+#include <asm/arch/hwregs/eth_defs.h>
-+#include <asm/arch/hwregs/config_defs.h>
-+#include <asm/arch/hwregs/intr_vect_defs.h>
-+#include <asm/system.h>
-+#include <asm/bitops.h>
-+#include <asm/ethernet.h>
-+#include <asm/arch/dma.h>
-+#include <asm/arch/intmem.h>
-+#include <asm/arch/pinmux.h>
-+
-+#include "eth_v32.h"
-+
-+#define DEBUG(x)
-+#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
-+
-+/* Toggle network LEDs on/off at runtime */
-+static int use_network_leds = 1;
-+
-+static void update_rx_stats(struct crisv32_ethernet_local *np);
-+static void update_tx_stats(struct crisv32_ethernet_local *np);
-+static void crisv32_eth_setup_controller(struct net_device *dev);
-+static int crisv32_eth_request_irqdma(struct net_device *dev);
-+static void crisv32_eth_init_rings(struct net_device *dev);
-+static void crisv32_eth_reset_rings(struct net_device *dev);
-+static void crisv32_ethernet_bug(struct net_device *dev);
-+
-+/*
-+ * The name of the card. Is used for messages and in the requests for
-+ * io regions, irqs and dma channels.
-+ */
-+static const char *cardname = "ETRAX FS built-in ethernet controller";
-+
-+static int autoneg_normal = 1;
-+
-+/* Some chipset needs special care. */
-+struct transceiver_ops transceivers[] = {
-+ {0x1018, broadcom_check_speed, broadcom_check_duplex},
-+ /* TDK 2120 and TDK 2120C */
-+ {0xC039, tdk_check_speed, tdk_check_duplex},
-+ {0x039C, tdk_check_speed, tdk_check_duplex},
-+ /* Intel LXT972A*/
-+ {0x04de, intel_check_speed, intel_check_duplex},
-+ /* National Semiconductor DP83865 */
-+ {0x0017, national_check_speed, national_check_duplex},
-+ /* Generic, must be last. */
-+ {0x0000, generic_check_speed, generic_check_duplex}
-+};
-+
-+static struct net_device *crisv32_dev[2];
-+static struct crisv32_eth_leds *crisv32_leds[3];
-+
-+#ifdef CONFIG_CPU_FREQ
-+static int
-+crisv32_ethernet_freq_notifier(struct notifier_block *nb, unsigned long val,
-+ void *data);
-+
-+static struct notifier_block crisv32_ethernet_freq_notifier_block = {
-+ .notifier_call = crisv32_ethernet_freq_notifier
-+};
-+#endif
-+
-+/*
-+ * mask in and out tx/rx interrupts.
-+ */
-+static inline void crisv32_disable_tx_ints(struct crisv32_ethernet_local *np)
-+{
-+ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_no };
-+ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx);
-+}
-+
-+static inline void crisv32_enable_tx_ints(struct crisv32_ethernet_local *np)
-+{
-+ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_yes };
-+ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx);
-+}
-+
-+static inline void crisv32_disable_rx_ints(struct crisv32_ethernet_local *np)
-+{
-+ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_no };
-+ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx);
-+}
-+
-+static inline void crisv32_enable_rx_ints(struct crisv32_ethernet_local *np)
-+{
-+ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_yes };
-+ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx);
-+}
-+
-+/* start/stop receiver */
-+static inline void crisv32_start_receiver(struct crisv32_ethernet_local *np)
-+{
-+ reg_eth_rw_rec_ctrl rec_ctrl;
-+
-+ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl);
-+ rec_ctrl.ma0 = regk_eth_yes;
-+ rec_ctrl.broadcast = regk_eth_rec;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+}
-+
-+static inline void crisv32_stop_receiver(struct crisv32_ethernet_local *np)
-+{
-+ reg_eth_rw_rec_ctrl rec_ctrl;
-+
-+ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl);
-+ rec_ctrl.ma0 = regk_eth_no;
-+ rec_ctrl.broadcast = regk_eth_discard;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+}
-+
-+static int __init
-+crisv32_eth_request_irqdma(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Allocate IRQs and DMAs. */
-+ if (np->eth_inst == regi_eth0) {
-+ if (request_irq(DMA0_INTR_VECT, crisv32tx_eth_interrupt,
-+ 0, cardname, dev)) {
-+ return -EAGAIN;
-+ }
-+
-+ if (request_irq(DMA1_INTR_VECT, crisv32rx_eth_interrupt,
-+ IRQF_SAMPLE_RANDOM, cardname, dev)) {
-+ goto err0_1;
-+ }
-+
-+ if (crisv32_request_dma(0, cardname, DMA_VERBOSE_ON_ERROR,
-+ 12500000, dma_eth0))
-+ goto err0_2;
-+
-+ if (crisv32_request_dma(1, cardname, DMA_VERBOSE_ON_ERROR,
-+ 12500000, dma_eth0))
-+ goto err0_3;
-+
-+ if (request_irq(ETH0_INTR_VECT, crisv32nw_eth_interrupt, 0,
-+ cardname, dev)) {
-+ crisv32_free_dma(1);
-+ err0_3:
-+ crisv32_free_dma(0);
-+ err0_2:
-+ free_irq(DMA1_INTR_VECT, dev);
-+ err0_1:
-+ free_irq(DMA0_INTR_VECT, dev);
-+ return -EAGAIN;
-+ }
-+ } else {
-+ if (request_irq(DMA6_INTR_VECT, crisv32tx_eth_interrupt,
-+ 0, cardname, dev))
-+ return -EAGAIN;
-+
-+ if (request_irq(DMA7_INTR_VECT, crisv32rx_eth_interrupt,
-+ IRQF_SAMPLE_RANDOM, cardname, dev))
-+ goto err1_1;
-+
-+ if (crisv32_request_dma(6, cardname, DMA_VERBOSE_ON_ERROR,
-+ 0, dma_eth1))
-+ goto err1_2;
-+
-+ if (crisv32_request_dma(7, cardname, DMA_VERBOSE_ON_ERROR,
-+ 0, dma_eth1))
-+ goto err1_3;
-+
-+ if (request_irq(ETH1_INTR_VECT, crisv32nw_eth_interrupt, 0,
-+ cardname, dev)) {
-+ crisv32_free_dma(7);
-+ err1_3:
-+ crisv32_free_dma(6);
-+ err1_2:
-+ free_irq(DMA7_INTR_VECT, dev);
-+ err1_1:
-+ free_irq(DMA6_INTR_VECT, dev);
-+ return -EAGAIN;
-+ }
-+ }
-+ return 0;
-+}
-+
-+static void __init
-+crisv32_eth_setup_controller(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ reg_config_rw_pad_ctrl pad_ctrl;
-+
-+ reg_eth_rw_tr_ctrl tr_ctrl = {
-+ .retry = regk_eth_yes,
-+ .pad = regk_eth_yes,
-+ .crc = regk_eth_yes
-+ };
-+
-+ reg_eth_rw_rec_ctrl rec_ctrl = {
-+ .ma0 = regk_eth_no, /* enable at open() */
-+ .broadcast = regk_eth_no,
-+ .max_size = regk_eth_size1522
-+ };
-+
-+ reg_eth_rw_ga_lo ga_lo = { 0 };
-+ reg_eth_rw_ga_hi ga_hi = { 0 };
-+
-+ reg_eth_rw_gen_ctrl gen_ctrl = {
-+ .phy = regk_eth_mii_clk,
-+ .flow_ctrl = regk_eth_yes
-+ };
-+
-+ /*
-+ * Initialize group address registers to make sure that no
-+ * unwanted addresses are matched.
-+ */
-+ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo);
-+ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi);
-+
-+ /* Configure receiver and transmitter */
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl);
-+
-+ /* Enable ethernet controller with mii clk. */
-+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
-+ gen_ctrl.en = regk_eth_yes;
-+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
-+
-+ /* keep reset low (RESET_LEN) */
-+ udelay(500);
-+
-+ /* done */
-+ pad_ctrl = REG_RD(config, regi_config, rw_pad_ctrl);
-+ pad_ctrl.phyrst_n = 1;
-+ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl);
-+
-+ /* Let the PHY reset (RESET_WAIT) */
-+ udelay(200);
-+
-+ crisv32_eth_probe_transceiver(dev);
-+}
-+
-+static void __init
-+crisv32_eth_init_rings(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ int i;
-+
-+ /* Initialise receive descriptors for interface. */
-+ for (i = 0; i < NBR_RX_DESC; i++) {
-+ struct sk_buff *skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
-+
-+ np->dma_rx_descr_list[i].skb = skb;
-+ np->dma_rx_descr_list[i].descr.buf =
-+ (char*)virt_to_phys(skb->data);
-+ np->dma_rx_descr_list[i].descr.after =
-+ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE);
-+
-+ np->dma_rx_descr_list[i].descr.eol = 0;
-+ np->dma_rx_descr_list[i].descr.in_eop = 0;
-+ np->dma_rx_descr_list[i].descr.next =
-+ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr);
-+ }
-+ /* bend the list into a ring */
-+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next =
-+ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
-+
-+ /* Initialize transmit descriptors. */
-+ for (i = 0; i < NBR_TX_DESC; i++) {
-+ np->dma_tx_descr_list[i].descr.wait = 1;
-+ np->dma_tx_descr_list[i].descr.eol = 0;
-+ np->dma_tx_descr_list[i].descr.out_eop = 0;
-+ np->dma_tx_descr_list[i].descr.next =
-+ (void*)virt_to_phys(&np->dma_tx_descr_list[i+1].descr);
-+ }
-+ /* bend the list into a ring */
-+ np->dma_tx_descr_list[NBR_TX_DESC - 1].descr.next =
-+ (void *) virt_to_phys(&np->dma_tx_descr_list[0].descr);
-+
-+ crisv32_eth_reset_rings(dev);
-+}
-+
-+static void
-+crisv32_eth_reset_rings(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ int i;
-+
-+ /* free un-handled tx packets */
-+ while(np->txpackets
-+ || np->catch_tx_desc != np->active_tx_desc) {
-+ np->txpackets--;
-+ if (np->catch_tx_desc->skb)
-+ dev_kfree_skb(np->catch_tx_desc->skb);
-+
-+ np->catch_tx_desc->skb = 0;
-+ np->catch_tx_desc =
-+ phys_to_virt((int)np->catch_tx_desc->descr.next);
-+ } while (np->catch_tx_desc != np->active_tx_desc);
-+ WARN_ON(np->txpackets != 0);
-+ np->txpackets = 0;
-+
-+ /* cleanup the rx-ring */
-+ for (i = 0; i < NBR_RX_DESC; i++) {
-+ struct sk_buff *skb;
-+ skb = np->dma_rx_descr_list[i].skb;
-+ if (!skb
-+ || (np->dma_rx_descr_list[i].descr.buf !=
-+ (void *)virt_to_phys(skb->data)))
-+ {
-+ printk("%s:%d: damaged rx-ring! "
-+ "i=%d skb=%p %lx %lx %p %p\n",
-+ __func__, __LINE__, i,
-+ skb,
-+ virt_to_phys(skb->data),
-+ virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE),
-+ np->dma_rx_descr_list[i].descr.buf,
-+ np->dma_rx_descr_list[i].descr.after);
-+ WARN_ON(1);
-+ crisv32_ethernet_bug(dev);
-+ if (skb)
-+ dev_kfree_skb(skb);
-+ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
-+ np->dma_rx_descr_list[i].skb = skb;
-+ np->dma_rx_descr_list[i].descr.buf =
-+ (char*)virt_to_phys(skb->data);
-+ }
-+ np->dma_rx_descr_list[i].descr.after =
-+ (char*)virt_to_phys(skb->data
-+ + MAX_MEDIA_DATA_SIZE);
-+ np->dma_rx_descr_list[i].descr.eol = 0;
-+ np->dma_rx_descr_list[i].descr.in_eop = 0;
-+ /* Workaround cache bug */
-+ flush_dma_descr(&np->dma_rx_descr_list[i].descr, 1);
-+ }
-+
-+ /* reset rx-ring */
-+ np->active_rx_desc = &np->dma_rx_descr_list[0];
-+ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1];
-+ np->last_rx_desc = np->prev_rx_desc;
-+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1;
-+
-+ /* reset tx-ring */
-+ np->dma_tx_descr_list[0].descr.buf =
-+ np->dma_tx_descr_list[0].descr.after = 0;
-+ np->dma_rx_descr_list[i].descr.in_eop = 0;
-+ np->dma_tx_descr_list[0].descr.eol = 1;
-+
-+ np->active_tx_desc = &np->dma_tx_descr_list[0];
-+ np->prev_tx_desc = &np->dma_tx_descr_list[NBR_TX_DESC - 1];
-+ np->catch_tx_desc = &np->dma_tx_descr_list[0];
-+
-+ /* Fill context descriptors. */
-+ np->ctxt_in.next = 0;
-+ np->ctxt_in.saved_data =
-+ (void *)virt_to_phys(&np->active_rx_desc->descr);
-+ np->ctxt_in.saved_data_buf = np->active_rx_desc->descr.buf;
-+
-+ np->ctxt_out.next = 0;
-+ np->ctxt_out.saved_data =
-+ (void *)virt_to_phys(&np->dma_tx_descr_list[0].descr);
-+}
-+
-+static void __init
-+crisv32_init_leds(int ledgrp, struct net_device* dev)
-+{
-+ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0);
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Use already allocated led grp if initialized */
-+ if (crisv32_leds[ledgrp] != NULL) {
-+ np->leds = crisv32_leds[ledgrp];
-+ return;
-+ }
-+
-+ crisv32_leds[ledgrp] = kmalloc(sizeof(struct crisv32_eth_leds),GFP_KERNEL);
-+
-+ crisv32_leds[ledgrp]->ledgrp = ledgrp;
-+ crisv32_leds[ledgrp]->led_active = 0;
-+ /* NOTE: Should this value be set to zero as the jiffies timer can wrap? */
-+ crisv32_leds[ledgrp]->led_next_time = jiffies;
-+
-+ crisv32_leds[ledgrp]->clear_led_timer = timer_init;
-+ crisv32_leds[ledgrp]->clear_led_timer.function = crisv32_clear_network_leds;
-+ crisv32_leds[ledgrp]->clear_led_timer.data = (unsigned long) dev;
-+
-+ spin_lock_init(&crisv32_leds[ledgrp]->led_lock);
-+
-+ np->leds = crisv32_leds[ledgrp];
-+}
-+
-+static int __init
-+crisv32_ethernet_init(void)
-+{
-+ struct crisv32_ethernet_local *np;
-+ int ret = 0;
-+
-+ printk("ETRAX FS 10/100MBit ethernet v0.01 (c)"
-+ " 2003 Axis Communications AB\n");
-+
-+#ifdef CONFIG_ETRAX_ETHERNET_IFACE0
-+{
-+ int iface0 = 0;
-+ /* Default MAC address for interface 0.
-+ * The real one will be set later. */
-+ static struct sockaddr default_mac_iface0 =
-+ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00}};
-+
-+ if (!(crisv32_dev[iface0] = alloc_etherdev(sizeof *np)))
-+ return -ENOMEM;
-+
-+ ret |= crisv32_ethernet_device_init(crisv32_dev[iface0]);
-+
-+#if defined(CONFIG_ETRAX_ETH0_USE_LEDGRP0)
-+ crisv32_init_leds(LED_GRP_0,crisv32_dev[iface0]);
-+#elif defined(CONFIG_ETRAX_ETH0_USE_LEDGRP1)
-+ crisv32_init_leds(LED_GRP_1,crisv32_dev[iface0]);
-+#else
-+ crisv32_init_leds(LED_GRP_NONE,crisv32_dev[iface0]);
-+#endif
-+
-+ np = (struct crisv32_ethernet_local *) crisv32_dev[iface0]->priv;
-+ np->eth_inst = regi_eth0;
-+ np->dma_out_inst = regi_dma0;
-+ np->dma_in_inst = regi_dma1;
-+
-+ register_netdev(crisv32_dev[iface0]);
-+
-+ /* Set up default MAC address */
-+ memcpy(crisv32_dev[iface0]->dev_addr, default_mac_iface0.sa_data, 6);
-+ crisv32_eth_set_mac_address(crisv32_dev[iface0], &default_mac_iface0);
-+ if (crisv32_eth_request_irqdma(crisv32_dev[iface0]))
-+ printk("%s: eth0 unable to allocate IRQ and DMA resources\n",
-+ __func__);
-+ np->txpackets = 0;
-+ crisv32_eth_init_rings(crisv32_dev[iface0]);
-+ crisv32_eth_setup_controller(crisv32_dev[iface0]);
-+}
-+#endif /* CONFIG_ETRAX_ETHERNET_IFACE0 */
-+
-+#ifdef CONFIG_ETRAX_ETHERNET_IFACE1
-+{
-+ int iface1 = 0;
-+ /* Default MAC address for interface 1.
-+ * The real one will be set later. */
-+ static struct sockaddr default_mac_iface1 =
-+ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x01}};
-+
-+ if (crisv32_pinmux_alloc_fixed(pinmux_eth1))
-+ panic("Eth pinmux\n");
-+
-+ /* Increase index to device array if interface 0 is enabled as well.*/
-+#ifdef CONFIG_ETRAX_ETHERNET_IFACE0
-+ iface1++;
-+#endif
-+ if (!(crisv32_dev[iface1] = alloc_etherdev(sizeof *np)))
-+ return -ENOMEM;
-+
-+ ret |= crisv32_ethernet_device_init(crisv32_dev[iface1]);
-+
-+#if defined(CONFIG_ETRAX_ETH1_USE_LEDGRP0)
-+ crisv32_init_leds(LED_GRP_0,crisv32_dev[iface1]);
-+#elif defined(CONFIG_ETRAX_ETH1_USE_LEDGRP1)
-+ crisv32_init_leds(LED_GRP_1,crisv32_dev[iface1]);
-+#else
-+ crisv32_init_leds(LED_GRP_NONE,crisv32_dev[iface1]);
-+#endif
-+
-+ np = (struct crisv32_ethernet_local *) crisv32_dev[iface1]->priv;
-+ np->eth_inst = regi_eth1;
-+ np->dma_out_inst = regi_dma6;
-+ np->dma_in_inst = regi_dma7;
-+
-+ register_netdev(crisv32_dev[iface1]);
-+
-+ /* Set up default MAC address */
-+ memcpy(crisv32_dev[iface1]->dev_addr, default_mac_iface1.sa_data, 6);
-+ crisv32_eth_set_mac_address(crisv32_dev[iface1], &default_mac_iface1);
-+
-+ if (crisv32_eth_request_irqdma(crisv32_dev[iface1]))
-+ printk("%s: eth1 unable to allocate IRQ and DMA resources\n",
-+ __func__);
-+ np->txpackets = 0;
-+ crisv32_eth_init_rings(crisv32_dev[iface1]);
-+ crisv32_eth_setup_controller(crisv32_dev[iface1]);
-+}
-+#endif /* CONFIG_ETRAX_ETHERNET_IFACE1 */
-+
-+#ifdef CONFIG_CPU_FREQ
-+ cpufreq_register_notifier(&crisv32_ethernet_freq_notifier_block,
-+ CPUFREQ_TRANSITION_NOTIFIER);
-+#endif
-+
-+ return ret;
-+}
-+
-+static int __init
-+crisv32_ethernet_device_init(struct net_device* dev)
-+{
-+ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0);
-+ struct crisv32_ethernet_local *np;
-+
-+ dev->base_addr = 0; /* Just to have something to show. */
-+
-+ /* we do our own locking */
-+ dev->features |= NETIF_F_LLTX;
-+
-+ /* We use several IRQs and DMAs so just report 0 here. */
-+ dev->irq = 0;
-+ dev->dma = 0;
-+
-+ /*
-+ * Fill in our handlers so the network layer can talk to us in the
-+ * future.
-+ */
-+ dev->open = crisv32_eth_open;
-+ dev->hard_start_xmit = crisv32_eth_send_packet;
-+ dev->stop = crisv32_eth_close;
-+ dev->get_stats = crisv32_get_stats;
-+ dev->set_multicast_list = crisv32_eth_set_multicast_list;
-+ dev->set_mac_address = crisv32_eth_set_mac_address;
-+ dev->ethtool_ops = &crisv32_ethtool_ops;
-+ dev->do_ioctl = crisv32_eth_ioctl;
-+ dev->set_config = crisv32_eth_set_config;
-+ dev->tx_timeout = crisv32_eth_tx_timeout;
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+ dev->poll_controller = crisv32_netpoll;
-+#endif
-+
-+ np = netdev_priv(dev);
-+
-+ spin_lock_init(&np->lock);
-+ spin_lock_init(&np->transceiver_lock);
-+
-+ /* Initialize speed indicator stuff. */
-+ np->current_speed = 10;
-+ np->current_speed_selection = 0; /* Auto. */
-+ np->speed_timer = timer_init;
-+ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
-+ np->speed_timer.data = (unsigned long) dev;
-+ np->speed_timer.function = crisv32_eth_check_speed;
-+
-+ np->full_duplex = 0;
-+ np->current_duplex = autoneg;
-+ np->duplex_timer = timer_init;
-+ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
-+ np->duplex_timer.data = (unsigned long) dev;
-+ np->duplex_timer.function = crisv32_eth_check_duplex;
-+
-+ return 0;
-+}
-+
-+static int
-+crisv32_eth_open(struct net_device *dev)
-+{
-+ struct sockaddr mac_addr;
-+ reg_dma_rw_ack_intr ack_intr = { .data = 1,.in_eop = 1 };
-+ reg_dma_rw_cfg dma_cfg = { .en = 1 };
-+ reg_eth_rw_clr_err clr_err = {.clr = regk_eth_yes};
-+ int intr_mask_nw = 0x1cff;
-+ int eth_ack_intr = 0xffff;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->lock);
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ np->gigabit_mode = 0;
-+#endif
-+ crisv32_disable_tx_ints(np);
-+ crisv32_disable_rx_ints(np);
-+
-+ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err);
-+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, eth_ack_intr);
-+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw);
-+ crisv32_eth_reset_rings(dev);
-+
-+ /* Give the hardware an idea of what MAC address we want. */
-+ memcpy(mac_addr.sa_data, dev->dev_addr, dev->addr_len);
-+ crisv32_eth_set_mac_address(dev, &mac_addr);
-+
-+ /* Enable irq and make sure that the irqs are cleared. */
-+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
-+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
-+
-+ /* Prepare input DMA. */
-+ DMA_RESET(np->dma_in_inst);
-+ DMA_ENABLE(np->dma_in_inst);
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2);
-+#endif
-+ DMA_START_CONTEXT( np->dma_in_inst, virt_to_phys(&np->ctxt_in));
-+ DMA_CONTINUE(np->dma_in_inst);
-+ crisv32_enable_rx_ints(np);
-+ crisv32_start_receiver(np);
-+
-+ /* Prepare output DMA. */
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4);
-+#endif
-+ REG_WR(dma, np->dma_out_inst, rw_cfg, dma_cfg);
-+ netif_start_queue(dev);
-+ crisv32_enable_tx_ints(np);
-+
-+ /* Start duplex/speed timers */
-+ add_timer(&np->speed_timer);
-+ add_timer(&np->duplex_timer);
-+
-+ spin_unlock(&np->lock);
-+ /*
-+ * We are now ready to accept transmit requeusts from the queueing
-+ * layer of the networking.
-+ */
-+ netif_carrier_on(dev);
-+
-+ return 0;
-+}
-+
-+static int
-+crisv32_eth_close(struct net_device *dev)
-+{
-+ reg_dma_rw_ack_intr ack_intr = {0};
-+
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ unsigned long flags;
-+
-+ printk(KERN_INFO "Closing %s.\n", dev->name);
-+
-+ /* stop the receiver before the DMA channels to avoid overruns. */
-+ crisv32_stop_receiver(np);
-+
-+ spin_lock_irqsave(&np->lock, flags);
-+ netif_stop_queue(dev);
-+
-+ /* Reset the TX DMA in case it has hung on something. */
-+ DMA_RESET(np->dma_in_inst);
-+
-+ /* Stop DMA */
-+ DMA_STOP(np->dma_in_inst);
-+ DMA_STOP(np->dma_out_inst);
-+
-+ /* Disable irq and make sure that the irqs are cleared. */
-+ crisv32_disable_tx_ints(np);
-+ ack_intr.data = 1;
-+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
-+
-+ crisv32_disable_rx_ints(np);
-+ ack_intr.in_eop = 1;
-+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
-+
-+ np->sender_started = 0;
-+ spin_unlock_irqrestore(&np->lock, flags);
-+
-+ /* Update the statistics. */
-+ update_rx_stats(np);
-+ update_tx_stats(np);
-+
-+ /* Stop speed/duplex timers */
-+ del_timer(&np->speed_timer);
-+ del_timer(&np->duplex_timer);
-+
-+ return 0;
-+}
-+
-+static int
-+crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr)
-+{
-+ int i;
-+ unsigned char *addr = ((struct sockaddr*)vpntr)->sa_data;
-+
-+ reg_eth_rw_ma0_lo ma0_lo =
-+ { addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24)};
-+
-+ reg_eth_rw_ma0_hi ma0_hi = { addr[4] | (addr[5] << 8) };
-+
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Remember the address. */
-+ memcpy(dev->dev_addr, addr, dev->addr_len);
-+
-+ /*
-+ * Write the address to the hardware.
-+ * Note the way the address is wrapped:
-+ * ma0_l0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
-+ * ma0_hi = a0_4 | (a0_5 << 8);
-+ */
-+ REG_WR(eth, np->eth_inst, rw_ma0_lo, ma0_lo);
-+ REG_WR(eth, np->eth_inst, rw_ma0_hi, ma0_hi);
-+
-+ printk(KERN_INFO "%s: changed MAC to ", dev->name);
-+
-+ for (i = 0; i < 5; i++)
-+ printk("%02X:", dev->dev_addr[i]);
-+
-+ printk("%02X\n", dev->dev_addr[i]);
-+
-+ return 0;
-+}
-+
-+static irqreturn_t
-+crisv32rx_eth_interrupt(int irq, void *dev_id)
-+{
-+ reg_dma_r_masked_intr masked_in;
-+ reg_dma_rw_cmd cmd = {0};
-+ reg_dma_rw_ack_intr ack_intr = {0};
-+ struct net_device *dev = (struct net_device *) dev_id;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ masked_in = REG_RD(dma, np->dma_in_inst, r_masked_intr);
-+
-+ if (masked_in.in_eop) {
-+ DEBUG(printk("EOP_IN interrupt\n"));
-+
-+ /* Acknowledge input dma interrupt. */
-+ ack_intr.in_eop = 1;
-+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
-+
-+ np->new_rx_package = 1;
-+ /* Check if complete packets were indeed received. */
-+ while (np->active_rx_desc->descr.in_eop == 1
-+ && np->new_rx_package) {
-+ /*
-+ * Take out the buffer and give it to the OS, then
-+ * allocate a new buffer to put a packet in.
-+ */
-+ crisv32_eth_receive_packet(dev);
-+
-+ /* Update number of packets received. */
-+ np->stats.rx_packets++;
-+
-+ /* Restarts input dma. */
-+ cmd.cont_data = 1;
-+ REG_WR(dma, np->dma_in_inst, rw_cmd, cmd);
-+
-+ /* Acknowledge input dma interrupt. */
-+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
-+ }
-+ }
-+ return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t
-+crisv32tx_eth_interrupt(int irq, void *dev_id)
-+{
-+ reg_dma_rw_stat stat;
-+ dma_descr_data *dma_pos;
-+ reg_dma_rw_ack_intr ack_intr = { .data = 1 };
-+ reg_dma_r_masked_intr masked_out;
-+
-+ struct net_device *dev = (struct net_device *) dev_id;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ unsigned long flags;
-+
-+ masked_out = REG_RD(dma, np->dma_out_inst, r_masked_intr);
-+
-+ /* Get the current output dma position. */
-+ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
-+ if (stat.list_state == regk_dma_data_at_eol)
-+ dma_pos = &np->active_tx_desc->descr;
-+ else
-+ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst,
-+ rw_data));
-+
-+ /* ack the interrupt */
-+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
-+
-+ /* protect against ethernet excessive-col interrupts */
-+ spin_lock_irqsave(&np->lock, flags);
-+
-+ /* Take care of transmited dma descriptors and report sent packet. */
-+ while (np->txpackets && ((&np->catch_tx_desc->descr != dma_pos)
-+ || netif_queue_stopped(dev))) {
-+ /* Update sent packet statistics. */
-+ np->stats.tx_bytes += np->catch_tx_desc->skb->len;
-+ np->stats.tx_packets++;
-+
-+ dev_kfree_skb_irq(np->catch_tx_desc->skb);
-+ np->catch_tx_desc->skb = 0;
-+ np->txpackets--;
-+ np->catch_tx_desc =
-+ phys_to_virt((int)np->catch_tx_desc->descr.next);
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ if (np->gigabit_mode) {
-+ np->intmem_tx_buf_catch->free = 1;
-+ np->intmem_tx_buf_catch = np->intmem_tx_buf_catch->next;
-+ }
-+#endif
-+ netif_wake_queue(dev);
-+ }
-+ spin_unlock_irqrestore(&np->lock, flags);
-+ return IRQ_HANDLED;
-+}
-+
-+
-+/* Update receive errors. */
-+static void
-+update_rx_stats(struct crisv32_ethernet_local *np)
-+{
-+ reg_eth_rs_rec_cnt r;
-+ reg_eth_rs_phy_cnt rp;
-+
-+ r = REG_RD(eth, np->eth_inst, rs_rec_cnt);
-+ rp = REG_RD(eth, np->eth_inst, rs_phy_cnt);
-+
-+ np->stats.rx_fifo_errors += r.congestion;
-+ np->stats.rx_crc_errors += r.crc_err;
-+ np->stats.rx_frame_errors += r.align_err;
-+ np->stats.rx_length_errors += r.oversize;
-+}
-+
-+/* Update transmit errors. */
-+static void
-+update_tx_stats(struct crisv32_ethernet_local *np)
-+{
-+ reg_eth_rs_tr_cnt r;
-+
-+ r = REG_RD(eth, np->eth_inst, rs_tr_cnt);
-+
-+ np->stats.collisions += r.single_col + r.mult_col;
-+ np->stats.tx_errors += r.deferred;
-+}
-+
-+/* Get current statistics. */
-+static struct net_device_stats *
-+crisv32_get_stats(struct net_device *dev)
-+{
-+ unsigned long flags;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ spin_lock_irqsave(&np->lock, flags);
-+
-+ update_rx_stats(np);
-+ update_tx_stats(np);
-+
-+ spin_unlock_irqrestore(&np->lock, flags);
-+
-+ return &np->stats;
-+}
-+
-+/* Check for network errors. This acknowledge the received interrupt. */
-+static irqreturn_t
-+crisv32nw_eth_interrupt(int irq, void *dev_id)
-+{
-+ struct net_device *dev = (struct net_device *) dev_id;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ reg_eth_r_masked_intr intr_mask;
-+ int ack_intr = 0xffff;
-+ reg_eth_rw_clr_err clr_err;
-+
-+ intr_mask = REG_RD(eth, np->eth_inst, r_masked_intr);
-+
-+ /*
-+ * Check for underrun and/or excessive collisions. Note that the
-+ * rw_clr_err register clears both underrun and excessive collision
-+ * errors, so there's no need to check them separately.
-+ */
-+ if (np->sender_started
-+ && (intr_mask.urun || intr_mask.exc_col)) {
-+ unsigned long flags;
-+ dma_descr_data *dma_pos;
-+ reg_dma_rw_stat stat;
-+
-+ /* Get the current output dma position. */
-+ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
-+ if (stat.list_state == regk_dma_data_at_eol)
-+ dma_pos = &np->active_tx_desc->descr;
-+ else
-+ dma_pos = phys_to_virt(REG_RD_INT(dma,
-+ np->dma_out_inst,
-+ rw_data));
-+
-+ /*
-+ * Protect against the tx-interrupt messing with
-+ * the tx-ring.
-+ */
-+ spin_lock_irqsave(&np->lock, flags);
-+ /*
-+ * If we have more than one packet in the tx-ring
-+ * drop one and move ahead. Upper layers rely on
-+ * packeloss when doing congestion control.
-+ */
-+ if (intr_mask.exc_col && np->txpackets > 1) {
-+ dev_kfree_skb_irq(np->catch_tx_desc->skb);
-+ np->catch_tx_desc->skb = 0;
-+ np->catch_tx_desc =
-+ phys_to_virt((int)
-+ np->catch_tx_desc->descr.next);
-+ np->txpackets--;
-+ netif_wake_queue(dev);
-+ }
-+ np->ctxt_out.next = 0;
-+ if (np->txpackets) {
-+ np->ctxt_out.saved_data = (void *)
-+ virt_to_phys(&np->catch_tx_desc->descr);
-+ np->ctxt_out.saved_data_buf =
-+ np->catch_tx_desc->descr.buf;
-+
-+ /* restart the DMA */
-+ DMA_START_CONTEXT(np->dma_out_inst,
-+ (int) virt_to_phys(&np->ctxt_out));
-+ }
-+ else {
-+ /* let the next packet restart the DMA */
-+ np->ctxt_out.saved_data = (void *)
-+ virt_to_phys(&np->active_tx_desc->descr);
-+ np->sender_started = 0;
-+ }
-+
-+ spin_unlock_irqrestore(&np->lock, flags);
-+ np->stats.tx_errors++;
-+ }
-+
-+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr);
-+ clr_err.clr = 1;
-+ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err);
-+
-+ update_rx_stats(np);
-+ update_tx_stats(np);
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/* We have a good packet(s), get it/them out of the buffers. */
-+static void
-+crisv32_eth_receive_packet(struct net_device *dev)
-+{
-+ int length;
-+ struct sk_buff *skb;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ struct sk_buff *tmp;
-+ unsigned long flags;
-+
-+ DEBUG(printk("crisv32_receive_packet\n"));
-+
-+ /* Activate LED */
-+ spin_lock_irqsave(&np->leds->led_lock, flags);
-+ if (!np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
-+ /* light the network leds depending on the current speed. */
-+ crisv32_set_network_leds(LED_ACTIVITY, dev);
-+
-+ /* Set the earliest time we may clear the LED */
-+ np->leds->led_next_time = jiffies + NET_FLASH_TIME;
-+ np->leds->led_active = 1;
-+ np->leds->clear_led_timer.data = (unsigned long) dev;
-+ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10);
-+ }
-+ spin_unlock_irqrestore(&np->leds->led_lock, flags);
-+
-+ /* Discard CRC (4 bytes). */
-+ length = (np->active_rx_desc->descr.after) -
-+ (np->active_rx_desc->descr.buf) - 4;
-+
-+ /* Update received packet statistics. */
-+ np->stats.rx_bytes += length;
-+
-+ if (np->active_rx_desc != np->last_rx_desc) {
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ if (np->gigabit_mode) {
-+ skb = dev_alloc_skb(length);
-+ if(!skb) {
-+ np->stats.rx_errors++;
-+ printk(KERN_NOTICE "%s: memory squeeze,"
-+ " dropping packet.", dev->name);
-+ return;
-+ }
-+ /* Allocate room for the packet body. */
-+ skb_put(skb, length - ETHER_HEAD_LEN);
-+ /* Allocate room for the header and copy the data to
-+ * the SKB */
-+ memcpy(skb_push(skb, ETHER_HEAD_LEN),
-+ crisv32_intmem_phys_to_virt((unsigned long)np->active_rx_desc->descr.buf), length);
-+ skb->dev = dev;
-+ skb->protocol = eth_type_trans(skb, dev);
-+ skb->ip_summed = CHECKSUM_NONE;
-+ /* Send the packet to the upper layer. */
-+ netif_rx(skb);
-+ np->last_rx_desc =
-+ (void *) phys_to_virt(np->last_rx_desc->descr.next);
-+ } else {
-+#endif
-+ tmp = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
-+ if (!tmp) {
-+ np->stats.rx_errors++;
-+ printk(KERN_NOTICE "%s: memory squeeze,"
-+ " dropping packet.",
-+ dev->name);
-+ return;
-+ }
-+ skb = np->active_rx_desc->skb;
-+ np->active_rx_desc->skb = tmp;
-+ skb_put(skb, length);
-+
-+ np->active_rx_desc->descr.buf =
-+ (void *) virt_to_phys(np->active_rx_desc->skb->data);
-+ np->active_rx_desc->descr.after =
-+ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE;
-+
-+ skb->dev = dev;
-+ skb->protocol = eth_type_trans(skb, dev);
-+ skb->ip_summed = CHECKSUM_NONE;
-+
-+ /* Send the packet to the upper layer. */
-+ netif_rx(skb);
-+ np->last_rx_desc =
-+ phys_to_virt((int)
-+ np->last_rx_desc->descr.next);
-+ }
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ }
-+#endif
-+ /*
-+ * When the input DMA reaches eol precaution must be taken, otherwise
-+ * the DMA could stop. The problem occurs if the eol flag is re-placed
-+ * on the descriptor that the DMA stands on before the DMA proceed to
-+ * the next descriptor. This case could, for example, happen if there
-+ * is a traffic burst and then the network goes silent. To prevent this
-+ * we make sure that we do not set the eol flag on the descriptor that
-+ * the DMA stands on.
-+ */
-+ if(virt_to_phys(&np->active_rx_desc->descr) !=
-+ REG_RD_INT(dma, np->dma_in_inst, rw_saved_data)) {
-+ np->active_rx_desc->descr.after =
-+ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE;
-+ np->active_rx_desc->descr.eol = 1;
-+ np->active_rx_desc->descr.in_eop = 0;
-+ np->active_rx_desc =
-+ phys_to_virt((int)np->active_rx_desc->descr.next);
-+ barrier();
-+ np->prev_rx_desc->descr.eol = 0;
-+ flush_dma_descr(&np->prev_rx_desc->descr, 0); // Workaround cache bug
-+ np->prev_rx_desc =
-+ phys_to_virt((int)np->prev_rx_desc->descr.next);
-+ flush_dma_descr(&np->prev_rx_desc->descr, 1); // Workaround cache bug
-+ } else {
-+ np->new_rx_package = 0;
-+ }
-+}
-+
-+/*
-+ * This function (i.e. hard_start_xmit) is protected from concurent calls by a
-+ * spinlock (xmit_lock) in the net_device structure.
-+ */
-+static int
-+crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ unsigned char *buf = skb->data;
-+ unsigned long flags;
-+
-+ dev->trans_start = jiffies;
-+
-+ spin_lock_irqsave(&np->leds->led_lock, flags);
-+ if (!np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
-+ /* light the network leds depending on the current speed. */
-+ crisv32_set_network_leds(LED_ACTIVITY, dev);
-+
-+ /* Set the earliest time we may clear the LED */
-+ np->leds->led_next_time = jiffies + NET_FLASH_TIME;
-+ np->leds->led_active = 1;
-+ np->leds->clear_led_timer.data = (unsigned long) dev;
-+ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10);
-+ }
-+ spin_unlock_irqrestore(&np->leds->led_lock, flags);
-+
-+ /*
-+ * Need to disable irq to avoid updating pointer in interrupt while
-+ * sending packets.
-+ */
-+ spin_lock_irqsave(&np->lock, flags);
-+
-+ np->active_tx_desc->skb = skb;
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ if (np->gigabit_mode) {
-+ if(np->intmem_tx_buf_active->free) {
-+ memcpy(np->intmem_tx_buf_active->buf,
-+ skb->data, skb->len);
-+ np->intmem_tx_buf_active->free = 0;
-+ crisv32_eth_hw_send_packet(
-+ np->intmem_tx_buf_active->buf, skb->len, np);
-+ np->intmem_tx_buf_active =
-+ np->intmem_tx_buf_active->next;
-+ } else {
-+ printk("%s: Internal tx memory buffer not free!\n\r",
-+ __FILE__);
-+ spin_unlock_irqrestore(&np->lock, flags);
-+ return 1;
-+ }
-+ }
-+ else
-+#endif
-+ {
-+ crisv32_eth_hw_send_packet(buf, skb->len, np);
-+ }
-+ /* Stop queue if full. */
-+ if (np->active_tx_desc == np->catch_tx_desc)
-+ netif_stop_queue(dev);
-+
-+ np->txpackets++;
-+ spin_unlock_irqrestore(&np->lock, flags);
-+
-+ return 0;
-+}
-+
-+
-+static void
-+crisv32_eth_hw_send_packet(unsigned char *buf, int length, void *priv)
-+{
-+ struct crisv32_ethernet_local *np =
-+ (struct crisv32_ethernet_local *) priv;
-+
-+ /* Configure the tx dma descriptor. */
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ if (np->gigabit_mode) {
-+ np->active_tx_desc->descr.buf = (unsigned char *) crisv32_intmem_virt_to_phys(buf);
-+ } else
-+#endif
-+ {
-+ np->active_tx_desc->descr.buf = (unsigned char *) virt_to_phys(buf);
-+ }
-+
-+ np->active_tx_desc->descr.after = np->active_tx_desc->descr.buf +
-+ length;
-+ np->active_tx_desc->descr.intr = 1;
-+ np->active_tx_desc->descr.out_eop = 1;
-+
-+ /* Move eol. */
-+ np->active_tx_desc->descr.eol = 1;
-+ np->prev_tx_desc->descr.eol = 0;
-+
-+
-+ /* Update pointers. */
-+ np->prev_tx_desc = np->active_tx_desc;
-+ np->active_tx_desc = phys_to_virt((int)np->active_tx_desc->descr.next);
-+
-+ /* Start DMA. */
-+ crisv32_start_dma_out(np);
-+}
-+
-+static void
-+crisv32_start_dma_out(struct crisv32_ethernet_local* np)
-+{
-+ if (!np->sender_started) {
-+ /* Start DMA for the first time. */
-+ np->ctxt_out.saved_data_buf = np->prev_tx_desc->descr.buf;
-+ REG_WR(dma, np->dma_out_inst, rw_group_down,
-+ (int) virt_to_phys(&np->ctxt_out));
-+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c);
-+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst);
-+ np->sender_started = 1;
-+ } else {
-+ DMA_CONTINUE_DATA(np->dma_out_inst);
-+ }
-+}
-+
-+/*
-+ * Called by upper layers if they decide it took too long to complete sending
-+ * a packet - we need to reset and stuff.
-+ */
-+static void
-+crisv32_eth_tx_timeout(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ reg_dma_rw_cfg cfg = {0};
-+ reg_dma_rw_stat stat = {0};
-+ unsigned long flags;
-+
-+ printk(KERN_WARNING "%s: transmit timed out\n", dev->name);
-+
-+
-+ spin_lock_irqsave(&np->lock, flags);
-+ crisv32_ethernet_bug(dev);
-+
-+ np->txpackets = 0;
-+ /* Update error stats. */
-+ np->stats.tx_errors++;
-+
-+ /* Reset the TX DMA in case it has hung on something. */
-+ cfg.en = 0;
-+ REG_WR(dma, np->dma_out_inst, rw_cfg, cfg);
-+
-+ do {
-+ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
-+ } while (stat.mode != regk_dma_rst);
-+
-+ /* Reset the tranceiver. */
-+ crisv32_eth_reset_tranceiver(dev);
-+
-+ /* Get rid of the packets that never got an interrupt. */
-+ do {
-+ if (np->catch_tx_desc->skb)
-+ dev_kfree_skb(np->catch_tx_desc->skb);
-+
-+ np->catch_tx_desc->skb = 0;
-+ np->catch_tx_desc =
-+ phys_to_virt((int)np->catch_tx_desc->descr.next);
-+ } while (np->catch_tx_desc != np->active_tx_desc);
-+
-+
-+ /* Start output DMA. */
-+ REG_WR(dma, np->dma_out_inst, rw_group_down,
-+ (int) virt_to_phys(&np->ctxt_out));
-+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c);
-+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst);
-+ spin_unlock_irqrestore(&np->lock, flags);
-+
-+ /* Tell the upper layers we're ok again. */
-+ netif_wake_queue(dev);
-+}
-+
-+/*
-+ * Set or clear the multicast filter for this adaptor.
-+ * num_addrs == -1 Promiscuous mode, receive all packets
-+ * num_addrs == 0 Normal mode, clear multicast list
-+ * num_addrs > 0 Multicast mode, receive normal and MC packets,
-+ * and do best-effort filtering.
-+ */
-+static void
-+crisv32_eth_set_multicast_list(struct net_device *dev)
-+{
-+ int num_addr = dev->mc_count;
-+ unsigned long int lo_bits;
-+ unsigned long int hi_bits;
-+ reg_eth_rw_rec_ctrl rec_ctrl = {0};
-+ reg_eth_rw_ga_lo ga_lo = {0};
-+ reg_eth_rw_ga_hi ga_hi = {0};
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ if (dev->flags & IFF_PROMISC) {
-+ /* Promiscuous mode. */
-+ lo_bits = 0xfffffffful;
-+ hi_bits = 0xfffffffful;
-+
-+ /* Enable individual receive. */
-+ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst,
-+ rw_rec_ctrl);
-+ rec_ctrl.individual = regk_eth_yes;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ } else if (dev->flags & IFF_ALLMULTI) {
-+ /* Enable all multicasts. */
-+ lo_bits = 0xfffffffful;
-+ hi_bits = 0xfffffffful;
-+
-+ /* Disable individual receive */
-+ rec_ctrl =
-+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
-+ rec_ctrl.individual = regk_eth_no;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ } else if (num_addr == 0) {
-+ /* Normal, clear the mc list. */
-+ lo_bits = 0x00000000ul;
-+ hi_bits = 0x00000000ul;
-+
-+ /* Disable individual receive */
-+ rec_ctrl =
-+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
-+ rec_ctrl.individual = regk_eth_no;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ } else {
-+ /* MC mode, receive normal and MC packets. */
-+ char hash_ix;
-+ struct dev_mc_list *dmi = dev->mc_list;
-+ int i;
-+ char *baddr;
-+ lo_bits = 0x00000000ul;
-+ hi_bits = 0x00000000ul;
-+
-+ for (i = 0; i < num_addr; i++) {
-+ /* Calculate the hash index for the GA registers. */
-+ hash_ix = 0;
-+ baddr = dmi->dmi_addr;
-+ hash_ix ^= (*baddr) & 0x3f;
-+ hash_ix ^= ((*baddr) >> 6) & 0x03;
-+ ++baddr;
-+ hash_ix ^= ((*baddr) << 2) & 0x03c;
-+ hash_ix ^= ((*baddr) >> 4) & 0xf;
-+ ++baddr;
-+ hash_ix ^= ((*baddr) << 4) & 0x30;
-+ hash_ix ^= ((*baddr) >> 2) & 0x3f;
-+ ++baddr;
-+ hash_ix ^= (*baddr) & 0x3f;
-+ hash_ix ^= ((*baddr) >> 6) & 0x03;
-+ ++baddr;
-+ hash_ix ^= ((*baddr) << 2) & 0x03c;
-+ hash_ix ^= ((*baddr) >> 4) & 0xf;
-+ ++baddr;
-+ hash_ix ^= ((*baddr) << 4) & 0x30;
-+ hash_ix ^= ((*baddr) >> 2) & 0x3f;
-+
-+ hash_ix &= 0x3f;
-+
-+ if (hash_ix > 32)
-+ hi_bits |= (1 << (hash_ix - 32));
-+ else
-+ lo_bits |= (1 << hash_ix);
-+
-+ dmi = dmi->next;
-+ }
-+
-+ /* Disable individual receive. */
-+ rec_ctrl =
-+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
-+ rec_ctrl.individual = regk_eth_no;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ }
-+
-+ ga_lo.tbl = (unsigned int) lo_bits;
-+ ga_hi.tbl = (unsigned int) hi_bits;
-+
-+ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo);
-+ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi);
-+}
-+
-+static int
-+crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-+{
-+ struct mii_ioctl_data *data = if_mii(ifr);
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ int old_autoneg;
-+
-+ spin_lock(&np->lock); /* Preempt protection */
-+ switch (cmd) {
-+ case SIOCGMIIPHY: /* Get PHY address */
-+ data->phy_id = np->mdio_phy_addr;
-+ break;
-+ case SIOCGMIIREG: /* Read MII register */
-+ data->val_out = crisv32_eth_get_mdio_reg(dev,
-+ data->reg_num);
-+ break;
-+ case SIOCSMIIREG: /* Write MII register */
-+ crisv32_eth_set_mdio_reg(dev, data->reg_num,
-+ data->val_in);
-+ break;
-+ case SET_ETH_ENABLE_LEDS:
-+ use_network_leds = 1;
-+ break;
-+ case SET_ETH_DISABLE_LEDS:
-+ use_network_leds = 0;
-+ break;
-+ case SET_ETH_AUTONEG:
-+ old_autoneg = autoneg_normal;
-+ autoneg_normal = *(int*)data;
-+ if (autoneg_normal != old_autoneg)
-+ crisv32_eth_negotiate(dev);
-+ break;
-+ default:
-+ spin_unlock(&np->lock); /* Preempt protection */
-+ return -EINVAL;
-+ }
-+ spin_unlock(&np->lock);
-+ return 0;
-+}
-+
-+static int crisv32_eth_get_settings(struct net_device *dev,
-+ struct ethtool_cmd *ecmd)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ /* What about GMII and 1000xpause? not included in ethtool.h */
-+ ecmd->supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
-+ SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
-+ SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ ecmd->supported |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
-+#endif
-+ ecmd->port = PORT_TP;
-+ ecmd->transceiver = XCVR_EXTERNAL;
-+ ecmd->phy_address = np->mdio_phy_addr;
-+ ecmd->speed = np->current_speed;
-+ ecmd->duplex = np->full_duplex;
-+ ecmd->advertising = ADVERTISED_TP;
-+
-+ if (np->current_duplex == autoneg && np->current_speed_selection == 0)
-+ ecmd->advertising |= ADVERTISED_Autoneg;
-+ else {
-+ ecmd->advertising |=
-+ ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-+ ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ ecmd->advertising |= ADVERTISED_1000baseT_Half |
-+ ADVERTISED_1000baseT_Full;
-+#endif
-+ if (np->current_speed_selection == 10)
-+ ecmd->advertising &= ~(ADVERTISED_100baseT_Half |
-+ ADVERTISED_100baseT_Full |
-+ ADVERTISED_1000baseT_Half |
-+ ADVERTISED_1000baseT_Full);
-+
-+ else if (np->current_speed_selection == 100)
-+ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
-+ ADVERTISED_10baseT_Full |
-+ ADVERTISED_1000baseT_Half |
-+ ADVERTISED_1000baseT_Full);
-+
-+ else if (np->current_speed_selection == 1000)
-+ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
-+ ADVERTISED_10baseT_Full |
-+ ADVERTISED_100baseT_Half |
-+ ADVERTISED_100baseT_Full);
-+
-+ if (np->current_duplex == half)
-+ ecmd->advertising &= ~(ADVERTISED_10baseT_Full |
-+ ADVERTISED_100baseT_Full |
-+ ADVERTISED_1000baseT_Full);
-+ else if (np->current_duplex == full)
-+ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
-+ ADVERTISED_100baseT_Half |
-+ ADVERTISED_1000baseT_Half);
-+ }
-+
-+ ecmd->autoneg = AUTONEG_ENABLE;
-+ return 0;
-+}
-+
-+static int crisv32_eth_set_settings(struct net_device *dev,
-+ struct ethtool_cmd *ecmd)
-+{
-+ if (ecmd->autoneg == AUTONEG_ENABLE) {
-+ crisv32_eth_set_duplex(dev, autoneg);
-+ crisv32_eth_set_speed(dev, 0);
-+ } else {
-+ crisv32_eth_set_duplex(dev, ecmd->duplex);
-+ crisv32_eth_set_speed(dev, ecmd->speed);
-+ }
-+
-+ return 0;
-+}
-+
-+static void crisv32_eth_get_drvinfo(struct net_device *dev,
-+ struct ethtool_drvinfo *info)
-+{
-+ strncpy(info->driver, "ETRAX FS", sizeof(info->driver) - 1);
-+ strncpy(info->version, "$Revision: 1.96 $", sizeof(info->version) - 1);
-+ strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
-+ strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
-+}
-+
-+static int crisv32_eth_nway_reset(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ if (np->current_duplex == autoneg && np->current_speed_selection == 0)
-+ crisv32_eth_negotiate(dev);
-+ return 0;
-+}
-+
-+static struct ethtool_ops crisv32_ethtool_ops = {
-+ .get_settings = crisv32_eth_get_settings,
-+ .set_settings = crisv32_eth_set_settings,
-+ .get_drvinfo = crisv32_eth_get_drvinfo,
-+ .nway_reset = crisv32_eth_nway_reset,
-+ .get_link = ethtool_op_get_link,
-+};
-+
-+/* Is this function really needed? Use ethtool instead? */
-+static int
-+crisv32_eth_set_config(struct net_device *dev, struct ifmap *map)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->lock); /* Preempt protection */
-+
-+ switch(map->port) {
-+ case IF_PORT_UNKNOWN:
-+ /* Use autoneg */
-+ crisv32_eth_set_speed(dev, 0);
-+ crisv32_eth_set_duplex(dev, autoneg);
-+ break;
-+ case IF_PORT_10BASET:
-+ crisv32_eth_set_speed(dev, 10);
-+ crisv32_eth_set_duplex(dev, autoneg);
-+ break;
-+ case IF_PORT_100BASET:
-+ case IF_PORT_100BASETX:
-+ crisv32_eth_set_speed(dev, 100);
-+ crisv32_eth_set_duplex(dev, autoneg);
-+ break;
-+ case IF_PORT_100BASEFX:
-+ case IF_PORT_10BASE2:
-+ case IF_PORT_AUI:
-+ spin_unlock(&np->lock);
-+ return -EOPNOTSUPP;
-+ break;
-+ default:
-+ printk(KERN_ERR "%s: Invalid media selected",
-+ dev->name);
-+ spin_unlock(&np->lock);
-+ return -EINVAL;
-+ }
-+ spin_unlock(&np->lock);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+/*
-+ * Switch the behaviour of the tx and rx buffers using
-+ * external or internal memory. Usage of the internal
-+ * memory is required for gigabit operation.
-+ */
-+static void
-+crisv32_eth_switch_intmem_usage(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ int i;
-+ reg_dma_rw_stat stat;
-+ reg_dma_rw_cfg cfg = {0};
-+ reg_dma_rw_intr_mask intr_mask_in = { .in_eop = regk_dma_yes };
-+ reg_dma_rw_ack_intr ack_intr = { .data = 1,.in_eop = 1 };
-+ unsigned char *intmem_tmp;
-+
-+ /* Notify the kernel that the interface has stopped */
-+ netif_stop_queue(dev);
-+
-+ /* Stop the receiver DMA */
-+ cfg.en = regk_dma_no;
-+ REG_WR(dma, np->dma_in_inst, rw_cfg, cfg);
-+
-+ if (!(np->gigabit_mode)) {
-+ /* deallocate SKBs in rx_desc */
-+ for (i = 0; i < NBR_RX_DESC; i++)
-+ dev_kfree_skb(np->dma_rx_descr_list[i].skb);
-+
-+ /* Init TX*/
-+ for(i=0; i < NBR_INTMEM_TX_BUF; i++) {
-+ /* Allocate internal memory */
-+ intmem_tmp = NULL;
-+ intmem_tmp = crisv32_intmem_alloc(MAX_MEDIA_DATA_SIZE,
-+ 32);
-+ /* Check that we really got the memory */
-+ if (intmem_tmp == NULL) {
-+ printk(KERN_ERR "%s: Can't allocate intmem for"
-+ " RX buffer nbr: %d\n", dev->name, i);
-+ return;
-+ }
-+ /* Setup the list entry */
-+ np->tx_intmem_buf_list[i].free = 1;
-+ np->tx_intmem_buf_list[i].buf = intmem_tmp;
-+ np->tx_intmem_buf_list[i].next = &np->tx_intmem_buf_list[i + 1];
-+ }
-+ /* Setup the last list entry */
-+ np->tx_intmem_buf_list[NBR_INTMEM_TX_BUF - 1].next = &np->tx_intmem_buf_list[0];
-+ /* Setup initial pointer */
-+ np->intmem_tx_buf_active = np->tx_intmem_buf_list;
-+ np->intmem_tx_buf_catch = np->tx_intmem_buf_list;
-+
-+ /* Init RX */
-+ for (i=0; i < NBR_INTMEM_RX_DESC; i++) {
-+ /* Allocate internal memory */
-+ intmem_tmp = NULL;
-+ intmem_tmp = crisv32_intmem_alloc(MAX_MEDIA_DATA_SIZE, 32);
-+ /* Check that we really got the memory */
-+ if (intmem_tmp == NULL) {
-+ printk(KERN_ERR "%s: Can't allocate intmem for"
-+ " desc nbr: %d\n", dev->name, i);
-+ return;
-+ }
-+ /* Setup the descriptors*/
-+ np->dma_rx_descr_list[i].skb = NULL;
-+ np->dma_rx_descr_list[i].descr.buf =
-+ (void *) crisv32_intmem_virt_to_phys(intmem_tmp);
-+ np->dma_rx_descr_list[i].descr.after =
-+ (void *) crisv32_intmem_virt_to_phys(intmem_tmp + MAX_MEDIA_DATA_SIZE);
-+ np->dma_rx_descr_list[i].descr.eol = 0;
-+ np->dma_rx_descr_list[i].descr.in_eop = 0;
-+ np->dma_rx_descr_list[i].descr.next =
-+ (void *) virt_to_phys(&np->dma_rx_descr_list[i+1].descr);
-+ }
-+ /* Setup the last rx descriptor */
-+ np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1].descr.eol = 1;
-+ np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1].descr.next =
-+ (void*) virt_to_phys(&np->dma_rx_descr_list[0].descr);
-+ /* Initialise initial receive pointers. */
-+ np->active_rx_desc = &np->dma_rx_descr_list[0];
-+ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1];
-+ np->last_rx_desc = np->prev_rx_desc;
-+
-+ np->gigabit_mode = 1;
-+ } else {
-+ /* dealloc TX intmem */
-+ for(i=0; i < NBR_INTMEM_TX_BUF; i++)
-+ crisv32_intmem_free(np->tx_intmem_buf_list[i].buf);
-+
-+ /* dealloc RX intmem */
-+ for (i=0; i < NBR_INTMEM_RX_DESC; i++)
-+ crisv32_intmem_free(crisv32_intmem_phys_to_virt((unsigned long)np->dma_rx_descr_list[i].descr.buf));
-+
-+ /* Setup new rx_desc and alloc SKBs */
-+ for (i = 0; i < NBR_RX_DESC; i++) {
-+ struct sk_buff *skb;
-+
-+ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
-+ np->dma_rx_descr_list[i].skb = skb;
-+ np->dma_rx_descr_list[i].descr.buf =
-+ (char*)virt_to_phys(skb->data);
-+ np->dma_rx_descr_list[i].descr.after =
-+ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE);
-+
-+ np->dma_rx_descr_list[i].descr.eol = 0;
-+ np->dma_rx_descr_list[i].descr.in_eop = 0;
-+ np->dma_rx_descr_list[i].descr.next =
-+ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr);
-+ }
-+
-+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1;
-+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next =
-+ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
-+
-+ /* Initialise initial receive pointers. */
-+ np->active_rx_desc = &np->dma_rx_descr_list[0];
-+ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1];
-+ np->last_rx_desc = np->prev_rx_desc;
-+
-+ np->gigabit_mode = 0;
-+ }
-+
-+ /* Fill context descriptors. */
-+ np->ctxt_in.next = 0;
-+ np->ctxt_in.saved_data =
-+ (dma_descr_data *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
-+ np->ctxt_in.saved_data_buf = np->dma_rx_descr_list[0].descr.buf;
-+
-+ /* Enable irq and make sure that the irqs are cleared. */
-+ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_in);
-+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
-+
-+ /* Start input dma */
-+ cfg.en = regk_dma_yes;
-+ REG_WR(dma, np->dma_in_inst, rw_cfg, cfg);
-+ REG_WR(dma, np->dma_in_inst, rw_group_down,
-+ (int) virt_to_phys(&np->ctxt_in));
-+
-+ DMA_WR_CMD(np->dma_in_inst, regk_dma_load_c);
-+ DMA_WR_CMD(np->dma_in_inst, regk_dma_load_d | regk_dma_burst);
-+
-+ netif_wake_queue(dev);
-+
-+ stat = REG_RD(dma, np->dma_in_inst, rw_stat);
-+}
-+#endif
-+
-+static void
-+crisv32_eth_negotiate(struct net_device *dev)
-+{
-+ unsigned short data =
-+ crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
-+ unsigned short ctrl1000 =
-+ crisv32_eth_get_mdio_reg(dev, MII_CTRL1000);
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Make all capabilities available */
-+ data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
-+ ADVERTISE_100HALF | ADVERTISE_100FULL;
-+ ctrl1000 |= ADVERTISE_1000HALF | ADVERTISE_1000FULL;
-+
-+ /* Remove the speed capabilities that we that do not want */
-+ switch (np->current_speed_selection) {
-+ case 10 :
-+ data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL);
-+ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
-+ break;
-+ case 100 :
-+ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL);
-+ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
-+ break;
-+ case 1000 :
-+ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
-+ ADVERTISE_100HALF | ADVERTISE_100FULL);
-+ break;
-+ }
-+
-+ /* Remove the duplex capabilites that we do not want */
-+ if (np->current_duplex == full) {
-+ data &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
-+ ctrl1000 &= ~(ADVERTISE_1000HALF);
-+ }
-+ else if (np->current_duplex == half) {
-+ data &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
-+ ctrl1000 &= ~(ADVERTISE_1000FULL);
-+ }
-+
-+ crisv32_eth_set_mdio_reg(dev, MII_ADVERTISE, data);
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ crisv32_eth_set_mdio_reg(dev, MII_CTRL1000, ctrl1000);
-+#endif
-+
-+ /* Renegotiate with link partner */
-+ if (autoneg_normal) {
-+ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
-+ data |= BMCR_ANENABLE | BMCR_ANRESTART;
-+ }
-+ crisv32_eth_set_mdio_reg(dev, MII_BMCR, data);
-+}
-+static void
-+crisv32_eth_check_speed(unsigned long idev)
-+{
-+ static int led_initiated = 0;
-+ struct net_device *dev = (struct net_device *) idev;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ unsigned long data;
-+ int old_speed;
-+ unsigned long flags;
-+
-+ BUG_ON(!np);
-+ BUG_ON(!np->transceiver);
-+
-+ spin_lock(&np->transceiver_lock);
-+
-+ old_speed = np->current_speed;
-+ data = crisv32_eth_get_mdio_reg(dev, MII_BMSR);
-+
-+ if (!(data & BMSR_LSTATUS))
-+ np->current_speed = 0;
-+ else
-+ np->transceiver->check_speed(dev);
-+
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ if ((old_speed != np->current_speed)
-+ && ((old_speed == 1000) || (np->current_speed == 1000))) {
-+ /* Switch between mii and gmii */
-+ reg_eth_rw_gen_ctrl gen_ctrl = REG_RD(eth, np->eth_inst,
-+ rw_gen_ctrl);
-+ reg_eth_rw_tr_ctrl tr_ctrl = REG_RD(eth, np->eth_inst,
-+ rw_tr_ctrl);
-+ if (old_speed == 1000) {
-+ gen_ctrl.phy = regk_eth_mii;
-+ gen_ctrl.gtxclk_out = regk_eth_no;
-+ tr_ctrl.carrier_ext = regk_eth_no;
-+ }
-+ else {
-+ gen_ctrl.phy = regk_eth_gmii;
-+ gen_ctrl.gtxclk_out = regk_eth_yes;
-+ tr_ctrl.carrier_ext = regk_eth_yes;
-+ }
-+ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl);
-+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
-+
-+ crisv32_eth_switch_intmem_usage(dev);
-+ }
-+#endif
-+
-+ spin_lock_irqsave(&np->leds->led_lock, flags);
-+ if ((old_speed != np->current_speed) || !led_initiated) {
-+ led_initiated = 1;
-+ np->leds->clear_led_timer.data = (unsigned long) dev;
-+ if (np->current_speed) {
-+ netif_carrier_on(dev);
-+ crisv32_set_network_leds(LED_LINK, dev);
-+ } else {
-+ netif_carrier_off(dev);
-+ crisv32_set_network_leds(LED_NOLINK, dev);
-+ }
-+ }
-+ spin_unlock_irqrestore(&np->leds->led_lock, flags);
-+
-+ /* Reinitialize the timer. */
-+ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
-+ add_timer(&np->speed_timer);
-+
-+ spin_unlock(&np->transceiver_lock);
-+}
-+
-+static void
-+crisv32_eth_set_speed(struct net_device *dev, unsigned long speed)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ spin_lock(&np->transceiver_lock);
-+ if (np->current_speed_selection != speed) {
-+ np->current_speed_selection = speed;
-+ crisv32_eth_negotiate(dev);
-+ }
-+ spin_unlock(&np->transceiver_lock);
-+}
-+
-+static void
-+crisv32_eth_check_duplex(unsigned long idev)
-+{
-+ struct net_device *dev = (struct net_device *) idev;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ reg_eth_rw_rec_ctrl rec_ctrl;
-+ int old_duplex = np->full_duplex;
-+
-+ np->transceiver->check_duplex(dev);
-+
-+ if (old_duplex != np->full_duplex) {
-+ /* Duplex changed. */
-+ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst,
-+ rw_rec_ctrl);
-+ rec_ctrl.duplex = np->full_duplex;
-+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
-+ }
-+
-+ /* Reinitialize the timer. */
-+ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
-+ add_timer(&np->duplex_timer);
-+}
-+
-+static void
-+crisv32_eth_set_duplex(struct net_device *dev, enum duplex new_duplex)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ spin_lock(&np->transceiver_lock);
-+ if (np->current_duplex != new_duplex) {
-+ np->current_duplex = new_duplex;
-+ crisv32_eth_negotiate(dev);
-+ }
-+ spin_unlock(&np->transceiver_lock);
-+}
-+
-+static int
-+crisv32_eth_probe_transceiver(struct net_device *dev)
-+{
-+ unsigned int phyid_high;
-+ unsigned int phyid_low;
-+ unsigned int oui;
-+ struct transceiver_ops *ops = NULL;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Probe MDIO physical address. */
-+ for (np->mdio_phy_addr = 0;
-+ np->mdio_phy_addr <= 31; np->mdio_phy_addr++) {
-+ if (crisv32_eth_get_mdio_reg(dev, MII_BMSR) != 0xffff)
-+ break;
-+ }
-+
-+ if (np->mdio_phy_addr == 32)
-+ return -ENODEV;
-+
-+ /* Get manufacturer. */
-+ phyid_high = crisv32_eth_get_mdio_reg(dev, MII_PHYSID1);
-+ phyid_low = crisv32_eth_get_mdio_reg(dev, MII_PHYSID2);
-+
-+ oui = (phyid_high << 6) | (phyid_low >> 10);
-+
-+ for (ops = &transceivers[0]; ops->oui; ops++) {
-+ if (ops->oui == oui)
-+ break;
-+ }
-+
-+ np->transceiver = ops;
-+ return 0;
-+}
-+
-+static void
-+generic_check_speed(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
-+ if ((data & ADVERTISE_100FULL) ||
-+ (data & ADVERTISE_100HALF))
-+ np->current_speed = 100;
-+ else
-+ np->current_speed = 10;
-+}
-+
-+static void
-+generic_check_duplex(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
-+ if ((data & ADVERTISE_10FULL) ||
-+ (data & ADVERTISE_100FULL))
-+ np->full_duplex = 1;
-+ else
-+ np->full_duplex = 0;
-+}
-+
-+static void
-+broadcom_check_speed(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_AUX_CTRL_STATUS_REG);
-+ np->current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
-+}
-+
-+static void
-+broadcom_check_duplex(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_AUX_CTRL_STATUS_REG);
-+ np->full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
-+}
-+
-+static void
-+tdk_check_speed(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_TDK_DIAGNOSTIC_REG);
-+ np->current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
-+}
-+
-+static void
-+tdk_check_duplex(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_TDK_DIAGNOSTIC_REG);
-+ np->full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
-+
-+}
-+
-+static void
-+intel_check_speed(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_INT_STATUS_REG_2);
-+ np->current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
-+}
-+
-+static void
-+intel_check_duplex(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_INT_STATUS_REG_2);
-+ np->full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
-+}
-+
-+static void
-+national_check_speed(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_NAT_LINK_AN_REG);
-+ if (data & MDIO_NAT_1000)
-+ np->current_speed = 1000;
-+ else if (data & MDIO_NAT_100)
-+ np->current_speed = 100;
-+ else
-+ np->current_speed = 10;
-+}
-+
-+static void
-+national_check_duplex(struct net_device *dev)
-+{
-+ unsigned long data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MDIO_NAT_LINK_AN_REG);
-+ if (data & MDIO_NAT_FULL_DUPLEX_IND)
-+ np->full_duplex = 1;
-+ else
-+ np->full_duplex = 0;
-+}
-+
-+static void
-+crisv32_eth_reset_tranceiver(struct net_device *dev)
-+{
-+ int i;
-+ unsigned short cmd;
-+ unsigned short data;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
-+
-+ cmd = (MDIO_START << 14)
-+ | (MDIO_WRITE << 12)
-+ | (np->mdio_phy_addr << 7)
-+ | (MII_BMCR << 2);
-+
-+ crisv32_eth_send_mdio_cmd(dev, cmd, 1);
-+
-+ data |= 0x8000;
-+
-+ /* Magic value is number of bits. */
-+ for (i = 15; i >= 0; i--)
-+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data));
-+}
-+
-+static unsigned short
-+crisv32_eth_get_mdio_reg(struct net_device *dev, unsigned char reg_num)
-+{
-+ int i;
-+ unsigned short cmd; /* Data to be sent on MDIO port. */
-+ unsigned short data; /* Data read from MDIO. */
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ /* Start of frame, OP Code, Physical Address, Register Address. */
-+ cmd = (MDIO_START << 14)
-+ | (MDIO_READ << 12)
-+ | (np->mdio_phy_addr << 7)
-+ | (reg_num << 2);
-+
-+ crisv32_eth_send_mdio_cmd(dev, cmd, 0);
-+
-+ data = 0;
-+
-+ /* Receive data. Magic value is number of bits. */
-+ for (i = 15; i >= 0; i--)
-+ data |= (crisv32_eth_receive_mdio_bit(dev) << i);
-+
-+ return data;
-+}
-+
-+static void
-+crisv32_eth_set_mdio_reg(struct net_device *dev, unsigned char reg, int value)
-+{
-+ int bitCounter;
-+ unsigned short cmd;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ cmd = (MDIO_START << 14)
-+ | (MDIO_WRITE << 12)
-+ | (np->mdio_phy_addr << 7)
-+ | (reg << 2);
-+
-+ crisv32_eth_send_mdio_cmd(dev, cmd, 1);
-+
-+ /* Data... */
-+ for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
-+ crisv32_eth_send_mdio_bit(dev, GET_BIT(bitCounter, value));
-+ }
-+}
-+
-+static void
-+crisv32_eth_send_mdio_cmd(struct net_device *dev, unsigned short cmd,
-+ int write_cmd)
-+{
-+ int i;
-+ unsigned char data = 0x2;
-+
-+ /* Preamble. Magic value is number of bits. */
-+ for (i = 31; i >= 0; i--)
-+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, MDIO_PREAMBLE));
-+
-+ for (i = 15; i >= 2; i--)
-+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, cmd));
-+
-+ /* Turnaround. */
-+ for (i = 1; i >= 0; i--)
-+ if (write_cmd)
-+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data));
-+ else
-+ crisv32_eth_receive_mdio_bit(dev);
-+}
-+
-+static void
-+crisv32_eth_send_mdio_bit(struct net_device *dev, unsigned char bit)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ reg_eth_rw_mgm_ctrl mgm_ctrl = {
-+ .mdoe = regk_eth_yes,
-+ .mdio = bit & 1
-+ };
-+
-+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
-+
-+ udelay(1);
-+
-+ mgm_ctrl.mdc = 1;
-+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
-+
-+ udelay(1);
-+}
-+
-+static unsigned char
-+crisv32_eth_receive_mdio_bit(struct net_device *dev)
-+{
-+ reg_eth_r_stat stat;
-+ reg_eth_rw_mgm_ctrl mgm_ctrl = {0};
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+
-+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
-+ stat = REG_RD(eth, np->eth_inst, r_stat);
-+
-+ udelay(1);
-+
-+ mgm_ctrl.mdc = 1;
-+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
-+
-+ udelay(1);
-+ return stat.mdio;
-+}
-+
-+static void
-+crisv32_clear_network_leds(unsigned long priv)
-+{
-+ struct net_device *dev = (struct net_device*)priv;
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&np->leds->led_lock, flags);
-+ if (np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
-+ crisv32_set_network_leds(LED_NOACTIVITY, dev);
-+
-+ /* Set the earliest time we may set the LED */
-+ np->leds->led_next_time = jiffies + NET_FLASH_PAUSE;
-+ np->leds->led_active = 0;
-+ }
-+ spin_unlock_irqrestore(&np->leds->led_lock, flags);
-+}
-+
-+static void
-+crisv32_set_network_leds(int active, struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ int light_leds = 0;
-+
-+ if (np->leds->ledgrp == LED_GRP_NONE)
-+ return;
-+
-+ if (active == LED_NOLINK) {
-+ if (dev == crisv32_dev[0])
-+ np->leds->ifisup[0] = 0;
-+ else
-+ np->leds->ifisup[1] = 0;
-+ }
-+ else if (active == LED_LINK) {
-+ if (dev == crisv32_dev[0])
-+ np->leds->ifisup[0] = 1;
-+ else
-+ np->leds->ifisup[1] = 1;
-+#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
-+ light_leds = 1;
-+ } else {
-+ light_leds = (active == LED_NOACTIVITY);
-+#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
-+ light_leds = 0;
-+ } else {
-+ light_leds = (active == LED_ACTIVITY);
-+#else
-+#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
-+#endif
-+ }
-+
-+ if (!use_network_leds) {
-+ NET_LED_SET(np->leds->ledgrp,LED_OFF);
-+ return;
-+ }
-+
-+ if (!np->current_speed) {
-+ /* Set link down if none of the interfaces that use this led group is up */
-+ if ((np->leds->ifisup[0] + np->leds->ifisup[1]) == 0) {
-+#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
-+ /* Make LED red, link is down */
-+ NET_LED_SET(np->leds->ledgrp,LED_RED);
-+#else
-+ NET_LED_SET(np->leds->ledgrp,LED_OFF);
-+#endif
-+ }
-+ }
-+ else if (light_leds) {
-+ if (np->current_speed == 10) {
-+ NET_LED_SET(np->leds->ledgrp,LED_ORANGE);
-+ } else {
-+ NET_LED_SET(np->leds->ledgrp,LED_GREEN);
-+ }
-+ }
-+ else {
-+ NET_LED_SET(np->leds->ledgrp,LED_OFF);
-+ }
-+}
-+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void
-+crisv32_netpoll(struct net_device* netdev)
-+{
-+ crisv32rx_eth_interrupt(DMA0_INTR_VECT, netdev, NULL);
-+}
-+#endif
-+
-+#ifdef CONFIG_CPU_FREQ
-+static int
-+crisv32_ethernet_freq_notifier(struct notifier_block *nb,
-+ unsigned long val, void *data)
-+{
-+ struct cpufreq_freqs *freqs = data;
-+ if (val == CPUFREQ_POSTCHANGE) {
-+ int i;
-+ for (i = 0; i < 2; i++) {
-+ struct net_device* dev = crisv32_dev[i];
-+ unsigned short data;
-+ if (dev == NULL)
-+ continue;
-+
-+ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
-+ if (freqs->new == 200000)
-+ data &= ~BMCR_PDOWN;
-+ else
-+ data |= BMCR_PDOWN;
-+ crisv32_eth_set_mdio_reg(dev, MII_BMCR, data);
-+ }
-+ }
-+ return 0;
-+}
-+#endif
-+
-+/*
-+ * Must be called with the np->lock held.
-+ */
-+static void crisv32_ethernet_bug(struct net_device *dev)
-+{
-+ struct crisv32_ethernet_local *np = netdev_priv(dev);
-+ dma_descr_data *dma_pos;
-+ dma_descr_data *in_dma_pos;
-+ reg_dma_rw_stat stat = {0};
-+ reg_dma_rw_stat in_stat = {0};
-+ int i;
-+
-+ /* Get the current output dma position. */
-+ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
-+ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data));
-+ in_stat = REG_RD(dma, np->dma_in_inst, rw_stat);
-+ in_dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data));
-+
-+ printk("%s:\n"
-+ "stat.list_state=%x\n"
-+ "stat.mode=%x\n"
-+ "stat.stream_cmd_src=%x\n"
-+ "dma_pos=%x\n"
-+ "in_stat.list_state=%x\n"
-+ "in_stat.mode=%x\n"
-+ "in_stat.stream_cmd_src=%x\n"
-+ "in_dma_pos=%x\n"
-+ "catch=%x active=%x\n"
-+ "packets=%d queue=%d\n"
-+ "intr_vect.r_vect=%x\n"
-+ "dma.r_masked_intr=%x dma.rw_ack_intr=%x "
-+ "dma.r_intr=%x dma.rw_intr_masked=%x\n"
-+ "eth.r_stat=%x\n",
-+ __func__,
-+ stat.list_state, stat.mode, stat.stream_cmd_src,
-+ (unsigned int)dma_pos,
-+ in_stat.list_state, in_stat.mode, in_stat.stream_cmd_src,
-+ (unsigned int)in_dma_pos,
-+ (unsigned int)&np->catch_tx_desc->descr,
-+ (unsigned int)&np->active_tx_desc->descr,
-+ np->txpackets,
-+ netif_queue_stopped(dev),
-+ REG_RD_INT(intr_vect, regi_irq, r_vect),
-+ REG_RD_INT(dma, np->dma_out_inst, r_masked_intr),
-+ REG_RD_INT(dma, np->dma_out_inst, rw_ack_intr),
-+ REG_RD_INT(dma, np->dma_out_inst, r_intr),
-+ REG_RD_INT(dma, np->dma_out_inst, rw_intr_mask),
-+ REG_RD_INT(eth, np->eth_inst, r_stat));
-+
-+ printk("tx-descriptors:\n");
-+ for (i = 0; i < NBR_TX_DESC; i++) {
-+ printk("txdesc[%d]=0x%x\n", i, (unsigned int)
-+ virt_to_phys(&np->dma_tx_descr_list[i].descr));
-+ printk("txdesc[%d].skb=0x%x\n", i,
-+ (unsigned int)np->dma_tx_descr_list[i].skb);
-+ printk("txdesc[%d].buf=0x%x\n", i,
-+ (unsigned int)np->dma_tx_descr_list[i].descr.buf);
-+ printk("txdesc[%d].after=0x%x\n", i,
-+ (unsigned int)np->dma_tx_descr_list[i].descr.after);
-+ printk("txdesc[%d].intr=%x\n", i,
-+ np->dma_tx_descr_list[i].descr.intr);
-+ printk("txdesc[%d].eol=%x\n", i,
-+ np->dma_tx_descr_list[i].descr.eol);
-+ printk("txdesc[%d].out_eop=%x\n", i,
-+ np->dma_tx_descr_list[i].descr.out_eop);
-+ printk("txdesc[%d].wait=%x\n", i,
-+ np->dma_tx_descr_list[i].descr.wait);
-+ }
-+}
-+
-+
-+static int
-+crisv32_init_module(void)
-+{
-+ return crisv32_ethernet_init();
-+}
-+
-+module_init(crisv32_init_module);
-diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v32.h linux-2.6.19.2.dev/drivers/net/cris/eth_v32.h
---- linux-2.6.19.2.orig/drivers/net/cris/eth_v32.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/drivers/net/cris/eth_v32.h 2007-02-06 11:10:37.000000000 +0100
-@@ -0,0 +1,248 @@
-+/*
-+ * Definitions for ETRAX FS ethernet driver.
-+ *
-+ * Copyright (C) 2003, 2004, 2005 Axis Communications.
-+ */
-+
-+#ifndef _ETRAX_ETHERNET_H_
-+#define _ETRAX_ETHERNET_H_
-+
-+#include <asm/arch/hwregs/dma.h>
-+
-+
-+#define MAX_MEDIA_DATA_SIZE 1522 /* Max packet size. */
-+
-+#define NBR_RX_DESC 64 /* Number of RX descriptors. */
-+#define NBR_TX_DESC 16 /* Number of TX descriptors. */
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+#define NBR_INTMEM_RX_DESC 5 /* Number of RX descriptors in int. mem.
-+ * when running in gigabit mode.
-+ * Should be less then NBR_RX_DESC
-+ */
-+#define NBR_INTMEM_TX_BUF 4 /* Number of TX buffers in int. mem
-+ * when running in gigabit mode.
-+ * Should be less than NBR_TX_DESC
-+ */
-+#endif
-+
-+/* Large packets are sent directly to upper layers while small packets
-+ * are copied (to reduce memory waste). The following constant
-+ * decides the breakpoint.
-+ */
-+#define RX_COPYBREAK (256)
-+
-+#define ETHER_HEAD_LEN (14)
-+
-+/*
-+** MDIO constants.
-+*/
-+#define MDIO_START 0x1
-+#define MDIO_READ 0x2
-+#define MDIO_WRITE 0x1
-+#define MDIO_PREAMBLE 0xfffffffful
-+
-+/* Broadcom specific */
-+#define MDIO_AUX_CTRL_STATUS_REG 0x18
-+#define MDIO_BC_FULL_DUPLEX_IND 0x1
-+#define MDIO_BC_SPEED 0x2
-+
-+/* TDK specific */
-+#define MDIO_TDK_DIAGNOSTIC_REG 18
-+#define MDIO_TDK_DIAGNOSTIC_RATE 0x400
-+#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
-+
-+/*Intel LXT972A specific*/
-+#define MDIO_INT_STATUS_REG_2 0x0011
-+#define MDIO_INT_FULL_DUPLEX_IND ( 0x0001 << 9 )
-+#define MDIO_INT_SPEED ( 0x0001 << 14 )
-+
-+/*National Semiconductor DP83865 specific*/
-+#define MDIO_NAT_LINK_AN_REG 0x11
-+#define MDIO_NAT_1000 (0x0001 << 4)
-+#define MDIO_NAT_100 (0x0001 << 3)
-+#define MDIO_NAT_FULL_DUPLEX_IND (0x0001 << 1)
-+
-+/* Network flash constants */
-+#define NET_FLASH_TIME (HZ/50) /* 20 ms */
-+#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
-+#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 seconds. */
-+#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 seconds. */
-+
-+/* Duplex settings. */
-+enum duplex {
-+ half,
-+ full,
-+ autoneg
-+};
-+
-+/* Some transceivers requires special handling. */
-+struct transceiver_ops {
-+ unsigned int oui;
-+ void (*check_speed) (struct net_device * dev);
-+ void (*check_duplex) (struct net_device * dev);
-+};
-+
-+typedef struct crisv32_eth_descr {
-+ dma_descr_data descr __attribute__ ((__aligned__(32)));
-+ struct sk_buff *skb;
-+ unsigned char *linearized_packet;
-+} crisv32_eth_descr;
-+
-+
-+
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+struct tx_buffer_list {
-+ struct tx_buffer_list *next;
-+ unsigned char *buf;
-+ char free;
-+};
-+#endif
-+
-+/* LED stuff */
-+#define LED_GRP_0 0
-+#define LED_GRP_1 1
-+#define LED_GRP_NONE 2
-+
-+#define LED_ACTIVITY 0
-+#define LED_NOACTIVITY 1
-+#define LED_LINK 2
-+#define LED_NOLINK 3
-+
-+struct crisv32_eth_leds {
-+ unsigned int ledgrp;
-+ int led_active;
-+ unsigned long led_next_time;
-+ struct timer_list clear_led_timer;
-+ spinlock_t led_lock; /* Protect LED state */
-+ int ifisup[2];
-+};
-+
-+#define NET_LED_SET(x,y) \
-+ do { \
-+ if (x == 0) LED_NETWORK_GRP0_SET(y); \
-+ if (x == 1) LED_NETWORK_GRP1_SET(y); \
-+ } while (0)
-+
-+/* Information that need to be kept for each device. */
-+struct crisv32_ethernet_local {
-+ dma_descr_context ctxt_in __attribute__ ((__aligned__(32)));
-+ dma_descr_context ctxt_out __attribute__ ((__aligned__(32)));
-+
-+ crisv32_eth_descr *active_rx_desc;
-+ crisv32_eth_descr *prev_rx_desc;
-+ crisv32_eth_descr *last_rx_desc;
-+
-+ crisv32_eth_descr *active_tx_desc;
-+ crisv32_eth_descr *prev_tx_desc;
-+ crisv32_eth_descr *catch_tx_desc;
-+
-+ crisv32_eth_descr dma_rx_descr_list[NBR_RX_DESC];
-+ crisv32_eth_descr dma_tx_descr_list[NBR_TX_DESC];
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+ struct tx_buffer_list tx_intmem_buf_list[NBR_INTMEM_TX_BUF];
-+ struct tx_buffer_list *intmem_tx_buf_active;
-+ struct tx_buffer_list *intmem_tx_buf_catch;
-+ char gigabit_mode;
-+#endif
-+ char new_rx_package;
-+
-+ /* DMA and ethernet registers for the device. */
-+ int eth_inst;
-+ int dma_in_inst;
-+ int dma_out_inst;
-+
-+ /* Network speed indication. */
-+ struct timer_list speed_timer;
-+ int current_speed; /* Speed read from tranceiver */
-+ int current_speed_selection; /* Speed selected by user */
-+ int sender_started;
-+ int txpackets;
-+
-+ struct crisv32_eth_leds *leds;
-+
-+ /* Duplex. */
-+ struct timer_list duplex_timer;
-+ int full_duplex;
-+ enum duplex current_duplex;
-+
-+ struct net_device_stats stats;
-+
-+ /* Transciever address. */
-+ unsigned int mdio_phy_addr;
-+
-+ struct transceiver_ops *transceiver;
-+
-+ /*
-+ * TX control lock. This protects the transmit buffer ring state along
-+ * with the "tx full" state of the driver. This means all netif_queue
-+ * flow control actions are protected by this lock as well.
-+ */
-+ spinlock_t lock;
-+ spinlock_t transceiver_lock; /* Protect transceiver state. */
-+};
-+
-+/* Function prototypes. */
-+static int crisv32_ethernet_init(void);
-+static int crisv32_ethernet_device_init(struct net_device* dev);
-+static int crisv32_eth_open(struct net_device *dev);
-+static int crisv32_eth_close(struct net_device *dev);
-+static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr);
-+static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id);
-+static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id);
-+static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id);
-+static void crisv32_eth_receive_packet(struct net_device *dev);
-+static int crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev);
-+static void crisv32_eth_hw_send_packet(unsigned char *buf, int length,
-+ void *priv);
-+static void crisv32_eth_tx_timeout(struct net_device *dev);
-+static void crisv32_eth_set_multicast_list(struct net_device *dev);
-+static int crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr,
-+ int cmd);
-+static int crisv32_eth_set_config(struct net_device* dev, struct ifmap* map);
-+#ifdef CONFIG_CRIS_MACH_ARTPEC3
-+static void crisv32_eth_switch_intmem_usage(struct net_device *dev);
-+#endif
-+static void crisv32_eth_negotiate(struct net_device *dev);
-+static void crisv32_eth_check_speed(unsigned long idev);
-+static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed);
-+static void crisv32_eth_check_duplex(unsigned long idev);
-+static void crisv32_eth_set_duplex(struct net_device *dev, enum duplex);
-+static int crisv32_eth_probe_transceiver(struct net_device *dev);
-+
-+static struct ethtool_ops crisv32_ethtool_ops;
-+
-+static void generic_check_speed(struct net_device *dev);
-+static void generic_check_duplex(struct net_device *dev);
-+static void broadcom_check_speed(struct net_device *dev);
-+static void broadcom_check_duplex(struct net_device *dev);
-+static void tdk_check_speed(struct net_device *dev);
-+static void tdk_check_duplex(struct net_device *dev);
-+static void intel_check_speed(struct net_device* dev);
-+static void intel_check_duplex(struct net_device *dev);
-+static void national_check_speed(struct net_device* dev);
-+static void national_check_duplex(struct net_device *dev);
-+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void crisv32_netpoll(struct net_device* dev);
-+#endif
-+
-+static void crisv32_clear_network_leds(unsigned long dummy);
-+static void crisv32_set_network_leds(int active, struct net_device* dev);
-+
-+static void crisv32_eth_reset_tranceiver(struct net_device *dev);
-+static unsigned short crisv32_eth_get_mdio_reg(struct net_device *dev,
-+ unsigned char reg_num);
-+static void crisv32_eth_set_mdio_reg(struct net_device *dev,
-+ unsigned char reg_num,
-+ int val);
-+static void crisv32_eth_send_mdio_cmd(struct net_device *dev,
-+ unsigned short cmd, int write_cmd);
-+static void crisv32_eth_send_mdio_bit(struct net_device *dev,
-+ unsigned char bit);
-+static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev);
-+
-+static struct net_device_stats *crisv32_get_stats(struct net_device *dev);
-+static void crisv32_start_dma_out(struct crisv32_ethernet_local* np);
-+
-+
-+#endif /* _ETRAX_ETHERNET_H_ */
+++ /dev/null
---- linux-2.6.19.2.old/kernel/Kconfig.sched 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2.dev/kernel/Kconfig.sched 2007-02-05 12:22:39.000000000 +0100
-@@ -0,0 +1,18 @@
-+#
-+# Scheduler tuning
-+#
-+
-+config OVERRIDE_SCHED_STARVATION_LIMIT
-+ bool "Override scheduler STARVATION_LIMIT"
-+ help
-+ This threshold sets the maximum time a task may wait in the
-+ expired runqueue when deciding to re-insert interactive tasks
-+ into the active runqueue. The time-limit is in ms but scales with
-+ the number of running tasks in the system.
-+
-+config SCHED_STARVATION_LIMIT
-+ int "Scheduler Starvation Limit"
-+ depends on OVERRIDE_SCHED_STARVATION_LIMIT
-+ default 10
-+ help
-+ Starvation limit in milliseconds per running task.
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile 2007-05-19 14:31:06.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile 2007-05-19 14:32:24.000000000 +0200
-@@ -2,7 +2,7 @@
- # arch/cris/arch-v10/boot/Makefile
- #
-
--OBJCOPY = objcopy-cris
-+OBJCOPY = /usr/local/cris/objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
-
- subdir- := compressed rescue
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-19 14:31:06.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-19 14:33:45.000000000 +0200
-@@ -4,10 +4,10 @@
-
- CC = gcc-cris -melf $(LINUXINCLUDE)
- CFLAGS = -O2
--LD = ld-cris
-+LD = /usr/local/cris/ld-cris
- LDFLAGS = -T $(obj)/decompress.ld
- OBJECTS = $(obj)/head.o $(obj)/misc.o
--OBJCOPY = objcopy-cris
-+OBJCOPY = /usr/local/cris/objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
-
- quiet_cmd_image = BUILD $@
-@@ -22,10 +22,10 @@
- $(call if_changed,objcopy)
-
- $(obj)/head.o: $(obj)/head.S .config
-- @$(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
-+ /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__ASSEMBLY__ -traditional -c $< -o $@
-
- $(obj)/misc.o: $(obj)/misc.c .config
-- @$(CC) -D__KERNEL__ -c $< -o $@
-+ /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__KERNEL__ -c $< -o $@
-
- $(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
- $(call if_changed,image)
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/rescue/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/rescue/Makefile
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/rescue/Makefile 2007-05-19 14:31:06.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/rescue/Makefile 2007-05-19 14:34:25.000000000 +0200
-@@ -2,12 +2,12 @@
- # Makefile for rescue (bootstrap) code
- #
-
--CC = gcc-cris -mlinux $(LINUXINCLUDE)
-+CC = /usr/local/cris/gcc-cris -mlinux $(LINUXINCLUDE)
- CFLAGS = -O2
- AFLAGS = -traditional
--LD = gcc-cris -mlinux -nostdlib
-+LD = /usr/local/cris/gcc-cris -mlinux -nostdlib
- LDFLAGS = -T $(obj)/rescue.ld
--OBJCOPY = objcopy-cris
-+OBJCOPY = /usr/local/cris/objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
- obj-y = head.o
- OBJECT = $(obj)/$(obj-y)
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/memset.c linux-2.6.19.2/arch/cris/arch-v10/lib/memset.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/memset.c 2007-06-03 13:59:39.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/lib/memset.c 2007-06-03 14:11:43.000000000 +0200
-@@ -110,45 +110,28 @@
- If you want to check that the allocation was right; then
- check the equalities in the first comment. It should say
- "r13=r13, r12=r12, r11=r11" */
-- __asm__ volatile ("
-- ;; Check that the following is true (same register names on
-- ;; both sides of equal sign, as in r8=r8):
-- ;; %0=r13, %1=r12, %4=r11
-- ;;
-- ;; Save the registers we'll clobber in the movem process
-- ;; on the stack. Don't mention them to gcc, it will only be
-- ;; upset.
-- subq 11*4,$sp
-- movem $r10,[$sp]
--
-- move.d $r11,$r0
-- move.d $r11,$r1
-- move.d $r11,$r2
-- move.d $r11,$r3
-- move.d $r11,$r4
-- move.d $r11,$r5
-- move.d $r11,$r6
-- move.d $r11,$r7
-- move.d $r11,$r8
-- move.d $r11,$r9
-- move.d $r11,$r10
--
-- ;; Now we've got this:
-- ;; r13 - dst
-- ;; r12 - n
-+ __asm__ volatile (
-+ "subq 11*4,$sp\n\t"
-+ "movem $r10,[$sp]\n\t"
-+ "move.d $r11,$r0\n\t"
-+ "move.d $r11,$r1\n\t"
-+ "move.d $r11,$r2\n\t"
-+ "move.d $r11,$r3\n\t"
-+ "move.d $r11,$r4\n\t"
-+ "move.d $r11,$r5\n\t"
-+ "move.d $r11,$r6\n\t"
-+ "move.d $r11,$r7\n\t"
-+ "move.d $r11,$r8\n\t"
-+ "move.d $r11,$r9\n\t"
-+ "move.d $r11,$r10\n\t"
-+ "subq 12*4,$r12\n\t"
-+"0:\n\t"
-+ "subq 12*4,$r12\n\t"
-+ "bge 0b\n\t"
-+ "movem $r11,[$r13+]\n\t"
-+ "addq 12*4,$r12\n\t"
-+ "movem [$sp+],$r10"
-
-- ;; Update n for the first loop
-- subq 12*4,$r12
--0:
-- subq 12*4,$r12
-- bge 0b
-- movem $r11,[$r13+]
--
-- addq 12*4,$r12 ;; compensate for last loop underflowing n
--
-- ;; Restore registers from stack
-- movem [$sp+],$r10"
--
- /* Outputs */ : "=r" (dst), "=r" (n)
- /* Inputs */ : "0" (dst), "1" (n), "r" (lc));
-
-@@ -161,10 +144,14 @@
-
- while ( n >= 16 )
- {
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- n -= 16;
- }
-
-@@ -182,67 +169,95 @@
- *(short*)dst = (short) lc;
- break;
- case 3:
-- *((short*)dst)++ = (short) lc;
-+ *((short*)dst) = (short) lc;
-+ dst+=2;
- *(char*)dst = (char) lc;
- break;
- case 4:
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
- break;
- case 5:
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(char*)dst = (char) lc;
- break;
- case 6:
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(short*)dst = (short) lc;
- break;
- case 7:
-- *((long*)dst)++ = lc;
-- *((short*)dst)++ = (short) lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((short*)dst) = (short) lc;
-+ dst+=2;
- *(char*)dst = (char) lc;
- break;
- case 8:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- break;
- case 9:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(char*)dst = (char) lc;
- break;
- case 10:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(short*)dst = (short) lc;
- break;
- case 11:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((short*)dst)++ = (short) lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((short*)dst) = (short) lc;
-+ dst+=2;
- *(char*)dst = (char) lc;
- break;
- case 12:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- break;
- case 13:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(char*)dst = (char) lc;
- break;
- case 14:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
- *(short*)dst = (short) lc;
- break;
- case 15:
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((long*)dst)++ = lc;
-- *((short*)dst)++ = (short) lc;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((long*)dst) = lc;
-+ dst+=4;
-+ *((short*)dst) = (short) lc;
-+ dst+=2;
- *(char*)dst = (char) lc;
- break;
- }
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/string.c linux-2.6.19.2/arch/cris/arch-v10/lib/string.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/string.c 2007-06-03 13:59:39.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/lib/string.c 2007-06-03 14:21:02.000000000 +0200
-@@ -95,37 +95,19 @@
- If you want to check that the allocation was right; then
- check the equalities in the first comment. It should say
- "r13=r13, r11=r11, r12=r12" */
-- __asm__ volatile ("
-- ;; Check that the following is true (same register names on
-- ;; both sides of equal sign, as in r8=r8):
-- ;; %0=r13, %1=r11, %2=r12
-- ;;
-- ;; Save the registers we'll use in the movem process
-- ;; on the stack.
-- subq 11*4,$sp
-- movem $r10,[$sp]
--
-- ;; Now we've got this:
-- ;; r11 - src
-- ;; r13 - dst
-- ;; r12 - n
--
-- ;; Update n for the first loop
-- subq 44,$r12
--0:
-- movem [$r11+],$r10
-- subq 44,$r12
-- bge 0b
-- movem $r10,[$r13+]
--
-- addq 44,$r12 ;; compensate for last loop underflowing n
--
-- ;; Restore registers from stack
-- movem [$sp+],$r10"
--
-+ __asm__ volatile (
-+ "subq 11*4,$sp\n\t"
-+ "movem $r10,[$sp]\n\t"
-+ "subq 44,$r12\n\t"
-+"0:\n\t"
-+ "movem [$r11+],$r10\n\t"
-+ "subq 44,$r12\n\t"
-+ "bge 0b\n\t"
-+ "movem $r10,[$r13+]\n\t"
-+ "addq 44,$r12\n\t"
-+ "movem [$sp+],$r10\n\t"
- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
- /* Inputs */ : "0" (dst), "1" (src), "2" (n));
--
- }
-
- /* Either we directly starts copying, using dword copying
-@@ -135,10 +117,14 @@
-
- while ( n >= 16 )
- {
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- n -= 16;
- }
-
-@@ -156,67 +142,95 @@
- *(short*)dst = *(short*)src;
- break;
- case 3:
-- *((short*)dst)++ = *((short*)src)++;
-+ *((short*)dst) = *((short*)src);
-+ src+=2;dst+=2;
- *(char*)dst = *(char*)src;
- break;
- case 4:
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- break;
- case 5:
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(char*)dst = *(char*)src;
- break;
- case 6:
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(short*)dst = *(short*)src;
- break;
- case 7:
-- *((long*)dst)++ = *((long*)src)++;
-- *((short*)dst)++ = *((short*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((short*)dst) = *((short*)src);
-+ src+=2;dst+=2;
- *(char*)dst = *(char*)src;
- break;
- case 8:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- break;
- case 9:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(char*)dst = *(char*)src;
- break;
- case 10:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(short*)dst = *(short*)src;
- break;
- case 11:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((short*)dst)++ = *((short*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((short*)dst) = *((short*)src);
-+ src+=2;dst+=2;
- *(char*)dst = *(char*)src;
- break;
- case 12:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- break;
- case 13:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(char*)dst = *(char*)src;
- break;
- case 14:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
- *(short*)dst = *(short*)src;
- break;
- case 15:
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((long*)dst)++ = *((long*)src)++;
-- *((short*)dst)++ = *((short*)src)++;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((long*)dst) = *((long*)src);
-+ src+=4;dst+=4;
-+ *((short*)dst) = *((short*)src);
-+ src+=2;dst+=2;
- *(char*)dst = *(char*)src;
- break;
- }
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/usercopy.c linux-2.6.19.2/arch/cris/arch-v10/lib/usercopy.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/usercopy.c 2007-06-03 13:59:39.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/lib/usercopy.c 2007-06-03 14:25:55.000000000 +0200
-@@ -88,63 +88,38 @@
- If you want to check that the allocation was right; then
- check the equalities in the first comment. It should say
- "r13=r13, r11=r11, r12=r12". */
-- __asm__ volatile ("\
-- .ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
-- .err \n\
-- .endif \n\
--
-- ;; Save the registers we'll use in the movem process
-- ;; on the stack.
-- subq 11*4,$sp
-- movem $r10,[$sp]
--
-- ;; Now we've got this:
-- ;; r11 - src
-- ;; r13 - dst
-- ;; r12 - n
--
-- ;; Update n for the first loop
-- subq 44,$r12
--
--; Since the noted PC of a faulting instruction in a delay-slot of a taken
--; branch, is that of the branch target, we actually point at the from-movem
--; for this case. There is no ambiguity here; if there was a fault in that
--; instruction (meaning a kernel oops), the faulted PC would be the address
--; after *that* movem.
--
--0:
-- movem [$r11+],$r10
-- subq 44,$r12
-- bge 0b
-- movem $r10,[$r13+]
--1:
-- addq 44,$r12 ;; compensate for last loop underflowing n
--
-- ;; Restore registers from stack
-- movem [$sp+],$r10
--2:
-- .section .fixup,\"ax\"
--
--; To provide a correct count in r10 of bytes that failed to be copied,
--; we jump back into the loop if the loop-branch was taken. There is no
--; performance penalty for sany use; the program will segfault soon enough.
--
--3:
-- move.d [$sp],$r10
-- addq 44,$r10
-- move.d $r10,[$sp]
-- jump 0b
--4:
-- movem [$sp+],$r10
-- addq 44,$r10
-- addq 44,$r12
-- jump 2b
--
-- .previous
-- .section __ex_table,\"a\"
-- .dword 0b,3b
-- .dword 1b,4b
-- .previous"
-+ __asm__ volatile (
-+ ".ifnc %0%1%2%3,$r13$r11$r12$r10 \n\t"
-+ ".err \n\t"
-+ ".endif \n\t"
-+ "subq 11*4,$sp\n\t"
-+ "movem $r10,[$sp]\n\t"
-+ "subq 44,$r12\n\t"
-+ "0:\n\t"
-+ "movem [$r11+],$r10\n\t"
-+ "subq 44,$r12\n\t"
-+ "bge 0b\n\t"
-+ "movem $r10,[$r13+]\n\t"
-+ "1:\n\t"
-+ "addq 44,$r12 \n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "2:\n\t"
-+ ".section .fixup,\"ax\"\n\t"
-+ "3:\n\t"
-+ "move.d [$sp],$r10\n\t"
-+ "addq 44,$r10\n\t"
-+ "move.d $r10,[$sp]\n\t"
-+ "jump 0b\n\t"
-+ "4:\n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "addq 44,$r10\n\t"
-+ "addq 44,$r12\n\t"
-+ "jump 2b\n\t"
-+ ".previous\n\t"
-+ ".section __ex_table,\"a\"\n\t"
-+ ".dword 0b,3b\n\t"
-+ ".dword 1b,4b\n\t"
-+ ".previous\n\t"
-
- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
- /* Inputs */ : "0" (dst), "1" (src), "2" (n), "3" (retn));
-@@ -253,60 +228,32 @@
- If you want to check that the allocation was right; then
- check the equalities in the first comment. It should say
- "r13=r13, r11=r11, r12=r12" */
-- __asm__ volatile ("
-- .ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
-- .err \n\
-- .endif \n\
--
-- ;; Save the registers we'll use in the movem process
-- ;; on the stack.
-- subq 11*4,$sp
-- movem $r10,[$sp]
--
-- ;; Now we've got this:
-- ;; r11 - src
-- ;; r13 - dst
-- ;; r12 - n
--
-- ;; Update n for the first loop
-- subq 44,$r12
--0:
-- movem [$r11+],$r10
--1:
-- subq 44,$r12
-- bge 0b
-- movem $r10,[$r13+]
--
-- addq 44,$r12 ;; compensate for last loop underflowing n
--
-- ;; Restore registers from stack
-- movem [$sp+],$r10
--4:
-- .section .fixup,\"ax\"
--
--;; Do not jump back into the loop if we fail. For some uses, we get a
--;; page fault somewhere on the line. Without checking for page limits,
--;; we don't know where, but we need to copy accurately and keep an
--;; accurate count; not just clear the whole line. To do that, we fall
--;; down in the code below, proceeding with smaller amounts. It should
--;; be kept in mind that we have to cater to code like what at one time
--;; was in fs/super.c:
--;; i = size - copy_from_user((void *)page, data, size);
--;; which would cause repeated faults while clearing the remainder of
--;; the SIZE bytes at PAGE after the first fault.
--;; A caveat here is that we must not fall through from a failing page
--;; to a valid page.
--
--3:
-- movem [$sp+],$r10
-- addq 44,$r12 ;; Get back count before faulting point.
-- subq 44,$r11 ;; Get back pointer to faulting movem-line.
-- jump 4b ;; Fall through, pretending the fault didn't happen.
--
-- .previous
-- .section __ex_table,\"a\"
-- .dword 1b,3b
-- .previous"
-+ __asm__ volatile (
-+ ".ifnc %0%1%2%3,$r13$r11$r12$r10 \n\t"
-+ ".err \n\t"
-+ ".endif \n\t"
-+ "subq 11*4,$sp\n\t"
-+ "movem $r10,[$sp]\n\t"
-+ "subq 44,$r12\n\t"
-+ "0:\n\t"
-+ "movem [$r11+],$r10\n\t"
-+ "1:\n\t"
-+ "subq 44,$r12\n\t"
-+ "bge 0b\n\t"
-+ "movem $r10,[$r13+]\n\t"
-+ "addq 44,$r12 \n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "4:\n\t"
-+ ".section .fixup,\"ax\"\n\t"
-+ "3:\n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "addq 44,$r12\n\t"
-+ "subq 44,$r11\n\t"
-+ "jump 4b \n\t"
-+ ".previous\n\t"
-+ ".section __ex_table,\"a\"\n\t"
-+ ".dword 1b,3b\n\t"
-+ ".previous\n\t"
-
- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
- /* Inputs */ : "0" (dst), "1" (src), "2" (n), "3" (retn));
-@@ -425,66 +372,50 @@
- If you want to check that the allocation was right; then
- check the equalities in the first comment. It should say
- something like "r13=r13, r11=r11, r12=r12". */
-- __asm__ volatile ("
-- .ifnc %0%1%2,$r13$r12$r10 \n\
-- .err \n\
-- .endif \n\
--
-- ;; Save the registers we'll clobber in the movem process
-- ;; on the stack. Don't mention them to gcc, it will only be
-- ;; upset.
-- subq 11*4,$sp
-- movem $r10,[$sp]
--
-- clear.d $r0
-- clear.d $r1
-- clear.d $r2
-- clear.d $r3
-- clear.d $r4
-- clear.d $r5
-- clear.d $r6
-- clear.d $r7
-- clear.d $r8
-- clear.d $r9
-- clear.d $r10
-- clear.d $r11
--
-- ;; Now we've got this:
-- ;; r13 - dst
-- ;; r12 - n
--
-- ;; Update n for the first loop
-- subq 12*4,$r12
--0:
-- subq 12*4,$r12
-- bge 0b
-- movem $r11,[$r13+]
--1:
-- addq 12*4,$r12 ;; compensate for last loop underflowing n
--
-- ;; Restore registers from stack
-- movem [$sp+],$r10
--2:
-- .section .fixup,\"ax\"
--3:
-- move.d [$sp],$r10
-- addq 12*4,$r10
-- move.d $r10,[$sp]
-- clear.d $r10
-- jump 0b
--
--4:
-- movem [$sp+],$r10
-- addq 12*4,$r10
-- addq 12*4,$r12
-- jump 2b
--
-- .previous
-- .section __ex_table,\"a\"
-- .dword 0b,3b
-- .dword 1b,4b
-- .previous"
--
-+ __asm__ volatile (
-+ ".ifnc %0%1%2,$r13$r12$r10\n\t"
-+ ".err \n\t"
-+ ".endif\n\t"
-+ "subq 11*4,$sp\n\t"
-+ "movem $r10,[$sp]\n\t"
-+ "clear.d $r0\n\t"
-+ "clear.d $r1\n\t"
-+ "clear.d $r2\n\t"
-+ "clear.d $r3\n\t"
-+ "clear.d $r4\n\t"
-+ "clear.d $r5\n\t"
-+ "clear.d $r6\n\t"
-+ "clear.d $r7\n\t"
-+ "clear.d $r8\n\t"
-+ "clear.d $r9\n\t"
-+ "clear.d $r10\n\t"
-+ "clear.d $r11\n\t"
-+ "subq 12*4,$r12\n\t"
-+ "0:\n\t"
-+ "subq 12*4,$r12\n\t"
-+ "bge 0b\n\t"
-+ "movem $r11,[$r13+]\n\t"
-+ "1: \n\t"
-+ "addq 12*4,$r12 \n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "2:\n\t"
-+ ".section .fixup,\"ax\"\n\t"
-+ "3:\n\t"
-+ "move.d [$sp],$r10\n\t"
-+ "addq 12*4,$r10\n\t"
-+ "move.d $r10,[$sp]\n\t"
-+ "clear.d $r10\n\t"
-+ "jump 0b\n\t"
-+ "4:\n\t"
-+ "movem [$sp+],$r10\n\t"
-+ "addq 12*4,$r10\n\t"
-+ "addq 12*4,$r12\n\t"
-+ "jump 2b\n\t"
-+ ".previous\n\t"
-+ ".section __ex_table,\"a\"\n\t"
-+ ".dword 0b,3b\n\t"
-+ ".dword 1b,4b\n\t"
-+ ".previous\n\t"
- /* Outputs */ : "=r" (dst), "=r" (n), "=r" (retn)
- /* Inputs */ : "0" (dst), "1" (n), "2" (retn)
- /* Clobber */ : "r11");
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/mm/page_alloc.c linux-2.6.19.2/mm/page_alloc.c
---- linux-2.6.19.2.orig/mm/page_alloc.c 2007-05-20 03:26:41.000000000 +0200
-+++ linux-2.6.19.2/mm/page_alloc.c 2007-05-20 03:28:22.000000000 +0200
-@@ -1200,7 +1200,7 @@
- unsigned int nr_free_pages(void)
- {
- unsigned int sum = 0;
-- struct zone *zone;
-+ volatile struct zone *zone;
-
- for_each_zone(zone)
- sum += zone->free_pages;
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-21 23:12:27.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-21 23:13:09.000000000 +0200
-@@ -256,7 +256,7 @@
-
- /* If no partition-table was found, we use this default-set. */
- #define MAX_PARTITIONS 7
--#define NUM_DEFAULT_PARTITIONS 3
-+#define NUM_DEFAULT_PARTITIONS 3
-
- /*
- * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
-@@ -265,19 +265,19 @@
- */
- static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
- {
-- .name = "boot firmware",
-- .size = CONFIG_ETRAX_PTABLE_SECTOR,
-+ .name = "kernel",
-+ .size = 0x200000,
- .offset = 0
- },
- {
-- .name = "kernel",
-- .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
-- .offset = CONFIG_ETRAX_PTABLE_SECTOR
-+ .name = "filesystem",
-+ .size = 0x200000,
-+ .offset = 0x200000
- },
- {
-- .name = "filesystem",
-- .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
-- .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
-+ .name = "filesystem2",
-+ .size = 0x400000,
-+ .offset = 0x400000
- }
- };
-
-009-flashmap.patch
+++ /dev/null
-Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/.axisflashmap.c.swp and linux-2.6.19.2/arch/cris/arch-v10/drivers/.axisflashmap.c.swp differ
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-28 01:40:09.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-28 01:41:29.000000000 +0200
-@@ -256,7 +256,7 @@
-
- /* If no partition-table was found, we use this default-set. */
- #define MAX_PARTITIONS 7
--#define NUM_DEFAULT_PARTITIONS 3
-+#define NUM_DEFAULT_PARTITIONS 2
-
- /*
- * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
-@@ -270,15 +270,10 @@
- .offset = 0
- },
- {
-- .name = "filesystem",
-- .size = 0x200000,
-+ .name = "rootfs",
-+ .size = 0x600000,
- .offset = 0x200000
- },
-- {
-- .name = "filesystem2",
-- .size = 0x400000,
-- .offset = 0x400000
-- }
- };
-
- /* Initialize the ones normally used. */
-Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.o and linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.o differ
-Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/built-in.o and linux-2.6.19.2/arch/cris/arch-v10/drivers/built-in.o differ
+++ /dev/null
---- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-05-26 18:12:33.000000000 +0200
-+++ linux-2.6.19.2/drivers/serial/crisv10.c 2007-05-26 19:24:56.000000000 +0200
-@@ -442,6 +442,7 @@
- #include <asm/uaccess.h>
- #include <linux/kernel.h>
- #include <linux/mutex.h>
-+#include <linux/miscdevice.h>
-
- #include <asm/io.h>
- #include <asm/irq.h>
-@@ -4822,6 +4823,12 @@
- .tiocmset = rs_tiocmset
- };
-
-+#define CONFIG_ETRAX_SYSFS_NODES
-+#ifdef CONFIG_ETRAX_SYSFS_NODES
-+static struct class *mem_class;
-+#endif
-+
-+static struct class *rs_class;
- static int __init
- rs_init(void)
- {
-@@ -4948,6 +4955,30 @@
- #endif
- #endif /* CONFIG_SVINTO_SIM */
-
-+#ifdef CONFIG_ETRAX_SYSFS_NODES
-+
-+ rs_class = class_create(THIS_MODULE, "rs_tty");
-+#ifdef CONFIG_ETRAX_SERIAL_PORT0
-+ class_device_create(rs_class, NULL,
-+ MKDEV(TTY_MAJOR, 64),
-+ NULL, "ttyS0");
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT1
-+ class_device_create(rs_class, NULL,
-+ MKDEV(TTY_MAJOR, 65),
-+ NULL, "ttyS1");
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT2
-+ class_device_create(rs_class, NULL,
-+ MKDEV(TTY_MAJOR, 66),
-+ NULL, "ttyS2");
-+#endif
-+#ifdef CONFIG_ETRAX_SERIAL_PORT3
-+ class_device_create(rs_class, NULL,
-+ MKDEV(TTY_MAJOR, 67),
-+ NULL, "ttyS3");
-+#endif
-+#endif
- return 0;
- }
-
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/Kconfig 2007-05-26 18:12:22.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/Kconfig 2007-05-26 19:26:06.000000000 +0200
-@@ -900,3 +900,9 @@
- 1 = 2kohm, 2 = 4kohm, 3 = 4kohm
- 4 = 1 diode, 8 = 2 diodes
- Allowed values are (increasing current): 0, 11, 10, 9, 7, 6, 5
-+
-+config ETRAX_SYSFS_NODES
-+ bool "Create device nodes using sysfs for builtin devices"
-+ default n
-+ help
-+ Creates device nodes inside the rootfs dynamically for all the builtin devices
---- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-05-28 20:37:56.000000000 +0200
-+++ linux-2.6.19.2/drivers/serial/crisv10.c 2007-05-28 20:39:07.000000000 +0200
-@@ -4823,12 +4823,11 @@
- .tiocmset = rs_tiocmset
- };
-
--#define CONFIG_ETRAX_SYSFS_NODES
- #ifdef CONFIG_ETRAX_SYSFS_NODES
--static struct class *mem_class;
-+static struct class *rs_class;
- #endif
-
--static struct class *rs_class;
-+
- static int __init
- rs_init(void)
- {
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile 2007-05-28 16:28:34.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile 2007-05-28 17:24:26.000000000 +0200
-@@ -5,7 +5,7 @@
- OBJCOPY = /usr/local/cris/objcopy-cris
- OBJCOPYFLAGS = -O binary --remove-section=.bss
-
--subdir- := compressed rescue
-+subdir- := compressed
- targets := Image
-
- $(obj)/Image: vmlinux FORCE
-@@ -14,8 +14,12 @@
-
- $(obj)/compressed/vmlinux: $(obj)/Image FORCE
- $(Q)$(MAKE) $(build)=$(obj)/compressed $@
-- $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
-
- $(obj)/zImage: $(obj)/compressed/vmlinux
- @cp $< $@
-+ @cp $(obj)/compressed/vmlinux $(obj)/zImage_custom
-+ @cp $(obj)/compressed/vmlinux_MCM $(obj)/zImage_MCM
-+ @cp $(obj)/compressed/vmlinux_416 $(obj)/zImage_416
-+ @cp $(obj)/compressed/vmlinux_816 $(obj)/zImage_816
-+ @cp $(obj)/compressed/vmlinux_832 $(obj)/zImage_832
- @echo ' Kernel: $@ is ready'
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-28 16:28:34.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-28 17:03:02.000000000 +0200
-@@ -17,18 +17,34 @@
-
- $(obj)/decompress.o: $(OBJECTS) FORCE
- $(call if_changed,ld)
-+ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_MCM.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_MCM.o
-+ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_416.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_416.o
-+ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_816.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_816.o
-+ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_832.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_832.o
-
- $(obj)/decompress.bin: $(obj)/decompress.o FORCE
- $(call if_changed,objcopy)
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_MCM.o $(obj)/decompress_MCM.bin
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_416.o $(obj)/decompress_416.bin
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_816.o $(obj)/decompress_816.bin
-+ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_832.o $(obj)/decompress_832.bin
-+
-+$(obj)/head.o: $(obj)/head.S .config FORCE
-+ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c $< -o $@
-+ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_MCM.S -o arch/cris/boot/compressed/head_MCM.o
-+ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_416.S -o arch/cris/boot/compressed/head_416.o
-+ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_816.S -o arch/cris/boot/compressed/head_816.o
-+ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_832.S -o arch/cris/boot/compressed/head_832.o
-
--$(obj)/head.o: $(obj)/head.S .config
-- /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__ASSEMBLY__ -traditional -c $< -o $@
--
--$(obj)/misc.o: $(obj)/misc.c .config
-+$(obj)/misc.o: $(obj)/misc.c .config FORCE
- /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__KERNEL__ -c $< -o $@
-
- $(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
- $(call if_changed,image)
-+ cat $(obj)/decompress_MCM.bin $(obj)/piggy.gz > $(obj)/vmlinux_MCM
-+ cat $(obj)/decompress_416.bin $(obj)/piggy.gz > $(obj)/vmlinux_416
-+ cat $(obj)/decompress_816.bin $(obj)/piggy.gz > $(obj)/vmlinux_816
-+ cat $(obj)/decompress_832.bin $(obj)/piggy.gz > $(obj)/vmlinux_832
-
- $(obj)/piggy.gz: $(obj)/../Image FORCE
- $(call if_changed,gzip)
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init.S 2007-05-28 16:42:15.000000000 +0200
-@@ -0,0 +1,207 @@
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
-+ *
-+ * DRAM/SDRAM initialization - alter with care
-+ * This file is intended to be included from other assembler files
-+ *
-+ * Note: This file may not modify r9 because r9 is used to carry
-+ * information from the decompresser to the kernel
-+ *
-+ * Copyright (C) 2000, 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ *
-+ * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.4 2003/09/22 09:21:59 starvik
-+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
-+ * so we need to mask off 12 bits.
-+ *
-+ * Revision 1.3 2003/03/31 09:38:37 starvik
-+ * Corrected calculation of end of sdram init commands
-+ *
-+ * Revision 1.2 2002/11/19 13:33:29 starvik
-+ * Changes from Linux 2.4
-+ *
-+ * Revision 1.13 2002/10/30 07:42:28 starvik
-+ * Always read SDRAM command sequence from flash
-+ *
-+ * Revision 1.12 2002/08/09 11:37:37 orjanf
-+ * Added double initialization work-around for Samsung SDRAMs.
-+ *
-+ * Revision 1.11 2002/06/04 11:43:21 starvik
-+ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
-+ *
-+ * Revision 1.10 2001/10/04 12:00:21 martinnn
-+ * Added missing underscores.
-+ *
-+ * Revision 1.9 2001/10/01 14:47:35 bjornw
-+ * Added register prefixes and removed underscores
-+ *
-+ * Revision 1.8 2001/05/15 07:12:45 hp
-+ * Copy warning from head.S about r8 and r9
-+ *
-+ * Revision 1.7 2001/04/18 12:05:39 bjornw
-+ * Fixed comments, and explicitely include config.h to be sure its there
-+ *
-+ * Revision 1.6 2001/04/10 06:20:16 starvik
-+ * Delay should be 200us, not 200ns
-+ *
-+ * Revision 1.5 2001/04/09 06:01:13 starvik
-+ * Added support for 100 MHz SDRAMs
-+ *
-+ * Revision 1.4 2001/03/26 14:24:01 bjornw
-+ * Namechange of some config options
-+ *
-+ * Revision 1.3 2001/03/23 08:29:41 starvik
-+ * Corrected calculation of mrs_data
-+ *
-+ * Revision 1.2 2001/02/08 15:20:00 starvik
-+ * Corrected SDRAM initialization
-+ * Should now be included as inline
-+ *
-+ * Revision 1.1 2001/01/29 13:08:02 starvik
-+ * Initial version
-+ * This file should be included from all assembler files that needs to
-+ * initialize DRAM/SDRAM.
-+ *
-+ */
-+
-+/* Just to be certain the config file is included, we include it here
-+ * explicitely instead of depending on it being included in the file that
-+ * uses this code.
-+ */
-+
-+
-+ ;; WARNING! The registers r8 and r9 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
-+ ;; They should not be used in the code below.
-+
-+#ifndef CONFIG_SVINTO_SIM
-+ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
-+ move.d $r0, [R_WAITSTATES]
-+
-+ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
-+ move.d $r0, [R_BUS_CONFIG]
-+
-+#ifndef CONFIG_ETRAX_SDRAM
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
-+ move.d $r0, [R_DRAM_CONFIG]
-+
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
-+ move.d $r0, [R_DRAM_TIMING]
-+#else
-+ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
-+ moveq 2, $r6
-+_sdram_init:
-+
-+ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
-+
-+ ; Bank configuration
-+ move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r0
-+ move.d $r0, [R_SDRAM_CONFIG]
-+
-+ ; Calculate value of mrs_data
-+ ; CAS latency = 2 && bus_width = 32 => 0x40
-+ ; CAS latency = 3 && bus_width = 32 => 0x60
-+ ; CAS latency = 2 && bus_width = 16 => 0x20
-+ ; CAS latency = 3 && bus_width = 16 => 0x30
-+
-+ ; Check if value is already supplied in kernel config
-+ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r2
-+ and.d 0x00ff0000, $r2
-+ bne _set_timing
-+ lsrq 16, $r2
-+
-+ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
-+ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
-+ move.d $r1, $r3
-+ and.d 0x03, $r1 ; Get CAS latency
-+ and.d 0x1000, $r3 ; 50 or 100 MHz?
-+ beq _speed_50
-+ nop
-+_speed_100:
-+ cmp.d 0x00, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+ ba _bw_check
-+ nop
-+_speed_50:
-+ cmp.d 0x01, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+_bw_check:
-+ move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r1
-+ and.d 0x800000, $r1 ; DRAM width is bit 23
-+ bne _set_timing
-+ nop
-+ lsrq 1, $r2 ; 16 bits. Shift down value.
-+
-+ ; Set timing parameters. Starts master clock
-+_set_timing:
-+ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
-+ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
-+ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
-+ move.d $r1, $r5
-+ or.d 0x0000c000, $r1 ; ref = disable
-+ lslq 16, $r2 ; mrs data starts at bit 16
-+ or.d $r2, $r1
-+ move.d $r1, [R_SDRAM_TIMING]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-+
-+ ; Issue initialization command sequence
-+ move.d _sdram_commands_start, $r2
-+ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-+ move.d _sdram_commands_end, $r3
-+ and.d 0x000fffff, $r3
-+1: clear.d $r4
-+ move.b [$r2+], $r4
-+ lslq 9, $r4 ; Command starts at bit 9
-+ or.d $r1, $r4
-+ move.d $r4, [R_SDRAM_TIMING]
-+ nop ; Wait five nop cycles between each command
-+ nop
-+ nop
-+ nop
-+ nop
-+ cmp.d $r2, $r3
-+ bne 1b
-+ nop
-+ move.d $r5, [R_SDRAM_TIMING]
-+ subq 1, $r6
-+ bne _sdram_init
-+ nop
-+ ba _sdram_commands_end
-+ nop
-+
-+_sdram_commands_start:
-+ .byte 3 ; Precharge
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 1 ; mrs
-+ .byte 0 ; nop
-+_sdram_commands_end:
-+#endif
-+#endif
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_416.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_416.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_416.S 2007-05-28 20:02:25.000000000 +0200
-@@ -0,0 +1,207 @@
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
-+ *
-+ * DRAM/SDRAM initialization - alter with care
-+ * This file is intended to be included from other assembler files
-+ *
-+ * Note: This file may not modify r9 because r9 is used to carry
-+ * information from the decompresser to the kernel
-+ *
-+ * Copyright (C) 2000, 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ *
-+ * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.4 2003/09/22 09:21:59 starvik
-+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
-+ * so we need to mask off 12 bits.
-+ *
-+ * Revision 1.3 2003/03/31 09:38:37 starvik
-+ * Corrected calculation of end of sdram init commands
-+ *
-+ * Revision 1.2 2002/11/19 13:33:29 starvik
-+ * Changes from Linux 2.4
-+ *
-+ * Revision 1.13 2002/10/30 07:42:28 starvik
-+ * Always read SDRAM command sequence from flash
-+ *
-+ * Revision 1.12 2002/08/09 11:37:37 orjanf
-+ * Added double initialization work-around for Samsung SDRAMs.
-+ *
-+ * Revision 1.11 2002/06/04 11:43:21 starvik
-+ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
-+ *
-+ * Revision 1.10 2001/10/04 12:00:21 martinnn
-+ * Added missing underscores.
-+ *
-+ * Revision 1.9 2001/10/01 14:47:35 bjornw
-+ * Added register prefixes and removed underscores
-+ *
-+ * Revision 1.8 2001/05/15 07:12:45 hp
-+ * Copy warning from head.S about r8 and r9
-+ *
-+ * Revision 1.7 2001/04/18 12:05:39 bjornw
-+ * Fixed comments, and explicitely include config.h to be sure its there
-+ *
-+ * Revision 1.6 2001/04/10 06:20:16 starvik
-+ * Delay should be 200us, not 200ns
-+ *
-+ * Revision 1.5 2001/04/09 06:01:13 starvik
-+ * Added support for 100 MHz SDRAMs
-+ *
-+ * Revision 1.4 2001/03/26 14:24:01 bjornw
-+ * Namechange of some config options
-+ *
-+ * Revision 1.3 2001/03/23 08:29:41 starvik
-+ * Corrected calculation of mrs_data
-+ *
-+ * Revision 1.2 2001/02/08 15:20:00 starvik
-+ * Corrected SDRAM initialization
-+ * Should now be included as inline
-+ *
-+ * Revision 1.1 2001/01/29 13:08:02 starvik
-+ * Initial version
-+ * This file should be included from all assembler files that needs to
-+ * initialize DRAM/SDRAM.
-+ *
-+ */
-+
-+/* Just to be certain the config file is included, we include it here
-+ * explicitely instead of depending on it being included in the file that
-+ * uses this code.
-+ */
-+
-+
-+ ;; WARNING! The registers r8 and r9 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
-+ ;; They should not be used in the code below.
-+
-+#ifndef CONFIG_SVINTO_SIM
-+ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
-+ move.d $r0, [R_WAITSTATES]
-+
-+ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
-+ move.d $r0, [R_BUS_CONFIG]
-+
-+#ifndef CONFIG_ETRAX_SDRAM
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
-+ move.d $r0, [R_DRAM_CONFIG]
-+
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
-+ move.d $r0, [R_DRAM_TIMING]
-+#else
-+ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
-+ moveq 2, $r6
-+_sdram_init:
-+
-+ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
-+
-+ ; Bank configuration
-+ move.d 0x09603636, $r0
-+ move.d $r0, [R_SDRAM_CONFIG]
-+
-+ ; Calculate value of mrs_data
-+ ; CAS latency = 2 && bus_width = 32 => 0x40
-+ ; CAS latency = 3 && bus_width = 32 => 0x60
-+ ; CAS latency = 2 && bus_width = 16 => 0x20
-+ ; CAS latency = 3 && bus_width = 16 => 0x30
-+
-+ ; Check if value is already supplied in kernel config
-+ move.d 0x80008002, $r2
-+ and.d 0x00ff0000, $r2
-+ bne _set_timing
-+ lsrq 16, $r2
-+
-+ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
-+ move.d 0x80008002, $r1
-+ move.d $r1, $r3
-+ and.d 0x03, $r1 ; Get CAS latency
-+ and.d 0x1000, $r3 ; 50 or 100 MHz?
-+ beq _speed_50
-+ nop
-+_speed_100:
-+ cmp.d 0x00, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+ ba _bw_check
-+ nop
-+_speed_50:
-+ cmp.d 0x01, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+_bw_check:
-+ move.d 0x09603636, $r1
-+ and.d 0x800000, $r1 ; DRAM width is bit 23
-+ bne _set_timing
-+ nop
-+ lsrq 1, $r2 ; 16 bits. Shift down value.
-+
-+ ; Set timing parameters. Starts master clock
-+_set_timing:
-+ move.d 0x80008002, $r1
-+ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
-+ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
-+ move.d $r1, $r5
-+ or.d 0x0000c000, $r1 ; ref = disable
-+ lslq 16, $r2 ; mrs data starts at bit 16
-+ or.d $r2, $r1
-+ move.d $r1, [R_SDRAM_TIMING]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-+
-+ ; Issue initialization command sequence
-+ move.d _sdram_commands_start, $r2
-+ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-+ move.d _sdram_commands_end, $r3
-+ and.d 0x000fffff, $r3
-+1: clear.d $r4
-+ move.b [$r2+], $r4
-+ lslq 9, $r4 ; Command starts at bit 9
-+ or.d $r1, $r4
-+ move.d $r4, [R_SDRAM_TIMING]
-+ nop ; Wait five nop cycles between each command
-+ nop
-+ nop
-+ nop
-+ nop
-+ cmp.d $r2, $r3
-+ bne 1b
-+ nop
-+ move.d $r5, [R_SDRAM_TIMING]
-+ subq 1, $r6
-+ bne _sdram_init
-+ nop
-+ ba _sdram_commands_end
-+ nop
-+
-+_sdram_commands_start:
-+ .byte 3 ; Precharge
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 1 ; mrs
-+ .byte 0 ; nop
-+_sdram_commands_end:
-+#endif
-+#endif
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_816.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_816.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_816.S 2007-05-28 20:04:05.000000000 +0200
-@@ -0,0 +1,207 @@
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
-+ *
-+ * DRAM/SDRAM initialization - alter with care
-+ * This file is intended to be included from other assembler files
-+ *
-+ * Note: This file may not modify r9 because r9 is used to carry
-+ * information from the decompresser to the kernel
-+ *
-+ * Copyright (C) 2000, 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ *
-+ * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.4 2003/09/22 09:21:59 starvik
-+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
-+ * so we need to mask off 12 bits.
-+ *
-+ * Revision 1.3 2003/03/31 09:38:37 starvik
-+ * Corrected calculation of end of sdram init commands
-+ *
-+ * Revision 1.2 2002/11/19 13:33:29 starvik
-+ * Changes from Linux 2.4
-+ *
-+ * Revision 1.13 2002/10/30 07:42:28 starvik
-+ * Always read SDRAM command sequence from flash
-+ *
-+ * Revision 1.12 2002/08/09 11:37:37 orjanf
-+ * Added double initialization work-around for Samsung SDRAMs.
-+ *
-+ * Revision 1.11 2002/06/04 11:43:21 starvik
-+ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
-+ *
-+ * Revision 1.10 2001/10/04 12:00:21 martinnn
-+ * Added missing underscores.
-+ *
-+ * Revision 1.9 2001/10/01 14:47:35 bjornw
-+ * Added register prefixes and removed underscores
-+ *
-+ * Revision 1.8 2001/05/15 07:12:45 hp
-+ * Copy warning from head.S about r8 and r9
-+ *
-+ * Revision 1.7 2001/04/18 12:05:39 bjornw
-+ * Fixed comments, and explicitely include config.h to be sure its there
-+ *
-+ * Revision 1.6 2001/04/10 06:20:16 starvik
-+ * Delay should be 200us, not 200ns
-+ *
-+ * Revision 1.5 2001/04/09 06:01:13 starvik
-+ * Added support for 100 MHz SDRAMs
-+ *
-+ * Revision 1.4 2001/03/26 14:24:01 bjornw
-+ * Namechange of some config options
-+ *
-+ * Revision 1.3 2001/03/23 08:29:41 starvik
-+ * Corrected calculation of mrs_data
-+ *
-+ * Revision 1.2 2001/02/08 15:20:00 starvik
-+ * Corrected SDRAM initialization
-+ * Should now be included as inline
-+ *
-+ * Revision 1.1 2001/01/29 13:08:02 starvik
-+ * Initial version
-+ * This file should be included from all assembler files that needs to
-+ * initialize DRAM/SDRAM.
-+ *
-+ */
-+
-+/* Just to be certain the config file is included, we include it here
-+ * explicitely instead of depending on it being included in the file that
-+ * uses this code.
-+ */
-+
-+
-+ ;; WARNING! The registers r8 and r9 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
-+ ;; They should not be used in the code below.
-+
-+#ifndef CONFIG_SVINTO_SIM
-+ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
-+ move.d $r0, [R_WAITSTATES]
-+
-+ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
-+ move.d $r0, [R_BUS_CONFIG]
-+
-+#ifndef CONFIG_ETRAX_SDRAM
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
-+ move.d $r0, [R_DRAM_CONFIG]
-+
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
-+ move.d $r0, [R_DRAM_TIMING]
-+#else
-+ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
-+ moveq 2, $r6
-+_sdram_init:
-+
-+ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
-+
-+ ; Bank configuration
-+ move.d 0x09603636, $r0
-+ move.d $r0, [R_SDRAM_CONFIG]
-+
-+ ; Calculate value of mrs_data
-+ ; CAS latency = 2 && bus_width = 32 => 0x40
-+ ; CAS latency = 3 && bus_width = 32 => 0x60
-+ ; CAS latency = 2 && bus_width = 16 => 0x20
-+ ; CAS latency = 3 && bus_width = 16 => 0x30
-+
-+ ; Check if value is already supplied in kernel config
-+ move.d 0x80008002, $r2
-+ and.d 0x00ff0000, $r2
-+ bne _set_timing
-+ lsrq 16, $r2
-+
-+ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
-+ move.d 0x80008002, $r1
-+ move.d $r1, $r3
-+ and.d 0x03, $r1 ; Get CAS latency
-+ and.d 0x1000, $r3 ; 50 or 100 MHz?
-+ beq _speed_50
-+ nop
-+_speed_100:
-+ cmp.d 0x00, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+ ba _bw_check
-+ nop
-+_speed_50:
-+ cmp.d 0x01, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+_bw_check:
-+ move.d 0x09603636, $r1
-+ and.d 0x800000, $r1 ; DRAM width is bit 23
-+ bne _set_timing
-+ nop
-+ lsrq 1, $r2 ; 16 bits. Shift down value.
-+
-+ ; Set timing parameters. Starts master clock
-+_set_timing:
-+ move.d 0x80008002, $r1
-+ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
-+ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
-+ move.d $r1, $r5
-+ or.d 0x0000c000, $r1 ; ref = disable
-+ lslq 16, $r2 ; mrs data starts at bit 16
-+ or.d $r2, $r1
-+ move.d $r1, [R_SDRAM_TIMING]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-+
-+ ; Issue initialization command sequence
-+ move.d _sdram_commands_start, $r2
-+ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-+ move.d _sdram_commands_end, $r3
-+ and.d 0x000fffff, $r3
-+1: clear.d $r4
-+ move.b [$r2+], $r4
-+ lslq 9, $r4 ; Command starts at bit 9
-+ or.d $r1, $r4
-+ move.d $r4, [R_SDRAM_TIMING]
-+ nop ; Wait five nop cycles between each command
-+ nop
-+ nop
-+ nop
-+ nop
-+ cmp.d $r2, $r3
-+ bne 1b
-+ nop
-+ move.d $r5, [R_SDRAM_TIMING]
-+ subq 1, $r6
-+ bne _sdram_init
-+ nop
-+ ba _sdram_commands_end
-+ nop
-+
-+_sdram_commands_start:
-+ .byte 3 ; Precharge
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 1 ; mrs
-+ .byte 0 ; nop
-+_sdram_commands_end:
-+#endif
-+#endif
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_832.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_832.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_832.S 2007-05-28 20:04:57.000000000 +0200
-@@ -0,0 +1,207 @@
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
-+ *
-+ * DRAM/SDRAM initialization - alter with care
-+ * This file is intended to be included from other assembler files
-+ *
-+ * Note: This file may not modify r9 because r9 is used to carry
-+ * information from the decompresser to the kernel
-+ *
-+ * Copyright (C) 2000, 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ *
-+ * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.4 2003/09/22 09:21:59 starvik
-+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
-+ * so we need to mask off 12 bits.
-+ *
-+ * Revision 1.3 2003/03/31 09:38:37 starvik
-+ * Corrected calculation of end of sdram init commands
-+ *
-+ * Revision 1.2 2002/11/19 13:33:29 starvik
-+ * Changes from Linux 2.4
-+ *
-+ * Revision 1.13 2002/10/30 07:42:28 starvik
-+ * Always read SDRAM command sequence from flash
-+ *
-+ * Revision 1.12 2002/08/09 11:37:37 orjanf
-+ * Added double initialization work-around for Samsung SDRAMs.
-+ *
-+ * Revision 1.11 2002/06/04 11:43:21 starvik
-+ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
-+ *
-+ * Revision 1.10 2001/10/04 12:00:21 martinnn
-+ * Added missing underscores.
-+ *
-+ * Revision 1.9 2001/10/01 14:47:35 bjornw
-+ * Added register prefixes and removed underscores
-+ *
-+ * Revision 1.8 2001/05/15 07:12:45 hp
-+ * Copy warning from head.S about r8 and r9
-+ *
-+ * Revision 1.7 2001/04/18 12:05:39 bjornw
-+ * Fixed comments, and explicitely include config.h to be sure its there
-+ *
-+ * Revision 1.6 2001/04/10 06:20:16 starvik
-+ * Delay should be 200us, not 200ns
-+ *
-+ * Revision 1.5 2001/04/09 06:01:13 starvik
-+ * Added support for 100 MHz SDRAMs
-+ *
-+ * Revision 1.4 2001/03/26 14:24:01 bjornw
-+ * Namechange of some config options
-+ *
-+ * Revision 1.3 2001/03/23 08:29:41 starvik
-+ * Corrected calculation of mrs_data
-+ *
-+ * Revision 1.2 2001/02/08 15:20:00 starvik
-+ * Corrected SDRAM initialization
-+ * Should now be included as inline
-+ *
-+ * Revision 1.1 2001/01/29 13:08:02 starvik
-+ * Initial version
-+ * This file should be included from all assembler files that needs to
-+ * initialize DRAM/SDRAM.
-+ *
-+ */
-+
-+/* Just to be certain the config file is included, we include it here
-+ * explicitely instead of depending on it being included in the file that
-+ * uses this code.
-+ */
-+
-+
-+ ;; WARNING! The registers r8 and r9 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
-+ ;; They should not be used in the code below.
-+
-+#ifndef CONFIG_SVINTO_SIM
-+ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
-+ move.d $r0, [R_WAITSTATES]
-+
-+ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
-+ move.d $r0, [R_BUS_CONFIG]
-+
-+#ifndef CONFIG_ETRAX_SDRAM
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
-+ move.d $r0, [R_DRAM_CONFIG]
-+
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
-+ move.d $r0, [R_DRAM_TIMING]
-+#else
-+ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
-+ moveq 2, $r6
-+_sdram_init:
-+
-+ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
-+
-+ ; Bank configuration
-+ move.d 0x09603737, $r0
-+ move.d $r0, [R_SDRAM_CONFIG]
-+
-+ ; Calculate value of mrs_data
-+ ; CAS latency = 2 && bus_width = 32 => 0x40
-+ ; CAS latency = 3 && bus_width = 32 => 0x60
-+ ; CAS latency = 2 && bus_width = 16 => 0x20
-+ ; CAS latency = 3 && bus_width = 16 => 0x30
-+
-+ ; Check if value is already supplied in kernel config
-+ move.d 0x80008002, $r2
-+ and.d 0x00ff0000, $r2
-+ bne _set_timing
-+ lsrq 16, $r2
-+
-+ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
-+ move.d 0x80008002, $r1
-+ move.d $r1, $r3
-+ and.d 0x03, $r1 ; Get CAS latency
-+ and.d 0x1000, $r3 ; 50 or 100 MHz?
-+ beq _speed_50
-+ nop
-+_speed_100:
-+ cmp.d 0x00, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+ ba _bw_check
-+ nop
-+_speed_50:
-+ cmp.d 0x01, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+_bw_check:
-+ move.d 0x09603737, $r1
-+ and.d 0x800000, $r1 ; DRAM width is bit 23
-+ bne _set_timing
-+ nop
-+ lsrq 1, $r2 ; 16 bits. Shift down value.
-+
-+ ; Set timing parameters. Starts master clock
-+_set_timing:
-+ move.d 0x80008002, $r1
-+ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
-+ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
-+ move.d $r1, $r5
-+ or.d 0x0000c000, $r1 ; ref = disable
-+ lslq 16, $r2 ; mrs data starts at bit 16
-+ or.d $r2, $r1
-+ move.d $r1, [R_SDRAM_TIMING]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-+
-+ ; Issue initialization command sequence
-+ move.d _sdram_commands_start, $r2
-+ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-+ move.d _sdram_commands_end, $r3
-+ and.d 0x000fffff, $r3
-+1: clear.d $r4
-+ move.b [$r2+], $r4
-+ lslq 9, $r4 ; Command starts at bit 9
-+ or.d $r1, $r4
-+ move.d $r4, [R_SDRAM_TIMING]
-+ nop ; Wait five nop cycles between each command
-+ nop
-+ nop
-+ nop
-+ nop
-+ cmp.d $r2, $r3
-+ bne 1b
-+ nop
-+ move.d $r5, [R_SDRAM_TIMING]
-+ subq 1, $r6
-+ bne _sdram_init
-+ nop
-+ ba _sdram_commands_end
-+ nop
-+
-+_sdram_commands_start:
-+ .byte 3 ; Precharge
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 1 ; mrs
-+ .byte 0 ; nop
-+_sdram_commands_end:
-+#endif
-+#endif
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S 2007-05-28 20:03:13.000000000 +0200
-@@ -0,0 +1,207 @@
-+/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
-+ *
-+ * DRAM/SDRAM initialization - alter with care
-+ * This file is intended to be included from other assembler files
-+ *
-+ * Note: This file may not modify r9 because r9 is used to carry
-+ * information from the decompresser to the kernel
-+ *
-+ * Copyright (C) 2000, 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ *
-+ * $Log: dram_init.S,v $
-+ * Revision 1.5 2006/10/13 12:43:11 starvik
-+ * Merge of 2.6.18
-+ *
-+ * Revision 1.4 2003/09/22 09:21:59 starvik
-+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
-+ * so we need to mask off 12 bits.
-+ *
-+ * Revision 1.3 2003/03/31 09:38:37 starvik
-+ * Corrected calculation of end of sdram init commands
-+ *
-+ * Revision 1.2 2002/11/19 13:33:29 starvik
-+ * Changes from Linux 2.4
-+ *
-+ * Revision 1.13 2002/10/30 07:42:28 starvik
-+ * Always read SDRAM command sequence from flash
-+ *
-+ * Revision 1.12 2002/08/09 11:37:37 orjanf
-+ * Added double initialization work-around for Samsung SDRAMs.
-+ *
-+ * Revision 1.11 2002/06/04 11:43:21 starvik
-+ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
-+ *
-+ * Revision 1.10 2001/10/04 12:00:21 martinnn
-+ * Added missing underscores.
-+ *
-+ * Revision 1.9 2001/10/01 14:47:35 bjornw
-+ * Added register prefixes and removed underscores
-+ *
-+ * Revision 1.8 2001/05/15 07:12:45 hp
-+ * Copy warning from head.S about r8 and r9
-+ *
-+ * Revision 1.7 2001/04/18 12:05:39 bjornw
-+ * Fixed comments, and explicitely include config.h to be sure its there
-+ *
-+ * Revision 1.6 2001/04/10 06:20:16 starvik
-+ * Delay should be 200us, not 200ns
-+ *
-+ * Revision 1.5 2001/04/09 06:01:13 starvik
-+ * Added support for 100 MHz SDRAMs
-+ *
-+ * Revision 1.4 2001/03/26 14:24:01 bjornw
-+ * Namechange of some config options
-+ *
-+ * Revision 1.3 2001/03/23 08:29:41 starvik
-+ * Corrected calculation of mrs_data
-+ *
-+ * Revision 1.2 2001/02/08 15:20:00 starvik
-+ * Corrected SDRAM initialization
-+ * Should now be included as inline
-+ *
-+ * Revision 1.1 2001/01/29 13:08:02 starvik
-+ * Initial version
-+ * This file should be included from all assembler files that needs to
-+ * initialize DRAM/SDRAM.
-+ *
-+ */
-+
-+/* Just to be certain the config file is included, we include it here
-+ * explicitely instead of depending on it being included in the file that
-+ * uses this code.
-+ */
-+
-+
-+ ;; WARNING! The registers r8 and r9 are used as parameters carrying
-+ ;; information from the decompressor (if the kernel was compressed).
-+ ;; They should not be used in the code below.
-+
-+#ifndef CONFIG_SVINTO_SIM
-+ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
-+ move.d $r0, [R_WAITSTATES]
-+
-+ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
-+ move.d $r0, [R_BUS_CONFIG]
-+
-+#ifndef CONFIG_ETRAX_SDRAM
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
-+ move.d $r0, [R_DRAM_CONFIG]
-+
-+ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
-+ move.d $r0, [R_DRAM_TIMING]
-+#else
-+ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
-+ moveq 2, $r6
-+_sdram_init:
-+
-+ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
-+
-+ ; Bank configuration
-+ move.d 0x09603636, $r0
-+ move.d $r0, [R_SDRAM_CONFIG]
-+
-+ ; Calculate value of mrs_data
-+ ; CAS latency = 2 && bus_width = 32 => 0x40
-+ ; CAS latency = 3 && bus_width = 32 => 0x60
-+ ; CAS latency = 2 && bus_width = 16 => 0x20
-+ ; CAS latency = 3 && bus_width = 16 => 0x30
-+
-+ ; Check if value is already supplied in kernel config
-+ move.d 0x80608002, $r2
-+ and.d 0x00ff0000, $r2
-+ bne _set_timing
-+ lsrq 16, $r2
-+
-+ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
-+ move.d 0x80608002, $r1
-+ move.d $r1, $r3
-+ and.d 0x03, $r1 ; Get CAS latency
-+ and.d 0x1000, $r3 ; 50 or 100 MHz?
-+ beq _speed_50
-+ nop
-+_speed_100:
-+ cmp.d 0x00, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+ ba _bw_check
-+ nop
-+_speed_50:
-+ cmp.d 0x01, $r1 ; CAS latency = 2?
-+ beq _bw_check
-+ nop
-+ or.d 0x20, $r2 ; CAS latency = 3
-+_bw_check:
-+ move.d 0x09603636, $r1
-+ and.d 0x800000, $r1 ; DRAM width is bit 23
-+ bne _set_timing
-+ nop
-+ lsrq 1, $r2 ; 16 bits. Shift down value.
-+
-+ ; Set timing parameters. Starts master clock
-+_set_timing:
-+ move.d 0x80608002, $r1
-+ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
-+ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
-+ move.d $r1, $r5
-+ or.d 0x0000c000, $r1 ; ref = disable
-+ lslq 16, $r2 ; mrs data starts at bit 16
-+ or.d $r2, $r1
-+ move.d $r1, [R_SDRAM_TIMING]
-+
-+ ; Wait 200us
-+ move.d 10000, $r2
-+1: bne 1b
-+ subq 1, $r2
-+
-+ ; Issue initialization command sequence
-+ move.d _sdram_commands_start, $r2
-+ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
-+ move.d _sdram_commands_end, $r3
-+ and.d 0x000fffff, $r3
-+1: clear.d $r4
-+ move.b [$r2+], $r4
-+ lslq 9, $r4 ; Command starts at bit 9
-+ or.d $r1, $r4
-+ move.d $r4, [R_SDRAM_TIMING]
-+ nop ; Wait five nop cycles between each command
-+ nop
-+ nop
-+ nop
-+ nop
-+ cmp.d $r2, $r3
-+ bne 1b
-+ nop
-+ move.d $r5, [R_SDRAM_TIMING]
-+ subq 1, $r6
-+ bne _sdram_init
-+ nop
-+ ba _sdram_commands_end
-+ nop
-+
-+_sdram_commands_start:
-+ .byte 3 ; Precharge
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 2 ; refresh
-+ .byte 0 ; nop
-+ .byte 1 ; mrs
-+ .byte 0 ; nop
-+_sdram_commands_end:
-+#endif
-+#endif
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_416.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_416.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_416.S 2007-05-28 17:16:28.000000000 +0200
-@@ -0,0 +1,126 @@
-+/*
-+ * arch/cris/boot/compressed/head.S
-+ *
-+ * Copyright (C) 1999, 2001 Axis Communications AB
-+ *
-+ * Code that sets up the DRAM registers, calls the
-+ * decompressor to unpack the piggybacked kernel, and jumps.
-+ *
-+ */
-+
-+#define ASSEMBLER_MACROS_ONLY
-+#include <asm/arch/sv_addr_ag.h>
-+
-+#define RAM_INIT_MAGIC 0x56902387
-+#define COMMAND_LINE_MAGIC 0x87109563
-+
-+ ;; Exported symbols
-+
-+ .globl _input_data
-+
-+
-+ .text
-+
-+ nop
-+ di
-+
-+;; We need to initialze DRAM registers before we start using the DRAM
-+
-+ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
-+ beq dram_init_finished
-+ nop
-+
-+#include "dram_init_416.S"
-+
-+dram_init_finished:
-+
-+ ;; Initiate the PA and PB ports
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
-+ move.b r0, [R_PORT_PA_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
-+ move.b r0, [R_PORT_PA_DIR]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
-+ move.b r0, [R_PORT_PB_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
-+ move.b r0, [R_PORT_PB_DIR]
-+
-+ ;; Setup the stack to a suitably high address.
-+ ;; We assume 8 MB is the minimum DRAM in an eLinux
-+ ;; product and put the sp at the top for now.
-+
-+ move.d 0x40800000, sp
-+
-+ ;; Figure out where the compressed piggyback image is
-+ ;; in the flash (since we wont try to copy it to DRAM
-+ ;; before unpacking). It is at _edata, but in flash.
-+ ;; Use (_edata - basse) as offset to the current PC.
-+
-+basse: move.d pc, r5
-+ and.d 0x7fffffff, r5 ; strip any non-cache bit
-+ subq 2, r5 ; compensate for the move.d pc instr
-+ move.d r5, r0 ; save for later - flash address of 'basse'
-+ add.d _edata, r5
-+ sub.d basse, r5 ; r5 = flash address of '_edata'
-+
-+ ;; Copy text+data to DRAM
-+
-+ move.d basse, r1 ; destination
-+ move.d _edata, r2 ; end destination
-+1: move.w [r0+], r3
-+ move.w r3, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ move.d r5, [_input_data] ; for the decompressor
-+
-+
-+ ;; Clear the decompressors BSS (between _edata and _end)
-+
-+ moveq 0, r0
-+ move.d _edata, r1
-+ move.d _end, r2
-+1: move.w r0, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ ;; Save command line magic and address.
-+ move.d _cmd_line_magic, $r12
-+ move.d $r10, [$r12]
-+ move.d _cmd_line_addr, $r12
-+ move.d $r11, [$r12]
-+
-+ ;; Do the decompression and save compressed size in _inptr
-+
-+ jsr _decompress_kernel
-+
-+ ;; Put start address of root partition in r9 so the kernel can use it
-+ ;; when mounting from flash
-+
-+ move.d [_input_data], r9 ; flash address of compressed kernel
-+ add.d [_inptr], r9 ; size of compressed kernel
-+
-+ ;; Restore command line magic and address.
-+ move.d _cmd_line_magic, $r10
-+ move.d [$r10], $r10
-+ move.d _cmd_line_addr, $r11
-+ move.d [$r11], $r11
-+
-+ ;; Enter the decompressed kernel
-+ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
-+ jump 0x40004000 ; kernel is linked to this address
-+
-+ .data
-+
-+_input_data:
-+ .dword 0 ; used by the decompressor
-+_cmd_line_magic:
-+ .dword 0
-+_cmd_line_addr:
-+ .dword 0
-+#include "hw_settings_416.S"
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_816.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_816.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_816.S 2007-05-28 17:16:58.000000000 +0200
-@@ -0,0 +1,126 @@
-+/*
-+ * arch/cris/boot/compressed/head.S
-+ *
-+ * Copyright (C) 1999, 2001 Axis Communications AB
-+ *
-+ * Code that sets up the DRAM registers, calls the
-+ * decompressor to unpack the piggybacked kernel, and jumps.
-+ *
-+ */
-+
-+#define ASSEMBLER_MACROS_ONLY
-+#include <asm/arch/sv_addr_ag.h>
-+
-+#define RAM_INIT_MAGIC 0x56902387
-+#define COMMAND_LINE_MAGIC 0x87109563
-+
-+ ;; Exported symbols
-+
-+ .globl _input_data
-+
-+
-+ .text
-+
-+ nop
-+ di
-+
-+;; We need to initialze DRAM registers before we start using the DRAM
-+
-+ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
-+ beq dram_init_finished
-+ nop
-+
-+#include "dram_init_816.S"
-+
-+dram_init_finished:
-+
-+ ;; Initiate the PA and PB ports
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
-+ move.b r0, [R_PORT_PA_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
-+ move.b r0, [R_PORT_PA_DIR]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
-+ move.b r0, [R_PORT_PB_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
-+ move.b r0, [R_PORT_PB_DIR]
-+
-+ ;; Setup the stack to a suitably high address.
-+ ;; We assume 8 MB is the minimum DRAM in an eLinux
-+ ;; product and put the sp at the top for now.
-+
-+ move.d 0x40800000, sp
-+
-+ ;; Figure out where the compressed piggyback image is
-+ ;; in the flash (since we wont try to copy it to DRAM
-+ ;; before unpacking). It is at _edata, but in flash.
-+ ;; Use (_edata - basse) as offset to the current PC.
-+
-+basse: move.d pc, r5
-+ and.d 0x7fffffff, r5 ; strip any non-cache bit
-+ subq 2, r5 ; compensate for the move.d pc instr
-+ move.d r5, r0 ; save for later - flash address of 'basse'
-+ add.d _edata, r5
-+ sub.d basse, r5 ; r5 = flash address of '_edata'
-+
-+ ;; Copy text+data to DRAM
-+
-+ move.d basse, r1 ; destination
-+ move.d _edata, r2 ; end destination
-+1: move.w [r0+], r3
-+ move.w r3, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ move.d r5, [_input_data] ; for the decompressor
-+
-+
-+ ;; Clear the decompressors BSS (between _edata and _end)
-+
-+ moveq 0, r0
-+ move.d _edata, r1
-+ move.d _end, r2
-+1: move.w r0, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ ;; Save command line magic and address.
-+ move.d _cmd_line_magic, $r12
-+ move.d $r10, [$r12]
-+ move.d _cmd_line_addr, $r12
-+ move.d $r11, [$r12]
-+
-+ ;; Do the decompression and save compressed size in _inptr
-+
-+ jsr _decompress_kernel
-+
-+ ;; Put start address of root partition in r9 so the kernel can use it
-+ ;; when mounting from flash
-+
-+ move.d [_input_data], r9 ; flash address of compressed kernel
-+ add.d [_inptr], r9 ; size of compressed kernel
-+
-+ ;; Restore command line magic and address.
-+ move.d _cmd_line_magic, $r10
-+ move.d [$r10], $r10
-+ move.d _cmd_line_addr, $r11
-+ move.d [$r11], $r11
-+
-+ ;; Enter the decompressed kernel
-+ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
-+ jump 0x40004000 ; kernel is linked to this address
-+
-+ .data
-+
-+_input_data:
-+ .dword 0 ; used by the decompressor
-+_cmd_line_magic:
-+ .dword 0
-+_cmd_line_addr:
-+ .dword 0
-+#include "hw_settings_816.S"
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_832.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_832.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_832.S 2007-05-28 17:17:12.000000000 +0200
-@@ -0,0 +1,126 @@
-+/*
-+ * arch/cris/boot/compressed/head.S
-+ *
-+ * Copyright (C) 1999, 2001 Axis Communications AB
-+ *
-+ * Code that sets up the DRAM registers, calls the
-+ * decompressor to unpack the piggybacked kernel, and jumps.
-+ *
-+ */
-+
-+#define ASSEMBLER_MACROS_ONLY
-+#include <asm/arch/sv_addr_ag.h>
-+
-+#define RAM_INIT_MAGIC 0x56902387
-+#define COMMAND_LINE_MAGIC 0x87109563
-+
-+ ;; Exported symbols
-+
-+ .globl _input_data
-+
-+
-+ .text
-+
-+ nop
-+ di
-+
-+;; We need to initialze DRAM registers before we start using the DRAM
-+
-+ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
-+ beq dram_init_finished
-+ nop
-+
-+#include "dram_init_832.S"
-+
-+dram_init_finished:
-+
-+ ;; Initiate the PA and PB ports
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
-+ move.b r0, [R_PORT_PA_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
-+ move.b r0, [R_PORT_PA_DIR]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
-+ move.b r0, [R_PORT_PB_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
-+ move.b r0, [R_PORT_PB_DIR]
-+
-+ ;; Setup the stack to a suitably high address.
-+ ;; We assume 8 MB is the minimum DRAM in an eLinux
-+ ;; product and put the sp at the top for now.
-+
-+ move.d 0x40800000, sp
-+
-+ ;; Figure out where the compressed piggyback image is
-+ ;; in the flash (since we wont try to copy it to DRAM
-+ ;; before unpacking). It is at _edata, but in flash.
-+ ;; Use (_edata - basse) as offset to the current PC.
-+
-+basse: move.d pc, r5
-+ and.d 0x7fffffff, r5 ; strip any non-cache bit
-+ subq 2, r5 ; compensate for the move.d pc instr
-+ move.d r5, r0 ; save for later - flash address of 'basse'
-+ add.d _edata, r5
-+ sub.d basse, r5 ; r5 = flash address of '_edata'
-+
-+ ;; Copy text+data to DRAM
-+
-+ move.d basse, r1 ; destination
-+ move.d _edata, r2 ; end destination
-+1: move.w [r0+], r3
-+ move.w r3, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ move.d r5, [_input_data] ; for the decompressor
-+
-+
-+ ;; Clear the decompressors BSS (between _edata and _end)
-+
-+ moveq 0, r0
-+ move.d _edata, r1
-+ move.d _end, r2
-+1: move.w r0, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ ;; Save command line magic and address.
-+ move.d _cmd_line_magic, $r12
-+ move.d $r10, [$r12]
-+ move.d _cmd_line_addr, $r12
-+ move.d $r11, [$r12]
-+
-+ ;; Do the decompression and save compressed size in _inptr
-+
-+ jsr _decompress_kernel
-+
-+ ;; Put start address of root partition in r9 so the kernel can use it
-+ ;; when mounting from flash
-+
-+ move.d [_input_data], r9 ; flash address of compressed kernel
-+ add.d [_inptr], r9 ; size of compressed kernel
-+
-+ ;; Restore command line magic and address.
-+ move.d _cmd_line_magic, $r10
-+ move.d [$r10], $r10
-+ move.d _cmd_line_addr, $r11
-+ move.d [$r11], $r11
-+
-+ ;; Enter the decompressed kernel
-+ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
-+ jump 0x40004000 ; kernel is linked to this address
-+
-+ .data
-+
-+_input_data:
-+ .dword 0 ; used by the decompressor
-+_cmd_line_magic:
-+ .dword 0
-+_cmd_line_addr:
-+ .dword 0
-+#include "hw_settings_832.S"
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_MCM.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_MCM.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_MCM.S 2007-05-28 17:17:51.000000000 +0200
-@@ -0,0 +1,126 @@
-+/*
-+ * arch/cris/boot/compressed/head.S
-+ *
-+ * Copyright (C) 1999, 2001 Axis Communications AB
-+ *
-+ * Code that sets up the DRAM registers, calls the
-+ * decompressor to unpack the piggybacked kernel, and jumps.
-+ *
-+ */
-+
-+#define ASSEMBLER_MACROS_ONLY
-+#include <asm/arch/sv_addr_ag.h>
-+
-+#define RAM_INIT_MAGIC 0x56902387
-+#define COMMAND_LINE_MAGIC 0x87109563
-+
-+ ;; Exported symbols
-+
-+ .globl _input_data
-+
-+
-+ .text
-+
-+ nop
-+ di
-+
-+;; We need to initialze DRAM registers before we start using the DRAM
-+
-+ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
-+ beq dram_init_finished
-+ nop
-+
-+#include "dram_init_MCM.S"
-+
-+dram_init_finished:
-+
-+ ;; Initiate the PA and PB ports
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
-+ move.b r0, [R_PORT_PA_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
-+ move.b r0, [R_PORT_PA_DIR]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
-+ move.b r0, [R_PORT_PB_DATA]
-+
-+ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
-+ move.b r0, [R_PORT_PB_DIR]
-+
-+ ;; Setup the stack to a suitably high address.
-+ ;; We assume 8 MB is the minimum DRAM in an eLinux
-+ ;; product and put the sp at the top for now.
-+
-+ move.d 0x40800000, sp
-+
-+ ;; Figure out where the compressed piggyback image is
-+ ;; in the flash (since we wont try to copy it to DRAM
-+ ;; before unpacking). It is at _edata, but in flash.
-+ ;; Use (_edata - basse) as offset to the current PC.
-+
-+basse: move.d pc, r5
-+ and.d 0x7fffffff, r5 ; strip any non-cache bit
-+ subq 2, r5 ; compensate for the move.d pc instr
-+ move.d r5, r0 ; save for later - flash address of 'basse'
-+ add.d _edata, r5
-+ sub.d basse, r5 ; r5 = flash address of '_edata'
-+
-+ ;; Copy text+data to DRAM
-+
-+ move.d basse, r1 ; destination
-+ move.d _edata, r2 ; end destination
-+1: move.w [r0+], r3
-+ move.w r3, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ move.d r5, [_input_data] ; for the decompressor
-+
-+
-+ ;; Clear the decompressors BSS (between _edata and _end)
-+
-+ moveq 0, r0
-+ move.d _edata, r1
-+ move.d _end, r2
-+1: move.w r0, [r1+]
-+ cmp.d r2, r1
-+ bcs 1b
-+ nop
-+
-+ ;; Save command line magic and address.
-+ move.d _cmd_line_magic, $r12
-+ move.d $r10, [$r12]
-+ move.d _cmd_line_addr, $r12
-+ move.d $r11, [$r12]
-+
-+ ;; Do the decompression and save compressed size in _inptr
-+
-+ jsr _decompress_kernel
-+
-+ ;; Put start address of root partition in r9 so the kernel can use it
-+ ;; when mounting from flash
-+
-+ move.d [_input_data], r9 ; flash address of compressed kernel
-+ add.d [_inptr], r9 ; size of compressed kernel
-+
-+ ;; Restore command line magic and address.
-+ move.d _cmd_line_magic, $r10
-+ move.d [$r10], $r10
-+ move.d _cmd_line_addr, $r11
-+ move.d [$r11], $r11
-+
-+ ;; Enter the decompressed kernel
-+ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
-+ jump 0x40004000 ; kernel is linked to this address
-+
-+ .data
-+
-+_input_data:
-+ .dword 0 ; used by the decompressor
-+_cmd_line_magic:
-+ .dword 0
-+_cmd_line_addr:
-+ .dword 0
-+#include "hw_settings_MCM.S"
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-28 17:14:14.000000000 +0200
-@@ -0,0 +1,62 @@
-+/*
-+ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+ *
-+ * This table is used by some tools to extract hardware parameters.
-+ * The table should be included in the kernel and the decompressor.
-+ * Don't forget to update the tools if you change this table.
-+ *
-+ * Copyright (C) 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ */
-+
-+#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
-+#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
-+
-+ .ascii "HW_PARAM_MAGIC" ; Magic number
-+ .dword 0xc0004000 ; Kernel start address
-+
-+ ; Debug port
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ .dword 0
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+ .dword 1
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+ .dword 2
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+ .dword 3
-+#else
-+ .dword 4 ; No debug
-+#endif
-+
-+ ; SDRAM or EDO DRAM?
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword 1
-+#else
-+ .dword 0
-+#endif
-+
-+ ; Register values
-+ .dword R_WAITSTATES
-+ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
-+ .dword R_BUS_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword R_SDRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_SDRAM_CONFIG
-+ .dword R_SDRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_SDRAM_TIMING
-+#else
-+ .dword R_DRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
-+ .dword R_DRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
-+#endif
-+ .dword R_PORT_PA_SET
-+ .dword PA_SET_VALUE
-+ .dword R_PORT_PB_SET
-+ .dword PB_SET_VALUE
-+ .dword 0 ; No more register values
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-28 20:12:02.000000000 +0200
-@@ -0,0 +1,62 @@
-+/*
-+ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+ *
-+ * This table is used by some tools to extract hardware parameters.
-+ * The table should be included in the kernel and the decompressor.
-+ * Don't forget to update the tools if you change this table.
-+ *
-+ * Copyright (C) 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ */
-+
-+#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
-+#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
-+
-+ .ascii "HW_PARAM_MAGIC" ; Magic number
-+ .dword 0xc0004000 ; Kernel start address
-+
-+ ; Debug port
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ .dword 0
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+ .dword 1
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+ .dword 2
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+ .dword 3
-+#else
-+ .dword 4 ; No debug
-+#endif
-+
-+ ; SDRAM or EDO DRAM?
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword 1
-+#else
-+ .dword 0
-+#endif
-+
-+ ; Register values
-+ .dword R_WAITSTATES
-+ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
-+ .dword R_BUS_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword R_SDRAM_CONFIG
-+ .dword 0x09603636
-+ .dword R_SDRAM_TIMING
-+ .dword 0x80008002
-+#else
-+ .dword R_DRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
-+ .dword R_DRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
-+#endif
-+ .dword R_PORT_PA_SET
-+ .dword PA_SET_VALUE
-+ .dword R_PORT_PB_SET
-+ .dword PB_SET_VALUE
-+ .dword 0 ; No more register values
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-28 20:12:29.000000000 +0200
-@@ -0,0 +1,62 @@
-+/*
-+ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+ *
-+ * This table is used by some tools to extract hardware parameters.
-+ * The table should be included in the kernel and the decompressor.
-+ * Don't forget to update the tools if you change this table.
-+ *
-+ * Copyright (C) 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ */
-+
-+#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
-+#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
-+
-+ .ascii "HW_PARAM_MAGIC" ; Magic number
-+ .dword 0xc0004000 ; Kernel start address
-+
-+ ; Debug port
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ .dword 0
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+ .dword 1
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+ .dword 2
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+ .dword 3
-+#else
-+ .dword 4 ; No debug
-+#endif
-+
-+ ; SDRAM or EDO DRAM?
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword 1
-+#else
-+ .dword 0
-+#endif
-+
-+ ; Register values
-+ .dword R_WAITSTATES
-+ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
-+ .dword R_BUS_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword R_SDRAM_CONFIG
-+ .dword 0x09603636
-+ .dword R_SDRAM_TIMING
-+ .dword 0x80008002
-+#else
-+ .dword R_DRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
-+ .dword R_DRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
-+#endif
-+ .dword R_PORT_PA_SET
-+ .dword PA_SET_VALUE
-+ .dword R_PORT_PB_SET
-+ .dword PB_SET_VALUE
-+ .dword 0 ; No more register values
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-28 20:12:55.000000000 +0200
-@@ -0,0 +1,62 @@
-+/*
-+ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+ *
-+ * This table is used by some tools to extract hardware parameters.
-+ * The table should be included in the kernel and the decompressor.
-+ * Don't forget to update the tools if you change this table.
-+ *
-+ * Copyright (C) 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ */
-+
-+#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
-+#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
-+
-+ .ascii "HW_PARAM_MAGIC" ; Magic number
-+ .dword 0xc0004000 ; Kernel start address
-+
-+ ; Debug port
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ .dword 0
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+ .dword 1
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+ .dword 2
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+ .dword 3
-+#else
-+ .dword 4 ; No debug
-+#endif
-+
-+ ; SDRAM or EDO DRAM?
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword 1
-+#else
-+ .dword 0
-+#endif
-+
-+ ; Register values
-+ .dword R_WAITSTATES
-+ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
-+ .dword R_BUS_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword R_SDRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_SDRAM_CONFIG
-+ .dword R_SDRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_SDRAM_TIMING
-+#else
-+ .dword R_DRAM_CONFIG
-+ .dword 0x09603737
-+ .dword R_DRAM_TIMING
-+ .dword 0x80008002
-+#endif
-+ .dword R_PORT_PA_SET
-+ .dword PA_SET_VALUE
-+ .dword R_PORT_PB_SET
-+ .dword PB_SET_VALUE
-+ .dword 0 ; No more register values
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-28 20:11:31.000000000 +0200
-@@ -0,0 +1,62 @@
-+/*
-+ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
-+ *
-+ * This table is used by some tools to extract hardware parameters.
-+ * The table should be included in the kernel and the decompressor.
-+ * Don't forget to update the tools if you change this table.
-+ *
-+ * Copyright (C) 2001 Axis Communications AB
-+ *
-+ * Authors: Mikael Starvik (starvik@axis.com)
-+ */
-+
-+#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
-+#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
-+ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
-+
-+ .ascii "HW_PARAM_MAGIC" ; Magic number
-+ .dword 0xc0004000 ; Kernel start address
-+
-+ ; Debug port
-+#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+ .dword 0
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
-+ .dword 1
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
-+ .dword 2
-+#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
-+ .dword 3
-+#else
-+ .dword 4 ; No debug
-+#endif
-+
-+ ; SDRAM or EDO DRAM?
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword 1
-+#else
-+ .dword 0
-+#endif
-+
-+ ; Register values
-+ .dword R_WAITSTATES
-+ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
-+ .dword R_BUS_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
-+#ifdef CONFIG_ETRAX_SDRAM
-+ .dword R_SDRAM_CONFIG
-+ .dword 0x09603636
-+ .dword R_SDRAM_TIMING
-+ .dword 0x80608002
-+#else
-+ .dword R_DRAM_CONFIG
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
-+ .dword R_DRAM_TIMING
-+ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
-+#endif
-+ .dword R_PORT_PA_SET
-+ .dword PA_SET_VALUE
-+ .dword R_PORT_PB_SET
-+ .dword PB_SET_VALUE
-+ .dword 0 ; No more register values
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 21:53:52.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:23:16.000000000 +0200
-@@ -143,9 +143,10 @@
- static void
- puts(const char *s)
- {
--#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
-- while(*s) {
--#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_DEBUG_PORT1) || defined(CONFIG_ETRAX_DEBUG_PORT2) || defined(CONFIG_ETRAX_DEBUG_PORT3) || defined(CONFIG_ETRAX_SERIAL_PORT0)
-+
-+while(*s) {
-+#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_SERIAL_PORT0)
- while(!(*R_SERIAL0_STATUS & (1 << 5))) ;
- *R_SERIAL0_TR_DATA = *s++;
- #endif
-@@ -232,7 +233,7 @@
- /* input_data is set in head.S */
- inbuf = input_data;
-
--#ifdef CONFIG_ETRAX_DEBUG_PORT0
-+#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_SERIAL_PORT0)
- *R_SERIAL0_XOFF = 0;
- *R_SERIAL0_BAUD = 0x99;
- *R_SERIAL0_TR_CTRL = 0x40;
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:40:43.000000000 +0200
-@@ -266,8 +266,16 @@
- puts("You need an ETRAX 100LX to run linux 2.6\n");
- while(1);
- }
-+ puts("\r\n _ _ _ \r\n");
-+ puts(" | | (_) | \r\n");
-+ puts(" __ _ ___ _ __ ___ ___ ___ _ _ ___| |_ ___ _ __ ___ ___ _| |_\r\n");
-+ puts(" / _` |/ __| '_ ` _ \\ / _ \\/ __| | | / __| __/ _ \\ '_ ` _ \\/ __| | | __|\r\n");
-+ puts(" | (_| | (__| | | | | | __/\\__ \\ |_| \\__ \\ || __/ | | | | \\__ \\_| | |_ \r\n");
-+ puts(" \\__,_|\\___|_| |_| |_|\\___||___/\\__, |___/\\__\\___|_| |_| |_|___(_)_|\\__|\r\n");
-+ puts(" __/ | \r\n");
-+ puts(" |___/ FOXBOARD @ www.acmesystems.it \r\n");
-
-- puts("Uncompressing Linux...\n");
-+ puts("Uncompressing Linux...\r\n");
- gunzip();
-- puts("Done. Now booting the kernel.\n");
-+ puts("Done. Now booting the kernel.\r\n");
- }
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/ds1302.c linux-2.6.19.2/arch/cris/arch-v10/drivers/ds1302.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/ds1302.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/ds1302.c 2007-05-28 22:55:40.000000000 +0200
-@@ -21,7 +21,7 @@
- #include <linux/delay.h>
- #include <linux/bcd.h>
- #include <linux/capability.h>
--
-+#include <linux/device.h>
- #include <asm/uaccess.h>
- #include <asm/system.h>
- #include <asm/arch/svinto.h>
-@@ -480,6 +480,10 @@
- return 0;
- }
-
-+#ifdef CONFIG_SYSFS
-+static struct class *rtc_class;
-+#endif
-+
- static int __init ds1302_register(void)
- {
- ds1302_init();
-@@ -488,7 +492,15 @@
- ds1302_name, RTC_MAJOR_NR);
- return -1;
- }
-- return 0;
-+
-+ #ifdef CONFIG_SYSFS
-+ rtc_class = class_create(THIS_MODULE, "rtc");
-+ class_device_create(rtc_class, NULL,
-+ MKDEV(RTC_MAJOR_NR, 0),
-+ NULL, "rtc");
-+ #endif
-+
-+ return 0;
-
- }
-
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/eeprom.c linux-2.6.19.2/arch/cris/arch-v10/drivers/eeprom.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/eeprom.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/eeprom.c 2007-05-28 23:03:45.000000000 +0200
-@@ -103,6 +103,7 @@
- #include <linux/delay.h>
- #include <linux/interrupt.h>
- #include <linux/wait.h>
-+#include <linux/device.h>
- #include <asm/uaccess.h>
- #include "i2c.h"
-
-@@ -185,6 +186,9 @@
- };
-
- /* eeprom init call. Probes for different eeprom models. */
-+#ifdef CONFIG_SYSFS
-+static struct class *eep_class;
-+#endif
-
- int __init eeprom_init(void)
- {
-@@ -202,7 +206,13 @@
- eeprom_name, EEPROM_MAJOR_NR);
- return -1;
- }
--
-+
-+#ifdef CONFIG_SYSFS
-+ eep_class = class_create(THIS_MODULE, "eep");
-+ class_device_create(eep_class, NULL, MKDEV(EEPROM_MAJOR, 0), NULL, "eeprom");
-+#endif
-+
-+
- printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
-
- /*
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio.c linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio.c 2007-05-28 22:59:27.000000000 +0200
-@@ -181,6 +181,7 @@
- #include <linux/poll.h>
- #include <linux/init.h>
- #include <linux/interrupt.h>
-+#include <linux/device.h>
-
- #include <asm/etraxgpio.h>
- #include <asm/arch/svinto.h>
-@@ -938,6 +939,10 @@
-
- /* main driver initialization routine, called from mem.c */
-
-+#ifdef CONFIG_SYSFS
-+static struct class *gpio_class;
-+#endif
-+
- static __init int
- gpio_init(void)
- {
-@@ -955,6 +960,14 @@
- return res;
- }
-
-+#ifdef CONFIG_SYSFS
-+ gpio_class = class_create(THIS_MODULE, "gpio");
-+ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 0), NULL, "gpioa");
-+ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 1), NULL, "gpiob");
-+ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 2), NULL, "leds");
-+ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 3), NULL, "gpiog");
-+#endif
-+
- /* Clear all leds */
- #if defined (CONFIG_ETRAX_CSP0_LEDS) || defined (CONFIG_ETRAX_PA_LEDS) || defined (CONFIG_ETRAX_PB_LEDS)
- LED_NETWORK_SET(0);
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/pcf8563.c linux-2.6.19.2/arch/cris/arch-v10/drivers/pcf8563.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/pcf8563.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/pcf8563.c 2007-05-28 23:09:02.000000000 +0200
-@@ -26,6 +26,7 @@
- #include <linux/ioctl.h>
- #include <linux/delay.h>
- #include <linux/bcd.h>
-+#include <linux/device.h>
-
- #include <asm/uaccess.h>
- #include <asm/system.h>
-@@ -344,6 +345,10 @@
- return 0;
- }
-
-+#ifdef CONFIG_SYSFS
-+static struct class *pcf8563_class;
-+#endif
-+
- static int __init
- pcf8563_register(void)
- {
-@@ -358,6 +363,10 @@
- "device.\n", PCF8563_NAME, PCF8563_MAJOR);
- return -1;
- }
-+#ifdef CONFIG_SYSFS
-+ pcf8563_class = class_create(THIS_MODULE, "pcf8563");
-+ class_device_create(pcf8563_class, NULL, MKDEV(PCF8563_MAJOR, 0), NULL, "rtc");
-+#endif
-
- printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
- DRIVER_VERSION);
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/sync_serial.c linux-2.6.19.2/arch/cris/arch-v10/drivers/sync_serial.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/sync_serial.c 2007-05-28 22:35:23.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/sync_serial.c 2007-05-28 23:06:41.000000000 +0200
-@@ -29,6 +29,8 @@
- #include <asm/uaccess.h>
- #include <asm/system.h>
- #include <asm/sync_serial.h>
-+#include <linux/device.h>
-+
- #include <asm/arch/io_interface_mux.h>
-
- /* The receiver is a bit tricky beacuse of the continuous stream of data.*/
-@@ -241,6 +243,9 @@
- .open = sync_serial_open,
- .release = sync_serial_release
- };
-+#ifdef CONFIG_SYSFS
-+static struct class *syncser_class;
-+#endif
-
- static int __init etrax_sync_serial_init(void)
- {
-@@ -274,6 +279,11 @@
- printk("unable to get major for synchronous serial port\n");
- return -EBUSY;
- }
-+#ifdef CONFIG_SYSFS
-+ syncser_class = class_create(THIS_MODULE, "syncser");
-+ class_device_create(syncser_class, NULL, MKDEV(SYNC_SERIAL_MAJOR, 0), NULL, "syncser0");
-+ class_device_create(syncser_class, NULL, MKDEV(SYNC_SERIAL_MAJOR, 1), NULL, "syncser1");
-+#endif
-
- /* Deselect synchronous serial ports while configuring. */
- SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-29 23:30:35.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-29 23:33:44.000000000 +0200
-@@ -60,3 +60,5 @@
- .dword R_PORT_PB_SET
- .dword PB_SET_VALUE
- .dword 0 ; No more register values
-+ .ascii "ACME_PART_MAGIC" ; Magic number
-+ .dword 0xdeadc0de
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-29 23:30:35.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-29 23:33:44.000000000 +0200
-@@ -60,3 +60,5 @@
- .dword R_PORT_PB_SET
- .dword PB_SET_VALUE
- .dword 0 ; No more register values
-+ .ascii "ACME_PART_MAGIC" ; Magic number
-+ .dword 0xdeadc0de
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-29 23:30:35.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-29 23:33:44.000000000 +0200
-@@ -60,3 +60,5 @@
- .dword R_PORT_PB_SET
- .dword PB_SET_VALUE
- .dword 0 ; No more register values
-+ .ascii "ACME_PART_MAGIC" ; Magic number
-+ .dword 0xdeadc0de
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-29 23:30:35.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-29 23:33:44.000000000 +0200
-@@ -60,3 +60,5 @@
- .dword R_PORT_PB_SET
- .dword PB_SET_VALUE
- .dword 0 ; No more register values
-+ .ascii "ACME_PART_MAGIC" ; Magic number
-+ .dword 0xdeadc0de
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
---- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-29 23:30:35.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-29 23:33:44.000000000 +0200
-@@ -60,3 +60,5 @@
- .dword R_PORT_PB_SET
- .dword PB_SET_VALUE
- .dword 0 ; No more register values
-+ .ascii "ACME_PART_MAGIC" ; Magic number
-+ .dword 0xdeadc0de
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-29 23:30:36.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-29 23:36:31.000000000 +0200
-@@ -421,6 +421,11 @@
- struct partitiontable_entry *ptable;
- int use_default_ptable = 1; /* Until proven otherwise. */
- const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
-+ unsigned int kernel_part_size = 0;
-+ unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
-+ unsigned int flash_scan_count = 0;
-+ const char *part_magic = "ACME_PART_MAGIC";
-+ unsigned int magic_len = strlen(part_magic);
-
- if (!(mymtd = flash_probe())) {
- /* There's no reason to use this module if no flash chip can
-@@ -432,6 +437,32 @@
- mymtd->name, mymtd->size);
- axisflash_mtd = mymtd;
- }
-+ /* scan flash to findout where out partition starts */
-+
-+ printk(KERN_INFO "Scanning flash for end of kernel magic\n");
-+ for(flash_scan_count = 0; flash_scan_count < 100000; flash_scan_count++){
-+ if(strncmp(&flash_mem[flash_scan_count], part_magic, magic_len - 1) == 0){
-+ //printk(KERN_INFO "Found end of kernel magic at 0x%.08X\n", flash_scan_count);
-+ kernel_part_size = flash_mem[flash_scan_count + magic_len ];
-+ kernel_part_size <<= 8;
-+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 2];
-+ kernel_part_size <<= 8;
-+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 1];
-+ kernel_part_size <<= 8;
-+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 3];
-+ printk(KERN_INFO "Kernel ends at 0x%.08X\n", kernel_part_size);
-+ flash_scan_count = 1100000;
-+ }
-+ }
-+
-+
-+ if(kernel_part_size){
-+ kernel_part_size = (kernel_part_size & 0xffff0000);
-+ //printk(KERN_INFO "Configuring partition sizes total flash 0x%.08X - kernel 0x%.08X - rootfs 0x%.08X\n", mymtd->size, kernel_part_size, mymtd->size - kernel_part_size);
-+ axis_default_partitions[0].size = kernel_part_size;
-+ axis_default_partitions[1].size = mymtd->size - axis_default_partitions[0].size;
-+ axis_default_partitions[1].offset = axis_default_partitions[0].size;
-+ }
-
- if (mymtd) {
- mymtd->owner = THIS_MODULE;
-@@ -527,7 +558,7 @@
-
- if (mymtd) {
- if (use_default_ptable) {
-- printk(KERN_INFO " Using default partition table.\n");
-+ printk(KERN_INFO " Using ACME partition table.\n");
- err = add_mtd_partitions(mymtd, axis_default_partitions,
- NUM_DEFAULT_PARTITIONS);
- } else {
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c
---- linux-2.6.19.2.orig/drivers/mtd/chips/cfi_cmdset_0002.c 2007-05-30 21:23:01.000000000 +0200
-+++ linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c 2007-05-30 21:38:13.000000000 +0200
-@@ -291,8 +291,7 @@
- kfree(mtd);
- return NULL;
- }
--
-- if (extp->MajorVersion != '1' ||
-+ if (extp->MajorVersion < '0' || extp->MajorVersion > '3' ||
- (extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
- if (cfi->mfr == MANUFACTURER_SAMSUNG &&
- (extp->MajorVersion == '3' && extp->MinorVersion == '3')) {
+++ /dev/null
-diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
---- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-06-01 00:37:57.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-06-01 00:34:55.000000000 +0200
-@@ -62,3 +62,5 @@
- .dword 0 ; No more register values
- .ascii "ACME_PART_MAGIC" ; Magic number
- .dword 0xdeadc0de
-+ .ascii "ACME_RAM_MAGIC" ; Magic number
-+ .dword 0x2000000
-diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_416.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
---- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-06-01 00:37:57.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-06-01 00:34:55.000000000 +0200
-@@ -62,3 +62,5 @@
- .dword 0 ; No more register values
- .ascii "ACME_PART_MAGIC" ; Magic number
- .dword 0xdeadc0de
-+ .ascii "ACME_RAM_MAGIC" ; Magic number
-+ .dword 0x1000000
-diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_816.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
---- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-06-01 00:37:57.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-06-01 00:34:55.000000000 +0200
-@@ -62,3 +62,5 @@
- .dword 0 ; No more register values
- .ascii "ACME_PART_MAGIC" ; Magic number
- .dword 0xdeadc0de
-+ .ascii "ACME_RAM_MAGIC" ; Magic number
-+ .dword 0x1000000
-diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_832.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
---- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-06-01 00:37:57.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-06-01 00:34:55.000000000 +0200
-@@ -62,3 +62,5 @@
- .dword 0 ; No more register values
- .ascii "ACME_PART_MAGIC" ; Magic number
- .dword 0xdeadc0de
-+ .ascii "ACME_RAM_MAGIC" ; Magic number
-+ .dword 0x2000000
-diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
---- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-06-01 00:37:57.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-06-01 00:34:55.000000000 +0200
-@@ -62,3 +62,5 @@
- .dword 0 ; No more register values
- .ascii "ACME_PART_MAGIC" ; Magic number
- .dword 0xdeadc0de
-+ .ascii "ACME_RAM_MAGIC" ; Magic number
-+ .dword 0x1000000
---- linux-2.6.19.2//arch/cris/kernel/setup.c 2007-06-01 00:37:55.000000000 +0200
-+++ /tmp/linux-2.6.19.2/arch/cris/kernel/setup.c 2007-06-01 00:34:55.000000000 +0200
-@@ -55,6 +55,13 @@
- * boot code and the system.
- *
- */
-+#ifdef CONFIG_CRIS_LOW_MAP
-+#define FLASH_UNCACHED_ADDR KSEG_8
-+#define FLASH_CACHED_ADDR KSEG_5
-+#else
-+#define FLASH_UNCACHED_ADDR KSEG_E
-+#define FLASH_CACHED_ADDR KSEG_F
-+#endif
-
- void __init
- setup_arch(char **cmdline_p)
-@@ -63,15 +70,37 @@
- unsigned long bootmap_size;
- unsigned long start_pfn, max_pfn;
- unsigned long memory_start;
--
-+ unsigned int ram_size = 0;
-+ unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
-+ unsigned int ram_scan_count = 0;
-+ const char *ram_magic = "ACME_RAM_MAGIC";
-+ unsigned int magic_len = strlen(ram_magic);
-+ unsigned long dend;
- /* register an initial console printing routine for printk's */
-
- init_etrax_debug();
-
- /* we should really poll for DRAM size! */
-+ printk(KERN_INFO "Determinig RAM size\n");
-+ for(ram_scan_count = 0; ram_scan_count < 100000; ram_scan_count++){
-+ if(strncmp(&flash_mem[ram_scan_count], ram_magic, magic_len - 1) == 0){
-+ ram_size = flash_mem[ram_scan_count + magic_len ];
-+ ram_size <<= 8;
-+ ram_size += flash_mem[ram_scan_count + magic_len + 2];
-+ ram_size <<= 8;
-+ ram_size += flash_mem[ram_scan_count + magic_len + 1];
-+ ram_size <<= 8;
-+ ram_size += flash_mem[ram_scan_count + magic_len + 3];
-+ printk(KERN_INFO "RAM size is %uMB\n", 16 * ram_size);
-+ ram_scan_count = 1100000;
-+ }
-+ }
-
- high_memory = &dram_end;
--
-+ dend = dram_start + 16 * 1024 * 1024 * ram_size;
-+ if(ram_size == 1){
-+ high_memory = 0xc1000000;
-+ }
- if(romfs_in_flash || !romfs_length) {
- /* if we have the romfs in flash, or if there is no rom filesystem,
- * our free area starts directly after the BSS
+++ /dev/null
-Binary files linux-2.6.19.2.orig/include/linux/byteorder/.swab.h.swp and linux-2.6.19.2/include/linux/byteorder/.swab.h.swp differ
-diff -urN linux-2.6.19.2.orig/include/linux/byteorder/swab.h linux-2.6.19.2/include/linux/byteorder/swab.h
---- linux-2.6.19.2.orig/include/linux/byteorder/swab.h 2007-06-02 03:13:27.000000000 +0200
-+++ linux-2.6.19.2/include/linux/byteorder/swab.h 2007-06-02 03:14:52.000000000 +0200
-@@ -20,6 +20,8 @@
- /* casts are necessary for constants, because we never know how for sure
- * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
- */
-+
-+#ifndef _BITS_BYTESWAP_H
- #define ___swab16(x) \
- ({ \
- __u16 __x = (x); \
-@@ -37,6 +39,8 @@
- (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | \
- (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \
- })
-+#endif
-+
-
- #define ___swab64(x) \
- ({ \
-@@ -129,11 +133,13 @@
- # define __swab64(x) __fswab64(x)
- #endif /* OPTIMIZE */
-
--
-+#ifndef _BITS_BYTESWAP_H
- static __inline__ __attribute_const__ __u16 __fswab16(__u16 x)
- {
- return __arch__swab16(x);
- }
-+#endif
-+
- static __inline__ __u16 __swab16p(const __u16 *x)
- {
- return __arch__swab16p(x);
-@@ -143,10 +149,12 @@
- __arch__swab16s(addr);
- }
-
-+#ifndef _BITS_BYTESWAP_H
- static __inline__ __attribute_const__ __u32 __fswab32(__u32 x)
- {
- return __arch__swab32(x);
- }
-+#endif
- static __inline__ __u32 __swab32p(const __u32 *x)
- {
- return __arch__swab32p(x);
+++ /dev/null
---- linux-2.6.19.2.orig/kernel/sys.c 2007-06-04 22:00:44.000000000 +0200
-+++ linux-2.6.19.2/kernel/sys.c 2007-06-04 22:02:06.000000000 +0200
-@@ -829,6 +829,7 @@
- break;
-
- case LINUX_REBOOT_CMD_CAD_ON:
-+ kernel_restart(NULL);
- C_A_D = 1;
- break;
-
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone.c linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,533 @@
-+/*
-+ foxbone.c
-+ Linux Kernel Driver for FoxBone on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+#include <linux/spinlock.h>
-+#include <linux/autoconf.h>
-+#include <linux/interrupt.h>
-+#include <asm/etraxgpio.h>
-+#include <asm/arch/svinto.h>
-+#include <asm/io.h>
-+#include <asm/system.h>
-+#include <asm/irq.h>
-+#include <asm/arch/io_interface_mux.h>
-+
-+
-+#include "foxbone.h"
-+#include "foxbone_userspace.h"
-+
-+
-+#define Fox_line_Read (1<<1)
-+#define Fox_line_WriteData (1<<2)
-+#define Fox_line_Reset (1<<3)
-+#define Fox_line_WriteAddress (1<<4)
-+
-+#define FOX_CLEAR_LINES (~(0x00FFFF00 | Fox_line_Read | Fox_line_WriteAddress | Fox_line_WriteData))
-+
-+#define DEV_NAME "foxbone"
-+#define DEV_MAJOR 14
-+
-+spinlock_t foxbone_lock_var = SPIN_LOCK_UNLOCKED;
-+unsigned long foxbone_irq_flags;
-+// is the userspce device enables ?
-+unsigned char foxbone_userspace_is_open = 0;
-+
-+// are we processing interrupts ? (during fpga_flash the ints are not allowed to be handles
-+unsigned char foxbone_allow_int;
-+
-+// the shadow of which ints are enabled
-+unsigned int foxbone_shadow_int_high = 0;
-+unsigned int foxbone_shadow_int_low = 0;
-+
-+// the following four variables get filled when the foxbone driver is started
-+// they hold the release and the the application words
-+unsigned int FOXBONE_release = 0;
-+unsigned int FOXBONE_application1 = 0;
-+unsigned int FOXBONE_application2 = 0;
-+unsigned int FOXBONE_application3 = 0;
-+
-+
-+
-+FOXINT_CALLBACK foxint_callbacks[32];
-+
-+unsigned int foxbone_read(unsigned int add);
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+static irqreturn_t foxbone_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-+
-+unsigned int foxbone_interrupt_enabled = 0;
-+
-+
-+
-+void FOX_delay(unsigned int d){
-+ while(d--){
-+ unsigned int i = 0;
-+ for(i = 0; i < 32000; i++){
-+ i*=2;
-+ i/=2;
-+ };
-+ };
-+};
-+
-+
-+void foxbone_lock(void){
-+ spin_lock_irqsave(&foxbone_lock_var, foxbone_irq_flags);
-+
-+};
-+
-+void foxbone_unlock(void){
-+ spin_unlock_irqrestore(&foxbone_lock_var, foxbone_irq_flags);
-+
-+};
-+
-+int foxbone_register_interrupt(unsigned char irq, FOXINT_CALLBACK callback){
-+ if(irq > 31){
-+ printk("foxbone: trying to register invalid interrupt\n");
-+ return 0;
-+ };
-+ if(!foxbone_interrupt_enabled){
-+ foxbone_interrupt_enabled = 1;
-+ printk("foxbone: starting interrupt system\n");
-+ int err;
-+ if ((err = request_irq(PA_IRQ_NBR, foxbone_pa_interrupt, SA_INTERRUPT | SA_SHIRQ, "foxbone", 123))){
-+ printk("foxbone: request_irq failed: Error %d\n",err);
-+ return ;
-+ }
-+ printk("foxbone: request_irq success -> irq: %ld\n",PA_IRQ_NBR);
-+ *R_IRQ_MASK1_SET = IO_STATE(R_IRQ_MASK1_SET, pa0, set);
-+ };
-+
-+ printk("foxbone: new int %d registered\n", irq);
-+ foxint_callbacks[irq] = callback;
-+ if(irq < 15){
-+ foxbone_shadow_int_high |= (1<<irq);
-+ foxbone_write(0x08, foxbone_shadow_int_high);
-+ } else {
-+ foxbone_shadow_int_high |= (1<<15);
-+ foxbone_write(0x08, foxbone_shadow_int_high);
-+ foxbone_shadow_int_low |= (1<<(irq-16));
-+ foxbone_write(0x09, foxbone_shadow_int_low);
-+ };
-+ return 1;
-+};
-+
-+
-+void foxbone_unregister_interrupt(unsigned char irq){
-+ if(irq > 31){
-+ printk("foxbone: trying to unregister invalid interrupt\n");
-+ return ;
-+ };
-+ printk("foxbone: interrupt %d unregistered\n", irq);
-+ if(irq < 15){
-+ foxbone_shadow_int_high &= ~(1<<irq);
-+ foxbone_write(0x08, foxbone_shadow_int_high);
-+ } else {
-+ foxbone_shadow_int_low &= ~(1<<(irq-16));
-+ foxbone_write(0x09, foxbone_shadow_int_low);
-+
-+ if(!foxbone_shadow_int_low){
-+ foxbone_shadow_int_high &= ~(1<<15);
-+ foxbone_write(0x08, foxbone_shadow_int_high);
-+ };
-+ };
-+};
-+
-+#if 0
-+#define DBG_INT(x) x
-+#else
-+#define DBG_INT(x)
-+#endif
-+
-+// this is the bottom half of our interrupt handler
-+static void foxbone_handle_interrupt(void){
-+ if(foxbone_allow_int){
-+ foxbone_lock();
-+ unsigned int irq_high, irq_low, i;
-+ DBG_INT(printk("Int handler");)
-+ if(*R_PORT_PA_DATA & (1)){
-+ irq_high = foxbone_read(0x08);
-+ DBG_INT(printk("Got high_int %d\n", irq_high);)
-+ for(i = 0; i < 15; i++){
-+ if(irq_high & (1<<i)){
-+ DBG_INT(printk("Go high_int %d\n",i);)
-+ if(foxint_callbacks[i]){
-+ foxint_callbacks[i](i);
-+ };
-+ };
-+ };
-+ if(irq_high & (0x8000)){
-+ irq_low = foxbone_read(0x09);
-+ DBG_INT(printk("Got low_int %d\n", irq_low);)
-+ for(i = 0; i < 16; i++){
-+ if(irq_low & (1<<i)){
-+ DBG_INT(printk("Go low_int %d\n", i);)
-+ if(foxint_callbacks[i+16]){
-+ foxint_callbacks[i+16](i+16);
-+ };
-+ };
-+ };
-+
-+ };
-+ };
-+ foxbone_unlock();
-+ };
-+};
-+
-+// this is the top half of our interrupt handler
-+static void tasklet_foxbone_int(unsigned long data);
-+DECLARE_TASKLET(tl_foxint_descr, tasklet_foxbone_int, 0L);
-+static void tasklet_foxbone_int(unsigned long data){
-+
-+ DBG_INT(printk("got an int\n");)
-+ foxbone_handle_interrupt();
-+
-+};
-+
-+
-+static irqreturn_t
-+foxbone_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-+{
-+ unsigned long tmp;
-+
-+ /* Find what PA interrupts are active */
-+ tmp = (*R_IRQ_READ1);
-+// printk("_____%ud",*R_IRQ_READ1);
-+ /* Find those that we have enabled */
-+// tmp &= (1 << R_IRQ_MASK1_SET__pa0__BITNR);
-+
-+ /* Clear them.. */
-+ // *R_IRQ_MASK1_CLR = tmp;
-+ //(1 << R_IRQ_MASK1_SET__pa0__BITNR);
-+
-+ tasklet_schedule(&tl_foxint_descr);
-+ // *R_IRQ_MASK1_SET = IO_STATE(R_IRQ_MASK1_SET, pa0, set);
-+
-+ return IRQ_RETVAL(1);
-+}
-+
-+
-+static void foxbone_bus_in(void){
-+ // turn all the iog8-15 pins into outputs
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g8_15dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+
-+ // turn all the iog16-23 pins into outputs
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g16_23dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+};
-+
-+static void foxbone_bus_out(void){
-+ // turn all the iog8-15 pins into outputs
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g8_15dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+
-+ // turn all the iog16-23 pins into outputs
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g16_23dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+};
-+
-+void foxbone_reset(unsigned char reset){
-+ if(reset){
-+ *R_PORT_G_DATA = port_g_data_shadow |= Fox_line_Reset;
-+ } else {
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_Reset;
-+ };
-+};
-+
-+static void foxbone_setadd(unsigned long address){
-+ *R_PORT_G_DATA = port_g_data_shadow &= FOX_CLEAR_LINES;
-+
-+ *R_PORT_G_DATA = port_g_data_shadow |= (address << 8)| Fox_line_WriteAddress;
-+
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteAddress;
-+};
-+
-+
-+static unsigned int foxbone_read_data(unsigned char next){
-+ unsigned int data;
-+ *R_PORT_G_DATA = port_g_data_shadow &= FOX_CLEAR_LINES;
-+
-+ foxbone_bus_in();
-+
-+ *R_PORT_G_DATA = port_g_data_shadow |= Fox_line_Read;
-+
-+ // do the reading now
-+ data = *R_PORT_G_DATA;
-+ data = *R_PORT_G_DATA;
-+
-+ // now return the Fox_line_ReadData to low state to idle the bus from the FPGA side
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_Read;
-+ foxbone_bus_out();
-+ return ((unsigned int)((data&0x00FFFF00)>>8));
-+}
-+
-+
-+static unsigned int foxbone_write_data(unsigned int data, unsigned char next) {
-+ // clear all address/data/control bits
-+ *R_PORT_G_DATA = port_g_data_shadow &= FOX_CLEAR_LINES;
-+
-+ *R_PORT_G_DATA = port_g_data_shadow |= (data << 8)| Fox_line_WriteData;
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteData;
-+
-+ return 0;
-+}
-+
-+void foxbone_write(unsigned int add, unsigned int data){
-+ foxbone_setadd(add);
-+ foxbone_write_data(data, 0);
-+};
-+
-+unsigned int foxbone_read(unsigned int add){
-+ foxbone_setadd(add);
-+ return foxbone_read_data(0);
-+};
-+
-+void foxbone_write_next(unsigned data){
-+ foxbone_write_data(data, 1);
-+};
-+
-+unsigned int foxbone_read_next(void){
-+ return foxbone_read_data(1);
-+};
-+
-+void foxbone_bulk_write(unsigned int *data, unsigned int length, unsigned int add){
-+ unsigned int i;
-+ foxbone_write(add, *data);
-+ unsigned long def_val = (port_g_data_shadow & 0xff0000ff) | Fox_line_WriteData;
-+ for(i = 1; i < length; i++){
-+ *R_PORT_G_DATA = port_g_data_shadow = def_val | data[i]<<8;
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteData;
-+ };
-+};
-+
-+void foxbone_bulk_read(unsigned int *data, unsigned int length, unsigned int add){
-+ //printk("Get data from %d %d\n", add, length);
-+ unsigned int i;
-+ for(i = 0; i < length; i++){
-+ if(i == 0){
-+ data[i] = foxbone_read(add);
-+ } else {
-+ data[i] = foxbone_read_next();
-+ };
-+ };
-+
-+};
-+
-+void foxbone_initialise_bus(void){
-+ memset(foxint_callbacks, 0, sizeof(FOXINT_CALLBACK)*32);
-+
-+ // clear all address/data/control bits
-+ *R_PORT_G_DATA = port_g_data_shadow &= FOX_CLEAR_LINES;
-+ foxbone_reset(0);
-+ int i;
-+ for(i = 0; i < 32000; i++){
-+ i++;
-+ i--;
-+ };
-+ foxbone_reset(1);
-+
-+ foxbone_bus_out();
-+
-+ FOXBONE_release = foxbone_read(0x04);
-+ FOXBONE_application1 = foxbone_read(0x05);
-+ FOXBONE_application2 = foxbone_read(0x06);
-+ FOXBONE_application3 = foxbone_read(0x07);
-+ printk("foxbone : release = 0x%04x\n", FOXBONE_release);
-+ printk("foxbone : application word 1 = 0x%04x\n", FOXBONE_application1);
-+ printk("foxbone : application word 2 = 0x%04x\n", FOXBONE_application2);
-+ printk("foxbone : application word 3 = 0x%04x\n", FOXBONE_application3);
-+
-+
-+};
-+
-+
-+static ssize_t foxbone_userspace_write(struct file * file, const char * buffer, size_t count, loff_t *offset){
-+ if(count > (64 * 1024)){
-+ printk("foxbone: trying to bulk write too much data\n");
-+ return 1;
-+ };
-+ unsigned int *bulk_data = (unsigned int) kmalloc(count, GFP_KERNEL);
-+
-+ copy_from_user((char*) bulk_data, buffer, count);
-+
-+ foxbone_bulk_write(&bulk_data[2], bulk_data[1], bulk_data[0]);
-+
-+ kfree(bulk_data);
-+ return 0;
-+};
-+
-+
-+static ssize_t foxbone_userspace_read(struct file *file, char *buffer, size_t count, loff_t *offset){
-+ if(count > (64 * 1024)){
-+ printk("foxbone: trying to bulk read too much data\n");
-+ return 0;
-+ };
-+
-+ // find out which register we want to read
-+ unsigned int bulk_data_info[2];
-+ copy_from_user((char*) bulk_data_info, buffer, 8);
-+
-+ // read the data
-+ unsigned int *bulk_data = (unsigned int)kmalloc(count, GFP_KERNEL);
-+
-+ foxbone_bulk_read(&bulk_data[0], bulk_data_info[1], bulk_data_info[0]);
-+
-+ copy_to_user((char*)buffer, (char*)bulk_data, count);
-+
-+ kfree(bulk_data);
-+
-+ return count / 4;
-+};
-+
-+// the app has send us some control data
-+static int foxbone_userspace_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ int retval = 0;
-+ FOXBONE_WRITE fb_write;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_INIT_BUS:
-+ foxbone_initialise_bus();
-+ break;
-+
-+ case IOCTL_FOXBONE_WRITE_REG:
-+ copy_from_user((FOXBONE_WRITE*)&fb_write, (FOXBONE_WRITE*)arg, sizeof(fb_write));
-+ foxbone_write(fb_write.reg, fb_write.data);
-+ break;
-+
-+ case IOCTL_FOXBONE_READ_REG:
-+ retval = foxbone_read(arg);
-+ break;
-+
-+ case IOCTL_FOXBONE_WRITE_NEXT:
-+ copy_from_user((FOXBONE_WRITE*)&fb_write, (FOXBONE_WRITE*)arg, sizeof(fb_write));
-+ foxbone_write_next(fb_write.data);
-+ break;
-+
-+ case IOCTL_FOXBONE_READ_NEXT:
-+ retval = foxbone_read_next();
-+ break;
-+
-+ case IOCTL_FOXBONE_INTERRUPTS:
-+ foxbone_allow_int = arg;
-+ break;
-+
-+ default:
-+ printk("foxbone_userspace : unknown ioctl\n");
-+ break;
-+ }
-+ return retval;
-+};
-+
-+
-+
-+static int foxbone_userspace_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("foxbone_userspace : trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxbone_userspace_is_open) {
-+ printk("foxbone_userspace : Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int foxbone_userspace_close(struct inode * inode, struct file * file){
-+
-+ foxbone_userspace_is_open = 0;
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxbone_userspace_fops = {
-+ ioctl: foxbone_userspace_ioctl,
-+ write: foxbone_userspace_write,
-+ read: foxbone_userspace_read,
-+ open: foxbone_userspace_open,
-+ release: foxbone_userspace_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int foxbone_userspace_init(void){
-+ // flame the kprintk
-+ printk("foxbone_userspace : FOX-VHDL userspace access module\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxbone_userspace_fops)) {
-+ printk( "fpga_mod.ko : Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+ foxbone_userspace_is_open = 0;
-+ printk("foxbone_userspace : Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void foxbone_userspace_exit(void){
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+
-+static int __init foxbone_init(void){
-+ printk("foxbone : FOX-VHDL FOXBONE access module started\n");
-+ foxbone_initialise_bus();
-+ foxbone_allow_int = 1;
-+ foxbone_userspace_init();
-+ return 0;
-+}
-+
-+
-+static void __exit foxbone_exit(void){
-+ printk( "foxbone : Cleanup\n" );
-+ foxbone_userspace_exit();
-+}
-+
-+module_init (foxbone_init);
-+module_exit (foxbone_exit);
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,21 @@
-+// prototypes for foxbone compliant modules
-+
-+typedef void (*FOXINT_CALLBACK) (unsigned int);
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-+void foxbone_unregister_interrupt(unsigned char irq);
-+int foxbone_register_interrupt(unsigned char irq, FOXINT_CALLBACK callback);
-+void foxbone_reset(unsigned char reset);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone_syscalls.c linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone_syscalls.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone_syscalls.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone_syscalls.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,155 @@
-+/*
-+ foxbone_syscalls.c
-+ Linux Kernel syscalls for FoxBone on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/kernel.h>
-+#include <asm/uaccess.h>
-+#include <linux/foxbone_syscalls.h>
-+#include "foxbone.h"
-+
-+asmlinkage unsigned short int sys_foxboneread(unsigned short int reg){
-+ return foxbone_read(reg);
-+};
-+
-+asmlinkage void sys_foxbonewrite(unsigned short int reg, unsigned short int value){
-+ foxbone_write(reg, value);
-+};
-+
-+asmlinkage void sys_foxbonebulkread(unsigned short int reg, unsigned short int *value, unsigned int length){
-+ unsigned int i;
-+ unsigned int *buffer = kmalloc(length * 2, GFP_KERNEL);
-+ *buffer = foxbone_read(reg);
-+ for(i = 1; i < length; i++){
-+ buffer[i] = foxbone_read_next();
-+ };
-+ copy_to_user(value, buffer, length * 2);
-+ kfree(buffer);
-+
-+};
-+
-+asmlinkage void sys_foxbonebulkwrite(unsigned short int reg, unsigned short int *value, unsigned int length){
-+ unsigned int i;
-+ unsigned int *buffer = kmalloc(length * 2, GFP_KERNEL);
-+ copy_from_user(buffer, value, length * 2);
-+ foxbone_write(reg, *buffer);
-+ for(i = 1; i < length; i++){
-+ foxbone_write_next(buffer[i]);
-+ };
-+ kfree(buffer);
-+};
-+
-+
-+/*
-+ interrupt handling from userspace
-+*/
-+
-+typedef struct _FOX_INT {
-+ unsigned char enabled;
-+ unsigned char count;
-+ unsigned char wakeup;
-+ wait_queue_head_t wait_queue;
-+} FOX_INT;
-+
-+
-+FOX_INT syscall_interrupts[32];
-+
-+
-+void foxbone_interrupt_callback(unsigned int interrupt){
-+ //printk("GOT INT %d\n", irq_no);
-+ if(syscall_interrupts[interrupt].enabled){
-+ syscall_interrupts[interrupt].count ++;
-+ if(syscall_interrupts[interrupt].wakeup){
-+ wake_up_interruptible(&syscall_interrupts[interrupt].wait_queue);
-+ };
-+ };
-+};
-+
-+
-+asmlinkage void sys_foxboneintreg(unsigned long int interrupt, unsigned char state){
-+ if(interrupt > 31){
-+ interrupt = 31;
-+ };
-+ if(state){
-+ foxbone_register_interrupt(interrupt, foxbone_interrupt_callback);
-+ syscall_interrupts[interrupt].enabled = 1;
-+ syscall_interrupts[interrupt].count = 0;
-+ init_waitqueue_head(&syscall_interrupts[interrupt].wait_queue);
-+ } else {
-+ foxbone_unregister_interrupt(interrupt);
-+ syscall_interrupts[interrupt].enabled = 0;
-+ };
-+};
-+
-+
-+asmlinkage unsigned int sys_foxboneintcheck( unsigned long int interrupt){
-+ unsigned int retval = 0xffff;
-+ if(interrupt > 31){
-+ interrupt = 31;
-+ };
-+ if(syscall_interrupts[interrupt].enabled){
-+ retval = syscall_interrupts[interrupt].count;
-+ syscall_interrupts[interrupt].count = 0;
-+ };
-+ return retval;
-+};
-+
-+
-+asmlinkage unsigned int sys_foxboneintwait(unsigned long int interrupt, unsigned char timeout){
-+ unsigned int retval = 0xffff;
-+ if(interrupt > 31){
-+ interrupt = 31;
-+ };
-+ if(syscall_interrupts[interrupt].enabled){
-+ syscall_interrupts[interrupt].wakeup = 1;
-+ syscall_interrupts[interrupt].count = 0;
-+ interruptible_sleep_on_timeout(&syscall_interrupts[interrupt].wait_queue, timeout*HZ);
-+ if(syscall_interrupts[interrupt].count != 0){
-+ retval = syscall_interrupts[interrupt].count;
-+ };
-+ syscall_interrupts[interrupt].count = 0;
-+ syscall_interrupts[interrupt].wakeup = 0;
-+ };
-+ return retval;
-+};
-+
-+
-+asmlinkage void sys_foxbonereset(unsigned short int reg){
-+ foxbone_reset(0);
-+ int i;
-+ for(i = 0; i < 32000; i++){
-+ i++;
-+ i--;
-+ };
-+ foxbone_reset(1);
-+};
-+
-+static int __init foxbone_syscall_init(void){
-+ memset(syscall_interrupts, 0, sizeof(FOX_INT) * 32);
-+ return 0;
-+}
-+
-+
-+static void __exit foxbone_syscall_exit(void){
-+}
-+
-+module_init (foxbone_syscall_init);
-+module_exit (foxbone_syscall_exit);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone_userspace.h linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone_userspace.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/foxbone_userspace.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/foxbone/foxbone_userspace.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,17 @@
-+// These are the ioctls for accessing /dev/foxbone
-+
-+#define IOCTL_FOXBONE_INIT_BUS 0x3341
-+#define IOCTL_FOXBONE_WRITE_REG 0x3342
-+#define IOCTL_FOXBONE_READ_REG 0x3343
-+#define IOCTL_FOXBONE_WRITE_NEXT 0x3344
-+#define IOCTL_FOXBONE_READ_NEXT 0x3345
-+#define IOCTL_FOXBONE_INTERRUPTS 0x3346
-+
-+// the data structure used to write a register
-+typedef struct _FOXBONE_WRITE {
-+ unsigned int reg;
-+ unsigned int data;
-+} FOXBONE_WRITE;
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/Makefile linux-2.6.19.2/drivers/fox-vhdl/foxbone/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/foxbone/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/foxbone/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,2 @@
-+obj-$(CONFIG_FOXBONE) += foxbone.o
-+obj-$(CONFIG_FOXBONE) += foxbone_syscalls.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_event/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_event/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/fox_event.c linux-2.6.19.2/drivers/fox-vhdl/fox_event/fox_event.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/fox_event.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_event/fox_event.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,170 @@
-+/*
-+ fox_event.c
-+ Linux Kernel Driver for FoxBone EventCounter on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "event"
-+#define DEV_MAJOR 193
-+
-+#include "foxbone.h"
-+
-+unsigned char foxevent_is_open = 0;
-+
-+
-+#define IOCTL_FOXBONE_EVENT_SET_ALARM 0x4745
-+#define IOCTL_FOXBONE_EVENT_GET_COUNT 0x4746
-+#define IOCTL_FOXBONE_EVENT_GET_ALARM 0x4747
-+#define IOCTL_FOXBONE_EVENT_RESET_ALARM 0x4748
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ unsigned int current_io = 0;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_EVENT_SET_ALARM:
-+ foxbone_write(0x0040, 0);
-+ foxbone_write(0x0041, arg);
-+ foxbone_write(0x0040, 3);
-+ break;
-+
-+ case IOCTL_FOXBONE_EVENT_GET_COUNT:
-+ retval = foxbone_read(0x0042);
-+ break;
-+
-+ case IOCTL_FOXBONE_EVENT_GET_ALARM:
-+ retval = foxbone_read(0x0043);
-+ break;
-+
-+ case IOCTL_FOXBONE_EVENT_RESET_ALARM:
-+ current_io = foxbone_read(0x0040);
-+ current_io &= ~(1<<1);
-+ foxbone_write(0x0040, 0);
-+ current_io |= (1<<1);
-+ foxbone_write(0x0040, 0);
-+ break;
-+
-+ default:
-+ printk("fox_event: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_event: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxevent_is_open) {
-+ printk("fox_event: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ printk("fox_event: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxevent_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("fox_event: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxevent_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_event: FOX-VHDL FPGA io module\n");
-+ //printk("fox_event: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_event: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxevent_module_fops)) {
-+ printk( "fox_event: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxevent_is_open = 0;
-+ printk("fox_event: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_event: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_event/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_event/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_event/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_EVENT) += fox_event.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_fpga_flash/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_fpga_flash/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_fpga_flash/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_fpga_flash/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,2 @@
-+obj-$(CONFIG_FOX_FPGA) += dpa3palg.oo dpalg.oo dpjtag2.oo dpjtag.oo dpuncomp.oo dpuser.oo fpga_module.oo
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_fpga_flash/MakefileORI linux-2.6.19.2/drivers/fox-vhdl/fox_fpga_flash/MakefileORI
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_fpga_flash/MakefileORI 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_fpga_flash/MakefileORI 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOX_FPGA) += dpa3palg.o dpalg.o dpjtag2.o dpjtag.o dpuncomp.o dpuser.o fpga_module.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_io/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_io/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/fox_io.c linux-2.6.19.2/drivers/fox-vhdl/fox_io/fox_io.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/fox_io.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_io/fox_io.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,164 @@
-+/*
-+ fox_io.c
-+ Linux Kernel Driver for FoxBone I/O on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "foxio"
-+#define DEV_MAJOR 190
-+
-+#include "foxbone.h"
-+
-+unsigned char foxio_is_open = 0;
-+
-+
-+#define IOCTL_FOXBONE_IO_SET 0x4545
-+#define IOCTL_FOXBONE_IO_CLR 0x4546
-+#define IOCTL_FOXBONE_IO_GET 0x4547
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ unsigned int current_io = 0;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_IO_SET:
-+ current_io = foxbone_read(0x0014);
-+ current_io |= (1<<arg);
-+ foxbone_write(0x0014, current_io);
-+ break;
-+
-+ case IOCTL_FOXBONE_IO_CLR:
-+ current_io = foxbone_read(0x0014);
-+ current_io &= ~(1<<arg);
-+ foxbone_write(0x0014, current_io);
-+ break;
-+
-+ case IOCTL_FOXBONE_IO_GET:
-+ retval = foxbone_read(0x0015);
-+ break;
-+
-+
-+ default:
-+ printk("fox_io: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_io: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxio_is_open) {
-+ printk("fox_io: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ printk("fox_io: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxio_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("fox_io: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxio_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_io: FOX-VHDL FPGA io module\n");
-+ //printk("fox_io: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_io: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxio_module_fops)) {
-+ printk( "fox_io: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxio_is_open = 0;
-+ printk("fox_io: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_io: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_io/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_io/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_io/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_IO) += fox_io.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/fox_loopback.c linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/fox_loopback.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/fox_loopback.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/fox_loopback.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,154 @@
-+/*
-+ fox_loopback.c
-+ Linux Kernel Driver for FoxBone Loopback Register on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "loopback"
-+#define DEV_MAJOR 192
-+
-+#include "foxbone.h"
-+
-+unsigned char foxloopback_is_open = 0;
-+
-+
-+#define IOCTL_FOXBONE_LOOPBACK_SET 0x4045
-+#define IOCTL_FOXBONE_LOOPBACK_GET 0x4046
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ unsigned int current_io = 0;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_LOOPBACK_SET:
-+ foxbone_write(0x0013, arg);
-+ break;
-+
-+ case IOCTL_FOXBONE_LOOPBACK_GET:
-+ retval = foxbone_read(0x0013);
-+ break;
-+
-+ default:
-+ printk("fox_loopback: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_loopback: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxloopback_is_open) {
-+ printk("fox_loopback: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ printk("fox_loopback: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxloopback_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("fox_loopback: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxloopback_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_loopback: FOX-VHDL FPGA io module\n");
-+ //printk("fox_loopback: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_loopback: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxloopback_module_fops)) {
-+ printk( "fox_loopback: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxloopback_is_open = 0;
-+ printk("fox_loopback: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_loopback: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_loopback/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_loopback/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_LOOPBACK) += fox_loopback.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/fox_multiply.c linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/fox_multiply.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/fox_multiply.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/fox_multiply.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,172 @@
-+/*
-+ fox_multiply.c
-+ Linux Kernel Driver for FoxBone 32x32 fast multiplier on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "multiply"
-+#define DEV_MAJOR 194
-+
-+#include "foxbone.h"
-+
-+unsigned char foxmultiply_is_open = 0;
-+
-+
-+#define IOCTL_FOXBONE_MUTIPLY 0x4945
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ long data[3], i;
-+ int retval = 0;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_MUTIPLY:
-+ copy_from_user((char*)&data[0], (char*)arg, sizeof(long) * 3);
-+ data[2] = jiffies;
-+ printk("%ld, %ld\n", data[0], data[1]);
-+ //for(i = 0; i < 1024*1024; i++){
-+ foxbone_write(0x0021, (data[0]>>16)&0xffff);
-+ foxbone_write(0x0020, data[0]&0xffff);
-+ foxbone_write(0x0023, (data[1]>>16)&0xffff);
-+ foxbone_write(0x0022, data[1]&0xffff);
-+ data[0] = foxbone_read(0x0025);
-+ data[0] = (data[0] << 16) + foxbone_read(0x0024);
-+ data[1] = foxbone_read(0x0027);
-+ data[1] = (data[1] << 16) + foxbone_read(0x0026);
-+ /*printk("%4x\n", foxbone_read(0x0020));
-+ printk("%4x\n", foxbone_read(0x0021));
-+ printk("%4x\n", foxbone_read(0x0022));
-+ printk("%4x\n", foxbone_read(0x0023));
-+
-+ printk("%4x\n", foxbone_read(0x0024));
-+ printk("%4x\n", foxbone_read(0x0025));
-+ printk("%4x\n", foxbone_read(0x0026));
-+ printk("%4x\n", foxbone_read(0x0027));
-+ */
-+ //};
-+ data[2] = jiffies - data[2];
-+ copy_to_user((char*)arg, (char*)&data[0], sizeof(unsigned long) * 3);
-+ break;
-+
-+ default:
-+ printk("fox_multiply: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_multiply: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxmultiply_is_open) {
-+ printk("fox_multiply: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ //printk("fox_multiply: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ // unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxmultiply_is_open = 0;
-+
-+
-+ // more flaming
-+ //printk("fox_multiply: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxmultiply_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_multiply: FOX-VHDL FPGA multiplier module\n");
-+ //printk("fox_multiply: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_multiply: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxmultiply_module_fops)) {
-+ printk( "fox_multiply: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxmultiply_is_open = 0;
-+ printk("fox_multiply: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_multiply: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_multiply/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_multiply/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_MULTIPLY) += fox_multiply.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/fox_pwm.c linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/fox_pwm.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/fox_pwm.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/fox_pwm.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,180 @@
-+/*
-+ fox_pwm.c
-+ Linux Kernel Driver for FoxBone 16 channel PWM generator on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "pwm"
-+#define DEV_MAJOR 15
-+
-+#include "foxbone.h"
-+
-+unsigned char foxpwm_is_open = 0;
-+
-+
-+#define IOCTL_PWM_ENABLE 0x2310
-+#define IOCTL_PWM_DISABLE 0x2311
-+#define IOCTL_PWM_CHANNEL_BASE 0x2320
-+#define IOCTL_PWM_CHANNEL0 0x2320
-+#define IOCTL_PWM_CHANNEL1 0x2321
-+#define IOCTL_PWM_CHANNEL2 0x2322
-+#define IOCTL_PWM_CHANNEL3 0x2323
-+#define IOCTL_PWM_CHANNEL4 0x2324
-+#define IOCTL_PWM_CHANNEL5 0x2325
-+#define IOCTL_PWM_CHANNEL6 0x2326
-+#define IOCTL_PWM_CHANNEL7 0x2327
-+#define IOCTL_PWM_CHANNEL8 0x2328
-+#define IOCTL_PWM_CHANNEL9 0x2329
-+#define IOCTL_PWM_CHANNELA 0x232a
-+#define IOCTL_PWM_CHANNELB 0x232b
-+#define IOCTL_PWM_CHANNELC 0x232c
-+#define IOCTL_PWM_CHANNELD 0x232d
-+#define IOCTL_PWM_CHANNELE 0x232e
-+#define IOCTL_PWM_CHANNELF 0x232f
-+
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ unsigned int current_pwm;
-+ if((cmd >= IOCTL_PWM_CHANNEL0) && (cmd <= IOCTL_PWM_CHANNELF)){
-+ foxbone_write(0x0050 + (cmd - IOCTL_PWM_CHANNEL_BASE), arg);
-+ } else {
-+ switch (cmd) {
-+ case IOCTL_PWM_ENABLE:
-+ current_pwm = foxbone_read(0x0060);
-+ current_pwm |= (1<<arg);
-+ foxbone_write(0x0060, current_pwm);
-+ break;
-+
-+ case IOCTL_PWM_DISABLE:
-+ current_pwm = foxbone_read(0x0060);
-+ current_pwm &= ~(1<<arg);
-+ foxbone_write(0x0060, current_pwm);
-+ break;
-+
-+ default:
-+ printk("fox_pwm: unknown ioctl\n");
-+ break;
-+ }
-+ };
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_pwm: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxpwm_is_open) {
-+ printk("fox_pwm: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ printk("fox_pwm: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxpwm_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("fox_pwm: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxpwm_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_pwm: FOX-VHDL FPGA PWM module\n");
-+ //printk("fox_pwm: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_pwm: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxpwm_module_fops)) {
-+ printk( "fox_pwm: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxpwm_is_open = 0;
-+ printk("fox_pwm: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_pwm: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_pwm/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_pwm/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_PWM) += fox_pwm.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,16 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/fox_timebase.c linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/fox_timebase.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/fox_timebase.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/fox_timebase.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,168 @@
-+/*
-+ fox_timebase.c
-+ Linux Kernel Driver for FoxBone TimeBase on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "timebase"
-+#define DEV_MAJOR 191
-+
-+#include "foxbone.h"
-+
-+unsigned char foxtimebase_is_open = 0;
-+
-+
-+#define IOCTL_FOXBONE_TIMEBASE_ENABLE 0x4645
-+#define IOCTL_FOXBONE_TIMEBASE_DISABLE 0x4646
-+#define IOCTL_FOXBONE_TIMEBASE_SETLO 0x4647
-+#define IOCTL_FOXBONE_TIMEBASE_SETHI 0x4648
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ switch (cmd) {
-+ case IOCTL_FOXBONE_TIMEBASE_ENABLE:
-+ foxbone_write(0x0100, 0x01);
-+ break;
-+
-+ case IOCTL_FOXBONE_TIMEBASE_DISABLE:
-+ foxbone_write(0x0100, 0x00);
-+ break;
-+
-+ case IOCTL_FOXBONE_TIMEBASE_SETLO:
-+ foxbone_write(0x0100, 0x00);
-+ foxbone_write(0x0102, arg);
-+ foxbone_write(0x0100, 0x01);
-+ break;
-+
-+ case IOCTL_FOXBONE_TIMEBASE_SETHI:
-+ foxbone_write(0x0100, 0x00);
-+ foxbone_write(0x0103, arg);
-+ foxbone_write(0x0100, 0x01);
-+ break;
-+
-+ default:
-+ printk("fox_timebase: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("fox_timebase: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(foxtimebase_is_open) {
-+ printk("fox_timebase: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+
-+ // more flaming
-+ printk("fox_timebase: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ foxtimebase_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("fox_timebase: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations foxtimebase_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("fox_timebase: FOX-VHDL FPGA timebase module\n");
-+ //printk("fox_timebase: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("fox_timebase: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &foxtimebase_module_fops)) {
-+ printk( "fox_timebase: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ foxtimebase_is_open = 0;
-+ printk("fox_timebase: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "fox_timebase: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_timebase/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_timebase/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_FOXBONE_TIMEBASE) += fox_timebase.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/fb.bak linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/fb.bak
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/fb.bak 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/fb.bak 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,661 @@
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/tty.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+#include <linux/delay.h>
-+#include <linux/interrupt.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/uaccess.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+
-+#include "foxbone.h"
-+
-+
-+#if 0
-+#define DBG(x) x
-+#else
-+#define DBG(x)
-+#endif
-+
-+
-+
-+// software delay
-+void FOXVHDL_delay(int ms) {
-+ int i,a;
-+ int delayvar=10;
-+
-+ for (a=0;a<ms;a++) {
-+ for (i=0;i<35;i++) {
-+ delayvar*=2;
-+ delayvar/=2;
-+ }
-+ }
-+}
-+
-+
-+
-+/*
-+||
-+|| FOXVHDL CTL functions
-+||
-+*/
-+
-+
-+static unsigned char FOXVHDL_current_bank = 0xff;
-+
-+static unsigned char blitting = 1;
-+
-+static unsigned char refreshrate = 6;
-+
-+
-+
-+unsigned int FOXVHDL_translate_BGR(unsigned char blue, unsigned char green, unsigned char red) {
-+ // translate the three color passed in a single 16 bit color word
-+ unsigned int result = ((blue>>3)<<11) | ((green>>2)<<5) | (red>>3);
-+ return result;
-+}
-+
-+
-+
-+
-+// wait until the videostate pin has the wanted value
-+void FOXVHDL_wait_videostate(unsigned char wait_state){
-+/* unsigned char vid_state = 0;
-+ unsigned int max_error = 0xffff;
-+ //printk("Start wait\n");
-+ do {
-+ vid_state = FOXVHDL_get_bit_B(Fox_line_VideoState);
-+ max_error--;
-+ } while((vid_state != wait_state)&&(max_error > 10));
-+ */
-+ DBG(if(max_error < 11){printk("Stop wait\n");};)
-+};
-+
-+
-+// choose the bank that we want to display
-+// OG5 == 0 --> Bank0
-+// OG5 == 1 --> Bank1
-+void FOXVHDL_set_bank(unsigned char bank){
-+ DBG(printk("%d, %d\n",FOXVHDL_current_bank, bank);)
-+ if(FOXVHDL_current_bank == bank){
-+ return;
-+ };
-+
-+ DBG(printk("FOXVHDL_set_bank\n");)
-+
-+ FOXVHDL_current_bank = bank;
-+ foxbone_write(0x7001, FOXVHDL_current_bank);
-+
-+
-+};
-+
-+
-+// blit the bank
-+void FOXVHDL_swap_bank(void){
-+ FOXVHDL_set_bank((FOXVHDL_current_bank)?(0):(1));
-+};
-+
-+
-+// initialise the I/O pins
-+void FOXVHDL_init(void){
-+ DBG(printk("FOXVHDL_init\n");)
-+
-+ FOXVHDL_current_bank = 0;
-+
-+ FOXVHDL_set_bank(1);
-+
-+};
-+
-+/*
-+||
-+|| FOXVHDL IMAGE FUNCTIONS
-+||
-+*/
-+#define Fox_line_WriteData (1<<2)
-+
-+void FOXVHDL_blit(unsigned short int *image){
-+ unsigned long i;
-+ unsigned int fb_ctl_reg;
-+
-+ if(blitting){
-+ // reset the address pointer
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ fb_ctl_reg |= (1<<4);
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ fb_ctl_reg &= ~(1<<4);
-+ foxbone_write(0x7001, fb_ctl_reg);
-+
-+ foxbone_write(0x7000, image[0]);
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g8_15dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g16_23dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+
-+ for(i = 1; i < 640 * 400; i++){
-+
-+ *R_PORT_G_DATA = port_g_data_shadow =
-+ (port_g_data_shadow & 0xff0000ff) | image[i]<<8;
-+ *R_PORT_G_DATA = port_g_data_shadow |= Fox_line_WriteData;
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteData;
-+ };
-+ for(i = 0; i <6144; i++){
-+ foxbone_write_next(0);
-+ };
-+ FOXVHDL_swap_bank();
-+ };
-+};
-+
-+
-+
-+
-+
-+
-+/*
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||
-+|| FRAMEBUFFER CODE
-+||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+
-+*/
-+
-+
-+
-+
-+#define VIDEOMEMSIZE (640 * 400 * 2) //512K
-+
-+static void *videomemory;
-+static u_long videomemorysize = VIDEOMEMSIZE;
-+
-+static unsigned char fb_started = 0;
-+
-+static struct fb_var_screeninfo foxfb_default __initdata = {
-+ .xres = 640,
-+ .yres = 400,
-+ .xres_virtual = 640,
-+ .yres_virtual = 400,
-+ .bits_per_pixel = 16,
-+ .red = { 0, 5, 0 },
-+ .green = { 5, 6, 0 },
-+ .blue = { 11, 5, 0 },
-+ .activate = FB_ACTIVATE_NOW,
-+ .height = -1,
-+ .width = -1,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+};
-+
-+static struct fb_fix_screeninfo foxfb_fix __initdata = {
-+ .id = "FOX-VHDL FB",
-+ .type = FB_TYPE_PACKED_PIXELS,
-+ .visual = FB_VISUAL_TRUECOLOR,
-+ .xpanstep = 1,
-+ .ypanstep = 1,
-+ .ywrapstep = 1,
-+ .accel = FB_ACCEL_NONE,
-+};
-+
-+static int foxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
-+static int foxfb_set_par(struct fb_info *info);
-+static int foxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info);
-+static int foxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info);
-+static int foxfb_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma);
-+static void foxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
-+static void foxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
-+static void foxfb_imageblit(struct fb_info *info, const struct fb_image *image);
-+
-+static int foxfb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
-+
-+static struct fb_ops foxfb_ops = {
-+ .fb_check_var = foxfb_check_var,
-+ .fb_set_par = foxfb_set_par,
-+ .fb_setcolreg = foxfb_setcolreg,
-+
-+ .fb_pan_display = foxfb_pan_display,
-+ .fb_fillrect = foxfb_fillrect, //cfb_fillrect,
-+ .fb_copyarea = foxfb_copyarea, //cfb_copyarea,
-+ .fb_imageblit = foxfb_imageblit,//cfb_imageblit,
-+ .fb_mmap = foxfb_mmap,
-+ .fb_ioctl = foxfb_ioctl,
-+};
-+
-+// this function is defined in fbmem.c
-+extern int fb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
-+
-+// this should be a free one
-+#define FOX_FBIOGET_SCREEN 0x4642
-+#define FOX_FBBLIT 0x4643
-+#define FOX_FB_RATE 0x4645
-+#define FOX_FB_TFT 0x4646
-+static int foxfb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg){
-+ void __user *argp = (void __user *)arg;
-+ unsigned int fb_ctl_reg;
-+ switch(cmd){
-+ // this assumes that arg points to a VIDEOMEMSIZE area of memory in user space
-+ case FOX_FBIOGET_SCREEN:
-+ if(copy_to_user(argp, videomemory, VIDEOMEMSIZE)){
-+ return 0;
-+ } else {
-+ return -1;
-+ };
-+ case FOX_FBBLIT:
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ if(arg){
-+ printk("Enable FB\n");
-+ fb_ctl_reg &= ~(1<<1);
-+ } else {
-+ printk("Disable FB\n");
-+ fb_ctl_reg |= (1<<1);
-+ };
-+ blitting = arg;
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ break;
-+ case FOX_FB_RATE:
-+ if((arg > 9) || (arg < 1)){
-+ printk("fb0 : Illegal refreshrate\n");
-+ break;
-+ };
-+ refreshrate = arg;
-+ printk("fb0 : new refreshrate\n");
-+ break;
-+ case FOX_FB_TFT:
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ if(arg){
-+ printk("Enable TFT\n");
-+ fb_ctl_reg |= (1<<3);
-+ } else {
-+ printk("Disable TFT\n");
-+ fb_ctl_reg &= ~(1<<3);
-+ };
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ break;
-+ default:
-+ return fb_ioctl(inode, file, cmd, arg);
-+ };
-+ return 0;
-+};
-+
-+// TODO add our own optimized code here
-+static void foxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect){
-+ cfb_fillrect(info, rect);
-+};
-+
-+
-+// TODO add our own optimized code here
-+static void foxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area){
-+ cfb_copyarea(info, area);
-+};
-+
-+// TODO add our own optimized code here
-+static void foxfb_imageblit(struct fb_info *info, const struct fb_image *image){
-+ cfb_imageblit(info, image);
-+};
-+
-+
-+/*
-+ * Internal routines
-+ */
-+
-+static u_long get_line_length(int xres_virtual, int bpp)
-+{
-+ u_long length;
-+
-+ length = xres_virtual * bpp;
-+ length = (length + 31) & ~31;
-+ length >>= 3;
-+ return (length);
-+}
-+
-+ /*
-+ * Setting the video mode has been split into two parts.
-+ * First part, xxxfb_check_var, must not write anything
-+ * to hardware, it should only verify and adjust var.
-+ * This means it doesn't alter par but it does use hardware
-+ * data from it to check this var.
-+ */
-+
-+static int foxfb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ u_long line_length;
-+
-+ if (var->vmode & FB_VMODE_CONUPDATE) {
-+ var->vmode |= FB_VMODE_YWRAP;
-+ var->xoffset = info->var.xoffset;
-+ var->yoffset = info->var.yoffset;
-+ }
-+
-+ var->xres = 640;
-+ var->yres = 400;
-+
-+ var->bits_per_pixel = 16;
-+
-+ if (var->xres_virtual < var->xoffset + var->xres)
-+ var->xres_virtual = var->xoffset + var->xres;
-+ if (var->yres_virtual < var->yoffset + var->yres)
-+ var->yres_virtual = var->yoffset + var->yres;
-+
-+ line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
-+ if (line_length * var->yres_virtual > videomemorysize)
-+ return -ENOMEM;
-+
-+ var->red.offset = 0;
-+ var->red.length = 5;
-+ var->green.offset = 5;
-+ var->green.length = 6;
-+ var->blue.offset = 11;
-+ var->blue.length = 5;
-+ var->transp.offset = 0;
-+ var->transp.length = 0;
-+ var->red.msb_right = 0;
-+ var->green.msb_right = 0;
-+ var->blue.msb_right = 0;
-+ var->transp.msb_right = 0;
-+
-+ return 0;
-+}
-+
-+
-+
-+/* This routine actually sets the video mode. It's in here where we
-+ * the hardware state info->par and fix which can be affected by the
-+ * change in par. For this driver it doesn't do much.
-+ */
-+static int foxfb_set_par(struct fb_info *info){
-+ info->fix.line_length = get_line_length(info->var.xres_virtual, info->var.bits_per_pixel);
-+ return 0;
-+}
-+
-+/*
-+ * Set a single color register. The values supplied are already
-+ * rounded down to the hardware's capabilities (according to the
-+ * entries in the var structure). Return != 0 for invalid regno.
-+ */
-+
-+
-+static int foxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info){
-+ if (regno >= 256) /* no. of hw registers */
-+ return 1;
-+
-+ /* grayscale works only partially under directcolor */
-+ if (info->var.grayscale) {
-+ /* grayscale = 0.30*R + 0.59*G + 0.11*B */
-+ red = green = blue =
-+ (red * 77 + green * 151 + blue * 28) >> 8;
-+ }
-+
-+ /* Directcolor:
-+ * var->{color}.offset contains start of bitfield
-+ * var->{color}.length contains length of bitfield
-+ * {hardwarespecific} contains width of RAMDAC
-+ * cmap[X] is programmed to (X << red.offset) | (X << green.offset) | (X << blue.offset)
-+ * RAMDAC[X] is programmed to (red, green, blue)
-+ *
-+ * Pseudocolor:
-+ * uses offset = 0 && length = RAMDAC register width.
-+ * var->{color}.offset is 0
-+ * var->{color}.length contains widht of DAC
-+ * cmap is not used
-+ * RAMDAC[X] is programmed to (red, green, blue)
-+ * Truecolor:
-+ * does not use DAC. Usually 3 are present.
-+ * var->{color}.offset contains start of bitfield
-+ * var->{color}.length contains length of bitfield
-+ * cmap is programmed to (red << red.offset) | (green << green.offset) |
-+ * (blue << blue.offset) | (transp << transp.offset)
-+ * RAMDAC does not exist
-+ */
-+#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
-+ switch (info->fix.visual) {
-+ case FB_VISUAL_TRUECOLOR:
-+ case FB_VISUAL_PSEUDOCOLOR:
-+ red = CNVT_TOHW(red, info->var.red.length);
-+ green = CNVT_TOHW(green, info->var.green.length);
-+ blue = CNVT_TOHW(blue, info->var.blue.length);
-+ transp = CNVT_TOHW(transp, info->var.transp.length);
-+ break;
-+ case FB_VISUAL_DIRECTCOLOR:
-+ red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */
-+ green = CNVT_TOHW(green, 8);
-+ blue = CNVT_TOHW(blue, 8);
-+ /* hey, there is bug in transp handling... */
-+ transp = CNVT_TOHW(transp, 8);
-+ break;
-+ }
-+#undef CNVT_TOHW
-+ /* Truecolor has hardware independent palette */
-+ if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-+ u32 v;
-+
-+ if (regno >= 16)
-+ return 1;
-+
-+ v = (red << info->var.red.offset) |
-+ (green << info->var.green.offset) |
-+ (blue << info->var.blue.offset) |
-+ (transp << info->var.transp.offset);
-+ switch (info->var.bits_per_pixel) {
-+ case 8:
-+ break;
-+ case 16:
-+ ((u32 *) (info->pseudo_palette))[regno] = v;
-+ break;
-+ case 24:
-+ case 32:
-+ ((u32 *) (info->pseudo_palette))[regno] = v;
-+ break;
-+ }
-+ return 0;
-+ }
-+ return 0;
-+}
-+
-+ /*
-+ * Pan or Wrap the Display
-+ *
-+ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
-+ */
-+
-+static int foxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info){
-+ if (var->vmode & FB_VMODE_YWRAP) {
-+ if (var->yoffset < 0
-+ || var->yoffset >= info->var.yres_virtual
-+ || var->xoffset)
-+ return -EINVAL;
-+ } else {
-+ if (var->xoffset + var->xres > info->var.xres_virtual ||
-+ var->yoffset + var->yres > info->var.yres_virtual)
-+ return -EINVAL;
-+ }
-+ info->var.xoffset = var->xoffset;
-+ info->var.yoffset = var->yoffset;
-+ if (var->vmode & FB_VMODE_YWRAP)
-+ info->var.vmode |= FB_VMODE_YWRAP;
-+ else
-+ info->var.vmode &= ~FB_VMODE_YWRAP;
-+ return 0;
-+}
-+
-+/*
-+ * Most drivers don't need their own mmap function
-+ */
-+
-+static int foxfb_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma){
-+ unsigned long page, pos;
-+ unsigned long start = vma->vm_start;
-+ unsigned long size = vma->vm_end-vma->vm_start;
-+ printk("mmap : %ld %ld\n", size, info->fix.smem_len);
-+ //if (size > info->fix.smem_len){
-+ // return -EINVAL;
-+ //}
-+ printk("MMAP2\n");
-+ pos = (unsigned long) info->screen_base;
-+ while (size > 0) {
-+ page = page_to_pfn(vmalloc_to_page((void *)pos));
-+ if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))
-+ return -EAGAIN;
-+ start += PAGE_SIZE;
-+ pos += PAGE_SIZE;
-+ if (size > PAGE_SIZE)
-+ size -= PAGE_SIZE;
-+ else
-+ size = 0;
-+ }
-+ return 0;
-+}
-+
-+
-+
-+
-+
-+// our timer
-+struct timer_list foxfb_timer;
-+
-+
-+// the prototype for the callback
-+static void foxfb_timer_callback(unsigned long ptr);
-+
-+
-+// setup the mmc timer
-+static void foxfb_timer_setup(void){
-+ init_timer(&foxfb_timer);
-+ foxfb_timer.function = foxfb_timer_callback;
-+ foxfb_timer.data = 0;
-+ foxfb_timer.expires = jiffies + ( HZ / refreshrate);
-+ add_timer(&foxfb_timer);
-+};
-+
-+
-+// the timer callback function that detects if the card status has changed
-+static void foxfb_timer_callback(unsigned long ptr){
-+ del_timer(&foxfb_timer);
-+ FOXVHDL_blit(videomemory);
-+ foxfb_timer_setup();
-+};
-+
-+
-+static void foxfb_platform_release(struct device *device){
-+ // This is called when the reference count goes to zero.
-+}
-+
-+
-+static int __init foxfb_probe(struct platform_device *dev){
-+ struct fb_info *info;
-+ int retval = -ENOMEM;
-+
-+ if (!(videomemory = vmalloc(videomemorysize)))
-+ return retval;
-+
-+ memset(videomemory, 0, videomemorysize);
-+
-+ info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev);
-+ if (!info)
-+ goto err;
-+
-+ info->screen_base = (char*)videomemory;
-+ info->fbops = &foxfb_ops;
-+ info->fix.smem_len = videomemorysize;
-+ retval = fb_find_mode(&info->var, info, NULL,
-+ NULL, 0, NULL, 8);
-+
-+ if (!retval || (retval == 4))
-+ info->var = foxfb_default;
-+
-+ info->fix = foxfb_fix;
-+ info->pseudo_palette = info->par;
-+ info->par = NULL;
-+ info->flags = FBINFO_FLAG_DEFAULT;
-+
-+ retval = fb_alloc_cmap(&info->cmap, 256, 0);
-+ if (retval < 0)
-+ goto err1;
-+
-+ retval = register_framebuffer(info);
-+ if (retval < 0)
-+ goto err2;
-+ platform_set_drvdata(dev, info);
-+
-+ printk(KERN_INFO
-+ "fb%d: FOX-VHDL frame buffer device, using %ldK of video memory\n",
-+ info->node, videomemorysize >> 10);
-+
-+
-+ //FOXVHDL_blit(videomemory);
-+ foxfb_timer_setup();
-+ return 0;
-+err2:
-+ fb_dealloc_cmap(&info->cmap);
-+err1:
-+ framebuffer_release(info);
-+err:
-+ vfree(videomemory);
-+ return retval;
-+}
-+
-+static int foxfb_remove(struct platform_device *dev)
-+{
-+ struct fb_info *info = platform_get_drvdata(dev);
-+
-+ if (info) {
-+ unregister_framebuffer(info);
-+ vfree(videomemory);
-+ framebuffer_release(info);
-+ }
-+ return 0;
-+}
-+
-+static struct platform_driver foxfb_driver = {
-+ .probe = foxfb_probe,
-+ .remove = foxfb_remove,
-+ .driver = {
-+ .name = "foxfb",
-+ },
-+};
-+
-+static struct platform_device foxfb_device = {
-+ .name = "foxfb",
-+ .id = 0,
-+ .dev = {
-+ .release = foxfb_platform_release,
-+ }
-+};
-+
-+static int __init foxfb_init(void)
-+{
-+ int ret = 0;
-+ refreshrate = 8;
-+ printk(KERN_INFO "fb: Initialising framebuffer\n");
-+
-+ FOXVHDL_init();
-+
-+ ret = platform_driver_register(&foxfb_driver);
-+
-+ if (!ret) {
-+ ret = platform_device_register(&foxfb_device);
-+ if (ret)
-+ platform_driver_unregister(&foxfb_driver);
-+ }
-+ fb_started = 1;
-+ return ret;
-+}
-+
-+static void __exit foxfb_exit(void)
-+{
-+ platform_device_unregister(&foxfb_device);
-+ platform_driver_unregister(&foxfb_driver);
-+}
-+
-+module_exit(foxfb_exit);
-+module_init(foxfb_init);
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("K. John '2B|!2B' Crispin");
-+MODULE_DESCRIPTION("FOX-VHDL Framebuffer Driver");
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/foxbone.h linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/foxbone.h
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/foxbone.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/foxbone.h 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,20 @@
-+// prototypes for foxbone compliant modules
-+
-+extern unsigned int FOXBONE_release;
-+extern unsigned int FOXBONE_application1;
-+extern unsigned int FOXBONE_application2;
-+extern unsigned int FOXBONE_application3;
-+
-+void foxbone_write(unsigned int add, unsigned int data);
-+
-+unsigned int foxbone_read(unsigned int add);
-+
-+void foxbone_write_next(unsigned data);
-+
-+unsigned int foxbone_read_next(void);
-+
-+void foxbone_initialise_bus(void);
-+
-+void foxbone_lock(void);
-+
-+void foxbone_unlock(void);
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/foxvhdlfb.c linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/foxvhdlfb.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/foxvhdlfb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/foxvhdlfb.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,691 @@
-+/*
-+ foxvhdlfb.c
-+ Linux Kernel Driver for FoxBone FrameBuffer on FOX VHDL Board
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/tty.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+#include <linux/delay.h>
-+#include <linux/interrupt.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/uaccess.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+
-+#include "foxbone.h"
-+
-+
-+#if 0
-+#define DBG(x) x
-+#else
-+#define DBG(x)
-+#endif
-+
-+
-+/*
-+||
-+|| FOXVHDL CTL functions
-+||
-+*/
-+
-+
-+static unsigned char FOXVHDL_current_bank = 0xff;
-+
-+static unsigned char blitting = 1;
-+
-+static unsigned char refreshrate = 6;
-+
-+
-+
-+unsigned int FOXVHDL_translate_BGR(unsigned char blue, unsigned char green, unsigned char red) {
-+ // translate the three color passed in a single 16 bit color word
-+ unsigned int result = ((blue>>3)<<11) | ((green>>2)<<5) | (red>>3);
-+ return result;
-+}
-+
-+
-+
-+
-+// wait until the videostate pin has the wanted value
-+void FOXVHDL_wait_videostate(unsigned char wait_state){
-+/* unsigned char vid_state = 0;
-+ unsigned int max_error = 0xffff;
-+ //printk("Start wait\n");
-+ do {
-+ vid_state = FOXVHDL_get_bit_B(Fox_line_VideoState);
-+ max_error--;
-+ } while((vid_state != wait_state)&&(max_error > 10));
-+ */
-+ DBG(if(max_error < 11){printk("Stop wait\n");};)
-+};
-+
-+
-+// choose the bank that we want to display
-+// OG5 == 0 --> Bank0
-+// OG5 == 1 --> Bank1
-+void FOXVHDL_set_bank(unsigned char bank){
-+ DBG(printk("%d, %d\n",FOXVHDL_current_bank, bank);)
-+ if(FOXVHDL_current_bank == bank){
-+ return;
-+ };
-+
-+ DBG(printk("FOXVHDL_set_bank\n");)
-+
-+ FOXVHDL_current_bank = bank;
-+ foxbone_write(0x7001, FOXVHDL_current_bank);
-+
-+
-+};
-+
-+
-+// blit the bank
-+void FOXVHDL_swap_bank(void){
-+ FOXVHDL_set_bank((FOXVHDL_current_bank)?(0):(1));
-+};
-+
-+
-+// initialise the I/O pins
-+void FOXVHDL_init(void){
-+ DBG(printk("FOXVHDL_init\n");)
-+
-+ FOXVHDL_current_bank = 0;
-+
-+ FOXVHDL_set_bank(1);
-+
-+};
-+
-+/*
-+||
-+|| FOXVHDL IMAGE FUNCTIONS
-+||
-+*/
-+#define Fox_line_WriteData (1<<2)
-+
-+// for performance reasons, we do not use the foxbone access functions here
-+// we rather use an optimised algorithm. blitting now only takes about 6 ms.
-+// meaning we can that effectivley achieve 17 frame. however the refresh rate by
-+// default is 4 fps
-+
-+#if 0
-+#define DBG_TIMER(x) x
-+#else
-+#define DBG_TIMER(x)
-+#endif
-+
-+#if 0
-+#define DOUBLE_DATA_RATE
-+#endif
-+
-+void FOXVHDL_blit(unsigned short int *image){
-+ unsigned long i;
-+ unsigned int fb_ctl_reg;
-+
-+ if(blitting){
-+ foxbone_lock();
-+ DBG_TIMER(unsigned long j = jiffies;)
-+ // reset the address pointer
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ fb_ctl_reg |= (1<<4);
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ fb_ctl_reg &= ~(1<<4);
-+ foxbone_write(0x7001, fb_ctl_reg);
-+
-+ foxbone_write(0x7000, image[0]);
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g8_15dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g16_23dir);
-+ *R_GEN_CONFIG = genconfig_shadow;
-+
-+ *R_PORT_G_DATA = port_g_data_shadow = (port_g_data_shadow & 0xff0000ff);
-+
-+
-+#ifdef DOUBLE_DATA_RATE
-+
-+ unsigned long def_val = (port_g_data_shadow & 0xff0000ff);
-+ for(i = 1; i < 640 * 400; i+=2){
-+ *R_PORT_G_DATA = port_g_data_shadow = def_val | image[i]<<8 | Fox_line_WriteData;
-+ *R_PORT_G_DATA = port_g_data_shadow = def_val | image[i+1]<<8;
-+ };
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteData;
-+
-+#else
-+
-+ unsigned long def_val = (port_g_data_shadow & 0xff0000ff) | Fox_line_WriteData;
-+ for(i = 1; i < 640 * 400; i++){
-+ *R_PORT_G_DATA = port_g_data_shadow = def_val | image[i]<<8;
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~Fox_line_WriteData;
-+ };
-+#endif
-+ foxbone_unlock();
-+ FOXVHDL_swap_bank();
-+ DBG_TIMER(printk("%ld\n", jiffies - j);)
-+
-+ };
-+};
-+
-+
-+
-+
-+
-+
-+/*
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||
-+|| FRAMEBUFFER CODE
-+||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
-+
-+*/
-+
-+
-+
-+
-+#define VIDEOMEMSIZE (640 * 400 * 2) //512K
-+
-+static void *videomemory;
-+static u_long videomemorysize = VIDEOMEMSIZE;
-+
-+static unsigned char fb_started = 0;
-+
-+static unsigned char fb_update = 0;
-+
-+static unsigned char fb_mmap_enable = 0;
-+
-+static struct fb_var_screeninfo foxfb_default __initdata = {
-+ .xres = 640,
-+ .yres = 400,
-+ .xres_virtual = 640,
-+ .yres_virtual = 400,
-+ .bits_per_pixel = 16,
-+ .red = { 0, 5, 0 },
-+ .green = { 5, 6, 0 },
-+ .blue = { 11, 5, 0 },
-+ .activate = FB_ACTIVATE_NOW,
-+ .height = -1,
-+ .width = -1,
-+ .vmode = FB_VMODE_NONINTERLACED,
-+};
-+
-+static struct fb_fix_screeninfo foxfb_fix __initdata = {
-+ .id = "FOX-VHDL FB",
-+ .type = FB_TYPE_PACKED_PIXELS,
-+ .visual = FB_VISUAL_TRUECOLOR,
-+ .xpanstep = 1,
-+ .ypanstep = 1,
-+ .ywrapstep = 1,
-+ .accel = FB_ACCEL_NONE,
-+};
-+
-+static int foxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
-+static int foxfb_set_par(struct fb_info *info);
-+static int foxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info);
-+static int foxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info);
-+static int foxfb_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma);
-+static void foxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
-+static void foxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
-+static void foxfb_imageblit(struct fb_info *info, const struct fb_image *image);
-+
-+static int foxfb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
-+
-+static struct fb_ops foxfb_ops = {
-+ .fb_check_var = foxfb_check_var,
-+ .fb_set_par = foxfb_set_par,
-+ .fb_setcolreg = foxfb_setcolreg,
-+
-+ .fb_pan_display = foxfb_pan_display,
-+ .fb_fillrect = foxfb_fillrect, //cfb_fillrect,
-+ .fb_copyarea = foxfb_copyarea, //cfb_copyarea,
-+ .fb_imageblit = foxfb_imageblit,//cfb_imageblit,
-+ .fb_mmap = foxfb_mmap,
-+ .fb_ioctl = foxfb_ioctl,
-+};
-+
-+// this function is defined in fbmem.c
-+extern int fb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
-+
-+// this should be a free one
-+#define FOX_FBIOGET_SCREEN 0x4642
-+#define FOX_FBBLIT 0x4643
-+#define FOX_FB_RATE 0x4645
-+#define FOX_FB_TFT 0x4646
-+static int foxfb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg){
-+ void __user *argp = (void __user *)arg;
-+ unsigned int fb_ctl_reg;
-+ switch(cmd){
-+ // this assumes that arg points to a VIDEOMEMSIZE area of memory in user space
-+ case FOX_FBIOGET_SCREEN:
-+ if(copy_to_user(argp, videomemory, VIDEOMEMSIZE)){
-+ return 0;
-+ } else {
-+ return -1;
-+ };
-+ case FOX_FBBLIT:
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ if(arg){
-+ printk("Enable FB\n");
-+ fb_ctl_reg &= ~(1<<1);
-+ } else {
-+ printk("Disable FB\n");
-+ fb_ctl_reg |= (1<<1);
-+ };
-+ blitting = arg;
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ break;
-+ case FOX_FB_RATE:
-+ if((arg > 9) || (arg < 1)){
-+ printk("fb0 : Illegal refreshrate\n");
-+ break;
-+ };
-+ refreshrate = arg;
-+ printk("fb0 : new refreshrate\n");
-+ break;
-+ case FOX_FB_TFT:
-+ fb_ctl_reg = foxbone_read(0x7001);
-+ if(arg){
-+ printk("Enable TFT\n");
-+ fb_ctl_reg |= (1<<3);
-+ } else {
-+ printk("Disable TFT\n");
-+ fb_ctl_reg &= ~(1<<3);
-+ };
-+ foxbone_write(0x7001, fb_ctl_reg);
-+ break;
-+ default:
-+ return fb_ioctl(inode, file, cmd, arg);
-+ };
-+ return 0;
-+};
-+
-+// TODO add our own optimized code here
-+static void foxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect){
-+ cfb_fillrect(info, rect);
-+ fb_update = 1;
-+};
-+
-+
-+// TODO add our own optimized code here
-+static void foxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area){
-+ cfb_copyarea(info, area);
-+ fb_update = 1;
-+};
-+
-+// TODO add our own optimized code here
-+static void foxfb_imageblit(struct fb_info *info, const struct fb_image *image){
-+ cfb_imageblit(info, image);
-+ fb_update = 1;
-+};
-+
-+
-+/*
-+ * Internal routines
-+ */
-+
-+static u_long get_line_length(int xres_virtual, int bpp)
-+{
-+ u_long length;
-+
-+ length = xres_virtual * bpp;
-+ length = (length + 31) & ~31;
-+ length >>= 3;
-+ return (length);
-+}
-+
-+ /*
-+ * Setting the video mode has been split into two parts.
-+ * First part, xxxfb_check_var, must not write anything
-+ * to hardware, it should only verify and adjust var.
-+ * This means it doesn't alter par but it does use hardware
-+ * data from it to check this var.
-+ */
-+
-+static int foxfb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ u_long line_length;
-+
-+ if (var->vmode & FB_VMODE_CONUPDATE) {
-+ var->vmode |= FB_VMODE_YWRAP;
-+ var->xoffset = info->var.xoffset;
-+ var->yoffset = info->var.yoffset;
-+ }
-+
-+ var->xres = 640;
-+ var->yres = 400;
-+
-+ var->bits_per_pixel = 16;
-+
-+ if (var->xres_virtual < var->xoffset + var->xres)
-+ var->xres_virtual = var->xoffset + var->xres;
-+ if (var->yres_virtual < var->yoffset + var->yres)
-+ var->yres_virtual = var->yoffset + var->yres;
-+
-+ line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
-+ if (line_length * var->yres_virtual > videomemorysize)
-+ return -ENOMEM;
-+
-+ var->red.offset = 0;
-+ var->red.length = 5;
-+ var->green.offset = 5;
-+ var->green.length = 6;
-+ var->blue.offset = 11;
-+ var->blue.length = 5;
-+ var->transp.offset = 0;
-+ var->transp.length = 0;
-+ var->red.msb_right = 0;
-+ var->green.msb_right = 0;
-+ var->blue.msb_right = 0;
-+ var->transp.msb_right = 0;
-+
-+ return 0;
-+}
-+
-+
-+
-+/* This routine actually sets the video mode. It's in here where we
-+ * the hardware state info->par and fix which can be affected by the
-+ * change in par. For this driver it doesn't do much.
-+ */
-+static int foxfb_set_par(struct fb_info *info){
-+ info->fix.line_length = get_line_length(info->var.xres_virtual, info->var.bits_per_pixel);
-+ return 0;
-+}
-+
-+/*
-+ * Set a single color register. The values supplied are already
-+ * rounded down to the hardware's capabilities (according to the
-+ * entries in the var structure). Return != 0 for invalid regno.
-+ */
-+
-+
-+static int foxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info){
-+ if (regno >= 256) /* no. of hw registers */
-+ return 1;
-+
-+ /* grayscale works only partially under directcolor */
-+ if (info->var.grayscale) {
-+ /* grayscale = 0.30*R + 0.59*G + 0.11*B */
-+ red = green = blue =
-+ (red * 77 + green * 151 + blue * 28) >> 8;
-+ }
-+
-+#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
-+ switch (info->fix.visual) {
-+ case FB_VISUAL_TRUECOLOR:
-+ case FB_VISUAL_PSEUDOCOLOR:
-+ red = CNVT_TOHW(red, info->var.red.length);
-+ green = CNVT_TOHW(green, info->var.green.length);
-+ blue = CNVT_TOHW(blue, info->var.blue.length);
-+ transp = CNVT_TOHW(transp, info->var.transp.length);
-+ break;
-+ case FB_VISUAL_DIRECTCOLOR:
-+ red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */
-+ green = CNVT_TOHW(green, 8);
-+ blue = CNVT_TOHW(blue, 8);
-+ /* hey, there is bug in transp handling... */
-+ transp = CNVT_TOHW(transp, 8);
-+ break;
-+ }
-+#undef CNVT_TOHW
-+ /* Truecolor has hardware independent palette */
-+ if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-+ u32 v;
-+
-+ if (regno >= 16)
-+ return 1;
-+
-+ v = (red << info->var.red.offset) |
-+ (green << info->var.green.offset) |
-+ (blue << info->var.blue.offset) |
-+ (transp << info->var.transp.offset);
-+ switch (info->var.bits_per_pixel) {
-+ case 8:
-+ break;
-+ case 16:
-+ ((u32 *) (info->pseudo_palette))[regno] = v;
-+ break;
-+ case 24:
-+ case 32:
-+ ((u32 *) (info->pseudo_palette))[regno] = v;
-+ break;
-+ }
-+ return 0;
-+ }
-+ return 0;
-+}
-+
-+
-+static int foxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info){
-+ if (var->vmode & FB_VMODE_YWRAP) {
-+ if (var->yoffset < 0
-+ || var->yoffset >= info->var.yres_virtual
-+ || var->xoffset)
-+ return -EINVAL;
-+ } else {
-+ if (var->xoffset + var->xres > info->var.xres_virtual ||
-+ var->yoffset + var->yres > info->var.yres_virtual)
-+ return -EINVAL;
-+ }
-+ info->var.xoffset = var->xoffset;
-+ info->var.yoffset = var->yoffset;
-+ if (var->vmode & FB_VMODE_YWRAP)
-+ info->var.vmode |= FB_VMODE_YWRAP;
-+ else
-+ info->var.vmode &= ~FB_VMODE_YWRAP;
-+ return 0;
-+}
-+
-+
-+static int foxfb_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma){
-+ unsigned long page, pos;
-+ unsigned long start = vma->vm_start;
-+ unsigned long size = vma->vm_end-vma->vm_start;
-+ fb_mmap_enable = 1;
-+ printk("mmap : %ld %ld\n", size, (long)info->fix.smem_len);
-+ //if (size > info->fix.smem_len){
-+ // return -EINVAL;
-+ //}
-+ pos = (unsigned long) info->screen_base;
-+ while (size > 0) {
-+ page = page_to_pfn(vmalloc_to_page((void *)pos));
-+ if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))
-+ return -EAGAIN;
-+ start += PAGE_SIZE;
-+ pos += PAGE_SIZE;
-+ if (size > PAGE_SIZE)
-+ size -= PAGE_SIZE;
-+ else
-+ size = 0;
-+ }
-+ return 0;
-+}
-+
-+
-+// our timer
-+struct timer_list foxfb_timer;
-+
-+// are we currently blitting ?
-+static unsigned char we_are_blitting = 0;
-+
-+// the prototype for the callback
-+static void foxfb_timer_callback(unsigned long ptr);
-+
-+
-+static void tasklet_foxfb(unsigned long data);
-+DECLARE_TASKLET(tl_foxfb_descr, tasklet_foxfb, 0L);
-+static void tasklet_foxfb(unsigned long data){
-+ if(fb_update || fb_mmap_enable ){
-+ FOXVHDL_blit(videomemory);
-+ } else {
-+ DBG(printk("FBWAIT");)
-+ };
-+ we_are_blitting = 0;
-+ fb_update = 0;
-+}
-+
-+
-+// setup the fb timer
-+static void foxfb_timer_setup(void){
-+ init_timer(&foxfb_timer);
-+ foxfb_timer.function = foxfb_timer_callback;
-+ foxfb_timer.data = 0;
-+ foxfb_timer.expires = jiffies + ( HZ / refreshrate);
-+ add_timer(&foxfb_timer);
-+};
-+
-+
-+// the timer callback function that detects if the card status has changed
-+static void foxfb_timer_callback(unsigned long ptr){
-+ if((!we_are_blitting)){
-+ we_are_blitting = 1;
-+ del_timer(&foxfb_timer);
-+ tasklet_schedule(&tl_foxfb_descr);
-+ foxfb_timer_setup();
-+ };
-+};
-+
-+
-+static void foxfb_platform_release(struct device *device){
-+ // This is called when the reference count goes to zero.
-+}
-+
-+
-+static int __init foxfb_probe(struct platform_device *dev){
-+ struct fb_info *info;
-+ int retval = -ENOMEM;
-+
-+ if (!(videomemory = vmalloc(videomemorysize)))
-+ return retval;
-+
-+ memset(videomemory, 0, videomemorysize);
-+
-+ info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev);
-+ if (!info)
-+ goto err;
-+
-+ info->screen_base = (char*)videomemory;
-+ info->fbops = &foxfb_ops;
-+ info->fix.smem_len = videomemorysize;
-+ retval = fb_find_mode(&info->var, info, NULL,
-+ NULL, 0, NULL, 8);
-+
-+ if (!retval || (retval == 4))
-+ info->var = foxfb_default;
-+
-+ info->fix = foxfb_fix;
-+ info->pseudo_palette = info->par;
-+ info->par = NULL;
-+ info->flags = FBINFO_FLAG_DEFAULT;
-+ //info->cursor.mode &= ~CURSOR_BLINK;
-+ retval = fb_alloc_cmap(&info->cmap, 256, 0);
-+ if (retval < 0)
-+ goto err1;
-+
-+ retval = register_framebuffer(info);
-+ if (retval < 0)
-+ goto err2;
-+ platform_set_drvdata(dev, info);
-+
-+ printk(KERN_INFO
-+ "fb%d: FOX-VHDL frame buffer device, using %ldK of video memory\n",
-+ info->node, videomemorysize >> 10);
-+
-+
-+ //FOXVHDL_blit(videomemory);
-+ foxfb_timer_setup();
-+ return 0;
-+err2:
-+ fb_dealloc_cmap(&info->cmap);
-+err1:
-+ framebuffer_release(info);
-+err:
-+ vfree(videomemory);
-+ return retval;
-+}
-+
-+static int foxfb_remove(struct platform_device *dev)
-+{
-+ struct fb_info *info = platform_get_drvdata(dev);
-+
-+ if (info) {
-+ unregister_framebuffer(info);
-+ vfree(videomemory);
-+ framebuffer_release(info);
-+ }
-+ return 0;
-+}
-+
-+static struct platform_driver foxfb_driver = {
-+ .probe = foxfb_probe,
-+ .remove = foxfb_remove,
-+ .driver = {
-+ .name = "foxfb",
-+ },
-+};
-+
-+static struct platform_device foxfb_device = {
-+ .name = "foxfb",
-+ .id = 0,
-+ .dev = {
-+ .release = foxfb_platform_release,
-+ }
-+};
-+
-+static int __init foxfb_init(void)
-+{
-+ int ret = 0;
-+ refreshrate = 8;
-+ printk(KERN_INFO "fb: Initialising framebuffer\n");
-+
-+ FOXVHDL_init();
-+
-+ ret = platform_driver_register(&foxfb_driver);
-+
-+ if (!ret) {
-+ ret = platform_device_register(&foxfb_device);
-+ if (ret)
-+ platform_driver_unregister(&foxfb_driver);
-+ }
-+ fb_started = 1;
-+ return ret;
-+}
-+
-+static void __exit foxfb_exit(void)
-+{
-+ platform_device_unregister(&foxfb_device);
-+ platform_driver_unregister(&foxfb_driver);
-+}
-+
-+module_exit(foxfb_exit);
-+module_init(foxfb_init);
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("K. John '2B|!2B' Crispin");
-+MODULE_DESCRIPTION("FOX-VHDL Framebuffer Driver");
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/Makefile linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/fox_vhdl_fb/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/fox_vhdl_fb/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,5 @@
-+# Makefile for fox_vhdl drivers
-+# 23.04.2006 <mailto:john@phrozen.org>
-+
-+# the fox_vhdl_framebuffer driver
-+obj-$(CONFIG_FOX_VHDL_FB) += foxvhdlfb.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/Kconfig linux-2.6.19.2/drivers/fox-vhdl/Kconfig
---- linux-2.6.19.2.orig/drivers/fox-vhdl/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/Kconfig 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,274 @@
-+menu "Acmesystems FPGA"
-+
-+config FOX_VHDL
-+ bool "Support for FOX-VHDL Board"
-+ default n
-+
-+config FOX_FPGA
-+ bool "FPGA flash module"
-+ depends on FOX_VHDL
-+ help
-+ Adds the module needed to flash the fpga from the FOX
-+
-+config FOXBONE
-+ bool "Basic FOXBONE support"
-+ depends on FOX_VHDL
-+ help
-+ Include this to get basic FOXBONE support
-+
-+config VT
-+ bool "Virtual terminal (needed for framebuffer)" if EMBEDDED
-+ select INPUT
-+ default y if !VIOCONS
-+ ---help---
-+ If you say Y here, you will get support for terminal devices with
-+ display and keyboard devices. These are called "virtual" because you
-+ can run several virtual terminals (also called virtual consoles) on
-+ one physical terminal. This is rather useful, for example one
-+ virtual terminal can collect system messages and warnings, another
-+ one can be used for a text-mode user session, and a third could run
-+ an X session, all in parallel. Switching between virtual terminals
-+ is done with certain key combinations, usually Alt-<function key>.
-+
-+ The setterm command ("man setterm") can be used to change the
-+ properties (such as colors or beeping) of a virtual terminal. The
-+ man page console_codes(4) ("man console_codes") contains the special
-+ character sequences that can be used to change those properties
-+ directly. The fonts used on virtual terminals can be changed with
-+ the setfont ("man setfont") command and the key bindings are defined
-+ with the loadkeys ("man loadkeys") command.
-+
-+ You need at least one virtual terminal device in order to make use
-+ of your keyboard and monitor. Therefore, only people configuring an
-+ embedded system would want to say N here in order to save some
-+ memory; the only way to log into such a system is then via a serial
-+ or network connection.
-+
-+ If unsure, say Y, or else you won't be able to do much with your new
-+ shiny Linux system :-)
-+
-+
-+menu "Framebuffer"
-+depends on VT
-+
-+config FB
-+ bool "Support for frame buffer devices"
-+ depends on VT
-+ ---help---
-+ The frame buffer device provides an abstraction for the graphics
-+ hardware. It represents the frame buffer of some video hardware and
-+ allows application software to access the graphics hardware through
-+ a well-defined interface, so the software doesn't need to know
-+ anything about the low-level (hardware register) stuff.
-+
-+ Frame buffer devices work identically across the different
-+ architectures supported by Linux and make the implementation of
-+ application programs easier and more portable; at this point, an X
-+ server exists which uses the frame buffer device exclusively.
-+ On several non-X86 architectures, the frame buffer device is the
-+ only way to use the graphics hardware.
-+
-+ The device is accessed through special device nodes, usually located
-+ in the /dev directory, i.e. /dev/fb*.
-+
-+ You need an utility program called fbset to make full use of frame
-+ buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
-+ and the Framebuffer-HOWTO at
-+ <http://www.tahallah.demon.co.uk/programming/prog.html> for more
-+ information.
-+
-+ Say Y here and to the driver for your graphics board below if you
-+ are compiling a kernel for a non-x86 architecture.
-+
-+ If you are compiling for the x86 architecture, you can say Y if you
-+ want to play with it, but it is not essential. Please note that
-+ running graphical applications that directly touch the hardware
-+ (e.g. an accelerated X server) and that are not frame buffer
-+ device-aware may cause unexpected results. If unsure, say N.
-+
-+config FB_CFB_FILLRECT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_fillrect function for generic software rectangle
-+ filling. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+
-+config FB_CFB_COPYAREA
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_copyarea function for generic software area copying.
-+ This is used by drivers that don't provide their own (accelerated)
-+ version.
-+
-+config FB_CFB_IMAGEBLIT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_imageblit function for generic software image
-+ blitting. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+config DUMMY_CONSOLE
-+ bool "Dummy Console"
-+ depends on FB
-+ #PROM_CONSOLE!=y || VGA_CONSOLE!=y || SGI_NEWPORT_CONSOLE!=y
-+ default n
-+
-+config FRAMEBUFFER_CONSOLE
-+ bool "Framebuffer Console support"
-+ depends on FB
-+ select CRC32
-+ help
-+ Low-level framebuffer-based console driver.
-+config LOGO
-+ bool "Bootup logo"
-+ depends on FB || SGI_NEWPORT_CONSOLE
-+ help
-+ Enable and select frame buffer bootup logos.
-+
-+config LOGO_LINUX_CLUT224
-+ bool "Standard 224-color Linux logo"
-+ depends on LOGO
-+ default y
-+config FONTS
-+ bool "Select compiled-in fonts"
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ help
-+ Say Y here if you would like to use fonts other than the default
-+ your frame buffer console usually use.
-+
-+ Note that the answer to this question won't directly affect the
-+ kernel: saying N will just cause the configurator to skip all
-+ the questions about foreign fonts.
-+
-+ If unsure, say N (the default choices are safe).
-+
-+config FONT_8x8
-+ bool "VGA 8x8 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the text console 80x50 (and higher) modes).
-+
-+ Note that this is a poor quality font. The VGA 8x16 font is quite a
-+ lot more readable.
-+
-+ Given the resolution provided by the frame buffer device, answer N
-+ here is safe.
-+
-+config FONT_8x16
-+ bool "VGA 8x16 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || SGI_NEWPORT_CONSOLE=y || STI_CONSOLE || USB_SISUSBVGA_CON
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the VGA text console 80x25 mode.
-+
-+ If unsure, say Y.
-+
-+
-+config FOX_VHDL_FB
-+ bool "FOX_VHDL Framebuffer"
-+ depends on FOXBONE
-+ depends on FB
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ select VT_CONSOLE
-+ select DUMMY_CONSOLE
-+ select FRAMEBUFFER_CONSOLE
-+ select FONTS
-+ select LOGO
-+ select LOGO_LINUX_CLUT224
-+
-+config NANOXKBD
-+ bool "nano-X keyboard support"
-+ default n
-+ depends on FOX_VHDL_FB
-+ help
-+ Enable the keyboard driver patches for nano-X
-+
-+
-+
-+#if FOX_VHDL_FB
-+ #source "drivers/video/console/Kconfig"
-+#endif
-+
-+#if FOX_VHDL_FB
-+# source "drivers/video/logo/Kconfig"
-+#endif
-+
-+endmenu
-+
-+
-+config FOXBONE_IO
-+ bool "FOXBONE I/O pins"
-+ depends on FOXBONE
-+ help
-+ Include this to get access to the I/O pins of the foxbone
-+
-+config FOXBONE_TIMEBASE
-+ bool "FOXBONE Timebase"
-+ depends on FOXBONE
-+ help
-+ Include this to get access to the timebase part of the fpga
-+
-+config FOXBONE_MMC
-+ bool "FOXBONE MMC/SD module"
-+ depends on FOXBONE
-+ help
-+ Include this to be able to access a mmc/sd card connected to J3 of the fox-vhdl board
-+
-+config FOXBONE_PWM
-+ bool "FOXBONE PWM module"
-+ depends on FOXBONE
-+ help
-+ Include this to enable PWM support into the kernel
-+
-+config FOXBONE_EVENT
-+ bool "FOXBONE EVENT counter module"
-+ depends on FOXBONE
-+ help
-+ Include this to enable foxbone event counter support
-+
-+config FOXBONE_LOOPBACK
-+ bool "FOXBONE Loopback module"
-+ depends on FOXBONE
-+ help
-+ Include this to be able to load the loopback module, that you can base your own driver on
-+
-+config FOXBONE_MULTIPLY
-+ bool "FOXBONE Multiplier example"
-+ depends on FOXBONE
-+ help
-+ Include this to use the 64 bit multiplier
-+
-+menu "FOXBONE interrupt handlers"
-+config FOXBONE_SAMPLE_ISR
-+ bool "FOXBONE example interrupt handlers"
-+ depends on FOXBONE
-+
-+config FOXBONE_INT14
-+ bool "Int 14 - bit 0 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-+
-+config FOXBONE_INT31
-+ bool "Int 31 - bit 1 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-+
-+endmenu
-+
-+
-+config ETRAX_CMDLINE
-+ string "Kernel command line"
-+ default "root=/dev/mtdblock3 init=/linuxrc console=ttyS0"
-+ help
-+ use if no framebuffer is enabled console=ttyS0
-+ use if framebuffer is enabled console=tty0
-+
-+endmenu
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/keyboard/Makefile linux-2.6.19.2/drivers/fox-vhdl/keyboard/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/keyboard/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/keyboard/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_NANOXKBD) += nanoxkbd.o
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/keyboard/nanoxkbd.c linux-2.6.19.2/drivers/fox-vhdl/keyboard/nanoxkbd.c
---- linux-2.6.19.2.orig/drivers/fox-vhdl/keyboard/nanoxkbd.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/keyboard/nanoxkbd.c 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,173 @@
-+/*
-+ nanoxkbd.c
-+ Linux Kernel Driver for Nanox Keyboard driver for FOX VHDL Board framebuffer
-+ (based on FoxBone protocol interface specifications rel 0.7)
-+ For more info see: http://www.acmesystems.it/?id=120
-+ Author: John Crispin
-+ Copyright (C) 2006 Phrozen (http://www.phrozen.biz)
-+
-+ This is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This example is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ To have a copy of the GNU General Public License write to the Free Software
-+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+*/
-+
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/version.h>
-+#include <linux/init.h>
-+#include <asm/uaccess.h>
-+#include <asm/io.h>
-+#include <linux/vmalloc.h>
-+#include <linux/ioport.h>
-+#include <linux/init.h>
-+#include <linux/genhd.h>
-+
-+#define DEV_NAME "keyboard"
-+#define DEV_MAJOR 195
-+
-+
-+unsigned char nanoxkbd_is_open = 0;
-+
-+#define MAX_KEYS 128
-+unsigned int keys[MAX_KEYS];
-+unsigned char keys_count = 0;
-+unsigned char keys_pos = 0;
-+
-+#define IOCTL_NANOXKBD_GET 0x7878
-+
-+unsigned char nanoxkbd_add(unsigned int keycode){
-+ if(nanoxkbd_is_open){
-+ if(keys_count < MAX_KEYS){
-+ keys[(keys_pos + keys_count) % MAX_KEYS] = keycode;
-+ keys_count++;
-+ printk("got key %d, %d, %d\n", keycode, keys_pos, keys_count);
-+ };
-+ return 1;
-+ };
-+ return 0;
-+};
-+
-+// the app has send us some control data
-+static int module_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg){
-+ //copy_to_user((char*)arg, (char*)&audio_data, sizeof(AUDIO_DATA));
-+ //copy_from_user((char*)&mp3_beep, (char*)arg, sizeof(MP3_BEEP));
-+ int retval = 0;
-+ switch (cmd) {
-+ case IOCTL_NANOXKBD_GET:
-+ if(keys_count > 0){
-+ keys_count--;
-+ copy_to_user((char*)arg, (char*)&keys[keys_pos], sizeof(unsigned int));
-+ keys_pos++;
-+ if(keys_pos >= MAX_KEYS){
-+ keys_pos = 0;
-+ };
-+ retval = 1;
-+ };
-+ break;
-+
-+ default:
-+ printk("nanoxkbd: unknown ioctl\n");
-+ break;
-+ }
-+
-+ return retval;
-+};
-+
-+
-+
-+static int module_open(struct inode *inode, struct file *file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // we only supprt minor 0 at the moment
-+ if(dev_minor != 0){
-+ printk("nanoxkbd: trying to access unknown minor device -> %d\n", dev_minor);
-+ return -ENODEV;
-+ }
-+
-+ // check if another app is currently using the device
-+ if(nanoxkbd_is_open) {
-+ printk("nanoxkbd: Device with minor ID %d already in use\n", dev_minor);
-+ return -EBUSY;
-+ }
-+ nanoxkbd_is_open = 1;
-+
-+ // more flaming
-+ printk("nanoxkbd: Minor %d has been opened\n", dev_minor);
-+ return 0;
-+};
-+
-+
-+// gets called when an app closes the device
-+static int module_close(struct inode * inode, struct file * file){
-+ // Which minor device is the user trying to access ?
-+ unsigned int dev_minor = MINOR(inode->i_rdev);
-+
-+ // remember that the device has been closed
-+ nanoxkbd_is_open = 0;
-+
-+
-+ // more flaming
-+ printk("nanoxkbd: Minor %d has been closed\n", dev_minor);
-+
-+ return 0;
-+};
-+
-+// so the kernel knows which functions to access for a given operation
-+struct file_operations nanoxkbd_module_fops = {
-+ ioctl: module_ioctl,
-+ open: module_open,
-+ release: module_close
-+};
-+
-+
-+// module gets loaded into kernel / char dev is registered
-+static int __init mod_init(void){
-+ // flame the kprintk
-+ printk("nanoxkbd: FOX-VHDL FPGA io module\n");
-+ //printk("nanoxkbd: Made by K. John '2B|!2B' Crispin (john@phrozen.org)\n");
-+ //printk("nanoxkbd: Starting ...\n");
-+
-+ // register the character device
-+ if(register_chrdev(DEV_MAJOR, DEV_NAME, &nanoxkbd_module_fops)) {
-+ printk( "nanoxkbd: Error whilst opening %s (%d)\n", DEV_NAME, DEV_MAJOR);
-+ return( -ENODEV );
-+ };
-+
-+
-+ // remember that the driver has been opened
-+ nanoxkbd_is_open = 0;
-+ printk("nanoxkbd: Device %s registered for major ID %d\n", DEV_NAME, DEV_MAJOR);
-+ return 0;
-+}
-+
-+
-+// we are done so shut everything down
-+static void __exit mod_exit(void){
-+ printk( "nanoxkbd: Cleanup\n" );
-+ // tell the kernel that the device is not needed anymore
-+ unregister_chrdev(DEV_MAJOR, DEV_NAME);
-+
-+}
-+
-+module_init (mod_init);
-+module_exit (mod_exit);
-+
-+
-+
-+
-+
-+
-diff -urN linux-2.6.19.2.orig/drivers/fox-vhdl/Makefile linux-2.6.19.2/drivers/fox-vhdl/Makefile
---- linux-2.6.19.2.orig/drivers/fox-vhdl/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/drivers/fox-vhdl/Makefile 2007-06-17 02:46:15.000000000 +0200
-@@ -0,0 +1,13 @@
-+#
-+# Makefile for the i2c core.
-+#
-+obj-$(CONFIG_FOXBONE) += foxbone/
-+obj-$(CONFIG_FOX_VHDL_FB) += fox_vhdl_fb/
-+obj-$(CONFIG_FOX_FPGA) += fox_fpga_flash/
-+obj-$(CONFIG_FOXBONE_PWM) += fox_pwm/
-+obj-$(CONFIG_FOXBONE_IO) += fox_io/
-+obj-$(CONFIG_FOXBONE_TIMEBASE) += fox_timebase/
-+obj-$(CONFIG_FOXBONE_LOOPBACK) += fox_loopback/
-+obj-$(CONFIG_FOXBONE_EVENT) += fox_event/
-+obj-$(CONFIG_FOXBONE_MULTIPLY) += fox_multiply/
-+obj-$(CONFIG_NANOXKBD) += keyboard/
---- linux-2.6.19.2.orig/arch/cris/Kconfig 2007-06-16 23:58:14.000000000 +0200
-+++ linux-2.6.19.2/drivers/fox-vhdl/Kconfig 2007-06-17 02:46:15.000000000 +0200
-@@ -1,244 +1,274 @@
--#
--# For a description of the syntax of this configuration file,
--# see the Configure script.
--#
-+menu "Acmesystems FPGA"
-
--mainmenu "Linux/CRIS Kernel Configuration"
--
--config MMU
-- bool
-- default y
--
--config RWSEM_GENERIC_SPINLOCK
-- bool
-- default y
--
--config RWSEM_XCHGADD_ALGORITHM
-- bool
--
--config GENERIC_IOMAP
-- bool
-- default y
--
--config GENERIC_FIND_NEXT_BIT
-- bool
-- default y
--
--config GENERIC_HWEIGHT
-- bool
-+config FOX_VHDL
-+ bool "Support for FOX-VHDL Board"
-+ default n
-+
-+config FOX_FPGA
-+ bool "FPGA flash module"
-+ depends on FOX_VHDL
-+ help
-+ Adds the module needed to flash the fpga from the FOX
-+
-+config FOXBONE
-+ bool "Basic FOXBONE support"
-+ depends on FOX_VHDL
-+ help
-+ Include this to get basic FOXBONE support
-+
-+config VT
-+ bool "Virtual terminal (needed for framebuffer)" if EMBEDDED
-+ select INPUT
-+ default y if !VIOCONS
-+ ---help---
-+ If you say Y here, you will get support for terminal devices with
-+ display and keyboard devices. These are called "virtual" because you
-+ can run several virtual terminals (also called virtual consoles) on
-+ one physical terminal. This is rather useful, for example one
-+ virtual terminal can collect system messages and warnings, another
-+ one can be used for a text-mode user session, and a third could run
-+ an X session, all in parallel. Switching between virtual terminals
-+ is done with certain key combinations, usually Alt-<function key>.
-+
-+ The setterm command ("man setterm") can be used to change the
-+ properties (such as colors or beeping) of a virtual terminal. The
-+ man page console_codes(4) ("man console_codes") contains the special
-+ character sequences that can be used to change those properties
-+ directly. The fonts used on virtual terminals can be changed with
-+ the setfont ("man setfont") command and the key bindings are defined
-+ with the loadkeys ("man loadkeys") command.
-+
-+ You need at least one virtual terminal device in order to make use
-+ of your keyboard and monitor. Therefore, only people configuring an
-+ embedded system would want to say N here in order to save some
-+ memory; the only way to log into such a system is then via a serial
-+ or network connection.
-+
-+ If unsure, say Y, or else you won't be able to do much with your new
-+ shiny Linux system :-)
-+
-+
-+menu "Framebuffer"
-+depends on VT
-+
-+config FB
-+ bool "Support for frame buffer devices"
-+ depends on VT
-+ ---help---
-+ The frame buffer device provides an abstraction for the graphics
-+ hardware. It represents the frame buffer of some video hardware and
-+ allows application software to access the graphics hardware through
-+ a well-defined interface, so the software doesn't need to know
-+ anything about the low-level (hardware register) stuff.
-+
-+ Frame buffer devices work identically across the different
-+ architectures supported by Linux and make the implementation of
-+ application programs easier and more portable; at this point, an X
-+ server exists which uses the frame buffer device exclusively.
-+ On several non-X86 architectures, the frame buffer device is the
-+ only way to use the graphics hardware.
-+
-+ The device is accessed through special device nodes, usually located
-+ in the /dev directory, i.e. /dev/fb*.
-+
-+ You need an utility program called fbset to make full use of frame
-+ buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
-+ and the Framebuffer-HOWTO at
-+ <http://www.tahallah.demon.co.uk/programming/prog.html> for more
-+ information.
-+
-+ Say Y here and to the driver for your graphics board below if you
-+ are compiling a kernel for a non-x86 architecture.
-+
-+ If you are compiling for the x86 architecture, you can say Y if you
-+ want to play with it, but it is not essential. Please note that
-+ running graphical applications that directly touch the hardware
-+ (e.g. an accelerated X server) and that are not frame buffer
-+ device-aware may cause unexpected results. If unsure, say N.
-+
-+config FB_CFB_FILLRECT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_fillrect function for generic software rectangle
-+ filling. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+
-+config FB_CFB_COPYAREA
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_copyarea function for generic software area copying.
-+ This is used by drivers that don't provide their own (accelerated)
-+ version.
-+
-+config FB_CFB_IMAGEBLIT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_imageblit function for generic software image
-+ blitting. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+config DUMMY_CONSOLE
-+ bool "Dummy Console"
-+ depends on FB
-+ #PROM_CONSOLE!=y || VGA_CONSOLE!=y || SGI_NEWPORT_CONSOLE!=y
-+ default n
-+
-+config FRAMEBUFFER_CONSOLE
-+ bool "Framebuffer Console support"
-+ depends on FB
-+ select CRC32
-+ help
-+ Low-level framebuffer-based console driver.
-+config LOGO
-+ bool "Bootup logo"
-+ depends on FB || SGI_NEWPORT_CONSOLE
-+ help
-+ Enable and select frame buffer bootup logos.
-+
-+config LOGO_LINUX_CLUT224
-+ bool "Standard 224-color Linux logo"
-+ depends on LOGO
- default y
--
--config GENERIC_CALIBRATE_DELAY
-- bool
-- default y
--
--config IRQ_PER_CPU
-- bool
-- default y
--
--config CRIS
-- bool
-- default y
--
--source "init/Kconfig"
--
--menu "General setup"
--
--source "fs/Kconfig.binfmt"
--
--config GENERIC_HARDIRQS
-- bool
-- default y
--
--config SMP
-- bool "SMP"
-- help
-- SMP support. Always Say N.
--
--config NR_CPUS
-- int
-- depends on SMP
-- default 2
--
--config SCHED_MC
-- bool "Multi-core scheduler support"
-- depends on SMP
-- default y
-- help
-- Multi-core scheduler support improves the CPU scheduler's decision
-- making when dealing with multi-core CPU chips at a cost of slightly
-- increased overhead in some places. If unsure say N here.
--
--config ETRAX_CMDLINE
-- string "Kernel command line"
-- default "root=/dev/mtdblock3"
-- help
-- Pass additional commands to the kernel.
--
--config ETRAX_WATCHDOG
-- bool "Enable ETRAX watchdog"
-- help
-- Enable the built-in watchdog timer support on ETRAX based embedded
-- network computers.
--
--config ETRAX_WATCHDOG_NICE_DOGGY
-- bool "Disable watchdog during Oops printouts"
-- depends on ETRAX_WATCHDOG
-- help
-- By enabling this you make sure that the watchdog does not bite while
-- printing oopses. Recommended for development systems but not for
-- production releases.
--
--config ETRAX_FAST_TIMER
-- bool "Enable ETRAX fast timer API"
-- help
-- This options enables the API to a fast timer implementation using
-- timer1 to get sub jiffie resolution timers (primarily one-shot
-- timers).
-- This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled.
--
--config OOM_REBOOT
-- bool "Enable reboot at out of memory"
--
--source "kernel/Kconfig.preempt"
--source "kernel/Kconfig.sched"
--
--source mm/Kconfig
-+config FONTS
-+ bool "Select compiled-in fonts"
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ help
-+ Say Y here if you would like to use fonts other than the default
-+ your frame buffer console usually use.
-+
-+ Note that the answer to this question won't directly affect the
-+ kernel: saying N will just cause the configurator to skip all
-+ the questions about foreign fonts.
-+
-+ If unsure, say N (the default choices are safe).
-+
-+config FONT_8x8
-+ bool "VGA 8x8 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the text console 80x50 (and higher) modes).
-+
-+ Note that this is a poor quality font. The VGA 8x16 font is quite a
-+ lot more readable.
-+
-+ Given the resolution provided by the frame buffer device, answer N
-+ here is safe.
-+
-+config FONT_8x16
-+ bool "VGA 8x16 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || SGI_NEWPORT_CONSOLE=y || STI_CONSOLE || USB_SISUSBVGA_CON
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the VGA text console 80x25 mode.
-+
-+ If unsure, say Y.
-+
-+
-+config FOX_VHDL_FB
-+ bool "FOX_VHDL Framebuffer"
-+ depends on FOXBONE
-+ depends on FB
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ select VT_CONSOLE
-+ select DUMMY_CONSOLE
-+ select FRAMEBUFFER_CONSOLE
-+ select FONTS
-+ select LOGO
-+ select LOGO_LINUX_CLUT224
-+
-+config NANOXKBD
-+ bool "nano-X keyboard support"
-+ default n
-+ depends on FOX_VHDL_FB
-+ help
-+ Enable the keyboard driver patches for nano-X
-+
-+
-+
-+#if FOX_VHDL_FB
-+ #source "drivers/video/console/Kconfig"
-+#endif
-+
-+#if FOX_VHDL_FB
-+# source "drivers/video/logo/Kconfig"
-+#endif
-
- endmenu
-
--menu "Hardware setup"
--
--choice
-- prompt "Processor type"
-- default ETRAX100LX
-
--config ETRAX100LX
-- bool "ETRAX-100LX-v1"
-+config FOXBONE_IO
-+ bool "FOXBONE I/O pins"
-+ depends on FOXBONE
- help
-- Support version 1 of the ETRAX 100LX.
-+ Include this to get access to the I/O pins of the foxbone
-
--config ETRAX100LX_V2
-- bool "ETRAX-100LX-v2"
-+config FOXBONE_TIMEBASE
-+ bool "FOXBONE Timebase"
-+ depends on FOXBONE
- help
-- Support version 2 of the ETRAX 100LX.
-+ Include this to get access to the timebase part of the fpga
-
--config SVINTO_SIM
-- bool "ETRAX-100LX-for-xsim-simulator"
-+config FOXBONE_MMC
-+ bool "FOXBONE MMC/SD module"
-+ depends on FOXBONE
- help
-- Support the xsim ETRAX Simulator.
-+ Include this to be able to access a mmc/sd card connected to J3 of the fox-vhdl board
-
--config ETRAXFS
-- bool "ETRAX-FS-V32"
-+config FOXBONE_PWM
-+ bool "FOXBONE PWM module"
-+ depends on FOXBONE
- help
-- Support CRIS V32.
-+ Include this to enable PWM support into the kernel
-
--config ETRAXFS_SIM
-- bool "ETRAX-FS-V32-Simulator"
-+config FOXBONE_EVENT
-+ bool "FOXBONE EVENT counter module"
-+ depends on FOXBONE
- help
-- Support CRIS V32 VCS simualtor.
-+ Include this to enable foxbone event counter support
-
--endchoice
--
--config ETRAX_ARCH_V10
-- bool
-- default y if ETRAX100LX || ETRAX100LX_V2
-- default n if !(ETRAX100LX || ETRAX100LX_V2)
--
--config ETRAX_ARCH_V32
-- bool
-- default y if ETRAXFS || ETRAXFS_SIM
-- default n if !(ETRAXFS || ETRAXFS_SIM)
--
--config ETRAX_DRAM_SIZE
-- int "DRAM size (dec, in MB)"
-- default "8"
-+config FOXBONE_LOOPBACK
-+ bool "FOXBONE Loopback module"
-+ depends on FOXBONE
- help
-- Size of DRAM (decimal in MB) typically 2, 8 or 16.
-+ Include this to be able to load the loopback module, that you can base your own driver on
-
--config ETRAX_FLASH_BUSWIDTH
-- int "Buswidth of NOR flash in bytes"
-- default "2"
-+config FOXBONE_MULTIPLY
-+ bool "FOXBONE Multiplier example"
-+ depends on FOXBONE
- help
-- Width in bytes of the NOR Flash bus (1, 2 or 4). Is usually 2.
-+ Include this to use the 64 bit multiplier
-
--config ETRAX_NANDFLASH_BUSWIDTH
-- int "Buswidth of NAND flash in bytes"
-- default "1"
-- help
-- Width in bytes of the NAND flash (1 or 2).
-+menu "FOXBONE interrupt handlers"
-+config FOXBONE_SAMPLE_ISR
-+ bool "FOXBONE example interrupt handlers"
-+ depends on FOXBONE
-+
-+config FOXBONE_INT14
-+ bool "Int 14 - bit 0 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-
--config ETRAX_FLASH1_SIZE
-- int "FLASH1 size (dec, in MB. 0 = Unknown)"
-- default "0"
-+config FOXBONE_INT31
-+ bool "Int 31 - bit 1 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-
--# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
--source arch/cris/arch/Kconfig
-+endmenu
-
--endmenu
--
--source "net/Kconfig"
--
--# bring in ETRAX built-in drivers
--menu "Drivers for built-in interfaces"
--# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
--source arch/cris/arch/drivers/Kconfig
-
-+config ETRAX_CMDLINE
-+ string "Kernel command line"
-+ default "root=/dev/mtdblock3 init=/linuxrc console=ttyS0"
-+ help
-+ use if no framebuffer is enabled console=ttyS0
-+ use if framebuffer is enabled console=tty0
-+
- endmenu
--
--source "drivers/base/Kconfig"
--
--# standard linux drivers
--source "drivers/mtd/Kconfig"
--
--source "drivers/parport/Kconfig"
--
--source "drivers/pnp/Kconfig"
--
--source "drivers/block/Kconfig"
--
--source "drivers/md/Kconfig"
--
--source "drivers/ide/Kconfig"
--
--source "drivers/scsi/Kconfig"
--
--source "drivers/ieee1394/Kconfig"
--
--source "drivers/message/i2o/Kconfig"
--
--source "drivers/net/Kconfig"
--
--source "drivers/isdn/Kconfig"
--
--source "drivers/telephony/Kconfig"
--
--source "drivers/cdrom/Kconfig"
--
--#
--# input before char - char/joystick depends on it. As does USB.
--#
--source "drivers/input/Kconfig"
--
--source "drivers/char/Kconfig"
--
--#source drivers/misc/Config.in
--source "drivers/media/Kconfig"
--
--source "fs/Kconfig"
--
--source "sound/Kconfig"
--
--source "drivers/pcmcia/Kconfig"
--
--source "drivers/pci/Kconfig"
--
--source "drivers/usb/Kconfig"
--
--source "arch/cris/Kconfig.debug"
--
--source "security/Kconfig"
--
--source "crypto/Kconfig"
--
--source "lib/Kconfig"
---- linux-2.6.19.2.orig/arch/cris/Kconfig 2007-06-16 23:58:14.000000000 +0200
-+++ linux-2.6.19.2/drivers/fox-vhdl/Kconfig 2007-06-17 02:46:15.000000000 +0200
-@@ -1,244 +1,274 @@
--#
--# For a description of the syntax of this configuration file,
--# see the Configure script.
--#
-+menu "Acmesystems FPGA"
-
--mainmenu "Linux/CRIS Kernel Configuration"
--
--config MMU
-- bool
-- default y
--
--config RWSEM_GENERIC_SPINLOCK
-- bool
-- default y
--
--config RWSEM_XCHGADD_ALGORITHM
-- bool
--
--config GENERIC_IOMAP
-- bool
-- default y
--
--config GENERIC_FIND_NEXT_BIT
-- bool
-- default y
--
--config GENERIC_HWEIGHT
-- bool
-+config FOX_VHDL
-+ bool "Support for FOX-VHDL Board"
-+ default n
-+
-+config FOX_FPGA
-+ bool "FPGA flash module"
-+ depends on FOX_VHDL
-+ help
-+ Adds the module needed to flash the fpga from the FOX
-+
-+config FOXBONE
-+ bool "Basic FOXBONE support"
-+ depends on FOX_VHDL
-+ help
-+ Include this to get basic FOXBONE support
-+
-+config VT
-+ bool "Virtual terminal (needed for framebuffer)" if EMBEDDED
-+ select INPUT
-+ default y if !VIOCONS
-+ ---help---
-+ If you say Y here, you will get support for terminal devices with
-+ display and keyboard devices. These are called "virtual" because you
-+ can run several virtual terminals (also called virtual consoles) on
-+ one physical terminal. This is rather useful, for example one
-+ virtual terminal can collect system messages and warnings, another
-+ one can be used for a text-mode user session, and a third could run
-+ an X session, all in parallel. Switching between virtual terminals
-+ is done with certain key combinations, usually Alt-<function key>.
-+
-+ The setterm command ("man setterm") can be used to change the
-+ properties (such as colors or beeping) of a virtual terminal. The
-+ man page console_codes(4) ("man console_codes") contains the special
-+ character sequences that can be used to change those properties
-+ directly. The fonts used on virtual terminals can be changed with
-+ the setfont ("man setfont") command and the key bindings are defined
-+ with the loadkeys ("man loadkeys") command.
-+
-+ You need at least one virtual terminal device in order to make use
-+ of your keyboard and monitor. Therefore, only people configuring an
-+ embedded system would want to say N here in order to save some
-+ memory; the only way to log into such a system is then via a serial
-+ or network connection.
-+
-+ If unsure, say Y, or else you won't be able to do much with your new
-+ shiny Linux system :-)
-+
-+
-+menu "Framebuffer"
-+depends on VT
-+
-+config FB
-+ bool "Support for frame buffer devices"
-+ depends on VT
-+ ---help---
-+ The frame buffer device provides an abstraction for the graphics
-+ hardware. It represents the frame buffer of some video hardware and
-+ allows application software to access the graphics hardware through
-+ a well-defined interface, so the software doesn't need to know
-+ anything about the low-level (hardware register) stuff.
-+
-+ Frame buffer devices work identically across the different
-+ architectures supported by Linux and make the implementation of
-+ application programs easier and more portable; at this point, an X
-+ server exists which uses the frame buffer device exclusively.
-+ On several non-X86 architectures, the frame buffer device is the
-+ only way to use the graphics hardware.
-+
-+ The device is accessed through special device nodes, usually located
-+ in the /dev directory, i.e. /dev/fb*.
-+
-+ You need an utility program called fbset to make full use of frame
-+ buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
-+ and the Framebuffer-HOWTO at
-+ <http://www.tahallah.demon.co.uk/programming/prog.html> for more
-+ information.
-+
-+ Say Y here and to the driver for your graphics board below if you
-+ are compiling a kernel for a non-x86 architecture.
-+
-+ If you are compiling for the x86 architecture, you can say Y if you
-+ want to play with it, but it is not essential. Please note that
-+ running graphical applications that directly touch the hardware
-+ (e.g. an accelerated X server) and that are not frame buffer
-+ device-aware may cause unexpected results. If unsure, say N.
-+
-+config FB_CFB_FILLRECT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_fillrect function for generic software rectangle
-+ filling. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+
-+config FB_CFB_COPYAREA
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_copyarea function for generic software area copying.
-+ This is used by drivers that don't provide their own (accelerated)
-+ version.
-+
-+config FB_CFB_IMAGEBLIT
-+ tristate
-+ depends on FB
-+ default n
-+ ---help---
-+ Include the cfb_imageblit function for generic software image
-+ blitting. This is used by drivers that don't provide their own
-+ (accelerated) version.
-+config DUMMY_CONSOLE
-+ bool "Dummy Console"
-+ depends on FB
-+ #PROM_CONSOLE!=y || VGA_CONSOLE!=y || SGI_NEWPORT_CONSOLE!=y
-+ default n
-+
-+config FRAMEBUFFER_CONSOLE
-+ bool "Framebuffer Console support"
-+ depends on FB
-+ select CRC32
-+ help
-+ Low-level framebuffer-based console driver.
-+config LOGO
-+ bool "Bootup logo"
-+ depends on FB || SGI_NEWPORT_CONSOLE
-+ help
-+ Enable and select frame buffer bootup logos.
-+
-+config LOGO_LINUX_CLUT224
-+ bool "Standard 224-color Linux logo"
-+ depends on LOGO
- default y
--
--config GENERIC_CALIBRATE_DELAY
-- bool
-- default y
--
--config IRQ_PER_CPU
-- bool
-- default y
--
--config CRIS
-- bool
-- default y
--
--source "init/Kconfig"
--
--menu "General setup"
--
--source "fs/Kconfig.binfmt"
--
--config GENERIC_HARDIRQS
-- bool
-- default y
--
--config SMP
-- bool "SMP"
-- help
-- SMP support. Always Say N.
--
--config NR_CPUS
-- int
-- depends on SMP
-- default 2
--
--config SCHED_MC
-- bool "Multi-core scheduler support"
-- depends on SMP
-- default y
-- help
-- Multi-core scheduler support improves the CPU scheduler's decision
-- making when dealing with multi-core CPU chips at a cost of slightly
-- increased overhead in some places. If unsure say N here.
--
--config ETRAX_CMDLINE
-- string "Kernel command line"
-- default "root=/dev/mtdblock3"
-- help
-- Pass additional commands to the kernel.
--
--config ETRAX_WATCHDOG
-- bool "Enable ETRAX watchdog"
-- help
-- Enable the built-in watchdog timer support on ETRAX based embedded
-- network computers.
--
--config ETRAX_WATCHDOG_NICE_DOGGY
-- bool "Disable watchdog during Oops printouts"
-- depends on ETRAX_WATCHDOG
-- help
-- By enabling this you make sure that the watchdog does not bite while
-- printing oopses. Recommended for development systems but not for
-- production releases.
--
--config ETRAX_FAST_TIMER
-- bool "Enable ETRAX fast timer API"
-- help
-- This options enables the API to a fast timer implementation using
-- timer1 to get sub jiffie resolution timers (primarily one-shot
-- timers).
-- This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled.
--
--config OOM_REBOOT
-- bool "Enable reboot at out of memory"
--
--source "kernel/Kconfig.preempt"
--source "kernel/Kconfig.sched"
--
--source mm/Kconfig
-+config FONTS
-+ bool "Select compiled-in fonts"
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ help
-+ Say Y here if you would like to use fonts other than the default
-+ your frame buffer console usually use.
-+
-+ Note that the answer to this question won't directly affect the
-+ kernel: saying N will just cause the configurator to skip all
-+ the questions about foreign fonts.
-+
-+ If unsure, say N (the default choices are safe).
-+
-+config FONT_8x8
-+ bool "VGA 8x8 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || STI_CONSOLE
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the text console 80x50 (and higher) modes).
-+
-+ Note that this is a poor quality font. The VGA 8x16 font is quite a
-+ lot more readable.
-+
-+ Given the resolution provided by the frame buffer device, answer N
-+ here is safe.
-+
-+config FONT_8x16
-+ bool "VGA 8x16 font" if FONTS
-+ depends on FRAMEBUFFER_CONSOLE || SGI_NEWPORT_CONSOLE=y || STI_CONSOLE || USB_SISUSBVGA_CON
-+ default y if !SPARC && !FONTS
-+ help
-+ This is the "high resolution" font for the VGA frame buffer (the one
-+ provided by the VGA text console 80x25 mode.
-+
-+ If unsure, say Y.
-+
-+
-+config FOX_VHDL_FB
-+ bool "FOX_VHDL Framebuffer"
-+ depends on FOXBONE
-+ depends on FB
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ select VT_CONSOLE
-+ select DUMMY_CONSOLE
-+ select FRAMEBUFFER_CONSOLE
-+ select FONTS
-+ select LOGO
-+ select LOGO_LINUX_CLUT224
-+
-+config NANOXKBD
-+ bool "nano-X keyboard support"
-+ default n
-+ depends on FOX_VHDL_FB
-+ help
-+ Enable the keyboard driver patches for nano-X
-+
-+
-+
-+#if FOX_VHDL_FB
-+ #source "drivers/video/console/Kconfig"
-+#endif
-+
-+#if FOX_VHDL_FB
-+# source "drivers/video/logo/Kconfig"
-+#endif
-
- endmenu
-
--menu "Hardware setup"
--
--choice
-- prompt "Processor type"
-- default ETRAX100LX
-
--config ETRAX100LX
-- bool "ETRAX-100LX-v1"
-+config FOXBONE_IO
-+ bool "FOXBONE I/O pins"
-+ depends on FOXBONE
- help
-- Support version 1 of the ETRAX 100LX.
-+ Include this to get access to the I/O pins of the foxbone
-
--config ETRAX100LX_V2
-- bool "ETRAX-100LX-v2"
-+config FOXBONE_TIMEBASE
-+ bool "FOXBONE Timebase"
-+ depends on FOXBONE
- help
-- Support version 2 of the ETRAX 100LX.
-+ Include this to get access to the timebase part of the fpga
-
--config SVINTO_SIM
-- bool "ETRAX-100LX-for-xsim-simulator"
-+config FOXBONE_MMC
-+ bool "FOXBONE MMC/SD module"
-+ depends on FOXBONE
- help
-- Support the xsim ETRAX Simulator.
-+ Include this to be able to access a mmc/sd card connected to J3 of the fox-vhdl board
-
--config ETRAXFS
-- bool "ETRAX-FS-V32"
-+config FOXBONE_PWM
-+ bool "FOXBONE PWM module"
-+ depends on FOXBONE
- help
-- Support CRIS V32.
-+ Include this to enable PWM support into the kernel
-
--config ETRAXFS_SIM
-- bool "ETRAX-FS-V32-Simulator"
-+config FOXBONE_EVENT
-+ bool "FOXBONE EVENT counter module"
-+ depends on FOXBONE
- help
-- Support CRIS V32 VCS simualtor.
-+ Include this to enable foxbone event counter support
-
--endchoice
--
--config ETRAX_ARCH_V10
-- bool
-- default y if ETRAX100LX || ETRAX100LX_V2
-- default n if !(ETRAX100LX || ETRAX100LX_V2)
--
--config ETRAX_ARCH_V32
-- bool
-- default y if ETRAXFS || ETRAXFS_SIM
-- default n if !(ETRAXFS || ETRAXFS_SIM)
--
--config ETRAX_DRAM_SIZE
-- int "DRAM size (dec, in MB)"
-- default "8"
-+config FOXBONE_LOOPBACK
-+ bool "FOXBONE Loopback module"
-+ depends on FOXBONE
- help
-- Size of DRAM (decimal in MB) typically 2, 8 or 16.
-+ Include this to be able to load the loopback module, that you can base your own driver on
-
--config ETRAX_FLASH_BUSWIDTH
-- int "Buswidth of NOR flash in bytes"
-- default "2"
-+config FOXBONE_MULTIPLY
-+ bool "FOXBONE Multiplier example"
-+ depends on FOXBONE
- help
-- Width in bytes of the NOR Flash bus (1, 2 or 4). Is usually 2.
-+ Include this to use the 64 bit multiplier
-
--config ETRAX_NANDFLASH_BUSWIDTH
-- int "Buswidth of NAND flash in bytes"
-- default "1"
-- help
-- Width in bytes of the NAND flash (1 or 2).
-+menu "FOXBONE interrupt handlers"
-+config FOXBONE_SAMPLE_ISR
-+ bool "FOXBONE example interrupt handlers"
-+ depends on FOXBONE
-+
-+config FOXBONE_INT14
-+ bool "Int 14 - bit 0 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-
--config ETRAX_FLASH1_SIZE
-- int "FLASH1 size (dec, in MB. 0 = Unknown)"
-- default "0"
-+config FOXBONE_INT31
-+ bool "Int 31 - bit 1 of reg 0x13 set"
-+ depends on FOXBONE_SAMPLE_ISR
-
--# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
--source arch/cris/arch/Kconfig
-+endmenu
-
--endmenu
--
--source "net/Kconfig"
--
--# bring in ETRAX built-in drivers
--menu "Drivers for built-in interfaces"
--# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
--source arch/cris/arch/drivers/Kconfig
-
-+config ETRAX_CMDLINE
-+ string "Kernel command line"
-+ default "root=/dev/mtdblock3 init=/linuxrc console=ttyS0"
-+ help
-+ use if no framebuffer is enabled console=ttyS0
-+ use if framebuffer is enabled console=tty0
-+
- endmenu
--
--source "drivers/base/Kconfig"
--
--# standard linux drivers
--source "drivers/mtd/Kconfig"
--
--source "drivers/parport/Kconfig"
--
--source "drivers/pnp/Kconfig"
--
--source "drivers/block/Kconfig"
--
--source "drivers/md/Kconfig"
--
--source "drivers/ide/Kconfig"
--
--source "drivers/scsi/Kconfig"
--
--source "drivers/ieee1394/Kconfig"
--
--source "drivers/message/i2o/Kconfig"
--
--source "drivers/net/Kconfig"
--
--source "drivers/isdn/Kconfig"
--
--source "drivers/telephony/Kconfig"
--
--source "drivers/cdrom/Kconfig"
--
--#
--# input before char - char/joystick depends on it. As does USB.
--#
--source "drivers/input/Kconfig"
--
--source "drivers/char/Kconfig"
--
--#source drivers/misc/Config.in
--source "drivers/media/Kconfig"
--
--source "fs/Kconfig"
--
--source "sound/Kconfig"
--
--source "drivers/pcmcia/Kconfig"
--
--source "drivers/pci/Kconfig"
--
--source "drivers/usb/Kconfig"
--
--source "arch/cris/Kconfig.debug"
--
--source "security/Kconfig"
--
--source "crypto/Kconfig"
--
--source "lib/Kconfig"
---- linux-2.6.19.2.orig/arch/cris/Kconfig 2007-06-16 23:58:14.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/Kconfig 2007-06-17 02:52:11.000000000 +0200
-@@ -242,3 +242,6 @@
- source "crypto/Kconfig"
-
- source "lib/Kconfig"
-+menu "Acmesystems"
-+source "drivers/fox-vhdl/Kconfig"
-+endmenu
-79a80
-> obj-$(CONFIG_FOX_VHDL) += fox-vhdl/
-diff -urN linux-2.6.19.2.orig/include/linux/foxbone_syscalls.h linux-2.6.19.2/include/linux/foxbone_syscalls.h
---- linux-2.6.19.2.orig/include/linux/foxbone_syscalls.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/include/linux/foxbone_syscalls.h 2007-06-17 03:31:39.000000000 +0200
-@@ -0,0 +1,18 @@
-+#ifndef __LINUX_SYSCALL_FOXBONE
-+#define __LINUX_SYSCALL_FOXBONE
-+#include <linux/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <asm/unistd.h>
-+
-+extern int errno;
-+_syscall1(void, foxbonereset, unsigned short int, reg);
-+_syscall1(unsigned short int, foxboneread, unsigned short int, reg);
-+_syscall2(void, foxbonewrite, unsigned short int, reg, unsigned short int, value);
-+_syscall3(void, foxbonebulkread, unsigned short int, reg, unsigned short int *, value, unsigned int, length);
-+_syscall3(void, foxbonebulkwrite, unsigned short int, reg, unsigned short int *, value, unsigned int, length);
-+_syscall2(void, foxboneintreg, unsigned long int, interrupt, unsigned char, state);
-+_syscall1(unsigned int, foxboneintcheck, unsigned long int, interrupt);
-+_syscall2(unsigned int, foxboneintwait, unsigned long int, interrupt, unsigned char, timeout);
-+
-+#endif
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/include/asm-cris/unistd.h linux-2.6.19.2/include/asm/unistd.h
---- linux-2.6.19.2.orig/include/asm-cris/unistd.h 2007-06-16 23:59:11.000000000 +0200
-+++ linux-2.6.19.2/include/asm/unistd.h 2007-06-17 03:43:10.000000000 +0200
-@@ -325,9 +325,52 @@
- #define __NR_getcpu 318
- #define __NR_epoll_pwait 319
-
-+#ifdef CONFIG_ETRAX_GPIO
-+ #ifdef CONFIG_FOXBONE
-+ #define __NR_gpiosetbits 320
-+ #define __NR_gpioclearbits 321
-+ #define __NR_gpiosetdir 322
-+ #define __NR_gpiotogglebit 323
-+ #define __NR_gpiogetbits 324
-+ #define __NR_foxboneread 325
-+ #define __NR_foxbonewrite 326
-+ #define __NR_foxbonebulkread 327
-+ #define __NR_foxbonebulkwrite 328
-+ #define __NR_foxbonereset 329
-+ #define __NR_foxboneintreg 330
-+ #define __NR_foxboneintcheck 331
-+ #define __NR_foxboneintwait 332
-+ #define NR_syscalls 333
-+
-+ #else
-+ #define __NR_gpiosetbits 320
-+ #define __NR_gpioclearbits 321
-+ #define __NR_gpiosetdir 322
-+ #define __NR_gpiotogglebit 323
-+ #define __NR_gpiogetbits 324
-+
-+ #define NR_syscalls 325
-+ #endif
-+#else
-+ #ifdef CONFIG_FOXBONE
-+ #define __NR_foxboneread 320
-+ #define __NR_foxbonewrite 321
-+ #define __NR_foxbonebulkread 322
-+ #define __NR_foxbonebulkwrite 323
-+ #define __NR_foxboneintreg 324
-+ #define __NR_foxboneintcheck 325
-+ #define __NR_foxboneintwait 326
-+
-+ #define NR_syscalls 327
-+
-+ #else
-+
-+ #define NR_syscalls 320
-+ #endif
-+#endif
-+
- #ifdef __KERNEL__
-
--#define NR_syscalls 320
-
- #include <asm/arch/unistd.h>
-
---- linux-2.6.19.2.orig/include/linux/gpio_syscalls.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/include/linux/gpio_syscalls.h 2007-06-17 03:44:49.000000000 +0200
-@@ -0,0 +1,75 @@
-+#ifndef __LINUX_SYSCALL_GPIO
-+#define __LINUX_SYSCALL_GPIO
-+#include <linux/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <asm/unistd.h>
-+
-+// port defines
-+#define PORTA 'A'
-+#define PORTB 'B'
-+#define PORTG 'G'
-+
-+//direction defines
-+#define DIRIN 'I'
-+#define DIROUT 'O'
-+
-+// pin defines for PORTG
-+#define PG0 (1<<0)
-+#define PG1 (1<<1)
-+#define PG2 (1<<2)
-+#define PG3 (1<<3)
-+#define PG4 (1<<4)
-+#define PG5 (1<<5)
-+#define PG6 (1<<6)
-+#define PG7 (1<<7)
-+#define PG8 (1<<8)
-+#define PG9 (1<<9)
-+#define PG10 (1<<10)
-+#define PG11 (1<<11)
-+#define PG12 (1<<12)
-+#define PG13 (1<<13)
-+#define PG14 (1<<14)
-+#define PG15 (1<<15)
-+#define PG16 (1<<16)
-+#define PG17 (1<<17)
-+#define PG18 (1<<18)
-+#define PG19 (1<<19)
-+#define PG20 (1<<20)
-+#define PG21 (1<<21)
-+#define PG22 (1<<22)
-+#define PG23 (1<<23)
-+#define PG24 (1<<24)
-+
-+#define PG8_15 0x00ff00
-+#define PG16_23 0xff0000
-+
-+
-+// pin defines for PORTA
-+#define PA0 (1<<0)
-+#define PA1 (1<<1)
-+#define PA2 (1<<2)
-+#define PA3 (1<<3)
-+#define PA4 (1<<4)
-+#define PA5 (1<<5)
-+#define PA6 (1<<6)
-+#define PA7 (1<<7)
-+
-+// pin defines for PORTB
-+#define PB0 (1<<0)
-+#define PB1 (1<<1)
-+#define PB2 (1<<2)
-+#define PB3 (1<<3)
-+#define PB4 (1<<4)
-+#define PB5 (1<<5)
-+#define PB6 (1<<6)
-+#define PB7 (1<<7)
-+
-+int errno;
-+_syscall2(void, gpiosetbits, unsigned char, port, unsigned int, bits);
-+_syscall2(void, gpioclearbits, unsigned char, port, unsigned int, bits);
-+_syscall3(void, gpiosetdir, unsigned char, port, unsigned char, dir, unsigned int, bits);
-+_syscall2(void, gpiotogglebit, unsigned char, port, unsigned int, bits);
-+_syscall2(unsigned int, gpiogetbits, unsigned char, port, unsigned int, bits);
-+
-+#endif
---- linux-2.6.19.2.orig/arch/cris/arch-v10/kernel/entry.S 2007-06-16 23:58:14.000000000 +0200
-+++ linux-2.6.19.2/arch/cris/arch-v10/kernel/entry.S 2007-06-17 03:48:21.000000000 +0200
-@@ -1200,6 +1200,23 @@
- .long sys_move_pages
- .long sys_getcpu
- .long sys_epoll_pwait
-+#ifdef CONFIG_ETRAX_GPIO
-+ .long sys_gpiosetbits
-+ .long sys_gpioclearbits
-+ .long sys_gpiosetdir
-+ .long sys_gpiotogglebit
-+ .long sys_gpiogetbits
-+#endif
-+#ifdef CONFIG_FOXBONE
-+ .long sys_foxboneread
-+ .long sys_foxbonewrite
-+ .long sys_foxbonebulkread
-+ .long sys_foxbonebulkwrite
-+ .long sys_foxbonereset
-+ .long sys_foxboneintreg
-+ .long sys_foxboneintcheck
-+ .long sys_foxboneintwait
-+#endif
-
- /*
- * NOTE!! This doesn't have to be exact - we just have
-diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio_syscalls.c linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio_syscalls.c
---- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio_syscalls.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio_syscalls.c 2007-06-17 04:09:15.000000000 +0200
-@@ -0,0 +1,192 @@
-+
-+#include <linux/autoconf.h>
-+
-+#include <linux/module.h>
-+#include <linux/sched.h>
-+#include <linux/slab.h>
-+#include <linux/ioport.h>
-+#include <linux/errno.h>
-+#include <linux/kernel.h>
-+#include <linux/fs.h>
-+#include <linux/string.h>
-+#include <linux/poll.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+
-+#include <asm/uaccess.h>
-+#include <linux/gpio_syscalls.h>
-+
-+#include <asm/etraxgpio.h>
-+#include <asm/arch/svinto.h>
-+#include <asm/io.h>
-+#include <asm/system.h>
-+#include <asm/irq.h>
-+#include <asm/arch/io_interface_mux.h>
-+
-+#include <asm/unistd.h>
-+
-+
-+extern int errno;
-+
-+
-+asmlinkage void sys_gpiosetbits(unsigned char port, unsigned int bits){
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ *R_PORT_G_DATA = port_g_data_shadow |= bits;
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ *R_PORT_PA_DATA = port_pa_data_shadow |= bits;
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ *R_PORT_PB_DATA = port_pb_data_shadow |= bits;
-+ break;
-+
-+ };
-+};
-+
-+
-+asmlinkage void sys_gpioclearbits(unsigned char port, unsigned int bits){
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~bits;
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ *R_PORT_PA_DATA = port_pa_data_shadow &= ~bits;
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ *R_PORT_PB_DATA = port_pb_data_shadow &= ~bits;
-+ break;
-+
-+ };
-+};
-+
-+asmlinkage void sys_gpiosetdir(unsigned char port, unsigned char dir, unsigned int bits){
-+ if((dir=='I' )||(dir=='i')){
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ if(bits & (1<<0)){
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g0dir);
-+ };
-+ if((bits & 0x0000FF00)==0x0000FF00){
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g8_15dir);
-+ };
-+ if((bits & 0x00FF0000)==0x00FF0000){
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g16_23dir);
-+ };
-+ if(bits & (1<<24)){
-+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g24dir);
-+ };
-+ *R_GEN_CONFIG = genconfig_shadow;
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ *R_PORT_PA_DIR = port_pa_dir_shadow &= ~(bits & 0xff);
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ *R_PORT_PB_DIR = port_pb_dir_shadow &= ~(bits & 0xff);
-+ break;
-+ };
-+ } else if((dir=='O' )||(dir=='o')){
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ if(bits & (1<<0)){
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g0dir);
-+ };
-+ if((bits & 0x0000FF00)==0x0000FF00){
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g8_15dir);
-+ };
-+ if((bits & 0x00FF0000)==0x00FF0000){
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g8_15dir);
-+ };
-+ if(bits & (1<<24)){
-+ genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g24dir);
-+ };
-+ *R_GEN_CONFIG = genconfig_shadow;
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ *R_PORT_PA_DIR = port_pa_dir_shadow |= (bits & 0xff);
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ *R_PORT_PB_DIR = port_pb_dir_shadow |= (bits & 0xff);
-+ break;
-+ };
-+ };
-+};
-+
-+
-+asmlinkage void sys_gpiotogglebit(unsigned char port, unsigned int bits){
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ if(port_g_data_shadow & bits){
-+ *R_PORT_G_DATA = port_g_data_shadow &= ~bits;
-+ } else {
-+ *R_PORT_G_DATA = port_g_data_shadow |= bits;
-+ };
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ if(*R_PORT_PA_DATA & bits){
-+ *R_PORT_PA_DATA = port_pa_data_shadow &= ~(bits & 0xff);
-+ } else {
-+ *R_PORT_PA_DATA = port_pa_data_shadow |= (bits & 0xff);
-+ };
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ if(*R_PORT_PB_DATA & bits){
-+ *R_PORT_PB_DATA = port_pb_data_shadow &= ~(bits & 0xff);
-+ } else {
-+ *R_PORT_PB_DATA = port_pb_data_shadow |= (bits & 0xff);
-+ };
-+ break;
-+
-+ };
-+};
-+
-+
-+asmlinkage unsigned int sys_gpiogetbits(unsigned char port, unsigned int bits){
-+ unsigned int data = 0;
-+ switch(port){
-+ case 'G':
-+ case 'g':
-+ data = *R_PORT_G_DATA;
-+ break;
-+
-+ case 'A':
-+ case 'a':
-+ data = *R_PORT_PA_DATA;
-+ break;
-+
-+ case 'B':
-+ case 'b':
-+ data = *R_PORT_PB_DATA;
-+ break;
-+
-+ };
-+ data &= bits;
-+ return data;
-+};
-+
-+
-Only in linux-2.6.19.2/arch/cris/arch-v10/drivers/: gpio_syscalls.c
-diff linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/Makefile linux-2.6.19.2/arch/cris/arch-v10/drivers/Makefile
-8a9
-> obj-$(CONFIG_ETRAX_GPIO) += gpio_syscalls.o
+++ /dev/null
-diff -urN linux-2.6.19.old/fs/Kconfig linux-2.6.19.dev/fs/Kconfig
---- linux-2.6.19.old/fs/Kconfig 2006-12-14 03:13:16.000000000 +0100
-+++ linux-2.6.19.dev/fs/Kconfig 2006-12-14 03:13:16.000000000 +0100
-@@ -1457,6 +1457,71 @@
-
- If unsure, say N.
-
-+config SQUASHFS
-+ tristate "SquashFS 3.0 - Squashed file system support"
-+ select ZLIB_INFLATE
-+ help
-+ Saying Y here includes support for SquashFS 3.0 (a Compressed Read-Only File
-+ System). Squashfs is a highly compressed read-only filesystem for Linux.
-+ It uses zlib compression to compress both files, inodes and directories.
-+ Inodes in the system are very small and all blocks are packed to minimise
-+ data overhead. Block sizes greater than 4K are supported up to a maximum of 64K.
-+ SquashFS 3.0 supports 64 bit filesystems and files (larger than 4GB), full
-+ uid/gid information, hard links and timestamps.
-+
-+ Squashfs is intended for general read-only filesystem use, for archival
-+ use (i.e. in cases where a .tar.gz file may be used), and in embedded
-+ systems where low overhead is needed. Further information and filesystem tools
-+ are available from http://squashfs.sourceforge.net.
-+
-+ If you want to compile this as a module ( = code which can be
-+ inserted in and removed from the running kernel whenever you want),
-+ say M here and read <file:Documentation/modules.txt>. The module
-+ will be called squashfs. Note that the root file system (the one
-+ containing the directory /) cannot be compiled as a module.
-+
-+ If unsure, say N.
-+
-+config SQUASHFS_EMBEDDED
-+
-+ bool "Additional options for memory-constrained systems"
-+ depends on SQUASHFS
-+ default n
-+ help
-+ Saying Y here allows you to specify cache sizes and how Squashfs
-+ allocates memory. This is only intended for memory constrained
-+ systems.
-+
-+ If unsure, say N.
-+
-+config SQUASHFS_FRAGMENT_CACHE_SIZE
-+ int "Number of fragments cached" if SQUASHFS_EMBEDDED
-+ depends on SQUASHFS
-+ default "3"
-+ help
-+ By default SquashFS caches the last 3 fragments read from
-+ the filesystem. Increasing this amount may mean SquashFS
-+ has to re-read fragments less often from disk, at the expense
-+ of extra system memory. Decreasing this amount will mean
-+ SquashFS uses less memory at the expense of extra reads from disk.
-+
-+ Note there must be at least one cached fragment. Anything
-+ much more than three will probably not make much difference.
-+
-+config SQUASHFS_VMALLOC
-+ bool "Use Vmalloc rather than Kmalloc" if SQUASHFS_EMBEDDED
-+ depends on SQUASHFS
-+ default n
-+ help
-+ By default SquashFS uses kmalloc to obtain fragment cache memory.
-+ Kmalloc memory is the standard kernel allocator, but it can fail
-+ on memory constrained systems. Because of the way Vmalloc works,
-+ Vmalloc can succeed when kmalloc fails. Specifying this option
-+ will make SquashFS always use Vmalloc to allocate the
-+ fragment cache memory.
-+
-+ If unsure, say N.
-+
- config VXFS_FS
- tristate "FreeVxFS file system support (VERITAS VxFS(TM) compatible)"
- depends on BLOCK
-diff -urN linux-2.6.19.old/fs/Makefile linux-2.6.19.dev/fs/Makefile
---- linux-2.6.19.old/fs/Makefile 2006-12-14 03:13:16.000000000 +0100
-+++ linux-2.6.19.dev/fs/Makefile 2006-12-14 03:13:16.000000000 +0100
-@@ -67,6 +67,7 @@
- obj-$(CONFIG_JBD2) += jbd2/
- obj-$(CONFIG_EXT2_FS) += ext2/
- obj-$(CONFIG_CRAMFS) += cramfs/
-+obj-$(CONFIG_SQUASHFS) += squashfs/
- obj-$(CONFIG_RAMFS) += ramfs/
- obj-$(CONFIG_HUGETLBFS) += hugetlbfs/
- obj-$(CONFIG_CODA_FS) += coda/
-diff -urN linux-2.6.19.old/fs/squashfs/inode.c linux-2.6.19.dev/fs/squashfs/inode.c
---- linux-2.6.19.old/fs/squashfs/inode.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/inode.c 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,2124 @@
-+/*
-+ * Squashfs - a compressed read only filesystem for Linux
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * inode.c
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/squashfs_fs.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/slab.h>
-+#include <linux/fs.h>
-+#include <linux/smp_lock.h>
-+#include <linux/slab.h>
-+#include <linux/squashfs_fs_sb.h>
-+#include <linux/squashfs_fs_i.h>
-+#include <linux/buffer_head.h>
-+#include <linux/vfs.h>
-+#include <linux/init.h>
-+#include <linux/dcache.h>
-+#include <linux/wait.h>
-+#include <linux/zlib.h>
-+#include <linux/blkdev.h>
-+#include <linux/vmalloc.h>
-+#include <asm/uaccess.h>
-+#include <asm/semaphore.h>
-+
-+#include "squashfs.h"
-+
-+static void squashfs_put_super(struct super_block *);
-+static int squashfs_statfs(struct dentry *, struct kstatfs *);
-+static int squashfs_symlink_readpage(struct file *file, struct page *page);
-+static int squashfs_readpage(struct file *file, struct page *page);
-+static int squashfs_readpage4K(struct file *file, struct page *page);
-+static int squashfs_readdir(struct file *, void *, filldir_t);
-+static struct inode *squashfs_alloc_inode(struct super_block *sb);
-+static void squashfs_destroy_inode(struct inode *inode);
-+static int init_inodecache(void);
-+static void destroy_inodecache(void);
-+static struct dentry *squashfs_lookup(struct inode *, struct dentry *,
-+ struct nameidata *);
-+static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode);
-+static long long read_blocklist(struct inode *inode, int index,
-+ int readahead_blks, char *block_list,
-+ unsigned short **block_p, unsigned int *bsize);
-+static int squashfs_get_sb(struct file_system_type *, int,
-+ const char *, void *, struct vfsmount *);
-+
-+
-+static z_stream stream;
-+
-+static struct file_system_type squashfs_fs_type = {
-+ .owner = THIS_MODULE,
-+ .name = "squashfs",
-+ .get_sb = squashfs_get_sb,
-+ .kill_sb = kill_block_super,
-+ .fs_flags = FS_REQUIRES_DEV
-+};
-+
-+static unsigned char squashfs_filetype_table[] = {
-+ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK
-+};
-+
-+static struct super_operations squashfs_ops = {
-+ .alloc_inode = squashfs_alloc_inode,
-+ .destroy_inode = squashfs_destroy_inode,
-+ .statfs = squashfs_statfs,
-+ .put_super = squashfs_put_super,
-+};
-+
-+SQSH_EXTERN struct address_space_operations squashfs_symlink_aops = {
-+ .readpage = squashfs_symlink_readpage
-+};
-+
-+SQSH_EXTERN struct address_space_operations squashfs_aops = {
-+ .readpage = squashfs_readpage
-+};
-+
-+SQSH_EXTERN struct address_space_operations squashfs_aops_4K = {
-+ .readpage = squashfs_readpage4K
-+};
-+
-+static struct file_operations squashfs_dir_ops = {
-+ .read = generic_read_dir,
-+ .readdir = squashfs_readdir
-+};
-+
-+SQSH_EXTERN struct inode_operations squashfs_dir_inode_ops = {
-+ .lookup = squashfs_lookup
-+};
-+
-+
-+static struct buffer_head *get_block_length(struct super_block *s,
-+ int *cur_index, int *offset, int *c_byte)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ unsigned short temp;
-+ struct buffer_head *bh;
-+
-+ if (!(bh = sb_bread(s, *cur_index)))
-+ goto out;
-+
-+ if (msblk->devblksize - *offset == 1) {
-+ if (msblk->swap)
-+ ((unsigned char *) &temp)[1] = *((unsigned char *)
-+ (bh->b_data + *offset));
-+ else
-+ ((unsigned char *) &temp)[0] = *((unsigned char *)
-+ (bh->b_data + *offset));
-+ brelse(bh);
-+ if (!(bh = sb_bread(s, ++(*cur_index))))
-+ goto out;
-+ if (msblk->swap)
-+ ((unsigned char *) &temp)[0] = *((unsigned char *)
-+ bh->b_data);
-+ else
-+ ((unsigned char *) &temp)[1] = *((unsigned char *)
-+ bh->b_data);
-+ *c_byte = temp;
-+ *offset = 1;
-+ } else {
-+ if (msblk->swap) {
-+ ((unsigned char *) &temp)[1] = *((unsigned char *)
-+ (bh->b_data + *offset));
-+ ((unsigned char *) &temp)[0] = *((unsigned char *)
-+ (bh->b_data + *offset + 1));
-+ } else {
-+ ((unsigned char *) &temp)[0] = *((unsigned char *)
-+ (bh->b_data + *offset));
-+ ((unsigned char *) &temp)[1] = *((unsigned char *)
-+ (bh->b_data + *offset + 1));
-+ }
-+ *c_byte = temp;
-+ *offset += 2;
-+ }
-+
-+ if (SQUASHFS_CHECK_DATA(msblk->sblk.flags)) {
-+ if (*offset == msblk->devblksize) {
-+ brelse(bh);
-+ if (!(bh = sb_bread(s, ++(*cur_index))))
-+ goto out;
-+ *offset = 0;
-+ }
-+ if (*((unsigned char *) (bh->b_data + *offset)) !=
-+ SQUASHFS_MARKER_BYTE) {
-+ ERROR("Metadata block marker corrupt @ %x\n",
-+ *cur_index);
-+ brelse(bh);
-+ goto out;
-+ }
-+ (*offset)++;
-+ }
-+ return bh;
-+
-+out:
-+ return NULL;
-+}
-+
-+
-+SQSH_EXTERN unsigned int squashfs_read_data(struct super_block *s, char *buffer,
-+ long long index, unsigned int length,
-+ long long *next_index)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct buffer_head *bh[((SQUASHFS_FILE_MAX_SIZE - 1) >>
-+ msblk->devblksize_log2) + 2];
-+ unsigned int offset = index & ((1 << msblk->devblksize_log2) - 1);
-+ unsigned int cur_index = index >> msblk->devblksize_log2;
-+ int bytes, avail_bytes, b = 0, k;
-+ char *c_buffer;
-+ unsigned int compressed;
-+ unsigned int c_byte = length;
-+
-+ if (c_byte) {
-+ bytes = msblk->devblksize - offset;
-+ compressed = SQUASHFS_COMPRESSED_BLOCK(c_byte);
-+ c_buffer = compressed ? msblk->read_data : buffer;
-+ c_byte = SQUASHFS_COMPRESSED_SIZE_BLOCK(c_byte);
-+
-+ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed
-+ ? "" : "un", (unsigned int) c_byte);
-+
-+ if (!(bh[0] = sb_getblk(s, cur_index)))
-+ goto block_release;
-+
-+ for (b = 1; bytes < c_byte; b++) {
-+ if (!(bh[b] = sb_getblk(s, ++cur_index)))
-+ goto block_release;
-+ bytes += msblk->devblksize;
-+ }
-+ ll_rw_block(READ, b, bh);
-+ } else {
-+ if (!(bh[0] = get_block_length(s, &cur_index, &offset,
-+ &c_byte)))
-+ goto read_failure;
-+
-+ bytes = msblk->devblksize - offset;
-+ compressed = SQUASHFS_COMPRESSED(c_byte);
-+ c_buffer = compressed ? msblk->read_data : buffer;
-+ c_byte = SQUASHFS_COMPRESSED_SIZE(c_byte);
-+
-+ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed
-+ ? "" : "un", (unsigned int) c_byte);
-+
-+ for (b = 1; bytes < c_byte; b++) {
-+ if (!(bh[b] = sb_getblk(s, ++cur_index)))
-+ goto block_release;
-+ bytes += msblk->devblksize;
-+ }
-+ ll_rw_block(READ, b - 1, bh + 1);
-+ }
-+
-+ if (compressed)
-+ down(&msblk->read_data_mutex);
-+
-+ for (bytes = 0, k = 0; k < b; k++) {
-+ avail_bytes = (c_byte - bytes) > (msblk->devblksize - offset) ?
-+ msblk->devblksize - offset :
-+ c_byte - bytes;
-+ wait_on_buffer(bh[k]);
-+ if (!buffer_uptodate(bh[k]))
-+ goto block_release;
-+ memcpy(c_buffer + bytes, bh[k]->b_data + offset, avail_bytes);
-+ bytes += avail_bytes;
-+ offset = 0;
-+ brelse(bh[k]);
-+ }
-+
-+ /*
-+ * uncompress block
-+ */
-+ if (compressed) {
-+ int zlib_err;
-+
-+ stream.next_in = c_buffer;
-+ stream.avail_in = c_byte;
-+ stream.next_out = buffer;
-+ stream.avail_out = msblk->read_size;
-+
-+ if (((zlib_err = zlib_inflateInit(&stream)) != Z_OK) ||
-+ ((zlib_err = zlib_inflate(&stream, Z_FINISH))
-+ != Z_STREAM_END) || ((zlib_err =
-+ zlib_inflateEnd(&stream)) != Z_OK)) {
-+ ERROR("zlib_fs returned unexpected result 0x%x\n",
-+ zlib_err);
-+ bytes = 0;
-+ } else
-+ bytes = stream.total_out;
-+
-+ up(&msblk->read_data_mutex);
-+ }
-+
-+ if (next_index)
-+ *next_index = index + c_byte + (length ? 0 :
-+ (SQUASHFS_CHECK_DATA(msblk->sblk.flags)
-+ ? 3 : 2));
-+ return bytes;
-+
-+block_release:
-+ while (--b >= 0)
-+ brelse(bh[b]);
-+
-+read_failure:
-+ ERROR("sb_bread failed reading block 0x%x\n", cur_index);
-+ return 0;
-+}
-+
-+
-+SQSH_EXTERN int squashfs_get_cached_block(struct super_block *s, char *buffer,
-+ long long block, unsigned int offset,
-+ int length, long long *next_block,
-+ unsigned int *next_offset)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ int n, i, bytes, return_length = length;
-+ long long next_index;
-+
-+ TRACE("Entered squashfs_get_cached_block [%llx:%x]\n", block, offset);
-+
-+ while ( 1 ) {
-+ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
-+ if (msblk->block_cache[i].block == block)
-+ break;
-+
-+ down(&msblk->block_cache_mutex);
-+
-+ if (i == SQUASHFS_CACHED_BLKS) {
-+ /* read inode header block */
-+ for (i = msblk->next_cache, n = SQUASHFS_CACHED_BLKS;
-+ n ; n --, i = (i + 1) %
-+ SQUASHFS_CACHED_BLKS)
-+ if (msblk->block_cache[i].block !=
-+ SQUASHFS_USED_BLK)
-+ break;
-+
-+ if (n == 0) {
-+ wait_queue_t wait;
-+
-+ init_waitqueue_entry(&wait, current);
-+ add_wait_queue(&msblk->waitq, &wait);
-+ set_current_state(TASK_UNINTERRUPTIBLE);
-+ up(&msblk->block_cache_mutex);
-+ schedule();
-+ set_current_state(TASK_RUNNING);
-+ remove_wait_queue(&msblk->waitq, &wait);
-+ continue;
-+ }
-+ msblk->next_cache = (i + 1) % SQUASHFS_CACHED_BLKS;
-+
-+ if (msblk->block_cache[i].block ==
-+ SQUASHFS_INVALID_BLK) {
-+ if (!(msblk->block_cache[i].data =
-+ kmalloc(SQUASHFS_METADATA_SIZE,
-+ GFP_KERNEL))) {
-+ ERROR("Failed to allocate cache"
-+ "block\n");
-+ up(&msblk->block_cache_mutex);
-+ goto out;
-+ }
-+ }
-+
-+ msblk->block_cache[i].block = SQUASHFS_USED_BLK;
-+ up(&msblk->block_cache_mutex);
-+
-+ if (!(msblk->block_cache[i].length =
-+ squashfs_read_data(s,
-+ msblk->block_cache[i].data,
-+ block, 0, &next_index))) {
-+ ERROR("Unable to read cache block [%llx:%x]\n",
-+ block, offset);
-+ goto out;
-+ }
-+
-+ down(&msblk->block_cache_mutex);
-+ wake_up(&msblk->waitq);
-+ msblk->block_cache[i].block = block;
-+ msblk->block_cache[i].next_index = next_index;
-+ TRACE("Read cache block [%llx:%x]\n", block, offset);
-+ }
-+
-+ if (msblk->block_cache[i].block != block) {
-+ up(&msblk->block_cache_mutex);
-+ continue;
-+ }
-+
-+ if ((bytes = msblk->block_cache[i].length - offset) >= length) {
-+ if (buffer)
-+ memcpy(buffer, msblk->block_cache[i].data +
-+ offset, length);
-+ if (msblk->block_cache[i].length - offset == length) {
-+ *next_block = msblk->block_cache[i].next_index;
-+ *next_offset = 0;
-+ } else {
-+ *next_block = block;
-+ *next_offset = offset + length;
-+ }
-+ up(&msblk->block_cache_mutex);
-+ goto finish;
-+ } else {
-+ if (buffer) {
-+ memcpy(buffer, msblk->block_cache[i].data +
-+ offset, bytes);
-+ buffer += bytes;
-+ }
-+ block = msblk->block_cache[i].next_index;
-+ up(&msblk->block_cache_mutex);
-+ length -= bytes;
-+ offset = 0;
-+ }
-+ }
-+
-+finish:
-+ return return_length;
-+out:
-+ return 0;
-+}
-+
-+
-+static int get_fragment_location(struct super_block *s, unsigned int fragment,
-+ long long *fragment_start_block,
-+ unsigned int *fragment_size)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ long long start_block =
-+ msblk->fragment_index[SQUASHFS_FRAGMENT_INDEX(fragment)];
-+ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET(fragment);
-+ struct squashfs_fragment_entry fragment_entry;
-+
-+ if (msblk->swap) {
-+ struct squashfs_fragment_entry sfragment_entry;
-+
-+ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry,
-+ start_block, offset,
-+ sizeof(sfragment_entry), &start_block,
-+ &offset))
-+ goto out;
-+ SQUASHFS_SWAP_FRAGMENT_ENTRY(&fragment_entry, &sfragment_entry);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *) &fragment_entry,
-+ start_block, offset,
-+ sizeof(fragment_entry), &start_block,
-+ &offset))
-+ goto out;
-+
-+ *fragment_start_block = fragment_entry.start_block;
-+ *fragment_size = fragment_entry.size;
-+
-+ return 1;
-+
-+out:
-+ return 0;
-+}
-+
-+
-+SQSH_EXTERN void release_cached_fragment(struct squashfs_sb_info *msblk, struct
-+ squashfs_fragment_cache *fragment)
-+{
-+ down(&msblk->fragment_mutex);
-+ fragment->locked --;
-+ wake_up(&msblk->fragment_wait_queue);
-+ up(&msblk->fragment_mutex);
-+}
-+
-+
-+SQSH_EXTERN struct squashfs_fragment_cache *get_cached_fragment(struct super_block
-+ *s, long long start_block,
-+ int length)
-+{
-+ int i, n;
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+
-+ while ( 1 ) {
-+ down(&msblk->fragment_mutex);
-+
-+ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS &&
-+ msblk->fragment[i].block != start_block; i++);
-+
-+ if (i == SQUASHFS_CACHED_FRAGMENTS) {
-+ for (i = msblk->next_fragment, n =
-+ SQUASHFS_CACHED_FRAGMENTS; n &&
-+ msblk->fragment[i].locked; n--, i = (i + 1) %
-+ SQUASHFS_CACHED_FRAGMENTS);
-+
-+ if (n == 0) {
-+ wait_queue_t wait;
-+
-+ init_waitqueue_entry(&wait, current);
-+ add_wait_queue(&msblk->fragment_wait_queue,
-+ &wait);
-+ set_current_state(TASK_UNINTERRUPTIBLE);
-+ up(&msblk->fragment_mutex);
-+ schedule();
-+ set_current_state(TASK_RUNNING);
-+ remove_wait_queue(&msblk->fragment_wait_queue,
-+ &wait);
-+ continue;
-+ }
-+ msblk->next_fragment = (msblk->next_fragment + 1) %
-+ SQUASHFS_CACHED_FRAGMENTS;
-+
-+ if (msblk->fragment[i].data == NULL)
-+ if (!(msblk->fragment[i].data = SQUASHFS_ALLOC
-+ (SQUASHFS_FILE_MAX_SIZE))) {
-+ ERROR("Failed to allocate fragment "
-+ "cache block\n");
-+ up(&msblk->fragment_mutex);
-+ goto out;
-+ }
-+
-+ msblk->fragment[i].block = SQUASHFS_INVALID_BLK;
-+ msblk->fragment[i].locked = 1;
-+ up(&msblk->fragment_mutex);
-+
-+ if (!(msblk->fragment[i].length = squashfs_read_data(s,
-+ msblk->fragment[i].data,
-+ start_block, length, NULL))) {
-+ ERROR("Unable to read fragment cache block "
-+ "[%llx]\n", start_block);
-+ msblk->fragment[i].locked = 0;
-+ goto out;
-+ }
-+
-+ msblk->fragment[i].block = start_block;
-+ TRACE("New fragment %d, start block %lld, locked %d\n",
-+ i, msblk->fragment[i].block,
-+ msblk->fragment[i].locked);
-+ break;
-+ }
-+
-+ msblk->fragment[i].locked++;
-+ up(&msblk->fragment_mutex);
-+ TRACE("Got fragment %d, start block %lld, locked %d\n", i,
-+ msblk->fragment[i].block,
-+ msblk->fragment[i].locked);
-+ break;
-+ }
-+
-+ return &msblk->fragment[i];
-+
-+out:
-+ return NULL;
-+}
-+
-+
-+static struct inode *squashfs_new_inode(struct super_block *s,
-+ struct squashfs_base_inode_header *inodeb)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct inode *i = new_inode(s);
-+
-+ if (i) {
-+ i->i_ino = inodeb->inode_number;
-+ i->i_mtime.tv_sec = inodeb->mtime;
-+ i->i_atime.tv_sec = inodeb->mtime;
-+ i->i_ctime.tv_sec = inodeb->mtime;
-+ i->i_uid = msblk->uid[inodeb->uid];
-+ i->i_mode = inodeb->mode;
-+ i->i_size = 0;
-+ if (inodeb->guid == SQUASHFS_GUIDS)
-+ i->i_gid = i->i_uid;
-+ else
-+ i->i_gid = msblk->guid[inodeb->guid];
-+ }
-+
-+ return i;
-+}
-+
-+
-+static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode)
-+{
-+ struct inode *i;
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ long long block = SQUASHFS_INODE_BLK(inode) +
-+ sblk->inode_table_start;
-+ unsigned int offset = SQUASHFS_INODE_OFFSET(inode);
-+ long long next_block;
-+ unsigned int next_offset;
-+ union squashfs_inode_header id, sid;
-+ struct squashfs_base_inode_header *inodeb = &id.base,
-+ *sinodeb = &sid.base;
-+
-+ TRACE("Entered squashfs_iget\n");
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *) sinodeb, block,
-+ offset, sizeof(*sinodeb), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_BASE_INODE_HEADER(inodeb, sinodeb,
-+ sizeof(*sinodeb));
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *) inodeb, block,
-+ offset, sizeof(*inodeb), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ switch(inodeb->inode_type) {
-+ case SQUASHFS_FILE_TYPE: {
-+ unsigned int frag_size;
-+ long long frag_blk;
-+ struct squashfs_reg_inode_header *inodep = &id.reg;
-+ struct squashfs_reg_inode_header *sinodep = &sid.reg;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_REG_INODE_HEADER(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ frag_blk = SQUASHFS_INVALID_BLK;
-+ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
-+ !get_fragment_location(s,
-+ inodep->fragment, &frag_blk, &frag_size))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = 1;
-+ i->i_size = inodep->file_size;
-+ i->i_fop = &generic_ro_fops;
-+ i->i_mode |= S_IFREG;
-+ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
-+ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
-+ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
-+ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
-+ SQUASHFS_I(i)->offset = next_offset;
-+ if (sblk->block_size > 4096)
-+ i->i_data.a_ops = &squashfs_aops;
-+ else
-+ i->i_data.a_ops = &squashfs_aops_4K;
-+
-+ TRACE("File inode %x:%x, start_block %llx, "
-+ "block_list_start %llx, offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->start_block, next_block,
-+ next_offset);
-+ break;
-+ }
-+ case SQUASHFS_LREG_TYPE: {
-+ unsigned int frag_size;
-+ long long frag_blk;
-+ struct squashfs_lreg_inode_header *inodep = &id.lreg;
-+ struct squashfs_lreg_inode_header *sinodep = &sid.lreg;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_LREG_INODE_HEADER(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ frag_blk = SQUASHFS_INVALID_BLK;
-+ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
-+ !get_fragment_location(s,
-+ inodep->fragment, &frag_blk, &frag_size))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_size = inodep->file_size;
-+ i->i_fop = &generic_ro_fops;
-+ i->i_mode |= S_IFREG;
-+ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
-+ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
-+ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
-+ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
-+ SQUASHFS_I(i)->offset = next_offset;
-+ if (sblk->block_size > 4096)
-+ i->i_data.a_ops = &squashfs_aops;
-+ else
-+ i->i_data.a_ops = &squashfs_aops_4K;
-+
-+ TRACE("File inode %x:%x, start_block %llx, "
-+ "block_list_start %llx, offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->start_block, next_block,
-+ next_offset);
-+ break;
-+ }
-+ case SQUASHFS_DIR_TYPE: {
-+ struct squashfs_dir_inode_header *inodep = &id.dir;
-+ struct squashfs_dir_inode_header *sinodep = &sid.dir;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_DIR_INODE_HEADER(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_size = inodep->file_size;
-+ i->i_op = &squashfs_dir_inode_ops;
-+ i->i_fop = &squashfs_dir_ops;
-+ i->i_mode |= S_IFDIR;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->offset = inodep->offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_count = 0;
-+ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode;
-+
-+ TRACE("Directory inode %x:%x, start_block %x, offset "
-+ "%x\n", SQUASHFS_INODE_BLK(inode),
-+ offset, inodep->start_block,
-+ inodep->offset);
-+ break;
-+ }
-+ case SQUASHFS_LDIR_TYPE: {
-+ struct squashfs_ldir_inode_header *inodep = &id.ldir;
-+ struct squashfs_ldir_inode_header *sinodep = &sid.ldir;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_LDIR_INODE_HEADER(inodep,
-+ sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_size = inodep->file_size;
-+ i->i_op = &squashfs_dir_inode_ops;
-+ i->i_fop = &squashfs_dir_ops;
-+ i->i_mode |= S_IFDIR;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->offset = inodep->offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_start = next_block;
-+ SQUASHFS_I(i)->u.s2.directory_index_offset =
-+ next_offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_count =
-+ inodep->i_count;
-+ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode;
-+
-+ TRACE("Long directory inode %x:%x, start_block %x, "
-+ "offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->start_block, inodep->offset);
-+ break;
-+ }
-+ case SQUASHFS_SYMLINK_TYPE: {
-+ struct squashfs_symlink_inode_header *inodep =
-+ &id.symlink;
-+ struct squashfs_symlink_inode_header *sinodep =
-+ &sid.symlink;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_SYMLINK_INODE_HEADER(inodep,
-+ sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_size = inodep->symlink_size;
-+ i->i_op = &page_symlink_inode_operations;
-+ i->i_data.a_ops = &squashfs_symlink_aops;
-+ i->i_mode |= S_IFLNK;
-+ SQUASHFS_I(i)->start_block = next_block;
-+ SQUASHFS_I(i)->offset = next_offset;
-+
-+ TRACE("Symbolic link inode %x:%x, start_block %llx, "
-+ "offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ next_block, next_offset);
-+ break;
-+ }
-+ case SQUASHFS_BLKDEV_TYPE:
-+ case SQUASHFS_CHRDEV_TYPE: {
-+ struct squashfs_dev_inode_header *inodep = &id.dev;
-+ struct squashfs_dev_inode_header *sinodep = &sid.dev;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_DEV_INODE_HEADER(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if ((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_mode |= (inodeb->inode_type ==
-+ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR :
-+ S_IFBLK;
-+ init_special_inode(i, i->i_mode,
-+ old_decode_dev(inodep->rdev));
-+
-+ TRACE("Device inode %x:%x, rdev %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->rdev);
-+ break;
-+ }
-+ case SQUASHFS_FIFO_TYPE:
-+ case SQUASHFS_SOCKET_TYPE: {
-+ struct squashfs_ipc_inode_header *inodep = &id.ipc;
-+ struct squashfs_ipc_inode_header *sinodep = &sid.ipc;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_IPC_INODE_HEADER(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if ((i = squashfs_new_inode(s, inodeb)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_nlink = inodep->nlink;
-+ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE)
-+ ? S_IFIFO : S_IFSOCK;
-+ init_special_inode(i, i->i_mode, 0);
-+ break;
-+ }
-+ default:
-+ ERROR("Unknown inode type %d in squashfs_iget!\n",
-+ inodeb->inode_type);
-+ goto failed_read1;
-+ }
-+
-+ insert_inode_hash(i);
-+ return i;
-+
-+failed_read:
-+ ERROR("Unable to read inode [%llx:%x]\n", block, offset);
-+
-+failed_read1:
-+ return NULL;
-+}
-+
-+
-+static int read_fragment_index_table(struct super_block *s)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+
-+ /* Allocate fragment index table */
-+ if (!(msblk->fragment_index = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES
-+ (sblk->fragments), GFP_KERNEL))) {
-+ ERROR("Failed to allocate uid/gid table\n");
-+ return 0;
-+ }
-+
-+ if (SQUASHFS_FRAGMENT_INDEX_BYTES(sblk->fragments) &&
-+ !squashfs_read_data(s, (char *)
-+ msblk->fragment_index,
-+ sblk->fragment_table_start,
-+ SQUASHFS_FRAGMENT_INDEX_BYTES
-+ (sblk->fragments) |
-+ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
-+ ERROR("unable to read fragment index table\n");
-+ return 0;
-+ }
-+
-+ if (msblk->swap) {
-+ int i;
-+ long long fragment;
-+
-+ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES(sblk->fragments);
-+ i++) {
-+ SQUASHFS_SWAP_FRAGMENT_INDEXES((&fragment),
-+ &msblk->fragment_index[i], 1);
-+ msblk->fragment_index[i] = fragment;
-+ }
-+ }
-+
-+ return 1;
-+}
-+
-+
-+static int supported_squashfs_filesystem(struct squashfs_sb_info *msblk, int silent)
-+{
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+
-+ msblk->iget = squashfs_iget;
-+ msblk->read_blocklist = read_blocklist;
-+ msblk->read_fragment_index_table = read_fragment_index_table;
-+
-+ if (sblk->s_major == 1) {
-+ if (!squashfs_1_0_supported(msblk)) {
-+ SERROR("Major/Minor mismatch, Squashfs 1.0 filesystems "
-+ "are unsupported\n");
-+ SERROR("Please recompile with "
-+ "Squashfs 1.0 support enabled\n");
-+ return 0;
-+ }
-+ } else if (sblk->s_major == 2) {
-+ if (!squashfs_2_0_supported(msblk)) {
-+ SERROR("Major/Minor mismatch, Squashfs 2.0 filesystems "
-+ "are unsupported\n");
-+ SERROR("Please recompile with "
-+ "Squashfs 2.0 support enabled\n");
-+ return 0;
-+ }
-+ } else if(sblk->s_major != SQUASHFS_MAJOR || sblk->s_minor >
-+ SQUASHFS_MINOR) {
-+ SERROR("Major/Minor mismatch, trying to mount newer %d.%d "
-+ "filesystem\n", sblk->s_major, sblk->s_minor);
-+ SERROR("Please update your kernel\n");
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+
-+static int squashfs_fill_super(struct super_block *s, void *data, int silent)
-+{
-+ struct squashfs_sb_info *msblk;
-+ struct squashfs_super_block *sblk;
-+ int i;
-+ char b[BDEVNAME_SIZE];
-+ struct inode *root;
-+
-+ TRACE("Entered squashfs_read_superblock\n");
-+
-+ if (!(s->s_fs_info = kmalloc(sizeof(struct squashfs_sb_info),
-+ GFP_KERNEL))) {
-+ ERROR("Failed to allocate superblock\n");
-+ goto failure;
-+ }
-+ memset(s->s_fs_info, 0, sizeof(struct squashfs_sb_info));
-+ msblk = s->s_fs_info;
-+ sblk = &msblk->sblk;
-+
-+ msblk->devblksize = sb_min_blocksize(s, BLOCK_SIZE);
-+ msblk->devblksize_log2 = ffz(~msblk->devblksize);
-+
-+ init_MUTEX(&msblk->read_data_mutex);
-+ init_MUTEX(&msblk->read_page_mutex);
-+ init_MUTEX(&msblk->block_cache_mutex);
-+ init_MUTEX(&msblk->fragment_mutex);
-+ init_MUTEX(&msblk->meta_index_mutex);
-+
-+ init_waitqueue_head(&msblk->waitq);
-+ init_waitqueue_head(&msblk->fragment_wait_queue);
-+
-+ if (!squashfs_read_data(s, (char *) sblk, SQUASHFS_START,
-+ sizeof(struct squashfs_super_block) |
-+ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
-+ SERROR("unable to read superblock\n");
-+ goto failed_mount;
-+ }
-+
-+ /* Check it is a SQUASHFS superblock */
-+ msblk->swap = 0;
-+ if ((s->s_magic = sblk->s_magic) != SQUASHFS_MAGIC) {
-+ if (sblk->s_magic == SQUASHFS_MAGIC_SWAP) {
-+ struct squashfs_super_block ssblk;
-+
-+ WARNING("Mounting a different endian SQUASHFS "
-+ "filesystem on %s\n", bdevname(s->s_bdev, b));
-+
-+ SQUASHFS_SWAP_SUPER_BLOCK(&ssblk, sblk);
-+ memcpy(sblk, &ssblk, sizeof(struct squashfs_super_block));
-+ msblk->swap = 1;
-+ } else {
-+ SERROR("Can't find a SQUASHFS superblock on %s\n",
-+ bdevname(s->s_bdev, b));
-+ goto failed_mount;
-+ }
-+ }
-+
-+ /* Check the MAJOR & MINOR versions */
-+ if(!supported_squashfs_filesystem(msblk, silent))
-+ goto failed_mount;
-+
-+ TRACE("Found valid superblock on %s\n", bdevname(s->s_bdev, b));
-+ TRACE("Inodes are %scompressed\n",
-+ SQUASHFS_UNCOMPRESSED_INODES
-+ (sblk->flags) ? "un" : "");
-+ TRACE("Data is %scompressed\n",
-+ SQUASHFS_UNCOMPRESSED_DATA(sblk->flags)
-+ ? "un" : "");
-+ TRACE("Check data is %s present in the filesystem\n",
-+ SQUASHFS_CHECK_DATA(sblk->flags) ?
-+ "" : "not");
-+ TRACE("Filesystem size %lld bytes\n", sblk->bytes_used);
-+ TRACE("Block size %d\n", sblk->block_size);
-+ TRACE("Number of inodes %d\n", sblk->inodes);
-+ if (sblk->s_major > 1)
-+ TRACE("Number of fragments %d\n", sblk->fragments);
-+ TRACE("Number of uids %d\n", sblk->no_uids);
-+ TRACE("Number of gids %d\n", sblk->no_guids);
-+ TRACE("sblk->inode_table_start %llx\n", sblk->inode_table_start);
-+ TRACE("sblk->directory_table_start %llx\n", sblk->directory_table_start);
-+ if (sblk->s_major > 1)
-+ TRACE("sblk->fragment_table_start %llx\n",
-+ sblk->fragment_table_start);
-+ TRACE("sblk->uid_start %llx\n", sblk->uid_start);
-+
-+ s->s_flags |= MS_RDONLY;
-+ s->s_op = &squashfs_ops;
-+
-+ /* Init inode_table block pointer array */
-+ if (!(msblk->block_cache = kmalloc(sizeof(struct squashfs_cache) *
-+ SQUASHFS_CACHED_BLKS, GFP_KERNEL))) {
-+ ERROR("Failed to allocate block cache\n");
-+ goto failed_mount;
-+ }
-+
-+ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
-+ msblk->block_cache[i].block = SQUASHFS_INVALID_BLK;
-+
-+ msblk->next_cache = 0;
-+
-+ /* Allocate read_data block */
-+ msblk->read_size = (sblk->block_size < SQUASHFS_METADATA_SIZE) ?
-+ SQUASHFS_METADATA_SIZE :
-+ sblk->block_size;
-+
-+ if (!(msblk->read_data = kmalloc(msblk->read_size, GFP_KERNEL))) {
-+ ERROR("Failed to allocate read_data block\n");
-+ goto failed_mount;
-+ }
-+
-+ /* Allocate read_page block */
-+ if (!(msblk->read_page = kmalloc(sblk->block_size, GFP_KERNEL))) {
-+ ERROR("Failed to allocate read_page block\n");
-+ goto failed_mount;
-+ }
-+
-+ /* Allocate uid and gid tables */
-+ if (!(msblk->uid = kmalloc((sblk->no_uids + sblk->no_guids) *
-+ sizeof(unsigned int), GFP_KERNEL))) {
-+ ERROR("Failed to allocate uid/gid table\n");
-+ goto failed_mount;
-+ }
-+ msblk->guid = msblk->uid + sblk->no_uids;
-+
-+ if (msblk->swap) {
-+ unsigned int suid[sblk->no_uids + sblk->no_guids];
-+
-+ if (!squashfs_read_data(s, (char *) &suid, sblk->uid_start,
-+ ((sblk->no_uids + sblk->no_guids) *
-+ sizeof(unsigned int)) |
-+ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
-+ ERROR("unable to read uid/gid table\n");
-+ goto failed_mount;
-+ }
-+
-+ SQUASHFS_SWAP_DATA(msblk->uid, suid, (sblk->no_uids +
-+ sblk->no_guids), (sizeof(unsigned int) * 8));
-+ } else
-+ if (!squashfs_read_data(s, (char *) msblk->uid, sblk->uid_start,
-+ ((sblk->no_uids + sblk->no_guids) *
-+ sizeof(unsigned int)) |
-+ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
-+ ERROR("unable to read uid/gid table\n");
-+ goto failed_mount;
-+ }
-+
-+
-+ if (sblk->s_major == 1 && squashfs_1_0_supported(msblk))
-+ goto allocate_root;
-+
-+ if (!(msblk->fragment = kmalloc(sizeof(struct squashfs_fragment_cache) *
-+ SQUASHFS_CACHED_FRAGMENTS, GFP_KERNEL))) {
-+ ERROR("Failed to allocate fragment block cache\n");
-+ goto failed_mount;
-+ }
-+
-+ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++) {
-+ msblk->fragment[i].locked = 0;
-+ msblk->fragment[i].block = SQUASHFS_INVALID_BLK;
-+ msblk->fragment[i].data = NULL;
-+ }
-+
-+ msblk->next_fragment = 0;
-+
-+ /* Allocate fragment index table */
-+ if (msblk->read_fragment_index_table(s) == 0)
-+ goto failed_mount;
-+
-+allocate_root:
-+ if ((root = (msblk->iget)(s, sblk->root_inode)) == NULL)
-+ goto failed_mount;
-+
-+ if ((s->s_root = d_alloc_root(root)) == NULL) {
-+ ERROR("Root inode create failed\n");
-+ iput(root);
-+ goto failed_mount;
-+ }
-+
-+ TRACE("Leaving squashfs_read_super\n");
-+ return 0;
-+
-+failed_mount:
-+ kfree(msblk->fragment_index);
-+ kfree(msblk->fragment);
-+ kfree(msblk->uid);
-+ kfree(msblk->read_page);
-+ kfree(msblk->read_data);
-+ kfree(msblk->block_cache);
-+ kfree(msblk->fragment_index_2);
-+ kfree(s->s_fs_info);
-+ s->s_fs_info = NULL;
-+ return -EINVAL;
-+
-+failure:
-+ return -ENOMEM;
-+}
-+
-+
-+static int squashfs_statfs(struct dentry *dentry, struct kstatfs *buf)
-+{
-+ struct squashfs_sb_info *msblk = dentry->d_inode->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+
-+ TRACE("Entered squashfs_statfs\n");
-+
-+ buf->f_type = SQUASHFS_MAGIC;
-+ buf->f_bsize = sblk->block_size;
-+ buf->f_blocks = ((sblk->bytes_used - 1) >> sblk->block_log) + 1;
-+ buf->f_bfree = buf->f_bavail = 0;
-+ buf->f_files = sblk->inodes;
-+ buf->f_ffree = 0;
-+ buf->f_namelen = SQUASHFS_NAME_LEN;
-+
-+ return 0;
-+}
-+
-+
-+static int squashfs_symlink_readpage(struct file *file, struct page *page)
-+{
-+ struct inode *inode = page->mapping->host;
-+ int index = page->index << PAGE_CACHE_SHIFT, length, bytes;
-+ long long block = SQUASHFS_I(inode)->start_block;
-+ int offset = SQUASHFS_I(inode)->offset;
-+ void *pageaddr = kmap(page);
-+
-+ TRACE("Entered squashfs_symlink_readpage, page index %ld, start block "
-+ "%llx, offset %x\n", page->index,
-+ SQUASHFS_I(inode)->start_block,
-+ SQUASHFS_I(inode)->offset);
-+
-+ for (length = 0; length < index; length += bytes) {
-+ if (!(bytes = squashfs_get_cached_block(inode->i_sb, NULL,
-+ block, offset, PAGE_CACHE_SIZE, &block,
-+ &offset))) {
-+ ERROR("Unable to read symbolic link [%llx:%x]\n", block,
-+ offset);
-+ goto skip_read;
-+ }
-+ }
-+
-+ if (length != index) {
-+ ERROR("(squashfs_symlink_readpage) length != index\n");
-+ bytes = 0;
-+ goto skip_read;
-+ }
-+
-+ bytes = (i_size_read(inode) - length) > PAGE_CACHE_SIZE ? PAGE_CACHE_SIZE :
-+ i_size_read(inode) - length;
-+
-+ if (!(bytes = squashfs_get_cached_block(inode->i_sb, pageaddr, block,
-+ offset, bytes, &block, &offset)))
-+ ERROR("Unable to read symbolic link [%llx:%x]\n", block, offset);
-+
-+skip_read:
-+ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
-+ kunmap(page);
-+ SetPageUptodate(page);
-+ unlock_page(page);
-+
-+ return 0;
-+}
-+
-+
-+struct meta_index *locate_meta_index(struct inode *inode, int index, int offset)
-+{
-+ struct meta_index *meta = NULL;
-+ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
-+ int i;
-+
-+ down(&msblk->meta_index_mutex);
-+
-+ TRACE("locate_meta_index: index %d, offset %d\n", index, offset);
-+
-+ if(msblk->meta_index == NULL)
-+ goto not_allocated;
-+
-+ for (i = 0; i < SQUASHFS_META_NUMBER; i ++)
-+ if (msblk->meta_index[i].inode_number == inode->i_ino &&
-+ msblk->meta_index[i].offset >= offset &&
-+ msblk->meta_index[i].offset <= index &&
-+ msblk->meta_index[i].locked == 0) {
-+ TRACE("locate_meta_index: entry %d, offset %d\n", i,
-+ msblk->meta_index[i].offset);
-+ meta = &msblk->meta_index[i];
-+ offset = meta->offset;
-+ }
-+
-+ if (meta)
-+ meta->locked = 1;
-+
-+not_allocated:
-+ up(&msblk->meta_index_mutex);
-+
-+ return meta;
-+}
-+
-+
-+struct meta_index *empty_meta_index(struct inode *inode, int offset, int skip)
-+{
-+ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
-+ struct meta_index *meta = NULL;
-+ int i;
-+
-+ down(&msblk->meta_index_mutex);
-+
-+ TRACE("empty_meta_index: offset %d, skip %d\n", offset, skip);
-+
-+ if(msblk->meta_index == NULL) {
-+ if (!(msblk->meta_index = kmalloc(sizeof(struct meta_index) *
-+ SQUASHFS_META_NUMBER, GFP_KERNEL))) {
-+ ERROR("Failed to allocate meta_index\n");
-+ goto failed;
-+ }
-+ for(i = 0; i < SQUASHFS_META_NUMBER; i++) {
-+ msblk->meta_index[i].inode_number = 0;
-+ msblk->meta_index[i].locked = 0;
-+ }
-+ msblk->next_meta_index = 0;
-+ }
-+
-+ for(i = SQUASHFS_META_NUMBER; i &&
-+ msblk->meta_index[msblk->next_meta_index].locked; i --)
-+ msblk->next_meta_index = (msblk->next_meta_index + 1) %
-+ SQUASHFS_META_NUMBER;
-+
-+ if(i == 0) {
-+ TRACE("empty_meta_index: failed!\n");
-+ goto failed;
-+ }
-+
-+ TRACE("empty_meta_index: returned meta entry %d, %p\n",
-+ msblk->next_meta_index,
-+ &msblk->meta_index[msblk->next_meta_index]);
-+
-+ meta = &msblk->meta_index[msblk->next_meta_index];
-+ msblk->next_meta_index = (msblk->next_meta_index + 1) %
-+ SQUASHFS_META_NUMBER;
-+
-+ meta->inode_number = inode->i_ino;
-+ meta->offset = offset;
-+ meta->skip = skip;
-+ meta->entries = 0;
-+ meta->locked = 1;
-+
-+failed:
-+ up(&msblk->meta_index_mutex);
-+ return meta;
-+}
-+
-+
-+void release_meta_index(struct inode *inode, struct meta_index *meta)
-+{
-+ meta->locked = 0;
-+}
-+
-+
-+static int read_block_index(struct super_block *s, int blocks, char *block_list,
-+ long long *start_block, int *offset)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ unsigned int *block_listp;
-+ int block = 0;
-+
-+ if (msblk->swap) {
-+ char sblock_list[blocks << 2];
-+
-+ if (!squashfs_get_cached_block(s, sblock_list, *start_block,
-+ *offset, blocks << 2, start_block, offset)) {
-+ ERROR("Unable to read block list [%llx:%x]\n",
-+ *start_block, *offset);
-+ goto failure;
-+ }
-+ SQUASHFS_SWAP_INTS(((unsigned int *)block_list),
-+ ((unsigned int *)sblock_list), blocks);
-+ } else
-+ if (!squashfs_get_cached_block(s, block_list, *start_block,
-+ *offset, blocks << 2, start_block, offset)) {
-+ ERROR("Unable to read block list [%llx:%x]\n",
-+ *start_block, *offset);
-+ goto failure;
-+ }
-+
-+ for (block_listp = (unsigned int *) block_list; blocks;
-+ block_listp++, blocks --)
-+ block += SQUASHFS_COMPRESSED_SIZE_BLOCK(*block_listp);
-+
-+ return block;
-+
-+failure:
-+ return -1;
-+}
-+
-+
-+#define SIZE 256
-+
-+static inline int calculate_skip(int blocks) {
-+ int skip = (blocks - 1) / ((SQUASHFS_SLOTS * SQUASHFS_META_ENTRIES + 1) * SQUASHFS_META_INDEXES);
-+ return skip >= 7 ? 7 : skip + 1;
-+}
-+
-+
-+static int get_meta_index(struct inode *inode, int index,
-+ long long *index_block, int *index_offset,
-+ long long *data_block, char *block_list)
-+{
-+ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ int skip = calculate_skip(i_size_read(inode) >> sblk->block_log);
-+ int offset = 0;
-+ struct meta_index *meta;
-+ struct meta_entry *meta_entry;
-+ long long cur_index_block = SQUASHFS_I(inode)->u.s1.block_list_start;
-+ int cur_offset = SQUASHFS_I(inode)->offset;
-+ long long cur_data_block = SQUASHFS_I(inode)->start_block;
-+ int i;
-+
-+ index /= SQUASHFS_META_INDEXES * skip;
-+
-+ while ( offset < index ) {
-+ meta = locate_meta_index(inode, index, offset + 1);
-+
-+ if (meta == NULL) {
-+ if ((meta = empty_meta_index(inode, offset + 1,
-+ skip)) == NULL)
-+ goto all_done;
-+ } else {
-+ offset = index < meta->offset + meta->entries ? index :
-+ meta->offset + meta->entries - 1;
-+ meta_entry = &meta->meta_entry[offset - meta->offset];
-+ cur_index_block = meta_entry->index_block + sblk->inode_table_start;
-+ cur_offset = meta_entry->offset;
-+ cur_data_block = meta_entry->data_block;
-+ TRACE("get_meta_index: offset %d, meta->offset %d, "
-+ "meta->entries %d\n", offset, meta->offset,
-+ meta->entries);
-+ TRACE("get_meta_index: index_block 0x%llx, offset 0x%x"
-+ " data_block 0x%llx\n", cur_index_block,
-+ cur_offset, cur_data_block);
-+ }
-+
-+ for (i = meta->offset + meta->entries; i <= index &&
-+ i < meta->offset + SQUASHFS_META_ENTRIES; i++) {
-+ int blocks = skip * SQUASHFS_META_INDEXES;
-+
-+ while (blocks) {
-+ int block = blocks > (SIZE >> 2) ? (SIZE >> 2) :
-+ blocks;
-+ int res = read_block_index(inode->i_sb, block,
-+ block_list, &cur_index_block,
-+ &cur_offset);
-+
-+ if (res == -1)
-+ goto failed;
-+
-+ cur_data_block += res;
-+ blocks -= block;
-+ }
-+
-+ meta_entry = &meta->meta_entry[i - meta->offset];
-+ meta_entry->index_block = cur_index_block - sblk->inode_table_start;
-+ meta_entry->offset = cur_offset;
-+ meta_entry->data_block = cur_data_block;
-+ meta->entries ++;
-+ offset ++;
-+ }
-+
-+ TRACE("get_meta_index: meta->offset %d, meta->entries %d\n",
-+ meta->offset, meta->entries);
-+
-+ release_meta_index(inode, meta);
-+ }
-+
-+all_done:
-+ *index_block = cur_index_block;
-+ *index_offset = cur_offset;
-+ *data_block = cur_data_block;
-+
-+ return offset * SQUASHFS_META_INDEXES * skip;
-+
-+failed:
-+ release_meta_index(inode, meta);
-+ return -1;
-+}
-+
-+
-+static long long read_blocklist(struct inode *inode, int index,
-+ int readahead_blks, char *block_list,
-+ unsigned short **block_p, unsigned int *bsize)
-+{
-+ long long block_ptr;
-+ int offset;
-+ long long block;
-+ int res = get_meta_index(inode, index, &block_ptr, &offset, &block,
-+ block_list);
-+
-+ TRACE("read_blocklist: res %d, index %d, block_ptr 0x%llx, offset"
-+ " 0x%x, block 0x%llx\n", res, index, block_ptr, offset,
-+ block);
-+
-+ if(res == -1)
-+ goto failure;
-+
-+ index -= res;
-+
-+ while ( index ) {
-+ int blocks = index > (SIZE >> 2) ? (SIZE >> 2) : index;
-+ int res = read_block_index(inode->i_sb, blocks, block_list,
-+ &block_ptr, &offset);
-+ if (res == -1)
-+ goto failure;
-+ block += res;
-+ index -= blocks;
-+ }
-+
-+ if (read_block_index(inode->i_sb, 1, block_list,
-+ &block_ptr, &offset) == -1)
-+ goto failure;
-+ *bsize = *((unsigned int *) block_list);
-+
-+ return block;
-+
-+failure:
-+ return 0;
-+}
-+
-+
-+static int squashfs_readpage(struct file *file, struct page *page)
-+{
-+ struct inode *inode = page->mapping->host;
-+ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ unsigned char block_list[SIZE];
-+ long long block;
-+ unsigned int bsize, i = 0, bytes = 0, byte_offset = 0;
-+ int index = page->index >> (sblk->block_log - PAGE_CACHE_SHIFT);
-+ void *pageaddr;
-+ struct squashfs_fragment_cache *fragment = NULL;
-+ char *data_ptr = msblk->read_page;
-+
-+ int mask = (1 << (sblk->block_log - PAGE_CACHE_SHIFT)) - 1;
-+ int start_index = page->index & ~mask;
-+ int end_index = start_index | mask;
-+
-+ TRACE("Entered squashfs_readpage, page index %lx, start block %llx\n",
-+ page->index,
-+ SQUASHFS_I(inode)->start_block);
-+
-+ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
-+ PAGE_CACHE_SHIFT))
-+ goto skip_read;
-+
-+ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
-+ || index < (i_size_read(inode) >>
-+ sblk->block_log)) {
-+ if ((block = (msblk->read_blocklist)(inode, index, 1,
-+ block_list, NULL, &bsize)) == 0)
-+ goto skip_read;
-+
-+ down(&msblk->read_page_mutex);
-+
-+ if (!(bytes = squashfs_read_data(inode->i_sb, msblk->read_page,
-+ block, bsize, NULL))) {
-+ ERROR("Unable to read page, block %llx, size %x\n", block,
-+ bsize);
-+ up(&msblk->read_page_mutex);
-+ goto skip_read;
-+ }
-+ } else {
-+ if ((fragment = get_cached_fragment(inode->i_sb,
-+ SQUASHFS_I(inode)->
-+ u.s1.fragment_start_block,
-+ SQUASHFS_I(inode)->u.s1.fragment_size))
-+ == NULL) {
-+ ERROR("Unable to read page, block %llx, size %x\n",
-+ SQUASHFS_I(inode)->
-+ u.s1.fragment_start_block,
-+ (int) SQUASHFS_I(inode)->
-+ u.s1.fragment_size);
-+ goto skip_read;
-+ }
-+ bytes = SQUASHFS_I(inode)->u.s1.fragment_offset +
-+ (i_size_read(inode) & (sblk->block_size
-+ - 1));
-+ byte_offset = SQUASHFS_I(inode)->u.s1.fragment_offset;
-+ data_ptr = fragment->data;
-+ }
-+
-+ for (i = start_index; i <= end_index && byte_offset < bytes;
-+ i++, byte_offset += PAGE_CACHE_SIZE) {
-+ struct page *push_page;
-+ int available_bytes = (bytes - byte_offset) > PAGE_CACHE_SIZE ?
-+ PAGE_CACHE_SIZE : bytes - byte_offset;
-+
-+ TRACE("bytes %d, i %d, byte_offset %d, available_bytes %d\n",
-+ bytes, i, byte_offset, available_bytes);
-+
-+ if (i == page->index) {
-+ pageaddr = kmap_atomic(page, KM_USER0);
-+ memcpy(pageaddr, data_ptr + byte_offset,
-+ available_bytes);
-+ memset(pageaddr + available_bytes, 0,
-+ PAGE_CACHE_SIZE - available_bytes);
-+ kunmap_atomic(pageaddr, KM_USER0);
-+ flush_dcache_page(page);
-+ SetPageUptodate(page);
-+ unlock_page(page);
-+ } else if ((push_page =
-+ grab_cache_page_nowait(page->mapping, i))) {
-+ pageaddr = kmap_atomic(push_page, KM_USER0);
-+
-+ memcpy(pageaddr, data_ptr + byte_offset,
-+ available_bytes);
-+ memset(pageaddr + available_bytes, 0,
-+ PAGE_CACHE_SIZE - available_bytes);
-+ kunmap_atomic(pageaddr, KM_USER0);
-+ flush_dcache_page(push_page);
-+ SetPageUptodate(push_page);
-+ unlock_page(push_page);
-+ page_cache_release(push_page);
-+ }
-+ }
-+
-+ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
-+ || index < (i_size_read(inode) >>
-+ sblk->block_log))
-+ up(&msblk->read_page_mutex);
-+ else
-+ release_cached_fragment(msblk, fragment);
-+
-+ return 0;
-+
-+skip_read:
-+ pageaddr = kmap_atomic(page, KM_USER0);
-+ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
-+ kunmap_atomic(pageaddr, KM_USER0);
-+ flush_dcache_page(page);
-+ SetPageUptodate(page);
-+ unlock_page(page);
-+
-+ return 0;
-+}
-+
-+
-+static int squashfs_readpage4K(struct file *file, struct page *page)
-+{
-+ struct inode *inode = page->mapping->host;
-+ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ unsigned char block_list[SIZE];
-+ long long block;
-+ unsigned int bsize, bytes = 0;
-+ void *pageaddr;
-+
-+ TRACE("Entered squashfs_readpage4K, page index %lx, start block %llx\n",
-+ page->index,
-+ SQUASHFS_I(inode)->start_block);
-+
-+ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
-+ PAGE_CACHE_SHIFT)) {
-+ pageaddr = kmap_atomic(page, KM_USER0);
-+ goto skip_read;
-+ }
-+
-+ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
-+ || page->index < (i_size_read(inode) >>
-+ sblk->block_log)) {
-+ block = (msblk->read_blocklist)(inode, page->index, 1,
-+ block_list, NULL, &bsize);
-+
-+ down(&msblk->read_page_mutex);
-+ bytes = squashfs_read_data(inode->i_sb, msblk->read_page, block,
-+ bsize, NULL);
-+ pageaddr = kmap_atomic(page, KM_USER0);
-+ if (bytes)
-+ memcpy(pageaddr, msblk->read_page, bytes);
-+ else
-+ ERROR("Unable to read page, block %llx, size %x\n",
-+ block, bsize);
-+ up(&msblk->read_page_mutex);
-+ } else {
-+ struct squashfs_fragment_cache *fragment =
-+ get_cached_fragment(inode->i_sb,
-+ SQUASHFS_I(inode)->
-+ u.s1.fragment_start_block,
-+ SQUASHFS_I(inode)-> u.s1.fragment_size);
-+ pageaddr = kmap_atomic(page, KM_USER0);
-+ if (fragment) {
-+ bytes = i_size_read(inode) & (sblk->block_size - 1);
-+ memcpy(pageaddr, fragment->data + SQUASHFS_I(inode)->
-+ u.s1.fragment_offset, bytes);
-+ release_cached_fragment(msblk, fragment);
-+ } else
-+ ERROR("Unable to read page, block %llx, size %x\n",
-+ SQUASHFS_I(inode)->
-+ u.s1.fragment_start_block, (int)
-+ SQUASHFS_I(inode)-> u.s1.fragment_size);
-+ }
-+
-+skip_read:
-+ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
-+ kunmap_atomic(pageaddr, KM_USER0);
-+ flush_dcache_page(page);
-+ SetPageUptodate(page);
-+ unlock_page(page);
-+
-+ return 0;
-+}
-+
-+
-+static int get_dir_index_using_offset(struct super_block *s, long long
-+ *next_block, unsigned int *next_offset,
-+ long long index_start,
-+ unsigned int index_offset, int i_count,
-+ long long f_pos)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ int i, length = 0;
-+ struct squashfs_dir_index index;
-+
-+ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n",
-+ i_count, (unsigned int) f_pos);
-+
-+ f_pos =- 3;
-+ if (f_pos == 0)
-+ goto finish;
-+
-+ for (i = 0; i < i_count; i++) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_index sindex;
-+ squashfs_get_cached_block(s, (char *) &sindex,
-+ index_start, index_offset,
-+ sizeof(sindex), &index_start,
-+ &index_offset);
-+ SQUASHFS_SWAP_DIR_INDEX(&index, &sindex);
-+ } else
-+ squashfs_get_cached_block(s, (char *) &index,
-+ index_start, index_offset,
-+ sizeof(index), &index_start,
-+ &index_offset);
-+
-+ if (index.index > f_pos)
-+ break;
-+
-+ squashfs_get_cached_block(s, NULL, index_start, index_offset,
-+ index.size + 1, &index_start,
-+ &index_offset);
-+
-+ length = index.index;
-+ *next_block = index.start_block + sblk->directory_table_start;
-+ }
-+
-+ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
-+
-+finish:
-+ return length + 3;
-+}
-+
-+
-+static int get_dir_index_using_name(struct super_block *s, long long
-+ *next_block, unsigned int *next_offset,
-+ long long index_start,
-+ unsigned int index_offset, int i_count,
-+ const char *name, int size)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ int i, length = 0;
-+ char buffer[sizeof(struct squashfs_dir_index) + SQUASHFS_NAME_LEN + 1];
-+ struct squashfs_dir_index *index = (struct squashfs_dir_index *) buffer;
-+ char str[SQUASHFS_NAME_LEN + 1];
-+
-+ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count);
-+
-+ strncpy(str, name, size);
-+ str[size] = '\0';
-+
-+ for (i = 0; i < i_count; i++) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_index sindex;
-+ squashfs_get_cached_block(s, (char *) &sindex,
-+ index_start, index_offset,
-+ sizeof(sindex), &index_start,
-+ &index_offset);
-+ SQUASHFS_SWAP_DIR_INDEX(index, &sindex);
-+ } else
-+ squashfs_get_cached_block(s, (char *) index,
-+ index_start, index_offset,
-+ sizeof(struct squashfs_dir_index),
-+ &index_start, &index_offset);
-+
-+ squashfs_get_cached_block(s, index->name, index_start,
-+ index_offset, index->size + 1,
-+ &index_start, &index_offset);
-+
-+ index->name[index->size + 1] = '\0';
-+
-+ if (strcmp(index->name, str) > 0)
-+ break;
-+
-+ length = index->index;
-+ *next_block = index->start_block + sblk->directory_table_start;
-+ }
-+
-+ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
-+ return length + 3;
-+}
-+
-+
-+static int squashfs_readdir(struct file *file, void *dirent, filldir_t filldir)
-+{
-+ struct inode *i = file->f_dentry->d_inode;
-+ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ long long next_block = SQUASHFS_I(i)->start_block +
-+ sblk->directory_table_start;
-+ int next_offset = SQUASHFS_I(i)->offset, length = 0, dirs_read = 0,
-+ dir_count;
-+ struct squashfs_dir_header dirh;
-+ char buffer[sizeof(struct squashfs_dir_entry) + SQUASHFS_NAME_LEN + 1];
-+ struct squashfs_dir_entry *dire = (struct squashfs_dir_entry *) buffer;
-+
-+ TRACE("Entered squashfs_readdir [%llx:%x]\n", next_block, next_offset);
-+
-+ while(file->f_pos < 3) {
-+ char *name;
-+ int size, i_ino;
-+
-+ if(file->f_pos == 0) {
-+ name = ".";
-+ size = 1;
-+ i_ino = i->i_ino;
-+ } else {
-+ name = "..";
-+ size = 2;
-+ i_ino = SQUASHFS_I(i)->u.s2.parent_inode;
-+ }
-+ TRACE("Calling filldir(%x, %s, %d, %d, %d, %d)\n",
-+ (unsigned int) dirent, name, size, (int)
-+ file->f_pos, i_ino,
-+ squashfs_filetype_table[1]);
-+
-+ if (filldir(dirent, name, size,
-+ file->f_pos, i_ino,
-+ squashfs_filetype_table[1]) < 0) {
-+ TRACE("Filldir returned less than 0\n");
-+ goto finish;
-+ }
-+ file->f_pos += size;
-+ dirs_read++;
-+ }
-+
-+ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_start,
-+ SQUASHFS_I(i)->u.s2.directory_index_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_count,
-+ file->f_pos);
-+
-+ while (length < i_size_read(i)) {
-+ /* read directory header */
-+ if (msblk->swap) {
-+ struct squashfs_dir_header sdirh;
-+
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
-+ next_block, next_offset, sizeof(sdirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdirh);
-+ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
-+ next_block, next_offset, sizeof(dirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(dirh);
-+ }
-+
-+ dir_count = dirh.count + 1;
-+ while (dir_count--) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_entry sdire;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ &sdire, next_block, next_offset,
-+ sizeof(sdire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdire);
-+ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ dire, next_block, next_offset,
-+ sizeof(*dire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(*dire);
-+ }
-+
-+ if (!squashfs_get_cached_block(i->i_sb, dire->name,
-+ next_block, next_offset,
-+ dire->size + 1, &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += dire->size + 1;
-+
-+ if (file->f_pos >= length)
-+ continue;
-+
-+ dire->name[dire->size + 1] = '\0';
-+
-+ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d, %d)\n",
-+ (unsigned int) dirent, dire->name,
-+ dire->size + 1, (int) file->f_pos,
-+ dirh.start_block, dire->offset,
-+ dirh.inode_number + dire->inode_number,
-+ squashfs_filetype_table[dire->type]);
-+
-+ if (filldir(dirent, dire->name, dire->size + 1,
-+ file->f_pos,
-+ dirh.inode_number + dire->inode_number,
-+ squashfs_filetype_table[dire->type])
-+ < 0) {
-+ TRACE("Filldir returned less than 0\n");
-+ goto finish;
-+ }
-+ file->f_pos = length;
-+ dirs_read++;
-+ }
-+ }
-+
-+finish:
-+ return dirs_read;
-+
-+failed_read:
-+ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
-+ next_offset);
-+ return 0;
-+}
-+
-+
-+static struct dentry *squashfs_lookup(struct inode *i, struct dentry *dentry,
-+ struct nameidata *nd)
-+{
-+ const unsigned char *name = dentry->d_name.name;
-+ int len = dentry->d_name.len;
-+ struct inode *inode = NULL;
-+ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ long long next_block = SQUASHFS_I(i)->start_block +
-+ sblk->directory_table_start;
-+ int next_offset = SQUASHFS_I(i)->offset, length = 0,
-+ dir_count;
-+ struct squashfs_dir_header dirh;
-+ char buffer[sizeof(struct squashfs_dir_entry) + SQUASHFS_NAME_LEN];
-+ struct squashfs_dir_entry *dire = (struct squashfs_dir_entry *) buffer;
-+
-+ TRACE("Entered squashfs_lookup [%llx:%x]\n", next_block, next_offset);
-+
-+ if (len > SQUASHFS_NAME_LEN)
-+ goto exit_loop;
-+
-+ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_start,
-+ SQUASHFS_I(i)->u.s2.directory_index_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_count, name,
-+ len);
-+
-+ while (length < i_size_read(i)) {
-+ /* read directory header */
-+ if (msblk->swap) {
-+ struct squashfs_dir_header sdirh;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
-+ next_block, next_offset, sizeof(sdirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdirh);
-+ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
-+ next_block, next_offset, sizeof(dirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(dirh);
-+ }
-+
-+ dir_count = dirh.count + 1;
-+ while (dir_count--) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_entry sdire;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ &sdire, next_block,next_offset,
-+ sizeof(sdire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdire);
-+ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ dire, next_block,next_offset,
-+ sizeof(*dire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(*dire);
-+ }
-+
-+ if (!squashfs_get_cached_block(i->i_sb, dire->name,
-+ next_block, next_offset, dire->size + 1,
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += dire->size + 1;
-+
-+ if (name[0] < dire->name[0])
-+ goto exit_loop;
-+
-+ if ((len == dire->size + 1) && !strncmp(name,
-+ dire->name, len)) {
-+ squashfs_inode_t ino =
-+ SQUASHFS_MKINODE(dirh.start_block,
-+ dire->offset);
-+
-+ TRACE("calling squashfs_iget for directory "
-+ "entry %s, inode %x:%x, %d\n", name,
-+ dirh.start_block, dire->offset,
-+ dirh.inode_number + dire->inode_number);
-+
-+ inode = (msblk->iget)(i->i_sb, ino);
-+
-+ goto exit_loop;
-+ }
-+ }
-+ }
-+
-+exit_loop:
-+ d_add(dentry, inode);
-+ return ERR_PTR(0);
-+
-+failed_read:
-+ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
-+ next_offset);
-+ goto exit_loop;
-+}
-+
-+
-+static void squashfs_put_super(struct super_block *s)
-+{
-+ int i;
-+
-+ if (s->s_fs_info) {
-+ struct squashfs_sb_info *sbi = s->s_fs_info;
-+ if (sbi->block_cache)
-+ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
-+ if (sbi->block_cache[i].block !=
-+ SQUASHFS_INVALID_BLK)
-+ kfree(sbi->block_cache[i].data);
-+ if (sbi->fragment)
-+ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++)
-+ SQUASHFS_FREE(sbi->fragment[i].data);
-+ kfree(sbi->fragment);
-+ kfree(sbi->block_cache);
-+ kfree(sbi->read_data);
-+ kfree(sbi->read_page);
-+ kfree(sbi->uid);
-+ kfree(sbi->fragment_index);
-+ kfree(sbi->fragment_index_2);
-+ kfree(sbi->meta_index);
-+ kfree(s->s_fs_info);
-+ s->s_fs_info = NULL;
-+ }
-+}
-+
-+
-+static int squashfs_get_sb(struct file_system_type *fs_type,
-+ int flags, const char *dev_name, void *data,
-+ struct vfsmount *mnt)
-+{
-+ return get_sb_bdev(fs_type, flags, dev_name, data, squashfs_fill_super, mnt);
-+}
-+
-+
-+static int __init init_squashfs_fs(void)
-+{
-+ int err = init_inodecache();
-+ if (err)
-+ goto out;
-+
-+ printk(KERN_INFO "squashfs: version 3.0 (2006/03/15) "
-+ "Phillip Lougher\n");
-+
-+ if (!(stream.workspace = vmalloc(zlib_inflate_workspacesize()))) {
-+ ERROR("Failed to allocate zlib workspace\n");
-+ destroy_inodecache();
-+ err = -ENOMEM;
-+ goto out;
-+ }
-+
-+ if ((err = register_filesystem(&squashfs_fs_type))) {
-+ vfree(stream.workspace);
-+ destroy_inodecache();
-+ }
-+
-+out:
-+ return err;
-+}
-+
-+
-+static void __exit exit_squashfs_fs(void)
-+{
-+ vfree(stream.workspace);
-+ unregister_filesystem(&squashfs_fs_type);
-+ destroy_inodecache();
-+}
-+
-+
-+static kmem_cache_t * squashfs_inode_cachep;
-+
-+
-+static struct inode *squashfs_alloc_inode(struct super_block *sb)
-+{
-+ struct squashfs_inode_info *ei;
-+ ei = kmem_cache_alloc(squashfs_inode_cachep, SLAB_KERNEL);
-+ if (!ei)
-+ return NULL;
-+ return &ei->vfs_inode;
-+}
-+
-+
-+static void squashfs_destroy_inode(struct inode *inode)
-+{
-+ kmem_cache_free(squashfs_inode_cachep, SQUASHFS_I(inode));
-+}
-+
-+
-+static void init_once(void * foo, kmem_cache_t * cachep, unsigned long flags)
-+{
-+ struct squashfs_inode_info *ei = foo;
-+
-+ if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
-+ SLAB_CTOR_CONSTRUCTOR)
-+ inode_init_once(&ei->vfs_inode);
-+}
-+
-+
-+static int __init init_inodecache(void)
-+{
-+ squashfs_inode_cachep = kmem_cache_create("squashfs_inode_cache",
-+ sizeof(struct squashfs_inode_info),
-+ 0, SLAB_HWCACHE_ALIGN|SLAB_RECLAIM_ACCOUNT,
-+ init_once, NULL);
-+ if (squashfs_inode_cachep == NULL)
-+ return -ENOMEM;
-+ return 0;
-+}
-+
-+
-+static void destroy_inodecache(void)
-+{
-+ kmem_cache_destroy(squashfs_inode_cachep);
-+}
-+
-+
-+module_init(init_squashfs_fs);
-+module_exit(exit_squashfs_fs);
-+MODULE_DESCRIPTION("squashfs, a compressed read-only filesystem");
-+MODULE_AUTHOR("Phillip Lougher <phillip@lougher.org.uk>");
-+MODULE_LICENSE("GPL");
-diff -urN linux-2.6.19.old/fs/squashfs/Makefile linux-2.6.19.dev/fs/squashfs/Makefile
---- linux-2.6.19.old/fs/squashfs/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/Makefile 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,7 @@
-+#
-+# Makefile for the linux squashfs routines.
-+#
-+
-+obj-$(CONFIG_SQUASHFS) += squashfs.o
-+squashfs-y += inode.o
-+squashfs-y += squashfs2_0.o
-diff -urN linux-2.6.19.old/fs/squashfs/squashfs2_0.c linux-2.6.19.dev/fs/squashfs/squashfs2_0.c
---- linux-2.6.19.old/fs/squashfs/squashfs2_0.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/squashfs2_0.c 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,758 @@
-+/*
-+ * Squashfs - a compressed read only filesystem for Linux
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * squashfs2_0.c
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/squashfs_fs.h>
-+#include <linux/module.h>
-+#include <linux/errno.h>
-+#include <linux/slab.h>
-+#include <linux/fs.h>
-+#include <linux/smp_lock.h>
-+#include <linux/slab.h>
-+#include <linux/squashfs_fs_sb.h>
-+#include <linux/squashfs_fs_i.h>
-+#include <linux/buffer_head.h>
-+#include <linux/vfs.h>
-+#include <linux/init.h>
-+#include <linux/dcache.h>
-+#include <linux/wait.h>
-+#include <linux/zlib.h>
-+#include <linux/blkdev.h>
-+#include <linux/vmalloc.h>
-+#include <asm/uaccess.h>
-+#include <asm/semaphore.h>
-+
-+#include "squashfs.h"
-+static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir);
-+static struct dentry *squashfs_lookup_2(struct inode *, struct dentry *,
-+ struct nameidata *);
-+
-+static struct file_operations squashfs_dir_ops_2 = {
-+ .read = generic_read_dir,
-+ .readdir = squashfs_readdir_2
-+};
-+
-+static struct inode_operations squashfs_dir_inode_ops_2 = {
-+ .lookup = squashfs_lookup_2
-+};
-+
-+static unsigned char squashfs_filetype_table[] = {
-+ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK
-+};
-+
-+static int read_fragment_index_table_2(struct super_block *s)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+
-+ if (!(msblk->fragment_index_2 = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES_2
-+ (sblk->fragments), GFP_KERNEL))) {
-+ ERROR("Failed to allocate uid/gid table\n");
-+ return 0;
-+ }
-+
-+ if (SQUASHFS_FRAGMENT_INDEX_BYTES_2(sblk->fragments) &&
-+ !squashfs_read_data(s, (char *)
-+ msblk->fragment_index_2,
-+ sblk->fragment_table_start,
-+ SQUASHFS_FRAGMENT_INDEX_BYTES_2
-+ (sblk->fragments) |
-+ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
-+ ERROR("unable to read fragment index table\n");
-+ return 0;
-+ }
-+
-+ if (msblk->swap) {
-+ int i;
-+ unsigned int fragment;
-+
-+ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES_2(sblk->fragments);
-+ i++) {
-+ SQUASHFS_SWAP_FRAGMENT_INDEXES_2((&fragment),
-+ &msblk->fragment_index_2[i], 1);
-+ msblk->fragment_index_2[i] = fragment;
-+ }
-+ }
-+
-+ return 1;
-+}
-+
-+
-+static int get_fragment_location_2(struct super_block *s, unsigned int fragment,
-+ long long *fragment_start_block,
-+ unsigned int *fragment_size)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ long long start_block =
-+ msblk->fragment_index_2[SQUASHFS_FRAGMENT_INDEX_2(fragment)];
-+ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET_2(fragment);
-+ struct squashfs_fragment_entry_2 fragment_entry;
-+
-+ if (msblk->swap) {
-+ struct squashfs_fragment_entry_2 sfragment_entry;
-+
-+ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry,
-+ start_block, offset,
-+ sizeof(sfragment_entry), &start_block,
-+ &offset))
-+ goto out;
-+ SQUASHFS_SWAP_FRAGMENT_ENTRY_2(&fragment_entry, &sfragment_entry);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *) &fragment_entry,
-+ start_block, offset,
-+ sizeof(fragment_entry), &start_block,
-+ &offset))
-+ goto out;
-+
-+ *fragment_start_block = fragment_entry.start_block;
-+ *fragment_size = fragment_entry.size;
-+
-+ return 1;
-+
-+out:
-+ return 0;
-+}
-+
-+
-+static struct inode *squashfs_new_inode(struct super_block *s,
-+ struct squashfs_base_inode_header_2 *inodeb, unsigned int ino)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ struct inode *i = new_inode(s);
-+
-+ if (i) {
-+ i->i_ino = ino;
-+ i->i_mtime.tv_sec = sblk->mkfs_time;
-+ i->i_atime.tv_sec = sblk->mkfs_time;
-+ i->i_ctime.tv_sec = sblk->mkfs_time;
-+ i->i_uid = msblk->uid[inodeb->uid];
-+ i->i_mode = inodeb->mode;
-+ i->i_nlink = 1;
-+ i->i_size = 0;
-+ if (inodeb->guid == SQUASHFS_GUIDS)
-+ i->i_gid = i->i_uid;
-+ else
-+ i->i_gid = msblk->guid[inodeb->guid];
-+ }
-+
-+ return i;
-+}
-+
-+
-+static struct inode *squashfs_iget_2(struct super_block *s, squashfs_inode_t inode)
-+{
-+ struct inode *i;
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ unsigned int block = SQUASHFS_INODE_BLK(inode) +
-+ sblk->inode_table_start;
-+ unsigned int offset = SQUASHFS_INODE_OFFSET(inode);
-+ unsigned int ino = SQUASHFS_MK_VFS_INODE(block
-+ - sblk->inode_table_start, offset);
-+ long long next_block;
-+ unsigned int next_offset;
-+ union squashfs_inode_header_2 id, sid;
-+ struct squashfs_base_inode_header_2 *inodeb = &id.base,
-+ *sinodeb = &sid.base;
-+
-+ TRACE("Entered squashfs_iget\n");
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *) sinodeb, block,
-+ offset, sizeof(*sinodeb), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_BASE_INODE_HEADER_2(inodeb, sinodeb,
-+ sizeof(*sinodeb));
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *) inodeb, block,
-+ offset, sizeof(*inodeb), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ switch(inodeb->inode_type) {
-+ case SQUASHFS_FILE_TYPE: {
-+ struct squashfs_reg_inode_header_2 *inodep = &id.reg;
-+ struct squashfs_reg_inode_header_2 *sinodep = &sid.reg;
-+ long long frag_blk;
-+ unsigned int frag_size;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_REG_INODE_HEADER_2(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ frag_blk = SQUASHFS_INVALID_BLK;
-+ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
-+ !get_fragment_location_2(s,
-+ inodep->fragment, &frag_blk, &frag_size))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_size = inodep->file_size;
-+ i->i_fop = &generic_ro_fops;
-+ i->i_mode |= S_IFREG;
-+ i->i_mtime.tv_sec = inodep->mtime;
-+ i->i_atime.tv_sec = inodep->mtime;
-+ i->i_ctime.tv_sec = inodep->mtime;
-+ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
-+ i->i_blksize = PAGE_CACHE_SIZE;
-+ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
-+ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
-+ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
-+ SQUASHFS_I(i)->offset = next_offset;
-+ if (sblk->block_size > 4096)
-+ i->i_data.a_ops = &squashfs_aops;
-+ else
-+ i->i_data.a_ops = &squashfs_aops_4K;
-+
-+ TRACE("File inode %x:%x, start_block %x, "
-+ "block_list_start %llx, offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->start_block, next_block,
-+ next_offset);
-+ break;
-+ }
-+ case SQUASHFS_DIR_TYPE: {
-+ struct squashfs_dir_inode_header_2 *inodep = &id.dir;
-+ struct squashfs_dir_inode_header_2 *sinodep = &sid.dir;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_DIR_INODE_HEADER_2(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_size = inodep->file_size;
-+ i->i_op = &squashfs_dir_inode_ops_2;
-+ i->i_fop = &squashfs_dir_ops_2;
-+ i->i_mode |= S_IFDIR;
-+ i->i_mtime.tv_sec = inodep->mtime;
-+ i->i_atime.tv_sec = inodep->mtime;
-+ i->i_ctime.tv_sec = inodep->mtime;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->offset = inodep->offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_count = 0;
-+ SQUASHFS_I(i)->u.s2.parent_inode = 0;
-+
-+ TRACE("Directory inode %x:%x, start_block %x, offset "
-+ "%x\n", SQUASHFS_INODE_BLK(inode),
-+ offset, inodep->start_block,
-+ inodep->offset);
-+ break;
-+ }
-+ case SQUASHFS_LDIR_TYPE: {
-+ struct squashfs_ldir_inode_header_2 *inodep = &id.ldir;
-+ struct squashfs_ldir_inode_header_2 *sinodep = &sid.ldir;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_LDIR_INODE_HEADER_2(inodep,
-+ sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_size = inodep->file_size;
-+ i->i_op = &squashfs_dir_inode_ops_2;
-+ i->i_fop = &squashfs_dir_ops_2;
-+ i->i_mode |= S_IFDIR;
-+ i->i_mtime.tv_sec = inodep->mtime;
-+ i->i_atime.tv_sec = inodep->mtime;
-+ i->i_ctime.tv_sec = inodep->mtime;
-+ SQUASHFS_I(i)->start_block = inodep->start_block;
-+ SQUASHFS_I(i)->offset = inodep->offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_start = next_block;
-+ SQUASHFS_I(i)->u.s2.directory_index_offset =
-+ next_offset;
-+ SQUASHFS_I(i)->u.s2.directory_index_count =
-+ inodep->i_count;
-+ SQUASHFS_I(i)->u.s2.parent_inode = 0;
-+
-+ TRACE("Long directory inode %x:%x, start_block %x, "
-+ "offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->start_block, inodep->offset);
-+ break;
-+ }
-+ case SQUASHFS_SYMLINK_TYPE: {
-+ struct squashfs_symlink_inode_header_2 *inodep =
-+ &id.symlink;
-+ struct squashfs_symlink_inode_header_2 *sinodep =
-+ &sid.symlink;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(inodep,
-+ sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_size = inodep->symlink_size;
-+ i->i_op = &page_symlink_inode_operations;
-+ i->i_data.a_ops = &squashfs_symlink_aops;
-+ i->i_mode |= S_IFLNK;
-+ SQUASHFS_I(i)->start_block = next_block;
-+ SQUASHFS_I(i)->offset = next_offset;
-+
-+ TRACE("Symbolic link inode %x:%x, start_block %llx, "
-+ "offset %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ next_block, next_offset);
-+ break;
-+ }
-+ case SQUASHFS_BLKDEV_TYPE:
-+ case SQUASHFS_CHRDEV_TYPE: {
-+ struct squashfs_dev_inode_header_2 *inodep = &id.dev;
-+ struct squashfs_dev_inode_header_2 *sinodep = &sid.dev;
-+
-+ if (msblk->swap) {
-+ if (!squashfs_get_cached_block(s, (char *)
-+ sinodep, block, offset,
-+ sizeof(*sinodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+ SQUASHFS_SWAP_DEV_INODE_HEADER_2(inodep, sinodep);
-+ } else
-+ if (!squashfs_get_cached_block(s, (char *)
-+ inodep, block, offset,
-+ sizeof(*inodep), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_mode |= (inodeb->inode_type ==
-+ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR :
-+ S_IFBLK;
-+ init_special_inode(i, i->i_mode,
-+ old_decode_dev(inodep->rdev));
-+
-+ TRACE("Device inode %x:%x, rdev %x\n",
-+ SQUASHFS_INODE_BLK(inode), offset,
-+ inodep->rdev);
-+ break;
-+ }
-+ case SQUASHFS_FIFO_TYPE:
-+ case SQUASHFS_SOCKET_TYPE: {
-+ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
-+ goto failed_read1;
-+
-+ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE)
-+ ? S_IFIFO : S_IFSOCK;
-+ init_special_inode(i, i->i_mode, 0);
-+ break;
-+ }
-+ default:
-+ ERROR("Unknown inode type %d in squashfs_iget!\n",
-+ inodeb->inode_type);
-+ goto failed_read1;
-+ }
-+
-+ insert_inode_hash(i);
-+ return i;
-+
-+failed_read:
-+ ERROR("Unable to read inode [%x:%x]\n", block, offset);
-+
-+failed_read1:
-+ return NULL;
-+}
-+
-+
-+static int get_dir_index_using_offset(struct super_block *s, long long
-+ *next_block, unsigned int *next_offset,
-+ long long index_start,
-+ unsigned int index_offset, int i_count,
-+ long long f_pos)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ int i, length = 0;
-+ struct squashfs_dir_index_2 index;
-+
-+ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n",
-+ i_count, (unsigned int) f_pos);
-+
-+ if (f_pos == 0)
-+ goto finish;
-+
-+ for (i = 0; i < i_count; i++) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_index_2 sindex;
-+ squashfs_get_cached_block(s, (char *) &sindex,
-+ index_start, index_offset,
-+ sizeof(sindex), &index_start,
-+ &index_offset);
-+ SQUASHFS_SWAP_DIR_INDEX_2(&index, &sindex);
-+ } else
-+ squashfs_get_cached_block(s, (char *) &index,
-+ index_start, index_offset,
-+ sizeof(index), &index_start,
-+ &index_offset);
-+
-+ if (index.index > f_pos)
-+ break;
-+
-+ squashfs_get_cached_block(s, NULL, index_start, index_offset,
-+ index.size + 1, &index_start,
-+ &index_offset);
-+
-+ length = index.index;
-+ *next_block = index.start_block + sblk->directory_table_start;
-+ }
-+
-+ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
-+
-+finish:
-+ return length;
-+}
-+
-+
-+static int get_dir_index_using_name(struct super_block *s, long long
-+ *next_block, unsigned int *next_offset,
-+ long long index_start,
-+ unsigned int index_offset, int i_count,
-+ const char *name, int size)
-+{
-+ struct squashfs_sb_info *msblk = s->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ int i, length = 0;
-+ char buffer[sizeof(struct squashfs_dir_index_2) + SQUASHFS_NAME_LEN + 1];
-+ struct squashfs_dir_index_2 *index = (struct squashfs_dir_index_2 *) buffer;
-+ char str[SQUASHFS_NAME_LEN + 1];
-+
-+ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count);
-+
-+ strncpy(str, name, size);
-+ str[size] = '\0';
-+
-+ for (i = 0; i < i_count; i++) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_index_2 sindex;
-+ squashfs_get_cached_block(s, (char *) &sindex,
-+ index_start, index_offset,
-+ sizeof(sindex), &index_start,
-+ &index_offset);
-+ SQUASHFS_SWAP_DIR_INDEX_2(index, &sindex);
-+ } else
-+ squashfs_get_cached_block(s, (char *) index,
-+ index_start, index_offset,
-+ sizeof(struct squashfs_dir_index_2),
-+ &index_start, &index_offset);
-+
-+ squashfs_get_cached_block(s, index->name, index_start,
-+ index_offset, index->size + 1,
-+ &index_start, &index_offset);
-+
-+ index->name[index->size + 1] = '\0';
-+
-+ if (strcmp(index->name, str) > 0)
-+ break;
-+
-+ length = index->index;
-+ *next_block = index->start_block + sblk->directory_table_start;
-+ }
-+
-+ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
-+ return length;
-+}
-+
-+
-+static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir)
-+{
-+ struct inode *i = file->f_dentry->d_inode;
-+ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ long long next_block = SQUASHFS_I(i)->start_block +
-+ sblk->directory_table_start;
-+ int next_offset = SQUASHFS_I(i)->offset, length = 0, dirs_read = 0,
-+ dir_count;
-+ struct squashfs_dir_header_2 dirh;
-+ char buffer[sizeof(struct squashfs_dir_entry_2) + SQUASHFS_NAME_LEN + 1];
-+ struct squashfs_dir_entry_2 *dire = (struct squashfs_dir_entry_2 *) buffer;
-+
-+ TRACE("Entered squashfs_readdir_2 [%llx:%x]\n", next_block, next_offset);
-+
-+ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_start,
-+ SQUASHFS_I(i)->u.s2.directory_index_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_count,
-+ file->f_pos);
-+
-+ while (length < i_size_read(i)) {
-+ /* read directory header */
-+ if (msblk->swap) {
-+ struct squashfs_dir_header_2 sdirh;
-+
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
-+ next_block, next_offset, sizeof(sdirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdirh);
-+ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
-+ next_block, next_offset, sizeof(dirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(dirh);
-+ }
-+
-+ dir_count = dirh.count + 1;
-+ while (dir_count--) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_entry_2 sdire;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ &sdire, next_block, next_offset,
-+ sizeof(sdire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdire);
-+ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ dire, next_block, next_offset,
-+ sizeof(*dire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(*dire);
-+ }
-+
-+ if (!squashfs_get_cached_block(i->i_sb, dire->name,
-+ next_block, next_offset,
-+ dire->size + 1, &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += dire->size + 1;
-+
-+ if (file->f_pos >= length)
-+ continue;
-+
-+ dire->name[dire->size + 1] = '\0';
-+
-+ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d)\n",
-+ (unsigned int) dirent, dire->name,
-+ dire->size + 1, (int) file->f_pos,
-+ dirh.start_block, dire->offset,
-+ squashfs_filetype_table[dire->type]);
-+
-+ if (filldir(dirent, dire->name, dire->size + 1,
-+ file->f_pos, SQUASHFS_MK_VFS_INODE(
-+ dirh.start_block, dire->offset),
-+ squashfs_filetype_table[dire->type])
-+ < 0) {
-+ TRACE("Filldir returned less than 0\n");
-+ goto finish;
-+ }
-+ file->f_pos = length;
-+ dirs_read++;
-+ }
-+ }
-+
-+finish:
-+ return dirs_read;
-+
-+failed_read:
-+ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
-+ next_offset);
-+ return 0;
-+}
-+
-+
-+static struct dentry *squashfs_lookup_2(struct inode *i, struct dentry *dentry,
-+ struct nameidata *nd)
-+{
-+ const unsigned char *name = dentry->d_name.name;
-+ int len = dentry->d_name.len;
-+ struct inode *inode = NULL;
-+ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+ long long next_block = SQUASHFS_I(i)->start_block +
-+ sblk->directory_table_start;
-+ int next_offset = SQUASHFS_I(i)->offset, length = 0,
-+ dir_count;
-+ struct squashfs_dir_header_2 dirh;
-+ char buffer[sizeof(struct squashfs_dir_entry_2) + SQUASHFS_NAME_LEN];
-+ struct squashfs_dir_entry_2 *dire = (struct squashfs_dir_entry_2 *) buffer;
-+ int sorted = sblk->s_major == 2 && sblk->s_minor >= 1;
-+
-+ TRACE("Entered squashfs_lookup [%llx:%x]\n", next_block, next_offset);
-+
-+ if (len > SQUASHFS_NAME_LEN)
-+ goto exit_loop;
-+
-+ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_start,
-+ SQUASHFS_I(i)->u.s2.directory_index_offset,
-+ SQUASHFS_I(i)->u.s2.directory_index_count, name,
-+ len);
-+
-+ while (length < i_size_read(i)) {
-+ /* read directory header */
-+ if (msblk->swap) {
-+ struct squashfs_dir_header_2 sdirh;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
-+ next_block, next_offset, sizeof(sdirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdirh);
-+ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
-+ next_block, next_offset, sizeof(dirh),
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(dirh);
-+ }
-+
-+ dir_count = dirh.count + 1;
-+ while (dir_count--) {
-+ if (msblk->swap) {
-+ struct squashfs_dir_entry_2 sdire;
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ &sdire, next_block,next_offset,
-+ sizeof(sdire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(sdire);
-+ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire);
-+ } else {
-+ if (!squashfs_get_cached_block(i->i_sb, (char *)
-+ dire, next_block,next_offset,
-+ sizeof(*dire), &next_block,
-+ &next_offset))
-+ goto failed_read;
-+
-+ length += sizeof(*dire);
-+ }
-+
-+ if (!squashfs_get_cached_block(i->i_sb, dire->name,
-+ next_block, next_offset, dire->size + 1,
-+ &next_block, &next_offset))
-+ goto failed_read;
-+
-+ length += dire->size + 1;
-+
-+ if (sorted && name[0] < dire->name[0])
-+ goto exit_loop;
-+
-+ if ((len == dire->size + 1) && !strncmp(name,
-+ dire->name, len)) {
-+ squashfs_inode_t ino =
-+ SQUASHFS_MKINODE(dirh.start_block,
-+ dire->offset);
-+
-+ TRACE("calling squashfs_iget for directory "
-+ "entry %s, inode %x:%x, %lld\n", name,
-+ dirh.start_block, dire->offset, ino);
-+
-+ inode = (msblk->iget)(i->i_sb, ino);
-+
-+ goto exit_loop;
-+ }
-+ }
-+ }
-+
-+exit_loop:
-+ d_add(dentry, inode);
-+ return ERR_PTR(0);
-+
-+failed_read:
-+ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
-+ next_offset);
-+ goto exit_loop;
-+}
-+
-+
-+int squashfs_2_0_supported(struct squashfs_sb_info *msblk)
-+{
-+ struct squashfs_super_block *sblk = &msblk->sblk;
-+
-+ msblk->iget = squashfs_iget_2;
-+ msblk->read_fragment_index_table = read_fragment_index_table_2;
-+
-+ sblk->bytes_used = sblk->bytes_used_2;
-+ sblk->uid_start = sblk->uid_start_2;
-+ sblk->guid_start = sblk->guid_start_2;
-+ sblk->inode_table_start = sblk->inode_table_start_2;
-+ sblk->directory_table_start = sblk->directory_table_start_2;
-+ sblk->fragment_table_start = sblk->fragment_table_start_2;
-+
-+ return 1;
-+}
-diff -urN linux-2.6.19.old/fs/squashfs/squashfs.h linux-2.6.19.dev/fs/squashfs/squashfs.h
---- linux-2.6.19.old/fs/squashfs/squashfs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/squashfs.h 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,86 @@
-+/*
-+ * Squashfs - a compressed read only filesystem for Linux
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * squashfs.h
-+ */
-+
-+#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
-+#undef CONFIG_SQUASHFS_1_0_COMPATIBILITY
-+#endif
-+
-+#ifdef SQUASHFS_TRACE
-+#define TRACE(s, args...) printk(KERN_NOTICE "SQUASHFS: "s, ## args)
-+#else
-+#define TRACE(s, args...) {}
-+#endif
-+
-+#define ERROR(s, args...) printk(KERN_ERR "SQUASHFS error: "s, ## args)
-+
-+#define SERROR(s, args...) do { \
-+ if (!silent) \
-+ printk(KERN_ERR "SQUASHFS error: "s, ## args);\
-+ } while(0)
-+
-+#define WARNING(s, args...) printk(KERN_WARNING "SQUASHFS: "s, ## args)
-+
-+static inline struct squashfs_inode_info *SQUASHFS_I(struct inode *inode)
-+{
-+ return list_entry(inode, struct squashfs_inode_info, vfs_inode);
-+}
-+
-+#if defined(CONFIG_SQUASHFS_1_0_COMPATIBILITY ) || defined(CONFIG_SQUASHFS_2_0_COMPATIBILITY)
-+#define SQSH_EXTERN
-+extern unsigned int squashfs_read_data(struct super_block *s, char *buffer,
-+ long long index, unsigned int length,
-+ long long *next_index);
-+extern int squashfs_get_cached_block(struct super_block *s, char *buffer,
-+ long long block, unsigned int offset,
-+ int length, long long *next_block,
-+ unsigned int *next_offset);
-+extern void release_cached_fragment(struct squashfs_sb_info *msblk, struct
-+ squashfs_fragment_cache *fragment);
-+extern struct squashfs_fragment_cache *get_cached_fragment(struct super_block
-+ *s, long long start_block,
-+ int length);
-+extern struct address_space_operations squashfs_symlink_aops;
-+extern struct address_space_operations squashfs_aops;
-+extern struct address_space_operations squashfs_aops_4K;
-+extern struct inode_operations squashfs_dir_inode_ops;
-+#else
-+#define SQSH_EXTERN static
-+#endif
-+
-+#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
-+extern int squashfs_1_0_supported(struct squashfs_sb_info *msblk);
-+#else
-+static inline int squashfs_1_0_supported(struct squashfs_sb_info *msblk)
-+{
-+ return 0;
-+}
-+#endif
-+
-+#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+extern int squashfs_2_0_supported(struct squashfs_sb_info *msblk);
-+#else
-+static inline int squashfs_2_0_supported(struct squashfs_sb_info *msblk)
-+{
-+ return 0;
-+}
-+#endif
-diff -urN linux-2.6.19.old/include/linux/squashfs_fs.h linux-2.6.19.dev/include/linux/squashfs_fs.h
---- linux-2.6.19.old/include/linux/squashfs_fs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/squashfs_fs.h 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,911 @@
-+#ifndef SQUASHFS_FS
-+#define SQUASHFS_FS
-+
-+/*
-+ * Squashfs
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * squashfs_fs.h
-+ */
-+
-+#ifndef CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+#define CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+#endif
-+
-+#ifdef CONFIG_SQUASHFS_VMALLOC
-+#define SQUASHFS_ALLOC(a) vmalloc(a)
-+#define SQUASHFS_FREE(a) vfree(a)
-+#else
-+#define SQUASHFS_ALLOC(a) kmalloc(a, GFP_KERNEL)
-+#define SQUASHFS_FREE(a) kfree(a)
-+#endif
-+#define SQUASHFS_CACHED_FRAGMENTS CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE
-+#define SQUASHFS_MAJOR 3
-+#define SQUASHFS_MINOR 0
-+#define SQUASHFS_MAGIC 0x73717368
-+#define SQUASHFS_MAGIC_SWAP 0x68737173
-+#define SQUASHFS_START 0
-+
-+/* size of metadata (inode and directory) blocks */
-+#define SQUASHFS_METADATA_SIZE 8192
-+#define SQUASHFS_METADATA_LOG 13
-+
-+/* default size of data blocks */
-+#define SQUASHFS_FILE_SIZE 65536
-+#define SQUASHFS_FILE_LOG 16
-+
-+#define SQUASHFS_FILE_MAX_SIZE 65536
-+
-+/* Max number of uids and gids */
-+#define SQUASHFS_UIDS 256
-+#define SQUASHFS_GUIDS 255
-+
-+/* Max length of filename (not 255) */
-+#define SQUASHFS_NAME_LEN 256
-+
-+#define SQUASHFS_INVALID ((long long) 0xffffffffffff)
-+#define SQUASHFS_INVALID_FRAG ((unsigned int) 0xffffffff)
-+#define SQUASHFS_INVALID_BLK ((long long) -1)
-+#define SQUASHFS_USED_BLK ((long long) -2)
-+
-+/* Filesystem flags */
-+#define SQUASHFS_NOI 0
-+#define SQUASHFS_NOD 1
-+#define SQUASHFS_CHECK 2
-+#define SQUASHFS_NOF 3
-+#define SQUASHFS_NO_FRAG 4
-+#define SQUASHFS_ALWAYS_FRAG 5
-+#define SQUASHFS_DUPLICATE 6
-+
-+#define SQUASHFS_BIT(flag, bit) ((flag >> bit) & 1)
-+
-+#define SQUASHFS_UNCOMPRESSED_INODES(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_NOI)
-+
-+#define SQUASHFS_UNCOMPRESSED_DATA(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_NOD)
-+
-+#define SQUASHFS_UNCOMPRESSED_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_NOF)
-+
-+#define SQUASHFS_NO_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_NO_FRAG)
-+
-+#define SQUASHFS_ALWAYS_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_ALWAYS_FRAG)
-+
-+#define SQUASHFS_DUPLICATES(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_DUPLICATE)
-+
-+#define SQUASHFS_CHECK_DATA(flags) SQUASHFS_BIT(flags, \
-+ SQUASHFS_CHECK)
-+
-+#define SQUASHFS_MKFLAGS(noi, nod, check_data, nof, no_frag, always_frag, \
-+ duplicate_checking) (noi | (nod << 1) | (check_data << 2) \
-+ | (nof << 3) | (no_frag << 4) | (always_frag << 5) | \
-+ (duplicate_checking << 6))
-+
-+/* Max number of types and file types */
-+#define SQUASHFS_DIR_TYPE 1
-+#define SQUASHFS_FILE_TYPE 2
-+#define SQUASHFS_SYMLINK_TYPE 3
-+#define SQUASHFS_BLKDEV_TYPE 4
-+#define SQUASHFS_CHRDEV_TYPE 5
-+#define SQUASHFS_FIFO_TYPE 6
-+#define SQUASHFS_SOCKET_TYPE 7
-+#define SQUASHFS_LDIR_TYPE 8
-+#define SQUASHFS_LREG_TYPE 9
-+
-+/* 1.0 filesystem type definitions */
-+#define SQUASHFS_TYPES 5
-+#define SQUASHFS_IPC_TYPE 0
-+
-+/* Flag whether block is compressed or uncompressed, bit is set if block is
-+ * uncompressed */
-+#define SQUASHFS_COMPRESSED_BIT (1 << 15)
-+
-+#define SQUASHFS_COMPRESSED_SIZE(B) (((B) & ~SQUASHFS_COMPRESSED_BIT) ? \
-+ (B) & ~SQUASHFS_COMPRESSED_BIT : SQUASHFS_COMPRESSED_BIT)
-+
-+#define SQUASHFS_COMPRESSED(B) (!((B) & SQUASHFS_COMPRESSED_BIT))
-+
-+#define SQUASHFS_COMPRESSED_BIT_BLOCK (1 << 24)
-+
-+#define SQUASHFS_COMPRESSED_SIZE_BLOCK(B) (((B) & \
-+ ~SQUASHFS_COMPRESSED_BIT_BLOCK) ? (B) & \
-+ ~SQUASHFS_COMPRESSED_BIT_BLOCK : SQUASHFS_COMPRESSED_BIT_BLOCK)
-+
-+#define SQUASHFS_COMPRESSED_BLOCK(B) (!((B) & SQUASHFS_COMPRESSED_BIT_BLOCK))
-+
-+/*
-+ * Inode number ops. Inodes consist of a compressed block number, and an
-+ * uncompressed offset within that block
-+ */
-+#define SQUASHFS_INODE_BLK(a) ((unsigned int) ((a) >> 16))
-+
-+#define SQUASHFS_INODE_OFFSET(a) ((unsigned int) ((a) & 0xffff))
-+
-+#define SQUASHFS_MKINODE(A, B) ((squashfs_inode_t)(((squashfs_inode_t) (A)\
-+ << 16) + (B)))
-+
-+/* Compute 32 bit VFS inode number from squashfs inode number */
-+#define SQUASHFS_MK_VFS_INODE(a, b) ((unsigned int) (((a) << 8) + \
-+ ((b) >> 2) + 1))
-+/* XXX */
-+
-+/* Translate between VFS mode and squashfs mode */
-+#define SQUASHFS_MODE(a) ((a) & 0xfff)
-+
-+/* fragment and fragment table defines */
-+#define SQUASHFS_FRAGMENT_BYTES(A) (A * sizeof(struct squashfs_fragment_entry))
-+
-+#define SQUASHFS_FRAGMENT_INDEX(A) (SQUASHFS_FRAGMENT_BYTES(A) / \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEX_OFFSET(A) (SQUASHFS_FRAGMENT_BYTES(A) % \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEXES(A) ((SQUASHFS_FRAGMENT_BYTES(A) + \
-+ SQUASHFS_METADATA_SIZE - 1) / \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEX_BYTES(A) (SQUASHFS_FRAGMENT_INDEXES(A) *\
-+ sizeof(long long))
-+
-+/* cached data constants for filesystem */
-+#define SQUASHFS_CACHED_BLKS 8
-+
-+#define SQUASHFS_MAX_FILE_SIZE_LOG 64
-+
-+#define SQUASHFS_MAX_FILE_SIZE ((long long) 1 << \
-+ (SQUASHFS_MAX_FILE_SIZE_LOG - 2))
-+
-+#define SQUASHFS_MARKER_BYTE 0xff
-+
-+/* meta index cache */
-+#define SQUASHFS_META_INDEXES (SQUASHFS_METADATA_SIZE / sizeof(unsigned int))
-+#define SQUASHFS_META_ENTRIES 31
-+#define SQUASHFS_META_NUMBER 8
-+#define SQUASHFS_SLOTS 4
-+
-+struct meta_entry {
-+ long long data_block;
-+ unsigned int index_block;
-+ unsigned short offset;
-+ unsigned short pad;
-+};
-+
-+struct meta_index {
-+ unsigned int inode_number;
-+ unsigned int offset;
-+ unsigned short entries;
-+ unsigned short skip;
-+ unsigned short locked;
-+ unsigned short pad;
-+ struct meta_entry meta_entry[SQUASHFS_META_ENTRIES];
-+};
-+
-+
-+/*
-+ * definitions for structures on disk
-+ */
-+
-+typedef long long squashfs_block_t;
-+typedef long long squashfs_inode_t;
-+
-+struct squashfs_super_block {
-+ unsigned int s_magic;
-+ unsigned int inodes;
-+ unsigned int bytes_used_2;
-+ unsigned int uid_start_2;
-+ unsigned int guid_start_2;
-+ unsigned int inode_table_start_2;
-+ unsigned int directory_table_start_2;
-+ unsigned int s_major:16;
-+ unsigned int s_minor:16;
-+ unsigned int block_size_1:16;
-+ unsigned int block_log:16;
-+ unsigned int flags:8;
-+ unsigned int no_uids:8;
-+ unsigned int no_guids:8;
-+ unsigned int mkfs_time /* time of filesystem creation */;
-+ squashfs_inode_t root_inode;
-+ unsigned int block_size;
-+ unsigned int fragments;
-+ unsigned int fragment_table_start_2;
-+ long long bytes_used;
-+ long long uid_start;
-+ long long guid_start;
-+ long long inode_table_start;
-+ long long directory_table_start;
-+ long long fragment_table_start;
-+ long long unused;
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_index {
-+ unsigned int index;
-+ unsigned int start_block;
-+ unsigned char size;
-+ unsigned char name[0];
-+} __attribute__ ((packed));
-+
-+#define SQUASHFS_BASE_INODE_HEADER \
-+ unsigned int inode_type:4; \
-+ unsigned int mode:12; \
-+ unsigned int uid:8; \
-+ unsigned int guid:8; \
-+ unsigned int mtime; \
-+ unsigned int inode_number;
-+
-+struct squashfs_base_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+} __attribute__ ((packed));
-+
-+struct squashfs_ipc_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+} __attribute__ ((packed));
-+
-+struct squashfs_dev_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+ unsigned short rdev;
-+} __attribute__ ((packed));
-+
-+struct squashfs_symlink_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+ unsigned short symlink_size;
-+ char symlink[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_reg_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ squashfs_block_t start_block;
-+ unsigned int fragment;
-+ unsigned int offset;
-+ unsigned int file_size;
-+ unsigned short block_list[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_lreg_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+ squashfs_block_t start_block;
-+ unsigned int fragment;
-+ unsigned int offset;
-+ long long file_size;
-+ unsigned short block_list[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+ unsigned int file_size:19;
-+ unsigned int offset:13;
-+ unsigned int start_block;
-+ unsigned int parent_inode;
-+} __attribute__ ((packed));
-+
-+struct squashfs_ldir_inode_header {
-+ SQUASHFS_BASE_INODE_HEADER;
-+ unsigned int nlink;
-+ unsigned int file_size:27;
-+ unsigned int offset:13;
-+ unsigned int start_block;
-+ unsigned int i_count:16;
-+ unsigned int parent_inode;
-+ struct squashfs_dir_index index[0];
-+} __attribute__ ((packed));
-+
-+union squashfs_inode_header {
-+ struct squashfs_base_inode_header base;
-+ struct squashfs_dev_inode_header dev;
-+ struct squashfs_symlink_inode_header symlink;
-+ struct squashfs_reg_inode_header reg;
-+ struct squashfs_lreg_inode_header lreg;
-+ struct squashfs_dir_inode_header dir;
-+ struct squashfs_ldir_inode_header ldir;
-+ struct squashfs_ipc_inode_header ipc;
-+};
-+
-+struct squashfs_dir_entry {
-+ unsigned int offset:13;
-+ unsigned int type:3;
-+ unsigned int size:8;
-+ int inode_number:16;
-+ char name[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_header {
-+ unsigned int count:8;
-+ unsigned int start_block;
-+ unsigned int inode_number;
-+} __attribute__ ((packed));
-+
-+struct squashfs_fragment_entry {
-+ long long start_block;
-+ unsigned int size;
-+ unsigned int unused;
-+} __attribute__ ((packed));
-+
-+extern int squashfs_uncompress_block(void *d, int dstlen, void *s, int srclen);
-+extern int squashfs_uncompress_init(void);
-+extern int squashfs_uncompress_exit(void);
-+
-+/*
-+ * macros to convert each packed bitfield structure from little endian to big
-+ * endian and vice versa. These are needed when creating or using a filesystem
-+ * on a machine with different byte ordering to the target architecture.
-+ *
-+ */
-+
-+#define SQUASHFS_SWAP_START \
-+ int bits;\
-+ int b_pos;\
-+ unsigned long long val;\
-+ unsigned char *s;\
-+ unsigned char *d;
-+
-+#define SQUASHFS_SWAP_SUPER_BLOCK(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_super_block));\
-+ SQUASHFS_SWAP((s)->s_magic, d, 0, 32);\
-+ SQUASHFS_SWAP((s)->inodes, d, 32, 32);\
-+ SQUASHFS_SWAP((s)->bytes_used_2, d, 64, 32);\
-+ SQUASHFS_SWAP((s)->uid_start_2, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->guid_start_2, d, 128, 32);\
-+ SQUASHFS_SWAP((s)->inode_table_start_2, d, 160, 32);\
-+ SQUASHFS_SWAP((s)->directory_table_start_2, d, 192, 32);\
-+ SQUASHFS_SWAP((s)->s_major, d, 224, 16);\
-+ SQUASHFS_SWAP((s)->s_minor, d, 240, 16);\
-+ SQUASHFS_SWAP((s)->block_size_1, d, 256, 16);\
-+ SQUASHFS_SWAP((s)->block_log, d, 272, 16);\
-+ SQUASHFS_SWAP((s)->flags, d, 288, 8);\
-+ SQUASHFS_SWAP((s)->no_uids, d, 296, 8);\
-+ SQUASHFS_SWAP((s)->no_guids, d, 304, 8);\
-+ SQUASHFS_SWAP((s)->mkfs_time, d, 312, 32);\
-+ SQUASHFS_SWAP((s)->root_inode, d, 344, 64);\
-+ SQUASHFS_SWAP((s)->block_size, d, 408, 32);\
-+ SQUASHFS_SWAP((s)->fragments, d, 440, 32);\
-+ SQUASHFS_SWAP((s)->fragment_table_start_2, d, 472, 32);\
-+ SQUASHFS_SWAP((s)->bytes_used, d, 504, 64);\
-+ SQUASHFS_SWAP((s)->uid_start, d, 568, 64);\
-+ SQUASHFS_SWAP((s)->guid_start, d, 632, 64);\
-+ SQUASHFS_SWAP((s)->inode_table_start, d, 696, 64);\
-+ SQUASHFS_SWAP((s)->directory_table_start, d, 760, 64);\
-+ SQUASHFS_SWAP((s)->fragment_table_start, d, 824, 64);\
-+ SQUASHFS_SWAP((s)->unused, d, 888, 64);\
-+}
-+
-+#define SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\
-+ SQUASHFS_MEMSET(s, d, n);\
-+ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
-+ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
-+ SQUASHFS_SWAP((s)->uid, d, 16, 8);\
-+ SQUASHFS_SWAP((s)->guid, d, 24, 8);\
-+ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\
-+ SQUASHFS_SWAP((s)->inode_number, d, 64, 32);
-+
-+#define SQUASHFS_SWAP_BASE_INODE_HEADER(s, d, n) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\
-+}
-+
-+#define SQUASHFS_SWAP_IPC_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_ipc_inode_header))\
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_DEV_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_dev_inode_header)); \
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->rdev, d, 128, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_symlink_inode_header));\
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->symlink_size, d, 128, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_REG_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_reg_inode_header));\
-+ SQUASHFS_SWAP((s)->start_block, d, 96, 64);\
-+ SQUASHFS_SWAP((s)->fragment, d, 160, 32);\
-+ SQUASHFS_SWAP((s)->offset, d, 192, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 224, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_LREG_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_lreg_inode_header));\
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 128, 64);\
-+ SQUASHFS_SWAP((s)->fragment, d, 192, 32);\
-+ SQUASHFS_SWAP((s)->offset, d, 224, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 256, 64);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_dir_inode_header));\
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 128, 19);\
-+ SQUASHFS_SWAP((s)->offset, d, 147, 13);\
-+ SQUASHFS_SWAP((s)->start_block, d, 160, 32);\
-+ SQUASHFS_SWAP((s)->parent_inode, d, 192, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_LDIR_INODE_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
-+ sizeof(struct squashfs_ldir_inode_header));\
-+ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 128, 27);\
-+ SQUASHFS_SWAP((s)->offset, d, 155, 13);\
-+ SQUASHFS_SWAP((s)->start_block, d, 168, 32);\
-+ SQUASHFS_SWAP((s)->i_count, d, 200, 16);\
-+ SQUASHFS_SWAP((s)->parent_inode, d, 216, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_INDEX(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index));\
-+ SQUASHFS_SWAP((s)->index, d, 0, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 32, 32);\
-+ SQUASHFS_SWAP((s)->size, d, 64, 8);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_HEADER(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header));\
-+ SQUASHFS_SWAP((s)->count, d, 0, 8);\
-+ SQUASHFS_SWAP((s)->start_block, d, 8, 32);\
-+ SQUASHFS_SWAP((s)->inode_number, d, 40, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_ENTRY(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry));\
-+ SQUASHFS_SWAP((s)->offset, d, 0, 13);\
-+ SQUASHFS_SWAP((s)->type, d, 13, 3);\
-+ SQUASHFS_SWAP((s)->size, d, 16, 8);\
-+ SQUASHFS_SWAP((s)->inode_number, d, 24, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_FRAGMENT_ENTRY(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry));\
-+ SQUASHFS_SWAP((s)->start_block, d, 0, 64);\
-+ SQUASHFS_SWAP((s)->size, d, 64, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_SHORTS(s, d, n) {\
-+ int entry;\
-+ int bit_position;\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, n * 2);\
-+ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
-+ 16)\
-+ SQUASHFS_SWAP(s[entry], d, bit_position, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_INTS(s, d, n) {\
-+ int entry;\
-+ int bit_position;\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, n * 4);\
-+ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
-+ 32)\
-+ SQUASHFS_SWAP(s[entry], d, bit_position, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_LONG_LONGS(s, d, n) {\
-+ int entry;\
-+ int bit_position;\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, n * 8);\
-+ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
-+ 64)\
-+ SQUASHFS_SWAP(s[entry], d, bit_position, 64);\
-+}
-+
-+#define SQUASHFS_SWAP_DATA(s, d, n, bits) {\
-+ int entry;\
-+ int bit_position;\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, n * bits / 8);\
-+ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
-+ bits)\
-+ SQUASHFS_SWAP(s[entry], d, bit_position, bits);\
-+}
-+
-+#define SQUASHFS_SWAP_FRAGMENT_INDEXES(s, d, n) SQUASHFS_SWAP_LONG_LONGS(s, d, n)
-+
-+#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
-+
-+struct squashfs_base_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+} __attribute__ ((packed));
-+
-+struct squashfs_ipc_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+ unsigned int type:4;
-+ unsigned int offset:4;
-+} __attribute__ ((packed));
-+
-+struct squashfs_dev_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+ unsigned short rdev;
-+} __attribute__ ((packed));
-+
-+struct squashfs_symlink_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+ unsigned short symlink_size;
-+ char symlink[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_reg_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+ unsigned int mtime;
-+ unsigned int start_block;
-+ unsigned int file_size:32;
-+ unsigned short block_list[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_inode_header_1 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:4; /* index into uid table */
-+ unsigned int guid:4; /* index into guid table */
-+ unsigned int file_size:19;
-+ unsigned int offset:13;
-+ unsigned int mtime;
-+ unsigned int start_block:24;
-+} __attribute__ ((packed));
-+
-+#define SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n) \
-+ SQUASHFS_MEMSET(s, d, n);\
-+ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
-+ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
-+ SQUASHFS_SWAP((s)->uid, d, 16, 4);\
-+ SQUASHFS_SWAP((s)->guid, d, 20, 4);
-+
-+#define SQUASHFS_SWAP_BASE_INODE_HEADER_1(s, d, n) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n)\
-+}
-+
-+#define SQUASHFS_SWAP_IPC_INODE_HEADER_1(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
-+ sizeof(struct squashfs_ipc_inode_header_1));\
-+ SQUASHFS_SWAP((s)->type, d, 24, 4);\
-+ SQUASHFS_SWAP((s)->offset, d, 28, 4);\
-+}
-+
-+#define SQUASHFS_SWAP_DEV_INODE_HEADER_1(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
-+ sizeof(struct squashfs_dev_inode_header_1));\
-+ SQUASHFS_SWAP((s)->rdev, d, 24, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_1(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
-+ sizeof(struct squashfs_symlink_inode_header_1));\
-+ SQUASHFS_SWAP((s)->symlink_size, d, 24, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_REG_INODE_HEADER_1(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
-+ sizeof(struct squashfs_reg_inode_header_1));\
-+ SQUASHFS_SWAP((s)->mtime, d, 24, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 56, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 88, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_INODE_HEADER_1(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
-+ sizeof(struct squashfs_dir_inode_header_1));\
-+ SQUASHFS_SWAP((s)->file_size, d, 24, 19);\
-+ SQUASHFS_SWAP((s)->offset, d, 43, 13);\
-+ SQUASHFS_SWAP((s)->mtime, d, 56, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 88, 24);\
-+}
-+
-+#endif
-+
-+#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+
-+struct squashfs_dir_index_2 {
-+ unsigned int index:27;
-+ unsigned int start_block:29;
-+ unsigned char size;
-+ unsigned char name[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_base_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+} __attribute__ ((packed));
-+
-+struct squashfs_ipc_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+} __attribute__ ((packed));
-+
-+struct squashfs_dev_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+ unsigned short rdev;
-+} __attribute__ ((packed));
-+
-+struct squashfs_symlink_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+ unsigned short symlink_size;
-+ char symlink[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_reg_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+ unsigned int mtime;
-+ unsigned int start_block;
-+ unsigned int fragment;
-+ unsigned int offset;
-+ unsigned int file_size:32;
-+ unsigned short block_list[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+ unsigned int file_size:19;
-+ unsigned int offset:13;
-+ unsigned int mtime;
-+ unsigned int start_block:24;
-+} __attribute__ ((packed));
-+
-+struct squashfs_ldir_inode_header_2 {
-+ unsigned int inode_type:4;
-+ unsigned int mode:12; /* protection */
-+ unsigned int uid:8; /* index into uid table */
-+ unsigned int guid:8; /* index into guid table */
-+ unsigned int file_size:27;
-+ unsigned int offset:13;
-+ unsigned int mtime;
-+ unsigned int start_block:24;
-+ unsigned int i_count:16;
-+ struct squashfs_dir_index_2 index[0];
-+} __attribute__ ((packed));
-+
-+union squashfs_inode_header_2 {
-+ struct squashfs_base_inode_header_2 base;
-+ struct squashfs_dev_inode_header_2 dev;
-+ struct squashfs_symlink_inode_header_2 symlink;
-+ struct squashfs_reg_inode_header_2 reg;
-+ struct squashfs_dir_inode_header_2 dir;
-+ struct squashfs_ldir_inode_header_2 ldir;
-+ struct squashfs_ipc_inode_header_2 ipc;
-+};
-+
-+struct squashfs_dir_header_2 {
-+ unsigned int count:8;
-+ unsigned int start_block:24;
-+} __attribute__ ((packed));
-+
-+struct squashfs_dir_entry_2 {
-+ unsigned int offset:13;
-+ unsigned int type:3;
-+ unsigned int size:8;
-+ char name[0];
-+} __attribute__ ((packed));
-+
-+struct squashfs_fragment_entry_2 {
-+ unsigned int start_block;
-+ unsigned int size;
-+} __attribute__ ((packed));
-+
-+#define SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\
-+ SQUASHFS_MEMSET(s, d, n);\
-+ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
-+ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
-+ SQUASHFS_SWAP((s)->uid, d, 16, 8);\
-+ SQUASHFS_SWAP((s)->guid, d, 24, 8);\
-+
-+#define SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, n) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\
-+}
-+
-+#define SQUASHFS_SWAP_IPC_INODE_HEADER_2(s, d) \
-+ SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, sizeof(struct squashfs_ipc_inode_header_2))
-+
-+#define SQUASHFS_SWAP_DEV_INODE_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
-+ sizeof(struct squashfs_dev_inode_header_2)); \
-+ SQUASHFS_SWAP((s)->rdev, d, 32, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
-+ sizeof(struct squashfs_symlink_inode_header_2));\
-+ SQUASHFS_SWAP((s)->symlink_size, d, 32, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_REG_INODE_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
-+ sizeof(struct squashfs_reg_inode_header_2));\
-+ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 64, 32);\
-+ SQUASHFS_SWAP((s)->fragment, d, 96, 32);\
-+ SQUASHFS_SWAP((s)->offset, d, 128, 32);\
-+ SQUASHFS_SWAP((s)->file_size, d, 160, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_INODE_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
-+ sizeof(struct squashfs_dir_inode_header_2));\
-+ SQUASHFS_SWAP((s)->file_size, d, 32, 19);\
-+ SQUASHFS_SWAP((s)->offset, d, 51, 13);\
-+ SQUASHFS_SWAP((s)->mtime, d, 64, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 96, 24);\
-+}
-+
-+#define SQUASHFS_SWAP_LDIR_INODE_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
-+ sizeof(struct squashfs_ldir_inode_header_2));\
-+ SQUASHFS_SWAP((s)->file_size, d, 32, 27);\
-+ SQUASHFS_SWAP((s)->offset, d, 59, 13);\
-+ SQUASHFS_SWAP((s)->mtime, d, 72, 32);\
-+ SQUASHFS_SWAP((s)->start_block, d, 104, 24);\
-+ SQUASHFS_SWAP((s)->i_count, d, 128, 16);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_INDEX_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index_2));\
-+ SQUASHFS_SWAP((s)->index, d, 0, 27);\
-+ SQUASHFS_SWAP((s)->start_block, d, 27, 29);\
-+ SQUASHFS_SWAP((s)->size, d, 56, 8);\
-+}
-+#define SQUASHFS_SWAP_DIR_HEADER_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header_2));\
-+ SQUASHFS_SWAP((s)->count, d, 0, 8);\
-+ SQUASHFS_SWAP((s)->start_block, d, 8, 24);\
-+}
-+
-+#define SQUASHFS_SWAP_DIR_ENTRY_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry_2));\
-+ SQUASHFS_SWAP((s)->offset, d, 0, 13);\
-+ SQUASHFS_SWAP((s)->type, d, 13, 3);\
-+ SQUASHFS_SWAP((s)->size, d, 16, 8);\
-+}
-+
-+#define SQUASHFS_SWAP_FRAGMENT_ENTRY_2(s, d) {\
-+ SQUASHFS_SWAP_START\
-+ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry_2));\
-+ SQUASHFS_SWAP((s)->start_block, d, 0, 32);\
-+ SQUASHFS_SWAP((s)->size, d, 32, 32);\
-+}
-+
-+#define SQUASHFS_SWAP_FRAGMENT_INDEXES_2(s, d, n) SQUASHFS_SWAP_INTS(s, d, n)
-+
-+/* fragment and fragment table defines */
-+#define SQUASHFS_FRAGMENT_BYTES_2(A) (A * sizeof(struct squashfs_fragment_entry_2))
-+
-+#define SQUASHFS_FRAGMENT_INDEX_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) / \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEX_OFFSET_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) % \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEXES_2(A) ((SQUASHFS_FRAGMENT_BYTES_2(A) + \
-+ SQUASHFS_METADATA_SIZE - 1) / \
-+ SQUASHFS_METADATA_SIZE)
-+
-+#define SQUASHFS_FRAGMENT_INDEX_BYTES_2(A) (SQUASHFS_FRAGMENT_INDEXES_2(A) *\
-+ sizeof(int))
-+
-+#endif
-+
-+#ifdef __KERNEL__
-+
-+/*
-+ * macros used to swap each structure entry, taking into account
-+ * bitfields and different bitfield placing conventions on differing
-+ * architectures
-+ */
-+
-+#include <asm/byteorder.h>
-+
-+#ifdef __BIG_ENDIAN
-+ /* convert from little endian to big endian */
-+#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \
-+ tbits, b_pos)
-+#else
-+ /* convert from big endian to little endian */
-+#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \
-+ tbits, 64 - tbits - b_pos)
-+#endif
-+
-+#define _SQUASHFS_SWAP(value, p, pos, tbits, SHIFT) {\
-+ b_pos = pos % 8;\
-+ val = 0;\
-+ s = (unsigned char *)p + (pos / 8);\
-+ d = ((unsigned char *) &val) + 7;\
-+ for(bits = 0; bits < (tbits + b_pos); bits += 8) \
-+ *d-- = *s++;\
-+ value = (val >> (SHIFT))/* & ((1 << tbits) - 1)*/;\
-+}
-+
-+#define SQUASHFS_MEMSET(s, d, n) memset(s, 0, n);
-+
-+#endif
-+#endif
-diff -urN linux-2.6.19.old/include/linux/squashfs_fs_i.h linux-2.6.19.dev/include/linux/squashfs_fs_i.h
---- linux-2.6.19.old/include/linux/squashfs_fs_i.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/squashfs_fs_i.h 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,45 @@
-+#ifndef SQUASHFS_FS_I
-+#define SQUASHFS_FS_I
-+/*
-+ * Squashfs
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * squashfs_fs_i.h
-+ */
-+
-+struct squashfs_inode_info {
-+ long long start_block;
-+ unsigned int offset;
-+ union {
-+ struct {
-+ long long fragment_start_block;
-+ unsigned int fragment_size;
-+ unsigned int fragment_offset;
-+ long long block_list_start;
-+ } s1;
-+ struct {
-+ long long directory_index_start;
-+ unsigned int directory_index_offset;
-+ unsigned int directory_index_count;
-+ unsigned int parent_inode;
-+ } s2;
-+ } u;
-+ struct inode vfs_inode;
-+};
-+#endif
-diff -urN linux-2.6.19.old/include/linux/squashfs_fs_sb.h linux-2.6.19.dev/include/linux/squashfs_fs_sb.h
---- linux-2.6.19.old/include/linux/squashfs_fs_sb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/squashfs_fs_sb.h 2006-12-14 03:13:16.000000000 +0100
-@@ -0,0 +1,74 @@
-+#ifndef SQUASHFS_FS_SB
-+#define SQUASHFS_FS_SB
-+/*
-+ * Squashfs
-+ *
-+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
-+ * Phillip Lougher <phillip@lougher.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2,
-+ * or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ *
-+ * squashfs_fs_sb.h
-+ */
-+
-+#include <linux/squashfs_fs.h>
-+
-+struct squashfs_cache {
-+ long long block;
-+ int length;
-+ long long next_index;
-+ char *data;
-+};
-+
-+struct squashfs_fragment_cache {
-+ long long block;
-+ int length;
-+ unsigned int locked;
-+ char *data;
-+};
-+
-+struct squashfs_sb_info {
-+ struct squashfs_super_block sblk;
-+ int devblksize;
-+ int devblksize_log2;
-+ int swap;
-+ struct squashfs_cache *block_cache;
-+ struct squashfs_fragment_cache *fragment;
-+ int next_cache;
-+ int next_fragment;
-+ int next_meta_index;
-+ unsigned int *uid;
-+ unsigned int *guid;
-+ long long *fragment_index;
-+ unsigned int *fragment_index_2;
-+ unsigned int read_size;
-+ char *read_data;
-+ char *read_page;
-+ struct semaphore read_data_mutex;
-+ struct semaphore read_page_mutex;
-+ struct semaphore block_cache_mutex;
-+ struct semaphore fragment_mutex;
-+ struct semaphore meta_index_mutex;
-+ wait_queue_head_t waitq;
-+ wait_queue_head_t fragment_wait_queue;
-+ struct meta_index *meta_index;
-+ struct inode *(*iget)(struct super_block *s, squashfs_inode_t \
-+ inode);
-+ long long (*read_blocklist)(struct inode *inode, int \
-+ index, int readahead_blks, char *block_list, \
-+ unsigned short **block_p, unsigned int *bsize);
-+ int (*read_fragment_index_table)(struct super_block *s);
-+};
-+#endif
-diff -urN linux-2.6.19.old/init/do_mounts_rd.c linux-2.6.19.dev/init/do_mounts_rd.c
---- linux-2.6.19.old/init/do_mounts_rd.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/init/do_mounts_rd.c 2006-12-14 03:13:16.000000000 +0100
-@@ -5,6 +5,7 @@
- #include <linux/ext2_fs.h>
- #include <linux/romfs_fs.h>
- #include <linux/cramfs_fs.h>
-+#include <linux/squashfs_fs.h>
- #include <linux/initrd.h>
- #include <linux/string.h>
-
-@@ -39,6 +40,7 @@
- * numbers could not be found.
- *
- * We currently check for the following magic numbers:
-+ * squashfs
- * minix
- * ext2
- * romfs
-@@ -53,6 +55,7 @@
- struct ext2_super_block *ext2sb;
- struct romfs_super_block *romfsb;
- struct cramfs_super *cramfsb;
-+ struct squashfs_super_block *squashfsb;
- int nblocks = -1;
- unsigned char *buf;
-
-@@ -64,6 +67,7 @@
- ext2sb = (struct ext2_super_block *) buf;
- romfsb = (struct romfs_super_block *) buf;
- cramfsb = (struct cramfs_super *) buf;
-+ squashfsb = (struct squashfs_super_block *) buf;
- memset(buf, 0xe5, size);
-
- /*
-@@ -101,6 +105,15 @@
- goto done;
- }
-
-+ /* squashfs is at block zero too */
-+ if (squashfsb->s_magic == SQUASHFS_MAGIC) {
-+ printk(KERN_NOTICE
-+ "RAMDISK: squashfs filesystem found at block %d\n",
-+ start_block);
-+ nblocks = (squashfsb->bytes_used+BLOCK_SIZE-1)>>BLOCK_SIZE_BITS;
-+ goto done;
-+ }
-+
- /*
- * Read block 1 to test for minix and ext2 superblock
- */
+++ /dev/null
---- linux-2.6.19.old/lib/Makefile 2007-04-18 17:41:22.679403384 +0200
-+++ linux-2.6.19.dev/lib/Makefile 2007-04-18 17:41:43.303268080 +0200
-@@ -54,6 +54,7 @@
- obj-$(CONFIG_AUDIT_GENERIC) += audit.o
-
- obj-$(CONFIG_SWIOTLB) += swiotlb.o
-+obj-y += LzmaDecode.o
-
- hostprogs-y := gen_crc32table
- clean-files := crc32table.h
---- linux-2.6.19.old/lib/LzmaDecode.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/lib/LzmaDecode.c 2006-12-14 03:13:20.000000000 +0100
-@@ -0,0 +1,663 @@
-+/*
-+ LzmaDecode.c
-+ LZMA Decoder
-+
-+ LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
-+ http://www.7-zip.org/
-+
-+ LZMA SDK is licensed under two licenses:
-+ 1) GNU Lesser General Public License (GNU LGPL)
-+ 2) Common Public License (CPL)
-+ It means that you can select one of these two licenses and
-+ follow rules of that license.
-+
-+ SPECIAL EXCEPTION:
-+ Igor Pavlov, as the author of this code, expressly permits you to
-+ statically or dynamically link your code (or bind by name) to the
-+ interfaces of this file without subjecting your linked code to the
-+ terms of the CPL or GNU LGPL. Any modifications or additions
-+ to this file, however, are subject to the LGPL or CPL terms.
-+*/
-+
-+#include <linux/LzmaDecode.h>
-+
-+#ifndef Byte
-+#define Byte unsigned char
-+#endif
-+
-+#define kNumTopBits 24
-+#define kTopValue ((UInt32)1 << kNumTopBits)
-+
-+#define kNumBitModelTotalBits 11
-+#define kBitModelTotal (1 << kNumBitModelTotalBits)
-+#define kNumMoveBits 5
-+
-+typedef struct _CRangeDecoder
-+{
-+ Byte *Buffer;
-+ Byte *BufferLim;
-+ UInt32 Range;
-+ UInt32 Code;
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *InCallback;
-+ int Result;
-+ #endif
-+ int ExtraBytes;
-+} CRangeDecoder;
-+
-+Byte RangeDecoderReadByte(CRangeDecoder *rd)
-+{
-+ if (rd->Buffer == rd->BufferLim)
-+ {
-+ #ifdef _LZMA_IN_CB
-+ UInt32 size;
-+ rd->Result = rd->InCallback->Read(rd->InCallback, &rd->Buffer, &size);
-+ rd->BufferLim = rd->Buffer + size;
-+ if (size == 0)
-+ #endif
-+ {
-+ rd->ExtraBytes = 1;
-+ return 0xFF;
-+ }
-+ }
-+ return (*rd->Buffer++);
-+}
-+
-+/* #define ReadByte (*rd->Buffer++) */
-+#define ReadByte (RangeDecoderReadByte(rd))
-+
-+void RangeDecoderInit(CRangeDecoder *rd,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback
-+ #else
-+ Byte *stream, UInt32 bufferSize
-+ #endif
-+ )
-+{
-+ int i;
-+ #ifdef _LZMA_IN_CB
-+ rd->InCallback = inCallback;
-+ rd->Buffer = rd->BufferLim = 0;
-+ #else
-+ rd->Buffer = stream;
-+ rd->BufferLim = stream + bufferSize;
-+ #endif
-+ rd->ExtraBytes = 0;
-+ rd->Code = 0;
-+ rd->Range = (0xFFFFFFFF);
-+ for(i = 0; i < 5; i++)
-+ rd->Code = (rd->Code << 8) | ReadByte;
-+}
-+
-+#define RC_INIT_VAR UInt32 range = rd->Range; UInt32 code = rd->Code;
-+#define RC_FLUSH_VAR rd->Range = range; rd->Code = code;
-+#define RC_NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | ReadByte; }
-+
-+UInt32 RangeDecoderDecodeDirectBits(CRangeDecoder *rd, int numTotalBits)
-+{
-+ RC_INIT_VAR
-+ UInt32 result = 0;
-+ int i;
-+ for (i = numTotalBits; i > 0; i--)
-+ {
-+ /* UInt32 t; */
-+ range >>= 1;
-+
-+ result <<= 1;
-+ if (code >= range)
-+ {
-+ code -= range;
-+ result |= 1;
-+ }
-+ /*
-+ t = (code - range) >> 31;
-+ t &= 1;
-+ code -= range & (t - 1);
-+ result = (result + result) | (1 - t);
-+ */
-+ RC_NORMALIZE
-+ }
-+ RC_FLUSH_VAR
-+ return result;
-+}
-+
-+int RangeDecoderBitDecode(CProb *prob, CRangeDecoder *rd)
-+{
-+ UInt32 bound = (rd->Range >> kNumBitModelTotalBits) * *prob;
-+ if (rd->Code < bound)
-+ {
-+ rd->Range = bound;
-+ *prob += (kBitModelTotal - *prob) >> kNumMoveBits;
-+ if (rd->Range < kTopValue)
-+ {
-+ rd->Code = (rd->Code << 8) | ReadByte;
-+ rd->Range <<= 8;
-+ }
-+ return 0;
-+ }
-+ else
-+ {
-+ rd->Range -= bound;
-+ rd->Code -= bound;
-+ *prob -= (*prob) >> kNumMoveBits;
-+ if (rd->Range < kTopValue)
-+ {
-+ rd->Code = (rd->Code << 8) | ReadByte;
-+ rd->Range <<= 8;
-+ }
-+ return 1;
-+ }
-+}
-+
-+#define RC_GET_BIT2(prob, mi, A0, A1) \
-+ UInt32 bound = (range >> kNumBitModelTotalBits) * *prob; \
-+ if (code < bound) \
-+ { A0; range = bound; *prob += (kBitModelTotal - *prob) >> kNumMoveBits; mi <<= 1; } \
-+ else \
-+ { A1; range -= bound; code -= bound; *prob -= (*prob) >> kNumMoveBits; mi = (mi + mi) + 1; } \
-+ RC_NORMALIZE
-+
-+#define RC_GET_BIT(prob, mi) RC_GET_BIT2(prob, mi, ; , ;)
-+
-+int RangeDecoderBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-+{
-+ int mi = 1;
-+ int i;
-+ #ifdef _LZMA_LOC_OPT
-+ RC_INIT_VAR
-+ #endif
-+ for(i = numLevels; i > 0; i--)
-+ {
-+ #ifdef _LZMA_LOC_OPT
-+ CProb *prob = probs + mi;
-+ RC_GET_BIT(prob, mi)
-+ #else
-+ mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd);
-+ #endif
-+ }
-+ #ifdef _LZMA_LOC_OPT
-+ RC_FLUSH_VAR
-+ #endif
-+ return mi - (1 << numLevels);
-+}
-+
-+int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
-+{
-+ int mi = 1;
-+ int i;
-+ int symbol = 0;
-+ #ifdef _LZMA_LOC_OPT
-+ RC_INIT_VAR
-+ #endif
-+ for(i = 0; i < numLevels; i++)
-+ {
-+ #ifdef _LZMA_LOC_OPT
-+ CProb *prob = probs + mi;
-+ RC_GET_BIT2(prob, mi, ; , symbol |= (1 << i))
-+ #else
-+ int bit = RangeDecoderBitDecode(probs + mi, rd);
-+ mi = mi + mi + bit;
-+ symbol |= (bit << i);
-+ #endif
-+ }
-+ #ifdef _LZMA_LOC_OPT
-+ RC_FLUSH_VAR
-+ #endif
-+ return symbol;
-+}
-+
-+Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)
-+{
-+ int symbol = 1;
-+ #ifdef _LZMA_LOC_OPT
-+ RC_INIT_VAR
-+ #endif
-+ do
-+ {
-+ #ifdef _LZMA_LOC_OPT
-+ CProb *prob = probs + symbol;
-+ RC_GET_BIT(prob, symbol)
-+ #else
-+ symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
-+ #endif
-+ }
-+ while (symbol < 0x100);
-+ #ifdef _LZMA_LOC_OPT
-+ RC_FLUSH_VAR
-+ #endif
-+ return symbol;
-+}
-+
-+Byte LzmaLiteralDecodeMatch(CProb *probs, CRangeDecoder *rd, Byte matchByte)
-+{
-+ int symbol = 1;
-+ #ifdef _LZMA_LOC_OPT
-+ RC_INIT_VAR
-+ #endif
-+ do
-+ {
-+ int bit;
-+ int matchBit = (matchByte >> 7) & 1;
-+ matchByte <<= 1;
-+ #ifdef _LZMA_LOC_OPT
-+ {
-+ CProb *prob = probs + ((1 + matchBit) << 8) + symbol;
-+ RC_GET_BIT2(prob, symbol, bit = 0, bit = 1)
-+ }
-+ #else
-+ bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd);
-+ symbol = (symbol << 1) | bit;
-+ #endif
-+ if (matchBit != bit)
-+ {
-+ while (symbol < 0x100)
-+ {
-+ #ifdef _LZMA_LOC_OPT
-+ CProb *prob = probs + symbol;
-+ RC_GET_BIT(prob, symbol)
-+ #else
-+ symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
-+ #endif
-+ }
-+ break;
-+ }
-+ }
-+ while (symbol < 0x100);
-+ #ifdef _LZMA_LOC_OPT
-+ RC_FLUSH_VAR
-+ #endif
-+ return symbol;
-+}
-+
-+#define kNumPosBitsMax 4
-+#define kNumPosStatesMax (1 << kNumPosBitsMax)
-+
-+#define kLenNumLowBits 3
-+#define kLenNumLowSymbols (1 << kLenNumLowBits)
-+#define kLenNumMidBits 3
-+#define kLenNumMidSymbols (1 << kLenNumMidBits)
-+#define kLenNumHighBits 8
-+#define kLenNumHighSymbols (1 << kLenNumHighBits)
-+
-+#define LenChoice 0
-+#define LenChoice2 (LenChoice + 1)
-+#define LenLow (LenChoice2 + 1)
-+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-+
-+int LzmaLenDecode(CProb *p, CRangeDecoder *rd, int posState)
-+{
-+ if(RangeDecoderBitDecode(p + LenChoice, rd) == 0)
-+ return RangeDecoderBitTreeDecode(p + LenLow +
-+ (posState << kLenNumLowBits), kLenNumLowBits, rd);
-+ if(RangeDecoderBitDecode(p + LenChoice2, rd) == 0)
-+ return kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid +
-+ (posState << kLenNumMidBits), kLenNumMidBits, rd);
-+ return kLenNumLowSymbols + kLenNumMidSymbols +
-+ RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd);
-+}
-+
-+#define kNumStates 12
-+
-+#define kStartPosModelIndex 4
-+#define kEndPosModelIndex 14
-+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-+
-+#define kNumPosSlotBits 6
-+#define kNumLenToPosStates 4
-+
-+#define kNumAlignBits 4
-+#define kAlignTableSize (1 << kNumAlignBits)
-+
-+#define kMatchMinLen 2
-+
-+#define IsMatch 0
-+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-+#define IsRepG0 (IsRep + kNumStates)
-+#define IsRepG1 (IsRepG0 + kNumStates)
-+#define IsRepG2 (IsRepG1 + kNumStates)
-+#define IsRep0Long (IsRepG2 + kNumStates)
-+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-+#define LenCoder (Align + kAlignTableSize)
-+#define RepLenCoder (LenCoder + kNumLenProbs)
-+#define Literal (RepLenCoder + kNumLenProbs)
-+
-+#if Literal != LZMA_BASE_SIZE
-+StopCompilingDueBUG
-+#endif
-+
-+#ifdef _LZMA_OUT_READ
-+
-+typedef struct _LzmaVarState
-+{
-+ CRangeDecoder RangeDecoder;
-+ Byte *Dictionary;
-+ UInt32 DictionarySize;
-+ UInt32 DictionaryPos;
-+ UInt32 GlobalPos;
-+ UInt32 Reps[4];
-+ int lc;
-+ int lp;
-+ int pb;
-+ int State;
-+ int PreviousIsMatch;
-+ int RemainLen;
-+} LzmaVarState;
-+
-+int LzmaDecoderInit(
-+ unsigned char *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ unsigned char *dictionary, UInt32 dictionarySize,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback
-+ #else
-+ unsigned char *inStream, UInt32 inSize
-+ #endif
-+ )
-+{
-+ LzmaVarState *vs = (LzmaVarState *)buffer;
-+ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
-+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
-+ UInt32 i;
-+ if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState))
-+ return LZMA_RESULT_NOT_ENOUGH_MEM;
-+ vs->Dictionary = dictionary;
-+ vs->DictionarySize = dictionarySize;
-+ vs->DictionaryPos = 0;
-+ vs->GlobalPos = 0;
-+ vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
-+ vs->lc = lc;
-+ vs->lp = lp;
-+ vs->pb = pb;
-+ vs->State = 0;
-+ vs->PreviousIsMatch = 0;
-+ vs->RemainLen = 0;
-+ dictionary[dictionarySize - 1] = 0;
-+ for (i = 0; i < numProbs; i++)
-+ p[i] = kBitModelTotal >> 1;
-+ RangeDecoderInit(&vs->RangeDecoder,
-+ #ifdef _LZMA_IN_CB
-+ inCallback
-+ #else
-+ inStream, inSize
-+ #endif
-+ );
-+ return LZMA_RESULT_OK;
-+}
-+
-+int LzmaDecode(unsigned char *buffer,
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed)
-+{
-+ LzmaVarState *vs = (LzmaVarState *)buffer;
-+ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
-+ CRangeDecoder rd = vs->RangeDecoder;
-+ int state = vs->State;
-+ int previousIsMatch = vs->PreviousIsMatch;
-+ Byte previousByte;
-+ UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
-+ UInt32 nowPos = 0;
-+ UInt32 posStateMask = (1 << (vs->pb)) - 1;
-+ UInt32 literalPosMask = (1 << (vs->lp)) - 1;
-+ int lc = vs->lc;
-+ int len = vs->RemainLen;
-+ UInt32 globalPos = vs->GlobalPos;
-+
-+ Byte *dictionary = vs->Dictionary;
-+ UInt32 dictionarySize = vs->DictionarySize;
-+ UInt32 dictionaryPos = vs->DictionaryPos;
-+
-+ if (len == -1)
-+ {
-+ *outSizeProcessed = 0;
-+ return LZMA_RESULT_OK;
-+ }
-+
-+ while(len > 0 && nowPos < outSize)
-+ {
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ len--;
-+ }
-+ if (dictionaryPos == 0)
-+ previousByte = dictionary[dictionarySize - 1];
-+ else
-+ previousByte = dictionary[dictionaryPos - 1];
-+#else
-+
-+int LzmaDecode(
-+ Byte *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback,
-+ #else
-+ unsigned char *inStream, UInt32 inSize,
-+ #endif
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed)
-+{
-+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
-+ CProb *p = (CProb *)buffer;
-+ CRangeDecoder rd;
-+ UInt32 i;
-+ int state = 0;
-+ int previousIsMatch = 0;
-+ Byte previousByte = 0;
-+ UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
-+ UInt32 nowPos = 0;
-+ UInt32 posStateMask = (1 << pb) - 1;
-+ UInt32 literalPosMask = (1 << lp) - 1;
-+ int len = 0;
-+ if (bufferSize < numProbs * sizeof(CProb))
-+ return LZMA_RESULT_NOT_ENOUGH_MEM;
-+ for (i = 0; i < numProbs; i++)
-+ p[i] = kBitModelTotal >> 1;
-+ RangeDecoderInit(&rd,
-+ #ifdef _LZMA_IN_CB
-+ inCallback
-+ #else
-+ inStream, inSize
-+ #endif
-+ );
-+#endif
-+
-+ *outSizeProcessed = 0;
-+ while(nowPos < outSize)
-+ {
-+ int posState = (int)(
-+ (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ & posStateMask);
-+ #ifdef _LZMA_IN_CB
-+ if (rd.Result != LZMA_RESULT_OK)
-+ return rd.Result;
-+ #endif
-+ if (rd.ExtraBytes != 0)
-+ return LZMA_RESULT_DATA_ERROR;
-+ if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0)
-+ {
-+ CProb *probs = p + Literal + (LZMA_LIT_SIZE *
-+ (((
-+ (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-+
-+ if (state < 4) state = 0;
-+ else if (state < 10) state -= 3;
-+ else state -= 6;
-+ if (previousIsMatch)
-+ {
-+ Byte matchByte;
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ matchByte = dictionary[pos];
-+ #else
-+ matchByte = outStream[nowPos - rep0];
-+ #endif
-+ previousByte = LzmaLiteralDecodeMatch(probs, &rd, matchByte);
-+ previousIsMatch = 0;
-+ }
-+ else
-+ previousByte = LzmaLiteralDecode(probs, &rd);
-+ outStream[nowPos++] = previousByte;
-+ #ifdef _LZMA_OUT_READ
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #endif
-+ }
-+ else
-+ {
-+ previousIsMatch = 1;
-+ if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1)
-+ {
-+ if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0)
-+ {
-+ if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0)
-+ {
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos;
-+ #endif
-+ if (
-+ (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ == 0)
-+ return LZMA_RESULT_DATA_ERROR;
-+ state = state < 7 ? 9 : 11;
-+ #ifdef _LZMA_OUT_READ
-+ pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ previousByte = dictionary[pos];
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #else
-+ previousByte = outStream[nowPos - rep0];
-+ #endif
-+ outStream[nowPos++] = previousByte;
-+ continue;
-+ }
-+ }
-+ else
-+ {
-+ UInt32 distance;
-+ if(RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0)
-+ distance = rep1;
-+ else
-+ {
-+ if(RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0)
-+ distance = rep2;
-+ else
-+ {
-+ distance = rep3;
-+ rep3 = rep2;
-+ }
-+ rep2 = rep1;
-+ }
-+ rep1 = rep0;
-+ rep0 = distance;
-+ }
-+ len = LzmaLenDecode(p + RepLenCoder, &rd, posState);
-+ state = state < 7 ? 8 : 11;
-+ }
-+ else
-+ {
-+ int posSlot;
-+ rep3 = rep2;
-+ rep2 = rep1;
-+ rep1 = rep0;
-+ state = state < 7 ? 7 : 10;
-+ len = LzmaLenDecode(p + LenCoder, &rd, posState);
-+ posSlot = RangeDecoderBitTreeDecode(p + PosSlot +
-+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
-+ kNumPosSlotBits), kNumPosSlotBits, &rd);
-+ if (posSlot >= kStartPosModelIndex)
-+ {
-+ int numDirectBits = ((posSlot >> 1) - 1);
-+ rep0 = ((2 | ((UInt32)posSlot & 1)) << numDirectBits);
-+ if (posSlot < kEndPosModelIndex)
-+ {
-+ rep0 += RangeDecoderReverseBitTreeDecode(
-+ p + SpecPos + rep0 - posSlot - 1, numDirectBits, &rd);
-+ }
-+ else
-+ {
-+ rep0 += RangeDecoderDecodeDirectBits(&rd,
-+ numDirectBits - kNumAlignBits) << kNumAlignBits;
-+ rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd);
-+ }
-+ }
-+ else
-+ rep0 = posSlot;
-+ rep0++;
-+ }
-+ if (rep0 == (UInt32)(0))
-+ {
-+ /* it's for stream version */
-+ len = -1;
-+ break;
-+ }
-+ if (rep0 > nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ {
-+ return LZMA_RESULT_DATA_ERROR;
-+ }
-+ len += kMatchMinLen;
-+ do
-+ {
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ previousByte = dictionary[pos];
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #else
-+ previousByte = outStream[nowPos - rep0];
-+ #endif
-+ outStream[nowPos++] = previousByte;
-+ len--;
-+ }
-+ while(len > 0 && nowPos < outSize);
-+ }
-+ }
-+
-+ #ifdef _LZMA_OUT_READ
-+ vs->RangeDecoder = rd;
-+ vs->DictionaryPos = dictionaryPos;
-+ vs->GlobalPos = globalPos + nowPos;
-+ vs->Reps[0] = rep0;
-+ vs->Reps[1] = rep1;
-+ vs->Reps[2] = rep2;
-+ vs->Reps[3] = rep3;
-+ vs->State = state;
-+ vs->PreviousIsMatch = previousIsMatch;
-+ vs->RemainLen = len;
-+ #endif
-+
-+ *outSizeProcessed = nowPos;
-+ return LZMA_RESULT_OK;
-+}
---- linux-2.6.19.old/include/linux/LzmaDecode.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/LzmaDecode.h 2006-12-14 03:13:20.000000000 +0100
-@@ -0,0 +1,100 @@
-+/*
-+ LzmaDecode.h
-+ LZMA Decoder interface
-+
-+ LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
-+ http://www.7-zip.org/
-+
-+ LZMA SDK is licensed under two licenses:
-+ 1) GNU Lesser General Public License (GNU LGPL)
-+ 2) Common Public License (CPL)
-+ It means that you can select one of these two licenses and
-+ follow rules of that license.
-+
-+ SPECIAL EXCEPTION:
-+ Igor Pavlov, as the author of this code, expressly permits you to
-+ statically or dynamically link your code (or bind by name) to the
-+ interfaces of this file without subjecting your linked code to the
-+ terms of the CPL or GNU LGPL. Any modifications or additions
-+ to this file, however, are subject to the LGPL or CPL terms.
-+*/
-+
-+#ifndef __LZMADECODE_H
-+#define __LZMADECODE_H
-+
-+/* #define _LZMA_IN_CB */
-+/* Use callback for input data */
-+
-+/* #define _LZMA_OUT_READ */
-+/* Use read function for output data */
-+
-+/* #define _LZMA_PROB32 */
-+/* It can increase speed on some 32-bit CPUs,
-+ but memory usage will be doubled in that case */
-+
-+/* #define _LZMA_LOC_OPT */
-+/* Enable local speed optimizations inside code */
-+
-+#ifndef UInt32
-+#ifdef _LZMA_UINT32_IS_ULONG
-+#define UInt32 unsigned long
-+#else
-+#define UInt32 unsigned int
-+#endif
-+#endif
-+
-+#ifdef _LZMA_PROB32
-+#define CProb UInt32
-+#else
-+#define CProb unsigned short
-+#endif
-+
-+#define LZMA_RESULT_OK 0
-+#define LZMA_RESULT_DATA_ERROR 1
-+#define LZMA_RESULT_NOT_ENOUGH_MEM 2
-+
-+#ifdef _LZMA_IN_CB
-+typedef struct _ILzmaInCallback
-+{
-+ int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize);
-+} ILzmaInCallback;
-+#endif
-+
-+#define LZMA_BASE_SIZE 1846
-+#define LZMA_LIT_SIZE 768
-+
-+/*
-+bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb)
-+bufferSize += 100 in case of _LZMA_OUT_READ
-+by default CProb is unsigned short,
-+but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int)
-+*/
-+
-+#ifdef _LZMA_OUT_READ
-+int LzmaDecoderInit(
-+ unsigned char *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ unsigned char *dictionary, UInt32 dictionarySize,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback
-+ #else
-+ unsigned char *inStream, UInt32 inSize
-+ #endif
-+);
-+#endif
-+
-+int LzmaDecode(
-+ unsigned char *buffer,
-+ #ifndef _LZMA_OUT_READ
-+ UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback,
-+ #else
-+ unsigned char *inStream, UInt32 inSize,
-+ #endif
-+ #endif
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed);
-+
-+#endif
-
+++ /dev/null
-diff -urN linux-2.6.19.old/fs/squashfs/inode.c linux-2.6.19.dev/fs/squashfs/inode.c
---- linux-2.6.19.old/fs/squashfs/inode.c 2006-12-14 03:13:20.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/inode.c 2006-12-14 03:13:20.000000000 +0100
-@@ -4,6 +4,9 @@
- * Copyright (c) 2002, 2003, 2004, 2005, 2006
- * Phillip Lougher <phillip@lougher.org.uk>
- *
-+ * LZMA decompressor support added by Oleg I. Vdovikin
-+ * Copyright (c) 2005 Oleg I.Vdovikin <oleg@cs.msu.su>
-+ *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2,
-@@ -21,6 +24,7 @@
- * inode.c
- */
-
-+#define SQUASHFS_LZMA
- #include <linux/types.h>
- #include <linux/squashfs_fs.h>
- #include <linux/module.h>
-@@ -44,6 +48,19 @@
-
- #include "squashfs.h"
-
-+#ifdef SQUASHFS_LZMA
-+#include <linux/LzmaDecode.h>
-+
-+/* default LZMA settings, should be in sync with mksquashfs */
-+#define LZMA_LC 3
-+#define LZMA_LP 0
-+#define LZMA_PB 2
-+
-+#define LZMA_WORKSPACE_SIZE ((LZMA_BASE_SIZE + \
-+ (LZMA_LIT_SIZE << (LZMA_LC + LZMA_LP))) * sizeof(CProb))
-+
-+#endif
-+
- static void squashfs_put_super(struct super_block *);
- static int squashfs_statfs(struct dentry *, struct kstatfs *);
- static int squashfs_symlink_readpage(struct file *file, struct page *page);
-@@ -64,7 +81,11 @@
- const char *, void *, struct vfsmount *);
-
-
-+#ifdef SQUASHFS_LZMA
-+static unsigned char lzma_workspace[LZMA_WORKSPACE_SIZE];
-+#else
- static z_stream stream;
-+#endif
-
- static struct file_system_type squashfs_fs_type = {
- .owner = THIS_MODULE,
-@@ -249,6 +270,15 @@
- if (compressed) {
- int zlib_err;
-
-+#ifdef SQUASHFS_LZMA
-+ if ((zlib_err = LzmaDecode(lzma_workspace,
-+ LZMA_WORKSPACE_SIZE, LZMA_LC, LZMA_LP, LZMA_PB,
-+ c_buffer, c_byte, buffer, msblk->read_size, &bytes)) != LZMA_RESULT_OK)
-+ {
-+ ERROR("lzma returned unexpected result 0x%x\n", zlib_err);
-+ bytes = 0;
-+ }
-+#else
- stream.next_in = c_buffer;
- stream.avail_in = c_byte;
- stream.next_out = buffer;
-@@ -263,7 +293,7 @@
- bytes = 0;
- } else
- bytes = stream.total_out;
--
-+#endif
- up(&msblk->read_data_mutex);
- }
-
-@@ -2045,15 +2075,19 @@
- printk(KERN_INFO "squashfs: version 3.0 (2006/03/15) "
- "Phillip Lougher\n");
-
-+#ifndef SQUASHFS_LZMA
- if (!(stream.workspace = vmalloc(zlib_inflate_workspacesize()))) {
- ERROR("Failed to allocate zlib workspace\n");
- destroy_inodecache();
- err = -ENOMEM;
- goto out;
- }
-+#endif
-
- if ((err = register_filesystem(&squashfs_fs_type))) {
-+#ifndef SQUASHFS_LZMA
- vfree(stream.workspace);
-+#endif
- destroy_inodecache();
- }
-
-@@ -2064,7 +2098,9 @@
-
- static void __exit exit_squashfs_fs(void)
- {
-+#ifndef SQUASHFS_LZMA
- vfree(stream.workspace);
-+#endif
- unregister_filesystem(&squashfs_fs_type);
- destroy_inodecache();
- }
-
+++ /dev/null
-diff -urN linux-2.6.19.old/Makefile linux-2.6.19.dev/Makefile
---- linux-2.6.19.old/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/Makefile 2006-12-14 03:13:23.000000000 +0100
-@@ -513,6 +513,9 @@
- NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
- CHECKFLAGS += $(NOSTDINC_FLAGS)
-
-+# improve gcc optimization
-+CFLAGS += $(call cc-option,-funit-at-a-time,)
-+
- # warn about C99 declaration after statement
- CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
-
+++ /dev/null
-diff -urN linux-2.6.19.old/include/asm-mips/system.h linux-2.6.19.dev/include/asm-mips/system.h
---- linux-2.6.19.old/include/asm-mips/system.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/asm-mips/system.h 2006-12-14 03:13:28.000000000 +0100
-@@ -311,7 +311,7 @@
- if something tries to do an invalid xchg(). */
- extern void __xchg_called_with_bad_pointer(void);
-
--static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-+static __always_inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
- {
- switch (size) {
- case 4:
+++ /dev/null
-diff -urN linux-2.6.19.old/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.19.dev/drivers/mtd/chips/cfi_cmdset_0002.c
---- linux-2.6.19.old/drivers/mtd/chips/cfi_cmdset_0002.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/drivers/mtd/chips/cfi_cmdset_0002.c 2006-12-14 03:13:30.000000000 +0100
-@@ -50,6 +50,7 @@
- #define SST49LF004B 0x0060
- #define SST49LF008A 0x005a
- #define AT49BV6416 0x00d6
-+#define MANUFACTURER_SAMSUNG 0x00ec
-
- static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -293,12 +294,19 @@
-
- if (extp->MajorVersion != '1' ||
- (extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
-- printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query "
-- "version %c.%c.\n", extp->MajorVersion,
-- extp->MinorVersion);
-- kfree(extp);
-- kfree(mtd);
-- return NULL;
-+ if (cfi->mfr == MANUFACTURER_SAMSUNG &&
-+ (extp->MajorVersion == '3' && extp->MinorVersion == '3')) {
-+ printk(KERN_NOTICE " Newer Samsung flash detected, "
-+ "should be compatibile with Amd/Fujitsu.\n");
-+ }
-+ else {
-+ printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query "
-+ "version %c.%c.\n", extp->MajorVersion,
-+ extp->MinorVersion);
-+ kfree(extp);
-+ kfree(mtd);
-+ return NULL;
-+ }
- }
-
- /* Install our own private info structure */
+++ /dev/null
---- linux.old/drivers/mtd/chips/cfi_cmdset_0001.c 2007-02-13 02:41:50.816650352 +0100
-+++ linux.dev/drivers/mtd/chips/cfi_cmdset_0001.c 2007-02-13 02:42:13.782159064 +0100
-@@ -908,7 +908,7 @@
-
- static int __xipram xip_wait_for_operation(
- struct map_info *map, struct flchip *chip,
-- unsigned long adr, unsigned int chip_op_time )
-+ unsigned long adr, int *chip_op_time )
- {
- struct cfi_private *cfi = map->fldrv_priv;
- struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
-@@ -917,7 +917,7 @@
- flstate_t oldstate, newstate;
-
- start = xip_currtime();
-- usec = chip_op_time * 8;
-+ usec = *chip_op_time * 8;
- if (usec == 0)
- usec = 500000;
- done = 0;
-@@ -1027,8 +1027,8 @@
- #define XIP_INVAL_CACHED_RANGE(map, from, size) \
- INVALIDATE_CACHED_RANGE(map, from, size)
-
--#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \
-- xip_wait_for_operation(map, chip, cmd_adr, usec)
-+#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
-+ xip_wait_for_operation(map, chip, cmd_adr, p_usec)
-
- #else
-
-@@ -1040,65 +1040,65 @@
- static int inval_cache_and_wait_for_operation(
- struct map_info *map, struct flchip *chip,
- unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
-- unsigned int chip_op_time)
-+ int *chip_op_time )
- {
- struct cfi_private *cfi = map->fldrv_priv;
- map_word status, status_OK = CMD(0x80);
-- int chip_state = chip->state;
-- unsigned int timeo, sleep_time;
-+ int z, chip_state = chip->state;
-+ unsigned long timeo;
-
- spin_unlock(chip->mutex);
- if (inval_len)
- INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
-+ if (*chip_op_time)
-+ cfi_udelay(*chip_op_time);
- spin_lock(chip->mutex);
-
-- /* set our timeout to 8 times the expected delay */
-- timeo = chip_op_time * 8;
-- if (!timeo)
-- timeo = 500000;
-- sleep_time = chip_op_time / 2;
-+ timeo = *chip_op_time * 8 * HZ / 1000000;
-+ if (timeo < HZ/2)
-+ timeo = HZ/2;
-+ timeo += jiffies;
-
-+ z = 0;
- for (;;) {
-+ if (chip->state != chip_state) {
-+ /* Someone's suspended the operation: sleep */
-+ DECLARE_WAITQUEUE(wait, current);
-+
-+ set_current_state(TASK_UNINTERRUPTIBLE);
-+ add_wait_queue(&chip->wq, &wait);
-+ spin_unlock(chip->mutex);
-+ schedule();
-+ remove_wait_queue(&chip->wq, &wait);
-+ timeo = jiffies + (HZ / 2); /* FIXME */
-+ spin_lock(chip->mutex);
-+ continue;
-+ }
-+
- status = map_read(map, cmd_adr);
- if (map_word_andequal(map, status, status_OK, status_OK))
- break;
-
-- if (!timeo) {
-+ /* OK Still waiting */
-+ if (time_after(jiffies, timeo)) {
- map_write(map, CMD(0x70), cmd_adr);
- chip->state = FL_STATUS;
- return -ETIME;
- }
-
-- /* OK Still waiting. Drop the lock, wait a while and retry. */
-+ /* Latency issues. Drop the lock, wait a while and retry */
-+ z++;
- spin_unlock(chip->mutex);
-- if (sleep_time >= 1000000/HZ) {
-- /*
-- * Half of the normal delay still remaining
-- * can be performed with a sleeping delay instead
-- * of busy waiting.
-- */
-- msleep(sleep_time/1000);
-- timeo -= sleep_time;
-- sleep_time = 1000000/HZ;
-- } else {
-- udelay(1);
-- cond_resched();
-- timeo--;
-- }
-+ cfi_udelay(1);
- spin_lock(chip->mutex);
--
-- while (chip->state != chip_state) {
-- /* Someone's suspended the operation: sleep */
-- DECLARE_WAITQUEUE(wait, current);
-- set_current_state(TASK_UNINTERRUPTIBLE);
-- add_wait_queue(&chip->wq, &wait);
-- spin_unlock(chip->mutex);
-- schedule();
-- remove_wait_queue(&chip->wq, &wait);
-- spin_lock(chip->mutex);
-- }
- }
-
-+ if (!z) {
-+ if (!--(*chip_op_time))
-+ *chip_op_time = 1;
-+ } else if (z > 1)
-+ ++(*chip_op_time);
-+
- /* Done and happy. */
- chip->state = FL_STATUS;
- return 0;
-@@ -1107,7 +1107,8 @@
- #endif
-
- #define WAIT_TIMEOUT(map, chip, adr, udelay) \
-- INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay);
-+ ({ int __udelay = (udelay); \
-+ INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
-
-
- static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
-@@ -1331,7 +1332,7 @@
-
- ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
- adr, map_bankwidth(map),
-- chip->word_write_time);
-+ &chip->word_write_time);
- if (ret) {
- xip_enable(map, chip, adr);
- printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
-@@ -1568,7 +1569,7 @@
-
- ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
- adr, len,
-- chip->buffer_write_time);
-+ &chip->buffer_write_time);
- if (ret) {
- map_write(map, CMD(0x70), cmd_adr);
- chip->state = FL_STATUS;
-@@ -1703,7 +1704,7 @@
-
- ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
- adr, len,
-- chip->erase_time);
-+ &chip->erase_time);
- if (ret) {
- map_write(map, CMD(0x70), adr);
- chip->state = FL_STATUS;
+++ /dev/null
-diff -urN linux-2.6.19.old/fs/squashfs/Makefile linux-2.6.19.dev/fs/squashfs/Makefile
---- linux-2.6.19.old/fs/squashfs/Makefile 2006-12-14 03:13:22.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/Makefile 2006-12-14 03:13:31.000000000 +0100
-@@ -4,4 +4,3 @@
-
- obj-$(CONFIG_SQUASHFS) += squashfs.o
- squashfs-y += inode.o
--squashfs-y += squashfs2_0.o
-diff -urN linux-2.6.19.old/fs/squashfs/squashfs.h linux-2.6.19.dev/fs/squashfs/squashfs.h
---- linux-2.6.19.old/fs/squashfs/squashfs.h 2006-12-14 03:13:20.000000000 +0100
-+++ linux-2.6.19.dev/fs/squashfs/squashfs.h 2006-12-14 03:13:31.000000000 +0100
-@@ -24,6 +24,9 @@
- #ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
- #undef CONFIG_SQUASHFS_1_0_COMPATIBILITY
- #endif
-+#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+#undef CONFIG_SQUASHFS_2_0_COMPATIBILITY
-+#endif
-
- #ifdef SQUASHFS_TRACE
- #define TRACE(s, args...) printk(KERN_NOTICE "SQUASHFS: "s, ## args)
+++ /dev/null
-diff -ur linux.old/drivers/mtd/Kconfig linux.dev/drivers/mtd/Kconfig
---- linux.old/drivers/mtd/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux.dev/drivers/mtd/Kconfig 2007-02-19 23:00:53.739457000 +0100
-@@ -49,6 +49,11 @@
- devices. Partitioning on NFTL 'devices' is a different - that's the
- 'normal' form of partitioning used on a block device.
-
-+config MTD_SPLIT_ROOTFS
-+ bool "Automatically split rootfs partition for squashfs"
-+ depends on MTD_PARTITIONS
-+ default y
-+
- config MTD_REDBOOT_PARTS
- tristate "RedBoot partition table parsing"
- depends on MTD_PARTITIONS
-diff -ur linux.old/drivers/mtd/mtdpart.c linux.dev/drivers/mtd/mtdpart.c
---- linux.old/drivers/mtd/mtdpart.c 2007-01-10 20:10:37.000000000 +0100
-+++ linux.dev/drivers/mtd/mtdpart.c 2007-02-20 00:01:38.587355896 +0100
-@@ -20,6 +20,8 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/compatmac.h>
-+#include <linux/squashfs_fs.h>
-+#include <linux/root_dev.h>
-
- /* Our partition linked list */
- static LIST_HEAD(mtd_partitions);
-@@ -303,6 +305,173 @@
- return 0;
- }
-
-+static u_int32_t cur_offset = 0;
-+static int add_mtd_partition(struct mtd_info *master, const struct mtd_partition *part, int i)
-+{
-+ struct mtd_part *slave;
-+
-+ /* allocate the partition structure */
-+ slave = kmalloc (sizeof(*slave), GFP_KERNEL);
-+ if (!slave) {
-+ printk ("memory allocation error while creating partitions for \"%s\"\n",
-+ master->name);
-+ del_mtd_partitions(master);
-+ return -ENOMEM;
-+ }
-+ memset(slave, 0, sizeof(*slave));
-+ list_add(&slave->list, &mtd_partitions);
-+
-+ /* set up the MTD object for this partition */
-+ slave->mtd.type = master->type;
-+ slave->mtd.flags = master->flags & ~part->mask_flags;
-+ slave->mtd.size = part->size;
-+ slave->mtd.writesize = master->writesize;
-+ slave->mtd.oobsize = master->oobsize;
-+ slave->mtd.ecctype = master->ecctype;
-+ slave->mtd.eccsize = master->eccsize;
-+
-+ slave->mtd.name = part->name;
-+ slave->mtd.bank_size = master->bank_size;
-+ slave->mtd.owner = master->owner;
-+
-+ slave->mtd.read = part_read;
-+ slave->mtd.write = part_write;
-+
-+ if(master->point && master->unpoint){
-+ slave->mtd.point = part_point;
-+ slave->mtd.unpoint = part_unpoint;
-+ }
-+
-+ if (master->read_oob)
-+ slave->mtd.read_oob = part_read_oob;
-+ if (master->write_oob)
-+ slave->mtd.write_oob = part_write_oob;
-+ if(master->read_user_prot_reg)
-+ slave->mtd.read_user_prot_reg = part_read_user_prot_reg;
-+ if(master->read_fact_prot_reg)
-+ slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg;
-+ if(master->write_user_prot_reg)
-+ slave->mtd.write_user_prot_reg = part_write_user_prot_reg;
-+ if(master->lock_user_prot_reg)
-+ slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg;
-+ if(master->get_user_prot_info)
-+ slave->mtd.get_user_prot_info = part_get_user_prot_info;
-+ if(master->get_fact_prot_info)
-+ slave->mtd.get_fact_prot_info = part_get_fact_prot_info;
-+ if (master->sync)
-+ slave->mtd.sync = part_sync;
-+ if (!i && master->suspend && master->resume) {
-+ slave->mtd.suspend = part_suspend;
-+ slave->mtd.resume = part_resume;
-+ }
-+ if (master->writev)
-+ slave->mtd.writev = part_writev;
-+ if (master->lock)
-+ slave->mtd.lock = part_lock;
-+ if (master->unlock)
-+ slave->mtd.unlock = part_unlock;
-+ if (master->block_isbad)
-+ slave->mtd.block_isbad = part_block_isbad;
-+ if (master->block_markbad)
-+ slave->mtd.block_markbad = part_block_markbad;
-+ slave->mtd.erase = part_erase;
-+ slave->master = master;
-+ slave->offset = part->offset;
-+ slave->index = i;
-+
-+ if (slave->offset == MTDPART_OFS_APPEND)
-+ slave->offset = cur_offset;
-+ if (slave->offset == MTDPART_OFS_NXTBLK) {
-+ slave->offset = cur_offset;
-+ if ((cur_offset % master->erasesize) != 0) {
-+ /* Round up to next erasesize */
-+ slave->offset = ((cur_offset / master->erasesize) + 1) * master->erasesize;
-+ printk(KERN_NOTICE "Moving partition %d: "
-+ "0x%08x -> 0x%08x\n", i,
-+ cur_offset, slave->offset);
-+ }
-+ }
-+ if (slave->mtd.size == MTDPART_SIZ_FULL)
-+ slave->mtd.size = master->size - slave->offset;
-+ cur_offset = slave->offset + slave->mtd.size;
-+
-+ printk (KERN_NOTICE "0x%08x-0x%08x : \"%s\"\n", slave->offset,
-+ slave->offset + slave->mtd.size, slave->mtd.name);
-+
-+ /* let's do some sanity checks */
-+ if (slave->offset >= master->size) {
-+ /* let's register it anyway to preserve ordering */
-+ slave->offset = 0;
-+ slave->mtd.size = 0;
-+ printk ("mtd: partition \"%s\" is out of reach -- disabled\n",
-+ part->name);
-+ }
-+ if (slave->offset + slave->mtd.size > master->size) {
-+ slave->mtd.size = master->size - slave->offset;
-+ printk ("mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#x\n",
-+ part->name, master->name, slave->mtd.size);
-+ }
-+ if (master->numeraseregions>1) {
-+ /* Deal with variable erase size stuff */
-+ int i;
-+ struct mtd_erase_region_info *regions = master->eraseregions;
-+
-+ /* Find the first erase regions which is part of this partition. */
-+ for (i=0; i < master->numeraseregions && slave->offset >= regions[i].offset; i++)
-+ ;
-+
-+ for (i--; i < master->numeraseregions && slave->offset + slave->mtd.size > regions[i].offset; i++) {
-+ if (slave->mtd.erasesize < regions[i].erasesize) {
-+ slave->mtd.erasesize = regions[i].erasesize;
-+ }
-+ }
-+ } else {
-+ /* Single erase size */
-+ slave->mtd.erasesize = master->erasesize;
-+ }
-+
-+ if ((slave->mtd.flags & MTD_WRITEABLE) &&
-+ (slave->offset % slave->mtd.erasesize)) {
-+ /* Doesn't start on a boundary of major erase size */
-+ /* FIXME: Let it be writable if it is on a boundary of _minor_ erase size though */
-+ slave->mtd.flags &= ~MTD_WRITEABLE;
-+ printk ("mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
-+ part->name);
-+ }
-+ if ((slave->mtd.flags & MTD_WRITEABLE) &&
-+ (slave->mtd.size % slave->mtd.erasesize)) {
-+ slave->mtd.flags &= ~MTD_WRITEABLE;
-+ printk ("mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
-+ part->name);
-+ }
-+
-+ slave->mtd.ecclayout = master->ecclayout;
-+ if (master->block_isbad) {
-+ uint32_t offs = 0;
-+
-+ while(offs < slave->mtd.size) {
-+ if (master->block_isbad(master,
-+ offs + slave->offset))
-+ slave->mtd.ecc_stats.badblocks++;
-+ offs += slave->mtd.erasesize;
-+ }
-+ }
-+
-+ if(part->mtdp)
-+ { /* store the object pointer (caller may or may not register it */
-+ *part->mtdp = &slave->mtd;
-+ slave->registered = 0;
-+ }
-+ else
-+ {
-+ /* register our partition */
-+ add_mtd_device(&slave->mtd);
-+ slave->registered = 1;
-+ }
-+
-+ return 0;
-+}
-+
- /*
- * This function, given a master MTD object and a partition table, creates
- * and registers slave MTD objects which are bound to the master according to
-@@ -314,171 +483,53 @@
- const struct mtd_partition *parts,
- int nbparts)
- {
-- struct mtd_part *slave;
-- u_int32_t cur_offset = 0;
-- int i;
-+ struct mtd_partition *part;
-+ int i, ret = 0;
-
- printk (KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name);
-
- for (i = 0; i < nbparts; i++) {
-+ part = (struct mtd_partition *) &parts[i];
-+ ret = add_mtd_partition(master, part, i);
-+ if (ret)
-+ return ret;
-+ if (strcmp(part->name, "rootfs") == 0) {
-+#ifdef CONFIG_MTD_SPLIT_ROOTFS
-+ int len;
-+ char buf[512];
-+ struct squashfs_super_block *sb = (struct squashfs_super_block *) buf;
-+#define ROOTFS_SPLIT_NAME "rootfs_data"
-+ if ((master->read(master, part->offset, sizeof(struct squashfs_super_block), &len, buf) == 0) &&
-+ (len == sizeof(struct squashfs_super_block)) &&
-+ (*((u32 *) buf) == SQUASHFS_MAGIC) &&
-+ (sb->bytes_used > 0)) {
-+
-+
-+ part = kmalloc(sizeof(struct mtd_partition), GFP_KERNEL);
-+ memcpy(part, &parts[i], sizeof(struct mtd_partition));
-+
-+ part->name = kmalloc(sizeof(ROOTFS_SPLIT_NAME) + 1, GFP_KERNEL);
-+ strcpy(part->name, ROOTFS_SPLIT_NAME);
-+
-+ len = (u32) sb->bytes_used;
-+ len += (part->offset & 0x000fffff);
-+ len += (master->erasesize - 1);
-+ len &= ~(master->erasesize - 1);
-+ len -= (part->offset & 0x000fffff);
-+ part->offset += len;
-+ part->size -= len;
-+
-+ if (master->erasesize <= part->size)
-+ ret = add_mtd_partition(master, part, i + 1);
-+ else
-+ kfree(part->name);
-+ if (ret)
-+ return ret;
-
-- /* allocate the partition structure */
-- slave = kmalloc (sizeof(*slave), GFP_KERNEL);
-- if (!slave) {
-- printk ("memory allocation error while creating partitions for \"%s\"\n",
-- master->name);
-- del_mtd_partitions(master);
-- return -ENOMEM;
-- }
-- memset(slave, 0, sizeof(*slave));
-- list_add(&slave->list, &mtd_partitions);
--
-- /* set up the MTD object for this partition */
-- slave->mtd.type = master->type;
-- slave->mtd.flags = master->flags & ~parts[i].mask_flags;
-- slave->mtd.size = parts[i].size;
-- slave->mtd.writesize = master->writesize;
-- slave->mtd.oobsize = master->oobsize;
-- slave->mtd.ecctype = master->ecctype;
-- slave->mtd.eccsize = master->eccsize;
--
-- slave->mtd.name = parts[i].name;
-- slave->mtd.bank_size = master->bank_size;
-- slave->mtd.owner = master->owner;
--
-- slave->mtd.read = part_read;
-- slave->mtd.write = part_write;
--
-- if(master->point && master->unpoint){
-- slave->mtd.point = part_point;
-- slave->mtd.unpoint = part_unpoint;
-- }
--
-- if (master->read_oob)
-- slave->mtd.read_oob = part_read_oob;
-- if (master->write_oob)
-- slave->mtd.write_oob = part_write_oob;
-- if(master->read_user_prot_reg)
-- slave->mtd.read_user_prot_reg = part_read_user_prot_reg;
-- if(master->read_fact_prot_reg)
-- slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg;
-- if(master->write_user_prot_reg)
-- slave->mtd.write_user_prot_reg = part_write_user_prot_reg;
-- if(master->lock_user_prot_reg)
-- slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg;
-- if(master->get_user_prot_info)
-- slave->mtd.get_user_prot_info = part_get_user_prot_info;
-- if(master->get_fact_prot_info)
-- slave->mtd.get_fact_prot_info = part_get_fact_prot_info;
-- if (master->sync)
-- slave->mtd.sync = part_sync;
-- if (!i && master->suspend && master->resume) {
-- slave->mtd.suspend = part_suspend;
-- slave->mtd.resume = part_resume;
-- }
-- if (master->writev)
-- slave->mtd.writev = part_writev;
-- if (master->lock)
-- slave->mtd.lock = part_lock;
-- if (master->unlock)
-- slave->mtd.unlock = part_unlock;
-- if (master->block_isbad)
-- slave->mtd.block_isbad = part_block_isbad;
-- if (master->block_markbad)
-- slave->mtd.block_markbad = part_block_markbad;
-- slave->mtd.erase = part_erase;
-- slave->master = master;
-- slave->offset = parts[i].offset;
-- slave->index = i;
--
-- if (slave->offset == MTDPART_OFS_APPEND)
-- slave->offset = cur_offset;
-- if (slave->offset == MTDPART_OFS_NXTBLK) {
-- slave->offset = cur_offset;
-- if ((cur_offset % master->erasesize) != 0) {
-- /* Round up to next erasesize */
-- slave->offset = ((cur_offset / master->erasesize) + 1) * master->erasesize;
-- printk(KERN_NOTICE "Moving partition %d: "
-- "0x%08x -> 0x%08x\n", i,
-- cur_offset, slave->offset);
-+ kfree(part);
- }
-- }
-- if (slave->mtd.size == MTDPART_SIZ_FULL)
-- slave->mtd.size = master->size - slave->offset;
-- cur_offset = slave->offset + slave->mtd.size;
--
-- printk (KERN_NOTICE "0x%08x-0x%08x : \"%s\"\n", slave->offset,
-- slave->offset + slave->mtd.size, slave->mtd.name);
--
-- /* let's do some sanity checks */
-- if (slave->offset >= master->size) {
-- /* let's register it anyway to preserve ordering */
-- slave->offset = 0;
-- slave->mtd.size = 0;
-- printk ("mtd: partition \"%s\" is out of reach -- disabled\n",
-- parts[i].name);
-- }
-- if (slave->offset + slave->mtd.size > master->size) {
-- slave->mtd.size = master->size - slave->offset;
-- printk ("mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#x\n",
-- parts[i].name, master->name, slave->mtd.size);
-- }
-- if (master->numeraseregions>1) {
-- /* Deal with variable erase size stuff */
-- int i;
-- struct mtd_erase_region_info *regions = master->eraseregions;
--
-- /* Find the first erase regions which is part of this partition. */
-- for (i=0; i < master->numeraseregions && slave->offset >= regions[i].offset; i++)
-- ;
--
-- for (i--; i < master->numeraseregions && slave->offset + slave->mtd.size > regions[i].offset; i++) {
-- if (slave->mtd.erasesize < regions[i].erasesize) {
-- slave->mtd.erasesize = regions[i].erasesize;
-- }
-- }
-- } else {
-- /* Single erase size */
-- slave->mtd.erasesize = master->erasesize;
-- }
--
-- if ((slave->mtd.flags & MTD_WRITEABLE) &&
-- (slave->offset % slave->mtd.erasesize)) {
-- /* Doesn't start on a boundary of major erase size */
-- /* FIXME: Let it be writable if it is on a boundary of _minor_ erase size though */
-- slave->mtd.flags &= ~MTD_WRITEABLE;
-- printk ("mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
-- parts[i].name);
-- }
-- if ((slave->mtd.flags & MTD_WRITEABLE) &&
-- (slave->mtd.size % slave->mtd.erasesize)) {
-- slave->mtd.flags &= ~MTD_WRITEABLE;
-- printk ("mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
-- parts[i].name);
-- }
--
-- slave->mtd.ecclayout = master->ecclayout;
-- if (master->block_isbad) {
-- uint32_t offs = 0;
--
-- while(offs < slave->mtd.size) {
-- if (master->block_isbad(master,
-- offs + slave->offset))
-- slave->mtd.ecc_stats.badblocks++;
-- offs += slave->mtd.erasesize;
-- }
-- }
--
-- if(parts[i].mtdp)
-- { /* store the object pointer (caller may or may not register it */
-- *parts[i].mtdp = &slave->mtd;
-- slave->registered = 0;
-- }
-- else
-- {
-- /* register our partition */
-- add_mtd_device(&slave->mtd);
-- slave->registered = 1;
-+#endif /* CONFIG_MTD_SPLIT_ROOTFS */
-+ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i);
- }
- }
-
+++ /dev/null
---- linux.old/drivers/mtd/devices/block2mtd.c 2007-03-02 01:00:13.866987272 +0100
-+++ linux.dev/drivers/mtd/devices/block2mtd.c 2007-03-02 02:03:45.558522080 +0100
-@@ -16,6 +16,7 @@
- #include <linux/list.h>
- #include <linux/init.h>
- #include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
- #include <linux/buffer_head.h>
- #include <linux/mutex.h>
- #include <linux/mount.h>
-@@ -287,10 +288,11 @@
-
-
- /* FIXME: ensure that mtd->size % erase_size == 0 */
--static struct block2mtd_dev *add_device(char *devname, int erase_size)
-+static struct block2mtd_dev *add_device(char *devname, int erase_size, char *mtdname)
- {
- struct block_device *bdev;
- struct block2mtd_dev *dev;
-+ struct mtd_partition *part;
-
- if (!devname)
- return NULL;
-@@ -330,14 +332,18 @@
-
- /* Setup the MTD structure */
- /* make the name contain the block device in */
-- dev->mtd.name = kmalloc(sizeof("block2mtd: ") + strlen(devname),
-- GFP_KERNEL);
-+
-+ if (!mtdname)
-+ mtdname = devname;
-+
-+ dev->mtd.name = kmalloc(strlen(mtdname), GFP_KERNEL);
-+
- if (!dev->mtd.name)
- goto devinit_err;
-+
-+ strcpy(dev->mtd.name, mtdname);
-
-- sprintf(dev->mtd.name, "block2mtd: %s", devname);
--
-- dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
-+ dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK & ~(erase_size - 1);
- dev->mtd.erasesize = erase_size;
- dev->mtd.writesize = 1;
- dev->mtd.type = MTD_RAM;
-@@ -349,15 +355,18 @@
- dev->mtd.read = block2mtd_read;
- dev->mtd.priv = dev;
- dev->mtd.owner = THIS_MODULE;
--
-- if (add_mtd_device(&dev->mtd)) {
-+
-+ part = kzalloc(sizeof(struct mtd_partition), GFP_KERNEL);
-+ part->name = dev->mtd.name;
-+ part->offset = 0;
-+ part->size = dev->mtd.size;
-+ if (add_mtd_partitions(&dev->mtd, part, 1)) {
- /* Device didnt get added, so free the entry */
- goto devinit_err;
- }
- list_add(&dev->list, &blkmtd_device_list);
- INFO("mtd%d: [%s] erase_size = %dKiB [%d]", dev->mtd.index,
-- dev->mtd.name + strlen("blkmtd: "),
-- dev->mtd.erasesize >> 10, dev->mtd.erasesize);
-+ mtdname, dev->mtd.erasesize >> 10, dev->mtd.erasesize);
- return dev;
-
- devinit_err:
-@@ -430,9 +439,9 @@
-
- static int block2mtd_setup2(const char *val)
- {
-- char buf[80 + 12]; /* 80 for device, 12 for erase size */
-+ char buf[80 + 12 + 80]; /* 80 for device, 12 for erase size, 80 for name */
- char *str = buf;
-- char *token[2];
-+ char *token[3];
- char *name;
- size_t erase_size = PAGE_SIZE;
- int i, ret;
-@@ -443,7 +452,7 @@
- strcpy(str, val);
- kill_final_newline(str);
-
-- for (i = 0; i < 2; i++)
-+ for (i = 0; i < 3; i++)
- token[i] = strsep(&str, ",");
-
- if (str)
-@@ -463,8 +472,10 @@
- parse_err("illegal erase size");
- }
- }
-+ if (token[2] && (strlen(token[2]) + 1 > 80))
-+ parse_err("mtd device name too long");
-
-- add_device(name, erase_size);
-+ add_device(name, erase_size, token[2]);
-
- return 0;
- }
-@@ -498,7 +509,7 @@
-
-
- module_param_call(block2mtd, block2mtd_setup, NULL, NULL, 0200);
--MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>]\"");
-+MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>[,<name>]]\"");
-
- static int __init block2mtd_init(void)
- {
+++ /dev/null
-diff -urN linux.old/include/linux/netfilter_ipv4/ip_conntrack.h linux.dev/include/linux/netfilter_ipv4/ip_conntrack.h
---- linux.old/include/linux/netfilter_ipv4/ip_conntrack.h 2007-01-01 05:17:07.000000000 +0100
-+++ linux.dev/include/linux/netfilter_ipv4/ip_conntrack.h 2007-01-01 05:18:48.000000000 +0100
-@@ -127,6 +127,15 @@
- /* Traversed often, so hopefully in different cacheline to top */
- /* These are my tuples; original and reply */
- struct ip_conntrack_tuple_hash tuplehash[IP_CT_DIR_MAX];
-+
-+#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
-+ struct {
-+ char * app_proto; /* e.g. "http". NULL before decision. "unknown" after decision if no match */
-+ char * app_data; /* application layer data so far. NULL after match decision */
-+ unsigned int app_data_len;
-+ } layer7;
-+#endif
-+
- };
-
- struct ip_conntrack_expect
-diff -urN linux.old/include/linux/netfilter_ipv4/ipt_layer7.h linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h
---- linux.old/include/linux/netfilter_ipv4/ipt_layer7.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,26 @@
-+/*
-+ By Matthew Strait <quadong@users.sf.net>, Dec 2003.
-+ http://l7-filter.sf.net
-+
-+ This program is free software; you can redistribute it and/or
-+ modify it under the terms of the GNU General Public License
-+ as published by the Free Software Foundation; either version
-+ 2 of the License, or (at your option) any later version.
-+ http://www.gnu.org/licenses/gpl.txt
-+*/
-+
-+#ifndef _IPT_LAYER7_H
-+#define _IPT_LAYER7_H
-+
-+#define MAX_PATTERN_LEN 8192
-+#define MAX_PROTOCOL_LEN 256
-+
-+typedef char *(*proc_ipt_search) (char *, char, char *);
-+
-+struct ipt_layer7_info {
-+ char protocol[MAX_PROTOCOL_LEN];
-+ char invert:1;
-+ char pattern[MAX_PATTERN_LEN];
-+};
-+
-+#endif /* _IPT_LAYER7_H */
-diff -urN linux.old/net/ipv4/netfilter/ip_conntrack_core.c linux.dev/net/ipv4/netfilter/ip_conntrack_core.c
---- linux.old/net/ipv4/netfilter/ip_conntrack_core.c 2007-01-01 05:17:07.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/ip_conntrack_core.c 2007-01-01 05:18:48.000000000 +0100
-@@ -337,6 +337,13 @@
- * too. */
- ip_ct_remove_expectations(ct);
-
-+ #if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
-+ if(ct->layer7.app_proto)
-+ kfree(ct->layer7.app_proto);
-+ if(ct->layer7.app_data)
-+ kfree(ct->layer7.app_data);
-+ #endif
-+
- /* We overload first tuple to link into unconfirmed list. */
- if (!is_confirmed(ct)) {
- BUG_ON(list_empty(&ct->tuplehash[IP_CT_DIR_ORIGINAL].list));
-diff -urN linux.old/net/ipv4/netfilter/ip_conntrack_standalone.c linux.dev/net/ipv4/netfilter/ip_conntrack_standalone.c
---- linux.old/net/ipv4/netfilter/ip_conntrack_standalone.c 2007-01-01 05:17:07.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/ip_conntrack_standalone.c 2007-01-01 05:18:48.000000000 +0100
-@@ -192,6 +192,12 @@
- return -ENOSPC;
- #endif
-
-+#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
-+ if(conntrack->layer7.app_proto)
-+ if (seq_printf(s, "l7proto=%s ",conntrack->layer7.app_proto))
-+ return 1;
-+#endif
-+
- if (seq_printf(s, "use=%u\n", atomic_read(&conntrack->ct_general.use)))
- return -ENOSPC;
-
-diff -urN linux.old/net/ipv4/netfilter/ipt_layer7.c linux.dev/net/ipv4/netfilter/ipt_layer7.c
---- linux.old/net/ipv4/netfilter/ipt_layer7.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,573 @@
-+/*
-+ Kernel module to match application layer (OSI layer 7) data in connections.
-+
-+ http://l7-filter.sf.net
-+
-+ By Matthew Strait and Ethan Sommer, 2003-2006.
-+
-+ This program is free software; you can redistribute it and/or
-+ modify it under the terms of the GNU General Public License
-+ as published by the Free Software Foundation; either version
-+ 2 of the License, or (at your option) any later version.
-+ http://www.gnu.org/licenses/gpl.txt
-+
-+ Based on ipt_string.c (C) 2000 Emmanuel Roger <winfield@freegates.be>
-+ and cls_layer7.c (C) 2003 Matthew Strait, Ethan Sommer, Justin Levandoski
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_conntrack.h>
-+#include <linux/proc_fs.h>
-+#include <linux/ctype.h>
-+#include <net/ip.h>
-+#include <net/tcp.h>
-+#include <linux/spinlock.h>
-+
-+#include "regexp/regexp.c"
-+
-+#include <linux/netfilter_ipv4/ipt_layer7.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+
-+MODULE_AUTHOR("Matthew Strait <quadong@users.sf.net>, Ethan Sommer <sommere@users.sf.net>");
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("iptables application layer match module");
-+MODULE_VERSION("2.0");
-+
-+static int maxdatalen = 2048; // this is the default
-+module_param(maxdatalen, int, 0444);
-+MODULE_PARM_DESC(maxdatalen, "maximum bytes of data looked at by l7-filter");
-+
-+#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
-+ #define DPRINTK(format,args...) printk(format,##args)
-+#else
-+ #define DPRINTK(format,args...)
-+#endif
-+
-+#define TOTAL_PACKETS master_conntrack->counters[IP_CT_DIR_ORIGINAL].packets + \
-+ master_conntrack->counters[IP_CT_DIR_REPLY].packets
-+
-+/* Number of packets whose data we look at.
-+This can be modified through /proc/net/layer7_numpackets */
-+static int num_packets = 10;
-+
-+static struct pattern_cache {
-+ char * regex_string;
-+ regexp * pattern;
-+ struct pattern_cache * next;
-+} * first_pattern_cache = NULL;
-+
-+/* I'm new to locking. Here are my assumptions:
-+
-+- No one will write to /proc/net/layer7_numpackets over and over very fast;
-+ if they did, nothing awful would happen.
-+
-+- This code will never be processing the same packet twice at the same time,
-+ because iptables rules are traversed in order.
-+
-+- It doesn't matter if two packets from different connections are in here at
-+ the same time, because they don't share any data.
-+
-+- It _does_ matter if two packets from the same connection (or one from a
-+ master and one from its child) are here at the same time. In this case,
-+ we have to protect the conntracks and the list of compiled patterns.
-+*/
-+DEFINE_RWLOCK(ct_lock);
-+DEFINE_SPINLOCK(list_lock);
-+
-+#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
-+/* Converts an unfriendly string into a friendly one by
-+replacing unprintables with periods and all whitespace with " ". */
-+static char * friendly_print(unsigned char * s)
-+{
-+ char * f = kmalloc(strlen(s) + 1, GFP_ATOMIC);
-+ int i;
-+
-+ if(!f) {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in friendly_print, bailing.\n");
-+ return NULL;
-+ }
-+
-+ for(i = 0; i < strlen(s); i++){
-+ if(isprint(s[i]) && s[i] < 128) f[i] = s[i];
-+ else if(isspace(s[i])) f[i] = ' ';
-+ else f[i] = '.';
-+ }
-+ f[i] = '\0';
-+ return f;
-+}
-+
-+static char dec2hex(int i)
-+{
-+ switch (i) {
-+ case 0 ... 9:
-+ return (char)(i + '0');
-+ break;
-+ case 10 ... 15:
-+ return (char)(i - 10 + 'a');
-+ break;
-+ default:
-+ if (net_ratelimit())
-+ printk("Problem in dec2hex\n");
-+ return '\0';
-+ }
-+}
-+
-+static char * hex_print(unsigned char * s)
-+{
-+ char * g = kmalloc(strlen(s)*3 + 1, GFP_ATOMIC);
-+ int i;
-+
-+ if(!g) {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in hex_print, bailing.\n");
-+ return NULL;
-+ }
-+
-+ for(i = 0; i < strlen(s); i++) {
-+ g[i*3 ] = dec2hex(s[i]/16);
-+ g[i*3 + 1] = dec2hex(s[i]%16);
-+ g[i*3 + 2] = ' ';
-+ }
-+ g[i*3] = '\0';
-+
-+ return g;
-+}
-+#endif // DEBUG
-+
-+/* Use instead of regcomp. As we expect to be seeing the same regexps over and
-+over again, it make sense to cache the results. */
-+static regexp * compile_and_cache(char * regex_string, char * protocol)
-+{
-+ struct pattern_cache * node = first_pattern_cache;
-+ struct pattern_cache * last_pattern_cache = first_pattern_cache;
-+ struct pattern_cache * tmp;
-+ unsigned int len;
-+
-+ while (node != NULL) {
-+ if (!strcmp(node->regex_string, regex_string))
-+ return node->pattern;
-+
-+ last_pattern_cache = node;/* points at the last non-NULL node */
-+ node = node->next;
-+ }
-+
-+ /* If we reach the end of the list, then we have not yet cached
-+ the pattern for this regex. Let's do that now.
-+ Be paranoid about running out of memory to avoid list corruption. */
-+ tmp = kmalloc(sizeof(struct pattern_cache), GFP_ATOMIC);
-+
-+ if(!tmp) {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n");
-+ return NULL;
-+ }
-+
-+ tmp->regex_string = kmalloc(strlen(regex_string) + 1, GFP_ATOMIC);
-+ tmp->pattern = kmalloc(sizeof(struct regexp), GFP_ATOMIC);
-+ tmp->next = NULL;
-+
-+ if(!tmp->regex_string || !tmp->pattern) {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n");
-+ kfree(tmp->regex_string);
-+ kfree(tmp->pattern);
-+ kfree(tmp);
-+ return NULL;
-+ }
-+
-+ /* Ok. The new node is all ready now. */
-+ node = tmp;
-+
-+ if(first_pattern_cache == NULL) /* list is empty */
-+ first_pattern_cache = node; /* make node the beginning */
-+ else
-+ last_pattern_cache->next = node; /* attach node to the end */
-+
-+ /* copy the string and compile the regex */
-+ len = strlen(regex_string);
-+ DPRINTK("About to compile this: \"%s\"\n", regex_string);
-+ node->pattern = regcomp(regex_string, &len);
-+ if ( !node->pattern ) {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: Error compiling regexp \"%s\" (%s)\n", regex_string, protocol);
-+ /* pattern is now cached as NULL, so we won't try again. */
-+ }
-+
-+ strcpy(node->regex_string, regex_string);
-+ return node->pattern;
-+}
-+
-+static int can_handle(const struct sk_buff *skb)
-+{
-+ if(!skb->nh.iph) /* not IP */
-+ return 0;
-+ if(skb->nh.iph->protocol != IPPROTO_TCP &&
-+ skb->nh.iph->protocol != IPPROTO_UDP &&
-+ skb->nh.iph->protocol != IPPROTO_ICMP)
-+ return 0;
-+ return 1;
-+}
-+
-+/* Returns offset the into the skb->data that the application data starts */
-+static int app_data_offset(const struct sk_buff *skb)
-+{
-+ /* In case we are ported somewhere (ebtables?) where skb->nh.iph
-+ isn't set, this can be gotten from 4*(skb->data[0] & 0x0f) as well. */
-+ int ip_hl = 4*skb->nh.iph->ihl;
-+
-+ if( skb->nh.iph->protocol == IPPROTO_TCP ) {
-+ /* 12 == offset into TCP header for the header length field.
-+ Can't get this with skb->h.th->doff because the tcphdr
-+ struct doesn't get set when routing (this is confirmed to be
-+ true in Netfilter as well as QoS.) */
-+ int tcp_hl = 4*(skb->data[ip_hl + 12] >> 4);
-+
-+ return ip_hl + tcp_hl;
-+ } else if( skb->nh.iph->protocol == IPPROTO_UDP ) {
-+ return ip_hl + 8; /* UDP header is always 8 bytes */
-+ } else if( skb->nh.iph->protocol == IPPROTO_ICMP ) {
-+ return ip_hl + 8; /* ICMP header is 8 bytes */
-+ } else {
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: tried to handle unknown protocol!\n");
-+ return ip_hl + 8; /* something reasonable */
-+ }
-+}
-+
-+/* handles whether there's a match when we aren't appending data anymore */
-+static int match_no_append(struct ip_conntrack * conntrack, struct ip_conntrack * master_conntrack,
-+ enum ip_conntrack_info ctinfo, enum ip_conntrack_info master_ctinfo,
-+ struct ipt_layer7_info * info)
-+{
-+ /* If we're in here, throw the app data away */
-+ write_lock(&ct_lock);
-+ if(master_conntrack->layer7.app_data != NULL) {
-+
-+ #ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
-+ if(!master_conntrack->layer7.app_proto) {
-+ char * f = friendly_print(master_conntrack->layer7.app_data);
-+ char * g = hex_print(master_conntrack->layer7.app_data);
-+ DPRINTK("\nl7-filter gave up after %d bytes (%d packets):\n%s\n",
-+ strlen(f), TOTAL_PACKETS, f);
-+ kfree(f);
-+ DPRINTK("In hex: %s\n", g);
-+ kfree(g);
-+ }
-+ #endif
-+
-+ kfree(master_conntrack->layer7.app_data);
-+ master_conntrack->layer7.app_data = NULL; /* don't free again */
-+ }
-+ write_unlock(&ct_lock);
-+
-+ if(master_conntrack->layer7.app_proto){
-+ /* Here child connections set their .app_proto (for /proc/net/ip_conntrack) */
-+ write_lock(&ct_lock);
-+ if(!conntrack->layer7.app_proto) {
-+ conntrack->layer7.app_proto = kmalloc(strlen(master_conntrack->layer7.app_proto)+1, GFP_ATOMIC);
-+ if(!conntrack->layer7.app_proto){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n");
-+ write_unlock(&ct_lock);
-+ return 1;
-+ }
-+ strcpy(conntrack->layer7.app_proto, master_conntrack->layer7.app_proto);
-+ }
-+ write_unlock(&ct_lock);
-+
-+ return (!strcmp(master_conntrack->layer7.app_proto, info->protocol));
-+ }
-+ else {
-+ /* If not classified, set to "unknown" to distinguish from
-+ connections that are still being tested. */
-+ write_lock(&ct_lock);
-+ master_conntrack->layer7.app_proto = kmalloc(strlen("unknown")+1, GFP_ATOMIC);
-+ if(!master_conntrack->layer7.app_proto){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n");
-+ write_unlock(&ct_lock);
-+ return 1;
-+ }
-+ strcpy(master_conntrack->layer7.app_proto, "unknown");
-+ write_unlock(&ct_lock);
-+ return 0;
-+ }
-+}
-+
-+/* add the new app data to the conntrack. Return number of bytes added. */
-+static int add_data(struct ip_conntrack * master_conntrack,
-+ char * app_data, int appdatalen)
-+{
-+ int length = 0, i;
-+ int oldlength = master_conntrack->layer7.app_data_len;
-+
-+ // This is a fix for a race condition by Deti Fliegl. However, I'm not
-+ // clear on whether the race condition exists or whether this really
-+ // fixes it. I might just be being dense... Anyway, if it's not really
-+ // a fix, all it does is waste a very small amount of time.
-+ if(!master_conntrack->layer7.app_data) return 0;
-+
-+ /* Strip nulls. Make everything lower case (our regex lib doesn't
-+ do case insensitivity). Add it to the end of the current data. */
-+ for(i = 0; i < maxdatalen-oldlength-1 &&
-+ i < appdatalen; i++) {
-+ if(app_data[i] != '\0') {
-+ master_conntrack->layer7.app_data[length+oldlength] =
-+ /* the kernel version of tolower mungs 'upper ascii' */
-+ isascii(app_data[i])? tolower(app_data[i]) : app_data[i];
-+ length++;
-+ }
-+ }
-+
-+ master_conntrack->layer7.app_data[length+oldlength] = '\0';
-+ master_conntrack->layer7.app_data_len = length + oldlength;
-+
-+ return length;
-+}
-+
-+/* Returns true on match and false otherwise. */
-+static int match(const struct sk_buff *skbin,
-+ const struct net_device *in, const struct net_device *out,
-+ const struct xt_match *match, const void *matchinfo,
-+ int offset, unsigned int protoff, int *hotdrop)
-+{
-+ /* sidestep const without getting a compiler warning... */
-+ struct sk_buff * skb = (struct sk_buff *)skbin;
-+
-+ struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo;
-+ enum ip_conntrack_info master_ctinfo, ctinfo;
-+ struct ip_conntrack *master_conntrack, *conntrack;
-+ unsigned char * app_data;
-+ unsigned int pattern_result, appdatalen;
-+ regexp * comppattern;
-+
-+ if(!can_handle(skb)){
-+ DPRINTK("layer7: This is some protocol I can't handle.\n");
-+ return info->invert;
-+ }
-+
-+ /* Treat parent & all its children together as one connection, except
-+ for the purpose of setting conntrack->layer7.app_proto in the actual
-+ connection. This makes /proc/net/ip_conntrack more satisfying. */
-+ if(!(conntrack = ip_conntrack_get((struct sk_buff *)skb, &ctinfo)) ||
-+ !(master_conntrack = ip_conntrack_get((struct sk_buff *)skb, &master_ctinfo))) {
-+ //DPRINTK("layer7: packet is not from a known connection, giving up.\n");
-+ return info->invert;
-+ }
-+
-+ /* Try to get a master conntrack (and its master etc) for FTP, etc. */
-+ while (master_ct(master_conntrack) != NULL)
-+ master_conntrack = master_ct(master_conntrack);
-+
-+ /* if we've classified it or seen too many packets */
-+ if(TOTAL_PACKETS > num_packets ||
-+ master_conntrack->layer7.app_proto) {
-+
-+ pattern_result = match_no_append(conntrack, master_conntrack, ctinfo, master_ctinfo, info);
-+
-+ /* skb->cb[0] == seen. Avoid doing things twice if there are two l7
-+ rules. I'm not sure that using cb for this purpose is correct, although
-+ it says "put your private variables there". But it doesn't look like it
-+ is being used for anything else in the skbs that make it here. How can
-+ I write to cb without making the compiler angry? */
-+ skb->cb[0] = 1; /* marking it seen here is probably irrelevant, but consistant */
-+
-+ return (pattern_result ^ info->invert);
-+ }
-+
-+ if(skb_is_nonlinear(skb)){
-+ if(skb_linearize(skb) != 0){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: failed to linearize packet, bailing.\n");
-+ return info->invert;
-+ }
-+ }
-+
-+ /* now that the skb is linearized, it's safe to set these. */
-+ app_data = skb->data + app_data_offset(skb);
-+ appdatalen = skb->tail - app_data;
-+
-+ spin_lock_bh(&list_lock);
-+ /* the return value gets checked later, when we're ready to use it */
-+ comppattern = compile_and_cache(info->pattern, info->protocol);
-+ spin_unlock_bh(&list_lock);
-+
-+ /* On the first packet of a connection, allocate space for app data */
-+ write_lock(&ct_lock);
-+ if(TOTAL_PACKETS == 1 && !skb->cb[0] && !master_conntrack->layer7.app_data) {
-+ master_conntrack->layer7.app_data = kmalloc(maxdatalen, GFP_ATOMIC);
-+ if(!master_conntrack->layer7.app_data){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
-+ write_unlock(&ct_lock);
-+ return info->invert;
-+ }
-+
-+ master_conntrack->layer7.app_data[0] = '\0';
-+ }
-+ write_unlock(&ct_lock);
-+
-+ /* Can be here, but unallocated, if numpackets is increased near
-+ the beginning of a connection */
-+ if(master_conntrack->layer7.app_data == NULL)
-+ return (info->invert); /* unmatched */
-+
-+ if(!skb->cb[0]){
-+ int newbytes;
-+ write_lock(&ct_lock);
-+ newbytes = add_data(master_conntrack, app_data, appdatalen);
-+ write_unlock(&ct_lock);
-+
-+ if(newbytes == 0) { /* didn't add any data */
-+ skb->cb[0] = 1;
-+ /* Didn't match before, not going to match now */
-+ return info->invert;
-+ }
-+ }
-+
-+ /* If looking for "unknown", then never match. "Unknown" means that
-+ we've given up; we're still trying with these packets. */
-+ read_lock(&ct_lock);
-+ if(!strcmp(info->protocol, "unknown")) {
-+ pattern_result = 0;
-+ /* If the regexp failed to compile, don't bother running it */
-+ } else if(comppattern && regexec(comppattern, master_conntrack->layer7.app_data)) {
-+ DPRINTK("layer7: matched %s\n", info->protocol);
-+ pattern_result = 1;
-+ } else pattern_result = 0;
-+ read_unlock(&ct_lock);
-+
-+ if(pattern_result) {
-+ write_lock(&ct_lock);
-+ master_conntrack->layer7.app_proto = kmalloc(strlen(info->protocol)+1, GFP_ATOMIC);
-+ if(!master_conntrack->layer7.app_proto){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
-+ write_unlock(&ct_lock);
-+ return (pattern_result ^ info->invert);
-+ }
-+ strcpy(master_conntrack->layer7.app_proto, info->protocol);
-+ write_unlock(&ct_lock);
-+ }
-+
-+ /* mark the packet seen */
-+ skb->cb[0] = 1;
-+
-+ return (pattern_result ^ info->invert);
-+}
-+
-+static struct ipt_match layer7_match = {
-+ .name = "layer7",
-+ .match = &match,
-+ .matchsize = sizeof(struct ipt_layer7_info),
-+ .me = THIS_MODULE
-+};
-+
-+/* taken from drivers/video/modedb.c */
-+static int my_atoi(const char *s)
-+{
-+ int val = 0;
-+
-+ for (;; s++) {
-+ switch (*s) {
-+ case '0'...'9':
-+ val = 10*val+(*s-'0');
-+ break;
-+ default:
-+ return val;
-+ }
-+ }
-+}
-+
-+/* write out num_packets to userland. */
-+static int layer7_read_proc(char* page, char ** start, off_t off, int count,
-+ int* eof, void * data)
-+{
-+ if(num_packets > 99 && net_ratelimit())
-+ printk(KERN_ERR "layer7: NOT REACHED. num_packets too big\n");
-+
-+ page[0] = num_packets/10 + '0';
-+ page[1] = num_packets%10 + '0';
-+ page[2] = '\n';
-+ page[3] = '\0';
-+
-+ *eof=1;
-+
-+ return 3;
-+}
-+
-+/* Read in num_packets from userland */
-+static int layer7_write_proc(struct file* file, const char* buffer,
-+ unsigned long count, void *data)
-+{
-+ char * foo = kmalloc(count, GFP_ATOMIC);
-+
-+ if(!foo){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory, bailing. num_packets unchanged.\n");
-+ return count;
-+ }
-+
-+ if(copy_from_user(foo, buffer, count)) {
-+ return -EFAULT;
-+ }
-+
-+
-+ num_packets = my_atoi(foo);
-+ kfree (foo);
-+
-+ /* This has an arbitrary limit to make the math easier. I'm lazy.
-+ But anyway, 99 is a LOT! If you want more, you're doing it wrong! */
-+ if(num_packets > 99) {
-+ printk(KERN_WARNING "layer7: num_packets can't be > 99.\n");
-+ num_packets = 99;
-+ } else if(num_packets < 1) {
-+ printk(KERN_WARNING "layer7: num_packets can't be < 1.\n");
-+ num_packets = 1;
-+ }
-+
-+ return count;
-+}
-+
-+/* register the proc file */
-+static void layer7_init_proc(void)
-+{
-+ struct proc_dir_entry* entry;
-+ entry = create_proc_entry("layer7_numpackets", 0644, proc_net);
-+ entry->read_proc = layer7_read_proc;
-+ entry->write_proc = layer7_write_proc;
-+}
-+
-+static void layer7_cleanup_proc(void)
-+{
-+ remove_proc_entry("layer7_numpackets", proc_net);
-+}
-+
-+static int __init ipt_layer7_init(void)
-+{
-+ need_conntrack();
-+
-+ layer7_init_proc();
-+ if(maxdatalen < 1) {
-+ printk(KERN_WARNING "layer7: maxdatalen can't be < 1, using 1\n");
-+ maxdatalen = 1;
-+ }
-+ /* This is not a hard limit. It's just here to prevent people from
-+ bringing their slow machines to a grinding halt. */
-+ else if(maxdatalen > 65536) {
-+ printk(KERN_WARNING "layer7: maxdatalen can't be > 65536, using 65536\n");
-+ maxdatalen = 65536;
-+ }
-+ return ipt_register_match(&layer7_match);
-+}
-+
-+static void __exit ipt_layer7_fini(void)
-+{
-+ layer7_cleanup_proc();
-+ ipt_unregister_match(&layer7_match);
-+}
-+
-+module_init(ipt_layer7_init);
-+module_exit(ipt_layer7_fini);
-diff -urN linux.old/net/ipv4/netfilter/Kconfig linux.dev/net/ipv4/netfilter/Kconfig
---- linux.old/net/ipv4/netfilter/Kconfig 2007-01-01 05:17:07.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/Kconfig 2007-01-01 05:18:48.000000000 +0100
-@@ -248,6 +248,24 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP_NF_MATCH_LAYER7
-+ tristate "Layer 7 match support (EXPERIMENTAL)"
-+ depends on IP_NF_IPTABLES && IP_NF_CT_ACCT && IP_NF_CONNTRACK && EXPERIMENTAL
-+ help
-+ Say Y if you want to be able to classify connections (and their
-+ packets) based on regular expression matching of their application
-+ layer data. This is one way to classify applications such as
-+ peer-to-peer filesharing systems that do not always use the same
-+ port.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_MATCH_LAYER7_DEBUG
-+ bool "Layer 7 debugging output"
-+ depends on IP_NF_MATCH_LAYER7
-+ help
-+ Say Y to get lots of debugging output.
-+
- config IP_NF_MATCH_TOS
- tristate "TOS match support"
- depends on IP_NF_IPTABLES
-diff -urN linux.old/net/ipv4/netfilter/Makefile linux.dev/net/ipv4/netfilter/Makefile
---- linux.old/net/ipv4/netfilter/Makefile 2007-01-01 05:17:07.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/Makefile 2007-01-01 05:18:48.000000000 +0100
-@@ -63,6 +63,8 @@
- obj-$(CONFIG_IP_NF_MATCH_TTL) += ipt_ttl.o
- obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o
-
-+obj-$(CONFIG_IP_NF_MATCH_LAYER7) += ipt_layer7.o
-+
- # targets
- obj-$(CONFIG_IP_NF_TARGET_REJECT) += ipt_REJECT.o
- obj-$(CONFIG_IP_NF_TARGET_TOS) += ipt_TOS.o
-diff -urN linux.old/net/ipv4/netfilter/regexp/regexp.c linux.dev/net/ipv4/netfilter/regexp/regexp.c
---- linux.old/net/ipv4/netfilter/regexp/regexp.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/regexp/regexp.c 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,1197 @@
-+/*
-+ * regcomp and regexec -- regsub and regerror are elsewhere
-+ * @(#)regexp.c 1.3 of 18 April 87
-+ *
-+ * Copyright (c) 1986 by University of Toronto.
-+ * Written by Henry Spencer. Not derived from licensed software.
-+ *
-+ * Permission is granted to anyone to use this software for any
-+ * purpose on any computer system, and to redistribute it freely,
-+ * subject to the following restrictions:
-+ *
-+ * 1. The author is not responsible for the consequences of use of
-+ * this software, no matter how awful, even if they arise
-+ * from defects in it.
-+ *
-+ * 2. The origin of this software must not be misrepresented, either
-+ * by explicit claim or by omission.
-+ *
-+ * 3. Altered versions must be plainly marked as such, and must not
-+ * be misrepresented as being the original software.
-+ *
-+ * Beware that some of this code is subtly aware of the way operator
-+ * precedence is structured in regular expressions. Serious changes in
-+ * regular-expression syntax might require a total rethink.
-+ *
-+ * This code was modified by Ethan Sommer to work within the kernel
-+ * (it now uses kmalloc etc..)
-+ *
-+ * Modified slightly by Matthew Strait to use more modern C.
-+ */
-+
-+#include "regexp.h"
-+#include "regmagic.h"
-+
-+/* added by ethan and matt. Lets it work in both kernel and user space.
-+(So iptables can use it, for instance.) Yea, it goes both ways... */
-+#if __KERNEL__
-+ #define malloc(foo) kmalloc(foo,GFP_ATOMIC)
-+#else
-+ #define printk(format,args...) printf(format,##args)
-+#endif
-+
-+void regerror(char * s)
-+{
-+ printk("<3>Regexp: %s\n", s);
-+ /* NOTREACHED */
-+}
-+
-+/*
-+ * The "internal use only" fields in regexp.h are present to pass info from
-+ * compile to execute that permits the execute phase to run lots faster on
-+ * simple cases. They are:
-+ *
-+ * regstart char that must begin a match; '\0' if none obvious
-+ * reganch is the match anchored (at beginning-of-line only)?
-+ * regmust string (pointer into program) that match must include, or NULL
-+ * regmlen length of regmust string
-+ *
-+ * Regstart and reganch permit very fast decisions on suitable starting points
-+ * for a match, cutting down the work a lot. Regmust permits fast rejection
-+ * of lines that cannot possibly match. The regmust tests are costly enough
-+ * that regcomp() supplies a regmust only if the r.e. contains something
-+ * potentially expensive (at present, the only such thing detected is * or +
-+ * at the start of the r.e., which can involve a lot of backup). Regmlen is
-+ * supplied because the test in regexec() needs it and regcomp() is computing
-+ * it anyway.
-+ */
-+
-+/*
-+ * Structure for regexp "program". This is essentially a linear encoding
-+ * of a nondeterministic finite-state machine (aka syntax charts or
-+ * "railroad normal form" in parsing technology). Each node is an opcode
-+ * plus a "next" pointer, possibly plus an operand. "Next" pointers of
-+ * all nodes except BRANCH implement concatenation; a "next" pointer with
-+ * a BRANCH on both ends of it is connecting two alternatives. (Here we
-+ * have one of the subtle syntax dependencies: an individual BRANCH (as
-+ * opposed to a collection of them) is never concatenated with anything
-+ * because of operator precedence.) The operand of some types of node is
-+ * a literal string; for others, it is a node leading into a sub-FSM. In
-+ * particular, the operand of a BRANCH node is the first node of the branch.
-+ * (NB this is *not* a tree structure: the tail of the branch connects
-+ * to the thing following the set of BRANCHes.) The opcodes are:
-+ */
-+
-+/* definition number opnd? meaning */
-+#define END 0 /* no End of program. */
-+#define BOL 1 /* no Match "" at beginning of line. */
-+#define EOL 2 /* no Match "" at end of line. */
-+#define ANY 3 /* no Match any one character. */
-+#define ANYOF 4 /* str Match any character in this string. */
-+#define ANYBUT 5 /* str Match any character not in this string. */
-+#define BRANCH 6 /* node Match this alternative, or the next... */
-+#define BACK 7 /* no Match "", "next" ptr points backward. */
-+#define EXACTLY 8 /* str Match this string. */
-+#define NOTHING 9 /* no Match empty string. */
-+#define STAR 10 /* node Match this (simple) thing 0 or more times. */
-+#define PLUS 11 /* node Match this (simple) thing 1 or more times. */
-+#define OPEN 20 /* no Mark this point in input as start of #n. */
-+ /* OPEN+1 is number 1, etc. */
-+#define CLOSE 30 /* no Analogous to OPEN. */
-+
-+/*
-+ * Opcode notes:
-+ *
-+ * BRANCH The set of branches constituting a single choice are hooked
-+ * together with their "next" pointers, since precedence prevents
-+ * anything being concatenated to any individual branch. The
-+ * "next" pointer of the last BRANCH in a choice points to the
-+ * thing following the whole choice. This is also where the
-+ * final "next" pointer of each individual branch points; each
-+ * branch starts with the operand node of a BRANCH node.
-+ *
-+ * BACK Normal "next" pointers all implicitly point forward; BACK
-+ * exists to make loop structures possible.
-+ *
-+ * STAR,PLUS '?', and complex '*' and '+', are implemented as circular
-+ * BRANCH structures using BACK. Simple cases (one character
-+ * per match) are implemented with STAR and PLUS for speed
-+ * and to minimize recursive plunges.
-+ *
-+ * OPEN,CLOSE ...are numbered at compile time.
-+ */
-+
-+/*
-+ * A node is one char of opcode followed by two chars of "next" pointer.
-+ * "Next" pointers are stored as two 8-bit pieces, high order first. The
-+ * value is a positive offset from the opcode of the node containing it.
-+ * An operand, if any, simply follows the node. (Note that much of the
-+ * code generation knows about this implicit relationship.)
-+ *
-+ * Using two bytes for the "next" pointer is vast overkill for most things,
-+ * but allows patterns to get big without disasters.
-+ */
-+#define OP(p) (*(p))
-+#define NEXT(p) (((*((p)+1)&0377)<<8) + (*((p)+2)&0377))
-+#define OPERAND(p) ((p) + 3)
-+
-+/*
-+ * See regmagic.h for one further detail of program structure.
-+ */
-+
-+
-+/*
-+ * Utility definitions.
-+ */
-+#ifndef CHARBITS
-+#define UCHARAT(p) ((int)*(unsigned char *)(p))
-+#else
-+#define UCHARAT(p) ((int)*(p)&CHARBITS)
-+#endif
-+
-+#define FAIL(m) { regerror(m); return(NULL); }
-+#define ISMULT(c) ((c) == '*' || (c) == '+' || (c) == '?')
-+#define META "^$.[()|?+*\\"
-+
-+/*
-+ * Flags to be passed up and down.
-+ */
-+#define HASWIDTH 01 /* Known never to match null string. */
-+#define SIMPLE 02 /* Simple enough to be STAR/PLUS operand. */
-+#define SPSTART 04 /* Starts with * or +. */
-+#define WORST 0 /* Worst case. */
-+
-+/*
-+ * Global work variables for regcomp().
-+ */
-+struct match_globals {
-+char *reginput; /* String-input pointer. */
-+char *regbol; /* Beginning of input, for ^ check. */
-+char **regstartp; /* Pointer to startp array. */
-+char **regendp; /* Ditto for endp. */
-+char *regparse; /* Input-scan pointer. */
-+int regnpar; /* () count. */
-+char regdummy;
-+char *regcode; /* Code-emit pointer; ®dummy = don't. */
-+long regsize; /* Code size. */
-+};
-+
-+/*
-+ * Forward declarations for regcomp()'s friends.
-+ */
-+#ifndef STATIC
-+#define STATIC static
-+#endif
-+STATIC char *reg(struct match_globals *g, int paren,int *flagp);
-+STATIC char *regbranch(struct match_globals *g, int *flagp);
-+STATIC char *regpiece(struct match_globals *g, int *flagp);
-+STATIC char *regatom(struct match_globals *g, int *flagp);
-+STATIC char *regnode(struct match_globals *g, char op);
-+STATIC char *regnext(struct match_globals *g, char *p);
-+STATIC void regc(struct match_globals *g, char b);
-+STATIC void reginsert(struct match_globals *g, char op, char *opnd);
-+STATIC void regtail(struct match_globals *g, char *p, char *val);
-+STATIC void regoptail(struct match_globals *g, char *p, char *val);
-+
-+
-+__kernel_size_t my_strcspn(const char *s1,const char *s2)
-+{
-+ char *scan1;
-+ char *scan2;
-+ int count;
-+
-+ count = 0;
-+ for (scan1 = (char *)s1; *scan1 != '\0'; scan1++) {
-+ for (scan2 = (char *)s2; *scan2 != '\0';) /* ++ moved down. */
-+ if (*scan1 == *scan2++)
-+ return(count);
-+ count++;
-+ }
-+ return(count);
-+}
-+
-+/*
-+ - regcomp - compile a regular expression into internal code
-+ *
-+ * We can't allocate space until we know how big the compiled form will be,
-+ * but we can't compile it (and thus know how big it is) until we've got a
-+ * place to put the code. So we cheat: we compile it twice, once with code
-+ * generation turned off and size counting turned on, and once "for real".
-+ * This also means that we don't allocate space until we are sure that the
-+ * thing really will compile successfully, and we never have to move the
-+ * code and thus invalidate pointers into it. (Note that it has to be in
-+ * one piece because free() must be able to free it all.)
-+ *
-+ * Beware that the optimization-preparation code in here knows about some
-+ * of the structure of the compiled regexp.
-+ */
-+regexp *
-+regcomp(char *exp,int *patternsize)
-+{
-+ register regexp *r;
-+ register char *scan;
-+ register char *longest;
-+ register int len;
-+ int flags;
-+ struct match_globals g;
-+
-+ /* commented out by ethan
-+ extern char *malloc();
-+ */
-+
-+ if (exp == NULL)
-+ FAIL("NULL argument");
-+
-+ /* First pass: determine size, legality. */
-+ g.regparse = exp;
-+ g.regnpar = 1;
-+ g.regsize = 0L;
-+ g.regcode = &g.regdummy;
-+ regc(&g, MAGIC);
-+ if (reg(&g, 0, &flags) == NULL)
-+ return(NULL);
-+
-+ /* Small enough for pointer-storage convention? */
-+ if (g.regsize >= 32767L) /* Probably could be 65535L. */
-+ FAIL("regexp too big");
-+
-+ /* Allocate space. */
-+ *patternsize=sizeof(regexp) + (unsigned)g.regsize;
-+ r = (regexp *)malloc(sizeof(regexp) + (unsigned)g.regsize);
-+ if (r == NULL)
-+ FAIL("out of space");
-+
-+ /* Second pass: emit code. */
-+ g.regparse = exp;
-+ g.regnpar = 1;
-+ g.regcode = r->program;
-+ regc(&g, MAGIC);
-+ if (reg(&g, 0, &flags) == NULL)
-+ return(NULL);
-+
-+ /* Dig out information for optimizations. */
-+ r->regstart = '\0'; /* Worst-case defaults. */
-+ r->reganch = 0;
-+ r->regmust = NULL;
-+ r->regmlen = 0;
-+ scan = r->program+1; /* First BRANCH. */
-+ if (OP(regnext(&g, scan)) == END) { /* Only one top-level choice. */
-+ scan = OPERAND(scan);
-+
-+ /* Starting-point info. */
-+ if (OP(scan) == EXACTLY)
-+ r->regstart = *OPERAND(scan);
-+ else if (OP(scan) == BOL)
-+ r->reganch++;
-+
-+ /*
-+ * If there's something expensive in the r.e., find the
-+ * longest literal string that must appear and make it the
-+ * regmust. Resolve ties in favor of later strings, since
-+ * the regstart check works with the beginning of the r.e.
-+ * and avoiding duplication strengthens checking. Not a
-+ * strong reason, but sufficient in the absence of others.
-+ */
-+ if (flags&SPSTART) {
-+ longest = NULL;
-+ len = 0;
-+ for (; scan != NULL; scan = regnext(&g, scan))
-+ if (OP(scan) == EXACTLY && strlen(OPERAND(scan)) >= len) {
-+ longest = OPERAND(scan);
-+ len = strlen(OPERAND(scan));
-+ }
-+ r->regmust = longest;
-+ r->regmlen = len;
-+ }
-+ }
-+
-+ return(r);
-+}
-+
-+/*
-+ - reg - regular expression, i.e. main body or parenthesized thing
-+ *
-+ * Caller must absorb opening parenthesis.
-+ *
-+ * Combining parenthesis handling with the base level of regular expression
-+ * is a trifle forced, but the need to tie the tails of the branches to what
-+ * follows makes it hard to avoid.
-+ */
-+static char *
-+reg(struct match_globals *g, int paren, int *flagp /* Parenthesized? */ )
-+{
-+ register char *ret;
-+ register char *br;
-+ register char *ender;
-+ register int parno = 0; /* 0 makes gcc happy */
-+ int flags;
-+
-+ *flagp = HASWIDTH; /* Tentatively. */
-+
-+ /* Make an OPEN node, if parenthesized. */
-+ if (paren) {
-+ if (g->regnpar >= NSUBEXP)
-+ FAIL("too many ()");
-+ parno = g->regnpar;
-+ g->regnpar++;
-+ ret = regnode(g, OPEN+parno);
-+ } else
-+ ret = NULL;
-+
-+ /* Pick up the branches, linking them together. */
-+ br = regbranch(g, &flags);
-+ if (br == NULL)
-+ return(NULL);
-+ if (ret != NULL)
-+ regtail(g, ret, br); /* OPEN -> first. */
-+ else
-+ ret = br;
-+ if (!(flags&HASWIDTH))
-+ *flagp &= ~HASWIDTH;
-+ *flagp |= flags&SPSTART;
-+ while (*g->regparse == '|') {
-+ g->regparse++;
-+ br = regbranch(g, &flags);
-+ if (br == NULL)
-+ return(NULL);
-+ regtail(g, ret, br); /* BRANCH -> BRANCH. */
-+ if (!(flags&HASWIDTH))
-+ *flagp &= ~HASWIDTH;
-+ *flagp |= flags&SPSTART;
-+ }
-+
-+ /* Make a closing node, and hook it on the end. */
-+ ender = regnode(g, (paren) ? CLOSE+parno : END);
-+ regtail(g, ret, ender);
-+
-+ /* Hook the tails of the branches to the closing node. */
-+ for (br = ret; br != NULL; br = regnext(g, br))
-+ regoptail(g, br, ender);
-+
-+ /* Check for proper termination. */
-+ if (paren && *g->regparse++ != ')') {
-+ FAIL("unmatched ()");
-+ } else if (!paren && *g->regparse != '\0') {
-+ if (*g->regparse == ')') {
-+ FAIL("unmatched ()");
-+ } else
-+ FAIL("junk on end"); /* "Can't happen". */
-+ /* NOTREACHED */
-+ }
-+
-+ return(ret);
-+}
-+
-+/*
-+ - regbranch - one alternative of an | operator
-+ *
-+ * Implements the concatenation operator.
-+ */
-+static char *
-+regbranch(struct match_globals *g, int *flagp)
-+{
-+ register char *ret;
-+ register char *chain;
-+ register char *latest;
-+ int flags;
-+
-+ *flagp = WORST; /* Tentatively. */
-+
-+ ret = regnode(g, BRANCH);
-+ chain = NULL;
-+ while (*g->regparse != '\0' && *g->regparse != '|' && *g->regparse != ')') {
-+ latest = regpiece(g, &flags);
-+ if (latest == NULL)
-+ return(NULL);
-+ *flagp |= flags&HASWIDTH;
-+ if (chain == NULL) /* First piece. */
-+ *flagp |= flags&SPSTART;
-+ else
-+ regtail(g, chain, latest);
-+ chain = latest;
-+ }
-+ if (chain == NULL) /* Loop ran zero times. */
-+ (void) regnode(g, NOTHING);
-+
-+ return(ret);
-+}
-+
-+/*
-+ - regpiece - something followed by possible [*+?]
-+ *
-+ * Note that the branching code sequences used for ? and the general cases
-+ * of * and + are somewhat optimized: they use the same NOTHING node as
-+ * both the endmarker for their branch list and the body of the last branch.
-+ * It might seem that this node could be dispensed with entirely, but the
-+ * endmarker role is not redundant.
-+ */
-+static char *
-+regpiece(struct match_globals *g, int *flagp)
-+{
-+ register char *ret;
-+ register char op;
-+ register char *next;
-+ int flags;
-+
-+ ret = regatom(g, &flags);
-+ if (ret == NULL)
-+ return(NULL);
-+
-+ op = *g->regparse;
-+ if (!ISMULT(op)) {
-+ *flagp = flags;
-+ return(ret);
-+ }
-+
-+ if (!(flags&HASWIDTH) && op != '?')
-+ FAIL("*+ operand could be empty");
-+ *flagp = (op != '+') ? (WORST|SPSTART) : (WORST|HASWIDTH);
-+
-+ if (op == '*' && (flags&SIMPLE))
-+ reginsert(g, STAR, ret);
-+ else if (op == '*') {
-+ /* Emit x* as (x&|), where & means "self". */
-+ reginsert(g, BRANCH, ret); /* Either x */
-+ regoptail(g, ret, regnode(g, BACK)); /* and loop */
-+ regoptail(g, ret, ret); /* back */
-+ regtail(g, ret, regnode(g, BRANCH)); /* or */
-+ regtail(g, ret, regnode(g, NOTHING)); /* null. */
-+ } else if (op == '+' && (flags&SIMPLE))
-+ reginsert(g, PLUS, ret);
-+ else if (op == '+') {
-+ /* Emit x+ as x(&|), where & means "self". */
-+ next = regnode(g, BRANCH); /* Either */
-+ regtail(g, ret, next);
-+ regtail(g, regnode(g, BACK), ret); /* loop back */
-+ regtail(g, next, regnode(g, BRANCH)); /* or */
-+ regtail(g, ret, regnode(g, NOTHING)); /* null. */
-+ } else if (op == '?') {
-+ /* Emit x? as (x|) */
-+ reginsert(g, BRANCH, ret); /* Either x */
-+ regtail(g, ret, regnode(g, BRANCH)); /* or */
-+ next = regnode(g, NOTHING); /* null. */
-+ regtail(g, ret, next);
-+ regoptail(g, ret, next);
-+ }
-+ g->regparse++;
-+ if (ISMULT(*g->regparse))
-+ FAIL("nested *?+");
-+
-+ return(ret);
-+}
-+
-+/*
-+ - regatom - the lowest level
-+ *
-+ * Optimization: gobbles an entire sequence of ordinary characters so that
-+ * it can turn them into a single node, which is smaller to store and
-+ * faster to run. Backslashed characters are exceptions, each becoming a
-+ * separate node; the code is simpler that way and it's not worth fixing.
-+ */
-+static char *
-+regatom(struct match_globals *g, int *flagp)
-+{
-+ register char *ret;
-+ int flags;
-+
-+ *flagp = WORST; /* Tentatively. */
-+
-+ switch (*g->regparse++) {
-+ case '^':
-+ ret = regnode(g, BOL);
-+ break;
-+ case '$':
-+ ret = regnode(g, EOL);
-+ break;
-+ case '.':
-+ ret = regnode(g, ANY);
-+ *flagp |= HASWIDTH|SIMPLE;
-+ break;
-+ case '[': {
-+ register int class;
-+ register int classend;
-+
-+ if (*g->regparse == '^') { /* Complement of range. */
-+ ret = regnode(g, ANYBUT);
-+ g->regparse++;
-+ } else
-+ ret = regnode(g, ANYOF);
-+ if (*g->regparse == ']' || *g->regparse == '-')
-+ regc(g, *g->regparse++);
-+ while (*g->regparse != '\0' && *g->regparse != ']') {
-+ if (*g->regparse == '-') {
-+ g->regparse++;
-+ if (*g->regparse == ']' || *g->regparse == '\0')
-+ regc(g, '-');
-+ else {
-+ class = UCHARAT(g->regparse-2)+1;
-+ classend = UCHARAT(g->regparse);
-+ if (class > classend+1)
-+ FAIL("invalid [] range");
-+ for (; class <= classend; class++)
-+ regc(g, class);
-+ g->regparse++;
-+ }
-+ } else
-+ regc(g, *g->regparse++);
-+ }
-+ regc(g, '\0');
-+ if (*g->regparse != ']')
-+ FAIL("unmatched []");
-+ g->regparse++;
-+ *flagp |= HASWIDTH|SIMPLE;
-+ }
-+ break;
-+ case '(':
-+ ret = reg(g, 1, &flags);
-+ if (ret == NULL)
-+ return(NULL);
-+ *flagp |= flags&(HASWIDTH|SPSTART);
-+ break;
-+ case '\0':
-+ case '|':
-+ case ')':
-+ FAIL("internal urp"); /* Supposed to be caught earlier. */
-+ break;
-+ case '?':
-+ case '+':
-+ case '*':
-+ FAIL("?+* follows nothing");
-+ break;
-+ case '\\':
-+ if (*g->regparse == '\0')
-+ FAIL("trailing \\");
-+ ret = regnode(g, EXACTLY);
-+ regc(g, *g->regparse++);
-+ regc(g, '\0');
-+ *flagp |= HASWIDTH|SIMPLE;
-+ break;
-+ default: {
-+ register int len;
-+ register char ender;
-+
-+ g->regparse--;
-+ len = my_strcspn((const char *)g->regparse, (const char *)META);
-+ if (len <= 0)
-+ FAIL("internal disaster");
-+ ender = *(g->regparse+len);
-+ if (len > 1 && ISMULT(ender))
-+ len--; /* Back off clear of ?+* operand. */
-+ *flagp |= HASWIDTH;
-+ if (len == 1)
-+ *flagp |= SIMPLE;
-+ ret = regnode(g, EXACTLY);
-+ while (len > 0) {
-+ regc(g, *g->regparse++);
-+ len--;
-+ }
-+ regc(g, '\0');
-+ }
-+ break;
-+ }
-+
-+ return(ret);
-+}
-+
-+/*
-+ - regnode - emit a node
-+ */
-+static char * /* Location. */
-+regnode(struct match_globals *g, char op)
-+{
-+ register char *ret;
-+ register char *ptr;
-+
-+ ret = g->regcode;
-+ if (ret == &g->regdummy) {
-+ g->regsize += 3;
-+ return(ret);
-+ }
-+
-+ ptr = ret;
-+ *ptr++ = op;
-+ *ptr++ = '\0'; /* Null "next" pointer. */
-+ *ptr++ = '\0';
-+ g->regcode = ptr;
-+
-+ return(ret);
-+}
-+
-+/*
-+ - regc - emit (if appropriate) a byte of code
-+ */
-+static void
-+regc(struct match_globals *g, char b)
-+{
-+ if (g->regcode != &g->regdummy)
-+ *g->regcode++ = b;
-+ else
-+ g->regsize++;
-+}
-+
-+/*
-+ - reginsert - insert an operator in front of already-emitted operand
-+ *
-+ * Means relocating the operand.
-+ */
-+static void
-+reginsert(struct match_globals *g, char op, char* opnd)
-+{
-+ register char *src;
-+ register char *dst;
-+ register char *place;
-+
-+ if (g->regcode == &g->regdummy) {
-+ g->regsize += 3;
-+ return;
-+ }
-+
-+ src = g->regcode;
-+ g->regcode += 3;
-+ dst = g->regcode;
-+ while (src > opnd)
-+ *--dst = *--src;
-+
-+ place = opnd; /* Op node, where operand used to be. */
-+ *place++ = op;
-+ *place++ = '\0';
-+ *place++ = '\0';
-+}
-+
-+/*
-+ - regtail - set the next-pointer at the end of a node chain
-+ */
-+static void
-+regtail(struct match_globals *g, char *p, char *val)
-+{
-+ register char *scan;
-+ register char *temp;
-+ register int offset;
-+
-+ if (p == &g->regdummy)
-+ return;
-+
-+ /* Find last node. */
-+ scan = p;
-+ for (;;) {
-+ temp = regnext(g, scan);
-+ if (temp == NULL)
-+ break;
-+ scan = temp;
-+ }
-+
-+ if (OP(scan) == BACK)
-+ offset = scan - val;
-+ else
-+ offset = val - scan;
-+ *(scan+1) = (offset>>8)&0377;
-+ *(scan+2) = offset&0377;
-+}
-+
-+/*
-+ - regoptail - regtail on operand of first argument; nop if operandless
-+ */
-+static void
-+regoptail(struct match_globals *g, char *p, char *val)
-+{
-+ /* "Operandless" and "op != BRANCH" are synonymous in practice. */
-+ if (p == NULL || p == &g->regdummy || OP(p) != BRANCH)
-+ return;
-+ regtail(g, OPERAND(p), val);
-+}
-+
-+/*
-+ * regexec and friends
-+ */
-+
-+
-+/*
-+ * Forwards.
-+ */
-+STATIC int regtry(struct match_globals *g, regexp *prog, char *string);
-+STATIC int regmatch(struct match_globals *g, char *prog);
-+STATIC int regrepeat(struct match_globals *g, char *p);
-+
-+#ifdef DEBUG
-+int regnarrate = 0;
-+void regdump();
-+STATIC char *regprop(char *op);
-+#endif
-+
-+/*
-+ - regexec - match a regexp against a string
-+ */
-+int
-+regexec(regexp *prog, char *string)
-+{
-+ register char *s;
-+ struct match_globals g;
-+
-+ /* Be paranoid... */
-+ if (prog == NULL || string == NULL) {
-+ printk("<3>Regexp: NULL parameter\n");
-+ return(0);
-+ }
-+
-+ /* Check validity of program. */
-+ if (UCHARAT(prog->program) != MAGIC) {
-+ printk("<3>Regexp: corrupted program\n");
-+ return(0);
-+ }
-+
-+ /* If there is a "must appear" string, look for it. */
-+ if (prog->regmust != NULL) {
-+ s = string;
-+ while ((s = strchr(s, prog->regmust[0])) != NULL) {
-+ if (strncmp(s, prog->regmust, prog->regmlen) == 0)
-+ break; /* Found it. */
-+ s++;
-+ }
-+ if (s == NULL) /* Not present. */
-+ return(0);
-+ }
-+
-+ /* Mark beginning of line for ^ . */
-+ g.regbol = string;
-+
-+ /* Simplest case: anchored match need be tried only once. */
-+ if (prog->reganch)
-+ return(regtry(&g, prog, string));
-+
-+ /* Messy cases: unanchored match. */
-+ s = string;
-+ if (prog->regstart != '\0')
-+ /* We know what char it must start with. */
-+ while ((s = strchr(s, prog->regstart)) != NULL) {
-+ if (regtry(&g, prog, s))
-+ return(1);
-+ s++;
-+ }
-+ else
-+ /* We don't -- general case. */
-+ do {
-+ if (regtry(&g, prog, s))
-+ return(1);
-+ } while (*s++ != '\0');
-+
-+ /* Failure. */
-+ return(0);
-+}
-+
-+/*
-+ - regtry - try match at specific point
-+ */
-+static int /* 0 failure, 1 success */
-+regtry(struct match_globals *g, regexp *prog, char *string)
-+{
-+ register int i;
-+ register char **sp;
-+ register char **ep;
-+
-+ g->reginput = string;
-+ g->regstartp = prog->startp;
-+ g->regendp = prog->endp;
-+
-+ sp = prog->startp;
-+ ep = prog->endp;
-+ for (i = NSUBEXP; i > 0; i--) {
-+ *sp++ = NULL;
-+ *ep++ = NULL;
-+ }
-+ if (regmatch(g, prog->program + 1)) {
-+ prog->startp[0] = string;
-+ prog->endp[0] = g->reginput;
-+ return(1);
-+ } else
-+ return(0);
-+}
-+
-+/*
-+ - regmatch - main matching routine
-+ *
-+ * Conceptually the strategy is simple: check to see whether the current
-+ * node matches, call self recursively to see whether the rest matches,
-+ * and then act accordingly. In practice we make some effort to avoid
-+ * recursion, in particular by going through "ordinary" nodes (that don't
-+ * need to know whether the rest of the match failed) by a loop instead of
-+ * by recursion.
-+ */
-+static int /* 0 failure, 1 success */
-+regmatch(struct match_globals *g, char *prog)
-+{
-+ register char *scan = prog; /* Current node. */
-+ char *next; /* Next node. */
-+
-+#ifdef DEBUG
-+ if (scan != NULL && regnarrate)
-+ fprintf(stderr, "%s(\n", regprop(scan));
-+#endif
-+ while (scan != NULL) {
-+#ifdef DEBUG
-+ if (regnarrate)
-+ fprintf(stderr, "%s...\n", regprop(scan));
-+#endif
-+ next = regnext(g, scan);
-+
-+ switch (OP(scan)) {
-+ case BOL:
-+ if (g->reginput != g->regbol)
-+ return(0);
-+ break;
-+ case EOL:
-+ if (*g->reginput != '\0')
-+ return(0);
-+ break;
-+ case ANY:
-+ if (*g->reginput == '\0')
-+ return(0);
-+ g->reginput++;
-+ break;
-+ case EXACTLY: {
-+ register int len;
-+ register char *opnd;
-+
-+ opnd = OPERAND(scan);
-+ /* Inline the first character, for speed. */
-+ if (*opnd != *g->reginput)
-+ return(0);
-+ len = strlen(opnd);
-+ if (len > 1 && strncmp(opnd, g->reginput, len) != 0)
-+ return(0);
-+ g->reginput += len;
-+ }
-+ break;
-+ case ANYOF:
-+ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) == NULL)
-+ return(0);
-+ g->reginput++;
-+ break;
-+ case ANYBUT:
-+ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) != NULL)
-+ return(0);
-+ g->reginput++;
-+ break;
-+ case NOTHING:
-+ case BACK:
-+ break;
-+ case OPEN+1:
-+ case OPEN+2:
-+ case OPEN+3:
-+ case OPEN+4:
-+ case OPEN+5:
-+ case OPEN+6:
-+ case OPEN+7:
-+ case OPEN+8:
-+ case OPEN+9: {
-+ register int no;
-+ register char *save;
-+
-+ no = OP(scan) - OPEN;
-+ save = g->reginput;
-+
-+ if (regmatch(g, next)) {
-+ /*
-+ * Don't set startp if some later
-+ * invocation of the same parentheses
-+ * already has.
-+ */
-+ if (g->regstartp[no] == NULL)
-+ g->regstartp[no] = save;
-+ return(1);
-+ } else
-+ return(0);
-+ }
-+ break;
-+ case CLOSE+1:
-+ case CLOSE+2:
-+ case CLOSE+3:
-+ case CLOSE+4:
-+ case CLOSE+5:
-+ case CLOSE+6:
-+ case CLOSE+7:
-+ case CLOSE+8:
-+ case CLOSE+9:
-+ {
-+ register int no;
-+ register char *save;
-+
-+ no = OP(scan) - CLOSE;
-+ save = g->reginput;
-+
-+ if (regmatch(g, next)) {
-+ /*
-+ * Don't set endp if some later
-+ * invocation of the same parentheses
-+ * already has.
-+ */
-+ if (g->regendp[no] == NULL)
-+ g->regendp[no] = save;
-+ return(1);
-+ } else
-+ return(0);
-+ }
-+ break;
-+ case BRANCH: {
-+ register char *save;
-+
-+ if (OP(next) != BRANCH) /* No choice. */
-+ next = OPERAND(scan); /* Avoid recursion. */
-+ else {
-+ do {
-+ save = g->reginput;
-+ if (regmatch(g, OPERAND(scan)))
-+ return(1);
-+ g->reginput = save;
-+ scan = regnext(g, scan);
-+ } while (scan != NULL && OP(scan) == BRANCH);
-+ return(0);
-+ /* NOTREACHED */
-+ }
-+ }
-+ break;
-+ case STAR:
-+ case PLUS: {
-+ register char nextch;
-+ register int no;
-+ register char *save;
-+ register int min;
-+
-+ /*
-+ * Lookahead to avoid useless match attempts
-+ * when we know what character comes next.
-+ */
-+ nextch = '\0';
-+ if (OP(next) == EXACTLY)
-+ nextch = *OPERAND(next);
-+ min = (OP(scan) == STAR) ? 0 : 1;
-+ save = g->reginput;
-+ no = regrepeat(g, OPERAND(scan));
-+ while (no >= min) {
-+ /* If it could work, try it. */
-+ if (nextch == '\0' || *g->reginput == nextch)
-+ if (regmatch(g, next))
-+ return(1);
-+ /* Couldn't or didn't -- back up. */
-+ no--;
-+ g->reginput = save + no;
-+ }
-+ return(0);
-+ }
-+ break;
-+ case END:
-+ return(1); /* Success! */
-+ break;
-+ default:
-+ printk("<3>Regexp: memory corruption\n");
-+ return(0);
-+ break;
-+ }
-+
-+ scan = next;
-+ }
-+
-+ /*
-+ * We get here only if there's trouble -- normally "case END" is
-+ * the terminating point.
-+ */
-+ printk("<3>Regexp: corrupted pointers\n");
-+ return(0);
-+}
-+
-+/*
-+ - regrepeat - repeatedly match something simple, report how many
-+ */
-+static int
-+regrepeat(struct match_globals *g, char *p)
-+{
-+ register int count = 0;
-+ register char *scan;
-+ register char *opnd;
-+
-+ scan = g->reginput;
-+ opnd = OPERAND(p);
-+ switch (OP(p)) {
-+ case ANY:
-+ count = strlen(scan);
-+ scan += count;
-+ break;
-+ case EXACTLY:
-+ while (*opnd == *scan) {
-+ count++;
-+ scan++;
-+ }
-+ break;
-+ case ANYOF:
-+ while (*scan != '\0' && strchr(opnd, *scan) != NULL) {
-+ count++;
-+ scan++;
-+ }
-+ break;
-+ case ANYBUT:
-+ while (*scan != '\0' && strchr(opnd, *scan) == NULL) {
-+ count++;
-+ scan++;
-+ }
-+ break;
-+ default: /* Oh dear. Called inappropriately. */
-+ printk("<3>Regexp: internal foulup\n");
-+ count = 0; /* Best compromise. */
-+ break;
-+ }
-+ g->reginput = scan;
-+
-+ return(count);
-+}
-+
-+/*
-+ - regnext - dig the "next" pointer out of a node
-+ */
-+static char*
-+regnext(struct match_globals *g, char *p)
-+{
-+ register int offset;
-+
-+ if (p == &g->regdummy)
-+ return(NULL);
-+
-+ offset = NEXT(p);
-+ if (offset == 0)
-+ return(NULL);
-+
-+ if (OP(p) == BACK)
-+ return(p-offset);
-+ else
-+ return(p+offset);
-+}
-+
-+#ifdef DEBUG
-+
-+STATIC char *regprop();
-+
-+/*
-+ - regdump - dump a regexp onto stdout in vaguely comprehensible form
-+ */
-+void
-+regdump(regexp *r)
-+{
-+ register char *s;
-+ register char op = EXACTLY; /* Arbitrary non-END op. */
-+ register char *next;
-+ /* extern char *strchr(); */
-+
-+
-+ s = r->program + 1;
-+ while (op != END) { /* While that wasn't END last time... */
-+ op = OP(s);
-+ printf("%2d%s", s-r->program, regprop(s)); /* Where, what. */
-+ next = regnext(s);
-+ if (next == NULL) /* Next ptr. */
-+ printf("(0)");
-+ else
-+ printf("(%d)", (s-r->program)+(next-s));
-+ s += 3;
-+ if (op == ANYOF || op == ANYBUT || op == EXACTLY) {
-+ /* Literal string, where present. */
-+ while (*s != '\0') {
-+ putchar(*s);
-+ s++;
-+ }
-+ s++;
-+ }
-+ putchar('\n');
-+ }
-+
-+ /* Header fields of interest. */
-+ if (r->regstart != '\0')
-+ printf("start `%c' ", r->regstart);
-+ if (r->reganch)
-+ printf("anchored ");
-+ if (r->regmust != NULL)
-+ printf("must have \"%s\"", r->regmust);
-+ printf("\n");
-+}
-+
-+/*
-+ - regprop - printable representation of opcode
-+ */
-+static char *
-+regprop(char *op)
-+{
-+#define BUFLEN 50
-+ register char *p;
-+ static char buf[BUFLEN];
-+
-+ strcpy(buf, ":");
-+
-+ switch (OP(op)) {
-+ case BOL:
-+ p = "BOL";
-+ break;
-+ case EOL:
-+ p = "EOL";
-+ break;
-+ case ANY:
-+ p = "ANY";
-+ break;
-+ case ANYOF:
-+ p = "ANYOF";
-+ break;
-+ case ANYBUT:
-+ p = "ANYBUT";
-+ break;
-+ case BRANCH:
-+ p = "BRANCH";
-+ break;
-+ case EXACTLY:
-+ p = "EXACTLY";
-+ break;
-+ case NOTHING:
-+ p = "NOTHING";
-+ break;
-+ case BACK:
-+ p = "BACK";
-+ break;
-+ case END:
-+ p = "END";
-+ break;
-+ case OPEN+1:
-+ case OPEN+2:
-+ case OPEN+3:
-+ case OPEN+4:
-+ case OPEN+5:
-+ case OPEN+6:
-+ case OPEN+7:
-+ case OPEN+8:
-+ case OPEN+9:
-+ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "OPEN%d", OP(op)-OPEN);
-+ p = NULL;
-+ break;
-+ case CLOSE+1:
-+ case CLOSE+2:
-+ case CLOSE+3:
-+ case CLOSE+4:
-+ case CLOSE+5:
-+ case CLOSE+6:
-+ case CLOSE+7:
-+ case CLOSE+8:
-+ case CLOSE+9:
-+ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "CLOSE%d", OP(op)-CLOSE);
-+ p = NULL;
-+ break;
-+ case STAR:
-+ p = "STAR";
-+ break;
-+ case PLUS:
-+ p = "PLUS";
-+ break;
-+ default:
-+ printk("<3>Regexp: corrupted opcode\n");
-+ break;
-+ }
-+ if (p != NULL)
-+ strncat(buf, p, BUFLEN-strlen(buf));
-+ return(buf);
-+}
-+#endif
-+
-+
-diff -urN linux.old/net/ipv4/netfilter/regexp/regexp.h linux.dev/net/ipv4/netfilter/regexp/regexp.h
---- linux.old/net/ipv4/netfilter/regexp/regexp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/regexp/regexp.h 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,41 @@
-+/*
-+ * Definitions etc. for regexp(3) routines.
-+ *
-+ * Caveat: this is V8 regexp(3) [actually, a reimplementation thereof],
-+ * not the System V one.
-+ */
-+
-+#ifndef REGEXP_H
-+#define REGEXP_H
-+
-+
-+/*
-+http://www.opensource.apple.com/darwinsource/10.3/expect-1/expect/expect.h ,
-+which contains a version of this library, says:
-+
-+ *
-+ * NSUBEXP must be at least 10, and no greater than 117 or the parser
-+ * will not work properly.
-+ *
-+
-+However, it looks rather like this library is limited to 10. If you think
-+otherwise, let us know.
-+*/
-+
-+#define NSUBEXP 10
-+typedef struct regexp {
-+ char *startp[NSUBEXP];
-+ char *endp[NSUBEXP];
-+ char regstart; /* Internal use only. */
-+ char reganch; /* Internal use only. */
-+ char *regmust; /* Internal use only. */
-+ int regmlen; /* Internal use only. */
-+ char program[1]; /* Unwarranted chumminess with compiler. */
-+} regexp;
-+
-+regexp * regcomp(char *exp, int *patternsize);
-+int regexec(regexp *prog, char *string);
-+void regsub(regexp *prog, char *source, char *dest);
-+void regerror(char *s);
-+
-+#endif
-diff -urN linux.old/net/ipv4/netfilter/regexp/regmagic.h linux.dev/net/ipv4/netfilter/regexp/regmagic.h
---- linux.old/net/ipv4/netfilter/regexp/regmagic.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/regexp/regmagic.h 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,5 @@
-+/*
-+ * The first byte of the regexp internal "program" is actually this magic
-+ * number; the start node begins in the second byte.
-+ */
-+#define MAGIC 0234
-diff -urN linux.old/net/ipv4/netfilter/regexp/regsub.c linux.dev/net/ipv4/netfilter/regexp/regsub.c
---- linux.old/net/ipv4/netfilter/regexp/regsub.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/net/ipv4/netfilter/regexp/regsub.c 2007-01-01 05:18:48.000000000 +0100
-@@ -0,0 +1,95 @@
-+/*
-+ * regsub
-+ * @(#)regsub.c 1.3 of 2 April 86
-+ *
-+ * Copyright (c) 1986 by University of Toronto.
-+ * Written by Henry Spencer. Not derived from licensed software.
-+ *
-+ * Permission is granted to anyone to use this software for any
-+ * purpose on any computer system, and to redistribute it freely,
-+ * subject to the following restrictions:
-+ *
-+ * 1. The author is not responsible for the consequences of use of
-+ * this software, no matter how awful, even if they arise
-+ * from defects in it.
-+ *
-+ * 2. The origin of this software must not be misrepresented, either
-+ * by explicit claim or by omission.
-+ *
-+ * 3. Altered versions must be plainly marked as such, and must not
-+ * be misrepresented as being the original software.
-+ *
-+ *
-+ * This code was modified by Ethan Sommer to work within the kernel
-+ * (it now uses kmalloc etc..)
-+ *
-+ */
-+#include "regexp.h"
-+#include "regmagic.h"
-+#include <linux/string.h>
-+
-+
-+#ifndef CHARBITS
-+#define UCHARAT(p) ((int)*(unsigned char *)(p))
-+#else
-+#define UCHARAT(p) ((int)*(p)&CHARBITS)
-+#endif
-+
-+#if 0
-+//void regerror(char * s)
-+//{
-+// printk("regexp(3): %s", s);
-+// /* NOTREACHED */
-+//}
-+#endif
-+
-+/*
-+ - regsub - perform substitutions after a regexp match
-+ */
-+void
-+regsub(regexp * prog, char * source, char * dest)
-+{
-+ register char *src;
-+ register char *dst;
-+ register char c;
-+ register int no;
-+ register int len;
-+
-+ /* Not necessary and gcc doesn't like it -MLS */
-+ /*extern char *strncpy();*/
-+
-+ if (prog == NULL || source == NULL || dest == NULL) {
-+ regerror("NULL parm to regsub");
-+ return;
-+ }
-+ if (UCHARAT(prog->program) != MAGIC) {
-+ regerror("damaged regexp fed to regsub");
-+ return;
-+ }
-+
-+ src = source;
-+ dst = dest;
-+ while ((c = *src++) != '\0') {
-+ if (c == '&')
-+ no = 0;
-+ else if (c == '\\' && '0' <= *src && *src <= '9')
-+ no = *src++ - '0';
-+ else
-+ no = -1;
-+
-+ if (no < 0) { /* Ordinary character. */
-+ if (c == '\\' && (*src == '\\' || *src == '&'))
-+ c = *src++;
-+ *dst++ = c;
-+ } else if (prog->startp[no] != NULL && prog->endp[no] != NULL) {
-+ len = prog->endp[no] - prog->startp[no];
-+ (void) strncpy(dst, prog->startp[no], len);
-+ dst += len;
-+ if (len != 0 && *(dst-1) == '\0') { /* strncpy hit NUL. */
-+ regerror("damaged match string");
-+ return;
-+ }
-+ }
-+ }
-+ *dst++ = '\0';
-+}
+++ /dev/null
-diff -ur linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h linux.dev2/include/linux/netfilter_ipv4/ipt_layer7.h
---- linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:18:48.000000000 +0100
-+++ linux.dev2/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:30:46.000000000 +0100
-@@ -21,6 +21,7 @@
- char protocol[MAX_PROTOCOL_LEN];
- char invert:1;
- char pattern[MAX_PATTERN_LEN];
-+ char pkt;
- };
-
- #endif /* _IPT_LAYER7_H */
-diff -ur linux.dev/net/ipv4/netfilter/ipt_layer7.c linux.dev2/net/ipv4/netfilter/ipt_layer7.c
---- linux.dev/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:18:48.000000000 +0100
-+++ linux.dev2/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:30:46.000000000 +0100
-@@ -296,33 +296,34 @@
- }
- }
-
--/* add the new app data to the conntrack. Return number of bytes added. */
--static int add_data(struct ip_conntrack * master_conntrack,
-- char * app_data, int appdatalen)
-+static int add_datastr(char *target, int offset, char *app_data, int len)
- {
- int length = 0, i;
-- int oldlength = master_conntrack->layer7.app_data_len;
--
-- // This is a fix for a race condition by Deti Fliegl. However, I'm not
-- // clear on whether the race condition exists or whether this really
-- // fixes it. I might just be being dense... Anyway, if it's not really
-- // a fix, all it does is waste a very small amount of time.
-- if(!master_conntrack->layer7.app_data) return 0;
-+ if(!target) return 0;
-
- /* Strip nulls. Make everything lower case (our regex lib doesn't
- do case insensitivity). Add it to the end of the current data. */
-- for(i = 0; i < maxdatalen-oldlength-1 &&
-- i < appdatalen; i++) {
-+ for(i = 0; i < maxdatalen-offset-1 && i < len; i++) {
- if(app_data[i] != '\0') {
-- master_conntrack->layer7.app_data[length+oldlength] =
-+ target[length+offset] =
- /* the kernel version of tolower mungs 'upper ascii' */
- isascii(app_data[i])? tolower(app_data[i]) : app_data[i];
- length++;
- }
- }
-+ target[length+offset] = '\0';
-
-- master_conntrack->layer7.app_data[length+oldlength] = '\0';
-- master_conntrack->layer7.app_data_len = length + oldlength;
-+ return length;
-+}
-+
-+/* add the new app data to the conntrack. Return number of bytes added. */
-+static int add_data(struct ip_conntrack * master_conntrack,
-+ char * app_data, int appdatalen)
-+{
-+ int length;
-+
-+ length = add_datastr(master_conntrack->layer7.app_data, master_conntrack->layer7.app_data_len, app_data, appdatalen);
-+ master_conntrack->layer7.app_data_len += length;
-
- return length;
- }
-@@ -339,7 +340,7 @@
- struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo;
- enum ip_conntrack_info master_ctinfo, ctinfo;
- struct ip_conntrack *master_conntrack, *conntrack;
-- unsigned char * app_data;
-+ unsigned char *app_data, *tmp_data;
- unsigned int pattern_result, appdatalen;
- regexp * comppattern;
-
-@@ -362,8 +363,8 @@
- master_conntrack = master_ct(master_conntrack);
-
- /* if we've classified it or seen too many packets */
-- if(TOTAL_PACKETS > num_packets ||
-- master_conntrack->layer7.app_proto) {
-+ if(!info->pkt && (TOTAL_PACKETS > num_packets ||
-+ master_conntrack->layer7.app_proto)) {
-
- pattern_result = match_no_append(conntrack, master_conntrack, ctinfo, master_ctinfo, info);
-
-@@ -394,6 +395,23 @@
- comppattern = compile_and_cache(info->pattern, info->protocol);
- spin_unlock_bh(&list_lock);
-
-+ if (info->pkt) {
-+ tmp_data = kmalloc(maxdatalen, GFP_ATOMIC);
-+ if(!tmp_data){
-+ if (net_ratelimit())
-+ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
-+ return info->invert;
-+ }
-+
-+ tmp_data[0] = '\0';
-+ add_datastr(tmp_data, 0, app_data, appdatalen);
-+ pattern_result = ((comppattern && regexec(comppattern, tmp_data)) ? 1 : 0);
-+ kfree(tmp_data);
-+ tmp_data = NULL;
-+
-+ return (pattern_result ^ info->invert);
-+ }
-+
- /* On the first packet of a connection, allocate space for app data */
- write_lock(&ct_lock);
- if(TOTAL_PACKETS == 1 && !skb->cb[0] && !master_conntrack->layer7.app_data) {
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ipp2p.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ipp2p.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ipp2p.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ipp2p.h 2006-12-14 03:13:39.000000000 +0100
-@@ -0,0 +1,31 @@
-+#ifndef __IPT_IPP2P_H
-+#define __IPT_IPP2P_H
-+#define IPP2P_VERSION "0.8.1_rc1"
-+
-+struct ipt_p2p_info {
-+ int cmd;
-+ int debug;
-+};
-+
-+#endif //__IPT_IPP2P_H
-+
-+#define SHORT_HAND_IPP2P 1 /* --ipp2p switch*/
-+//#define SHORT_HAND_DATA 4 /* --ipp2p-data switch*/
-+#define SHORT_HAND_NONE 5 /* no short hand*/
-+
-+#define IPP2P_EDK (1 << 1)
-+#define IPP2P_DATA_KAZAA (1 << 2)
-+#define IPP2P_DATA_EDK (1 << 3)
-+#define IPP2P_DATA_DC (1 << 4)
-+#define IPP2P_DC (1 << 5)
-+#define IPP2P_DATA_GNU (1 << 6)
-+#define IPP2P_GNU (1 << 7)
-+#define IPP2P_KAZAA (1 << 8)
-+#define IPP2P_BIT (1 << 9)
-+#define IPP2P_APPLE (1 << 10)
-+#define IPP2P_SOUL (1 << 11)
-+#define IPP2P_WINMX (1 << 12)
-+#define IPP2P_ARES (1 << 13)
-+#define IPP2P_MUTE (1 << 14)
-+#define IPP2P_WASTE (1 << 15)
-+#define IPP2P_XDCC (1 << 16)
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_ipp2p.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_ipp2p.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_ipp2p.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_ipp2p.c 2006-12-14 03:13:39.000000000 +0100
-@@ -0,0 +1,881 @@
-+#if defined(MODVERSIONS)
-+#include <linux/modversions.h>
-+#endif
-+#include <linux/module.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/version.h>
-+#include <linux/netfilter_ipv4/ipt_ipp2p.h>
-+#include <net/tcp.h>
-+#include <net/udp.h>
-+
-+#define get_u8(X,O) (*(__u8 *)(X + O))
-+#define get_u16(X,O) (*(__u16 *)(X + O))
-+#define get_u32(X,O) (*(__u32 *)(X + O))
-+
-+MODULE_AUTHOR("Eicke Friedrich/Klaus Degner <ipp2p@ipp2p.org>");
-+MODULE_DESCRIPTION("An extension to iptables to identify P2P traffic.");
-+MODULE_LICENSE("GPL");
-+
-+
-+/*Search for UDP eDonkey/eMule/Kad commands*/
-+int
-+udp_search_edk (unsigned char *haystack, int packet_len)
-+{
-+ unsigned char *t = haystack;
-+ t += 8;
-+
-+ switch (t[0]) {
-+ case 0xe3:
-+ { /*edonkey*/
-+ switch (t[1])
-+ {
-+ /* client -> server status request */
-+ case 0x96:
-+ if (packet_len == 14) return ((IPP2P_EDK * 100) + 50);
-+ break;
-+ /* server -> client status request */
-+ case 0x97: if (packet_len == 42) return ((IPP2P_EDK * 100) + 51);
-+ break;
-+ /* server description request */
-+ /* e3 2a ff f0 .. | size == 6 */
-+ case 0xa2: if ( (packet_len == 14) && ( get_u16(t,2) == __constant_htons(0xfff0) ) ) return ((IPP2P_EDK * 100) + 52);
-+ break;
-+ /* server description response */
-+ /* e3 a3 ff f0 .. | size > 40 && size < 200 */
-+ //case 0xa3: return ((IPP2P_EDK * 100) + 53);
-+ // break;
-+ case 0x9a: if (packet_len==26) return ((IPP2P_EDK * 100) + 54);
-+ break;
-+
-+ case 0x92: if (packet_len==18) return ((IPP2P_EDK * 100) + 55);
-+ break;
-+ }
-+ break;
-+ }
-+ case 0xe4:
-+ {
-+ switch (t[1])
-+ {
-+ /* e4 20 .. | size == 43 */
-+ case 0x20: if ((packet_len == 43) && (t[2] != 0x00) && (t[34] != 0x00)) return ((IPP2P_EDK * 100) + 60);
-+ break;
-+ /* e4 00 .. 00 | size == 35 ? */
-+ case 0x00: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 61);
-+ break;
-+ /* e4 10 .. 00 | size == 35 ? */
-+ case 0x10: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 62);
-+ break;
-+ /* e4 18 .. 00 | size == 35 ? */
-+ case 0x18: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 63);
-+ break;
-+ /* e4 52 .. | size = 44 */
-+ case 0x52: if (packet_len == 44 ) return ((IPP2P_EDK * 100) + 64);
-+ break;
-+ /* e4 58 .. | size == 6 */
-+ case 0x58: if (packet_len == 14 ) return ((IPP2P_EDK * 100) + 65);
-+ break;
-+ /* e4 59 .. | size == 2 */
-+ case 0x59: if (packet_len == 10 )return ((IPP2P_EDK * 100) + 66);
-+ break;
-+ /* e4 28 .. | packet_len == 52,77,102,127... */
-+ case 0x28: if (((packet_len-52) % 25) == 0) return ((IPP2P_EDK * 100) + 67);
-+ break;
-+ /* e4 50 xx xx | size == 4 */
-+ case 0x50: if (packet_len == 12) return ((IPP2P_EDK * 100) + 68);
-+ break;
-+ /* e4 40 xx xx | size == 48 */
-+ case 0x40: if (packet_len == 56) return ((IPP2P_EDK * 100) + 69);
-+ break;
-+ }
-+ break;
-+ }
-+ } /* end of switch (t[0]) */
-+ return 0;
-+}/*udp_search_edk*/
-+
-+
-+/*Search for UDP Gnutella commands*/
-+int
-+udp_search_gnu (unsigned char *haystack, int packet_len)
-+{
-+ unsigned char *t = haystack;
-+ t += 8;
-+
-+ if (memcmp(t, "GND", 3) == 0) return ((IPP2P_GNU * 100) + 51);
-+ if (memcmp(t, "GNUTELLA ", 9) == 0) return ((IPP2P_GNU * 100) + 52);
-+ return 0;
-+}/*udp_search_gnu*/
-+
-+
-+/*Search for UDP KaZaA commands*/
-+int
-+udp_search_kazaa (unsigned char *haystack, int packet_len)
-+{
-+ unsigned char *t = haystack;
-+
-+ if (t[packet_len-1] == 0x00){
-+ t += (packet_len - 6);
-+ if (memcmp(t, "KaZaA", 5) == 0) return (IPP2P_KAZAA * 100 +50);
-+ }
-+
-+ return 0;
-+}/*udp_search_kazaa*/
-+
-+/*Search for UDP DirectConnect commands*/
-+int
-+udp_search_directconnect (unsigned char *haystack, int packet_len)
-+{
-+ unsigned char *t = haystack;
-+ if ((*(t + 8) == 0x24) && (*(t + packet_len - 1) == 0x7c)) {
-+ t+=8;
-+ if (memcmp(t, "SR ", 3) == 0) return ((IPP2P_DC * 100) + 60);
-+ if (memcmp(t, "Ping ", 5) == 0) return ((IPP2P_DC * 100) + 61);
-+ }
-+ return 0;
-+}/*udp_search_directconnect*/
-+
-+
-+
-+/*Search for UDP BitTorrent commands*/
-+int
-+udp_search_bit (unsigned char *haystack, int packet_len)
-+{
-+ switch(packet_len)
-+ {
-+ case 24:
-+ /* ^ 00 00 04 17 27 10 19 80 */
-+ if ((ntohl(get_u32(haystack, 8)) == 0x00000417) && (ntohl(get_u32(haystack, 12)) == 0x27101980))
-+ return (IPP2P_BIT * 100 + 50);
-+ break;
-+ case 44:
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
-+ return (IPP2P_BIT * 100 + 51);
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400))
-+ return (IPP2P_BIT * 100 + 61);
-+ break;
-+ case 65:
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
-+ return (IPP2P_BIT * 100 + 52);
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404))
-+ return (IPP2P_BIT * 100 + 62);
-+ break;
-+ case 67:
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
-+ return (IPP2P_BIT * 100 + 53);
-+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406))
-+ return (IPP2P_BIT * 100 + 63);
-+ break;
-+ case 211:
-+ if (get_u32(haystack, 8) == __constant_htonl(0x00000405))
-+ return (IPP2P_BIT * 100 + 54);
-+ break;
-+ case 29:
-+ if ((get_u32(haystack, 8) == __constant_htonl(0x00000401)))
-+ return (IPP2P_BIT * 100 + 55);
-+ break;
-+ case 52:
-+ if (get_u32(haystack,8) == __constant_htonl(0x00000827) &&
-+ get_u32(haystack,12) == __constant_htonl(0x37502950))
-+ return (IPP2P_BIT * 100 + 80);
-+ break;
-+ default:
-+ /* this packet does not have a constant size */
-+ if (packet_len >= 40 && get_u32(haystack, 16) == __constant_htonl(0x00000402) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
-+ return (IPP2P_BIT * 100 + 56);
-+ break;
-+ }
-+
-+ /* some extra-bitcomet rules:
-+ * "d1:" [a|r] "d2:id20:"
-+ */
-+ if (packet_len > 30 && get_u8(haystack, 8) == 'd' && get_u8(haystack, 9) == '1' && get_u8(haystack, 10) == ':' )
-+ {
-+ if (get_u8(haystack, 11) == 'a' || get_u8(haystack, 11) == 'r')
-+ {
-+ if (memcmp(haystack+12,"d2:id20:",8)==0)
-+ return (IPP2P_BIT * 100 + 57);
-+ }
-+ }
-+
-+#if 0
-+ /* bitlord rules */
-+ /* packetlen must be bigger than 40 */
-+ /* first 4 bytes are zero */
-+ if (packet_len > 40 && get_u32(haystack, 8) == 0x00000000)
-+ {
-+ /* first rule: 00 00 00 00 01 00 00 xx xx xx xx 00 00 00 00*/
-+ if (get_u32(haystack, 12) == 0x00000000 &&
-+ get_u32(haystack, 16) == 0x00010000 &&
-+ get_u32(haystack, 24) == 0x00000000 )
-+ return (IPP2P_BIT * 100 + 71);
-+
-+ /* 00 01 00 00 0d 00 00 xx xx xx xx 00 00 00 00*/
-+ if (get_u32(haystack, 12) == 0x00000001 &&
-+ get_u32(haystack, 16) == 0x000d0000 &&
-+ get_u32(haystack, 24) == 0x00000000 )
-+ return (IPP2P_BIT * 100 + 71);
-+
-+
-+ }
-+#endif
-+
-+ return 0;
-+}/*udp_search_bit*/
-+
-+
-+
-+/*Search for Ares commands*/
-+//#define IPP2P_DEBUG_ARES
-+int
-+search_ares (const unsigned char *payload, const u16 plen)
-+//int search_ares (unsigned char *haystack, int packet_len, int head_len)
-+{
-+// const unsigned char *t = haystack + head_len;
-+
-+ /* all ares packets start with */
-+ if (payload[1] == 0 && (plen - payload[0]) == 3)
-+ {
-+ switch (payload[2])
-+ {
-+ case 0x5a:
-+ /* ares connect */
-+ if ( plen == 6 && payload[5] == 0x05 ) return ((IPP2P_ARES * 100) + 1);
-+ break;
-+ case 0x09:
-+ /* ares search, min 3 chars --> 14 bytes
-+ * lets define a search can be up to 30 chars --> max 34 bytes
-+ */
-+ if ( plen >= 14 && plen <= 34 ) return ((IPP2P_ARES * 100) + 1);
-+ break;
-+#ifdef IPP2P_DEBUG_ARES
-+ default:
-+ printk(KERN_DEBUG "Unknown Ares command %x recognized, len: %u \n", (unsigned int) payload[2],plen);
-+#endif /* IPP2P_DEBUG_ARES */
-+ }
-+ }
-+
-+#if 0
-+ /* found connect packet: 03 00 5a 04 03 05 */
-+ /* new version ares 1.8: 03 00 5a xx xx 05 */
-+ if ((plen) == 6){ /* possible connect command*/
-+ if ((payload[0] == 0x03) && (payload[1] == 0x00) && (payload[2] == 0x5a) && (payload[5] == 0x05))
-+ return ((IPP2P_ARES * 100) + 1);
-+ }
-+ if ((plen) == 60){ /* possible download command*/
-+ if ((payload[59] == 0x0a) && (payload[58] == 0x0a)){
-+ if (memcmp(t, "PUSH SHA1:", 10) == 0) /* found download command */
-+ return ((IPP2P_ARES * 100) + 2);
-+ }
-+ }
-+#endif
-+
-+ return 0;
-+} /*search_ares*/
-+
-+/*Search for SoulSeek commands*/
-+int
-+search_soul (const unsigned char *payload, const u16 plen)
-+{
-+//#define IPP2P_DEBUG_SOUL
-+ /* match: xx xx xx xx | xx = sizeof(payload) - 4 */
-+ if (get_u32(payload, 0) == (plen - 4)){
-+ const __u32 m=get_u32(payload, 4);
-+ /* match 00 yy yy 00, yy can be everything */
-+ if ( get_u8(payload, 4) == 0x00 && get_u8(payload, 7) == 0x00 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "0: Soulseek command 0x%x recognized\n",get_u32(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 1);
-+ }
-+
-+ /* next match: 01 yy 00 00 | yy can be everything */
-+ if ( get_u8(payload, 4) == 0x01 && get_u16(payload, 6) == 0x0000 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "1: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 2);
-+ }
-+
-+ /* other soulseek commandos are: 1-5,7,9,13-18,22,23,26,28,35-37,40-46,50,51,60,62-69,91,92,1001 */
-+ /* try to do this in an intelligent way */
-+ /* get all small commandos */
-+ switch(m)
-+ {
-+ case 7:
-+ case 9:
-+ case 22:
-+ case 23:
-+ case 26:
-+ case 28:
-+ case 50:
-+ case 51:
-+ case 60:
-+ case 91:
-+ case 92:
-+ case 1001:
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "2: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 3);
-+ }
-+
-+ if (m > 0 && m < 6 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "3: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 4);
-+ }
-+ if (m > 12 && m < 19 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "4: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 5);
-+ }
-+
-+ if (m > 34 && m < 38 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "5: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 6);
-+ }
-+
-+ if (m > 39 && m < 47 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "6: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 7);
-+ }
-+
-+ if (m > 61 && m < 70 )
-+ {
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "7: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 8);
-+ }
-+
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "unknown SOULSEEK command: 0x%x, first 16 bit: 0x%x, first 8 bit: 0x%x ,soulseek ???\n",get_u32(payload, 4),get_u16(payload, 4) >> 16,get_u8(payload, 4) >> 24);
-+#endif /* IPP2P_DEBUG_SOUL */
-+ }
-+
-+ /* match 14 00 00 00 01 yy 00 00 00 STRING(YY) 01 00 00 00 00 46|50 00 00 00 00 */
-+ /* without size at the beginning !!! */
-+ if ( get_u32(payload, 0) == 0x14 && get_u8(payload, 4) == 0x01 )
-+ {
-+ __u32 y=get_u32(payload, 5);
-+ /* we need 19 chars + string */
-+ if ( (y + 19) <= (plen) )
-+ {
-+ const unsigned char *w=payload+9+y;
-+ if (get_u32(w, 0) == 0x01 && ( get_u16(w, 4) == 0x4600 || get_u16(w, 4) == 0x5000) && get_u32(w, 6) == 0x00);
-+#ifdef IPP2P_DEBUG_SOUL
-+ printk(KERN_DEBUG "Soulssek special client command recognized\n");
-+#endif /* IPP2P_DEBUG_SOUL */
-+ return ((IPP2P_SOUL * 100) + 9);
-+ }
-+ }
-+ return 0;
-+}
-+
-+
-+/*Search for WinMX commands*/
-+int
-+search_winmx (const unsigned char *payload, const u16 plen)
-+{
-+//#define IPP2P_DEBUG_WINMX
-+ if (((plen) == 4) && (memcmp(payload, "SEND", 4) == 0)) return ((IPP2P_WINMX * 100) + 1);
-+ if (((plen) == 3) && (memcmp(payload, "GET", 3) == 0)) return ((IPP2P_WINMX * 100) + 2);
-+ //if (packet_len < (head_len + 10)) return 0;
-+ if (plen < 10) return 0;
-+
-+ if ((memcmp(payload, "SEND", 4) == 0) || (memcmp(payload, "GET", 3) == 0)){
-+ u16 c=4;
-+ const u16 end=plen-2;
-+ u8 count=0;
-+ while (c < end)
-+ {
-+ if (payload[c]== 0x20 && payload[c+1] == 0x22)
-+ {
-+ c++;
-+ count++;
-+ if (count>=2) return ((IPP2P_WINMX * 100) + 3);
-+ }
-+ c++;
-+ }
-+ }
-+
-+ if ( plen == 149 && payload[0] == '8' )
-+ {
-+#ifdef IPP2P_DEBUG_WINMX
-+ printk(KERN_INFO "maybe WinMX\n");
-+#endif
-+ if (get_u32(payload,17) == 0 && get_u32(payload,21) == 0 && get_u32(payload,25) == 0 &&
-+// get_u32(payload,33) == __constant_htonl(0x71182b1a) && get_u32(payload,37) == __constant_htonl(0x05050000) &&
-+// get_u32(payload,133) == __constant_htonl(0x31097edf) && get_u32(payload,145) == __constant_htonl(0xdcb8f792))
-+ get_u16(payload,39) == 0 && get_u16(payload,135) == __constant_htons(0x7edf) && get_u16(payload,147) == __constant_htons(0xf792))
-+
-+ {
-+#ifdef IPP2P_DEBUG_WINMX
-+ printk(KERN_INFO "got WinMX\n");
-+#endif
-+ return ((IPP2P_WINMX * 100) + 4);
-+ }
-+ }
-+ return 0;
-+} /*search_winmx*/
-+
-+
-+/*Search for appleJuice commands*/
-+int
-+search_apple (const unsigned char *payload, const u16 plen)
-+{
-+ if ( (plen > 7) && (payload[6] == 0x0d) && (payload[7] == 0x0a) && (memcmp(payload, "ajprot", 6) == 0)) return (IPP2P_APPLE * 100);
-+
-+ return 0;
-+}
-+
-+
-+/*Search for BitTorrent commands*/
-+int
-+search_bittorrent (const unsigned char *payload, const u16 plen)
-+{
-+ if (plen > 20)
-+ {
-+ /* test for match 0x13+"BitTorrent protocol" */
-+ if (payload[0] == 0x13)
-+ {
-+ if (memcmp(payload+1, "BitTorrent protocol", 19) == 0) return (IPP2P_BIT * 100);
-+ }
-+
-+ /* get tracker commandos, all starts with GET /
-+ * then it can follow: scrape| announce
-+ * and then ?hash_info=
-+ */
-+ if (memcmp(payload,"GET /",5) == 0)
-+ {
-+ /* message scrape */
-+ if ( memcmp(payload+5,"scrape?info_hash=",17)==0 ) return (IPP2P_BIT * 100 + 1);
-+ /* message announce */
-+ if ( memcmp(payload+5,"announce?info_hash=",19)==0 ) return (IPP2P_BIT * 100 + 2);
-+ }
-+ }
-+ else
-+ {
-+ /* bitcomet encryptes the first packet, so we have to detect another
-+ * one later in the flow */
-+ /* first try failed, too many missdetections */
-+ //if ( size == 5 && get_u32(t,0) == __constant_htonl(1) && t[4] < 3) return (IPP2P_BIT * 100 + 3);
-+
-+ /* second try: block request packets */
-+ if ( plen == 17 && get_u32(payload,0) == __constant_htonl(0x0d) && payload[4] == 0x06 && get_u32(payload,13) == __constant_htonl(0x4000) ) return (IPP2P_BIT * 100 + 3);
-+ }
-+
-+ return 0;
-+}
-+
-+
-+
-+/*check for Kazaa get command*/
-+int
-+search_kazaa (const unsigned char *payload, const u16 plen)
-+
-+{
-+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a) && memcmp(payload, "GET /.hash=", 11) == 0)
-+ return (IPP2P_DATA_KAZAA * 100);
-+
-+ return 0;
-+}
-+
-+
-+/*check for gnutella get command*/
-+int
-+search_gnu (const unsigned char *payload, const u16 plen)
-+{
-+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
-+ {
-+ if (memcmp(payload, "GET /get/", 9) == 0) return ((IPP2P_DATA_GNU * 100) + 1);
-+ if (memcmp(payload, "GET /uri-res/", 13) == 0) return ((IPP2P_DATA_GNU * 100) + 2);
-+ }
-+ return 0;
-+}
-+
-+
-+/*check for gnutella get commands and other typical data*/
-+int
-+search_all_gnu (const unsigned char *payload, const u16 plen)
-+{
-+
-+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
-+ {
-+
-+ if (memcmp(payload, "GNUTELLA CONNECT/", 17) == 0) return ((IPP2P_GNU * 100) + 1);
-+ if (memcmp(payload, "GNUTELLA/", 9) == 0) return ((IPP2P_GNU * 100) + 2);
-+
-+
-+ if ((memcmp(payload, "GET /get/", 9) == 0) || (memcmp(payload, "GET /uri-res/", 13) == 0))
-+ {
-+ u16 c=8;
-+ const u16 end=plen-22;
-+ while (c < end) {
-+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Gnutella-", 11) == 0) || (memcmp(&payload[c+2], "X-Queue:", 8) == 0)))
-+ return ((IPP2P_GNU * 100) + 3);
-+ c++;
-+ }
-+ }
-+ }
-+ return 0;
-+}
-+
-+
-+/*check for KaZaA download commands and other typical data*/
-+int
-+search_all_kazaa (const unsigned char *payload, const u16 plen)
-+{
-+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
-+ {
-+
-+ if (memcmp(payload, "GIVE ", 5) == 0) return ((IPP2P_KAZAA * 100) + 1);
-+
-+ if (memcmp(payload, "GET /", 5) == 0) {
-+ u16 c = 8;
-+ const u16 end=plen-22;
-+ while (c < end) {
-+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Kazaa-Username: ", 18) == 0) || (memcmp(&payload[c+2], "User-Agent: PeerEnabler/", 24) == 0)))
-+ return ((IPP2P_KAZAA * 100) + 2);
-+ c++;
-+ }
-+ }
-+ }
-+ return 0;
-+}
-+
-+/*fast check for edonkey file segment transfer command*/
-+int
-+search_edk (const unsigned char *payload, const u16 plen)
-+{
-+ if (payload[0] != 0xe3)
-+ return 0;
-+ else {
-+ if (payload[5] == 0x47)
-+ return (IPP2P_DATA_EDK * 100);
-+ else
-+ return 0;
-+ }
-+}
-+
-+
-+
-+/*intensive but slower search for some edonkey packets including size-check*/
-+int
-+search_all_edk (const unsigned char *payload, const u16 plen)
-+{
-+ if (payload[0] != 0xe3)
-+ return 0;
-+ else {
-+ //t += head_len;
-+ const u16 cmd = get_u16(payload, 1);
-+ if (cmd == (plen - 5)) {
-+ switch (payload[5]) {
-+ case 0x01: return ((IPP2P_EDK * 100) + 1); /*Client: hello or Server:hello*/
-+ case 0x4c: return ((IPP2P_EDK * 100) + 9); /*Client: Hello-Answer*/
-+ }
-+ }
-+ return 0;
-+ }
-+}
-+
-+
-+/*fast check for Direct Connect send command*/
-+int
-+search_dc (const unsigned char *payload, const u16 plen)
-+{
-+
-+ if (payload[0] != 0x24 )
-+ return 0;
-+ else {
-+ if (memcmp(&payload[1], "Send|", 5) == 0)
-+ return (IPP2P_DATA_DC * 100);
-+ else
-+ return 0;
-+ }
-+
-+}
-+
-+
-+/*intensive but slower check for all direct connect packets*/
-+int
-+search_all_dc (const unsigned char *payload, const u16 plen)
-+{
-+// unsigned char *t = haystack;
-+
-+ if (payload[0] == 0x24 && payload[plen-1] == 0x7c)
-+ {
-+ const unsigned char *t=&payload[1];
-+ /* Client-Hub-Protocol */
-+ if (memcmp(t, "Lock ", 5) == 0) return ((IPP2P_DC * 100) + 1);
-+ /* Client-Client-Protocol, some are already recognized by client-hub (like lock) */
-+ if (memcmp(t, "MyNick ", 7) == 0) return ((IPP2P_DC * 100) + 38);
-+ }
-+ return 0;
-+}
-+
-+/*check for mute*/
-+int
-+search_mute (const unsigned char *payload, const u16 plen)
-+{
-+ if ( plen == 209 || plen == 345 || plen == 473 || plen == 609 || plen == 1121 )
-+ {
-+ //printk(KERN_DEBUG "size hit: %u",size);
-+ if (memcmp(payload,"PublicKey: ",11) == 0 )
-+ {
-+ return ((IPP2P_MUTE * 100) + 0);
-+
-+/* if (memcmp(t+size-14,"\x0aEndPublicKey\x0a",14) == 0)
-+ {
-+ printk(KERN_DEBUG "end pubic key hit: %u",size);
-+
-+ }*/
-+ }
-+ }
-+ return 0;
-+}
-+
-+
-+/* check for xdcc */
-+int
-+search_xdcc (const unsigned char *payload, const u16 plen)
-+{
-+ /* search in small packets only */
-+ if (plen > 20 && plen < 200 && payload[plen-1] == 0x0a && payload[plen-2] == 0x0d && memcmp(payload,"PRIVMSG ",8) == 0)
-+ {
-+
-+ u16 x=10;
-+ const u16 end=plen - 13;
-+
-+ /* is seems to be a irc private massage, chedck for xdcc command */
-+ while (x < end)
-+ {
-+ if (payload[x] == ':')
-+ {
-+ if ( memcmp(&payload[x+1],"xdcc send #",11) == 0 )
-+ return ((IPP2P_XDCC * 100) + 0);
-+ }
-+ x++;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/* search for waste */
-+int search_waste(const unsigned char *payload, const u16 plen)
-+{
-+ if ( plen >= 8 && memcmp(payload,"GET.sha1:",9) == 0)
-+ return ((IPP2P_WASTE * 100) + 0);
-+
-+ return 0;
-+}
-+
-+
-+static struct {
-+ int command;
-+ __u8 short_hand; /*for fucntions included in short hands*/
-+ int packet_len;
-+ int (*function_name) (const unsigned char *, const u16);
-+} matchlist[] = {
-+ {IPP2P_EDK,SHORT_HAND_IPP2P,20, &search_all_edk},
-+// {IPP2P_DATA_KAZAA,SHORT_HAND_DATA,200, &search_kazaa},
-+// {IPP2P_DATA_EDK,SHORT_HAND_DATA,60, &search_edk},
-+// {IPP2P_DATA_DC,SHORT_HAND_DATA,26, &search_dc},
-+ {IPP2P_DC,SHORT_HAND_IPP2P,5, search_all_dc},
-+// {IPP2P_DATA_GNU,SHORT_HAND_DATA,40, &search_gnu},
-+ {IPP2P_GNU,SHORT_HAND_IPP2P,5, &search_all_gnu},
-+ {IPP2P_KAZAA,SHORT_HAND_IPP2P,5, &search_all_kazaa},
-+ {IPP2P_BIT,SHORT_HAND_IPP2P,20, &search_bittorrent},
-+ {IPP2P_APPLE,SHORT_HAND_IPP2P,5, &search_apple},
-+ {IPP2P_SOUL,SHORT_HAND_IPP2P,5, &search_soul},
-+ {IPP2P_WINMX,SHORT_HAND_IPP2P,2, &search_winmx},
-+ {IPP2P_ARES,SHORT_HAND_IPP2P,5, &search_ares},
-+ {IPP2P_MUTE,SHORT_HAND_NONE,200, &search_mute},
-+ {IPP2P_WASTE,SHORT_HAND_NONE,5, &search_waste},
-+ {IPP2P_XDCC,SHORT_HAND_NONE,5, &search_xdcc},
-+ {0,0,0,NULL}
-+};
-+
-+
-+static struct {
-+ int command;
-+ __u8 short_hand; /*for fucntions included in short hands*/
-+ int packet_len;
-+ int (*function_name) (unsigned char *, int);
-+} udp_list[] = {
-+ {IPP2P_KAZAA,SHORT_HAND_IPP2P,14, &udp_search_kazaa},
-+ {IPP2P_BIT,SHORT_HAND_IPP2P,23, &udp_search_bit},
-+ {IPP2P_GNU,SHORT_HAND_IPP2P,11, &udp_search_gnu},
-+ {IPP2P_EDK,SHORT_HAND_IPP2P,9, &udp_search_edk},
-+ {IPP2P_DC,SHORT_HAND_IPP2P,12, &udp_search_directconnect},
-+ {0,0,0,NULL}
-+};
-+
-+
-+static int
-+match(const struct sk_buff *skb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ const struct xt_match *match,
-+#endif
-+ const void *matchinfo,
-+ int offset,
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ unsigned int protoff,
-+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ const void *hdr,
-+ u_int16_t datalen,
-+#endif
-+ int *hotdrop)
-+{
-+ const struct ipt_p2p_info *info = matchinfo;
-+ unsigned char *haystack;
-+ struct iphdr *ip = skb->nh.iph;
-+ int p2p_result = 0, i = 0;
-+// int head_len;
-+ int hlen = ntohs(ip->tot_len)-(ip->ihl*4); /*hlen = packet-data length*/
-+
-+ /*must not be a fragment*/
-+ if (offset) {
-+ if (info->debug) printk("IPP2P.match: offset found %i \n",offset);
-+ return 0;
-+ }
-+
-+ /*make sure that skb is linear*/
-+ if(skb_is_nonlinear(skb)){
-+ if (info->debug) printk("IPP2P.match: nonlinear skb found\n");
-+ return 0;
-+ }
-+
-+
-+ haystack=(char *)ip+(ip->ihl*4); /*haystack = packet data*/
-+
-+ switch (ip->protocol){
-+ case IPPROTO_TCP: /*what to do with a TCP packet*/
-+ {
-+ struct tcphdr *tcph = (void *) ip + ip->ihl * 4;
-+
-+ if (tcph->fin) return 0; /*if FIN bit is set bail out*/
-+ if (tcph->syn) return 0; /*if SYN bit is set bail out*/
-+ if (tcph->rst) return 0; /*if RST bit is set bail out*/
-+
-+ haystack += tcph->doff * 4; /*get TCP-Header-Size*/
-+ hlen -= tcph->doff * 4;
-+ while (matchlist[i].command) {
-+ if ((((info->cmd & matchlist[i].command) == matchlist[i].command) ||
-+ ((info->cmd & matchlist[i].short_hand) == matchlist[i].short_hand)) &&
-+ (hlen > matchlist[i].packet_len)) {
-+ p2p_result = matchlist[i].function_name(haystack, hlen);
-+ if (p2p_result)
-+ {
-+ if (info->debug) printk("IPP2P.debug:TCP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n",
-+ p2p_result, NIPQUAD(ip->saddr),ntohs(tcph->source), NIPQUAD(ip->daddr),ntohs(tcph->dest),hlen);
-+ return p2p_result;
-+ }
-+ }
-+ i++;
-+ }
-+ return p2p_result;
-+ }
-+
-+ case IPPROTO_UDP: /*what to do with an UDP packet*/
-+ {
-+ struct udphdr *udph = (void *) ip + ip->ihl * 4;
-+
-+ while (udp_list[i].command){
-+ if ((((info->cmd & udp_list[i].command) == udp_list[i].command) ||
-+ ((info->cmd & udp_list[i].short_hand) == udp_list[i].short_hand)) &&
-+ (hlen > udp_list[i].packet_len)) {
-+ p2p_result = udp_list[i].function_name(haystack, hlen);
-+ if (p2p_result){
-+ if (info->debug) printk("IPP2P.debug:UDP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n",
-+ p2p_result, NIPQUAD(ip->saddr),ntohs(udph->source), NIPQUAD(ip->daddr),ntohs(udph->dest),hlen);
-+ return p2p_result;
-+ }
-+ }
-+ i++;
-+ }
-+ return p2p_result;
-+ }
-+
-+ default: return 0;
-+ }
-+}
-+
-+
-+
-+static int
-+checkentry(const char *tablename,
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ const void *ip,
-+ const struct xt_match *match,
-+#else
-+ const struct ipt_ip *ip,
-+#endif
-+ void *matchinfo,
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-+ unsigned int matchsize,
-+#endif
-+ unsigned int hook_mask)
-+{
-+ /* Must specify -p tcp */
-+/* if (ip->proto != IPPROTO_TCP || (ip->invflags & IPT_INV_PROTO)) {
-+ * printk("ipp2p: Only works on TCP packets, use -p tcp\n");
-+ * return 0;
-+ * }*/
-+ return 1;
-+}
-+
-+
-+
-+
-+static struct ipt_match ipp2p_match = {
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ { NULL, NULL },
-+ "ipp2p",
-+ &match,
-+ &checkentry,
-+ NULL,
-+ THIS_MODULE
-+#endif
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ .name = "ipp2p",
-+ .match = &match,
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ .matchsize = sizeof(struct ipt_p2p_info),
-+#endif
-+ .checkentry = &checkentry,
-+ .me = THIS_MODULE,
-+#endif
-+};
-+
-+
-+static int __init init(void)
-+{
-+ printk(KERN_INFO "IPP2P v%s loading\n", IPP2P_VERSION);
-+ return ipt_register_match(&ipp2p_match);
-+}
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_match(&ipp2p_match);
-+ printk(KERN_INFO "IPP2P v%s unloaded\n", IPP2P_VERSION);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-+
-+
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
---- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:39.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:39.000000000 +0100
-@@ -248,6 +248,12 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP_NF_MATCH_IPP2P
-+ tristate "IPP2P"
-+ depends on IP_NF_IPTABLES
-+ help
-+ Module for matching traffic of various Peer-to-Peer applications
-+
- config IP_NF_MATCH_TOS
- tristate "TOS match support"
- depends on IP_NF_IPTABLES
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
---- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:39.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:39.000000000 +0100
-@@ -62,7 +62,7 @@
- obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o
- obj-$(CONFIG_IP_NF_MATCH_TTL) += ipt_ttl.o
- obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o
--
-+obj-$(CONFIG_IP_NF_MATCH_IPP2P) += ipt_ipp2p.o
- obj-$(CONFIG_IP_NF_MATCH_LAYER7) += ipt_layer7.o
-
- # targets
+++ /dev/null
-diff -urN linux-2.6.19.old/include/net/xfrmudp.h linux-2.6.19.dev/include/net/xfrmudp.h
---- linux-2.6.19.old/include/net/xfrmudp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/net/xfrmudp.h 2006-12-14 03:13:41.000000000 +0100
-@@ -0,0 +1,10 @@
-+/*
-+ * pointer to function for type that xfrm4_input wants, to permit
-+ * decoupling of XFRM from udp.c
-+ */
-+#define HAVE_XFRM4_UDP_REGISTER
-+
-+typedef int (*xfrm4_rcv_encap_t)(struct sk_buff *skb, __u16 encap_type);
-+extern int udp4_register_esp_rcvencap(xfrm4_rcv_encap_t func
-+ , xfrm4_rcv_encap_t *oldfunc);
-+extern int udp4_unregister_esp_rcvencap(xfrm4_rcv_encap_t func);
-diff -urN linux-2.6.19.old/net/ipv4/Kconfig linux-2.6.19.dev/net/ipv4/Kconfig
---- linux-2.6.19.old/net/ipv4/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/Kconfig 2006-12-14 03:13:41.000000000 +0100
-@@ -273,6 +273,12 @@
- Network), but can be distributed all over the Internet. If you want
- to do that, say Y here and to "IP multicast routing" below.
-
-+config IPSEC_NAT_TRAVERSAL
-+ bool "IPSEC NAT-Traversal (KLIPS compatible)"
-+ depends on INET
-+ ---help---
-+ Includes support for RFC3947/RFC3948 NAT-Traversal of ESP over UDP.
-+
- config IP_MROUTE
- bool "IP: multicast routing"
- depends on IP_MULTICAST
-diff -urN linux-2.6.19.old/net/ipv4/udp.c linux-2.6.19.dev/net/ipv4/udp.c
---- linux-2.6.19.old/net/ipv4/udp.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/udp.c 2006-12-14 03:13:41.000000000 +0100
-@@ -108,11 +108,14 @@
- #include <net/inet_common.h>
- #include <net/checksum.h>
- #include <net/xfrm.h>
-+#include <net/xfrmudp.h>
-
- /*
- * Snmp MIB for the UDP layer
- */
-
-+static xfrm4_rcv_encap_t xfrm4_rcv_encap_func;
-+
- DEFINE_SNMP_STAT(struct udp_mib, udp_statistics) __read_mostly;
-
- struct hlist_head udp_hash[UDP_HTABLE_SIZE];
-@@ -917,6 +920,42 @@
- sk_common_release(sk);
- }
-
-+#if defined(CONFIG_XFRM) || defined(CONFIG_IPSEC_NAT_TRAVERSAL)
-+
-+/* if XFRM isn't a module, then register it directly. */
-+#if 0 && !defined(CONFIG_XFRM_MODULE) && !defined(CONFIG_IPSEC_NAT_TRAVERSAL)
-+static xfrm4_rcv_encap_t xfrm4_rcv_encap_func = xfrm4_rcv_encap;
-+#else
-+static xfrm4_rcv_encap_t xfrm4_rcv_encap_func = NULL;
-+#endif
-+
-+int udp4_register_esp_rcvencap(xfrm4_rcv_encap_t func
-+ , xfrm4_rcv_encap_t *oldfunc)
-+{
-+ if(oldfunc != NULL) {
-+ *oldfunc = xfrm4_rcv_encap_func;
-+ }
-+
-+#if 0
-+ if(xfrm4_rcv_encap_func != NULL)
-+ return -1;
-+#endif
-+
-+ xfrm4_rcv_encap_func = func;
-+ return 0;
-+}
-+
-+int udp4_unregister_esp_rcvencap(xfrm4_rcv_encap_t func)
-+{
-+ if(xfrm4_rcv_encap_func != func)
-+ return -1;
-+
-+ xfrm4_rcv_encap_func = NULL;
-+ return 0;
-+}
-+#endif /* CONFIG_XFRM_MODULE || CONFIG_IPSEC_NAT_TRAVERSAL */
-+
-+
- /* return:
- * 1 if the the UDP system should process it
- * 0 if we should drop this packet
-@@ -924,9 +963,9 @@
- */
- static int udp_encap_rcv(struct sock * sk, struct sk_buff *skb)
- {
--#ifndef CONFIG_XFRM
-+#if !defined(CONFIG_XFRM) && !defined(CONFIG_IPSEC_NAT_TRAVERSAL)
- return 1;
--#else
-+#else /* either CONFIG_XFRM or CONFIG_IPSEC_NAT_TRAVERSAL */
- struct udp_sock *up = udp_sk(sk);
- struct udphdr *uh;
- struct iphdr *iph;
-@@ -939,11 +978,11 @@
- /* if we're overly short, let UDP handle it */
- len = skb->len - sizeof(struct udphdr);
- if (len <= 0)
-- return 1;
-+ return 2;
-
- /* if this is not encapsulated socket, then just return now */
- if (!encap_type)
-- return 1;
-+ return 3;
-
- /* If this is a paged skb, make sure we pull up
- * whatever data we need to look at. */
-@@ -966,7 +1005,7 @@
- len = sizeof(struct udphdr);
- } else
- /* Must be an IKE packet.. pass it through */
-- return 1;
-+ return 4;
- break;
- case UDP_ENCAP_ESPINUDP_NON_IKE:
- /* Check if this is a keepalive packet. If so, eat it. */
-@@ -979,7 +1018,7 @@
- len = sizeof(struct udphdr) + 2 * sizeof(u32);
- } else
- /* Must be an IKE packet.. pass it through */
-- return 1;
-+ return 5;
- break;
- }
-
-@@ -990,6 +1029,8 @@
- */
- if (skb_cloned(skb) && pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
- return 0;
-+ if (skb_cloned(skb) && pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
-+ return 0;
-
- /* Now we can update and verify the packet length... */
- iph = skb->nh.iph;
-@@ -1055,9 +1096,13 @@
- return 0;
- }
- if (ret < 0) {
-- /* process the ESP packet */
-- ret = xfrm4_rcv_encap(skb, up->encap_type);
-- UDP_INC_STATS_BH(UDP_MIB_INDATAGRAMS);
-+ if(xfrm4_rcv_encap_func != NULL) {
-+ ret = (*xfrm4_rcv_encap_func)(skb, up->encap_type);
-+ UDP_INC_STATS_BH(UDP_MIB_INDATAGRAMS);
-+ } else {
-+ UDP_INC_STATS_BH(UDP_MIB_INERRORS);
-+ ret = 1;
-+ }
- return -ret;
- }
- /* FALLTHROUGH -- it's a UDP Packet */
-@@ -1639,3 +1684,9 @@
- EXPORT_SYMBOL(udp_proc_register);
- EXPORT_SYMBOL(udp_proc_unregister);
- #endif
-+
-+#if defined(CONFIG_IPSEC_NAT_TRAVERSAL)
-+EXPORT_SYMBOL(udp4_register_esp_rcvencap);
-+EXPORT_SYMBOL(udp4_unregister_esp_rcvencap);
-+#endif
-+
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,489 @@
-+#ifndef _IP_SET_H
-+#define _IP_SET_H
-+
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Martin Josefsson <gandalf@wlug.westbo.se>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/*
-+ * A sockopt of such quality has hardly ever been seen before on the open
-+ * market! This little beauty, hardly ever used: above 64, so it's
-+ * traditionally used for firewalling, not touched (even once!) by the
-+ * 2.0, 2.2 and 2.4 kernels!
-+ *
-+ * Comes with its own certificate of authenticity, valid anywhere in the
-+ * Free world!
-+ *
-+ * Rusty, 19.4.2000
-+ */
-+#define SO_IP_SET 83
-+
-+/*
-+ * Heavily modify by Joakim Axelsson 08.03.2002
-+ * - Made it more modulebased
-+ *
-+ * Additional heavy modifications by Jozsef Kadlecsik 22.02.2004
-+ * - bindings added
-+ * - in order to "deal with" backward compatibility, renamed to ipset
-+ */
-+
-+/*
-+ * Used so that the kernel module and ipset-binary can match their versions
-+ */
-+#define IP_SET_PROTOCOL_VERSION 2
-+
-+#define IP_SET_MAXNAMELEN 32 /* set names and set typenames */
-+
-+/* Lets work with our own typedef for representing an IP address.
-+ * We hope to make the code more portable, possibly to IPv6...
-+ *
-+ * The representation works in HOST byte order, because most set types
-+ * will perform arithmetic operations and compare operations.
-+ *
-+ * For now the type is an uint32_t.
-+ *
-+ * Make sure to ONLY use the functions when translating and parsing
-+ * in order to keep the host byte order and make it more portable:
-+ * parse_ip()
-+ * parse_mask()
-+ * parse_ipandmask()
-+ * ip_tostring()
-+ * (Joakim: where are they???)
-+ */
-+
-+typedef uint32_t ip_set_ip_t;
-+
-+/* Sets are identified by an id in kernel space. Tweak with ip_set_id_t
-+ * and IP_SET_INVALID_ID if you want to increase the max number of sets.
-+ */
-+typedef uint16_t ip_set_id_t;
-+
-+#define IP_SET_INVALID_ID 65535
-+
-+/* How deep we follow bindings */
-+#define IP_SET_MAX_BINDINGS 6
-+
-+/*
-+ * Option flags for kernel operations (ipt_set_info)
-+ */
-+#define IPSET_SRC 0x01 /* Source match/add */
-+#define IPSET_DST 0x02 /* Destination match/add */
-+#define IPSET_MATCH_INV 0x04 /* Inverse matching */
-+
-+/*
-+ * Set types (flavours)
-+ */
-+#define IPSET_TYPE_IP 0 /* IP address type of set */
-+#define IPSET_TYPE_PORT 1 /* Port type of set */
-+
-+/* Reserved keywords */
-+#define IPSET_TOKEN_DEFAULT ":default:"
-+#define IPSET_TOKEN_ALL ":all:"
-+
-+/* SO_IP_SET operation constants, and their request struct types.
-+ *
-+ * Operation ids:
-+ * 0-99: commands with version checking
-+ * 100-199: add/del/test/bind/unbind
-+ * 200-299: list, save, restore
-+ */
-+
-+/* Single shot operations:
-+ * version, create, destroy, flush, rename and swap
-+ *
-+ * Sets are identified by name.
-+ */
-+
-+#define IP_SET_REQ_STD \
-+ unsigned op; \
-+ unsigned version; \
-+ char name[IP_SET_MAXNAMELEN]
-+
-+#define IP_SET_OP_CREATE 0x00000001 /* Create a new (empty) set */
-+struct ip_set_req_create {
-+ IP_SET_REQ_STD;
-+ char typename[IP_SET_MAXNAMELEN];
-+};
-+
-+#define IP_SET_OP_DESTROY 0x00000002 /* Remove a (empty) set */
-+struct ip_set_req_std {
-+ IP_SET_REQ_STD;
-+};
-+
-+#define IP_SET_OP_FLUSH 0x00000003 /* Remove all IPs in a set */
-+/* Uses ip_set_req_std */
-+
-+#define IP_SET_OP_RENAME 0x00000004 /* Rename a set */
-+/* Uses ip_set_req_create */
-+
-+#define IP_SET_OP_SWAP 0x00000005 /* Swap two sets */
-+/* Uses ip_set_req_create */
-+
-+union ip_set_name_index {
-+ char name[IP_SET_MAXNAMELEN];
-+ ip_set_id_t index;
-+};
-+
-+#define IP_SET_OP_GET_BYNAME 0x00000006 /* Get set index by name */
-+struct ip_set_req_get_set {
-+ unsigned op;
-+ unsigned version;
-+ union ip_set_name_index set;
-+};
-+
-+#define IP_SET_OP_GET_BYINDEX 0x00000007 /* Get set name by index */
-+/* Uses ip_set_req_get_set */
-+
-+#define IP_SET_OP_VERSION 0x00000100 /* Ask kernel version */
-+struct ip_set_req_version {
-+ unsigned op;
-+ unsigned version;
-+};
-+
-+/* Double shots operations:
-+ * add, del, test, bind and unbind.
-+ *
-+ * First we query the kernel to get the index and type of the target set,
-+ * then issue the command. Validity of IP is checked in kernel in order
-+ * to minimalize sockopt operations.
-+ */
-+
-+/* Get minimal set data for add/del/test/bind/unbind IP */
-+#define IP_SET_OP_ADT_GET 0x00000010 /* Get set and type */
-+struct ip_set_req_adt_get {
-+ unsigned op;
-+ unsigned version;
-+ union ip_set_name_index set;
-+ char typename[IP_SET_MAXNAMELEN];
-+};
-+
-+#define IP_SET_REQ_BYINDEX \
-+ unsigned op; \
-+ ip_set_id_t index;
-+
-+struct ip_set_req_adt {
-+ IP_SET_REQ_BYINDEX;
-+};
-+
-+#define IP_SET_OP_ADD_IP 0x00000101 /* Add an IP to a set */
-+/* Uses ip_set_req_adt, with type specific addage */
-+
-+#define IP_SET_OP_DEL_IP 0x00000102 /* Remove an IP from a set */
-+/* Uses ip_set_req_adt, with type specific addage */
-+
-+#define IP_SET_OP_TEST_IP 0x00000103 /* Test an IP in a set */
-+/* Uses ip_set_req_adt, with type specific addage */
-+
-+#define IP_SET_OP_BIND_SET 0x00000104 /* Bind an IP to a set */
-+/* Uses ip_set_req_bind, with type specific addage */
-+struct ip_set_req_bind {
-+ IP_SET_REQ_BYINDEX;
-+ char binding[IP_SET_MAXNAMELEN];
-+};
-+
-+#define IP_SET_OP_UNBIND_SET 0x00000105 /* Unbind an IP from a set */
-+/* Uses ip_set_req_bind, with type speficic addage
-+ * index = 0 means unbinding for all sets */
-+
-+#define IP_SET_OP_TEST_BIND_SET 0x00000106 /* Test binding an IP to a set */
-+/* Uses ip_set_req_bind, with type specific addage */
-+
-+/* Multiple shots operations: list, save, restore.
-+ *
-+ * - check kernel version and query the max number of sets
-+ * - get the basic information on all sets
-+ * and size required for the next step
-+ * - get actual set data: header, data, bindings
-+ */
-+
-+/* Get max_sets and the index of a queried set
-+ */
-+#define IP_SET_OP_MAX_SETS 0x00000020
-+struct ip_set_req_max_sets {
-+ unsigned op;
-+ unsigned version;
-+ ip_set_id_t max_sets; /* max_sets */
-+ ip_set_id_t sets; /* real number of sets */
-+ union ip_set_name_index set; /* index of set if name used */
-+};
-+
-+/* Get the id and name of the sets plus size for next step */
-+#define IP_SET_OP_LIST_SIZE 0x00000201
-+#define IP_SET_OP_SAVE_SIZE 0x00000202
-+struct ip_set_req_setnames {
-+ unsigned op;
-+ ip_set_id_t index; /* set to list/save */
-+ size_t size; /* size to get setdata/bindings */
-+ /* followed by sets number of struct ip_set_name_list */
-+};
-+
-+struct ip_set_name_list {
-+ char name[IP_SET_MAXNAMELEN];
-+ char typename[IP_SET_MAXNAMELEN];
-+ ip_set_id_t index;
-+ ip_set_id_t id;
-+};
-+
-+/* The actual list operation */
-+#define IP_SET_OP_LIST 0x00000203
-+struct ip_set_req_list {
-+ IP_SET_REQ_BYINDEX;
-+ /* sets number of struct ip_set_list in reply */
-+};
-+
-+struct ip_set_list {
-+ ip_set_id_t index;
-+ ip_set_id_t binding;
-+ u_int32_t ref;
-+ size_t header_size; /* Set header data of header_size */
-+ size_t members_size; /* Set members data of members_size */
-+ size_t bindings_size; /* Set bindings data of bindings_size */
-+};
-+
-+struct ip_set_hash_list {
-+ ip_set_ip_t ip;
-+ ip_set_id_t binding;
-+};
-+
-+/* The save operation */
-+#define IP_SET_OP_SAVE 0x00000204
-+/* Uses ip_set_req_list, in the reply replaced by
-+ * sets number of struct ip_set_save plus a marker
-+ * ip_set_save followed by ip_set_hash_save structures.
-+ */
-+struct ip_set_save {
-+ ip_set_id_t index;
-+ ip_set_id_t binding;
-+ size_t header_size; /* Set header data of header_size */
-+ size_t members_size; /* Set members data of members_size */
-+};
-+
-+/* At restoring, ip == 0 means default binding for the given set: */
-+struct ip_set_hash_save {
-+ ip_set_ip_t ip;
-+ ip_set_id_t id;
-+ ip_set_id_t binding;
-+};
-+
-+/* The restore operation */
-+#define IP_SET_OP_RESTORE 0x00000205
-+/* Uses ip_set_req_setnames followed by ip_set_restore structures
-+ * plus a marker ip_set_restore, followed by ip_set_hash_save
-+ * structures.
-+ */
-+struct ip_set_restore {
-+ char name[IP_SET_MAXNAMELEN];
-+ char typename[IP_SET_MAXNAMELEN];
-+ ip_set_id_t index;
-+ size_t header_size; /* Create data of header_size */
-+ size_t members_size; /* Set members data of members_size */
-+};
-+
-+static inline int bitmap_bytes(ip_set_ip_t a, ip_set_ip_t b)
-+{
-+ return 4 * ((((b - a + 8) / 8) + 3) / 4);
-+}
-+
-+#ifdef __KERNEL__
-+
-+#define ip_set_printk(format, args...) \
-+ do { \
-+ printk("%s: %s: ", __FILE__, __FUNCTION__); \
-+ printk(format "\n" , ## args); \
-+ } while (0)
-+
-+#if defined(IP_SET_DEBUG)
-+#define DP(format, args...) \
-+ do { \
-+ printk("%s: %s (DBG): ", __FILE__, __FUNCTION__);\
-+ printk(format "\n" , ## args); \
-+ } while (0)
-+#define IP_SET_ASSERT(x) \
-+ do { \
-+ if (!(x)) \
-+ printk("IP_SET_ASSERT: %s:%i(%s)\n", \
-+ __FILE__, __LINE__, __FUNCTION__); \
-+ } while (0)
-+#else
-+#define DP(format, args...)
-+#define IP_SET_ASSERT(x)
-+#endif
-+
-+struct ip_set;
-+
-+/*
-+ * The ip_set_type definition - one per set type, e.g. "ipmap".
-+ *
-+ * Each individual set has a pointer, set->type, going to one
-+ * of these structures. Function pointers inside the structure implement
-+ * the real behaviour of the sets.
-+ *
-+ * If not mentioned differently, the implementation behind the function
-+ * pointers of a set_type, is expected to return 0 if ok, and a negative
-+ * errno (e.g. -EINVAL) on error.
-+ */
-+struct ip_set_type {
-+ struct list_head list; /* next in list of set types */
-+
-+ /* test for IP in set (kernel: iptables -m set src|dst)
-+ * return 0 if not in set, 1 if in set.
-+ */
-+ int (*testip_kernel) (struct ip_set *set,
-+ const struct sk_buff * skb,
-+ u_int32_t flags,
-+ ip_set_ip_t *ip);
-+
-+ /* test for IP in set (userspace: ipset -T set IP)
-+ * return 0 if not in set, 1 if in set.
-+ */
-+ int (*testip) (struct ip_set *set,
-+ const void *data, size_t size,
-+ ip_set_ip_t *ip);
-+
-+ /*
-+ * Size of the data structure passed by when
-+ * adding/deletin/testing an entry.
-+ */
-+ size_t reqsize;
-+
-+ /* Add IP into set (userspace: ipset -A set IP)
-+ * Return -EEXIST if the address is already in the set,
-+ * and -ERANGE if the address lies outside the set bounds.
-+ * If the address was not already in the set, 0 is returned.
-+ */
-+ int (*addip) (struct ip_set *set,
-+ const void *data, size_t size,
-+ ip_set_ip_t *ip);
-+
-+ /* Add IP into set (kernel: iptables ... -j SET set src|dst)
-+ * Return -EEXIST if the address is already in the set,
-+ * and -ERANGE if the address lies outside the set bounds.
-+ * If the address was not already in the set, 0 is returned.
-+ */
-+ int (*addip_kernel) (struct ip_set *set,
-+ const struct sk_buff * skb,
-+ u_int32_t flags,
-+ ip_set_ip_t *ip);
-+
-+ /* remove IP from set (userspace: ipset -D set --entry x)
-+ * Return -EEXIST if the address is NOT in the set,
-+ * and -ERANGE if the address lies outside the set bounds.
-+ * If the address really was in the set, 0 is returned.
-+ */
-+ int (*delip) (struct ip_set *set,
-+ const void *data, size_t size,
-+ ip_set_ip_t *ip);
-+
-+ /* remove IP from set (kernel: iptables ... -j SET --entry x)
-+ * Return -EEXIST if the address is NOT in the set,
-+ * and -ERANGE if the address lies outside the set bounds.
-+ * If the address really was in the set, 0 is returned.
-+ */
-+ int (*delip_kernel) (struct ip_set *set,
-+ const struct sk_buff * skb,
-+ u_int32_t flags,
-+ ip_set_ip_t *ip);
-+
-+ /* new set creation - allocated type specific items
-+ */
-+ int (*create) (struct ip_set *set,
-+ const void *data, size_t size);
-+
-+ /* retry the operation after successfully tweaking the set
-+ */
-+ int (*retry) (struct ip_set *set);
-+
-+ /* set destruction - free type specific items
-+ * There is no return value.
-+ * Can be called only when child sets are destroyed.
-+ */
-+ void (*destroy) (struct ip_set *set);
-+
-+ /* set flushing - reset all bits in the set, or something similar.
-+ * There is no return value.
-+ */
-+ void (*flush) (struct ip_set *set);
-+
-+ /* Listing: size needed for header
-+ */
-+ size_t header_size;
-+
-+ /* Listing: Get the header
-+ *
-+ * Fill in the information in "data".
-+ * This function is always run after list_header_size() under a
-+ * writelock on the set. Therefor is the length of "data" always
-+ * correct.
-+ */
-+ void (*list_header) (const struct ip_set *set,
-+ void *data);
-+
-+ /* Listing: Get the size for the set members
-+ */
-+ int (*list_members_size) (const struct ip_set *set);
-+
-+ /* Listing: Get the set members
-+ *
-+ * Fill in the information in "data".
-+ * This function is always run after list_member_size() under a
-+ * writelock on the set. Therefor is the length of "data" always
-+ * correct.
-+ */
-+ void (*list_members) (const struct ip_set *set,
-+ void *data);
-+
-+ char typename[IP_SET_MAXNAMELEN];
-+ char typecode;
-+ int protocol_version;
-+
-+ /* Set this to THIS_MODULE if you are a module, otherwise NULL */
-+ struct module *me;
-+};
-+
-+extern int ip_set_register_set_type(struct ip_set_type *set_type);
-+extern void ip_set_unregister_set_type(struct ip_set_type *set_type);
-+
-+/* A generic ipset */
-+struct ip_set {
-+ char name[IP_SET_MAXNAMELEN]; /* the name of the set */
-+ rwlock_t lock; /* lock for concurrency control */
-+ ip_set_id_t id; /* set id for swapping */
-+ ip_set_id_t binding; /* default binding for the set */
-+ atomic_t ref; /* in kernel and in hash references */
-+ struct ip_set_type *type; /* the set types */
-+ void *data; /* pooltype specific data */
-+};
-+
-+/* Structure to bind set elements to sets */
-+struct ip_set_hash {
-+ struct list_head list; /* list of clashing entries in hash */
-+ ip_set_ip_t ip; /* ip from set */
-+ ip_set_id_t id; /* set id */
-+ ip_set_id_t binding; /* set we bind the element to */
-+};
-+
-+/* register and unregister set references */
-+extern ip_set_id_t ip_set_get_byname(const char name[IP_SET_MAXNAMELEN]);
-+extern ip_set_id_t ip_set_get_byindex(ip_set_id_t id);
-+extern void ip_set_put(ip_set_id_t id);
-+
-+/* API for iptables set match, and SET target */
-+extern void ip_set_addip_kernel(ip_set_id_t id,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags);
-+extern void ip_set_delip_kernel(ip_set_id_t id,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags);
-+extern int ip_set_testip_kernel(ip_set_id_t id,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags);
-+
-+#endif /* __KERNEL__ */
-+
-+#endif /*_IP_SET_H*/
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iphash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iphash.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iphash.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iphash.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,30 @@
-+#ifndef __IP_SET_IPHASH_H
-+#define __IP_SET_IPHASH_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "iphash"
-+#define MAX_RANGE 0x0000FFFF
-+
-+struct ip_set_iphash {
-+ ip_set_ip_t *members; /* the iphash proper */
-+ uint32_t initval; /* initval for jhash_1word */
-+ uint32_t prime; /* prime for double hashing */
-+ uint32_t hashsize; /* hash size */
-+ uint16_t probes; /* max number of probes */
-+ uint16_t resize; /* resize factor in percent */
-+ ip_set_ip_t netmask; /* netmask */
-+};
-+
-+struct ip_set_req_iphash_create {
-+ uint32_t hashsize;
-+ uint16_t probes;
-+ uint16_t resize;
-+ ip_set_ip_t netmask;
-+};
-+
-+struct ip_set_req_iphash {
-+ ip_set_ip_t ip;
-+};
-+
-+#endif /* __IP_SET_IPHASH_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_ipmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_ipmap.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_ipmap.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_ipmap.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,56 @@
-+#ifndef __IP_SET_IPMAP_H
-+#define __IP_SET_IPMAP_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "ipmap"
-+#define MAX_RANGE 0x0000FFFF
-+
-+struct ip_set_ipmap {
-+ void *members; /* the ipmap proper */
-+ ip_set_ip_t first_ip; /* host byte order, included in range */
-+ ip_set_ip_t last_ip; /* host byte order, included in range */
-+ ip_set_ip_t netmask; /* subnet netmask */
-+ ip_set_ip_t sizeid; /* size of set in IPs */
-+ u_int16_t hosts; /* number of hosts in a subnet */
-+};
-+
-+struct ip_set_req_ipmap_create {
-+ ip_set_ip_t from;
-+ ip_set_ip_t to;
-+ ip_set_ip_t netmask;
-+};
-+
-+struct ip_set_req_ipmap {
-+ ip_set_ip_t ip;
-+};
-+
-+unsigned int
-+mask_to_bits(ip_set_ip_t mask)
-+{
-+ unsigned int bits = 32;
-+ ip_set_ip_t maskaddr;
-+
-+ if (mask == 0xFFFFFFFF)
-+ return bits;
-+
-+ maskaddr = 0xFFFFFFFE;
-+ while (--bits >= 0 && maskaddr != mask)
-+ maskaddr <<= 1;
-+
-+ return bits;
-+}
-+
-+ip_set_ip_t
-+range_to_mask(ip_set_ip_t from, ip_set_ip_t to, unsigned int *bits)
-+{
-+ ip_set_ip_t mask = 0xFFFFFFFE;
-+
-+ *bits = 32;
-+ while (--(*bits) >= 0 && mask && (to & mask) != from)
-+ mask <<= 1;
-+
-+ return mask;
-+}
-+
-+#endif /* __IP_SET_IPMAP_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iptree.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iptree.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iptree.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iptree.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,39 @@
-+#ifndef __IP_SET_IPTREE_H
-+#define __IP_SET_IPTREE_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "iptree"
-+#define MAX_RANGE 0x0000FFFF
-+
-+struct ip_set_iptreed {
-+ unsigned long expires[255]; /* x.x.x.ADDR */
-+};
-+
-+struct ip_set_iptreec {
-+ struct ip_set_iptreed *tree[255]; /* x.x.ADDR.* */
-+};
-+
-+struct ip_set_iptreeb {
-+ struct ip_set_iptreec *tree[255]; /* x.ADDR.*.* */
-+};
-+
-+struct ip_set_iptree {
-+ unsigned int timeout;
-+ unsigned int gc_interval;
-+#ifdef __KERNEL__
-+ struct timer_list gc;
-+ struct ip_set_iptreeb *tree[255]; /* ADDR.*.*.* */
-+#endif
-+};
-+
-+struct ip_set_req_iptree_create {
-+ unsigned int timeout;
-+};
-+
-+struct ip_set_req_iptree {
-+ ip_set_ip_t ip;
-+ unsigned int timeout;
-+};
-+
-+#endif /* __IP_SET_IPTREE_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_jhash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_jhash.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_jhash.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_jhash.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,148 @@
-+#ifndef _LINUX_IPSET_JHASH_H
-+#define _LINUX_IPSET_JHASH_H
-+
-+/* This is a copy of linux/jhash.h but the types u32/u8 are changed
-+ * to __u32/__u8 so that the header file can be included into
-+ * userspace code as well. Jozsef Kadlecsik (kadlec@blackhole.kfki.hu)
-+ */
-+
-+/* jhash.h: Jenkins hash support.
-+ *
-+ * Copyright (C) 1996 Bob Jenkins (bob_jenkins@burtleburtle.net)
-+ *
-+ * http://burtleburtle.net/bob/hash/
-+ *
-+ * These are the credits from Bob's sources:
-+ *
-+ * lookup2.c, by Bob Jenkins, December 1996, Public Domain.
-+ * hash(), hash2(), hash3, and mix() are externally useful functions.
-+ * Routines to test the hash are included if SELF_TEST is defined.
-+ * You can use this free for any purpose. It has no warranty.
-+ *
-+ * Copyright (C) 2003 David S. Miller (davem@redhat.com)
-+ *
-+ * I've modified Bob's hash to be useful in the Linux kernel, and
-+ * any bugs present are surely my fault. -DaveM
-+ */
-+
-+/* NOTE: Arguments are modified. */
-+#define __jhash_mix(a, b, c) \
-+{ \
-+ a -= b; a -= c; a ^= (c>>13); \
-+ b -= c; b -= a; b ^= (a<<8); \
-+ c -= a; c -= b; c ^= (b>>13); \
-+ a -= b; a -= c; a ^= (c>>12); \
-+ b -= c; b -= a; b ^= (a<<16); \
-+ c -= a; c -= b; c ^= (b>>5); \
-+ a -= b; a -= c; a ^= (c>>3); \
-+ b -= c; b -= a; b ^= (a<<10); \
-+ c -= a; c -= b; c ^= (b>>15); \
-+}
-+
-+/* The golden ration: an arbitrary value */
-+#define JHASH_GOLDEN_RATIO 0x9e3779b9
-+
-+/* The most generic version, hashes an arbitrary sequence
-+ * of bytes. No alignment or length assumptions are made about
-+ * the input key.
-+ */
-+static inline __u32 jhash(void *key, __u32 length, __u32 initval)
-+{
-+ __u32 a, b, c, len;
-+ __u8 *k = key;
-+
-+ len = length;
-+ a = b = JHASH_GOLDEN_RATIO;
-+ c = initval;
-+
-+ while (len >= 12) {
-+ a += (k[0] +((__u32)k[1]<<8) +((__u32)k[2]<<16) +((__u32)k[3]<<24));
-+ b += (k[4] +((__u32)k[5]<<8) +((__u32)k[6]<<16) +((__u32)k[7]<<24));
-+ c += (k[8] +((__u32)k[9]<<8) +((__u32)k[10]<<16)+((__u32)k[11]<<24));
-+
-+ __jhash_mix(a,b,c);
-+
-+ k += 12;
-+ len -= 12;
-+ }
-+
-+ c += length;
-+ switch (len) {
-+ case 11: c += ((__u32)k[10]<<24);
-+ case 10: c += ((__u32)k[9]<<16);
-+ case 9 : c += ((__u32)k[8]<<8);
-+ case 8 : b += ((__u32)k[7]<<24);
-+ case 7 : b += ((__u32)k[6]<<16);
-+ case 6 : b += ((__u32)k[5]<<8);
-+ case 5 : b += k[4];
-+ case 4 : a += ((__u32)k[3]<<24);
-+ case 3 : a += ((__u32)k[2]<<16);
-+ case 2 : a += ((__u32)k[1]<<8);
-+ case 1 : a += k[0];
-+ };
-+
-+ __jhash_mix(a,b,c);
-+
-+ return c;
-+}
-+
-+/* A special optimized version that handles 1 or more of __u32s.
-+ * The length parameter here is the number of __u32s in the key.
-+ */
-+static inline __u32 jhash2(__u32 *k, __u32 length, __u32 initval)
-+{
-+ __u32 a, b, c, len;
-+
-+ a = b = JHASH_GOLDEN_RATIO;
-+ c = initval;
-+ len = length;
-+
-+ while (len >= 3) {
-+ a += k[0];
-+ b += k[1];
-+ c += k[2];
-+ __jhash_mix(a, b, c);
-+ k += 3; len -= 3;
-+ }
-+
-+ c += length * 4;
-+
-+ switch (len) {
-+ case 2 : b += k[1];
-+ case 1 : a += k[0];
-+ };
-+
-+ __jhash_mix(a,b,c);
-+
-+ return c;
-+}
-+
-+
-+/* A special ultra-optimized versions that knows they are hashing exactly
-+ * 3, 2 or 1 word(s).
-+ *
-+ * NOTE: In partilar the "c += length; __jhash_mix(a,b,c);" normally
-+ * done at the end is not done here.
-+ */
-+static inline __u32 jhash_3words(__u32 a, __u32 b, __u32 c, __u32 initval)
-+{
-+ a += JHASH_GOLDEN_RATIO;
-+ b += JHASH_GOLDEN_RATIO;
-+ c += initval;
-+
-+ __jhash_mix(a, b, c);
-+
-+ return c;
-+}
-+
-+static inline __u32 jhash_2words(__u32 a, __u32 b, __u32 initval)
-+{
-+ return jhash_3words(a, b, 0, initval);
-+}
-+
-+static inline __u32 jhash_1word(__u32 a, __u32 initval)
-+{
-+ return jhash_3words(a, 0, 0, initval);
-+}
-+
-+#endif /* _LINUX_IPSET_JHASH_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_macipmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_macipmap.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_macipmap.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_macipmap.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,38 @@
-+#ifndef __IP_SET_MACIPMAP_H
-+#define __IP_SET_MACIPMAP_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "macipmap"
-+#define MAX_RANGE 0x0000FFFF
-+
-+/* general flags */
-+#define IPSET_MACIP_MATCHUNSET 1
-+
-+/* per ip flags */
-+#define IPSET_MACIP_ISSET 1
-+
-+struct ip_set_macipmap {
-+ void *members; /* the macipmap proper */
-+ ip_set_ip_t first_ip; /* host byte order, included in range */
-+ ip_set_ip_t last_ip; /* host byte order, included in range */
-+ u_int32_t flags;
-+};
-+
-+struct ip_set_req_macipmap_create {
-+ ip_set_ip_t from;
-+ ip_set_ip_t to;
-+ u_int32_t flags;
-+};
-+
-+struct ip_set_req_macipmap {
-+ ip_set_ip_t ip;
-+ unsigned char ethernet[ETH_ALEN];
-+};
-+
-+struct ip_set_macip {
-+ unsigned short flags;
-+ unsigned char ethernet[ETH_ALEN];
-+};
-+
-+#endif /* __IP_SET_MACIPMAP_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_malloc.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_malloc.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_malloc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_malloc.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,42 @@
-+#ifndef _IP_SET_MALLOC_H
-+#define _IP_SET_MALLOC_H
-+
-+#ifdef __KERNEL__
-+
-+/* Memory allocation and deallocation */
-+static size_t max_malloc_size = 0;
-+
-+static inline void init_max_malloc_size(void)
-+{
-+#define CACHE(x) max_malloc_size = x;
-+#include <linux/kmalloc_sizes.h>
-+#undef CACHE
-+}
-+
-+static inline void * ip_set_malloc_atomic(size_t bytes)
-+{
-+ if (bytes > max_malloc_size)
-+ return __vmalloc(bytes, GFP_ATOMIC, PAGE_KERNEL);
-+ else
-+ return kmalloc(bytes, GFP_ATOMIC);
-+}
-+
-+static inline void * ip_set_malloc(size_t bytes)
-+{
-+ if (bytes > max_malloc_size)
-+ return vmalloc(bytes);
-+ else
-+ return kmalloc(bytes, GFP_KERNEL);
-+}
-+
-+static inline void ip_set_free(void * data, size_t bytes)
-+{
-+ if (bytes > max_malloc_size)
-+ vfree(data);
-+ else
-+ kfree(data);
-+}
-+
-+#endif /* __KERNEL__ */
-+
-+#endif /*_IP_SET_MALLOC_H*/
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_nethash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_nethash.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_nethash.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_nethash.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,55 @@
-+#ifndef __IP_SET_NETHASH_H
-+#define __IP_SET_NETHASH_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "nethash"
-+#define MAX_RANGE 0x0000FFFF
-+
-+struct ip_set_nethash {
-+ ip_set_ip_t *members; /* the nethash proper */
-+ uint32_t initval; /* initval for jhash_1word */
-+ uint32_t prime; /* prime for double hashing */
-+ uint32_t hashsize; /* hash size */
-+ uint16_t probes; /* max number of probes */
-+ uint16_t resize; /* resize factor in percent */
-+ unsigned char cidr[30]; /* CIDR sizes */
-+};
-+
-+struct ip_set_req_nethash_create {
-+ uint32_t hashsize;
-+ uint16_t probes;
-+ uint16_t resize;
-+};
-+
-+struct ip_set_req_nethash {
-+ ip_set_ip_t ip;
-+ unsigned char cidr;
-+};
-+
-+static unsigned char shifts[] = {255, 253, 249, 241, 225, 193, 129, 1};
-+
-+static inline ip_set_ip_t
-+pack(ip_set_ip_t ip, unsigned char cidr)
-+{
-+ ip_set_ip_t addr, *paddr = &addr;
-+ unsigned char n, t, *a;
-+
-+ addr = htonl(ip & (0xFFFFFFFF << (32 - (cidr))));
-+#ifdef __KERNEL__
-+ DP("ip:%u.%u.%u.%u/%u", NIPQUAD(addr), cidr);
-+#endif
-+ n = cidr / 8;
-+ t = cidr % 8;
-+ a = &((unsigned char *)paddr)[n];
-+ *a = *a /(1 << (8 - t)) + shifts[t];
-+#ifdef __KERNEL__
-+ DP("n: %u, t: %u, a: %u", n, t, *a);
-+ DP("ip:%u.%u.%u.%u/%u, %u.%u.%u.%u",
-+ HIPQUAD(ip), cidr, NIPQUAD(addr));
-+#endif
-+
-+ return ntohl(addr);
-+}
-+
-+#endif /* __IP_SET_NETHASH_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_portmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_portmap.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_portmap.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_portmap.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,25 @@
-+#ifndef __IP_SET_PORTMAP_H
-+#define __IP_SET_PORTMAP_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+#define SETTYPE_NAME "portmap"
-+#define MAX_RANGE 0x0000FFFF
-+#define INVALID_PORT (MAX_RANGE + 1)
-+
-+struct ip_set_portmap {
-+ void *members; /* the portmap proper */
-+ ip_set_ip_t first_port; /* host byte order, included in range */
-+ ip_set_ip_t last_port; /* host byte order, included in range */
-+};
-+
-+struct ip_set_req_portmap_create {
-+ ip_set_ip_t from;
-+ ip_set_ip_t to;
-+};
-+
-+struct ip_set_req_portmap {
-+ ip_set_ip_t port;
-+};
-+
-+#endif /* __IP_SET_PORTMAP_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_prime.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_prime.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_prime.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_prime.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,34 @@
-+#ifndef __IP_SET_PRIME_H
-+#define __IP_SET_PRIME_H
-+
-+static inline unsigned make_prime_bound(unsigned nr)
-+{
-+ unsigned long long nr64 = nr;
-+ unsigned long long x = 1;
-+ nr = 1;
-+ while (x <= nr64) { x <<= 2; nr <<= 1; }
-+ return nr;
-+}
-+
-+static inline int make_prime_check(unsigned nr)
-+{
-+ unsigned x = 3;
-+ unsigned b = make_prime_bound(nr);
-+ while (x <= b) {
-+ if (0 == (nr % x)) return 0;
-+ x += 2;
-+ }
-+ return 1;
-+}
-+
-+static unsigned make_prime(unsigned nr)
-+{
-+ if (0 == (nr & 1)) nr--;
-+ while (nr > 1) {
-+ if (make_prime_check(nr)) return nr;
-+ nr -= 2;
-+ }
-+ return 2;
-+}
-+
-+#endif /* __IP_SET_PRIME_H */
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_set.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_set.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_set.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_set.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,21 @@
-+#ifndef _IPT_SET_H
-+#define _IPT_SET_H
-+
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+struct ipt_set_info {
-+ ip_set_id_t index;
-+ u_int32_t flags[IP_SET_MAX_BINDINGS + 1];
-+};
-+
-+/* match info */
-+struct ipt_set_info_match {
-+ struct ipt_set_info match_set;
-+};
-+
-+struct ipt_set_info_target {
-+ struct ipt_set_info add_set;
-+ struct ipt_set_info del_set;
-+};
-+
-+#endif /*_IPT_SET_H*/
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/listhelp.h linux-2.6.19.dev/include/linux/netfilter_ipv4/listhelp.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/listhelp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/listhelp.h 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,123 @@
-+#ifndef _LISTHELP_H
-+#define _LISTHELP_H
-+#include <linux/list.h>
-+
-+/* Header to do more comprehensive job than linux/list.h; assume list
-+ is first entry in structure. */
-+
-+/* Return pointer to first true entry, if any, or NULL. A macro
-+ required to allow inlining of cmpfn. */
-+#define LIST_FIND(head, cmpfn, type, args...) \
-+({ \
-+ const struct list_head *__i, *__j = NULL; \
-+ \
-+ ASSERT_READ_LOCK(head); \
-+ list_for_each(__i, (head)) \
-+ if (cmpfn((const type)__i , ## args)) { \
-+ __j = __i; \
-+ break; \
-+ } \
-+ (type)__j; \
-+})
-+
-+#define LIST_FIND_W(head, cmpfn, type, args...) \
-+({ \
-+ const struct list_head *__i, *__j = NULL; \
-+ \
-+ ASSERT_WRITE_LOCK(head); \
-+ list_for_each(__i, (head)) \
-+ if (cmpfn((type)__i , ## args)) { \
-+ __j = __i; \
-+ break; \
-+ } \
-+ (type)__j; \
-+})
-+
-+/* Just like LIST_FIND but we search backwards */
-+#define LIST_FIND_B(head, cmpfn, type, args...) \
-+({ \
-+ const struct list_head *__i, *__j = NULL; \
-+ \
-+ ASSERT_READ_LOCK(head); \
-+ list_for_each_prev(__i, (head)) \
-+ if (cmpfn((const type)__i , ## args)) { \
-+ __j = __i; \
-+ break; \
-+ } \
-+ (type)__j; \
-+})
-+
-+static inline int
-+__list_cmp_same(const void *p1, const void *p2) { return p1 == p2; }
-+
-+/* Is this entry in the list? */
-+static inline int
-+list_inlist(struct list_head *head, const void *entry)
-+{
-+ return LIST_FIND(head, __list_cmp_same, void *, entry) != NULL;
-+}
-+
-+/* Delete from list. */
-+#ifdef CONFIG_NETFILTER_DEBUG
-+#define LIST_DELETE(head, oldentry) \
-+do { \
-+ ASSERT_WRITE_LOCK(head); \
-+ if (!list_inlist(head, oldentry)) \
-+ printk("LIST_DELETE: %s:%u `%s'(%p) not in %s.\n", \
-+ __FILE__, __LINE__, #oldentry, oldentry, #head); \
-+ else list_del((struct list_head *)oldentry); \
-+} while(0)
-+#else
-+#define LIST_DELETE(head, oldentry) list_del((struct list_head *)oldentry)
-+#endif
-+
-+/* Append. */
-+static inline void
-+list_append(struct list_head *head, void *new)
-+{
-+ ASSERT_WRITE_LOCK(head);
-+ list_add((new), (head)->prev);
-+}
-+
-+/* Prepend. */
-+static inline void
-+list_prepend(struct list_head *head, void *new)
-+{
-+ ASSERT_WRITE_LOCK(head);
-+ list_add(new, head);
-+}
-+
-+/* Insert according to ordering function; insert before first true. */
-+#define LIST_INSERT(head, new, cmpfn) \
-+do { \
-+ struct list_head *__i; \
-+ ASSERT_WRITE_LOCK(head); \
-+ list_for_each(__i, (head)) \
-+ if ((new), (typeof (new))__i) \
-+ break; \
-+ list_add((struct list_head *)(new), __i->prev); \
-+} while(0)
-+
-+/* If the field after the list_head is a nul-terminated string, you
-+ can use these functions. */
-+static inline int __list_cmp_name(const void *i, const char *name)
-+{
-+ return strcmp(name, i+sizeof(struct list_head)) == 0;
-+}
-+
-+/* Returns false if same name already in list, otherwise does insert. */
-+static inline int
-+list_named_insert(struct list_head *head, void *new)
-+{
-+ if (LIST_FIND(head, __list_cmp_name, void *,
-+ new + sizeof(struct list_head)))
-+ return 0;
-+ list_prepend(head, new);
-+ return 1;
-+}
-+
-+/* Find this named element in the list. */
-+#define list_named_find(head, name) \
-+LIST_FIND(head, __list_cmp_name, void *, name)
-+
-+#endif /*_LISTHELP_H*/
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,1989 @@
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module for IP set management */
-+
-+#include <linux/autoconf.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/kmod.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/random.h>
-+#include <linux/jhash.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <asm/semaphore.h>
-+#include <linux/spinlock.h>
-+#include <linux/vmalloc.h>
-+
-+#define ASSERT_READ_LOCK(x) /* dont use that */
-+#define ASSERT_WRITE_LOCK(x)
-+#include <linux/netfilter_ipv4/listhelp.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+
-+static struct list_head set_type_list; /* all registered sets */
-+static struct ip_set **ip_set_list; /* all individual sets */
-+static DEFINE_RWLOCK(ip_set_lock); /* protects the lists and the hash */
-+static DECLARE_MUTEX(ip_set_app_mutex); /* serializes user access */
-+static ip_set_id_t ip_set_max = CONFIG_IP_NF_SET_MAX;
-+static ip_set_id_t ip_set_bindings_hash_size = CONFIG_IP_NF_SET_HASHSIZE;
-+static struct list_head *ip_set_hash; /* hash of bindings */
-+static unsigned int ip_set_hash_random; /* random seed */
-+
-+/*
-+ * Sets are identified either by the index in ip_set_list or by id.
-+ * The id never changes and is used to find a key in the hash.
-+ * The index may change by swapping and used at all other places
-+ * (set/SET netfilter modules, binding value, etc.)
-+ *
-+ * Userspace requests are serialized by ip_set_mutex and sets can
-+ * be deleted only from userspace. Therefore ip_set_list locking
-+ * must obey the following rules:
-+ *
-+ * - kernel requests: read and write locking mandatory
-+ * - user requests: read locking optional, write locking mandatory
-+ */
-+
-+static inline void
-+__ip_set_get(ip_set_id_t index)
-+{
-+ atomic_inc(&ip_set_list[index]->ref);
-+}
-+
-+static inline void
-+__ip_set_put(ip_set_id_t index)
-+{
-+ atomic_dec(&ip_set_list[index]->ref);
-+}
-+
-+/*
-+ * Binding routines
-+ */
-+
-+static inline int
-+ip_hash_cmp(const struct ip_set_hash *set_hash,
-+ ip_set_id_t id, ip_set_ip_t ip)
-+{
-+ return set_hash->id == id && set_hash->ip == ip;
-+}
-+
-+static ip_set_id_t
-+ip_set_find_in_hash(ip_set_id_t id, ip_set_ip_t ip)
-+{
-+ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
-+ % ip_set_bindings_hash_size;
-+ struct ip_set_hash *set_hash;
-+
-+ ASSERT_READ_LOCK(&ip_set_lock);
-+ IP_SET_ASSERT(ip_set_list[id]);
-+ DP("set: %s, ip: %u.%u.%u.%u", ip_set_list[id]->name, HIPQUAD(ip));
-+
-+ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
-+ struct ip_set_hash *, id, ip);
-+
-+ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
-+ HIPQUAD(ip),
-+ set_hash != NULL ? ip_set_list[set_hash->binding]->name : "");
-+
-+ return (set_hash != NULL ? set_hash->binding : IP_SET_INVALID_ID);
-+}
-+
-+static inline void
-+__set_hash_del(struct ip_set_hash *set_hash)
-+{
-+ ASSERT_WRITE_LOCK(&ip_set_lock);
-+ IP_SET_ASSERT(ip_set_list[set_hash->binding]);
-+
-+ __ip_set_put(set_hash->binding);
-+ list_del(&set_hash->list);
-+ kfree(set_hash);
-+}
-+
-+static int
-+ip_set_hash_del(ip_set_id_t id, ip_set_ip_t ip)
-+{
-+ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
-+ % ip_set_bindings_hash_size;
-+ struct ip_set_hash *set_hash;
-+
-+ IP_SET_ASSERT(ip_set_list[id]);
-+ DP("set: %s, ip: %u.%u.%u.%u", ip_set_list[id]->name, HIPQUAD(ip));
-+ write_lock_bh(&ip_set_lock);
-+ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
-+ struct ip_set_hash *, id, ip);
-+ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
-+ HIPQUAD(ip),
-+ set_hash != NULL ? ip_set_list[set_hash->binding]->name : "");
-+
-+ if (set_hash != NULL)
-+ __set_hash_del(set_hash);
-+ write_unlock_bh(&ip_set_lock);
-+ return 0;
-+}
-+
-+static int
-+ip_set_hash_add(ip_set_id_t id, ip_set_ip_t ip, ip_set_id_t binding)
-+{
-+ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
-+ % ip_set_bindings_hash_size;
-+ struct ip_set_hash *set_hash;
-+ int ret = 0;
-+
-+ IP_SET_ASSERT(ip_set_list[id]);
-+ IP_SET_ASSERT(ip_set_list[binding]);
-+ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
-+ HIPQUAD(ip), ip_set_list[binding]->name);
-+ write_lock_bh(&ip_set_lock);
-+ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
-+ struct ip_set_hash *, id, ip);
-+ if (!set_hash) {
-+ set_hash = kmalloc(sizeof(struct ip_set_hash), GFP_KERNEL);
-+ if (!set_hash) {
-+ ret = -ENOMEM;
-+ goto unlock;
-+ }
-+ INIT_LIST_HEAD(&set_hash->list);
-+ set_hash->id = id;
-+ set_hash->ip = ip;
-+ list_add(&ip_set_hash[key], &set_hash->list);
-+ } else {
-+ IP_SET_ASSERT(ip_set_list[set_hash->binding]);
-+ DP("overwrite binding: %s",
-+ ip_set_list[set_hash->binding]->name);
-+ __ip_set_put(set_hash->binding);
-+ }
-+ set_hash->binding = binding;
-+ __ip_set_get(set_hash->binding);
-+ unlock:
-+ write_unlock_bh(&ip_set_lock);
-+ return ret;
-+}
-+
-+#define FOREACH_HASH_DO(fn, args...) \
-+({ \
-+ ip_set_id_t __key; \
-+ struct ip_set_hash *__set_hash; \
-+ \
-+ for (__key = 0; __key < ip_set_bindings_hash_size; __key++) { \
-+ list_for_each_entry(__set_hash, &ip_set_hash[__key], list) \
-+ fn(__set_hash , ## args); \
-+ } \
-+})
-+
-+#define FOREACH_HASH_RW_DO(fn, args...) \
-+({ \
-+ ip_set_id_t __key; \
-+ struct ip_set_hash *__set_hash, *__n; \
-+ \
-+ ASSERT_WRITE_LOCK(&ip_set_lock); \
-+ for (__key = 0; __key < ip_set_bindings_hash_size; __key++) { \
-+ list_for_each_entry_safe(__set_hash, __n, &ip_set_hash[__key], list)\
-+ fn(__set_hash , ## args); \
-+ } \
-+})
-+
-+/* Add, del and test set entries from kernel */
-+
-+#define follow_bindings(index, set, ip) \
-+((index = ip_set_find_in_hash((set)->id, ip)) != IP_SET_INVALID_ID \
-+ || (index = (set)->binding) != IP_SET_INVALID_ID)
-+
-+int
-+ip_set_testip_kernel(ip_set_id_t index,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags)
-+{
-+ struct ip_set *set;
-+ ip_set_ip_t ip;
-+ int res, i = 0;
-+
-+ IP_SET_ASSERT(flags[i]);
-+ read_lock_bh(&ip_set_lock);
-+ do {
-+ set = ip_set_list[index];
-+ IP_SET_ASSERT(set);
-+ DP("set %s, index %u", set->name, index);
-+ read_lock_bh(&set->lock);
-+ res = set->type->testip_kernel(set, skb, flags[i], &ip);
-+ read_unlock_bh(&set->lock);
-+ } while (res > 0
-+ && flags[++i]
-+ && follow_bindings(index, set, ip));
-+ read_unlock_bh(&ip_set_lock);
-+
-+ return res;
-+}
-+
-+void
-+ip_set_addip_kernel(ip_set_id_t index,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags)
-+{
-+ struct ip_set *set;
-+ ip_set_ip_t ip;
-+ int res, i= 0;
-+
-+ IP_SET_ASSERT(flags[i]);
-+ retry:
-+ read_lock_bh(&ip_set_lock);
-+ do {
-+ set = ip_set_list[index];
-+ IP_SET_ASSERT(set);
-+ DP("set %s, index %u", set->name, index);
-+ write_lock_bh(&set->lock);
-+ res = set->type->addip_kernel(set, skb, flags[i], &ip);
-+ write_unlock_bh(&set->lock);
-+ } while ((res == 0 || res == -EEXIST)
-+ && flags[++i]
-+ && follow_bindings(index, set, ip));
-+ read_unlock_bh(&ip_set_lock);
-+
-+ if (res == -EAGAIN
-+ && set->type->retry
-+ && (res = set->type->retry(set)) == 0)
-+ goto retry;
-+}
-+
-+void
-+ip_set_delip_kernel(ip_set_id_t index,
-+ const struct sk_buff *skb,
-+ const u_int32_t *flags)
-+{
-+ struct ip_set *set;
-+ ip_set_ip_t ip;
-+ int res, i = 0;
-+
-+ IP_SET_ASSERT(flags[i]);
-+ read_lock_bh(&ip_set_lock);
-+ do {
-+ set = ip_set_list[index];
-+ IP_SET_ASSERT(set);
-+ DP("set %s, index %u", set->name, index);
-+ write_lock_bh(&set->lock);
-+ res = set->type->delip_kernel(set, skb, flags[i], &ip);
-+ write_unlock_bh(&set->lock);
-+ } while ((res == 0 || res == -EEXIST)
-+ && flags[++i]
-+ && follow_bindings(index, set, ip));
-+ read_unlock_bh(&ip_set_lock);
-+}
-+
-+/* Register and deregister settype */
-+
-+static inline int
-+set_type_equal(const struct ip_set_type *set_type, const char *str2)
-+{
-+ return !strncmp(set_type->typename, str2, IP_SET_MAXNAMELEN - 1);
-+}
-+
-+static inline struct ip_set_type *
-+find_set_type(const char *name)
-+{
-+ return LIST_FIND(&set_type_list,
-+ set_type_equal,
-+ struct ip_set_type *,
-+ name);
-+}
-+
-+int
-+ip_set_register_set_type(struct ip_set_type *set_type)
-+{
-+ int ret = 0;
-+
-+ if (set_type->protocol_version != IP_SET_PROTOCOL_VERSION) {
-+ ip_set_printk("'%s' uses wrong protocol version %u (want %u)",
-+ set_type->typename,
-+ set_type->protocol_version,
-+ IP_SET_PROTOCOL_VERSION);
-+ return -EINVAL;
-+ }
-+
-+ write_lock_bh(&ip_set_lock);
-+ if (find_set_type(set_type->typename)) {
-+ /* Duplicate! */
-+ ip_set_printk("'%s' already registered!",
-+ set_type->typename);
-+ ret = -EINVAL;
-+ goto unlock;
-+ }
-+ if (!try_module_get(THIS_MODULE)) {
-+ ret = -EFAULT;
-+ goto unlock;
-+ }
-+ list_append(&set_type_list, set_type);
-+ DP("'%s' registered.", set_type->typename);
-+ unlock:
-+ write_unlock_bh(&ip_set_lock);
-+ return ret;
-+}
-+
-+void
-+ip_set_unregister_set_type(struct ip_set_type *set_type)
-+{
-+ write_lock_bh(&ip_set_lock);
-+ if (!find_set_type(set_type->typename)) {
-+ ip_set_printk("'%s' not registered?",
-+ set_type->typename);
-+ goto unlock;
-+ }
-+ LIST_DELETE(&set_type_list, set_type);
-+ module_put(THIS_MODULE);
-+ DP("'%s' unregistered.", set_type->typename);
-+ unlock:
-+ write_unlock_bh(&ip_set_lock);
-+
-+}
-+
-+/*
-+ * Userspace routines
-+ */
-+
-+/*
-+ * Find set by name, reference it once. The reference makes sure the
-+ * thing pointed to, does not go away under our feet. Drop the reference
-+ * later, using ip_set_put().
-+ */
-+ip_set_id_t
-+ip_set_get_byname(const char *name)
-+{
-+ ip_set_id_t i, index = IP_SET_INVALID_ID;
-+
-+ down(&ip_set_app_mutex);
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL
-+ && strcmp(ip_set_list[i]->name, name) == 0) {
-+ __ip_set_get(i);
-+ index = i;
-+ break;
-+ }
-+ }
-+ up(&ip_set_app_mutex);
-+ return index;
-+}
-+
-+/*
-+ * Find set by index, reference it once. The reference makes sure the
-+ * thing pointed to, does not go away under our feet. Drop the reference
-+ * later, using ip_set_put().
-+ */
-+ip_set_id_t
-+ip_set_get_byindex(ip_set_id_t index)
-+{
-+ down(&ip_set_app_mutex);
-+
-+ if (index >= ip_set_max)
-+ return IP_SET_INVALID_ID;
-+
-+ if (ip_set_list[index])
-+ __ip_set_get(index);
-+ else
-+ index = IP_SET_INVALID_ID;
-+
-+ up(&ip_set_app_mutex);
-+ return index;
-+}
-+
-+/*
-+ * If the given set pointer points to a valid set, decrement
-+ * reference count by 1. The caller shall not assume the index
-+ * to be valid, after calling this function.
-+ */
-+void ip_set_put(ip_set_id_t index)
-+{
-+ down(&ip_set_app_mutex);
-+ if (ip_set_list[index])
-+ __ip_set_put(index);
-+ up(&ip_set_app_mutex);
-+}
-+
-+/* Find a set by name or index */
-+static ip_set_id_t
-+ip_set_find_byname(const char *name)
-+{
-+ ip_set_id_t i, index = IP_SET_INVALID_ID;
-+
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL
-+ && strcmp(ip_set_list[i]->name, name) == 0) {
-+ index = i;
-+ break;
-+ }
-+ }
-+ return index;
-+}
-+
-+static ip_set_id_t
-+ip_set_find_byindex(ip_set_id_t index)
-+{
-+ if (index >= ip_set_max || ip_set_list[index] == NULL)
-+ index = IP_SET_INVALID_ID;
-+
-+ return index;
-+}
-+
-+/*
-+ * Add, del, test, bind and unbind
-+ */
-+
-+static inline int
-+__ip_set_testip(struct ip_set *set,
-+ const void *data,
-+ size_t size,
-+ ip_set_ip_t *ip)
-+{
-+ int res;
-+
-+ read_lock_bh(&set->lock);
-+ res = set->type->testip(set, data, size, ip);
-+ read_unlock_bh(&set->lock);
-+
-+ return res;
-+}
-+
-+static int
-+__ip_set_addip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ IP_SET_ASSERT(set);
-+ do {
-+ write_lock_bh(&set->lock);
-+ res = set->type->addip(set, data, size, &ip);
-+ write_unlock_bh(&set->lock);
-+ } while (res == -EAGAIN
-+ && set->type->retry
-+ && (res = set->type->retry(set)) == 0);
-+
-+ return res;
-+}
-+
-+static int
-+ip_set_addip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+
-+ return __ip_set_addip(index,
-+ data + sizeof(struct ip_set_req_adt),
-+ size - sizeof(struct ip_set_req_adt));
-+}
-+
-+static int
-+ip_set_delip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ IP_SET_ASSERT(set);
-+ write_lock_bh(&set->lock);
-+ res = set->type->delip(set,
-+ data + sizeof(struct ip_set_req_adt),
-+ size - sizeof(struct ip_set_req_adt),
-+ &ip);
-+ write_unlock_bh(&set->lock);
-+
-+ return res;
-+}
-+
-+static int
-+ip_set_testip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ IP_SET_ASSERT(set);
-+ res = __ip_set_testip(set,
-+ data + sizeof(struct ip_set_req_adt),
-+ size - sizeof(struct ip_set_req_adt),
-+ &ip);
-+
-+ return (res > 0 ? -EEXIST : res);
-+}
-+
-+static int
-+ip_set_bindip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ struct ip_set_req_bind *req_bind;
-+ ip_set_id_t binding;
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ IP_SET_ASSERT(set);
-+ if (size < sizeof(struct ip_set_req_bind))
-+ return -EINVAL;
-+
-+ req_bind = (struct ip_set_req_bind *) data;
-+ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
-+ /* Default binding of a set */
-+ char *binding_name;
-+
-+ if (size != sizeof(struct ip_set_req_bind) + IP_SET_MAXNAMELEN)
-+ return -EINVAL;
-+
-+ binding_name = (char *)(data + sizeof(struct ip_set_req_bind));
-+ binding_name[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ binding = ip_set_find_byname(binding_name);
-+ if (binding == IP_SET_INVALID_ID)
-+ return -ENOENT;
-+
-+ write_lock_bh(&ip_set_lock);
-+ /* Sets as binding values are referenced */
-+ if (set->binding != IP_SET_INVALID_ID)
-+ __ip_set_put(set->binding);
-+ set->binding = binding;
-+ __ip_set_get(set->binding);
-+ write_unlock_bh(&ip_set_lock);
-+
-+ return 0;
-+ }
-+ binding = ip_set_find_byname(req_bind->binding);
-+ if (binding == IP_SET_INVALID_ID)
-+ return -ENOENT;
-+
-+ res = __ip_set_testip(set,
-+ data + sizeof(struct ip_set_req_bind),
-+ size - sizeof(struct ip_set_req_bind),
-+ &ip);
-+ DP("set %s, ip: %u.%u.%u.%u, binding %s",
-+ set->name, HIPQUAD(ip), ip_set_list[binding]->name);
-+
-+ if (res >= 0)
-+ res = ip_set_hash_add(set->id, ip, binding);
-+
-+ return res;
-+}
-+
-+#define FOREACH_SET_DO(fn, args...) \
-+({ \
-+ ip_set_id_t __i; \
-+ struct ip_set *__set; \
-+ \
-+ for (__i = 0; __i < ip_set_max; __i++) { \
-+ __set = ip_set_list[__i]; \
-+ if (__set != NULL) \
-+ fn(__set , ##args); \
-+ } \
-+})
-+
-+static inline void
-+__set_hash_del_byid(struct ip_set_hash *set_hash, ip_set_id_t id)
-+{
-+ if (set_hash->id == id)
-+ __set_hash_del(set_hash);
-+}
-+
-+static inline void
-+__unbind_default(struct ip_set *set)
-+{
-+ if (set->binding != IP_SET_INVALID_ID) {
-+ /* Sets as binding values are referenced */
-+ __ip_set_put(set->binding);
-+ set->binding = IP_SET_INVALID_ID;
-+ }
-+}
-+
-+static int
-+ip_set_unbindip(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set;
-+ struct ip_set_req_bind *req_bind;
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ DP("");
-+ if (size < sizeof(struct ip_set_req_bind))
-+ return -EINVAL;
-+
-+ req_bind = (struct ip_set_req_bind *) data;
-+ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ DP("%u %s", index, req_bind->binding);
-+ if (index == IP_SET_INVALID_ID) {
-+ /* unbind :all: */
-+ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
-+ /* Default binding of sets */
-+ write_lock_bh(&ip_set_lock);
-+ FOREACH_SET_DO(__unbind_default);
-+ write_unlock_bh(&ip_set_lock);
-+ return 0;
-+ } else if (strcmp(req_bind->binding, IPSET_TOKEN_ALL) == 0) {
-+ /* Flush all bindings of all sets*/
-+ write_lock_bh(&ip_set_lock);
-+ FOREACH_HASH_RW_DO(__set_hash_del);
-+ write_unlock_bh(&ip_set_lock);
-+ return 0;
-+ }
-+ DP("unreachable reached!");
-+ return -EINVAL;
-+ }
-+
-+ set = ip_set_list[index];
-+ IP_SET_ASSERT(set);
-+ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
-+ /* Default binding of set */
-+ ip_set_id_t binding = ip_set_find_byindex(set->binding);
-+
-+ if (binding == IP_SET_INVALID_ID)
-+ return -ENOENT;
-+
-+ write_lock_bh(&ip_set_lock);
-+ /* Sets in hash values are referenced */
-+ __ip_set_put(set->binding);
-+ set->binding = IP_SET_INVALID_ID;
-+ write_unlock_bh(&ip_set_lock);
-+
-+ return 0;
-+ } else if (strcmp(req_bind->binding, IPSET_TOKEN_ALL) == 0) {
-+ /* Flush all bindings */
-+
-+ write_lock_bh(&ip_set_lock);
-+ FOREACH_HASH_RW_DO(__set_hash_del_byid, set->id);
-+ write_unlock_bh(&ip_set_lock);
-+ return 0;
-+ }
-+
-+ res = __ip_set_testip(set,
-+ data + sizeof(struct ip_set_req_bind),
-+ size - sizeof(struct ip_set_req_bind),
-+ &ip);
-+
-+ DP("set %s, ip: %u.%u.%u.%u", set->name, HIPQUAD(ip));
-+ if (res >= 0)
-+ res = ip_set_hash_del(set->id, ip);
-+
-+ return res;
-+}
-+
-+static int
-+ip_set_testbind(ip_set_id_t index,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ struct ip_set_req_bind *req_bind;
-+ ip_set_id_t binding;
-+ ip_set_ip_t ip;
-+ int res;
-+
-+ IP_SET_ASSERT(set);
-+ if (size < sizeof(struct ip_set_req_bind))
-+ return -EINVAL;
-+
-+ req_bind = (struct ip_set_req_bind *) data;
-+ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
-+ /* Default binding of set */
-+ char *binding_name;
-+
-+ if (size != sizeof(struct ip_set_req_bind) + IP_SET_MAXNAMELEN)
-+ return -EINVAL;
-+
-+ binding_name = (char *)(data + sizeof(struct ip_set_req_bind));
-+ binding_name[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ binding = ip_set_find_byname(binding_name);
-+ if (binding == IP_SET_INVALID_ID)
-+ return -ENOENT;
-+
-+ res = (set->binding == binding) ? -EEXIST : 0;
-+
-+ return res;
-+ }
-+ binding = ip_set_find_byname(req_bind->binding);
-+ if (binding == IP_SET_INVALID_ID)
-+ return -ENOENT;
-+
-+
-+ res = __ip_set_testip(set,
-+ data + sizeof(struct ip_set_req_bind),
-+ size - sizeof(struct ip_set_req_bind),
-+ &ip);
-+ DP("set %s, ip: %u.%u.%u.%u, binding %s",
-+ set->name, HIPQUAD(ip), ip_set_list[binding]->name);
-+
-+ if (res >= 0)
-+ res = (ip_set_find_in_hash(set->id, ip) == binding)
-+ ? -EEXIST : 0;
-+
-+ return res;
-+}
-+
-+static struct ip_set_type *
-+find_set_type_rlock(const char *typename)
-+{
-+ struct ip_set_type *type;
-+
-+ read_lock_bh(&ip_set_lock);
-+ type = find_set_type(typename);
-+ if (type == NULL)
-+ read_unlock_bh(&ip_set_lock);
-+
-+ return type;
-+}
-+
-+static int
-+find_free_id(const char *name,
-+ ip_set_id_t *index,
-+ ip_set_id_t *id)
-+{
-+ ip_set_id_t i;
-+
-+ *id = IP_SET_INVALID_ID;
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] == NULL) {
-+ if (*id == IP_SET_INVALID_ID)
-+ *id = *index = i;
-+ } else if (strcmp(name, ip_set_list[i]->name) == 0)
-+ /* Name clash */
-+ return -EEXIST;
-+ }
-+ if (*id == IP_SET_INVALID_ID)
-+ /* No free slot remained */
-+ return -ERANGE;
-+ /* Check that index is usable as id (swapping) */
-+ check:
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL
-+ && ip_set_list[i]->id == *id) {
-+ *id = i;
-+ goto check;
-+ }
-+ }
-+ return 0;
-+}
-+
-+/*
-+ * Create a set
-+ */
-+static int
-+ip_set_create(const char *name,
-+ const char *typename,
-+ ip_set_id_t restore,
-+ const void *data,
-+ size_t size)
-+{
-+ struct ip_set *set;
-+ ip_set_id_t index, id;
-+ int res = 0;
-+
-+ DP("setname: %s, typename: %s, id: %u", name, typename, restore);
-+ /*
-+ * First, and without any locks, allocate and initialize
-+ * a normal base set structure.
-+ */
-+ set = kmalloc(sizeof(struct ip_set), GFP_KERNEL);
-+ if (!set)
-+ return -ENOMEM;
-+ set->lock = RW_LOCK_UNLOCKED;
-+ strncpy(set->name, name, IP_SET_MAXNAMELEN);
-+ set->binding = IP_SET_INVALID_ID;
-+ atomic_set(&set->ref, 0);
-+
-+ /*
-+ * Next, take the &ip_set_lock, check that we know the type,
-+ * and take a reference on the type, to make sure it
-+ * stays available while constructing our new set.
-+ *
-+ * After referencing the type, we drop the &ip_set_lock,
-+ * and let the new set construction run without locks.
-+ */
-+ set->type = find_set_type_rlock(typename);
-+ if (set->type == NULL) {
-+ /* Try loading the module */
-+ char modulename[IP_SET_MAXNAMELEN + strlen("ip_set_") + 1];
-+ strcpy(modulename, "ip_set_");
-+ strcat(modulename, typename);
-+ DP("try to load %s", modulename);
-+ request_module(modulename);
-+ set->type = find_set_type_rlock(typename);
-+ }
-+ if (set->type == NULL) {
-+ ip_set_printk("no set type '%s', set '%s' not created",
-+ typename, name);
-+ res = -ENOENT;
-+ goto out;
-+ }
-+ if (!try_module_get(set->type->me)) {
-+ read_unlock_bh(&ip_set_lock);
-+ res = -EFAULT;
-+ goto out;
-+ }
-+ read_unlock_bh(&ip_set_lock);
-+
-+ /*
-+ * Without holding any locks, create private part.
-+ */
-+ res = set->type->create(set, data, size);
-+ if (res != 0)
-+ goto put_out;
-+
-+ /* BTW, res==0 here. */
-+
-+ /*
-+ * Here, we have a valid, constructed set. &ip_set_lock again,
-+ * find free id/index and check that it is not already in
-+ * ip_set_list.
-+ */
-+ write_lock_bh(&ip_set_lock);
-+ if ((res = find_free_id(set->name, &index, &id)) != 0) {
-+ DP("no free id!");
-+ goto cleanup;
-+ }
-+
-+ /* Make sure restore gets the same index */
-+ if (restore != IP_SET_INVALID_ID && index != restore) {
-+ DP("Can't restore, sets are screwed up");
-+ res = -ERANGE;
-+ goto cleanup;
-+ }
-+
-+ /*
-+ * Finally! Add our shiny new set to the list, and be done.
-+ */
-+ DP("create: '%s' created with index %u, id %u!", set->name, index, id);
-+ set->id = id;
-+ ip_set_list[index] = set;
-+ write_unlock_bh(&ip_set_lock);
-+ return res;
-+
-+ cleanup:
-+ write_unlock_bh(&ip_set_lock);
-+ set->type->destroy(set);
-+ put_out:
-+ module_put(set->type->me);
-+ out:
-+ kfree(set);
-+ return res;
-+}
-+
-+/*
-+ * Destroy a given existing set
-+ */
-+static void
-+ip_set_destroy_set(ip_set_id_t index)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+
-+ IP_SET_ASSERT(set);
-+ DP("set: %s", set->name);
-+ write_lock_bh(&ip_set_lock);
-+ FOREACH_HASH_RW_DO(__set_hash_del_byid, set->id);
-+ if (set->binding != IP_SET_INVALID_ID)
-+ __ip_set_put(set->binding);
-+ ip_set_list[index] = NULL;
-+ write_unlock_bh(&ip_set_lock);
-+
-+ /* Must call it without holding any lock */
-+ set->type->destroy(set);
-+ module_put(set->type->me);
-+ kfree(set);
-+}
-+
-+/*
-+ * Destroy a set - or all sets
-+ * Sets must not be referenced/used.
-+ */
-+static int
-+ip_set_destroy(ip_set_id_t index)
-+{
-+ ip_set_id_t i;
-+
-+ /* ref modification always protected by the mutex */
-+ if (index != IP_SET_INVALID_ID) {
-+ if (atomic_read(&ip_set_list[index]->ref))
-+ return -EBUSY;
-+ ip_set_destroy_set(index);
-+ } else {
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL
-+ && (atomic_read(&ip_set_list[i]->ref)))
-+ return -EBUSY;
-+ }
-+
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL)
-+ ip_set_destroy_set(i);
-+ }
-+ }
-+ return 0;
-+}
-+
-+static void
-+ip_set_flush_set(struct ip_set *set)
-+{
-+ DP("set: %s %u", set->name, set->id);
-+
-+ write_lock_bh(&set->lock);
-+ set->type->flush(set);
-+ write_unlock_bh(&set->lock);
-+}
-+
-+/*
-+ * Flush data in a set - or in all sets
-+ */
-+static int
-+ip_set_flush(ip_set_id_t index)
-+{
-+ if (index != IP_SET_INVALID_ID) {
-+ IP_SET_ASSERT(ip_set_list[index]);
-+ ip_set_flush_set(ip_set_list[index]);
-+ } else
-+ FOREACH_SET_DO(ip_set_flush_set);
-+
-+ return 0;
-+}
-+
-+/* Rename a set */
-+static int
-+ip_set_rename(ip_set_id_t index, const char *name)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ ip_set_id_t i;
-+ int res = 0;
-+
-+ DP("set: %s to %s", set->name, name);
-+ write_lock_bh(&ip_set_lock);
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL
-+ && strncmp(ip_set_list[i]->name,
-+ name,
-+ IP_SET_MAXNAMELEN - 1) == 0) {
-+ res = -EEXIST;
-+ goto unlock;
-+ }
-+ }
-+ strncpy(set->name, name, IP_SET_MAXNAMELEN);
-+ unlock:
-+ write_unlock_bh(&ip_set_lock);
-+ return res;
-+}
-+
-+/*
-+ * Swap two sets so that name/index points to the other.
-+ * References are also swapped.
-+ */
-+static int
-+ip_set_swap(ip_set_id_t from_index, ip_set_id_t to_index)
-+{
-+ struct ip_set *from = ip_set_list[from_index];
-+ struct ip_set *to = ip_set_list[to_index];
-+ char from_name[IP_SET_MAXNAMELEN];
-+ u_int32_t from_ref;
-+
-+ DP("set: %s to %s", from->name, to->name);
-+ /* Type can't be changed. Artifical restriction. */
-+ if (from->type->typecode != to->type->typecode)
-+ return -ENOEXEC;
-+
-+ /* No magic here: ref munging protected by the mutex */
-+ write_lock_bh(&ip_set_lock);
-+ strncpy(from_name, from->name, IP_SET_MAXNAMELEN);
-+ from_ref = atomic_read(&from->ref);
-+
-+ strncpy(from->name, to->name, IP_SET_MAXNAMELEN);
-+ atomic_set(&from->ref, atomic_read(&to->ref));
-+ strncpy(to->name, from_name, IP_SET_MAXNAMELEN);
-+ atomic_set(&to->ref, from_ref);
-+
-+ ip_set_list[from_index] = to;
-+ ip_set_list[to_index] = from;
-+
-+ write_unlock_bh(&ip_set_lock);
-+ return 0;
-+}
-+
-+/*
-+ * List set data
-+ */
-+
-+static inline void
-+__set_hash_bindings_size_list(struct ip_set_hash *set_hash,
-+ ip_set_id_t id, size_t *size)
-+{
-+ if (set_hash->id == id)
-+ *size += sizeof(struct ip_set_hash_list);
-+}
-+
-+static inline void
-+__set_hash_bindings_size_save(struct ip_set_hash *set_hash,
-+ ip_set_id_t id, size_t *size)
-+{
-+ if (set_hash->id == id)
-+ *size += sizeof(struct ip_set_hash_save);
-+}
-+
-+static inline void
-+__set_hash_bindings(struct ip_set_hash *set_hash,
-+ ip_set_id_t id, void *data, int *used)
-+{
-+ if (set_hash->id == id) {
-+ struct ip_set_hash_list *hash_list =
-+ (struct ip_set_hash_list *)(data + *used);
-+
-+ hash_list->ip = set_hash->ip;
-+ hash_list->binding = set_hash->binding;
-+ *used += sizeof(struct ip_set_hash_list);
-+ }
-+}
-+
-+static int ip_set_list_set(ip_set_id_t index,
-+ void *data,
-+ int *used,
-+ int len)
-+{
-+ struct ip_set *set = ip_set_list[index];
-+ struct ip_set_list *set_list;
-+
-+ /* Pointer to our header */
-+ set_list = (struct ip_set_list *) (data + *used);
-+
-+ DP("set: %s, used: %d %p %p", set->name, *used, data, data + *used);
-+
-+ /* Get and ensure header size */
-+ if (*used + sizeof(struct ip_set_list) > len)
-+ goto not_enough_mem;
-+ *used += sizeof(struct ip_set_list);
-+
-+ read_lock_bh(&set->lock);
-+ /* Get and ensure set specific header size */
-+ set_list->header_size = set->type->header_size;
-+ if (*used + set_list->header_size > len)
-+ goto unlock_set;
-+
-+ /* Fill in the header */
-+ set_list->index = index;
-+ set_list->binding = set->binding;
-+ set_list->ref = atomic_read(&set->ref);
-+
-+ /* Fill in set spefific header data */
-+ set->type->list_header(set, data + *used);
-+ *used += set_list->header_size;
-+
-+ /* Get and ensure set specific members size */
-+ set_list->members_size = set->type->list_members_size(set);
-+ if (*used + set_list->members_size > len)
-+ goto unlock_set;
-+
-+ /* Fill in set spefific members data */
-+ set->type->list_members(set, data + *used);
-+ *used += set_list->members_size;
-+ read_unlock_bh(&set->lock);
-+
-+ /* Bindings */
-+
-+ /* Get and ensure set specific bindings size */
-+ set_list->bindings_size = 0;
-+ FOREACH_HASH_DO(__set_hash_bindings_size_list,
-+ set->id, &set_list->bindings_size);
-+ if (*used + set_list->bindings_size > len)
-+ goto not_enough_mem;
-+
-+ /* Fill in set spefific bindings data */
-+ FOREACH_HASH_DO(__set_hash_bindings, set->id, data, used);
-+
-+ return 0;
-+
-+ unlock_set:
-+ read_unlock_bh(&set->lock);
-+ not_enough_mem:
-+ DP("not enough mem, try again");
-+ return -EAGAIN;
-+}
-+
-+/*
-+ * Save sets
-+ */
-+static int ip_set_save_set(ip_set_id_t index,
-+ void *data,
-+ int *used,
-+ int len)
-+{
-+ struct ip_set *set;
-+ struct ip_set_save *set_save;
-+
-+ /* Pointer to our header */
-+ set_save = (struct ip_set_save *) (data + *used);
-+
-+ /* Get and ensure header size */
-+ if (*used + sizeof(struct ip_set_save) > len)
-+ goto not_enough_mem;
-+ *used += sizeof(struct ip_set_save);
-+
-+ set = ip_set_list[index];
-+ DP("set: %s, used: %u(%u) %p %p", set->name, *used, len,
-+ data, data + *used);
-+
-+ read_lock_bh(&set->lock);
-+ /* Get and ensure set specific header size */
-+ set_save->header_size = set->type->header_size;
-+ if (*used + set_save->header_size > len)
-+ goto unlock_set;
-+
-+ /* Fill in the header */
-+ set_save->index = index;
-+ set_save->binding = set->binding;
-+
-+ /* Fill in set spefific header data */
-+ set->type->list_header(set, data + *used);
-+ *used += set_save->header_size;
-+
-+ DP("set header filled: %s, used: %u %p %p", set->name, *used,
-+ data, data + *used);
-+ /* Get and ensure set specific members size */
-+ set_save->members_size = set->type->list_members_size(set);
-+ if (*used + set_save->members_size > len)
-+ goto unlock_set;
-+
-+ /* Fill in set spefific members data */
-+ set->type->list_members(set, data + *used);
-+ *used += set_save->members_size;
-+ read_unlock_bh(&set->lock);
-+ DP("set members filled: %s, used: %u %p %p", set->name, *used,
-+ data, data + *used);
-+ return 0;
-+
-+ unlock_set:
-+ read_unlock_bh(&set->lock);
-+ not_enough_mem:
-+ DP("not enough mem, try again");
-+ return -EAGAIN;
-+}
-+
-+static inline void
-+__set_hash_save_bindings(struct ip_set_hash *set_hash,
-+ ip_set_id_t id,
-+ void *data,
-+ int *used,
-+ int len,
-+ int *res)
-+{
-+ if (*res == 0
-+ && (id == IP_SET_INVALID_ID || set_hash->id == id)) {
-+ struct ip_set_hash_save *hash_save =
-+ (struct ip_set_hash_save *)(data + *used);
-+ /* Ensure bindings size */
-+ if (*used + sizeof(struct ip_set_hash_save) > len) {
-+ *res = -ENOMEM;
-+ return;
-+ }
-+ hash_save->id = set_hash->id;
-+ hash_save->ip = set_hash->ip;
-+ hash_save->binding = set_hash->binding;
-+ *used += sizeof(struct ip_set_hash_save);
-+ }
-+}
-+
-+static int ip_set_save_bindings(ip_set_id_t index,
-+ void *data,
-+ int *used,
-+ int len)
-+{
-+ int res = 0;
-+ struct ip_set_save *set_save;
-+
-+ DP("used %u, len %u", *used, len);
-+ /* Get and ensure header size */
-+ if (*used + sizeof(struct ip_set_save) > len)
-+ return -ENOMEM;
-+
-+ /* Marker */
-+ set_save = (struct ip_set_save *) (data + *used);
-+ set_save->index = IP_SET_INVALID_ID;
-+ *used += sizeof(struct ip_set_save);
-+
-+ DP("marker added used %u, len %u", *used, len);
-+ /* Fill in bindings data */
-+ if (index != IP_SET_INVALID_ID)
-+ /* Sets are identified by id in hash */
-+ index = ip_set_list[index]->id;
-+ FOREACH_HASH_DO(__set_hash_save_bindings, index, data, used, len, &res);
-+
-+ return res;
-+}
-+
-+/*
-+ * Restore sets
-+ */
-+static int ip_set_restore(void *data,
-+ int len)
-+{
-+ int res = 0;
-+ int line = 0, used = 0, members_size;
-+ struct ip_set *set;
-+ struct ip_set_hash_save *hash_save;
-+ struct ip_set_restore *set_restore;
-+ ip_set_id_t index;
-+
-+ /* Loop to restore sets */
-+ while (1) {
-+ line++;
-+
-+ DP("%u %u %u", used, sizeof(struct ip_set_restore), len);
-+ /* Get and ensure header size */
-+ if (used + sizeof(struct ip_set_restore) > len)
-+ return line;
-+ set_restore = (struct ip_set_restore *) (data + used);
-+ used += sizeof(struct ip_set_restore);
-+
-+ /* Ensure data size */
-+ if (used
-+ + set_restore->header_size
-+ + set_restore->members_size > len)
-+ return line;
-+
-+ /* Check marker */
-+ if (set_restore->index == IP_SET_INVALID_ID) {
-+ line--;
-+ goto bindings;
-+ }
-+
-+ /* Try to create the set */
-+ DP("restore %s %s", set_restore->name, set_restore->typename);
-+ res = ip_set_create(set_restore->name,
-+ set_restore->typename,
-+ set_restore->index,
-+ data + used,
-+ set_restore->header_size);
-+
-+ if (res != 0)
-+ return line;
-+ used += set_restore->header_size;
-+
-+ index = ip_set_find_byindex(set_restore->index);
-+ DP("index %u, restore_index %u", index, set_restore->index);
-+ if (index != set_restore->index)
-+ return line;
-+ /* Try to restore members data */
-+ set = ip_set_list[index];
-+ members_size = 0;
-+ DP("members_size %u reqsize %u",
-+ set_restore->members_size, set->type->reqsize);
-+ while (members_size + set->type->reqsize <=
-+ set_restore->members_size) {
-+ line++;
-+ DP("members: %u, line %u", members_size, line);
-+ res = __ip_set_addip(index,
-+ data + used + members_size,
-+ set->type->reqsize);
-+ if (!(res == 0 || res == -EEXIST))
-+ return line;
-+ members_size += set->type->reqsize;
-+ }
-+
-+ DP("members_size %u %u",
-+ set_restore->members_size, members_size);
-+ if (members_size != set_restore->members_size)
-+ return line++;
-+ used += set_restore->members_size;
-+ }
-+
-+ bindings:
-+ /* Loop to restore bindings */
-+ while (used < len) {
-+ line++;
-+
-+ DP("restore binding, line %u", line);
-+ /* Get and ensure size */
-+ if (used + sizeof(struct ip_set_hash_save) > len)
-+ return line;
-+ hash_save = (struct ip_set_hash_save *) (data + used);
-+ used += sizeof(struct ip_set_hash_save);
-+
-+ /* hash_save->id is used to store the index */
-+ index = ip_set_find_byindex(hash_save->id);
-+ DP("restore binding index %u, id %u, %u -> %u",
-+ index, hash_save->id, hash_save->ip, hash_save->binding);
-+ if (index != hash_save->id)
-+ return line;
-+
-+ set = ip_set_list[hash_save->id];
-+ /* Null valued IP means default binding */
-+ if (hash_save->ip)
-+ res = ip_set_hash_add(set->id,
-+ hash_save->ip,
-+ hash_save->binding);
-+ else {
-+ IP_SET_ASSERT(set->binding == IP_SET_INVALID_ID);
-+ write_lock_bh(&ip_set_lock);
-+ set->binding = hash_save->binding;
-+ __ip_set_get(set->binding);
-+ write_unlock_bh(&ip_set_lock);
-+ DP("default binding: %u", set->binding);
-+ }
-+ if (res != 0)
-+ return line;
-+ }
-+ if (used != len)
-+ return line;
-+
-+ return 0;
-+}
-+
-+static int
-+ip_set_sockfn_set(struct sock *sk, int optval, void *user, unsigned int len)
-+{
-+ void *data;
-+ int res = 0; /* Assume OK */
-+ unsigned *op;
-+ struct ip_set_req_adt *req_adt;
-+ ip_set_id_t index = IP_SET_INVALID_ID;
-+ int (*adtfn)(ip_set_id_t index,
-+ const void *data, size_t size);
-+ struct fn_table {
-+ int (*fn)(ip_set_id_t index,
-+ const void *data, size_t size);
-+ } adtfn_table[] =
-+ { { ip_set_addip }, { ip_set_delip }, { ip_set_testip},
-+ { ip_set_bindip}, { ip_set_unbindip }, { ip_set_testbind },
-+ };
-+
-+ DP("optval=%d, user=%p, len=%d", optval, user, len);
-+ if (!capable(CAP_NET_ADMIN))
-+ return -EPERM;
-+ if (optval != SO_IP_SET)
-+ return -EBADF;
-+ if (len <= sizeof(unsigned)) {
-+ ip_set_printk("short userdata (want >%zu, got %u)",
-+ sizeof(unsigned), len);
-+ return -EINVAL;
-+ }
-+ data = vmalloc(len);
-+ if (!data) {
-+ DP("out of mem for %u bytes", len);
-+ return -ENOMEM;
-+ }
-+ if (copy_from_user(data, user, len) != 0) {
-+ res = -EFAULT;
-+ goto done;
-+ }
-+ if (down_interruptible(&ip_set_app_mutex)) {
-+ res = -EINTR;
-+ goto done;
-+ }
-+
-+ op = (unsigned *)data;
-+ DP("op=%x", *op);
-+
-+ if (*op < IP_SET_OP_VERSION) {
-+ /* Check the version at the beginning of operations */
-+ struct ip_set_req_version *req_version =
-+ (struct ip_set_req_version *) data;
-+ if (req_version->version != IP_SET_PROTOCOL_VERSION) {
-+ res = -EPROTO;
-+ goto done;
-+ }
-+ }
-+
-+ switch (*op) {
-+ case IP_SET_OP_CREATE:{
-+ struct ip_set_req_create *req_create
-+ = (struct ip_set_req_create *) data;
-+
-+ if (len <= sizeof(struct ip_set_req_create)) {
-+ ip_set_printk("short CREATE data (want >%zu, got %u)",
-+ sizeof(struct ip_set_req_create), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ req_create->name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ req_create->typename[IP_SET_MAXNAMELEN - 1] = '\0';
-+ res = ip_set_create(req_create->name,
-+ req_create->typename,
-+ IP_SET_INVALID_ID,
-+ data + sizeof(struct ip_set_req_create),
-+ len - sizeof(struct ip_set_req_create));
-+ goto done;
-+ }
-+ case IP_SET_OP_DESTROY:{
-+ struct ip_set_req_std *req_destroy
-+ = (struct ip_set_req_std *) data;
-+
-+ if (len != sizeof(struct ip_set_req_std)) {
-+ ip_set_printk("invalid DESTROY data (want %zu, got %u)",
-+ sizeof(struct ip_set_req_std), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ if (strcmp(req_destroy->name, IPSET_TOKEN_ALL) == 0) {
-+ /* Destroy all sets */
-+ index = IP_SET_INVALID_ID;
-+ } else {
-+ req_destroy->name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ index = ip_set_find_byname(req_destroy->name);
-+
-+ if (index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ }
-+
-+ res = ip_set_destroy(index);
-+ goto done;
-+ }
-+ case IP_SET_OP_FLUSH:{
-+ struct ip_set_req_std *req_flush =
-+ (struct ip_set_req_std *) data;
-+
-+ if (len != sizeof(struct ip_set_req_std)) {
-+ ip_set_printk("invalid FLUSH data (want %zu, got %u)",
-+ sizeof(struct ip_set_req_std), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ if (strcmp(req_flush->name, IPSET_TOKEN_ALL) == 0) {
-+ /* Flush all sets */
-+ index = IP_SET_INVALID_ID;
-+ } else {
-+ req_flush->name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ index = ip_set_find_byname(req_flush->name);
-+
-+ if (index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ }
-+ res = ip_set_flush(index);
-+ goto done;
-+ }
-+ case IP_SET_OP_RENAME:{
-+ struct ip_set_req_create *req_rename
-+ = (struct ip_set_req_create *) data;
-+
-+ if (len != sizeof(struct ip_set_req_create)) {
-+ ip_set_printk("invalid RENAME data (want %zu, got %u)",
-+ sizeof(struct ip_set_req_create), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+
-+ req_rename->name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ req_rename->typename[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ index = ip_set_find_byname(req_rename->name);
-+ if (index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ res = ip_set_rename(index, req_rename->typename);
-+ goto done;
-+ }
-+ case IP_SET_OP_SWAP:{
-+ struct ip_set_req_create *req_swap
-+ = (struct ip_set_req_create *) data;
-+ ip_set_id_t to_index;
-+
-+ if (len != sizeof(struct ip_set_req_create)) {
-+ ip_set_printk("invalid SWAP data (want %zu, got %u)",
-+ sizeof(struct ip_set_req_create), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+
-+ req_swap->name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ req_swap->typename[IP_SET_MAXNAMELEN - 1] = '\0';
-+
-+ index = ip_set_find_byname(req_swap->name);
-+ if (index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ to_index = ip_set_find_byname(req_swap->typename);
-+ if (to_index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ res = ip_set_swap(index, to_index);
-+ goto done;
-+ }
-+ default:
-+ break; /* Set identified by id */
-+ }
-+
-+ /* There we may have add/del/test/bind/unbind/test_bind operations */
-+ if (*op < IP_SET_OP_ADD_IP || *op > IP_SET_OP_TEST_BIND_SET) {
-+ res = -EBADMSG;
-+ goto done;
-+ }
-+ adtfn = adtfn_table[*op - IP_SET_OP_ADD_IP].fn;
-+
-+ if (len < sizeof(struct ip_set_req_adt)) {
-+ ip_set_printk("short data in adt request (want >=%zu, got %u)",
-+ sizeof(struct ip_set_req_adt), len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ req_adt = (struct ip_set_req_adt *) data;
-+
-+ /* -U :all: :all:|:default: uses IP_SET_INVALID_ID */
-+ if (!(*op == IP_SET_OP_UNBIND_SET
-+ && req_adt->index == IP_SET_INVALID_ID)) {
-+ index = ip_set_find_byindex(req_adt->index);
-+ if (index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ }
-+ res = adtfn(index, data, len);
-+
-+ done:
-+ up(&ip_set_app_mutex);
-+ vfree(data);
-+ if (res > 0)
-+ res = 0;
-+ DP("final result %d", res);
-+ return res;
-+}
-+
-+static int
-+ip_set_sockfn_get(struct sock *sk, int optval, void *user, int *len)
-+{
-+ int res = 0;
-+ unsigned *op;
-+ ip_set_id_t index = IP_SET_INVALID_ID;
-+ void *data;
-+ int copylen = *len;
-+
-+ DP("optval=%d, user=%p, len=%d", optval, user, *len);
-+ if (!capable(CAP_NET_ADMIN))
-+ return -EPERM;
-+ if (optval != SO_IP_SET)
-+ return -EBADF;
-+ if (*len < sizeof(unsigned)) {
-+ ip_set_printk("short userdata (want >=%zu, got %d)",
-+ sizeof(unsigned), *len);
-+ return -EINVAL;
-+ }
-+ data = vmalloc(*len);
-+ if (!data) {
-+ DP("out of mem for %d bytes", *len);
-+ return -ENOMEM;
-+ }
-+ if (copy_from_user(data, user, *len) != 0) {
-+ res = -EFAULT;
-+ goto done;
-+ }
-+ if (down_interruptible(&ip_set_app_mutex)) {
-+ res = -EINTR;
-+ goto done;
-+ }
-+
-+ op = (unsigned *) data;
-+ DP("op=%x", *op);
-+
-+ if (*op < IP_SET_OP_VERSION) {
-+ /* Check the version at the beginning of operations */
-+ struct ip_set_req_version *req_version =
-+ (struct ip_set_req_version *) data;
-+ if (req_version->version != IP_SET_PROTOCOL_VERSION) {
-+ res = -EPROTO;
-+ goto done;
-+ }
-+ }
-+
-+ switch (*op) {
-+ case IP_SET_OP_VERSION: {
-+ struct ip_set_req_version *req_version =
-+ (struct ip_set_req_version *) data;
-+
-+ if (*len != sizeof(struct ip_set_req_version)) {
-+ ip_set_printk("invalid VERSION (want %zu, got %d)",
-+ sizeof(struct ip_set_req_version),
-+ *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+
-+ req_version->version = IP_SET_PROTOCOL_VERSION;
-+ res = copy_to_user(user, req_version,
-+ sizeof(struct ip_set_req_version));
-+ goto done;
-+ }
-+ case IP_SET_OP_GET_BYNAME: {
-+ struct ip_set_req_get_set *req_get
-+ = (struct ip_set_req_get_set *) data;
-+
-+ if (*len != sizeof(struct ip_set_req_get_set)) {
-+ ip_set_printk("invalid GET_BYNAME (want %zu, got %d)",
-+ sizeof(struct ip_set_req_get_set), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ index = ip_set_find_byname(req_get->set.name);
-+ req_get->set.index = index;
-+ goto copy;
-+ }
-+ case IP_SET_OP_GET_BYINDEX: {
-+ struct ip_set_req_get_set *req_get
-+ = (struct ip_set_req_get_set *) data;
-+
-+ if (*len != sizeof(struct ip_set_req_get_set)) {
-+ ip_set_printk("invalid GET_BYINDEX (want %zu, got %d)",
-+ sizeof(struct ip_set_req_get_set), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ index = ip_set_find_byindex(req_get->set.index);
-+ strncpy(req_get->set.name,
-+ index == IP_SET_INVALID_ID ? ""
-+ : ip_set_list[index]->name, IP_SET_MAXNAMELEN);
-+ goto copy;
-+ }
-+ case IP_SET_OP_ADT_GET: {
-+ struct ip_set_req_adt_get *req_get
-+ = (struct ip_set_req_adt_get *) data;
-+
-+ if (*len != sizeof(struct ip_set_req_adt_get)) {
-+ ip_set_printk("invalid ADT_GET (want %zu, got %d)",
-+ sizeof(struct ip_set_req_adt_get), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ index = ip_set_find_byname(req_get->set.name);
-+ if (index != IP_SET_INVALID_ID) {
-+ req_get->set.index = index;
-+ strncpy(req_get->typename,
-+ ip_set_list[index]->type->typename,
-+ IP_SET_MAXNAMELEN - 1);
-+ } else {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ goto copy;
-+ }
-+ case IP_SET_OP_MAX_SETS: {
-+ struct ip_set_req_max_sets *req_max_sets
-+ = (struct ip_set_req_max_sets *) data;
-+ ip_set_id_t i;
-+
-+ if (*len != sizeof(struct ip_set_req_max_sets)) {
-+ ip_set_printk("invalid MAX_SETS (want %zu, got %d)",
-+ sizeof(struct ip_set_req_max_sets), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+
-+ if (strcmp(req_max_sets->set.name, IPSET_TOKEN_ALL) == 0) {
-+ req_max_sets->set.index = IP_SET_INVALID_ID;
-+ } else {
-+ req_max_sets->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
-+ req_max_sets->set.index =
-+ ip_set_find_byname(req_max_sets->set.name);
-+ if (req_max_sets->set.index == IP_SET_INVALID_ID) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ }
-+ req_max_sets->max_sets = ip_set_max;
-+ req_max_sets->sets = 0;
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] != NULL)
-+ req_max_sets->sets++;
-+ }
-+ goto copy;
-+ }
-+ case IP_SET_OP_LIST_SIZE:
-+ case IP_SET_OP_SAVE_SIZE: {
-+ struct ip_set_req_setnames *req_setnames
-+ = (struct ip_set_req_setnames *) data;
-+ struct ip_set_name_list *name_list;
-+ struct ip_set *set;
-+ ip_set_id_t i;
-+ int used;
-+
-+ if (*len < sizeof(struct ip_set_req_setnames)) {
-+ ip_set_printk("short LIST_SIZE (want >=%zu, got %d)",
-+ sizeof(struct ip_set_req_setnames), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+
-+ req_setnames->size = 0;
-+ used = sizeof(struct ip_set_req_setnames);
-+ for (i = 0; i < ip_set_max; i++) {
-+ if (ip_set_list[i] == NULL)
-+ continue;
-+ name_list = (struct ip_set_name_list *)
-+ (data + used);
-+ used += sizeof(struct ip_set_name_list);
-+ if (used > copylen) {
-+ res = -EAGAIN;
-+ goto done;
-+ }
-+ set = ip_set_list[i];
-+ /* Fill in index, name, etc. */
-+ name_list->index = i;
-+ name_list->id = set->id;
-+ strncpy(name_list->name,
-+ set->name,
-+ IP_SET_MAXNAMELEN - 1);
-+ strncpy(name_list->typename,
-+ set->type->typename,
-+ IP_SET_MAXNAMELEN - 1);
-+ DP("filled %s of type %s, index %u\n",
-+ name_list->name, name_list->typename,
-+ name_list->index);
-+ if (!(req_setnames->index == IP_SET_INVALID_ID
-+ || req_setnames->index == i))
-+ continue;
-+ /* Update size */
-+ switch (*op) {
-+ case IP_SET_OP_LIST_SIZE: {
-+ req_setnames->size += sizeof(struct ip_set_list)
-+ + set->type->header_size
-+ + set->type->list_members_size(set);
-+ FOREACH_HASH_DO(__set_hash_bindings_size_list,
-+ i, &req_setnames->size);
-+ break;
-+ }
-+ case IP_SET_OP_SAVE_SIZE: {
-+ req_setnames->size += sizeof(struct ip_set_save)
-+ + set->type->header_size
-+ + set->type->list_members_size(set);
-+ FOREACH_HASH_DO(__set_hash_bindings_size_save,
-+ i, &req_setnames->size);
-+ break;
-+ }
-+ default:
-+ break;
-+ }
-+ }
-+ if (copylen != used) {
-+ res = -EAGAIN;
-+ goto done;
-+ }
-+ goto copy;
-+ }
-+ case IP_SET_OP_LIST: {
-+ struct ip_set_req_list *req_list
-+ = (struct ip_set_req_list *) data;
-+ ip_set_id_t i;
-+ int used;
-+
-+ if (*len < sizeof(struct ip_set_req_list)) {
-+ ip_set_printk("short LIST (want >=%zu, got %d)",
-+ sizeof(struct ip_set_req_list), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ index = req_list->index;
-+ if (index != IP_SET_INVALID_ID
-+ && ip_set_find_byindex(index) != index) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ used = 0;
-+ if (index == IP_SET_INVALID_ID) {
-+ /* List all sets */
-+ for (i = 0; i < ip_set_max && res == 0; i++) {
-+ if (ip_set_list[i] != NULL)
-+ res = ip_set_list_set(i, data, &used, *len);
-+ }
-+ } else {
-+ /* List an individual set */
-+ res = ip_set_list_set(index, data, &used, *len);
-+ }
-+ if (res != 0)
-+ goto done;
-+ else if (copylen != used) {
-+ res = -EAGAIN;
-+ goto done;
-+ }
-+ goto copy;
-+ }
-+ case IP_SET_OP_SAVE: {
-+ struct ip_set_req_list *req_save
-+ = (struct ip_set_req_list *) data;
-+ ip_set_id_t i;
-+ int used;
-+
-+ if (*len < sizeof(struct ip_set_req_list)) {
-+ ip_set_printk("short SAVE (want >=%zu, got %d)",
-+ sizeof(struct ip_set_req_list), *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ index = req_save->index;
-+ if (index != IP_SET_INVALID_ID
-+ && ip_set_find_byindex(index) != index) {
-+ res = -ENOENT;
-+ goto done;
-+ }
-+ used = 0;
-+ if (index == IP_SET_INVALID_ID) {
-+ /* Save all sets */
-+ for (i = 0; i < ip_set_max && res == 0; i++) {
-+ if (ip_set_list[i] != NULL)
-+ res = ip_set_save_set(i, data, &used, *len);
-+ }
-+ } else {
-+ /* Save an individual set */
-+ res = ip_set_save_set(index, data, &used, *len);
-+ }
-+ if (res == 0)
-+ res = ip_set_save_bindings(index, data, &used, *len);
-+
-+ if (res != 0)
-+ goto done;
-+ else if (copylen != used) {
-+ res = -EAGAIN;
-+ goto done;
-+ }
-+ goto copy;
-+ }
-+ case IP_SET_OP_RESTORE: {
-+ struct ip_set_req_setnames *req_restore
-+ = (struct ip_set_req_setnames *) data;
-+ int line;
-+
-+ if (*len < sizeof(struct ip_set_req_setnames)
-+ || *len != req_restore->size) {
-+ ip_set_printk("invalid RESTORE (want =%zu, got %d)",
-+ req_restore->size, *len);
-+ res = -EINVAL;
-+ goto done;
-+ }
-+ line = ip_set_restore(data + sizeof(struct ip_set_req_setnames),
-+ req_restore->size - sizeof(struct ip_set_req_setnames));
-+ DP("ip_set_restore: %u", line);
-+ if (line != 0) {
-+ res = -EAGAIN;
-+ req_restore->size = line;
-+ copylen = sizeof(struct ip_set_req_setnames);
-+ goto copy;
-+ }
-+ goto done;
-+ }
-+ default:
-+ res = -EBADMSG;
-+ goto done;
-+ } /* end of switch(op) */
-+
-+ copy:
-+ DP("set %s, copylen %u", index != IP_SET_INVALID_ID
-+ && ip_set_list[index]
-+ ? ip_set_list[index]->name
-+ : ":all:", copylen);
-+ if (res == 0)
-+ res = copy_to_user(user, data, copylen);
-+ else
-+ copy_to_user(user, data, copylen);
-+
-+ done:
-+ up(&ip_set_app_mutex);
-+ vfree(data);
-+ if (res > 0)
-+ res = 0;
-+ DP("final result %d", res);
-+ return res;
-+}
-+
-+static struct nf_sockopt_ops so_set = {
-+ .pf = PF_INET,
-+ .set_optmin = SO_IP_SET,
-+ .set_optmax = SO_IP_SET + 1,
-+ .set = &ip_set_sockfn_set,
-+ .get_optmin = SO_IP_SET,
-+ .get_optmax = SO_IP_SET + 1,
-+ .get = &ip_set_sockfn_get,
-+ .use = 0
-+};
-+
-+static int max_sets, hash_size;
-+module_param(max_sets, int, 0600);
-+MODULE_PARM_DESC(max_sets, "maximal number of sets");
-+module_param(hash_size, int, 0600);
-+MODULE_PARM_DESC(hash_size, "hash size for bindings");
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("module implementing core IP set support");
-+
-+static int __init init(void)
-+{
-+ int res;
-+ ip_set_id_t i;
-+
-+ get_random_bytes(&ip_set_hash_random, 4);
-+ if (max_sets)
-+ ip_set_max = max_sets;
-+ ip_set_list = vmalloc(sizeof(struct ip_set *) * ip_set_max);
-+ if (!ip_set_list) {
-+ printk(KERN_ERR "Unable to create ip_set_list\n");
-+ return -ENOMEM;
-+ }
-+ memset(ip_set_list, 0, sizeof(struct ip_set *) * ip_set_max);
-+ if (hash_size)
-+ ip_set_bindings_hash_size = hash_size;
-+ ip_set_hash = vmalloc(sizeof(struct list_head) * ip_set_bindings_hash_size);
-+ if (!ip_set_hash) {
-+ printk(KERN_ERR "Unable to create ip_set_hash\n");
-+ vfree(ip_set_list);
-+ return -ENOMEM;
-+ }
-+ for (i = 0; i < ip_set_bindings_hash_size; i++)
-+ INIT_LIST_HEAD(&ip_set_hash[i]);
-+
-+ INIT_LIST_HEAD(&set_type_list);
-+
-+ res = nf_register_sockopt(&so_set);
-+ if (res != 0) {
-+ ip_set_printk("SO_SET registry failed: %d", res);
-+ vfree(ip_set_list);
-+ vfree(ip_set_hash);
-+ return res;
-+ }
-+ return 0;
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* There can't be any existing set or binding */
-+ nf_unregister_sockopt(&so_set);
-+ vfree(ip_set_list);
-+ vfree(ip_set_hash);
-+ DP("these are the famous last words");
-+}
-+
-+EXPORT_SYMBOL(ip_set_register_set_type);
-+EXPORT_SYMBOL(ip_set_unregister_set_type);
-+
-+EXPORT_SYMBOL(ip_set_get_byname);
-+EXPORT_SYMBOL(ip_set_get_byindex);
-+EXPORT_SYMBOL(ip_set_put);
-+
-+EXPORT_SYMBOL(ip_set_addip_kernel);
-+EXPORT_SYMBOL(ip_set_delip_kernel);
-+EXPORT_SYMBOL(ip_set_testip_kernel);
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_iphash.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iphash.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_iphash.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iphash.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,379 @@
-+/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing an ip hash set */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+#include <linux/vmalloc.h>
-+#include <linux/random.h>
-+
-+#include <net/ip.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_malloc.h>
-+#include <linux/netfilter_ipv4/ip_set_iphash.h>
-+#include <linux/netfilter_ipv4/ip_set_jhash.h>
-+#include <linux/netfilter_ipv4/ip_set_prime.h>
-+
-+static inline __u32
-+jhash_ip(const struct ip_set_iphash *map, ip_set_ip_t ip)
-+{
-+ return jhash_1word(ip, map->initval);
-+}
-+
-+static inline __u32
-+randhash_ip(const struct ip_set_iphash *map, ip_set_ip_t ip)
-+{
-+ return (1 + ip % map->prime);
-+}
-+
-+static inline __u32
-+hash_id(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ __u32 jhash, randhash, id;
-+ u_int16_t i;
-+
-+ *hash_ip = ip & map->netmask;
-+ jhash = jhash_ip(map, *hash_ip);
-+ randhash = randhash_ip(map, *hash_ip);
-+ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u, %u.%u.%u.%u",
-+ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip), HIPQUAD(map->netmask));
-+
-+ for (i = 0; i < map->probes; i++) {
-+ id = (jhash + i * randhash) % map->hashsize;
-+ DP("hash key: %u", id);
-+ if (map->members[id] == *hash_ip)
-+ return id;
-+ /* No shortcut at testing - there can be deleted
-+ * entries. */
-+ }
-+ return UINT_MAX;
-+}
-+
-+static inline int
-+__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ return (hash_id(set, ip, hash_ip) != UINT_MAX);
-+}
-+
-+static int
-+testip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_iphash *req =
-+ (struct ip_set_req_iphash *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iphash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iphash),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __testip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+testip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __testip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static inline int
-+__addip(struct ip_set_iphash *map, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ __u32 jhash, randhash, probe;
-+ u_int16_t i;
-+
-+ *hash_ip = ip & map->netmask;
-+ jhash = jhash_ip(map, *hash_ip);
-+ randhash = randhash_ip(map, *hash_ip);
-+
-+ for (i = 0; i < map->probes; i++) {
-+ probe = (jhash + i * randhash) % map->hashsize;
-+ if (map->members[probe] == *hash_ip)
-+ return -EEXIST;
-+ if (!map->members[probe]) {
-+ map->members[probe] = *hash_ip;
-+ return 0;
-+ }
-+ }
-+ /* Trigger rehashing */
-+ return -EAGAIN;
-+}
-+
-+static int
-+addip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_iphash *req =
-+ (struct ip_set_req_iphash *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iphash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iphash),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __addip((struct ip_set_iphash *) set->data, req->ip, hash_ip);
-+}
-+
-+static int
-+addip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __addip((struct ip_set_iphash *) set->data,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static int retry(struct ip_set *set)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ ip_set_ip_t hash_ip, *members;
-+ u_int32_t i, hashsize;
-+ unsigned newbytes;
-+ int res;
-+ struct ip_set_iphash tmp = {
-+ .hashsize = map->hashsize,
-+ .probes = map->probes,
-+ .resize = map->resize,
-+ .netmask = map->netmask,
-+ };
-+
-+ if (map->resize == 0)
-+ return -ERANGE;
-+
-+ again:
-+ res = 0;
-+
-+ /* Calculate new parameters */
-+ get_random_bytes(&tmp.initval, 4);
-+ hashsize = tmp.hashsize + (tmp.hashsize * map->resize)/100;
-+ if (hashsize == tmp.hashsize)
-+ hashsize++;
-+ tmp.prime = make_prime(hashsize);
-+
-+ ip_set_printk("rehashing of set %s triggered: "
-+ "hashsize grows from %u to %u",
-+ set->name, tmp.hashsize, hashsize);
-+ tmp.hashsize = hashsize;
-+
-+ newbytes = hashsize * sizeof(ip_set_ip_t);
-+ tmp.members = ip_set_malloc_atomic(newbytes);
-+ if (!tmp.members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ return -ENOMEM;
-+ }
-+ memset(tmp.members, 0, newbytes);
-+
-+ write_lock_bh(&set->lock);
-+ map = (struct ip_set_iphash *) set->data; /* Play safe */
-+ for (i = 0; i < map->hashsize && res == 0; i++) {
-+ if (map->members[i])
-+ res = __addip(&tmp, map->members[i], &hash_ip);
-+ }
-+ if (res) {
-+ /* Failure, try again */
-+ write_unlock_bh(&set->lock);
-+ ip_set_free(tmp.members, newbytes);
-+ goto again;
-+ }
-+
-+ /* Success at resizing! */
-+ members = map->members;
-+ hashsize = map->hashsize;
-+
-+ map->initval = tmp.initval;
-+ map->prime = tmp.prime;
-+ map->hashsize = tmp.hashsize;
-+ map->members = tmp.members;
-+ write_unlock_bh(&set->lock);
-+
-+ ip_set_free(members, hashsize * sizeof(ip_set_ip_t));
-+
-+ return 0;
-+}
-+
-+static inline int
-+__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ ip_set_ip_t id = hash_id(set, ip, hash_ip);
-+
-+ if (id == UINT_MAX)
-+ return -EEXIST;
-+
-+ map->members[id] = 0;
-+ return 0;
-+}
-+
-+static int
-+delip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_iphash *req =
-+ (struct ip_set_req_iphash *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iphash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iphash),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __delip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+delip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __delip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ unsigned newbytes;
-+ struct ip_set_req_iphash_create *req =
-+ (struct ip_set_req_iphash_create *) data;
-+ struct ip_set_iphash *map;
-+
-+ if (size != sizeof(struct ip_set_req_iphash_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iphash_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ if (req->hashsize < 1) {
-+ ip_set_printk("hashsize too small");
-+ return -ENOEXEC;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_iphash), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_iphash));
-+ return -ENOMEM;
-+ }
-+ get_random_bytes(&map->initval, 4);
-+ map->prime = make_prime(req->hashsize);
-+ map->hashsize = req->hashsize;
-+ map->probes = req->probes;
-+ map->resize = req->resize;
-+ map->netmask = req->netmask;
-+ newbytes = map->hashsize * sizeof(ip_set_ip_t);
-+ map->members = ip_set_malloc(newbytes);
-+ if (!map->members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ kfree(map);
-+ return -ENOMEM;
-+ }
-+ memset(map->members, 0, newbytes);
-+
-+ set->data = map;
-+ return 0;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+
-+ ip_set_free(map->members, map->hashsize * sizeof(ip_set_ip_t));
-+ kfree(map);
-+
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ memset(map->members, 0, map->hashsize * sizeof(ip_set_ip_t));
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ struct ip_set_req_iphash_create *header =
-+ (struct ip_set_req_iphash_create *) data;
-+
-+ header->hashsize = map->hashsize;
-+ header->probes = map->probes;
-+ header->resize = map->resize;
-+ header->netmask = map->netmask;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+
-+ return (map->hashsize * sizeof(ip_set_ip_t));
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
-+ int bytes = map->hashsize * sizeof(ip_set_ip_t);
-+
-+ memcpy(data, map->members, bytes);
-+}
-+
-+static struct ip_set_type ip_set_iphash = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_IP,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_iphash),
-+ .addip = &addip,
-+ .addip_kernel = &addip_kernel,
-+ .retry = &retry,
-+ .delip = &delip,
-+ .delip_kernel = &delip_kernel,
-+ .testip = &testip,
-+ .testip_kernel = &testip_kernel,
-+ .header_size = sizeof(struct ip_set_req_iphash_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("iphash type of IP sets");
-+
-+static int __init init(void)
-+{
-+ init_max_malloc_size();
-+ return ip_set_register_set_type(&ip_set_iphash);
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_iphash);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_ipmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_ipmap.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_ipmap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_ipmap.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,313 @@
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing an IP set type: the single bitmap type */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_ipmap.h>
-+
-+static inline ip_set_ip_t
-+ip_to_id(const struct ip_set_ipmap *map, ip_set_ip_t ip)
-+{
-+ return (ip - map->first_ip)/map->hosts;
-+}
-+
-+static inline int
-+__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return -ERANGE;
-+
-+ *hash_ip = ip & map->netmask;
-+ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
-+ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ return !!test_bit(ip_to_id(map, *hash_ip), map->members);
-+}
-+
-+static int
-+testip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_ipmap *req =
-+ (struct ip_set_req_ipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_ipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_ipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __testip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+testip_kernel(struct ip_set *set,
-+ const struct sk_buff *skb,
-+ u_int32_t flags,
-+ ip_set_ip_t *hash_ip)
-+{
-+ int res;
-+
-+ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
-+ flags & IPSET_SRC ? "SRC" : "DST",
-+ NIPQUAD(skb->nh.iph->saddr),
-+ NIPQUAD(skb->nh.iph->daddr));
-+
-+ res = __testip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+ return (res < 0 ? 0 : res);
-+}
-+
-+static inline int
-+__addip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return -ERANGE;
-+
-+ *hash_ip = ip & map->netmask;
-+ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ if (test_and_set_bit(ip_to_id(map, *hash_ip), map->members))
-+ return -EEXIST;
-+
-+ return 0;
-+}
-+
-+static int
-+addip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_ipmap *req =
-+ (struct ip_set_req_ipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_ipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_ipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ DP("%u.%u.%u.%u", HIPQUAD(req->ip));
-+ return __addip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+addip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __addip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static inline int
-+__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return -ERANGE;
-+
-+ *hash_ip = ip & map->netmask;
-+ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ if (!test_and_clear_bit(ip_to_id(map, *hash_ip), map->members))
-+ return -EEXIST;
-+
-+ return 0;
-+}
-+
-+static int
-+delip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_ipmap *req =
-+ (struct ip_set_req_ipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_ipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_ipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __delip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+delip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __delip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ int newbytes;
-+ struct ip_set_req_ipmap_create *req =
-+ (struct ip_set_req_ipmap_create *) data;
-+ struct ip_set_ipmap *map;
-+
-+ if (size != sizeof(struct ip_set_req_ipmap_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_ipmap_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ DP("from %u.%u.%u.%u to %u.%u.%u.%u",
-+ HIPQUAD(req->from), HIPQUAD(req->to));
-+
-+ if (req->from > req->to) {
-+ DP("bad ip range");
-+ return -ENOEXEC;
-+ }
-+
-+ if (req->to - req->from > MAX_RANGE) {
-+ ip_set_printk("range too big (max %d addresses)",
-+ MAX_RANGE);
-+ return -ENOEXEC;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_ipmap), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_ipmap));
-+ return -ENOMEM;
-+ }
-+ map->first_ip = req->from;
-+ map->last_ip = req->to;
-+ map->netmask = req->netmask;
-+
-+ if (req->netmask == 0xFFFFFFFF) {
-+ map->hosts = 1;
-+ map->sizeid = map->last_ip - map->first_ip + 1;
-+ } else {
-+ unsigned int mask_bits, netmask_bits;
-+ ip_set_ip_t mask;
-+
-+ map->first_ip &= map->netmask; /* Should we better bark? */
-+
-+ mask = range_to_mask(map->first_ip, map->last_ip, &mask_bits);
-+ netmask_bits = mask_to_bits(map->netmask);
-+
-+ if (!mask || netmask_bits <= mask_bits)
-+ return -ENOEXEC;
-+
-+ map->hosts = 2 << (32 - netmask_bits - 1);
-+ map->sizeid = 2 << (netmask_bits - mask_bits - 1);
-+ }
-+ newbytes = bitmap_bytes(0, map->sizeid - 1);
-+ map->members = kmalloc(newbytes, GFP_KERNEL);
-+ if (!map->members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ kfree(map);
-+ return -ENOMEM;
-+ }
-+ memset(map->members, 0, newbytes);
-+
-+ set->data = map;
-+ return 0;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+
-+ kfree(map->members);
-+ kfree(map);
-+
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+ memset(map->members, 0, bitmap_bytes(0, map->sizeid - 1));
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+ struct ip_set_req_ipmap_create *header =
-+ (struct ip_set_req_ipmap_create *) data;
-+
-+ header->from = map->first_ip;
-+ header->to = map->last_ip;
-+ header->netmask = map->netmask;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+
-+ return bitmap_bytes(0, map->sizeid - 1);
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
-+ int bytes = bitmap_bytes(0, map->sizeid - 1);
-+
-+ memcpy(data, map->members, bytes);
-+}
-+
-+static struct ip_set_type ip_set_ipmap = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_IP,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_ipmap),
-+ .addip = &addip,
-+ .addip_kernel = &addip_kernel,
-+ .delip = &delip,
-+ .delip_kernel = &delip_kernel,
-+ .testip = &testip,
-+ .testip_kernel = &testip_kernel,
-+ .header_size = sizeof(struct ip_set_req_ipmap_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("ipmap type of IP sets");
-+
-+static int __init init(void)
-+{
-+ return ip_set_register_set_type(&ip_set_ipmap);
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_ipmap);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_iptree.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iptree.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_iptree.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iptree.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,510 @@
-+/* Copyright (C) 2005 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing an IP set type: the iptree type */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/slab.h>
-+#include <linux/delay.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_iptree.h>
-+
-+/* Garbage collection interval in seconds: */
-+#define IPTREE_GC_TIME 5*60
-+/* Sleep so many milliseconds before trying again
-+ * to delete the gc timer at destroying a set */
-+#define IPTREE_DESTROY_SLEEP 100
-+
-+static kmem_cache_t *branch_cachep;
-+static kmem_cache_t *leaf_cachep;
-+
-+#define ABCD(a,b,c,d,addrp) do { \
-+ a = ((unsigned char *)addrp)[3]; \
-+ b = ((unsigned char *)addrp)[2]; \
-+ c = ((unsigned char *)addrp)[1]; \
-+ d = ((unsigned char *)addrp)[0]; \
-+} while (0)
-+
-+#define TESTIP_WALK(map, elem, branch) do { \
-+ if ((map)->tree[elem]) { \
-+ branch = (map)->tree[elem]; \
-+ } else \
-+ return 0; \
-+} while (0)
-+
-+static inline int
-+__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+
-+ *hash_ip = ip;
-+ ABCD(a, b, c, d, hash_ip);
-+ DP("%u %u %u %u timeout %u", a, b, c, d, map->timeout);
-+ TESTIP_WALK(map, a, btree);
-+ TESTIP_WALK(btree, b, ctree);
-+ TESTIP_WALK(ctree, c, dtree);
-+ DP("%lu %lu", dtree->expires[d], jiffies);
-+ return !!(map->timeout ? (time_after(dtree->expires[d], jiffies))
-+ : dtree->expires[d]);
-+}
-+
-+static int
-+testip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_iptree *req =
-+ (struct ip_set_req_iptree *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iptree)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iptree),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __testip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+testip_kernel(struct ip_set *set,
-+ const struct sk_buff *skb,
-+ u_int32_t flags,
-+ ip_set_ip_t *hash_ip)
-+{
-+ int res;
-+
-+ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
-+ flags & IPSET_SRC ? "SRC" : "DST",
-+ NIPQUAD(skb->nh.iph->saddr),
-+ NIPQUAD(skb->nh.iph->daddr));
-+
-+ res = __testip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+ return (res < 0 ? 0 : res);
-+}
-+
-+#define ADDIP_WALK(map, elem, branch, type, cachep) do { \
-+ if ((map)->tree[elem]) { \
-+ DP("found %u", elem); \
-+ branch = (map)->tree[elem]; \
-+ } else { \
-+ branch = (type *) \
-+ kmem_cache_alloc(cachep, GFP_KERNEL); \
-+ if (branch == NULL) \
-+ return -ENOMEM; \
-+ memset(branch, 0, sizeof(*branch)); \
-+ (map)->tree[elem] = branch; \
-+ DP("alloc %u", elem); \
-+ } \
-+} while (0)
-+
-+static inline int
-+__addip(struct ip_set *set, ip_set_ip_t ip, unsigned int timeout,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+ int ret = 0;
-+
-+ *hash_ip = ip;
-+ ABCD(a, b, c, d, hash_ip);
-+ DP("%u %u %u %u timeout %u", a, b, c, d, timeout);
-+ ADDIP_WALK(map, a, btree, struct ip_set_iptreeb, branch_cachep);
-+ ADDIP_WALK(btree, b, ctree, struct ip_set_iptreec, branch_cachep);
-+ ADDIP_WALK(ctree, c, dtree, struct ip_set_iptreed, leaf_cachep);
-+ if (dtree->expires[d]
-+ && (!map->timeout || time_after(dtree->expires[d], jiffies)))
-+ ret = -EEXIST;
-+ dtree->expires[d] = map->timeout ? (timeout * HZ + jiffies) : 1;
-+ DP("%u %lu", d, dtree->expires[d]);
-+ return ret;
-+}
-+
-+static int
-+addip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_req_iptree *req =
-+ (struct ip_set_req_iptree *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iptree)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iptree),
-+ size);
-+ return -EINVAL;
-+ }
-+ DP("%u.%u.%u.%u %u", HIPQUAD(req->ip), req->timeout);
-+ return __addip(set, req->ip,
-+ req->timeout ? req->timeout : map->timeout,
-+ hash_ip);
-+}
-+
-+static int
-+addip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+
-+ return __addip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ map->timeout,
-+ hash_ip);
-+}
-+
-+#define DELIP_WALK(map, elem, branch) do { \
-+ if ((map)->tree[elem]) { \
-+ branch = (map)->tree[elem]; \
-+ } else \
-+ return -EEXIST; \
-+} while (0)
-+
-+static inline int
-+__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+
-+ *hash_ip = ip;
-+ ABCD(a, b, c, d, hash_ip);
-+ DELIP_WALK(map, a, btree);
-+ DELIP_WALK(btree, b, ctree);
-+ DELIP_WALK(ctree, c, dtree);
-+
-+ if (dtree->expires[d]) {
-+ dtree->expires[d] = 0;
-+ return 0;
-+ }
-+ return -EEXIST;
-+}
-+
-+static int
-+delip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_iptree *req =
-+ (struct ip_set_req_iptree *) data;
-+
-+ if (size != sizeof(struct ip_set_req_iptree)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iptree),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __delip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+delip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __delip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+#define LOOP_WALK_BEGIN(map, i, branch) \
-+ for (i = 0; i < 255; i++) { \
-+ if (!(map)->tree[i]) \
-+ continue; \
-+ branch = (map)->tree[i]
-+
-+#define LOOP_WALK_END }
-+
-+static void ip_tree_gc(unsigned long ul_set)
-+{
-+ struct ip_set *set = (void *) ul_set;
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+ unsigned char i,j,k;
-+
-+ i = j = k = 0;
-+ DP("gc: %s", set->name);
-+ write_lock_bh(&set->lock);
-+ LOOP_WALK_BEGIN(map, a, btree);
-+ LOOP_WALK_BEGIN(btree, b, ctree);
-+ LOOP_WALK_BEGIN(ctree, c, dtree);
-+ for (d = 0; d < 255; d++) {
-+ if (dtree->expires[d]) {
-+ DP("gc: %u %u %u %u: expires %lu jiffies %lu",
-+ a, b, c, d,
-+ dtree->expires[d], jiffies);
-+ if (map->timeout
-+ && time_before(dtree->expires[d], jiffies))
-+ dtree->expires[d] = 0;
-+ else
-+ k = 1;
-+ }
-+ }
-+ if (k == 0) {
-+ DP("gc: %s: leaf %u %u %u empty",
-+ set->name, a, b, c);
-+ kmem_cache_free(leaf_cachep, dtree);
-+ ctree->tree[c] = NULL;
-+ } else {
-+ DP("gc: %s: leaf %u %u %u not empty",
-+ set->name, a, b, c);
-+ j = 1;
-+ k = 0;
-+ }
-+ LOOP_WALK_END;
-+ if (j == 0) {
-+ DP("gc: %s: branch %u %u empty",
-+ set->name, a, b);
-+ kmem_cache_free(branch_cachep, ctree);
-+ btree->tree[b] = NULL;
-+ } else {
-+ DP("gc: %s: branch %u %u not empty",
-+ set->name, a, b);
-+ i = 1;
-+ j = k = 0;
-+ }
-+ LOOP_WALK_END;
-+ if (i == 0) {
-+ DP("gc: %s: branch %u empty",
-+ set->name, a);
-+ kmem_cache_free(branch_cachep, btree);
-+ map->tree[a] = NULL;
-+ } else {
-+ DP("gc: %s: branch %u not empty",
-+ set->name, a);
-+ i = j = k = 0;
-+ }
-+ LOOP_WALK_END;
-+ write_unlock_bh(&set->lock);
-+
-+ map->gc.expires = jiffies + map->gc_interval * HZ;
-+ add_timer(&map->gc);
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ struct ip_set_req_iptree_create *req =
-+ (struct ip_set_req_iptree_create *) data;
-+ struct ip_set_iptree *map;
-+
-+ if (size != sizeof(struct ip_set_req_iptree_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_iptree_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_iptree), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_iptree));
-+ return -ENOMEM;
-+ }
-+ memset(map, 0, sizeof(*map));
-+ map->timeout = req->timeout;
-+ set->data = map;
-+
-+ /* If there is no timeout for the entries,
-+ * we still have to call gc because delete
-+ * do not clean up empty branches */
-+ map->gc_interval = IPTREE_GC_TIME;
-+ init_timer(&map->gc);
-+ map->gc.data = (unsigned long) set;
-+ map->gc.function = ip_tree_gc;
-+ map->gc.expires = jiffies + map->gc_interval * HZ;
-+ add_timer(&map->gc);
-+
-+ return 0;
-+}
-+
-+static void __flush(struct ip_set_iptree *map)
-+{
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned int a,b,c;
-+
-+ LOOP_WALK_BEGIN(map, a, btree);
-+ LOOP_WALK_BEGIN(btree, b, ctree);
-+ LOOP_WALK_BEGIN(ctree, c, dtree);
-+ kmem_cache_free(leaf_cachep, dtree);
-+ LOOP_WALK_END;
-+ kmem_cache_free(branch_cachep, ctree);
-+ LOOP_WALK_END;
-+ kmem_cache_free(branch_cachep, btree);
-+ LOOP_WALK_END;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+
-+ while (!del_timer(&map->gc))
-+ msleep(IPTREE_DESTROY_SLEEP);
-+ __flush(map);
-+ kfree(map);
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ unsigned int timeout = map->timeout;
-+
-+ __flush(map);
-+ memset(map, 0, sizeof(*map));
-+ map->timeout = timeout;
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_req_iptree_create *header =
-+ (struct ip_set_req_iptree_create *) data;
-+
-+ header->timeout = map->timeout;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+ unsigned int count = 0;
-+
-+ LOOP_WALK_BEGIN(map, a, btree);
-+ LOOP_WALK_BEGIN(btree, b, ctree);
-+ LOOP_WALK_BEGIN(ctree, c, dtree);
-+ for (d = 0; d < 255; d++) {
-+ if (dtree->expires[d]
-+ && (!map->timeout || time_after(dtree->expires[d], jiffies)))
-+ count++;
-+ }
-+ LOOP_WALK_END;
-+ LOOP_WALK_END;
-+ LOOP_WALK_END;
-+
-+ DP("members %u", count);
-+ return (count * sizeof(struct ip_set_req_iptree));
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
-+ struct ip_set_iptreeb *btree;
-+ struct ip_set_iptreec *ctree;
-+ struct ip_set_iptreed *dtree;
-+ unsigned char a,b,c,d;
-+ size_t offset = 0;
-+ struct ip_set_req_iptree *entry;
-+
-+ LOOP_WALK_BEGIN(map, a, btree);
-+ LOOP_WALK_BEGIN(btree, b, ctree);
-+ LOOP_WALK_BEGIN(ctree, c, dtree);
-+ for (d = 0; d < 255; d++) {
-+ if (dtree->expires[d]
-+ && (!map->timeout || time_after(dtree->expires[d], jiffies))) {
-+ entry = (struct ip_set_req_iptree *)(data + offset);
-+ entry->ip = ((a << 24) | (b << 16) | (c << 8) | d);
-+ entry->timeout = !map->timeout ? 0
-+ : (dtree->expires[d] - jiffies)/HZ;
-+ offset += sizeof(struct ip_set_req_iptree);
-+ }
-+ }
-+ LOOP_WALK_END;
-+ LOOP_WALK_END;
-+ LOOP_WALK_END;
-+}
-+
-+static struct ip_set_type ip_set_iptree = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_IP,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_iptree),
-+ .addip = &addip,
-+ .addip_kernel = &addip_kernel,
-+ .delip = &delip,
-+ .delip_kernel = &delip_kernel,
-+ .testip = &testip,
-+ .testip_kernel = &testip_kernel,
-+ .header_size = sizeof(struct ip_set_req_iptree_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("iptree type of IP sets");
-+
-+static int __init init(void)
-+{
-+ int ret;
-+
-+ branch_cachep = kmem_cache_create("ip_set_iptreeb",
-+ sizeof(struct ip_set_iptreeb),
-+ 0, 0, NULL, NULL);
-+ if (!branch_cachep) {
-+ printk(KERN_ERR "Unable to create ip_set_iptreeb slab cache\n");
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+ leaf_cachep = kmem_cache_create("ip_set_iptreed",
-+ sizeof(struct ip_set_iptreed),
-+ 0, 0, NULL, NULL);
-+ if (!leaf_cachep) {
-+ printk(KERN_ERR "Unable to create ip_set_iptreed slab cache\n");
-+ ret = -ENOMEM;
-+ goto free_branch;
-+ }
-+ ret = ip_set_register_set_type(&ip_set_iptree);
-+ if (ret == 0)
-+ goto out;
-+
-+ kmem_cache_destroy(leaf_cachep);
-+ free_branch:
-+ kmem_cache_destroy(branch_cachep);
-+ out:
-+ return ret;
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_iptree);
-+ kmem_cache_destroy(leaf_cachep);
-+ kmem_cache_destroy(branch_cachep);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_macipmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_macipmap.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_macipmap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_macipmap.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,338 @@
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Martin Josefsson <gandalf@wlug.westbo.se>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing an IP set type: the macipmap type */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+#include <linux/if_ether.h>
-+#include <linux/vmalloc.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_malloc.h>
-+#include <linux/netfilter_ipv4/ip_set_macipmap.h>
-+
-+static int
-+testip(struct ip_set *set, const void *data, size_t size, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_macipmap *map = (struct ip_set_macipmap *) set->data;
-+ struct ip_set_macip *table = (struct ip_set_macip *) map->members;
-+ struct ip_set_req_macipmap *req = (struct ip_set_req_macipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_macipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_macipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ if (req->ip < map->first_ip || req->ip > map->last_ip)
-+ return -ERANGE;
-+
-+ *hash_ip = req->ip;
-+ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
-+ set->name, HIPQUAD(req->ip), HIPQUAD(*hash_ip));
-+ if (test_bit(IPSET_MACIP_ISSET,
-+ (void *) &table[req->ip - map->first_ip].flags)) {
-+ return (memcmp(req->ethernet,
-+ &table[req->ip - map->first_ip].ethernet,
-+ ETH_ALEN) == 0);
-+ } else {
-+ return (map->flags & IPSET_MACIP_MATCHUNSET ? 1 : 0);
-+ }
-+}
-+
-+static int
-+testip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+ struct ip_set_macip *table =
-+ (struct ip_set_macip *) map->members;
-+ ip_set_ip_t ip;
-+
-+ ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr);
-+ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
-+ flags & IPSET_SRC ? "SRC" : "DST",
-+ NIPQUAD(skb->nh.iph->saddr),
-+ NIPQUAD(skb->nh.iph->daddr));
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return 0;
-+
-+ *hash_ip = ip;
-+ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
-+ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ if (test_bit(IPSET_MACIP_ISSET,
-+ (void *) &table[ip - map->first_ip].flags)) {
-+ /* Is mac pointer valid?
-+ * If so, compare... */
-+ return (skb->mac.raw >= skb->head
-+ && (skb->mac.raw + ETH_HLEN) <= skb->data
-+ && (memcmp(eth_hdr(skb)->h_source,
-+ &table[ip - map->first_ip].ethernet,
-+ ETH_ALEN) == 0));
-+ } else {
-+ return (map->flags & IPSET_MACIP_MATCHUNSET ? 1 : 0);
-+ }
-+}
-+
-+/* returns 0 on success */
-+static inline int
-+__addip(struct ip_set *set,
-+ ip_set_ip_t ip, unsigned char *ethernet, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+ struct ip_set_macip *table =
-+ (struct ip_set_macip *) map->members;
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return -ERANGE;
-+ if (test_and_set_bit(IPSET_MACIP_ISSET,
-+ (void *) &table[ip - map->first_ip].flags))
-+ return -EEXIST;
-+
-+ *hash_ip = ip;
-+ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ memcpy(&table[ip - map->first_ip].ethernet, ethernet, ETH_ALEN);
-+ return 0;
-+}
-+
-+static int
-+addip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_macipmap *req =
-+ (struct ip_set_req_macipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_macipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_macipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __addip(set, req->ip, req->ethernet, hash_ip);
-+}
-+
-+static int
-+addip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ ip_set_ip_t ip;
-+
-+ ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr);
-+
-+ if (!(skb->mac.raw >= skb->head
-+ && (skb->mac.raw + ETH_HLEN) <= skb->data))
-+ return -EINVAL;
-+
-+ return __addip(set, ip, eth_hdr(skb)->h_source, hash_ip);
-+}
-+
-+static inline int
-+__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+ struct ip_set_macip *table =
-+ (struct ip_set_macip *) map->members;
-+
-+ if (ip < map->first_ip || ip > map->last_ip)
-+ return -ERANGE;
-+ if (!test_and_clear_bit(IPSET_MACIP_ISSET,
-+ (void *)&table[ip - map->first_ip].flags))
-+ return -EEXIST;
-+
-+ *hash_ip = ip;
-+ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
-+ return 0;
-+}
-+
-+static int
-+delip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_macipmap *req =
-+ (struct ip_set_req_macipmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_macipmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_macipmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __delip(set, req->ip, hash_ip);
-+}
-+
-+static int
-+delip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __delip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static inline size_t members_size(ip_set_id_t from, ip_set_id_t to)
-+{
-+ return (size_t)((to - from + 1) * sizeof(struct ip_set_macip));
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ int newbytes;
-+ struct ip_set_req_macipmap_create *req =
-+ (struct ip_set_req_macipmap_create *) data;
-+ struct ip_set_macipmap *map;
-+
-+ if (size != sizeof(struct ip_set_req_macipmap_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_macipmap_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ DP("from %u.%u.%u.%u to %u.%u.%u.%u",
-+ HIPQUAD(req->from), HIPQUAD(req->to));
-+
-+ if (req->from > req->to) {
-+ DP("bad ip range");
-+ return -ENOEXEC;
-+ }
-+
-+ if (req->to - req->from > MAX_RANGE) {
-+ ip_set_printk("range too big (max %d addresses)",
-+ MAX_RANGE);
-+ return -ENOEXEC;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_macipmap), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_macipmap));
-+ return -ENOMEM;
-+ }
-+ map->flags = req->flags;
-+ map->first_ip = req->from;
-+ map->last_ip = req->to;
-+ newbytes = members_size(map->first_ip, map->last_ip);
-+ map->members = ip_set_malloc(newbytes);
-+ if (!map->members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ kfree(map);
-+ return -ENOMEM;
-+ }
-+ memset(map->members, 0, newbytes);
-+
-+ set->data = map;
-+ return 0;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+
-+ ip_set_free(map->members, members_size(map->first_ip, map->last_ip));
-+ kfree(map);
-+
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+ memset(map->members, 0, members_size(map->first_ip, map->last_ip));
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+ struct ip_set_req_macipmap_create *header =
-+ (struct ip_set_req_macipmap_create *) data;
-+
-+ DP("list_header %x %x %u", map->first_ip, map->last_ip,
-+ map->flags);
-+
-+ header->from = map->first_ip;
-+ header->to = map->last_ip;
-+ header->flags = map->flags;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+
-+ return members_size(map->first_ip, map->last_ip);
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_macipmap *map =
-+ (struct ip_set_macipmap *) set->data;
-+
-+ int bytes = members_size(map->first_ip, map->last_ip);
-+
-+ memcpy(data, map->members, bytes);
-+}
-+
-+static struct ip_set_type ip_set_macipmap = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_IP,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_macipmap),
-+ .addip = &addip,
-+ .addip_kernel = &addip_kernel,
-+ .delip = &delip,
-+ .delip_kernel = &delip_kernel,
-+ .testip = &testip,
-+ .testip_kernel = &testip_kernel,
-+ .header_size = sizeof(struct ip_set_req_macipmap_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("macipmap type of IP sets");
-+
-+static int __init init(void)
-+{
-+ init_max_malloc_size();
-+ return ip_set_register_set_type(&ip_set_macipmap);
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_macipmap);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_nethash.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_nethash.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_nethash.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_nethash.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,449 @@
-+/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing a cidr nethash set */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+#include <linux/vmalloc.h>
-+#include <linux/random.h>
-+
-+#include <net/ip.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_malloc.h>
-+#include <linux/netfilter_ipv4/ip_set_nethash.h>
-+#include <linux/netfilter_ipv4/ip_set_jhash.h>
-+#include <linux/netfilter_ipv4/ip_set_prime.h>
-+
-+static inline __u32
-+jhash_ip(const struct ip_set_nethash *map, ip_set_ip_t ip)
-+{
-+ return jhash_1word(ip, map->initval);
-+}
-+
-+static inline __u32
-+randhash_ip(const struct ip_set_nethash *map, ip_set_ip_t ip)
-+{
-+ return (1 + ip % map->prime);
-+}
-+
-+static inline __u32
-+hash_id_cidr(struct ip_set_nethash *map,
-+ ip_set_ip_t ip,
-+ unsigned char cidr,
-+ ip_set_ip_t *hash_ip)
-+{
-+ __u32 jhash, randhash, id;
-+ u_int16_t i;
-+
-+ *hash_ip = pack(ip, cidr);
-+ jhash = jhash_ip(map, *hash_ip);
-+ randhash = randhash_ip(map, *hash_ip);
-+
-+ for (i = 0; i < map->probes; i++) {
-+ id = (jhash + i * randhash) % map->hashsize;
-+ DP("hash key: %u", id);
-+ if (map->members[id] == *hash_ip)
-+ return id;
-+ }
-+ return UINT_MAX;
-+}
-+
-+static inline __u32
-+hash_id(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ __u32 id = UINT_MAX;
-+ int i;
-+
-+ for (i = 0; i < 30 && map->cidr[i]; i++) {
-+ id = hash_id_cidr(map, ip, map->cidr[i], hash_ip);
-+ if (id != UINT_MAX)
-+ break;
-+ }
-+ return id;
-+}
-+
-+static inline int
-+__testip_cidr(struct ip_set *set, ip_set_ip_t ip, unsigned char cidr,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+
-+ return (hash_id_cidr(map, ip, cidr, hash_ip) != UINT_MAX);
-+}
-+
-+static inline int
-+__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
-+{
-+ return (hash_id(set, ip, hash_ip) != UINT_MAX);
-+}
-+
-+static int
-+testip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_nethash *req =
-+ (struct ip_set_req_nethash *) data;
-+
-+ if (size != sizeof(struct ip_set_req_nethash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_nethash),
-+ size);
-+ return -EINVAL;
-+ }
-+ return (req->cidr == 32 ? __testip(set, req->ip, hash_ip)
-+ : __testip_cidr(set, req->ip, req->cidr, hash_ip));
-+}
-+
-+static int
-+testip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ return __testip(set,
-+ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr),
-+ hash_ip);
-+}
-+
-+static inline int
-+__addip_base(struct ip_set_nethash *map, ip_set_ip_t ip)
-+{
-+ __u32 jhash, randhash, probe;
-+ u_int16_t i;
-+
-+ jhash = jhash_ip(map, ip);
-+ randhash = randhash_ip(map, ip);
-+
-+ for (i = 0; i < map->probes; i++) {
-+ probe = (jhash + i * randhash) % map->hashsize;
-+ if (map->members[probe] == ip)
-+ return -EEXIST;
-+ if (!map->members[probe]) {
-+ map->members[probe] = ip;
-+ return 0;
-+ }
-+ }
-+ /* Trigger rehashing */
-+ return -EAGAIN;
-+}
-+
-+static inline int
-+__addip(struct ip_set_nethash *map, ip_set_ip_t ip, unsigned char cidr,
-+ ip_set_ip_t *hash_ip)
-+{
-+ *hash_ip = pack(ip, cidr);
-+ DP("%u.%u.%u.%u/%u, %u.%u.%u.%u", HIPQUAD(ip), cidr, HIPQUAD(*hash_ip));
-+
-+ return __addip_base(map, *hash_ip);
-+}
-+
-+static void
-+update_cidr_sizes(struct ip_set_nethash *map, unsigned char cidr)
-+{
-+ unsigned char next;
-+ int i;
-+
-+ for (i = 0; i < 30 && map->cidr[i]; i++) {
-+ if (map->cidr[i] == cidr) {
-+ return;
-+ } else if (map->cidr[i] < cidr) {
-+ next = map->cidr[i];
-+ map->cidr[i] = cidr;
-+ cidr = next;
-+ }
-+ }
-+ if (i < 30)
-+ map->cidr[i] = cidr;
-+}
-+
-+static int
-+addip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_nethash *req =
-+ (struct ip_set_req_nethash *) data;
-+ int ret;
-+
-+ if (size != sizeof(struct ip_set_req_nethash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_nethash),
-+ size);
-+ return -EINVAL;
-+ }
-+ ret = __addip((struct ip_set_nethash *) set->data,
-+ req->ip, req->cidr, hash_ip);
-+
-+ if (ret == 0)
-+ update_cidr_sizes((struct ip_set_nethash *) set->data,
-+ req->cidr);
-+
-+ return ret;
-+}
-+
-+static int
-+addip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ int ret = -ERANGE;
-+ ip_set_ip_t ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr);
-+
-+ if (map->cidr[0])
-+ ret = __addip(map, ip, map->cidr[0], hash_ip);
-+
-+ return ret;
-+}
-+
-+static int retry(struct ip_set *set)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ ip_set_ip_t *members;
-+ u_int32_t i, hashsize;
-+ unsigned newbytes;
-+ int res;
-+ struct ip_set_nethash tmp = {
-+ .hashsize = map->hashsize,
-+ .probes = map->probes,
-+ .resize = map->resize
-+ };
-+
-+ if (map->resize == 0)
-+ return -ERANGE;
-+
-+ memcpy(tmp.cidr, map->cidr, 30 * sizeof(unsigned char));
-+ again:
-+ res = 0;
-+
-+ /* Calculate new parameters */
-+ get_random_bytes(&tmp.initval, 4);
-+ hashsize = tmp.hashsize + (tmp.hashsize * map->resize)/100;
-+ if (hashsize == tmp.hashsize)
-+ hashsize++;
-+ tmp.prime = make_prime(hashsize);
-+
-+ ip_set_printk("rehashing of set %s triggered: "
-+ "hashsize grows from %u to %u",
-+ set->name, tmp.hashsize, hashsize);
-+ tmp.hashsize = hashsize;
-+
-+ newbytes = hashsize * sizeof(ip_set_ip_t);
-+ tmp.members = ip_set_malloc_atomic(newbytes);
-+ if (!tmp.members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ return -ENOMEM;
-+ }
-+ memset(tmp.members, 0, newbytes);
-+
-+ write_lock_bh(&set->lock);
-+ map = (struct ip_set_nethash *) set->data; /* Play safe */
-+ for (i = 0; i < map->hashsize && res == 0; i++) {
-+ if (map->members[i])
-+ res = __addip_base(&tmp, map->members[i]);
-+ }
-+ if (res) {
-+ /* Failure, try again */
-+ write_unlock_bh(&set->lock);
-+ ip_set_free(tmp.members, newbytes);
-+ goto again;
-+ }
-+
-+ /* Success at resizing! */
-+ members = map->members;
-+ hashsize = map->hashsize;
-+
-+ map->initval = tmp.initval;
-+ map->prime = tmp.prime;
-+ map->hashsize = tmp.hashsize;
-+ map->members = tmp.members;
-+ write_unlock_bh(&set->lock);
-+
-+ ip_set_free(members, hashsize * sizeof(ip_set_ip_t));
-+
-+ return 0;
-+}
-+
-+static inline int
-+__delip(struct ip_set_nethash *map, ip_set_ip_t ip, unsigned char cidr,
-+ ip_set_ip_t *hash_ip)
-+{
-+ ip_set_ip_t id = hash_id_cidr(map, ip, cidr, hash_ip);
-+
-+ if (id == UINT_MAX)
-+ return -EEXIST;
-+
-+ map->members[id] = 0;
-+ return 0;
-+}
-+
-+static int
-+delip(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_req_nethash *req =
-+ (struct ip_set_req_nethash *) data;
-+
-+ if (size != sizeof(struct ip_set_req_nethash)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_nethash),
-+ size);
-+ return -EINVAL;
-+ }
-+ /* TODO: no garbage collection in map->cidr */
-+ return __delip((struct ip_set_nethash *) set->data,
-+ req->ip, req->cidr, hash_ip);
-+}
-+
-+static int
-+delip_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_ip)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ int ret = -ERANGE;
-+ ip_set_ip_t ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
-+ : skb->nh.iph->daddr);
-+
-+ if (map->cidr[0])
-+ ret = __delip(map, ip, map->cidr[0], hash_ip);
-+
-+ return ret;
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ unsigned newbytes;
-+ struct ip_set_req_nethash_create *req =
-+ (struct ip_set_req_nethash_create *) data;
-+ struct ip_set_nethash *map;
-+
-+ if (size != sizeof(struct ip_set_req_nethash_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_nethash_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ if (req->hashsize < 1) {
-+ ip_set_printk("hashsize too small");
-+ return -ENOEXEC;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_nethash), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_nethash));
-+ return -ENOMEM;
-+ }
-+ get_random_bytes(&map->initval, 4);
-+ map->prime = make_prime(req->hashsize);
-+ map->hashsize = req->hashsize;
-+ map->probes = req->probes;
-+ map->resize = req->resize;
-+ memset(map->cidr, 0, 30 * sizeof(unsigned char));
-+ newbytes = map->hashsize * sizeof(ip_set_ip_t);
-+ map->members = ip_set_malloc(newbytes);
-+ if (!map->members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ kfree(map);
-+ return -ENOMEM;
-+ }
-+ memset(map->members, 0, newbytes);
-+
-+ set->data = map;
-+ return 0;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+
-+ ip_set_free(map->members, map->hashsize * sizeof(ip_set_ip_t));
-+ kfree(map);
-+
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ memset(map->members, 0, map->hashsize * sizeof(ip_set_ip_t));
-+ memset(map->cidr, 0, 30 * sizeof(unsigned char));
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ struct ip_set_req_nethash_create *header =
-+ (struct ip_set_req_nethash_create *) data;
-+
-+ header->hashsize = map->hashsize;
-+ header->probes = map->probes;
-+ header->resize = map->resize;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+
-+ return (map->hashsize * sizeof(ip_set_ip_t));
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
-+ int bytes = map->hashsize * sizeof(ip_set_ip_t);
-+
-+ memcpy(data, map->members, bytes);
-+}
-+
-+static struct ip_set_type ip_set_nethash = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_IP,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_nethash),
-+ .addip = &addip,
-+ .addip_kernel = &addip_kernel,
-+ .retry = &retry,
-+ .delip = &delip,
-+ .delip_kernel = &delip_kernel,
-+ .testip = &testip,
-+ .testip_kernel = &testip_kernel,
-+ .header_size = sizeof(struct ip_set_req_nethash_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("nethash type of IP sets");
-+
-+static int __init init(void)
-+{
-+ return ip_set_register_set_type(&ip_set_nethash);
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_nethash);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_portmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_portmap.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_set_portmap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_portmap.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,325 @@
-+/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module implementing a port set type as a bitmap */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/tcp.h>
-+#include <linux/udp.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/errno.h>
-+#include <asm/uaccess.h>
-+#include <asm/bitops.h>
-+#include <linux/spinlock.h>
-+
-+#include <net/ip.h>
-+
-+#include <linux/netfilter_ipv4/ip_set_portmap.h>
-+
-+/* We must handle non-linear skbs */
-+static inline ip_set_ip_t
-+get_port(const struct sk_buff *skb, u_int32_t flags)
-+{
-+ struct iphdr *iph = skb->nh.iph;
-+ u_int16_t offset = ntohs(iph->frag_off) & IP_OFFSET;
-+
-+ switch (iph->protocol) {
-+ case IPPROTO_TCP: {
-+ struct tcphdr tcph;
-+
-+ /* See comments at tcp_match in ip_tables.c */
-+ if (offset)
-+ return INVALID_PORT;
-+
-+ if (skb_copy_bits(skb, skb->nh.iph->ihl*4, &tcph, sizeof(tcph)) < 0)
-+ /* No choice either */
-+ return INVALID_PORT;
-+
-+ return ntohs(flags & IPSET_SRC ?
-+ tcph.source : tcph.dest);
-+ }
-+ case IPPROTO_UDP: {
-+ struct udphdr udph;
-+
-+ if (offset)
-+ return INVALID_PORT;
-+
-+ if (skb_copy_bits(skb, skb->nh.iph->ihl*4, &udph, sizeof(udph)) < 0)
-+ /* No choice either */
-+ return INVALID_PORT;
-+
-+ return ntohs(flags & IPSET_SRC ?
-+ udph.source : udph.dest);
-+ }
-+ default:
-+ return INVALID_PORT;
-+ }
-+}
-+
-+static inline int
-+__testport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+
-+ if (port < map->first_port || port > map->last_port)
-+ return -ERANGE;
-+
-+ *hash_port = port;
-+ DP("set: %s, port:%u, %u", set->name, port, *hash_port);
-+ return !!test_bit(port - map->first_port, map->members);
-+}
-+
-+static int
-+testport(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_req_portmap *req =
-+ (struct ip_set_req_portmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_portmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_portmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __testport(set, req->port, hash_port);
-+}
-+
-+static int
-+testport_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_port)
-+{
-+ int res;
-+ ip_set_ip_t port = get_port(skb, flags);
-+
-+ DP("flag %s port %u", flags & IPSET_SRC ? "SRC" : "DST", port);
-+ if (port == INVALID_PORT)
-+ return 0;
-+
-+ res = __testport(set, port, hash_port);
-+
-+ return (res < 0 ? 0 : res);
-+}
-+
-+static inline int
-+__addport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+
-+ if (port < map->first_port || port > map->last_port)
-+ return -ERANGE;
-+ if (test_and_set_bit(port - map->first_port, map->members))
-+ return -EEXIST;
-+
-+ *hash_port = port;
-+ DP("port %u", port);
-+ return 0;
-+}
-+
-+static int
-+addport(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_req_portmap *req =
-+ (struct ip_set_req_portmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_portmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_portmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __addport(set, req->port, hash_port);
-+}
-+
-+static int
-+addport_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_port)
-+{
-+ ip_set_ip_t port = get_port(skb, flags);
-+
-+ if (port == INVALID_PORT)
-+ return -EINVAL;
-+
-+ return __addport(set, port, hash_port);
-+}
-+
-+static inline int
-+__delport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+
-+ if (port < map->first_port || port > map->last_port)
-+ return -ERANGE;
-+ if (!test_and_clear_bit(port - map->first_port, map->members))
-+ return -EEXIST;
-+
-+ *hash_port = port;
-+ DP("port %u", port);
-+ return 0;
-+}
-+
-+static int
-+delport(struct ip_set *set, const void *data, size_t size,
-+ ip_set_ip_t *hash_port)
-+{
-+ struct ip_set_req_portmap *req =
-+ (struct ip_set_req_portmap *) data;
-+
-+ if (size != sizeof(struct ip_set_req_portmap)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_portmap),
-+ size);
-+ return -EINVAL;
-+ }
-+ return __delport(set, req->port, hash_port);
-+}
-+
-+static int
-+delport_kernel(struct ip_set *set, const struct sk_buff *skb,
-+ u_int32_t flags, ip_set_ip_t *hash_port)
-+{
-+ ip_set_ip_t port = get_port(skb, flags);
-+
-+ if (port == INVALID_PORT)
-+ return -EINVAL;
-+
-+ return __delport(set, port, hash_port);
-+}
-+
-+static int create(struct ip_set *set, const void *data, size_t size)
-+{
-+ int newbytes;
-+ struct ip_set_req_portmap_create *req =
-+ (struct ip_set_req_portmap_create *) data;
-+ struct ip_set_portmap *map;
-+
-+ if (size != sizeof(struct ip_set_req_portmap_create)) {
-+ ip_set_printk("data length wrong (want %zu, have %zu)",
-+ sizeof(struct ip_set_req_portmap_create),
-+ size);
-+ return -EINVAL;
-+ }
-+
-+ DP("from %u to %u", req->from, req->to);
-+
-+ if (req->from > req->to) {
-+ DP("bad port range");
-+ return -ENOEXEC;
-+ }
-+
-+ if (req->to - req->from > MAX_RANGE) {
-+ ip_set_printk("range too big (max %d ports)",
-+ MAX_RANGE);
-+ return -ENOEXEC;
-+ }
-+
-+ map = kmalloc(sizeof(struct ip_set_portmap), GFP_KERNEL);
-+ if (!map) {
-+ DP("out of memory for %d bytes",
-+ sizeof(struct ip_set_portmap));
-+ return -ENOMEM;
-+ }
-+ map->first_port = req->from;
-+ map->last_port = req->to;
-+ newbytes = bitmap_bytes(req->from, req->to);
-+ map->members = kmalloc(newbytes, GFP_KERNEL);
-+ if (!map->members) {
-+ DP("out of memory for %d bytes", newbytes);
-+ kfree(map);
-+ return -ENOMEM;
-+ }
-+ memset(map->members, 0, newbytes);
-+
-+ set->data = map;
-+ return 0;
-+}
-+
-+static void destroy(struct ip_set *set)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+
-+ kfree(map->members);
-+ kfree(map);
-+
-+ set->data = NULL;
-+}
-+
-+static void flush(struct ip_set *set)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+ memset(map->members, 0, bitmap_bytes(map->first_port, map->last_port));
-+}
-+
-+static void list_header(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+ struct ip_set_req_portmap_create *header =
-+ (struct ip_set_req_portmap_create *) data;
-+
-+ DP("list_header %u %u", map->first_port, map->last_port);
-+
-+ header->from = map->first_port;
-+ header->to = map->last_port;
-+}
-+
-+static int list_members_size(const struct ip_set *set)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+
-+ return bitmap_bytes(map->first_port, map->last_port);
-+}
-+
-+static void list_members(const struct ip_set *set, void *data)
-+{
-+ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
-+ int bytes = bitmap_bytes(map->first_port, map->last_port);
-+
-+ memcpy(data, map->members, bytes);
-+}
-+
-+static struct ip_set_type ip_set_portmap = {
-+ .typename = SETTYPE_NAME,
-+ .typecode = IPSET_TYPE_PORT,
-+ .protocol_version = IP_SET_PROTOCOL_VERSION,
-+ .create = &create,
-+ .destroy = &destroy,
-+ .flush = &flush,
-+ .reqsize = sizeof(struct ip_set_req_portmap),
-+ .addip = &addport,
-+ .addip_kernel = &addport_kernel,
-+ .delip = &delport,
-+ .delip_kernel = &delport_kernel,
-+ .testip = &testport,
-+ .testip_kernel = &testport_kernel,
-+ .header_size = sizeof(struct ip_set_req_portmap_create),
-+ .list_header = &list_header,
-+ .list_members_size = &list_members_size,
-+ .list_members = &list_members,
-+ .me = THIS_MODULE,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("portmap type of IP sets");
-+
-+static int __init init(void)
-+{
-+ return ip_set_register_set_type(&ip_set_portmap);
-+}
-+
-+static void __exit fini(void)
-+{
-+ /* FIXME: possible race with ip_set_create() */
-+ ip_set_unregister_set_type(&ip_set_portmap);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_set.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_set.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_set.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_set.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,105 @@
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Martin Josefsson <gandalf@wlug.westbo.se>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* Kernel module to match an IP set. */
-+
-+#include <linux/module.h>
-+#include <linux/ip.h>
-+#include <linux/skbuff.h>
-+
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_set.h>
-+#include <linux/netfilter_ipv4/ipt_set.h>
-+
-+static inline int
-+match_set(const struct ipt_set_info *info,
-+ const struct sk_buff *skb,
-+ int inv)
-+{
-+ if (ip_set_testip_kernel(info->index, skb, info->flags))
-+ inv = !inv;
-+ return inv;
-+}
-+
-+static int
-+match(const struct sk_buff *skb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ const struct xt_match *match,
-+ const void *matchinfo,
-+ int offset,
-+ unsigned int protoff,
-+ int *hotdrop)
-+{
-+ const struct ipt_set_info_match *info = matchinfo;
-+
-+ return match_set(&info->match_set,
-+ skb,
-+ info->match_set.flags[0] & IPSET_MATCH_INV);
-+}
-+
-+static int
-+checkentry(const char *tablename,
-+ const void *ip,
-+ const struct xt_match *match,
-+ void *matchinfo,
-+ unsigned int hook_mask)
-+{
-+ struct ipt_set_info_match *info =
-+ (struct ipt_set_info_match *) matchinfo;
-+ ip_set_id_t index;
-+
-+ index = ip_set_get_byindex(info->match_set.index);
-+
-+ if (index == IP_SET_INVALID_ID) {
-+ ip_set_printk("Cannot find set indentified by id %u to match",
-+ info->match_set.index);
-+ return 0; /* error */
-+ }
-+ if (info->match_set.flags[IP_SET_MAX_BINDINGS] != 0) {
-+ ip_set_printk("That's nasty!");
-+ return 0; /* error */
-+ }
-+
-+ return 1;
-+}
-+
-+static void destroy(const struct xt_match *match, void *matchinfo)
-+{
-+ struct ipt_set_info_match *info = matchinfo;
-+
-+ ip_set_put(info->match_set.index);
-+}
-+
-+static struct ipt_match set_match = {
-+ .name = "set",
-+ .match = &match,
-+ .matchsize = sizeof(struct ipt_set_info_match),
-+ .checkentry = &checkentry,
-+ .destroy = &destroy,
-+ .me = THIS_MODULE
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("iptables IP set match module");
-+
-+static int __init init(void)
-+{
-+ return ipt_register_match(&set_match);
-+}
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_match(&set_match);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_SET.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_SET.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_SET.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_SET.c 2006-12-14 03:13:43.000000000 +0100
-@@ -0,0 +1,120 @@
-+/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
-+ * Patrick Schaaf <bof@bof.de>
-+ * Martin Josefsson <gandalf@wlug.westbo.se>
-+ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/* ipt_SET.c - netfilter target to manipulate IP sets */
-+
-+#include <linux/types.h>
-+#include <linux/ip.h>
-+#include <linux/timer.h>
-+#include <linux/module.h>
-+#include <linux/netfilter.h>
-+#include <linux/netdevice.h>
-+#include <linux/if.h>
-+#include <linux/inetdevice.h>
-+#include <net/protocol.h>
-+#include <net/checksum.h>
-+#include <linux/netfilter_ipv4.h>
-+#include <linux/netfilter_ipv4/ip_nat_rule.h>
-+#include <linux/netfilter_ipv4/ipt_set.h>
-+
-+static unsigned int
-+target(struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ unsigned int hooknum,
-+ const struct xt_target *target,
-+ const void *targinfo)
-+{
-+ const struct ipt_set_info_target *info = targinfo;
-+
-+ if (info->add_set.index != IP_SET_INVALID_ID)
-+ ip_set_addip_kernel(info->add_set.index,
-+ *pskb,
-+ info->add_set.flags);
-+ if (info->del_set.index != IP_SET_INVALID_ID)
-+ ip_set_delip_kernel(info->del_set.index,
-+ *pskb,
-+ info->del_set.flags);
-+
-+ return IPT_CONTINUE;
-+}
-+
-+static int
-+checkentry(const char *tablename,
-+ const void *e,
-+ const struct xt_target *target,
-+ void *targinfo,
-+ unsigned int hook_mask)
-+{
-+ struct ipt_set_info_target *info =
-+ (struct ipt_set_info_target *) targinfo;
-+ ip_set_id_t index;
-+
-+ if (info->add_set.index != IP_SET_INVALID_ID) {
-+ index = ip_set_get_byindex(info->add_set.index);
-+ if (index == IP_SET_INVALID_ID) {
-+ ip_set_printk("cannot find add_set index %u as target",
-+ info->add_set.index);
-+ return 0; /* error */
-+ }
-+ }
-+
-+ if (info->del_set.index != IP_SET_INVALID_ID) {
-+ index = ip_set_get_byindex(info->del_set.index);
-+ if (index == IP_SET_INVALID_ID) {
-+ ip_set_printk("cannot find del_set index %u as target",
-+ info->del_set.index);
-+ return 0; /* error */
-+ }
-+ }
-+ if (info->add_set.flags[IP_SET_MAX_BINDINGS] != 0
-+ || info->del_set.flags[IP_SET_MAX_BINDINGS] != 0) {
-+ ip_set_printk("That's nasty!");
-+ return 0; /* error */
-+ }
-+
-+ return 1;
-+}
-+
-+static void destroy(const struct xt_target *target, void *targetinfo)
-+{
-+ struct ipt_set_info_target *info = targetinfo;
-+
-+ if (info->add_set.index != IP_SET_INVALID_ID)
-+ ip_set_put(info->add_set.index);
-+ if (info->del_set.index != IP_SET_INVALID_ID)
-+ ip_set_put(info->del_set.index);
-+}
-+
-+static struct ipt_target SET_target = {
-+ .name = "SET",
-+ .target = target,
-+ .targetsize = sizeof(struct ipt_set_info_target),
-+ .checkentry = checkentry,
-+ .destroy = destroy,
-+ .me = THIS_MODULE
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
-+MODULE_DESCRIPTION("iptables IP set target module");
-+
-+static int __init init(void)
-+{
-+ return ipt_register_target(&SET_target);
-+}
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_target(&SET_target);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
---- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:41.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:43.000000000 +0100
-@@ -647,5 +647,106 @@
- Allows altering the ARP packet payload: source and destination
- hardware and network addresses.
-
-+config IP_NF_SET
-+ tristate "IP set support"
-+ depends on INET && NETFILTER
-+ help
-+ This option adds IP set support to the kernel.
-+ In order to define and use sets, you need the userspace utility
-+ ipset(8).
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_MAX
-+ int "Maximum number of IP sets"
-+ default 256
-+ range 2 65534
-+ depends on IP_NF_SET
-+ help
-+ You can define here default value of the maximum number
-+ of IP sets for the kernel.
-+
-+ The value can be overriden by the 'max_sets' module
-+ parameter of the 'ip_set' module.
-+
-+config IP_NF_SET_HASHSIZE
-+ int "Hash size for bindings of IP sets"
-+ default 1024
-+ depends on IP_NF_SET
-+ help
-+ You can define here default value of the hash size for
-+ bindings of IP sets.
-+
-+ The value can be overriden by the 'hash_size' module
-+ parameter of the 'ip_set' module.
-+
-+config IP_NF_SET_IPMAP
-+ tristate "ipmap set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the ipmap set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_MACIPMAP
-+ tristate "macipmap set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the macipmap set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_PORTMAP
-+ tristate "portmap set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the portmap set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_IPHASH
-+ tristate "iphash set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the iphash set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_NETHASH
-+ tristate "nethash set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the nethash set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_SET_IPTREE
-+ tristate "iptree set support"
-+ depends on IP_NF_SET
-+ help
-+ This option adds the iptree set type support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_MATCH_SET
-+ tristate "set match support"
-+ depends on IP_NF_SET
-+ help
-+ Set matching matches against given IP sets.
-+ You need the ipset utility to create and set up the sets.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+config IP_NF_TARGET_SET
-+ tristate "SET target support"
-+ depends on IP_NF_SET
-+ help
-+ The SET target makes possible to add/delete entries
-+ in IP sets.
-+ You need the ipset utility to create and set up the sets.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
-+
- endmenu
-
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
---- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:41.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:43.000000000 +0100
-@@ -54,6 +54,7 @@
-
- # matches
- obj-$(CONFIG_IP_NF_MATCH_HASHLIMIT) += ipt_hashlimit.o
-+obj-$(CONFIG_IP_NF_MATCH_SET) += ipt_set.o
- obj-$(CONFIG_IP_NF_MATCH_IPRANGE) += ipt_iprange.o
- obj-$(CONFIG_IP_NF_MATCH_OWNER) += ipt_owner.o
- obj-$(CONFIG_IP_NF_MATCH_TOS) += ipt_tos.o
-@@ -77,6 +78,17 @@
- obj-$(CONFIG_IP_NF_TARGET_LOG) += ipt_LOG.o
- obj-$(CONFIG_IP_NF_TARGET_ULOG) += ipt_ULOG.o
- obj-$(CONFIG_IP_NF_TARGET_TCPMSS) += ipt_TCPMSS.o
-+obj-$(CONFIG_IP_NF_TARGET_SET) += ipt_SET.o
-+
-+# sets
-+obj-$(CONFIG_IP_NF_SET) += ip_set.o
-+obj-$(CONFIG_IP_NF_SET_IPMAP) += ip_set_ipmap.o
-+obj-$(CONFIG_IP_NF_SET_PORTMAP) += ip_set_portmap.o
-+obj-$(CONFIG_IP_NF_SET_MACIPMAP) += ip_set_macipmap.o
-+obj-$(CONFIG_IP_NF_SET_IPHASH) += ip_set_iphash.o
-+obj-$(CONFIG_IP_NF_SET_NETHASH) += ip_set_nethash.o
-+obj-$(CONFIG_IP_NF_SET_IPTREE) += ip_set_iptree.o
-+
- obj-$(CONFIG_IP_NF_TARGET_CLUSTERIP) += ipt_CLUSTERIP.o
- obj-$(CONFIG_IP_NF_TARGET_TTL) += ipt_TTL.o
-
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_time.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_time.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_time.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_time.h 2006-12-14 03:13:45.000000000 +0100
-@@ -0,0 +1,18 @@
-+#ifndef __ipt_time_h_included__
-+#define __ipt_time_h_included__
-+
-+
-+struct ipt_time_info {
-+ u_int8_t days_match; /* 1 bit per day. -SMTWTFS */
-+ u_int16_t time_start; /* 0 < time_start < 23*60+59 = 1439 */
-+ u_int16_t time_stop; /* 0:0 < time_stat < 23:59 */
-+
-+ /* FIXME: Keep this one for userspace iptables binary compability: */
-+ u_int8_t kerneltime; /* ignore skb time (and use kerneltime) or not. */
-+
-+ time_t date_start;
-+ time_t date_stop;
-+};
-+
-+
-+#endif /* __ipt_time_h_included__ */
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_time.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_time.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_time.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_time.c 2006-12-14 03:13:45.000000000 +0100
-@@ -0,0 +1,178 @@
-+/*
-+ This is a module which is used for time matching
-+ It is using some modified code from dietlibc (localtime() function)
-+ that you can find at http://www.fefe.de/dietlibc/
-+ This file is distributed under the terms of the GNU General Public
-+ License (GPL). Copies of the GPL can be obtained from: ftp://prep.ai.mit.edu/pub/gnu/GPL
-+ 2001-05-04 Fabrice MARIE <fabrice@netfilter.org> : initial development.
-+ 2001-21-05 Fabrice MARIE <fabrice@netfilter.org> : bug fix in the match code,
-+ thanks to "Zeng Yu" <zengy@capitel.com.cn> for bug report.
-+ 2001-26-09 Fabrice MARIE <fabrice@netfilter.org> : force the match to be in LOCAL_IN or PRE_ROUTING only.
-+ 2001-30-11 Fabrice : added the possibility to use the match in FORWARD/OUTPUT with a little hack,
-+ added Nguyen Dang Phuoc Dong <dongnd@tlnet.com.vn> patch to support timezones.
-+ 2004-05-02 Fabrice : added support for date matching, from an idea of Fabien COELHO.
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ipt_time.h>
-+#include <linux/time.h>
-+
-+MODULE_AUTHOR("Fabrice MARIE <fabrice@netfilter.org>");
-+MODULE_DESCRIPTION("Match arrival timestamp/date");
-+MODULE_LICENSE("GPL");
-+
-+struct tm
-+{
-+ int tm_sec; /* Seconds. [0-60] (1 leap second) */
-+ int tm_min; /* Minutes. [0-59] */
-+ int tm_hour; /* Hours. [0-23] */
-+ int tm_mday; /* Day. [1-31] */
-+ int tm_mon; /* Month. [0-11] */
-+ int tm_year; /* Year - 1900. */
-+ int tm_wday; /* Day of week. [0-6] */
-+ int tm_yday; /* Days in year.[0-365] */
-+ int tm_isdst; /* DST. [-1/0/1]*/
-+
-+ long int tm_gmtoff; /* we don't care, we count from GMT */
-+ const char *tm_zone; /* we don't care, we count from GMT */
-+};
-+
-+void
-+localtime(const u32 time, struct tm *r);
-+
-+static int
-+match(const struct sk_buff *skb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ const struct xt_match *match,
-+ const void *matchinfo,
-+ int offset,
-+ unsigned int protoff,
-+ int *hotdrop)
-+{
-+ const struct ipt_time_info *info = matchinfo; /* match info for rule */
-+ struct tm currenttime; /* time human readable */
-+ u_int8_t days_of_week[7] = {64, 32, 16, 8, 4, 2, 1};
-+ u_int16_t packet_time;
-+
-+ /* We might not have a timestamp, get one */
-+ if (skb->tstamp.off_sec == 0)
-+ __net_timestamp((struct sk_buff *)skb);
-+
-+ /* First we make sure we are in the date start-stop boundaries */
-+ if ((skb->tstamp.off_sec < info->date_start) || (skb->tstamp.off_sec > info->date_stop))
-+ return 0; /* We are outside the date boundaries */
-+
-+ /* Transform the timestamp of the packet, in a human readable form */
-+ localtime(skb->tstamp.off_sec, ¤ttime);
-+
-+ /* check if we match this timestamp, we start by the days... */
-+ if ((days_of_week[currenttime.tm_wday] & info->days_match) != days_of_week[currenttime.tm_wday])
-+ return 0; /* the day doesn't match */
-+
-+ /* ... check the time now */
-+ packet_time = (currenttime.tm_hour * 60) + currenttime.tm_min;
-+ if ((packet_time < info->time_start) || (packet_time > info->time_stop))
-+ return 0;
-+
-+ /* here we match ! */
-+ return 1;
-+}
-+
-+static int
-+checkentry(const char *tablename,
-+ const void *ip,
-+ const struct xt_match *match,
-+ void *matchinfo,
-+ unsigned int hook_mask)
-+{
-+ struct ipt_time_info *info = matchinfo; /* match info for rule */
-+
-+ /* First, check that we are in the correct hooks */
-+ if (hook_mask
-+ & ~((1 << NF_IP_PRE_ROUTING) | (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) | (1 << NF_IP_LOCAL_OUT)))
-+ {
-+ printk("ipt_time: error, only valid for PRE_ROUTING, LOCAL_IN, FORWARD and OUTPUT)\n");
-+ return 0;
-+ }
-+
-+ /* Now check the coherence of the data ... */
-+ if ((info->time_start > 1439) || /* 23*60+59 = 1439*/
-+ (info->time_stop > 1439))
-+ {
-+ printk(KERN_WARNING "ipt_time: invalid argument\n");
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+static struct ipt_match time_match = {
-+ .name = "time",
-+ .match = &match,
-+ .matchsize = sizeof(struct ipt_time_info),
-+ .checkentry = &checkentry,
-+ .me = THIS_MODULE
-+};
-+
-+static int __init init(void)
-+{
-+ printk("ipt_time loading\n");
-+ return ipt_register_match(&time_match);
-+}
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_match(&time_match);
-+ printk("ipt_time unloaded\n");
-+}
-+
-+module_init(init);
-+module_exit(fini);
-+
-+
-+/* The part below is borowed and modified from dietlibc */
-+
-+/* seconds per day */
-+#define SPD 24*60*60
-+
-+void
-+localtime(const u32 time, struct tm *r) {
-+ u32 i, timep;
-+ extern struct timezone sys_tz;
-+ const unsigned int __spm[12] =
-+ { 0,
-+ (31),
-+ (31+28),
-+ (31+28+31),
-+ (31+28+31+30),
-+ (31+28+31+30+31),
-+ (31+28+31+30+31+30),
-+ (31+28+31+30+31+30+31),
-+ (31+28+31+30+31+30+31+31),
-+ (31+28+31+30+31+30+31+31+30),
-+ (31+28+31+30+31+30+31+31+30+31),
-+ (31+28+31+30+31+30+31+31+30+31+30),
-+ };
-+ register u32 work;
-+
-+ timep = time - (sys_tz.tz_minuteswest * 60);
-+ work=timep%(SPD);
-+ r->tm_sec=work%60; work/=60;
-+ r->tm_min=work%60; r->tm_hour=work/60;
-+ work=timep/(SPD);
-+ r->tm_wday=(4+work)%7;
-+ for (i=1970; ; ++i) {
-+ register time_t k= (!(i%4) && ((i%100) || !(i%400)))?366:365;
-+ if (work>k)
-+ work-=k;
-+ else
-+ break;
-+ }
-+ r->tm_year=i-1900;
-+ for (i=11; i && __spm[i]>work; --i) ;
-+ r->tm_mon=i;
-+ r->tm_mday=work-__spm[i]+1;
-+}
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
---- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:45.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:45.000000000 +0100
-@@ -263,6 +263,22 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+
-+config IP_NF_MATCH_TIME
-+ tristate 'TIME match support'
-+ depends on IP_NF_IPTABLES
-+ help
-+ This option adds a `time' match, which allows you
-+ to match based on the packet arrival time/date
-+ (arrival time/date at the machine which netfilter is running on) or
-+ departure time/date (for locally generated packets).
-+
-+ If you say Y here, try iptables -m time --help for more information.
-+ If you want to compile it as a module, say M here and read
-+
-+ Documentation/modules.txt. If unsure, say `N'.
-+
-+
- config IP_NF_MATCH_RECENT
- tristate "recent match support"
- depends on IP_NF_IPTABLES
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
---- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:45.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:45.000000000 +0100
-@@ -58,6 +58,7 @@
- obj-$(CONFIG_IP_NF_MATCH_IPRANGE) += ipt_iprange.o
- obj-$(CONFIG_IP_NF_MATCH_OWNER) += ipt_owner.o
- obj-$(CONFIG_IP_NF_MATCH_TOS) += ipt_tos.o
-+obj-$(CONFIG_IP_NF_MATCH_TIME) += ipt_time.o
- obj-$(CONFIG_IP_NF_MATCH_RECENT) += ipt_recent.o
- obj-$(CONFIG_IP_NF_MATCH_ECN) += ipt_ecn.o
- obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o
+++ /dev/null
-diff -urN linux-2.6.19/drivers/net/imq.c linux-2.6.19+imq/drivers/net/imq.c
---- linux-2.6.19/drivers/net/imq.c 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19+imq/drivers/net/imq.c 2006-12-05 23:01:02.000000000 +1030
-@@ -0,0 +1,402 @@
-+/*
-+ * Pseudo-driver for the intermediate queue device.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ *
-+ * Authors: Patrick McHardy, <kaber@trash.net>
-+ *
-+ * The first version was written by Martin Devera, <devik@cdi.cz>
-+ *
-+ * Credits: Jan Rafaj <imq2t@cedric.vabo.cz>
-+ * - Update patch to 2.4.21
-+ * Sebastian Strollo <sstrollo@nortelnetworks.com>
-+ * - Fix "Dead-loop on netdevice imq"-issue
-+ * Marcel Sebek <sebek64@post.cz>
-+ * - Update to 2.6.2-rc1
-+ *
-+ * After some time of inactivity there is a group taking care
-+ * of IMQ again: http://www.linuximq.net
-+ *
-+ *
-+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 including
-+ * the following changes:
-+ *
-+ * - Correction of ipv6 support "+"s issue (Hasso Tepper)
-+ * - Correction of imq_init_devs() issue that resulted in
-+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller)
-+ * - Addition of functionality to choose number of IMQ devices
-+ * during kernel config (Andre Correa)
-+ * - Addition of functionality to choose how IMQ hooks on
-+ * PRE and POSTROUTING (after or before NAT) (Andre Correa)
-+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa)
-+ *
-+ *
-+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were
-+ * released with almost no problems. 2.6.14-x was released
-+ * with some important changes: nfcache was removed; After
-+ * some weeks of trouble we figured out that some IMQ fields
-+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header.
-+ * These functions are correctly patched by this new patch version.
-+ *
-+ * Thanks for all who helped to figure out all the problems with
-+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX,
-+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully
-+ * I didn't forget anybody). I apologize again for my lack of time.
-+ *
-+ * More info at: http://www.linuximq.net/ (Andre Correa)
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/moduleparam.h>
-+#include <linux/skbuff.h>
-+#include <linux/netdevice.h>
-+#include <linux/rtnetlink.h>
-+#include <linux/if_arp.h>
-+#include <linux/netfilter.h>
-+#include <linux/netfilter_ipv4.h>
-+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
-+ #include <linux/netfilter_ipv6.h>
-+#endif
-+#include <linux/imq.h>
-+#include <net/pkt_sched.h>
-+
-+extern int qdisc_restart1(struct net_device *dev);
-+
-+static nf_hookfn imq_nf_hook;
-+
-+static struct nf_hook_ops imq_ingress_ipv4 = {
-+ .hook = imq_nf_hook,
-+ .owner = THIS_MODULE,
-+ .pf = PF_INET,
-+ .hooknum = NF_IP_PRE_ROUTING,
-+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
-+ .priority = NF_IP_PRI_MANGLE + 1
-+#else
-+ .priority = NF_IP_PRI_NAT_DST + 1
-+#endif
-+};
-+
-+static struct nf_hook_ops imq_egress_ipv4 = {
-+ .hook = imq_nf_hook,
-+ .owner = THIS_MODULE,
-+ .pf = PF_INET,
-+ .hooknum = NF_IP_POST_ROUTING,
-+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA)
-+ .priority = NF_IP_PRI_LAST
-+#else
-+ .priority = NF_IP_PRI_NAT_SRC - 1
-+#endif
-+};
-+
-+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
-+static struct nf_hook_ops imq_ingress_ipv6 = {
-+ .hook = imq_nf_hook,
-+ .owner = THIS_MODULE,
-+ .pf = PF_INET6,
-+ .hooknum = NF_IP6_PRE_ROUTING,
-+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
-+ .priority = NF_IP6_PRI_MANGLE + 1
-+#else
-+ .priority = NF_IP6_PRI_NAT_DST + 1
-+#endif
-+};
-+
-+static struct nf_hook_ops imq_egress_ipv6 = {
-+ .hook = imq_nf_hook,
-+ .owner = THIS_MODULE,
-+ .pf = PF_INET6,
-+ .hooknum = NF_IP6_POST_ROUTING,
-+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA)
-+ .priority = NF_IP6_PRI_LAST
-+#else
-+ .priority = NF_IP6_PRI_NAT_SRC - 1
-+#endif
-+};
-+#endif
-+
-+#if defined(CONFIG_IMQ_NUM_DEVS)
-+static unsigned int numdevs = CONFIG_IMQ_NUM_DEVS;
-+#else
-+static unsigned int numdevs = 2;
-+#endif
-+
-+static struct net_device *imq_devs;
-+
-+static struct net_device_stats *imq_get_stats(struct net_device *dev)
-+{
-+ return (struct net_device_stats *)dev->priv;
-+}
-+
-+/* called for packets kfree'd in qdiscs at places other than enqueue */
-+static void imq_skb_destructor(struct sk_buff *skb)
-+{
-+ struct nf_info *info = skb->nf_info;
-+
-+ if (info) {
-+ if (info->indev)
-+ dev_put(info->indev);
-+ if (info->outdev)
-+ dev_put(info->outdev);
-+ kfree(info);
-+ }
-+}
-+
-+static int imq_dev_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+ struct net_device_stats *stats = (struct net_device_stats*) dev->priv;
-+
-+ stats->tx_bytes += skb->len;
-+ stats->tx_packets++;
-+
-+ skb->imq_flags = 0;
-+ skb->destructor = NULL;
-+
-+ dev->trans_start = jiffies;
-+ nf_reinject(skb, skb->nf_info, NF_ACCEPT);
-+ return 0;
-+}
-+
-+static int imq_nf_queue(struct sk_buff *skb, struct nf_info *info, unsigned queue_num, void *data)
-+{
-+ struct net_device *dev;
-+ struct net_device_stats *stats;
-+ struct sk_buff *skb2 = NULL;
-+ struct Qdisc *q;
-+ unsigned int index = skb->imq_flags&IMQ_F_IFMASK;
-+ int ret = -1;
-+
-+ if (index > numdevs)
-+ return -1;
-+
-+ dev = imq_devs + index;
-+ if (!(dev->flags & IFF_UP)) {
-+ skb->imq_flags = 0;
-+ nf_reinject(skb, info, NF_ACCEPT);
-+ return 0;
-+ }
-+ dev->last_rx = jiffies;
-+
-+ if (skb->destructor) {
-+ skb2 = skb;
-+ skb = skb_clone(skb, GFP_ATOMIC);
-+ if (!skb)
-+ return -1;
-+ }
-+ skb->nf_info = info;
-+
-+ stats = (struct net_device_stats *)dev->priv;
-+ stats->rx_bytes+= skb->len;
-+ stats->rx_packets++;
-+
-+ spin_lock_bh(&dev->queue_lock);
-+ q = dev->qdisc;
-+ if (q->enqueue) {
-+ q->enqueue(skb_get(skb), q);
-+ if (skb_shared(skb)) {
-+ skb->destructor = imq_skb_destructor;
-+ kfree_skb(skb);
-+ ret = 0;
-+ }
-+ }
-+ if (spin_is_locked(&dev->_xmit_lock))
-+ netif_schedule(dev);
-+ else
-+ while (!netif_queue_stopped(dev) && qdisc_restart1(dev) < 0)
-+ /* NOTHING */;
-+
-+ spin_unlock_bh(&dev->queue_lock);
-+
-+ if (skb2)
-+ kfree_skb(ret ? skb : skb2);
-+
-+ return ret;
-+}
-+
-+static struct nf_queue_handler nfqh = {
-+ .name = "imq",
-+ .outfn = imq_nf_queue,
-+};
-+
-+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff **pskb,
-+ const struct net_device *indev,
-+ const struct net_device *outdev,
-+ int (*okfn)(struct sk_buff *))
-+{
-+ if ((*pskb)->imq_flags & IMQ_F_ENQUEUE)
-+ return NF_QUEUE;
-+
-+ return NF_ACCEPT;
-+}
-+
-+
-+static int __init imq_init_hooks(void)
-+{
-+ int err;
-+
-+ err = nf_register_queue_handler(PF_INET, &nfqh);
-+ if (err > 0)
-+ goto err1;
-+ if ((err = nf_register_hook(&imq_ingress_ipv4)))
-+ goto err2;
-+ if ((err = nf_register_hook(&imq_egress_ipv4)))
-+ goto err3;
-+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
-+ if ((err = nf_register_queue_handler(PF_INET6, &nfqh)))
-+ goto err4;
-+ if ((err = nf_register_hook(&imq_ingress_ipv6)))
-+ goto err5;
-+ if ((err = nf_register_hook(&imq_egress_ipv6)))
-+ goto err6;
-+#endif
-+
-+ return 0;
-+
-+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
-+err6:
-+ nf_unregister_hook(&imq_ingress_ipv6);
-+err5:
-+ nf_unregister_queue_handler(PF_INET6);
-+err4:
-+ nf_unregister_hook(&imq_egress_ipv6);
-+#endif
-+err3:
-+ nf_unregister_hook(&imq_ingress_ipv4);
-+err2:
-+ nf_unregister_queue_handler(PF_INET);
-+err1:
-+ return err;
-+}
-+
-+static void __exit imq_unhook(void)
-+{
-+ nf_unregister_hook(&imq_ingress_ipv4);
-+ nf_unregister_hook(&imq_egress_ipv4);
-+ nf_unregister_queue_handler(PF_INET);
-+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
-+ nf_unregister_hook(&imq_ingress_ipv6);
-+ nf_unregister_hook(&imq_egress_ipv6);
-+ nf_unregister_queue_handler(PF_INET6);
-+#endif
-+}
-+
-+static int __init imq_dev_init(struct net_device *dev)
-+{
-+ dev->hard_start_xmit = imq_dev_xmit;
-+ dev->type = ARPHRD_VOID;
-+ dev->mtu = 1500;
-+ dev->tx_queue_len = 30;
-+ dev->flags = IFF_NOARP;
-+ dev->priv = kmalloc(sizeof(struct net_device_stats), GFP_KERNEL);
-+ if (dev->priv == NULL)
-+ return -ENOMEM;
-+ memset(dev->priv, 0, sizeof(struct net_device_stats));
-+ dev->get_stats = imq_get_stats;
-+
-+ return 0;
-+}
-+
-+static void imq_dev_uninit(struct net_device *dev)
-+{
-+ kfree(dev->priv);
-+}
-+
-+static int __init imq_init_devs(void)
-+{
-+ struct net_device *dev;
-+ int i,j;
-+ j = numdevs;
-+
-+ if (!numdevs || numdevs > IMQ_MAX_DEVS) {
-+ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n",
-+ IMQ_MAX_DEVS);
-+ return -EINVAL;
-+ }
-+
-+ imq_devs = kmalloc(sizeof(struct net_device) * numdevs, GFP_KERNEL);
-+ if (!imq_devs)
-+ return -ENOMEM;
-+ memset(imq_devs, 0, sizeof(struct net_device) * numdevs);
-+
-+ /* we start counting at zero */
-+ numdevs--;
-+
-+ for (i = 0, dev = imq_devs; i <= numdevs; i++, dev++) {
-+ SET_MODULE_OWNER(dev);
-+ strcpy(dev->name, "imq%d");
-+ dev->init = imq_dev_init;
-+ dev->uninit = imq_dev_uninit;
-+
-+ if (register_netdev(dev) < 0)
-+ goto err_register;
-+ }
-+ printk(KERN_INFO "IMQ starting with %u devices...\n", j);
-+ return 0;
-+
-+err_register:
-+ for (; i; i--)
-+ unregister_netdev(--dev);
-+ kfree(imq_devs);
-+ return -EIO;
-+}
-+
-+static void imq_cleanup_devs(void)
-+{
-+ int i;
-+ struct net_device *dev = imq_devs;
-+
-+ for (i = 0; i <= numdevs; i++)
-+ unregister_netdev(dev++);
-+
-+ kfree(imq_devs);
-+}
-+
-+static int __init imq_init_module(void)
-+{
-+ int err;
-+
-+ if ((err = imq_init_devs())) {
-+ printk(KERN_ERR "IMQ: Error trying imq_init_devs()\n");
-+ return err;
-+ }
-+ if ((err = imq_init_hooks())) {
-+ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n");
-+ imq_cleanup_devs();
-+ return err;
-+ }
-+
-+ printk(KERN_INFO "IMQ driver loaded successfully.\n");
-+
-+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
-+ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n");
-+#else
-+ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n");
-+#endif
-+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB)
-+ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n");
-+#else
-+ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n");
-+#endif
-+
-+ return 0;
-+}
-+
-+static void __exit imq_cleanup_module(void)
-+{
-+ imq_unhook();
-+ imq_cleanup_devs();
-+ printk(KERN_INFO "IMQ driver unloaded successfully.\n");
-+}
-+
-+
-+module_init(imq_init_module);
-+module_exit(imq_cleanup_module);
-+
-+module_param(numdevs, int, 0);
-+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will be created)");
-+MODULE_AUTHOR("http://www.linuximq.net");
-+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
-+MODULE_LICENSE("GPL");
-diff -urN linux-2.6.19/drivers/net/Kconfig linux-2.6.19+imq/drivers/net/Kconfig
---- linux-2.6.19/drivers/net/Kconfig 2006-12-01 14:05:30.000000000 +1030
-+++ linux-2.6.19+imq/drivers/net/Kconfig 2006-12-05 23:03:52.000000000 +1030
-@@ -96,6 +96,129 @@
- To compile this driver as a module, choose M here: the module
- will be called eql. If unsure, say N.
-
-+config IMQ
-+ tristate "IMQ (intermediate queueing device) support"
-+ depends on NETDEVICES && NETFILTER
-+ ---help---
-+ The IMQ device(s) is used as placeholder for QoS queueing
-+ disciplines. Every packet entering/leaving the IP stack can be
-+ directed through the IMQ device where it's enqueued/dequeued to the
-+ attached qdisc. This allows you to treat network devices as classes
-+ and distribute bandwidth among them. Iptables is used to specify
-+ through which IMQ device, if any, packets travel.
-+
-+ More information at: http://www.linuximq.net/
-+
-+ To compile this driver as a module, choose M here: the module
-+ will be called imq. If unsure, say N.
-+
-+choice
-+ prompt "IMQ behavior (PRE/POSTROUTING)"
-+ depends on IMQ
-+ default IMQ_BEHAVIOR_BA
-+ help
-+
-+ This settings defines how IMQ behaves in respect to its
-+ hooking in PREROUTING and POSTROUTING.
-+
-+ IMQ can work in any of the following ways:
-+
-+ PREROUTING | POSTROUTING
-+ -----------------|-------------------
-+ #1 After NAT | After NAT
-+ #2 After NAT | Before NAT
-+ #3 Before NAT | After NAT
-+ #4 Before NAT | Before NAT
-+
-+ The default behavior is to hook before NAT on PREROUTING
-+ and after NAT on POSTROUTING (#3).
-+
-+ This settings are specially usefull when trying to use IMQ
-+ to shape NATed clients.
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
-+config IMQ_BEHAVIOR_AA
-+ bool "IMQ AA"
-+ help
-+ This settings defines how IMQ behaves in respect to its
-+ hooking in PREROUTING and POSTROUTING.
-+
-+ Choosing this option will make IMQ hook like this:
-+
-+ PREROUTING: After NAT
-+ POSTROUTING: After NAT
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
-+config IMQ_BEHAVIOR_AB
-+ bool "IMQ AB"
-+ help
-+ This settings defines how IMQ behaves in respect to its
-+ hooking in PREROUTING and POSTROUTING.
-+
-+ Choosing this option will make IMQ hook like this:
-+
-+ PREROUTING: After NAT
-+ POSTROUTING: Before NAT
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
-+config IMQ_BEHAVIOR_BA
-+ bool "IMQ BA"
-+ help
-+ This settings defines how IMQ behaves in respect to its
-+ hooking in PREROUTING and POSTROUTING.
-+
-+ Choosing this option will make IMQ hook like this:
-+
-+ PREROUTING: Before NAT
-+ POSTROUTING: After NAT
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
-+config IMQ_BEHAVIOR_BB
-+ bool "IMQ BB"
-+ help
-+ This settings defines how IMQ behaves in respect to its
-+ hooking in PREROUTING and POSTROUTING.
-+
-+ Choosing this option will make IMQ hook like this:
-+
-+ PREROUTING: Before NAT
-+ POSTROUTING: Before NAT
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
-+endchoice
-+
-+config IMQ_NUM_DEVS
-+
-+ int "Number of IMQ devices"
-+ range 2 8
-+ depends on IMQ
-+ default "2"
-+ help
-+
-+ This settings defines how many IMQ devices will be
-+ created.
-+
-+ The default value is 2.
-+
-+ More information can be found at: www.linuximq.net
-+
-+ If not sure leave the default settings alone.
-+
- config TUN
- tristate "Universal TUN/TAP device driver support"
- select CRC32
-diff -urN linux-2.6.19/drivers/net/Makefile linux-2.6.19+imq/drivers/net/Makefile
---- linux-2.6.19/drivers/net/Makefile 2006-12-01 14:05:30.000000000 +1030
-+++ linux-2.6.19+imq/drivers/net/Makefile 2006-12-04 12:41:01.000000000 +1030
-@@ -124,6 +124,7 @@
- obj-$(CONFIG_SLHC) += slhc.o
-
- obj-$(CONFIG_DUMMY) += dummy.o
-+obj-$(CONFIG_IMQ) += imq.o
- obj-$(CONFIG_IFB) += ifb.o
- obj-$(CONFIG_DE600) += de600.o
- obj-$(CONFIG_DE620) += de620.o
-diff -urN linux-2.6.19/include/linux/imq.h linux-2.6.19+imq/include/linux/imq.h
---- linux-2.6.19/include/linux/imq.h 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19+imq/include/linux/imq.h 2006-12-04 12:41:01.000000000 +1030
-@@ -0,0 +1,9 @@
-+#ifndef _IMQ_H
-+#define _IMQ_H
-+
-+#define IMQ_MAX_DEVS 16
-+
-+#define IMQ_F_IFMASK 0x7f
-+#define IMQ_F_ENQUEUE 0x80
-+
-+#endif /* _IMQ_H */
-diff -urN linux-2.6.19/include/linux/netfilter_ipv4/ipt_IMQ.h linux-2.6.19+imq/include/linux/netfilter_ipv4/ipt_IMQ.h
---- linux-2.6.19/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19+imq/include/linux/netfilter_ipv4/ipt_IMQ.h 2006-12-05 23:04:22.000000000 +1030
-@@ -0,0 +1,8 @@
-+#ifndef _IPT_IMQ_H
-+#define _IPT_IMQ_H
-+
-+struct ipt_imq_info {
-+ unsigned int todev; /* target imq device */
-+};
-+
-+#endif /* _IPT_IMQ_H */
-diff -urN linux-2.6.19/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-2.6.19+imq/include/linux/netfilter_ipv6/ip6t_IMQ.h
---- linux-2.6.19/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19+imq/include/linux/netfilter_ipv6/ip6t_IMQ.h 2006-12-05 23:04:32.000000000 +1030
-@@ -0,0 +1,8 @@
-+#ifndef _IP6T_IMQ_H
-+#define _IP6T_IMQ_H
-+
-+struct ip6t_imq_info {
-+ unsigned int todev; /* target imq device */
-+};
-+
-+#endif /* _IP6T_IMQ_H */
-diff -urN linux-2.6.19/include/linux/skbuff.h linux-2.6.19+imq/include/linux/skbuff.h
---- linux-2.6.19/include/linux/skbuff.h 2006-12-01 14:05:44.000000000 +1030
-+++ linux-2.6.19+imq/include/linux/skbuff.h 2006-12-05 23:05:06.000000000 +1030
-@@ -292,6 +292,10 @@
- #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE)
- struct sk_buff *nfct_reasm;
- #endif
-+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
-+ unsigned char imq_flags;
-+ struct nf_info *nf_info;
-+#endif
- #ifdef CONFIG_BRIDGE_NETFILTER
- struct nf_bridge_info *nf_bridge;
- #endif
-diff -urN linux-2.6.19/net/core/dev.c linux-2.6.19+imq/net/core/dev.c
---- linux-2.6.19/net/core/dev.c 2006-12-01 14:05:45.000000000 +1030
-+++ linux-2.6.19+imq/net/core/dev.c 2006-12-05 23:05:40.000000000 +1030
-@@ -94,6 +94,9 @@
- #include <linux/skbuff.h>
- #include <net/sock.h>
- #include <linux/rtnetlink.h>
-+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
-+#include <linux/imq.h>
-+#endif
- #include <linux/proc_fs.h>
- #include <linux/seq_file.h>
- #include <linux/stat.h>
-@@ -1344,7 +1347,11 @@
- int dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
- {
- if (likely(!skb->next)) {
-- if (netdev_nit)
-+ if (netdev_nit
-+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
-+ && !(skb->imq_flags & IMQ_F_ENQUEUE)
-+#endif
-+ )
- dev_queue_xmit_nit(skb, dev);
-
- if (netif_needs_gso(dev, skb)) {
-diff -urN linux-2.6.19/net/core/skbuff.c linux-2.6.19+imq/net/core/skbuff.c
---- linux-2.6.19/net/core/skbuff.c 2006-12-01 14:05:45.000000000 +1030
-+++ linux-2.6.19+imq/net/core/skbuff.c 2006-12-04 12:41:01.000000000 +1030
-@@ -482,6 +482,10 @@
- C(nfct_reasm);
- nf_conntrack_get_reasm(skb->nfct_reasm);
- #endif
-+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
-+ C(imq_flags);
-+ C(nf_info);
-+#endif /*CONFIG_IMQ*/
- #ifdef CONFIG_BRIDGE_NETFILTER
- C(nf_bridge);
- nf_bridge_get(skb->nf_bridge);
-@@ -546,6 +550,10 @@
- #if defined(CONFIG_IP_VS) || defined(CONFIG_IP_VS_MODULE)
- new->ipvs_property = old->ipvs_property;
- #endif
-+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
-+ new->imq_flags = old->imq_flags;
-+ new->nf_info = old->nf_info;
-+#endif /*CONFIG_IMQ*/
- #ifdef CONFIG_BRIDGE_NETFILTER
- new->nf_bridge = old->nf_bridge;
- nf_bridge_get(old->nf_bridge);
-diff -urN linux-2.6.19/net/ipv4/netfilter/ipt_IMQ.c linux-2.6.19+imq/net/ipv4/netfilter/ipt_IMQ.c
---- linux-2.6.19/net/ipv4/netfilter/ipt_IMQ.c 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19.2/net/ipv4/netfilter/ipt_IMQ.c 2007-01-25 09:59:34.000000000 +0100
-@@ -0,0 +1,71 @@
-+/*
-+ * This target marks packets to be enqueued to an imq device
-+ */
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ipt_IMQ.h>
-+#include <linux/imq.h>
-+
-+static unsigned int imq_target(struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ unsigned int hooknum,
-+ const struct xt_target *target,
-+ const void *targinfo)
-+{
-+ struct ipt_imq_info *mr = (struct ipt_imq_info*)targinfo;
-+
-+ (*pskb)->imq_flags = mr->todev | IMQ_F_ENQUEUE;
-+
-+ return IPT_CONTINUE;
-+}
-+
-+static int imq_checkentry(const char *tablename,
-+ const void *e,
-+ const struct xt_target *target,
-+ void *targinfo,
-+ unsigned int hook_mask)
-+{
-+ struct ipt_imq_info *mr;
-+
-+ mr = (struct ipt_imq_info*)targinfo;
-+
-+ if (mr->todev > IMQ_MAX_DEVS) {
-+ printk(KERN_WARNING
-+ "IMQ: invalid device specified, highest is %u\n",
-+ IMQ_MAX_DEVS);
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+static struct ipt_target ipt_imq_reg = {
-+ .name = "IMQ",
-+ .target = imq_target,
-+ .targetsize = sizeof(struct ipt_imq_info),
-+ .checkentry = imq_checkentry,
-+ .me = THIS_MODULE,
-+ .table = "mangle"
-+};
-+
-+static int __init init(void)
-+{
-+ if (ipt_register_target(&ipt_imq_reg))
-+ return -EINVAL;
-+
-+ return 0;
-+}
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_target(&ipt_imq_reg);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-+
-+MODULE_AUTHOR("http://www.linuximq.net");
-+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
-+MODULE_LICENSE("GPL");
-diff -urN linux-2.6.19/net/ipv4/netfilter/Kconfig linux-2.6.19+imq/net/ipv4/netfilter/Kconfig
---- linux-2.6.19/net/ipv4/netfilter/Kconfig 2006-12-01 14:05:45.000000000 +1030
-+++ linux-2.6.19+imq/net/ipv4/netfilter/Kconfig 2006-12-04 12:41:01.000000000 +1030
-@@ -533,6 +533,17 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP_NF_TARGET_IMQ
-+ tristate "IMQ target support"
-+ depends on IP_NF_MANGLE
-+ help
-+ This option adds a `IMQ' target which is used to specify if and
-+ to which IMQ device packets should get enqueued/dequeued.
-+
-+ For more information visit: http://www.linuximq.net/
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
- config IP_NF_TARGET_TOS
- tristate "TOS target support"
- depends on IP_NF_MANGLE
-diff -urN linux-2.6.19/net/ipv4/netfilter/Makefile linux-2.6.19+imq/net/ipv4/netfilter/Makefile
---- linux-2.6.19/net/ipv4/netfilter/Makefile 2006-12-01 14:05:45.000000000 +1030
-+++ linux-2.6.19+imq/net/ipv4/netfilter/Makefile 2006-12-04 12:41:01.000000000 +1030
-@@ -67,6 +67,7 @@
- obj-$(CONFIG_IP_NF_TARGET_REJECT) += ipt_REJECT.o
- obj-$(CONFIG_IP_NF_TARGET_TOS) += ipt_TOS.o
- obj-$(CONFIG_IP_NF_TARGET_ECN) += ipt_ECN.o
-+obj-$(CONFIG_IP_NF_TARGET_IMQ) += ipt_IMQ.o
- obj-$(CONFIG_IP_NF_TARGET_MASQUERADE) += ipt_MASQUERADE.o
- obj-$(CONFIG_IP_NF_TARGET_REDIRECT) += ipt_REDIRECT.o
- obj-$(CONFIG_IP_NF_TARGET_NETMAP) += ipt_NETMAP.o
-diff -urN linux-2.6.19/net/ipv6/netfilter/ip6t_IMQ.c linux-2.6.19+imq/net/ipv6/netfilter/ip6t_IMQ.c
---- linux-2.6.19/net/ipv6/netfilter/ip6t_IMQ.c 1970-01-01 09:30:00.000000000 +0930
-+++ linux-2.6.19.2/net/ipv6/netfilter/ip6t_IMQ.c 2007-01-25 10:06:41.000000000 +0100
-@@ -0,0 +1,71 @@
-+/*
-+ * This target marks packets to be enqueued to an imq device
-+ */
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/netfilter_ipv6/ip6_tables.h>
-+#include <linux/netfilter_ipv6/ip6t_IMQ.h>
-+#include <linux/imq.h>
-+
-+static unsigned int imq_target(struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ unsigned int hooknum,
-+ const struct xt_target *target,
-+ const void *targinfo)
-+{
-+ struct ip6t_imq_info *mr = (struct ip6t_imq_info*)targinfo;
-+
-+ (*pskb)->imq_flags = mr->todev | IMQ_F_ENQUEUE;
-+
-+ return IP6T_CONTINUE;
-+}
-+
-+static int imq_checkentry(const char *tablename,
-+ const void *entry,
-+ const struct xt_target *target,
-+ void *targinfo,
-+ unsigned int hook_mask)
-+{
-+ struct ip6t_imq_info *mr;
-+
-+ mr = (struct ip6t_imq_info*)targinfo;
-+
-+ if (mr->todev > IMQ_MAX_DEVS) {
-+ printk(KERN_WARNING
-+ "IMQ: invalid device specified, highest is %u\n",
-+ IMQ_MAX_DEVS);
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+static struct ip6t_target ip6t_imq_reg = {
-+ .name = "IMQ",
-+ .target = imq_target,
-+ .targetsize = sizeof(struct ip6t_imq_info),
-+ .table = "mangle",
-+ .checkentry = imq_checkentry,
-+ .me = THIS_MODULE
-+};
-+
-+static int __init init(void)
-+{
-+ if (ip6t_register_target(&ip6t_imq_reg))
-+ return -EINVAL;
-+
-+ return 0;
-+}
-+
-+static void __exit fini(void)
-+{
-+ ip6t_unregister_target(&ip6t_imq_reg);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-+
-+MODULE_AUTHOR("http://www.linuximq.net");
-+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
-+MODULE_LICENSE("GPL");
-diff -urN linux-2.6.19/net/ipv6/netfilter/Kconfig linux-2.6.19+imq/net/ipv6/netfilter/Kconfig
---- linux-2.6.19/net/ipv6/netfilter/Kconfig 2006-12-01 14:05:46.000000000 +1030
-+++ linux-2.6.19+imq/net/ipv6/netfilter/Kconfig 2006-12-04 12:41:01.000000000 +1030
-@@ -163,6 +163,15 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP6_NF_TARGET_IMQ
-+ tristate "IMQ target support"
-+ depends on IP6_NF_MANGLE
-+ help
-+ This option adds a `IMQ' target which is used to specify if and
-+ to which imq device packets should get enqueued/dequeued.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
- config IP6_NF_TARGET_HL
- tristate 'HL (hoplimit) target support'
- depends on IP6_NF_MANGLE
-diff -urN linux-2.6.19/net/ipv6/netfilter/Makefile linux-2.6.19+imq/net/ipv6/netfilter/Makefile
---- linux-2.6.19/net/ipv6/netfilter/Makefile 2006-12-01 14:05:46.000000000 +1030
-+++ linux-2.6.19+imq/net/ipv6/netfilter/Makefile 2006-12-04 12:41:01.000000000 +1030
-@@ -13,6 +13,7 @@
- obj-$(CONFIG_IP6_NF_MATCH_OWNER) += ip6t_owner.o
- obj-$(CONFIG_IP6_NF_FILTER) += ip6table_filter.o
- obj-$(CONFIG_IP6_NF_MANGLE) += ip6table_mangle.o
-+obj-$(CONFIG_IP6_NF_TARGET_IMQ) += ip6t_IMQ.o
- obj-$(CONFIG_IP6_NF_TARGET_HL) += ip6t_HL.o
- obj-$(CONFIG_IP6_NF_QUEUE) += ip6_queue.o
- obj-$(CONFIG_IP6_NF_TARGET_LOG) += ip6t_LOG.o
-diff -urN linux-2.6.19/net/sched/sch_generic.c linux-2.6.19+imq/net/sched/sch_generic.c
---- linux-2.6.19/net/sched/sch_generic.c 2006-12-01 14:05:46.000000000 +1030
-+++ linux-2.6.19+imq/net/sched/sch_generic.c 2006-12-05 23:08:54.000000000 +1030
-@@ -87,7 +87,6 @@
-
- NOTE: Called under dev->queue_lock with locally disabled BH.
- */
--
- static inline int qdisc_restart(struct net_device *dev)
- {
- struct Qdisc *q = dev->qdisc;
-@@ -181,6 +180,11 @@
- return q->q.qlen;
- }
-
-+int qdisc_restart1(struct net_device *dev)
-+{
-+ return qdisc_restart(dev);
-+}
-+
- void __qdisc_run(struct net_device *dev)
- {
- if (unlikely(dev->qdisc == &noop_qdisc))
-@@ -617,3 +621,4 @@
- EXPORT_SYMBOL(qdisc_reset);
- EXPORT_SYMBOL(qdisc_lock_tree);
- EXPORT_SYMBOL(qdisc_unlock_tree);
-+EXPORT_SYMBOL(qdisc_restart1);
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ROUTE.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ROUTE.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ROUTE.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ROUTE.h 2006-12-14 03:13:49.000000000 +0100
-@@ -0,0 +1,23 @@
-+/* Header file for iptables ipt_ROUTE target
-+ *
-+ * (C) 2002 by Cédric de Launois <delaunois@info.ucl.ac.be>
-+ *
-+ * This software is distributed under GNU GPL v2, 1991
-+ */
-+#ifndef _IPT_ROUTE_H_target
-+#define _IPT_ROUTE_H_target
-+
-+#define IPT_ROUTE_IFNAMSIZ 16
-+
-+struct ipt_route_target_info {
-+ char oif[IPT_ROUTE_IFNAMSIZ]; /* Output Interface Name */
-+ char iif[IPT_ROUTE_IFNAMSIZ]; /* Input Interface Name */
-+ u_int32_t gw; /* IP address of gateway */
-+ u_int8_t flags;
-+};
-+
-+/* Values for "flags" field */
-+#define IPT_ROUTE_CONTINUE 0x01
-+#define IPT_ROUTE_TEE 0x02
-+
-+#endif /*_IPT_ROUTE_H_target*/
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv6/ip6t_ROUTE.h linux-2.6.19.dev/include/linux/netfilter_ipv6/ip6t_ROUTE.h
---- linux-2.6.19.old/include/linux/netfilter_ipv6/ip6t_ROUTE.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv6/ip6t_ROUTE.h 2006-12-14 03:13:49.000000000 +0100
-@@ -0,0 +1,23 @@
-+/* Header file for iptables ip6t_ROUTE target
-+ *
-+ * (C) 2003 by Cédric de Launois <delaunois@info.ucl.ac.be>
-+ *
-+ * This software is distributed under GNU GPL v2, 1991
-+ */
-+#ifndef _IPT_ROUTE_H_target
-+#define _IPT_ROUTE_H_target
-+
-+#define IP6T_ROUTE_IFNAMSIZ 16
-+
-+struct ip6t_route_target_info {
-+ char oif[IP6T_ROUTE_IFNAMSIZ]; /* Output Interface Name */
-+ char iif[IP6T_ROUTE_IFNAMSIZ]; /* Input Interface Name */
-+ u_int32_t gw[4]; /* IPv6 address of gateway */
-+ u_int8_t flags;
-+};
-+
-+/* Values for "flags" field */
-+#define IP6T_ROUTE_CONTINUE 0x01
-+#define IP6T_ROUTE_TEE 0x02
-+
-+#endif /*_IP6T_ROUTE_H_target*/
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_ROUTE.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_ROUTE.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_ROUTE.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_ROUTE.c 2006-12-14 03:13:49.000000000 +0100
-@@ -0,0 +1,455 @@
-+/*
-+ * This implements the ROUTE target, which enables you to setup unusual
-+ * routes not supported by the standard kernel routing table.
-+ *
-+ * Copyright (C) 2002 Cedric de Launois <delaunois@info.ucl.ac.be>
-+ *
-+ * v 1.11 2004/11/23
-+ *
-+ * This software is distributed under GNU GPL v2, 1991
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/ip.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#include <linux/netfilter_ipv4/ip_conntrack.h>
-+#include <linux/netfilter_ipv4/ipt_ROUTE.h>
-+#include <linux/netdevice.h>
-+#include <linux/route.h>
-+#include <linux/if_arp.h>
-+#include <net/ip.h>
-+#include <net/route.h>
-+#include <net/icmp.h>
-+#include <net/checksum.h>
-+
-+#if 0
-+#define DEBUGP printk
-+#else
-+#define DEBUGP(format, args...)
-+#endif
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Cedric de Launois <delaunois@info.ucl.ac.be>");
-+MODULE_DESCRIPTION("iptables ROUTE target module");
-+
-+/* Try to route the packet according to the routing keys specified in
-+ * route_info. Keys are :
-+ * - ifindex :
-+ * 0 if no oif preferred,
-+ * otherwise set to the index of the desired oif
-+ * - route_info->gw :
-+ * 0 if no gateway specified,
-+ * otherwise set to the next host to which the pkt must be routed
-+ * If success, skb->dev is the output device to which the packet must
-+ * be sent and skb->dst is not NULL
-+ *
-+ * RETURN: -1 if an error occured
-+ * 1 if the packet was succesfully routed to the
-+ * destination desired
-+ * 0 if the kernel routing table could not route the packet
-+ * according to the keys specified
-+ */
-+static int route(struct sk_buff *skb,
-+ unsigned int ifindex,
-+ const struct ipt_route_target_info *route_info)
-+{
-+ int err;
-+ struct rtable *rt;
-+ struct iphdr *iph = skb->nh.iph;
-+ struct flowi fl = {
-+ .oif = ifindex,
-+ .nl_u = {
-+ .ip4_u = {
-+ .daddr = iph->daddr,
-+ .saddr = 0,
-+ .tos = RT_TOS(iph->tos),
-+ .scope = RT_SCOPE_UNIVERSE,
-+ }
-+ }
-+ };
-+
-+ /* The destination address may be overloaded by the target */
-+ if (route_info->gw)
-+ fl.fl4_dst = route_info->gw;
-+
-+ /* Trying to route the packet using the standard routing table. */
-+ if ((err = ip_route_output_key(&rt, &fl))) {
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: couldn't route pkt (err: %i)",err);
-+ return -1;
-+ }
-+
-+ /* Drop old route. */
-+ dst_release(skb->dst);
-+ skb->dst = NULL;
-+
-+ /* Success if no oif specified or if the oif correspond to the
-+ * one desired */
-+ if (!ifindex || rt->u.dst.dev->ifindex == ifindex) {
-+ skb->dst = &rt->u.dst;
-+ skb->dev = skb->dst->dev;
-+ skb->protocol = htons(ETH_P_IP);
-+ return 1;
-+ }
-+
-+ /* The interface selected by the routing table is not the one
-+ * specified by the user. This may happen because the dst address
-+ * is one of our own addresses.
-+ */
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: failed to route as desired gw=%u.%u.%u.%u oif=%i (got oif=%i)\n",
-+ NIPQUAD(route_info->gw), ifindex, rt->u.dst.dev->ifindex);
-+
-+ return 0;
-+}
-+
-+
-+/* Stolen from ip_finish_output2
-+ * PRE : skb->dev is set to the device we are leaving by
-+ * skb->dst is not NULL
-+ * POST: the packet is sent with the link layer header pushed
-+ * the packet is destroyed
-+ */
-+static void ip_direct_send(struct sk_buff *skb)
-+{
-+ struct dst_entry *dst = skb->dst;
-+ struct hh_cache *hh = dst->hh;
-+ struct net_device *dev = dst->dev;
-+ int hh_len = LL_RESERVED_SPACE(dev);
-+
-+ /* Be paranoid, rather than too clever. */
-+ if (unlikely(skb_headroom(skb) < hh_len && dev->hard_header)) {
-+ struct sk_buff *skb2;
-+
-+ skb2 = skb_realloc_headroom(skb, LL_RESERVED_SPACE(dev));
-+ if (skb2 == NULL) {
-+ kfree_skb(skb);
-+ return;
-+ }
-+ if (skb->sk)
-+ skb_set_owner_w(skb2, skb->sk);
-+ kfree_skb(skb);
-+ skb = skb2;
-+ }
-+
-+ if (hh) {
-+ int hh_alen;
-+
-+ read_lock_bh(&hh->hh_lock);
-+ hh_alen = HH_DATA_ALIGN(hh->hh_len);
-+ memcpy(skb->data - hh_alen, hh->hh_data, hh_alen);
-+ read_unlock_bh(&hh->hh_lock);
-+ skb_push(skb, hh->hh_len);
-+ hh->hh_output(skb);
-+ } else if (dst->neighbour)
-+ dst->neighbour->output(skb);
-+ else {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ipt_ROUTE: no hdr & no neighbour cache!\n");
-+ kfree_skb(skb);
-+ }
-+}
-+
-+
-+/* PRE : skb->dev is set to the device we are leaving by
-+ * POST: - the packet is directly sent to the skb->dev device, without
-+ * pushing the link layer header.
-+ * - the packet is destroyed
-+ */
-+static inline int dev_direct_send(struct sk_buff *skb)
-+{
-+ return dev_queue_xmit(skb);
-+}
-+
-+
-+static unsigned int route_oif(const struct ipt_route_target_info *route_info,
-+ struct sk_buff *skb)
-+{
-+ unsigned int ifindex = 0;
-+ struct net_device *dev_out = NULL;
-+
-+ /* The user set the interface name to use.
-+ * Getting the current interface index.
-+ */
-+ if ((dev_out = dev_get_by_name(route_info->oif))) {
-+ ifindex = dev_out->ifindex;
-+ } else {
-+ /* Unknown interface name : packet dropped */
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: oif interface %s not found\n", route_info->oif);
-+ return NF_DROP;
-+ }
-+
-+ /* Trying the standard way of routing packets */
-+ switch (route(skb, ifindex, route_info)) {
-+ case 1:
-+ dev_put(dev_out);
-+ if (route_info->flags & IPT_ROUTE_CONTINUE)
-+ return IPT_CONTINUE;
-+
-+ ip_direct_send(skb);
-+ return NF_STOLEN;
-+
-+ case 0:
-+ /* Failed to send to oif. Trying the hard way */
-+ if (route_info->flags & IPT_ROUTE_CONTINUE)
-+ return NF_DROP;
-+
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: forcing the use of %i\n",
-+ ifindex);
-+
-+ /* We have to force the use of an interface.
-+ * This interface must be a tunnel interface since
-+ * otherwise we can't guess the hw address for
-+ * the packet. For a tunnel interface, no hw address
-+ * is needed.
-+ */
-+ if ((dev_out->type != ARPHRD_TUNNEL)
-+ && (dev_out->type != ARPHRD_IPGRE)) {
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: can't guess the hw addr !\n");
-+ dev_put(dev_out);
-+ return NF_DROP;
-+ }
-+
-+ /* Send the packet. This will also free skb
-+ * Do not go through the POST_ROUTING hook because
-+ * skb->dst is not set and because it will probably
-+ * get confused by the destination IP address.
-+ */
-+ skb->dev = dev_out;
-+ dev_direct_send(skb);
-+ dev_put(dev_out);
-+ return NF_STOLEN;
-+
-+ default:
-+ /* Unexpected error */
-+ dev_put(dev_out);
-+ return NF_DROP;
-+ }
-+}
-+
-+
-+static unsigned int route_iif(const struct ipt_route_target_info *route_info,
-+ struct sk_buff *skb)
-+{
-+ struct net_device *dev_in = NULL;
-+
-+ /* Getting the current interface index. */
-+ if (!(dev_in = dev_get_by_name(route_info->iif))) {
-+ if (net_ratelimit())
-+ DEBUGP("ipt_ROUTE: iif interface %s not found\n", route_info->iif);
-+ return NF_DROP;
-+ }
-+
-+ skb->dev = dev_in;
-+ dst_release(skb->dst);
-+ skb->dst = NULL;
-+
-+ netif_rx(skb);
-+ dev_put(dev_in);
-+ return NF_STOLEN;
-+}
-+
-+
-+static unsigned int route_gw(const struct ipt_route_target_info *route_info,
-+ struct sk_buff *skb)
-+{
-+ if (route(skb, 0, route_info)!=1)
-+ return NF_DROP;
-+
-+ if (route_info->flags & IPT_ROUTE_CONTINUE)
-+ return IPT_CONTINUE;
-+
-+ ip_direct_send(skb);
-+ return NF_STOLEN;
-+}
-+
-+
-+/* To detect and deter routed packet loopback when using the --tee option,
-+ * we take a page out of the raw.patch book: on the copied skb, we set up
-+ * a fake ->nfct entry, pointing to the local &route_tee_track. We skip
-+ * routing packets when we see they already have that ->nfct.
-+ */
-+
-+static struct ip_conntrack route_tee_track;
-+
-+static unsigned int ipt_route_target(struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ unsigned int hooknum,
-+ const struct xt_target *target,
-+ const void *targinfo)
-+{
-+ const struct ipt_route_target_info *route_info = targinfo;
-+ struct sk_buff *skb = *pskb;
-+ unsigned int res;
-+
-+ if (skb->nfct == &route_tee_track.ct_general) {
-+ /* Loopback - a packet we already routed, is to be
-+ * routed another time. Avoid that, now.
-+ */
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ipt_ROUTE: loopback - DROP!\n");
-+ return NF_DROP;
-+ }
-+
-+ /* If we are at PREROUTING or INPUT hook
-+ * the TTL isn't decreased by the IP stack
-+ */
-+ if (hooknum == NF_IP_PRE_ROUTING ||
-+ hooknum == NF_IP_LOCAL_IN) {
-+
-+ struct iphdr *iph = skb->nh.iph;
-+
-+ if (iph->ttl <= 1) {
-+ struct rtable *rt;
-+ struct flowi fl = {
-+ .oif = 0,
-+ .nl_u = {
-+ .ip4_u = {
-+ .daddr = iph->daddr,
-+ .saddr = iph->saddr,
-+ .tos = RT_TOS(iph->tos),
-+ .scope = ((iph->tos & RTO_ONLINK) ?
-+ RT_SCOPE_LINK :
-+ RT_SCOPE_UNIVERSE)
-+ }
-+ }
-+ };
-+
-+ if (ip_route_output_key(&rt, &fl)) {
-+ return NF_DROP;
-+ }
-+
-+ if (skb->dev == rt->u.dst.dev) {
-+ /* Drop old route. */
-+ dst_release(skb->dst);
-+ skb->dst = &rt->u.dst;
-+
-+ /* this will traverse normal stack, and
-+ * thus call conntrack on the icmp packet */
-+ icmp_send(skb, ICMP_TIME_EXCEEDED,
-+ ICMP_EXC_TTL, 0);
-+ }
-+
-+ return NF_DROP;
-+ }
-+
-+ /*
-+ * If we are at INPUT the checksum must be recalculated since
-+ * the length could change as the result of a defragmentation.
-+ */
-+ if(hooknum == NF_IP_LOCAL_IN) {
-+ iph->ttl = iph->ttl - 1;
-+ iph->check = 0;
-+ iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
-+ } else {
-+ ip_decrease_ttl(iph);
-+ }
-+ }
-+
-+ if ((route_info->flags & IPT_ROUTE_TEE)) {
-+ /*
-+ * Copy the *pskb, and route the copy. Will later return
-+ * IPT_CONTINUE for the original skb, which should continue
-+ * on its way as if nothing happened. The copy should be
-+ * independantly delivered to the ROUTE --gw.
-+ */
-+ skb = skb_copy(*pskb, GFP_ATOMIC);
-+ if (!skb) {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ipt_ROUTE: copy failed!\n");
-+ return IPT_CONTINUE;
-+ }
-+ }
-+
-+ /* Tell conntrack to forget this packet since it may get confused
-+ * when a packet is leaving with dst address == our address.
-+ * Good idea ? Dunno. Need advice.
-+ *
-+ * NEW: mark the skb with our &route_tee_track, so we avoid looping
-+ * on any already routed packet.
-+ */
-+ if (!(route_info->flags & IPT_ROUTE_CONTINUE)) {
-+ nf_conntrack_put(skb->nfct);
-+ skb->nfct = &route_tee_track.ct_general;
-+ skb->nfctinfo = IP_CT_NEW;
-+ nf_conntrack_get(skb->nfct);
-+ }
-+
-+ if (route_info->oif[0] != '\0') {
-+ res = route_oif(route_info, skb);
-+ } else if (route_info->iif[0] != '\0') {
-+ res = route_iif(route_info, skb);
-+ } else if (route_info->gw) {
-+ res = route_gw(route_info, skb);
-+ } else {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ipt_ROUTE: no parameter !\n");
-+ res = IPT_CONTINUE;
-+ }
-+
-+ if ((route_info->flags & IPT_ROUTE_TEE))
-+ res = IPT_CONTINUE;
-+
-+ return res;
-+}
-+
-+
-+static int ipt_route_checkentry(const char *tablename,
-+ const void *e,
-+ const struct xt_target *target,
-+ void *targinfo,
-+ unsigned int hook_mask)
-+{
-+ if (strcmp(tablename, "mangle") != 0) {
-+ printk("ipt_ROUTE: bad table `%s', use the `mangle' table.\n",
-+ tablename);
-+ return 0;
-+ }
-+
-+ if (hook_mask & ~( (1 << NF_IP_PRE_ROUTING)
-+ | (1 << NF_IP_LOCAL_IN)
-+ | (1 << NF_IP_FORWARD)
-+ | (1 << NF_IP_LOCAL_OUT)
-+ | (1 << NF_IP_POST_ROUTING))) {
-+ printk("ipt_ROUTE: bad hook\n");
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+
-+static struct ipt_target ipt_route_reg = {
-+ .name = "ROUTE",
-+ .target = ipt_route_target,
-+ .targetsize = sizeof(struct ipt_route_target_info),
-+ .checkentry = ipt_route_checkentry,
-+ .me = THIS_MODULE,
-+};
-+
-+static int __init init(void)
-+{
-+ /* Set up fake conntrack (stolen from raw.patch):
-+ - to never be deleted, not in any hashes */
-+ atomic_set(&route_tee_track.ct_general.use, 1);
-+ /* - and look it like as a confirmed connection */
-+ set_bit(IPS_CONFIRMED_BIT, &route_tee_track.status);
-+ /* Initialize fake conntrack so that NAT will skip it */
-+ route_tee_track.status |= IPS_NAT_DONE_MASK;
-+
-+ return ipt_register_target(&ipt_route_reg);
-+}
-+
-+
-+static void __exit fini(void)
-+{
-+ ipt_unregister_target(&ipt_route_reg);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
---- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
-@@ -494,6 +494,23 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP_NF_TARGET_ROUTE
-+ tristate 'ROUTE target support'
-+ depends on IP_NF_MANGLE
-+ help
-+ This option adds a `ROUTE' target, which enables you to setup unusual
-+ routes. For example, the ROUTE lets you route a received packet through
-+ an interface or towards a host, even if the regular destination of the
-+ packet is the router itself. The ROUTE target is also able to change the
-+ incoming interface of a packet.
-+
-+ The target can be or not a final target. It has to be used inside the
-+ mangle table.
-+
-+ If you want to compile it as a module, say M here and read
-+ Documentation/modules.txt. The module will be called ipt_ROUTE.o.
-+ If unsure, say `N'.
-+
- config IP_NF_TARGET_NETMAP
- tristate "NETMAP target support"
- depends on IP_NF_NAT
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
---- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
-@@ -74,6 +74,7 @@
- obj-$(CONFIG_IP_NF_TARGET_IMQ) += ipt_IMQ.o
- obj-$(CONFIG_IP_NF_TARGET_MASQUERADE) += ipt_MASQUERADE.o
- obj-$(CONFIG_IP_NF_TARGET_REDIRECT) += ipt_REDIRECT.o
-+obj-$(CONFIG_IP_NF_TARGET_ROUTE) += ipt_ROUTE.o
- obj-$(CONFIG_IP_NF_TARGET_NETMAP) += ipt_NETMAP.o
- obj-$(CONFIG_IP_NF_TARGET_SAME) += ipt_SAME.o
- obj-$(CONFIG_IP_NF_NAT_SNMP_BASIC) += ip_nat_snmp_basic.o
-diff -urN linux-2.6.19.old/net/ipv6/ipv6_syms.c linux-2.6.19.dev/net/ipv6/ipv6_syms.c
---- linux-2.6.19.old/net/ipv6/ipv6_syms.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv6/ipv6_syms.c 2006-12-14 03:13:49.000000000 +0100
-@@ -11,6 +11,7 @@
- EXPORT_SYMBOL(icmpv6_statistics);
- EXPORT_SYMBOL(icmpv6_err_convert);
- EXPORT_SYMBOL(ndisc_mc_map);
-+EXPORT_SYMBOL(nd_tbl);
- EXPORT_SYMBOL(register_inet6addr_notifier);
- EXPORT_SYMBOL(unregister_inet6addr_notifier);
- EXPORT_SYMBOL(ip6_route_output);
-diff -urN linux-2.6.19.old/net/ipv6/netfilter/ip6t_ROUTE.c linux-2.6.19.dev/net/ipv6/netfilter/ip6t_ROUTE.c
---- linux-2.6.19.old/net/ipv6/netfilter/ip6t_ROUTE.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv6/netfilter/ip6t_ROUTE.c 2006-12-14 03:13:49.000000000 +0100
-@@ -0,0 +1,302 @@
-+/*
-+ * This implements the ROUTE v6 target, which enables you to setup unusual
-+ * routes not supported by the standard kernel routing table.
-+ *
-+ * Copyright (C) 2003 Cedric de Launois <delaunois@info.ucl.ac.be>
-+ *
-+ * v 1.1 2004/11/23
-+ *
-+ * This software is distributed under GNU GPL v2, 1991
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/ipv6.h>
-+#include <linux/netfilter_ipv6/ip6_tables.h>
-+#include <linux/netfilter_ipv6/ip6t_ROUTE.h>
-+#include <linux/netdevice.h>
-+#include <net/ipv6.h>
-+#include <net/ndisc.h>
-+#include <net/ip6_route.h>
-+#include <linux/icmpv6.h>
-+
-+#if 1
-+#define DEBUGP printk
-+#else
-+#define DEBUGP(format, args...)
-+#endif
-+
-+#define NIP6(addr) \
-+ ntohs((addr).s6_addr16[0]), \
-+ ntohs((addr).s6_addr16[1]), \
-+ ntohs((addr).s6_addr16[2]), \
-+ ntohs((addr).s6_addr16[3]), \
-+ ntohs((addr).s6_addr16[4]), \
-+ ntohs((addr).s6_addr16[5]), \
-+ ntohs((addr).s6_addr16[6]), \
-+ ntohs((addr).s6_addr16[7])
-+
-+/* Route the packet according to the routing keys specified in
-+ * route_info. Keys are :
-+ * - ifindex :
-+ * 0 if no oif preferred,
-+ * otherwise set to the index of the desired oif
-+ * - route_info->gw :
-+ * 0 if no gateway specified,
-+ * otherwise set to the next host to which the pkt must be routed
-+ * If success, skb->dev is the output device to which the packet must
-+ * be sent and skb->dst is not NULL
-+ *
-+ * RETURN: 1 if the packet was succesfully routed to the
-+ * destination desired
-+ * 0 if the kernel routing table could not route the packet
-+ * according to the keys specified
-+ */
-+static int
-+route6(struct sk_buff *skb,
-+ unsigned int ifindex,
-+ const struct ip6t_route_target_info *route_info)
-+{
-+ struct rt6_info *rt = NULL;
-+ struct ipv6hdr *ipv6h = skb->nh.ipv6h;
-+ struct in6_addr *gw = (struct in6_addr*)&route_info->gw;
-+
-+ DEBUGP("ip6t_ROUTE: called with: ");
-+ DEBUGP("DST=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(ipv6h->daddr));
-+ DEBUGP("GATEWAY=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(*gw));
-+ DEBUGP("OUT=%s\n", route_info->oif);
-+
-+ if (ipv6_addr_any(gw))
-+ rt = rt6_lookup(&ipv6h->daddr, &ipv6h->saddr, ifindex, 1);
-+ else
-+ rt = rt6_lookup(gw, &ipv6h->saddr, ifindex, 1);
-+
-+ if (!rt)
-+ goto no_route;
-+
-+ DEBUGP("ip6t_ROUTE: routing gives: ");
-+ DEBUGP("DST=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(rt->rt6i_dst.addr));
-+ DEBUGP("GATEWAY=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(rt->rt6i_gateway));
-+ DEBUGP("OUT=%s\n", rt->rt6i_dev->name);
-+
-+ if (ifindex && rt->rt6i_dev->ifindex!=ifindex)
-+ goto wrong_route;
-+
-+ if (!rt->rt6i_nexthop) {
-+ DEBUGP("ip6t_ROUTE: discovering neighbour\n");
-+ rt->rt6i_nexthop = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_dst.addr);
-+ }
-+
-+ /* Drop old route. */
-+ dst_release(skb->dst);
-+ skb->dst = &rt->u.dst;
-+ skb->dev = rt->rt6i_dev;
-+ return 1;
-+
-+ wrong_route:
-+ dst_release(&rt->u.dst);
-+ no_route:
-+ if (!net_ratelimit())
-+ return 0;
-+
-+ printk("ip6t_ROUTE: no explicit route found ");
-+ if (ifindex)
-+ printk("via interface %s ", route_info->oif);
-+ if (!ipv6_addr_any(gw))
-+ printk("via gateway %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x", NIP6(*gw));
-+ printk("\n");
-+ return 0;
-+}
-+
-+
-+/* Stolen from ip6_output_finish
-+ * PRE : skb->dev is set to the device we are leaving by
-+ * skb->dst is not NULL
-+ * POST: the packet is sent with the link layer header pushed
-+ * the packet is destroyed
-+ */
-+static void ip_direct_send(struct sk_buff *skb)
-+{
-+ struct dst_entry *dst = skb->dst;
-+ struct hh_cache *hh = dst->hh;
-+
-+ if (hh) {
-+ read_lock_bh(&hh->hh_lock);
-+ memcpy(skb->data - 16, hh->hh_data, 16);
-+ read_unlock_bh(&hh->hh_lock);
-+ skb_push(skb, hh->hh_len);
-+ hh->hh_output(skb);
-+ } else if (dst->neighbour)
-+ dst->neighbour->output(skb);
-+ else {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ip6t_ROUTE: no hdr & no neighbour cache!\n");
-+ kfree_skb(skb);
-+ }
-+}
-+
-+
-+static unsigned int
-+route6_oif(const struct ip6t_route_target_info *route_info,
-+ struct sk_buff *skb)
-+{
-+ unsigned int ifindex = 0;
-+ struct net_device *dev_out = NULL;
-+
-+ /* The user set the interface name to use.
-+ * Getting the current interface index.
-+ */
-+ if ((dev_out = dev_get_by_name(route_info->oif))) {
-+ ifindex = dev_out->ifindex;
-+ } else {
-+ /* Unknown interface name : packet dropped */
-+ if (net_ratelimit())
-+ DEBUGP("ip6t_ROUTE: oif interface %s not found\n", route_info->oif);
-+
-+ if (route_info->flags & IP6T_ROUTE_CONTINUE)
-+ return IP6T_CONTINUE;
-+ else
-+ return NF_DROP;
-+ }
-+
-+ /* Trying the standard way of routing packets */
-+ if (route6(skb, ifindex, route_info)) {
-+ dev_put(dev_out);
-+ if (route_info->flags & IP6T_ROUTE_CONTINUE)
-+ return IP6T_CONTINUE;
-+
-+ ip_direct_send(skb);
-+ return NF_STOLEN;
-+ } else
-+ return NF_DROP;
-+}
-+
-+
-+static unsigned int
-+route6_gw(const struct ip6t_route_target_info *route_info,
-+ struct sk_buff *skb)
-+{
-+ if (route6(skb, 0, route_info)) {
-+ if (route_info->flags & IP6T_ROUTE_CONTINUE)
-+ return IP6T_CONTINUE;
-+
-+ ip_direct_send(skb);
-+ return NF_STOLEN;
-+ } else
-+ return NF_DROP;
-+}
-+
-+
-+static unsigned int
-+ip6t_route_target(struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ unsigned int hooknum,
-+ const struct xt_target *target,
-+ const void *targinfo)
-+{
-+ const struct ip6t_route_target_info *route_info = targinfo;
-+ struct sk_buff *skb = *pskb;
-+ struct in6_addr *gw = (struct in6_addr*)&route_info->gw;
-+ unsigned int res;
-+
-+ if (route_info->flags & IP6T_ROUTE_CONTINUE)
-+ goto do_it;
-+
-+ /* If we are at PREROUTING or INPUT hook
-+ * the TTL isn't decreased by the IP stack
-+ */
-+ if (hooknum == NF_IP6_PRE_ROUTING ||
-+ hooknum == NF_IP6_LOCAL_IN) {
-+
-+ struct ipv6hdr *ipv6h = skb->nh.ipv6h;
-+
-+ if (ipv6h->hop_limit <= 1) {
-+ /* Force OUTPUT device used as source address */
-+ skb->dev = skb->dst->dev;
-+
-+ icmpv6_send(skb, ICMPV6_TIME_EXCEED,
-+ ICMPV6_EXC_HOPLIMIT, 0, skb->dev);
-+
-+ return NF_DROP;
-+ }
-+
-+ ipv6h->hop_limit--;
-+ }
-+
-+ if ((route_info->flags & IP6T_ROUTE_TEE)) {
-+ /*
-+ * Copy the *pskb, and route the copy. Will later return
-+ * IP6T_CONTINUE for the original skb, which should continue
-+ * on its way as if nothing happened. The copy should be
-+ * independantly delivered to the ROUTE --gw.
-+ */
-+ skb = skb_copy(*pskb, GFP_ATOMIC);
-+ if (!skb) {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ip6t_ROUTE: copy failed!\n");
-+ return IP6T_CONTINUE;
-+ }
-+ }
-+
-+do_it:
-+ if (route_info->oif[0]) {
-+ res = route6_oif(route_info, skb);
-+ } else if (!ipv6_addr_any(gw)) {
-+ res = route6_gw(route_info, skb);
-+ } else {
-+ if (net_ratelimit())
-+ DEBUGP(KERN_DEBUG "ip6t_ROUTE: no parameter !\n");
-+ res = IP6T_CONTINUE;
-+ }
-+
-+ if ((route_info->flags & IP6T_ROUTE_TEE))
-+ res = IP6T_CONTINUE;
-+
-+ return res;
-+}
-+
-+
-+static int
-+ip6t_route_checkentry(const char *tablename,
-+ const void *e,
-+ const struct xt_target *target,
-+ void *targinfo,
-+ unsigned int hook_mask)
-+{
-+ if (strcmp(tablename, "mangle") != 0) {
-+ printk("ip6t_ROUTE: can only be called from \"mangle\" table.\n");
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+
-+static struct ip6t_target ip6t_route_reg = {
-+ .name = "ROUTE",
-+ .target = ip6t_route_target,
-+ .targetsize = sizeof(struct ip6t_route_target_info),
-+ .checkentry = ip6t_route_checkentry,
-+ .me = THIS_MODULE
-+};
-+
-+
-+static int __init init(void)
-+{
-+ printk(KERN_DEBUG "registering ipv6 ROUTE target\n");
-+ if (ip6t_register_target(&ip6t_route_reg))
-+ return -EINVAL;
-+
-+ return 0;
-+}
-+
-+
-+static void __exit fini(void)
-+{
-+ ip6t_unregister_target(&ip6t_route_reg);
-+}
-+
-+module_init(init);
-+module_exit(fini);
-+MODULE_LICENSE("GPL");
-diff -urN linux-2.6.19.old/net/ipv6/netfilter/Kconfig linux-2.6.19.dev/net/ipv6/netfilter/Kconfig
---- linux-2.6.19.old/net/ipv6/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv6/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
-@@ -162,6 +162,19 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config IP6_NF_TARGET_ROUTE
-+ tristate "ROUTE target support"
-+ depends on IP6_NF_MANGLE
-+ help
-+ This option adds a `ROUTE' target, which enables you to setup unusual
-+ routes. The ROUTE target is also able to change the incoming interface
-+ of a packet.
-+
-+ The target can be or not a final target. It has to be used inside the
-+ mangle table.
-+
-+ Not working as a module.
-+
- config IP6_NF_MANGLE
- tristate "Packet mangling"
- depends on IP6_NF_IPTABLES
-diff -urN linux-2.6.19.old/net/ipv6/netfilter/Makefile linux-2.6.19.dev/net/ipv6/netfilter/Makefile
---- linux-2.6.19.old/net/ipv6/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv6/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
-@@ -20,6 +20,7 @@
- obj-$(CONFIG_IP6_NF_RAW) += ip6table_raw.o
- obj-$(CONFIG_IP6_NF_MATCH_HL) += ip6t_hl.o
- obj-$(CONFIG_IP6_NF_TARGET_REJECT) += ip6t_REJECT.o
-+obj-$(CONFIG_IP6_NF_TARGET_ROUTE) += ip6t_ROUTE.o
-
- # objects for l3 independent conntrack
- nf_conntrack_ipv6-objs := nf_conntrack_l3proto_ipv6.o nf_conntrack_proto_icmpv6.o nf_conntrack_reasm.o
+++ /dev/null
-diff -ruN linux-2.6.19.1.orig/include/linux/netfilter/xt_CHAOS.h linux-2.6.19.1/include/linux/netfilter/xt_CHAOS.h
---- linux-2.6.19.1.orig/include/linux/netfilter/xt_CHAOS.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/include/linux/netfilter/xt_CHAOS.h 2007-01-11 13:28:07.656144799 +0100
-@@ -0,0 +1,14 @@
-+#ifndef _LINUX_XT_CHAOS_H
-+#define _LINUX_XT_CHAOS_H 1
-+
-+enum xt_chaos_variant {
-+ XTCHAOS_NORMAL,
-+ XTCHAOS_TARPIT,
-+ XTCHAOS_DELUDE,
-+};
-+
-+struct xt_chaos_info {
-+ enum xt_chaos_variant variant;
-+};
-+
-+#endif /* _LINUX_XT_CHAOS_H */
-diff -ruN linux-2.6.19.1.orig/include/linux/netfilter/xt_portscan.h linux-2.6.19.1/include/linux/netfilter/xt_portscan.h
---- linux-2.6.19.1.orig/include/linux/netfilter/xt_portscan.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/include/linux/netfilter/xt_portscan.h 2007-01-11 13:28:07.656144799 +0100
-@@ -0,0 +1,8 @@
-+#ifndef _LINUX_XT_PORTSCAN_H
-+#define _LINUX_XT_PORTSCAN_H 1
-+
-+struct xt_portscan_info {
-+ unsigned int match_stealth, match_syn, match_cn, match_gr;
-+};
-+
-+#endif /* _LINUX_XT_PORTSCAN_H */
-diff -ruN linux-2.6.19.1.orig/net/netfilter/find_match.c linux-2.6.19.1/net/netfilter/find_match.c
---- linux-2.6.19.1.orig/net/netfilter/find_match.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/net/netfilter/find_match.c 2007-01-11 13:28:12.191994379 +0100
-@@ -0,0 +1,37 @@
-+/*
-+ xt_request_find_match
-+ by Jan Engelhardt <jengelh [at] gmx de>, 2006 - 2007
-+
-+ Based upon linux-2.6.18.5/net/netfilter/x_tables.c:
-+ Copyright (C) 2006-2006 Harald Welte <laforge@netfilter.org>
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License version 2 as
-+ published by the Free Software Foundation.
-+*/
-+
-+#include <linux/err.h>
-+#include <linux/netfilter_arp.h>
-+#include <linux/socket.h>
-+#include <linux/netfilter/x_tables.h>
-+
-+/*
-+ * Yeah this code is sub-optimal, but the function is missing in
-+ * mainline so far. -jengelh
-+ */
-+static struct xt_match *xt_request_find_match(int af, const char *name,
-+ u8 revision)
-+{
-+ static const char *const xt_prefix[] = {
-+ [AF_INET] = "ip",
-+ [AF_INET6] = "ip6",
-+ [NF_ARP] = "arp",
-+ };
-+ struct xt_match *match;
-+
-+ match = try_then_request_module(xt_find_match(af, name, revision),
-+ "%st_%s", xt_prefix[af], name);
-+ if(IS_ERR(match) || match == NULL)
-+ return NULL;
-+
-+ return match;
-+}
-diff -ruN linux-2.6.19.1.orig/net/netfilter/Kconfig linux-2.6.19.1/net/netfilter/Kconfig
---- linux-2.6.19.1.orig/net/netfilter/Kconfig 2007-01-11 13:27:24.445577700 +0100
-+++ linux-2.6.19.1/net/netfilter/Kconfig 2007-01-11 13:28:09.092097179 +0100
-@@ -122,6 +122,14 @@
-
- # alphabetically ordered list of targets
-
-+config NETFILTER_XT_TARGET_CHAOS
-+ tristate '"CHAOS" target support'
-+ depends on NETFILTER_XTABLES
-+ help
-+ This option adds a `CHAOS' target.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
- config NETFILTER_XT_TARGET_CLASSIFY
- tristate '"CLASSIFY" target support'
- depends on NETFILTER_XTABLES
-@@ -148,6 +156,14 @@
- <file:Documentation/modules.txt>. The module will be called
- ipt_CONNMARK.o. If unsure, say `N'.
-
-+config NETFILTER_XT_TARGET_DELUDE
-+ tristate '"DELUDE" target support'
-+ depends on NETFILTER_XTABLES
-+ help
-+ This option adds a `DELUDE' target.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
- config NETFILTER_XT_TARGET_DSCP
- tristate '"DSCP" target support'
- depends on NETFILTER_XTABLES
-@@ -355,6 +371,14 @@
-
- To compile it as a module, choose M here. If unsure, say N.
-
-+config NETFILTER_XT_MATCH_PORTSCAN
-+ tristate '"portscan" match support'
-+ depends on NETFILTER_XTABLES
-+ help
-+ This option adds a 'portscan' match support.
-+
-+ To compile it as a module, choose M here. If unsure, say N.
-+
- config NETFILTER_XT_MATCH_MULTIPORT
- tristate "Multiple port match support"
- depends on NETFILTER_XTABLES
-diff -ruN linux-2.6.19.1.orig/net/netfilter/Makefile linux-2.6.19.1/net/netfilter/Makefile
---- linux-2.6.19.1.orig/net/netfilter/Makefile 2007-01-11 13:27:24.445577700 +0100
-+++ linux-2.6.19.1/net/netfilter/Makefile 2007-01-11 13:28:07.656144799 +0100
-@@ -23,8 +23,10 @@
- obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o
-
- # targets
-+obj-$(CONFIG_NETFILTER_XT_TARGET_CHAOS) += xt_CHAOS.o
- obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIFY) += xt_CLASSIFY.o
- obj-$(CONFIG_NETFILTER_XT_TARGET_CONNMARK) += xt_CONNMARK.o
-+obj-$(CONFIG_NETFILTER_XT_TARGET_DELUDE) += xt_DELUDE.o
- obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
- obj-$(CONFIG_NETFILTER_XT_TARGET_MARK) += xt_MARK.o
- obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o
-@@ -47,6 +49,7 @@
- obj-$(CONFIG_NETFILTER_XT_MATCH_MARK) += xt_mark.o
- obj-$(CONFIG_NETFILTER_XT_MATCH_MULTIPORT) += xt_multiport.o
- obj-$(CONFIG_NETFILTER_XT_MATCH_POLICY) += xt_policy.o
-+obj-$(CONFIG_NETFILTER_XT_MATCH_PORTSCAN) += xt_portscan.o
- obj-$(CONFIG_NETFILTER_XT_MATCH_PKTTYPE) += xt_pkttype.o
- obj-$(CONFIG_NETFILTER_XT_MATCH_QUOTA) += xt_quota.o
- obj-$(CONFIG_NETFILTER_XT_MATCH_REALM) += xt_realm.o
-diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_CHAOS.c linux-2.6.19.1/net/netfilter/xt_CHAOS.c
---- linux-2.6.19.1.orig/net/netfilter/xt_CHAOS.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/net/netfilter/xt_CHAOS.c 2007-01-11 13:28:14.407920893 +0100
-@@ -0,0 +1,180 @@
-+/*
-+ CHAOS target for netfilter
-+
-+ Copyright © Jan Engelhardt <jengelh [at] gmx de>, 2006 - 2007
-+ released under the terms of the GNU General Public
-+ License version 2.x and only versions 2.x.
-+*/
-+#include <linux/icmp.h>
-+#include <linux/in.h>
-+#include <linux/ip.h>
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/stat.h>
-+#include <linux/netfilter/x_tables.h>
-+#include <linux/netfilter/xt_tcpudp.h>
-+#include <linux/netfilter_ipv4/ipt_REJECT.h>
-+#include <net/ip.h>
-+#include <linux/netfilter/xt_CHAOS.h>
-+#include "find_match.c"
-+#define PFX KBUILD_MODNAME ": "
-+
-+/* Out of tree workarounds */
-+#include <linux/version.h>
-+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
-+# define HAVE_TARGUSERINFO 1
-+#endif
-+
-+/* Module parameters */
-+static unsigned int reject_percentage = ~0U * .01;
-+static unsigned int delude_percentage = ~0U * .0101;
-+module_param(reject_percentage, uint, S_IRUGO | S_IWUSR);
-+module_param(delude_percentage, uint, S_IRUGO | S_IWUSR);
-+
-+/* References to other matches/targets */
-+static struct xt_match *xm_tcp;
-+static struct xt_target *xt_delude, *xt_reject, *xt_tarpit;
-+
-+/* Static data for other matches/targets */
-+static const struct ipt_reject_info reject_params = {
-+ .with = ICMP_HOST_UNREACH,
-+};
-+
-+static const struct xt_tcp tcp_params = {
-+ .spts = {0, ~0},
-+ .dpts = {0, ~0},
-+};
-+
-+/* CHAOS functions */
-+static void xt_chaos_total(const struct xt_chaos_info *info,
-+ struct sk_buff **pskb, const struct net_device *in,
-+ const struct net_device *out, unsigned int hooknum)
-+{
-+ const int protoff = 4 * (*pskb)->nh.iph->ihl;
-+ const int offset = ntohs((*pskb)->nh.iph->frag_off) & IP_OFFSET;
-+ const struct xt_target *destiny;
-+ int hotdrop = 0, ret;
-+
-+ ret = xm_tcp->match(*pskb, in, out, xm_tcp, &tcp_params,
-+ offset, protoff, &hotdrop);
-+ if(!ret || hotdrop || (unsigned int)net_random() > delude_percentage)
-+ return;
-+
-+ destiny = (info->variant == XTCHAOS_TARPIT) ? xt_tarpit : xt_delude;
-+#ifdef HAVE_TARGUSERINFO
-+ destiny->target(pskb, in, out, hooknum, destiny, NULL, NULL);
-+#else
-+ destiny->target(pskb, in, out, hooknum, destiny, NULL);
-+#endif
-+ return;
-+}
-+
-+static unsigned int xt_chaos_target(struct sk_buff **pskb,
-+ const struct net_device *in, const struct net_device *out,
-+ unsigned int hooknum, const struct xt_target *target, const void *targinfo
-+#ifdef HAVE_TARGUSERINFO
-+ ,
-+ void *userinfo
-+#endif
-+ )
-+{
-+ /* Equivalent to:
-+ * -A chaos -m statistic --mode random --probability \
-+ * $reject_percentage -j REJECT --reject-with host-unreach;
-+ * -A chaos -m statistic --mode random --probability \
-+ * $delude_percentage -j DELUDE;
-+ * -A chaos -j DROP;
-+ */
-+ const struct xt_chaos_info *info = targinfo;
-+
-+ if((unsigned int)net_random() <= reject_percentage)
-+#ifdef HAVE_TARGUSERINFO
-+ return xt_reject->target(pskb, in, out, hooknum, target,
-+ &reject_params, userinfo);
-+#else
-+ return xt_reject->target(pskb, in, out, hooknum, target,
-+ &reject_params);
-+#endif
-+
-+ /* TARPIT/DELUDE may not be called from the OUTPUT chain */
-+ if((*pskb)->nh.iph->protocol == IPPROTO_TCP &&
-+ info->variant != XTCHAOS_NORMAL && hooknum != NF_IP_LOCAL_OUT)
-+ xt_chaos_total(info, pskb, in, out, hooknum);
-+
-+ return NF_DROP;
-+}
-+
-+static struct xt_target xt_chaos_info = {
-+ .name = "CHAOS",
-+ .target = xt_chaos_target,
-+ .table = "filter",
-+ .targetsize = sizeof(struct xt_chaos_info),
-+ .hooks = (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) |
-+ (1 << NF_IP_LOCAL_OUT),
-+ .family = AF_INET,
-+ .me = THIS_MODULE,
-+};
-+
-+static int __init xt_chaos_init(void)
-+{
-+ int ret = -EINVAL;
-+
-+ xm_tcp = xt_request_find_match(AF_INET, "tcp", 0);
-+ if(xm_tcp == NULL) {
-+ printk(KERN_WARNING PFX "Could not find \"tcp\" match\n");
-+ return -EINVAL;
-+ }
-+
-+ xt_reject = xt_request_find_target(AF_INET, "REJECT", 0);
-+ if(xt_reject == NULL) {
-+ printk(KERN_WARNING PFX "Could not find \"REJECT\" target\n");
-+ goto out2;
-+ }
-+
-+ xt_tarpit = xt_request_find_target(AF_INET, "TARPIT", 0);
-+ if(xt_tarpit == NULL) {
-+ printk(KERN_WARNING PFX "Could not find \"TARPIT\" target\n");
-+ goto out3;
-+ }
-+
-+ xt_delude = xt_request_find_target(AF_INET, "DELUDE", 0);
-+ if(xt_delude == NULL) {
-+ printk(KERN_WARNING PFX "Could not find \"DELUDE\" target\n");
-+ goto out4;
-+ }
-+
-+ if((ret = xt_register_target(&xt_chaos_info)) != 0) {
-+ printk(KERN_WARNING PFX "xt_register_target returned "
-+ "error %d\n", ret);
-+ goto out5;
-+ }
-+
-+ return 0;
-+
-+ out5:
-+ module_put(xt_delude->me);
-+ out4:
-+ module_put(xt_tarpit->me);
-+ out3:
-+ module_put(xt_reject->me);
-+ out2:
-+ module_put(xm_tcp->me);
-+ return ret;
-+}
-+
-+static void __exit xt_chaos_exit(void)
-+{
-+ xt_unregister_target(&xt_chaos_info);
-+ module_put(xm_tcp->me);
-+ module_put(xt_reject->me);
-+ module_put(xt_delude->me);
-+ module_put(xt_tarpit->me);
-+ return;
-+}
-+
-+module_init(xt_chaos_init);
-+module_exit(xt_chaos_exit);
-+MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
-+MODULE_DESCRIPTION("netfilter CHAOS target");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("ipt_CHAOS");
-diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_DELUDE.c linux-2.6.19.1/net/netfilter/xt_DELUDE.c
---- linux-2.6.19.1.orig/net/netfilter/xt_DELUDE.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/net/netfilter/xt_DELUDE.c 2007-01-11 13:28:07.656144799 +0100
-@@ -0,0 +1,265 @@
-+/*
-+ DELUDE target
-+ Copyright © Jan Engelhardt <jengelh [at] gmx de>, 2007
-+
-+ Based upon linux-2.6.18.5/net/ipv4/netfilter/ipt_REJECT.c:
-+ (C) 1999-2001 Paul `Rusty' Russell
-+ (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License version 2 as
-+ published by the Free Software Foundation.
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/skbuff.h>
-+#include <linux/ip.h>
-+#include <linux/tcp.h>
-+#include <linux/udp.h>
-+#include <linux/icmp.h>
-+#include <net/icmp.h>
-+#include <net/ip.h>
-+#include <net/tcp.h>
-+#include <net/route.h>
-+#include <net/dst.h>
-+#include <linux/netfilter_ipv4/ip_tables.h>
-+#ifdef CONFIG_BRIDGE_NETFILTER
-+#include <linux/netfilter_bridge.h>
-+#endif
-+#define PFX KBUILD_MODNAME ": "
-+
-+/* Out of tree workarounds */
-+#include <linux/version.h>
-+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
-+# define HAVE_TARGINFOSIZE 1
-+# define HAVE_TARGUSERINFO 1
-+#endif
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
-+# define nfmark mark
-+#endif
-+
-+static inline struct rtable *route_reverse(struct sk_buff *skb,
-+ struct tcphdr *tcph, int hook)
-+{
-+ struct iphdr *iph = skb->nh.iph;
-+ struct dst_entry *odst;
-+ struct flowi fl = {};
-+ struct rtable *rt;
-+
-+ /* We don't require ip forwarding to be enabled to be able to
-+ * send a RST reply for bridged traffic. */
-+ if (hook != NF_IP_FORWARD
-+#ifdef CONFIG_BRIDGE_NETFILTER
-+ || (skb->nf_bridge && skb->nf_bridge->mask & BRNF_BRIDGED)
-+#endif
-+ ) {
-+ fl.nl_u.ip4_u.daddr = iph->saddr;
-+ if (hook == NF_IP_LOCAL_IN)
-+ fl.nl_u.ip4_u.saddr = iph->daddr;
-+ fl.nl_u.ip4_u.tos = RT_TOS(iph->tos);
-+
-+ if (ip_route_output_key(&rt, &fl) != 0)
-+ return NULL;
-+ } else {
-+ /* non-local src, find valid iif to satisfy
-+ * rp-filter when calling ip_route_input. */
-+ fl.nl_u.ip4_u.daddr = iph->daddr;
-+ if (ip_route_output_key(&rt, &fl) != 0)
-+ return NULL;
-+
-+ odst = skb->dst;
-+ if (ip_route_input(skb, iph->saddr, iph->daddr,
-+ RT_TOS(iph->tos), rt->u.dst.dev) != 0) {
-+ dst_release(&rt->u.dst);
-+ return NULL;
-+ }
-+ dst_release(&rt->u.dst);
-+ rt = (struct rtable *)skb->dst;
-+ skb->dst = odst;
-+
-+ fl.nl_u.ip4_u.daddr = iph->saddr;
-+ fl.nl_u.ip4_u.saddr = iph->daddr;
-+ fl.nl_u.ip4_u.tos = RT_TOS(iph->tos);
-+ }
-+
-+ if (rt->u.dst.error) {
-+ dst_release(&rt->u.dst);
-+ return NULL;
-+ }
-+
-+ fl.proto = IPPROTO_TCP;
-+ fl.fl_ip_sport = tcph->dest;
-+ fl.fl_ip_dport = tcph->source;
-+
-+ xfrm_lookup((struct dst_entry **)&rt, &fl, NULL, 0);
-+
-+ return rt;
-+}
-+
-+static void send_reset(struct sk_buff *oldskb, int hook)
-+{
-+ struct sk_buff *nskb;
-+ struct iphdr *iph = oldskb->nh.iph;
-+ struct tcphdr _otcph, *oth, *tcph;
-+ struct rtable *rt;
-+ u_int16_t tmp_port;
-+ u_int32_t tmp_addr;
-+ int hh_len;
-+
-+ /* IP header checks: fragment. */
-+ if (oldskb->nh.iph->frag_off & htons(IP_OFFSET))
-+ return;
-+
-+ oth = skb_header_pointer(oldskb, oldskb->nh.iph->ihl * 4,
-+ sizeof(_otcph), &_otcph);
-+ if (oth == NULL)
-+ return;
-+
-+ /* DELUDE only answers SYN. */
-+ if(!oth->syn || oth->ack || oth->fin || oth->rst)
-+ return;
-+
-+ /* Check checksum */
-+ if (nf_ip_checksum(oldskb, hook, iph->ihl * 4, IPPROTO_TCP))
-+ return;
-+
-+ if ((rt = route_reverse(oldskb, oth, hook)) == NULL)
-+ return;
-+
-+ hh_len = LL_RESERVED_SPACE(rt->u.dst.dev);
-+
-+ /* We need a linear, writeable skb. We also need to expand
-+ headroom in case hh_len of incoming interface < hh_len of
-+ outgoing interface */
-+ nskb = skb_copy_expand(oldskb, hh_len, skb_tailroom(oldskb),
-+ GFP_ATOMIC);
-+ if (!nskb) {
-+ dst_release(&rt->u.dst);
-+ return;
-+ }
-+
-+ dst_release(nskb->dst);
-+ nskb->dst = &rt->u.dst;
-+
-+ /* This packet will not be the same as the other: clear nf fields */
-+ nf_reset(nskb);
-+ nskb->nfmark = 0;
-+ skb_init_secmark(nskb);
-+
-+ tcph = (struct tcphdr *)((u_int32_t*)nskb->nh.iph + nskb->nh.iph->ihl);
-+
-+ /* Swap source and dest */
-+ tmp_addr = nskb->nh.iph->saddr;
-+ nskb->nh.iph->saddr = nskb->nh.iph->daddr;
-+ nskb->nh.iph->daddr = tmp_addr;
-+ tmp_port = tcph->source;
-+ tcph->source = tcph->dest;
-+ tcph->dest = tmp_port;
-+
-+ /* Truncate to length (no data) */
-+ tcph->doff = sizeof(struct tcphdr)/4;
-+ skb_trim(nskb, nskb->nh.iph->ihl*4 + sizeof(struct tcphdr));
-+ nskb->nh.iph->tot_len = htons(nskb->len);
-+
-+ tcph->seq = oth->ack_seq;
-+ tcph->ack_seq = 0;
-+
-+ /* Reset flags */
-+ ((u_int8_t *)tcph)[13] = 0;
-+ tcph->syn = tcph->ack = 1;
-+
-+ tcph->window = 0;
-+ tcph->urg_ptr = 0;
-+
-+ /* Adjust TCP checksum */
-+ tcph->check = 0;
-+ tcph->check = tcp_v4_check(tcph, sizeof(struct tcphdr),
-+ nskb->nh.iph->saddr,
-+ nskb->nh.iph->daddr,
-+ csum_partial((char *)tcph,
-+ sizeof(struct tcphdr), 0));
-+
-+ /* Adjust IP TTL, DF */
-+ nskb->nh.iph->ttl = dst_metric(nskb->dst, RTAX_HOPLIMIT);
-+ /* Set DF, id = 0 */
-+ nskb->nh.iph->frag_off = htons(IP_DF);
-+ nskb->nh.iph->id = 0;
-+
-+ /* Adjust IP checksum */
-+ nskb->nh.iph->check = 0;
-+ nskb->nh.iph->check = ip_fast_csum((unsigned char *)nskb->nh.iph,
-+ nskb->nh.iph->ihl);
-+
-+ /* "Never happens" */
-+ if (nskb->len > dst_mtu(nskb->dst))
-+ goto free_nskb;
-+
-+ nf_ct_attach(nskb, oldskb);
-+
-+ NF_HOOK(PF_INET, NF_IP_LOCAL_OUT, nskb, NULL, nskb->dst->dev,
-+ dst_output);
-+ return;
-+
-+ free_nskb:
-+ kfree_skb(nskb);
-+ return;
-+}
-+
-+static unsigned int xt_delude_target(struct sk_buff **pskb,
-+ const struct net_device *in, const struct net_device *out,
-+ unsigned int hooknum, const struct xt_target *target, const void *targinfo
-+#ifdef HAVE_TARGUSERINFO
-+ ,
-+ void *userinfo
-+#endif
-+ )
-+{
-+ /* WARNING: This code causes reentry within iptables.
-+ This means that the iptables jump stack is now crap. We
-+ must return an absolute verdict. --RR */
-+ send_reset(*pskb, hooknum);
-+ return NF_DROP;
-+}
-+
-+static int xt_delude_check(const char *tablename, const void *e_void,
-+ const struct xt_target *target, void *targinfo,
-+#ifdef HAVE_TARGINFOSIZE
-+ unsigned int targinfosize,
-+#endif
-+ unsigned int hook_mask)
-+{
-+ if(hook_mask & ~((1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD))) {
-+ printk(KERN_WARNING PFX "DELUDE may not be used in chains "
-+ "other than INPUT and FORWARD\n");
-+ return 0;
-+ }
-+ return 1;
-+}
-+
-+static struct xt_target xt_delude_info = {
-+ .name = "DELUDE",
-+ .target = xt_delude_target,
-+ .checkentry = xt_delude_check,
-+ .table = "filter",
-+ .hooks = (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) |
-+ (1 << NF_IP_LOCAL_OUT),
-+ .proto = IPPROTO_TCP,
-+ .family = AF_INET,
-+ .me = THIS_MODULE,
-+};
-+
-+static int __init xt_delude_init(void)
-+{
-+ return xt_register_target(&xt_delude_info);
-+}
-+
-+static void __exit xt_delude_exit(void)
-+{
-+ xt_unregister_target(&xt_delude_info);
-+}
-+
-+module_init(xt_delude_init);
-+module_exit(xt_delude_exit);
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
-+MODULE_DESCRIPTION("netfilter DELUDE target");
-diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_portscan.c linux-2.6.19.1/net/netfilter/xt_portscan.c
---- linux-2.6.19.1.orig/net/netfilter/xt_portscan.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.1/net/netfilter/xt_portscan.c 2007-01-11 13:28:14.407920893 +0100
-@@ -0,0 +1,282 @@
-+/*
-+ portscan match for netfilter
-+
-+ Written by Jan Engelhardt, 2006 - 2007
-+ released under the terms of the GNU General Public
-+ License version 2.x and only versions 2.x.
-+*/
-+#include <linux/in.h>
-+#include <linux/ip.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/skbuff.h>
-+#include <linux/stat.h>
-+#include <linux/tcp.h>
-+#include <linux/types.h>
-+#include <linux/version.h>
-+#include <linux/netfilter/x_tables.h>
-+#include <linux/netfilter/xt_tcpudp.h>
-+#if defined(CONFIG_IP_NF_CONNTRACK) || defined(CONFIG_IP_NF_CONNTRACK_MODULE)
-+# include <linux/netfilter_ipv4/ip_conntrack.h>
-+#else /* linux-2.6.20+ */
-+# include <net/netfilter/nf_nat_rule.h>
-+#endif
-+#include <linux/netfilter/xt_portscan.h>
-+#define PFX KBUILD_MODNAME ": "
-+
-+/* Out of tree workarounds */
-+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
-+# define HAVE_MATCHINFOSIZE 1
-+#endif
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
-+# define nfmark mark
-+#endif
-+
-+enum {
-+ TCP_FLAGS_ALL3 = TCP_FLAG_FIN | TCP_FLAG_RST | TCP_FLAG_SYN,
-+ TCP_FLAGS_ALL4 = TCP_FLAGS_ALL3 | TCP_FLAG_ACK,
-+ TCP_FLAGS_ALL6 = TCP_FLAGS_ALL4 | TCP_FLAG_PSH | TCP_FLAG_URG,
-+};
-+
-+/* Module parameters */
-+static unsigned int
-+ connmark_mask = ~0,
-+ packet_mask = ~0,
-+ mark_seen = 0x9,
-+ mark_synrcv = 0x1,
-+ mark_closed = 0x2,
-+ mark_synscan = 0x3,
-+ mark_estab1 = 0x4,
-+ mark_estab2 = 0x5,
-+ mark_cnscan = 0x6,
-+ mark_grscan = 0x7,
-+ mark_valid = 0x8;
-+
-+module_param(connmark_mask, uint, S_IRUGO | S_IWUSR);
-+module_param(packet_mask, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_seen, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_synrcv, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_closed, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_synscan, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_estab1, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_estab2, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_cnscan, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_grscan, uint, S_IRUGO | S_IWUSR);
-+module_param(mark_valid, uint, S_IRUGO | S_IWUSR);
-+MODULE_PARM_DESC(connmark_mask, "only set specified bits in connection mark");
-+MODULE_PARM_DESC(packet_mask, "only set specified bits in packet mark");
-+MODULE_PARM_DESC(mark_seen, "nfmark value for packet-seen state");
-+MODULE_PARM_DESC(mark_synrcv, "connmark value for SYN Received state");
-+MODULE_PARM_DESC(mark_closed, "connmark value for closed state");
-+MODULE_PARM_DESC(mark_synscan, "connmark value for SYN Scan state");
-+MODULE_PARM_DESC(mark_estab1, "connmark value for Established-1 state");
-+MODULE_PARM_DESC(mark_estab2, "connmark value for Established-2 state");
-+MODULE_PARM_DESC(mark_cnscan, "connmark value for Connect Scan state");
-+MODULE_PARM_DESC(mark_grscan, "connmark value for Grab Scan state");
-+MODULE_PARM_DESC(mark_valid, "connmark value for Valid state");
-+
-+/* TCP flag functions */
-+static inline int tflg_ack4(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) == TCP_FLAG_ACK;
-+}
-+
-+static inline int tflg_ack6(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL6) == TCP_FLAG_ACK;
-+}
-+
-+static inline int tflg_fin(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL3) == TCP_FLAG_FIN;
-+}
-+
-+static inline int tflg_rst(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL3) == TCP_FLAG_RST;
-+}
-+
-+static inline int tflg_rstack(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) ==
-+ (TCP_FLAG_ACK | TCP_FLAG_RST);
-+}
-+
-+static inline int tflg_syn(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) == TCP_FLAG_SYN;
-+}
-+
-+static inline int tflg_synack(const struct tcphdr *th)
-+{
-+ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) ==
-+ (TCP_FLAG_SYN | TCP_FLAG_ACK);
-+}
-+
-+/* portscan functions */
-+static inline int xt_portscan_stealth(const struct tcphdr *th)
-+{
-+ /*
-+ * "Connection refused" replies to our own probes must not be matched.
-+ */
-+ if(tflg_rstack(th))
-+ return 0;
-+
-+ if(tflg_rst(th) && printk_ratelimit()) {
-+ printk(KERN_WARNING PFX "Warning: Pure RST received\n");
-+ return 0;
-+ }
-+
-+ /*
-+ * -p tcp ! --syn -m conntrack --ctstate INVALID: Looking for non-start
-+ * packets that are not associated with any connection -- this will
-+ * match most scan types (NULL, XMAS, FIN) and ridiculous flag
-+ * combinations (SYN-RST, SYN-FIN, SYN-FIN-RST, FIN-RST, etc.).
-+ */
-+ return !tflg_syn(th);
-+}
-+
-+static inline int xt_portscan_full(int mark, enum ip_conntrack_info ctstate,
-+ int loopback, const struct tcphdr *tcph, int payload_len)
-+{
-+ if(mark == mark_estab2) {
-+ /*
-+ * -m connmark --mark $ESTAB2
-+ */
-+ if(tflg_ack4(tcph) && payload_len == 0)
-+ return mark; /* keep mark */
-+ else if(tflg_rst(tcph) || tflg_fin(tcph))
-+ return mark_grscan;
-+ else
-+ return mark_valid;
-+ } else if(mark == mark_estab1) {
-+ /*
-+ * -m connmark --mark $ESTAB1
-+ */
-+ if(tflg_rst(tcph) || tflg_fin(tcph))
-+ return mark_cnscan;
-+ else if(!loopback && tflg_ack4(tcph) && payload_len == 0)
-+ return mark_estab2;
-+ else
-+ return mark_valid;
-+ } else if(mark == mark_synrcv) {
-+ /*
-+ * -m connmark --mark $SYN
-+ */
-+ if(loopback && tflg_synack(tcph))
-+ return mark; /* keep mark */
-+ else if(loopback && tflg_rstack(tcph))
-+ return mark_closed;
-+ else if(tflg_ack6(tcph))
-+ return mark_estab1;
-+ else
-+ return mark_synscan;
-+ } else if(ctstate == IP_CT_NEW && tflg_syn(tcph)) {
-+ /*
-+ * -p tcp --syn --ctstate NEW
-+ */
-+ return mark_synrcv;
-+ }
-+ return mark;
-+}
-+
-+static int xt_portscan_match(const struct sk_buff *skb,
-+ const struct net_device *in, const struct net_device *out,
-+ const struct xt_match *match, const void *matchinfo, int offset,
-+ unsigned int protoff, int *hotdrop)
-+{
-+ const struct xt_portscan_info *info = matchinfo;
-+ enum ip_conntrack_info ctstate;
-+ struct ip_conntrack *ctdata;
-+ const struct tcphdr *tcph;
-+ struct tcphdr tcph_buf;
-+
-+ tcph = skb_header_pointer(skb, protoff, sizeof(tcph_buf), &tcph_buf);
-+ if(tcph == NULL)
-+ return 0;
-+
-+ /* Check for invalid packets: -m conntrack --ctstate INVALID */
-+ if((ctdata = ip_conntrack_get(skb, &ctstate)) == NULL) {
-+ if(info->match_stealth)
-+ return xt_portscan_stealth(tcph);
-+ /*
-+ * If @ctdata is NULL, we cannot match the other scan
-+ * types, return.
-+ */
-+ return 0;
-+ }
-+
-+ /*
-+ * If -m portscan was previously applied to this packet, the rules we
-+ * simulate must not be run through again. And for speedup, do not call
-+ * it either when the connection is already VALID.
-+ */
-+ if((ctdata->mark & connmark_mask) == mark_valid ||
-+ (skb->nfmark & packet_mask) != mark_seen)
-+ {
-+ unsigned int n;
-+ n = xt_portscan_full(ctdata->mark & connmark_mask, ctstate,
-+ in == &loopback_dev, tcph,
-+ skb->len - protoff - 4 * tcph->doff);
-+
-+ ctdata->mark = (ctdata->mark & ~connmark_mask) | n;
-+ ((struct sk_buff *)skb)->nfmark =
-+ (skb->nfmark & ~packet_mask) | mark_seen;
-+ }
-+
-+ return (info->match_syn && ctdata->mark == mark_synscan) ||
-+ (info->match_cn && ctdata->mark == mark_cnscan) ||
-+ (info->match_gr && ctdata->mark == mark_grscan);
-+}
-+
-+static int xt_portscan_checkentry(const char *tablename, const void *entry,
-+ const struct xt_match *match, void *matchinfo,
-+#ifdef HAVE_MATCHINFOSIZE
-+ unsigned int matchinfosize,
-+#endif
-+ unsigned int hook_mask)
-+{
-+ const struct xt_portscan_info *info = matchinfo;
-+#ifdef HAVE_MATCHINFOSIZE
-+ if(matchinfosize != XT_ALIGN(sizeof(struct xt_portscan_info))) {
-+ printk(KERN_WARNING PFX "matchinfosize %u != %Zu\n",
-+ matchinfosize,
-+ XT_ALIGN(sizeof(struct xt_portscan_info)));
-+ return 0;
-+ }
-+#endif
-+ if((info->match_stealth & ~1) || (info->match_syn & ~1) ||
-+ (info->match_cn & ~1) || (info->match_gr & ~1)) {
-+ printk(KERN_WARNING PFX "Invalid flags\n");
-+ return 0;
-+ }
-+ return 1;
-+}
-+
-+static struct xt_match xt_portscan = {
-+ .name = "portscan",
-+ .match = xt_portscan_match,
-+ .checkentry = xt_portscan_checkentry,
-+ .matchsize = sizeof(struct xt_portscan_info),
-+ .proto = IPPROTO_TCP,
-+ .family = AF_INET,
-+ .me = THIS_MODULE,
-+};
-+
-+static int __init xt_portscan_init(void)
-+{
-+ return xt_register_match(&xt_portscan);
-+}
-+
-+static void __exit xt_portscan_exit(void)
-+{
-+ xt_unregister_match(&xt_portscan);
-+ return;
-+}
-+
-+module_init(xt_portscan_init);
-+module_exit(xt_portscan_exit);
-+MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
-+MODULE_DESCRIPTION("netfilter portscan match module");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("ipt_portscan");
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/pkt_sched.h linux-2.6.19.dev/include/linux/pkt_sched.h
---- linux-2.6.19.old/include/linux/pkt_sched.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/pkt_sched.h 2006-12-14 03:13:51.000000000 +0100
-@@ -146,8 +146,35 @@
- *
- * The only reason for this is efficiency, it is possible
- * to change these parameters in compile time.
-+ *
-+ * If you need to play with these values use esfq instead.
- */
-
-+/* ESFQ section */
-+
-+enum
-+{
-+ /* traditional */
-+ TCA_SFQ_HASH_CLASSIC,
-+ TCA_SFQ_HASH_DST,
-+ TCA_SFQ_HASH_SRC,
-+ TCA_SFQ_HASH_FWMARK,
-+ /* direct */
-+ TCA_SFQ_HASH_DSTDIR,
-+ TCA_SFQ_HASH_SRCDIR,
-+ TCA_SFQ_HASH_FWMARKDIR,
-+};
-+
-+struct tc_esfq_qopt
-+{
-+ unsigned quantum; /* Bytes per round allocated to flow */
-+ int perturb_period; /* Period of hash perturbation */
-+ __u32 limit; /* Maximal packets in queue */
-+ unsigned divisor; /* Hash divisor */
-+ unsigned flows; /* Maximal number of flows */
-+ unsigned hash_kind; /* Hash function to use for flow identification */
-+};
-+
- /* RED section */
-
- enum
-diff -urN linux-2.6.19.old/net/sched/Kconfig linux-2.6.19.dev/net/sched/Kconfig
---- linux-2.6.19.old/net/sched/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/sched/Kconfig 2006-12-14 03:13:51.000000000 +0100
-@@ -185,6 +185,28 @@
- To compile this code as a module, choose M here: the
- module will be called sch_sfq.
-
-+config NET_SCH_ESFQ
-+ tristate "ESFQ queue"
-+ depends on NET_SCHED
-+ ---help---
-+ Say Y here if you want to use the Enhanced Stochastic Fairness
-+ Queueing (ESFQ) packet scheduling algorithm for some of your network
-+ devices or as a leaf discipline for a classful qdisc such as HTB or
-+ CBQ (see the top of <file:net/sched/sch_esfq.c> for details and
-+ references to the SFQ algorithm).
-+
-+ This is an enchanced SFQ version which allows you to control some
-+ hardcoded values in the SFQ scheduler: queue depth, hash table size,
-+ and queues limit.
-+
-+ ESFQ also adds control to the hash function used to identify packet
-+ flows. The original SFQ hashes by individual flow (TCP session or UDP
-+ stream); ESFQ can hash by src or dst IP as well, which can be more
-+ fair to users in some networking situations.
-+
-+ To compile this code as a module, choose M here: the
-+ module will be called sch_esfq.
-+
- config NET_SCH_TEQL
- tristate "True Link Equalizer (TEQL)"
- ---help---
-diff -urN linux-2.6.19.old/net/sched/Makefile linux-2.6.19.dev/net/sched/Makefile
---- linux-2.6.19.old/net/sched/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/sched/Makefile 2006-12-14 03:13:51.000000000 +0100
-@@ -23,6 +23,7 @@
- obj-$(CONFIG_NET_SCH_INGRESS) += sch_ingress.o
- obj-$(CONFIG_NET_SCH_DSMARK) += sch_dsmark.o
- obj-$(CONFIG_NET_SCH_SFQ) += sch_sfq.o
-+obj-$(CONFIG_NET_SCH_ESFQ) += sch_esfq.o
- obj-$(CONFIG_NET_SCH_TBF) += sch_tbf.o
- obj-$(CONFIG_NET_SCH_TEQL) += sch_teql.o
- obj-$(CONFIG_NET_SCH_PRIO) += sch_prio.o
-diff -urN linux-2.6.19.old/net/sched/sch_esfq.c linux-2.6.19.dev/net/sched/sch_esfq.c
---- linux-2.6.19.old/net/sched/sch_esfq.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/net/sched/sch_esfq.c 2006-12-14 03:13:51.000000000 +0100
-@@ -0,0 +1,644 @@
-+/*
-+ * net/sched/sch_esfq.c Extended Stochastic Fairness Queueing discipline.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ *
-+ * Authors: Alexey Kuznetsov, <kuznet@ms2.inr.ac.ru>
-+ *
-+ * Changes: Alexander Atanasov, <alex@ssi.bg>
-+ * Added dynamic depth,limit,divisor,hash_kind options.
-+ * Added dst and src hashes.
-+ *
-+ * Alexander Clouter, <alex@digriz.org.uk>
-+ * Ported ESFQ to Linux 2.6.
-+ *
-+ * Corey Hickey, <bugfood-c@fatooh.org>
-+ * Maintenance of the Linux 2.6 port.
-+ * Added fwmark hash (thanks to Robert Kurjata)
-+ * Added direct hashing for src, dst, and fwmark.
-+ *
-+ */
-+
-+#include <linux/autoconf.h>
-+#include <linux/module.h>
-+#include <asm/uaccess.h>
-+#include <asm/system.h>
-+#include <linux/bitops.h>
-+#include <linux/types.h>
-+#include <linux/kernel.h>
-+#include <linux/jiffies.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/socket.h>
-+#include <linux/sockios.h>
-+#include <linux/in.h>
-+#include <linux/errno.h>
-+#include <linux/interrupt.h>
-+#include <linux/if_ether.h>
-+#include <linux/inet.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/notifier.h>
-+#include <linux/init.h>
-+#include <net/ip.h>
-+#include <linux/ipv6.h>
-+#include <net/route.h>
-+#include <linux/skbuff.h>
-+#include <net/sock.h>
-+#include <net/pkt_sched.h>
-+
-+
-+/* Stochastic Fairness Queuing algorithm.
-+ For more comments look at sch_sfq.c.
-+ The difference is that you can change limit, depth,
-+ hash table size and choose 7 hash types.
-+
-+ classic: same as in sch_sfq.c
-+ dst: destination IP address
-+ src: source IP address
-+ fwmark: netfilter mark value
-+ dst_direct:
-+ src_direct:
-+ fwmark_direct: direct hashing of the above sources
-+
-+ TODO:
-+ make sfq_change work.
-+*/
-+
-+
-+/* This type should contain at least SFQ_DEPTH*2 values */
-+typedef unsigned int esfq_index;
-+
-+struct esfq_head
-+{
-+ esfq_index next;
-+ esfq_index prev;
-+};
-+
-+struct esfq_sched_data
-+{
-+/* Parameters */
-+ int perturb_period;
-+ unsigned quantum; /* Allotment per round: MUST BE >= MTU */
-+ int limit;
-+ unsigned depth;
-+ unsigned hash_divisor;
-+ unsigned hash_kind;
-+/* Variables */
-+ struct timer_list perturb_timer;
-+ int perturbation;
-+ esfq_index tail; /* Index of current slot in round */
-+ esfq_index max_depth; /* Maximal depth */
-+
-+ esfq_index *ht; /* Hash table */
-+ esfq_index *next; /* Active slots link */
-+ short *allot; /* Current allotment per slot */
-+ unsigned short *hash; /* Hash value indexed by slots */
-+ struct sk_buff_head *qs; /* Slot queue */
-+ struct esfq_head *dep; /* Linked list of slots, indexed by depth */
-+ unsigned dyn_min; /* For dynamic divisor adjustment; minimum value seen */
-+ unsigned dyn_max; /* maximum value seen */
-+ unsigned dyn_range; /* saved range */
-+};
-+
-+static __inline__ unsigned esfq_hash_u32(struct esfq_sched_data *q,u32 h)
-+{
-+ int pert = q->perturbation;
-+
-+ if (pert)
-+ h = (h<<pert) ^ (h>>(0x1F - pert));
-+
-+ h = ntohl(h) * 2654435761UL;
-+ return h & (q->hash_divisor-1);
-+}
-+
-+/* Hash input values directly into the "nearest" slot, taking into account the
-+ * range of input values seen. This is most useful when the hash table is at
-+ * least as large as the range of possible values. */
-+static __inline__ unsigned esfq_hash_direct(struct esfq_sched_data *q, u32 h)
-+{
-+ /* adjust minimum and maximum */
-+ if (h < q->dyn_min || h > q->dyn_max) {
-+ q->dyn_min = h < q->dyn_min ? h : q->dyn_min;
-+ q->dyn_max = h > q->dyn_max ? h : q->dyn_max;
-+
-+ /* find new range */
-+ if ((q->dyn_range = q->dyn_max - q->dyn_min) >= q->hash_divisor)
-+ printk(KERN_WARNING "ESFQ: (direct hash) Input range %u is larger than hash "
-+ "table. See ESFQ README for details.\n", q->dyn_range);
-+ }
-+
-+ /* hash input values into slot numbers */
-+ if (q->dyn_min == q->dyn_max)
-+ return 0; /* only one value seen; avoid division by 0 */
-+ else
-+ return (h - q->dyn_min) * (q->hash_divisor - 1) / q->dyn_range;
-+}
-+
-+static __inline__ unsigned esfq_fold_hash_classic(struct esfq_sched_data *q, u32 h, u32 h1)
-+{
-+ int pert = q->perturbation;
-+
-+ /* Have we any rotation primitives? If not, WHY? */
-+ h ^= (h1<<pert) ^ (h1>>(0x1F - pert));
-+ h ^= h>>10;
-+ return h & (q->hash_divisor-1);
-+}
-+
-+static unsigned esfq_hash(struct esfq_sched_data *q, struct sk_buff *skb)
-+{
-+ u32 h, h2;
-+ u32 hs;
-+ u32 nfm;
-+
-+ switch (skb->protocol) {
-+ case __constant_htons(ETH_P_IP):
-+ {
-+ struct iphdr *iph = skb->nh.iph;
-+ h = iph->daddr;
-+ hs = iph->saddr;
-+ nfm = skb->nfmark;
-+ h2 = hs^iph->protocol;
-+ if (!(iph->frag_off&htons(IP_MF|IP_OFFSET)) &&
-+ (iph->protocol == IPPROTO_TCP ||
-+ iph->protocol == IPPROTO_UDP ||
-+ iph->protocol == IPPROTO_SCTP ||
-+ iph->protocol == IPPROTO_DCCP ||
-+ iph->protocol == IPPROTO_ESP))
-+ h2 ^= *(((u32*)iph) + iph->ihl);
-+ break;
-+ }
-+ case __constant_htons(ETH_P_IPV6):
-+ {
-+ struct ipv6hdr *iph = skb->nh.ipv6h;
-+ h = iph->daddr.s6_addr32[3];
-+ hs = iph->saddr.s6_addr32[3];
-+ nfm = skb->nfmark;
-+ h2 = hs^iph->nexthdr;
-+ if (iph->nexthdr == IPPROTO_TCP ||
-+ iph->nexthdr == IPPROTO_UDP ||
-+ iph->nexthdr == IPPROTO_SCTP ||
-+ iph->nexthdr == IPPROTO_DCCP ||
-+ iph->nexthdr == IPPROTO_ESP)
-+ h2 ^= *(u32*)&iph[1];
-+ break;
-+ }
-+ default:
-+ h = (u32)(unsigned long)skb->dst;
-+ hs = (u32)(unsigned long)skb->sk;
-+ nfm = skb->nfmark;
-+ h2 = hs^skb->protocol;
-+ }
-+ switch(q->hash_kind)
-+ {
-+ case TCA_SFQ_HASH_CLASSIC:
-+ return esfq_fold_hash_classic(q, h, h2);
-+ case TCA_SFQ_HASH_DST:
-+ return esfq_hash_u32(q,h);
-+ case TCA_SFQ_HASH_DSTDIR:
-+ return esfq_hash_direct(q, ntohl(h));
-+ case TCA_SFQ_HASH_SRC:
-+ return esfq_hash_u32(q,hs);
-+ case TCA_SFQ_HASH_SRCDIR:
-+ return esfq_hash_direct(q, ntohl(hs));
-+#ifdef CONFIG_NETFILTER
-+ case TCA_SFQ_HASH_FWMARK:
-+ return esfq_hash_u32(q,nfm);
-+ case TCA_SFQ_HASH_FWMARKDIR:
-+ return esfq_hash_direct(q,nfm);
-+#endif
-+ default:
-+ if (net_ratelimit())
-+ printk(KERN_WARNING "ESFQ: Unknown hash method. Falling back to classic.\n");
-+ }
-+ return esfq_fold_hash_classic(q, h, h2);
-+}
-+
-+static inline void esfq_link(struct esfq_sched_data *q, esfq_index x)
-+{
-+ esfq_index p, n;
-+ int d = q->qs[x].qlen + q->depth;
-+
-+ p = d;
-+ n = q->dep[d].next;
-+ q->dep[x].next = n;
-+ q->dep[x].prev = p;
-+ q->dep[p].next = q->dep[n].prev = x;
-+}
-+
-+static inline void esfq_dec(struct esfq_sched_data *q, esfq_index x)
-+{
-+ esfq_index p, n;
-+
-+ n = q->dep[x].next;
-+ p = q->dep[x].prev;
-+ q->dep[p].next = n;
-+ q->dep[n].prev = p;
-+
-+ if (n == p && q->max_depth == q->qs[x].qlen + 1)
-+ q->max_depth--;
-+
-+ esfq_link(q, x);
-+}
-+
-+static inline void esfq_inc(struct esfq_sched_data *q, esfq_index x)
-+{
-+ esfq_index p, n;
-+ int d;
-+
-+ n = q->dep[x].next;
-+ p = q->dep[x].prev;
-+ q->dep[p].next = n;
-+ q->dep[n].prev = p;
-+ d = q->qs[x].qlen;
-+ if (q->max_depth < d)
-+ q->max_depth = d;
-+
-+ esfq_link(q, x);
-+}
-+
-+static unsigned int esfq_drop(struct Qdisc *sch)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ esfq_index d = q->max_depth;
-+ struct sk_buff *skb;
-+ unsigned int len;
-+
-+ /* Queue is full! Find the longest slot and
-+ drop a packet from it */
-+
-+ if (d > 1) {
-+ esfq_index x = q->dep[d+q->depth].next;
-+ skb = q->qs[x].prev;
-+ len = skb->len;
-+ __skb_unlink(skb, &q->qs[x]);
-+ kfree_skb(skb);
-+ esfq_dec(q, x);
-+ sch->q.qlen--;
-+ sch->qstats.drops++;
-+ return len;
-+ }
-+
-+ if (d == 1) {
-+ /* It is difficult to believe, but ALL THE SLOTS HAVE LENGTH 1. */
-+ d = q->next[q->tail];
-+ q->next[q->tail] = q->next[d];
-+ q->allot[q->next[d]] += q->quantum;
-+ skb = q->qs[d].prev;
-+ len = skb->len;
-+ __skb_unlink(skb, &q->qs[d]);
-+ kfree_skb(skb);
-+ esfq_dec(q, d);
-+ sch->q.qlen--;
-+ q->ht[q->hash[d]] = q->depth;
-+ sch->qstats.drops++;
-+ return len;
-+ }
-+
-+ return 0;
-+}
-+
-+static int
-+esfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ unsigned hash = esfq_hash(q, skb);
-+ unsigned depth = q->depth;
-+ esfq_index x;
-+
-+ x = q->ht[hash];
-+ if (x == depth) {
-+ q->ht[hash] = x = q->dep[depth].next;
-+ q->hash[x] = hash;
-+ }
-+ __skb_queue_tail(&q->qs[x], skb);
-+ esfq_inc(q, x);
-+ if (q->qs[x].qlen == 1) { /* The flow is new */
-+ if (q->tail == depth) { /* It is the first flow */
-+ q->tail = x;
-+ q->next[x] = x;
-+ q->allot[x] = q->quantum;
-+ } else {
-+ q->next[x] = q->next[q->tail];
-+ q->next[q->tail] = x;
-+ q->tail = x;
-+ }
-+ }
-+ if (++sch->q.qlen < q->limit-1) {
-+ sch->bstats.bytes += skb->len;
-+ sch->bstats.packets++;
-+ return 0;
-+ }
-+
-+ esfq_drop(sch);
-+ return NET_XMIT_CN;
-+}
-+
-+static int
-+esfq_requeue(struct sk_buff *skb, struct Qdisc* sch)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ unsigned hash = esfq_hash(q, skb);
-+ unsigned depth = q->depth;
-+ esfq_index x;
-+
-+ x = q->ht[hash];
-+ if (x == depth) {
-+ q->ht[hash] = x = q->dep[depth].next;
-+ q->hash[x] = hash;
-+ }
-+ __skb_queue_head(&q->qs[x], skb);
-+ esfq_inc(q, x);
-+ if (q->qs[x].qlen == 1) { /* The flow is new */
-+ if (q->tail == depth) { /* It is the first flow */
-+ q->tail = x;
-+ q->next[x] = x;
-+ q->allot[x] = q->quantum;
-+ } else {
-+ q->next[x] = q->next[q->tail];
-+ q->next[q->tail] = x;
-+ q->tail = x;
-+ }
-+ }
-+ if (++sch->q.qlen < q->limit - 1) {
-+ sch->qstats.requeues++;
-+ return 0;
-+ }
-+
-+ sch->qstats.drops++;
-+ esfq_drop(sch);
-+ return NET_XMIT_CN;
-+}
-+
-+
-+
-+
-+static struct sk_buff *
-+esfq_dequeue(struct Qdisc* sch)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ struct sk_buff *skb;
-+ unsigned depth = q->depth;
-+ esfq_index a, old_a;
-+
-+ /* No active slots */
-+ if (q->tail == depth)
-+ return NULL;
-+
-+ a = old_a = q->next[q->tail];
-+
-+ /* Grab packet */
-+ skb = __skb_dequeue(&q->qs[a]);
-+ esfq_dec(q, a);
-+ sch->q.qlen--;
-+
-+ /* Is the slot empty? */
-+ if (q->qs[a].qlen == 0) {
-+ q->ht[q->hash[a]] = depth;
-+ a = q->next[a];
-+ if (a == old_a) {
-+ q->tail = depth;
-+ return skb;
-+ }
-+ q->next[q->tail] = a;
-+ q->allot[a] += q->quantum;
-+ } else if ((q->allot[a] -= skb->len) <= 0) {
-+ q->tail = a;
-+ a = q->next[a];
-+ q->allot[a] += q->quantum;
-+ }
-+
-+ return skb;
-+}
-+
-+static void
-+esfq_reset(struct Qdisc* sch)
-+{
-+ struct sk_buff *skb;
-+
-+ while ((skb = esfq_dequeue(sch)) != NULL)
-+ kfree_skb(skb);
-+}
-+
-+static void esfq_perturbation(unsigned long arg)
-+{
-+ struct Qdisc *sch = (struct Qdisc*)arg;
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+
-+ q->perturbation = net_random()&0x1F;
-+
-+ if (q->perturb_period) {
-+ q->perturb_timer.expires = jiffies + q->perturb_period;
-+ add_timer(&q->perturb_timer);
-+ }
-+}
-+
-+static int esfq_change(struct Qdisc *sch, struct rtattr *opt)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ struct tc_esfq_qopt *ctl = RTA_DATA(opt);
-+ int old_perturb = q->perturb_period;
-+
-+ if (opt->rta_len < RTA_LENGTH(sizeof(*ctl)))
-+ return -EINVAL;
-+
-+ sch_tree_lock(sch);
-+ q->quantum = ctl->quantum ? : psched_mtu(sch->dev);
-+ q->perturb_period = ctl->perturb_period*HZ;
-+// q->hash_divisor = ctl->divisor;
-+// q->tail = q->limit = q->depth = ctl->flows;
-+
-+ if (ctl->limit)
-+ q->limit = min_t(u32, ctl->limit, q->depth);
-+
-+ if (ctl->hash_kind) {
-+ q->hash_kind = ctl->hash_kind;
-+ if (q->hash_kind != TCA_SFQ_HASH_CLASSIC)
-+ q->perturb_period = 0;
-+ }
-+
-+ // is sch_tree_lock enough to do this ?
-+ while (sch->q.qlen >= q->limit-1)
-+ esfq_drop(sch);
-+
-+ if (old_perturb)
-+ del_timer(&q->perturb_timer);
-+ if (q->perturb_period) {
-+ q->perturb_timer.expires = jiffies + q->perturb_period;
-+ add_timer(&q->perturb_timer);
-+ } else {
-+ q->perturbation = 0;
-+ }
-+ sch_tree_unlock(sch);
-+ return 0;
-+}
-+
-+static int esfq_init(struct Qdisc *sch, struct rtattr *opt)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ struct tc_esfq_qopt *ctl;
-+ esfq_index p = ~0UL/2;
-+ int i;
-+
-+ if (opt && opt->rta_len < RTA_LENGTH(sizeof(*ctl)))
-+ return -EINVAL;
-+
-+ init_timer(&q->perturb_timer);
-+ q->perturb_timer.data = (unsigned long)sch;
-+ q->perturb_timer.function = esfq_perturbation;
-+ q->perturbation = 0;
-+ q->hash_kind = TCA_SFQ_HASH_CLASSIC;
-+ q->max_depth = 0;
-+ q->dyn_min = ~0U; /* maximum value for this type */
-+ q->dyn_max = 0; /* dyn_min/dyn_max will be set properly upon first packet */
-+ if (opt == NULL) {
-+ q->quantum = psched_mtu(sch->dev);
-+ q->perturb_period = 0;
-+ q->hash_divisor = 1024;
-+ q->tail = q->limit = q->depth = 128;
-+
-+ } else {
-+ ctl = RTA_DATA(opt);
-+ q->quantum = ctl->quantum ? : psched_mtu(sch->dev);
-+ q->perturb_period = ctl->perturb_period*HZ;
-+ q->hash_divisor = ctl->divisor ? : 1024;
-+ q->tail = q->limit = q->depth = ctl->flows ? : 128;
-+
-+ if ( q->depth > p - 1 )
-+ return -EINVAL;
-+
-+ if (ctl->limit)
-+ q->limit = min_t(u32, ctl->limit, q->depth);
-+
-+ if (ctl->hash_kind) {
-+ q->hash_kind = ctl->hash_kind;
-+ }
-+
-+ if (q->perturb_period) {
-+ q->perturb_timer.expires = jiffies + q->perturb_period;
-+ add_timer(&q->perturb_timer);
-+ }
-+ }
-+
-+ q->ht = kmalloc(q->hash_divisor*sizeof(esfq_index), GFP_KERNEL);
-+ if (!q->ht)
-+ goto err_case;
-+
-+ q->dep = kmalloc((1+q->depth*2)*sizeof(struct esfq_head), GFP_KERNEL);
-+ if (!q->dep)
-+ goto err_case;
-+ q->next = kmalloc(q->depth*sizeof(esfq_index), GFP_KERNEL);
-+ if (!q->next)
-+ goto err_case;
-+
-+ q->allot = kmalloc(q->depth*sizeof(short), GFP_KERNEL);
-+ if (!q->allot)
-+ goto err_case;
-+ q->hash = kmalloc(q->depth*sizeof(unsigned short), GFP_KERNEL);
-+ if (!q->hash)
-+ goto err_case;
-+ q->qs = kmalloc(q->depth*sizeof(struct sk_buff_head), GFP_KERNEL);
-+ if (!q->qs)
-+ goto err_case;
-+
-+ for (i=0; i< q->hash_divisor; i++)
-+ q->ht[i] = q->depth;
-+ for (i=0; i<q->depth; i++) {
-+ skb_queue_head_init(&q->qs[i]);
-+ q->dep[i+q->depth].next = i+q->depth;
-+ q->dep[i+q->depth].prev = i+q->depth;
-+ }
-+
-+ for (i=0; i<q->depth; i++)
-+ esfq_link(q, i);
-+ return 0;
-+err_case:
-+ del_timer(&q->perturb_timer);
-+ if (q->ht)
-+ kfree(q->ht);
-+ if (q->dep)
-+ kfree(q->dep);
-+ if (q->next)
-+ kfree(q->next);
-+ if (q->allot)
-+ kfree(q->allot);
-+ if (q->hash)
-+ kfree(q->hash);
-+ if (q->qs)
-+ kfree(q->qs);
-+ return -ENOBUFS;
-+}
-+
-+static void esfq_destroy(struct Qdisc *sch)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ del_timer(&q->perturb_timer);
-+ if(q->ht)
-+ kfree(q->ht);
-+ if(q->dep)
-+ kfree(q->dep);
-+ if(q->next)
-+ kfree(q->next);
-+ if(q->allot)
-+ kfree(q->allot);
-+ if(q->hash)
-+ kfree(q->hash);
-+ if(q->qs)
-+ kfree(q->qs);
-+}
-+
-+static int esfq_dump(struct Qdisc *sch, struct sk_buff *skb)
-+{
-+ struct esfq_sched_data *q = qdisc_priv(sch);
-+ unsigned char *b = skb->tail;
-+ struct tc_esfq_qopt opt;
-+
-+ opt.quantum = q->quantum;
-+ opt.perturb_period = q->perturb_period/HZ;
-+
-+ opt.limit = q->limit;
-+ opt.divisor = q->hash_divisor;
-+ opt.flows = q->depth;
-+ opt.hash_kind = q->hash_kind;
-+
-+ RTA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt);
-+
-+ return skb->len;
-+
-+rtattr_failure:
-+ skb_trim(skb, b - skb->data);
-+ return -1;
-+}
-+
-+static struct Qdisc_ops esfq_qdisc_ops =
-+{
-+ .next = NULL,
-+ .cl_ops = NULL,
-+ .id = "esfq",
-+ .priv_size = sizeof(struct esfq_sched_data),
-+ .enqueue = esfq_enqueue,
-+ .dequeue = esfq_dequeue,
-+ .requeue = esfq_requeue,
-+ .drop = esfq_drop,
-+ .init = esfq_init,
-+ .reset = esfq_reset,
-+ .destroy = esfq_destroy,
-+ .change = NULL, /* esfq_change - needs more work */
-+ .dump = esfq_dump,
-+ .owner = THIS_MODULE,
-+};
-+
-+static int __init esfq_module_init(void)
-+{
-+ return register_qdisc(&esfq_qdisc_ops);
-+}
-+static void __exit esfq_module_exit(void)
-+{
-+ unregister_qdisc(&esfq_qdisc_ops);
-+}
-+module_init(esfq_module_init)
-+module_exit(esfq_module_exit)
-+MODULE_LICENSE("GPL");
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_nat.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_nat.h
---- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_nat.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_nat.h 2006-12-14 03:13:53.000000000 +0100
-@@ -63,6 +63,13 @@
-
- struct ip_conntrack;
-
-+/* Call input routing for SNAT-ed traffic */
-+extern unsigned int ip_nat_route_input(unsigned int hooknum,
-+ struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ int (*okfn)(struct sk_buff *));
-+
- /* Set up the info structure to map into this range. */
- extern unsigned int ip_nat_setup_info(struct ip_conntrack *conntrack,
- const struct ip_nat_range *range,
-diff -urN linux-2.6.19.old/include/linux/rtnetlink.h linux-2.6.19.dev/include/linux/rtnetlink.h
---- linux-2.6.19.old/include/linux/rtnetlink.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/rtnetlink.h 2006-12-14 03:13:53.000000000 +0100
-@@ -293,6 +293,8 @@
- #define RTNH_F_DEAD 1 /* Nexthop is dead (used by multipath) */
- #define RTNH_F_PERVASIVE 2 /* Do recursive gateway lookup */
- #define RTNH_F_ONLINK 4 /* Gateway is forced on link */
-+#define RTNH_F_SUSPECT 8 /* We don't know the real state */
-+#define RTNH_F_BADSTATE (RTNH_F_DEAD | RTNH_F_SUSPECT)
-
- /* Macros to handle hexthops */
-
-diff -urN linux-2.6.19.old/include/net/flow.h linux-2.6.19.dev/include/net/flow.h
---- linux-2.6.19.old/include/net/flow.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/net/flow.h 2006-12-14 03:13:53.000000000 +0100
-@@ -19,6 +19,8 @@
- __be32 daddr;
- __be32 saddr;
- __u32 fwmark;
-+ __u32 lsrc;
-+ __u32 gw;
- __u8 tos;
- __u8 scope;
- } ip4_u;
-@@ -48,6 +50,8 @@
- #define fl4_dst nl_u.ip4_u.daddr
- #define fl4_src nl_u.ip4_u.saddr
- #define fl4_fwmark nl_u.ip4_u.fwmark
-+#define fl4_lsrc nl_u.ip4_u.lsrc
-+#define fl4_gw nl_u.ip4_u.gw
- #define fl4_tos nl_u.ip4_u.tos
- #define fl4_scope nl_u.ip4_u.scope
-
-diff -urN linux-2.6.19.old/include/net/ip_fib.h linux-2.6.19.dev/include/net/ip_fib.h
---- linux-2.6.19.old/include/net/ip_fib.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/net/ip_fib.h 2006-12-14 03:13:53.000000000 +0100
-@@ -196,7 +196,8 @@
-
- static inline void fib_select_default(const struct flowi *flp, struct fib_result *res)
- {
-- if (FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK)
-+ if ((FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) ||
-+ FIB_RES_NH(*res).nh_scope == RT_SCOPE_HOST)
- ip_fib_main_table->tb_select_default(ip_fib_main_table, flp, res);
- }
-
-@@ -212,6 +213,8 @@
-
- #endif /* CONFIG_IP_MULTIPLE_TABLES */
-
-+extern int fib_result_table(struct fib_result *res);
-+
- /* Exported by fib_frontend.c */
- extern struct nla_policy rtm_ipv4_policy[];
- extern void ip_fib_init(void);
-@@ -284,4 +287,6 @@
- extern void fib_proc_exit(void);
- #endif
-
-+extern rwlock_t fib_nhflags_lock;
-+
- #endif /* _NET_FIB_H */
-diff -urN linux-2.6.19.old/include/net/route.h linux-2.6.19.dev/include/net/route.h
---- linux-2.6.19.old/include/net/route.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/net/route.h 2006-12-14 03:13:53.000000000 +0100
-@@ -117,6 +117,7 @@
- extern int ip_route_output_key(struct rtable **, struct flowi *flp);
- extern int ip_route_output_flow(struct rtable **rp, struct flowi *flp, struct sock *sk, int flags);
- extern int ip_route_input(struct sk_buff*, __be32 dst, __be32 src, u8 tos, struct net_device *devin);
-+extern int ip_route_input_lookup(struct sk_buff*, u32 dst, u32 src, u8 tos, struct net_device *devin, u32 lsrc);
- extern unsigned short ip_rt_frag_needed(struct iphdr *iph, unsigned short new_mtu);
- extern void ip_rt_send_redirect(struct sk_buff *skb);
-
-diff -urN linux-2.6.19.old/net/ipv4/fib_frontend.c linux-2.6.19.dev/net/ipv4/fib_frontend.c
---- linux-2.6.19.old/net/ipv4/fib_frontend.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/fib_frontend.c 2006-12-14 03:13:53.000000000 +0100
-@@ -58,6 +58,8 @@
- #define FIB_TABLE_HASHSZ 1
- static struct hlist_head fib_table_hash[FIB_TABLE_HASHSZ];
-
-+#define FIB_RES_TABLE(r) (RT_TABLE_MAIN)
-+
- #else
-
- #define FIB_TABLE_HASHSZ 256
-@@ -100,6 +102,9 @@
- rcu_read_unlock();
- return NULL;
- }
-+
-+#define FIB_RES_TABLE(r) (fib_result_table(r))
-+
- #endif /* CONFIG_IP_MULTIPLE_TABLES */
-
- static void fib_flush(void)
-@@ -190,6 +195,9 @@
- .tos = tos } },
- .iif = oif };
- struct fib_result res;
-+ int table;
-+ unsigned char prefixlen;
-+ unsigned char scope;
- int no_addr, rpf;
- int ret;
-
-@@ -211,31 +219,35 @@
- goto e_inval_res;
- *spec_dst = FIB_RES_PREFSRC(res);
- fib_combine_itag(itag, &res);
--#ifdef CONFIG_IP_ROUTE_MULTIPATH
-- if (FIB_RES_DEV(res) == dev || res.fi->fib_nhs > 1)
--#else
- if (FIB_RES_DEV(res) == dev)
--#endif
- {
- ret = FIB_RES_NH(res).nh_scope >= RT_SCOPE_HOST;
- fib_res_put(&res);
- return ret;
- }
-+ table = FIB_RES_TABLE(&res);
-+ prefixlen = res.prefixlen;
-+ scope = res.scope;
- fib_res_put(&res);
- if (no_addr)
- goto last_resort;
-- if (rpf)
-- goto e_inval;
- fl.oif = dev->ifindex;
-
- ret = 0;
- if (fib_lookup(&fl, &res) == 0) {
-- if (res.type == RTN_UNICAST) {
-+ if (res.type == RTN_UNICAST &&
-+ ((table == FIB_RES_TABLE(&res) &&
-+ res.prefixlen >= prefixlen && res.scope >= scope) ||
-+ !rpf)) {
- *spec_dst = FIB_RES_PREFSRC(res);
- ret = FIB_RES_NH(res).nh_scope >= RT_SCOPE_HOST;
-+ fib_res_put(&res);
-+ return ret;
- }
- fib_res_put(&res);
- }
-+ if (rpf)
-+ goto e_inval;
- return ret;
-
- last_resort:
-@@ -836,9 +848,7 @@
- switch (event) {
- case NETDEV_UP:
- fib_add_ifaddr(ifa);
--#ifdef CONFIG_IP_ROUTE_MULTIPATH
- fib_sync_up(ifa->ifa_dev->dev);
--#endif
- rt_cache_flush(-1);
- break;
- case NETDEV_DOWN:
-@@ -874,9 +884,7 @@
- for_ifa(in_dev) {
- fib_add_ifaddr(ifa);
- } endfor_ifa(in_dev);
--#ifdef CONFIG_IP_ROUTE_MULTIPATH
- fib_sync_up(dev);
--#endif
- rt_cache_flush(-1);
- break;
- case NETDEV_DOWN:
-diff -urN linux-2.6.19.old/net/ipv4/fib_hash.c linux-2.6.19.dev/net/ipv4/fib_hash.c
---- linux-2.6.19.old/net/ipv4/fib_hash.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/fib_hash.c 2006-12-14 03:13:53.000000000 +0100
-@@ -275,30 +275,38 @@
- return err;
- }
-
--static int fn_hash_last_dflt=-1;
--
- static void
- fn_hash_select_default(struct fib_table *tb, const struct flowi *flp, struct fib_result *res)
- {
-- int order, last_idx;
-+ int order, last_idx, last_dflt, last_nhsel;
-+ struct fib_alias *first_fa = NULL;
-+ struct hlist_head *head;
- struct hlist_node *node;
- struct fib_node *f;
- struct fib_info *fi = NULL;
- struct fib_info *last_resort;
- struct fn_hash *t = (struct fn_hash*)tb->tb_data;
-- struct fn_zone *fz = t->fn_zones[0];
-+ struct fn_zone *fz = t->fn_zones[res->prefixlen];
-+ u32 k;
-
- if (fz == NULL)
- return;
-
-+ k = fz_key(flp->fl4_dst, fz);
-+ last_dflt = -2;
-+ last_nhsel = 0;
- last_idx = -1;
- last_resort = NULL;
- order = -1;
-
- read_lock(&fib_hash_lock);
-- hlist_for_each_entry(f, node, &fz->fz_hash[0], fn_hash) {
-+ head = &fz->fz_hash[fn_hash(k, fz)];
-+ hlist_for_each_entry(f, node, head, fn_hash) {
- struct fib_alias *fa;
-
-+ if (f->fn_key != k)
-+ continue;
-+
- list_for_each_entry(fa, &f->fn_alias, fa_list) {
- struct fib_info *next_fi = fa->fa_info;
-
-@@ -306,41 +314,52 @@
- fa->fa_type != RTN_UNICAST)
- continue;
-
-+ if (fa->fa_tos &&
-+ fa->fa_tos != flp->fl4_tos)
-+ continue;
- if (next_fi->fib_priority > res->fi->fib_priority)
- break;
-- if (!next_fi->fib_nh[0].nh_gw ||
-- next_fi->fib_nh[0].nh_scope != RT_SCOPE_LINK)
-- continue;
- fa->fa_state |= FA_S_ACCESSED;
-
-- if (fi == NULL) {
-- if (next_fi != res->fi)
-- break;
-- } else if (!fib_detect_death(fi, order, &last_resort,
-- &last_idx, &fn_hash_last_dflt)) {
-+ if (!first_fa) {
-+ last_dflt = fa->fa_last_dflt;
-+ first_fa = fa;
-+ }
-+ if (fi && !fib_detect_death(fi, order, &last_resort,
-+ &last_idx, &last_dflt, &last_nhsel, flp)) {
- if (res->fi)
- fib_info_put(res->fi);
- res->fi = fi;
- atomic_inc(&fi->fib_clntref);
-- fn_hash_last_dflt = order;
-+ first_fa->fa_last_dflt = order;
- goto out;
- }
- fi = next_fi;
- order++;
- }
-+ break;
- }
-
- if (order <= 0 || fi == NULL) {
-- fn_hash_last_dflt = -1;
-+ if (fi && fi->fib_nhs > 1 &&
-+ fib_detect_death(fi, order, &last_resort, &last_idx,
-+ &last_dflt, &last_nhsel, flp) &&
-+ last_resort == fi) {
-+ read_lock_bh(&fib_nhflags_lock);
-+ fi->fib_nh[last_nhsel].nh_flags &= ~RTNH_F_SUSPECT;
-+ read_unlock_bh(&fib_nhflags_lock);
-+ }
-+ if (first_fa) first_fa->fa_last_dflt = -1;
- goto out;
- }
-
-- if (!fib_detect_death(fi, order, &last_resort, &last_idx, &fn_hash_last_dflt)) {
-+ if (!fib_detect_death(fi, order, &last_resort, &last_idx,
-+ &last_dflt, &last_nhsel, flp)) {
- if (res->fi)
- fib_info_put(res->fi);
- res->fi = fi;
- atomic_inc(&fi->fib_clntref);
-- fn_hash_last_dflt = order;
-+ first_fa->fa_last_dflt = order;
- goto out;
- }
-
-@@ -350,8 +369,11 @@
- res->fi = last_resort;
- if (last_resort)
- atomic_inc(&last_resort->fib_clntref);
-+ read_lock_bh(&fib_nhflags_lock);
-+ last_resort->fib_nh[last_nhsel].nh_flags &= ~RTNH_F_SUSPECT;
-+ read_unlock_bh(&fib_nhflags_lock);
-+ first_fa->fa_last_dflt = last_idx;
- }
-- fn_hash_last_dflt = last_idx;
- out:
- read_unlock(&fib_hash_lock);
- }
-@@ -447,6 +469,7 @@
- write_lock_bh(&fib_hash_lock);
- fi_drop = fa->fa_info;
- fa->fa_info = fi;
-+ fa->fa_last_dflt = -1;
- fa->fa_type = cfg->fc_type;
- fa->fa_scope = cfg->fc_scope;
- state = fa->fa_state;
-@@ -506,6 +529,7 @@
- new_fa->fa_type = cfg->fc_type;
- new_fa->fa_scope = cfg->fc_scope;
- new_fa->fa_state = 0;
-+ new_fa->fa_last_dflt = -1;
-
- /*
- * Insert new entry to the list.
-diff -urN linux-2.6.19.old/net/ipv4/fib_lookup.h linux-2.6.19.dev/net/ipv4/fib_lookup.h
---- linux-2.6.19.old/net/ipv4/fib_lookup.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/fib_lookup.h 2006-12-14 03:13:53.000000000 +0100
-@@ -9,6 +9,7 @@
- struct list_head fa_list;
- struct rcu_head rcu;
- struct fib_info *fa_info;
-+ int fa_last_dflt;
- u8 fa_tos;
- u8 fa_type;
- u8 fa_scope;
-@@ -35,6 +36,7 @@
- u8 tos, u32 prio);
- extern int fib_detect_death(struct fib_info *fi, int order,
- struct fib_info **last_resort,
-- int *last_idx, int *dflt);
-+ int *last_idx, int *dflt, int *last_nhsel,
-+ const struct flowi *flp);
-
- #endif /* _FIB_LOOKUP_H */
-diff -urN linux-2.6.19.old/net/ipv4/fib_rules.c linux-2.6.19.dev/net/ipv4/fib_rules.c
---- linux-2.6.19.old/net/ipv4/fib_rules.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/fib_rules.c 2006-12-14 03:13:53.000000000 +0100
-@@ -89,6 +89,11 @@
- }
- #endif
-
-+int fib_result_table(struct fib_result *res)
-+{
-+ return res->r->table;
-+}
-+
- int fib_lookup(struct flowi *flp, struct fib_result *res)
- {
- struct fib_lookup_arg arg = {
-@@ -140,7 +145,8 @@
- void fib_select_default(const struct flowi *flp, struct fib_result *res)
- {
- if (res->r && res->r->action == FR_ACT_TO_TBL &&
-- FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) {
-+ ((FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) ||
-+ FIB_RES_NH(*res).nh_scope == RT_SCOPE_HOST)) {
- struct fib_table *tb;
- if ((tb = fib_get_table(res->r->table)) != NULL)
- tb->tb_select_default(tb, flp, res);
-diff -urN linux-2.6.19.old/net/ipv4/fib_semantics.c linux-2.6.19.dev/net/ipv4/fib_semantics.c
---- linux-2.6.19.old/net/ipv4/fib_semantics.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/fib_semantics.c 2006-12-14 03:13:53.000000000 +0100
-@@ -55,6 +55,7 @@
- static struct hlist_head *fib_info_laddrhash;
- static unsigned int fib_hash_size;
- static unsigned int fib_info_cnt;
-+rwlock_t fib_nhflags_lock = RW_LOCK_UNLOCKED;
-
- #define DEVINDEX_HASHBITS 8
- #define DEVINDEX_HASHSIZE (1U << DEVINDEX_HASHBITS)
-@@ -190,7 +191,7 @@
- #ifdef CONFIG_NET_CLS_ROUTE
- nh->nh_tclassid != onh->nh_tclassid ||
- #endif
-- ((nh->nh_flags^onh->nh_flags)&~RTNH_F_DEAD))
-+ ((nh->nh_flags^onh->nh_flags)&~RTNH_F_BADSTATE))
- return -1;
- onh++;
- } endfor_nexthops(fi);
-@@ -227,7 +228,7 @@
- nfi->fib_priority == fi->fib_priority &&
- memcmp(nfi->fib_metrics, fi->fib_metrics,
- sizeof(fi->fib_metrics)) == 0 &&
-- ((nfi->fib_flags^fi->fib_flags)&~RTNH_F_DEAD) == 0 &&
-+ ((nfi->fib_flags^fi->fib_flags)&~RTNH_F_BADSTATE) == 0 &&
- (nfi->fib_nhs == 0 || nh_comp(fi, nfi) == 0))
- return fi;
- }
-@@ -319,26 +320,70 @@
- }
-
- int fib_detect_death(struct fib_info *fi, int order,
-- struct fib_info **last_resort, int *last_idx, int *dflt)
-+ struct fib_info **last_resort, int *last_idx, int *dflt,
-+ int *last_nhsel, const struct flowi *flp)
- {
- struct neighbour *n;
-- int state = NUD_NONE;
-+ int nhsel;
-+ int state;
-+ struct fib_nh * nh;
-+ u32 dst;
-+ int flag, dead = 1;
-+
-+ /* change_nexthops(fi) { */
-+ for (nhsel = 0, nh = fi->fib_nh; nhsel < fi->fib_nhs; nh++, nhsel++) {
-+ if (flp->oif && flp->oif != nh->nh_oif)
-+ continue;
-+ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw && nh->nh_gw &&
-+ nh->nh_scope == RT_SCOPE_LINK)
-+ continue;
-+ if (nh->nh_flags & RTNH_F_DEAD)
-+ continue;
-
-- n = neigh_lookup(&arp_tbl, &fi->fib_nh[0].nh_gw, fi->fib_dev);
-- if (n) {
-- state = n->nud_state;
-- neigh_release(n);
-- }
-- if (state==NUD_REACHABLE)
-- return 0;
-- if ((state&NUD_VALID) && order != *dflt)
-- return 0;
-- if ((state&NUD_VALID) ||
-- (*last_idx<0 && order > *dflt)) {
-- *last_resort = fi;
-- *last_idx = order;
-+ flag = 0;
-+ if (nh->nh_dev->flags & IFF_NOARP) {
-+ dead = 0;
-+ goto setfl;
-+ }
-+
-+ dst = nh->nh_gw;
-+ if (!nh->nh_gw || nh->nh_scope != RT_SCOPE_LINK)
-+ dst = flp->fl4_dst;
-+
-+ state = NUD_NONE;
-+ n = neigh_lookup(&arp_tbl, &dst, nh->nh_dev);
-+ if (n) {
-+ state = n->nud_state;
-+ neigh_release(n);
-+ }
-+ if (state==NUD_REACHABLE ||
-+ ((state&NUD_VALID) && order != *dflt)) {
-+ dead = 0;
-+ goto setfl;
-+ }
-+ if (!(state&NUD_VALID))
-+ flag = 1;
-+ if (!dead)
-+ goto setfl;
-+ if ((state&NUD_VALID) ||
-+ (*last_idx<0 && order >= *dflt)) {
-+ *last_resort = fi;
-+ *last_idx = order;
-+ *last_nhsel = nhsel;
-+ }
-+
-+ setfl:
-+
-+ read_lock_bh(&fib_nhflags_lock);
-+ if (flag)
-+ nh->nh_flags |= RTNH_F_SUSPECT;
-+ else
-+ nh->nh_flags &= ~RTNH_F_SUSPECT;
-+ read_unlock_bh(&fib_nhflags_lock);
- }
-- return 1;
-+ /* } endfor_nexthops(fi) */
-+
-+ return dead;
- }
-
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
-@@ -508,8 +553,11 @@
- return -EINVAL;
- if ((dev = __dev_get_by_index(nh->nh_oif)) == NULL)
- return -ENODEV;
-- if (!(dev->flags&IFF_UP))
-- return -ENETDOWN;
-+ if (!(dev->flags&IFF_UP)) {
-+ if (fi->fib_protocol != RTPROT_STATIC)
-+ return -ENETDOWN;
-+ nh->nh_flags |= RTNH_F_DEAD;
-+ }
- nh->nh_dev = dev;
- dev_hold(dev);
- nh->nh_scope = RT_SCOPE_LINK;
-@@ -529,24 +577,48 @@
- /* It is not necessary, but requires a bit of thinking */
- if (fl.fl4_scope < RT_SCOPE_LINK)
- fl.fl4_scope = RT_SCOPE_LINK;
-- if ((err = fib_lookup(&fl, &res)) != 0)
-- return err;
-+ err = fib_lookup(&fl, &res);
- }
-- err = -EINVAL;
-- if (res.type != RTN_UNICAST && res.type != RTN_LOCAL)
-- goto out;
-- nh->nh_scope = res.scope;
-- nh->nh_oif = FIB_RES_OIF(res);
-- if ((nh->nh_dev = FIB_RES_DEV(res)) == NULL)
-- goto out;
-- dev_hold(nh->nh_dev);
-- err = -ENETDOWN;
-- if (!(nh->nh_dev->flags & IFF_UP))
-- goto out;
-- err = 0;
-+ if (err) {
-+ struct in_device *in_dev;
-+
-+ if (err != -ENETUNREACH ||
-+ fi->fib_protocol != RTPROT_STATIC)
-+ return err;
-+
-+ in_dev = inetdev_by_index(nh->nh_oif);
-+ if (in_dev == NULL ||
-+ in_dev->dev->flags & IFF_UP) {
-+ if (in_dev)
-+ in_dev_put(in_dev);
-+ return err;
-+ }
-+ nh->nh_flags |= RTNH_F_DEAD;
-+ nh->nh_scope = RT_SCOPE_LINK;
-+ nh->nh_dev = in_dev->dev;
-+ dev_hold(nh->nh_dev);
-+ in_dev_put(in_dev);
-+ } else {
-+ err = -EINVAL;
-+ if (res.type != RTN_UNICAST && res.type != RTN_LOCAL)
-+ goto out;
-+ nh->nh_scope = res.scope;
-+ nh->nh_oif = FIB_RES_OIF(res);
-+ if ((nh->nh_dev = FIB_RES_DEV(res)) == NULL)
-+ goto out;
-+ dev_hold(nh->nh_dev);
-+ if (!(nh->nh_dev->flags & IFF_UP)) {
-+ if (fi->fib_protocol != RTPROT_STATIC) {
-+ err = -ENETDOWN;
-+ goto out;
-+ }
-+ nh->nh_flags |= RTNH_F_DEAD;
-+ }
-+ err = 0;
- out:
-- fib_res_put(&res);
-- return err;
-+ fib_res_put(&res);
-+ return err;
-+ }
- } else {
- struct in_device *in_dev;
-
-@@ -557,8 +629,11 @@
- if (in_dev == NULL)
- return -ENODEV;
- if (!(in_dev->dev->flags&IFF_UP)) {
-- in_dev_put(in_dev);
-- return -ENETDOWN;
-+ if (fi->fib_protocol != RTPROT_STATIC) {
-+ in_dev_put(in_dev);
-+ return -ENETDOWN;
-+ }
-+ nh->nh_flags |= RTNH_F_DEAD;
- }
- nh->nh_dev = in_dev->dev;
- dev_hold(nh->nh_dev);
-@@ -881,8 +956,12 @@
- for_nexthops(fi) {
- if (nh->nh_flags&RTNH_F_DEAD)
- continue;
-- if (!flp->oif || flp->oif == nh->nh_oif)
-- break;
-+ if (flp->oif && flp->oif != nh->nh_oif)
-+ continue;
-+ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
-+ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
-+ continue;
-+ break;
- }
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
- if (nhsel < fi->fib_nhs) {
-@@ -1056,18 +1135,29 @@
- prev_fi = fi;
- dead = 0;
- change_nexthops(fi) {
-- if (nh->nh_flags&RTNH_F_DEAD)
-- dead++;
-- else if (nh->nh_dev == dev &&
-- nh->nh_scope != scope) {
-- nh->nh_flags |= RTNH_F_DEAD;
-+ if (nh->nh_flags&RTNH_F_DEAD) {
-+ if (fi->fib_protocol!=RTPROT_STATIC ||
-+ nh->nh_dev == NULL ||
-+ __in_dev_get_rtnl(nh->nh_dev) == NULL ||
-+ nh->nh_dev->flags&IFF_UP)
-+ dead++;
-+ } else if (nh->nh_dev == dev &&
-+ nh->nh_scope != scope) {
-+ write_lock_bh(&fib_nhflags_lock);
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
-- spin_lock_bh(&fib_multipath_lock);
-+ spin_lock(&fib_multipath_lock);
-+ nh->nh_flags |= RTNH_F_DEAD;
- fi->fib_power -= nh->nh_power;
- nh->nh_power = 0;
-- spin_unlock_bh(&fib_multipath_lock);
-+ spin_unlock(&fib_multipath_lock);
-+#else
-+ nh->nh_flags |= RTNH_F_DEAD;
- #endif
-- dead++;
-+ write_unlock_bh(&fib_nhflags_lock);
-+ if (fi->fib_protocol!=RTPROT_STATIC ||
-+ force ||
-+ __in_dev_get_rtnl(dev) == NULL)
-+ dead++;
- }
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
- if (force > 1 && nh->nh_dev == dev) {
-@@ -1086,11 +1176,8 @@
- return ret;
- }
-
--#ifdef CONFIG_IP_ROUTE_MULTIPATH
--
- /*
-- Dead device goes up. We wake up dead nexthops.
-- It takes sense only on multipath routes.
-+ Dead device goes up or new address is added. We wake up dead nexthops.
- */
-
- int fib_sync_up(struct net_device *dev)
-@@ -1100,8 +1187,10 @@
- struct hlist_head *head;
- struct hlist_node *node;
- struct fib_nh *nh;
-- int ret;
-+ struct fib_result res;
-+ int ret, rep;
-
-+repeat:
- if (!(dev->flags&IFF_UP))
- return 0;
-
-@@ -1109,6 +1198,7 @@
- hash = fib_devindex_hashfn(dev->ifindex);
- head = &fib_info_devhash[hash];
- ret = 0;
-+ rep = 0;
-
- hlist_for_each_entry(nh, node, head, nh_hash) {
- struct fib_info *fi = nh->nh_parent;
-@@ -1121,19 +1211,37 @@
- prev_fi = fi;
- alive = 0;
- change_nexthops(fi) {
-- if (!(nh->nh_flags&RTNH_F_DEAD)) {
-- alive++;
-+ if (!(nh->nh_flags&RTNH_F_DEAD))
- continue;
-- }
- if (nh->nh_dev == NULL || !(nh->nh_dev->flags&IFF_UP))
- continue;
- if (nh->nh_dev != dev || !__in_dev_get_rtnl(dev))
- continue;
-+ if (nh->nh_gw && fi->fib_protocol == RTPROT_STATIC) {
-+ struct flowi fl = {
-+ .nl_u = { .ip4_u =
-+ { .daddr = nh->nh_gw,
-+ .scope = nh->nh_scope } },
-+ .oif = nh->nh_oif,
-+ };
-+ if (fib_lookup(&fl, &res) != 0)
-+ continue;
-+ if (res.type != RTN_UNICAST &&
-+ res.type != RTN_LOCAL) {
-+ fib_res_put(&res);
-+ continue;
-+ }
-+ nh->nh_scope = res.scope;
-+ fib_res_put(&res);
-+ rep = 1;
-+ }
- alive++;
-+#ifdef CONFIG_IP_ROUTE_MULTIPATH
- spin_lock_bh(&fib_multipath_lock);
- nh->nh_power = 0;
- nh->nh_flags &= ~RTNH_F_DEAD;
- spin_unlock_bh(&fib_multipath_lock);
-+#endif
- } endfor_nexthops(fi)
-
- if (alive > 0) {
-@@ -1141,10 +1249,14 @@
- ret++;
- }
- }
-+ if (rep)
-+ goto repeat;
-
- return ret;
- }
-
-+#ifdef CONFIG_IP_ROUTE_MULTIPATH
-+
- /*
- The algorithm is suboptimal, but it provides really
- fair weighted route distribution.
-@@ -1153,24 +1265,45 @@
- void fib_select_multipath(const struct flowi *flp, struct fib_result *res)
- {
- struct fib_info *fi = res->fi;
-- int w;
-+ int w, alive;
-
- spin_lock_bh(&fib_multipath_lock);
-+ if (flp->oif) {
-+ int sel = -1;
-+ w = -1;
-+ change_nexthops(fi) {
-+ if (flp->oif != nh->nh_oif)
-+ continue;
-+ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
-+ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
-+ continue;
-+ if (!(nh->nh_flags&RTNH_F_BADSTATE)) {
-+ if (nh->nh_power > w) {
-+ w = nh->nh_power;
-+ sel = nhsel;
-+ }
-+ }
-+ } endfor_nexthops(fi);
-+ if (sel >= 0) {
-+ spin_unlock_bh(&fib_multipath_lock);
-+ res->nh_sel = sel;
-+ return;
-+ }
-+ goto last_resort;
-+ }
-+
-+repeat:
- if (fi->fib_power <= 0) {
- int power = 0;
- change_nexthops(fi) {
-- if (!(nh->nh_flags&RTNH_F_DEAD)) {
-+ if (!(nh->nh_flags&RTNH_F_BADSTATE)) {
- power += nh->nh_weight;
- nh->nh_power = nh->nh_weight;
- }
- } endfor_nexthops(fi);
- fi->fib_power = power;
-- if (power <= 0) {
-- spin_unlock_bh(&fib_multipath_lock);
-- /* Race condition: route has just become dead. */
-- res->nh_sel = 0;
-- return;
-- }
-+ if (power <= 0)
-+ goto last_resort;
- }
-
-
-@@ -1180,20 +1313,40 @@
-
- w = jiffies % fi->fib_power;
-
-+ alive = 0;
- change_nexthops(fi) {
-- if (!(nh->nh_flags&RTNH_F_DEAD) && nh->nh_power) {
-+ if (!(nh->nh_flags&RTNH_F_BADSTATE) && nh->nh_power) {
- if ((w -= nh->nh_power) <= 0) {
- nh->nh_power--;
- fi->fib_power--;
-- res->nh_sel = nhsel;
- spin_unlock_bh(&fib_multipath_lock);
-+ res->nh_sel = nhsel;
- return;
- }
-+ alive = 1;
-+ }
-+ } endfor_nexthops(fi);
-+ if (alive) {
-+ fi->fib_power = 0;
-+ goto repeat;
-+ }
-+
-+last_resort:
-+
-+ for_nexthops(fi) {
-+ if (!(nh->nh_flags&RTNH_F_DEAD)) {
-+ if (flp->oif && flp->oif != nh->nh_oif)
-+ continue;
-+ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
-+ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
-+ continue;
-+ spin_unlock_bh(&fib_multipath_lock);
-+ res->nh_sel = nhsel;
-+ return;
- }
- } endfor_nexthops(fi);
-
- /* Race condition: route has just become dead. */
-- res->nh_sel = 0;
- spin_unlock_bh(&fib_multipath_lock);
- }
- #endif
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_nat_core.c linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_core.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_nat_core.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_core.c 2006-12-14 03:13:53.000000000 +0100
-@@ -573,6 +573,53 @@
- EXPORT_SYMBOL_GPL(ip_nat_port_range_to_nfattr);
- #endif
-
-+unsigned int
-+ip_nat_route_input(unsigned int hooknum,
-+ struct sk_buff **pskb,
-+ const struct net_device *in,
-+ const struct net_device *out,
-+ int (*okfn)(struct sk_buff *))
-+{
-+ struct sk_buff *skb = *pskb;
-+ struct iphdr *iph;
-+ struct ip_conntrack *conn;
-+ enum ip_conntrack_info ctinfo;
-+ enum ip_conntrack_dir dir;
-+ unsigned long statusbit;
-+ u32 saddr;
-+
-+ if (!(conn = ip_conntrack_get(skb, &ctinfo)))
-+ return NF_ACCEPT;
-+
-+ if (!(conn->status & IPS_NAT_DONE_MASK))
-+ return NF_ACCEPT;
-+ dir = CTINFO2DIR(ctinfo);
-+ statusbit = IPS_SRC_NAT;
-+ if (dir == IP_CT_DIR_REPLY)
-+ statusbit ^= IPS_NAT_MASK;
-+ if (!(conn->status & statusbit))
-+ return NF_ACCEPT;
-+
-+ if (skb->dst)
-+ return NF_ACCEPT;
-+
-+ if (skb->len < sizeof(struct iphdr))
-+ return NF_ACCEPT;
-+
-+ /* use daddr in other direction as masquerade address (lsrc) */
-+ iph = skb->nh.iph;
-+ saddr = conn->tuplehash[!dir].tuple.dst.ip;
-+ if (saddr == iph->saddr)
-+ return NF_ACCEPT;
-+
-+ if (ip_route_input_lookup(skb, iph->daddr, iph->saddr, iph->tos,
-+ skb->dev, saddr))
-+ return NF_DROP;
-+
-+ return NF_ACCEPT;
-+}
-+EXPORT_SYMBOL_GPL(ip_nat_route_input);
-+
- static int __init ip_nat_init(void)
- {
- size_t i;
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_nat_standalone.c linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_standalone.c
---- linux-2.6.19.old/net/ipv4/netfilter/ip_nat_standalone.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_standalone.c 2006-12-14 03:13:53.000000000 +0100
-@@ -325,6 +325,14 @@
- .hooknum = NF_IP_LOCAL_OUT,
- .priority = NF_IP_PRI_NAT_DST,
- },
-+ /* Before routing, route before mangling */
-+ {
-+ .hook = ip_nat_route_input,
-+ .owner = THIS_MODULE,
-+ .pf = PF_INET,
-+ .hooknum = NF_IP_PRE_ROUTING,
-+ .priority = NF_IP_PRI_LAST-1,
-+ },
- /* After packet filtering, change source */
- {
- .hook = ip_nat_fn,
-diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_MASQUERADE.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_MASQUERADE.c
---- linux-2.6.19.old/net/ipv4/netfilter/ipt_MASQUERADE.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_MASQUERADE.c 2006-12-14 03:13:53.000000000 +0100
-@@ -85,13 +85,31 @@
- return NF_ACCEPT;
-
- mr = targinfo;
-- rt = (struct rtable *)(*pskb)->dst;
-- newsrc = inet_select_addr(out, rt->rt_gateway, RT_SCOPE_UNIVERSE);
-- if (!newsrc) {
-- printk("MASQUERADE: %s ate my IP address\n", out->name);
-- return NF_DROP;
-+
-+ {
-+ struct flowi fl = { .nl_u = { .ip4_u =
-+ { .daddr = (*pskb)->nh.iph->daddr,
-+ .tos = (RT_TOS((*pskb)->nh.iph->tos) |
-+ RTO_CONN),
-+ .gw = ((struct rtable *) (*pskb)->dst)->rt_gateway,
-+#ifdef CONFIG_IP_ROUTE_FWMARK
-+ .fwmark = (*pskb)->nfmark
-+#endif
-+ } },
-+ .oif = out->ifindex };
-+ if (ip_route_output_key(&rt, &fl) != 0) {
-+ /* Funky routing can do this. */
-+ if (net_ratelimit())
-+ printk("MASQUERADE:"
-+ " No route: Rusty's brain broke!\n");
-+ return NF_DROP;
-+ }
- }
-
-+ newsrc = rt->rt_src;
-+ DEBUGP("newsrc = %u.%u.%u.%u\n", NIPQUAD(newsrc));
-+ ip_rt_put(rt);
-+
- write_lock_bh(&masq_lock);
- ct->nat.masq_index = out->ifindex;
- write_unlock_bh(&masq_lock);
-diff -urN linux-2.6.19.old/net/ipv4/route.c linux-2.6.19.dev/net/ipv4/route.c
---- linux-2.6.19.old/net/ipv4/route.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/net/ipv4/route.c 2006-12-14 03:13:53.000000000 +0100
-@@ -1211,6 +1211,7 @@
-
- /* Gateway is different ... */
- rt->rt_gateway = new_gw;
-+ if (rt->fl.fl4_gw) rt->fl.fl4_gw = new_gw;
-
- /* Redirect received -> path was valid */
- dst_confirm(&rth->u.dst);
-@@ -1647,6 +1648,7 @@
- rth->fl.fl4_fwmark= skb->nfmark;
- #endif
- rth->fl.fl4_src = saddr;
-+ rth->fl.fl4_lsrc = 0;
- rth->rt_src = saddr;
- #ifdef CONFIG_NET_CLS_ROUTE
- rth->u.dst.tclassid = itag;
-@@ -1657,6 +1659,7 @@
- dev_hold(rth->u.dst.dev);
- rth->idev = in_dev_get(rth->u.dst.dev);
- rth->fl.oif = 0;
-+ rth->fl.fl4_gw = 0;
- rth->rt_gateway = daddr;
- rth->rt_spec_dst= spec_dst;
- rth->rt_type = RTN_MULTICAST;
-@@ -1721,7 +1724,7 @@
- struct fib_result* res,
- struct in_device *in_dev,
- __be32 daddr, __be32 saddr, u32 tos,
-- struct rtable **result)
-+ u32 lsrc, struct rtable **result)
- {
-
- struct rtable *rth;
-@@ -1755,6 +1758,7 @@
- flags |= RTCF_DIRECTSRC;
-
- if (out_dev == in_dev && err && !(flags & (RTCF_NAT | RTCF_MASQ)) &&
-+ !lsrc &&
- (IN_DEV_SHARED_MEDIA(out_dev) ||
- inet_addr_onlink(out_dev, saddr, FIB_RES_GW(*res))))
- flags |= RTCF_DOREDIRECT;
-@@ -1794,6 +1798,7 @@
- #endif
- rth->fl.fl4_src = saddr;
- rth->rt_src = saddr;
-+ rth->fl.fl4_lsrc = lsrc;
- rth->rt_gateway = daddr;
- rth->rt_iif =
- rth->fl.iif = in_dev->dev->ifindex;
-@@ -1801,6 +1806,7 @@
- dev_hold(rth->u.dst.dev);
- rth->idev = in_dev_get(rth->u.dst.dev);
- rth->fl.oif = 0;
-+ rth->fl.fl4_gw = 0;
- rth->rt_spec_dst= spec_dst;
-
- rth->u.dst.input = ip_forward;
-@@ -1822,19 +1828,21 @@
- struct fib_result* res,
- const struct flowi *fl,
- struct in_device *in_dev,
-- __be32 daddr, __be32 saddr, u32 tos)
-+ __be32 daddr, __be32 saddr, u32 tos,
-+ u32 lsrc)
- {
- struct rtable* rth = NULL;
- int err;
- unsigned hash;
-
-+ fib_select_default(fl, res);
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
-- if (res->fi && res->fi->fib_nhs > 1 && fl->oif == 0)
-+ if (res->fi && res->fi->fib_nhs > 1)
- fib_select_multipath(fl, res);
- #endif
-
- /* create a routing cache entry */
-- err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos, &rth);
-+ err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos, lsrc, &rth);
- if (err)
- return err;
-
-@@ -1847,7 +1855,8 @@
- struct fib_result* res,
- const struct flowi *fl,
- struct in_device *in_dev,
-- __be32 daddr, __be32 saddr, u32 tos)
-+ __be32 daddr, __be32 saddr, u32 tos,
-+ u32 lsrc)
- {
- #ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
- struct rtable* rth = NULL, *rtres;
-@@ -1863,7 +1872,7 @@
- /* distinguish between multipath and singlepath */
- if (hopcount < 2)
- return ip_mkroute_input_def(skb, res, fl, in_dev, daddr,
-- saddr, tos);
-+ saddr, tos, 0);
-
- /* add all alternatives to the routing cache */
- for (hop = 0; hop < hopcount; hop++) {
-@@ -1875,7 +1884,7 @@
-
- /* create a routing cache entry */
- err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos,
-- &rth);
-+ 0, &rth);
- if (err)
- return err;
-
-@@ -1895,7 +1904,7 @@
- skb->dst = &rtres->u.dst;
- return err;
- #else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
-- return ip_mkroute_input_def(skb, res, fl, in_dev, daddr, saddr, tos);
-+ return ip_mkroute_input_def(skb, res, fl, in_dev, daddr, saddr, tos, lsrc);
- #endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
- }
-
-@@ -1911,20 +1920,20 @@
- */
-
- static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr,
-- u8 tos, struct net_device *dev)
-+ u8 tos, struct net_device *dev, u32 lsrc)
- {
- struct fib_result res;
- struct in_device *in_dev = in_dev_get(dev);
- struct flowi fl = { .nl_u = { .ip4_u =
- { .daddr = daddr,
-- .saddr = saddr,
-+ .saddr = lsrc? : saddr,
- .tos = tos,
- .scope = RT_SCOPE_UNIVERSE,
- #ifdef CONFIG_IP_ROUTE_FWMARK
- .fwmark = skb->nfmark
- #endif
- } },
-- .iif = dev->ifindex };
-+ .iif = lsrc? loopback_dev.ifindex : dev->ifindex };
- unsigned flags = 0;
- u32 itag = 0;
- struct rtable * rth;
-@@ -1957,6 +1966,12 @@
- if (BADCLASS(daddr) || ZERONET(daddr) || LOOPBACK(daddr))
- goto martian_destination;
-
-+ if (lsrc) {
-+ if (MULTICAST(lsrc) || BADCLASS(lsrc) ||
-+ ZERONET(lsrc) || LOOPBACK(lsrc))
-+ goto e_inval;
-+ }
-+
- /*
- * Now we are ready to route packet.
- */
-@@ -1966,6 +1981,10 @@
- goto no_route;
- }
- free_res = 1;
-+ if (lsrc && res.type != RTN_UNICAST && res.type != RTN_NAT)
-+ goto e_inval;
-+ fl.iif = dev->ifindex;
-+ fl.fl4_src = saddr;
-
- RT_CACHE_STAT_INC(in_slow_tot);
-
-@@ -1990,7 +2009,7 @@
- if (res.type != RTN_UNICAST)
- goto martian_destination;
-
-- err = ip_mkroute_input(skb, &res, &fl, in_dev, daddr, saddr, tos);
-+ err = ip_mkroute_input(skb, &res, &fl, in_dev, daddr, saddr, tos, lsrc);
- if (err == -ENOBUFS)
- goto e_nobufs;
- if (err == -EINVAL)
-@@ -2005,6 +2024,8 @@
- brd_input:
- if (skb->protocol != htons(ETH_P_IP))
- goto e_inval;
-+ if (lsrc)
-+ goto e_inval;
-
- if (ZERONET(saddr))
- spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK);
-@@ -2047,6 +2068,7 @@
- rth->u.dst.dev = &loopback_dev;
- dev_hold(rth->u.dst.dev);
- rth->idev = in_dev_get(rth->u.dst.dev);
-+ rth->fl.fl4_gw = 0;
- rth->rt_gateway = daddr;
- rth->rt_spec_dst= spec_dst;
- rth->u.dst.input= ip_local_deliver;
-@@ -2096,8 +2118,9 @@
- goto e_inval;
- }
-
--int ip_route_input(struct sk_buff *skb, __be32 daddr, __be32 saddr,
-- u8 tos, struct net_device *dev)
-+static inline int
-+ip_route_input_cached(struct sk_buff *skb, __be32 daddr, __be32 saddr,
-+ u8 tos, struct net_device *dev, u32 lsrc)
- {
- struct rtable * rth;
- unsigned hash;
-@@ -2112,6 +2135,7 @@
- if (rth->fl.fl4_dst == daddr &&
- rth->fl.fl4_src == saddr &&
- rth->fl.iif == iif &&
-+ rth->fl.fl4_lsrc == lsrc &&
- rth->fl.oif == 0 &&
- #ifdef CONFIG_IP_ROUTE_FWMARK
- rth->fl.fl4_fwmark == skb->nfmark &&
-@@ -2160,7 +2184,19 @@
- rcu_read_unlock();
- return -EINVAL;
- }
-- return ip_route_input_slow(skb, daddr, saddr, tos, dev);
-+ return ip_route_input_slow(skb, daddr, saddr, tos, dev, lsrc);
-+}
-+
-+int ip_route_input(struct sk_buff *skb, u32 daddr, u32 saddr,
-+ u8 tos, struct net_device *dev)
-+{
-+ return ip_route_input_cached(skb, daddr, saddr, tos, dev, 0);
-+}
-+
-+int ip_route_input_lookup(struct sk_buff *skb, u32 daddr, u32 saddr,
-+ u8 tos, struct net_device *dev, u32 lsrc)
-+{
-+ return ip_route_input_cached(skb, daddr, saddr, tos, dev, lsrc);
- }
-
- static inline int __mkroute_output(struct rtable **result,
-@@ -2239,6 +2275,7 @@
- rth->fl.fl4_tos = tos;
- rth->fl.fl4_src = oldflp->fl4_src;
- rth->fl.oif = oldflp->oif;
-+ rth->fl.fl4_gw = oldflp->fl4_gw;
- #ifdef CONFIG_IP_ROUTE_FWMARK
- rth->fl.fl4_fwmark= oldflp->fl4_fwmark;
- #endif
-@@ -2381,6 +2418,7 @@
- struct flowi fl = { .nl_u = { .ip4_u =
- { .daddr = oldflp->fl4_dst,
- .saddr = oldflp->fl4_src,
-+ .gw = oldflp->fl4_gw,
- .tos = tos & IPTOS_RT_MASK,
- .scope = ((tos & RTO_ONLINK) ?
- RT_SCOPE_LINK :
-@@ -2486,6 +2524,7 @@
- dev_out = &loopback_dev;
- dev_hold(dev_out);
- fl.oif = loopback_dev.ifindex;
-+ fl.fl4_gw = 0;
- res.type = RTN_LOCAL;
- flags |= RTCF_LOCAL;
- goto make_route;
-@@ -2493,7 +2532,7 @@
-
- if (fib_lookup(&fl, &res)) {
- res.fi = NULL;
-- if (oldflp->oif) {
-+ if (oldflp->oif && dev_out->flags & IFF_UP) {
- /* Apparently, routing tables are wrong. Assume,
- that the destination is on link.
-
-@@ -2533,6 +2572,7 @@
- dev_out = &loopback_dev;
- dev_hold(dev_out);
- fl.oif = dev_out->ifindex;
-+ fl.fl4_gw = 0;
- if (res.fi)
- fib_info_put(res.fi);
- res.fi = NULL;
-@@ -2540,13 +2580,12 @@
- goto make_route;
- }
-
-+ if (res.type == RTN_UNICAST)
-+ fib_select_default(&fl, &res);
- #ifdef CONFIG_IP_ROUTE_MULTIPATH
-- if (res.fi->fib_nhs > 1 && fl.oif == 0)
-+ if (res.fi->fib_nhs > 1)
- fib_select_multipath(&fl, &res);
-- else
- #endif
-- if (!res.prefixlen && res.type == RTN_UNICAST && !fl.oif)
-- fib_select_default(&fl, &res);
-
- if (!fl.fl4_src)
- fl.fl4_src = FIB_RES_PREFSRC(res);
-@@ -2583,6 +2622,7 @@
- rth->fl.fl4_src == flp->fl4_src &&
- rth->fl.iif == 0 &&
- rth->fl.oif == flp->oif &&
-+ rth->fl.fl4_gw == flp->fl4_gw &&
- #ifdef CONFIG_IP_ROUTE_FWMARK
- rth->fl.fl4_fwmark == flp->fl4_fwmark &&
- #endif
-@@ -3221,3 +3261,4 @@
- EXPORT_SYMBOL(__ip_select_ident);
- EXPORT_SYMBOL(ip_route_input);
- EXPORT_SYMBOL(ip_route_output_key);
-+EXPORT_SYMBOL(ip_route_input_lookup);
+++ /dev/null
-diff -urN linux-2.6.19.old/fs/jffs2/build.c linux-2.6.19.dev/fs/jffs2/build.c
---- linux-2.6.19.old/fs/jffs2/build.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/fs/jffs2/build.c 2006-12-14 03:13:57.000000000 +0100
-@@ -107,6 +107,17 @@
- dbg_fsbuild("scanned flash completely\n");
- jffs2_dbg_dump_block_lists_nolock(c);
-
-+ if (c->flags & (1 << 7)) {
-+ printk("%s(): unlocking the mtd device... ", __func__);
-+ if (c->mtd->unlock)
-+ c->mtd->unlock(c->mtd, 0, c->mtd->size);
-+ printk("done.\n");
-+
-+ printk("%s(): erasing all blocks after the end marker... ", __func__);
-+ jffs2_erase_pending_blocks(c, -1);
-+ printk("done.\n");
-+ }
-+
- dbg_fsbuild("pass 1 starting\n");
- c->flags |= JFFS2_SB_FLAG_BUILDING;
- /* Now scan the directory tree, increasing nlink according to every dirent found. */
-diff -urN linux-2.6.19.old/fs/jffs2/scan.c linux-2.6.19.dev/fs/jffs2/scan.c
---- linux-2.6.19.old/fs/jffs2/scan.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/fs/jffs2/scan.c 2006-12-14 03:13:57.000000000 +0100
-@@ -141,9 +141,12 @@
-
- /* reset summary info for next eraseblock scan */
- jffs2_sum_reset_collected(s);
--
-- ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
-- buf_size, s);
-+
-+ if (c->flags & (1 << 7))
-+ ret = BLK_STATE_ALLFF;
-+ else
-+ ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
-+ buf_size, s);
-
- if (ret < 0)
- goto out;
-@@ -540,6 +543,17 @@
- return err;
- }
-
-+ if ((buf[0] == 0xde) &&
-+ (buf[1] == 0xad) &&
-+ (buf[2] == 0xc0) &&
-+ (buf[3] == 0xde)) {
-+ /* end of filesystem. erase everything after this point */
-+ printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset);
-+ c->flags |= (1 << 7);
-+
-+ return BLK_STATE_ALLFF;
-+ }
-+
- /* We temporarily use 'ofs' as a pointer into the buffer/jeb */
- ofs = 0;
-
+++ /dev/null
-diff -urN linux-2.6.19.old/drivers/net/r8169.c linux-2.6.19.dev/drivers/net/r8169.c
---- linux-2.6.19.old/drivers/net/r8169.c 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/drivers/net/r8169.c 2006-12-14 03:14:01.000000000 +0100
-@@ -491,7 +491,7 @@
- #endif
-
- static const u16 rtl8169_intr_mask =
-- SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
-+ LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
- static const u16 rtl8169_napi_event =
- RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
- static const unsigned int rtl8169_rx_config =
-@@ -2584,10 +2584,12 @@
- if (!(status & rtl8169_intr_mask))
- break;
-
-+#if 0
- if (unlikely(status & SYSErr)) {
- rtl8169_pcierr_interrupt(dev);
- break;
- }
-+#endif
-
- if (status & LinkChg)
- rtl8169_check_link_status(dev, tp, ioaddr);
+++ /dev/null
-diff -urN linux-2.6.19.old/fs/Kconfig linux-2.6.19.dev/fs/Kconfig
---- linux-2.6.19.old/fs/Kconfig 2006-12-14 03:13:20.000000000 +0100
-+++ linux-2.6.19.dev/fs/Kconfig 2006-12-14 03:14:03.000000000 +0100
-@@ -468,6 +468,9 @@
- This option will enlarge your kernel, but it allows debugging of
- ocfs2 filesystem issues.
-
-+config MINI_FO
-+ tristate "Mini fanout overlay filesystem"
-+
- config MINIX_FS
- tristate "Minix fs support"
- help
-diff -urN linux-2.6.19.old/fs/Makefile linux-2.6.19.dev/fs/Makefile
---- linux-2.6.19.old/fs/Makefile 2006-12-14 03:13:20.000000000 +0100
-+++ linux-2.6.19.dev/fs/Makefile 2006-12-14 03:14:03.000000000 +0100
-@@ -71,6 +71,7 @@
- obj-$(CONFIG_RAMFS) += ramfs/
- obj-$(CONFIG_HUGETLBFS) += hugetlbfs/
- obj-$(CONFIG_CODA_FS) += coda/
-+obj-$(CONFIG_MINI_FO) += mini_fo/
- obj-$(CONFIG_MINIX_FS) += minix/
- obj-$(CONFIG_FAT_FS) += fat/
- obj-$(CONFIG_MSDOS_FS) += msdos/
-diff -urN linux-2.6.19.old/fs/mini_fo/aux.c linux-2.6.19.dev/fs/mini_fo/aux.c
---- linux-2.6.19.old/fs/mini_fo/aux.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/aux.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,580 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+/* check if file exists in storage */
-+int exists_in_storage(dentry_t *dentry)
-+{
-+ check_mini_fo_dentry(dentry);
-+ if(dtost(dentry) == MODIFIED || dtost(dentry) == CREATED || dtost(dentry) == DEL_REWRITTEN)
-+ return 1;
-+ return 0;
-+}
-+
-+/* check if dentry is in an existing state */
-+int is_mini_fo_existant(dentry_t *dentry)
-+{
-+ check_mini_fo_dentry(dentry);
-+
-+ if(dtost(dentry) == DELETED || dtost(dentry) == NON_EXISTANT)
-+ return 0;
-+ else
-+ return 1;
-+}
-+
-+/*
-+ * This function will create a negative storage dentry for
-+ * dentry, what is required for many create like options.
-+ * It will create the storage structure if necessary.
-+ */
-+int get_neg_sto_dentry(dentry_t *dentry)
-+{
-+ int err = 0;
-+ unsigned int len;
-+ const unsigned char *name;
-+
-+ if(!dentry ||
-+ !dtopd(dentry) ||
-+ !(dtost(dentry) == UNMODIFIED ||
-+ dtost(dentry) == NON_EXISTANT ||
-+ dtost(dentry) == DELETED)) {
-+ printk(KERN_CRIT "mini_fo: get_neg_sto_dentry: invalid dentry passed.\n");
-+ err = -1;
-+ goto out;
-+ }
-+ /* Have we got a neg. dentry already? */
-+ if(dtohd2(dentry)) {
-+ err = 0;
-+ goto out;
-+ }
-+ if(dtost(dentry->d_parent) == UNMODIFIED) {
-+ /* build sto struct */
-+ err = build_sto_structure(dentry->d_parent->d_parent, dentry->d_parent);
-+ if(err ||
-+ dtost(dentry->d_parent) != MODIFIED) {
-+ printk(KERN_CRIT "mini_fo: get_neg_sto_dentry: ERROR building sto structure.\n");
-+ err = -1;
-+ goto out;
-+ }
-+ }
-+
-+ len = dentry->d_name.len;
-+ name = dentry->d_name.name;
-+
-+ dtohd2(dentry) =
-+ lookup_one_len(name, dtohd2(dentry->d_parent), len);
-+
-+ out:
-+ return err;
-+}
-+
-+int check_mini_fo_dentry(dentry_t *dentry)
-+{
-+ ASSERT(dentry != NULL);
-+ ASSERT(dtopd(dentry) != NULL);
-+ ASSERT((dtohd(dentry) != NULL) || (dtohd2(dentry) != NULL));
-+
-+/* if(dtost(dentry) == MODIFIED) { */
-+/* ASSERT(dentry->d_inode != NULL); */
-+/* ASSERT(dtohd(dentry) != NULL); */
-+/* ASSERT(dtohd(dentry)->d_inode != NULL); */
-+/* ASSERT(dtohd2(dentry) != NULL); */
-+/* ASSERT(dtohd2(dentry)->d_inode != NULL); */
-+/* } */
-+/* else if(dtost(dentry) == UNMODIFIED) { */
-+/* ASSERT(dentry->d_inode != NULL); */
-+/* ASSERT( */
-+/* } */
-+ return 0;
-+}
-+
-+int check_mini_fo_file(file_t *file)
-+{
-+ ASSERT(file != NULL);
-+ ASSERT(ftopd(file) != NULL);
-+ ASSERT(file->f_dentry != NULL);
-+
-+ /* violent checking, check depending of state and type
-+ * if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {}
-+ */
-+ ASSERT((ftohf(file) != NULL) || (ftohf2(file) != NULL));
-+ return 0;
-+}
-+
-+int check_mini_fo_inode(inode_t *inode)
-+{
-+ ASSERT(inode != NULL);
-+ ASSERT(itopd(inode) != NULL);
-+ ASSERT((itohi(inode) != NULL) || (itohi2(inode) != NULL));
-+ return 0;
-+}
-+
-+/*
-+ * will walk a base path as provided by get_mini_fo_bpath and return
-+ * the (hopefully ;-) ) positive dentry of the renamed base dir.
-+ *
-+ * This does some work of path_init.
-+ */
-+dentry_t *bpath_walk(super_block_t *sb, char *bpath)
-+{
-+ int err;
-+ struct nameidata nd;
-+
-+ /* be paranoid */
-+ if(!bpath || bpath[0] != '/') {
-+ printk(KERN_CRIT "mini_fo: bpath_walk: Invalid string.\n");
-+ return NULL;
-+ }
-+ if(!sb || !stopd(sb)) {
-+ printk(KERN_CRIT "mini_fo: bpath_walk: Invalid sb.\n");
-+ return NULL;
-+ }
-+
-+ /* setup nd as path_init does */
-+ nd.last_type = LAST_ROOT; /* if there are only slashes... */
-+ nd.flags = LOOKUP_FOLLOW;
-+ /* fix this: how do I reach this lock?
-+ * read_lock(¤t->fs->lock); */
-+ nd.mnt = mntget(stopd(sb)->hidden_mnt);
-+ nd.dentry = dget(stopd(sb)->base_dir_dentry);
-+ /* read_unlock(¤t->fs->lock); */
-+
-+ err = path_walk(bpath+1, &nd);
-+
-+ /* validate */
-+ if (err || !nd.dentry || !nd.dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: bpath_walk: path_walk failed.\n");
-+ return NULL;
-+ }
-+ return nd.dentry;
-+}
-+
-+
-+/* returns the full path of the basefile incl. its name */
-+int get_mini_fo_bpath(dentry_t *dentry, char **bpath, int *bpath_len)
-+{
-+ char *buf_walker;
-+ int len = 0;
-+ dentry_t *sky_walker;
-+
-+ if(!dentry || !dtohd(dentry)) {
-+ printk(KERN_CRIT "mini_fo: get_mini_fo_bpath: invalid dentry passed.\n");
-+ return -1;
-+ }
-+ sky_walker = dtohd(dentry);
-+
-+ do {
-+ len += sky_walker->d_name.len + 1 ; /* 1 for '/' */
-+ sky_walker = sky_walker->d_parent;
-+ } while(sky_walker != stopd(dentry->d_inode->i_sb)->base_dir_dentry);
-+
-+ /* 1 to oil the loop */
-+ *bpath = (char*) kmalloc(len + 1, GFP_KERNEL);
-+ if(!*bpath) {
-+ printk(KERN_CRIT "mini_fo: get_mini_fo_bpath: out of mem.\n");
-+ return -1;
-+ }
-+ buf_walker = *bpath+len; /* put it on last char */
-+ *buf_walker = '\n';
-+ sky_walker = dtohd(dentry);
-+
-+ do {
-+ buf_walker -= sky_walker->d_name.len;
-+ strncpy(buf_walker,
-+ sky_walker->d_name.name,
-+ sky_walker->d_name.len);
-+ *(--buf_walker) = '/';
-+ sky_walker = sky_walker->d_parent;
-+ } while(sky_walker != stopd(dentry->d_inode->i_sb)->base_dir_dentry);
-+
-+ /* bpath_len doesn't count newline! */
-+ *bpath_len = len;
-+ return 0;
-+}
-+
-+int mini_fo_cp_cont(dentry_t *tgt_dentry, struct vfsmount *tgt_mnt,
-+ dentry_t *src_dentry, struct vfsmount *src_mnt)
-+{
-+ void *buf;
-+ mm_segment_t old_fs;
-+ file_t *tgt_file;
-+ file_t *src_file;
-+ int bytes, len, tmp, err;
-+ err = 0;
-+
-+ if(!(tgt_dentry->d_inode && src_dentry->d_inode)) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, neg. dentry passed.\n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ dget(tgt_dentry);
-+ dget(src_dentry);
-+ mntget(tgt_mnt);
-+ mntget(src_mnt);
-+
-+ /* open file write only */
-+ tgt_file = dentry_open(tgt_dentry, tgt_mnt, 0x1);
-+ if(!tgt_file || IS_ERR(tgt_file)) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR opening target file.\n");
-+ err = PTR_ERR(tgt_file);
-+ goto out_err;
-+ }
-+
-+ /* open file read only */
-+ src_file = dentry_open(src_dentry, src_mnt, 0x0);
-+ if(!src_file || IS_ERR(src_file)) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR opening source file.\n");
-+ err = PTR_ERR(src_file);
-+
-+ /* close target file */
-+ fput(tgt_file);
-+ goto out_err;
-+ }
-+
-+ /* check if the filesystem(s) support read respective write */
-+ if(!src_file->f_op->read || !tgt_file->f_op->write) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, no fs read or write support.\n");
-+ err = -EPERM;
-+ goto out_close;
-+ }
-+
-+ /* allocate a page for transfering the data */
-+ buf = (void *) __get_free_page(GFP_KERNEL);
-+ if(!buf) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, out of kernel mem.\n");
-+ goto out_err;
-+ }
-+
-+ tgt_file->f_pos = 0;
-+ src_file->f_pos = 0;
-+
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+
-+ /* Doing this I assume that a read operation will return a full
-+ * buffer while there is still data to read, and a less than
-+ * full buffer when all data has been read.
-+ */
-+ bytes = len = PAGE_SIZE;
-+ while(bytes == len) {
-+ bytes = src_file->f_op->read(src_file, buf, len,
-+ &src_file->f_pos);
-+ tmp = tgt_file->f_op->write(tgt_file, buf, bytes,
-+ &tgt_file->f_pos);
-+ if(tmp != bytes) {
-+ printk(KERN_CRIT "mini_fo_cp_cont: ERROR writing.\n");
-+ goto out_close_unset;
-+ }
-+ }
-+
-+ free_page((unsigned long) buf);
-+ set_fs(old_fs);
-+ fput(tgt_file);
-+ fput(src_file);
-+ goto out;
-+
-+ out_close_unset:
-+ free_page((unsigned long) buf);
-+ set_fs(old_fs);
-+
-+ out_close:
-+ fput(tgt_file);
-+ fput(src_file);
-+
-+ out_err:
-+ dput(tgt_dentry);
-+ dput(src_dentry);
-+
-+ /* mk: not sure if this need to be done */
-+ mntput(tgt_mnt);
-+ mntput(src_mnt);
-+
-+ out:
-+ return err;
-+}
-+
-+/* mk:
-+ * ndl (no-duplicate list) stuff
-+ * This is used in mini_fo_readdir, to save the storage directory contents
-+ * and later when reading base, match them against the list in order
-+ * to avoid duplicates.
-+ */
-+
-+/* add a file specified by name and len to the ndl
-+ * Return values: 0 on success, <0 on failure.
-+ */
-+int ndl_add_entry(struct readdir_data *rd, const char *name, int len)
-+{
-+ struct ndl_entry *tmp_entry;
-+
-+ tmp_entry = (struct ndl_entry *)
-+ kmalloc(sizeof(struct ndl_entry), GFP_KERNEL);
-+ if(!tmp_entry) {
-+ printk(KERN_CRIT "mini_fo: ndl_add_entry: out of mem.\n");
-+ return -ENOMEM;
-+ }
-+ tmp_entry->name = (char*) kmalloc(len, GFP_KERNEL);
-+ if(!tmp_entry->name) {
-+ printk(KERN_CRIT "mini_fo: ndl_add_entry: out of mem.\n");
-+ return -ENOMEM;
-+ }
-+ strncpy(tmp_entry->name, name, len);
-+ tmp_entry->len = len;
-+
-+ list_add(&tmp_entry->list, &rd->ndl_list);
-+ rd->ndl_size++;
-+ return 0;
-+}
-+
-+/* delete all list entries and free memory */
-+void ndl_put_list(struct readdir_data *rd)
-+{
-+ struct list_head *tmp;
-+ struct ndl_entry *tmp_entry;
-+
-+ if(rd->ndl_size <= 0)
-+ return;
-+ while(!list_empty(&rd->ndl_list)) {
-+ tmp = rd->ndl_list.next;
-+ list_del(tmp);
-+ tmp_entry = list_entry(tmp, struct ndl_entry, list);
-+ kfree(tmp_entry->name);
-+ kfree(tmp_entry);
-+ }
-+ rd->ndl_size = 0;
-+}
-+
-+/* Check if a file specified by name and len is in the ndl
-+ * Return value: 0 if not in list, 1 if file is found in ndl.
-+ */
-+int ndl_check_entry(struct readdir_data *rd, const char *name, int len)
-+{
-+ struct list_head *tmp;
-+ struct ndl_entry *tmp_entry;
-+
-+ if(rd->ndl_size <= 0)
-+ return 0;
-+
-+ list_for_each(tmp, &rd->ndl_list) {
-+ tmp_entry = list_entry(tmp, struct ndl_entry, list);
-+ if(tmp_entry->len != len)
-+ continue;
-+ if(!strncmp(tmp_entry->name, name, len))
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+/* mk:
-+ * Recursive function to create corresponding directorys in the storage fs.
-+ * The function will build the storage directorys up to dentry.
-+ */
-+int build_sto_structure(dentry_t *dir, dentry_t *dentry)
-+{
-+ int err;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ if(dentry->d_parent != dir) {
-+ printk(KERN_CRIT "mini_fo: build_sto_structure: invalid parameter or meta data corruption [1].\n");
-+ return 1;
-+ }
-+
-+ if(dtost(dir) != MODIFIED) {
-+ err = build_sto_structure(dir->d_parent, dentry->d_parent);
-+ if(err)
-+ return err;
-+ }
-+
-+ /* ok, coming back again. */
-+ check_mini_fo_dentry(dentry);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ if(!hidden_sto_dentry) {
-+ /*
-+ * This is the case after creating the first
-+ * hidden_sto_dentry.
-+ * After one negative storage_dentry, all pointers to
-+ * hidden_storage dentries are set to NULL. We need to
-+ * create the negative dentry before we create the storage
-+ * file.
-+ */
-+ unsigned int len;
-+ const unsigned char *name;
-+ len = dtohd(dentry)->d_name.len;
-+ name = dtohd(dentry)->d_name.name;
-+ hidden_sto_dentry = lookup_one_len(name, dtohd2(dir), len);
-+ dtohd2(dentry) = hidden_sto_dentry;
-+ }
-+
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ /* lets be safe */
-+ if(dtohd2(dir) != hidden_sto_dir_dentry) {
-+ printk(KERN_CRIT "mini_fo: build_sto_structure: invalid parameter or meta data corruption [2].\n");
-+ return 1;
-+ }
-+
-+ /* check for errors in lock_parent */
-+ err = PTR_ERR(hidden_sto_dir_dentry);
-+ if(IS_ERR(hidden_sto_dir_dentry)) {
-+ printk(KERN_CRIT "mini_fo: build_sto_structure: lock_parent failed.\n");
-+ return err;
-+ }
-+
-+ err = vfs_mkdir(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ dir->d_inode->i_mode);
-+
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: build_sto_structure: failed to create storage dir [1].\n");
-+ /* was: unlock_dir(dir); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&dir->d_inode->i_mutex);
-+#else
-+ up(&dir->d_inode->i_sem);
-+#endif
-+ dput(dir);
-+ return err;
-+ }
-+
-+ /* everything ok! */
-+ if(!dtohd2(dentry)->d_inode) {
-+ printk(KERN_CRIT "mini_fo: build_sto_structure: failed to create storage dir [2].\n");
-+ /* was: unlock_dir(dir); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&dir->d_inode->i_mutex);
-+#else
-+ up(&dir->d_inode->i_sem);
-+#endif
-+ dput(dir);
-+ return 1;
-+ }
-+
-+ /* interpose the new inode and set new state */
-+ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
-+ dtopd(dentry)->state = MODIFIED;
-+
-+ /* initalize the wol list */
-+ itopd(dentry->d_inode)->deleted_list_size = -1;
-+ itopd(dentry->d_inode)->renamed_list_size = -1;
-+ meta_build_lists(dentry);
-+
-+ fist_copy_attr_all(dentry->d_inode, itohi2(dentry->d_inode));
-+ fist_copy_attr_timesizes(dir->d_inode,
-+ hidden_sto_dir_dentry->d_inode);
-+ dir->d_inode->i_nlink++;
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ return 0;
-+}
-+
-+
-+#if 0 /* unused */
-+
-+/*
-+ * Read "len" bytes from "filename" into "buf".
-+ * "buf" is in kernel space.
-+ */
-+int
-+mini_fo_read_file(const char *filename, void *buf, int len)
-+{
-+ file_t *filp;
-+ mm_segment_t oldfs;
-+ int bytes;
-+ /* Chroot? Maybe NULL isn't right here */
-+ filp = filp_open(filename, O_RDONLY, 0);
-+ if (!filp || IS_ERR(filp)) {
-+ printk("mini_fo_read_file err %d\n", (int) PTR_ERR(filp));
-+ return -1; /* or do something else */
-+ }
-+
-+ if (!filp->f_op->read)
-+ return -2; /* file(system) doesn't allow reads */
-+
-+ /* now read len bytes from offset 0 */
-+ filp->f_pos = 0; /* start offset */
-+ oldfs = get_fs();
-+ set_fs(KERNEL_DS);
-+ bytes = filp->f_op->read(filp, buf, len, &filp->f_pos);
-+ set_fs(oldfs);
-+
-+ /* close the file */
-+ fput(filp);
-+
-+ return bytes;
-+}
-+
-+
-+
-+/*
-+ * Write "len" bytes from "buf" to "filename"
-+ * "buf" is in kernel space.
-+ */
-+int
-+mini_fo_write_file(const char *filename, void *buf, int len)
-+{
-+ file_t *filp;
-+ mm_segment_t oldfs;
-+ int bytes;
-+ /* Chroot? Maybe NULL isn't right here */
-+ filp = filp_open(filename, O_RDWR|O_CREAT, 0640);
-+ if (!filp || IS_ERR(filp)) {
-+ printk("mini_fo_write_file err %d\n", (int) PTR_ERR(filp));
-+ return -1; /* or do something else */
-+ }
-+
-+ if (!filp->f_op->write)
-+ return -2; /* file(system) doesn't allow writes */
-+
-+ /* now write len bytes from offset 0 */
-+ filp->f_pos = 0; /* start offset */
-+ oldfs = get_fs();
-+ set_fs(KERNEL_DS);
-+ bytes = filp->f_op->write(filp, buf, len, &filp->f_pos);
-+ set_fs(oldfs);
-+
-+ /* close the file */
-+ fput(filp);
-+
-+ return bytes;
-+}
-+
-+#endif /* unused */
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/ChangeLog linux-2.6.19.dev/fs/mini_fo/ChangeLog
---- linux-2.6.19.old/fs/mini_fo/ChangeLog 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/ChangeLog 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,281 @@
-+2006-01-24 Markus Klotzbuecher <mk@mary.denx.de>
-+
-+ * Add tons of ugly ifdefs to Ed L. Cashin's mutex patch to
-+ retain backwards compatibility.
-+
-+2006-01-24 Ed L. Cashin <ecashin@coraid.com>
-+
-+ * Support for the new mutex infrastructure
-+ (7892f2f48d165a34b0b8130c8a195dfd807b8cb6)
-+
-+2005-10-15 Markus Klotzbuecher <mk@localhost.localdomain>
-+
-+ * Bugfix for a serious memory leak in mini_fo_follow_link.
-+
-+2005-09-21 Markus Klotzbuecher <mk@mary>
-+
-+ * new release 0.6.1
-+
-+ * fix of a compiler warning due to changes in 2.6.13
-+
-+2005-09-21 Klaus Wenninger <klaus.wenninger@siemens.com>
-+
-+ * file.c: readdir: fix for a bug that caused directory entries
-+ to show up twice when using storage filesystems such as
-+ minixfs or pramfs.
-+
-+2005-06-30 Eric Lammerts <eric@lammerts.org>
-+
-+ * fix for an oops when overwriting a binary thats beeing
-+ executed.
-+
-+2005-06-09 <mk@mary>
-+
-+ * Renamed overlay to mini_fo-overlay.
-+
-+ * Added mini_fo-merge script to allow merging of storage and base
-+ after making modifications.
-+
-+2005-05-22 root <mk@mary>
-+
-+ * Added overlay script that allows to easily mount mini_fo ontop
-+ of a given base directory
-+
-+2005-05-10 <mk@mary>
-+
-+ * inode.c: xattr functions return -EOPNOSUPP instead of
-+ -ENOSUPP, what confuses "ls -l"
-+
-+ * Changed license from LGPL to GPL.
-+
-+2005-05-08 root <mk@mary>
-+
-+ * Makefile: clean it up and added make install and make
-+ uninstall.
-+
-+2005-05-06 <mk@mary>
-+
-+ * merged devel branch back to main. [v0-6-0-pre3]
-+
-+ * removed unused files print.c and fist_ioctl. [devel-0-0-18]
-+
-+ * ioctl: removed fist_ioctl stuff, that is not needed for
-+ now.
-+
-+2005-05-03 <mk@mary>
-+
-+ * file.c: simplified mini_fo_open and mini_fo_setattr using
-+ new state changing functions. [devel-0-0-17]
-+
-+ * inode.c: Fixed getattr state bug (see below) in 2.4 function
-+ mini_fo_inode revalidate.
-+
-+ * inode.c: found an other bug in mini_fo_getattr. States are not
-+ reliable in this function, as a file can be opened, unlinked and
-+ the getattr function called. This results in a deleted dentry
-+ with an inode. Fix is to ignore states and simply use the inode
-+ available.
-+
-+2005-04-29 <mk@mary>
-+
-+ * file.c: Bugfix and cleanup in fasync and fsync. [devel-0-0-16]
-+
-+ * file.c: do not use mini_fo_lock so the generic version is
-+ used (I guess).
-+
-+ * inode.c: getattr, never call getattr on lower files, as this
-+ will cause the inum to change.
-+
-+ * inode.c: rename_reg_file renamed to rename_nondir, as it
-+ doesn't matter as long it't not a dir. Removed all
-+ rename_dev_file etc.
-+
-+ * tagged as devel-0-0-15
-+
-+ * inode.c: added support for chosing support for extended
-+ attrs at compile time by XATTR define in mini_fo.h .
-+
-+ * inode.c: fixed mini_fo_getattr to use mini_fo inode and not
-+ lower again, what avoids inode number changes that confused
-+ rm again. This is the proper solution.
-+
-+2005-04-24 <mk@mary>
-+
-+ * all files: updated Copyright notive to 2005. [devel-0-0-14]
-+
-+ * inode.c: fixed mini_fo_getattr to not change the inode
-+ number, even if lower files change.
-+
-+ * super.c: fixed a bug that caused deleted base file to show
-+ up suddenly after some time, or after creating a special
-+ file. The problem was that after some time or after special
-+ file creating sync_sb_inodes is called by the vfs, that
-+ called our mini_fo_put_inode. There was (wrongly) called
-+ __meta_put_lists, that nuked the lists, although the inode
-+ was going to continue its life. Moving __meta_put_lists to
-+ mini_fo_clear_inode, where an inode is really destroyed,
-+ solved the problem.
-+
-+
-+2005-04-23 <mk@mary>
-+
-+ * state.c, aux.c: more cleaning up and
-+ simplifications. [devel-0-0-13]
-+
-+ * inode.c: implemented mini_fo_getattr, that was required for
-+ 2.6 because inode_revalidate has been remove there, and the
-+ old "du" bug returned.
-+
-+
-+2005-04-20 <mk@mary>
-+
-+ * aux.c: get_neg_sto_dentry(): allow to be called for dentries
-+ in state UNMODIFIED, NON_EXISTANT _and_ DELETED.
-+
-+2005-04-19 <mk@mary>
-+
-+ * Fixed a bug under 2.6 that caused files deleted via mini_fo
-+ not to be deleted properly and therefore the fs filled up
-+ untill no memory was left. [devel-0-0-12]
-+
-+ * Added basic hard link support. This means that creating
-+ hardlinks will work, but existing ones will be treated as
-+ individual files. [devel-0-0-11]
-+
-+2005-04-17 <mk@mary>
-+
-+ * Bugfixes
-+
-+2005-04-13 root <mk@mary>
-+
-+ * Added file state.c for the state transition
-+ functions. Doesn't work very well yet, though...
-+
-+2005-04-12 <mk@mary>
-+
-+ * Porting to 2.6 started, which is easier than expected, also
-+ due to Olivier previous work.
-+
-+2005-04-08 <mk@mary>
-+
-+ * Fixed the bug that caused du to return invalid sizes of
-+ directory trees. The problem was that
-+ mini_fo_inode_revalidate didn't always copy the attributes
-+ from the base inode properly.
-+
-+2005-04-01 Markus Klotzbuecher <mk@chasey>
-+
-+ * Merged devel branch back to main trunk and updated the
-+ RELEASE notes. This will be 0-6-0-pre1.
-+
-+2005-03-31 Markus Klotzbuecher <mk@chasey>
-+
-+ * Fixed some bugs in rename_reg_file, that only showed up in
-+ the kernel compile test. Kernel compiles cleanly ontop of
-+ mini_fo, now also make mrproper etc. work. Seems pretty stable.
-+
-+2005-03-28 Markus Klotzbuecher <mk@chasey>
-+
-+ * Many, many directory renaming bugfixes and a lot of other
-+ cleanup. Dir renaming seems to work relatively stable.
-+
-+2005-03-22 Markus Klotzbuecher <mk@chasey>
-+
-+ * Finished implementing lightweight directory renaming. Some
-+ basic testing indicates it works fine.
-+ Next is to implement testcases for the testsuite and confirm
-+ everything is really working ok.
-+
-+2005-03-18 Markus Klotzbuecher <mk@chasey>
-+
-+ * Finished implementing meta.c stuff required for directory
-+ renaming.
-+
-+2005-03-17 Markus Klotzbuecher <mk@chasey>
-+
-+ * Fixed all compile warnings + an extremly old bug that
-+ somehow crept in while reworking the wol stuff to the META
-+ system. Turning on -Werror again... :-)
-+
-+ * Fixed some bugs in the new rename_reg_file function.
-+
-+ * Rewrote mini_fo rename and split it into several
-+ subfunctions, that handle the different types
-+ seperately. Rewrote the regular file function aswell, as it
-+ was implemented somewhat inefficient.
-+
-+2005-03-16 Markus Klotzbuecher <mk@chasey>
-+
-+ * Implemented new META subsystem, removed old WOL stuff in favor
-+ if it.
-+
-+ * After some basic testing everything seems ok...
-+
-+2005-03-11 Markus Klotzbuecher <mk@chasey>
-+
-+ * Renaming a non regular file caused trouble because I always
-+ tried to copy the contents. Now I only do this for regular
-+ files. mini_fo_rename still isn't implemented properly, renaming
-+ of device files, symlinks etc. results in a empty regular file
-+ instead of the proper type.
-+
-+ * Directory renaming suddenly works! What a surprise! I guess
-+ this is because renaming is implemented as making a copy and
-+ removing the original. Still this might not work
-+ everywhere...
-+
-+2005-03-09 Markus Klotzbuecher <mk@chasey>
-+
-+ * Bugfix, when a mini_fo directory that exists in storage
-+ (state: MODIFIED, CREATED and DEL_REWRITTEN) is deleted, a
-+ possibly existing WOL file contained in it needs to be
-+ deleted too.
-+
-+ * Starting cleanup: defined state names in order to get rid of
-+ the state numbers.
-+
-+2005-03-08 Markus Klotzbuecher <mk@chasey>
-+
-+ * Makefile fix, fist_ioctl was built against wrong sources if ARCH=um
-+
-+ * Fixed a bug in dentry.c, mini_fo_d_hash. In state 4 =
-+ DEL_REWRITTEN the hash was calculated from the base dentry,
-+ which was wrong and and caused assertions in
-+ __mini_fo_hidden_dentry to fail.
-+
-+2005-02-21 <mk@mary>
-+
-+ * Implemented directory deleting (inode.c)
-+
-+ * main.c: made mini_fo_parse_options a little more robust.
-+
-+2004-12-22 <mk@mary>
-+
-+ * Makefile cleanup and uml stuff, removed unneccessary files
-+
-+ * Created a new and hopefully more informative README
-+
-+ * CHANGELOG: created a new CHANGELOG and added old entries reversely
-+
-+
-+2004-10-24 Gleb Natapov <gleb@nbase.co.il>
-+
-+ * Fix: owner and group where not correctly copied from base to
-+ storage.
-+
-+
-+2004-10-05 Gleb Natapov <gleb@nbase.co.il>
-+
-+ * Implementation of fsync, fasync and lock mini_fo functions.
-+
-+
-+2004-09-29 Bob Lee <bob@pantasys.com>
-+
-+ * Fix of a serious pointer bug
-+
-+
-+2004-09-28 Gleb Natapov <gleb@nbase.co.il>
-+
-+ * Implementation of mini_fo_mknod and mini_fo_rename, support
-+ for device files.
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/dentry.c linux-2.6.19.dev/fs/mini_fo/dentry.c
---- linux-2.6.19.old/fs/mini_fo/dentry.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/dentry.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,244 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+/*
-+ * THIS IS A BOOLEAN FUNCTION: returns 1 if valid, 0 otherwise.
-+ */
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_d_revalidate(dentry_t *dentry, struct nameidata *nd)
-+#else
-+mini_fo_d_revalidate(dentry_t *dentry, int flags)
-+#endif
-+{
-+ int err1 = 1; /* valid = 1, invalid = 0 */
-+ int err2 = 1;
-+ dentry_t *hidden_dentry;
-+ dentry_t *hidden_sto_dentry;
-+
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ hidden_dentry = dtohd(dentry);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ if(hidden_dentry &&
-+ hidden_dentry->d_op &&
-+ hidden_dentry->d_op->d_revalidate) {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err1 = hidden_dentry->d_op->d_revalidate(hidden_dentry, nd);
-+#else
-+ err1 = hidden_dentry->d_op->d_revalidate(hidden_dentry, flags);
-+#endif
-+ }
-+ if(hidden_sto_dentry &&
-+ hidden_sto_dentry->d_op &&
-+ hidden_sto_dentry->d_op->d_revalidate) {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err2 = hidden_sto_dentry->d_op->d_revalidate(hidden_sto_dentry,
-+ nd);
-+#else
-+ err2 = hidden_sto_dentry->d_op->d_revalidate(hidden_sto_dentry,
-+ flags);
-+#endif
-+ }
-+
-+ /* mk: if one of the lower level dentries are valid,
-+ * the mini_fo dentry is too.
-+ */
-+ return (err1 || err2);
-+}
-+
-+
-+STATIC int
-+mini_fo_d_hash(dentry_t *dentry, qstr_t *name)
-+{
-+ int err = 0;
-+ dentry_t *hidden_dentry;
-+ dentry_t *hidden_sto_dentry;
-+
-+ /* hidden_dentry = mini_fo_hidden_dentry(dentry);
-+ * hidden_sto_dentry = mini_fo_hidden_sto_dentry(dentry); */
-+
-+ /* state 1, 3, 4, 5: build the hash for the storage dentry */
-+ if((dtopd(dentry)->state == MODIFIED) ||
-+ (dtopd(dentry)->state == CREATED) ||
-+ (dtopd(dentry)->state == DEL_REWRITTEN) ||
-+ (dtopd(dentry)->state == DELETED)) {
-+ hidden_sto_dentry = dtohd2(dentry);
-+ if(hidden_sto_dentry &&
-+ hidden_sto_dentry->d_op &&
-+ hidden_sto_dentry->d_op->d_hash) {
-+ err = hidden_sto_dentry->d_op->d_hash(hidden_sto_dentry, name);
-+ }
-+ goto out;
-+ }
-+ /* state 2: build the hash for the base dentry */
-+ if(dtopd(dentry)->state == UNMODIFIED) {
-+ hidden_dentry = dtohd(dentry);
-+ if(hidden_dentry &&
-+ hidden_dentry->d_op &&
-+ hidden_dentry->d_op->d_hash) {
-+ err = hidden_dentry->d_op->d_hash(hidden_dentry, name);
-+ }
-+ goto out;
-+ }
-+ /* state 6: build hash for the dentry that exists */
-+ if(dtopd(dentry)->state == NON_EXISTANT) {
-+ hidden_sto_dentry = dtohd2(dentry);
-+ if(hidden_sto_dentry &&
-+ hidden_sto_dentry->d_op &&
-+ hidden_sto_dentry->d_op->d_hash) {
-+ err = hidden_sto_dentry->d_op->d_hash(hidden_sto_dentry, name);
-+ goto out;
-+ }
-+ hidden_dentry = dtohd(dentry);
-+ if(hidden_dentry &&
-+ hidden_dentry->d_op &&
-+ hidden_dentry->d_op->d_hash) {
-+ err = hidden_dentry->d_op->d_hash(hidden_dentry, name);
-+ goto out;
-+ }
-+ }
-+
-+ printk(KERN_CRIT "mini_fo: d_hash: invalid state detected.\n");
-+
-+ out:
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_d_compare(dentry_t *dentry, qstr_t *a, qstr_t *b)
-+{
-+ int err;
-+ dentry_t *hidden_dentry=NULL;
-+
-+ /* hidden_dentry = mini_fo_hidden_dentry(dentry); */
-+ if(dtohd2(dentry))
-+ hidden_dentry = dtohd2(dentry);
-+ else if(dtohd(dentry))
-+ hidden_dentry = dtohd(dentry);
-+
-+ if (hidden_dentry && hidden_dentry->d_op && hidden_dentry->d_op->d_compare) {
-+ err = hidden_dentry->d_op->d_compare(hidden_dentry, a, b);
-+ } else {
-+ err = ((a->len != b->len) || memcmp(a->name, b->name, b->len));
-+ }
-+
-+ return err;
-+}
-+
-+
-+int
-+mini_fo_d_delete(dentry_t *dentry)
-+{
-+ dentry_t *hidden_dentry;
-+ dentry_t *hidden_sto_dentry;
-+ int err = 0;
-+
-+ /* this could be a negative dentry, so check first */
-+ if (!dtopd(dentry)) {
-+ printk(KERN_CRIT "mini_fo_d_delete: negative dentry passed.\n");
-+ goto out;
-+ }
-+ hidden_dentry = dtohd(dentry);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ if(hidden_dentry) {
-+ if(hidden_dentry->d_op &&
-+ hidden_dentry->d_op->d_delete) {
-+ err = hidden_dentry->d_op->d_delete(hidden_dentry);
-+ }
-+ }
-+ if(hidden_sto_dentry) {
-+ if(hidden_sto_dentry->d_op &&
-+ hidden_sto_dentry->d_op->d_delete) {
-+ err = hidden_sto_dentry->d_op->d_delete(hidden_sto_dentry);
-+ }
-+ }
-+
-+ out:
-+ return err;
-+}
-+
-+
-+void
-+mini_fo_d_release(dentry_t *dentry)
-+{
-+ dentry_t *hidden_dentry;
-+ dentry_t *hidden_sto_dentry;
-+
-+
-+ /* this could be a negative dentry, so check first */
-+ if (!dtopd(dentry)) {
-+ printk(KERN_CRIT "mini_fo_d_release: no private data.\n");
-+ goto out;
-+ }
-+ hidden_dentry = dtohd(dentry);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ if(hidden_dentry) {
-+ /* decrement hidden dentry's counter and free its inode */
-+ dput(hidden_dentry);
-+ }
-+ if(hidden_sto_dentry) {
-+ /* decrement hidden dentry's counter and free its inode */
-+ dput(hidden_sto_dentry);
-+ }
-+
-+ /* free private data (mini_fo_dentry_info) here */
-+ kfree(dtopd(dentry));
-+ __dtopd(dentry) = NULL; /* just to be safe */
-+ out:
-+ return;
-+}
-+
-+
-+/*
-+ * we don't really need mini_fo_d_iput, because dentry_iput will call iput() if
-+ * mini_fo_d_iput is not defined. We left this implemented for ease of
-+ * tracing/debugging.
-+ */
-+void
-+mini_fo_d_iput(dentry_t *dentry, inode_t *inode)
-+{
-+ iput(inode);
-+}
-+
-+
-+struct dentry_operations mini_fo_dops = {
-+ d_revalidate: mini_fo_d_revalidate,
-+ d_hash: mini_fo_d_hash,
-+ d_compare: mini_fo_d_compare,
-+ d_release: mini_fo_d_release,
-+ d_delete: mini_fo_d_delete,
-+ d_iput: mini_fo_d_iput,
-+};
-diff -urN linux-2.6.19.old/fs/mini_fo/file.c linux-2.6.19.dev/fs/mini_fo/file.c
---- linux-2.6.19.old/fs/mini_fo/file.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/file.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,713 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+#define ROUND_UP(x) (((x)+sizeof(long)-1) & ~(sizeof(long)-1))
-+
-+/*******************
-+ * File Operations *
-+ *******************/
-+
-+STATIC loff_t
-+mini_fo_llseek(file_t *file, loff_t offset, int origin)
-+{
-+ loff_t err;
-+ file_t *hidden_file = NULL;
-+
-+ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
-+ /* Check if trying to llseek from a directory */
-+ err = -EISDIR;
-+ goto out;
-+ }
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ } else {
-+ hidden_file = ftohf(file);
-+ }
-+ }
-+
-+ /* always set hidden position to this one */
-+ hidden_file->f_pos = file->f_pos;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ memcpy(&(hidden_file->f_ra),
-+ &(file->f_ra),
-+ sizeof(struct file_ra_state));
-+#else
-+ if (file->f_reada) { /* update readahead information if needed */
-+ hidden_file->f_reada = file->f_reada;
-+ hidden_file->f_ramax = file->f_ramax;
-+ hidden_file->f_raend = file->f_raend;
-+ hidden_file->f_ralen = file->f_ralen;
-+ hidden_file->f_rawin = file->f_rawin;
-+ }
-+#endif
-+ if (hidden_file->f_op && hidden_file->f_op->llseek)
-+ err = hidden_file->f_op->llseek(hidden_file, offset, origin);
-+ else
-+ err = generic_file_llseek(hidden_file, offset, origin);
-+
-+ if (err < 0)
-+ goto out;
-+
-+ if (err != file->f_pos) {
-+ file->f_pos = err;
-+ // ION maybe this?
-+ // file->f_pos = hidden_file->f_pos;
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ file->f_reada = 0;
-+#endif
-+ file->f_version++;
-+ }
-+
-+ out:
-+ return err;
-+}
-+
-+
-+/* mk: fanout capable */
-+STATIC ssize_t
-+mini_fo_read(file_t *file, char *buf, size_t count, loff_t *ppos)
-+{
-+ int err = -EINVAL;
-+ file_t *hidden_file = NULL;
-+ loff_t pos = *ppos;
-+
-+ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
-+ /* Check if trying to read from a directory */
-+ /* printk(KERN_CRIT "mini_fo_read: ERROR: trying to read data from a directory.\n"); */
-+ err = -EISDIR;
-+ goto out;
-+ }
-+
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ } else {
-+ hidden_file = ftohf(file);
-+ }
-+ }
-+
-+ if (!hidden_file->f_op || !hidden_file->f_op->read)
-+ goto out;
-+
-+ err = hidden_file->f_op->read(hidden_file, buf, count, &pos);
-+ *ppos = pos;
-+
-+ if (err >= 0) {
-+ /* atime should also be updated for reads of size zero or more */
-+ fist_copy_attr_atime(file->f_dentry->d_inode,
-+ hidden_file->f_dentry->d_inode);
-+ }
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ /*
-+ * MAJOR HACK
-+ * because pread() does not have any way to tell us that it is
-+ * our caller, then we don't know for sure if we have to update
-+ * the file positions. This hack relies on read() having passed us
-+ * the "real" pointer of its struct file's f_pos field.
-+ */
-+ if (ppos == &file->f_pos)
-+ hidden_file->f_pos = *ppos = pos;
-+ if (hidden_file->f_reada) { /* update readahead information if needed */
-+ file->f_reada = hidden_file->f_reada;
-+ file->f_ramax = hidden_file->f_ramax;
-+ file->f_raend = hidden_file->f_raend;
-+ file->f_ralen = hidden_file->f_ralen;
-+ file->f_rawin = hidden_file->f_rawin;
-+ }
-+#else
-+ memcpy(&(file->f_ra),&(hidden_file->f_ra),sizeof(struct file_ra_state));
-+#endif
-+
-+ out:
-+ return err;
-+}
-+
-+
-+/* this mini_fo_write() does not modify data pages! */
-+STATIC ssize_t
-+mini_fo_write(file_t *file, const char *buf, size_t count, loff_t *ppos)
-+{
-+ int err = -EINVAL;
-+ file_t *hidden_file = NULL;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+ loff_t pos = *ppos;
-+
-+ /* mk: fan out: */
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ } else {
-+ /* This is bad! We have no storage file to write to. This
-+ * should never happen because if a file is opened for
-+ * writing, a copy should have been made earlier.
-+ */
-+ printk(KERN_CRIT "mini_fo: write : ERROR, no storage file to write.\n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ }
-+
-+ inode = file->f_dentry->d_inode;
-+ hidden_inode = itohi2(inode);
-+ if(!hidden_inode) {
-+ printk(KERN_CRIT "mini_fo: write: no sto inode found, not good.\n");
-+ goto out;
-+ }
-+
-+ if (!hidden_file->f_op || !hidden_file->f_op->write)
-+ goto out;
-+
-+ /* adjust for append -- seek to the end of the file */
-+ if (file->f_flags & O_APPEND)
-+ pos = inode->i_size;
-+
-+ err = hidden_file->f_op->write(hidden_file, buf, count, &pos);
-+
-+ /*
-+ * copy ctime and mtime from lower layer attributes
-+ * atime is unchanged for both layers
-+ */
-+ if (err >= 0)
-+ fist_copy_attr_times(inode, hidden_inode);
-+
-+ *ppos = pos;
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ /*
-+ * XXX: MAJOR HACK
-+ *
-+ * because pwrite() does not have any way to tell us that it is
-+ * our caller, then we don't know for sure if we have to update
-+ * the file positions. This hack relies on write() having passed us
-+ * the "real" pointer of its struct file's f_pos field.
-+ */
-+ if (ppos == &file->f_pos)
-+ hidden_file->f_pos = *ppos = pos;
-+#endif
-+ /* update this inode's size */
-+ if (pos > inode->i_size)
-+ inode->i_size = pos;
-+
-+ out:
-+ return err;
-+}
-+
-+/* Global variable to hold a file_t pointer.
-+ * This serves to allow mini_fo_filldir function to know which file is
-+ * beeing read, which is required for two reasons:
-+ *
-+ * - be able to call wol functions in order to avoid listing deleted
-+ * base files.
-+ * - if we're reading a directory which is in state 1, we need to
-+ * maintain a list (in mini_fo_filldir) of which files allready
-+ * have been copied to userspace,to detect files existing in base
-+ * and storage and not list them twice.
-+ */
-+filldir_t mini_fo_filldir_orig;
-+file_t *mini_fo_filldir_file;
-+
-+/* mainly copied from fs/readdir.c */
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+mini_fo_filldir(void * __buf, const char * name, int namlen, loff_t offset,
-+ u64 ino, unsigned int d_type)
-+#else
-+mini_fo_filldir(void * __buf, const char * name, int namlen, loff_t offset,
-+ ino_t ino, unsigned int d_type)
-+#endif
-+{
-+ struct getdents_callback * buf = (struct getdents_callback *) __buf;
-+ file_t* file = mini_fo_filldir_file;
-+
-+ /* In theses states we filter meta files in storage (WOL) */
-+ if(file && (dtopd(file->f_dentry)->state == MODIFIED ||
-+ dtopd(file->f_dentry)->state == CREATED ||
-+ dtopd(file->f_dentry)->state == DEL_REWRITTEN)) {
-+
-+ int tmp = strlen(META_FILENAME);
-+ if(tmp == namlen) {
-+ if(!strncmp(name, META_FILENAME, namlen))
-+ return 0;
-+ }
-+ }
-+
-+ /* check if we are merging the contents of storage and base */
-+ if(file && dtopd(file->f_dentry)->state == MODIFIED) {
-+ /* check if we are still reading storage contents, if
-+ * yes, we just save the name of the file for duplicate
-+ * checking later. */
-+
-+ if(!ftopd(file)->rd.sto_done) {
-+ /* put file into ndl list */
-+ if(ndl_add_entry(&ftopd(file)->rd, name, namlen))
-+ printk(KERN_CRIT "mini_fo_filldir: Error adding to ndl.\n");
-+ } else {
-+ /* check if file has been deleted */
-+ if(meta_check_d_entry(file->f_dentry, name, namlen))
-+ return 0;
-+
-+ /* do duplicate checking */
-+ if(ndl_check_entry(&ftopd(file)->rd, name, namlen))
-+ return 0;
-+ }
-+ }
-+
-+ return mini_fo_filldir_orig(buf, name, namlen, offset, ino, d_type);
-+}
-+
-+
-+STATIC int
-+mini_fo_readdir(file_t *file, void *dirent, filldir_t filldir)
-+{
-+ int err = 0;/* mk: ??? -ENOTDIR; */
-+ file_t *hidden_file = NULL;
-+ file_t *hidden_sto_file = NULL;
-+ inode_t *inode;
-+ struct getdents_callback *buf;
-+ int oldcount;
-+
-+#if defined(FIST_FILTER_NAME) || defined(FIST_FILTER_SCA)
-+ struct mini_fo_getdents_callback buf;
-+#endif /* FIST_FILTER_NAME || FIST_FILTER_SCA */
-+
-+ buf = (struct getdents_callback *) dirent;
-+ oldcount = buf->count;
-+ inode = file->f_dentry->d_inode;
-+ mini_fo_filldir_file = file;
-+ mini_fo_filldir_orig = filldir;
-+
-+ ftopd(file)->rd.sto_done = 0;
-+ do {
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_sto_file = ftohf2(file);
-+ err = vfs_readdir(hidden_sto_file, mini_fo_filldir, dirent);
-+ file->f_pos = hidden_sto_file->f_pos;
-+ if (err > 0)
-+ fist_copy_attr_atime(inode, hidden_sto_file->f_dentry->d_inode);
-+ /* not finshed yet, we'll be called again */
-+ if (buf->count != oldcount)
-+ break;
-+ }
-+
-+ ftopd(file)->rd.sto_done = 1;
-+
-+ if(ftohf(file)) {
-+ hidden_file = ftohf(file);
-+ err = vfs_readdir(hidden_file, mini_fo_filldir, dirent);
-+ file->f_pos = hidden_file->f_pos;
-+ if (err > 0)
-+ fist_copy_attr_atime(inode, hidden_file->f_dentry->d_inode);
-+ }
-+
-+ }
-+ } while (0);
-+
-+ /* mk:
-+ * we need to check if all the directory data has been copied to userspace,
-+ * or if we will be called again by userspace to complete the operation.
-+ */
-+ if(buf->count == oldcount) {
-+ ndl_put_list(&ftopd(file)->rd);
-+ }
-+
-+ /* unset this, safe */
-+ mini_fo_filldir_file = NULL;
-+ return err;
-+}
-+
-+
-+STATIC unsigned int
-+mini_fo_poll(file_t *file, poll_table *wait)
-+{
-+ unsigned int mask = DEFAULT_POLLMASK;
-+ file_t *hidden_file = NULL;
-+
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ } else {
-+ hidden_file = ftohf(file);
-+ }
-+ }
-+
-+ if (!hidden_file->f_op || !hidden_file->f_op->poll)
-+ goto out;
-+
-+ mask = hidden_file->f_op->poll(hidden_file, wait);
-+
-+ out:
-+ return mask;
-+}
-+
-+/* FIST-LITE special version of mmap */
-+STATIC int
-+mini_fo_mmap(file_t *file, vm_area_t *vma)
-+{
-+ int err = 0;
-+ file_t *hidden_file = NULL;
-+
-+ /* fanout capability */
-+ if (ftopd(file) != NULL) {
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ } else {
-+ hidden_file = ftohf(file);
-+ }
-+ }
-+
-+ ASSERT(hidden_file != NULL);
-+ ASSERT(hidden_file->f_op != NULL);
-+ ASSERT(hidden_file->f_op->mmap != NULL);
-+
-+ vma->vm_file = hidden_file;
-+ err = hidden_file->f_op->mmap(hidden_file, vma);
-+ get_file(hidden_file); /* make sure it doesn't get freed on us */
-+ fput(file); /* no need to keep extra ref on ours */
-+
-+ return err;
-+}
-+
-+
-+
-+STATIC int
-+mini_fo_open(inode_t *inode, file_t *file)
-+{
-+ int err = 0;
-+ int hidden_flags;
-+ file_t *hidden_file = NULL;
-+ dentry_t *hidden_dentry = NULL;
-+
-+ /* fanout stuff */
-+ file_t *hidden_sto_file = NULL;
-+ dentry_t *hidden_sto_dentry = NULL;
-+
-+ __ftopd(file) =
-+ kmalloc(sizeof(struct mini_fo_file_info), GFP_KERNEL);
-+ if (!ftopd(file)) {
-+ err = -ENOMEM;
-+ goto out;
-+ }
-+
-+ /* init the readdir_helper structure */
-+ INIT_LIST_HEAD(&ftopd(file)->rd.ndl_list);
-+ ftopd(file)->rd.ndl_size = 0;
-+
-+ /* In certain paths this could stay uninitalized and cause trouble */
-+ ftohf(file) = NULL;
-+ ftohf2(file) = NULL;
-+ hidden_flags = file->f_flags;
-+
-+ /* create storage files? */
-+ if(dtost(file->f_dentry) == UNMODIFIED) {
-+ if(!IS_WRITE_FLAG(file->f_flags)) {
-+ hidden_dentry = dtohd(file->f_dentry);
-+ dget(hidden_dentry);
-+ /* dentry_open will decrement mnt refcnt if err.
-+ * otherwise fput() will do an mntput() for us upon file close. */
-+ mntget(stopd(inode->i_sb)->hidden_mnt);
-+ hidden_file = dentry_open(hidden_dentry,
-+ stopd(inode->i_sb)->hidden_mnt,
-+ hidden_flags);
-+ if (IS_ERR(hidden_file)) {
-+ err = PTR_ERR(hidden_file);
-+ dput(hidden_dentry);
-+ goto out;
-+ }
-+ ftohf(file) = hidden_file; /* link two files */
-+ goto out;
-+ }
-+ else {
-+ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
-+ err = dir_unmod_to_mod(file->f_dentry);
-+ } else
-+ err = nondir_unmod_to_mod(file->f_dentry, 1);
-+
-+ if (err) {
-+ printk("mini_fo_open: ERROR creating storage file.\n");
-+ goto out;
-+ }
-+ }
-+ }
-+ hidden_sto_dentry = dtohd2(file->f_dentry);
-+ dget(hidden_sto_dentry);
-+
-+ if(dtopd(file->f_dentry)->state == MODIFIED) {
-+ /* Directorys are special, interpose on both lower level files */
-+ if(S_ISDIR(itohi(inode)->i_mode)) {
-+ /* check for invalid file types of lower level files */
-+ if(!(S_ISDIR(itohi(inode)->i_mode) && S_ISDIR(itohi2(inode)->i_mode))) {
-+ printk(KERN_CRIT "mini_fo_open: meta data corruption detected.\n");
-+ dput(hidden_sto_dentry);
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ /* lower level directorys are ok, open the base file */
-+ hidden_dentry = dtohd(file->f_dentry);
-+ dget(hidden_dentry);
-+
-+ mntget(stopd(inode->i_sb)->hidden_mnt);
-+ hidden_file = dentry_open(hidden_dentry,
-+ stopd(inode->i_sb)->hidden_mnt,
-+ hidden_flags);
-+ if (IS_ERR(hidden_file)) {
-+ err = PTR_ERR(hidden_file);
-+ dput(hidden_dentry);
-+ dput(hidden_sto_dentry);
-+ goto out;
-+ }
-+ ftohf(file) = hidden_file; /* link the two files */
-+ }
-+ }
-+
-+ if(!exists_in_storage(file->f_dentry)) {
-+ printk(KERN_CRIT "mini_fo_open: invalid file state detected.\n");
-+ err = -EINVAL;
-+ dput(hidden_sto_dentry);
-+
-+ /* If the base file has been opened, we need to close it here */
-+ if(ftohf(file)) {
-+ if (hidden_file->f_op && hidden_file->f_op->flush)
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ hidden_file->f_op->flush(hidden_file, NULL);
-+#else
-+ hidden_file->f_op->flush(hidden_file);
-+#endif
-+ dput(hidden_dentry);
-+ }
-+ goto out;
-+ }
-+
-+ /* ok, now we can safely open the storage file */
-+ mntget(stopd(inode->i_sb)->hidden_mnt2);
-+ hidden_sto_file = dentry_open(hidden_sto_dentry,
-+ stopd(inode->i_sb)->hidden_mnt2,
-+ hidden_flags);
-+
-+ /* dentry_open dputs the dentry if it fails */
-+ if (IS_ERR(hidden_sto_file)) {
-+ err = PTR_ERR(hidden_sto_file);
-+ /* close base file if open */
-+ if(ftohf(file)) {
-+ if (hidden_file->f_op && hidden_file->f_op->flush)
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ hidden_file->f_op->flush(hidden_file, NULL);
-+#else
-+ hidden_file->f_op->flush(hidden_file);
-+#endif
-+ dput(hidden_dentry);
-+ }
-+ goto out;
-+ }
-+ ftohf2(file) = hidden_sto_file; /* link storage file */
-+
-+ out:
-+ if (err < 0 && ftopd(file)) {
-+ kfree(ftopd(file));
-+ }
-+ return err;
-+}
-+
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+mini_fo_flush(file_t *file, fl_owner_t id)
-+#else
-+mini_fo_flush(file_t *file)
-+#endif
-+{
-+ int err1 = 0; /* assume ok (see open.c:close_fp) */
-+ int err2 = 0;
-+ file_t *hidden_file = NULL;
-+
-+ check_mini_fo_file(file);
-+
-+ /* mk: we don't do any state checking here, as its not worth the time.
-+ * Just flush the lower level files if they exist.
-+ */
-+ if(ftopd(file) != NULL) {
-+ if(ftohf(file) != NULL) {
-+ hidden_file = ftohf(file);
-+ if (hidden_file->f_op && hidden_file->f_op->flush)
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ err1 = hidden_file->f_op->flush(hidden_file, id);
-+#else
-+ err1 = hidden_file->f_op->flush(hidden_file);
-+#endif
-+ }
-+ if(ftohf2(file) != NULL) {
-+ hidden_file = ftohf2(file);
-+ if (hidden_file->f_op && hidden_file->f_op->flush)
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ err2 = hidden_file->f_op->flush(hidden_file, id);
-+#else
-+ err2 = hidden_file->f_op->flush(hidden_file);
-+#endif
-+ }
-+ }
-+ return (err1 | err2);
-+}
-+
-+
-+STATIC int
-+mini_fo_release(inode_t *inode, file_t *file)
-+{
-+ int err = 0;
-+ file_t *hidden_file = NULL;
-+
-+ if (ftopd(file) != NULL) {
-+ if(ftohf(file)) {
-+ hidden_file = ftohf(file);
-+ fput(hidden_file);
-+ }
-+ if(ftohf2(file)) {
-+ hidden_file = ftohf2(file);
-+ fput(hidden_file);
-+ }
-+ kfree(ftopd(file));
-+ }
-+ return err;
-+}
-+
-+STATIC int
-+mini_fo_fsync(file_t *file, dentry_t *dentry, int datasync)
-+{
-+ int err1 = 0;
-+ int err2 = 0;
-+ file_t *hidden_file = NULL;
-+ dentry_t *hidden_dentry;
-+
-+ check_mini_fo_file(file);
-+
-+ if ((hidden_file = ftohf(file)) != NULL) {
-+ hidden_dentry = dtohd(dentry);
-+ if (hidden_file->f_op && hidden_file->f_op->fsync) {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ err1 = hidden_file->f_op->fsync(hidden_file, hidden_dentry, datasync);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ }
-+
-+ if ((hidden_file = ftohf2(file)) != NULL) {
-+ hidden_dentry = dtohd2(dentry);
-+ if (hidden_file->f_op && hidden_file->f_op->fsync) {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ err2 = hidden_file->f_op->fsync(hidden_file, hidden_dentry, datasync);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ }
-+ else
-+ goto err;
-+
-+err:
-+ return (err1 || err2);
-+}
-+
-+
-+STATIC int
-+mini_fo_fasync(int fd, file_t *file, int flag)
-+{
-+ int err1 = 0;
-+ int err2 = 0;
-+
-+ file_t *hidden_file = NULL;
-+
-+ check_mini_fo_file(file);
-+
-+ if((hidden_file = ftohf(file)) != NULL) {
-+ err1 = hidden_file->f_op->fasync(fd, hidden_file, flag);
-+ }
-+ if((hidden_file = ftohf2(file)) != NULL) {
-+ err2 = hidden_file->f_op->fasync(fd, hidden_file, flag);
-+ }
-+
-+ return (err1 || err2);
-+}
-+
-+
-+
-+struct file_operations mini_fo_dir_fops =
-+ {
-+ read: generic_read_dir,
-+ write: mini_fo_write,
-+ readdir: mini_fo_readdir,
-+ poll: mini_fo_poll,
-+ /* ioctl: mini_fo_ioctl, */
-+ mmap: mini_fo_mmap,
-+ open: mini_fo_open,
-+ flush: mini_fo_flush,
-+ release: mini_fo_release,
-+ fsync: mini_fo_fsync,
-+ fasync: mini_fo_fasync,
-+ /* not needed lock: mini_fo_lock, */
-+ /* not needed: readv */
-+ /* not needed: writev */
-+ /* not implemented: sendpage */
-+ /* not implemented: get_unmapped_area */
-+ };
-+
-+struct file_operations mini_fo_main_fops =
-+ {
-+ llseek: mini_fo_llseek,
-+ read: mini_fo_read,
-+ write: mini_fo_write,
-+ readdir: mini_fo_readdir,
-+ poll: mini_fo_poll,
-+ /* ioctl: mini_fo_ioctl, */
-+ mmap: mini_fo_mmap,
-+ open: mini_fo_open,
-+ flush: mini_fo_flush,
-+ release: mini_fo_release,
-+ fsync: mini_fo_fsync,
-+ fasync: mini_fo_fasync,
-+ /* not needed: lock: mini_fo_lock, */
-+ /* not needed: readv */
-+ /* not needed: writev */
-+ /* not implemented: sendpage */
-+ /* not implemented: get_unmapped_area */
-+ };
-diff -urN linux-2.6.19.old/fs/mini_fo/fist.h linux-2.6.19.dev/fs/mini_fo/fist.h
---- linux-2.6.19.old/fs/mini_fo/fist.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/fist.h 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,252 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifndef __FIST_H_
-+#define __FIST_H_
-+
-+/*
-+ * KERNEL ONLY CODE:
-+ */
-+#ifdef __KERNEL__
-+#include <linux/version.h>
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
-+#include <linux/autoconf.h>
-+#else
-+#include <linux/config.h>
-+#endif
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+#ifdef CONFIG_MODVERSIONS
-+# define MODVERSIONS
-+# include <linux/modversions.h>
-+#endif /* CONFIG_MODVERSIONS */
-+#endif /* KERNEL_VERSION < 2.6.0 */
-+#include <linux/sched.h>
-+#include <linux/kernel.h>
-+#include <linux/mm.h>
-+#include <linux/string.h>
-+#include <linux/stat.h>
-+#include <linux/errno.h>
-+#include <linux/wait.h>
-+#include <linux/limits.h>
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+#include <linux/locks.h>
-+#else
-+#include <linux/buffer_head.h>
-+#include <linux/pagemap.h>
-+#include <linux/namei.h>
-+#include <linux/module.h>
-+#include <linux/mount.h>
-+#include <linux/page-flags.h>
-+#include <linux/writeback.h>
-+#include <linux/statfs.h>
-+#endif
-+#include <linux/smp.h>
-+#include <linux/smp_lock.h>
-+#include <linux/file.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+#include <linux/poll.h>
-+#include <linux/list.h>
-+#include <linux/init.h>
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
-+#include <linux/xattr.h>
-+#endif
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+#include <linux/security.h>
-+#endif
-+
-+#include <linux/swap.h>
-+
-+#include <asm/system.h>
-+#include <asm/segment.h>
-+#include <asm/mman.h>
-+#include <linux/seq_file.h>
-+
-+/*
-+ * MACROS:
-+ */
-+
-+/* those mapped to ATTR_* were copied from linux/fs.h */
-+#define FA_MODE ATTR_MODE
-+#define FA_UID ATTR_UID
-+#define FA_GID ATTR_GID
-+#define FA_SIZE ATTR_SIZE
-+#define FA_ATIME ATTR_ATIME
-+#define FA_MTIME ATTR_MTIME
-+#define FA_CTIME ATTR_CTIME
-+#define FA_ATIME_SET ATTR_ATIME_SET
-+#define FA_MTIME_SET ATTR_MTIME_SET
-+#define FA_FORCE ATTR_FORCE
-+#define FA_ATTR_FLAGS ATTR_ATTR_FLAG
-+
-+/* must be greater than all other ATTR_* flags! */
-+#define FA_NLINK 2048
-+#define FA_BLKSIZE 4096
-+#define FA_BLOCKS 8192
-+#define FA_TIMES (FA_ATIME|FA_MTIME|FA_CTIME)
-+#define FA_ALL 0
-+
-+/* macros to manage changes between kernels */
-+#define INODE_DATA(i) (&(i)->i_data)
-+
-+#define MIN(x,y) ((x < y) ? (x) : (y))
-+#define MAX(x,y) ((x > y) ? (x) : (y))
-+#define MAXPATHLEN PATH_MAX
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5)
-+# define lookup_one_len(a,b,c) lookup_one(a,b)
-+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5) */
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8)
-+# define generic_file_llseek default_llseek
-+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) */
-+
-+#ifndef SEEK_SET
-+# define SEEK_SET 0
-+#endif /* not SEEK_SET */
-+
-+#ifndef SEEK_CUR
-+# define SEEK_CUR 1
-+#endif /* not SEEK_CUR */
-+
-+#ifndef SEEK_END
-+# define SEEK_END 2
-+#endif /* not SEEK_END */
-+
-+#ifndef DEFAULT_POLLMASK
-+# define DEFAULT_POLLMASK (POLLIN | POLLOUT | POLLRDNORM | POLLWRNORM)
-+#endif /* not DEFAULT_POLLMASK */
-+
-+/* XXX: fix this so fistgen generates kfree() code directly */
-+#define kfree_s(a,b) kfree(a)
-+
-+/*
-+ * TYPEDEFS:
-+ */
-+typedef struct dentry dentry_t;
-+typedef struct file file_t;
-+typedef struct inode inode_t;
-+typedef inode_t vnode_t;
-+typedef struct page page_t;
-+typedef struct qstr qstr_t;
-+typedef struct super_block super_block_t;
-+typedef super_block_t vfs_t;
-+typedef struct vm_area_struct vm_area_t;
-+
-+
-+/*
-+ * EXTERNALS:
-+ */
-+
-+#define FPPF(str,page) printk("PPF %s 0x%x/%d: Lck:%d Err:%d Ref:%d Upd:%d Other::%d:%d:%d:%d:\n", \
-+ str, \
-+ (int) page, \
-+ (int) page->index, \
-+ (PageLocked(page) ? 1 : 0), \
-+ (PageError(page) ? 1 : 0), \
-+ (PageReferenced(page) ? 1 : 0), \
-+ (Page_Uptodate(page) ? 1 : 0), \
-+ (PageDecrAfter(page) ? 1 : 0), \
-+ (PageSlab(page) ? 1 : 0), \
-+ (PageSwapCache(page) ? 1 : 0), \
-+ (PageReserved(page) ? 1 : 0) \
-+ )
-+#define EZKDBG printk("EZK %s:%d:%s\n",__FILE__,__LINE__,__FUNCTION__)
-+#if 0
-+# define EZKDBG1 printk("EZK %s:%d\n",__FILE__,__LINE__)
-+#else
-+# define EZKDBG1
-+#endif
-+
-+extern int fist_get_debug_value(void);
-+extern int fist_set_debug_value(int val);
-+#if 0 /* mini_fo doesn't need these */
-+extern void fist_dprint_internal(int level, char *str,...);
-+extern void fist_print_dentry(char *str, const dentry_t *dentry);
-+extern void fist_print_inode(char *str, const inode_t *inode);
-+extern void fist_print_file(char *str, const file_t *file);
-+extern void fist_print_buffer_flags(char *str, struct buffer_head *buffer);
-+extern void fist_print_page_flags(char *str, page_t *page);
-+extern void fist_print_page_bytes(char *str, page_t *page);
-+extern void fist_print_pte_flags(char *str, const page_t *page);
-+extern void fist_checkinode(inode_t *inode, char *msg);
-+extern void fist_print_sb(char *str, const super_block_t *sb);
-+
-+/* §$% by mk: special debug functions */
-+extern void fist_mk_print_dentry(char *str, const dentry_t *dentry);
-+extern void fist_mk_print_inode(char *str, const inode_t *inode);
-+
-+extern char *add_indent(void);
-+extern char *del_indent(void);
-+#endif/* mini_fo doesn't need these */
-+
-+
-+#define STATIC
-+#define ASSERT(EX) \
-+do { \
-+ if (!(EX)) { \
-+ printk(KERN_CRIT "ASSERTION FAILED: %s at %s:%d (%s)\n", #EX, \
-+ __FILE__, __LINE__, __FUNCTION__); \
-+ (*((char *)0))=0; \
-+ } \
-+} while (0)
-+/* same ASSERT, but tell me who was the caller of the function */
-+#define ASSERT2(EX) \
-+do { \
-+ if (!(EX)) { \
-+ printk(KERN_CRIT "ASSERTION FAILED (caller): %s at %s:%d (%s)\n", #EX, \
-+ file, line, func); \
-+ (*((char *)0))=0; \
-+ } \
-+} while (0)
-+
-+#if 0 /* mini_fo doesn't need these */
-+#define dprintk(format, args...) printk(KERN_DEBUG format, ##args)
-+#define fist_dprint(level, str, args...) fist_dprint_internal(level, KERN_DEBUG str, ## args)
-+#define print_entry_location() fist_dprint(4, "%sIN: %s %s:%d\n", add_indent(), __FUNCTION__, __FILE__, __LINE__)
-+#define print_exit_location() fist_dprint(4, "%s OUT: %s %s:%d\n", del_indent(), __FUNCTION__, __FILE__, __LINE__)
-+#define print_exit_status(status) fist_dprint(4, "%s OUT: %s %s:%d, STATUS: %d\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, status)
-+#define print_exit_pointer(status) \
-+do { \
-+ if (IS_ERR(status)) \
-+ fist_dprint(4, "%s OUT: %s %s:%d, RESULT: %ld\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, PTR_ERR(status)); \
-+ else \
-+ fist_dprint(4, "%s OUT: %s %s:%d, RESULT: 0x%x\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, PTR_ERR(status)); \
-+} while (0)
-+#endif/* mini_fo doesn't need these */
-+
-+#endif /* __KERNEL__ */
-+
-+
-+/*
-+ * DEFINITIONS FOR USER AND KERNEL CODE:
-+ * (Note: ioctl numbers 1--9 are reserved for fistgen, the rest
-+ * are auto-generated automatically based on the user's .fist file.)
-+ */
-+# define FIST_IOCTL_GET_DEBUG_VALUE _IOR(0x15, 1, int)
-+# define FIST_IOCTL_SET_DEBUG_VALUE _IOW(0x15, 2, int)
-+
-+#endif /* not __FIST_H_ */
-diff -urN linux-2.6.19.old/fs/mini_fo/inode.c linux-2.6.19.dev/fs/mini_fo/inode.c
---- linux-2.6.19.old/fs/mini_fo/inode.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/inode.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,1573 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_create(inode_t *dir, dentry_t *dentry, int mode, struct nameidata *nd)
-+#else
-+mini_fo_create(inode_t *dir, dentry_t *dentry, int mode)
-+#endif
-+{
-+ int err = 0;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err = create_sto_reg_file(dentry, mode, nd);
-+#else
-+ err = create_sto_reg_file(dentry, mode);
-+#endif
-+ check_mini_fo_dentry(dentry);
-+ return err;
-+}
-+
-+
-+STATIC dentry_t *
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_lookup(inode_t *dir, dentry_t *dentry, struct nameidata* nd)
-+#else
-+mini_fo_lookup(inode_t *dir, dentry_t *dentry)
-+#endif
-+{
-+ int err = 0;
-+ dentry_t *hidden_dir_dentry;
-+ dentry_t *hidden_dentry = NULL;
-+
-+ dentry_t *hidden_sto_dir_dentry;
-+ dentry_t *hidden_sto_dentry = NULL;
-+
-+ /* whiteout flag */
-+ int del_flag = 0;
-+ char *bpath = NULL;
-+
-+ const char *name;
-+ unsigned int namelen;
-+
-+ /* Don't allow lookups of META-files */
-+ namelen = strlen(META_FILENAME);
-+ if(namelen == dentry->d_name.len) {
-+ if(!strncmp(dentry->d_name.name, META_FILENAME, namelen)) {
-+ err = -ENOENT;
-+ goto out;
-+ }
-+ }
-+
-+ hidden_dir_dentry = dtohd(dentry->d_parent);
-+ hidden_sto_dir_dentry = dtohd2(dentry->d_parent);
-+
-+ name = dentry->d_name.name;
-+ namelen = dentry->d_name.len;
-+
-+ /* must initialize dentry operations */
-+ dentry->d_op = &mini_fo_dops;
-+
-+ /* setup the del_flag */
-+ del_flag = __meta_check_d_entry(dir, name, namelen);
-+ bpath = __meta_check_r_entry(dir, name, namelen);
-+
-+ /* perform the lookups of base and storage files:
-+ *
-+ * This caused some serious trouble, as a lookup_one_len passing
-+ * a negative dentry oopses. Solution is to only do the lookup
-+ * if the dentry is positive, else we set it to NULL
-+ * More trouble, who said a *_dir_dentry can't be NULL?
-+ */
-+ if(bpath) {
-+ /* Cross-Interposing (C), yeah! */
-+ hidden_dentry = bpath_walk(dir->i_sb, bpath);
-+ if(!hidden_dentry || !hidden_dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo_lookup: bpath_walk failed.\n");
-+ err= -EINVAL;
-+ goto out;
-+ }
-+
-+ /* this can be set up safely without fear of spaghetti
-+ * interposing as it is only used for copying times */
-+ hidden_dir_dentry = hidden_dentry->d_parent;
-+ kfree(bpath);
-+ }
-+ else if(hidden_dir_dentry && hidden_dir_dentry->d_inode)
-+ hidden_dentry =
-+ lookup_one_len(name, hidden_dir_dentry, namelen);
-+ else
-+ hidden_dentry = NULL;
-+
-+ if(hidden_sto_dir_dentry && hidden_sto_dir_dentry->d_inode)
-+ hidden_sto_dentry =
-+ lookup_one_len(name, hidden_sto_dir_dentry, namelen);
-+ else
-+ hidden_sto_dentry = NULL;
-+
-+ /* catch error in lookup */
-+ if (IS_ERR(hidden_dentry) || IS_ERR(hidden_sto_dentry)) {
-+ /* mk: we need to call dput on the dentry, whose
-+ * lookup_one_len operation failed, in order to avoid
-+ * unmount trouble.
-+ */
-+ if(IS_ERR(hidden_dentry)) {
-+ printk(KERN_CRIT "mini_fo_lookup: ERR from base dentry, lookup failed.\n");
-+ err = PTR_ERR(hidden_dentry);
-+ } else {
-+ dput(hidden_dentry);
-+ }
-+ if(IS_ERR(hidden_sto_dentry)) {
-+ printk(KERN_CRIT "mini_fo_lookup: ERR from storage dentry, lookup failed.\n");
-+ err = PTR_ERR(hidden_sto_dentry);
-+ } else {
-+ dput(hidden_sto_dentry);
-+ }
-+ goto out;
-+ }
-+
-+ /* allocate dentry private data */
-+ __dtopd(dentry) = (struct mini_fo_dentry_info *)
-+ kmalloc(sizeof(struct mini_fo_dentry_info), GFP_KERNEL);
-+
-+ if (!dtopd(dentry)) {
-+ err = -ENOMEM;
-+ goto out_dput;
-+ }
-+
-+ /* check for different states of the mini_fo file to be looked up. */
-+
-+ /* state 1, file has been modified */
-+ if(hidden_dentry && hidden_sto_dentry &&
-+ hidden_dentry->d_inode && hidden_sto_dentry->d_inode && !del_flag) {
-+
-+ /* update parent directory's atime */
-+ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
-+
-+ dtopd(dentry)->state = MODIFIED;
-+ dtohd(dentry) = hidden_dentry;
-+ dtohd2(dentry) = hidden_sto_dentry;
-+
-+ err = mini_fo_tri_interpose(hidden_dentry,
-+ hidden_sto_dentry,
-+ dentry, dir->i_sb, 1);
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo_lookup: error interposing (state1).\n");
-+ goto out_free;
-+ }
-+ goto out;
-+ }
-+ /* state 2, file is unmodified */
-+ if(hidden_dentry && hidden_dentry->d_inode && !del_flag) {
-+
-+ fist_copy_attr_atime(dir, hidden_dir_dentry->d_inode);
-+
-+ dtopd(dentry)->state = UNMODIFIED;
-+ dtohd(dentry) = hidden_dentry;
-+ dtohd2(dentry) = hidden_sto_dentry; /* could be negative */
-+
-+ err = mini_fo_tri_interpose(hidden_dentry,
-+ hidden_sto_dentry,
-+ dentry, dir->i_sb, 1);
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo_lookup: error interposing (state2).\n");
-+ goto out_free;
-+ }
-+ goto out;
-+ }
-+ /* state 3, file has been newly created */
-+ if(hidden_sto_dentry && hidden_sto_dentry->d_inode && !del_flag) {
-+
-+ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
-+ dtopd(dentry)->state = CREATED;
-+ dtohd(dentry) = hidden_dentry; /* could be negative */
-+ dtohd2(dentry) = hidden_sto_dentry;
-+
-+ err = mini_fo_tri_interpose(hidden_dentry,
-+ hidden_sto_dentry,
-+ dentry, dir->i_sb, 1);
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo_lookup: error interposing (state3).\n");
-+ goto out_free;
-+ }
-+ goto out;
-+ }
-+
-+ /* state 4, file has deleted and created again. */
-+ if(hidden_dentry && hidden_sto_dentry &&
-+ hidden_dentry->d_inode &&
-+ hidden_sto_dentry->d_inode && del_flag) {
-+
-+ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
-+ dtopd(dentry)->state = DEL_REWRITTEN;
-+ dtohd(dentry) = NULL;
-+ dtohd2(dentry) = hidden_sto_dentry;
-+
-+ err = mini_fo_tri_interpose(NULL,
-+ hidden_sto_dentry,
-+ dentry, dir->i_sb, 1);
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo_lookup: error interposing (state4).\n");
-+ goto out_free;
-+ }
-+ /* We will never need this dentry again, as the file has been
-+ * deleted from base */
-+ dput(hidden_dentry);
-+ goto out;
-+ }
-+ /* state 5, file has been deleted in base */
-+ if(hidden_dentry && hidden_sto_dentry &&
-+ hidden_dentry->d_inode &&
-+ !hidden_sto_dentry->d_inode && del_flag) {
-+
-+ /* check which parents atime we need for updating */
-+ if(hidden_sto_dir_dentry->d_inode)
-+ fist_copy_attr_atime(dir,
-+ hidden_sto_dir_dentry->d_inode);
-+ else
-+ fist_copy_attr_atime(dir,
-+ hidden_dir_dentry->d_inode);
-+
-+ dtopd(dentry)->state = DELETED;
-+ dtohd(dentry) = NULL;
-+ dtohd2(dentry) = hidden_sto_dentry;
-+
-+ /* add negative dentry to dcache to speed up lookups */
-+ d_add(dentry, NULL);
-+ dput(hidden_dentry);
-+ goto out;
-+ }
-+ /* state 6, file does not exist */
-+ if(((hidden_dentry && !hidden_dentry->d_inode) ||
-+ (hidden_sto_dentry && !hidden_sto_dentry->d_inode)) && !del_flag)
-+ {
-+ /* check which parents atime we need for updating */
-+ if(hidden_sto_dir_dentry && hidden_sto_dir_dentry->d_inode)
-+ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
-+ else
-+ fist_copy_attr_atime(dir, hidden_dir_dentry->d_inode);
-+
-+ dtopd(dentry)->state = NON_EXISTANT;
-+ dtohd(dentry) = hidden_dentry;
-+ dtohd2(dentry) = hidden_sto_dentry;
-+ d_add(dentry, NULL);
-+ goto out;
-+ }
-+
-+ /* if we get to here, were in an invalid state. bad. */
-+ printk(KERN_CRIT "mini_fo_lookup: ERROR, meta data corruption detected.\n");
-+
-+ /* end state checking */
-+ out_free:
-+ d_drop(dentry); /* so that our bad dentry will get destroyed */
-+ kfree(dtopd(dentry));
-+ __dtopd(dentry) = NULL; /* be safe */
-+
-+ out_dput:
-+ if(hidden_dentry)
-+ dput(hidden_dentry);
-+ if(hidden_sto_dentry)
-+ dput(hidden_sto_dentry); /* drops usage count and marks for release */
-+
-+ out:
-+ /* initalize wol if file exists and is directory */
-+ if(dentry->d_inode) {
-+ if(S_ISDIR(dentry->d_inode->i_mode)) {
-+ itopd(dentry->d_inode)->deleted_list_size = -1;
-+ itopd(dentry->d_inode)->renamed_list_size = -1;
-+ meta_build_lists(dentry);
-+ }
-+ }
-+ return ERR_PTR(err);
-+}
-+
-+
-+STATIC int
-+mini_fo_link(dentry_t *old_dentry, inode_t *dir, dentry_t *new_dentry)
-+{
-+ int err;
-+ dentry_t *hidden_old_dentry;
-+ dentry_t *hidden_new_dentry;
-+ dentry_t *hidden_dir_dentry;
-+
-+
-+ check_mini_fo_dentry(old_dentry);
-+ check_mini_fo_dentry(new_dentry);
-+ check_mini_fo_inode(dir);
-+
-+ /* no links to directorys and existing targets target allowed */
-+ if(S_ISDIR(old_dentry->d_inode->i_mode) ||
-+ is_mini_fo_existant(new_dentry)) {
-+ err = -EPERM;
-+ goto out;
-+ }
-+
-+ /* bring it directly from unmod to del_rew */
-+ if(dtost(old_dentry) == UNMODIFIED) {
-+ err = nondir_unmod_to_mod(old_dentry, 1);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ err = meta_add_d_entry(old_dentry->d_parent,
-+ old_dentry->d_name.name,
-+ old_dentry->d_name.len);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ dput(dtohd(old_dentry));
-+ dtohd(old_dentry) = NULL;
-+ dtost(old_dentry) = DEL_REWRITTEN;
-+ }
-+
-+ err = get_neg_sto_dentry(new_dentry);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ hidden_old_dentry = dtohd2(old_dentry);
-+ hidden_new_dentry = dtohd2(new_dentry);
-+
-+ dget(hidden_old_dentry);
-+ dget(hidden_new_dentry);
-+
-+ /* was: hidden_dir_dentry = lock_parent(hidden_new_dentry); */
-+ hidden_dir_dentry = dget(hidden_new_dentry->d_parent);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ err = vfs_link(hidden_old_dentry,
-+ hidden_dir_dentry->d_inode,
-+ hidden_new_dentry);
-+ if (err || !hidden_new_dentry->d_inode)
-+ goto out_lock;
-+
-+ dtost(new_dentry) = CREATED;
-+ err = mini_fo_tri_interpose(NULL, hidden_new_dentry, new_dentry, dir->i_sb, 0);
-+ if (err)
-+ goto out_lock;
-+
-+ fist_copy_attr_timesizes(dir, hidden_new_dentry->d_inode);
-+ /* propagate number of hard-links */
-+ old_dentry->d_inode->i_nlink = itohi2(old_dentry->d_inode)->i_nlink;
-+
-+ out_lock:
-+ /* was: unlock_dir(hidden_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_dir_dentry);
-+
-+ dput(hidden_new_dentry);
-+ dput(hidden_old_dentry);
-+ if (!new_dentry->d_inode)
-+ d_drop(new_dentry);
-+
-+ out:
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_unlink(inode_t *dir, dentry_t *dentry)
-+{
-+ int err = 0;
-+
-+ dget(dentry);
-+ if(dtopd(dentry)->state == MODIFIED) {
-+ err = nondir_mod_to_del(dentry);
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == UNMODIFIED) {
-+ err = nondir_unmod_to_del(dentry);
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == CREATED) {
-+ err = nondir_creat_to_del(dentry);
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == DEL_REWRITTEN) {
-+ err = nondir_del_rew_to_del(dentry);
-+ goto out;
-+ }
-+
-+ printk(KERN_CRIT "mini_fo_unlink: ERROR, invalid state detected.\n");
-+
-+ out:
-+ fist_copy_attr_times(dir, itohi2(dentry->d_parent->d_inode));
-+
-+ if(!err) {
-+ /* is this causing my pain? d_delete(dentry); */
-+ d_drop(dentry);
-+ }
-+
-+ dput(dentry);
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_symlink(inode_t *dir, dentry_t *dentry, const char *symname)
-+{
-+ int err=0;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ umode_t mode;
-+#endif
-+
-+ /* Fail if the symlink file exists */
-+ if(!(dtost(dentry) == DELETED ||
-+ dtost(dentry) == NON_EXISTANT)) {
-+ err = -EEXIST;
-+ goto out;
-+ }
-+
-+ err = get_neg_sto_dentry(dentry);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ dget(hidden_sto_dentry);
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ mode = S_IALLUGO;
-+ err = vfs_symlink(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry, symname, mode);
-+#else
-+ err = vfs_symlink(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ symname);
-+#endif
-+ if (err || !hidden_sto_dentry->d_inode)
-+ goto out_lock;
-+
-+ if(dtost(dentry) == DELETED) {
-+ dtost(dentry) = DEL_REWRITTEN;
-+ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ } else if(dtost(dentry) == NON_EXISTANT) {
-+ dtost(dentry) = CREATED;
-+ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
-+
-+ out_lock:
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+
-+ dput(hidden_sto_dentry);
-+ if (!dentry->d_inode)
-+ d_drop(dentry);
-+ out:
-+ return err;
-+}
-+
-+STATIC int
-+mini_fo_mkdir(inode_t *dir, dentry_t *dentry, int mode)
-+{
-+ int err;
-+
-+ err = create_sto_dir(dentry, mode);
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_rmdir(inode_t *dir, dentry_t *dentry)
-+{
-+ int err = 0;
-+
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+ dentry_t *meta_dentry;
-+ inode_t *hidden_sto_dir = NULL;
-+
-+ check_mini_fo_dentry(dentry);
-+ check_mini_fo_inode(dir);
-+
-+ dget(dentry);
-+ if(dtopd(dentry)->state == MODIFIED) {
-+ /* XXX: disabled, because it does not bother to check files on
-+ * the original filesystem - just a hack, but better than simply
-+ * removing it without testing */
-+ err = -EINVAL;
-+ goto out;
-+
-+ hidden_sto_dir = itohi2(dir);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was:hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ /* avoid destroying the hidden inode if the file is in use */
-+ dget(hidden_sto_dentry);
-+
-+ /* Delete an old WOL file contained in the storage dir */
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ hidden_sto_dentry,
-+ strlen(META_FILENAME));
-+ if(meta_dentry->d_inode) {
-+ err = vfs_unlink(hidden_sto_dentry->d_inode, meta_dentry);
-+ dput(meta_dentry);
-+ if(!err)
-+ d_delete(meta_dentry);
-+ }
-+
-+ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
-+ dput(hidden_sto_dentry);
-+ if(!err)
-+ d_delete(hidden_sto_dentry);
-+
-+ /* propagate number of hard-links */
-+ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
-+
-+ dput(dtohd(dentry));
-+
-+ dtohd(dentry) = NULL;
-+ dtopd(dentry)->state = DELETED;
-+
-+ /* carefull with R files */
-+ if( __meta_is_r_entry(dir,
-+ dentry->d_name.name,
-+ dentry->d_name.len) == 1) {
-+ err = meta_remove_r_entry(dentry->d_parent,
-+ dentry->d_name.name,
-+ dentry->d_name.len);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: rmdir: meta_remove_r_entry failed.\n");
-+ goto out;
-+ }
-+ }
-+ else {
-+ /* ok, add deleted file to META */
-+ meta_add_d_entry(dentry->d_parent,
-+ dentry->d_name.name,
-+ dentry->d_name.len);
-+ }
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == UNMODIFIED) {
-+ /* XXX: simply adding it to the delete list here is fscking dangerous!
-+ * as a temporary hack, i will disable rmdir on unmodified directories
-+ * for now.
-+ */
-+ err = -EINVAL;
-+ goto out;
-+
-+ err = get_neg_sto_dentry(dentry);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ /* dput base dentry, this will relase the inode and free the
-+ * dentry, as we will never need it again. */
-+ dput(dtohd(dentry));
-+ dtohd(dentry) = NULL;
-+ dtopd(dentry)->state = DELETED;
-+
-+ /* add deleted file to META-file */
-+ meta_add_d_entry(dentry->d_parent,
-+ dentry->d_name.name,
-+ dentry->d_name.len);
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == CREATED) {
-+ hidden_sto_dir = itohi2(dir);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ /* avoid destroying the hidden inode if the file is in use */
-+ dget(hidden_sto_dentry);
-+
-+ /* Delete an old WOL file contained in the storage dir */
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ hidden_sto_dentry,
-+ strlen(META_FILENAME));
-+ if(meta_dentry->d_inode) {
-+ /* is this necessary? dget(meta_dentry); */
-+ err = vfs_unlink(hidden_sto_dentry->d_inode,
-+ meta_dentry);
-+ dput(meta_dentry);
-+ if(!err)
-+ d_delete(meta_dentry);
-+ }
-+
-+ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
-+ dput(hidden_sto_dentry);
-+ if(!err)
-+ d_delete(hidden_sto_dentry);
-+
-+ /* propagate number of hard-links */
-+ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
-+ dtopd(dentry)->state = NON_EXISTANT;
-+
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+
-+ goto out;
-+ }
-+ else if(dtopd(dentry)->state == DEL_REWRITTEN) {
-+ hidden_sto_dir = itohi2(dir);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ /* avoid destroying the hidden inode if the file is in use */
-+ dget(hidden_sto_dentry);
-+
-+ /* Delete an old WOL file contained in the storage dir */
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ hidden_sto_dentry,
-+ strlen(META_FILENAME));
-+ if(meta_dentry->d_inode) {
-+ /* is this necessary? dget(meta_dentry); */
-+ err = vfs_unlink(hidden_sto_dentry->d_inode,
-+ meta_dentry);
-+ dput(meta_dentry);
-+ if(!err)
-+ d_delete(meta_dentry);
-+ }
-+
-+ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
-+ dput(hidden_sto_dentry);
-+ if(!err)
-+ d_delete(hidden_sto_dentry);
-+
-+ /* propagate number of hard-links */
-+ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
-+ dtopd(dentry)->state = DELETED;
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ goto out;
-+ }
-+
-+ printk(KERN_CRIT "mini_fo_rmdir: ERROR, invalid state detected.\n");
-+
-+ out:
-+ if(!err) {
-+ d_drop(dentry);
-+ }
-+
-+ fist_copy_attr_times(dir, itohi2(dentry->d_parent->d_inode));
-+ dput(dentry);
-+
-+ return err;
-+}
-+
-+
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_mknod(inode_t *dir, dentry_t *dentry, int mode, dev_t dev)
-+#else
-+mini_fo_mknod(inode_t *dir, dentry_t *dentry, int mode, int dev)
-+#endif
-+{
-+ int err = 0;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ err = create_sto_nod(dentry, mode, dev);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo_mknod: creating sto nod failed.\n");
-+ err = -EINVAL;
-+ }
-+
-+ check_mini_fo_dentry(dentry);
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_rename(inode_t *old_dir, dentry_t *old_dentry,
-+ inode_t *new_dir, dentry_t *new_dentry)
-+{
-+ /* dispatch */
-+ if(S_ISDIR(old_dentry->d_inode->i_mode))
-+ return rename_directory(old_dir, old_dentry, new_dir, new_dentry);
-+ return rename_nondir(old_dir, old_dentry, new_dir, new_dentry);
-+
-+}
-+
-+int rename_directory(inode_t *old_dir, dentry_t *old_dentry,
-+ inode_t *new_dir, dentry_t *new_dentry)
-+{
-+ int err, bpath_len;
-+ char *bpath;
-+
-+ dentry_t *hidden_old_dentry;
-+ dentry_t *hidden_new_dentry;
-+ dentry_t *hidden_old_dir_dentry;
-+ dentry_t *hidden_new_dir_dentry;
-+
-+ err = 0;
-+ bpath = NULL;
-+ bpath_len = 0;
-+
-+ /* this is a test, chuck out if it works */
-+ if(!(dtopd(new_dentry)->state == DELETED ||
-+ dtopd(new_dentry)->state == NON_EXISTANT)) {
-+ printk(KERN_CRIT "mini_fo: rename_directory: \
-+ uh, ah, new_dentry not negative.\n");
-+ /* return -1; */
-+ }
-+
-+ /* state = UNMODIFIED */
-+ if(dtopd(old_dentry)->state == UNMODIFIED) {
-+ err = dir_unmod_to_mod(old_dentry);
-+ if (err)
-+ goto out;
-+ }
-+
-+ /* state = MODIFIED */
-+ if(dtopd(old_dentry)->state == MODIFIED) {
-+ bpath = meta_check_r_entry(old_dentry->d_parent,
-+ old_dentry->d_name.name,
-+ old_dentry->d_name.len);
-+ if(bpath) {
-+ err = meta_remove_r_entry(old_dentry->d_parent,
-+ old_dentry->d_name.name,
-+ old_dentry->d_name.len);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: rename_directory:\
-+ meta_remove_r_entry \
-+ failed.\n");
-+ goto out;
-+ }
-+ err = meta_add_r_entry(new_dentry->d_parent,
-+ bpath,
-+ strlen(bpath),
-+ new_dentry->d_name.name,
-+ new_dentry->d_name.len);
-+ kfree(bpath);
-+ }
-+ else {/* wol it */
-+ err = meta_add_d_entry(old_dentry->d_parent,
-+ old_dentry->d_name.name,
-+ old_dentry->d_name.len);
-+ if (err)
-+ goto out;
-+ /* put it on rename list */
-+ err = get_mini_fo_bpath(old_dentry,
-+ &bpath,
-+ &bpath_len);
-+ if (err)
-+ goto out;
-+ err = meta_add_r_entry(new_dentry->d_parent,
-+ bpath, bpath_len,
-+ new_dentry->d_name.name,
-+ new_dentry->d_name.len);
-+ if (err)
-+ goto out;
-+ }
-+ /* no state change, MODIFIED stays MODIFIED */
-+ }
-+ /* state = CREATED */
-+ if(dtopd(old_dentry)->state == CREATED ||
-+ dtopd(old_dentry)->state == DEL_REWRITTEN) {
-+ if(dtohd(old_dentry))
-+ dput(dtohd(old_dentry));
-+
-+ if(dtopd(new_dentry)->state == DELETED) {
-+ dtopd(old_dentry)->state = DEL_REWRITTEN;
-+ dtohd(old_dentry) = NULL;
-+ }
-+ else if(dtopd(new_dentry)->state == NON_EXISTANT) {
-+ dtopd(old_dentry)->state = CREATED;
-+ /* steal new dentry's neg. base dentry */
-+ dtohd(old_dentry) = dtohd(new_dentry);
-+ dtohd(new_dentry) = NULL;
-+ }
-+ }
-+ if(dtopd(new_dentry)->state == UNMODIFIED ||
-+ dtopd(new_dentry)->state == NON_EXISTANT) {
-+ err = get_neg_sto_dentry(new_dentry);
-+ if(err)
-+ goto out;
-+ }
-+
-+ /* now move sto file */
-+ hidden_old_dentry = dtohd2(old_dentry);
-+ hidden_new_dentry = dtohd2(new_dentry);
-+
-+ dget(hidden_old_dentry);
-+ dget(hidden_new_dentry);
-+
-+ hidden_old_dir_dentry = dget(hidden_old_dentry->d_parent);
-+ hidden_new_dir_dentry = dget(hidden_new_dentry->d_parent);
-+ double_lock(hidden_old_dir_dentry, hidden_new_dir_dentry);
-+
-+ err = vfs_rename(hidden_old_dir_dentry->d_inode, hidden_old_dentry,
-+ hidden_new_dir_dentry->d_inode, hidden_new_dentry);
-+ if(err)
-+ goto out_lock;
-+
-+ fist_copy_attr_all(new_dir, hidden_new_dir_dentry->d_inode);
-+ if (new_dir != old_dir)
-+ fist_copy_attr_all(old_dir,
-+ hidden_old_dir_dentry->d_inode);
-+
-+ out_lock:
-+ /* double_unlock will dput the new/old parent dentries
-+ * whose refcnts were incremented via get_parent above. */
-+ double_unlock(hidden_old_dir_dentry, hidden_new_dir_dentry);
-+ dput(hidden_new_dentry);
-+ dput(hidden_old_dentry);
-+
-+ out:
-+ return err;
-+}
-+
-+int rename_nondir(inode_t *old_dir, dentry_t *old_dentry,
-+ inode_t *new_dir, dentry_t *new_dentry)
-+{
-+ int err=0;
-+
-+ check_mini_fo_dentry(old_dentry);
-+ check_mini_fo_dentry(new_dentry);
-+ check_mini_fo_inode(old_dir);
-+ check_mini_fo_inode(new_dir);
-+
-+ /* state: UNMODIFIED */
-+ if(dtost(old_dentry) == UNMODIFIED) {
-+ err = nondir_unmod_to_mod(old_dentry, 1);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ }
-+
-+ /* the easy states */
-+ if(exists_in_storage(old_dentry)) {
-+
-+ dentry_t *hidden_old_dentry;
-+ dentry_t *hidden_new_dentry;
-+ dentry_t *hidden_old_dir_dentry;
-+ dentry_t *hidden_new_dir_dentry;
-+
-+ /* if old file is MODIFIED, add it to the deleted_list */
-+ if(dtopd(old_dentry)->state == MODIFIED) {
-+ meta_add_d_entry(old_dentry->d_parent,
-+ old_dentry->d_name.name,
-+ old_dentry->d_name.len);
-+
-+ dput(dtohd(old_dentry));
-+ }
-+ /* if old file is CREATED, we only release the base dentry */
-+ if(dtopd(old_dentry)->state == CREATED) {
-+ if(dtohd(old_dentry))
-+ dput(dtohd(old_dentry));
-+ }
-+
-+ /* now setup the new states (depends on new_dentry state) */
-+ /* new dentry state = MODIFIED */
-+ if(dtopd(new_dentry)->state == MODIFIED) {
-+ meta_add_d_entry(new_dentry->d_parent,
-+ new_dentry->d_name.name,
-+ new_dentry->d_name.len);
-+
-+ /* new dentry will be d_put'ed later by the vfs
-+ * so don't do it here
-+ * dput(dtohd(new_dentry));
-+ */
-+ dtohd(old_dentry) = NULL;
-+ dtopd(old_dentry)->state = DEL_REWRITTEN;
-+ }
-+ /* new dentry state = UNMODIFIED */
-+ else if(dtopd(new_dentry)->state == UNMODIFIED) {
-+ if(get_neg_sto_dentry(new_dentry))
-+ return -EINVAL;
-+
-+ meta_add_d_entry(new_dentry->d_parent,
-+ new_dentry->d_name.name,
-+ new_dentry->d_name.len);
-+
-+ /* is this right??? */
-+ /*dput(dtohd(new_dentry));*/
-+ dtohd(old_dentry) = NULL;
-+ dtopd(old_dentry)->state = DEL_REWRITTEN;
-+ }
-+ /* new dentry state = CREATED */
-+ else if(dtopd(new_dentry)->state == CREATED) {
-+ /* we keep the neg. base dentry (if exists) */
-+ dtohd(old_dentry) = dtohd(new_dentry);
-+ /* ...and set it to Null, or we'll get
-+ * dcache.c:345 if it gets dput twice... */
-+ dtohd(new_dentry) = NULL;
-+ dtopd(old_dentry)->state = CREATED;
-+ }
-+ /* new dentry state = NON_EXISTANT */
-+ else if(dtopd(new_dentry)->state == NON_EXISTANT) {
-+ if(get_neg_sto_dentry(new_dentry))
-+ return -EINVAL;
-+
-+ /* we keep the neg. base dentry (if exists) */
-+ dtohd(old_dentry) = dtohd(new_dentry);
-+ /* ...and set it to Null, or we'll get
-+ * Dr. dcache.c:345 if it gets dput twice... */
-+ dtohd(new_dentry) = NULL;
-+ dtopd(old_dentry)->state = CREATED;
-+ }
-+ /* new dentry state = DEL_REWRITTEN or DELETED */
-+ else if(dtopd(new_dentry)->state == DEL_REWRITTEN ||
-+ dtopd(new_dentry)->state == DELETED) {
-+ dtohd(old_dentry) = NULL;
-+ dtopd(old_dentry)->state = DEL_REWRITTEN;
-+ }
-+ else { /* not possible, uhh, ahh */
-+ printk(KERN_CRIT
-+ "mini_fo: rename_reg_file: invalid state detected [1].\n");
-+ return -1;
-+ }
-+
-+ /* now we definitely have a sto file */
-+ hidden_old_dentry = dtohd2(old_dentry);
-+ hidden_new_dentry = dtohd2(new_dentry);
-+
-+ dget(hidden_old_dentry);
-+ dget(hidden_new_dentry);
-+
-+ hidden_old_dir_dentry = dget(hidden_old_dentry->d_parent);
-+ hidden_new_dir_dentry = dget(hidden_new_dentry->d_parent);
-+ double_lock(hidden_old_dir_dentry, hidden_new_dir_dentry);
-+
-+ err = vfs_rename(hidden_old_dir_dentry->d_inode,
-+ hidden_old_dentry,
-+ hidden_new_dir_dentry->d_inode,
-+ hidden_new_dentry);
-+ if(err)
-+ goto out_lock;
-+
-+ fist_copy_attr_all(new_dir, hidden_new_dir_dentry->d_inode);
-+ if (new_dir != old_dir)
-+ fist_copy_attr_all(old_dir, hidden_old_dir_dentry->d_inode);
-+
-+ out_lock:
-+ /* double_unlock will dput the new/old parent dentries
-+ * whose refcnts were incremented via get_parent above.
-+ */
-+ double_unlock(hidden_old_dir_dentry, hidden_new_dir_dentry);
-+ dput(hidden_new_dentry);
-+ dput(hidden_old_dentry);
-+ out:
-+ return err;
-+ }
-+ else { /* invalid state */
-+ printk(KERN_CRIT "mini_fo: rename_reg_file: ERROR: invalid state detected [2].\n");
-+ return -1;
-+ }
-+}
-+
-+
-+STATIC int
-+mini_fo_readlink(dentry_t *dentry, char *buf, int bufsiz)
-+{
-+ int err=0;
-+ dentry_t *hidden_dentry = NULL;
-+
-+ if(dtohd2(dentry) && dtohd2(dentry)->d_inode) {
-+ hidden_dentry = dtohd2(dentry);
-+ } else if(dtohd(dentry) && dtohd(dentry)->d_inode) {
-+ hidden_dentry = dtohd(dentry);
-+ } else {
-+ goto out;
-+ }
-+
-+ if (!hidden_dentry->d_inode->i_op ||
-+ !hidden_dentry->d_inode->i_op->readlink) {
-+ err = -EINVAL; goto out;
-+ }
-+
-+ err = hidden_dentry->d_inode->i_op->readlink(hidden_dentry,
-+ buf,
-+ bufsiz);
-+ if (err > 0)
-+ fist_copy_attr_atime(dentry->d_inode, hidden_dentry->d_inode);
-+
-+ out:
-+ return err;
-+}
-+
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
-+static int mini_fo_follow_link(dentry_t *dentry, struct nameidata *nd)
-+#else
-+static void* mini_fo_follow_link(dentry_t *dentry, struct nameidata *nd)
-+#endif
-+{
-+ char *buf;
-+ int len = PAGE_SIZE, err;
-+ mm_segment_t old_fs;
-+
-+ /* in 2.6 this is freed by mini_fo_put_link called by __do_follow_link */
-+ buf = kmalloc(len, GFP_KERNEL);
-+ if (!buf) {
-+ err = -ENOMEM;
-+ goto out;
-+ }
-+
-+ /* read the symlink, and then we will follow it */
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+ err = dentry->d_inode->i_op->readlink(dentry, buf, len);
-+ set_fs(old_fs);
-+ if (err < 0) {
-+ kfree(buf);
-+ buf = NULL;
-+ goto out;
-+ }
-+ buf[err] = 0;
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ nd_set_link(nd, buf);
-+ err = 0;
-+#else
-+ err = vfs_follow_link(nd, buf);
-+#endif
-+
-+ out:
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ kfree(buf);
-+#endif
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
-+ return err;
-+#else
-+ return ERR_PTR(err);
-+#endif
-+}
-+
-+STATIC
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
-+void mini_fo_put_link(struct dentry *dentry, struct nameidata *nd)
-+#else
-+void mini_fo_put_link(struct dentry *dentry, struct nameidata *nd, void *cookie)
-+#endif
-+{
-+ char *link;
-+ link = nd_get_link(nd);
-+ kfree(link);
-+}
-+#endif
-+
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_permission(inode_t *inode, int mask, struct nameidata *nd)
-+#else
-+mini_fo_permission(inode_t *inode, int mask)
-+#endif
-+{
-+ inode_t *hidden_inode;
-+ int mode;
-+ int err;
-+
-+ if(itohi2(inode)) {
-+ hidden_inode = itohi2(inode);
-+ } else {
-+ hidden_inode = itohi(inode);
-+ }
-+ mode = inode->i_mode;
-+
-+ /* not really needed, as permission handles everything:
-+ * err = vfs_permission(inode, mask);
-+ * if (err)
-+ * goto out;
-+ */
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err = permission(hidden_inode, mask, nd);
-+#else
-+ err = permission(hidden_inode, mask);
-+#endif
-+
-+ /* out: */
-+ return err;
-+}
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+STATIC int
-+mini_fo_inode_revalidate(dentry_t *dentry)
-+{
-+ int err = 0;
-+ dentry_t *hidden_dentry;
-+ inode_t *hidden_inode;
-+
-+ ASSERT(dentry->d_inode);
-+ ASSERT(itopd(dentry->d_inode));
-+
-+ if(itohi2(dentry->d_inode)) {
-+ hidden_dentry = dtohd2(dentry);
-+ hidden_inode = hidden_dentry->d_inode;
-+ } else if(itohi(dentry->d_inode)) {
-+ hidden_dentry = dtohd(dentry);
-+ hidden_inode = hidden_dentry->d_inode;
-+ } else {
-+ printk(KERN_CRIT "mini_fo_inode_revalidate: ERROR, invalid state detected.\n");
-+ err = -ENOENT;
-+ goto out;
-+ }
-+ if (hidden_inode && hidden_inode->i_op && hidden_inode->i_op->revalidate){
-+ err = hidden_inode->i_op->revalidate(hidden_dentry);
-+ if (err)
-+ goto out;
-+ }
-+ fist_copy_attr_all(dentry->d_inode, hidden_inode);
-+ out:
-+ return err;
-+}
-+#endif
-+
-+STATIC int
-+mini_fo_setattr(dentry_t *dentry, struct iattr *ia)
-+{
-+ int err = 0;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(!is_mini_fo_existant(dentry)) {
-+ printk(KERN_CRIT "mini_fo_setattr: ERROR, invalid state detected [1].\n");
-+ goto out;
-+ }
-+
-+ if(dtost(dentry) == UNMODIFIED) {
-+ if(!IS_COPY_FLAG(ia->ia_valid))
-+ goto out; /* we ignore these changes to base */
-+
-+ if(S_ISDIR(dentry->d_inode->i_mode)) {
-+ err = dir_unmod_to_mod(dentry);
-+ } else {
-+ /* we copy contents if file is not beeing truncated */
-+ if(S_ISREG(dentry->d_inode->i_mode) &&
-+ !(ia->ia_size == 0 && (ia->ia_valid & ATTR_SIZE))) {
-+ err = nondir_unmod_to_mod(dentry, 1);
-+ } else
-+ err = nondir_unmod_to_mod(dentry, 0);
-+ }
-+ if(err) {
-+ err = -EINVAL;
-+ printk(KERN_CRIT "mini_fo_setattr: ERROR changing states.\n");
-+ goto out;
-+ }
-+ }
-+ if(!exists_in_storage(dentry)) {
-+ printk(KERN_CRIT "mini_fo_setattr: ERROR, invalid state detected [2].\n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ ASSERT(dentry->d_inode);
-+ ASSERT(dtohd2(dentry));
-+ ASSERT(itopd(dentry->d_inode));
-+ ASSERT(itohi2(dentry->d_inode));
-+
-+ err = notify_change(dtohd2(dentry), ia);
-+ fist_copy_attr_all(dentry->d_inode, itohi2(dentry->d_inode));
-+ out:
-+ return err;
-+}
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+STATIC int
-+mini_fo_getattr(struct vfsmount *mnt, struct dentry *dentry, struct kstat *stat)
-+{
-+ int err = 0;
-+ dentry_t *hidden_dentry;
-+
-+ ASSERT(dentry->d_inode);
-+ ASSERT(itopd(dentry->d_inode));
-+
-+ if(itohi2(dentry->d_inode)) {
-+ hidden_dentry = dtohd2(dentry);
-+ } else if(itohi(dentry->d_inode)) {
-+ hidden_dentry = dtohd(dentry);
-+ } else {
-+ printk(KERN_CRIT "mini_fo_getattr: ERROR, invalid state detected.\n");
-+ err = -ENOENT;
-+ goto out;
-+ }
-+ fist_copy_attr_all(dentry->d_inode, hidden_dentry->d_inode);
-+
-+ ASSERT(hidden_dentry);
-+ ASSERT(hidden_dentry->d_inode);
-+ ASSERT(hidden_dentry->d_inode->i_op);
-+
-+ generic_fillattr(dentry->d_inode, stat);
-+ if (!stat->blksize) {
-+ struct super_block *s = hidden_dentry->d_inode->i_sb;
-+ unsigned blocks;
-+ blocks = (stat->size+s->s_blocksize-1) >> s->s_blocksize_bits;
-+ stat->blocks = (s->s_blocksize / 512) * blocks;
-+ stat->blksize = s->s_blocksize;
-+ }
-+ out:
-+ return err;
-+}
-+#endif
-+
-+#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
-+#if 0 /* no xattr_alloc() and xattr_free() */
-+/* This is lifted from fs/xattr.c */
-+static void *
-+xattr_alloc(size_t size, size_t limit)
-+{
-+ void *ptr;
-+
-+ if (size > limit)
-+ return ERR_PTR(-E2BIG);
-+
-+ if (!size) /* size request, no buffer is needed */
-+ return NULL;
-+ else if (size <= PAGE_SIZE)
-+ ptr = kmalloc((unsigned long) size, GFP_KERNEL);
-+ else
-+ ptr = vmalloc((unsigned long) size);
-+ if (!ptr)
-+ return ERR_PTR(-ENOMEM);
-+ return ptr;
-+}
-+
-+static void
-+xattr_free(void *ptr, size_t size)
-+{
-+ if (!size) /* size request, no buffer was needed */
-+ return;
-+ else if (size <= PAGE_SIZE)
-+ kfree(ptr);
-+ else
-+ vfree(ptr);
-+}
-+#endif /* no xattr_alloc() and xattr_free() */
-+
-+/* BKL held by caller.
-+ * dentry->d_inode->i_sem down
-+ */
-+STATIC int
-+mini_fo_getxattr(struct dentry *dentry, const char *name, void *value, size_t size) {
-+ struct dentry *hidden_dentry = NULL;
-+ int err = -EOPNOTSUPP;
-+ /* Define these anyway so we don't need as much ifdef'ed code. */
-+ char *encoded_name = NULL;
-+ char *encoded_value = NULL;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(exists_in_storage(dentry))
-+ hidden_dentry = dtohd2(dentry);
-+ else
-+ hidden_dentry = dtohd(dentry);
-+
-+ ASSERT(hidden_dentry);
-+ ASSERT(hidden_dentry->d_inode);
-+ ASSERT(hidden_dentry->d_inode->i_op);
-+
-+ if (hidden_dentry->d_inode->i_op->getxattr) {
-+ encoded_name = (char *)name;
-+ encoded_value = (char *)value;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ /* lock_kernel() already done by caller. */
-+ err = hidden_dentry->d_inode->i_op->getxattr(hidden_dentry, encoded_name, encoded_value, size);
-+ /* unlock_kernel() will be done by caller. */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ return err;
-+}
-+
-+/* BKL held by caller.
-+ * dentry->d_inode->i_sem down
-+ */
-+STATIC int
-+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,21) \
-+ && LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,23)) \
-+ || LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
-+mini_fo_setxattr(struct dentry *dentry, const char *name,
-+ const void *value, size_t size, int flags)
-+#else
-+mini_fo_setxattr(struct dentry *dentry, const char *name,
-+ void *value, size_t size, int flags)
-+#endif
-+
-+{
-+ struct dentry *hidden_dentry = NULL;
-+ int err = -EOPNOTSUPP;
-+
-+ /* Define these anyway, so we don't have as much ifdef'ed code. */
-+ char *encoded_value = NULL;
-+ char *encoded_name = NULL;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(exists_in_storage(dentry))
-+ hidden_dentry = dtohd2(dentry);
-+ else
-+ hidden_dentry = dtohd(dentry);
-+
-+ ASSERT(hidden_dentry);
-+ ASSERT(hidden_dentry->d_inode);
-+ ASSERT(hidden_dentry->d_inode->i_op);
-+
-+ if (hidden_dentry->d_inode->i_op->setxattr) {
-+ encoded_name = (char *)name;
-+ encoded_value = (char *)value;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ /* lock_kernel() already done by caller. */
-+ err = hidden_dentry->d_inode->i_op->setxattr(hidden_dentry, encoded_name, encoded_value, size, flags);
-+ /* unlock_kernel() will be done by caller. */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ return err;
-+}
-+
-+/* BKL held by caller.
-+ * dentry->d_inode->i_sem down
-+ */
-+STATIC int
-+mini_fo_removexattr(struct dentry *dentry, const char *name) {
-+ struct dentry *hidden_dentry = NULL;
-+ int err = -EOPNOTSUPP;
-+ char *encoded_name;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(exists_in_storage(dentry))
-+ hidden_dentry = dtohd2(dentry);
-+ else
-+ hidden_dentry = dtohd(dentry);
-+
-+ ASSERT(hidden_dentry);
-+ ASSERT(hidden_dentry->d_inode);
-+ ASSERT(hidden_dentry->d_inode->i_op);
-+
-+ if (hidden_dentry->d_inode->i_op->removexattr) {
-+ encoded_name = (char *)name;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ /* lock_kernel() already done by caller. */
-+ err = hidden_dentry->d_inode->i_op->removexattr(hidden_dentry, encoded_name);
-+ /* unlock_kernel() will be done by caller. */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ return err;
-+}
-+
-+/* BKL held by caller.
-+ * dentry->d_inode->i_sem down
-+ */
-+STATIC int
-+mini_fo_listxattr(struct dentry *dentry, char *list, size_t size) {
-+ struct dentry *hidden_dentry = NULL;
-+ int err = -EOPNOTSUPP;
-+ char *encoded_list = NULL;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(exists_in_storage(dentry))
-+ hidden_dentry = dtohd2(dentry);
-+ else
-+ hidden_dentry = dtohd(dentry);
-+
-+ ASSERT(hidden_dentry);
-+ ASSERT(hidden_dentry->d_inode);
-+ ASSERT(hidden_dentry->d_inode->i_op);
-+
-+ if (hidden_dentry->d_inode->i_op->listxattr) {
-+ encoded_list = list;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ /* lock_kernel() already done by caller. */
-+ err = hidden_dentry->d_inode->i_op->listxattr(hidden_dentry, encoded_list, size);
-+ /* unlock_kernel() will be done by caller. */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_dentry->d_inode->i_sem);
-+#endif
-+ }
-+ return err;
-+}
-+# endif /* defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)) */
-+
-+struct inode_operations mini_fo_symlink_iops =
-+ {
-+ readlink: mini_fo_readlink,
-+ follow_link: mini_fo_follow_link,
-+ /* mk: permission: mini_fo_permission, */
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ revalidate: mini_fo_inode_revalidate,
-+#endif
-+ setattr: mini_fo_setattr,
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ getattr: mini_fo_getattr,
-+ put_link: mini_fo_put_link,
-+#endif
-+
-+#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
-+ setxattr: mini_fo_setxattr,
-+ getxattr: mini_fo_getxattr,
-+ listxattr: mini_fo_listxattr,
-+ removexattr: mini_fo_removexattr
-+# endif /* defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)) */
-+ };
-+
-+struct inode_operations mini_fo_dir_iops =
-+ {
-+ create: mini_fo_create,
-+ lookup: mini_fo_lookup,
-+ link: mini_fo_link,
-+ unlink: mini_fo_unlink,
-+ symlink: mini_fo_symlink,
-+ mkdir: mini_fo_mkdir,
-+ rmdir: mini_fo_rmdir,
-+ mknod: mini_fo_mknod,
-+ rename: mini_fo_rename,
-+ /* no readlink/follow_link for non-symlinks */
-+ // off because we have setattr
-+ // truncate: mini_fo_truncate,
-+ /* mk:permission: mini_fo_permission, */
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ revalidate: mini_fo_inode_revalidate,
-+#endif
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ getattr: mini_fo_getattr,
-+#endif
-+ setattr: mini_fo_setattr,
-+#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
-+ setxattr: mini_fo_setxattr,
-+ getxattr: mini_fo_getxattr,
-+ listxattr: mini_fo_listxattr,
-+ removexattr: mini_fo_removexattr
-+# endif /* XATTR && LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) */
-+ };
-+
-+struct inode_operations mini_fo_main_iops =
-+ {
-+ /* permission: mini_fo_permission, */
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ revalidate: mini_fo_inode_revalidate,
-+#endif
-+ setattr: mini_fo_setattr,
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ getattr: mini_fo_getattr,
-+#endif
-+#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
-+ setxattr: mini_fo_setxattr,
-+ getxattr: mini_fo_getxattr,
-+ listxattr: mini_fo_listxattr,
-+ removexattr: mini_fo_removexattr
-+# endif /* XATTR && LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) */
-+ };
-diff -urN linux-2.6.19.old/fs/mini_fo/main.c linux-2.6.19.dev/fs/mini_fo/main.c
---- linux-2.6.19.old/fs/mini_fo/main.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/main.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,423 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+#include <linux/module.h>
-+
-+/* This definition must only appear after we include <linux/module.h> */
-+#ifndef MODULE_LICENSE
-+# define MODULE_LICENSE(bison)
-+#endif /* not MODULE_LICENSE */
-+
-+/*
-+ * This is the mini_fo tri interpose function, which extends the
-+ * functionality of the regular interpose by interposing a higher
-+ * level inode on top of two lower level ones: the base filesystem
-+ * inode and the storage filesystem inode.
-+ *
-+ * sb we pass is mini_fo's super_block
-+ */
-+int
-+mini_fo_tri_interpose(dentry_t *hidden_dentry,
-+ dentry_t *hidden_sto_dentry,
-+ dentry_t *dentry, super_block_t *sb, int flag)
-+{
-+ inode_t *hidden_inode = NULL;
-+ inode_t *hidden_sto_inode = NULL; /* store corresponding storage inode */
-+ int err = 0;
-+ inode_t *inode;
-+
-+ /* Pointer to hidden_sto_inode if exists, else to hidden_inode.
-+ * This is used to copy the attributes of the correct inode. */
-+ inode_t *master_inode;
-+
-+ if(hidden_dentry)
-+ hidden_inode = hidden_dentry->d_inode;
-+ if(hidden_sto_dentry)
-+ hidden_sto_inode = hidden_sto_dentry->d_inode;
-+
-+ ASSERT(dentry->d_inode == NULL);
-+
-+ /* mk: One of the inodes associated with the dentrys is likely to
-+ * be NULL, so carefull:
-+ */
-+ ASSERT((hidden_inode != NULL) || (hidden_sto_inode != NULL));
-+
-+ if(hidden_sto_inode)
-+ master_inode = hidden_sto_inode;
-+ else
-+ master_inode = hidden_inode;
-+
-+ /*
-+ * We allocate our new inode below, by calling iget.
-+ * iget will call our read_inode which will initialize some
-+ * of the new inode's fields
-+ */
-+
-+ /*
-+ * original: inode = iget(sb, hidden_inode->i_ino);
-+ */
-+ inode = iget(sb, iunique(sb, 25));
-+ if (!inode) {
-+ err = -EACCES; /* should be impossible??? */
-+ goto out;
-+ }
-+
-+ /*
-+ * interpose the inode if not already interposed
-+ * this is possible if the inode is being reused
-+ * XXX: what happens if we get_empty_inode() but there's another already?
-+ * for now, ASSERT() that this can't happen; fix later.
-+ */
-+ if (itohi(inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo_tri_interpose: itohi(inode) != NULL.\n");
-+ }
-+ if (itohi2(inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo_tri_interpose: itohi2(inode) != NULL.\n");
-+ }
-+
-+ /* mk: Carefull, igrab can't handle NULL inodes (ok, why should it?), so
-+ * we need to check here:
-+ */
-+ if(hidden_inode)
-+ itohi(inode) = igrab(hidden_inode);
-+ else
-+ itohi(inode) = NULL;
-+
-+ if(hidden_sto_inode)
-+ itohi2(inode) = igrab(hidden_sto_inode);
-+ else
-+ itohi2(inode) = NULL;
-+
-+
-+ /* Use different set of inode ops for symlinks & directories*/
-+ if (S_ISLNK(master_inode->i_mode))
-+ inode->i_op = &mini_fo_symlink_iops;
-+ else if (S_ISDIR(master_inode->i_mode))
-+ inode->i_op = &mini_fo_dir_iops;
-+
-+ /* Use different set of file ops for directories */
-+ if (S_ISDIR(master_inode->i_mode))
-+ inode->i_fop = &mini_fo_dir_fops;
-+
-+ /* properly initialize special inodes */
-+ if (S_ISBLK(master_inode->i_mode) || S_ISCHR(master_inode->i_mode) ||
-+ S_ISFIFO(master_inode->i_mode) || S_ISSOCK(master_inode->i_mode)) {
-+ init_special_inode(inode, master_inode->i_mode, master_inode->i_rdev);
-+ }
-+
-+ /* Fix our inode's address operations to that of the lower inode */
-+ if (inode->i_mapping->a_ops != master_inode->i_mapping->a_ops) {
-+ inode->i_mapping->a_ops = master_inode->i_mapping->a_ops;
-+ }
-+
-+ /* only (our) lookup wants to do a d_add */
-+ if (flag)
-+ d_add(dentry, inode);
-+ else
-+ d_instantiate(dentry, inode);
-+
-+ ASSERT(dtopd(dentry) != NULL);
-+
-+ /* all well, copy inode attributes */
-+ fist_copy_attr_all(inode, master_inode);
-+
-+ out:
-+ return err;
-+}
-+
-+/* parse mount options "base=" and "sto=" */
-+dentry_t *
-+mini_fo_parse_options(super_block_t *sb, char *options)
-+{
-+ dentry_t *hidden_root = ERR_PTR(-EINVAL);
-+ dentry_t *hidden_root2 = ERR_PTR(-EINVAL);
-+ struct nameidata nd, nd2;
-+ char *name, *tmp, *end;
-+ int err = 0;
-+
-+ /* We don't want to go off the end of our arguments later on. */
-+ for (end = options; *end; end++);
-+
-+ while (options < end) {
-+ tmp = options;
-+ while (*tmp && *tmp != ',')
-+ tmp++;
-+ *tmp = '\0';
-+ if (!strncmp("base=", options, 5)) {
-+ name = options + 5;
-+ printk(KERN_INFO "mini_fo: using base directory: %s\n", name);
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ if (path_init(name, LOOKUP_FOLLOW, &nd))
-+ err = path_walk(name, &nd);
-+#else
-+ err = path_lookup(name, LOOKUP_FOLLOW, &nd);
-+#endif
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo: error accessing hidden directory '%s'\n", name);
-+ hidden_root = ERR_PTR(err);
-+ goto out;
-+ }
-+ hidden_root = nd.dentry;
-+ stopd(sb)->base_dir_dentry = nd.dentry;
-+ stopd(sb)->hidden_mnt = nd.mnt;
-+
-+ } else if(!strncmp("sto=", options, 4)) {
-+ /* parse the storage dir */
-+ name = options + 4;
-+ printk(KERN_INFO "mini_fo: using storage directory: %s\n", name);
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ if(path_init(name, LOOKUP_FOLLOW, &nd2))
-+ err = path_walk(name, &nd2);
-+#else
-+ err = path_lookup(name, LOOKUP_FOLLOW, &nd2);
-+#endif
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: error accessing hidden storage directory '%s'\n", name);
-+
-+ hidden_root2 = ERR_PTR(err);
-+ goto out;
-+ }
-+ hidden_root2 = nd2.dentry;
-+ stopd(sb)->storage_dir_dentry = nd2.dentry;
-+ stopd(sb)->hidden_mnt2 = nd2.mnt;
-+ stohs2(sb) = hidden_root2->d_sb;
-+
-+ /* validate storage dir, this is done in
-+ * mini_fo_read_super for the base directory.
-+ */
-+ if (IS_ERR(hidden_root2)) {
-+ printk(KERN_WARNING "mini_fo_parse_options: storage dentry lookup failed (err = %ld)\n", PTR_ERR(hidden_root2));
-+ goto out;
-+ }
-+ if (!hidden_root2->d_inode) {
-+ printk(KERN_WARNING "mini_fo_parse_options: no storage dir to interpose on.\n");
-+ goto out;
-+ }
-+ stohs2(sb) = hidden_root2->d_sb;
-+ } else {
-+ printk(KERN_WARNING "mini_fo: unrecognized option '%s'\n", options);
-+ hidden_root = ERR_PTR(-EINVAL);
-+ goto out;
-+ }
-+ options = tmp + 1;
-+ }
-+
-+ out:
-+ if(IS_ERR(hidden_root2))
-+ return hidden_root2;
-+ return hidden_root;
-+}
-+
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+static int
-+#else
-+super_block_t *
-+#endif
-+mini_fo_read_super(super_block_t *sb, void *raw_data, int silent)
-+{
-+ dentry_t *hidden_root;
-+ int err = 0;
-+
-+ if (!raw_data) {
-+ printk(KERN_WARNING "mini_fo_read_super: missing argument\n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ /*
-+ * Allocate superblock private data
-+ */
-+ __stopd(sb) = kmalloc(sizeof(struct mini_fo_sb_info), GFP_KERNEL);
-+ if (!stopd(sb)) {
-+ printk(KERN_WARNING "%s: out of memory\n", __FUNCTION__);
-+ err = -ENOMEM;
-+ goto out;
-+ }
-+ stohs(sb) = NULL;
-+
-+ hidden_root = mini_fo_parse_options(sb, raw_data);
-+ if (IS_ERR(hidden_root)) {
-+ printk(KERN_WARNING "mini_fo_read_super: lookup_dentry failed (err = %ld)\n", PTR_ERR(hidden_root));
-+ err = PTR_ERR(hidden_root);
-+ goto out_free;
-+ }
-+ if (!hidden_root->d_inode) {
-+ printk(KERN_WARNING "mini_fo_read_super: no directory to interpose on\n");
-+ goto out_free;
-+ }
-+ stohs(sb) = hidden_root->d_sb;
-+
-+ /*
-+ * Linux 2.4.2-ac3 and beyond has code in
-+ * mm/filemap.c:generic_file_write() that requires sb->s_maxbytes
-+ * to be populated. If not set, all write()s under that sb will
-+ * return 0.
-+ *
-+ * Linux 2.4.4+ automatically sets s_maxbytes to MAX_NON_LFS;
-+ * the filesystem should override it only if it supports LFS.
-+ */
-+ /* non-SCA code is good to go with LFS */
-+ sb->s_maxbytes = hidden_root->d_sb->s_maxbytes;
-+
-+ sb->s_op = &mini_fo_sops;
-+ /*
-+ * we can't use d_alloc_root if we want to use
-+ * our own interpose function unchanged,
-+ * so we simply replicate *most* of the code in d_alloc_root here
-+ */
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ sb->s_root = d_alloc(NULL, &(const struct qstr) { "/", 1, 0 });
-+#else
-+ sb->s_root = d_alloc(NULL, &(const struct qstr){hash: 0, name: "/", len : 1});
-+#endif
-+ if (IS_ERR(sb->s_root)) {
-+ printk(KERN_WARNING "mini_fo_read_super: d_alloc failed\n");
-+ err = -ENOMEM;
-+ goto out_dput;
-+ }
-+
-+ sb->s_root->d_op = &mini_fo_dops;
-+ sb->s_root->d_sb = sb;
-+ sb->s_root->d_parent = sb->s_root;
-+
-+ /* link the upper and lower dentries */
-+ __dtopd(sb->s_root) = (struct mini_fo_dentry_info *)
-+ kmalloc(sizeof(struct mini_fo_dentry_info), GFP_KERNEL);
-+ if (!dtopd(sb->s_root)) {
-+ err = -ENOMEM;
-+ goto out_dput2;
-+ }
-+ dtopd(sb->s_root)->state = MODIFIED;
-+ dtohd(sb->s_root) = hidden_root;
-+
-+ /* fanout relevant, interpose on storage root dentry too */
-+ dtohd2(sb->s_root) = stopd(sb)->storage_dir_dentry;
-+
-+ /* ...and call tri-interpose to interpose root dir inodes
-+ * if (mini_fo_interpose(hidden_root, sb->s_root, sb, 0))
-+ */
-+ if(mini_fo_tri_interpose(hidden_root, dtohd2(sb->s_root), sb->s_root, sb, 0))
-+ goto out_dput2;
-+
-+ /* initalize the wol list */
-+ itopd(sb->s_root->d_inode)->deleted_list_size = -1;
-+ itopd(sb->s_root->d_inode)->renamed_list_size = -1;
-+ meta_build_lists(sb->s_root);
-+
-+ goto out;
-+
-+ out_dput2:
-+ dput(sb->s_root);
-+ out_dput:
-+ dput(hidden_root);
-+ dput(dtohd2(sb->s_root)); /* release the hidden_sto_dentry too */
-+ out_free:
-+ kfree(stopd(sb));
-+ __stopd(sb) = NULL;
-+ out:
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ return err;
-+#else
-+ if (err) {
-+ return ERR_PTR(err);
-+ } else {
-+ return sb;
-+ }
-+#endif
-+}
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+static int mini_fo_get_sb(struct file_system_type *fs_type,
-+ int flags, const char *dev_name,
-+ void *raw_data, struct vfsmount *mnt)
-+{
-+ return get_sb_nodev(fs_type, flags, raw_data, mini_fo_read_super, mnt);
-+}
-+#else
-+static struct super_block *mini_fo_get_sb(struct file_system_type *fs_type,
-+ int flags, const char *dev_name,
-+ void *raw_data)
-+{
-+ return get_sb_nodev(fs_type, flags, raw_data, mini_fo_read_super);
-+}
-+#endif
-+
-+void mini_fo_kill_block_super(struct super_block *sb)
-+{
-+ generic_shutdown_super(sb);
-+ /*
-+ * XXX: BUG: Halcrow: Things get unstable sometime after this point:
-+ * lib/rwsem-spinlock.c:127: spin_is_locked on uninitialized
-+ * fs/fs-writeback.c:402: spin_lock(fs/super.c:a0381828) already
-+ * locked by fs/fs-writeback.c/402
-+ *
-+ * Apparently, someone's not releasing a lock on sb_lock...
-+ */
-+}
-+
-+static struct file_system_type mini_fo_fs_type = {
-+ .owner = THIS_MODULE,
-+ .name = "mini_fo",
-+ .get_sb = mini_fo_get_sb,
-+ .kill_sb = mini_fo_kill_block_super,
-+ .fs_flags = 0,
-+};
-+
-+
-+#else
-+static DECLARE_FSTYPE(mini_fo_fs_type, "mini_fo", mini_fo_read_super, 0);
-+#endif
-+
-+static int __init init_mini_fo_fs(void)
-+{
-+ printk("Registering mini_fo version $Id$\n");
-+ return register_filesystem(&mini_fo_fs_type);
-+}
-+static void __exit exit_mini_fo_fs(void)
-+{
-+ printk("Unregistering mini_fo version $Id$\n");
-+ unregister_filesystem(&mini_fo_fs_type);
-+}
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+EXPORT_NO_SYMBOLS;
-+#endif
-+
-+MODULE_AUTHOR("Erez Zadok <ezk@cs.sunysb.edu>");
-+MODULE_DESCRIPTION("FiST-generated mini_fo filesystem");
-+MODULE_LICENSE("GPL");
-+
-+/* MODULE_PARM(fist_debug_var, "i"); */
-+/* MODULE_PARM_DESC(fist_debug_var, "Debug level"); */
-+
-+module_init(init_mini_fo_fs)
-+module_exit(exit_mini_fo_fs)
-diff -urN linux-2.6.19.old/fs/mini_fo/Makefile linux-2.6.19.dev/fs/mini_fo/Makefile
---- linux-2.6.19.old/fs/mini_fo/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/Makefile 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,17 @@
-+#
-+# Makefile for mini_fo 2.4 and 2.6 Linux kernels
-+#
-+# Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License
-+# as published by the Free Software Foundation; either version
-+# 2 of the License, or (at your option) any later version.
-+#
-+
-+obj-$(CONFIG_MINI_FO) := mini_fo.o
-+mini_fo-objs := meta.o dentry.o file.o inode.o main.o super.o state.o aux.o
-+
-+# dependencies
-+${mini_fo-objs}: mini_fo.h fist.h
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/meta.c linux-2.6.19.dev/fs/mini_fo/meta.c
---- linux-2.6.19.old/fs/mini_fo/meta.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/meta.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,1000 @@
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif /* HAVE_CONFIG_H */
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+int meta_build_lists(dentry_t *dentry)
-+{
-+ struct mini_fo_inode_info *inode_info;
-+
-+ dentry_t *meta_dentry = 0;
-+ file_t *meta_file = 0;
-+ mm_segment_t old_fs;
-+ void *buf;
-+
-+ int bytes, len;
-+ struct vfsmount *meta_mnt;
-+ char *entry;
-+
-+ inode_info = itopd(dentry->d_inode);
-+ if(!(inode_info->deleted_list_size == -1 &&
-+ inode_info->renamed_list_size == -1)) {
-+ printk(KERN_CRIT "mini_fo: meta_build_lists: \
-+ Error, list(s) not virgin.\n");
-+ return -1;
-+ }
-+
-+ /* init our meta lists */
-+ INIT_LIST_HEAD(&inode_info->deleted_list);
-+ inode_info->deleted_list_size = 0;
-+
-+ INIT_LIST_HEAD(&inode_info->renamed_list);
-+ inode_info->renamed_list_size = 0;
-+
-+ /* might there be a META-file? */
-+ if(dtohd2(dentry) && dtohd2(dentry)->d_inode) {
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ dtohd2(dentry),
-+ strlen(META_FILENAME));
-+ if(!meta_dentry->d_inode) {
-+ dput(meta_dentry);
-+ goto out_ok;
-+ }
-+ /* $%& err, is this correct? */
-+ meta_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt2;
-+ mntget(meta_mnt);
-+
-+
-+ /* open META-file for reading */
-+ meta_file = dentry_open(meta_dentry, meta_mnt, 0x0);
-+ if(!meta_file || IS_ERR(meta_file)) {
-+ printk(KERN_CRIT "mini_fo: meta_build_lists: \
-+ ERROR opening META file.\n");
-+ goto out_err;
-+ }
-+
-+ /* check if fs supports reading */
-+ if(!meta_file->f_op->read) {
-+ printk(KERN_CRIT "mini_fo: meta_build_lists: \
-+ ERROR, fs does not support reading.\n");
-+ goto out_err_close;
-+ }
-+
-+ /* allocate a page for transfering the data */
-+ buf = (void *) __get_free_page(GFP_KERNEL);
-+ if(!buf) {
-+ printk(KERN_CRIT "mini_fo: meta_build_lists: \
-+ ERROR, out of mem.\n");
-+ goto out_err_close;
-+ }
-+ meta_file->f_pos = 0;
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+ do {
-+ char *c;
-+ bytes = meta_file->f_op->read(meta_file, buf, PAGE_SIZE, &meta_file->f_pos);
-+ if(bytes == PAGE_SIZE) {
-+ /* trim a cut off filename and adjust f_pos to get it next time */
-+ for(c = (char*) buf+PAGE_SIZE;
-+ *c != '\n';
-+ c--, bytes--, meta_file->f_pos--);
-+ }
-+ entry = (char *) buf;
-+ while(entry < (char *) buf+bytes) {
-+
-+ char *old_path;
-+ char *dir_name;
-+ int old_len, new_len;
-+
-+ /* len without '\n'*/
-+ len = (int) (strchr(entry, '\n') - entry);
-+ switch (*entry) {
-+ case 'D':
-+ /* format: "D filename" */
-+ meta_list_add_d_entry(dentry,
-+ entry+2,
-+ len-2);
-+ break;
-+ case 'R':
-+ /* format: "R path/xy/dir newDir" */
-+ old_path = entry+2;
-+ dir_name = strchr(old_path, ' ') + 1;
-+ old_len = dir_name - old_path - 1;
-+ new_len = ((int) entry) + len - ((int ) dir_name);
-+ meta_list_add_r_entry(dentry,
-+ old_path,
-+ old_len,
-+ dir_name,
-+ new_len);
-+ break;
-+ default:
-+ /* unknown entry type detected */
-+ break;
-+ }
-+ entry += len+1;
-+ }
-+
-+ } while(meta_file->f_pos < meta_dentry->d_inode->i_size);
-+
-+ free_page((unsigned long) buf);
-+ set_fs(old_fs);
-+ fput(meta_file);
-+ }
-+ goto out_ok;
-+
-+ out_err_close:
-+ fput(meta_file);
-+ out_err:
-+ mntput(meta_mnt);
-+ dput(meta_dentry);
-+ return -1;
-+ out_ok:
-+ return 1; /* check this!!! inode_info->wol_size; */
-+}
-+
-+/* cleanups up all lists and free's the mem by dentry */
-+int meta_put_lists(dentry_t *dentry)
-+{
-+ if(!dentry || !dentry->d_inode) {
-+ printk("mini_fo: meta_put_lists: invalid dentry passed.\n");
-+ return -1;
-+ }
-+ return __meta_put_lists(dentry->d_inode);
-+}
-+
-+/* cleanups up all lists and free's the mem by inode */
-+int __meta_put_lists(inode_t *inode)
-+{
-+ int err = 0;
-+ if(!inode || !itopd(inode)) {
-+ printk("mini_fo: __meta_put_lists: invalid inode passed.\n");
-+ return -1;
-+ }
-+ err = __meta_put_d_list(inode);
-+ err |= __meta_put_r_list(inode);
-+ return err;
-+}
-+
-+int meta_sync_lists(dentry_t *dentry)
-+{
-+ int err = 0;
-+ if(!dentry || !dentry->d_inode) {
-+ printk("mini_fo: meta_sync_lists: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+ err = meta_sync_d_list(dentry, 0);
-+ err |= meta_sync_r_list(dentry, 1);
-+ return err;
-+}
-+
-+
-+/* remove all D entries from the renamed list and free the mem */
-+int __meta_put_d_list(inode_t *inode)
-+{
-+ struct list_head *tmp;
-+ struct deleted_entry *del_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!inode || !itopd(inode)) {
-+ printk(KERN_CRIT "mini_fo: __meta_put_d_list: \
-+ invalid inode passed.\n");
-+ return -1;
-+ }
-+ inode_info = itopd(inode);
-+
-+ /* nuke the DELETED-list */
-+ if(inode_info->deleted_list_size <= 0)
-+ return 0;
-+
-+ while(!list_empty(&inode_info->deleted_list)) {
-+ tmp = inode_info->deleted_list.next;
-+ list_del(tmp);
-+ del_entry = list_entry(tmp, struct deleted_entry, list);
-+ kfree(del_entry->name);
-+ kfree(del_entry);
-+ }
-+ inode_info->deleted_list_size = 0;
-+
-+ return 0;
-+}
-+
-+/* remove all R entries from the renamed list and free the mem */
-+int __meta_put_r_list(inode_t *inode)
-+{
-+ struct list_head *tmp;
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!inode || !itopd(inode)) {
-+ printk(KERN_CRIT "mini_fo: meta_put_r_list: invalid inode.\n");
-+ return -1;
-+ }
-+ inode_info = itopd(inode);
-+
-+ /* nuke the RENAMED-list */
-+ if(inode_info->renamed_list_size <= 0)
-+ return 0;
-+
-+ while(!list_empty(&inode_info->renamed_list)) {
-+ tmp = inode_info->renamed_list.next;
-+ list_del(tmp);
-+ ren_entry = list_entry(tmp, struct renamed_entry, list);
-+ kfree(ren_entry->new_name);
-+ kfree(ren_entry->old_name);
-+ kfree(ren_entry);
-+ }
-+ inode_info->renamed_list_size = 0;
-+
-+ return 0;
-+}
-+
-+int meta_add_d_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ int err = 0;
-+ err = meta_list_add_d_entry(dentry, name, len);
-+ err |= meta_write_d_entry(dentry,name,len);
-+ return err;
-+}
-+
-+/* add a D entry to the deleted list */
-+int meta_list_add_d_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ struct deleted_entry *del_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_list_add_d_entry: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+ inode_info = itopd(dentry->d_inode);
-+
-+ if(inode_info->deleted_list_size < 0)
-+ return -1;
-+
-+ del_entry = (struct deleted_entry *)
-+ kmalloc(sizeof(struct deleted_entry), GFP_KERNEL);
-+ del_entry->name = (char*) kmalloc(len, GFP_KERNEL);
-+ if(!del_entry || !del_entry->name) {
-+ printk(KERN_CRIT "mini_fo: meta_list_add_d_entry: \
-+ out of mem.\n");
-+ kfree(del_entry->name);
-+ kfree(del_entry);
-+ return -ENOMEM;
-+ }
-+
-+ strncpy(del_entry->name, name, len);
-+ del_entry->len = len;
-+
-+ list_add(&del_entry->list, &inode_info->deleted_list);
-+ inode_info->deleted_list_size++;
-+ return 0;
-+}
-+
-+int meta_add_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len)
-+{
-+ int err = 0;
-+ err = meta_list_add_r_entry(dentry,
-+ old_name, old_len,
-+ new_name, new_len);
-+ err |= meta_write_r_entry(dentry,
-+ old_name, old_len,
-+ new_name, new_len);
-+ return err;
-+}
-+
-+/* add a R entry to the renamed list */
-+int meta_list_add_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len)
-+{
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_list_add_r_entry: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+ inode_info = itopd(dentry->d_inode);
-+
-+ if(inode_info->renamed_list_size < 0)
-+ return -1;
-+
-+ ren_entry = (struct renamed_entry *)
-+ kmalloc(sizeof(struct renamed_entry), GFP_KERNEL);
-+ ren_entry->old_name = (char*) kmalloc(old_len, GFP_KERNEL);
-+ ren_entry->new_name = (char*) kmalloc(new_len, GFP_KERNEL);
-+
-+ if(!ren_entry || !ren_entry->old_name || !ren_entry->new_name) {
-+ printk(KERN_CRIT "mini_fo: meta_list_add_r_entry: \
-+ out of mem.\n");
-+ kfree(ren_entry->new_name);
-+ kfree(ren_entry->old_name);
-+ kfree(ren_entry);
-+ return -ENOMEM;
-+ }
-+
-+ strncpy(ren_entry->old_name, old_name, old_len);
-+ ren_entry->old_len = old_len;
-+ strncpy(ren_entry->new_name, new_name, new_len);
-+ ren_entry->new_len = new_len;
-+
-+ list_add(&ren_entry->list, &inode_info->renamed_list);
-+ inode_info->renamed_list_size++;
-+ return 0;
-+}
-+
-+
-+int meta_remove_r_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ int err = 0;
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT
-+ "mini_fo: meta_remove_r_entry: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+
-+ err = meta_list_remove_r_entry(dentry, name, len);
-+ err |= meta_sync_lists(dentry);
-+ return err;
-+}
-+
-+int meta_list_remove_r_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT
-+ "mini_fo: meta_list_remove_r_entry: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+ return __meta_list_remove_r_entry(dentry->d_inode, name, len);
-+}
-+
-+int __meta_list_remove_r_entry(inode_t *inode, const char *name, int len)
-+{
-+ struct list_head *tmp;
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!inode || !itopd(inode))
-+ printk(KERN_CRIT
-+ "mini_fo: __meta_list_remove_r_entry: \
-+ invalid inode passed.\n");
-+ inode_info = itopd(inode);
-+
-+ if(inode_info->renamed_list_size < 0)
-+ return -1;
-+ if(inode_info->renamed_list_size == 0)
-+ return 1;
-+
-+ list_for_each(tmp, &inode_info->renamed_list) {
-+ ren_entry = list_entry(tmp, struct renamed_entry, list);
-+ if(ren_entry->new_len != len)
-+ continue;
-+
-+ if(!strncmp(ren_entry->new_name, name, len)) {
-+ list_del(tmp);
-+ kfree(ren_entry->new_name);
-+ kfree(ren_entry->old_name);
-+ kfree(ren_entry);
-+ inode_info->renamed_list_size--;
-+ return 0;
-+ }
-+ }
-+ return 1;
-+}
-+
-+
-+/* append a single D entry to the meta file */
-+int meta_write_d_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ dentry_t *meta_dentry = 0;
-+ file_t *meta_file = 0;
-+ mm_segment_t old_fs;
-+
-+ int bytes, err;
-+ struct vfsmount *meta_mnt = 0;
-+ char *buf;
-+
-+ err = 0;
-+
-+ if(itopd(dentry->d_inode)->deleted_list_size < 0) {
-+ err = -1;
-+ goto out;
-+ }
-+
-+ if(dtopd(dentry)->state == UNMODIFIED) {
-+ err = build_sto_structure(dentry->d_parent, dentry);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
-+ build_sto_structure failed.\n");
-+ goto out;
-+ }
-+ }
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ dtohd2(dentry), strlen (META_FILENAME));
-+
-+ /* We need to create a META-file */
-+ if(!meta_dentry->d_inode) {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry,
-+ S_IRUSR | S_IWUSR,
-+ NULL);
-+#else
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry,
-+ S_IRUSR | S_IWUSR);
-+#endif
-+ }
-+ /* open META-file for writing */
-+ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
-+ if(!meta_file || IS_ERR(meta_file)) {
-+ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
-+ ERROR opening meta file.\n");
-+ mntput(meta_mnt); /* $%& is this necessary? */
-+ dput(meta_dentry);
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* check if fs supports writing */
-+ if(!meta_file->f_op->write) {
-+ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
-+ ERROR, fs does not support writing.\n");
-+ goto out_err_close;
-+ }
-+
-+ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+
-+ /* size: len for name, 1 for \n and 2 for "D " */
-+ buf = (char *) kmalloc(len+3, GFP_KERNEL);
-+ if (!buf) {
-+ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
-+ out of mem.\n");
-+ return -ENOMEM;
-+ }
-+
-+ buf[0] = 'D';
-+ buf[1] = ' ';
-+ strncpy(buf+2, name, len);
-+ buf[len+2] = '\n';
-+ bytes = meta_file->f_op->write(meta_file, buf, len+3,
-+ &meta_file->f_pos);
-+ if(bytes != len+3) {
-+ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
-+ ERROR writing.\n");
-+ err = -1;
-+ }
-+ kfree(buf);
-+ set_fs(old_fs);
-+
-+ out_err_close:
-+ fput(meta_file);
-+ out:
-+ return err;
-+}
-+
-+/* append a single R entry to the meta file */
-+int meta_write_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len)
-+{
-+ dentry_t *meta_dentry = 0;
-+ file_t *meta_file = 0;
-+ mm_segment_t old_fs;
-+
-+ int bytes, err, buf_len;
-+ struct vfsmount *meta_mnt = 0;
-+ char *buf;
-+
-+
-+ err = 0;
-+
-+ if(itopd(dentry->d_inode)->renamed_list_size < 0) {
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* build the storage structure? */
-+ if(dtopd(dentry)->state == UNMODIFIED) {
-+ err = build_sto_structure(dentry->d_parent, dentry);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
-+ build_sto_structure failed.\n");
-+ goto out;
-+ }
-+ }
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ dtohd2(dentry),
-+ strlen (META_FILENAME));
-+ if(!meta_dentry->d_inode) {
-+ /* We need to create a META-file */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR, NULL);
-+#else
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR);
-+#endif
-+ }
-+ /* open META-file for writing */
-+ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
-+ if(!meta_file || IS_ERR(meta_file)) {
-+ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
-+ ERROR opening meta file.\n");
-+ mntput(meta_mnt);
-+ dput(meta_dentry);
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* check if fs supports writing */
-+ if(!meta_file->f_op->write) {
-+ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
-+ ERROR, fs does not support writing.\n");
-+ goto out_err_close;
-+ }
-+
-+ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+
-+ /* size: 2 for "R ", old_len+new_len for names, 1 blank+1 \n */
-+ buf_len = old_len + new_len + 4;
-+ buf = (char *) kmalloc(buf_len, GFP_KERNEL);
-+ if (!buf) {
-+ printk(KERN_CRIT "mini_fo: meta_write_r_entry: out of mem.\n");
-+ return -ENOMEM;
-+ }
-+
-+ buf[0] = 'R';
-+ buf[1] = ' ';
-+ strncpy(buf + 2, old_name, old_len);
-+ buf[old_len + 2] = ' ';
-+ strncpy(buf + old_len + 3, new_name, new_len);
-+ buf[buf_len -1] = '\n';
-+ bytes = meta_file->f_op->write(meta_file, buf, buf_len, &meta_file->f_pos);
-+ if(bytes != buf_len) {
-+ printk(KERN_CRIT "mini_fo: meta_write_r_entry: ERROR writing.\n");
-+ err = -1;
-+ }
-+
-+ kfree(buf);
-+ set_fs(old_fs);
-+
-+ out_err_close:
-+ fput(meta_file);
-+ out:
-+ return err;
-+}
-+
-+/* sync D list to disk, append data if app_flag is 1 */
-+/* check the meta_mnt, which seems not to be used (properly) */
-+
-+int meta_sync_d_list(dentry_t *dentry, int app_flag)
-+{
-+ dentry_t *meta_dentry;
-+ file_t *meta_file;
-+ mm_segment_t old_fs;
-+
-+ int bytes, err;
-+ struct vfsmount *meta_mnt;
-+ char *buf;
-+
-+ struct list_head *tmp;
-+ struct deleted_entry *del_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ err = 0;
-+ meta_file=0;
-+ meta_mnt=0;
-+
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ invalid inode passed.\n");
-+ err = -1;
-+ goto out;
-+ }
-+ inode_info = itopd(dentry->d_inode);
-+
-+ if(inode_info->deleted_list_size < 0) {
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* ok, there is something to sync */
-+
-+ /* build the storage structure? */
-+ if(!dtohd2(dentry) && !itohi2(dentry->d_inode)) {
-+ err = build_sto_structure(dentry->d_parent, dentry);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ build_sto_structure failed.\n");
-+ goto out;
-+ }
-+ }
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ dtohd2(dentry),
-+ strlen(META_FILENAME));
-+ if(!meta_dentry->d_inode) {
-+ /* We need to create a META-file */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR, NULL);
-+#else
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR);
-+#endif
-+ app_flag = 0;
-+ }
-+ /* need we truncate the meta file? */
-+ if(!app_flag) {
-+ struct iattr newattrs;
-+ newattrs.ia_size = 0;
-+ newattrs.ia_valid = ATTR_SIZE | ATTR_CTIME;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&meta_dentry->d_inode->i_mutex);
-+#else
-+ down(&meta_dentry->d_inode->i_sem);
-+#endif
-+ err = notify_change(meta_dentry, &newattrs);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&meta_dentry->d_inode->i_mutex);
-+#else
-+ up(&meta_dentry->d_inode->i_sem);
-+#endif
-+
-+ if(err || meta_dentry->d_inode->i_size != 0) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ ERROR truncating meta file.\n");
-+ goto out_err_close;
-+ }
-+ }
-+
-+ /* open META-file for writing */
-+ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
-+ if(!meta_file || IS_ERR(meta_file)) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ ERROR opening meta file.\n");
-+ /* we don't mntget so we dont't mntput (for now)
-+ * mntput(meta_mnt);
-+ */
-+ dput(meta_dentry);
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* check if fs supports writing */
-+ if(!meta_file->f_op->write) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ ERROR, fs does not support writing.\n");
-+ goto out_err_close;
-+ }
-+
-+ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+
-+ /* here we go... */
-+ list_for_each(tmp, &inode_info->deleted_list) {
-+ del_entry = list_entry(tmp, struct deleted_entry, list);
-+
-+ /* size: len for name, 1 for \n and 2 for "D " */
-+ buf = (char *) kmalloc(del_entry->len+3, GFP_KERNEL);
-+ if (!buf) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ out of mem.\n");
-+ return -ENOMEM;
-+ }
-+
-+ buf[0] = 'D';
-+ buf[1] = ' ';
-+ strncpy(buf+2, del_entry->name, del_entry->len);
-+ buf[del_entry->len+2] = '\n';
-+ bytes = meta_file->f_op->write(meta_file, buf,
-+ del_entry->len+3,
-+ &meta_file->f_pos);
-+ if(bytes != del_entry->len+3) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
-+ ERROR writing.\n");
-+ err |= -1;
-+ }
-+ kfree(buf);
-+ }
-+ set_fs(old_fs);
-+
-+ out_err_close:
-+ fput(meta_file);
-+ out:
-+ return err;
-+
-+}
-+
-+int meta_sync_r_list(dentry_t *dentry, int app_flag)
-+{
-+ dentry_t *meta_dentry;
-+ file_t *meta_file;
-+ mm_segment_t old_fs;
-+
-+ int bytes, err, buf_len;
-+ struct vfsmount *meta_mnt;
-+ char *buf;
-+
-+ struct list_head *tmp;
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ err = 0;
-+ meta_file=0;
-+ meta_mnt=0;
-+
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ invalid dentry passed.\n");
-+ err = -1;
-+ goto out;
-+ }
-+ inode_info = itopd(dentry->d_inode);
-+
-+ if(inode_info->deleted_list_size < 0) {
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* ok, there is something to sync */
-+
-+ /* build the storage structure? */
-+ if(!dtohd2(dentry) && !itohi2(dentry->d_inode)) {
-+ err = build_sto_structure(dentry->d_parent, dentry);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ build_sto_structure failed.\n");
-+ goto out;
-+ }
-+ }
-+ meta_dentry = lookup_one_len(META_FILENAME,
-+ dtohd2(dentry),
-+ strlen(META_FILENAME));
-+ if(!meta_dentry->d_inode) {
-+ /* We need to create a META-file */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR, NULL);
-+#else
-+ vfs_create(dtohd2(dentry)->d_inode,
-+ meta_dentry, S_IRUSR | S_IWUSR);
-+#endif
-+ app_flag = 0;
-+ }
-+ /* need we truncate the meta file? */
-+ if(!app_flag) {
-+ struct iattr newattrs;
-+ newattrs.ia_size = 0;
-+ newattrs.ia_valid = ATTR_SIZE | ATTR_CTIME;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&meta_dentry->d_inode->i_mutex);
-+#else
-+ down(&meta_dentry->d_inode->i_sem);
-+#endif
-+ err = notify_change(meta_dentry, &newattrs);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&meta_dentry->d_inode->i_mutex);
-+#else
-+ up(&meta_dentry->d_inode->i_sem);
-+#endif
-+ if(err || meta_dentry->d_inode->i_size != 0) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ ERROR truncating meta file.\n");
-+ goto out_err_close;
-+ }
-+ }
-+
-+ /* open META-file for writing */
-+ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
-+ if(!meta_file || IS_ERR(meta_file)) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ ERROR opening meta file.\n");
-+ /* we don't mntget so we dont't mntput (for now)
-+ * mntput(meta_mnt);
-+ */
-+ dput(meta_dentry);
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* check if fs supports writing */
-+ if(!meta_file->f_op->write) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ ERROR, fs does not support writing.\n");
-+ goto out_err_close;
-+ }
-+
-+ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
-+ old_fs = get_fs();
-+ set_fs(KERNEL_DS);
-+
-+ /* here we go... */
-+ list_for_each(tmp, &inode_info->renamed_list) {
-+ ren_entry = list_entry(tmp, struct renamed_entry, list);
-+ /* size:
-+ * 2 for "R ", old_len+new_len for names, 1 blank+1 \n */
-+ buf_len = ren_entry->old_len + ren_entry->new_len + 4;
-+ buf = (char *) kmalloc(buf_len, GFP_KERNEL);
-+ if (!buf) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ out of mem.\n");
-+ return -ENOMEM;
-+ }
-+ buf[0] = 'R';
-+ buf[1] = ' ';
-+ strncpy(buf + 2, ren_entry->old_name, ren_entry->old_len);
-+ buf[ren_entry->old_len + 2] = ' ';
-+ strncpy(buf + ren_entry->old_len + 3,
-+ ren_entry->new_name, ren_entry->new_len);
-+ buf[buf_len - 1] = '\n';
-+ bytes = meta_file->f_op->write(meta_file, buf,
-+ buf_len, &meta_file->f_pos);
-+ if(bytes != buf_len) {
-+ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
-+ ERROR writing.\n");
-+ err |= -1;
-+ }
-+ kfree(buf);
-+ }
-+ set_fs(old_fs);
-+
-+ out_err_close:
-+ fput(meta_file);
-+ out:
-+ return err;
-+}
-+
-+int meta_check_d_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ if(!dentry || !dentry->d_inode)
-+ printk(KERN_CRIT "mini_fo: meta_check_d_dentry: \
-+ invalid dentry passed.\n");
-+ return __meta_check_d_entry(dentry->d_inode, name, len);
-+}
-+
-+int __meta_check_d_entry(inode_t *inode, const char *name, int len)
-+{
-+ struct list_head *tmp;
-+ struct deleted_entry *del_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!inode || !itopd(inode))
-+ printk(KERN_CRIT "mini_fo: __meta_check_d_dentry: \
-+ invalid inode passed.\n");
-+
-+ inode_info = itopd(inode);
-+
-+ if(inode_info->deleted_list_size <= 0)
-+ return 0;
-+
-+ list_for_each(tmp, &inode_info->deleted_list) {
-+ del_entry = list_entry(tmp, struct deleted_entry, list);
-+ if(del_entry->len != len)
-+ continue;
-+
-+ if(!strncmp(del_entry->name, name, len))
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+/*
-+ * check if file has been renamed and return path to orig. base dir.
-+ * Implements no error return values so far, what of course sucks.
-+ * String is null terminated.'
-+ */
-+char* meta_check_r_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_check_r_dentry: \
-+ invalid dentry passed.\n");
-+ return NULL;
-+ }
-+ return __meta_check_r_entry(dentry->d_inode, name, len);
-+}
-+
-+char* __meta_check_r_entry(inode_t *inode, const char *name, int len)
-+{
-+ struct list_head *tmp;
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+ char *old_path;
-+
-+ if(!inode || !itopd(inode)) {
-+ printk(KERN_CRIT "mini_fo: meta_check_r_dentry: \
-+ invalid inode passed.\n");
-+ return NULL;
-+ }
-+ inode_info = itopd(inode);
-+
-+ if(inode_info->renamed_list_size <= 0)
-+ return NULL;
-+
-+ list_for_each(tmp, &inode_info->renamed_list) {
-+ ren_entry = list_entry(tmp, struct renamed_entry, list);
-+ if(ren_entry->new_len != len)
-+ continue;
-+
-+ if(!strncmp(ren_entry->new_name, name, len)) {
-+ old_path = (char *)
-+ kmalloc(ren_entry->old_len+1, GFP_KERNEL);
-+ strncpy(old_path,
-+ ren_entry->old_name,
-+ ren_entry->old_len);
-+ old_path[ren_entry->old_len]='\0';
-+ return old_path;
-+ }
-+ }
-+ return NULL;
-+}
-+
-+/*
-+ * This version only checks if entry exists and return:
-+ * 1 if exists,
-+ * 0 if not,
-+ * -1 if error.
-+ */
-+int meta_is_r_entry(dentry_t *dentry, const char *name, int len)
-+{
-+ if(!dentry || !dentry->d_inode) {
-+ printk(KERN_CRIT "mini_fo: meta_check_r_dentry [2]: \
-+ invalid dentry passed.\n");
-+ return -1;
-+ }
-+ return __meta_is_r_entry(dentry->d_inode, name, len);
-+}
-+
-+int __meta_is_r_entry(inode_t *inode, const char *name, int len)
-+{
-+ struct list_head *tmp;
-+ struct renamed_entry *ren_entry;
-+ struct mini_fo_inode_info *inode_info;
-+
-+ if(!inode || !itopd(inode)) {
-+ printk(KERN_CRIT "mini_fo: meta_check_r_dentry [2]: \
-+ invalid inode passed.\n");
-+ return -1;
-+ }
-+ inode_info = itopd(inode);
-+
-+ if(inode_info->renamed_list_size <= 0)
-+ return -1;
-+
-+ list_for_each(tmp, &inode_info->renamed_list) {
-+ ren_entry = list_entry(tmp, struct renamed_entry, list);
-+ if(ren_entry->new_len != len)
-+ continue;
-+
-+ if(!strncmp(ren_entry->new_name, name, len))
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo.h linux-2.6.19.dev/fs/mini_fo/mini_fo.h
---- linux-2.6.19.old/fs/mini_fo/mini_fo.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/mini_fo.h 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,510 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifndef __MINI_FO_H_
-+#define __MINI_FO_H_
-+
-+#ifdef __KERNEL__
-+
-+/* META stuff */
-+#define META_FILENAME "META_dAfFgHE39ktF3HD2sr"
-+
-+/* use xattrs? */
-+#define XATTR
-+
-+/* File attributes that when changed, result in a file beeing copied to storage */
-+#define COPY_FLAGS ATTR_MODE | ATTR_UID | ATTR_GID | ATTR_SIZE
-+
-+/*
-+ * mini_fo filestates
-+ */
-+#define MODIFIED 1
-+#define UNMODIFIED 2
-+#define CREATED 3
-+#define DEL_REWRITTEN 4
-+#define DELETED 5
-+#define NON_EXISTANT 6
-+
-+/* fist file systems superblock magic */
-+# define MINI_FO_SUPER_MAGIC 0xf15f
-+
-+/*
-+ * STRUCTURES:
-+ */
-+
-+/* mini_fo inode data in memory */
-+struct mini_fo_inode_info {
-+ inode_t *wii_inode;
-+ inode_t *wii_inode2; /* pointer to storage inode */
-+
-+ /* META-data lists */
-+ /* deleted list, ex wol */
-+ struct list_head deleted_list;
-+ int deleted_list_size;
-+
-+ /* renamed list */
-+ struct list_head renamed_list;
-+ int renamed_list_size;
-+
-+ /* add other lists here ... */
-+};
-+
-+/* mini_fo dentry data in memory */
-+struct mini_fo_dentry_info {
-+ dentry_t *wdi_dentry;
-+ dentry_t *wdi_dentry2; /* pointer to storage dentry */
-+ unsigned int state; /* state of the mini_fo dentry */
-+};
-+
-+
-+/* mini_fo super-block data in memory */
-+struct mini_fo_sb_info {
-+ super_block_t *wsi_sb, *wsi_sb2; /* mk: might point to the same sb */
-+ struct vfsmount *hidden_mnt, *hidden_mnt2;
-+ dentry_t *base_dir_dentry;
-+ dentry_t *storage_dir_dentry;
-+ ;
-+};
-+
-+/* readdir_data, readdir helper struct */
-+struct readdir_data {
-+ struct list_head ndl_list; /* linked list head ptr */
-+ int ndl_size; /* list size */
-+ int sto_done; /* flag to show that the storage dir entries have
-+ * all been read an now follow base entries */
-+};
-+
-+/* file private data. */
-+struct mini_fo_file_info {
-+ struct file *wfi_file;
-+ struct file *wfi_file2; /* pointer to storage file */
-+ struct readdir_data rd;
-+};
-+
-+/* struct ndl_entry */
-+struct ndl_entry {
-+ struct list_head list;
-+ char *name;
-+ int len;
-+};
-+
-+/********************************
-+ * META-data structures
-+ ********************************/
-+
-+/* deleted entry */
-+struct deleted_entry {
-+ struct list_head list;
-+ char *name;
-+ int len;
-+};
-+
-+/* renamed entry */
-+struct renamed_entry {
-+ struct list_head list;
-+ char *old_name; /* old directory with full path */
-+ int old_len; /* length of above string */
-+ char *new_name; /* new directory name */
-+ int new_len; /* length of above string */
-+};
-+
-+/* attr_change entry */
-+struct attr_change_entry {
-+ struct list_head list;
-+ char *name;
-+ int len;
-+};
-+
-+/* link entry */
-+struct link_entry {
-+ struct list_head list;
-+ int links_moved;
-+ int inum_base;
-+ int inum_sto;
-+ char *weird_name;
-+ int weird_name_len;
-+};
-+
-+
-+/* Some other stuff required for mini_fo_filldir64, copied from
-+ * fs/readdir.c
-+ */
-+
-+#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
-+#define NAME_OFFSET(de) ((int) ((de)->d_name - (char *) (de)))
-+
-+
-+struct linux_dirent64 {
-+ u64 d_ino;
-+ s64 d_off;
-+ unsigned short d_reclen;
-+ unsigned char d_type;
-+ char d_name[0];
-+};
-+
-+
-+struct getdents_callback64 {
-+ struct linux_dirent64 * current_dir;
-+ struct linux_dirent64 * previous;
-+ int count;
-+ int error;
-+};
-+
-+struct linux_dirent {
-+ unsigned long d_ino;
-+ unsigned long d_off;
-+ unsigned short d_reclen;
-+ char d_name[1];
-+};
-+
-+struct getdents_callback {
-+ struct linux_dirent * current_dir;
-+ struct linux_dirent * previous;
-+ int count;
-+ int error;
-+};
-+
-+
-+/*
-+ * MACROS:
-+ */
-+
-+/* file TO private_data */
-+# define ftopd(file) ((struct mini_fo_file_info *)((file)->private_data))
-+# define __ftopd(file) ((file)->private_data)
-+/* file TO hidden_file */
-+# define ftohf(file) ((ftopd(file))->wfi_file)
-+# define ftohf2(file) ((ftopd(file))->wfi_file2)
-+
-+/* inode TO private_data */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+# define itopd(ino) ((struct mini_fo_inode_info *)(ino)->i_private)
-+# define __itopd(ino) ((ino)->i_private)
-+#else
-+# define itopd(ino) ((struct mini_fo_inode_info *)(ino)->u.generic_ip)
-+# define __itopd(ino) ((ino)->u.generic_ip)
-+#endif
-+/* inode TO hidden_inode */
-+# define itohi(ino) (itopd(ino)->wii_inode)
-+# define itohi2(ino) (itopd(ino)->wii_inode2)
-+
-+/* superblock TO private_data */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+# define stopd(super) ((struct mini_fo_sb_info *)(super)->s_fs_info)
-+# define __stopd(super) ((super)->s_fs_info)
-+#else
-+# define stopd(super) ((struct mini_fo_sb_info *)(super)->u.generic_sbp)
-+# define __stopd(super) ((super)->u.generic_sbp)
-+#endif
-+
-+/* unused? # define vfs2priv stopd */
-+/* superblock TO hidden_superblock */
-+
-+# define stohs(super) (stopd(super)->wsi_sb)
-+# define stohs2(super) (stopd(super)->wsi_sb2)
-+
-+/* dentry TO private_data */
-+# define dtopd(dentry) ((struct mini_fo_dentry_info *)(dentry)->d_fsdata)
-+# define __dtopd(dentry) ((dentry)->d_fsdata)
-+/* dentry TO hidden_dentry */
-+# define dtohd(dent) (dtopd(dent)->wdi_dentry)
-+# define dtohd2(dent) (dtopd(dent)->wdi_dentry2)
-+
-+/* dentry to state */
-+# define dtost(dent) (dtopd(dent)->state)
-+# define sbt(sb) ((sb)->s_type->name)
-+
-+#define IS_WRITE_FLAG(flag) (flag & (O_RDWR | O_WRONLY | O_APPEND))
-+#define IS_COPY_FLAG(flag) (flag & (COPY_FLAGS))
-+
-+/* macros to simplify non-SCA code */
-+# define MALLOC_PAGE_POINTERS(hidden_pages, num_hidden_pages)
-+# define MALLOC_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages)
-+# define FREE_PAGE_POINTERS(hidden_pages, num)
-+# define FREE_PAGEDATA_POINTERS(hidden_pages_data, num)
-+# define FOR_EACH_PAGE
-+# define CURRENT_HIDDEN_PAGE hidden_page
-+# define CURRENT_HIDDEN_PAGEDATA hidden_page_data
-+# define CURRENT_HIDDEN_PAGEINDEX page->index
-+
-+/*
-+ * EXTERNALS:
-+ */
-+extern struct file_operations mini_fo_main_fops;
-+extern struct file_operations mini_fo_dir_fops;
-+extern struct inode_operations mini_fo_main_iops;
-+extern struct inode_operations mini_fo_dir_iops;
-+extern struct inode_operations mini_fo_symlink_iops;
-+extern struct super_operations mini_fo_sops;
-+extern struct dentry_operations mini_fo_dops;
-+extern struct vm_operations_struct mini_fo_shared_vmops;
-+extern struct vm_operations_struct mini_fo_private_vmops;
-+extern struct address_space_operations mini_fo_aops;
-+
-+#if 0 /* unused by mini_fo */
-+extern int mini_fo_interpose(dentry_t *hidden_dentry, dentry_t *this_dentry, super_block_t *sb, int flag);
-+#if defined(FIST_FILTER_DATA) || defined(FIST_FILTER_SCA)
-+extern page_t *mini_fo_get1page(file_t *file, int index);
-+extern int mini_fo_fill_zeros(file_t *file, page_t *page, unsigned from);
-+# endif /* FIST_FILTER_DATA || FIST_FILTER_SCA */
-+
-+
-+# define mini_fo_hidden_dentry(d) __mini_fo_hidden_dentry(__FILE__,__FUNCTION__,__LINE__,(d))
-+# define mini_fo_hidden_sto_dentry(d) __mini_fo_hidden_sto_dentry(__FILE__,__FUNCTION__,__LINE__,(d))
-+
-+extern dentry_t *__mini_fo_hidden_dentry(char *file, char *func, int line, dentry_t *this_dentry);
-+extern dentry_t *__mini_fo_hidden_sto_dentry(char *file, char *func, int line, dentry_t *this_dentry);
-+
-+extern int mini_fo_read_file(const char *filename, void *buf, int len);
-+extern int mini_fo_write_file(const char *filename, void *buf, int len);
-+extern dentry_t *fist_lookup(dentry_t *dir, const char *name, vnode_t **out, uid_t uid, gid_t gid);
-+#endif /* unused by mini_fo */
-+
-+/* state transition functions */
-+extern int nondir_unmod_to_mod(dentry_t *dentry, int cp_flag);
-+extern int nondir_del_rew_to_del(dentry_t *dentry);
-+extern int nondir_creat_to_del(dentry_t *dentry);
-+extern int nondir_mod_to_del(dentry_t *dentry);
-+extern int nondir_unmod_to_del(dentry_t *dentry);
-+
-+extern int dir_unmod_to_mod(dentry_t *dentry);
-+
-+/* rename specials */
-+extern int rename_directory(inode_t *old_dir, dentry_t *old_dentry, inode_t *new_dir, dentry_t *new_dentry);
-+extern int rename_nondir(inode_t *old_dir, dentry_t *old_dentry, inode_t *new_dir, dentry_t *new_dentry);
-+
-+/* misc stuff */
-+extern int mini_fo_tri_interpose(dentry_t *hidden_dentry,
-+ dentry_t *hidden_sto_dentry,
-+ dentry_t *dentry,
-+ super_block_t *sb, int flag);
-+
-+extern int mini_fo_cp_cont(dentry_t *tgt_dentry, struct vfsmount *tgt_mnt,
-+ dentry_t *src_dentry, struct vfsmount *src_mnt);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+extern int mini_fo_create(inode_t *dir, dentry_t *dentry, int mode, struct nameidata *nd);
-+
-+extern int create_sto_nod(dentry_t *dentry, int mode, dev_t dev);
-+extern int create_sto_reg_file(dentry_t *dentry, int mode, struct nameidata *nd);
-+#else
-+extern int mini_fo_create(inode_t *dir, dentry_t *dentry, int mode);
-+
-+extern int create_sto_nod(dentry_t *dentry, int mode, int dev);
-+extern int create_sto_reg_file(dentry_t *dentry, int mode);
-+#endif
-+
-+extern int create_sto_dir(dentry_t *dentry, int mode);
-+
-+extern int exists_in_storage(dentry_t *dentry);
-+extern int is_mini_fo_existant(dentry_t *dentry);
-+extern int get_neg_sto_dentry(dentry_t *dentry);
-+extern int build_sto_structure(dentry_t *dir, dentry_t *dentry);
-+extern int get_mini_fo_bpath(dentry_t *dentry, char **bpath, int *bpath_len);
-+extern dentry_t *bpath_walk(super_block_t *sb, char *bpath);
-+extern int bpath_put(dentry_t *dentry);
-+
-+/* check_mini_fo types functions */
-+extern int check_mini_fo_dentry(dentry_t *dentry);
-+extern int check_mini_fo_file(file_t *file);
-+extern int check_mini_fo_inode(inode_t *inode);
-+
-+/* General meta functions, can be called from outside of meta.c */
-+extern int meta_build_lists(dentry_t *dentry);
-+extern int meta_put_lists(dentry_t *dentry);
-+extern int __meta_put_lists(inode_t *inode);
-+
-+extern int meta_add_d_entry(dentry_t *dentry, const char *name, int len);
-+extern int meta_add_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len);
-+
-+extern int meta_remove_r_entry(dentry_t *dentry, const char *name, int len);
-+
-+extern int meta_check_d_entry(dentry_t *dentry, const char *name, int len);
-+extern int __meta_check_d_entry(inode_t *inode, const char *name, int len);
-+
-+extern char* meta_check_r_entry(dentry_t *dentry, const char *name, int len);
-+extern char* __meta_check_r_entry(inode_t *inode, const char *name, int len);
-+extern int meta_is_r_entry(dentry_t *dentry, const char *name, int len);
-+extern int __meta_is_r_entry(inode_t *inode, const char *name, int len);
-+
-+/* Specific meta functions, should be called only inside meta.c */
-+extern int __meta_put_d_list(inode_t *inode);
-+extern int __meta_put_r_list(inode_t *inode);
-+
-+extern int meta_list_add_d_entry(dentry_t *dentry,
-+ const char *name, int len);
-+extern int meta_list_add_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len);
-+
-+extern int meta_list_remove_r_entry(dentry_t *dentry,
-+ const char *name, int len);
-+
-+extern int __meta_list_remove_r_entry(inode_t *inode,
-+ const char *name, int len);
-+
-+extern int meta_write_d_entry(dentry_t *dentry, const char *name, int len);
-+extern int meta_write_r_entry(dentry_t *dentry,
-+ const char *old_name, int old_len,
-+ const char *new_name, int new_len);
-+
-+extern int meta_sync_lists(dentry_t *dentry);
-+extern int meta_sync_d_list(dentry_t *dentry, int app_flag);
-+extern int meta_sync_r_list(dentry_t *dentry, int app_flag);
-+
-+/* ndl stuff */
-+extern int ndl_add_entry(struct readdir_data *rd, const char *name, int len);
-+extern void ndl_put_list(struct readdir_data *rd);
-+extern int ndl_check_entry(struct readdir_data *rd,
-+ const char *name, int len);
-+
-+
-+# define copy_inode_size(dst, src) \
-+ dst->i_size = src->i_size; \
-+ dst->i_blocks = src->i_blocks;
-+
-+static inline void
-+fist_copy_attr_atime(inode_t *dest, const inode_t *src)
-+{
-+ ASSERT(dest != NULL);
-+ ASSERT(src != NULL);
-+ dest->i_atime = src->i_atime;
-+}
-+static inline void
-+fist_copy_attr_times(inode_t *dest, const inode_t *src)
-+{
-+ ASSERT(dest != NULL);
-+ ASSERT(src != NULL);
-+ dest->i_atime = src->i_atime;
-+ dest->i_mtime = src->i_mtime;
-+ dest->i_ctime = src->i_ctime;
-+}
-+static inline void
-+fist_copy_attr_timesizes(inode_t *dest, const inode_t *src)
-+{
-+ ASSERT(dest != NULL);
-+ ASSERT(src != NULL);
-+ dest->i_atime = src->i_atime;
-+ dest->i_mtime = src->i_mtime;
-+ dest->i_ctime = src->i_ctime;
-+ copy_inode_size(dest, src);
-+}
-+static inline void
-+fist_copy_attr_all(inode_t *dest, const inode_t *src)
-+{
-+ ASSERT(dest != NULL);
-+ ASSERT(src != NULL);
-+ dest->i_mode = src->i_mode;
-+ dest->i_nlink = src->i_nlink;
-+ dest->i_uid = src->i_uid;
-+ dest->i_gid = src->i_gid;
-+ dest->i_rdev = src->i_rdev;
-+ dest->i_atime = src->i_atime;
-+ dest->i_mtime = src->i_mtime;
-+ dest->i_ctime = src->i_ctime;
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-+ dest->i_blksize = src->i_blksize;
-+#endif
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,12)
-+ dest->i_blkbits = src->i_blkbits;
-+# endif /* linux 2.4.12 and newer */
-+ copy_inode_size(dest, src);
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-+ dest->i_attr_flags = src->i_attr_flags;
-+#else
-+ dest->i_flags = src->i_flags;
-+#endif
-+}
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+/* copied from linux/fs.h */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+static inline void double_lock(struct dentry *d1, struct dentry *d2)
-+{
-+ struct mutex *m1 = &d1->d_inode->i_mutex;
-+ struct mutex *m2 = &d2->d_inode->i_mutex;
-+ if (m1 != m2) {
-+ if ((unsigned long) m1 < (unsigned long) m2) {
-+ struct mutex *tmp = m2;
-+ m2 = m1; m1 = tmp;
-+ }
-+ mutex_lock(m1);
-+ }
-+ mutex_lock(m2);
-+}
-+
-+static inline void double_unlock(struct dentry *d1, struct dentry *d2)
-+{
-+ struct mutex *m1 = &d1->d_inode->i_mutex;
-+ struct mutex *m2 = &d2->d_inode->i_mutex;
-+ mutex_unlock(m1);
-+ if (m1 != m2)
-+ mutex_unlock(m2);
-+ dput(d1);
-+ dput(d2);
-+}
-+
-+#else
-+static inline void double_down(struct semaphore *s1, struct semaphore *s2)
-+{
-+ if (s1 != s2) {
-+ if ((unsigned long) s1 < (unsigned long) s2) {
-+ struct semaphore *tmp = s2;
-+ s2 = s1; s1 = tmp;
-+ }
-+ down(s1);
-+ }
-+ down(s2);
-+}
-+
-+static inline void double_up(struct semaphore *s1, struct semaphore *s2)
-+{
-+ up(s1);
-+ if (s1 != s2)
-+ up(s2);
-+}
-+
-+static inline void double_lock(struct dentry *d1, struct dentry *d2)
-+{
-+ double_down(&d1->d_inode->i_sem, &d2->d_inode->i_sem);
-+}
-+
-+static inline void double_unlock(struct dentry *d1, struct dentry *d2)
-+{
-+ double_up(&d1->d_inode->i_sem,&d2->d_inode->i_sem);
-+ dput(d1);
-+ dput(d2);
-+}
-+#endif /* if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16) */
-+#endif /* if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) */
-+#endif /* __KERNEL__ */
-+
-+/*
-+ * Definitions for user and kernel code
-+ */
-+
-+/* ioctls */
-+
-+#endif /* not __MINI_FO_H_ */
-diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo-merge linux-2.6.19.dev/fs/mini_fo/mini_fo-merge
---- linux-2.6.19.old/fs/mini_fo/mini_fo-merge 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/mini_fo-merge 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,180 @@
-+#!/bin/bash
-+#
-+# Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License
-+# as published by the Free Software Foundation; either version
-+# 2 of the License, or (at your option) any later version.
-+#
-+
-+BASE=
-+STO=
-+HELP=
-+DRYRUN=
-+VERBOSE=
-+TMP="/tmp/"
-+META_NAME="META_dAfFgHE39ktF3HD2sr"
-+SKIP_DEL_LIST="skip-delete-list.mini_fo-merge"
-+
-+COMMAND=
-+exec_command()
-+{
-+ if [ x$DRYRUN == "xset" ]; then
-+ echo " would run: $COMMAND"
-+ elif ! [ x$DRYRUN == "xset" ]; then
-+ if [ x$VERBOSE == "xset" ]; then
-+ echo " running: $COMMAND"
-+ fi
-+ eval $COMMAND
-+ fi
-+}
-+
-+usage()
-+{
-+cat <<EOF
-+
-+USAGE: $0 -b <base dir> -s <storage dir>
-+Version 0.1
-+
-+This script merges the contents of a mini_fo storage file system back
-+to the base file system.
-+
-+!!! Warning: This will modify the base filesystem and can destroy data
-+ if used wrongly.
-+
-+Options:
-+ -b <base dir>
-+ the directory of the base file system.
-+
-+ -s <storage dir>
-+ the directory of the storage file system.
-+
-+ -d dry run, will not change anything and print the commands that
-+ would be executed.
-+
-+ -t tmp dir for storing temporary file. default: $TMP
-+
-+ -v show what operations are performed.
-+
-+ -h displays this message.
-+
-+EOF
-+}
-+
-+# parse parameters
-+while getopts hdvt:b:s: OPTS
-+ do
-+ case $OPTS in
-+ h) HELP="set";;
-+ d) DRYRUN="set";;
-+ v) VERBOSE="set";;
-+ b) BASE="$OPTARG";;
-+ s) STO="$OPTARG";;
-+ t) TMP="$OPTARG";;
-+ ?) usage
-+ exit 1;;
-+ esac
-+done
-+
-+if [ "x$HELP" == "xset" ]; then
-+ usage
-+ exit -1
-+fi
-+
-+if ! [ -d "$BASE" ] || ! [ -d "$STO" ]; then
-+ echo -e "$0:\n Error, -s and/or -b argument missing. type $0 -h for help."
-+ exit -1;
-+fi
-+
-+# get full paths
-+pushd $STO; STO=`pwd`; popd
-+pushd $BASE; BASE=`pwd`; popd
-+TMP=${TMP%/}
-+
-+
-+cat<<EOF
-+###############################################################################
-+# mini_fo-merge
-+#
-+# base dir: $BASE
-+# storage dir: $STO
-+# meta filename: $META_NAME
-+# dry run: $DRYRUN
-+# verbose: $VERBOSE
-+# tmp files: $TMP
-+###############################################################################
-+
-+EOF
-+
-+rm $TMP/$SKIP_DEL_LIST
-+
-+# first process all renamed dirs
-+echo "Merging renamed directories..."
-+pushd $STO &> /dev/null
-+find . -name $META_NAME -type f -print0 | xargs -0 -e grep -e '^R ' | tr -s ':R' ' ' | while read ENTRY; do
-+ echo "entry: $ENTRY"
-+ META_FILE=`echo $ENTRY | cut -d ' ' -f 1`
-+ OLD_B_DIR=`echo $ENTRY | cut -d ' ' -f 2 | sed -e 's/\///'`
-+ NEW_NAME=`echo $ENTRY | cut -d ' ' -f 3`
-+ NEW_B_DIR=`echo $META_FILE | sed -e "s/$META_NAME/$NEW_NAME/" | sed -e 's/^\.\///'`
-+ echo "META_FILE: $META_FILE"
-+ echo "OLD_B_DIR: $OLD_B_DIR"
-+ echo "NEW_NAME: $NEW_NAME"
-+ echo "NEW_B_DIR: $NEW_B_DIR"
-+
-+ pushd $BASE &> /dev/null
-+ # remove an existing dir in storage
-+ COMMAND="rm -rf $NEW_B_DIR"; exec_command
-+ COMMAND="cp -R $OLD_B_DIR $NEW_B_DIR"; exec_command
-+ echo ""
-+ popd &> /dev/null
-+
-+ # remember this dir to exclude it from deleting later
-+ echo $NEW_B_DIR >> $TMP/$SKIP_DEL_LIST
-+done
-+
-+# delete all whiteouted files from base
-+echo -e "\nDeleting whiteout'ed files from base file system..."
-+find . -name $META_NAME -type f -print0 | xargs -0 -e grep -e '^D ' | sed -e 's/:D//' | while read ENTRY; do
-+ META_FILE=`echo $ENTRY | cut -d ' ' -f 1`
-+ DEL_NAME=`echo $ENTRY | cut -d ' ' -f 2`
-+ DEL_FILE=`echo $META_FILE | sed -e "s/$META_NAME/$DEL_NAME/" | sed -e 's/^\.\///'`
-+ grep -x $DEL_FILE $TMP/$SKIP_DEL_LIST &> /dev/null
-+ if [ $? -ne 0 ]; then
-+ pushd $BASE &> /dev/null
-+ COMMAND="rm -rf $DEL_FILE"; exec_command
-+ popd &> /dev/null
-+ else
-+ echo " excluding: $DEL_FILE as in skip-del-list."
-+ fi
-+done
-+
-+# create all dirs and update permissions
-+echo -e "\nSetting up directory structures in base file system..."
-+find . -type d | sed -e 's/^\.\///' | while read DIR; do
-+ PERMS=`stat -c %a $DIR`
-+ DIR_UID=`stat -c %u $DIR`
-+ DIR_GID=`stat -c %g $DIR`
-+ pushd $BASE &> /dev/null
-+ if ! [ -d $DIR ]; then
-+ COMMAND="mkdir -p $DIR"; exec_command
-+ fi
-+ COMMAND="chmod $PERMS $DIR"; exec_command
-+ COMMAND="chown $DIR_UID:$DIR_GID $DIR"; exec_command
-+ popd &> /dev/null
-+done
-+
-+# merge all non-directory files
-+echo -e "\nMerging all non-directory files...."
-+for i in b c p f l s; do
-+ find . -type $i | sed -e 's/^\.\///' | grep -v "$META_NAME" | while read FILE; do
-+ pushd $BASE #&> /dev/null
-+ COMMAND="cp -df $STO/$FILE $BASE/$FILE"; exec_command
-+ popd &> /dev/null
-+ done
-+done
-+popd &> /dev/null
-+
-+#rm $TMP/$SKIP_DEL_LIST
-+
-+echo "Done!"
-diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo-overlay linux-2.6.19.dev/fs/mini_fo/mini_fo-overlay
---- linux-2.6.19.old/fs/mini_fo/mini_fo-overlay 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/mini_fo-overlay 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,130 @@
-+#!/bin/bash
-+#
-+# Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License
-+# as published by the Free Software Foundation; either version
-+# 2 of the License, or (at your option) any later version.
-+#
-+
-+HELP=
-+SUFF=
-+MNTP=
-+MNT_DIR="/mnt"
-+STO=
-+STO_DIR="/tmp"
-+BASE=
-+
-+usage()
-+{
-+cat <<EOF
-+
-+Usage: $0 [-s suffix] [-d sto_dir_dir] [-m mount point] base_dir
-+Version 0.1
-+
-+This script overlays the given base directory using the mini_fo file
-+system. If only the base directory base_dir is given, $0
-+will use a storage directory called "sto-<base_dir_name>" in $STO_DIR,
-+and mount point "mini_fo-<base_dir_dir>" in $MNT_DIR.
-+
-+Options:
-+ -s <suffix>
-+ add given suffix to storage directory and the mount
-+ point. This is usefull for overlaying one base directory
-+ several times and avoiding conflicts with storage directory
-+ names and mount points.
-+
-+ -d <sto_dir_dir>
-+ change the directory in which the storage directory will be
-+ created (default is currently "$STO_DIR".
-+
-+ -m <mount point>
-+ use an alternative directory to create the mini_fo
-+ mountpoint (default is currently "$MNT_DIR".
-+
-+ -h displays this message.
-+
-+EOF
-+exit 1;
-+}
-+
-+while getopts hm:s:d: OPTS
-+ do
-+ case $OPTS in
-+ s) SUFF="$OPTARG";;
-+ d) STO_DIR="$OPTARG";;
-+ m) MNT_DIR="$OPTARG";;
-+ h) HELP="set";;
-+ ?) usage
-+ exit 1;;
-+ esac
-+done
-+shift $(($OPTIND - 1))
-+
-+BASE="$1"
-+
-+if [ "x$HELP" == "xset" ]; then
-+ usage
-+ exit -1
-+fi
-+
-+# fix suffix
-+if [ "x$SUFF" != "x" ]; then
-+ SUFF="-$SUFF"
-+fi
-+
-+# kill trailing slashes
-+MNT_DIR=${MNT_DIR%/}
-+STO_DIR=${STO_DIR%/}
-+BASE=${BASE%/}
-+
-+
-+if ! [ -d "$BASE" ]; then
-+ echo "invalid base dir $BASE, run $0 -h for help."
-+ exit -1
-+fi
-+
-+# check opts
-+if ! [ -d "$MNT_DIR" ]; then
-+ echo "invalid mount dir $MNT_DIR, run $0 -h for help."
-+ exit -1
-+fi
-+
-+if ! [ -d "$STO_DIR" ]; then
-+ echo "invalid sto_dir_dir $STO_DIR, run $0 -h for help."
-+ exit -1
-+fi
-+
-+MNTP="$MNT_DIR/mini_fo-`basename $BASE`$SUFF"
-+STO="$STO_DIR/sto-`basename $BASE`$SUFF"
-+
-+# create the mount point if it doesn't exist
-+mkdir -p $MNTP
-+if [ $? -ne 0 ]; then
-+ echo "Error, failed to create mount point $MNTP"
-+fi
-+
-+mkdir -p $STO
-+if [ $? -ne 0 ]; then
-+ echo "Error, failed to create storage dir $STO"
-+fi
-+
-+# check if fs is already mounted
-+mount | grep mini_fo | grep $MNTP &> /dev/null
-+if [ $? -eq 0 ]; then
-+ echo "Error, existing mini_fo mount at $MNTP."
-+ exit -1
-+fi
-+
-+mount | grep mini_fo | grep $STO &> /dev/null
-+if [ $? -eq 0 ]; then
-+ echo "Error, $STO seems to be used already."
-+ exit -1
-+fi
-+
-+# mount
-+mount -t mini_fo -o base=$BASE,sto=$STO $BASE $MNTP
-+
-+if [ $? -ne 0 ]; then
-+ echo "Error, mounting failed, maybe no permisson to mount?"
-+fi
-diff -urN linux-2.6.19.old/fs/mini_fo/mmap.c linux-2.6.19.dev/fs/mini_fo/mmap.c
---- linux-2.6.19.old/fs/mini_fo/mmap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/mmap.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,637 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif /* HAVE_CONFIG_H */
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+
-+#ifdef FIST_COUNT_WRITES
-+/* for counting writes in the middle vs. regular writes */
-+unsigned long count_writes = 0, count_writes_middle = 0;
-+#endif /* FIST_COUNT_WRITES */
-+
-+/* forward declaration of commit write and prepare write */
-+STATIC int mini_fo_commit_write(file_t *file, page_t *page, unsigned from, unsigned to);
-+STATIC int mini_fo_prepare_write(file_t *file, page_t *page, unsigned from, unsigned to);
-+
-+
-+/*
-+ * Function for handling creation of holes when lseek-ing past the
-+ * end of the file and then writing some data.
-+ */
-+int
-+mini_fo_fill_zeros(file_t* file, page_t *page, unsigned from)
-+{
-+ int err = 0;
-+ dentry_t *dentry = file->f_dentry;
-+ inode_t *inode = dentry->d_inode;
-+ page_t *tmp_page;
-+ int index;
-+
-+ print_entry_location();
-+
-+ for (index = inode->i_size >> PAGE_CACHE_SHIFT; index < page->index; index++) {
-+ tmp_page = mini_fo_get1page(file, index);
-+ if (IS_ERR(tmp_page)) {
-+ err = PTR_ERR(tmp_page);
-+ goto out;
-+ }
-+
-+ /*
-+ * zero out rest of the contents of the page between the appropriate
-+ * offsets.
-+ */
-+ memset((char*)page_address(tmp_page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, PAGE_CACHE_SIZE - (inode->i_size & ~PAGE_CACHE_MASK));
-+
-+ if (! (err = mini_fo_prepare_write(file, tmp_page, 0, PAGE_CACHE_SIZE)))
-+ err = mini_fo_commit_write(file, tmp_page, 0, PAGE_CACHE_SIZE);
-+
-+ page_cache_release(tmp_page);
-+ if (err < 0)
-+ goto out;
-+ if (current->need_resched)
-+ schedule();
-+ }
-+
-+ /* zero out appropriate parts of last page */
-+
-+ /*
-+ * if the encoding type is block, then adjust the 'from' (where the
-+ * zeroing will start) offset appropriately
-+ */
-+ from = from & (~(FIST_ENCODING_BLOCKSIZE - 1));
-+
-+ if ((from - (inode->i_size & ~PAGE_CACHE_MASK)) > 0) {
-+
-+ memset((char*)page_address(page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, from - (inode->i_size & ~PAGE_CACHE_MASK));
-+ if (! (err = mini_fo_prepare_write(file, page, 0, PAGE_CACHE_SIZE)))
-+ err = mini_fo_commit_write(file, page, 0, PAGE_CACHE_SIZE);
-+
-+ if (err < 0)
-+ goto out;
-+ if (current->need_resched)
-+ schedule();
-+ }
-+
-+ out:
-+ print_exit_status(err);
-+ return err;
-+}
-+
-+
-+
-+STATIC int
-+mini_fo_writepage(page_t *page)
-+{
-+ int err = -EIO;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+ page_t *hidden_page;
-+ char *kaddr, *hidden_kaddr;
-+
-+ print_entry_location();
-+
-+ inode = page->mapping->host;
-+ hidden_inode = itohi(inode);
-+
-+ /*
-+ * writepage is called when shared mmap'ed files need to write
-+ * their pages, while prepare/commit_write are called from the
-+ * non-paged write() interface. (However, in 2.3 the two interfaces
-+ * share the same cache, while in 2.2 they didn't.)
-+ *
-+ * So we pretty much have to duplicate much of what commit_write does.
-+ */
-+
-+ /* find lower page (returns a locked page) */
-+ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
-+ if (!hidden_page)
-+ goto out;
-+
-+ /* get page address, and encode it */
-+ kaddr = (char *) kmap(page);
-+ hidden_kaddr = (char*) kmap(hidden_page);
-+ mini_fo_encode_block(kaddr, hidden_kaddr, PAGE_CACHE_SIZE, inode, inode->i_sb, page->index);
-+ /* if encode_block could fail, then return error */
-+ kunmap(page);
-+ kunmap(hidden_page);
-+
-+ /* call lower writepage (expects locked page) */
-+ err = hidden_inode->i_mapping->a_ops->writepage(hidden_page);
-+
-+ /*
-+ * update mtime and ctime of lower level file system
-+ * mini_fo' mtime and ctime are updated by generic_file_write
-+ */
-+ hidden_inode->i_mtime = hidden_inode->i_ctime = CURRENT_TIME;
-+
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,1)
-+ UnlockPage(hidden_page); /* b/c grab_cache_page locked it */
-+# endif /* kernel older than 2.4.1 */
-+ page_cache_release(hidden_page); /* b/c grab_cache_page increased refcnt */
-+
-+ if (err)
-+ ClearPageUptodate(page);
-+ else
-+ SetPageUptodate(page);
-+ out:
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,1)
-+ UnlockPage(page);
-+# endif /* kernel 2.4.1 and newer */
-+ print_exit_status(err);
-+ return err;
-+}
-+
-+
-+/*
-+ * get one page from cache or lower f/s, return error otherwise.
-+ * returns unlocked, up-to-date page (if ok), with increased refcnt.
-+ */
-+page_t *
-+mini_fo_get1page(file_t *file, int index)
-+{
-+ page_t *page;
-+ dentry_t *dentry;
-+ inode_t *inode;
-+ struct address_space *mapping;
-+ int err;
-+
-+ print_entry_location();
-+
-+ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
-+ inode = dentry->d_inode;
-+ mapping = inode->i_mapping;
-+
-+ fist_dprint(8, "%s: read page index %d pid %d\n", __FUNCTION__, index, current->pid);
-+ if (index < 0) {
-+ printk("%s BUG: index=%d\n", __FUNCTION__, index);
-+ page = ERR_PTR(-EIO);
-+ goto out;
-+ }
-+ page = read_cache_page(mapping,
-+ index,
-+ (filler_t *) mapping->a_ops->readpage,
-+ (void *) file);
-+ if (IS_ERR(page))
-+ goto out;
-+ wait_on_page(page);
-+ if (!Page_Uptodate(page)) {
-+ lock_page(page);
-+ err = mapping->a_ops->readpage(file, page);
-+ if (err) {
-+ page = ERR_PTR(err);
-+ goto out;
-+ }
-+ wait_on_page(page);
-+ if (!Page_Uptodate(page)) {
-+ page = ERR_PTR(-EIO);
-+ goto out;
-+ }
-+ }
-+
-+ out:
-+ print_exit_pointer(page);
-+ return page;
-+}
-+
-+
-+/*
-+ * get one page from cache or lower f/s, return error otherwise.
-+ * similar to get1page, but doesn't guarantee that it will return
-+ * an unlocked page.
-+ */
-+page_t *
-+mini_fo_get1page_cached(file_t *file, int index)
-+{
-+ page_t *page;
-+ dentry_t *dentry;
-+ inode_t *inode;
-+ struct address_space *mapping;
-+ int err;
-+
-+ print_entry_location();
-+
-+ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
-+ inode = dentry->d_inode;
-+ mapping = inode->i_mapping;
-+
-+ fist_dprint(8, "%s: read page index %d pid %d\n", __FUNCTION__, index, current->pid);
-+ if (index < 0) {
-+ printk("%s BUG: index=%d\n", __FUNCTION__, index);
-+ page = ERR_PTR(-EIO);
-+ goto out;
-+ }
-+ page = read_cache_page(mapping,
-+ index,
-+ (filler_t *) mapping->a_ops->readpage,
-+ (void *) file);
-+ if (IS_ERR(page))
-+ goto out;
-+
-+ out:
-+ print_exit_pointer(page);
-+ return page;
-+}
-+
-+
-+/*
-+ * readpage is called from generic_page_read and the fault handler.
-+ * If your file system uses generic_page_read for the read op, it
-+ * must implement readpage.
-+ *
-+ * Readpage expects a locked page, and must unlock it.
-+ */
-+STATIC int
-+mini_fo_do_readpage(file_t *file, page_t *page)
-+{
-+ int err = -EIO;
-+ dentry_t *dentry;
-+ file_t *hidden_file = NULL;
-+ dentry_t *hidden_dentry;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+ char *page_data;
-+ page_t *hidden_page;
-+ char *hidden_page_data;
-+ int real_size;
-+
-+ print_entry_location();
-+
-+ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
-+ if (ftopd(file) != NULL)
-+ hidden_file = ftohf(file);
-+ hidden_dentry = dtohd(dentry);
-+ inode = dentry->d_inode;
-+ hidden_inode = itohi(inode);
-+
-+ fist_dprint(7, "%s: requesting page %d from file %s\n", __FUNCTION__, page->index, dentry->d_name.name);
-+
-+ MALLOC_PAGE_POINTERS(hidden_pages, num_hidden_pages);
-+ MALLOC_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages);
-+ FOR_EACH_PAGE
-+ CURRENT_HIDDEN_PAGE = NULL;
-+
-+ /* find lower page (returns a locked page) */
-+ FOR_EACH_PAGE {
-+ fist_dprint(8, "%s: Current page index = %d\n", __FUNCTION__, CURRENT_HIDDEN_PAGEINDEX);
-+ CURRENT_HIDDEN_PAGE = read_cache_page(hidden_inode->i_mapping,
-+ CURRENT_HIDDEN_PAGEINDEX,
-+ (filler_t *) hidden_inode->i_mapping->a_ops->readpage,
-+ (void *) hidden_file);
-+ if (IS_ERR(CURRENT_HIDDEN_PAGE)) {
-+ err = PTR_ERR(CURRENT_HIDDEN_PAGE);
-+ CURRENT_HIDDEN_PAGE = NULL;
-+ goto out_release;
-+ }
-+ }
-+
-+ /*
-+ * wait for the page data to show up
-+ * (signaled by readpage as unlocking the page)
-+ */
-+ FOR_EACH_PAGE {
-+ wait_on_page(CURRENT_HIDDEN_PAGE);
-+ if (!Page_Uptodate(CURRENT_HIDDEN_PAGE)) {
-+ /*
-+ * call readpage() again if we returned from wait_on_page with a
-+ * page that's not up-to-date; that can happen when a partial
-+ * page has a few buffers which are ok, but not the whole
-+ * page.
-+ */
-+ lock_page(CURRENT_HIDDEN_PAGE);
-+ err = hidden_inode->i_mapping->a_ops->readpage(hidden_file,
-+ CURRENT_HIDDEN_PAGE);
-+ if (err) {
-+ CURRENT_HIDDEN_PAGE = NULL;
-+ goto out_release;
-+ }
-+ wait_on_page(CURRENT_HIDDEN_PAGE);
-+ if (!Page_Uptodate(CURRENT_HIDDEN_PAGE)) {
-+ err = -EIO;
-+ goto out_release;
-+ }
-+ }
-+ }
-+
-+ /* map pages, get their addresses */
-+ page_data = (char *) kmap(page);
-+ FOR_EACH_PAGE
-+ CURRENT_HIDDEN_PAGEDATA = (char *) kmap(CURRENT_HIDDEN_PAGE);
-+
-+ /* if decode_block could fail, then return error */
-+ err = 0;
-+ real_size = hidden_inode->i_size - (page->index << PAGE_CACHE_SHIFT);
-+ if (real_size <= 0)
-+ memset(page_data, 0, PAGE_CACHE_SIZE);
-+ else if (real_size < PAGE_CACHE_SIZE) {
-+ mini_fo_decode_block(hidden_page_data, page_data, real_size, inode, inode->i_sb, page->index);
-+ memset(page_data + real_size, 0, PAGE_CACHE_SIZE - real_size);
-+ } else
-+ mini_fo_decode_block(hidden_page_data, page_data, PAGE_CACHE_SIZE, inode, inode->i_sb, page->index);
-+
-+ FOR_EACH_PAGE
-+ kunmap(CURRENT_HIDDEN_PAGE);
-+ kunmap(page);
-+
-+ out_release:
-+ FOR_EACH_PAGE
-+ if (CURRENT_HIDDEN_PAGE)
-+ page_cache_release(CURRENT_HIDDEN_PAGE); /* undo read_cache_page */
-+
-+ FREE_PAGE_POINTERS(hidden_pages, num_hidden_pages);
-+ FREE_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages);
-+
-+ out:
-+ if (err == 0)
-+ SetPageUptodate(page);
-+ else
-+ ClearPageUptodate(page);
-+
-+ print_exit_status(err);
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_readpage(file_t *file, page_t *page)
-+{
-+ int err;
-+ print_entry_location();
-+
-+ err = mini_fo_do_readpage(file, page);
-+
-+ /*
-+ * we have to unlock our page, b/c we _might_ have gotten a locked page.
-+ * but we no longer have to wakeup on our page here, b/c UnlockPage does
-+ * it
-+ */
-+ UnlockPage(page);
-+
-+ print_exit_status(err);
-+ return err;
-+}
-+
-+
-+STATIC int
-+mini_fo_prepare_write(file_t *file, page_t *page, unsigned from, unsigned to)
-+{
-+ int err = 0;
-+
-+ print_entry_location();
-+
-+ /*
-+ * we call kmap(page) only here, and do the kunmap
-+ * and the actual downcalls, including unlockpage and uncache
-+ * in commit_write.
-+ */
-+ kmap(page);
-+
-+ /* fast path for whole page writes */
-+ if (from == 0 && to == PAGE_CACHE_SIZE)
-+ goto out;
-+ /* read the page to "revalidate" our data */
-+ /* call the helper function which doesn't unlock the page */
-+ if (!Page_Uptodate(page))
-+ err = mini_fo_do_readpage(file, page);
-+
-+ out:
-+ print_exit_status(err);
-+ return err;
-+}
-+
-+
-+
-+STATIC int
-+mini_fo_commit_write(file_t *file, page_t *page, unsigned from, unsigned to)
-+{
-+ int err = -ENOMEM;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+ page_t *hidden_page;
-+ file_t *hidden_file = NULL;
-+ loff_t pos;
-+ unsigned bytes = to - from;
-+ unsigned hidden_from, hidden_to, hidden_bytes;
-+
-+ print_entry_location();
-+
-+ inode = page->mapping->host; /* CPW: Moved below print_entry_location */
-+ hidden_inode = itohi(inode);
-+
-+ ASSERT(file != NULL);
-+ /*
-+ * here we have a kmapped page, with data from the user copied
-+ * into it. we need to encode_block it, and then call the lower
-+ * commit_write. We also need to simulate same behavior of
-+ * generic_file_write, and call prepare_write on the lower f/s first.
-+ */
-+#ifdef FIST_COUNT_WRITES
-+ count_writes++;
-+# endif /* FIST_COUNT_WRITES */
-+
-+ /* this is append and/or extend -- we can't have holes so fill them in */
-+ if (page->index > (hidden_inode->i_size >> PAGE_CACHE_SHIFT)) {
-+ page_t *tmp_page;
-+ int index;
-+ for (index = hidden_inode->i_size >> PAGE_CACHE_SHIFT; index < page->index; index++) {
-+ tmp_page = mini_fo_get1page(file, index);
-+ if (IS_ERR(tmp_page)) {
-+ err = PTR_ERR(tmp_page);
-+ goto out;
-+ }
-+ /* zero out the contents of the page at the appropriate offsets */
-+ memset((char*)page_address(tmp_page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, PAGE_CACHE_SIZE - (inode->i_size & ~PAGE_CACHE_MASK));
-+ if (!(err = mini_fo_prepare_write(file, tmp_page, 0, PAGE_CACHE_SIZE)))
-+ err = mini_fo_commit_write(file, tmp_page, 0, PAGE_CACHE_SIZE);
-+ page_cache_release(tmp_page);
-+ if (err < 0)
-+ goto out;
-+ if (current->need_resched)
-+ schedule();
-+ }
-+ }
-+
-+ if (ftopd(file) != NULL)
-+ hidden_file = ftohf(file);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_inode->i_mutex);
-+#else
-+ down(&hidden_inode->i_sem);
-+#endif
-+ /* find lower page (returns a locked page) */
-+ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
-+ if (!hidden_page)
-+ goto out;
-+
-+#if FIST_ENCODING_BLOCKSIZE > 1
-+# error encoding_blocksize greater than 1 is not yet supported
-+# endif /* FIST_ENCODING_BLOCKSIZE > 1 */
-+
-+ hidden_from = from & (~(FIST_ENCODING_BLOCKSIZE - 1));
-+ hidden_to = ((to + FIST_ENCODING_BLOCKSIZE - 1) & (~(FIST_ENCODING_BLOCKSIZE - 1)));
-+ if ((page->index << PAGE_CACHE_SHIFT) + to > hidden_inode->i_size) {
-+
-+ /*
-+ * if this call to commit_write had introduced holes and the code
-+ * for handling holes was invoked, then the beginning of this page
-+ * must be zeroed out
-+ * zero out bytes from 'size_of_file%pagesize' to 'from'.
-+ */
-+ if ((hidden_from - (inode->i_size & ~PAGE_CACHE_MASK)) > 0)
-+ memset((char*)page_address(page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, hidden_from - (inode->i_size & ~PAGE_CACHE_MASK));
-+
-+ }
-+ hidden_bytes = hidden_to - hidden_from;
-+
-+ /* call lower prepare_write */
-+ err = -EINVAL;
-+ if (hidden_inode->i_mapping &&
-+ hidden_inode->i_mapping->a_ops &&
-+ hidden_inode->i_mapping->a_ops->prepare_write)
-+ err = hidden_inode->i_mapping->a_ops->prepare_write(hidden_file,
-+ hidden_page,
-+ hidden_from,
-+ hidden_to);
-+ if (err)
-+ /* don't leave locked pages behind, esp. on an ENOSPC */
-+ goto out_unlock;
-+
-+ fist_dprint(8, "%s: encoding %d bytes\n", __FUNCTION__, hidden_bytes);
-+ mini_fo_encode_block((char *) page_address(page) + hidden_from, (char*) page_address(hidden_page) + hidden_from, hidden_bytes, inode, inode->i_sb, page->index);
-+ /* if encode_block could fail, then goto unlock and return error */
-+
-+ /* call lower commit_write */
-+ err = hidden_inode->i_mapping->a_ops->commit_write(hidden_file,
-+ hidden_page,
-+ hidden_from,
-+ hidden_to);
-+
-+ if (err < 0)
-+ goto out_unlock;
-+
-+ err = bytes; /* convert error to no. of bytes */
-+
-+ inode->i_blocks = hidden_inode->i_blocks;
-+ /* we may have to update i_size */
-+ pos = (page->index << PAGE_CACHE_SHIFT) + to;
-+ if (pos > inode->i_size)
-+ inode->i_size = pos;
-+
-+ /*
-+ * update mtime and ctime of lower level file system
-+ * mini_fo' mtime and ctime are updated by generic_file_write
-+ */
-+ hidden_inode->i_mtime = hidden_inode->i_ctime = CURRENT_TIME;
-+
-+ mark_inode_dirty_sync(inode);
-+
-+ out_unlock:
-+ UnlockPage(hidden_page);
-+ page_cache_release(hidden_page);
-+ kunmap(page); /* kmap was done in prepare_write */
-+ out:
-+ /* we must set our page as up-to-date */
-+ if (err < 0)
-+ ClearPageUptodate(page);
-+ else
-+ SetPageUptodate(page);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_inode->i_mutex);
-+#else
-+ up(&hidden_inode->i_sem);
-+#endif
-+ print_exit_status(err);
-+ return err; /* assume all is ok */
-+}
-+
-+
-+STATIC int
-+mini_fo_bmap(struct address_space *mapping, long block)
-+{
-+ int err = 0;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+
-+ print_entry_location();
-+
-+ inode = (inode_t *) mapping->host;
-+ hidden_inode = itohi(inode);
-+
-+ if (hidden_inode->i_mapping->a_ops->bmap)
-+ err = hidden_inode->i_mapping->a_ops->bmap(hidden_inode->i_mapping, block);
-+ print_exit_location();
-+ return err;
-+}
-+
-+
-+/*
-+ * This function is copied verbatim from mm/filemap.c.
-+ * XXX: It should be simply moved to some header file instead -- bug Al about it!
-+ */
-+static inline int sync_page(struct page *page)
-+{
-+ struct address_space *mapping = page->mapping;
-+
-+ if (mapping && mapping->a_ops && mapping->a_ops->sync_page)
-+ return mapping->a_ops->sync_page(page);
-+ return 0;
-+}
-+
-+
-+/*
-+ * XXX: we may not need this function if not FIST_FILTER_DATA.
-+ * FIXME: for FIST_FILTER_SCA, get all lower pages and sync them each.
-+ */
-+STATIC int
-+mini_fo_sync_page(page_t *page)
-+{
-+ int err = 0;
-+ inode_t *inode;
-+ inode_t *hidden_inode;
-+ page_t *hidden_page;
-+
-+ print_entry_location();
-+
-+ inode = page->mapping->host; /* CPW: Moved below print_entry_location */
-+ hidden_inode = itohi(inode);
-+
-+ /* find lower page (returns a locked page) */
-+ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
-+ if (!hidden_page)
-+ goto out;
-+
-+ err = sync_page(hidden_page);
-+
-+ UnlockPage(hidden_page); /* b/c grab_cache_page locked it */
-+ page_cache_release(hidden_page); /* b/c grab_cache_page increased refcnt */
-+
-+ out:
-+ print_exit_status(err);
-+ return err;
-+}
-diff -urN linux-2.6.19.old/fs/mini_fo/README linux-2.6.19.dev/fs/mini_fo/README
---- linux-2.6.19.old/fs/mini_fo/README 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/README 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,163 @@
-+README for the mini_fo overlay file system
-+=========================================
-+
-+
-+WHAT IS MINI_FO?
-+----------------
-+
-+mini_fo is a virtual kernel file system that can make read-only
-+file systems writable. This is done by redirecting modifying operations
-+to a writeable location called "storage directory", and leaving the
-+original data in the "base directory" untouched. When reading, the
-+file system merges the modifed and original data so that only the
-+newest versions will appear. This occurs transparently to the user,
-+who can access the data like on any other read-write file system.
-+
-+Base and storage directories may be located on the same or on
-+different partitions and may be of different file system types. While
-+the storage directory obviously needs to be writable, the base may or
-+may not be writable, what doesn't matter as it will no be modified
-+anyway.
-+
-+
-+WHAT IS GOOD FOR?
-+-----------------
-+
-+The primary purpose of the mini_fo file system is to allow easy
-+software updates to embedded systems, that often store their root
-+file system in a read-only flash file system, but there are many
-+more as for example sandboxing, or for allowing live-cds to
-+permanently store information.
-+
-+
-+BUILDING
-+--------
-+This should be simple. Adjust the Makefile to point to the correct
-+kernel headers you want to build the module for. Then:
-+
-+ # make
-+
-+should build "mini_fo.o" for a 2.4 kernel or "mini_fo.ko" for a 2.6
-+kernel.
-+
-+If you are building the module for you current kernel, you can install
-+the module (as root):
-+
-+ # make install
-+
-+or uninstall with
-+
-+ # make uninstall
-+
-+
-+USING THE FILE SYSTEM
-+--------------------
-+
-+the general mount syntax is:
-+
-+ mount -t mini_fo -o base=<base directory>,sto=<storage directory>\
-+ <base directory> <mount point>
-+
-+Example:
-+
-+You have mounted a cdrom to /mnt/cdrom and want to modifiy some files
-+on it:
-+
-+load the module (as root)
-+
-+ # insmod mini_fo.o for a 2.4 kernel or
-+
-+ # insmod mini_fo.ko for a 2.6 kernel
-+
-+
-+create a storage dir in tmp and a mountpoint for mini_fo:
-+
-+ # mkdir /tmp/sto
-+ # mkdir /mnt/mini_fo
-+
-+and mount the mini_fo file system:
-+
-+ # mount -t mini_fo -o base=/mnt/cdrom,sto=/tmp/sto /mnt/cdrom /mnt/mini_fo
-+
-+
-+Now the data stored on the cd can be accessed via the mini_fo
-+mountpoint just like any read-write file system, files can be modified
-+and deleted, new ones can be created and so on. When done unmount the
-+file system:
-+
-+ # unmount /mnt/mini_fo
-+
-+Note that if the file system is mounted again using the same storage
-+file system, of course it will appear in the modified state again. If
-+you remount it using an new empty storage directory, it will be
-+unmodified. Therefore by executing:
-+
-+ # cd /tmp/sto
-+ # rm -rf *
-+
-+you can nuke all the changes you made to the original file system. But
-+ remember NEVER do this while the mini_fo file system is mounted!
-+
-+
-+Alternatively you can use the mini_fo-overlay bash script, that
-+simplifies managing mini_fo mounts. See TOOLS Section.
-+
-+
-+TOOLS
-+-----
-+
-+mini_fo-merge (experimental):
-+
-+This is a bash script that will merge changes contained in the storage
-+directory back to the base directory. This allows mini_fo to function
-+as a cache file system by overlaying a slow (network, ...) file system
-+and using a fast (ramdisk, ...) as storage. When done, changes can be
-+merged back to the (slow) base with mini_fo-merge. See "mini_fo-merge
-+-h" for details.
-+
-+It can be usefull for merging changes back after a successfull test
-+(patches, software updates...)
-+
-+
-+mini_fo-overlay:
-+
-+This bash script simplifies managing one or more mini_fo mounts. For
-+overlaying a directory called "basedir1", you can just call:
-+
-+ # mini_fo-overlay basedir1
-+
-+This will mount mini_fo with "basedir1" as base, "/tmp/sto-basedir1/"
-+as storage to "/mnt/mini_fo-basedir1/". It has more options though,
-+type "mini_fo-overlay -h" for details.
-+
-+
-+DOCUMENTATION, REPORTING BUGS, GETTING HELP
-+-------------------------------------------
-+
-+Please visit the mini_fo project page at:
-+
-+http://www.denx.de/twiki/bin/view/Know/MiniFOHome
-+
-+
-+WARNINGS
-+--------
-+
-+Never modify the base or the storage directorys while the mini_fo
-+file system is mounted, or you might crash you system. Simply accessing
-+and reading should not cause any trouble.
-+
-+Exporting a mini_fo mount point via NFS has not been tested, and may
-+or may not work.
-+
-+Check the RELEASE_NOTES for details on bugs and features.
-+
-+
-+
-+Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+
-+This program is free software; you can redistribute it and/or
-+modify it under the terms of the GNU General Public License
-+as published by the Free Software Foundation; either version
-+2 of the License, or (at your option) any later version.
-+
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/RELEASE_NOTES linux-2.6.19.dev/fs/mini_fo/RELEASE_NOTES
---- linux-2.6.19.old/fs/mini_fo/RELEASE_NOTES 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/RELEASE_NOTES 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,111 @@
-+Release: mini_fo-0.6.1 (v0-6-1)
-+Date: 21.09.2005
-+
-+
-+Changes:
-+--------
-+v0-6-1:
-+
-+- bugfixes (see ChangeLog)
-+
-+- two helper scripts "mini_fo_merge" and "mini_fo_overlay" (see
-+ README for details).
-+
-+v0-6-0:
-+
-+- Support for 2.4 and 2.6 (see Makefile)
-+
-+- Partial hard link support (creating works as expected, but already
-+ existing links in the base file system will be treated as if they
-+ were individual files).
-+
-+- Various bugfixes and cleanups.
-+
-+
-+v0-6-0-pre1:
-+
-+- This is mini_fo-0-6-0-pre1! This release is a complete rewrite of
-+ many vital mini_fo parts such as the old whiteout list code which
-+ has been replaced by the new META subsystem.
-+
-+- Light weight directory renaming implemented. This means if a
-+ directory is renamed via the mini_fo filesystem this will no longer
-+ result in a complete copy in storage, instead only one empty
-+ directory will be created. All base filed contained in the original
-+ directory stay there until modified.
-+
-+- Special files (creating, renaming, deleting etc.) now working.
-+
-+- Many bugfixes and cleanup, mini_fo is now a lot more stable.
-+
-+
-+v0-5-10:
-+
-+- Final release of the 0-5-* versions. Next will be a complete rewrite
-+ of many features. This release contains several bugfixes related to
-+ directory renaming.
-+
-+
-+v0-5-10-pre6:
-+
-+- Lots of cleanup and several bugfixes related to directory deleting
-+
-+- Directory renaming suddenly works, what is most likely due to the
-+ fact tha that "mv" is smart: if the classic rename doesn't work it
-+ will assume that source and target file are on different fs and will
-+ copy the directory and try to remove the source directory. Until
-+ directory removing wasn't implemented, it would fail to do this and
-+ rollback.
-+ So, directory renaming works for now, but it doesn't yet do what you
-+ would expect from a overlay fs, so use with care.
-+
-+
-+v0-5-10-pre5:
-+
-+- implemented directory deleting
-+- made parsing of mount options more stable
-+- New format of mount options! (See README)
-+- I can't reproduce the unknown panic with 2.4.25 anymore, so I'll
-+ happily assume it never existed!
-+
-+
-+Implemented features:
-+---------------------
-+
-+- creating hard links (see BUGS on already existing hard links)
-+- lightweight directory renaming
-+- renaming device files, pipes, sockets, etc.
-+- creating, renaming, deleting of special files
-+- deleting directorys
-+- general directory reading (simple "ls" )
-+- creating files in existing directorys
-+- creating directorys
-+- renaming files.
-+- reading and writing files (involves opening)
-+- appending to files (creates copy in storage)
-+- deleting files
-+- llseek works too, what allows editors to work
-+- persistency (a deleted file stay deleted over remounts)
-+- use of symbolic links
-+- creating of device files
-+
-+
-+Not (yet) implemented features:
-+-------------------------------
-+
-+- full hard link support.
-+
-+
-+
-+BUGS:
-+-----
-+
-+Hard links in the base file system will be treated as individual
-+files, not as links to one inode.
-+
-+The main problem with hard links isn't allowing to create them, but
-+their pure existence. If you modify a base hard link, the changes made
-+will only show up on this link, the other link will remain in the
-+original state. I hope to fix this someday. Please note that this does
-+not effect the special hard links '.' and '..', that are handled
-+seperately by the lower fs.
-diff -urN linux-2.6.19.old/fs/mini_fo/state.c linux-2.6.19.dev/fs/mini_fo/state.c
---- linux-2.6.19.old/fs/mini_fo/state.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/state.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,620 @@
-+/*
-+ * Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif /* HAVE_CONFIG_H */
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+
-+/* create the storage file, setup new states */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+int create_sto_reg_file(dentry_t *dentry, int mode, struct nameidata *nd)
-+#else
-+int create_sto_reg_file(dentry_t *dentry, int mode)
-+#endif
-+{
-+ int err = 0;
-+ inode_t *dir;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ if(exists_in_storage(dentry)) {
-+ printk(KERN_CRIT "mini_fo: create_sto_file: wrong type or state.\n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+ err = get_neg_sto_dentry(dentry);
-+
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR getting neg. sto dentry.\n");
-+ goto out;
-+ }
-+
-+ dir = dentry->d_parent->d_inode;
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* lock parent */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ err = PTR_ERR(hidden_sto_dir_dentry);
-+ if (IS_ERR(hidden_sto_dir_dentry))
-+ goto out;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err = vfs_create(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ mode, nd);
-+#else
-+ err = vfs_create(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ mode);
-+#endif
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR creating sto file.\n");
-+ goto out_lock;
-+ }
-+
-+ if(!dtohd2(dentry)->d_inode) {
-+ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR creating sto file [2].\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+
-+ /* interpose the new inode */
-+ if(dtost(dentry) == DELETED) {
-+ dtost(dentry) = DEL_REWRITTEN;
-+ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtost(dentry) == NON_EXISTANT) {
-+ dtost(dentry) = CREATED;
-+ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtost(dentry) == UNMODIFIED) {
-+ dtost(dentry) = MODIFIED;
-+ /* interpose on new inode */
-+ if(itohi2(dentry->d_inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo: create_sto_file: invalid inode detected.\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
-+ }
-+ fist_copy_attr_timesizes(dentry->d_parent->d_inode,
-+ hidden_sto_dir_dentry->d_inode);
-+
-+ out_lock:
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ out:
-+ return err;
-+}
-+
-+/* create the sto dir, setup states */
-+int create_sto_dir(dentry_t *dentry, int mode)
-+{
-+ int err = 0;
-+ inode_t *dir;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ /* had to take the "!S_ISDIR(mode))" check out, because it failed */
-+ if(exists_in_storage(dentry)) {
-+ printk(KERN_CRIT "mini_fo: create_sto_dir: wrong type or state.\\
-+n");
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ err = get_neg_sto_dentry(dentry);
-+ if(err) {
-+ err = -EINVAL;
-+ goto out;
-+ }
-+
-+ dir = dentry->d_parent->d_inode;
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ err = PTR_ERR(hidden_sto_dir_dentry);
-+ if (IS_ERR(hidden_sto_dir_dentry))
-+ goto out;
-+
-+ err = vfs_mkdir(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ mode);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR creating sto dir.\n");
-+ goto out_lock;
-+ }
-+
-+ if(!dtohd2(dentry)->d_inode) {
-+ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR creating sto dir [2].\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+
-+ /* interpose the new inode */
-+ if(dtost(dentry) == DELETED) {
-+ dtost(dentry) = DEL_REWRITTEN;
-+ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtopd(dentry)->state == NON_EXISTANT) {
-+ dtopd(dentry)->state = CREATED;
-+ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtopd(dentry)->state == UNMODIFIED) {
-+ dtopd(dentry)->state = MODIFIED;
-+ /* interpose on new inode */
-+ if(itohi2(dentry->d_inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR, invalid inode detected.\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
-+ }
-+
-+ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
-+
-+ /* initalize the wol list */
-+ itopd(dentry->d_inode)->deleted_list_size = -1;
-+ itopd(dentry->d_inode)->renamed_list_size = -1;
-+ meta_build_lists(dentry);
-+
-+
-+ out_lock:
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ out:
-+ return err;
-+}
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+int create_sto_nod(dentry_t *dentry, int mode, dev_t dev)
-+#else
-+int create_sto_nod(dentry_t *dentry, int mode, int dev)
-+#endif
-+{
-+ int err = 0;
-+ inode_t *dir;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ if(exists_in_storage(dentry)) {
-+ err = -EEXIST;
-+ goto out;
-+ }
-+ err = get_neg_sto_dentry(dentry);
-+
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo: create_sto_nod: ERROR getting neg. sto dentry.\n");
-+ goto out;
-+ }
-+
-+ dir = dentry->d_parent->d_inode;
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* lock parent */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ err = PTR_ERR(hidden_sto_dir_dentry);
-+ if (IS_ERR(hidden_sto_dir_dentry))
-+ goto out;
-+
-+ err = vfs_mknod(hidden_sto_dir_dentry->d_inode, hidden_sto_dentry, mode, dev);
-+ if(err)
-+ goto out_lock;
-+
-+ if(!dtohd2(dentry)->d_inode) {
-+ printk(KERN_CRIT "mini_fo: create_sto_nod: creating storage inode failed [1].\n");
-+ err = -EINVAL; /* return something indicating failure */
-+ goto out_lock;
-+ }
-+
-+ /* interpose the new inode */
-+ if(dtost(dentry) == DELETED) {
-+ dtost(dentry) = DEL_REWRITTEN;
-+ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtost(dentry) == NON_EXISTANT) {
-+ dtost(dentry) = CREATED;
-+ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
-+ if(err)
-+ goto out_lock;
-+ }
-+ else if(dtost(dentry) == UNMODIFIED) {
-+ dtost(dentry) = MODIFIED;
-+ /* interpose on new inode */
-+ if(itohi2(dentry->d_inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo: create_sto_nod: error, invalid inode detected.\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
-+ }
-+
-+ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
-+
-+ out_lock:
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ out:
-+ return err;
-+}
-+
-+
-+/* unimplemented (and possibly not usefull):
-+
-+ nondir-del_to_del_rew
-+ nondir-non_exist_to_creat
-+
-+ dir-unmod_to_del
-+ dir-mod_to_del
-+ dir-creat_to_del
-+ dir-del_rew_to_del
-+ dir-del_to_del_rew
-+ dir-non_exist_to_creat
-+*/
-+
-+
-+/* bring a file of any type from state UNMODIFIED to MODIFIED */
-+int nondir_unmod_to_mod(dentry_t *dentry, int cp_flag)
-+{
-+ int err = 0;
-+ struct vfsmount *tgt_mnt;
-+ struct vfsmount *src_mnt;
-+ dentry_t *tgt_dentry;
-+ dentry_t *src_dentry;
-+ dentry_t *hidden_sto_dentry;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if((dtost(dentry) != UNMODIFIED) ||
-+ S_ISDIR(dentry->d_inode->i_mode)) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
-+ wrong type or state.\n");
-+ err = -1;
-+ goto out;
-+ }
-+ err = get_neg_sto_dentry(dentry);
-+
-+ if (err) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
-+ ERROR getting neg. sto dentry.\n");
-+ goto out;
-+ }
-+
-+ /* create sto file */
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* lock parent */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ err = PTR_ERR(hidden_sto_dir_dentry);
-+ if (IS_ERR(hidden_sto_dir_dentry))
-+ goto out;
-+
-+ /* handle different types of nondirs */
-+ if(S_ISCHR(dentry->d_inode->i_mode) ||
-+ S_ISBLK(dentry->d_inode->i_mode)) {
-+ err = vfs_mknod(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ dtohd(dentry)->d_inode->i_mode,
-+ dtohd(dentry)->d_inode->i_rdev);
-+ }
-+
-+ else if(S_ISREG(dentry->d_inode->i_mode)) {
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ err = vfs_create(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ dtohd(dentry)->d_inode->i_mode, NULL);
-+#else
-+ err = vfs_create(hidden_sto_dir_dentry->d_inode,
-+ hidden_sto_dentry,
-+ dtohd(dentry)->d_inode->i_mode);
-+#endif
-+ }
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
-+ ERROR creating sto file.\n");
-+ goto out_lock;
-+ }
-+
-+ /* interpose on new inode */
-+ if(itohi2(dentry->d_inode) != NULL) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
-+ ERROR, invalid inode detected.\n");
-+ err = -EINVAL;
-+ goto out_lock;
-+ }
-+
-+ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
-+
-+ fist_copy_attr_timesizes(dentry->d_parent->d_inode,
-+ hidden_sto_dir_dentry->d_inode);
-+ dtost(dentry) = MODIFIED;
-+
-+ /* copy contents if regular file and cp_flag = 1 */
-+ if((cp_flag == 1) && S_ISREG(dentry->d_inode->i_mode)) {
-+
-+ /* unlock first */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ dput(hidden_sto_dir_dentry);
-+
-+ tgt_dentry = dtohd2(dentry);
-+ tgt_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt2;
-+ src_dentry = dtohd(dentry);
-+ src_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt;
-+
-+ err = mini_fo_cp_cont(tgt_dentry, tgt_mnt,
-+ src_dentry, src_mnt);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
-+ ERROR copying contents.\n");
-+ }
-+ goto out;
-+ }
-+
-+ out_lock:
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+ out:
-+ return err;
-+}
-+
-+/* this function is currently identical to nondir_creat_to_del */
-+int nondir_del_rew_to_del(dentry_t *dentry)
-+{
-+ return nondir_creat_to_del(dentry);
-+}
-+
-+int nondir_creat_to_del(dentry_t *dentry)
-+{
-+ int err = 0;
-+
-+ inode_t *hidden_sto_dir_inode;
-+ dentry_t *hidden_sto_dir_dentry;
-+ dentry_t *hidden_sto_dentry;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ /* for now this function serves for both state DEL_REWRITTEN and
-+ * CREATED */
-+ if(!(dtost(dentry) == CREATED || (dtost(dentry) == DEL_REWRITTEN)) ||
-+ S_ISDIR(dentry->d_inode->i_mode)) {
-+ printk(KERN_CRIT "mini_fo: nondir_mod_to_del/del_rew_to_del: \
-+ wrong type or state.\n");
-+ err = -1;
-+ goto out;
-+ }
-+
-+ hidden_sto_dir_inode = itohi2(dentry->d_parent->d_inode);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ /* avoid destroying the hidden inode if the file is in use */
-+ dget(hidden_sto_dentry);
-+ err = vfs_unlink(hidden_sto_dir_inode, hidden_sto_dentry);
-+ dput(hidden_sto_dentry);
-+ if(!err)
-+ d_delete(hidden_sto_dentry);
-+
-+ /* propagate number of hard-links */
-+ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
-+
-+ dtost(dentry) = NON_EXISTANT;
-+
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+
-+ out:
-+ return err;
-+}
-+
-+int nondir_mod_to_del(dentry_t *dentry)
-+{
-+ int err;
-+ dentry_t *hidden_sto_dentry;
-+ inode_t *hidden_sto_dir_inode;
-+ dentry_t *hidden_sto_dir_dentry;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(dtost(dentry) != MODIFIED ||
-+ S_ISDIR(dentry->d_inode->i_mode)) {
-+ printk(KERN_CRIT "mini_fo: nondir_mod_to_del: \
-+ wrong type or state.\n");
-+ err = -1;
-+ goto out;
-+ }
-+
-+ hidden_sto_dir_inode = itohi2(dentry->d_parent->d_inode);
-+ hidden_sto_dentry = dtohd2(dentry);
-+
-+ /* was hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
-+ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ down(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+
-+ /* avoid destroying the hidden inode if the file is in use */
-+ dget(hidden_sto_dentry);
-+ err = vfs_unlink(hidden_sto_dir_inode, hidden_sto_dentry);
-+ dput(hidden_sto_dentry);
-+ if(!err)
-+ d_delete(hidden_sto_dentry);
-+
-+ /* propagate number of hard-links */
-+ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
-+
-+ /* dput base dentry, this will relase the inode and free the
-+ * dentry, as we will never need it again. */
-+ dput(dtohd(dentry));
-+ dtohd(dentry) = NULL;
-+ dtost(dentry) = DELETED;
-+
-+ /* add deleted file to META-file */
-+ meta_add_d_entry(dentry->d_parent,
-+ dentry->d_name.name,
-+ dentry->d_name.len);
-+
-+ /* was: unlock_dir(hidden_sto_dir_dentry); */
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
-+ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
-+#else
-+ up(&hidden_sto_dir_dentry->d_inode->i_sem);
-+#endif
-+ dput(hidden_sto_dir_dentry);
-+
-+ out:
-+ return err;
-+}
-+
-+int nondir_unmod_to_del(dentry_t *dentry)
-+{
-+ int err = 0;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(dtost(dentry) != UNMODIFIED ||
-+ S_ISDIR(dentry->d_inode->i_mode)) {
-+ printk(KERN_CRIT "mini_fo: nondir_unmod_to_del: \
-+ wrong type or state.\n");
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* next we have to get a negative dentry for the storage file */
-+ err = get_neg_sto_dentry(dentry);
-+
-+ if(err)
-+ goto out;
-+
-+ /* add deleted file to META lists */
-+ err = meta_add_d_entry(dentry->d_parent,
-+ dentry->d_name.name,
-+ dentry->d_name.len);
-+
-+ if(err)
-+ goto out;
-+
-+ /* dput base dentry, this will relase the inode and free the
-+ * dentry, as we will never need it again. */
-+ dput(dtohd(dentry));
-+ dtohd(dentry) = NULL;
-+ dtost(dentry) = DELETED;
-+
-+ out:
-+ return err;
-+}
-+
-+/* bring a dir from state UNMODIFIED to MODIFIED */
-+int dir_unmod_to_mod(dentry_t *dentry)
-+{
-+ int err;
-+
-+ check_mini_fo_dentry(dentry);
-+
-+ if(dtost(dentry) != UNMODIFIED ||
-+ !S_ISDIR(dentry->d_inode->i_mode)) {
-+ printk(KERN_CRIT "mini_fo: dir_unmod_to_mod: \
-+ wrong type or state.\n");
-+ err = -1;
-+ goto out;
-+ }
-+
-+ /* this creates our dir incl. sto. structure */
-+ err = build_sto_structure(dentry->d_parent, dentry);
-+ if(err) {
-+ printk(KERN_CRIT "mini_fo: dir_unmod_to_mod: \
-+ build_sto_structure failed.\n");
-+ goto out;
-+ }
-+ out:
-+ return err;
-+}
-+
-diff -urN linux-2.6.19.old/fs/mini_fo/super.c linux-2.6.19.dev/fs/mini_fo/super.c
---- linux-2.6.19.old/fs/mini_fo/super.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.dev/fs/mini_fo/super.c 2006-12-14 03:14:03.000000000 +0100
-@@ -0,0 +1,281 @@
-+/*
-+ * Copyright (c) 1997-2003 Erez Zadok
-+ * Copyright (c) 2001-2003 Stony Brook University
-+ *
-+ * For specific licensing information, see the COPYING file distributed with
-+ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
-+ *
-+ * This Copyright notice must be kept intact and distributed with all
-+ * fistgen sources INCLUDING sources generated by fistgen.
-+ */
-+/*
-+ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+/*
-+ * $Id$
-+ */
-+
-+#ifdef HAVE_CONFIG_H
-+# include <config.h>
-+#endif
-+
-+#include "fist.h"
-+#include "mini_fo.h"
-+
-+
-+STATIC void
-+mini_fo_read_inode(inode_t *inode)
-+{
-+ static struct address_space_operations mini_fo_empty_aops;
-+
-+ __itopd(inode) = kmalloc(sizeof(struct mini_fo_inode_info), GFP_KERNEL);
-+ if (!itopd(inode)) {
-+ printk("<0>%s:%s:%d: No kernel memory!\n", __FILE__, __FUNCTION__, __LINE__);
-+ ASSERT(NULL);
-+ }
-+ itohi(inode) = NULL;
-+ itohi2(inode) = NULL;
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+ inode->i_version++;
-+#else
-+ inode->i_version = ++event; /* increment inode version */
-+#endif
-+ inode->i_op = &mini_fo_main_iops;
-+ inode->i_fop = &mini_fo_main_fops;
-+#if 0
-+ /*
-+ * XXX: To export a file system via NFS, it has to have the
-+ * FS_REQUIRES_DEV flag, so turn it on. But should we inherit it from
-+ * the lower file system, or can we allow our file system to be exported
-+ * even if the lower one cannot be natively exported.
-+ */
-+ inode->i_sb->s_type->fs_flags |= FS_REQUIRES_DEV;
-+ /*
-+ * OK, the above was a hack, which is now turned off because it may
-+ * cause a panic/oops on some systems. The correct way to export a
-+ * "nodev" filesystem is via using nfs-utils > 1.0 and the "fsid=" export
-+ * parameter, which requires 2.4.20 or later.
-+ */
-+#endif
-+ /* I don't think ->a_ops is ever allowed to be NULL */
-+ inode->i_mapping->a_ops = &mini_fo_empty_aops;
-+}
-+
-+
-+#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
-+/*
-+ * No need to call write_inode() on the lower inode, as it
-+ * will have been marked 'dirty' anyway. But we might need
-+ * to write some of our own stuff to disk.
-+ */
-+STATIC void
-+mini_fo_write_inode(inode_t *inode, int sync)
-+{
-+ print_entry_location();
-+ print_exit_location();
-+}
-+#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
-+
-+
-+STATIC void
-+mini_fo_put_inode(inode_t *inode)
-+{
-+ /*
-+ * This is really funky stuff:
-+ * Basically, if i_count == 1, iput will then decrement it and this inode will be destroyed.
-+ * It is currently holding a reference to the hidden inode.
-+ * Therefore, it needs to release that reference by calling iput on the hidden inode.
-+ * iput() _will_ do it for us (by calling our clear_inode), but _only_ if i_nlink == 0.
-+ * The problem is, NFS keeps i_nlink == 1 for silly_rename'd files.
-+ * So we must for our i_nlink to 0 here to trick iput() into calling our clear_inode.
-+ */
-+ if (atomic_read(&inode->i_count) == 1)
-+ inode->i_nlink = 0;
-+}
-+
-+
-+#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
-+/*
-+ * we now define delete_inode, because there are two VFS paths that may
-+ * destroy an inode: one of them calls clear inode before doing everything
-+ * else that's needed, and the other is fine. This way we truncate the inode
-+ * size (and its pages) and then clear our own inode, which will do an iput
-+ * on our and the lower inode.
-+ */
-+STATIC void
-+mini_fo_delete_inode(inode_t *inode)
-+{
-+ print_entry_location();
-+
-+ fist_checkinode(inode, "mini_fo_delete_inode IN");
-+ inode->i_size = 0; /* every f/s seems to do that */
-+ clear_inode(inode);
-+
-+ print_exit_location();
-+}
-+#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
-+
-+
-+/* final actions when unmounting a file system */
-+STATIC void
-+mini_fo_put_super(super_block_t *sb)
-+{
-+ if (stopd(sb)) {
-+ mntput(stopd(sb)->hidden_mnt);
-+ mntput(stopd(sb)->hidden_mnt2);
-+
-+ /* mk: no! dput(stopd(sb)->base_dir_dentry);
-+ dput(stopd(sb)->storage_dir_dentry); */
-+
-+ kfree(stopd(sb));
-+ __stopd(sb) = NULL;
-+ }
-+}
-+
-+
-+#ifdef NOT_NEEDED
-+/*
-+ * This is called in do_umount before put_super.
-+ * The superblock lock is not held yet.
-+ * We probably do not need to define this or call write_super
-+ * on the hidden_sb, because sync_supers() will get to hidden_sb
-+ * sooner or later. But it is also called from file_fsync()...
-+ */
-+STATIC void
-+mini_fo_write_super(super_block_t *sb)
-+{
-+ return;
-+}
-+#endif /* NOT_NEEDED */
-+
-+
-+STATIC int
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+mini_fo_statfs(struct dentry *d, struct kstatfs *buf)
-+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-+mini_fo_statfs(super_block_t *sb, struct kstatfs *buf)
-+#else
-+mini_fo_statfs(super_block_t *sb, struct statfs *buf)
-+#endif
-+{
-+ int err = 0;
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+ struct dentry *hidden_d;
-+
-+ hidden_d = dtohd(d);
-+ err = vfs_statfs(hidden_d, buf);
-+#else
-+ super_block_t *hidden_sb;
-+
-+ hidden_sb = stohs(sb);
-+ err = vfs_statfs(hidden_sb, buf);
-+#endif
-+
-+ return err;
-+}
-+
-+
-+/*
-+ * XXX: not implemented. This is not allowed yet.
-+ * Should we call this on the hidden_sb? Probably not.
-+ */
-+STATIC int
-+mini_fo_remount_fs(super_block_t *sb, int *flags, char *data)
-+{
-+ //printk(KERN_CRIT "mini_fo_remount_fs: WARNING, this function is umimplemented.\n");
-+ return -ENOSYS;
-+}
-+
-+
-+/*
-+ * Called by iput() when the inode reference count reached zero
-+ * and the inode is not hashed anywhere. Used to clear anything
-+ * that needs to be, before the inode is completely destroyed and put
-+ * on the inode free list.
-+ */
-+STATIC void
-+mini_fo_clear_inode(inode_t *inode)
-+{
-+ /*
-+ * Decrement a reference to a hidden_inode, which was incremented
-+ * by our read_inode when it was created initially.
-+ */
-+
-+ /* release the wol_list */
-+ if(S_ISDIR(inode->i_mode)) {
-+ __meta_put_lists(inode);
-+ }
-+
-+ /* mk: fan out fun */
-+ if(itohi(inode))
-+ iput(itohi(inode));
-+ if(itohi2(inode))
-+ iput(itohi2(inode));
-+
-+ // XXX: why this assertion fails?
-+ // because it doesn't like us
-+ // ASSERT((inode->i_state & I_DIRTY) == 0);
-+ kfree(itopd(inode));
-+ __itopd(inode) = NULL;
-+}
-+
-+
-+/*
-+ * Called in do_umount() if the MNT_FORCE flag was used and this
-+ * function is defined. See comment in linux/fs/super.c:do_umount().
-+ * Used only in nfs, to kill any pending RPC tasks, so that subsequent
-+ * code can actually succeed and won't leave tasks that need handling.
-+ *
-+ * PS. I wonder if this is somehow useful to undo damage that was
-+ * left in the kernel after a user level file server (such as amd)
-+ * dies.
-+ */
-+STATIC void
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-+mini_fo_umount_begin(struct vfsmount *mnt, int flags)
-+{
-+ struct vfsmount *hidden_mnt;
-+
-+ hidden_mnt = stopd(mnt->mnt_sb)->hidden_mnt;
-+
-+ if (hidden_mnt->mnt_sb->s_op->umount_begin)
-+ hidden_mnt->mnt_sb->s_op->umount_begin(hidden_mnt, flags);
-+
-+}
-+#else
-+mini_fo_umount_begin(super_block_t *sb)
-+{
-+ super_block_t *hidden_sb;
-+
-+ hidden_sb = stohs(sb);
-+
-+ if (hidden_sb->s_op->umount_begin)
-+ hidden_sb->s_op->umount_begin(hidden_sb);
-+
-+}
-+#endif
-+
-+
-+struct super_operations mini_fo_sops =
-+{
-+ read_inode: mini_fo_read_inode,
-+#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
-+ write_inode: mini_fo_write_inode,
-+#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
-+ put_inode: mini_fo_put_inode,
-+#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
-+ delete_inode: mini_fo_delete_inode,
-+#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
-+ put_super: mini_fo_put_super,
-+ statfs: mini_fo_statfs,
-+ remount_fs: mini_fo_remount_fs,
-+ clear_inode: mini_fo_clear_inode,
-+ umount_begin: mini_fo_umount_begin,
-+};
+++ /dev/null
---- linux.old/include/linux/netdevice.h 2006-12-30 18:49:37.916951328 +0100
-+++ linux.dev/include/linux/netdevice.h 2006-12-30 18:49:49.573179312 +0100
-@@ -526,6 +526,8 @@
- struct class_device class_dev;
- /* space for optional statistics and wireless sysfs groups */
- struct attribute_group *sysfs_groups[3];
-+
-+ void *ieee80211_ptr;
- };
-
- #define NETDEV_ALIGN 32
+++ /dev/null
---- linux.old/drivers/mtd/devices/block2mtd.c 2007-02-01 20:13:47.147274772 +0100
-+++ linux/drivers/mtd/devices/block2mtd.c 2007-02-01 20:19:59.753034993 +0100
-@@ -40,7 +40,7 @@
- static LIST_HEAD(blkmtd_device_list);
-
-
--#define PAGE_READAHEAD 64
-+#define PAGE_READAHEAD 0
- static void cache_readahead(struct address_space *mapping, int index)
- {
- filler_t *filler = (filler_t*)mapping->a_ops->readpage;
+++ /dev/null
---- linux.dev/drivers/mtd/devices/block2mtd.c.old 2007-02-18 14:08:59.519952312 +0100
-+++ linux.dev/drivers/mtd/devices/block2mtd.c 2007-02-18 14:09:04.219237912 +0100
-@@ -111,7 +111,7 @@
- if (IS_ERR(page))
- return PTR_ERR(page);
-
-- max = (u_long*)page_address(page) + PAGE_SIZE;
-+ max = (u_long*) ((u8 *) page_address(page) + PAGE_SIZE);
- for (p=(u_long*)page_address(page); p<max; p++)
- if (*p != -1UL) {
- lock_page(page);
+++ /dev/null
-diff -urN linux.old/fs/Kconfig linux.dev/fs/Kconfig
---- linux.old/fs/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux.dev/fs/Kconfig 2006-12-14 04:21:47.000000000 +0100
-@@ -1202,6 +1202,8 @@
- To compile the EFS file system support as a module, choose M here: the
- module will be called efs.
-
-+source "fs/yaffs2/Kconfig"
-+
- config JFFS_FS
- tristate "Journalling Flash File System (JFFS) support"
- depends on MTD && BLOCK
-diff -urN linux.old/fs/Makefile linux.dev/fs/Makefile
---- linux.old/fs/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux.dev/fs/Makefile 2006-12-14 04:21:47.000000000 +0100
-@@ -114,3 +114,4 @@
- obj-$(CONFIG_DEBUG_FS) += debugfs/
- obj-$(CONFIG_OCFS2_FS) += ocfs2/
- obj-$(CONFIG_GFS2_FS) += gfs2/
-+obj-$(CONFIG_YAFFS_FS) += yaffs2/
-diff -urN linux.old/fs/yaffs2/devextras.h linux.dev/fs/yaffs2/devextras.h
---- linux.old/fs/yaffs2/devextras.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/devextras.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,265 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * devextras.h
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ * This file is just holds extra declarations used during development.
-+ * Most of these are from kernel includes placed here so we can use them in
-+ * applications.
-+ *
-+ * $Id: devextras.h,v 1.2 2005/08/11 02:37:49 marty Exp $
-+ *
-+ */
-+
-+#ifndef __EXTRAS_H__
-+#define __EXTRAS_H__
-+
-+#if defined WIN32
-+#define __inline__ __inline
-+#define new newHack
-+#endif
-+
-+#if !(defined __KERNEL__) || (defined WIN32)
-+
-+/* User space defines */
-+
-+typedef unsigned char __u8;
-+typedef unsigned short __u16;
-+typedef unsigned __u32;
-+
-+/*
-+ * Simple doubly linked list implementation.
-+ *
-+ * Some of the internal functions ("__xxx") are useful when
-+ * manipulating whole lists rather than single entries, as
-+ * sometimes we already know the next/prev entries and we can
-+ * generate better code by using them directly rather than
-+ * using the generic single-entry routines.
-+ */
-+
-+#define prefetch(x) 1
-+
-+struct list_head {
-+ struct list_head *next, *prev;
-+};
-+
-+#define LIST_HEAD_INIT(name) { &(name), &(name) }
-+
-+#define LIST_HEAD(name) \
-+ struct list_head name = LIST_HEAD_INIT(name)
-+
-+#define INIT_LIST_HEAD(ptr) do { \
-+ (ptr)->next = (ptr); (ptr)->prev = (ptr); \
-+} while (0)
-+
-+/*
-+ * Insert a new entry between two known consecutive entries.
-+ *
-+ * This is only for internal list manipulation where we know
-+ * the prev/next entries already!
-+ */
-+static __inline__ void __list_add(struct list_head *new,
-+ struct list_head *prev,
-+ struct list_head *next)
-+{
-+ next->prev = new;
-+ new->next = next;
-+ new->prev = prev;
-+ prev->next = new;
-+}
-+
-+/**
-+ * list_add - add a new entry
-+ * @new: new entry to be added
-+ * @head: list head to add it after
-+ *
-+ * Insert a new entry after the specified head.
-+ * This is good for implementing stacks.
-+ */
-+static __inline__ void list_add(struct list_head *new, struct list_head *head)
-+{
-+ __list_add(new, head, head->next);
-+}
-+
-+/**
-+ * list_add_tail - add a new entry
-+ * @new: new entry to be added
-+ * @head: list head to add it before
-+ *
-+ * Insert a new entry before the specified head.
-+ * This is useful for implementing queues.
-+ */
-+static __inline__ void list_add_tail(struct list_head *new,
-+ struct list_head *head)
-+{
-+ __list_add(new, head->prev, head);
-+}
-+
-+/*
-+ * Delete a list entry by making the prev/next entries
-+ * point to each other.
-+ *
-+ * This is only for internal list manipulation where we know
-+ * the prev/next entries already!
-+ */
-+static __inline__ void __list_del(struct list_head *prev,
-+ struct list_head *next)
-+{
-+ next->prev = prev;
-+ prev->next = next;
-+}
-+
-+/**
-+ * list_del - deletes entry from list.
-+ * @entry: the element to delete from the list.
-+ * Note: list_empty on entry does not return true after this, the entry is
-+ * in an undefined state.
-+ */
-+static __inline__ void list_del(struct list_head *entry)
-+{
-+ __list_del(entry->prev, entry->next);
-+}
-+
-+/**
-+ * list_del_init - deletes entry from list and reinitialize it.
-+ * @entry: the element to delete from the list.
-+ */
-+static __inline__ void list_del_init(struct list_head *entry)
-+{
-+ __list_del(entry->prev, entry->next);
-+ INIT_LIST_HEAD(entry);
-+}
-+
-+/**
-+ * list_empty - tests whether a list is empty
-+ * @head: the list to test.
-+ */
-+static __inline__ int list_empty(struct list_head *head)
-+{
-+ return head->next == head;
-+}
-+
-+/**
-+ * list_splice - join two lists
-+ * @list: the new list to add.
-+ * @head: the place to add it in the first list.
-+ */
-+static __inline__ void list_splice(struct list_head *list,
-+ struct list_head *head)
-+{
-+ struct list_head *first = list->next;
-+
-+ if (first != list) {
-+ struct list_head *last = list->prev;
-+ struct list_head *at = head->next;
-+
-+ first->prev = head;
-+ head->next = first;
-+
-+ last->next = at;
-+ at->prev = last;
-+ }
-+}
-+
-+/**
-+ * list_entry - get the struct for this entry
-+ * @ptr: the &struct list_head pointer.
-+ * @type: the type of the struct this is embedded in.
-+ * @member: the name of the list_struct within the struct.
-+ */
-+#define list_entry(ptr, type, member) \
-+ ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
-+
-+/**
-+ * list_for_each - iterate over a list
-+ * @pos: the &struct list_head to use as a loop counter.
-+ * @head: the head for your list.
-+ */
-+#define list_for_each(pos, head) \
-+ for (pos = (head)->next, prefetch(pos->next); pos != (head); \
-+ pos = pos->next, prefetch(pos->next))
-+
-+/**
-+ * list_for_each_safe - iterate over a list safe against removal
-+ * of list entry
-+ * @pos: the &struct list_head to use as a loop counter.
-+ * @n: another &struct list_head to use as temporary storage
-+ * @head: the head for your list.
-+ */
-+#define list_for_each_safe(pos, n, head) \
-+ for (pos = (head)->next, n = pos->next; pos != (head); \
-+ pos = n, n = pos->next)
-+
-+/*
-+ * File types
-+ */
-+#define DT_UNKNOWN 0
-+#define DT_FIFO 1
-+#define DT_CHR 2
-+#define DT_DIR 4
-+#define DT_BLK 6
-+#define DT_REG 8
-+#define DT_LNK 10
-+#define DT_SOCK 12
-+#define DT_WHT 14
-+
-+#ifndef WIN32
-+#include <sys/stat.h>
-+#endif
-+
-+/*
-+ * Attribute flags. These should be or-ed together to figure out what
-+ * has been changed!
-+ */
-+#define ATTR_MODE 1
-+#define ATTR_UID 2
-+#define ATTR_GID 4
-+#define ATTR_SIZE 8
-+#define ATTR_ATIME 16
-+#define ATTR_MTIME 32
-+#define ATTR_CTIME 64
-+#define ATTR_ATIME_SET 128
-+#define ATTR_MTIME_SET 256
-+#define ATTR_FORCE 512 /* Not a change, but a change it */
-+#define ATTR_ATTR_FLAG 1024
-+
-+struct iattr {
-+ unsigned int ia_valid;
-+ unsigned ia_mode;
-+ unsigned ia_uid;
-+ unsigned ia_gid;
-+ unsigned ia_size;
-+ unsigned ia_atime;
-+ unsigned ia_mtime;
-+ unsigned ia_ctime;
-+ unsigned int ia_attr_flags;
-+};
-+
-+#define KERN_DEBUG
-+
-+#else
-+
-+#ifndef WIN32
-+#include <linux/types.h>
-+#include <linux/list.h>
-+#include <linux/fs.h>
-+#include <linux/stat.h>
-+#endif
-+
-+#endif
-+
-+#if defined WIN32
-+#undef new
-+#endif
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/Kconfig linux.dev/fs/yaffs2/Kconfig
---- linux.old/fs/yaffs2/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/Kconfig 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,135 @@
-+#
-+# YAFFS file system configurations
-+#
-+
-+config YAFFS_FS
-+ tristate "YAFFS2 file system support"
-+ default n
-+ depends on MTD
-+ select YAFFS_YAFFS1
-+ select YAFFS_YAFFS2
-+ help
-+ YAFFS2, or Yet Another Flash Filing System, is a filing system
-+ optimised for NAND Flash chips.
-+
-+ To compile the YAFFS2 file system support as a module, choose M here:
-+ the module will be called yaffs2.
-+
-+ If unsure, say N.
-+
-+ Further information on YAFFS2 is available at
-+ <http://www.aleph1.co.uk/yaffs/>.
-+
-+config YAFFS_YAFFS1
-+ bool "512 byte / page devices"
-+ depends on YAFFS_FS
-+ default y
-+ help
-+ Enable YAFFS1 support -- yaffs for 512 byte / page devices
-+
-+ If unsure, say Y.
-+
-+config YAFFS_DOES_ECC
-+ bool "Lets Yaffs do its own ECC"
-+ depends on YAFFS_FS && YAFFS_YAFFS1
-+ default n
-+ help
-+ This enables Yaffs to use its own ECC functions instead of using
-+ the ones from the generic MTD-NAND driver.
-+
-+ If unsure, say N.
-+
-+config YAFFS_ECC_WRONG_ORDER
-+ bool "Use the same ecc byte order as Steven Hill's nand_ecc.c"
-+ depends on YAFFS_FS && YAFFS_DOES_ECC
-+ default n
-+ help
-+ This makes yaffs_ecc.c use the same ecc byte order as
-+ Steven Hill's nand_ecc.c. If not set, then you get the
-+ same ecc byte order as SmartMedia.
-+
-+ If unsure, say N.
-+
-+config YAFFS_YAFFS2
-+ bool "2048 byte (or larger) / page devices"
-+ depends on YAFFS_FS
-+ default y
-+ help
-+ Enable YAFFS2 support -- yaffs for >= 2048 byte / page larger devices
-+
-+ If unsure, say Y.
-+
-+config YAFFS_AUTO_YAFFS2
-+ bool "Autoselect yaffs2 format"
-+ depends on YAFFS_YAFFS2
-+ default y
-+ help
-+ Without this, you need to explicitely use yaffs2 as the file
-+ system type. With this, you can say "yaffs" and yaffs or yaffs2
-+ will be used depending on the device page size.
-+
-+ If unsure, say Y.
-+
-+config YAFFS_DISABLE_LAZY_LOAD
-+ bool "Disable lazy loading"
-+ depends on YAFFS_YAFFS2
-+ default n
-+ help
-+ "Lazy loading" defers loading file details until they are
-+ required. This saves mount time, but makes the first look-up
-+ a bit longer.
-+
-+ Lazy loading will only happen if enabled by this option being 'n'
-+ and if the appropriate tags are available, else yaffs2 will
-+ automatically fall back to immediate loading and do the right
-+ thing.
-+
-+ Lazy laoding will be required by checkpointing.
-+
-+ Setting this to 'y' will disable lazy loading.
-+
-+ If unsure, say N.
-+
-+config YAFFS_DISABLE_WIDE_TNODES
-+ bool "Turn off wide tnodes"
-+ depends on YAFFS_FS
-+ default n
-+ help
-+ Wide tnodes are only used for large NAND arrays (>=32MB for
-+ 512-byte page devices and >=128MB for 2k page devices). They use
-+ slightly more RAM but are faster since they eliminate chunk group
-+ searching.
-+
-+ Setting this to 'y' will force tnode width to 16 bits and make
-+ large arrays slower.
-+
-+ If unsure, say N.
-+
-+config YAFFS_ALWAYS_CHECK_CHUNK_ERASED
-+ bool "Force chunk erase check"
-+ depends on YAFFS_FS
-+ default n
-+ help
-+ Normally YAFFS only checks chunks before writing until an erased
-+ chunk is found. This helps to detect any partially written chunks
-+ that might have happened due to power loss.
-+
-+ Enabling this forces on the test that chunks are erased in flash
-+ before writing to them. This takes more time but is potentially a
-+ bit more secure.
-+
-+ Suggest setting Y during development and ironing out driver issues
-+ etc. Suggest setting to N if you want faster writing.
-+
-+ If unsure, say Y.
-+
-+config YAFFS_SHORT_NAMES_IN_RAM
-+ bool "Cache short names in RAM"
-+ depends on YAFFS_FS
-+ default y
-+ help
-+ If this config is set, then short names are stored with the
-+ yaffs_Object. This costs an extra 16 bytes of RAM per object,
-+ but makes look-ups faster.
-+
-+ If unsure, say Y.
-diff -urN linux.old/fs/yaffs2/Makefile linux.dev/fs/yaffs2/Makefile
---- linux.old/fs/yaffs2/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/Makefile 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,10 @@
-+#
-+# Makefile for the linux YAFFS filesystem routines.
-+#
-+
-+obj-$(CONFIG_YAFFS_FS) += yaffs.o
-+
-+yaffs-y := yaffs_ecc.o yaffs_fs.o yaffs_guts.o yaffs_checkptrw.o
-+yaffs-y += yaffs_packedtags2.o yaffs_nand.o yaffs_qsort.o
-+yaffs-y += yaffs_tagscompat.o yaffs_tagsvalidity.o
-+yaffs-y += yaffs_mtdif.o yaffs_mtdif2.o
-diff -urN linux.old/fs/yaffs2/moduleconfig.h linux.dev/fs/yaffs2/moduleconfig.h
---- linux.old/fs/yaffs2/moduleconfig.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/moduleconfig.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,32 @@
-+#ifndef __YAFFS_CONFIG_H__
-+#define __YAFFS_CONFIG_H__
-+
-+#ifdef YAFFS_OUT_OF_TREE
-+
-+/* DO NOT UNSET THESE THREE. YAFFS2 will not compile if you do. */
-+#define CONFIG_YAFFS_FS
-+#define CONFIG_YAFFS_YAFFS1
-+#define CONFIG_YAFFS_YAFFS2
-+
-+/* These options are independent of each other. Select those that matter. */
-+
-+/* Default: Not selected */
-+/* Meaning: Yaffs does its own ECC, rather than using MTD ECC */
-+//#define CONFIG_YAFFS_DOES_ECC
-+
-+/* Default: Not selected */
-+/* Meaning: ECC byte order is 'wrong'. Only meaningful if */
-+/* CONFIG_YAFFS_DOES_ECC is set */
-+//#define CONFIG_YAFFS_ECC_WRONG_ORDER
-+
-+/* Default: Selected */
-+/* Meaning: Disables testing whether chunks are erased before writing to them*/
-+#define CONFIG_YAFFS_DISABLE_CHUNK_ERASED_CHECK
-+
-+/* Default: Selected */
-+/* Meaning: Cache short names, taking more RAM, but faster look-ups */
-+#define CONFIG_YAFFS_SHORT_NAMES_IN_RAM
-+
-+#endif /* YAFFS_OUT_OF_TREE */
-+
-+#endif /* __YAFFS_CONFIG_H__ */
-diff -urN linux.old/fs/yaffs2/yaffs_checkptrw.c linux.dev/fs/yaffs2/yaffs_checkptrw.c
---- linux.old/fs/yaffs2/yaffs_checkptrw.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_checkptrw.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,384 @@
-+/* YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+const char *yaffs_checkptrw_c_version =
-+ "$Id: yaffs_checkptrw.c,v 1.11 2006/11/11 23:27:04 charles Exp $";
-+
-+
-+#include "yaffs_checkptrw.h"
-+
-+
-+static int yaffs_CheckpointSpaceOk(yaffs_Device *dev)
-+{
-+
-+ int blocksAvailable = dev->nErasedBlocks - dev->nReservedBlocks;
-+
-+ T(YAFFS_TRACE_CHECKPOINT,
-+ (TSTR("checkpt blocks available = %d" TENDSTR),
-+ blocksAvailable));
-+
-+
-+ return (blocksAvailable <= 0) ? 0 : 1;
-+}
-+
-+
-+
-+static int yaffs_CheckpointErase(yaffs_Device *dev)
-+{
-+
-+ int i;
-+
-+
-+ if(!dev->eraseBlockInNAND)
-+ return 0;
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checking blocks %d to %d"TENDSTR),
-+ dev->internalStartBlock,dev->internalEndBlock));
-+
-+ for(i = dev->internalStartBlock; i <= dev->internalEndBlock; i++) {
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
-+ if(bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT){
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("erasing checkpt block %d"TENDSTR),i));
-+ if(dev->eraseBlockInNAND(dev,i- dev->blockOffset /* realign */)){
-+ bi->blockState = YAFFS_BLOCK_STATE_EMPTY;
-+ dev->nErasedBlocks++;
-+ dev->nFreeChunks += dev->nChunksPerBlock;
-+ }
-+ else {
-+ dev->markNANDBlockBad(dev,i);
-+ bi->blockState = YAFFS_BLOCK_STATE_DEAD;
-+ }
-+ }
-+ }
-+
-+ dev->blocksInCheckpoint = 0;
-+
-+ return 1;
-+}
-+
-+
-+static void yaffs_CheckpointFindNextErasedBlock(yaffs_Device *dev)
-+{
-+ int i;
-+ int blocksAvailable = dev->nErasedBlocks - dev->nReservedBlocks;
-+ T(YAFFS_TRACE_CHECKPOINT,
-+ (TSTR("allocating checkpt block: erased %d reserved %d avail %d next %d "TENDSTR),
-+ dev->nErasedBlocks,dev->nReservedBlocks,blocksAvailable,dev->checkpointNextBlock));
-+
-+ if(dev->checkpointNextBlock >= 0 &&
-+ dev->checkpointNextBlock <= dev->internalEndBlock &&
-+ blocksAvailable > 0){
-+
-+ for(i = dev->checkpointNextBlock; i <= dev->internalEndBlock; i++){
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
-+ if(bi->blockState == YAFFS_BLOCK_STATE_EMPTY){
-+ dev->checkpointNextBlock = i + 1;
-+ dev->checkpointCurrentBlock = i;
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("allocating checkpt block %d"TENDSTR),i));
-+ return;
-+ }
-+ }
-+ }
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("out of checkpt blocks"TENDSTR)));
-+
-+ dev->checkpointNextBlock = -1;
-+ dev->checkpointCurrentBlock = -1;
-+}
-+
-+static void yaffs_CheckpointFindNextCheckpointBlock(yaffs_Device *dev)
-+{
-+ int i;
-+ yaffs_ExtendedTags tags;
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("find next checkpt block: start: blocks %d next %d" TENDSTR),
-+ dev->blocksInCheckpoint, dev->checkpointNextBlock));
-+
-+ if(dev->blocksInCheckpoint < dev->checkpointMaxBlocks)
-+ for(i = dev->checkpointNextBlock; i <= dev->internalEndBlock; i++){
-+ int chunk = i * dev->nChunksPerBlock;
-+ int realignedChunk = chunk - dev->chunkOffset;
-+
-+ dev->readChunkWithTagsFromNAND(dev,realignedChunk,NULL,&tags);
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("find next checkpt block: search: block %d oid %d seq %d eccr %d" TENDSTR),
-+ i, tags.objectId,tags.sequenceNumber,tags.eccResult));
-+
-+ if(tags.sequenceNumber == YAFFS_SEQUENCE_CHECKPOINT_DATA){
-+ /* Right kind of block */
-+ dev->checkpointNextBlock = tags.objectId;
-+ dev->checkpointCurrentBlock = i;
-+ dev->checkpointBlockList[dev->blocksInCheckpoint] = i;
-+ dev->blocksInCheckpoint++;
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("found checkpt block %d"TENDSTR),i));
-+ return;
-+ }
-+ }
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("found no more checkpt blocks"TENDSTR)));
-+
-+ dev->checkpointNextBlock = -1;
-+ dev->checkpointCurrentBlock = -1;
-+}
-+
-+
-+int yaffs_CheckpointOpen(yaffs_Device *dev, int forWriting)
-+{
-+
-+ /* Got the functions we need? */
-+ if (!dev->writeChunkWithTagsToNAND ||
-+ !dev->readChunkWithTagsFromNAND ||
-+ !dev->eraseBlockInNAND ||
-+ !dev->markNANDBlockBad)
-+ return 0;
-+
-+ if(forWriting && !yaffs_CheckpointSpaceOk(dev))
-+ return 0;
-+
-+ if(!dev->checkpointBuffer)
-+ dev->checkpointBuffer = YMALLOC_DMA(dev->nDataBytesPerChunk);
-+ if(!dev->checkpointBuffer)
-+ return 0;
-+
-+
-+ dev->checkpointPageSequence = 0;
-+
-+ dev->checkpointOpenForWrite = forWriting;
-+
-+ dev->checkpointByteCount = 0;
-+ dev->checkpointCurrentBlock = -1;
-+ dev->checkpointCurrentChunk = -1;
-+ dev->checkpointNextBlock = dev->internalStartBlock;
-+
-+ /* Erase all the blocks in the checkpoint area */
-+ if(forWriting){
-+ memset(dev->checkpointBuffer,0,dev->nDataBytesPerChunk);
-+ dev->checkpointByteOffset = 0;
-+ return yaffs_CheckpointErase(dev);
-+
-+
-+ } else {
-+ int i;
-+ /* Set to a value that will kick off a read */
-+ dev->checkpointByteOffset = dev->nDataBytesPerChunk;
-+ /* A checkpoint block list of 1 checkpoint block per 16 block is (hopefully)
-+ * going to be way more than we need */
-+ dev->blocksInCheckpoint = 0;
-+ dev->checkpointMaxBlocks = (dev->internalEndBlock - dev->internalStartBlock)/16 + 2;
-+ dev->checkpointBlockList = YMALLOC(sizeof(int) * dev->checkpointMaxBlocks);
-+ for(i = 0; i < dev->checkpointMaxBlocks; i++)
-+ dev->checkpointBlockList[i] = -1;
-+ }
-+
-+ return 1;
-+}
-+
-+static int yaffs_CheckpointFlushBuffer(yaffs_Device *dev)
-+{
-+
-+ int chunk;
-+ int realignedChunk;
-+
-+ yaffs_ExtendedTags tags;
-+
-+ if(dev->checkpointCurrentBlock < 0){
-+ yaffs_CheckpointFindNextErasedBlock(dev);
-+ dev->checkpointCurrentChunk = 0;
-+ }
-+
-+ if(dev->checkpointCurrentBlock < 0)
-+ return 0;
-+
-+ tags.chunkDeleted = 0;
-+ tags.objectId = dev->checkpointNextBlock; /* Hint to next place to look */
-+ tags.chunkId = dev->checkpointPageSequence + 1;
-+ tags.sequenceNumber = YAFFS_SEQUENCE_CHECKPOINT_DATA;
-+ tags.byteCount = dev->nDataBytesPerChunk;
-+ if(dev->checkpointCurrentChunk == 0){
-+ /* First chunk we write for the block? Set block state to
-+ checkpoint */
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,dev->checkpointCurrentBlock);
-+ bi->blockState = YAFFS_BLOCK_STATE_CHECKPOINT;
-+ dev->blocksInCheckpoint++;
-+ }
-+
-+ chunk = dev->checkpointCurrentBlock * dev->nChunksPerBlock + dev->checkpointCurrentChunk;
-+
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint wite buffer nand %d(%d:%d) objid %d chId %d" TENDSTR),
-+ chunk, dev->checkpointCurrentBlock, dev->checkpointCurrentChunk,tags.objectId,tags.chunkId));
-+
-+ realignedChunk = chunk - dev->chunkOffset;
-+
-+ dev->writeChunkWithTagsToNAND(dev,realignedChunk,dev->checkpointBuffer,&tags);
-+ dev->checkpointByteOffset = 0;
-+ dev->checkpointPageSequence++;
-+ dev->checkpointCurrentChunk++;
-+ if(dev->checkpointCurrentChunk >= dev->nChunksPerBlock){
-+ dev->checkpointCurrentChunk = 0;
-+ dev->checkpointCurrentBlock = -1;
-+ }
-+ memset(dev->checkpointBuffer,0,dev->nDataBytesPerChunk);
-+
-+ return 1;
-+}
-+
-+
-+int yaffs_CheckpointWrite(yaffs_Device *dev,const void *data, int nBytes)
-+{
-+ int i=0;
-+ int ok = 1;
-+
-+
-+ __u8 * dataBytes = (__u8 *)data;
-+
-+
-+
-+ if(!dev->checkpointBuffer)
-+ return 0;
-+
-+ while(i < nBytes && ok) {
-+
-+
-+
-+ dev->checkpointBuffer[dev->checkpointByteOffset] = *dataBytes ;
-+ dev->checkpointByteOffset++;
-+ i++;
-+ dataBytes++;
-+ dev->checkpointByteCount++;
-+
-+
-+ if(dev->checkpointByteOffset < 0 ||
-+ dev->checkpointByteOffset >= dev->nDataBytesPerChunk)
-+ ok = yaffs_CheckpointFlushBuffer(dev);
-+
-+ }
-+
-+ return i;
-+}
-+
-+int yaffs_CheckpointRead(yaffs_Device *dev, void *data, int nBytes)
-+{
-+ int i=0;
-+ int ok = 1;
-+ yaffs_ExtendedTags tags;
-+
-+
-+ int chunk;
-+ int realignedChunk;
-+
-+ __u8 *dataBytes = (__u8 *)data;
-+
-+ if(!dev->checkpointBuffer)
-+ return 0;
-+
-+ while(i < nBytes && ok) {
-+
-+
-+ if(dev->checkpointByteOffset < 0 ||
-+ dev->checkpointByteOffset >= dev->nDataBytesPerChunk) {
-+
-+ if(dev->checkpointCurrentBlock < 0){
-+ yaffs_CheckpointFindNextCheckpointBlock(dev);
-+ dev->checkpointCurrentChunk = 0;
-+ }
-+
-+ if(dev->checkpointCurrentBlock < 0)
-+ ok = 0;
-+ else {
-+
-+ chunk = dev->checkpointCurrentBlock * dev->nChunksPerBlock +
-+ dev->checkpointCurrentChunk;
-+
-+ realignedChunk = chunk - dev->chunkOffset;
-+
-+ /* read in the next chunk */
-+ /* printf("read checkpoint page %d\n",dev->checkpointPage); */
-+ dev->readChunkWithTagsFromNAND(dev, realignedChunk,
-+ dev->checkpointBuffer,
-+ &tags);
-+
-+ if(tags.chunkId != (dev->checkpointPageSequence + 1) ||
-+ tags.sequenceNumber != YAFFS_SEQUENCE_CHECKPOINT_DATA)
-+ ok = 0;
-+
-+ dev->checkpointByteOffset = 0;
-+ dev->checkpointPageSequence++;
-+ dev->checkpointCurrentChunk++;
-+
-+ if(dev->checkpointCurrentChunk >= dev->nChunksPerBlock)
-+ dev->checkpointCurrentBlock = -1;
-+ }
-+ }
-+
-+ if(ok){
-+ *dataBytes = dev->checkpointBuffer[dev->checkpointByteOffset];
-+ dev->checkpointByteOffset++;
-+ i++;
-+ dataBytes++;
-+ dev->checkpointByteCount++;
-+ }
-+ }
-+
-+ return i;
-+}
-+
-+int yaffs_CheckpointClose(yaffs_Device *dev)
-+{
-+
-+ if(dev->checkpointOpenForWrite){
-+ if(dev->checkpointByteOffset != 0)
-+ yaffs_CheckpointFlushBuffer(dev);
-+ } else {
-+ int i;
-+ for(i = 0; i < dev->blocksInCheckpoint && dev->checkpointBlockList[i] >= 0; i++){
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,dev->checkpointBlockList[i]);
-+ if(bi->blockState == YAFFS_BLOCK_STATE_EMPTY)
-+ bi->blockState = YAFFS_BLOCK_STATE_CHECKPOINT;
-+ else {
-+ // Todo this looks odd...
-+ }
-+ }
-+ YFREE(dev->checkpointBlockList);
-+ dev->checkpointBlockList = NULL;
-+ }
-+
-+ dev->nFreeChunks -= dev->blocksInCheckpoint * dev->nChunksPerBlock;
-+ dev->nErasedBlocks -= dev->blocksInCheckpoint;
-+
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint byte count %d" TENDSTR),
-+ dev->checkpointByteCount));
-+
-+ if(dev->checkpointBuffer){
-+ /* free the buffer */
-+ YFREE(dev->checkpointBuffer);
-+ dev->checkpointBuffer = NULL;
-+ return 1;
-+ }
-+ else
-+ return 0;
-+
-+}
-+
-+int yaffs_CheckpointInvalidateStream(yaffs_Device *dev)
-+{
-+ /* Erase the first checksum block */
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint invalidate"TENDSTR)));
-+
-+ if(!yaffs_CheckpointSpaceOk(dev))
-+ return 0;
-+
-+ return yaffs_CheckpointErase(dev);
-+}
-+
-+
-+
-diff -urN linux.old/fs/yaffs2/yaffs_checkptrw.h linux.dev/fs/yaffs2/yaffs_checkptrw.h
---- linux.old/fs/yaffs2/yaffs_checkptrw.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_checkptrw.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,18 @@
-+#ifndef __YAFFS_CHECKPTRW_H__
-+#define __YAFFS_CHECKPTRW_H__
-+
-+#include "yaffs_guts.h"
-+
-+int yaffs_CheckpointOpen(yaffs_Device *dev, int forWriting);
-+
-+int yaffs_CheckpointWrite(yaffs_Device *dev,const void *data, int nBytes);
-+
-+int yaffs_CheckpointRead(yaffs_Device *dev,void *data, int nBytes);
-+
-+int yaffs_CheckpointClose(yaffs_Device *dev);
-+
-+int yaffs_CheckpointInvalidateStream(yaffs_Device *dev);
-+
-+
-+#endif
-+
-diff -urN linux.old/fs/yaffs2/yaffs_ecc.c linux.dev/fs/yaffs2/yaffs_ecc.c
---- linux.old/fs/yaffs2/yaffs_ecc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_ecc.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,333 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * yaffs_ecc.c: ECC generation/correction algorithms.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU Lesser General Public License
-+ * version 2.1 as published by the Free Software Foundation.
-+ */
-+
-+ /*
-+ * This code implements the ECC algorithm used in SmartMedia.
-+ *
-+ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
-+ * The two unused bit are set to 1.
-+ * The ECC can correct single bit errors in a 256-byte page of data. Thus, two such ECC
-+ * blocks are used on a 512-byte NAND page.
-+ *
-+ */
-+
-+/* Table generated by gen-ecc.c
-+ * Using a table means we do not have to calculate p1..p4 and p1'..p4'
-+ * for each byte of data. These are instead provided in a table in bits7..2.
-+ * Bit 0 of each entry indicates whether the entry has an odd or even parity, and therefore
-+ * this bytes influence on the line parity.
-+ */
-+
-+const char *yaffs_ecc_c_version =
-+ "$Id: yaffs_ecc.c,v 1.7 2006/09/14 22:02:46 charles Exp $";
-+
-+#include "yportenv.h"
-+
-+#include "yaffs_ecc.h"
-+
-+static const unsigned char column_parity_table[] = {
-+ 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
-+ 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
-+ 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
-+ 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
-+ 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
-+ 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
-+ 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
-+ 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
-+ 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
-+ 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
-+ 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
-+ 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
-+ 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
-+ 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
-+ 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
-+ 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
-+ 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
-+ 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
-+ 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
-+ 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
-+ 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
-+ 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
-+ 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
-+ 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
-+ 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
-+ 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
-+ 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
-+ 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
-+ 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
-+ 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
-+ 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
-+ 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
-+};
-+
-+/* Count the bits in an unsigned char or a U32 */
-+
-+static int yaffs_CountBits(unsigned char x)
-+{
-+ int r = 0;
-+ while (x) {
-+ if (x & 1)
-+ r++;
-+ x >>= 1;
-+ }
-+ return r;
-+}
-+
-+static int yaffs_CountBits32(unsigned x)
-+{
-+ int r = 0;
-+ while (x) {
-+ if (x & 1)
-+ r++;
-+ x >>= 1;
-+ }
-+ return r;
-+}
-+
-+/* Calculate the ECC for a 256-byte block of data */
-+void yaffs_ECCCalculate(const unsigned char *data, unsigned char *ecc)
-+{
-+ unsigned int i;
-+
-+ unsigned char col_parity = 0;
-+ unsigned char line_parity = 0;
-+ unsigned char line_parity_prime = 0;
-+ unsigned char t;
-+ unsigned char b;
-+
-+ for (i = 0; i < 256; i++) {
-+ b = column_parity_table[*data++];
-+ col_parity ^= b;
-+
-+ if (b & 0x01) // odd number of bits in the byte
-+ {
-+ line_parity ^= i;
-+ line_parity_prime ^= ~i;
-+ }
-+
-+ }
-+
-+ ecc[2] = (~col_parity) | 0x03;
-+
-+ t = 0;
-+ if (line_parity & 0x80)
-+ t |= 0x80;
-+ if (line_parity_prime & 0x80)
-+ t |= 0x40;
-+ if (line_parity & 0x40)
-+ t |= 0x20;
-+ if (line_parity_prime & 0x40)
-+ t |= 0x10;
-+ if (line_parity & 0x20)
-+ t |= 0x08;
-+ if (line_parity_prime & 0x20)
-+ t |= 0x04;
-+ if (line_parity & 0x10)
-+ t |= 0x02;
-+ if (line_parity_prime & 0x10)
-+ t |= 0x01;
-+ ecc[1] = ~t;
-+
-+ t = 0;
-+ if (line_parity & 0x08)
-+ t |= 0x80;
-+ if (line_parity_prime & 0x08)
-+ t |= 0x40;
-+ if (line_parity & 0x04)
-+ t |= 0x20;
-+ if (line_parity_prime & 0x04)
-+ t |= 0x10;
-+ if (line_parity & 0x02)
-+ t |= 0x08;
-+ if (line_parity_prime & 0x02)
-+ t |= 0x04;
-+ if (line_parity & 0x01)
-+ t |= 0x02;
-+ if (line_parity_prime & 0x01)
-+ t |= 0x01;
-+ ecc[0] = ~t;
-+
-+#ifdef CONFIG_YAFFS_ECC_WRONG_ORDER
-+ // Swap the bytes into the wrong order
-+ t = ecc[0];
-+ ecc[0] = ecc[1];
-+ ecc[1] = t;
-+#endif
-+}
-+
-+
-+/* Correct the ECC on a 256 byte block of data */
-+
-+int yaffs_ECCCorrect(unsigned char *data, unsigned char *read_ecc,
-+ const unsigned char *test_ecc)
-+{
-+ unsigned char d0, d1, d2; /* deltas */
-+
-+ d0 = read_ecc[0] ^ test_ecc[0];
-+ d1 = read_ecc[1] ^ test_ecc[1];
-+ d2 = read_ecc[2] ^ test_ecc[2];
-+
-+ if ((d0 | d1 | d2) == 0)
-+ return 0; /* no error */
-+
-+ if (((d0 ^ (d0 >> 1)) & 0x55) == 0x55 &&
-+ ((d1 ^ (d1 >> 1)) & 0x55) == 0x55 &&
-+ ((d2 ^ (d2 >> 1)) & 0x54) == 0x54) {
-+ /* Single bit (recoverable) error in data */
-+
-+ unsigned byte;
-+ unsigned bit;
-+
-+#ifdef CONFIG_YAFFS_ECC_WRONG_ORDER
-+ // swap the bytes to correct for the wrong order
-+ unsigned char t;
-+
-+ t = d0;
-+ d0 = d1;
-+ d1 = t;
-+#endif
-+
-+ bit = byte = 0;
-+
-+ if (d1 & 0x80)
-+ byte |= 0x80;
-+ if (d1 & 0x20)
-+ byte |= 0x40;
-+ if (d1 & 0x08)
-+ byte |= 0x20;
-+ if (d1 & 0x02)
-+ byte |= 0x10;
-+ if (d0 & 0x80)
-+ byte |= 0x08;
-+ if (d0 & 0x20)
-+ byte |= 0x04;
-+ if (d0 & 0x08)
-+ byte |= 0x02;
-+ if (d0 & 0x02)
-+ byte |= 0x01;
-+
-+ if (d2 & 0x80)
-+ bit |= 0x04;
-+ if (d2 & 0x20)
-+ bit |= 0x02;
-+ if (d2 & 0x08)
-+ bit |= 0x01;
-+
-+ data[byte] ^= (1 << bit);
-+
-+ return 1; /* Corrected the error */
-+ }
-+
-+ if ((yaffs_CountBits(d0) +
-+ yaffs_CountBits(d1) +
-+ yaffs_CountBits(d2)) == 1) {
-+ /* Reccoverable error in ecc */
-+
-+ read_ecc[0] = test_ecc[0];
-+ read_ecc[1] = test_ecc[1];
-+ read_ecc[2] = test_ecc[2];
-+
-+ return 1; /* Corrected the error */
-+ }
-+
-+ /* Unrecoverable error */
-+
-+ return -1;
-+
-+}
-+
-+
-+/*
-+ * ECCxxxOther does ECC calcs on arbitrary n bytes of data
-+ */
-+void yaffs_ECCCalculateOther(const unsigned char *data, unsigned nBytes,
-+ yaffs_ECCOther * eccOther)
-+{
-+ unsigned int i;
-+
-+ unsigned char col_parity = 0;
-+ unsigned line_parity = 0;
-+ unsigned line_parity_prime = 0;
-+ unsigned char b;
-+
-+ for (i = 0; i < nBytes; i++) {
-+ b = column_parity_table[*data++];
-+ col_parity ^= b;
-+
-+ if (b & 0x01) {
-+ /* odd number of bits in the byte */
-+ line_parity ^= i;
-+ line_parity_prime ^= ~i;
-+ }
-+
-+ }
-+
-+ eccOther->colParity = (col_parity >> 2) & 0x3f;
-+ eccOther->lineParity = line_parity;
-+ eccOther->lineParityPrime = line_parity_prime;
-+}
-+
-+int yaffs_ECCCorrectOther(unsigned char *data, unsigned nBytes,
-+ yaffs_ECCOther * read_ecc,
-+ const yaffs_ECCOther * test_ecc)
-+{
-+ unsigned char cDelta; /* column parity delta */
-+ unsigned lDelta; /* line parity delta */
-+ unsigned lDeltaPrime; /* line parity delta */
-+ unsigned bit;
-+
-+ cDelta = read_ecc->colParity ^ test_ecc->colParity;
-+ lDelta = read_ecc->lineParity ^ test_ecc->lineParity;
-+ lDeltaPrime = read_ecc->lineParityPrime ^ test_ecc->lineParityPrime;
-+
-+ if ((cDelta | lDelta | lDeltaPrime) == 0)
-+ return 0; /* no error */
-+
-+ if (lDelta == ~lDeltaPrime &&
-+ (((cDelta ^ (cDelta >> 1)) & 0x15) == 0x15))
-+ {
-+ /* Single bit (recoverable) error in data */
-+
-+ bit = 0;
-+
-+ if (cDelta & 0x20)
-+ bit |= 0x04;
-+ if (cDelta & 0x08)
-+ bit |= 0x02;
-+ if (cDelta & 0x02)
-+ bit |= 0x01;
-+
-+ if(lDelta >= nBytes)
-+ return -1;
-+
-+ data[lDelta] ^= (1 << bit);
-+
-+ return 1; /* corrected */
-+ }
-+
-+ if ((yaffs_CountBits32(lDelta) + yaffs_CountBits32(lDeltaPrime) +
-+ yaffs_CountBits(cDelta)) == 1) {
-+ /* Reccoverable error in ecc */
-+
-+ *read_ecc = *test_ecc;
-+ return 1; /* corrected */
-+ }
-+
-+ /* Unrecoverable error */
-+
-+ return -1;
-+
-+}
-+
-diff -urN linux.old/fs/yaffs2/yaffs_ecc.h linux.dev/fs/yaffs2/yaffs_ecc.h
---- linux.old/fs/yaffs2/yaffs_ecc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_ecc.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,44 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * yaffs_ecc.c: ECC generation/correction algorithms.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+ /*
-+ * This code implements the ECC algorithm used in SmartMedia.
-+ *
-+ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
-+ * The two unused bit are set to 1.
-+ * The ECC can correct single bit errors in a 256-byte page of data. Thus, two such ECC
-+ * blocks are used on a 512-byte NAND page.
-+ *
-+ */
-+
-+#ifndef __YAFFS_ECC_H__
-+#define __YAFFS_ECC_H__
-+
-+typedef struct {
-+ unsigned char colParity;
-+ unsigned lineParity;
-+ unsigned lineParityPrime;
-+} yaffs_ECCOther;
-+
-+void yaffs_ECCCalculate(const unsigned char *data, unsigned char *ecc);
-+int yaffs_ECCCorrect(unsigned char *data, unsigned char *read_ecc,
-+ const unsigned char *test_ecc);
-+
-+void yaffs_ECCCalculateOther(const unsigned char *data, unsigned nBytes,
-+ yaffs_ECCOther * ecc);
-+int yaffs_ECCCorrectOther(unsigned char *data, unsigned nBytes,
-+ yaffs_ECCOther * read_ecc,
-+ const yaffs_ECCOther * test_ecc);
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_fs.c linux.dev/fs/yaffs2/yaffs_fs.c
---- linux.old/fs/yaffs2/yaffs_fs.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_fs.c 2006-12-14 04:33:02.000000000 +0100
-@@ -0,0 +1,2136 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_fs.c
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This is the file system front-end to YAFFS that hooks it up to
-+ * the VFS.
-+ *
-+ * Special notes:
-+ * >> 2.4: sb->u.generic_sbp points to the yaffs_Device associated with
-+ * this superblock
-+ * >> 2.6: sb->s_fs_info points to the yaffs_Device associated with this
-+ * superblock
-+ * >> inode->u.generic_ip points to the associated yaffs_Object.
-+ *
-+ * Acknowledgements:
-+ * * Luc van OostenRyck for numerous patches.
-+ * * Nick Bane for numerous patches.
-+ * * Nick Bane for 2.5/2.6 integration.
-+ * * Andras Toth for mknod rdev issue.
-+ * * Michael Fischer for finding the problem with inode inconsistency.
-+ * * Some code bodily lifted from JFFS2.
-+ */
-+
-+const char *yaffs_fs_c_version =
-+ "$Id: yaffs_fs.c,v 1.54 2006/10/24 18:09:15 charles Exp $";
-+extern const char *yaffs_guts_c_version;
-+
-+#include <linux/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/version.h>
-+#include <linux/slab.h>
-+#include <linux/init.h>
-+#include <linux/list.h>
-+#include <linux/fs.h>
-+#include <linux/proc_fs.h>
-+#include <linux/smp_lock.h>
-+#include <linux/pagemap.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/interrupt.h>
-+#include <linux/string.h>
-+#include <linux/ctype.h>
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+
-+#include <linux/statfs.h> /* Added NCB 15-8-2003 */
-+#include <asm/statfs.h>
-+#define UnlockPage(p) unlock_page(p)
-+#define Page_Uptodate(page) test_bit(PG_uptodate, &(page)->flags)
-+
-+/* FIXME: use sb->s_id instead ? */
-+#define yaffs_devname(sb, buf) bdevname(sb->s_bdev, buf)
-+
-+#else
-+
-+#include <linux/locks.h>
-+#define BDEVNAME_SIZE 0
-+#define yaffs_devname(sb, buf) kdevname(sb->s_dev)
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
-+/* added NCB 26/5/2006 for 2.4.25-vrs2-tcl1 kernel */
-+#define __user
-+#endif
-+
-+#endif
-+
-+#include <asm/uaccess.h>
-+
-+#include "yportenv.h"
-+#include "yaffs_guts.h"
-+
-+unsigned yaffs_traceMask = YAFFS_TRACE_ALWAYS |
-+ YAFFS_TRACE_BAD_BLOCKS
-+ /* | 0xFFFFFFFF */;
-+
-+#include <linux/mtd/mtd.h>
-+#include "yaffs_mtdif.h"
-+#include "yaffs_mtdif2.h"
-+
-+/*#define T(x) printk x */
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
-+#define yaffs_InodeToObject(iptr) ((yaffs_Object *)((iptr)->i_private))
-+#else
-+#define yaffs_InodeToObject(iptr) ((yaffs_Object *)((iptr)->u.generic_ip))
-+#endif
-+#define yaffs_DentryToObject(dptr) yaffs_InodeToObject((dptr)->d_inode)
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+#define yaffs_SuperToDevice(sb) ((yaffs_Device *)sb->s_fs_info)
-+#else
-+#define yaffs_SuperToDevice(sb) ((yaffs_Device *)sb->u.generic_sbp)
-+#endif
-+
-+static void yaffs_put_super(struct super_block *sb);
-+
-+static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
-+ loff_t * pos);
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_file_flush(struct file *file, fl_owner_t id);
-+#else
-+static int yaffs_file_flush(struct file *file);
-+#endif
-+
-+static int yaffs_sync_object(struct file *file, struct dentry *dentry,
-+ int datasync);
-+
-+static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir);
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
-+ struct nameidata *n);
-+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
-+ struct nameidata *n);
-+#else
-+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode);
-+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry);
-+#endif
-+static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
-+ struct dentry *dentry);
-+static int yaffs_unlink(struct inode *dir, struct dentry *dentry);
-+static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
-+ const char *symname);
-+static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode);
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
-+ dev_t dev);
-+#else
-+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
-+ int dev);
-+#endif
-+static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
-+ struct inode *new_dir, struct dentry *new_dentry);
-+static int yaffs_setattr(struct dentry *dentry, struct iattr *attr);
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_sync_fs(struct super_block *sb, int wait);
-+static void yaffs_write_super(struct super_block *sb);
-+#else
-+static int yaffs_sync_fs(struct super_block *sb);
-+static int yaffs_write_super(struct super_block *sb);
-+#endif
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf);
-+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf);
-+#else
-+static int yaffs_statfs(struct super_block *sb, struct statfs *buf);
-+#endif
-+static void yaffs_read_inode(struct inode *inode);
-+
-+static void yaffs_put_inode(struct inode *inode);
-+static void yaffs_delete_inode(struct inode *);
-+static void yaffs_clear_inode(struct inode *);
-+
-+static int yaffs_readpage(struct file *file, struct page *page);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_writepage(struct page *page, struct writeback_control *wbc);
-+#else
-+static int yaffs_writepage(struct page *page);
-+#endif
-+static int yaffs_prepare_write(struct file *f, struct page *pg,
-+ unsigned offset, unsigned to);
-+static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
-+ unsigned to);
-+
-+static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
-+ int buflen);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
-+static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
-+#else
-+static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
-+#endif
-+
-+static struct address_space_operations yaffs_file_address_operations = {
-+ .readpage = yaffs_readpage,
-+ .writepage = yaffs_writepage,
-+ .prepare_write = yaffs_prepare_write,
-+ .commit_write = yaffs_commit_write,
-+};
-+
-+static struct file_operations yaffs_file_operations = {
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
-+ .read = do_sync_read,
-+ .write = do_sync_write,
-+ .aio_read = generic_file_aio_read,
-+ .aio_write = generic_file_aio_write,
-+#else
-+ .read = generic_file_read,
-+ .write = generic_file_write,
-+#endif
-+ .mmap = generic_file_mmap,
-+ .flush = yaffs_file_flush,
-+ .fsync = yaffs_sync_object,
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+ .sendfile = generic_file_sendfile,
-+#endif
-+
-+};
-+
-+static struct inode_operations yaffs_file_inode_operations = {
-+ .setattr = yaffs_setattr,
-+};
-+
-+static struct inode_operations yaffs_symlink_inode_operations = {
-+ .readlink = yaffs_readlink,
-+ .follow_link = yaffs_follow_link,
-+ .setattr = yaffs_setattr,
-+};
-+
-+static struct inode_operations yaffs_dir_inode_operations = {
-+ .create = yaffs_create,
-+ .lookup = yaffs_lookup,
-+ .link = yaffs_link,
-+ .unlink = yaffs_unlink,
-+ .symlink = yaffs_symlink,
-+ .mkdir = yaffs_mkdir,
-+ .rmdir = yaffs_unlink,
-+ .mknod = yaffs_mknod,
-+ .rename = yaffs_rename,
-+ .setattr = yaffs_setattr,
-+};
-+
-+static struct file_operations yaffs_dir_operations = {
-+ .read = generic_read_dir,
-+ .readdir = yaffs_readdir,
-+ .fsync = yaffs_sync_object,
-+};
-+
-+static struct super_operations yaffs_super_ops = {
-+ .statfs = yaffs_statfs,
-+ .read_inode = yaffs_read_inode,
-+ .put_inode = yaffs_put_inode,
-+ .put_super = yaffs_put_super,
-+ .delete_inode = yaffs_delete_inode,
-+ .clear_inode = yaffs_clear_inode,
-+ .sync_fs = yaffs_sync_fs,
-+ .write_super = yaffs_write_super,
-+};
-+
-+static void yaffs_GrossLock(yaffs_Device * dev)
-+{
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs locking\n"));
-+
-+ down(&dev->grossLock);
-+}
-+
-+static void yaffs_GrossUnlock(yaffs_Device * dev)
-+{
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs unlocking\n"));
-+ up(&dev->grossLock);
-+
-+}
-+
-+static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
-+ int buflen)
-+{
-+ unsigned char *alias;
-+ int ret;
-+
-+ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ alias = yaffs_GetSymlinkAlias(yaffs_DentryToObject(dentry));
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ if (!alias)
-+ return -ENOMEM;
-+
-+ ret = vfs_readlink(dentry, buffer, buflen, alias);
-+ kfree(alias);
-+ return ret;
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
-+static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
-+#else
-+static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
-+#endif
-+{
-+ unsigned char *alias;
-+ int ret;
-+ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ alias = yaffs_GetSymlinkAlias(yaffs_DentryToObject(dentry));
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ if (!alias)
-+ {
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+
-+ ret = vfs_follow_link(nd, alias);
-+ kfree(alias);
-+out:
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
-+ return ERR_PTR (ret);
-+#else
-+ return ret;
-+#endif
-+}
-+
-+struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
-+ yaffs_Object * obj);
-+
-+/*
-+ * Lookup is used to find objects in the fs
-+ */
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+
-+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
-+ struct nameidata *n)
-+#else
-+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry)
-+#endif
-+{
-+ yaffs_Object *obj;
-+ struct inode *inode = NULL; /* NCB 2.5/2.6 needs NULL here */
-+
-+ yaffs_Device *dev = yaffs_InodeToObject(dir)->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_lookup for %d:%s\n",
-+ yaffs_InodeToObject(dir)->objectId, dentry->d_name.name));
-+
-+ obj =
-+ yaffs_FindObjectByName(yaffs_InodeToObject(dir),
-+ dentry->d_name.name);
-+
-+ obj = yaffs_GetEquivalentObject(obj); /* in case it was a hardlink */
-+
-+ /* Can't hold gross lock when calling yaffs_get_inode() */
-+ yaffs_GrossUnlock(dev);
-+
-+ if (obj) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_lookup found %d\n", obj->objectId));
-+
-+ inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
-+
-+ if (inode) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_loookup dentry \n"));
-+/* #if 0 asserted by NCB for 2.5/6 compatability - falls through to
-+ * d_add even if NULL inode */
-+#if 0
-+ /*dget(dentry); // try to solve directory bug */
-+ d_add(dentry, inode);
-+
-+ /* return dentry; */
-+ return NULL;
-+#endif
-+ }
-+
-+ } else {
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_lookup not found\n"));
-+
-+ }
-+
-+/* added NCB for 2.5/6 compatability - forces add even if inode is
-+ * NULL which creates dentry hash */
-+ d_add(dentry, inode);
-+
-+ return NULL;
-+ /* return (ERR_PTR(-EIO)); */
-+
-+}
-+
-+/* For now put inode is just for debugging
-+ * Put inode is called when the inode **structure** is put.
-+ */
-+static void yaffs_put_inode(struct inode *inode)
-+{
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs_put_inode: ino %d, count %d\n", (int)inode->i_ino,
-+ atomic_read(&inode->i_count)));
-+
-+}
-+
-+/* clear is called to tell the fs to release any per-inode data it holds */
-+static void yaffs_clear_inode(struct inode *inode)
-+{
-+ yaffs_Object *obj;
-+ yaffs_Device *dev;
-+
-+ obj = yaffs_InodeToObject(inode);
-+
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs_clear_inode: ino %d, count %d %s\n", (int)inode->i_ino,
-+ atomic_read(&inode->i_count),
-+ obj ? "object exists" : "null object"));
-+
-+ if (obj) {
-+ dev = obj->myDev;
-+ yaffs_GrossLock(dev);
-+
-+ /* Clear the association between the inode and
-+ * the yaffs_Object.
-+ */
-+ obj->myInode = NULL;
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
-+ inode->i_private = NULL;
-+#else
-+ inode->u.generic_ip = NULL;
-+#endif
-+
-+ /* If the object freeing was deferred, then the real
-+ * free happens now.
-+ * This should fix the inode inconsistency problem.
-+ */
-+
-+ yaffs_HandleDeferedFree(obj);
-+
-+ yaffs_GrossUnlock(dev);
-+ }
-+
-+}
-+
-+/* delete is called when the link count is zero and the inode
-+ * is put (ie. nobody wants to know about it anymore, time to
-+ * delete the file).
-+ * NB Must call clear_inode()
-+ */
-+static void yaffs_delete_inode(struct inode *inode)
-+{
-+ yaffs_Object *obj = yaffs_InodeToObject(inode);
-+ yaffs_Device *dev;
-+
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs_delete_inode: ino %d, count %d %s\n", (int)inode->i_ino,
-+ atomic_read(&inode->i_count),
-+ obj ? "object exists" : "null object"));
-+
-+ if (obj) {
-+ dev = obj->myDev;
-+ yaffs_GrossLock(dev);
-+ yaffs_DeleteFile(obj);
-+ yaffs_GrossUnlock(dev);
-+ }
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
-+ truncate_inode_pages (&inode->i_data, 0);
-+#endif
-+ clear_inode(inode);
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_file_flush(struct file *file, fl_owner_t id)
-+#else
-+static int yaffs_file_flush(struct file *file)
-+#endif
-+{
-+ yaffs_Object *obj = yaffs_DentryToObject(file->f_dentry);
-+
-+ yaffs_Device *dev = obj->myDev;
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_file_flush object %d (%s)\n", obj->objectId,
-+ obj->dirty ? "dirty" : "clean"));
-+
-+ yaffs_GrossLock(dev);
-+
-+ yaffs_FlushFile(obj, 1);
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ return 0;
-+}
-+
-+static int yaffs_readpage_nolock(struct file *f, struct page *pg)
-+{
-+ /* Lifted from jffs2 */
-+
-+ yaffs_Object *obj;
-+ unsigned char *pg_buf;
-+ int ret;
-+
-+ yaffs_Device *dev;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_readpage at %08x, size %08x\n",
-+ (unsigned)(pg->index << PAGE_CACHE_SHIFT),
-+ (unsigned)PAGE_CACHE_SIZE));
-+
-+ obj = yaffs_DentryToObject(f->f_dentry);
-+
-+ dev = obj->myDev;
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+ BUG_ON(!PageLocked(pg));
-+#else
-+ if (!PageLocked(pg))
-+ PAGE_BUG(pg);
-+#endif
-+
-+ pg_buf = kmap(pg);
-+ /* FIXME: Can kmap fail? */
-+
-+ yaffs_GrossLock(dev);
-+
-+ ret =
-+ yaffs_ReadDataFromFile(obj, pg_buf, pg->index << PAGE_CACHE_SHIFT,
-+ PAGE_CACHE_SIZE);
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ if (ret >= 0)
-+ ret = 0;
-+
-+ if (ret) {
-+ ClearPageUptodate(pg);
-+ SetPageError(pg);
-+ } else {
-+ SetPageUptodate(pg);
-+ ClearPageError(pg);
-+ }
-+
-+ flush_dcache_page(pg);
-+ kunmap(pg);
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_readpage done\n"));
-+ return ret;
-+}
-+
-+static int yaffs_readpage_unlock(struct file *f, struct page *pg)
-+{
-+ int ret = yaffs_readpage_nolock(f, pg);
-+ UnlockPage(pg);
-+ return ret;
-+}
-+
-+static int yaffs_readpage(struct file *f, struct page *pg)
-+{
-+ return yaffs_readpage_unlock(f, pg);
-+}
-+
-+/* writepage inspired by/stolen from smbfs */
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_writepage(struct page *page, struct writeback_control *wbc)
-+#else
-+static int yaffs_writepage(struct page *page)
-+#endif
-+{
-+ struct address_space *mapping = page->mapping;
-+ loff_t offset = (loff_t) page->index << PAGE_CACHE_SHIFT;
-+ struct inode *inode;
-+ unsigned long end_index;
-+ char *buffer;
-+ yaffs_Object *obj;
-+ int nWritten = 0;
-+ unsigned nBytes;
-+
-+ if (!mapping)
-+ BUG();
-+ inode = mapping->host;
-+ if (!inode)
-+ BUG();
-+
-+ if (offset > inode->i_size) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG
-+ "yaffs_writepage at %08x, inode size = %08x!!!\n",
-+ (unsigned)(page->index << PAGE_CACHE_SHIFT),
-+ (unsigned)inode->i_size));
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG " -> don't care!!\n"));
-+ unlock_page(page);
-+ return 0;
-+ }
-+
-+ end_index = inode->i_size >> PAGE_CACHE_SHIFT;
-+
-+ /* easy case */
-+ if (page->index < end_index) {
-+ nBytes = PAGE_CACHE_SIZE;
-+ } else {
-+ nBytes = inode->i_size & (PAGE_CACHE_SIZE - 1);
-+ }
-+
-+ get_page(page);
-+
-+ buffer = kmap(page);
-+
-+ obj = yaffs_InodeToObject(inode);
-+ yaffs_GrossLock(obj->myDev);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_writepage at %08x, size %08x\n",
-+ (unsigned)(page->index << PAGE_CACHE_SHIFT), nBytes));
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "writepag0: obj = %05x, ino = %05x\n",
-+ (int)obj->variant.fileVariant.fileSize, (int)inode->i_size));
-+
-+ nWritten =
-+ yaffs_WriteDataToFile(obj, buffer, page->index << PAGE_CACHE_SHIFT,
-+ nBytes, 0);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "writepag1: obj = %05x, ino = %05x\n",
-+ (int)obj->variant.fileVariant.fileSize, (int)inode->i_size));
-+
-+ yaffs_GrossUnlock(obj->myDev);
-+
-+ kunmap(page);
-+ SetPageUptodate(page);
-+ UnlockPage(page);
-+ put_page(page);
-+
-+ return (nWritten == nBytes) ? 0 : -ENOSPC;
-+}
-+
-+static int yaffs_prepare_write(struct file *f, struct page *pg,
-+ unsigned offset, unsigned to)
-+{
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_prepair_write\n"));
-+ if (!Page_Uptodate(pg) && (offset || to < PAGE_CACHE_SIZE))
-+ return yaffs_readpage_nolock(f, pg);
-+
-+ return 0;
-+
-+}
-+
-+static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
-+ unsigned to)
-+{
-+
-+ void *addr = page_address(pg) + offset;
-+ loff_t pos = (((loff_t) pg->index) << PAGE_CACHE_SHIFT) + offset;
-+ int nBytes = to - offset;
-+ int nWritten;
-+
-+ unsigned spos = pos;
-+ unsigned saddr = (unsigned)addr;
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_commit_write addr %x pos %x nBytes %d\n", saddr,
-+ spos, nBytes));
-+
-+ nWritten = yaffs_file_write(f, addr, nBytes, &pos);
-+
-+ if (nWritten != nBytes) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG
-+ "yaffs_commit_write not same size nWritten %d nBytes %d\n",
-+ nWritten, nBytes));
-+ SetPageError(pg);
-+ ClearPageUptodate(pg);
-+ } else {
-+ SetPageUptodate(pg);
-+ }
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_commit_write returning %d\n",
-+ nWritten == nBytes ? 0 : nWritten));
-+
-+ return nWritten == nBytes ? 0 : nWritten;
-+
-+}
-+
-+static void yaffs_FillInodeFromObject(struct inode *inode, yaffs_Object * obj)
-+{
-+ if (inode && obj) {
-+
-+
-+ /* Check mode against the variant type and attempt to repair if broken. */
-+ __u32 mode = obj->yst_mode;
-+ switch( obj->variantType ){
-+ case YAFFS_OBJECT_TYPE_FILE :
-+ if( ! S_ISREG(mode) ){
-+ obj->yst_mode &= ~S_IFMT;
-+ obj->yst_mode |= S_IFREG;
-+ }
-+
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK :
-+ if( ! S_ISLNK(mode) ){
-+ obj->yst_mode &= ~S_IFMT;
-+ obj->yst_mode |= S_IFLNK;
-+ }
-+
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY :
-+ if( ! S_ISDIR(mode) ){
-+ obj->yst_mode &= ~S_IFMT;
-+ obj->yst_mode |= S_IFDIR;
-+ }
-+
-+ break;
-+ case YAFFS_OBJECT_TYPE_UNKNOWN :
-+ case YAFFS_OBJECT_TYPE_HARDLINK :
-+ case YAFFS_OBJECT_TYPE_SPECIAL :
-+ default:
-+ /* TODO? */
-+ break;
-+ }
-+
-+ inode->i_ino = obj->objectId;
-+ inode->i_mode = obj->yst_mode;
-+ inode->i_uid = obj->yst_uid;
-+ inode->i_gid = obj->yst_gid;
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
-+ inode->i_blksize = inode->i_sb->s_blocksize;
-+#endif
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+
-+ inode->i_rdev = old_decode_dev(obj->yst_rdev);
-+ inode->i_atime.tv_sec = (time_t) (obj->yst_atime);
-+ inode->i_atime.tv_nsec = 0;
-+ inode->i_mtime.tv_sec = (time_t) obj->yst_mtime;
-+ inode->i_mtime.tv_nsec = 0;
-+ inode->i_ctime.tv_sec = (time_t) obj->yst_ctime;
-+ inode->i_ctime.tv_nsec = 0;
-+#else
-+ inode->i_rdev = obj->yst_rdev;
-+ inode->i_atime = obj->yst_atime;
-+ inode->i_mtime = obj->yst_mtime;
-+ inode->i_ctime = obj->yst_ctime;
-+#endif
-+ inode->i_size = yaffs_GetObjectFileLength(obj);
-+ inode->i_blocks = (inode->i_size + 511) >> 9;
-+
-+ inode->i_nlink = yaffs_GetObjectLinkCount(obj);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG
-+ "yaffs_FillInode mode %x uid %d gid %d size %d count %d\n",
-+ inode->i_mode, inode->i_uid, inode->i_gid,
-+ (int)inode->i_size, atomic_read(&inode->i_count)));
-+
-+ switch (obj->yst_mode & S_IFMT) {
-+ default: /* fifo, device or socket */
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+ init_special_inode(inode, obj->yst_mode,
-+ old_decode_dev(obj->yst_rdev));
-+#else
-+ init_special_inode(inode, obj->yst_mode,
-+ (dev_t) (obj->yst_rdev));
-+#endif
-+ break;
-+ case S_IFREG: /* file */
-+ inode->i_op = &yaffs_file_inode_operations;
-+ inode->i_fop = &yaffs_file_operations;
-+ inode->i_mapping->a_ops =
-+ &yaffs_file_address_operations;
-+ break;
-+ case S_IFDIR: /* directory */
-+ inode->i_op = &yaffs_dir_inode_operations;
-+ inode->i_fop = &yaffs_dir_operations;
-+ break;
-+ case S_IFLNK: /* symlink */
-+ inode->i_op = &yaffs_symlink_inode_operations;
-+ break;
-+ }
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
-+ inode->i_private = obj;
-+#else
-+ inode->u.generic_ip = obj;
-+#endif
-+ obj->myInode = inode;
-+
-+ } else {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_FileInode invalid parameters\n"));
-+ }
-+
-+}
-+
-+struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
-+ yaffs_Object * obj)
-+{
-+ struct inode *inode;
-+
-+ if (!sb) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_get_inode for NULL super_block!!\n"));
-+ return NULL;
-+
-+ }
-+
-+ if (!obj) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_get_inode for NULL object!!\n"));
-+ return NULL;
-+
-+ }
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_get_inode for object %d\n", obj->objectId));
-+
-+ inode = iget(sb, obj->objectId);
-+
-+ /* NB Side effect: iget calls back to yaffs_read_inode(). */
-+ /* iget also increments the inode's i_count */
-+ /* NB You can't be holding grossLock or deadlock will happen! */
-+
-+ return inode;
-+}
-+
-+static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
-+ loff_t * pos)
-+{
-+ yaffs_Object *obj;
-+ int nWritten, ipos;
-+ struct inode *inode;
-+ yaffs_Device *dev;
-+
-+ obj = yaffs_DentryToObject(f->f_dentry);
-+
-+ dev = obj->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ inode = f->f_dentry->d_inode;
-+
-+ if (!S_ISBLK(inode->i_mode) && f->f_flags & O_APPEND) {
-+ ipos = inode->i_size;
-+ } else {
-+ ipos = *pos;
-+ }
-+
-+ if (!obj) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_file_write: hey obj is null!\n"));
-+ } else {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG
-+ "yaffs_file_write about to write writing %d bytes"
-+ "to object %d at %d\n",
-+ n, obj->objectId, ipos));
-+ }
-+
-+ nWritten = yaffs_WriteDataToFile(obj, buf, ipos, n, 0);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_file_write writing %d bytes, %d written at %d\n",
-+ n, nWritten, ipos));
-+ if (nWritten > 0) {
-+ ipos += nWritten;
-+ *pos = ipos;
-+ if (ipos > inode->i_size) {
-+ inode->i_size = ipos;
-+ inode->i_blocks = (ipos + 511) >> 9;
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG
-+ "yaffs_file_write size updated to %d bytes, "
-+ "%d blocks\n",
-+ ipos, (int)(inode->i_blocks)));
-+ }
-+
-+ }
-+ yaffs_GrossUnlock(dev);
-+ return nWritten == 0 ? -ENOSPC : nWritten;
-+}
-+
-+static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir)
-+{
-+ yaffs_Object *obj;
-+ yaffs_Device *dev;
-+ struct inode *inode = f->f_dentry->d_inode;
-+ unsigned long offset, curoffs;
-+ struct list_head *i;
-+ yaffs_Object *l;
-+
-+ char name[YAFFS_MAX_NAME_LENGTH + 1];
-+
-+ obj = yaffs_DentryToObject(f->f_dentry);
-+ dev = obj->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ offset = f->f_pos;
-+
-+ T(YAFFS_TRACE_OS, ("yaffs_readdir: starting at %d\n", (int)offset));
-+
-+ if (offset == 0) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_readdir: entry . ino %d \n",
-+ (int)inode->i_ino));
-+ if (filldir(dirent, ".", 1, offset, inode->i_ino, DT_DIR)
-+ < 0) {
-+ goto out;
-+ }
-+ offset++;
-+ f->f_pos++;
-+ }
-+ if (offset == 1) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_readdir: entry .. ino %d \n",
-+ (int)f->f_dentry->d_parent->d_inode->i_ino));
-+ if (filldir
-+ (dirent, "..", 2, offset,
-+ f->f_dentry->d_parent->d_inode->i_ino, DT_DIR) < 0) {
-+ goto out;
-+ }
-+ offset++;
-+ f->f_pos++;
-+ }
-+
-+ curoffs = 1;
-+
-+ /* If the directory has changed since the open or last call to
-+ readdir, rewind to after the 2 canned entries. */
-+
-+ if (f->f_version != inode->i_version) {
-+ offset = 2;
-+ f->f_pos = offset;
-+ f->f_version = inode->i_version;
-+ }
-+
-+ list_for_each(i, &obj->variant.directoryVariant.children) {
-+ curoffs++;
-+ if (curoffs >= offset) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+
-+ yaffs_GetObjectName(l, name,
-+ YAFFS_MAX_NAME_LENGTH + 1);
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_readdir: %s inode %d\n", name,
-+ yaffs_GetObjectInode(l)));
-+
-+ if (filldir(dirent,
-+ name,
-+ strlen(name),
-+ offset,
-+ yaffs_GetObjectInode(l),
-+ yaffs_GetObjectType(l))
-+ < 0) {
-+ goto up_and_out;
-+ }
-+
-+ offset++;
-+ f->f_pos++;
-+ }
-+ }
-+
-+ up_and_out:
-+ out:
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ return 0;
-+}
-+
-+/*
-+ * File creation. Allocate an inode, and we're done..
-+ */
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
-+ dev_t rdev)
-+#else
-+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
-+ int rdev)
-+#endif
-+{
-+ struct inode *inode;
-+
-+ yaffs_Object *obj = NULL;
-+ yaffs_Device *dev;
-+
-+ yaffs_Object *parent = yaffs_InodeToObject(dir);
-+
-+ int error = -ENOSPC;
-+ uid_t uid = current->fsuid;
-+ gid_t gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
-+
-+ if((dir->i_mode & S_ISGID) && S_ISDIR(mode))
-+ mode |= S_ISGID;
-+
-+ if (parent) {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_mknod: parent object %d type %d\n",
-+ parent->objectId, parent->variantType));
-+ } else {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_mknod: could not get parent object\n"));
-+ return -EPERM;
-+ }
-+
-+ T(YAFFS_TRACE_OS, ("yaffs_mknod: making oject for %s, "
-+ "mode %x dev %x\n",
-+ dentry->d_name.name, mode, rdev));
-+
-+ dev = parent->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ switch (mode & S_IFMT) {
-+ default:
-+ /* Special (socket, fifo, device...) */
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG
-+ "yaffs_mknod: making special\n"));
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+ obj =
-+ yaffs_MknodSpecial(parent, dentry->d_name.name, mode, uid,
-+ gid, old_encode_dev(rdev));
-+#else
-+ obj =
-+ yaffs_MknodSpecial(parent, dentry->d_name.name, mode, uid,
-+ gid, rdev);
-+#endif
-+ break;
-+ case S_IFREG: /* file */
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mknod: making file\n"));
-+ obj =
-+ yaffs_MknodFile(parent, dentry->d_name.name, mode, uid,
-+ gid);
-+ break;
-+ case S_IFDIR: /* directory */
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_mknod: making directory\n"));
-+ obj =
-+ yaffs_MknodDirectory(parent, dentry->d_name.name, mode,
-+ uid, gid);
-+ break;
-+ case S_IFLNK: /* symlink */
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mknod: making file\n"));
-+ obj = NULL; /* Do we ever get here? */
-+ break;
-+ }
-+
-+ /* Can not call yaffs_get_inode() with gross lock held */
-+ yaffs_GrossUnlock(dev);
-+
-+ if (obj) {
-+ inode = yaffs_get_inode(dir->i_sb, mode, rdev, obj);
-+ d_instantiate(dentry, inode);
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_mknod created object %d count = %d\n",
-+ obj->objectId, atomic_read(&inode->i_count)));
-+ error = 0;
-+ } else {
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_mknod failed making object\n"));
-+ error = -ENOMEM;
-+ }
-+
-+ return error;
-+}
-+
-+static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
-+{
-+ int retVal;
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mkdir\n"));
-+ retVal = yaffs_mknod(dir, dentry, mode | S_IFDIR, 0);
-+#if 0
-+ /* attempt to fix dir bug - didn't work */
-+ if (!retVal) {
-+ dget(dentry);
-+ }
-+#endif
-+ return retVal;
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
-+ struct nameidata *n)
-+#else
-+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode)
-+#endif
-+{
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_create\n"));
-+ return yaffs_mknod(dir, dentry, mode | S_IFREG, 0);
-+}
-+
-+static int yaffs_unlink(struct inode *dir, struct dentry *dentry)
-+{
-+ int retVal;
-+
-+ yaffs_Device *dev;
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_unlink %d:%s\n", (int)(dir->i_ino),
-+ dentry->d_name.name));
-+
-+ dev = yaffs_InodeToObject(dir)->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ retVal = yaffs_Unlink(yaffs_InodeToObject(dir), dentry->d_name.name);
-+
-+ if (retVal == YAFFS_OK) {
-+ dentry->d_inode->i_nlink--;
-+ dir->i_version++;
-+ yaffs_GrossUnlock(dev);
-+ mark_inode_dirty(dentry->d_inode);
-+ return 0;
-+ }
-+ yaffs_GrossUnlock(dev);
-+ return -ENOTEMPTY;
-+}
-+
-+/*
-+ * Create a link...
-+ */
-+static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
-+ struct dentry *dentry)
-+{
-+ struct inode *inode = old_dentry->d_inode;
-+ yaffs_Object *obj = NULL;
-+ yaffs_Object *link = NULL;
-+ yaffs_Device *dev;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_link\n"));
-+
-+ obj = yaffs_InodeToObject(inode);
-+ dev = obj->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ if (!S_ISDIR(inode->i_mode)) /* Don't link directories */
-+ {
-+ link =
-+ yaffs_Link(yaffs_InodeToObject(dir), dentry->d_name.name,
-+ obj);
-+ }
-+
-+ if (link) {
-+ old_dentry->d_inode->i_nlink = yaffs_GetObjectLinkCount(obj);
-+ d_instantiate(dentry, old_dentry->d_inode);
-+ atomic_inc(&old_dentry->d_inode->i_count);
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_link link count %d i_count %d\n",
-+ old_dentry->d_inode->i_nlink,
-+ atomic_read(&old_dentry->d_inode->i_count)));
-+
-+ }
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ if (link) {
-+
-+ return 0;
-+ }
-+
-+ return -EPERM;
-+}
-+
-+static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
-+ const char *symname)
-+{
-+ yaffs_Object *obj;
-+ yaffs_Device *dev;
-+ uid_t uid = current->fsuid;
-+ gid_t gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_symlink\n"));
-+
-+ dev = yaffs_InodeToObject(dir)->myDev;
-+ yaffs_GrossLock(dev);
-+ obj = yaffs_MknodSymLink(yaffs_InodeToObject(dir), dentry->d_name.name,
-+ S_IFLNK | S_IRWXUGO, uid, gid, symname);
-+ yaffs_GrossUnlock(dev);
-+
-+ if (obj) {
-+
-+ struct inode *inode;
-+
-+ inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
-+ d_instantiate(dentry, inode);
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "symlink created OK\n"));
-+ return 0;
-+ } else {
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "symlink not created\n"));
-+
-+ }
-+
-+ return -ENOMEM;
-+}
-+
-+static int yaffs_sync_object(struct file *file, struct dentry *dentry,
-+ int datasync)
-+{
-+
-+ yaffs_Object *obj;
-+ yaffs_Device *dev;
-+
-+ obj = yaffs_DentryToObject(dentry);
-+
-+ dev = obj->myDev;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_sync_object\n"));
-+ yaffs_GrossLock(dev);
-+ yaffs_FlushFile(obj, 1);
-+ yaffs_GrossUnlock(dev);
-+ return 0;
-+}
-+
-+/*
-+ * The VFS layer already does all the dentry stuff for rename.
-+ *
-+ * NB: POSIX says you can rename an object over an old object of the same name
-+ */
-+static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
-+ struct inode *new_dir, struct dentry *new_dentry)
-+{
-+ yaffs_Device *dev;
-+ int retVal = YAFFS_FAIL;
-+ yaffs_Object *target;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_rename\n"));
-+ dev = yaffs_InodeToObject(old_dir)->myDev;
-+
-+ yaffs_GrossLock(dev);
-+
-+ /* Check if the target is an existing directory that is not empty. */
-+ target =
-+ yaffs_FindObjectByName(yaffs_InodeToObject(new_dir),
-+ new_dentry->d_name.name);
-+
-+
-+
-+ if (target &&
-+ target->variantType == YAFFS_OBJECT_TYPE_DIRECTORY &&
-+ !list_empty(&target->variant.directoryVariant.children)) {
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "target is non-empty dir\n"));
-+
-+ retVal = YAFFS_FAIL;
-+ } else {
-+
-+ /* Now does unlinking internally using shadowing mechanism */
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "calling yaffs_RenameObject\n"));
-+
-+ retVal =
-+ yaffs_RenameObject(yaffs_InodeToObject(old_dir),
-+ old_dentry->d_name.name,
-+ yaffs_InodeToObject(new_dir),
-+ new_dentry->d_name.name);
-+
-+ }
-+ yaffs_GrossUnlock(dev);
-+
-+ if (retVal == YAFFS_OK) {
-+ if(target) {
-+ new_dentry->d_inode->i_nlink--;
-+ mark_inode_dirty(new_dentry->d_inode);
-+ }
-+
-+ return 0;
-+ } else {
-+ return -ENOTEMPTY;
-+ }
-+
-+}
-+
-+static int yaffs_setattr(struct dentry *dentry, struct iattr *attr)
-+{
-+ struct inode *inode = dentry->d_inode;
-+ int error;
-+ yaffs_Device *dev;
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_setattr of object %d\n",
-+ yaffs_InodeToObject(inode)->objectId));
-+
-+ if ((error = inode_change_ok(inode, attr)) == 0) {
-+
-+ dev = yaffs_InodeToObject(inode)->myDev;
-+ yaffs_GrossLock(dev);
-+ if (yaffs_SetAttributes(yaffs_InodeToObject(inode), attr) ==
-+ YAFFS_OK) {
-+ error = 0;
-+ } else {
-+ error = -EPERM;
-+ }
-+ yaffs_GrossUnlock(dev);
-+ if (!error)
-+ error = inode_setattr(inode, attr);
-+ }
-+ return error;
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf)
-+{
-+ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
-+ struct super_block *sb = dentry->d_sb;
-+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf)
-+{
-+ yaffs_Device *dev = yaffs_SuperToDevice(sb);
-+#else
-+static int yaffs_statfs(struct super_block *sb, struct statfs *buf)
-+{
-+ yaffs_Device *dev = yaffs_SuperToDevice(sb);
-+#endif
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_statfs\n"));
-+
-+ yaffs_GrossLock(dev);
-+
-+ buf->f_type = YAFFS_MAGIC;
-+ buf->f_bsize = sb->s_blocksize;
-+ buf->f_namelen = 255;
-+ if (sb->s_blocksize > dev->nDataBytesPerChunk) {
-+
-+ buf->f_blocks =
-+ (dev->endBlock - dev->startBlock +
-+ 1) * dev->nChunksPerBlock / (sb->s_blocksize /
-+ dev->nDataBytesPerChunk);
-+ buf->f_bfree =
-+ yaffs_GetNumberOfFreeChunks(dev) / (sb->s_blocksize /
-+ dev->nDataBytesPerChunk);
-+ } else {
-+
-+ buf->f_blocks =
-+ (dev->endBlock - dev->startBlock +
-+ 1) * dev->nChunksPerBlock * (dev->nDataBytesPerChunk /
-+ sb->s_blocksize);
-+ buf->f_bfree =
-+ yaffs_GetNumberOfFreeChunks(dev) * (dev->nDataBytesPerChunk /
-+ sb->s_blocksize);
-+ }
-+ buf->f_files = 0;
-+ buf->f_ffree = 0;
-+ buf->f_bavail = buf->f_bfree;
-+
-+ yaffs_GrossUnlock(dev);
-+ return 0;
-+}
-+
-+
-+
-+static int yaffs_do_sync_fs(struct super_block *sb)
-+{
-+
-+ yaffs_Device *dev = yaffs_SuperToDevice(sb);
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_do_sync_fs\n"));
-+
-+ if(sb->s_dirt) {
-+ yaffs_GrossLock(dev);
-+
-+ if(dev)
-+ yaffs_CheckpointSave(dev);
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ sb->s_dirt = 0;
-+ }
-+ return 0;
-+}
-+
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static void yaffs_write_super(struct super_block *sb)
-+#else
-+static int yaffs_write_super(struct super_block *sb)
-+#endif
-+{
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_write_super\n"));
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
-+ return 0; /* yaffs_do_sync_fs(sb);*/
-+#endif
-+}
-+
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_sync_fs(struct super_block *sb, int wait)
-+#else
-+static int yaffs_sync_fs(struct super_block *sb)
-+#endif
-+{
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_sync_fs\n"));
-+
-+ return 0; /* yaffs_do_sync_fs(sb);*/
-+
-+}
-+
-+
-+static void yaffs_read_inode(struct inode *inode)
-+{
-+ /* NB This is called as a side effect of other functions, but
-+ * we had to release the lock to prevent deadlocks, so
-+ * need to lock again.
-+ */
-+
-+ yaffs_Object *obj;
-+ yaffs_Device *dev = yaffs_SuperToDevice(inode->i_sb);
-+
-+ T(YAFFS_TRACE_OS,
-+ (KERN_DEBUG "yaffs_read_inode for %d\n", (int)inode->i_ino));
-+
-+ yaffs_GrossLock(dev);
-+
-+ obj = yaffs_FindObjectByNumber(dev, inode->i_ino);
-+
-+ yaffs_FillInodeFromObject(inode, obj);
-+
-+ yaffs_GrossUnlock(dev);
-+}
-+
-+static LIST_HEAD(yaffs_dev_list);
-+
-+static void yaffs_put_super(struct super_block *sb)
-+{
-+ yaffs_Device *dev = yaffs_SuperToDevice(sb);
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_put_super\n"));
-+
-+ yaffs_GrossLock(dev);
-+
-+ yaffs_FlushEntireDeviceCache(dev);
-+
-+ if (dev->putSuperFunc) {
-+ dev->putSuperFunc(sb);
-+ }
-+
-+ yaffs_CheckpointSave(dev);
-+ yaffs_Deinitialise(dev);
-+
-+ yaffs_GrossUnlock(dev);
-+
-+ /* we assume this is protected by lock_kernel() in mount/umount */
-+ list_del(&dev->devList);
-+
-+ if(dev->spareBuffer){
-+ YFREE(dev->spareBuffer);
-+ dev->spareBuffer = NULL;
-+ }
-+
-+ kfree(dev);
-+}
-+
-+
-+static void yaffs_MTDPutSuper(struct super_block *sb)
-+{
-+
-+ struct mtd_info *mtd = yaffs_SuperToDevice(sb)->genericDevice;
-+
-+ if (mtd->sync) {
-+ mtd->sync(mtd);
-+ }
-+
-+ put_mtd_device(mtd);
-+}
-+
-+
-+static void yaffs_MarkSuperBlockDirty(void *vsb)
-+{
-+ struct super_block *sb = (struct super_block *)vsb;
-+
-+ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_MarkSuperBlockDirty() sb = %p\n",sb));
-+// if(sb)
-+// sb->s_dirt = 1;
-+}
-+
-+static struct super_block *yaffs_internal_read_super(int yaffsVersion,
-+ struct super_block *sb,
-+ void *data, int silent)
-+{
-+ int nBlocks;
-+ struct inode *inode = NULL;
-+ struct dentry *root;
-+ yaffs_Device *dev = 0;
-+ char devname_buf[BDEVNAME_SIZE + 1];
-+ struct mtd_info *mtd;
-+ int err;
-+
-+ sb->s_magic = YAFFS_MAGIC;
-+ sb->s_op = &yaffs_super_ops;
-+
-+ if (!sb)
-+ printk(KERN_INFO "yaffs: sb is NULL\n");
-+ else if (!sb->s_dev)
-+ printk(KERN_INFO "yaffs: sb->s_dev is NULL\n");
-+ else if (!yaffs_devname(sb, devname_buf))
-+ printk(KERN_INFO "yaffs: devname is NULL\n");
-+ else
-+ printk(KERN_INFO "yaffs: dev is %d name is \"%s\"\n",
-+ sb->s_dev,
-+ yaffs_devname(sb, devname_buf));
-+
-+ sb->s_blocksize = PAGE_CACHE_SIZE;
-+ sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
-+ T(YAFFS_TRACE_OS, ("yaffs_read_super: Using yaffs%d\n", yaffsVersion));
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs_read_super: block size %d\n", (int)(sb->s_blocksize)));
-+
-+#ifdef CONFIG_YAFFS_DISABLE_WRITE_VERIFY
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs: Write verification disabled. All guarantees "
-+ "null and void\n"));
-+#endif
-+
-+ T(YAFFS_TRACE_ALWAYS, ("yaffs: Attempting MTD mount on %u.%u, "
-+ "\"%s\"\n",
-+ MAJOR(sb->s_dev), MINOR(sb->s_dev),
-+ yaffs_devname(sb, devname_buf)));
-+
-+ /* Check it's an mtd device..... */
-+ if (MAJOR(sb->s_dev) != MTD_BLOCK_MAJOR) {
-+ return NULL; /* This isn't an mtd device */
-+ }
-+ /* Get the device */
-+ mtd = get_mtd_device(NULL, MINOR(sb->s_dev));
-+ if (!mtd) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device #%u doesn't appear to exist\n",
-+ MINOR(sb->s_dev)));
-+ return NULL;
-+ }
-+ /* Check it's NAND */
-+ if (mtd->type != MTD_NANDFLASH) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device is not NAND it's type %d\n", mtd->type));
-+ return NULL;
-+ }
-+
-+ T(YAFFS_TRACE_OS, (" erase %p\n", mtd->erase));
-+ T(YAFFS_TRACE_OS, (" read %p\n", mtd->read));
-+ T(YAFFS_TRACE_OS, (" write %p\n", mtd->write));
-+ T(YAFFS_TRACE_OS, (" readoob %p\n", mtd->read_oob));
-+ T(YAFFS_TRACE_OS, (" writeoob %p\n", mtd->write_oob));
-+ T(YAFFS_TRACE_OS, (" block_isbad %p\n", mtd->block_isbad));
-+ T(YAFFS_TRACE_OS, (" block_markbad %p\n", mtd->block_markbad));
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ T(YAFFS_TRACE_OS, (" writesize %d\n", mtd->writesize));
-+#else
-+ T(YAFFS_TRACE_OS, (" oobblock %d\n", mtd->oobblock));
-+#endif
-+ T(YAFFS_TRACE_OS, (" oobsize %d\n", mtd->oobsize));
-+ T(YAFFS_TRACE_OS, (" erasesize %d\n", mtd->erasesize));
-+ T(YAFFS_TRACE_OS, (" size %d\n", mtd->size));
-+
-+#ifdef CONFIG_YAFFS_AUTO_YAFFS2
-+
-+ if (yaffsVersion == 1 &&
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ mtd->writesize >= 2048) {
-+#else
-+ mtd->oobblock >= 2048) {
-+#endif
-+ T(YAFFS_TRACE_ALWAYS,("yaffs: auto selecting yaffs2\n"));
-+ yaffsVersion = 2;
-+ }
-+
-+ /* Added NCB 26/5/2006 for completeness */
-+ if (yaffsVersion == 2 &&
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ mtd->writesize == 512) {
-+#else
-+ mtd->oobblock == 512) {
-+#endif
-+ T(YAFFS_TRACE_ALWAYS,("yaffs: auto selecting yaffs1\n"));
-+ yaffsVersion = 1;
-+ }
-+
-+#endif
-+
-+ if (yaffsVersion == 2) {
-+ /* Check for version 2 style functions */
-+ if (!mtd->erase ||
-+ !mtd->block_isbad ||
-+ !mtd->block_markbad ||
-+ !mtd->read ||
-+ !mtd->write ||
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ !mtd->read_oob || !mtd->write_oob) {
-+#else
-+ !mtd->write_ecc ||
-+ !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
-+#endif
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device does not support required "
-+ "functions\n"));;
-+ return NULL;
-+ }
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ if (mtd->writesize < YAFFS_MIN_YAFFS2_CHUNK_SIZE ||
-+#else
-+ if (mtd->oobblock < YAFFS_MIN_YAFFS2_CHUNK_SIZE ||
-+#endif
-+ mtd->oobsize < YAFFS_MIN_YAFFS2_SPARE_SIZE) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device does not have the "
-+ "right page sizes\n"));
-+ return NULL;
-+ }
-+ } else {
-+ /* Check for V1 style functions */
-+ if (!mtd->erase ||
-+ !mtd->read ||
-+ !mtd->write ||
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ !mtd->read_oob || !mtd->write_oob) {
-+#else
-+ !mtd->write_ecc ||
-+ !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
-+#endif
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device does not support required "
-+ "functions\n"));;
-+ return NULL;
-+ }
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ if (mtd->writesize < YAFFS_BYTES_PER_CHUNK ||
-+#else
-+ if (mtd->oobblock < YAFFS_BYTES_PER_CHUNK ||
-+#endif
-+ mtd->oobsize != YAFFS_BYTES_PER_SPARE) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs: MTD device does not support have the "
-+ "right page sizes\n"));
-+ return NULL;
-+ }
-+ }
-+
-+ /* OK, so if we got here, we have an MTD that's NAND and looks
-+ * like it has the right capabilities
-+ * Set the yaffs_Device up for mtd
-+ */
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+ sb->s_fs_info = dev = kmalloc(sizeof(yaffs_Device), GFP_KERNEL);
-+#else
-+ sb->u.generic_sbp = dev = kmalloc(sizeof(yaffs_Device), GFP_KERNEL);
-+#endif
-+ if (!dev) {
-+ /* Deep shit could not allocate device structure */
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs_read_super: Failed trying to allocate "
-+ "yaffs_Device. \n"));
-+ return NULL;
-+ }
-+
-+ memset(dev, 0, sizeof(yaffs_Device));
-+ dev->genericDevice = mtd;
-+ dev->name = mtd->name;
-+
-+ /* Set up the memory size parameters.... */
-+
-+ nBlocks = mtd->size / (YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK);
-+ dev->startBlock = 0;
-+ dev->endBlock = nBlocks - 1;
-+ dev->nChunksPerBlock = YAFFS_CHUNKS_PER_BLOCK;
-+ dev->nDataBytesPerChunk = YAFFS_BYTES_PER_CHUNK;
-+ dev->nReservedBlocks = 5;
-+ dev->nShortOpCaches = 10; /* Enable short op caching */
-+
-+ /* ... and the functions. */
-+ if (yaffsVersion == 2) {
-+ dev->writeChunkWithTagsToNAND =
-+ nandmtd2_WriteChunkWithTagsToNAND;
-+ dev->readChunkWithTagsFromNAND =
-+ nandmtd2_ReadChunkWithTagsFromNAND;
-+ dev->markNANDBlockBad = nandmtd2_MarkNANDBlockBad;
-+ dev->queryNANDBlock = nandmtd2_QueryNANDBlock;
-+ dev->spareBuffer = YMALLOC(mtd->oobsize);
-+ dev->isYaffs2 = 1;
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ dev->nDataBytesPerChunk = mtd->writesize;
-+ dev->nChunksPerBlock = mtd->erasesize / mtd->writesize;
-+#else
-+ dev->nDataBytesPerChunk = mtd->oobblock;
-+ dev->nChunksPerBlock = mtd->erasesize / mtd->oobblock;
-+#endif
-+ nBlocks = mtd->size / mtd->erasesize;
-+
-+ dev->nCheckpointReservedBlocks = 0;
-+ dev->startBlock = 0;
-+ dev->endBlock = nBlocks - 1;
-+ } else {
-+ dev->writeChunkToNAND = nandmtd_WriteChunkToNAND;
-+ dev->readChunkFromNAND = nandmtd_ReadChunkFromNAND;
-+ dev->isYaffs2 = 0;
-+ }
-+ /* ... and common functions */
-+ dev->eraseBlockInNAND = nandmtd_EraseBlockInNAND;
-+ dev->initialiseNAND = nandmtd_InitialiseNAND;
-+
-+ dev->putSuperFunc = yaffs_MTDPutSuper;
-+
-+ dev->superBlock = (void *)sb;
-+ dev->markSuperBlockDirty = yaffs_MarkSuperBlockDirty;
-+
-+
-+#ifndef CONFIG_YAFFS_DOES_ECC
-+ dev->useNANDECC = 1;
-+#endif
-+
-+#ifdef CONFIG_YAFFS_DISABLE_WIDE_TNODES
-+ dev->wideTnodesDisabled = 1;
-+#endif
-+
-+ /* we assume this is protected by lock_kernel() in mount/umount */
-+ list_add_tail(&dev->devList, &yaffs_dev_list);
-+
-+ init_MUTEX(&dev->grossLock);
-+
-+ yaffs_GrossLock(dev);
-+
-+ err = yaffs_GutsInitialise(dev);
-+
-+ T(YAFFS_TRACE_OS,
-+ ("yaffs_read_super: guts initialised %s\n",
-+ (err == YAFFS_OK) ? "OK" : "FAILED"));
-+
-+ /* Release lock before yaffs_get_inode() */
-+ yaffs_GrossUnlock(dev);
-+
-+ /* Create root inode */
-+ if (err == YAFFS_OK)
-+ inode = yaffs_get_inode(sb, S_IFDIR | 0755, 0,
-+ yaffs_Root(dev));
-+
-+ if (!inode)
-+ return NULL;
-+
-+ inode->i_op = &yaffs_dir_inode_operations;
-+ inode->i_fop = &yaffs_dir_operations;
-+
-+ T(YAFFS_TRACE_OS, ("yaffs_read_super: got root inode\n"));
-+
-+ root = d_alloc_root(inode);
-+
-+ T(YAFFS_TRACE_OS, ("yaffs_read_super: d_alloc_root done\n"));
-+
-+ if (!root) {
-+ iput(inode);
-+ return NULL;
-+ }
-+ sb->s_root = root;
-+
-+ T(YAFFS_TRACE_OS, ("yaffs_read_super: done\n"));
-+ return sb;
-+}
-+
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs_internal_read_super_mtd(struct super_block *sb, void *data,
-+ int silent)
-+{
-+ return yaffs_internal_read_super(1, sb, data, silent) ? 0 : -EINVAL;
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs_read_super(struct file_system_type *fs,
-+ int flags, const char *dev_name,
-+ void *data, struct vfsmount *mnt)
-+{
-+
-+ return get_sb_bdev(fs, flags, dev_name, data,
-+ yaffs_internal_read_super_mtd, mnt);
-+}
-+#else
-+static struct super_block *yaffs_read_super(struct file_system_type *fs,
-+ int flags, const char *dev_name,
-+ void *data)
-+{
-+
-+ return get_sb_bdev(fs, flags, dev_name, data,
-+ yaffs_internal_read_super_mtd);
-+}
-+#endif
-+
-+static struct file_system_type yaffs_fs_type = {
-+ .owner = THIS_MODULE,
-+ .name = "yaffs",
-+ .get_sb = yaffs_read_super,
-+ .kill_sb = kill_block_super,
-+ .fs_flags = FS_REQUIRES_DEV,
-+};
-+#else
-+static struct super_block *yaffs_read_super(struct super_block *sb, void *data,
-+ int silent)
-+{
-+ return yaffs_internal_read_super(1, sb, data, silent);
-+}
-+
-+static DECLARE_FSTYPE(yaffs_fs_type, "yaffs", yaffs_read_super,
-+ FS_REQUIRES_DEV);
-+#endif
-+
-+
-+#ifdef CONFIG_YAFFS_YAFFS2
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+static int yaffs2_internal_read_super_mtd(struct super_block *sb, void *data,
-+ int silent)
-+{
-+ return yaffs_internal_read_super(2, sb, data, silent) ? 0 : -EINVAL;
-+}
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static int yaffs2_read_super(struct file_system_type *fs,
-+ int flags, const char *dev_name, void *data,
-+ struct vfsmount *mnt)
-+{
-+ return get_sb_bdev(fs, flags, dev_name, data,
-+ yaffs2_internal_read_super_mtd, mnt);
-+}
-+#else
-+static struct super_block *yaffs2_read_super(struct file_system_type *fs,
-+ int flags, const char *dev_name,
-+ void *data)
-+{
-+
-+ return get_sb_bdev(fs, flags, dev_name, data,
-+ yaffs2_internal_read_super_mtd);
-+}
-+#endif
-+
-+static struct file_system_type yaffs2_fs_type = {
-+ .owner = THIS_MODULE,
-+ .name = "yaffs2",
-+ .get_sb = yaffs2_read_super,
-+ .kill_sb = kill_block_super,
-+ .fs_flags = FS_REQUIRES_DEV,
-+};
-+#else
-+static struct super_block *yaffs2_read_super(struct super_block *sb,
-+ void *data, int silent)
-+{
-+ return yaffs_internal_read_super(2, sb, data, silent);
-+}
-+
-+static DECLARE_FSTYPE(yaffs2_fs_type, "yaffs2", yaffs2_read_super,
-+ FS_REQUIRES_DEV);
-+#endif
-+
-+#endif /* CONFIG_YAFFS_YAFFS2 */
-+
-+static struct proc_dir_entry *my_proc_entry;
-+
-+static char *yaffs_dump_dev(char *buf, yaffs_Device * dev)
-+{
-+ buf += sprintf(buf, "startBlock......... %d\n", dev->startBlock);
-+ buf += sprintf(buf, "endBlock........... %d\n", dev->endBlock);
-+ buf += sprintf(buf, "chunkGroupBits..... %d\n", dev->chunkGroupBits);
-+ buf += sprintf(buf, "chunkGroupSize..... %d\n", dev->chunkGroupSize);
-+ buf += sprintf(buf, "nErasedBlocks...... %d\n", dev->nErasedBlocks);
-+ buf += sprintf(buf, "nTnodesCreated..... %d\n", dev->nTnodesCreated);
-+ buf += sprintf(buf, "nFreeTnodes........ %d\n", dev->nFreeTnodes);
-+ buf += sprintf(buf, "nObjectsCreated.... %d\n", dev->nObjectsCreated);
-+ buf += sprintf(buf, "nFreeObjects....... %d\n", dev->nFreeObjects);
-+ buf += sprintf(buf, "nFreeChunks........ %d\n", dev->nFreeChunks);
-+ buf += sprintf(buf, "nPageWrites........ %d\n", dev->nPageWrites);
-+ buf += sprintf(buf, "nPageReads......... %d\n", dev->nPageReads);
-+ buf += sprintf(buf, "nBlockErasures..... %d\n", dev->nBlockErasures);
-+ buf += sprintf(buf, "nGCCopies.......... %d\n", dev->nGCCopies);
-+ buf +=
-+ sprintf(buf, "garbageCollections. %d\n", dev->garbageCollections);
-+ buf +=
-+ sprintf(buf, "passiveGCs......... %d\n",
-+ dev->passiveGarbageCollections);
-+ buf += sprintf(buf, "nRetriedWrites..... %d\n", dev->nRetriedWrites);
-+ buf += sprintf(buf, "nRetireBlocks...... %d\n", dev->nRetiredBlocks);
-+ buf += sprintf(buf, "eccFixed........... %d\n", dev->eccFixed);
-+ buf += sprintf(buf, "eccUnfixed......... %d\n", dev->eccUnfixed);
-+ buf += sprintf(buf, "tagsEccFixed....... %d\n", dev->tagsEccFixed);
-+ buf += sprintf(buf, "tagsEccUnfixed..... %d\n", dev->tagsEccUnfixed);
-+ buf += sprintf(buf, "cacheHits.......... %d\n", dev->cacheHits);
-+ buf += sprintf(buf, "nDeletedFiles...... %d\n", dev->nDeletedFiles);
-+ buf += sprintf(buf, "nUnlinkedFiles..... %d\n", dev->nUnlinkedFiles);
-+ buf +=
-+ sprintf(buf, "nBackgroudDeletions %d\n", dev->nBackgroundDeletions);
-+ buf += sprintf(buf, "useNANDECC......... %d\n", dev->useNANDECC);
-+ buf += sprintf(buf, "isYaffs2........... %d\n", dev->isYaffs2);
-+
-+ return buf;
-+}
-+
-+static int yaffs_proc_read(char *page,
-+ char **start,
-+ off_t offset, int count, int *eof, void *data)
-+{
-+ struct list_head *item;
-+ char *buf = page;
-+ int step = offset;
-+ int n = 0;
-+
-+ /* Get proc_file_read() to step 'offset' by one on each sucessive call.
-+ * We use 'offset' (*ppos) to indicate where we are in devList.
-+ * This also assumes the user has posted a read buffer large
-+ * enough to hold the complete output; but that's life in /proc.
-+ */
-+
-+ *(int *)start = 1;
-+
-+ /* Print header first */
-+ if (step == 0) {
-+ buf += sprintf(buf, "YAFFS built:" __DATE__ " " __TIME__
-+ "\n%s\n%s\n", yaffs_fs_c_version,
-+ yaffs_guts_c_version);
-+ }
-+
-+ /* hold lock_kernel while traversing yaffs_dev_list */
-+ lock_kernel();
-+
-+ /* Locate and print the Nth entry. Order N-squared but N is small. */
-+ list_for_each(item, &yaffs_dev_list) {
-+ yaffs_Device *dev = list_entry(item, yaffs_Device, devList);
-+ if (n < step) {
-+ n++;
-+ continue;
-+ }
-+ buf += sprintf(buf, "\nDevice %d \"%s\"\n", n, dev->name);
-+ buf = yaffs_dump_dev(buf, dev);
-+ break;
-+ }
-+ unlock_kernel();
-+
-+ return buf - page < count ? buf - page : count;
-+}
-+
-+/**
-+ * Set the verbosity of the warnings and error messages.
-+ *
-+ */
-+
-+static struct {
-+ char *mask_name;
-+ unsigned mask_bitfield;
-+} mask_flags[] = {
-+ {"allocate", YAFFS_TRACE_ALLOCATE},
-+ {"always", YAFFS_TRACE_ALWAYS},
-+ {"bad_blocks", YAFFS_TRACE_BAD_BLOCKS},
-+ {"buffers", YAFFS_TRACE_BUFFERS},
-+ {"bug", YAFFS_TRACE_BUG},
-+ {"deletion", YAFFS_TRACE_DELETION},
-+ {"erase", YAFFS_TRACE_ERASE},
-+ {"error", YAFFS_TRACE_ERROR},
-+ {"gc_detail", YAFFS_TRACE_GC_DETAIL},
-+ {"gc", YAFFS_TRACE_GC},
-+ {"mtd", YAFFS_TRACE_MTD},
-+ {"nandaccess", YAFFS_TRACE_NANDACCESS},
-+ {"os", YAFFS_TRACE_OS},
-+ {"scan_debug", YAFFS_TRACE_SCAN_DEBUG},
-+ {"scan", YAFFS_TRACE_SCAN},
-+ {"tracing", YAFFS_TRACE_TRACING},
-+ {"write", YAFFS_TRACE_WRITE},
-+ {"all", 0xffffffff},
-+ {"none", 0},
-+ {NULL, 0},
-+};
-+
-+static int yaffs_proc_write(struct file *file, const char *buf,
-+ unsigned long count, void *data)
-+{
-+ unsigned rg = 0, mask_bitfield;
-+ char *end, *mask_name;
-+ int i;
-+ int done = 0;
-+ int add, len;
-+ int pos = 0;
-+
-+ rg = yaffs_traceMask;
-+
-+ while (!done && (pos < count)) {
-+ done = 1;
-+ while ((pos < count) && isspace(buf[pos])) {
-+ pos++;
-+ }
-+
-+ switch (buf[pos]) {
-+ case '+':
-+ case '-':
-+ case '=':
-+ add = buf[pos];
-+ pos++;
-+ break;
-+
-+ default:
-+ add = ' ';
-+ break;
-+ }
-+ mask_name = NULL;
-+ mask_bitfield = simple_strtoul(buf + pos, &end, 0);
-+ if (end > buf + pos) {
-+ mask_name = "numeral";
-+ len = end - (buf + pos);
-+ done = 0;
-+ } else {
-+
-+ for (i = 0; mask_flags[i].mask_name != NULL; i++) {
-+ len = strlen(mask_flags[i].mask_name);
-+ if (strncmp(buf + pos, mask_flags[i].mask_name, len) == 0) {
-+ mask_name = mask_flags[i].mask_name;
-+ mask_bitfield = mask_flags[i].mask_bitfield;
-+ done = 0;
-+ break;
-+ }
-+ }
-+ }
-+
-+ if (mask_name != NULL) {
-+ pos += len;
-+ done = 0;
-+ switch(add) {
-+ case '-':
-+ rg &= ~mask_bitfield;
-+ break;
-+ case '+':
-+ rg |= mask_bitfield;
-+ break;
-+ case '=':
-+ rg = mask_bitfield;
-+ break;
-+ default:
-+ rg |= mask_bitfield;
-+ break;
-+ }
-+ }
-+ }
-+
-+ yaffs_traceMask = rg;
-+ if (rg & YAFFS_TRACE_ALWAYS) {
-+ for (i = 0; mask_flags[i].mask_name != NULL; i++) {
-+ char flag;
-+ flag = ((rg & mask_flags[i].mask_bitfield) == mask_flags[i].mask_bitfield) ? '+' : '-';
-+ printk("%c%s\n", flag, mask_flags[i].mask_name);
-+ }
-+ }
-+
-+ return count;
-+}
-+
-+/* Stuff to handle installation of file systems */
-+struct file_system_to_install {
-+ struct file_system_type *fst;
-+ int installed;
-+};
-+
-+static struct file_system_to_install fs_to_install[] = {
-+//#ifdef CONFIG_YAFFS_YAFFS1
-+ {&yaffs_fs_type, 0},
-+//#endif
-+//#ifdef CONFIG_YAFFS_YAFFS2
-+ {&yaffs2_fs_type, 0},
-+//#endif
-+ {NULL, 0}
-+};
-+
-+static int __init init_yaffs_fs(void)
-+{
-+ int error = 0;
-+ struct file_system_to_install *fsinst;
-+
-+ T(YAFFS_TRACE_ALWAYS,
-+ ("yaffs " __DATE__ " " __TIME__ " Installing. \n"));
-+
-+ /* Install the proc_fs entry */
-+ my_proc_entry = create_proc_entry("yaffs",
-+ S_IRUGO | S_IFREG,
-+ &proc_root);
-+
-+ if (my_proc_entry) {
-+ my_proc_entry->write_proc = yaffs_proc_write;
-+ my_proc_entry->read_proc = yaffs_proc_read;
-+ my_proc_entry->data = NULL;
-+ } else {
-+ return -ENOMEM;
-+ }
-+
-+ /* Now add the file system entries */
-+
-+ fsinst = fs_to_install;
-+
-+ while (fsinst->fst && !error) {
-+ error = register_filesystem(fsinst->fst);
-+ if (!error) {
-+ fsinst->installed = 1;
-+ }
-+ fsinst++;
-+ }
-+
-+ /* Any errors? uninstall */
-+ if (error) {
-+ fsinst = fs_to_install;
-+
-+ while (fsinst->fst) {
-+ if (fsinst->installed) {
-+ unregister_filesystem(fsinst->fst);
-+ fsinst->installed = 0;
-+ }
-+ fsinst++;
-+ }
-+ }
-+
-+ return error;
-+}
-+
-+static void __exit exit_yaffs_fs(void)
-+{
-+
-+ struct file_system_to_install *fsinst;
-+
-+ T(YAFFS_TRACE_ALWAYS, ("yaffs " __DATE__ " " __TIME__
-+ " removing. \n"));
-+
-+ remove_proc_entry("yaffs", &proc_root);
-+
-+ fsinst = fs_to_install;
-+
-+ while (fsinst->fst) {
-+ if (fsinst->installed) {
-+ unregister_filesystem(fsinst->fst);
-+ fsinst->installed = 0;
-+ }
-+ fsinst++;
-+ }
-+
-+}
-+
-+module_init(init_yaffs_fs)
-+module_exit(exit_yaffs_fs)
-+
-+MODULE_DESCRIPTION("YAFFS2 - a NAND specific flash file system");
-+MODULE_AUTHOR("Charles Manning, Aleph One Ltd., 2002-2006");
-+MODULE_LICENSE("GPL");
-diff -urN linux.old/fs/yaffs2/yaffs_guts.c linux.dev/fs/yaffs2/yaffs_guts.c
---- linux.old/fs/yaffs2/yaffs_guts.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_guts.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,6675 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+const char *yaffs_guts_c_version =
-+ "$Id: yaffs_guts.c,v 1.45 2006/11/14 03:07:17 charles Exp $";
-+
-+#include "yportenv.h"
-+
-+#include "yaffsinterface.h"
-+#include "yaffs_guts.h"
-+#include "yaffs_tagsvalidity.h"
-+
-+#include "yaffs_tagscompat.h"
-+#ifndef CONFIG_YAFFS_OWN_SORT
-+#include "yaffs_qsort.h"
-+#endif
-+#include "yaffs_nand.h"
-+
-+#include "yaffs_checkptrw.h"
-+
-+#include "yaffs_nand.h"
-+#include "yaffs_packedtags2.h"
-+
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+void yfsd_LockYAFFS(BOOL fsLockOnly);
-+void yfsd_UnlockYAFFS(BOOL fsLockOnly);
-+#endif
-+
-+#define YAFFS_PASSIVE_GC_CHUNKS 2
-+
-+#include "yaffs_ecc.h"
-+
-+
-+/* Robustification (if it ever comes about...) */
-+static void yaffs_RetireBlock(yaffs_Device * dev, int blockInNAND);
-+static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND, int erasedOk);
-+static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags * tags);
-+static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
-+ const yaffs_ExtendedTags * tags);
-+
-+/* Other local prototypes */
-+static int yaffs_UnlinkObject( yaffs_Object *obj);
-+static int yaffs_ObjectHasCachedWriteData(yaffs_Object *obj);
-+
-+static void yaffs_HardlinkFixup(yaffs_Device *dev, yaffs_Object *hardList);
-+
-+static int yaffs_WriteNewChunkWithTagsToNAND(yaffs_Device * dev,
-+ const __u8 * buffer,
-+ yaffs_ExtendedTags * tags,
-+ int useReserve);
-+static int yaffs_PutChunkIntoFile(yaffs_Object * in, int chunkInInode,
-+ int chunkInNAND, int inScan);
-+
-+static yaffs_Object *yaffs_CreateNewObject(yaffs_Device * dev, int number,
-+ yaffs_ObjectType type);
-+static void yaffs_AddObjectToDirectory(yaffs_Object * directory,
-+ yaffs_Object * obj);
-+static int yaffs_UpdateObjectHeader(yaffs_Object * in, const YCHAR * name,
-+ int force, int isShrink, int shadows);
-+static void yaffs_RemoveObjectFromDirectory(yaffs_Object * obj);
-+static int yaffs_CheckStructures(void);
-+static int yaffs_DeleteWorker(yaffs_Object * in, yaffs_Tnode * tn, __u32 level,
-+ int chunkOffset, int *limit);
-+static int yaffs_DoGenericObjectDeletion(yaffs_Object * in);
-+
-+static yaffs_BlockInfo *yaffs_GetBlockInfo(yaffs_Device * dev, int blockNo);
-+
-+static __u8 *yaffs_GetTempBuffer(yaffs_Device * dev, int lineNo);
-+static void yaffs_ReleaseTempBuffer(yaffs_Device * dev, __u8 * buffer,
-+ int lineNo);
-+
-+static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND);
-+
-+static int yaffs_UnlinkWorker(yaffs_Object * obj);
-+static void yaffs_DestroyObject(yaffs_Object * obj);
-+
-+static int yaffs_TagsMatch(const yaffs_ExtendedTags * tags, int objectId,
-+ int chunkInObject);
-+
-+loff_t yaffs_GetFileSize(yaffs_Object * obj);
-+
-+static int yaffs_AllocateChunk(yaffs_Device * dev, int useReserve, yaffs_BlockInfo **blockUsedPtr);
-+
-+static void yaffs_VerifyFreeChunks(yaffs_Device * dev);
-+
-+#ifdef YAFFS_PARANOID
-+static int yaffs_CheckFileSanity(yaffs_Object * in);
-+#else
-+#define yaffs_CheckFileSanity(in)
-+#endif
-+
-+static void yaffs_InvalidateWholeChunkCache(yaffs_Object * in);
-+static void yaffs_InvalidateChunkCache(yaffs_Object * object, int chunkId);
-+
-+static void yaffs_InvalidateCheckpoint(yaffs_Device *dev);
-+
-+
-+
-+/* Function to calculate chunk and offset */
-+
-+static void yaffs_AddrToChunk(yaffs_Device *dev, loff_t addr, __u32 *chunk, __u32 *offset)
-+{
-+ if(dev->chunkShift){
-+ /* Easy-peasy power of 2 case */
-+ *chunk = (__u32)(addr >> dev->chunkShift);
-+ *offset = (__u32)(addr & dev->chunkMask);
-+ }
-+ else if(dev->crumbsPerChunk)
-+ {
-+ /* Case where we're using "crumbs" */
-+ *offset = (__u32)(addr & dev->crumbMask);
-+ addr >>= dev->crumbShift;
-+ *chunk = ((__u32)addr)/dev->crumbsPerChunk;
-+ *offset += ((addr - (*chunk * dev->crumbsPerChunk)) << dev->crumbShift);
-+ }
-+ else
-+ YBUG();
-+}
-+
-+/* Function to return the number of shifts for a power of 2 greater than or equal
-+ * to the given number
-+ * Note we don't try to cater for all possible numbers and this does not have to
-+ * be hellishly efficient.
-+ */
-+
-+static __u32 ShiftsGE(__u32 x)
-+{
-+ int extraBits;
-+ int nShifts;
-+
-+ nShifts = extraBits = 0;
-+
-+ while(x>1){
-+ if(x & 1) extraBits++;
-+ x>>=1;
-+ nShifts++;
-+ }
-+
-+ if(extraBits)
-+ nShifts++;
-+
-+ return nShifts;
-+}
-+
-+/* Function to return the number of shifts to get a 1 in bit 0
-+ */
-+
-+static __u32 ShiftDiv(__u32 x)
-+{
-+ int nShifts;
-+
-+ nShifts = 0;
-+
-+ if(!x) return 0;
-+
-+ while( !(x&1)){
-+ x>>=1;
-+ nShifts++;
-+ }
-+
-+ return nShifts;
-+}
-+
-+
-+
-+/*
-+ * Temporary buffer manipulations.
-+ */
-+
-+static __u8 *yaffs_GetTempBuffer(yaffs_Device * dev, int lineNo)
-+{
-+ int i, j;
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ if (dev->tempBuffer[i].line == 0) {
-+ dev->tempBuffer[i].line = lineNo;
-+ if ((i + 1) > dev->maxTemp) {
-+ dev->maxTemp = i + 1;
-+ for (j = 0; j <= i; j++)
-+ dev->tempBuffer[j].maxLine =
-+ dev->tempBuffer[j].line;
-+ }
-+
-+ return dev->tempBuffer[i].buffer;
-+ }
-+ }
-+
-+ T(YAFFS_TRACE_BUFFERS,
-+ (TSTR("Out of temp buffers at line %d, other held by lines:"),
-+ lineNo));
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ T(YAFFS_TRACE_BUFFERS, (TSTR(" %d "), dev->tempBuffer[i].line));
-+ }
-+ T(YAFFS_TRACE_BUFFERS, (TSTR(" " TENDSTR)));
-+
-+ /*
-+ * If we got here then we have to allocate an unmanaged one
-+ * This is not good.
-+ */
-+
-+ dev->unmanagedTempAllocations++;
-+ return YMALLOC(dev->nDataBytesPerChunk);
-+
-+}
-+
-+static void yaffs_ReleaseTempBuffer(yaffs_Device * dev, __u8 * buffer,
-+ int lineNo)
-+{
-+ int i;
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ if (dev->tempBuffer[i].buffer == buffer) {
-+ dev->tempBuffer[i].line = 0;
-+ return;
-+ }
-+ }
-+
-+ if (buffer) {
-+ /* assume it is an unmanaged one. */
-+ T(YAFFS_TRACE_BUFFERS,
-+ (TSTR("Releasing unmanaged temp buffer in line %d" TENDSTR),
-+ lineNo));
-+ YFREE(buffer);
-+ dev->unmanagedTempDeallocations++;
-+ }
-+
-+}
-+
-+/*
-+ * Determine if we have a managed buffer.
-+ */
-+int yaffs_IsManagedTempBuffer(yaffs_Device * dev, const __u8 * buffer)
-+{
-+ int i;
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ if (dev->tempBuffer[i].buffer == buffer)
-+ return 1;
-+
-+ }
-+
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if( dev->srCache[i].data == buffer )
-+ return 1;
-+
-+ }
-+
-+ if (buffer == dev->checkpointBuffer)
-+ return 1;
-+
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: unmaged buffer detected.\n" TENDSTR)));
-+ return 0;
-+}
-+
-+/*
-+ * Chunk bitmap manipulations
-+ */
-+
-+static Y_INLINE __u8 *yaffs_BlockBits(yaffs_Device * dev, int blk)
-+{
-+ if (blk < dev->internalStartBlock || blk > dev->internalEndBlock) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("**>> yaffs: BlockBits block %d is not valid" TENDSTR),
-+ blk));
-+ YBUG();
-+ }
-+ return dev->chunkBits +
-+ (dev->chunkBitmapStride * (blk - dev->internalStartBlock));
-+}
-+
-+static Y_INLINE void yaffs_ClearChunkBits(yaffs_Device * dev, int blk)
-+{
-+ __u8 *blkBits = yaffs_BlockBits(dev, blk);
-+
-+ memset(blkBits, 0, dev->chunkBitmapStride);
-+}
-+
-+static Y_INLINE void yaffs_ClearChunkBit(yaffs_Device * dev, int blk, int chunk)
-+{
-+ __u8 *blkBits = yaffs_BlockBits(dev, blk);
-+
-+ blkBits[chunk / 8] &= ~(1 << (chunk & 7));
-+}
-+
-+static Y_INLINE void yaffs_SetChunkBit(yaffs_Device * dev, int blk, int chunk)
-+{
-+ __u8 *blkBits = yaffs_BlockBits(dev, blk);
-+
-+ blkBits[chunk / 8] |= (1 << (chunk & 7));
-+}
-+
-+static Y_INLINE int yaffs_CheckChunkBit(yaffs_Device * dev, int blk, int chunk)
-+{
-+ __u8 *blkBits = yaffs_BlockBits(dev, blk);
-+ return (blkBits[chunk / 8] & (1 << (chunk & 7))) ? 1 : 0;
-+}
-+
-+static Y_INLINE int yaffs_StillSomeChunkBits(yaffs_Device * dev, int blk)
-+{
-+ __u8 *blkBits = yaffs_BlockBits(dev, blk);
-+ int i;
-+ for (i = 0; i < dev->chunkBitmapStride; i++) {
-+ if (*blkBits)
-+ return 1;
-+ blkBits++;
-+ }
-+ return 0;
-+}
-+
-+/*
-+ * Simple hash function. Needs to have a reasonable spread
-+ */
-+
-+static Y_INLINE int yaffs_HashFunction(int n)
-+{
-+ n = abs(n);
-+ return (n % YAFFS_NOBJECT_BUCKETS);
-+}
-+
-+/*
-+ * Access functions to useful fake objects
-+ */
-+
-+yaffs_Object *yaffs_Root(yaffs_Device * dev)
-+{
-+ return dev->rootDir;
-+}
-+
-+yaffs_Object *yaffs_LostNFound(yaffs_Device * dev)
-+{
-+ return dev->lostNFoundDir;
-+}
-+
-+
-+/*
-+ * Erased NAND checking functions
-+ */
-+
-+int yaffs_CheckFF(__u8 * buffer, int nBytes)
-+{
-+ /* Horrible, slow implementation */
-+ while (nBytes--) {
-+ if (*buffer != 0xFF)
-+ return 0;
-+ buffer++;
-+ }
-+ return 1;
-+}
-+
-+static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND)
-+{
-+
-+ int retval = YAFFS_OK;
-+ __u8 *data = yaffs_GetTempBuffer(dev, __LINE__);
-+ yaffs_ExtendedTags tags;
-+ int result;
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunkInNAND, data, &tags);
-+
-+ if(tags.eccResult > YAFFS_ECC_RESULT_NO_ERROR)
-+ retval = YAFFS_FAIL;
-+
-+
-+ if (!yaffs_CheckFF(data, dev->nDataBytesPerChunk) || tags.chunkUsed) {
-+ T(YAFFS_TRACE_NANDACCESS,
-+ (TSTR("Chunk %d not erased" TENDSTR), chunkInNAND));
-+ retval = YAFFS_FAIL;
-+ }
-+
-+ yaffs_ReleaseTempBuffer(dev, data, __LINE__);
-+
-+ return retval;
-+
-+}
-+
-+static int yaffs_WriteNewChunkWithTagsToNAND(struct yaffs_DeviceStruct *dev,
-+ const __u8 * data,
-+ yaffs_ExtendedTags * tags,
-+ int useReserve)
-+{
-+ int chunk;
-+
-+ int writeOk = 0;
-+ int erasedOk = 1;
-+ int attempts = 0;
-+ yaffs_BlockInfo *bi;
-+
-+ yaffs_InvalidateCheckpoint(dev);
-+
-+ do {
-+ chunk = yaffs_AllocateChunk(dev, useReserve,&bi);
-+
-+ if (chunk >= 0) {
-+ /* First check this chunk is erased, if it needs checking.
-+ * The checking policy (unless forced always on) is as follows:
-+ * Check the first page we try to write in a block.
-+ * - If the check passes then we don't need to check any more.
-+ * - If the check fails, we check again...
-+ * If the block has been erased, we don't need to check.
-+ *
-+ * However, if the block has been prioritised for gc, then
-+ * we think there might be something odd about this block
-+ * and stop using it.
-+ *
-+ * Rationale:
-+ * We should only ever see chunks that have not been erased
-+ * if there was a partially written chunk due to power loss
-+ * This checking policy should catch that case with very
-+ * few checks and thus save a lot of checks that are most likely not
-+ * needed.
-+ */
-+
-+ if(bi->gcPrioritise){
-+ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
-+ } else {
-+#ifdef CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED
-+
-+ bi->skipErasedCheck = 0;
-+
-+#endif
-+ if(!bi->skipErasedCheck){
-+ erasedOk = yaffs_CheckChunkErased(dev, chunk);
-+ if(erasedOk && !bi->gcPrioritise)
-+ bi->skipErasedCheck = 1;
-+ }
-+
-+ if (!erasedOk) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>> yaffs chunk %d was not erased"
-+ TENDSTR), chunk));
-+ } else {
-+ writeOk =
-+ yaffs_WriteChunkWithTagsToNAND(dev, chunk,
-+ data, tags);
-+ }
-+
-+ attempts++;
-+
-+ if (writeOk) {
-+ /*
-+ * Copy the data into the robustification buffer.
-+ * NB We do this at the end to prevent duplicates in the case of a write error.
-+ * Todo
-+ */
-+ yaffs_HandleWriteChunkOk(dev, chunk, data, tags);
-+
-+ } else {
-+ /* The erased check or write failed */
-+ yaffs_HandleWriteChunkError(dev, chunk, erasedOk);
-+ }
-+ }
-+ }
-+
-+ } while (chunk >= 0 && !writeOk);
-+
-+ if (attempts > 1) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("**>> yaffs write required %d attempts" TENDSTR),
-+ attempts));
-+ dev->nRetriedWrites += (attempts - 1);
-+ }
-+
-+ return chunk;
-+}
-+
-+/*
-+ * Block retiring for handling a broken block.
-+ */
-+
-+static void yaffs_RetireBlock(yaffs_Device * dev, int blockInNAND)
-+{
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockInNAND);
-+
-+ yaffs_InvalidateCheckpoint(dev);
-+
-+ yaffs_MarkBlockBad(dev, blockInNAND);
-+
-+ bi->blockState = YAFFS_BLOCK_STATE_DEAD;
-+ bi->gcPrioritise = 0;
-+ bi->needsRetiring = 0;
-+
-+ dev->nRetiredBlocks++;
-+}
-+
-+/*
-+ * Functions for robustisizing TODO
-+ *
-+ */
-+
-+static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags * tags)
-+{
-+}
-+
-+static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
-+ const yaffs_ExtendedTags * tags)
-+{
-+}
-+
-+void yaffs_HandleChunkError(yaffs_Device *dev, yaffs_BlockInfo *bi)
-+{
-+ if(!bi->gcPrioritise){
-+ bi->gcPrioritise = 1;
-+ dev->hasPendingPrioritisedGCs = 1;
-+ bi->chunkErrorStrikes ++;
-+
-+ if(bi->chunkErrorStrikes > 3){
-+ bi->needsRetiring = 1; /* Too many stikes, so retire this */
-+ T(YAFFS_TRACE_ALWAYS, (TSTR("yaffs: Block struck out" TENDSTR)));
-+
-+ }
-+
-+ }
-+}
-+
-+static void yaffs_ReportOddballBlocks(yaffs_Device *dev)
-+{
-+ int i;
-+
-+ for(i = dev->internalStartBlock; i <= dev->internalEndBlock && (yaffs_traceMask & YAFFS_TRACE_BAD_BLOCKS); i++){
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
-+ if(bi->needsRetiring || bi->gcPrioritise)
-+ T(YAFFS_TRACE_BAD_BLOCKS,(TSTR("yaffs block %d%s%s" TENDSTR),
-+ i,
-+ bi->needsRetiring ? " needs retiring" : "",
-+ bi->gcPrioritise ? " gc prioritised" : ""));
-+
-+ }
-+}
-+
-+static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND, int erasedOk)
-+{
-+
-+ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockInNAND);
-+
-+ yaffs_HandleChunkError(dev,bi);
-+
-+
-+ if(erasedOk ) {
-+ /* Was an actual write failure, so mark the block for retirement */
-+ bi->needsRetiring = 1;
-+ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("**>> Block %d needs retiring" TENDSTR), blockInNAND));
-+
-+
-+ }
-+
-+ /* Delete the chunk */
-+ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
-+}
-+
-+
-+/*---------------- Name handling functions ------------*/
-+
-+static __u16 yaffs_CalcNameSum(const YCHAR * name)
-+{
-+ __u16 sum = 0;
-+ __u16 i = 1;
-+
-+ YUCHAR *bname = (YUCHAR *) name;
-+ if (bname) {
-+ while ((*bname) && (i <= YAFFS_MAX_NAME_LENGTH)) {
-+
-+#ifdef CONFIG_YAFFS_CASE_INSENSITIVE
-+ sum += yaffs_toupper(*bname) * i;
-+#else
-+ sum += (*bname) * i;
-+#endif
-+ i++;
-+ bname++;
-+ }
-+ }
-+ return sum;
-+}
-+
-+static void yaffs_SetObjectName(yaffs_Object * obj, const YCHAR * name)
-+{
-+#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
-+ if (name && yaffs_strlen(name) <= YAFFS_SHORT_NAME_LENGTH) {
-+ yaffs_strcpy(obj->shortName, name);
-+ } else {
-+ obj->shortName[0] = _Y('\0');
-+ }
-+#endif
-+ obj->sum = yaffs_CalcNameSum(name);
-+}
-+
-+/*-------------------- TNODES -------------------
-+
-+ * List of spare tnodes
-+ * The list is hooked together using the first pointer
-+ * in the tnode.
-+ */
-+
-+/* yaffs_CreateTnodes creates a bunch more tnodes and
-+ * adds them to the tnode free list.
-+ * Don't use this function directly
-+ */
-+
-+static int yaffs_CreateTnodes(yaffs_Device * dev, int nTnodes)
-+{
-+ int i;
-+ int tnodeSize;
-+ yaffs_Tnode *newTnodes;
-+ __u8 *mem;
-+ yaffs_Tnode *curr;
-+ yaffs_Tnode *next;
-+ yaffs_TnodeList *tnl;
-+
-+ if (nTnodes < 1)
-+ return YAFFS_OK;
-+
-+ /* Calculate the tnode size in bytes for variable width tnode support.
-+ * Must be a multiple of 32-bits */
-+ tnodeSize = (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8;
-+
-+ /* make these things */
-+
-+ newTnodes = YMALLOC(nTnodes * tnodeSize);
-+ mem = (__u8 *)newTnodes;
-+
-+ if (!newTnodes) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("yaffs: Could not allocate Tnodes" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* Hook them into the free list */
-+#if 0
-+ for (i = 0; i < nTnodes - 1; i++) {
-+ newTnodes[i].internal[0] = &newTnodes[i + 1];
-+#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ newTnodes[i].internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
-+#endif
-+ }
-+
-+ newTnodes[nTnodes - 1].internal[0] = dev->freeTnodes;
-+#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ newTnodes[nTnodes - 1].internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
-+#endif
-+ dev->freeTnodes = newTnodes;
-+#else
-+ /* New hookup for wide tnodes */
-+ for(i = 0; i < nTnodes -1; i++) {
-+ curr = (yaffs_Tnode *) &mem[i * tnodeSize];
-+ next = (yaffs_Tnode *) &mem[(i+1) * tnodeSize];
-+ curr->internal[0] = next;
-+ }
-+
-+ curr = (yaffs_Tnode *) &mem[(nTnodes - 1) * tnodeSize];
-+ curr->internal[0] = dev->freeTnodes;
-+ dev->freeTnodes = (yaffs_Tnode *)mem;
-+
-+#endif
-+
-+
-+ dev->nFreeTnodes += nTnodes;
-+ dev->nTnodesCreated += nTnodes;
-+
-+ /* Now add this bunch of tnodes to a list for freeing up.
-+ * NB If we can't add this to the management list it isn't fatal
-+ * but it just means we can't free this bunch of tnodes later.
-+ */
-+
-+ tnl = YMALLOC(sizeof(yaffs_TnodeList));
-+ if (!tnl) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs: Could not add tnodes to management list" TENDSTR)));
-+
-+ } else {
-+ tnl->tnodes = newTnodes;
-+ tnl->next = dev->allocatedTnodeList;
-+ dev->allocatedTnodeList = tnl;
-+ }
-+
-+ T(YAFFS_TRACE_ALLOCATE, (TSTR("yaffs: Tnodes added" TENDSTR)));
-+
-+ return YAFFS_OK;
-+}
-+
-+/* GetTnode gets us a clean tnode. Tries to make allocate more if we run out */
-+
-+static yaffs_Tnode *yaffs_GetTnodeRaw(yaffs_Device * dev)
-+{
-+ yaffs_Tnode *tn = NULL;
-+
-+ /* If there are none left make more */
-+ if (!dev->freeTnodes) {
-+ yaffs_CreateTnodes(dev, YAFFS_ALLOCATION_NTNODES);
-+ }
-+
-+ if (dev->freeTnodes) {
-+ tn = dev->freeTnodes;
-+#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ if (tn->internal[YAFFS_NTNODES_INTERNAL] != (void *)1) {
-+ /* Hoosterman, this thing looks like it isn't in the list */
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: Tnode list bug 1" TENDSTR)));
-+ }
-+#endif
-+ dev->freeTnodes = dev->freeTnodes->internal[0];
-+ dev->nFreeTnodes--;
-+ }
-+
-+ return tn;
-+}
-+
-+static yaffs_Tnode *yaffs_GetTnode(yaffs_Device * dev)
-+{
-+ yaffs_Tnode *tn = yaffs_GetTnodeRaw(dev);
-+
-+ if(tn)
-+ memset(tn, 0, (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
-+
-+ return tn;
-+}
-+
-+/* FreeTnode frees up a tnode and puts it back on the free list */
-+static void yaffs_FreeTnode(yaffs_Device * dev, yaffs_Tnode * tn)
-+{
-+ if (tn) {
-+#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ if (tn->internal[YAFFS_NTNODES_INTERNAL] != 0) {
-+ /* Hoosterman, this thing looks like it is already in the list */
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: Tnode list bug 2" TENDSTR)));
-+ }
-+ tn->internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
-+#endif
-+ tn->internal[0] = dev->freeTnodes;
-+ dev->freeTnodes = tn;
-+ dev->nFreeTnodes++;
-+ }
-+}
-+
-+static void yaffs_DeinitialiseTnodes(yaffs_Device * dev)
-+{
-+ /* Free the list of allocated tnodes */
-+ yaffs_TnodeList *tmp;
-+
-+ while (dev->allocatedTnodeList) {
-+ tmp = dev->allocatedTnodeList->next;
-+
-+ YFREE(dev->allocatedTnodeList->tnodes);
-+ YFREE(dev->allocatedTnodeList);
-+ dev->allocatedTnodeList = tmp;
-+
-+ }
-+
-+ dev->freeTnodes = NULL;
-+ dev->nFreeTnodes = 0;
-+}
-+
-+static void yaffs_InitialiseTnodes(yaffs_Device * dev)
-+{
-+ dev->allocatedTnodeList = NULL;
-+ dev->freeTnodes = NULL;
-+ dev->nFreeTnodes = 0;
-+ dev->nTnodesCreated = 0;
-+
-+}
-+
-+
-+void yaffs_PutLevel0Tnode(yaffs_Device *dev, yaffs_Tnode *tn, unsigned pos, unsigned val)
-+{
-+ __u32 *map = (__u32 *)tn;
-+ __u32 bitInMap;
-+ __u32 bitInWord;
-+ __u32 wordInMap;
-+ __u32 mask;
-+
-+ pos &= YAFFS_TNODES_LEVEL0_MASK;
-+ val >>= dev->chunkGroupBits;
-+
-+ bitInMap = pos * dev->tnodeWidth;
-+ wordInMap = bitInMap /32;
-+ bitInWord = bitInMap & (32 -1);
-+
-+ mask = dev->tnodeMask << bitInWord;
-+
-+ map[wordInMap] &= ~mask;
-+ map[wordInMap] |= (mask & (val << bitInWord));
-+
-+ if(dev->tnodeWidth > (32-bitInWord)) {
-+ bitInWord = (32 - bitInWord);
-+ wordInMap++;;
-+ mask = dev->tnodeMask >> (/*dev->tnodeWidth -*/ bitInWord);
-+ map[wordInMap] &= ~mask;
-+ map[wordInMap] |= (mask & (val >> bitInWord));
-+ }
-+}
-+
-+__u32 yaffs_GetChunkGroupBase(yaffs_Device *dev, yaffs_Tnode *tn, unsigned pos)
-+{
-+ __u32 *map = (__u32 *)tn;
-+ __u32 bitInMap;
-+ __u32 bitInWord;
-+ __u32 wordInMap;
-+ __u32 val;
-+
-+ pos &= YAFFS_TNODES_LEVEL0_MASK;
-+
-+ bitInMap = pos * dev->tnodeWidth;
-+ wordInMap = bitInMap /32;
-+ bitInWord = bitInMap & (32 -1);
-+
-+ val = map[wordInMap] >> bitInWord;
-+
-+ if(dev->tnodeWidth > (32-bitInWord)) {
-+ bitInWord = (32 - bitInWord);
-+ wordInMap++;;
-+ val |= (map[wordInMap] << bitInWord);
-+ }
-+
-+ val &= dev->tnodeMask;
-+ val <<= dev->chunkGroupBits;
-+
-+ return val;
-+}
-+
-+/* ------------------- End of individual tnode manipulation -----------------*/
-+
-+/* ---------Functions to manipulate the look-up tree (made up of tnodes) ------
-+ * The look up tree is represented by the top tnode and the number of topLevel
-+ * in the tree. 0 means only the level 0 tnode is in the tree.
-+ */
-+
-+/* FindLevel0Tnode finds the level 0 tnode, if one exists. */
-+static yaffs_Tnode *yaffs_FindLevel0Tnode(yaffs_Device * dev,
-+ yaffs_FileStructure * fStruct,
-+ __u32 chunkId)
-+{
-+
-+ yaffs_Tnode *tn = fStruct->top;
-+ __u32 i;
-+ int requiredTallness;
-+ int level = fStruct->topLevel;
-+
-+ /* Check sane level and chunk Id */
-+ if (level < 0 || level > YAFFS_TNODES_MAX_LEVEL) {
-+ return NULL;
-+ }
-+
-+ if (chunkId > YAFFS_MAX_CHUNK_ID) {
-+ return NULL;
-+ }
-+
-+ /* First check we're tall enough (ie enough topLevel) */
-+
-+ i = chunkId >> YAFFS_TNODES_LEVEL0_BITS;
-+ requiredTallness = 0;
-+ while (i) {
-+ i >>= YAFFS_TNODES_INTERNAL_BITS;
-+ requiredTallness++;
-+ }
-+
-+ if (requiredTallness > fStruct->topLevel) {
-+ /* Not tall enough, so we can't find it, return NULL. */
-+ return NULL;
-+ }
-+
-+ /* Traverse down to level 0 */
-+ while (level > 0 && tn) {
-+ tn = tn->
-+ internal[(chunkId >>
-+ ( YAFFS_TNODES_LEVEL0_BITS +
-+ (level - 1) *
-+ YAFFS_TNODES_INTERNAL_BITS)
-+ ) &
-+ YAFFS_TNODES_INTERNAL_MASK];
-+ level--;
-+
-+ }
-+
-+ return tn;
-+}
-+
-+/* AddOrFindLevel0Tnode finds the level 0 tnode if it exists, otherwise first expands the tree.
-+ * This happens in two steps:
-+ * 1. If the tree isn't tall enough, then make it taller.
-+ * 2. Scan down the tree towards the level 0 tnode adding tnodes if required.
-+ *
-+ * Used when modifying the tree.
-+ *
-+ * If the tn argument is NULL, then a fresh tnode will be added otherwise the specified tn will
-+ * be plugged into the ttree.
-+ */
-+
-+static yaffs_Tnode *yaffs_AddOrFindLevel0Tnode(yaffs_Device * dev,
-+ yaffs_FileStructure * fStruct,
-+ __u32 chunkId,
-+ yaffs_Tnode *passedTn)
-+{
-+
-+ int requiredTallness;
-+ int i;
-+ int l;
-+ yaffs_Tnode *tn;
-+
-+ __u32 x;
-+
-+
-+ /* Check sane level and page Id */
-+ if (fStruct->topLevel < 0 || fStruct->topLevel > YAFFS_TNODES_MAX_LEVEL) {
-+ return NULL;
-+ }
-+
-+ if (chunkId > YAFFS_MAX_CHUNK_ID) {
-+ return NULL;
-+ }
-+
-+ /* First check we're tall enough (ie enough topLevel) */
-+
-+ x = chunkId >> YAFFS_TNODES_LEVEL0_BITS;
-+ requiredTallness = 0;
-+ while (x) {
-+ x >>= YAFFS_TNODES_INTERNAL_BITS;
-+ requiredTallness++;
-+ }
-+
-+
-+ if (requiredTallness > fStruct->topLevel) {
-+ /* Not tall enough,gotta make the tree taller */
-+ for (i = fStruct->topLevel; i < requiredTallness; i++) {
-+
-+ tn = yaffs_GetTnode(dev);
-+
-+ if (tn) {
-+ tn->internal[0] = fStruct->top;
-+ fStruct->top = tn;
-+ } else {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("yaffs: no more tnodes" TENDSTR)));
-+ }
-+ }
-+
-+ fStruct->topLevel = requiredTallness;
-+ }
-+
-+ /* Traverse down to level 0, adding anything we need */
-+
-+ l = fStruct->topLevel;
-+ tn = fStruct->top;
-+
-+ if(l > 0) {
-+ while (l > 0 && tn) {
-+ x = (chunkId >>
-+ ( YAFFS_TNODES_LEVEL0_BITS +
-+ (l - 1) * YAFFS_TNODES_INTERNAL_BITS)) &
-+ YAFFS_TNODES_INTERNAL_MASK;
-+
-+
-+ if((l>1) && !tn->internal[x]){
-+ /* Add missing non-level-zero tnode */
-+ tn->internal[x] = yaffs_GetTnode(dev);
-+
-+ } else if(l == 1) {
-+ /* Looking from level 1 at level 0 */
-+ if (passedTn) {
-+ /* If we already have one, then release it.*/
-+ if(tn->internal[x])
-+ yaffs_FreeTnode(dev,tn->internal[x]);
-+ tn->internal[x] = passedTn;
-+
-+ } else if(!tn->internal[x]) {
-+ /* Don't have one, none passed in */
-+ tn->internal[x] = yaffs_GetTnode(dev);
-+ }
-+ }
-+
-+ tn = tn->internal[x];
-+ l--;
-+ }
-+ } else {
-+ /* top is level 0 */
-+ if(passedTn) {
-+ memcpy(tn,passedTn,(dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
-+ yaffs_FreeTnode(dev,passedTn);
-+ }
-+ }
-+
-+ return tn;
-+}
-+
-+static int yaffs_FindChunkInGroup(yaffs_Device * dev, int theChunk,
-+ yaffs_ExtendedTags * tags, int objectId,
-+ int chunkInInode)
-+{
-+ int j;
-+
-+ for (j = 0; theChunk && j < dev->chunkGroupSize; j++) {
-+ if (yaffs_CheckChunkBit
-+ (dev, theChunk / dev->nChunksPerBlock,
-+ theChunk % dev->nChunksPerBlock)) {
-+ yaffs_ReadChunkWithTagsFromNAND(dev, theChunk, NULL,
-+ tags);
-+ if (yaffs_TagsMatch(tags, objectId, chunkInInode)) {
-+ /* found it; */
-+ return theChunk;
-+
-+ }
-+ }
-+ theChunk++;
-+ }
-+ return -1;
-+}
-+
-+
-+/* DeleteWorker scans backwards through the tnode tree and deletes all the
-+ * chunks and tnodes in the file
-+ * Returns 1 if the tree was deleted.
-+ * Returns 0 if it stopped early due to hitting the limit and the delete is incomplete.
-+ */
-+
-+static int yaffs_DeleteWorker(yaffs_Object * in, yaffs_Tnode * tn, __u32 level,
-+ int chunkOffset, int *limit)
-+{
-+ int i;
-+ int chunkInInode;
-+ int theChunk;
-+ yaffs_ExtendedTags tags;
-+ int foundChunk;
-+ yaffs_Device *dev = in->myDev;
-+
-+ int allDone = 1;
-+
-+ if (tn) {
-+ if (level > 0) {
-+
-+ for (i = YAFFS_NTNODES_INTERNAL - 1; allDone && i >= 0;
-+ i--) {
-+ if (tn->internal[i]) {
-+ if (limit && (*limit) < 0) {
-+ allDone = 0;
-+ } else {
-+ allDone =
-+ yaffs_DeleteWorker(in,
-+ tn->
-+ internal
-+ [i],
-+ level -
-+ 1,
-+ (chunkOffset
-+ <<
-+ YAFFS_TNODES_INTERNAL_BITS)
-+ + i,
-+ limit);
-+ }
-+ if (allDone) {
-+ yaffs_FreeTnode(dev,
-+ tn->
-+ internal[i]);
-+ tn->internal[i] = NULL;
-+ }
-+ }
-+
-+ }
-+ return (allDone) ? 1 : 0;
-+ } else if (level == 0) {
-+ int hitLimit = 0;
-+
-+ for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0 && !hitLimit;
-+ i--) {
-+ theChunk = yaffs_GetChunkGroupBase(dev,tn,i);
-+ if (theChunk) {
-+
-+ chunkInInode =
-+ (chunkOffset <<
-+ YAFFS_TNODES_LEVEL0_BITS) + i;
-+
-+ foundChunk =
-+ yaffs_FindChunkInGroup(dev,
-+ theChunk,
-+ &tags,
-+ in->objectId,
-+ chunkInInode);
-+
-+ if (foundChunk > 0) {
-+ yaffs_DeleteChunk(dev,
-+ foundChunk, 1,
-+ __LINE__);
-+ in->nDataChunks--;
-+ if (limit) {
-+ *limit = *limit - 1;
-+ if (*limit <= 0) {
-+ hitLimit = 1;
-+ }
-+ }
-+
-+ }
-+
-+ yaffs_PutLevel0Tnode(dev,tn,i,0);
-+ }
-+
-+ }
-+ return (i < 0) ? 1 : 0;
-+
-+ }
-+
-+ }
-+
-+ return 1;
-+
-+}
-+
-+static void yaffs_SoftDeleteChunk(yaffs_Device * dev, int chunk)
-+{
-+
-+ yaffs_BlockInfo *theBlock;
-+
-+ T(YAFFS_TRACE_DELETION, (TSTR("soft delete chunk %d" TENDSTR), chunk));
-+
-+ theBlock = yaffs_GetBlockInfo(dev, chunk / dev->nChunksPerBlock);
-+ if (theBlock) {
-+ theBlock->softDeletions++;
-+ dev->nFreeChunks++;
-+ }
-+}
-+
-+/* SoftDeleteWorker scans backwards through the tnode tree and soft deletes all the chunks in the file.
-+ * All soft deleting does is increment the block's softdelete count and pulls the chunk out
-+ * of the tnode.
-+ * Thus, essentially this is the same as DeleteWorker except that the chunks are soft deleted.
-+ */
-+
-+static int yaffs_SoftDeleteWorker(yaffs_Object * in, yaffs_Tnode * tn,
-+ __u32 level, int chunkOffset)
-+{
-+ int i;
-+ int theChunk;
-+ int allDone = 1;
-+ yaffs_Device *dev = in->myDev;
-+
-+ if (tn) {
-+ if (level > 0) {
-+
-+ for (i = YAFFS_NTNODES_INTERNAL - 1; allDone && i >= 0;
-+ i--) {
-+ if (tn->internal[i]) {
-+ allDone =
-+ yaffs_SoftDeleteWorker(in,
-+ tn->
-+ internal[i],
-+ level - 1,
-+ (chunkOffset
-+ <<
-+ YAFFS_TNODES_INTERNAL_BITS)
-+ + i);
-+ if (allDone) {
-+ yaffs_FreeTnode(dev,
-+ tn->
-+ internal[i]);
-+ tn->internal[i] = NULL;
-+ } else {
-+ /* Hoosterman... how could this happen? */
-+ }
-+ }
-+ }
-+ return (allDone) ? 1 : 0;
-+ } else if (level == 0) {
-+
-+ for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0; i--) {
-+ theChunk = yaffs_GetChunkGroupBase(dev,tn,i);
-+ if (theChunk) {
-+ /* Note this does not find the real chunk, only the chunk group.
-+ * We make an assumption that a chunk group is not larger than
-+ * a block.
-+ */
-+ yaffs_SoftDeleteChunk(dev, theChunk);
-+ yaffs_PutLevel0Tnode(dev,tn,i,0);
-+ }
-+
-+ }
-+ return 1;
-+
-+ }
-+
-+ }
-+
-+ return 1;
-+
-+}
-+
-+static void yaffs_SoftDeleteFile(yaffs_Object * obj)
-+{
-+ if (obj->deleted &&
-+ obj->variantType == YAFFS_OBJECT_TYPE_FILE && !obj->softDeleted) {
-+ if (obj->nDataChunks <= 0) {
-+ /* Empty file with no duplicate object headers, just delete it immediately */
-+ yaffs_FreeTnode(obj->myDev,
-+ obj->variant.fileVariant.top);
-+ obj->variant.fileVariant.top = NULL;
-+ T(YAFFS_TRACE_TRACING,
-+ (TSTR("yaffs: Deleting empty file %d" TENDSTR),
-+ obj->objectId));
-+ yaffs_DoGenericObjectDeletion(obj);
-+ } else {
-+ yaffs_SoftDeleteWorker(obj,
-+ obj->variant.fileVariant.top,
-+ obj->variant.fileVariant.
-+ topLevel, 0);
-+ obj->softDeleted = 1;
-+ }
-+ }
-+}
-+
-+/* Pruning removes any part of the file structure tree that is beyond the
-+ * bounds of the file (ie that does not point to chunks).
-+ *
-+ * A file should only get pruned when its size is reduced.
-+ *
-+ * Before pruning, the chunks must be pulled from the tree and the
-+ * level 0 tnode entries must be zeroed out.
-+ * Could also use this for file deletion, but that's probably better handled
-+ * by a special case.
-+ */
-+
-+static yaffs_Tnode *yaffs_PruneWorker(yaffs_Device * dev, yaffs_Tnode * tn,
-+ __u32 level, int del0)
-+{
-+ int i;
-+ int hasData;
-+
-+ if (tn) {
-+ hasData = 0;
-+
-+ for (i = 0; i < YAFFS_NTNODES_INTERNAL; i++) {
-+ if (tn->internal[i] && level > 0) {
-+ tn->internal[i] =
-+ yaffs_PruneWorker(dev, tn->internal[i],
-+ level - 1,
-+ (i == 0) ? del0 : 1);
-+ }
-+
-+ if (tn->internal[i]) {
-+ hasData++;
-+ }
-+ }
-+
-+ if (hasData == 0 && del0) {
-+ /* Free and return NULL */
-+
-+ yaffs_FreeTnode(dev, tn);
-+ tn = NULL;
-+ }
-+
-+ }
-+
-+ return tn;
-+
-+}
-+
-+static int yaffs_PruneFileStructure(yaffs_Device * dev,
-+ yaffs_FileStructure * fStruct)
-+{
-+ int i;
-+ int hasData;
-+ int done = 0;
-+ yaffs_Tnode *tn;
-+
-+ if (fStruct->topLevel > 0) {
-+ fStruct->top =
-+ yaffs_PruneWorker(dev, fStruct->top, fStruct->topLevel, 0);
-+
-+ /* Now we have a tree with all the non-zero branches NULL but the height
-+ * is the same as it was.
-+ * Let's see if we can trim internal tnodes to shorten the tree.
-+ * We can do this if only the 0th element in the tnode is in use
-+ * (ie all the non-zero are NULL)
-+ */
-+
-+ while (fStruct->topLevel && !done) {
-+ tn = fStruct->top;
-+
-+ hasData = 0;
-+ for (i = 1; i < YAFFS_NTNODES_INTERNAL; i++) {
-+ if (tn->internal[i]) {
-+ hasData++;
-+ }
-+ }
-+
-+ if (!hasData) {
-+ fStruct->top = tn->internal[0];
-+ fStruct->topLevel--;
-+ yaffs_FreeTnode(dev, tn);
-+ } else {
-+ done = 1;
-+ }
-+ }
-+ }
-+
-+ return YAFFS_OK;
-+}
-+
-+/*-------------------- End of File Structure functions.-------------------*/
-+
-+/* yaffs_CreateFreeObjects creates a bunch more objects and
-+ * adds them to the object free list.
-+ */
-+static int yaffs_CreateFreeObjects(yaffs_Device * dev, int nObjects)
-+{
-+ int i;
-+ yaffs_Object *newObjects;
-+ yaffs_ObjectList *list;
-+
-+ if (nObjects < 1)
-+ return YAFFS_OK;
-+
-+ /* make these things */
-+ newObjects = YMALLOC(nObjects * sizeof(yaffs_Object));
-+
-+ if (!newObjects) {
-+ T(YAFFS_TRACE_ALLOCATE,
-+ (TSTR("yaffs: Could not allocate more objects" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* Hook them into the free list */
-+ for (i = 0; i < nObjects - 1; i++) {
-+ newObjects[i].siblings.next =
-+ (struct list_head *)(&newObjects[i + 1]);
-+ }
-+
-+ newObjects[nObjects - 1].siblings.next = (void *)dev->freeObjects;
-+ dev->freeObjects = newObjects;
-+ dev->nFreeObjects += nObjects;
-+ dev->nObjectsCreated += nObjects;
-+
-+ /* Now add this bunch of Objects to a list for freeing up. */
-+
-+ list = YMALLOC(sizeof(yaffs_ObjectList));
-+ if (!list) {
-+ T(YAFFS_TRACE_ALLOCATE,
-+ (TSTR("Could not add objects to management list" TENDSTR)));
-+ } else {
-+ list->objects = newObjects;
-+ list->next = dev->allocatedObjectList;
-+ dev->allocatedObjectList = list;
-+ }
-+
-+ return YAFFS_OK;
-+}
-+
-+
-+/* AllocateEmptyObject gets us a clean Object. Tries to make allocate more if we run out */
-+static yaffs_Object *yaffs_AllocateEmptyObject(yaffs_Device * dev)
-+{
-+ yaffs_Object *tn = NULL;
-+
-+ /* If there are none left make more */
-+ if (!dev->freeObjects) {
-+ yaffs_CreateFreeObjects(dev, YAFFS_ALLOCATION_NOBJECTS);
-+ }
-+
-+ if (dev->freeObjects) {
-+ tn = dev->freeObjects;
-+ dev->freeObjects =
-+ (yaffs_Object *) (dev->freeObjects->siblings.next);
-+ dev->nFreeObjects--;
-+
-+ /* Now sweeten it up... */
-+
-+ memset(tn, 0, sizeof(yaffs_Object));
-+ tn->myDev = dev;
-+ tn->chunkId = -1;
-+ tn->variantType = YAFFS_OBJECT_TYPE_UNKNOWN;
-+ INIT_LIST_HEAD(&(tn->hardLinks));
-+ INIT_LIST_HEAD(&(tn->hashLink));
-+ INIT_LIST_HEAD(&tn->siblings);
-+
-+ /* Add it to the lost and found directory.
-+ * NB Can't put root or lostNFound in lostNFound so
-+ * check if lostNFound exists first
-+ */
-+ if (dev->lostNFoundDir) {
-+ yaffs_AddObjectToDirectory(dev->lostNFoundDir, tn);
-+ }
-+ }
-+
-+ return tn;
-+}
-+
-+static yaffs_Object *yaffs_CreateFakeDirectory(yaffs_Device * dev, int number,
-+ __u32 mode)
-+{
-+
-+ yaffs_Object *obj =
-+ yaffs_CreateNewObject(dev, number, YAFFS_OBJECT_TYPE_DIRECTORY);
-+ if (obj) {
-+ obj->fake = 1; /* it is fake so it has no NAND presence... */
-+ obj->renameAllowed = 0; /* ... and we're not allowed to rename it... */
-+ obj->unlinkAllowed = 0; /* ... or unlink it */
-+ obj->deleted = 0;
-+ obj->unlinked = 0;
-+ obj->yst_mode = mode;
-+ obj->myDev = dev;
-+ obj->chunkId = 0; /* Not a valid chunk. */
-+ }
-+
-+ return obj;
-+
-+}
-+
-+static void yaffs_UnhashObject(yaffs_Object * tn)
-+{
-+ int bucket;
-+ yaffs_Device *dev = tn->myDev;
-+
-+ /* If it is still linked into the bucket list, free from the list */
-+ if (!list_empty(&tn->hashLink)) {
-+ list_del_init(&tn->hashLink);
-+ bucket = yaffs_HashFunction(tn->objectId);
-+ dev->objectBucket[bucket].count--;
-+ }
-+
-+}
-+
-+/* FreeObject frees up a Object and puts it back on the free list */
-+static void yaffs_FreeObject(yaffs_Object * tn)
-+{
-+
-+ yaffs_Device *dev = tn->myDev;
-+
-+#ifdef __KERNEL__
-+ if (tn->myInode) {
-+ /* We're still hooked up to a cached inode.
-+ * Don't delete now, but mark for later deletion
-+ */
-+ tn->deferedFree = 1;
-+ return;
-+ }
-+#endif
-+
-+ yaffs_UnhashObject(tn);
-+
-+ /* Link into the free list. */
-+ tn->siblings.next = (struct list_head *)(dev->freeObjects);
-+ dev->freeObjects = tn;
-+ dev->nFreeObjects++;
-+}
-+
-+#ifdef __KERNEL__
-+
-+void yaffs_HandleDeferedFree(yaffs_Object * obj)
-+{
-+ if (obj->deferedFree) {
-+ yaffs_FreeObject(obj);
-+ }
-+}
-+
-+#endif
-+
-+static void yaffs_DeinitialiseObjects(yaffs_Device * dev)
-+{
-+ /* Free the list of allocated Objects */
-+
-+ yaffs_ObjectList *tmp;
-+
-+ while (dev->allocatedObjectList) {
-+ tmp = dev->allocatedObjectList->next;
-+ YFREE(dev->allocatedObjectList->objects);
-+ YFREE(dev->allocatedObjectList);
-+
-+ dev->allocatedObjectList = tmp;
-+ }
-+
-+ dev->freeObjects = NULL;
-+ dev->nFreeObjects = 0;
-+}
-+
-+static void yaffs_InitialiseObjects(yaffs_Device * dev)
-+{
-+ int i;
-+
-+ dev->allocatedObjectList = NULL;
-+ dev->freeObjects = NULL;
-+ dev->nFreeObjects = 0;
-+
-+ for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) {
-+ INIT_LIST_HEAD(&dev->objectBucket[i].list);
-+ dev->objectBucket[i].count = 0;
-+ }
-+
-+}
-+
-+static int yaffs_FindNiceObjectBucket(yaffs_Device * dev)
-+{
-+ static int x = 0;
-+ int i;
-+ int l = 999;
-+ int lowest = 999999;
-+
-+ /* First let's see if we can find one that's empty. */
-+
-+ for (i = 0; i < 10 && lowest > 0; i++) {
-+ x++;
-+ x %= YAFFS_NOBJECT_BUCKETS;
-+ if (dev->objectBucket[x].count < lowest) {
-+ lowest = dev->objectBucket[x].count;
-+ l = x;
-+ }
-+
-+ }
-+
-+ /* If we didn't find an empty list, then try
-+ * looking a bit further for a short one
-+ */
-+
-+ for (i = 0; i < 10 && lowest > 3; i++) {
-+ x++;
-+ x %= YAFFS_NOBJECT_BUCKETS;
-+ if (dev->objectBucket[x].count < lowest) {
-+ lowest = dev->objectBucket[x].count;
-+ l = x;
-+ }
-+
-+ }
-+
-+ return l;
-+}
-+
-+static int yaffs_CreateNewObjectNumber(yaffs_Device * dev)
-+{
-+ int bucket = yaffs_FindNiceObjectBucket(dev);
-+
-+ /* Now find an object value that has not already been taken
-+ * by scanning the list.
-+ */
-+
-+ int found = 0;
-+ struct list_head *i;
-+
-+ __u32 n = (__u32) bucket;
-+
-+ /* yaffs_CheckObjectHashSanity(); */
-+
-+ while (!found) {
-+ found = 1;
-+ n += YAFFS_NOBJECT_BUCKETS;
-+ if (1 || dev->objectBucket[bucket].count > 0) {
-+ list_for_each(i, &dev->objectBucket[bucket].list) {
-+ /* If there is already one in the list */
-+ if (i
-+ && list_entry(i, yaffs_Object,
-+ hashLink)->objectId == n) {
-+ found = 0;
-+ }
-+ }
-+ }
-+ }
-+
-+
-+ return n;
-+}
-+
-+static void yaffs_HashObject(yaffs_Object * in)
-+{
-+ int bucket = yaffs_HashFunction(in->objectId);
-+ yaffs_Device *dev = in->myDev;
-+
-+ list_add(&in->hashLink, &dev->objectBucket[bucket].list);
-+ dev->objectBucket[bucket].count++;
-+
-+}
-+
-+yaffs_Object *yaffs_FindObjectByNumber(yaffs_Device * dev, __u32 number)
-+{
-+ int bucket = yaffs_HashFunction(number);
-+ struct list_head *i;
-+ yaffs_Object *in;
-+
-+ list_for_each(i, &dev->objectBucket[bucket].list) {
-+ /* Look if it is in the list */
-+ if (i) {
-+ in = list_entry(i, yaffs_Object, hashLink);
-+ if (in->objectId == number) {
-+#ifdef __KERNEL__
-+ /* Don't tell the VFS about this one if it is defered free */
-+ if (in->deferedFree)
-+ return NULL;
-+#endif
-+
-+ return in;
-+ }
-+ }
-+ }
-+
-+ return NULL;
-+}
-+
-+yaffs_Object *yaffs_CreateNewObject(yaffs_Device * dev, int number,
-+ yaffs_ObjectType type)
-+{
-+
-+ yaffs_Object *theObject;
-+
-+ if (number < 0) {
-+ number = yaffs_CreateNewObjectNumber(dev);
-+ }
-+
-+ theObject = yaffs_AllocateEmptyObject(dev);
-+
-+ if (theObject) {
-+ theObject->fake = 0;
-+ theObject->renameAllowed = 1;
-+ theObject->unlinkAllowed = 1;
-+ theObject->objectId = number;
-+ yaffs_HashObject(theObject);
-+ theObject->variantType = type;
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_WinFileTimeNow(theObject->win_atime);
-+ theObject->win_ctime[0] = theObject->win_mtime[0] =
-+ theObject->win_atime[0];
-+ theObject->win_ctime[1] = theObject->win_mtime[1] =
-+ theObject->win_atime[1];
-+
-+#else
-+
-+ theObject->yst_atime = theObject->yst_mtime =
-+ theObject->yst_ctime = Y_CURRENT_TIME;
-+#endif
-+ switch (type) {
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ theObject->variant.fileVariant.fileSize = 0;
-+ theObject->variant.fileVariant.scannedFileSize = 0;
-+ theObject->variant.fileVariant.shrinkSize = 0xFFFFFFFF; /* max __u32 */
-+ theObject->variant.fileVariant.topLevel = 0;
-+ theObject->variant.fileVariant.top =
-+ yaffs_GetTnode(dev);
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ INIT_LIST_HEAD(&theObject->variant.directoryVariant.
-+ children);
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ /* No action required */
-+ break;
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ /* todo this should not happen */
-+ break;
-+ }
-+ }
-+
-+ return theObject;
-+}
-+
-+static yaffs_Object *yaffs_FindOrCreateObjectByNumber(yaffs_Device * dev,
-+ int number,
-+ yaffs_ObjectType type)
-+{
-+ yaffs_Object *theObject = NULL;
-+
-+ if (number > 0) {
-+ theObject = yaffs_FindObjectByNumber(dev, number);
-+ }
-+
-+ if (!theObject) {
-+ theObject = yaffs_CreateNewObject(dev, number, type);
-+ }
-+
-+ return theObject;
-+
-+}
-+
-+
-+static YCHAR *yaffs_CloneString(const YCHAR * str)
-+{
-+ YCHAR *newStr = NULL;
-+
-+ if (str && *str) {
-+ newStr = YMALLOC((yaffs_strlen(str) + 1) * sizeof(YCHAR));
-+ yaffs_strcpy(newStr, str);
-+ }
-+
-+ return newStr;
-+
-+}
-+
-+/*
-+ * Mknod (create) a new object.
-+ * equivalentObject only has meaning for a hard link;
-+ * aliasString only has meaning for a sumlink.
-+ * rdev only has meaning for devices (a subset of special objects)
-+ */
-+
-+static yaffs_Object *yaffs_MknodObject(yaffs_ObjectType type,
-+ yaffs_Object * parent,
-+ const YCHAR * name,
-+ __u32 mode,
-+ __u32 uid,
-+ __u32 gid,
-+ yaffs_Object * equivalentObject,
-+ const YCHAR * aliasString, __u32 rdev)
-+{
-+ yaffs_Object *in;
-+
-+ yaffs_Device *dev = parent->myDev;
-+
-+ /* Check if the entry exists. If it does then fail the call since we don't want a dup.*/
-+ if (yaffs_FindObjectByName(parent, name)) {
-+ return NULL;
-+ }
-+
-+ in = yaffs_CreateNewObject(dev, -1, type);
-+
-+ if (in) {
-+ in->chunkId = -1;
-+ in->valid = 1;
-+ in->variantType = type;
-+
-+ in->yst_mode = mode;
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_WinFileTimeNow(in->win_atime);
-+ in->win_ctime[0] = in->win_mtime[0] = in->win_atime[0];
-+ in->win_ctime[1] = in->win_mtime[1] = in->win_atime[1];
-+
-+#else
-+ in->yst_atime = in->yst_mtime = in->yst_ctime = Y_CURRENT_TIME;
-+
-+ in->yst_rdev = rdev;
-+ in->yst_uid = uid;
-+ in->yst_gid = gid;
-+#endif
-+ in->nDataChunks = 0;
-+
-+ yaffs_SetObjectName(in, name);
-+ in->dirty = 1;
-+
-+ yaffs_AddObjectToDirectory(parent, in);
-+
-+ in->myDev = parent->myDev;
-+
-+ switch (type) {
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ in->variant.symLinkVariant.alias =
-+ yaffs_CloneString(aliasString);
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ in->variant.hardLinkVariant.equivalentObject =
-+ equivalentObject;
-+ in->variant.hardLinkVariant.equivalentObjectId =
-+ equivalentObject->objectId;
-+ list_add(&in->hardLinks, &equivalentObject->hardLinks);
-+ break;
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ /* do nothing */
-+ break;
-+ }
-+
-+ if (yaffs_UpdateObjectHeader(in, name, 0, 0, 0) < 0) {
-+ /* Could not create the object header, fail the creation */
-+ yaffs_DestroyObject(in);
-+ in = NULL;
-+ }
-+
-+ }
-+
-+ return in;
-+}
-+
-+yaffs_Object *yaffs_MknodFile(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid)
-+{
-+ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_FILE, parent, name, mode,
-+ uid, gid, NULL, NULL, 0);
-+}
-+
-+yaffs_Object *yaffs_MknodDirectory(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid)
-+{
-+ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_DIRECTORY, parent, name,
-+ mode, uid, gid, NULL, NULL, 0);
-+}
-+
-+yaffs_Object *yaffs_MknodSpecial(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid, __u32 rdev)
-+{
-+ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_SPECIAL, parent, name, mode,
-+ uid, gid, NULL, NULL, rdev);
-+}
-+
-+yaffs_Object *yaffs_MknodSymLink(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid,
-+ const YCHAR * alias)
-+{
-+ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_SYMLINK, parent, name, mode,
-+ uid, gid, NULL, alias, 0);
-+}
-+
-+/* yaffs_Link returns the object id of the equivalent object.*/
-+yaffs_Object *yaffs_Link(yaffs_Object * parent, const YCHAR * name,
-+ yaffs_Object * equivalentObject)
-+{
-+ /* Get the real object in case we were fed a hard link as an equivalent object */
-+ equivalentObject = yaffs_GetEquivalentObject(equivalentObject);
-+
-+ if (yaffs_MknodObject
-+ (YAFFS_OBJECT_TYPE_HARDLINK, parent, name, 0, 0, 0,
-+ equivalentObject, NULL, 0)) {
-+ return equivalentObject;
-+ } else {
-+ return NULL;
-+ }
-+
-+}
-+
-+static int yaffs_ChangeObjectName(yaffs_Object * obj, yaffs_Object * newDir,
-+ const YCHAR * newName, int force, int shadows)
-+{
-+ int unlinkOp;
-+ int deleteOp;
-+
-+ yaffs_Object *existingTarget;
-+
-+ if (newDir == NULL) {
-+ newDir = obj->parent; /* use the old directory */
-+ }
-+
-+ if (newDir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragendy: yaffs_ChangeObjectName: newDir is not a directory"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+
-+ /* TODO: Do we need this different handling for YAFFS2 and YAFFS1?? */
-+ if (obj->myDev->isYaffs2) {
-+ unlinkOp = (newDir == obj->myDev->unlinkedDir);
-+ } else {
-+ unlinkOp = (newDir == obj->myDev->unlinkedDir
-+ && obj->variantType == YAFFS_OBJECT_TYPE_FILE);
-+ }
-+
-+ deleteOp = (newDir == obj->myDev->deletedDir);
-+
-+ existingTarget = yaffs_FindObjectByName(newDir, newName);
-+
-+ /* If the object is a file going into the unlinked directory,
-+ * then it is OK to just stuff it in since duplicate names are allowed.
-+ * else only proceed if the new name does not exist and if we're putting
-+ * it into a directory.
-+ */
-+ if ((unlinkOp ||
-+ deleteOp ||
-+ force ||
-+ (shadows > 0) ||
-+ !existingTarget) &&
-+ newDir->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) {
-+ yaffs_SetObjectName(obj, newName);
-+ obj->dirty = 1;
-+
-+ yaffs_AddObjectToDirectory(newDir, obj);
-+
-+ if (unlinkOp)
-+ obj->unlinked = 1;
-+
-+ /* If it is a deletion then we mark it as a shrink for gc purposes. */
-+ if (yaffs_UpdateObjectHeader(obj, newName, 0, deleteOp, shadows)>= 0)
-+ return YAFFS_OK;
-+ }
-+
-+ return YAFFS_FAIL;
-+}
-+
-+int yaffs_RenameObject(yaffs_Object * oldDir, const YCHAR * oldName,
-+ yaffs_Object * newDir, const YCHAR * newName)
-+{
-+ yaffs_Object *obj;
-+ yaffs_Object *existingTarget;
-+ int force = 0;
-+
-+#ifdef CONFIG_YAFFS_CASE_INSENSITIVE
-+ /* Special case for case insemsitive systems (eg. WinCE).
-+ * While look-up is case insensitive, the name isn't.
-+ * Therefore we might want to change x.txt to X.txt
-+ */
-+ if (oldDir == newDir && yaffs_strcmp(oldName, newName) == 0) {
-+ force = 1;
-+ }
-+#endif
-+
-+ obj = yaffs_FindObjectByName(oldDir, oldName);
-+ /* Check new name to long. */
-+ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK &&
-+ yaffs_strlen(newName) > YAFFS_MAX_ALIAS_LENGTH)
-+ /* ENAMETOOLONG */
-+ return YAFFS_FAIL;
-+ else if (obj->variantType != YAFFS_OBJECT_TYPE_SYMLINK &&
-+ yaffs_strlen(newName) > YAFFS_MAX_NAME_LENGTH)
-+ /* ENAMETOOLONG */
-+ return YAFFS_FAIL;
-+
-+ if (obj && obj->renameAllowed) {
-+
-+ /* Now do the handling for an existing target, if there is one */
-+
-+ existingTarget = yaffs_FindObjectByName(newDir, newName);
-+ if (existingTarget &&
-+ existingTarget->variantType == YAFFS_OBJECT_TYPE_DIRECTORY &&
-+ !list_empty(&existingTarget->variant.directoryVariant.children)) {
-+ /* There is a target that is a non-empty directory, so we fail */
-+ return YAFFS_FAIL; /* EEXIST or ENOTEMPTY */
-+ } else if (existingTarget && existingTarget != obj) {
-+ /* Nuke the target first, using shadowing,
-+ * but only if it isn't the same object
-+ */
-+ yaffs_ChangeObjectName(obj, newDir, newName, force,
-+ existingTarget->objectId);
-+ yaffs_UnlinkObject(existingTarget);
-+ }
-+
-+ return yaffs_ChangeObjectName(obj, newDir, newName, 1, 0);
-+ }
-+ return YAFFS_FAIL;
-+}
-+
-+/*------------------------- Block Management and Page Allocation ----------------*/
-+
-+static int yaffs_InitialiseBlocks(yaffs_Device * dev)
-+{
-+ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
-+
-+ dev->allocationBlock = -1; /* force it to get a new one */
-+
-+ /* Todo we're assuming the malloc will pass. */
-+ dev->blockInfo = YMALLOC(nBlocks * sizeof(yaffs_BlockInfo));
-+ if(!dev->blockInfo){
-+ dev->blockInfo = YMALLOC_ALT(nBlocks * sizeof(yaffs_BlockInfo));
-+ dev->blockInfoAlt = 1;
-+ }
-+ else
-+ dev->blockInfoAlt = 0;
-+
-+ /* Set up dynamic blockinfo stuff. */
-+ dev->chunkBitmapStride = (dev->nChunksPerBlock + 7) / 8; /* round up bytes */
-+ dev->chunkBits = YMALLOC(dev->chunkBitmapStride * nBlocks);
-+ if(!dev->chunkBits){
-+ dev->chunkBits = YMALLOC_ALT(dev->chunkBitmapStride * nBlocks);
-+ dev->chunkBitsAlt = 1;
-+ }
-+ else
-+ dev->chunkBitsAlt = 0;
-+
-+ if (dev->blockInfo && dev->chunkBits) {
-+ memset(dev->blockInfo, 0, nBlocks * sizeof(yaffs_BlockInfo));
-+ memset(dev->chunkBits, 0, dev->chunkBitmapStride * nBlocks);
-+ return YAFFS_OK;
-+ }
-+
-+ return YAFFS_FAIL;
-+
-+}
-+
-+static void yaffs_DeinitialiseBlocks(yaffs_Device * dev)
-+{
-+ if(dev->blockInfoAlt)
-+ YFREE_ALT(dev->blockInfo);
-+ else
-+ YFREE(dev->blockInfo);
-+ dev->blockInfoAlt = 0;
-+
-+ dev->blockInfo = NULL;
-+
-+ if(dev->chunkBitsAlt)
-+ YFREE_ALT(dev->chunkBits);
-+ else
-+ YFREE(dev->chunkBits);
-+ dev->chunkBitsAlt = 0;
-+ dev->chunkBits = NULL;
-+}
-+
-+static int yaffs_BlockNotDisqualifiedFromGC(yaffs_Device * dev,
-+ yaffs_BlockInfo * bi)
-+{
-+ int i;
-+ __u32 seq;
-+ yaffs_BlockInfo *b;
-+
-+ if (!dev->isYaffs2)
-+ return 1; /* disqualification only applies to yaffs2. */
-+
-+ if (!bi->hasShrinkHeader)
-+ return 1; /* can gc */
-+
-+ /* Find the oldest dirty sequence number if we don't know it and save it
-+ * so we don't have to keep recomputing it.
-+ */
-+ if (!dev->oldestDirtySequence) {
-+ seq = dev->sequenceNumber;
-+
-+ for (i = dev->internalStartBlock; i <= dev->internalEndBlock;
-+ i++) {
-+ b = yaffs_GetBlockInfo(dev, i);
-+ if (b->blockState == YAFFS_BLOCK_STATE_FULL &&
-+ (b->pagesInUse - b->softDeletions) <
-+ dev->nChunksPerBlock && b->sequenceNumber < seq) {
-+ seq = b->sequenceNumber;
-+ }
-+ }
-+ dev->oldestDirtySequence = seq;
-+ }
-+
-+ /* Can't do gc of this block if there are any blocks older than this one that have
-+ * discarded pages.
-+ */
-+ return (bi->sequenceNumber <= dev->oldestDirtySequence);
-+
-+}
-+
-+/* FindDiretiestBlock is used to select the dirtiest block (or close enough)
-+ * for garbage collection.
-+ */
-+
-+static int yaffs_FindBlockForGarbageCollection(yaffs_Device * dev,
-+ int aggressive)
-+{
-+
-+ int b = dev->currentDirtyChecker;
-+
-+ int i;
-+ int iterations;
-+ int dirtiest = -1;
-+ int pagesInUse;
-+ int prioritised=0;
-+ yaffs_BlockInfo *bi;
-+ static int nonAggressiveSkip = 0;
-+ int pendingPrioritisedExist = 0;
-+
-+ /* First let's see if we need to grab a prioritised block */
-+ if(dev->hasPendingPrioritisedGCs){
-+ for(i = dev->internalStartBlock; i < dev->internalEndBlock && !prioritised; i++){
-+
-+ bi = yaffs_GetBlockInfo(dev, i);
-+ if(bi->gcPrioritise) {
-+ pendingPrioritisedExist = 1;
-+ if(bi->blockState == YAFFS_BLOCK_STATE_FULL &&
-+ yaffs_BlockNotDisqualifiedFromGC(dev, bi)){
-+ pagesInUse = (bi->pagesInUse - bi->softDeletions);
-+ dirtiest = i;
-+ prioritised = 1;
-+ aggressive = 1; /* Fool the non-aggressive skip logiv below */
-+ }
-+ }
-+ }
-+
-+ if(!pendingPrioritisedExist) /* None found, so we can clear this */
-+ dev->hasPendingPrioritisedGCs = 0;
-+ }
-+
-+ /* If we're doing aggressive GC then we are happy to take a less-dirty block, and
-+ * search harder.
-+ * else (we're doing a leasurely gc), then we only bother to do this if the
-+ * block has only a few pages in use.
-+ */
-+
-+ nonAggressiveSkip--;
-+
-+ if (!aggressive && (nonAggressiveSkip > 0)) {
-+ return -1;
-+ }
-+
-+ if(!prioritised)
-+ pagesInUse =
-+ (aggressive) ? dev->nChunksPerBlock : YAFFS_PASSIVE_GC_CHUNKS + 1;
-+
-+ if (aggressive) {
-+ iterations =
-+ dev->internalEndBlock - dev->internalStartBlock + 1;
-+ } else {
-+ iterations =
-+ dev->internalEndBlock - dev->internalStartBlock + 1;
-+ iterations = iterations / 16;
-+ if (iterations > 200) {
-+ iterations = 200;
-+ }
-+ }
-+
-+ for (i = 0; i <= iterations && pagesInUse > 0 && !prioritised; i++) {
-+ b++;
-+ if (b < dev->internalStartBlock || b > dev->internalEndBlock) {
-+ b = dev->internalStartBlock;
-+ }
-+
-+ if (b < dev->internalStartBlock || b > dev->internalEndBlock) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("**>> Block %d is not valid" TENDSTR), b));
-+ YBUG();
-+ }
-+
-+ bi = yaffs_GetBlockInfo(dev, b);
-+
-+#if 0
-+ if (bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT) {
-+ dirtiest = b;
-+ pagesInUse = 0;
-+ }
-+ else
-+#endif
-+
-+ if (bi->blockState == YAFFS_BLOCK_STATE_FULL &&
-+ (bi->pagesInUse - bi->softDeletions) < pagesInUse &&
-+ yaffs_BlockNotDisqualifiedFromGC(dev, bi)) {
-+ dirtiest = b;
-+ pagesInUse = (bi->pagesInUse - bi->softDeletions);
-+ }
-+ }
-+
-+ dev->currentDirtyChecker = b;
-+
-+ if (dirtiest > 0) {
-+ T(YAFFS_TRACE_GC,
-+ (TSTR("GC Selected block %d with %d free, prioritised:%d" TENDSTR), dirtiest,
-+ dev->nChunksPerBlock - pagesInUse,prioritised));
-+ }
-+
-+ dev->oldestDirtySequence = 0;
-+
-+ if (dirtiest > 0) {
-+ nonAggressiveSkip = 4;
-+ }
-+
-+ return dirtiest;
-+}
-+
-+static void yaffs_BlockBecameDirty(yaffs_Device * dev, int blockNo)
-+{
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockNo);
-+
-+ int erasedOk = 0;
-+
-+ /* If the block is still healthy erase it and mark as clean.
-+ * If the block has had a data failure, then retire it.
-+ */
-+
-+ T(YAFFS_TRACE_GC | YAFFS_TRACE_ERASE,
-+ (TSTR("yaffs_BlockBecameDirty block %d state %d %s"TENDSTR),
-+ blockNo, bi->blockState, (bi->needsRetiring) ? "needs retiring" : ""));
-+
-+ bi->blockState = YAFFS_BLOCK_STATE_DIRTY;
-+
-+ if (!bi->needsRetiring) {
-+ yaffs_InvalidateCheckpoint(dev);
-+ erasedOk = yaffs_EraseBlockInNAND(dev, blockNo);
-+ if (!erasedOk) {
-+ dev->nErasureFailures++;
-+ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("**>> Erasure failed %d" TENDSTR), blockNo));
-+ }
-+ }
-+
-+ if (erasedOk && (yaffs_traceMask & YAFFS_TRACE_ERASE)) {
-+ int i;
-+ for (i = 0; i < dev->nChunksPerBlock; i++) {
-+ if (!yaffs_CheckChunkErased
-+ (dev, blockNo * dev->nChunksPerBlock + i)) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ (">>Block %d erasure supposedly OK, but chunk %d not erased"
-+ TENDSTR), blockNo, i));
-+ }
-+ }
-+ }
-+
-+ if (erasedOk) {
-+ /* Clean it up... */
-+ bi->blockState = YAFFS_BLOCK_STATE_EMPTY;
-+ dev->nErasedBlocks++;
-+ bi->pagesInUse = 0;
-+ bi->softDeletions = 0;
-+ bi->hasShrinkHeader = 0;
-+ bi->skipErasedCheck = 1; /* This is clean, so no need to check */
-+ bi->gcPrioritise = 0;
-+ yaffs_ClearChunkBits(dev, blockNo);
-+
-+ T(YAFFS_TRACE_ERASE,
-+ (TSTR("Erased block %d" TENDSTR), blockNo));
-+ } else {
-+ dev->nFreeChunks -= dev->nChunksPerBlock; /* We lost a block of free space */
-+
-+ yaffs_RetireBlock(dev, blockNo);
-+ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("**>> Block %d retired" TENDSTR), blockNo));
-+ }
-+}
-+
-+static int yaffs_FindBlockForAllocation(yaffs_Device * dev)
-+{
-+ int i;
-+
-+ yaffs_BlockInfo *bi;
-+
-+ if (dev->nErasedBlocks < 1) {
-+ /* Hoosterman we've got a problem.
-+ * Can't get space to gc
-+ */
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("yaffs tragedy: no more eraased blocks" TENDSTR)));
-+
-+ return -1;
-+ }
-+
-+ /* Find an empty block. */
-+
-+ for (i = dev->internalStartBlock; i <= dev->internalEndBlock; i++) {
-+ dev->allocationBlockFinder++;
-+ if (dev->allocationBlockFinder < dev->internalStartBlock
-+ || dev->allocationBlockFinder > dev->internalEndBlock) {
-+ dev->allocationBlockFinder = dev->internalStartBlock;
-+ }
-+
-+ bi = yaffs_GetBlockInfo(dev, dev->allocationBlockFinder);
-+
-+ if (bi->blockState == YAFFS_BLOCK_STATE_EMPTY) {
-+ bi->blockState = YAFFS_BLOCK_STATE_ALLOCATING;
-+ dev->sequenceNumber++;
-+ bi->sequenceNumber = dev->sequenceNumber;
-+ dev->nErasedBlocks--;
-+ T(YAFFS_TRACE_ALLOCATE,
-+ (TSTR("Allocated block %d, seq %d, %d left" TENDSTR),
-+ dev->allocationBlockFinder, dev->sequenceNumber,
-+ dev->nErasedBlocks));
-+ return dev->allocationBlockFinder;
-+ }
-+ }
-+
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("yaffs tragedy: no more eraased blocks, but there should have been %d"
-+ TENDSTR), dev->nErasedBlocks));
-+
-+ return -1;
-+}
-+
-+
-+// Check if there's space to allocate...
-+// Thinks.... do we need top make this ths same as yaffs_GetFreeChunks()?
-+static int yaffs_CheckSpaceForAllocation(yaffs_Device * dev)
-+{
-+ int reservedChunks;
-+ int reservedBlocks = dev->nReservedBlocks;
-+ int checkpointBlocks;
-+
-+ checkpointBlocks = dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint;
-+ if(checkpointBlocks < 0)
-+ checkpointBlocks = 0;
-+
-+ reservedChunks = ((reservedBlocks + checkpointBlocks) * dev->nChunksPerBlock);
-+
-+ return (dev->nFreeChunks > reservedChunks);
-+}
-+
-+static int yaffs_AllocateChunk(yaffs_Device * dev, int useReserve, yaffs_BlockInfo **blockUsedPtr)
-+{
-+ int retVal;
-+ yaffs_BlockInfo *bi;
-+
-+ if (dev->allocationBlock < 0) {
-+ /* Get next block to allocate off */
-+ dev->allocationBlock = yaffs_FindBlockForAllocation(dev);
-+ dev->allocationPage = 0;
-+ }
-+
-+ if (!useReserve && !yaffs_CheckSpaceForAllocation(dev)) {
-+ /* Not enough space to allocate unless we're allowed to use the reserve. */
-+ return -1;
-+ }
-+
-+ if (dev->nErasedBlocks < dev->nReservedBlocks
-+ && dev->allocationPage == 0) {
-+ T(YAFFS_TRACE_ALLOCATE, (TSTR("Allocating reserve" TENDSTR)));
-+ }
-+
-+ /* Next page please.... */
-+ if (dev->allocationBlock >= 0) {
-+ bi = yaffs_GetBlockInfo(dev, dev->allocationBlock);
-+
-+ retVal = (dev->allocationBlock * dev->nChunksPerBlock) +
-+ dev->allocationPage;
-+ bi->pagesInUse++;
-+ yaffs_SetChunkBit(dev, dev->allocationBlock,
-+ dev->allocationPage);
-+
-+ dev->allocationPage++;
-+
-+ dev->nFreeChunks--;
-+
-+ /* If the block is full set the state to full */
-+ if (dev->allocationPage >= dev->nChunksPerBlock) {
-+ bi->blockState = YAFFS_BLOCK_STATE_FULL;
-+ dev->allocationBlock = -1;
-+ }
-+
-+ if(blockUsedPtr)
-+ *blockUsedPtr = bi;
-+
-+ return retVal;
-+ }
-+
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("!!!!!!!!! Allocator out !!!!!!!!!!!!!!!!!" TENDSTR)));
-+
-+ return -1;
-+}
-+
-+static int yaffs_GetErasedChunks(yaffs_Device * dev)
-+{
-+ int n;
-+
-+ n = dev->nErasedBlocks * dev->nChunksPerBlock;
-+
-+ if (dev->allocationBlock > 0) {
-+ n += (dev->nChunksPerBlock - dev->allocationPage);
-+ }
-+
-+ return n;
-+
-+}
-+
-+static int yaffs_GarbageCollectBlock(yaffs_Device * dev, int block)
-+{
-+ int oldChunk;
-+ int newChunk;
-+ int chunkInBlock;
-+ int markNAND;
-+ int retVal = YAFFS_OK;
-+ int cleanups = 0;
-+ int i;
-+ int isCheckpointBlock;
-+
-+ int chunksBefore = yaffs_GetErasedChunks(dev);
-+ int chunksAfter;
-+
-+ yaffs_ExtendedTags tags;
-+
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, block);
-+
-+ yaffs_Object *object;
-+
-+ isCheckpointBlock = (bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT);
-+
-+ bi->blockState = YAFFS_BLOCK_STATE_COLLECTING;
-+
-+ T(YAFFS_TRACE_TRACING,
-+ (TSTR("Collecting block %d, in use %d, shrink %d, " TENDSTR), block,
-+ bi->pagesInUse, bi->hasShrinkHeader));
-+
-+ /*yaffs_VerifyFreeChunks(dev); */
-+
-+ bi->hasShrinkHeader = 0; /* clear the flag so that the block can erase */
-+
-+ /* Take off the number of soft deleted entries because
-+ * they're going to get really deleted during GC.
-+ */
-+ dev->nFreeChunks -= bi->softDeletions;
-+
-+ dev->isDoingGC = 1;
-+
-+ if (isCheckpointBlock ||
-+ !yaffs_StillSomeChunkBits(dev, block)) {
-+ T(YAFFS_TRACE_TRACING,
-+ (TSTR
-+ ("Collecting block %d that has no chunks in use" TENDSTR),
-+ block));
-+ yaffs_BlockBecameDirty(dev, block);
-+ } else {
-+
-+ __u8 *buffer = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ for (chunkInBlock = 0, oldChunk = block * dev->nChunksPerBlock;
-+ chunkInBlock < dev->nChunksPerBlock
-+ && yaffs_StillSomeChunkBits(dev, block);
-+ chunkInBlock++, oldChunk++) {
-+ if (yaffs_CheckChunkBit(dev, block, chunkInBlock)) {
-+
-+ /* This page is in use and might need to be copied off */
-+
-+ markNAND = 1;
-+
-+ yaffs_InitialiseTags(&tags);
-+
-+ yaffs_ReadChunkWithTagsFromNAND(dev, oldChunk,
-+ buffer, &tags);
-+
-+ object =
-+ yaffs_FindObjectByNumber(dev,
-+ tags.objectId);
-+
-+ T(YAFFS_TRACE_GC_DETAIL,
-+ (TSTR
-+ ("Collecting page %d, %d %d %d " TENDSTR),
-+ chunkInBlock, tags.objectId, tags.chunkId,
-+ tags.byteCount));
-+
-+ if (!object) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("page %d in gc has no object "
-+ TENDSTR), oldChunk));
-+ }
-+
-+ if (object && object->deleted
-+ && tags.chunkId != 0) {
-+ /* Data chunk in a deleted file, throw it away
-+ * It's a soft deleted data chunk,
-+ * No need to copy this, just forget about it and
-+ * fix up the object.
-+ */
-+
-+ object->nDataChunks--;
-+
-+ if (object->nDataChunks <= 0) {
-+ /* remeber to clean up the object */
-+ dev->gcCleanupList[cleanups] =
-+ tags.objectId;
-+ cleanups++;
-+ }
-+ markNAND = 0;
-+ } else if (0
-+ /* Todo object && object->deleted && object->nDataChunks == 0 */
-+ ) {
-+ /* Deleted object header with no data chunks.
-+ * Can be discarded and the file deleted.
-+ */
-+ object->chunkId = 0;
-+ yaffs_FreeTnode(object->myDev,
-+ object->variant.
-+ fileVariant.top);
-+ object->variant.fileVariant.top = NULL;
-+ yaffs_DoGenericObjectDeletion(object);
-+
-+ } else if (object) {
-+ /* It's either a data chunk in a live file or
-+ * an ObjectHeader, so we're interested in it.
-+ * NB Need to keep the ObjectHeaders of deleted files
-+ * until the whole file has been deleted off
-+ */
-+ tags.serialNumber++;
-+
-+ dev->nGCCopies++;
-+
-+ if (tags.chunkId == 0) {
-+ /* It is an object Id,
-+ * We need to nuke the shrinkheader flags first
-+ * We no longer want the shrinkHeader flag since its work is done
-+ * and if it is left in place it will mess up scanning.
-+ * Also, clear out any shadowing stuff
-+ */
-+
-+ yaffs_ObjectHeader *oh;
-+ oh = (yaffs_ObjectHeader *)buffer;
-+ oh->isShrink = 0;
-+ oh->shadowsObject = -1;
-+ tags.extraShadows = 0;
-+ tags.extraIsShrinkHeader = 0;
-+ }
-+
-+ newChunk =
-+ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &tags, 1);
-+
-+ if (newChunk < 0) {
-+ retVal = YAFFS_FAIL;
-+ } else {
-+
-+ /* Ok, now fix up the Tnodes etc. */
-+
-+ if (tags.chunkId == 0) {
-+ /* It's a header */
-+ object->chunkId = newChunk;
-+ object->serial = tags.serialNumber;
-+ } else {
-+ /* It's a data chunk */
-+ yaffs_PutChunkIntoFile
-+ (object,
-+ tags.chunkId,
-+ newChunk, 0);
-+ }
-+ }
-+ }
-+
-+ yaffs_DeleteChunk(dev, oldChunk, markNAND, __LINE__);
-+
-+ }
-+ }
-+
-+ yaffs_ReleaseTempBuffer(dev, buffer, __LINE__);
-+
-+
-+ /* Do any required cleanups */
-+ for (i = 0; i < cleanups; i++) {
-+ /* Time to delete the file too */
-+ object =
-+ yaffs_FindObjectByNumber(dev,
-+ dev->gcCleanupList[i]);
-+ if (object) {
-+ yaffs_FreeTnode(dev,
-+ object->variant.fileVariant.
-+ top);
-+ object->variant.fileVariant.top = NULL;
-+ T(YAFFS_TRACE_GC,
-+ (TSTR
-+ ("yaffs: About to finally delete object %d"
-+ TENDSTR), object->objectId));
-+ yaffs_DoGenericObjectDeletion(object);
-+ object->myDev->nDeletedFiles--;
-+ }
-+
-+ }
-+
-+ }
-+
-+ if (chunksBefore >= (chunksAfter = yaffs_GetErasedChunks(dev))) {
-+ T(YAFFS_TRACE_GC,
-+ (TSTR
-+ ("gc did not increase free chunks before %d after %d"
-+ TENDSTR), chunksBefore, chunksAfter));
-+ }
-+
-+ dev->isDoingGC = 0;
-+
-+ return YAFFS_OK;
-+}
-+
-+/* New garbage collector
-+ * If we're very low on erased blocks then we do aggressive garbage collection
-+ * otherwise we do "leasurely" garbage collection.
-+ * Aggressive gc looks further (whole array) and will accept less dirty blocks.
-+ * Passive gc only inspects smaller areas and will only accept more dirty blocks.
-+ *
-+ * The idea is to help clear out space in a more spread-out manner.
-+ * Dunno if it really does anything useful.
-+ */
-+static int yaffs_CheckGarbageCollection(yaffs_Device * dev)
-+{
-+ int block;
-+ int aggressive;
-+ int gcOk = YAFFS_OK;
-+ int maxTries = 0;
-+
-+ int checkpointBlockAdjust;
-+
-+ if (dev->isDoingGC) {
-+ /* Bail out so we don't get recursive gc */
-+ return YAFFS_OK;
-+ }
-+
-+ /* This loop should pass the first time.
-+ * We'll only see looping here if the erase of the collected block fails.
-+ */
-+
-+ do {
-+ maxTries++;
-+
-+ checkpointBlockAdjust = (dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint);
-+ if(checkpointBlockAdjust < 0)
-+ checkpointBlockAdjust = 0;
-+
-+ if (dev->nErasedBlocks < (dev->nReservedBlocks + checkpointBlockAdjust)) {
-+ /* We need a block soon...*/
-+ aggressive = 1;
-+ } else {
-+ /* We're in no hurry */
-+ aggressive = 0;
-+ }
-+
-+ block = yaffs_FindBlockForGarbageCollection(dev, aggressive);
-+
-+ if (block > 0) {
-+ dev->garbageCollections++;
-+ if (!aggressive) {
-+ dev->passiveGarbageCollections++;
-+ }
-+
-+ T(YAFFS_TRACE_GC,
-+ (TSTR
-+ ("yaffs: GC erasedBlocks %d aggressive %d" TENDSTR),
-+ dev->nErasedBlocks, aggressive));
-+
-+ gcOk = yaffs_GarbageCollectBlock(dev, block);
-+ }
-+
-+ if (dev->nErasedBlocks < (dev->nReservedBlocks) && block > 0) {
-+ T(YAFFS_TRACE_GC,
-+ (TSTR
-+ ("yaffs: GC !!!no reclaim!!! erasedBlocks %d after try %d block %d"
-+ TENDSTR), dev->nErasedBlocks, maxTries, block));
-+ }
-+ } while ((dev->nErasedBlocks < dev->nReservedBlocks) && (block > 0)
-+ && (maxTries < 2));
-+
-+ return aggressive ? gcOk : YAFFS_OK;
-+}
-+
-+/*------------------------- TAGS --------------------------------*/
-+
-+static int yaffs_TagsMatch(const yaffs_ExtendedTags * tags, int objectId,
-+ int chunkInObject)
-+{
-+ return (tags->chunkId == chunkInObject &&
-+ tags->objectId == objectId && !tags->chunkDeleted) ? 1 : 0;
-+
-+}
-+
-+
-+/*-------------------- Data file manipulation -----------------*/
-+
-+static int yaffs_FindChunkInFile(yaffs_Object * in, int chunkInInode,
-+ yaffs_ExtendedTags * tags)
-+{
-+ /*Get the Tnode, then get the level 0 offset chunk offset */
-+ yaffs_Tnode *tn;
-+ int theChunk = -1;
-+ yaffs_ExtendedTags localTags;
-+ int retVal = -1;
-+
-+ yaffs_Device *dev = in->myDev;
-+
-+ if (!tags) {
-+ /* Passed a NULL, so use our own tags space */
-+ tags = &localTags;
-+ }
-+
-+ tn = yaffs_FindLevel0Tnode(dev, &in->variant.fileVariant, chunkInInode);
-+
-+ if (tn) {
-+ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
-+
-+ retVal =
-+ yaffs_FindChunkInGroup(dev, theChunk, tags, in->objectId,
-+ chunkInInode);
-+ }
-+ return retVal;
-+}
-+
-+static int yaffs_FindAndDeleteChunkInFile(yaffs_Object * in, int chunkInInode,
-+ yaffs_ExtendedTags * tags)
-+{
-+ /* Get the Tnode, then get the level 0 offset chunk offset */
-+ yaffs_Tnode *tn;
-+ int theChunk = -1;
-+ yaffs_ExtendedTags localTags;
-+
-+ yaffs_Device *dev = in->myDev;
-+ int retVal = -1;
-+
-+ if (!tags) {
-+ /* Passed a NULL, so use our own tags space */
-+ tags = &localTags;
-+ }
-+
-+ tn = yaffs_FindLevel0Tnode(dev, &in->variant.fileVariant, chunkInInode);
-+
-+ if (tn) {
-+
-+ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
-+
-+ retVal =
-+ yaffs_FindChunkInGroup(dev, theChunk, tags, in->objectId,
-+ chunkInInode);
-+
-+ /* Delete the entry in the filestructure (if found) */
-+ if (retVal != -1) {
-+ yaffs_PutLevel0Tnode(dev,tn,chunkInInode,0);
-+ }
-+ } else {
-+ /*T(("No level 0 found for %d\n", chunkInInode)); */
-+ }
-+
-+ if (retVal == -1) {
-+ /* T(("Could not find %d to delete\n",chunkInInode)); */
-+ }
-+ return retVal;
-+}
-+
-+#ifdef YAFFS_PARANOID
-+
-+static int yaffs_CheckFileSanity(yaffs_Object * in)
-+{
-+ int chunk;
-+ int nChunks;
-+ int fSize;
-+ int failed = 0;
-+ int objId;
-+ yaffs_Tnode *tn;
-+ yaffs_Tags localTags;
-+ yaffs_Tags *tags = &localTags;
-+ int theChunk;
-+ int chunkDeleted;
-+
-+ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
-+ /* T(("Object not a file\n")); */
-+ return YAFFS_FAIL;
-+ }
-+
-+ objId = in->objectId;
-+ fSize = in->variant.fileVariant.fileSize;
-+ nChunks =
-+ (fSize + in->myDev->nDataBytesPerChunk - 1) / in->myDev->nDataBytesPerChunk;
-+
-+ for (chunk = 1; chunk <= nChunks; chunk++) {
-+ tn = yaffs_FindLevel0Tnode(in->myDev, &in->variant.fileVariant,
-+ chunk);
-+
-+ if (tn) {
-+
-+ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunk);
-+
-+ if (yaffs_CheckChunkBits
-+ (dev, theChunk / dev->nChunksPerBlock,
-+ theChunk % dev->nChunksPerBlock)) {
-+
-+ yaffs_ReadChunkTagsFromNAND(in->myDev, theChunk,
-+ tags,
-+ &chunkDeleted);
-+ if (yaffs_TagsMatch
-+ (tags, in->objectId, chunk, chunkDeleted)) {
-+ /* found it; */
-+
-+ }
-+ } else {
-+
-+ failed = 1;
-+ }
-+
-+ } else {
-+ /* T(("No level 0 found for %d\n", chunk)); */
-+ }
-+ }
-+
-+ return failed ? YAFFS_FAIL : YAFFS_OK;
-+}
-+
-+#endif
-+
-+static int yaffs_PutChunkIntoFile(yaffs_Object * in, int chunkInInode,
-+ int chunkInNAND, int inScan)
-+{
-+ /* NB inScan is zero unless scanning.
-+ * For forward scanning, inScan is > 0;
-+ * for backward scanning inScan is < 0
-+ */
-+
-+ yaffs_Tnode *tn;
-+ yaffs_Device *dev = in->myDev;
-+ int existingChunk;
-+ yaffs_ExtendedTags existingTags;
-+ yaffs_ExtendedTags newTags;
-+ unsigned existingSerial, newSerial;
-+
-+ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
-+ /* Just ignore an attempt at putting a chunk into a non-file during scanning
-+ * If it is not during Scanning then something went wrong!
-+ */
-+ if (!inScan) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs tragedy:attempt to put data chunk into a non-file"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+
-+ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
-+ return YAFFS_OK;
-+ }
-+
-+ tn = yaffs_AddOrFindLevel0Tnode(dev,
-+ &in->variant.fileVariant,
-+ chunkInInode,
-+ NULL);
-+ if (!tn) {
-+ return YAFFS_FAIL;
-+ }
-+
-+ existingChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
-+
-+ if (inScan != 0) {
-+ /* If we're scanning then we need to test for duplicates
-+ * NB This does not need to be efficient since it should only ever
-+ * happen when the power fails during a write, then only one
-+ * chunk should ever be affected.
-+ *
-+ * Correction for YAFFS2: This could happen quite a lot and we need to think about efficiency! TODO
-+ * Update: For backward scanning we don't need to re-read tags so this is quite cheap.
-+ */
-+
-+ if (existingChunk != 0) {
-+ /* NB Right now existing chunk will not be real chunkId if the device >= 32MB
-+ * thus we have to do a FindChunkInFile to get the real chunk id.
-+ *
-+ * We have a duplicate now we need to decide which one to use:
-+ *
-+ * Backwards scanning YAFFS2: The old one is what we use, dump the new one.
-+ * Forward scanning YAFFS2: The new one is what we use, dump the old one.
-+ * YAFFS1: Get both sets of tags and compare serial numbers.
-+ */
-+
-+ if (inScan > 0) {
-+ /* Only do this for forward scanning */
-+ yaffs_ReadChunkWithTagsFromNAND(dev,
-+ chunkInNAND,
-+ NULL, &newTags);
-+
-+ /* Do a proper find */
-+ existingChunk =
-+ yaffs_FindChunkInFile(in, chunkInInode,
-+ &existingTags);
-+ }
-+
-+ if (existingChunk <= 0) {
-+ /*Hoosterman - how did this happen? */
-+
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs tragedy: existing chunk < 0 in scan"
-+ TENDSTR)));
-+
-+ }
-+
-+ /* NB The deleted flags should be false, otherwise the chunks will
-+ * not be loaded during a scan
-+ */
-+
-+ newSerial = newTags.serialNumber;
-+ existingSerial = existingTags.serialNumber;
-+
-+ if ((inScan > 0) &&
-+ (in->myDev->isYaffs2 ||
-+ existingChunk <= 0 ||
-+ ((existingSerial + 1) & 3) == newSerial)) {
-+ /* Forward scanning.
-+ * Use new
-+ * Delete the old one and drop through to update the tnode
-+ */
-+ yaffs_DeleteChunk(dev, existingChunk, 1,
-+ __LINE__);
-+ } else {
-+ /* Backward scanning or we want to use the existing one
-+ * Use existing.
-+ * Delete the new one and return early so that the tnode isn't changed
-+ */
-+ yaffs_DeleteChunk(dev, chunkInNAND, 1,
-+ __LINE__);
-+ return YAFFS_OK;
-+ }
-+ }
-+
-+ }
-+
-+ if (existingChunk == 0) {
-+ in->nDataChunks++;
-+ }
-+
-+ yaffs_PutLevel0Tnode(dev,tn,chunkInInode,chunkInNAND);
-+
-+ return YAFFS_OK;
-+}
-+
-+static int yaffs_ReadChunkDataFromObject(yaffs_Object * in, int chunkInInode,
-+ __u8 * buffer)
-+{
-+ int chunkInNAND = yaffs_FindChunkInFile(in, chunkInInode, NULL);
-+
-+ if (chunkInNAND >= 0) {
-+ return yaffs_ReadChunkWithTagsFromNAND(in->myDev, chunkInNAND,
-+ buffer,NULL);
-+ } else {
-+ T(YAFFS_TRACE_NANDACCESS,
-+ (TSTR("Chunk %d not found zero instead" TENDSTR),
-+ chunkInNAND));
-+ /* get sane (zero) data if you read a hole */
-+ memset(buffer, 0, in->myDev->nDataBytesPerChunk);
-+ return 0;
-+ }
-+
-+}
-+
-+void yaffs_DeleteChunk(yaffs_Device * dev, int chunkId, int markNAND, int lyn)
-+{
-+ int block;
-+ int page;
-+ yaffs_ExtendedTags tags;
-+ yaffs_BlockInfo *bi;
-+
-+ if (chunkId <= 0)
-+ return;
-+
-+ dev->nDeletions++;
-+ block = chunkId / dev->nChunksPerBlock;
-+ page = chunkId % dev->nChunksPerBlock;
-+
-+ bi = yaffs_GetBlockInfo(dev, block);
-+
-+ T(YAFFS_TRACE_DELETION,
-+ (TSTR("line %d delete of chunk %d" TENDSTR), lyn, chunkId));
-+
-+ if (markNAND &&
-+ bi->blockState != YAFFS_BLOCK_STATE_COLLECTING && !dev->isYaffs2) {
-+
-+ yaffs_InitialiseTags(&tags);
-+
-+ tags.chunkDeleted = 1;
-+
-+ yaffs_WriteChunkWithTagsToNAND(dev, chunkId, NULL, &tags);
-+ yaffs_HandleUpdateChunk(dev, chunkId, &tags);
-+ } else {
-+ dev->nUnmarkedDeletions++;
-+ }
-+
-+ /* Pull out of the management area.
-+ * If the whole block became dirty, this will kick off an erasure.
-+ */
-+ if (bi->blockState == YAFFS_BLOCK_STATE_ALLOCATING ||
-+ bi->blockState == YAFFS_BLOCK_STATE_FULL ||
-+ bi->blockState == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
-+ bi->blockState == YAFFS_BLOCK_STATE_COLLECTING) {
-+ dev->nFreeChunks++;
-+
-+ yaffs_ClearChunkBit(dev, block, page);
-+
-+ bi->pagesInUse--;
-+
-+ if (bi->pagesInUse == 0 &&
-+ !bi->hasShrinkHeader &&
-+ bi->blockState != YAFFS_BLOCK_STATE_ALLOCATING &&
-+ bi->blockState != YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
-+ yaffs_BlockBecameDirty(dev, block);
-+ }
-+
-+ } else {
-+ /* T(("Bad news deleting chunk %d\n",chunkId)); */
-+ }
-+
-+}
-+
-+static int yaffs_WriteChunkDataToObject(yaffs_Object * in, int chunkInInode,
-+ const __u8 * buffer, int nBytes,
-+ int useReserve)
-+{
-+ /* Find old chunk Need to do this to get serial number
-+ * Write new one and patch into tree.
-+ * Invalidate old tags.
-+ */
-+
-+ int prevChunkId;
-+ yaffs_ExtendedTags prevTags;
-+
-+ int newChunkId;
-+ yaffs_ExtendedTags newTags;
-+
-+ yaffs_Device *dev = in->myDev;
-+
-+ yaffs_CheckGarbageCollection(dev);
-+
-+ /* Get the previous chunk at this location in the file if it exists */
-+ prevChunkId = yaffs_FindChunkInFile(in, chunkInInode, &prevTags);
-+
-+ /* Set up new tags */
-+ yaffs_InitialiseTags(&newTags);
-+
-+ newTags.chunkId = chunkInInode;
-+ newTags.objectId = in->objectId;
-+ newTags.serialNumber =
-+ (prevChunkId >= 0) ? prevTags.serialNumber + 1 : 1;
-+ newTags.byteCount = nBytes;
-+
-+ newChunkId =
-+ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &newTags,
-+ useReserve);
-+
-+ if (newChunkId >= 0) {
-+ yaffs_PutChunkIntoFile(in, chunkInInode, newChunkId, 0);
-+
-+ if (prevChunkId >= 0) {
-+ yaffs_DeleteChunk(dev, prevChunkId, 1, __LINE__);
-+
-+ }
-+
-+ yaffs_CheckFileSanity(in);
-+ }
-+ return newChunkId;
-+
-+}
-+
-+/* UpdateObjectHeader updates the header on NAND for an object.
-+ * If name is not NULL, then that new name is used.
-+ */
-+int yaffs_UpdateObjectHeader(yaffs_Object * in, const YCHAR * name, int force,
-+ int isShrink, int shadows)
-+{
-+
-+ yaffs_BlockInfo *bi;
-+
-+ yaffs_Device *dev = in->myDev;
-+
-+ int prevChunkId;
-+ int retVal = 0;
-+ int result = 0;
-+
-+ int newChunkId;
-+ yaffs_ExtendedTags newTags;
-+
-+ __u8 *buffer = NULL;
-+ YCHAR oldName[YAFFS_MAX_NAME_LENGTH + 1];
-+
-+ yaffs_ObjectHeader *oh = NULL;
-+
-+ if (!in->fake || force) {
-+
-+ yaffs_CheckGarbageCollection(dev);
-+
-+ buffer = yaffs_GetTempBuffer(in->myDev, __LINE__);
-+ oh = (yaffs_ObjectHeader *) buffer;
-+
-+ prevChunkId = in->chunkId;
-+
-+ if (prevChunkId >= 0) {
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev, prevChunkId,
-+ buffer, NULL);
-+ memcpy(oldName, oh->name, sizeof(oh->name));
-+ }
-+
-+ memset(buffer, 0xFF, dev->nDataBytesPerChunk);
-+
-+ oh->type = in->variantType;
-+ oh->yst_mode = in->yst_mode;
-+ oh->shadowsObject = shadows;
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ oh->win_atime[0] = in->win_atime[0];
-+ oh->win_ctime[0] = in->win_ctime[0];
-+ oh->win_mtime[0] = in->win_mtime[0];
-+ oh->win_atime[1] = in->win_atime[1];
-+ oh->win_ctime[1] = in->win_ctime[1];
-+ oh->win_mtime[1] = in->win_mtime[1];
-+#else
-+ oh->yst_uid = in->yst_uid;
-+ oh->yst_gid = in->yst_gid;
-+ oh->yst_atime = in->yst_atime;
-+ oh->yst_mtime = in->yst_mtime;
-+ oh->yst_ctime = in->yst_ctime;
-+ oh->yst_rdev = in->yst_rdev;
-+#endif
-+ if (in->parent) {
-+ oh->parentObjectId = in->parent->objectId;
-+ } else {
-+ oh->parentObjectId = 0;
-+ }
-+
-+ if (name && *name) {
-+ memset(oh->name, 0, sizeof(oh->name));
-+ yaffs_strncpy(oh->name, name, YAFFS_MAX_NAME_LENGTH);
-+ } else if (prevChunkId) {
-+ memcpy(oh->name, oldName, sizeof(oh->name));
-+ } else {
-+ memset(oh->name, 0, sizeof(oh->name));
-+ }
-+
-+ oh->isShrink = isShrink;
-+
-+ switch (in->variantType) {
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ /* Should not happen */
-+ break;
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ oh->fileSize =
-+ (oh->parentObjectId == YAFFS_OBJECTID_DELETED
-+ || oh->parentObjectId ==
-+ YAFFS_OBJECTID_UNLINKED) ? 0 : in->variant.
-+ fileVariant.fileSize;
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ oh->equivalentObjectId =
-+ in->variant.hardLinkVariant.equivalentObjectId;
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ yaffs_strncpy(oh->alias,
-+ in->variant.symLinkVariant.alias,
-+ YAFFS_MAX_ALIAS_LENGTH);
-+ oh->alias[YAFFS_MAX_ALIAS_LENGTH] = 0;
-+ break;
-+ }
-+
-+ /* Tags */
-+ yaffs_InitialiseTags(&newTags);
-+ in->serial++;
-+ newTags.chunkId = 0;
-+ newTags.objectId = in->objectId;
-+ newTags.serialNumber = in->serial;
-+
-+ /* Add extra info for file header */
-+
-+ newTags.extraHeaderInfoAvailable = 1;
-+ newTags.extraParentObjectId = oh->parentObjectId;
-+ newTags.extraFileLength = oh->fileSize;
-+ newTags.extraIsShrinkHeader = oh->isShrink;
-+ newTags.extraEquivalentObjectId = oh->equivalentObjectId;
-+ newTags.extraShadows = (oh->shadowsObject > 0) ? 1 : 0;
-+ newTags.extraObjectType = in->variantType;
-+
-+ /* Create new chunk in NAND */
-+ newChunkId =
-+ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &newTags,
-+ (prevChunkId >= 0) ? 1 : 0);
-+
-+ if (newChunkId >= 0) {
-+
-+ in->chunkId = newChunkId;
-+
-+ if (prevChunkId >= 0) {
-+ yaffs_DeleteChunk(dev, prevChunkId, 1,
-+ __LINE__);
-+ }
-+
-+ if(!yaffs_ObjectHasCachedWriteData(in))
-+ in->dirty = 0;
-+
-+ /* If this was a shrink, then mark the block that the chunk lives on */
-+ if (isShrink) {
-+ bi = yaffs_GetBlockInfo(in->myDev,
-+ newChunkId /in->myDev-> nChunksPerBlock);
-+ bi->hasShrinkHeader = 1;
-+ }
-+
-+ }
-+
-+ retVal = newChunkId;
-+
-+ }
-+
-+ if (buffer)
-+ yaffs_ReleaseTempBuffer(dev, buffer, __LINE__);
-+
-+ return retVal;
-+}
-+
-+/*------------------------ Short Operations Cache ----------------------------------------
-+ * In many situations where there is no high level buffering (eg WinCE) a lot of
-+ * reads might be short sequential reads, and a lot of writes may be short
-+ * sequential writes. eg. scanning/writing a jpeg file.
-+ * In these cases, a short read/write cache can provide a huge perfomance benefit
-+ * with dumb-as-a-rock code.
-+ * In Linux, the page cache provides read buffering aand the short op cache provides write
-+ * buffering.
-+ *
-+ * There are a limited number (~10) of cache chunks per device so that we don't
-+ * need a very intelligent search.
-+ */
-+
-+static int yaffs_ObjectHasCachedWriteData(yaffs_Object *obj)
-+{
-+ yaffs_Device *dev = obj->myDev;
-+ int i;
-+ yaffs_ChunkCache *cache;
-+ int nCaches = obj->myDev->nShortOpCaches;
-+
-+ for(i = 0; i < nCaches; i++){
-+ cache = &dev->srCache[i];
-+ if (cache->object == obj &&
-+ cache->dirty)
-+ return 1;
-+ }
-+
-+ return 0;
-+}
-+
-+
-+static void yaffs_FlushFilesChunkCache(yaffs_Object * obj)
-+{
-+ yaffs_Device *dev = obj->myDev;
-+ int lowest = -99; /* Stop compiler whining. */
-+ int i;
-+ yaffs_ChunkCache *cache;
-+ int chunkWritten = 0;
-+ int nCaches = obj->myDev->nShortOpCaches;
-+
-+ if (nCaches > 0) {
-+ do {
-+ cache = NULL;
-+
-+ /* Find the dirty cache for this object with the lowest chunk id. */
-+ for (i = 0; i < nCaches; i++) {
-+ if (dev->srCache[i].object == obj &&
-+ dev->srCache[i].dirty) {
-+ if (!cache
-+ || dev->srCache[i].chunkId <
-+ lowest) {
-+ cache = &dev->srCache[i];
-+ lowest = cache->chunkId;
-+ }
-+ }
-+ }
-+
-+ if (cache && !cache->locked) {
-+ /* Write it out and free it up */
-+
-+ chunkWritten =
-+ yaffs_WriteChunkDataToObject(cache->object,
-+ cache->chunkId,
-+ cache->data,
-+ cache->nBytes,
-+ 1);
-+ cache->dirty = 0;
-+ cache->object = NULL;
-+ }
-+
-+ } while (cache && chunkWritten > 0);
-+
-+ if (cache) {
-+ /* Hoosterman, disk full while writing cache out. */
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("yaffs tragedy: no space during cache write" TENDSTR)));
-+
-+ }
-+ }
-+
-+}
-+
-+/*yaffs_FlushEntireDeviceCache(dev)
-+ *
-+ *
-+ */
-+
-+void yaffs_FlushEntireDeviceCache(yaffs_Device *dev)
-+{
-+ yaffs_Object *obj;
-+ int nCaches = dev->nShortOpCaches;
-+ int i;
-+
-+ /* Find a dirty object in the cache and flush it...
-+ * until there are no further dirty objects.
-+ */
-+ do {
-+ obj = NULL;
-+ for( i = 0; i < nCaches && !obj; i++) {
-+ if (dev->srCache[i].object &&
-+ dev->srCache[i].dirty)
-+ obj = dev->srCache[i].object;
-+
-+ }
-+ if(obj)
-+ yaffs_FlushFilesChunkCache(obj);
-+
-+ } while(obj);
-+
-+}
-+
-+
-+/* Grab us a cache chunk for use.
-+ * First look for an empty one.
-+ * Then look for the least recently used non-dirty one.
-+ * Then look for the least recently used dirty one...., flush and look again.
-+ */
-+static yaffs_ChunkCache *yaffs_GrabChunkCacheWorker(yaffs_Device * dev)
-+{
-+ int i;
-+ int usage;
-+ int theOne;
-+
-+ if (dev->nShortOpCaches > 0) {
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if (!dev->srCache[i].object)
-+ return &dev->srCache[i];
-+ }
-+
-+ return NULL;
-+
-+ theOne = -1;
-+ usage = 0; /* just to stop the compiler grizzling */
-+
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if (!dev->srCache[i].dirty &&
-+ ((dev->srCache[i].lastUse < usage && theOne >= 0) ||
-+ theOne < 0)) {
-+ usage = dev->srCache[i].lastUse;
-+ theOne = i;
-+ }
-+ }
-+
-+
-+ return theOne >= 0 ? &dev->srCache[theOne] : NULL;
-+ } else {
-+ return NULL;
-+ }
-+
-+}
-+
-+static yaffs_ChunkCache *yaffs_GrabChunkCache(yaffs_Device * dev)
-+{
-+ yaffs_ChunkCache *cache;
-+ yaffs_Object *theObj;
-+ int usage;
-+ int i;
-+ int pushout;
-+
-+ if (dev->nShortOpCaches > 0) {
-+ /* Try find a non-dirty one... */
-+
-+ cache = yaffs_GrabChunkCacheWorker(dev);
-+
-+ if (!cache) {
-+ /* They were all dirty, find the last recently used object and flush
-+ * its cache, then find again.
-+ * NB what's here is not very accurate, we actually flush the object
-+ * the last recently used page.
-+ */
-+
-+ /* With locking we can't assume we can use entry zero */
-+
-+ theObj = NULL;
-+ usage = -1;
-+ cache = NULL;
-+ pushout = -1;
-+
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if (dev->srCache[i].object &&
-+ !dev->srCache[i].locked &&
-+ (dev->srCache[i].lastUse < usage || !cache))
-+ {
-+ usage = dev->srCache[i].lastUse;
-+ theObj = dev->srCache[i].object;
-+ cache = &dev->srCache[i];
-+ pushout = i;
-+ }
-+ }
-+
-+ if (!cache || cache->dirty) {
-+ /* Flush and try again */
-+ yaffs_FlushFilesChunkCache(theObj);
-+ cache = yaffs_GrabChunkCacheWorker(dev);
-+ }
-+
-+ }
-+ return cache;
-+ } else
-+ return NULL;
-+
-+}
-+
-+/* Find a cached chunk */
-+static yaffs_ChunkCache *yaffs_FindChunkCache(const yaffs_Object * obj,
-+ int chunkId)
-+{
-+ yaffs_Device *dev = obj->myDev;
-+ int i;
-+ if (dev->nShortOpCaches > 0) {
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if (dev->srCache[i].object == obj &&
-+ dev->srCache[i].chunkId == chunkId) {
-+ dev->cacheHits++;
-+
-+ return &dev->srCache[i];
-+ }
-+ }
-+ }
-+ return NULL;
-+}
-+
-+/* Mark the chunk for the least recently used algorithym */
-+static void yaffs_UseChunkCache(yaffs_Device * dev, yaffs_ChunkCache * cache,
-+ int isAWrite)
-+{
-+
-+ if (dev->nShortOpCaches > 0) {
-+ if (dev->srLastUse < 0 || dev->srLastUse > 100000000) {
-+ /* Reset the cache usages */
-+ int i;
-+ for (i = 1; i < dev->nShortOpCaches; i++) {
-+ dev->srCache[i].lastUse = 0;
-+ }
-+ dev->srLastUse = 0;
-+ }
-+
-+ dev->srLastUse++;
-+
-+ cache->lastUse = dev->srLastUse;
-+
-+ if (isAWrite) {
-+ cache->dirty = 1;
-+ }
-+ }
-+}
-+
-+/* Invalidate a single cache page.
-+ * Do this when a whole page gets written,
-+ * ie the short cache for this page is no longer valid.
-+ */
-+static void yaffs_InvalidateChunkCache(yaffs_Object * object, int chunkId)
-+{
-+ if (object->myDev->nShortOpCaches > 0) {
-+ yaffs_ChunkCache *cache = yaffs_FindChunkCache(object, chunkId);
-+
-+ if (cache) {
-+ cache->object = NULL;
-+ }
-+ }
-+}
-+
-+/* Invalidate all the cache pages associated with this object
-+ * Do this whenever ther file is deleted or resized.
-+ */
-+static void yaffs_InvalidateWholeChunkCache(yaffs_Object * in)
-+{
-+ int i;
-+ yaffs_Device *dev = in->myDev;
-+
-+ if (dev->nShortOpCaches > 0) {
-+ /* Invalidate it. */
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ if (dev->srCache[i].object == in) {
-+ dev->srCache[i].object = NULL;
-+ }
-+ }
-+ }
-+}
-+
-+/*--------------------- Checkpointing --------------------*/
-+
-+
-+static int yaffs_WriteCheckpointValidityMarker(yaffs_Device *dev,int head)
-+{
-+ yaffs_CheckpointValidity cp;
-+ cp.structType = sizeof(cp);
-+ cp.magic = YAFFS_MAGIC;
-+ cp.version = YAFFS_CHECKPOINT_VERSION;
-+ cp.head = (head) ? 1 : 0;
-+
-+ return (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp))?
-+ 1 : 0;
-+}
-+
-+static int yaffs_ReadCheckpointValidityMarker(yaffs_Device *dev, int head)
-+{
-+ yaffs_CheckpointValidity cp;
-+ int ok;
-+
-+ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
-+
-+ if(ok)
-+ ok = (cp.structType == sizeof(cp)) &&
-+ (cp.magic == YAFFS_MAGIC) &&
-+ (cp.version == YAFFS_CHECKPOINT_VERSION) &&
-+ (cp.head == ((head) ? 1 : 0));
-+ return ok ? 1 : 0;
-+}
-+
-+static void yaffs_DeviceToCheckpointDevice(yaffs_CheckpointDevice *cp,
-+ yaffs_Device *dev)
-+{
-+ cp->nErasedBlocks = dev->nErasedBlocks;
-+ cp->allocationBlock = dev->allocationBlock;
-+ cp->allocationPage = dev->allocationPage;
-+ cp->nFreeChunks = dev->nFreeChunks;
-+
-+ cp->nDeletedFiles = dev->nDeletedFiles;
-+ cp->nUnlinkedFiles = dev->nUnlinkedFiles;
-+ cp->nBackgroundDeletions = dev->nBackgroundDeletions;
-+ cp->sequenceNumber = dev->sequenceNumber;
-+ cp->oldestDirtySequence = dev->oldestDirtySequence;
-+
-+}
-+
-+static void yaffs_CheckpointDeviceToDevice(yaffs_Device *dev,
-+ yaffs_CheckpointDevice *cp)
-+{
-+ dev->nErasedBlocks = cp->nErasedBlocks;
-+ dev->allocationBlock = cp->allocationBlock;
-+ dev->allocationPage = cp->allocationPage;
-+ dev->nFreeChunks = cp->nFreeChunks;
-+
-+ dev->nDeletedFiles = cp->nDeletedFiles;
-+ dev->nUnlinkedFiles = cp->nUnlinkedFiles;
-+ dev->nBackgroundDeletions = cp->nBackgroundDeletions;
-+ dev->sequenceNumber = cp->sequenceNumber;
-+ dev->oldestDirtySequence = cp->oldestDirtySequence;
-+}
-+
-+
-+static int yaffs_WriteCheckpointDevice(yaffs_Device *dev)
-+{
-+ yaffs_CheckpointDevice cp;
-+ __u32 nBytes;
-+ __u32 nBlocks = (dev->internalEndBlock - dev->internalStartBlock + 1);
-+
-+ int ok;
-+
-+ /* Write device runtime values*/
-+ yaffs_DeviceToCheckpointDevice(&cp,dev);
-+ cp.structType = sizeof(cp);
-+
-+ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
-+
-+ /* Write block info */
-+ if(ok) {
-+ nBytes = nBlocks * sizeof(yaffs_BlockInfo);
-+ ok = (yaffs_CheckpointWrite(dev,dev->blockInfo,nBytes) == nBytes);
-+ }
-+
-+ /* Write chunk bits */
-+ if(ok) {
-+ nBytes = nBlocks * dev->chunkBitmapStride;
-+ ok = (yaffs_CheckpointWrite(dev,dev->chunkBits,nBytes) == nBytes);
-+ }
-+ return ok ? 1 : 0;
-+
-+}
-+
-+static int yaffs_ReadCheckpointDevice(yaffs_Device *dev)
-+{
-+ yaffs_CheckpointDevice cp;
-+ __u32 nBytes;
-+ __u32 nBlocks = (dev->internalEndBlock - dev->internalStartBlock + 1);
-+
-+ int ok;
-+
-+ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
-+ if(!ok)
-+ return 0;
-+
-+ if(cp.structType != sizeof(cp))
-+ return 0;
-+
-+
-+ yaffs_CheckpointDeviceToDevice(dev,&cp);
-+
-+ nBytes = nBlocks * sizeof(yaffs_BlockInfo);
-+
-+ ok = (yaffs_CheckpointRead(dev,dev->blockInfo,nBytes) == nBytes);
-+
-+ if(!ok)
-+ return 0;
-+ nBytes = nBlocks * dev->chunkBitmapStride;
-+
-+ ok = (yaffs_CheckpointRead(dev,dev->chunkBits,nBytes) == nBytes);
-+
-+ return ok ? 1 : 0;
-+}
-+
-+static void yaffs_ObjectToCheckpointObject(yaffs_CheckpointObject *cp,
-+ yaffs_Object *obj)
-+{
-+
-+ cp->objectId = obj->objectId;
-+ cp->parentId = (obj->parent) ? obj->parent->objectId : 0;
-+ cp->chunkId = obj->chunkId;
-+ cp->variantType = obj->variantType;
-+ cp->deleted = obj->deleted;
-+ cp->softDeleted = obj->softDeleted;
-+ cp->unlinked = obj->unlinked;
-+ cp->fake = obj->fake;
-+ cp->renameAllowed = obj->renameAllowed;
-+ cp->unlinkAllowed = obj->unlinkAllowed;
-+ cp->serial = obj->serial;
-+ cp->nDataChunks = obj->nDataChunks;
-+
-+ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE)
-+ cp->fileSizeOrEquivalentObjectId = obj->variant.fileVariant.fileSize;
-+ else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK)
-+ cp->fileSizeOrEquivalentObjectId = obj->variant.hardLinkVariant.equivalentObjectId;
-+}
-+
-+static void yaffs_CheckpointObjectToObject( yaffs_Object *obj,yaffs_CheckpointObject *cp)
-+{
-+
-+ yaffs_Object *parent;
-+
-+ obj->objectId = cp->objectId;
-+
-+ if(cp->parentId)
-+ parent = yaffs_FindOrCreateObjectByNumber(
-+ obj->myDev,
-+ cp->parentId,
-+ YAFFS_OBJECT_TYPE_DIRECTORY);
-+ else
-+ parent = NULL;
-+
-+ if(parent)
-+ yaffs_AddObjectToDirectory(parent, obj);
-+
-+ obj->chunkId = cp->chunkId;
-+ obj->variantType = cp->variantType;
-+ obj->deleted = cp->deleted;
-+ obj->softDeleted = cp->softDeleted;
-+ obj->unlinked = cp->unlinked;
-+ obj->fake = cp->fake;
-+ obj->renameAllowed = cp->renameAllowed;
-+ obj->unlinkAllowed = cp->unlinkAllowed;
-+ obj->serial = cp->serial;
-+ obj->nDataChunks = cp->nDataChunks;
-+
-+ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE)
-+ obj->variant.fileVariant.fileSize = cp->fileSizeOrEquivalentObjectId;
-+ else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK)
-+ obj->variant.hardLinkVariant.equivalentObjectId = cp->fileSizeOrEquivalentObjectId;
-+
-+ if(obj->objectId >= YAFFS_NOBJECT_BUCKETS)
-+ obj->lazyLoaded = 1;
-+}
-+
-+
-+
-+static int yaffs_CheckpointTnodeWorker(yaffs_Object * in, yaffs_Tnode * tn,
-+ __u32 level, int chunkOffset)
-+{
-+ int i;
-+ yaffs_Device *dev = in->myDev;
-+ int ok = 1;
-+ int nTnodeBytes = (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8;
-+
-+ if (tn) {
-+ if (level > 0) {
-+
-+ for (i = 0; i < YAFFS_NTNODES_INTERNAL && ok; i++){
-+ if (tn->internal[i]) {
-+ ok = yaffs_CheckpointTnodeWorker(in,
-+ tn->internal[i],
-+ level - 1,
-+ (chunkOffset<<YAFFS_TNODES_INTERNAL_BITS) + i);
-+ }
-+ }
-+ } else if (level == 0) {
-+ __u32 baseOffset = chunkOffset << YAFFS_TNODES_LEVEL0_BITS;
-+ /* printf("write tnode at %d\n",baseOffset); */
-+ ok = (yaffs_CheckpointWrite(dev,&baseOffset,sizeof(baseOffset)) == sizeof(baseOffset));
-+ if(ok)
-+ ok = (yaffs_CheckpointWrite(dev,tn,nTnodeBytes) == nTnodeBytes);
-+ }
-+ }
-+
-+ return ok;
-+
-+}
-+
-+static int yaffs_WriteCheckpointTnodes(yaffs_Object *obj)
-+{
-+ __u32 endMarker = ~0;
-+ int ok = 1;
-+
-+ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE){
-+ ok = yaffs_CheckpointTnodeWorker(obj,
-+ obj->variant.fileVariant.top,
-+ obj->variant.fileVariant.topLevel,
-+ 0);
-+ if(ok)
-+ ok = (yaffs_CheckpointWrite(obj->myDev,&endMarker,sizeof(endMarker)) ==
-+ sizeof(endMarker));
-+ }
-+
-+ return ok ? 1 : 0;
-+}
-+
-+static int yaffs_ReadCheckpointTnodes(yaffs_Object *obj)
-+{
-+ __u32 baseChunk;
-+ int ok = 1;
-+ yaffs_Device *dev = obj->myDev;
-+ yaffs_FileStructure *fileStructPtr = &obj->variant.fileVariant;
-+ yaffs_Tnode *tn;
-+
-+ ok = (yaffs_CheckpointRead(dev,&baseChunk,sizeof(baseChunk)) == sizeof(baseChunk));
-+
-+ while(ok && (~baseChunk)){
-+ /* Read level 0 tnode */
-+
-+ /* printf("read tnode at %d\n",baseChunk); */
-+ tn = yaffs_GetTnodeRaw(dev);
-+ if(tn)
-+ ok = (yaffs_CheckpointRead(dev,tn,(dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8) ==
-+ (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
-+ else
-+ ok = 0;
-+
-+ if(tn && ok){
-+ ok = yaffs_AddOrFindLevel0Tnode(dev,
-+ fileStructPtr,
-+ baseChunk,
-+ tn) ? 1 : 0;
-+ }
-+
-+ if(ok)
-+ ok = (yaffs_CheckpointRead(dev,&baseChunk,sizeof(baseChunk)) == sizeof(baseChunk));
-+
-+ }
-+
-+ return ok ? 1 : 0;
-+}
-+
-+
-+static int yaffs_WriteCheckpointObjects(yaffs_Device *dev)
-+{
-+ yaffs_Object *obj;
-+ yaffs_CheckpointObject cp;
-+ int i;
-+ int ok = 1;
-+ struct list_head *lh;
-+
-+
-+ /* Iterate through the objects in each hash entry,
-+ * dumping them to the checkpointing stream.
-+ */
-+
-+ for(i = 0; ok && i < YAFFS_NOBJECT_BUCKETS; i++){
-+ list_for_each(lh, &dev->objectBucket[i].list) {
-+ if (lh) {
-+ obj = list_entry(lh, yaffs_Object, hashLink);
-+ if (!obj->deferedFree) {
-+ yaffs_ObjectToCheckpointObject(&cp,obj);
-+ cp.structType = sizeof(cp);
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(
-+ TSTR("Checkpoint write object %d parent %d type %d chunk %d obj addr %x" TENDSTR),
-+ cp.objectId,cp.parentId,cp.variantType,cp.chunkId,(unsigned) obj));
-+
-+ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
-+
-+ if(ok && obj->variantType == YAFFS_OBJECT_TYPE_FILE){
-+ ok = yaffs_WriteCheckpointTnodes(obj);
-+ }
-+ }
-+ }
-+ }
-+ }
-+
-+ /* Dump end of list */
-+ memset(&cp,0xFF,sizeof(yaffs_CheckpointObject));
-+ cp.structType = sizeof(cp);
-+
-+ if(ok)
-+ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
-+
-+ return ok ? 1 : 0;
-+}
-+
-+static int yaffs_ReadCheckpointObjects(yaffs_Device *dev)
-+{
-+ yaffs_Object *obj;
-+ yaffs_CheckpointObject cp;
-+ int ok = 1;
-+ int done = 0;
-+ yaffs_Object *hardList = NULL;
-+
-+ while(ok && !done) {
-+ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
-+ if(cp.structType != sizeof(cp)) {
-+ /* printf("structure parsing failed\n"); */
-+ ok = 0;
-+ }
-+
-+ if(ok && cp.objectId == ~0)
-+ done = 1;
-+ else if(ok){
-+ obj = yaffs_FindOrCreateObjectByNumber(dev,cp.objectId, cp.variantType);
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("Checkpoint read object %d parent %d type %d chunk %d obj addr %x" TENDSTR),
-+ cp.objectId,cp.parentId,cp.variantType,cp.chunkId,(unsigned) obj));
-+ if(obj) {
-+ yaffs_CheckpointObjectToObject(obj,&cp);
-+ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE) {
-+ ok = yaffs_ReadCheckpointTnodes(obj);
-+ } else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
-+ obj->hardLinks.next =
-+ (struct list_head *)
-+ hardList;
-+ hardList = obj;
-+ }
-+
-+ }
-+ }
-+ }
-+
-+ if(ok)
-+ yaffs_HardlinkFixup(dev,hardList);
-+
-+ return ok ? 1 : 0;
-+}
-+
-+static int yaffs_WriteCheckpointData(yaffs_Device *dev)
-+{
-+
-+ int ok;
-+
-+ ok = yaffs_CheckpointOpen(dev,1);
-+
-+ if(ok)
-+ ok = yaffs_WriteCheckpointValidityMarker(dev,1);
-+ if(ok)
-+ ok = yaffs_WriteCheckpointDevice(dev);
-+ if(ok)
-+ ok = yaffs_WriteCheckpointObjects(dev);
-+ if(ok)
-+ ok = yaffs_WriteCheckpointValidityMarker(dev,0);
-+
-+ if(!yaffs_CheckpointClose(dev))
-+ ok = 0;
-+
-+ if(ok)
-+ dev->isCheckpointed = 1;
-+ else
-+ dev->isCheckpointed = 0;
-+
-+ return dev->isCheckpointed;
-+}
-+
-+static int yaffs_ReadCheckpointData(yaffs_Device *dev)
-+{
-+ int ok;
-+
-+ ok = yaffs_CheckpointOpen(dev,0); /* open for read */
-+
-+ if(ok)
-+ ok = yaffs_ReadCheckpointValidityMarker(dev,1);
-+ if(ok)
-+ ok = yaffs_ReadCheckpointDevice(dev);
-+ if(ok)
-+ ok = yaffs_ReadCheckpointObjects(dev);
-+ if(ok)
-+ ok = yaffs_ReadCheckpointValidityMarker(dev,0);
-+
-+
-+
-+ if(!yaffs_CheckpointClose(dev))
-+ ok = 0;
-+
-+ if(ok)
-+ dev->isCheckpointed = 1;
-+ else
-+ dev->isCheckpointed = 0;
-+
-+ return ok ? 1 : 0;
-+
-+}
-+
-+static void yaffs_InvalidateCheckpoint(yaffs_Device *dev)
-+{
-+ if(dev->isCheckpointed ||
-+ dev->blocksInCheckpoint > 0){
-+ dev->isCheckpointed = 0;
-+ yaffs_CheckpointInvalidateStream(dev);
-+ if(dev->superBlock && dev->markSuperBlockDirty)
-+ dev->markSuperBlockDirty(dev->superBlock);
-+ }
-+}
-+
-+
-+int yaffs_CheckpointSave(yaffs_Device *dev)
-+{
-+ yaffs_ReportOddballBlocks(dev);
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("save entry: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
-+
-+ if(!dev->isCheckpointed)
-+ yaffs_WriteCheckpointData(dev);
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("save exit: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
-+
-+ return dev->isCheckpointed;
-+}
-+
-+int yaffs_CheckpointRestore(yaffs_Device *dev)
-+{
-+ int retval;
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("restore entry: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
-+
-+ retval = yaffs_ReadCheckpointData(dev);
-+
-+ T(YAFFS_TRACE_CHECKPOINT,(TSTR("restore exit: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
-+
-+ yaffs_ReportOddballBlocks(dev);
-+
-+ return retval;
-+}
-+
-+/*--------------------- File read/write ------------------------
-+ * Read and write have very similar structures.
-+ * In general the read/write has three parts to it
-+ * An incomplete chunk to start with (if the read/write is not chunk-aligned)
-+ * Some complete chunks
-+ * An incomplete chunk to end off with
-+ *
-+ * Curve-balls: the first chunk might also be the last chunk.
-+ */
-+
-+int yaffs_ReadDataFromFile(yaffs_Object * in, __u8 * buffer, loff_t offset,
-+ int nBytes)
-+{
-+
-+ int chunk;
-+ int start;
-+ int nToCopy;
-+ int n = nBytes;
-+ int nDone = 0;
-+ yaffs_ChunkCache *cache;
-+
-+ yaffs_Device *dev;
-+
-+ dev = in->myDev;
-+
-+ while (n > 0) {
-+ //chunk = offset / dev->nDataBytesPerChunk + 1;
-+ //start = offset % dev->nDataBytesPerChunk;
-+ yaffs_AddrToChunk(dev,offset,&chunk,&start);
-+ chunk++;
-+
-+ /* OK now check for the curveball where the start and end are in
-+ * the same chunk.
-+ */
-+ if ((start + n) < dev->nDataBytesPerChunk) {
-+ nToCopy = n;
-+ } else {
-+ nToCopy = dev->nDataBytesPerChunk - start;
-+ }
-+
-+ cache = yaffs_FindChunkCache(in, chunk);
-+
-+ /* If the chunk is already in the cache or it is less than a whole chunk
-+ * then use the cache (if there is caching)
-+ * else bypass the cache.
-+ */
-+ if (cache || nToCopy != dev->nDataBytesPerChunk) {
-+ if (dev->nShortOpCaches > 0) {
-+
-+ /* If we can't find the data in the cache, then load it up. */
-+
-+ if (!cache) {
-+ cache = yaffs_GrabChunkCache(in->myDev);
-+ cache->object = in;
-+ cache->chunkId = chunk;
-+ cache->dirty = 0;
-+ cache->locked = 0;
-+ yaffs_ReadChunkDataFromObject(in, chunk,
-+ cache->
-+ data);
-+ cache->nBytes = 0;
-+ }
-+
-+ yaffs_UseChunkCache(dev, cache, 0);
-+
-+ cache->locked = 1;
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+ memcpy(buffer, &cache->data[start], nToCopy);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+#endif
-+ cache->locked = 0;
-+ } else {
-+ /* Read into the local buffer then copy..*/
-+
-+ __u8 *localBuffer =
-+ yaffs_GetTempBuffer(dev, __LINE__);
-+ yaffs_ReadChunkDataFromObject(in, chunk,
-+ localBuffer);
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+ memcpy(buffer, &localBuffer[start], nToCopy);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+#endif
-+ yaffs_ReleaseTempBuffer(dev, localBuffer,
-+ __LINE__);
-+ }
-+
-+ } else {
-+#ifdef CONFIG_YAFFS_WINCE
-+ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ /* Under WinCE can't do direct transfer. Need to use a local buffer.
-+ * This is because we otherwise screw up WinCE's memory mapper
-+ */
-+ yaffs_ReadChunkDataFromObject(in, chunk, localBuffer);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+ memcpy(buffer, localBuffer, dev->nDataBytesPerChunk);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
-+#endif
-+
-+#else
-+ /* A full chunk. Read directly into the supplied buffer. */
-+ yaffs_ReadChunkDataFromObject(in, chunk, buffer);
-+#endif
-+ }
-+
-+ n -= nToCopy;
-+ offset += nToCopy;
-+ buffer += nToCopy;
-+ nDone += nToCopy;
-+
-+ }
-+
-+ return nDone;
-+}
-+
-+int yaffs_WriteDataToFile(yaffs_Object * in, const __u8 * buffer, loff_t offset,
-+ int nBytes, int writeThrough)
-+{
-+
-+ int chunk;
-+ int start;
-+ int nToCopy;
-+ int n = nBytes;
-+ int nDone = 0;
-+ int nToWriteBack;
-+ int startOfWrite = offset;
-+ int chunkWritten = 0;
-+ int nBytesRead;
-+
-+ yaffs_Device *dev;
-+
-+ dev = in->myDev;
-+
-+ while (n > 0 && chunkWritten >= 0) {
-+ //chunk = offset / dev->nDataBytesPerChunk + 1;
-+ //start = offset % dev->nDataBytesPerChunk;
-+ yaffs_AddrToChunk(dev,offset,&chunk,&start);
-+ chunk++;
-+
-+ /* OK now check for the curveball where the start and end are in
-+ * the same chunk.
-+ */
-+
-+ if ((start + n) < dev->nDataBytesPerChunk) {
-+ nToCopy = n;
-+
-+ /* Now folks, to calculate how many bytes to write back....
-+ * If we're overwriting and not writing to then end of file then
-+ * we need to write back as much as was there before.
-+ */
-+
-+ nBytesRead =
-+ in->variant.fileVariant.fileSize -
-+ ((chunk - 1) * dev->nDataBytesPerChunk);
-+
-+ if (nBytesRead > dev->nDataBytesPerChunk) {
-+ nBytesRead = dev->nDataBytesPerChunk;
-+ }
-+
-+ nToWriteBack =
-+ (nBytesRead >
-+ (start + n)) ? nBytesRead : (start + n);
-+
-+ } else {
-+ nToCopy = dev->nDataBytesPerChunk - start;
-+ nToWriteBack = dev->nDataBytesPerChunk;
-+ }
-+
-+ if (nToCopy != dev->nDataBytesPerChunk) {
-+ /* An incomplete start or end chunk (or maybe both start and end chunk) */
-+ if (dev->nShortOpCaches > 0) {
-+ yaffs_ChunkCache *cache;
-+ /* If we can't find the data in the cache, then load the cache */
-+ cache = yaffs_FindChunkCache(in, chunk);
-+
-+ if (!cache
-+ && yaffs_CheckSpaceForAllocation(in->
-+ myDev)) {
-+ cache = yaffs_GrabChunkCache(in->myDev);
-+ cache->object = in;
-+ cache->chunkId = chunk;
-+ cache->dirty = 0;
-+ cache->locked = 0;
-+ yaffs_ReadChunkDataFromObject(in, chunk,
-+ cache->
-+ data);
-+ }
-+ else if(cache &&
-+ !cache->dirty &&
-+ !yaffs_CheckSpaceForAllocation(in->myDev)){
-+ /* Drop the cache if it was a read cache item and
-+ * no space check has been made for it.
-+ */
-+ cache = NULL;
-+ }
-+
-+ if (cache) {
-+ yaffs_UseChunkCache(dev, cache, 1);
-+ cache->locked = 1;
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+
-+ memcpy(&cache->data[start], buffer,
-+ nToCopy);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+#endif
-+ cache->locked = 0;
-+ cache->nBytes = nToWriteBack;
-+
-+ if (writeThrough) {
-+ chunkWritten =
-+ yaffs_WriteChunkDataToObject
-+ (cache->object,
-+ cache->chunkId,
-+ cache->data, cache->nBytes,
-+ 1);
-+ cache->dirty = 0;
-+ }
-+
-+ } else {
-+ chunkWritten = -1; /* fail the write */
-+ }
-+ } else {
-+ /* An incomplete start or end chunk (or maybe both start and end chunk)
-+ * Read into the local buffer then copy, then copy over and write back.
-+ */
-+
-+ __u8 *localBuffer =
-+ yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ yaffs_ReadChunkDataFromObject(in, chunk,
-+ localBuffer);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+
-+ memcpy(&localBuffer[start], buffer, nToCopy);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+#endif
-+ chunkWritten =
-+ yaffs_WriteChunkDataToObject(in, chunk,
-+ localBuffer,
-+ nToWriteBack,
-+ 0);
-+
-+ yaffs_ReleaseTempBuffer(dev, localBuffer,
-+ __LINE__);
-+
-+ }
-+
-+ } else {
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ /* Under WinCE can't do direct transfer. Need to use a local buffer.
-+ * This is because we otherwise screw up WinCE's memory mapper
-+ */
-+ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_UnlockYAFFS(TRUE);
-+#endif
-+ memcpy(localBuffer, buffer, dev->nDataBytesPerChunk);
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_LockYAFFS(TRUE);
-+#endif
-+ chunkWritten =
-+ yaffs_WriteChunkDataToObject(in, chunk, localBuffer,
-+ dev->nDataBytesPerChunk,
-+ 0);
-+ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
-+#else
-+ /* A full chunk. Write directly from the supplied buffer. */
-+ chunkWritten =
-+ yaffs_WriteChunkDataToObject(in, chunk, buffer,
-+ dev->nDataBytesPerChunk,
-+ 0);
-+#endif
-+ /* Since we've overwritten the cached data, we better invalidate it. */
-+ yaffs_InvalidateChunkCache(in, chunk);
-+ }
-+
-+ if (chunkWritten >= 0) {
-+ n -= nToCopy;
-+ offset += nToCopy;
-+ buffer += nToCopy;
-+ nDone += nToCopy;
-+ }
-+
-+ }
-+
-+ /* Update file object */
-+
-+ if ((startOfWrite + nDone) > in->variant.fileVariant.fileSize) {
-+ in->variant.fileVariant.fileSize = (startOfWrite + nDone);
-+ }
-+
-+ in->dirty = 1;
-+
-+ return nDone;
-+}
-+
-+
-+/* ---------------------- File resizing stuff ------------------ */
-+
-+static void yaffs_PruneResizedChunks(yaffs_Object * in, int newSize)
-+{
-+
-+ yaffs_Device *dev = in->myDev;
-+ int oldFileSize = in->variant.fileVariant.fileSize;
-+
-+ int lastDel = 1 + (oldFileSize - 1) / dev->nDataBytesPerChunk;
-+
-+ int startDel = 1 + (newSize + dev->nDataBytesPerChunk - 1) /
-+ dev->nDataBytesPerChunk;
-+ int i;
-+ int chunkId;
-+
-+ /* Delete backwards so that we don't end up with holes if
-+ * power is lost part-way through the operation.
-+ */
-+ for (i = lastDel; i >= startDel; i--) {
-+ /* NB this could be optimised somewhat,
-+ * eg. could retrieve the tags and write them without
-+ * using yaffs_DeleteChunk
-+ */
-+
-+ chunkId = yaffs_FindAndDeleteChunkInFile(in, i, NULL);
-+ if (chunkId > 0) {
-+ if (chunkId <
-+ (dev->internalStartBlock * dev->nChunksPerBlock)
-+ || chunkId >=
-+ ((dev->internalEndBlock +
-+ 1) * dev->nChunksPerBlock)) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("Found daft chunkId %d for %d" TENDSTR),
-+ chunkId, i));
-+ } else {
-+ in->nDataChunks--;
-+ yaffs_DeleteChunk(dev, chunkId, 1, __LINE__);
-+ }
-+ }
-+ }
-+
-+}
-+
-+int yaffs_ResizeFile(yaffs_Object * in, loff_t newSize)
-+{
-+
-+ int oldFileSize = in->variant.fileVariant.fileSize;
-+ int newSizeOfPartialChunk;
-+ int newFullChunks;
-+
-+ yaffs_Device *dev = in->myDev;
-+
-+ yaffs_AddrToChunk(dev, newSize, &newFullChunks, &newSizeOfPartialChunk);
-+
-+ yaffs_FlushFilesChunkCache(in);
-+ yaffs_InvalidateWholeChunkCache(in);
-+
-+ yaffs_CheckGarbageCollection(dev);
-+
-+ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
-+ return yaffs_GetFileSize(in);
-+ }
-+
-+ if (newSize == oldFileSize) {
-+ return oldFileSize;
-+ }
-+
-+ if (newSize < oldFileSize) {
-+
-+ yaffs_PruneResizedChunks(in, newSize);
-+
-+ if (newSizeOfPartialChunk != 0) {
-+ int lastChunk = 1 + newFullChunks;
-+
-+ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ /* Got to read and rewrite the last chunk with its new size and zero pad */
-+ yaffs_ReadChunkDataFromObject(in, lastChunk,
-+ localBuffer);
-+
-+ memset(localBuffer + newSizeOfPartialChunk, 0,
-+ dev->nDataBytesPerChunk - newSizeOfPartialChunk);
-+
-+ yaffs_WriteChunkDataToObject(in, lastChunk, localBuffer,
-+ newSizeOfPartialChunk, 1);
-+
-+ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
-+ }
-+
-+ in->variant.fileVariant.fileSize = newSize;
-+
-+ yaffs_PruneFileStructure(dev, &in->variant.fileVariant);
-+ }
-+ /* Write a new object header.
-+ * show we've shrunk the file, if need be
-+ * Do this only if the file is not in the deleted directories.
-+ */
-+ if (in->parent->objectId != YAFFS_OBJECTID_UNLINKED &&
-+ in->parent->objectId != YAFFS_OBJECTID_DELETED) {
-+ yaffs_UpdateObjectHeader(in, NULL, 0,
-+ (newSize < oldFileSize) ? 1 : 0, 0);
-+ }
-+
-+ return newSize;
-+}
-+
-+loff_t yaffs_GetFileSize(yaffs_Object * obj)
-+{
-+ obj = yaffs_GetEquivalentObject(obj);
-+
-+ switch (obj->variantType) {
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ return obj->variant.fileVariant.fileSize;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ return yaffs_strlen(obj->variant.symLinkVariant.alias);
-+ default:
-+ return 0;
-+ }
-+}
-+
-+
-+
-+int yaffs_FlushFile(yaffs_Object * in, int updateTime)
-+{
-+ int retVal;
-+ if (in->dirty) {
-+ yaffs_FlushFilesChunkCache(in);
-+ if (updateTime) {
-+#ifdef CONFIG_YAFFS_WINCE
-+ yfsd_WinFileTimeNow(in->win_mtime);
-+#else
-+
-+ in->yst_mtime = Y_CURRENT_TIME;
-+
-+#endif
-+ }
-+
-+ retVal =
-+ (yaffs_UpdateObjectHeader(in, NULL, 0, 0, 0) >=
-+ 0) ? YAFFS_OK : YAFFS_FAIL;
-+ } else {
-+ retVal = YAFFS_OK;
-+ }
-+
-+ return retVal;
-+
-+}
-+
-+static int yaffs_DoGenericObjectDeletion(yaffs_Object * in)
-+{
-+
-+ /* First off, invalidate the file's data in the cache, without flushing. */
-+ yaffs_InvalidateWholeChunkCache(in);
-+
-+ if (in->myDev->isYaffs2 && (in->parent != in->myDev->deletedDir)) {
-+ /* Move to the unlinked directory so we have a record that it was deleted. */
-+ yaffs_ChangeObjectName(in, in->myDev->deletedDir, NULL, 0, 0);
-+
-+ }
-+
-+ yaffs_RemoveObjectFromDirectory(in);
-+ yaffs_DeleteChunk(in->myDev, in->chunkId, 1, __LINE__);
-+ in->chunkId = -1;
-+
-+ yaffs_FreeObject(in);
-+ return YAFFS_OK;
-+
-+}
-+
-+/* yaffs_DeleteFile deletes the whole file data
-+ * and the inode associated with the file.
-+ * It does not delete the links associated with the file.
-+ */
-+static int yaffs_UnlinkFile(yaffs_Object * in)
-+{
-+
-+ int retVal;
-+ int immediateDeletion = 0;
-+
-+ if (1) {
-+#ifdef __KERNEL__
-+ if (!in->myInode) {
-+ immediateDeletion = 1;
-+
-+ }
-+#else
-+ if (in->inUse <= 0) {
-+ immediateDeletion = 1;
-+
-+ }
-+#endif
-+ if (immediateDeletion) {
-+ retVal =
-+ yaffs_ChangeObjectName(in, in->myDev->deletedDir,
-+ NULL, 0, 0);
-+ T(YAFFS_TRACE_TRACING,
-+ (TSTR("yaffs: immediate deletion of file %d" TENDSTR),
-+ in->objectId));
-+ in->deleted = 1;
-+ in->myDev->nDeletedFiles++;
-+ if (0 && in->myDev->isYaffs2) {
-+ yaffs_ResizeFile(in, 0);
-+ }
-+ yaffs_SoftDeleteFile(in);
-+ } else {
-+ retVal =
-+ yaffs_ChangeObjectName(in, in->myDev->unlinkedDir,
-+ NULL, 0, 0);
-+ }
-+
-+ }
-+ return retVal;
-+}
-+
-+int yaffs_DeleteFile(yaffs_Object * in)
-+{
-+ int retVal = YAFFS_OK;
-+
-+ if (in->nDataChunks > 0) {
-+ /* Use soft deletion if there is data in the file */
-+ if (!in->unlinked) {
-+ retVal = yaffs_UnlinkFile(in);
-+ }
-+ if (retVal == YAFFS_OK && in->unlinked && !in->deleted) {
-+ in->deleted = 1;
-+ in->myDev->nDeletedFiles++;
-+ yaffs_SoftDeleteFile(in);
-+ }
-+ return in->deleted ? YAFFS_OK : YAFFS_FAIL;
-+ } else {
-+ /* The file has no data chunks so we toss it immediately */
-+ yaffs_FreeTnode(in->myDev, in->variant.fileVariant.top);
-+ in->variant.fileVariant.top = NULL;
-+ yaffs_DoGenericObjectDeletion(in);
-+
-+ return YAFFS_OK;
-+ }
-+}
-+
-+static int yaffs_DeleteDirectory(yaffs_Object * in)
-+{
-+ /* First check that the directory is empty. */
-+ if (list_empty(&in->variant.directoryVariant.children)) {
-+ return yaffs_DoGenericObjectDeletion(in);
-+ }
-+
-+ return YAFFS_FAIL;
-+
-+}
-+
-+static int yaffs_DeleteSymLink(yaffs_Object * in)
-+{
-+ YFREE(in->variant.symLinkVariant.alias);
-+
-+ return yaffs_DoGenericObjectDeletion(in);
-+}
-+
-+static int yaffs_DeleteHardLink(yaffs_Object * in)
-+{
-+ /* remove this hardlink from the list assocaited with the equivalent
-+ * object
-+ */
-+ list_del(&in->hardLinks);
-+ return yaffs_DoGenericObjectDeletion(in);
-+}
-+
-+static void yaffs_DestroyObject(yaffs_Object * obj)
-+{
-+ switch (obj->variantType) {
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ yaffs_DeleteFile(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ yaffs_DeleteDirectory(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ yaffs_DeleteSymLink(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ yaffs_DeleteHardLink(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ yaffs_DoGenericObjectDeletion(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ break; /* should not happen. */
-+ }
-+}
-+
-+static int yaffs_UnlinkWorker(yaffs_Object * obj)
-+{
-+
-+ if (obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
-+ return yaffs_DeleteHardLink(obj);
-+ } else if (!list_empty(&obj->hardLinks)) {
-+ /* Curve ball: We're unlinking an object that has a hardlink.
-+ *
-+ * This problem arises because we are not strictly following
-+ * The Linux link/inode model.
-+ *
-+ * We can't really delete the object.
-+ * Instead, we do the following:
-+ * - Select a hardlink.
-+ * - Unhook it from the hard links
-+ * - Unhook it from its parent directory (so that the rename can work)
-+ * - Rename the object to the hardlink's name.
-+ * - Delete the hardlink
-+ */
-+
-+ yaffs_Object *hl;
-+ int retVal;
-+ YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
-+
-+ hl = list_entry(obj->hardLinks.next, yaffs_Object, hardLinks);
-+
-+ list_del_init(&hl->hardLinks);
-+ list_del_init(&hl->siblings);
-+
-+ yaffs_GetObjectName(hl, name, YAFFS_MAX_NAME_LENGTH + 1);
-+
-+ retVal = yaffs_ChangeObjectName(obj, hl->parent, name, 0, 0);
-+
-+ if (retVal == YAFFS_OK) {
-+ retVal = yaffs_DoGenericObjectDeletion(hl);
-+ }
-+ return retVal;
-+
-+ } else {
-+ switch (obj->variantType) {
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ return yaffs_UnlinkFile(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ return yaffs_DeleteDirectory(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ return yaffs_DeleteSymLink(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ return yaffs_DoGenericObjectDeletion(obj);
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ default:
-+ return YAFFS_FAIL;
-+ }
-+ }
-+}
-+
-+
-+static int yaffs_UnlinkObject( yaffs_Object *obj)
-+{
-+
-+ if (obj && obj->unlinkAllowed) {
-+ return yaffs_UnlinkWorker(obj);
-+ }
-+
-+ return YAFFS_FAIL;
-+
-+}
-+int yaffs_Unlink(yaffs_Object * dir, const YCHAR * name)
-+{
-+ yaffs_Object *obj;
-+
-+ obj = yaffs_FindObjectByName(dir, name);
-+ return yaffs_UnlinkObject(obj);
-+}
-+
-+/*----------------------- Initialisation Scanning ---------------------- */
-+
-+static void yaffs_HandleShadowedObject(yaffs_Device * dev, int objId,
-+ int backwardScanning)
-+{
-+ yaffs_Object *obj;
-+
-+ if (!backwardScanning) {
-+ /* Handle YAFFS1 forward scanning case
-+ * For YAFFS1 we always do the deletion
-+ */
-+
-+ } else {
-+ /* Handle YAFFS2 case (backward scanning)
-+ * If the shadowed object exists then ignore.
-+ */
-+ if (yaffs_FindObjectByNumber(dev, objId)) {
-+ return;
-+ }
-+ }
-+
-+ /* Let's create it (if it does not exist) assuming it is a file so that it can do shrinking etc.
-+ * We put it in unlinked dir to be cleaned up after the scanning
-+ */
-+ obj =
-+ yaffs_FindOrCreateObjectByNumber(dev, objId,
-+ YAFFS_OBJECT_TYPE_FILE);
-+ yaffs_AddObjectToDirectory(dev->unlinkedDir, obj);
-+ obj->variant.fileVariant.shrinkSize = 0;
-+ obj->valid = 1; /* So that we don't read any other info for this file */
-+
-+}
-+
-+typedef struct {
-+ int seq;
-+ int block;
-+} yaffs_BlockIndex;
-+
-+
-+static void yaffs_HardlinkFixup(yaffs_Device *dev, yaffs_Object *hardList)
-+{
-+ yaffs_Object *hl;
-+ yaffs_Object *in;
-+
-+ while (hardList) {
-+ hl = hardList;
-+ hardList = (yaffs_Object *) (hardList->hardLinks.next);
-+
-+ in = yaffs_FindObjectByNumber(dev,
-+ hl->variant.hardLinkVariant.
-+ equivalentObjectId);
-+
-+ if (in) {
-+ /* Add the hardlink pointers */
-+ hl->variant.hardLinkVariant.equivalentObject = in;
-+ list_add(&hl->hardLinks, &in->hardLinks);
-+ } else {
-+ /* Todo Need to report/handle this better.
-+ * Got a problem... hardlink to a non-existant object
-+ */
-+ hl->variant.hardLinkVariant.equivalentObject = NULL;
-+ INIT_LIST_HEAD(&hl->hardLinks);
-+
-+ }
-+
-+ }
-+
-+}
-+
-+
-+
-+
-+
-+static int ybicmp(const void *a, const void *b){
-+ register int aseq = ((yaffs_BlockIndex *)a)->seq;
-+ register int bseq = ((yaffs_BlockIndex *)b)->seq;
-+ register int ablock = ((yaffs_BlockIndex *)a)->block;
-+ register int bblock = ((yaffs_BlockIndex *)b)->block;
-+ if( aseq == bseq )
-+ return ablock - bblock;
-+ else
-+ return aseq - bseq;
-+
-+}
-+
-+static int yaffs_Scan(yaffs_Device * dev)
-+{
-+ yaffs_ExtendedTags tags;
-+ int blk;
-+ int blockIterator;
-+ int startIterator;
-+ int endIterator;
-+ int nBlocksToScan = 0;
-+ int result;
-+
-+ int chunk;
-+ int c;
-+ int deleted;
-+ yaffs_BlockState state;
-+ yaffs_Object *hardList = NULL;
-+ yaffs_Object *hl;
-+ yaffs_BlockInfo *bi;
-+ int sequenceNumber;
-+ yaffs_ObjectHeader *oh;
-+ yaffs_Object *in;
-+ yaffs_Object *parent;
-+ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
-+
-+ __u8 *chunkData;
-+
-+ yaffs_BlockIndex *blockIndex = NULL;
-+
-+ if (dev->isYaffs2) {
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR("yaffs_Scan is not for YAFFS2!" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ //TODO Throw all the yaffs2 stuuf out of yaffs_Scan since it is only for yaffs1 format.
-+
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR("yaffs_Scan starts intstartblk %d intendblk %d..." TENDSTR),
-+ dev->internalStartBlock, dev->internalEndBlock));
-+
-+ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ dev->sequenceNumber = YAFFS_LOWEST_SEQUENCE_NUMBER;
-+
-+ if (dev->isYaffs2) {
-+ blockIndex = YMALLOC(nBlocks * sizeof(yaffs_BlockIndex));
-+ }
-+
-+ /* Scan all the blocks to determine their state */
-+ for (blk = dev->internalStartBlock; blk <= dev->internalEndBlock; blk++) {
-+ bi = yaffs_GetBlockInfo(dev, blk);
-+ yaffs_ClearChunkBits(dev, blk);
-+ bi->pagesInUse = 0;
-+ bi->softDeletions = 0;
-+
-+ yaffs_QueryInitialBlockState(dev, blk, &state, &sequenceNumber);
-+
-+ bi->blockState = state;
-+ bi->sequenceNumber = sequenceNumber;
-+
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("Block scanning block %d state %d seq %d" TENDSTR), blk,
-+ state, sequenceNumber));
-+
-+ if (state == YAFFS_BLOCK_STATE_DEAD) {
-+ T(YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("block %d is bad" TENDSTR), blk));
-+ } else if (state == YAFFS_BLOCK_STATE_EMPTY) {
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("Block empty " TENDSTR)));
-+ dev->nErasedBlocks++;
-+ dev->nFreeChunks += dev->nChunksPerBlock;
-+ } else if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
-+
-+ /* Determine the highest sequence number */
-+ if (dev->isYaffs2 &&
-+ sequenceNumber >= YAFFS_LOWEST_SEQUENCE_NUMBER &&
-+ sequenceNumber < YAFFS_HIGHEST_SEQUENCE_NUMBER) {
-+
-+ blockIndex[nBlocksToScan].seq = sequenceNumber;
-+ blockIndex[nBlocksToScan].block = blk;
-+
-+ nBlocksToScan++;
-+
-+ if (sequenceNumber >= dev->sequenceNumber) {
-+ dev->sequenceNumber = sequenceNumber;
-+ }
-+ } else if (dev->isYaffs2) {
-+ /* TODO: Nasty sequence number! */
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR
-+ ("Block scanning block %d has bad sequence number %d"
-+ TENDSTR), blk, sequenceNumber));
-+
-+ }
-+ }
-+ }
-+
-+ /* Sort the blocks
-+ * Dungy old bubble sort for now...
-+ */
-+ if (dev->isYaffs2) {
-+ yaffs_BlockIndex temp;
-+ int i;
-+ int j;
-+
-+ for (i = 0; i < nBlocksToScan; i++)
-+ for (j = i + 1; j < nBlocksToScan; j++)
-+ if (blockIndex[i].seq > blockIndex[j].seq) {
-+ temp = blockIndex[j];
-+ blockIndex[j] = blockIndex[i];
-+ blockIndex[i] = temp;
-+ }
-+ }
-+
-+ /* Now scan the blocks looking at the data. */
-+ if (dev->isYaffs2) {
-+ startIterator = 0;
-+ endIterator = nBlocksToScan - 1;
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("%d blocks to be scanned" TENDSTR), nBlocksToScan));
-+ } else {
-+ startIterator = dev->internalStartBlock;
-+ endIterator = dev->internalEndBlock;
-+ }
-+
-+ /* For each block.... */
-+ for (blockIterator = startIterator; blockIterator <= endIterator;
-+ blockIterator++) {
-+
-+ if (dev->isYaffs2) {
-+ /* get the block to scan in the correct order */
-+ blk = blockIndex[blockIterator].block;
-+ } else {
-+ blk = blockIterator;
-+ }
-+
-+ bi = yaffs_GetBlockInfo(dev, blk);
-+ state = bi->blockState;
-+
-+ deleted = 0;
-+
-+ /* For each chunk in each block that needs scanning....*/
-+ for (c = 0; c < dev->nChunksPerBlock &&
-+ state == YAFFS_BLOCK_STATE_NEEDS_SCANNING; c++) {
-+ /* Read the tags and decide what to do */
-+ chunk = blk * dev->nChunksPerBlock + c;
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk, NULL,
-+ &tags);
-+
-+ /* Let's have a good look at this chunk... */
-+
-+ if (!dev->isYaffs2 && tags.chunkDeleted) {
-+ /* YAFFS1 only...
-+ * A deleted chunk
-+ */
-+ deleted++;
-+ dev->nFreeChunks++;
-+ /*T((" %d %d deleted\n",blk,c)); */
-+ } else if (!tags.chunkUsed) {
-+ /* An unassigned chunk in the block
-+ * This means that either the block is empty or
-+ * this is the one being allocated from
-+ */
-+
-+ if (c == 0) {
-+ /* We're looking at the first chunk in the block so the block is unused */
-+ state = YAFFS_BLOCK_STATE_EMPTY;
-+ dev->nErasedBlocks++;
-+ } else {
-+ /* this is the block being allocated from */
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR
-+ (" Allocating from %d %d" TENDSTR),
-+ blk, c));
-+ state = YAFFS_BLOCK_STATE_ALLOCATING;
-+ dev->allocationBlock = blk;
-+ dev->allocationPage = c;
-+ dev->allocationBlockFinder = blk;
-+ /* Set it to here to encourage the allocator to go forth from here. */
-+
-+ /* Yaffs2 sanity check:
-+ * This should be the one with the highest sequence number
-+ */
-+ if (dev->isYaffs2
-+ && (dev->sequenceNumber !=
-+ bi->sequenceNumber)) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("yaffs: Allocation block %d was not highest sequence id:"
-+ " block seq = %d, dev seq = %d"
-+ TENDSTR), blk,bi->sequenceNumber,dev->sequenceNumber));
-+ }
-+ }
-+
-+ dev->nFreeChunks += (dev->nChunksPerBlock - c);
-+ } else if (tags.chunkId > 0) {
-+ /* chunkId > 0 so it is a data chunk... */
-+ unsigned int endpos;
-+
-+ yaffs_SetChunkBit(dev, blk, c);
-+ bi->pagesInUse++;
-+
-+ in = yaffs_FindOrCreateObjectByNumber(dev,
-+ tags.
-+ objectId,
-+ YAFFS_OBJECT_TYPE_FILE);
-+ /* PutChunkIntoFile checks for a clash (two data chunks with
-+ * the same chunkId).
-+ */
-+ yaffs_PutChunkIntoFile(in, tags.chunkId, chunk,
-+ 1);
-+ endpos =
-+ (tags.chunkId - 1) * dev->nDataBytesPerChunk +
-+ tags.byteCount;
-+ if (in->variantType == YAFFS_OBJECT_TYPE_FILE
-+ && in->variant.fileVariant.scannedFileSize <
-+ endpos) {
-+ in->variant.fileVariant.
-+ scannedFileSize = endpos;
-+ if (!dev->useHeaderFileSize) {
-+ in->variant.fileVariant.
-+ fileSize =
-+ in->variant.fileVariant.
-+ scannedFileSize;
-+ }
-+
-+ }
-+ /* T((" %d %d data %d %d\n",blk,c,tags.objectId,tags.chunkId)); */
-+ } else {
-+ /* chunkId == 0, so it is an ObjectHeader.
-+ * Thus, we read in the object header and make the object
-+ */
-+ yaffs_SetChunkBit(dev, blk, c);
-+ bi->pagesInUse++;
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk,
-+ chunkData,
-+ NULL);
-+
-+ oh = (yaffs_ObjectHeader *) chunkData;
-+
-+ in = yaffs_FindObjectByNumber(dev,
-+ tags.objectId);
-+ if (in && in->variantType != oh->type) {
-+ /* This should not happen, but somehow
-+ * Wev'e ended up with an objectId that has been reused but not yet
-+ * deleted, and worse still it has changed type. Delete the old object.
-+ */
-+
-+ yaffs_DestroyObject(in);
-+
-+ in = 0;
-+ }
-+
-+ in = yaffs_FindOrCreateObjectByNumber(dev,
-+ tags.
-+ objectId,
-+ oh->type);
-+
-+ if (oh->shadowsObject > 0) {
-+ yaffs_HandleShadowedObject(dev,
-+ oh->
-+ shadowsObject,
-+ 0);
-+ }
-+
-+ if (in->valid) {
-+ /* We have already filled this one. We have a duplicate and need to resolve it. */
-+
-+ unsigned existingSerial = in->serial;
-+ unsigned newSerial = tags.serialNumber;
-+
-+ if (dev->isYaffs2 ||
-+ ((existingSerial + 1) & 3) ==
-+ newSerial) {
-+ /* Use new one - destroy the exisiting one */
-+ yaffs_DeleteChunk(dev,
-+ in->chunkId,
-+ 1, __LINE__);
-+ in->valid = 0;
-+ } else {
-+ /* Use existing - destroy this one. */
-+ yaffs_DeleteChunk(dev, chunk, 1,
-+ __LINE__);
-+ }
-+ }
-+
-+ if (!in->valid &&
-+ (tags.objectId == YAFFS_OBJECTID_ROOT ||
-+ tags.objectId == YAFFS_OBJECTID_LOSTNFOUND)) {
-+ /* We only load some info, don't fiddle with directory structure */
-+ in->valid = 1;
-+ in->variantType = oh->type;
-+
-+ in->yst_mode = oh->yst_mode;
-+#ifdef CONFIG_YAFFS_WINCE
-+ in->win_atime[0] = oh->win_atime[0];
-+ in->win_ctime[0] = oh->win_ctime[0];
-+ in->win_mtime[0] = oh->win_mtime[0];
-+ in->win_atime[1] = oh->win_atime[1];
-+ in->win_ctime[1] = oh->win_ctime[1];
-+ in->win_mtime[1] = oh->win_mtime[1];
-+#else
-+ in->yst_uid = oh->yst_uid;
-+ in->yst_gid = oh->yst_gid;
-+ in->yst_atime = oh->yst_atime;
-+ in->yst_mtime = oh->yst_mtime;
-+ in->yst_ctime = oh->yst_ctime;
-+ in->yst_rdev = oh->yst_rdev;
-+#endif
-+ in->chunkId = chunk;
-+
-+ } else if (!in->valid) {
-+ /* we need to load this info */
-+
-+ in->valid = 1;
-+ in->variantType = oh->type;
-+
-+ in->yst_mode = oh->yst_mode;
-+#ifdef CONFIG_YAFFS_WINCE
-+ in->win_atime[0] = oh->win_atime[0];
-+ in->win_ctime[0] = oh->win_ctime[0];
-+ in->win_mtime[0] = oh->win_mtime[0];
-+ in->win_atime[1] = oh->win_atime[1];
-+ in->win_ctime[1] = oh->win_ctime[1];
-+ in->win_mtime[1] = oh->win_mtime[1];
-+#else
-+ in->yst_uid = oh->yst_uid;
-+ in->yst_gid = oh->yst_gid;
-+ in->yst_atime = oh->yst_atime;
-+ in->yst_mtime = oh->yst_mtime;
-+ in->yst_ctime = oh->yst_ctime;
-+ in->yst_rdev = oh->yst_rdev;
-+#endif
-+ in->chunkId = chunk;
-+
-+ yaffs_SetObjectName(in, oh->name);
-+ in->dirty = 0;
-+
-+ /* directory stuff...
-+ * hook up to parent
-+ */
-+
-+ parent =
-+ yaffs_FindOrCreateObjectByNumber
-+ (dev, oh->parentObjectId,
-+ YAFFS_OBJECT_TYPE_DIRECTORY);
-+ if (parent->variantType ==
-+ YAFFS_OBJECT_TYPE_UNKNOWN) {
-+ /* Set up as a directory */
-+ parent->variantType =
-+ YAFFS_OBJECT_TYPE_DIRECTORY;
-+ INIT_LIST_HEAD(&parent->variant.
-+ directoryVariant.
-+ children);
-+ } else if (parent->variantType !=
-+ YAFFS_OBJECT_TYPE_DIRECTORY)
-+ {
-+ /* Hoosterman, another problem....
-+ * We're trying to use a non-directory as a directory
-+ */
-+
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs tragedy: attempting to use non-directory as"
-+ " a directory in scan. Put in lost+found."
-+ TENDSTR)));
-+ parent = dev->lostNFoundDir;
-+ }
-+
-+ yaffs_AddObjectToDirectory(parent, in);
-+
-+ if (0 && (parent == dev->deletedDir ||
-+ parent == dev->unlinkedDir)) {
-+ in->deleted = 1; /* If it is unlinked at start up then it wants deleting */
-+ dev->nDeletedFiles++;
-+ }
-+ /* Note re hardlinks.
-+ * Since we might scan a hardlink before its equivalent object is scanned
-+ * we put them all in a list.
-+ * After scanning is complete, we should have all the objects, so we run through this
-+ * list and fix up all the chains.
-+ */
-+
-+ switch (in->variantType) {
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ /* Todo got a problem */
-+ break;
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ if (dev->isYaffs2
-+ && oh->isShrink) {
-+ /* Prune back the shrunken chunks */
-+ yaffs_PruneResizedChunks
-+ (in, oh->fileSize);
-+ /* Mark the block as having a shrinkHeader */
-+ bi->hasShrinkHeader = 1;
-+ }
-+
-+ if (dev->useHeaderFileSize)
-+
-+ in->variant.fileVariant.
-+ fileSize =
-+ oh->fileSize;
-+
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ in->variant.hardLinkVariant.
-+ equivalentObjectId =
-+ oh->equivalentObjectId;
-+ in->hardLinks.next =
-+ (struct list_head *)
-+ hardList;
-+ hardList = in;
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ in->variant.symLinkVariant.
-+ alias =
-+ yaffs_CloneString(oh->alias);
-+ break;
-+ }
-+
-+ if (parent == dev->deletedDir) {
-+ yaffs_DestroyObject(in);
-+ bi->hasShrinkHeader = 1;
-+ }
-+ }
-+ }
-+ }
-+
-+ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
-+ /* If we got this far while scanning, then the block is fully allocated.*/
-+ state = YAFFS_BLOCK_STATE_FULL;
-+ }
-+
-+ bi->blockState = state;
-+
-+ /* Now let's see if it was dirty */
-+ if (bi->pagesInUse == 0 &&
-+ !bi->hasShrinkHeader &&
-+ bi->blockState == YAFFS_BLOCK_STATE_FULL) {
-+ yaffs_BlockBecameDirty(dev, blk);
-+ }
-+
-+ }
-+
-+ if (blockIndex) {
-+ YFREE(blockIndex);
-+ }
-+
-+
-+ /* Ok, we've done all the scanning.
-+ * Fix up the hard link chains.
-+ * We should now have scanned all the objects, now it's time to add these
-+ * hardlinks.
-+ */
-+
-+ yaffs_HardlinkFixup(dev,hardList);
-+
-+ /* Handle the unlinked files. Since they were left in an unlinked state we should
-+ * just delete them.
-+ */
-+ {
-+ struct list_head *i;
-+ struct list_head *n;
-+
-+ yaffs_Object *l;
-+ /* Soft delete all the unlinked files */
-+ list_for_each_safe(i, n,
-+ &dev->unlinkedDir->variant.directoryVariant.
-+ children) {
-+ if (i) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+ yaffs_DestroyObject(l);
-+ }
-+ }
-+ }
-+
-+ yaffs_ReleaseTempBuffer(dev, chunkData, __LINE__);
-+
-+ T(YAFFS_TRACE_SCAN, (TSTR("yaffs_Scan ends" TENDSTR)));
-+
-+ return YAFFS_OK;
-+}
-+
-+static void yaffs_CheckObjectDetailsLoaded(yaffs_Object *in)
-+{
-+ __u8 *chunkData;
-+ yaffs_ObjectHeader *oh;
-+ yaffs_Device *dev = in->myDev;
-+ yaffs_ExtendedTags tags;
-+ int result;
-+
-+#if 0
-+ T(YAFFS_TRACE_SCAN,(TSTR("details for object %d %s loaded" TENDSTR),
-+ in->objectId,
-+ in->lazyLoaded ? "not yet" : "already"));
-+#endif
-+
-+ if(in->lazyLoaded){
-+ in->lazyLoaded = 0;
-+ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev,in->chunkId,chunkData,&tags);
-+ oh = (yaffs_ObjectHeader *) chunkData;
-+
-+ in->yst_mode = oh->yst_mode;
-+#ifdef CONFIG_YAFFS_WINCE
-+ in->win_atime[0] = oh->win_atime[0];
-+ in->win_ctime[0] = oh->win_ctime[0];
-+ in->win_mtime[0] = oh->win_mtime[0];
-+ in->win_atime[1] = oh->win_atime[1];
-+ in->win_ctime[1] = oh->win_ctime[1];
-+ in->win_mtime[1] = oh->win_mtime[1];
-+#else
-+ in->yst_uid = oh->yst_uid;
-+ in->yst_gid = oh->yst_gid;
-+ in->yst_atime = oh->yst_atime;
-+ in->yst_mtime = oh->yst_mtime;
-+ in->yst_ctime = oh->yst_ctime;
-+ in->yst_rdev = oh->yst_rdev;
-+
-+#endif
-+ yaffs_SetObjectName(in, oh->name);
-+
-+ if(in->variantType == YAFFS_OBJECT_TYPE_SYMLINK)
-+ in->variant.symLinkVariant.alias =
-+ yaffs_CloneString(oh->alias);
-+
-+ yaffs_ReleaseTempBuffer(dev,chunkData, __LINE__);
-+ }
-+}
-+
-+static int yaffs_ScanBackwards(yaffs_Device * dev)
-+{
-+ yaffs_ExtendedTags tags;
-+ int blk;
-+ int blockIterator;
-+ int startIterator;
-+ int endIterator;
-+ int nBlocksToScan = 0;
-+
-+ int chunk;
-+ int result;
-+ int c;
-+ int deleted;
-+ yaffs_BlockState state;
-+ yaffs_Object *hardList = NULL;
-+ yaffs_BlockInfo *bi;
-+ int sequenceNumber;
-+ yaffs_ObjectHeader *oh;
-+ yaffs_Object *in;
-+ yaffs_Object *parent;
-+ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
-+ int itsUnlinked;
-+ __u8 *chunkData;
-+
-+ int fileSize;
-+ int isShrink;
-+ int foundChunksInBlock;
-+ int equivalentObjectId;
-+
-+
-+ yaffs_BlockIndex *blockIndex = NULL;
-+ int altBlockIndex = 0;
-+
-+ if (!dev->isYaffs2) {
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR("yaffs_ScanBackwards is only for YAFFS2!" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR
-+ ("yaffs_ScanBackwards starts intstartblk %d intendblk %d..."
-+ TENDSTR), dev->internalStartBlock, dev->internalEndBlock));
-+
-+
-+ dev->sequenceNumber = YAFFS_LOWEST_SEQUENCE_NUMBER;
-+
-+ blockIndex = YMALLOC(nBlocks * sizeof(yaffs_BlockIndex));
-+
-+ if(!blockIndex) {
-+ blockIndex = YMALLOC_ALT(nBlocks * sizeof(yaffs_BlockIndex));
-+ altBlockIndex = 1;
-+ }
-+
-+ if(!blockIndex) {
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR("yaffs_Scan() could not allocate block index!" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
-+
-+ /* Scan all the blocks to determine their state */
-+ for (blk = dev->internalStartBlock; blk <= dev->internalEndBlock; blk++) {
-+ bi = yaffs_GetBlockInfo(dev, blk);
-+ yaffs_ClearChunkBits(dev, blk);
-+ bi->pagesInUse = 0;
-+ bi->softDeletions = 0;
-+
-+ yaffs_QueryInitialBlockState(dev, blk, &state, &sequenceNumber);
-+
-+ bi->blockState = state;
-+ bi->sequenceNumber = sequenceNumber;
-+
-+ if(bi->sequenceNumber == YAFFS_SEQUENCE_CHECKPOINT_DATA)
-+ bi->blockState = state = YAFFS_BLOCK_STATE_CHECKPOINT;
-+
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("Block scanning block %d state %d seq %d" TENDSTR), blk,
-+ state, sequenceNumber));
-+
-+
-+ if(state == YAFFS_BLOCK_STATE_CHECKPOINT){
-+ /* todo .. fix free space ? */
-+
-+ } else if (state == YAFFS_BLOCK_STATE_DEAD) {
-+ T(YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("block %d is bad" TENDSTR), blk));
-+ } else if (state == YAFFS_BLOCK_STATE_EMPTY) {
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("Block empty " TENDSTR)));
-+ dev->nErasedBlocks++;
-+ dev->nFreeChunks += dev->nChunksPerBlock;
-+ } else if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
-+
-+ /* Determine the highest sequence number */
-+ if (dev->isYaffs2 &&
-+ sequenceNumber >= YAFFS_LOWEST_SEQUENCE_NUMBER &&
-+ sequenceNumber < YAFFS_HIGHEST_SEQUENCE_NUMBER) {
-+
-+ blockIndex[nBlocksToScan].seq = sequenceNumber;
-+ blockIndex[nBlocksToScan].block = blk;
-+
-+ nBlocksToScan++;
-+
-+ if (sequenceNumber >= dev->sequenceNumber) {
-+ dev->sequenceNumber = sequenceNumber;
-+ }
-+ } else if (dev->isYaffs2) {
-+ /* TODO: Nasty sequence number! */
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR
-+ ("Block scanning block %d has bad sequence number %d"
-+ TENDSTR), blk, sequenceNumber));
-+
-+ }
-+ }
-+ }
-+
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR("%d blocks to be sorted..." TENDSTR), nBlocksToScan));
-+
-+
-+
-+ YYIELD();
-+
-+ /* Sort the blocks */
-+#ifndef CONFIG_YAFFS_USE_OWN_SORT
-+ {
-+ /* Use qsort now. */
-+ qsort(blockIndex, nBlocksToScan, sizeof(yaffs_BlockIndex), ybicmp);
-+ }
-+#else
-+ {
-+ /* Dungy old bubble sort... */
-+
-+ yaffs_BlockIndex temp;
-+ int i;
-+ int j;
-+
-+ for (i = 0; i < nBlocksToScan; i++)
-+ for (j = i + 1; j < nBlocksToScan; j++)
-+ if (blockIndex[i].seq > blockIndex[j].seq) {
-+ temp = blockIndex[j];
-+ blockIndex[j] = blockIndex[i];
-+ blockIndex[i] = temp;
-+ }
-+ }
-+#endif
-+
-+ YYIELD();
-+
-+ T(YAFFS_TRACE_SCAN, (TSTR("...done" TENDSTR)));
-+
-+ /* Now scan the blocks looking at the data. */
-+ startIterator = 0;
-+ endIterator = nBlocksToScan - 1;
-+ T(YAFFS_TRACE_SCAN_DEBUG,
-+ (TSTR("%d blocks to be scanned" TENDSTR), nBlocksToScan));
-+
-+ /* For each block.... backwards */
-+ for (blockIterator = endIterator; blockIterator >= startIterator;
-+ blockIterator--) {
-+ /* Cooperative multitasking! This loop can run for so
-+ long that watchdog timers expire. */
-+ YYIELD();
-+
-+ /* get the block to scan in the correct order */
-+ blk = blockIndex[blockIterator].block;
-+
-+ bi = yaffs_GetBlockInfo(dev, blk);
-+ state = bi->blockState;
-+
-+ deleted = 0;
-+
-+ /* For each chunk in each block that needs scanning.... */
-+ foundChunksInBlock = 0;
-+ for (c = dev->nChunksPerBlock - 1; c >= 0 &&
-+ (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
-+ state == YAFFS_BLOCK_STATE_ALLOCATING); c--) {
-+ /* Scan backwards...
-+ * Read the tags and decide what to do
-+ */
-+ chunk = blk * dev->nChunksPerBlock + c;
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk, NULL,
-+ &tags);
-+
-+ /* Let's have a good look at this chunk... */
-+
-+ if (!tags.chunkUsed) {
-+ /* An unassigned chunk in the block.
-+ * If there are used chunks after this one, then
-+ * it is a chunk that was skipped due to failing the erased
-+ * check. Just skip it so that it can be deleted.
-+ * But, more typically, We get here when this is an unallocated
-+ * chunk and his means that either the block is empty or
-+ * this is the one being allocated from
-+ */
-+
-+ if(foundChunksInBlock)
-+ {
-+ /* This is a chunk that was skipped due to failing the erased check */
-+
-+ } else if (c == 0) {
-+ /* We're looking at the first chunk in the block so the block is unused */
-+ state = YAFFS_BLOCK_STATE_EMPTY;
-+ dev->nErasedBlocks++;
-+ } else {
-+ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
-+ state == YAFFS_BLOCK_STATE_ALLOCATING) {
-+ if(dev->sequenceNumber == bi->sequenceNumber) {
-+ /* this is the block being allocated from */
-+
-+ T(YAFFS_TRACE_SCAN,
-+ (TSTR
-+ (" Allocating from %d %d"
-+ TENDSTR), blk, c));
-+
-+ state = YAFFS_BLOCK_STATE_ALLOCATING;
-+ dev->allocationBlock = blk;
-+ dev->allocationPage = c;
-+ dev->allocationBlockFinder = blk;
-+ }
-+ else {
-+ /* This is a partially written block that is not
-+ * the current allocation block. This block must have
-+ * had a write failure, so set up for retirement.
-+ */
-+
-+ bi->needsRetiring = 1;
-+ bi->gcPrioritise = 1;
-+
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("Partially written block %d being set for retirement" TENDSTR),
-+ blk));
-+ }
-+
-+ }
-+
-+ }
-+
-+ dev->nFreeChunks++;
-+
-+ } else if (tags.chunkId > 0) {
-+ /* chunkId > 0 so it is a data chunk... */
-+ unsigned int endpos;
-+ __u32 chunkBase =
-+ (tags.chunkId - 1) * dev->nDataBytesPerChunk;
-+
-+ foundChunksInBlock = 1;
-+
-+
-+ yaffs_SetChunkBit(dev, blk, c);
-+ bi->pagesInUse++;
-+
-+ in = yaffs_FindOrCreateObjectByNumber(dev,
-+ tags.
-+ objectId,
-+ YAFFS_OBJECT_TYPE_FILE);
-+ if (in->variantType == YAFFS_OBJECT_TYPE_FILE
-+ && chunkBase <
-+ in->variant.fileVariant.shrinkSize) {
-+ /* This has not been invalidated by a resize */
-+ yaffs_PutChunkIntoFile(in, tags.chunkId,
-+ chunk, -1);
-+
-+ /* File size is calculated by looking at the data chunks if we have not
-+ * seen an object header yet. Stop this practice once we find an object header.
-+ */
-+ endpos =
-+ (tags.chunkId -
-+ 1) * dev->nDataBytesPerChunk +
-+ tags.byteCount;
-+
-+ if (!in->valid && /* have not got an object header yet */
-+ in->variant.fileVariant.
-+ scannedFileSize < endpos) {
-+ in->variant.fileVariant.
-+ scannedFileSize = endpos;
-+ in->variant.fileVariant.
-+ fileSize =
-+ in->variant.fileVariant.
-+ scannedFileSize;
-+ }
-+
-+ } else {
-+ /* This chunk has been invalidated by a resize, so delete */
-+ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
-+
-+ }
-+ } else {
-+ /* chunkId == 0, so it is an ObjectHeader.
-+ * Thus, we read in the object header and make the object
-+ */
-+ foundChunksInBlock = 1;
-+
-+ yaffs_SetChunkBit(dev, blk, c);
-+ bi->pagesInUse++;
-+
-+ oh = NULL;
-+ in = NULL;
-+
-+ if (tags.extraHeaderInfoAvailable) {
-+ in = yaffs_FindOrCreateObjectByNumber
-+ (dev, tags.objectId,
-+ tags.extraObjectType);
-+ }
-+
-+ if (!in ||
-+#ifdef CONFIG_YAFFS_DISABLE_LAZY_LOAD
-+ !in->valid ||
-+#endif
-+ tags.extraShadows ||
-+ (!in->valid &&
-+ (tags.objectId == YAFFS_OBJECTID_ROOT ||
-+ tags.objectId == YAFFS_OBJECTID_LOSTNFOUND))
-+ ) {
-+
-+ /* If we don't have valid info then we need to read the chunk
-+ * TODO In future we can probably defer reading the chunk and
-+ * living with invalid data until needed.
-+ */
-+
-+ result = yaffs_ReadChunkWithTagsFromNAND(dev,
-+ chunk,
-+ chunkData,
-+ NULL);
-+
-+ oh = (yaffs_ObjectHeader *) chunkData;
-+
-+ if (!in)
-+ in = yaffs_FindOrCreateObjectByNumber(dev, tags.objectId, oh->type);
-+
-+ }
-+
-+ if (!in) {
-+ /* TODO Hoosterman we have a problem! */
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs tragedy: Could not make object for object %d "
-+ "at chunk %d during scan"
-+ TENDSTR), tags.objectId, chunk));
-+
-+ }
-+
-+ if (in->valid) {
-+ /* We have already filled this one.
-+ * We have a duplicate that will be discarded, but
-+ * we first have to suck out resize info if it is a file.
-+ */
-+
-+ if ((in->variantType == YAFFS_OBJECT_TYPE_FILE) &&
-+ ((oh &&
-+ oh-> type == YAFFS_OBJECT_TYPE_FILE)||
-+ (tags.extraHeaderInfoAvailable &&
-+ tags.extraObjectType == YAFFS_OBJECT_TYPE_FILE))
-+ ) {
-+ __u32 thisSize =
-+ (oh) ? oh->fileSize : tags.
-+ extraFileLength;
-+ __u32 parentObjectId =
-+ (oh) ? oh->
-+ parentObjectId : tags.
-+ extraParentObjectId;
-+ unsigned isShrink =
-+ (oh) ? oh->isShrink : tags.
-+ extraIsShrinkHeader;
-+
-+ /* If it is deleted (unlinked at start also means deleted)
-+ * we treat the file size as being zeroed at this point.
-+ */
-+ if (parentObjectId ==
-+ YAFFS_OBJECTID_DELETED
-+ || parentObjectId ==
-+ YAFFS_OBJECTID_UNLINKED) {
-+ thisSize = 0;
-+ isShrink = 1;
-+ }
-+
-+ if (isShrink &&
-+ in->variant.fileVariant.
-+ shrinkSize > thisSize) {
-+ in->variant.fileVariant.
-+ shrinkSize =
-+ thisSize;
-+ }
-+
-+ if (isShrink) {
-+ bi->hasShrinkHeader = 1;
-+ }
-+
-+ }
-+ /* Use existing - destroy this one. */
-+ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
-+
-+ }
-+
-+ if (!in->valid &&
-+ (tags.objectId == YAFFS_OBJECTID_ROOT ||
-+ tags.objectId ==
-+ YAFFS_OBJECTID_LOSTNFOUND)) {
-+ /* We only load some info, don't fiddle with directory structure */
-+ in->valid = 1;
-+
-+ if(oh) {
-+ in->variantType = oh->type;
-+
-+ in->yst_mode = oh->yst_mode;
-+#ifdef CONFIG_YAFFS_WINCE
-+ in->win_atime[0] = oh->win_atime[0];
-+ in->win_ctime[0] = oh->win_ctime[0];
-+ in->win_mtime[0] = oh->win_mtime[0];
-+ in->win_atime[1] = oh->win_atime[1];
-+ in->win_ctime[1] = oh->win_ctime[1];
-+ in->win_mtime[1] = oh->win_mtime[1];
-+#else
-+ in->yst_uid = oh->yst_uid;
-+ in->yst_gid = oh->yst_gid;
-+ in->yst_atime = oh->yst_atime;
-+ in->yst_mtime = oh->yst_mtime;
-+ in->yst_ctime = oh->yst_ctime;
-+ in->yst_rdev = oh->yst_rdev;
-+
-+#endif
-+ } else {
-+ in->variantType = tags.extraObjectType;
-+ in->lazyLoaded = 1;
-+ }
-+
-+ in->chunkId = chunk;
-+
-+ } else if (!in->valid) {
-+ /* we need to load this info */
-+
-+ in->valid = 1;
-+ in->chunkId = chunk;
-+
-+ if(oh) {
-+ in->variantType = oh->type;
-+
-+ in->yst_mode = oh->yst_mode;
-+#ifdef CONFIG_YAFFS_WINCE
-+ in->win_atime[0] = oh->win_atime[0];
-+ in->win_ctime[0] = oh->win_ctime[0];
-+ in->win_mtime[0] = oh->win_mtime[0];
-+ in->win_atime[1] = oh->win_atime[1];
-+ in->win_ctime[1] = oh->win_ctime[1];
-+ in->win_mtime[1] = oh->win_mtime[1];
-+#else
-+ in->yst_uid = oh->yst_uid;
-+ in->yst_gid = oh->yst_gid;
-+ in->yst_atime = oh->yst_atime;
-+ in->yst_mtime = oh->yst_mtime;
-+ in->yst_ctime = oh->yst_ctime;
-+ in->yst_rdev = oh->yst_rdev;
-+#endif
-+
-+ if (oh->shadowsObject > 0)
-+ yaffs_HandleShadowedObject(dev,
-+ oh->
-+ shadowsObject,
-+ 1);
-+
-+
-+ yaffs_SetObjectName(in, oh->name);
-+ parent =
-+ yaffs_FindOrCreateObjectByNumber
-+ (dev, oh->parentObjectId,
-+ YAFFS_OBJECT_TYPE_DIRECTORY);
-+
-+ fileSize = oh->fileSize;
-+ isShrink = oh->isShrink;
-+ equivalentObjectId = oh->equivalentObjectId;
-+
-+ }
-+ else {
-+ in->variantType = tags.extraObjectType;
-+ parent =
-+ yaffs_FindOrCreateObjectByNumber
-+ (dev, tags.extraParentObjectId,
-+ YAFFS_OBJECT_TYPE_DIRECTORY);
-+ fileSize = tags.extraFileLength;
-+ isShrink = tags.extraIsShrinkHeader;
-+ equivalentObjectId = tags.extraEquivalentObjectId;
-+ in->lazyLoaded = 1;
-+
-+ }
-+ in->dirty = 0;
-+
-+ /* directory stuff...
-+ * hook up to parent
-+ */
-+
-+ if (parent->variantType ==
-+ YAFFS_OBJECT_TYPE_UNKNOWN) {
-+ /* Set up as a directory */
-+ parent->variantType =
-+ YAFFS_OBJECT_TYPE_DIRECTORY;
-+ INIT_LIST_HEAD(&parent->variant.
-+ directoryVariant.
-+ children);
-+ } else if (parent->variantType !=
-+ YAFFS_OBJECT_TYPE_DIRECTORY)
-+ {
-+ /* Hoosterman, another problem....
-+ * We're trying to use a non-directory as a directory
-+ */
-+
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("yaffs tragedy: attempting to use non-directory as"
-+ " a directory in scan. Put in lost+found."
-+ TENDSTR)));
-+ parent = dev->lostNFoundDir;
-+ }
-+
-+ yaffs_AddObjectToDirectory(parent, in);
-+
-+ itsUnlinked = (parent == dev->deletedDir) ||
-+ (parent == dev->unlinkedDir);
-+
-+ if (isShrink) {
-+ /* Mark the block as having a shrinkHeader */
-+ bi->hasShrinkHeader = 1;
-+ }
-+
-+ /* Note re hardlinks.
-+ * Since we might scan a hardlink before its equivalent object is scanned
-+ * we put them all in a list.
-+ * After scanning is complete, we should have all the objects, so we run
-+ * through this list and fix up all the chains.
-+ */
-+
-+ switch (in->variantType) {
-+ case YAFFS_OBJECT_TYPE_UNKNOWN:
-+ /* Todo got a problem */
-+ break;
-+ case YAFFS_OBJECT_TYPE_FILE:
-+
-+ if (in->variant.fileVariant.
-+ scannedFileSize < fileSize) {
-+ /* This covers the case where the file size is greater
-+ * than where the data is
-+ * This will happen if the file is resized to be larger
-+ * than its current data extents.
-+ */
-+ in->variant.fileVariant.fileSize = fileSize;
-+ in->variant.fileVariant.scannedFileSize =
-+ in->variant.fileVariant.fileSize;
-+ }
-+
-+ if (isShrink &&
-+ in->variant.fileVariant.shrinkSize > fileSize) {
-+ in->variant.fileVariant.shrinkSize = fileSize;
-+ }
-+
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ if(!itsUnlinked) {
-+ in->variant.hardLinkVariant.equivalentObjectId =
-+ equivalentObjectId;
-+ in->hardLinks.next =
-+ (struct list_head *) hardList;
-+ hardList = in;
-+ }
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ /* Do nothing */
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ if(oh)
-+ in->variant.symLinkVariant.alias =
-+ yaffs_CloneString(oh->
-+ alias);
-+ break;
-+ }
-+
-+ }
-+ }
-+ }
-+
-+ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
-+ /* If we got this far while scanning, then the block is fully allocated. */
-+ state = YAFFS_BLOCK_STATE_FULL;
-+ }
-+
-+ bi->blockState = state;
-+
-+ /* Now let's see if it was dirty */
-+ if (bi->pagesInUse == 0 &&
-+ !bi->hasShrinkHeader &&
-+ bi->blockState == YAFFS_BLOCK_STATE_FULL) {
-+ yaffs_BlockBecameDirty(dev, blk);
-+ }
-+
-+ }
-+
-+ if (altBlockIndex)
-+ YFREE_ALT(blockIndex);
-+ else
-+ YFREE(blockIndex);
-+
-+ /* Ok, we've done all the scanning.
-+ * Fix up the hard link chains.
-+ * We should now have scanned all the objects, now it's time to add these
-+ * hardlinks.
-+ */
-+ yaffs_HardlinkFixup(dev,hardList);
-+
-+
-+ /*
-+ * Sort out state of unlinked and deleted objects.
-+ */
-+ {
-+ struct list_head *i;
-+ struct list_head *n;
-+
-+ yaffs_Object *l;
-+
-+ /* Soft delete all the unlinked files */
-+ list_for_each_safe(i, n,
-+ &dev->unlinkedDir->variant.directoryVariant.
-+ children) {
-+ if (i) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+ yaffs_DestroyObject(l);
-+ }
-+ }
-+
-+ /* Soft delete all the deletedDir files */
-+ list_for_each_safe(i, n,
-+ &dev->deletedDir->variant.directoryVariant.
-+ children) {
-+ if (i) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+ yaffs_DestroyObject(l);
-+
-+ }
-+ }
-+ }
-+
-+ yaffs_ReleaseTempBuffer(dev, chunkData, __LINE__);
-+
-+ T(YAFFS_TRACE_SCAN, (TSTR("yaffs_ScanBackwards ends" TENDSTR)));
-+
-+ return YAFFS_OK;
-+}
-+
-+/*------------------------------ Directory Functions ----------------------------- */
-+
-+static void yaffs_RemoveObjectFromDirectory(yaffs_Object * obj)
-+{
-+ yaffs_Device *dev = obj->myDev;
-+
-+ if(dev && dev->removeObjectCallback)
-+ dev->removeObjectCallback(obj);
-+
-+ list_del_init(&obj->siblings);
-+ obj->parent = NULL;
-+}
-+
-+
-+static void yaffs_AddObjectToDirectory(yaffs_Object * directory,
-+ yaffs_Object * obj)
-+{
-+
-+ if (!directory) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: Trying to add an object to a null pointer directory"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+ if (directory->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: Trying to add an object to a non-directory"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+
-+ if (obj->siblings.prev == NULL) {
-+ /* Not initialised */
-+ INIT_LIST_HEAD(&obj->siblings);
-+
-+ } else if (!list_empty(&obj->siblings)) {
-+ /* If it is holed up somewhere else, un hook it */
-+ yaffs_RemoveObjectFromDirectory(obj);
-+ }
-+ /* Now add it */
-+ list_add(&obj->siblings, &directory->variant.directoryVariant.children);
-+ obj->parent = directory;
-+
-+ if (directory == obj->myDev->unlinkedDir
-+ || directory == obj->myDev->deletedDir) {
-+ obj->unlinked = 1;
-+ obj->myDev->nUnlinkedFiles++;
-+ obj->renameAllowed = 0;
-+ }
-+}
-+
-+yaffs_Object *yaffs_FindObjectByName(yaffs_Object * directory,
-+ const YCHAR * name)
-+{
-+ int sum;
-+
-+ struct list_head *i;
-+ YCHAR buffer[YAFFS_MAX_NAME_LENGTH + 1];
-+
-+ yaffs_Object *l;
-+
-+ if (!name) {
-+ return NULL;
-+ }
-+
-+ if (!directory) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: yaffs_FindObjectByName: null pointer directory"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+ if (directory->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: yaffs_FindObjectByName: non-directory" TENDSTR)));
-+ YBUG();
-+ }
-+
-+ sum = yaffs_CalcNameSum(name);
-+
-+ list_for_each(i, &directory->variant.directoryVariant.children) {
-+ if (i) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+
-+ yaffs_CheckObjectDetailsLoaded(l);
-+
-+ /* Special case for lost-n-found */
-+ if (l->objectId == YAFFS_OBJECTID_LOSTNFOUND) {
-+ if (yaffs_strcmp(name, YAFFS_LOSTNFOUND_NAME) == 0) {
-+ return l;
-+ }
-+ } else if (yaffs_SumCompare(l->sum, sum) || l->chunkId <= 0)
-+ {
-+ /* LostnFound cunk called Objxxx
-+ * Do a real check
-+ */
-+ yaffs_GetObjectName(l, buffer,
-+ YAFFS_MAX_NAME_LENGTH);
-+ if (yaffs_strcmp(name, buffer) == 0) {
-+ return l;
-+ }
-+
-+ }
-+ }
-+ }
-+
-+ return NULL;
-+}
-+
-+
-+#if 0
-+int yaffs_ApplyToDirectoryChildren(yaffs_Object * theDir,
-+ int (*fn) (yaffs_Object *))
-+{
-+ struct list_head *i;
-+ yaffs_Object *l;
-+
-+ if (!theDir) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: yaffs_FindObjectByName: null pointer directory"
-+ TENDSTR)));
-+ YBUG();
-+ }
-+ if (theDir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("tragedy: yaffs_FindObjectByName: non-directory" TENDSTR)));
-+ YBUG();
-+ }
-+
-+ list_for_each(i, &theDir->variant.directoryVariant.children) {
-+ if (i) {
-+ l = list_entry(i, yaffs_Object, siblings);
-+ if (l && !fn(l)) {
-+ return YAFFS_FAIL;
-+ }
-+ }
-+ }
-+
-+ return YAFFS_OK;
-+
-+}
-+#endif
-+
-+/* GetEquivalentObject dereferences any hard links to get to the
-+ * actual object.
-+ */
-+
-+yaffs_Object *yaffs_GetEquivalentObject(yaffs_Object * obj)
-+{
-+ if (obj && obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
-+ /* We want the object id of the equivalent object, not this one */
-+ obj = obj->variant.hardLinkVariant.equivalentObject;
-+ }
-+ return obj;
-+
-+}
-+
-+int yaffs_GetObjectName(yaffs_Object * obj, YCHAR * name, int buffSize)
-+{
-+ memset(name, 0, buffSize * sizeof(YCHAR));
-+
-+ yaffs_CheckObjectDetailsLoaded(obj);
-+
-+ if (obj->objectId == YAFFS_OBJECTID_LOSTNFOUND) {
-+ yaffs_strncpy(name, YAFFS_LOSTNFOUND_NAME, buffSize - 1);
-+ } else if (obj->chunkId <= 0) {
-+ YCHAR locName[20];
-+ /* make up a name */
-+ yaffs_sprintf(locName, _Y("%s%d"), YAFFS_LOSTNFOUND_PREFIX,
-+ obj->objectId);
-+ yaffs_strncpy(name, locName, buffSize - 1);
-+
-+ }
-+#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
-+ else if (obj->shortName[0]) {
-+ yaffs_strcpy(name, obj->shortName);
-+ }
-+#endif
-+ else {
-+ int result;
-+ __u8 *buffer = yaffs_GetTempBuffer(obj->myDev, __LINE__);
-+
-+ yaffs_ObjectHeader *oh = (yaffs_ObjectHeader *) buffer;
-+
-+ memset(buffer, 0, obj->myDev->nDataBytesPerChunk);
-+
-+ if (obj->chunkId >= 0) {
-+ result = yaffs_ReadChunkWithTagsFromNAND(obj->myDev,
-+ obj->chunkId, buffer,
-+ NULL);
-+ }
-+ yaffs_strncpy(name, oh->name, buffSize - 1);
-+
-+ yaffs_ReleaseTempBuffer(obj->myDev, buffer, __LINE__);
-+ }
-+
-+ return yaffs_strlen(name);
-+}
-+
-+int yaffs_GetObjectFileLength(yaffs_Object * obj)
-+{
-+
-+ /* Dereference any hard linking */
-+ obj = yaffs_GetEquivalentObject(obj);
-+
-+ if (obj->variantType == YAFFS_OBJECT_TYPE_FILE) {
-+ return obj->variant.fileVariant.fileSize;
-+ }
-+ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) {
-+ return yaffs_strlen(obj->variant.symLinkVariant.alias);
-+ } else {
-+ /* Only a directory should drop through to here */
-+ return obj->myDev->nDataBytesPerChunk;
-+ }
-+}
-+
-+int yaffs_GetObjectLinkCount(yaffs_Object * obj)
-+{
-+ int count = 0;
-+ struct list_head *i;
-+
-+ if (!obj->unlinked) {
-+ count++; /* the object itself */
-+ }
-+ list_for_each(i, &obj->hardLinks) {
-+ count++; /* add the hard links; */
-+ }
-+ return count;
-+
-+}
-+
-+int yaffs_GetObjectInode(yaffs_Object * obj)
-+{
-+ obj = yaffs_GetEquivalentObject(obj);
-+
-+ return obj->objectId;
-+}
-+
-+unsigned yaffs_GetObjectType(yaffs_Object * obj)
-+{
-+ obj = yaffs_GetEquivalentObject(obj);
-+
-+ switch (obj->variantType) {
-+ case YAFFS_OBJECT_TYPE_FILE:
-+ return DT_REG;
-+ break;
-+ case YAFFS_OBJECT_TYPE_DIRECTORY:
-+ return DT_DIR;
-+ break;
-+ case YAFFS_OBJECT_TYPE_SYMLINK:
-+ return DT_LNK;
-+ break;
-+ case YAFFS_OBJECT_TYPE_HARDLINK:
-+ return DT_REG;
-+ break;
-+ case YAFFS_OBJECT_TYPE_SPECIAL:
-+ if (S_ISFIFO(obj->yst_mode))
-+ return DT_FIFO;
-+ if (S_ISCHR(obj->yst_mode))
-+ return DT_CHR;
-+ if (S_ISBLK(obj->yst_mode))
-+ return DT_BLK;
-+ if (S_ISSOCK(obj->yst_mode))
-+ return DT_SOCK;
-+ default:
-+ return DT_REG;
-+ break;
-+ }
-+}
-+
-+YCHAR *yaffs_GetSymlinkAlias(yaffs_Object * obj)
-+{
-+ obj = yaffs_GetEquivalentObject(obj);
-+ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) {
-+ return yaffs_CloneString(obj->variant.symLinkVariant.alias);
-+ } else {
-+ return yaffs_CloneString(_Y(""));
-+ }
-+}
-+
-+#ifndef CONFIG_YAFFS_WINCE
-+
-+int yaffs_SetAttributes(yaffs_Object * obj, struct iattr *attr)
-+{
-+ unsigned int valid = attr->ia_valid;
-+
-+ if (valid & ATTR_MODE)
-+ obj->yst_mode = attr->ia_mode;
-+ if (valid & ATTR_UID)
-+ obj->yst_uid = attr->ia_uid;
-+ if (valid & ATTR_GID)
-+ obj->yst_gid = attr->ia_gid;
-+
-+ if (valid & ATTR_ATIME)
-+ obj->yst_atime = Y_TIME_CONVERT(attr->ia_atime);
-+ if (valid & ATTR_CTIME)
-+ obj->yst_ctime = Y_TIME_CONVERT(attr->ia_ctime);
-+ if (valid & ATTR_MTIME)
-+ obj->yst_mtime = Y_TIME_CONVERT(attr->ia_mtime);
-+
-+ if (valid & ATTR_SIZE)
-+ yaffs_ResizeFile(obj, attr->ia_size);
-+
-+ yaffs_UpdateObjectHeader(obj, NULL, 1, 0, 0);
-+
-+ return YAFFS_OK;
-+
-+}
-+int yaffs_GetAttributes(yaffs_Object * obj, struct iattr *attr)
-+{
-+ unsigned int valid = 0;
-+
-+ attr->ia_mode = obj->yst_mode;
-+ valid |= ATTR_MODE;
-+ attr->ia_uid = obj->yst_uid;
-+ valid |= ATTR_UID;
-+ attr->ia_gid = obj->yst_gid;
-+ valid |= ATTR_GID;
-+
-+ Y_TIME_CONVERT(attr->ia_atime) = obj->yst_atime;
-+ valid |= ATTR_ATIME;
-+ Y_TIME_CONVERT(attr->ia_ctime) = obj->yst_ctime;
-+ valid |= ATTR_CTIME;
-+ Y_TIME_CONVERT(attr->ia_mtime) = obj->yst_mtime;
-+ valid |= ATTR_MTIME;
-+
-+ attr->ia_size = yaffs_GetFileSize(obj);
-+ valid |= ATTR_SIZE;
-+
-+ attr->ia_valid = valid;
-+
-+ return YAFFS_OK;
-+
-+}
-+
-+#endif
-+
-+#if 0
-+int yaffs_DumpObject(yaffs_Object * obj)
-+{
-+ YCHAR name[257];
-+
-+ yaffs_GetObjectName(obj, name, 256);
-+
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("Object %d, inode %d \"%s\"\n dirty %d valid %d serial %d sum %d"
-+ " chunk %d type %d size %d\n"
-+ TENDSTR), obj->objectId, yaffs_GetObjectInode(obj), name,
-+ obj->dirty, obj->valid, obj->serial, obj->sum, obj->chunkId,
-+ yaffs_GetObjectType(obj), yaffs_GetObjectFileLength(obj)));
-+
-+ return YAFFS_OK;
-+}
-+#endif
-+
-+/*---------------------------- Initialisation code -------------------------------------- */
-+
-+static int yaffs_CheckDevFunctions(const yaffs_Device * dev)
-+{
-+
-+ /* Common functions, gotta have */
-+ if (!dev->eraseBlockInNAND || !dev->initialiseNAND)
-+ return 0;
-+
-+#ifdef CONFIG_YAFFS_YAFFS2
-+
-+ /* Can use the "with tags" style interface for yaffs1 or yaffs2 */
-+ if (dev->writeChunkWithTagsToNAND &&
-+ dev->readChunkWithTagsFromNAND &&
-+ !dev->writeChunkToNAND &&
-+ !dev->readChunkFromNAND &&
-+ dev->markNANDBlockBad && dev->queryNANDBlock)
-+ return 1;
-+#endif
-+
-+ /* Can use the "spare" style interface for yaffs1 */
-+ if (!dev->isYaffs2 &&
-+ !dev->writeChunkWithTagsToNAND &&
-+ !dev->readChunkWithTagsFromNAND &&
-+ dev->writeChunkToNAND &&
-+ dev->readChunkFromNAND &&
-+ !dev->markNANDBlockBad && !dev->queryNANDBlock)
-+ return 1;
-+
-+ return 0; /* bad */
-+}
-+
-+
-+static void yaffs_CreateInitialDirectories(yaffs_Device *dev)
-+{
-+ /* Initialise the unlinked, deleted, root and lost and found directories */
-+
-+ dev->lostNFoundDir = dev->rootDir = NULL;
-+ dev->unlinkedDir = dev->deletedDir = NULL;
-+
-+ dev->unlinkedDir =
-+ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_UNLINKED, S_IFDIR);
-+ dev->deletedDir =
-+ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_DELETED, S_IFDIR);
-+
-+ dev->rootDir =
-+ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_ROOT,
-+ YAFFS_ROOT_MODE | S_IFDIR);
-+ dev->lostNFoundDir =
-+ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_LOSTNFOUND,
-+ YAFFS_LOSTNFOUND_MODE | S_IFDIR);
-+ yaffs_AddObjectToDirectory(dev->rootDir, dev->lostNFoundDir);
-+}
-+
-+int yaffs_GutsInitialise(yaffs_Device * dev)
-+{
-+ unsigned x;
-+ int bits;
-+
-+ T(YAFFS_TRACE_TRACING, (TSTR("yaffs: yaffs_GutsInitialise()" TENDSTR)));
-+
-+ /* Check stuff that must be set */
-+
-+ if (!dev) {
-+ T(YAFFS_TRACE_ALWAYS, (TSTR("yaffs: Need a device" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ dev->internalStartBlock = dev->startBlock;
-+ dev->internalEndBlock = dev->endBlock;
-+ dev->blockOffset = 0;
-+ dev->chunkOffset = 0;
-+ dev->nFreeChunks = 0;
-+
-+ if (dev->startBlock == 0) {
-+ dev->internalStartBlock = dev->startBlock + 1;
-+ dev->internalEndBlock = dev->endBlock + 1;
-+ dev->blockOffset = 1;
-+ dev->chunkOffset = dev->nChunksPerBlock;
-+ }
-+
-+ /* Check geometry parameters. */
-+
-+ if ((dev->isYaffs2 && dev->nDataBytesPerChunk < 1024) ||
-+ (!dev->isYaffs2 && dev->nDataBytesPerChunk != 512) ||
-+ dev->nChunksPerBlock < 2 ||
-+ dev->nReservedBlocks < 2 ||
-+ dev->internalStartBlock <= 0 ||
-+ dev->internalEndBlock <= 0 ||
-+ dev->internalEndBlock <= (dev->internalStartBlock + dev->nReservedBlocks + 2) // otherwise it is too small
-+ ) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("yaffs: NAND geometry problems: chunk size %d, type is yaffs%s "
-+ TENDSTR), dev->nDataBytesPerChunk, dev->isYaffs2 ? "2" : ""));
-+ return YAFFS_FAIL;
-+ }
-+
-+ if (yaffs_InitialiseNAND(dev) != YAFFS_OK) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: InitialiseNAND failed" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* Got the right mix of functions? */
-+ if (!yaffs_CheckDevFunctions(dev)) {
-+ /* Function missing */
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR
-+ ("yaffs: device function(s) missing or wrong\n" TENDSTR)));
-+
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* This is really a compilation check. */
-+ if (!yaffs_CheckStructures()) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs_CheckStructures failed\n" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ if (dev->isMounted) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: device already mounted\n" TENDSTR)));
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* Finished with most checks. One or two more checks happen later on too. */
-+
-+ dev->isMounted = 1;
-+
-+
-+
-+ /* OK now calculate a few things for the device */
-+
-+ /*
-+ * Calculate all the chunk size manipulation numbers:
-+ */
-+ /* Start off assuming it is a power of 2 */
-+ dev->chunkShift = ShiftDiv(dev->nDataBytesPerChunk);
-+ dev->chunkMask = (1<<dev->chunkShift) - 1;
-+
-+ if(dev->nDataBytesPerChunk == (dev->chunkMask + 1)){
-+ /* Yes it is a power of 2, disable crumbs */
-+ dev->crumbMask = 0;
-+ dev->crumbShift = 0;
-+ dev->crumbsPerChunk = 0;
-+ } else {
-+ /* Not a power of 2, use crumbs instead */
-+ dev->crumbShift = ShiftDiv(sizeof(yaffs_PackedTags2TagsPart));
-+ dev->crumbMask = (1<<dev->crumbShift)-1;
-+ dev->crumbsPerChunk = dev->nDataBytesPerChunk/(1 << dev->crumbShift);
-+ dev->chunkShift = 0;
-+ dev->chunkMask = 0;
-+ }
-+
-+
-+ /*
-+ * Calculate chunkGroupBits.
-+ * We need to find the next power of 2 > than internalEndBlock
-+ */
-+
-+ x = dev->nChunksPerBlock * (dev->internalEndBlock + 1);
-+
-+ bits = ShiftsGE(x);
-+
-+ /* Set up tnode width if wide tnodes are enabled. */
-+ if(!dev->wideTnodesDisabled){
-+ /* bits must be even so that we end up with 32-bit words */
-+ if(bits & 1)
-+ bits++;
-+ if(bits < 16)
-+ dev->tnodeWidth = 16;
-+ else
-+ dev->tnodeWidth = bits;
-+ }
-+ else
-+ dev->tnodeWidth = 16;
-+
-+ dev->tnodeMask = (1<<dev->tnodeWidth)-1;
-+
-+ /* Level0 Tnodes are 16 bits or wider (if wide tnodes are enabled),
-+ * so if the bitwidth of the
-+ * chunk range we're using is greater than 16 we need
-+ * to figure out chunk shift and chunkGroupSize
-+ */
-+
-+ if (bits <= dev->tnodeWidth)
-+ dev->chunkGroupBits = 0;
-+ else
-+ dev->chunkGroupBits = bits - dev->tnodeWidth;
-+
-+
-+ dev->chunkGroupSize = 1 << dev->chunkGroupBits;
-+
-+ if (dev->nChunksPerBlock < dev->chunkGroupSize) {
-+ /* We have a problem because the soft delete won't work if
-+ * the chunk group size > chunks per block.
-+ * This can be remedied by using larger "virtual blocks".
-+ */
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("yaffs: chunk group too large\n" TENDSTR)));
-+
-+ return YAFFS_FAIL;
-+ }
-+
-+ /* OK, we've finished verifying the device, lets continue with initialisation */
-+
-+ /* More device initialisation */
-+ dev->garbageCollections = 0;
-+ dev->passiveGarbageCollections = 0;
-+ dev->currentDirtyChecker = 0;
-+ dev->bufferedBlock = -1;
-+ dev->doingBufferedBlockRewrite = 0;
-+ dev->nDeletedFiles = 0;
-+ dev->nBackgroundDeletions = 0;
-+ dev->nUnlinkedFiles = 0;
-+ dev->eccFixed = 0;
-+ dev->eccUnfixed = 0;
-+ dev->tagsEccFixed = 0;
-+ dev->tagsEccUnfixed = 0;
-+ dev->nErasureFailures = 0;
-+ dev->nErasedBlocks = 0;
-+ dev->isDoingGC = 0;
-+ dev->hasPendingPrioritisedGCs = 1; /* Assume the worst for now, will get fixed on first GC */
-+
-+ /* Initialise temporary buffers and caches. */
-+ {
-+ int i;
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ dev->tempBuffer[i].line = 0; /* not in use */
-+ dev->tempBuffer[i].buffer =
-+ YMALLOC_DMA(dev->nDataBytesPerChunk);
-+ }
-+ }
-+
-+ if (dev->nShortOpCaches > 0) {
-+ int i;
-+
-+ if (dev->nShortOpCaches > YAFFS_MAX_SHORT_OP_CACHES) {
-+ dev->nShortOpCaches = YAFFS_MAX_SHORT_OP_CACHES;
-+ }
-+
-+ dev->srCache =
-+ YMALLOC(dev->nShortOpCaches * sizeof(yaffs_ChunkCache));
-+
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ dev->srCache[i].object = NULL;
-+ dev->srCache[i].lastUse = 0;
-+ dev->srCache[i].dirty = 0;
-+ dev->srCache[i].data = YMALLOC_DMA(dev->nDataBytesPerChunk);
-+ }
-+ dev->srLastUse = 0;
-+ }
-+
-+ dev->cacheHits = 0;
-+
-+ dev->gcCleanupList = YMALLOC(dev->nChunksPerBlock * sizeof(__u32));
-+
-+ if (dev->isYaffs2) {
-+ dev->useHeaderFileSize = 1;
-+ }
-+
-+ yaffs_InitialiseBlocks(dev);
-+ yaffs_InitialiseTnodes(dev);
-+ yaffs_InitialiseObjects(dev);
-+
-+ yaffs_CreateInitialDirectories(dev);
-+
-+
-+ /* Now scan the flash. */
-+ if (dev->isYaffs2) {
-+ if(yaffs_CheckpointRestore(dev)) {
-+ T(YAFFS_TRACE_CHECKPOINT,
-+ (TSTR("yaffs: restored from checkpoint" TENDSTR)));
-+ } else {
-+
-+ /* Clean up the mess caused by an aborted checkpoint load
-+ * and scan backwards.
-+ */
-+ yaffs_DeinitialiseBlocks(dev);
-+ yaffs_DeinitialiseTnodes(dev);
-+ yaffs_DeinitialiseObjects(dev);
-+ yaffs_InitialiseBlocks(dev);
-+ yaffs_InitialiseTnodes(dev);
-+ yaffs_InitialiseObjects(dev);
-+ yaffs_CreateInitialDirectories(dev);
-+
-+ yaffs_ScanBackwards(dev);
-+ }
-+ }else
-+ yaffs_Scan(dev);
-+
-+ /* Zero out stats */
-+ dev->nPageReads = 0;
-+ dev->nPageWrites = 0;
-+ dev->nBlockErasures = 0;
-+ dev->nGCCopies = 0;
-+ dev->nRetriedWrites = 0;
-+
-+ dev->nRetiredBlocks = 0;
-+
-+ yaffs_VerifyFreeChunks(dev);
-+
-+ T(YAFFS_TRACE_TRACING,
-+ (TSTR("yaffs: yaffs_GutsInitialise() done.\n" TENDSTR)));
-+ return YAFFS_OK;
-+
-+}
-+
-+void yaffs_Deinitialise(yaffs_Device * dev)
-+{
-+ if (dev->isMounted) {
-+ int i;
-+
-+ yaffs_DeinitialiseBlocks(dev);
-+ yaffs_DeinitialiseTnodes(dev);
-+ yaffs_DeinitialiseObjects(dev);
-+ if (dev->nShortOpCaches > 0) {
-+
-+ for (i = 0; i < dev->nShortOpCaches; i++) {
-+ YFREE(dev->srCache[i].data);
-+ }
-+
-+ YFREE(dev->srCache);
-+ }
-+
-+ YFREE(dev->gcCleanupList);
-+
-+ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
-+ YFREE(dev->tempBuffer[i].buffer);
-+ }
-+
-+ dev->isMounted = 0;
-+ }
-+
-+}
-+
-+static int yaffs_CountFreeChunks(yaffs_Device * dev)
-+{
-+ int nFree;
-+ int b;
-+
-+ yaffs_BlockInfo *blk;
-+
-+ for (nFree = 0, b = dev->internalStartBlock; b <= dev->internalEndBlock;
-+ b++) {
-+ blk = yaffs_GetBlockInfo(dev, b);
-+
-+ switch (blk->blockState) {
-+ case YAFFS_BLOCK_STATE_EMPTY:
-+ case YAFFS_BLOCK_STATE_ALLOCATING:
-+ case YAFFS_BLOCK_STATE_COLLECTING:
-+ case YAFFS_BLOCK_STATE_FULL:
-+ nFree +=
-+ (dev->nChunksPerBlock - blk->pagesInUse +
-+ blk->softDeletions);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ }
-+
-+ return nFree;
-+}
-+
-+int yaffs_GetNumberOfFreeChunks(yaffs_Device * dev)
-+{
-+ /* This is what we report to the outside world */
-+
-+ int nFree;
-+ int nDirtyCacheChunks;
-+ int blocksForCheckpoint;
-+
-+#if 1
-+ nFree = dev->nFreeChunks;
-+#else
-+ nFree = yaffs_CountFreeChunks(dev);
-+#endif
-+
-+ nFree += dev->nDeletedFiles;
-+
-+ /* Now count the number of dirty chunks in the cache and subtract those */
-+
-+ {
-+ int i;
-+ for (nDirtyCacheChunks = 0, i = 0; i < dev->nShortOpCaches; i++) {
-+ if (dev->srCache[i].dirty)
-+ nDirtyCacheChunks++;
-+ }
-+ }
-+
-+ nFree -= nDirtyCacheChunks;
-+
-+ nFree -= ((dev->nReservedBlocks + 1) * dev->nChunksPerBlock);
-+
-+ /* Now we figure out how much to reserve for the checkpoint and report that... */
-+ blocksForCheckpoint = dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint;
-+ if(blocksForCheckpoint < 0)
-+ blocksForCheckpoint = 0;
-+
-+ nFree -= (blocksForCheckpoint * dev->nChunksPerBlock);
-+
-+ if (nFree < 0)
-+ nFree = 0;
-+
-+ return nFree;
-+
-+}
-+
-+static int yaffs_freeVerificationFailures;
-+
-+static void yaffs_VerifyFreeChunks(yaffs_Device * dev)
-+{
-+ int counted = yaffs_CountFreeChunks(dev);
-+
-+ int difference = dev->nFreeChunks - counted;
-+
-+ if (difference) {
-+ T(YAFFS_TRACE_ALWAYS,
-+ (TSTR("Freechunks verification failure %d %d %d" TENDSTR),
-+ dev->nFreeChunks, counted, difference));
-+ yaffs_freeVerificationFailures++;
-+ }
-+}
-+
-+/*---------------------------------------- YAFFS test code ----------------------*/
-+
-+#define yaffs_CheckStruct(structure,syze, name) \
-+ if(sizeof(structure) != syze) \
-+ { \
-+ T(YAFFS_TRACE_ALWAYS,(TSTR("%s should be %d but is %d\n" TENDSTR),\
-+ name,syze,sizeof(structure))); \
-+ return YAFFS_FAIL; \
-+ }
-+
-+static int yaffs_CheckStructures(void)
-+{
-+/* yaffs_CheckStruct(yaffs_Tags,8,"yaffs_Tags") */
-+/* yaffs_CheckStruct(yaffs_TagsUnion,8,"yaffs_TagsUnion") */
-+/* yaffs_CheckStruct(yaffs_Spare,16,"yaffs_Spare") */
-+#ifndef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ yaffs_CheckStruct(yaffs_Tnode, 2 * YAFFS_NTNODES_LEVEL0, "yaffs_Tnode")
-+#endif
-+ yaffs_CheckStruct(yaffs_ObjectHeader, 512, "yaffs_ObjectHeader")
-+
-+ return YAFFS_OK;
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_guts.h linux.dev/fs/yaffs2/yaffs_guts.h
---- linux.old/fs/yaffs2/yaffs_guts.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_guts.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,893 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_guts.h: Configuration etc for yaffs_guts
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ * $Id: yaffs_guts.h,v 1.25 2006/10/13 08:52:49 charles Exp $
-+ */
-+
-+#ifndef __YAFFS_GUTS_H__
-+#define __YAFFS_GUTS_H__
-+
-+#include "devextras.h"
-+#include "yportenv.h"
-+
-+#define YAFFS_OK 1
-+#define YAFFS_FAIL 0
-+
-+/* Give us a Y=0x59,
-+ * Give us an A=0x41,
-+ * Give us an FF=0xFF
-+ * Give us an S=0x53
-+ * And what have we got...
-+ */
-+#define YAFFS_MAGIC 0x5941FF53
-+
-+#define YAFFS_NTNODES_LEVEL0 16
-+#define YAFFS_TNODES_LEVEL0_BITS 4
-+#define YAFFS_TNODES_LEVEL0_MASK 0xf
-+
-+#define YAFFS_NTNODES_INTERNAL (YAFFS_NTNODES_LEVEL0 / 2)
-+#define YAFFS_TNODES_INTERNAL_BITS (YAFFS_TNODES_LEVEL0_BITS - 1)
-+#define YAFFS_TNODES_INTERNAL_MASK 0x7
-+#define YAFFS_TNODES_MAX_LEVEL 6
-+
-+#ifndef CONFIG_YAFFS_NO_YAFFS1
-+#define YAFFS_BYTES_PER_SPARE 16
-+#define YAFFS_BYTES_PER_CHUNK 512
-+#define YAFFS_CHUNK_SIZE_SHIFT 9
-+#define YAFFS_CHUNKS_PER_BLOCK 32
-+#define YAFFS_BYTES_PER_BLOCK (YAFFS_CHUNKS_PER_BLOCK*YAFFS_BYTES_PER_CHUNK)
-+#endif
-+
-+#define YAFFS_MIN_YAFFS2_CHUNK_SIZE 1024
-+#define YAFFS_MIN_YAFFS2_SPARE_SIZE 32
-+
-+#define YAFFS_MAX_CHUNK_ID 0x000FFFFF
-+
-+#define YAFFS_UNUSED_OBJECT_ID 0x0003FFFF
-+
-+#define YAFFS_ALLOCATION_NOBJECTS 100
-+#define YAFFS_ALLOCATION_NTNODES 100
-+#define YAFFS_ALLOCATION_NLINKS 100
-+
-+#define YAFFS_NOBJECT_BUCKETS 256
-+
-+
-+#define YAFFS_OBJECT_SPACE 0x40000
-+
-+#define YAFFS_NCHECKPOINT_OBJECTS 5000
-+
-+#define YAFFS_CHECKPOINT_VERSION 2
-+
-+#ifdef CONFIG_YAFFS_UNICODE
-+#define YAFFS_MAX_NAME_LENGTH 127
-+#define YAFFS_MAX_ALIAS_LENGTH 79
-+#else
-+#define YAFFS_MAX_NAME_LENGTH 255
-+#define YAFFS_MAX_ALIAS_LENGTH 159
-+#endif
-+
-+#define YAFFS_SHORT_NAME_LENGTH 15
-+
-+/* Some special object ids for pseudo objects */
-+#define YAFFS_OBJECTID_ROOT 1
-+#define YAFFS_OBJECTID_LOSTNFOUND 2
-+#define YAFFS_OBJECTID_UNLINKED 3
-+#define YAFFS_OBJECTID_DELETED 4
-+
-+/* Sseudo object ids for checkpointing */
-+#define YAFFS_OBJECTID_SB_HEADER 0x10
-+#define YAFFS_OBJECTID_CHECKPOINT_DATA 0x20
-+#define YAFFS_SEQUENCE_CHECKPOINT_DATA 0x21
-+
-+/* */
-+
-+#define YAFFS_MAX_SHORT_OP_CACHES 20
-+
-+#define YAFFS_N_TEMP_BUFFERS 4
-+
-+/* Sequence numbers are used in YAFFS2 to determine block allocation order.
-+ * The range is limited slightly to help distinguish bad numbers from good.
-+ * This also allows us to perhaps in the future use special numbers for
-+ * special purposes.
-+ * EFFFFF00 allows the allocation of 8 blocks per second (~1Mbytes) for 15 years,
-+ * and is a larger number than the lifetime of a 2GB device.
-+ */
-+#define YAFFS_LOWEST_SEQUENCE_NUMBER 0x00001000
-+#define YAFFS_HIGHEST_SEQUENCE_NUMBER 0xEFFFFF00
-+
-+/* ChunkCache is used for short read/write operations.*/
-+typedef struct {
-+ struct yaffs_ObjectStruct *object;
-+ int chunkId;
-+ int lastUse;
-+ int dirty;
-+ int nBytes; /* Only valid if the cache is dirty */
-+ int locked; /* Can't push out or flush while locked. */
-+#ifdef CONFIG_YAFFS_YAFFS2
-+ __u8 *data;
-+#else
-+ __u8 data[YAFFS_BYTES_PER_CHUNK];
-+#endif
-+} yaffs_ChunkCache;
-+
-+
-+
-+/* Tags structures in RAM
-+ * NB This uses bitfield. Bitfields should not straddle a u32 boundary otherwise
-+ * the structure size will get blown out.
-+ */
-+
-+#ifndef CONFIG_YAFFS_NO_YAFFS1
-+typedef struct {
-+ unsigned chunkId:20;
-+ unsigned serialNumber:2;
-+ unsigned byteCount:10;
-+ unsigned objectId:18;
-+ unsigned ecc:12;
-+ unsigned unusedStuff:2;
-+
-+} yaffs_Tags;
-+
-+typedef union {
-+ yaffs_Tags asTags;
-+ __u8 asBytes[8];
-+} yaffs_TagsUnion;
-+
-+#endif
-+
-+/* Stuff used for extended tags in YAFFS2 */
-+
-+typedef enum {
-+ YAFFS_ECC_RESULT_UNKNOWN,
-+ YAFFS_ECC_RESULT_NO_ERROR,
-+ YAFFS_ECC_RESULT_FIXED,
-+ YAFFS_ECC_RESULT_UNFIXED
-+} yaffs_ECCResult;
-+
-+typedef enum {
-+ YAFFS_OBJECT_TYPE_UNKNOWN,
-+ YAFFS_OBJECT_TYPE_FILE,
-+ YAFFS_OBJECT_TYPE_SYMLINK,
-+ YAFFS_OBJECT_TYPE_DIRECTORY,
-+ YAFFS_OBJECT_TYPE_HARDLINK,
-+ YAFFS_OBJECT_TYPE_SPECIAL
-+} yaffs_ObjectType;
-+
-+typedef struct {
-+
-+ unsigned validMarker0;
-+ unsigned chunkUsed; /* Status of the chunk: used or unused */
-+ unsigned objectId; /* If 0 then this is not part of an object (unused) */
-+ unsigned chunkId; /* If 0 then this is a header, else a data chunk */
-+ unsigned byteCount; /* Only valid for data chunks */
-+
-+ /* The following stuff only has meaning when we read */
-+ yaffs_ECCResult eccResult;
-+ unsigned blockBad;
-+
-+ /* YAFFS 1 stuff */
-+ unsigned chunkDeleted; /* The chunk is marked deleted */
-+ unsigned serialNumber; /* Yaffs1 2-bit serial number */
-+
-+ /* YAFFS2 stuff */
-+ unsigned sequenceNumber; /* The sequence number of this block */
-+
-+ /* Extra info if this is an object header (YAFFS2 only) */
-+
-+ unsigned extraHeaderInfoAvailable; /* There is extra info available if this is not zero */
-+ unsigned extraParentObjectId; /* The parent object */
-+ unsigned extraIsShrinkHeader; /* Is it a shrink header? */
-+ unsigned extraShadows; /* Does this shadow another object? */
-+
-+ yaffs_ObjectType extraObjectType; /* What object type? */
-+
-+ unsigned extraFileLength; /* Length if it is a file */
-+ unsigned extraEquivalentObjectId; /* Equivalent object Id if it is a hard link */
-+
-+ unsigned validMarker1;
-+
-+} yaffs_ExtendedTags;
-+
-+/* Spare structure for YAFFS1 */
-+typedef struct {
-+ __u8 tagByte0;
-+ __u8 tagByte1;
-+ __u8 tagByte2;
-+ __u8 tagByte3;
-+ __u8 pageStatus; /* set to 0 to delete the chunk */
-+ __u8 blockStatus;
-+ __u8 tagByte4;
-+ __u8 tagByte5;
-+ __u8 ecc1[3];
-+ __u8 tagByte6;
-+ __u8 tagByte7;
-+ __u8 ecc2[3];
-+} yaffs_Spare;
-+
-+/*Special structure for passing through to mtd */
-+struct yaffs_NANDSpare {
-+ yaffs_Spare spare;
-+ int eccres1;
-+ int eccres2;
-+};
-+
-+/* Block data in RAM */
-+
-+typedef enum {
-+ YAFFS_BLOCK_STATE_UNKNOWN = 0,
-+
-+ YAFFS_BLOCK_STATE_SCANNING,
-+ YAFFS_BLOCK_STATE_NEEDS_SCANNING,
-+ /* The block might have something on it (ie it is allocating or full, perhaps empty)
-+ * but it needs to be scanned to determine its true state.
-+ * This state is only valid during yaffs_Scan.
-+ * NB We tolerate empty because the pre-scanner might be incapable of deciding
-+ * However, if this state is returned on a YAFFS2 device, then we expect a sequence number
-+ */
-+
-+ YAFFS_BLOCK_STATE_EMPTY,
-+ /* This block is empty */
-+
-+ YAFFS_BLOCK_STATE_ALLOCATING,
-+ /* This block is partially allocated.
-+ * At least one page holds valid data.
-+ * This is the one currently being used for page
-+ * allocation. Should never be more than one of these
-+ */
-+
-+ YAFFS_BLOCK_STATE_FULL,
-+ /* All the pages in this block have been allocated.
-+ */
-+
-+ YAFFS_BLOCK_STATE_DIRTY,
-+ /* All pages have been allocated and deleted.
-+ * Erase me, reuse me.
-+ */
-+
-+ YAFFS_BLOCK_STATE_CHECKPOINT,
-+ /* This block is assigned to holding checkpoint data.
-+ */
-+
-+ YAFFS_BLOCK_STATE_COLLECTING,
-+ /* This block is being garbage collected */
-+
-+ YAFFS_BLOCK_STATE_DEAD
-+ /* This block has failed and is not in use */
-+} yaffs_BlockState;
-+
-+typedef struct {
-+
-+ int softDeletions:10; /* number of soft deleted pages */
-+ int pagesInUse:10; /* number of pages in use */
-+ yaffs_BlockState blockState:4; /* One of the above block states */
-+ __u32 needsRetiring:1; /* Data has failed on this block, need to get valid data off */
-+ /* and retire the block. */
-+ __u32 skipErasedCheck: 1; /* If this is set we can skip the erased check on this block */
-+ __u32 gcPrioritise: 1; /* An ECC check or bank check has failed on this block.
-+ It should be prioritised for GC */
-+ __u32 chunkErrorStrikes:3; /* How many times we've had ecc etc failures on this block and tried to reuse it */
-+
-+#ifdef CONFIG_YAFFS_YAFFS2
-+ __u32 hasShrinkHeader:1; /* This block has at least one shrink object header */
-+ __u32 sequenceNumber; /* block sequence number for yaffs2 */
-+#endif
-+
-+} yaffs_BlockInfo;
-+
-+/* -------------------------- Object structure -------------------------------*/
-+/* This is the object structure as stored on NAND */
-+
-+typedef struct {
-+ yaffs_ObjectType type;
-+
-+ /* Apply to everything */
-+ int parentObjectId;
-+ __u16 sum__NoLongerUsed; /* checksum of name. No longer used */
-+ YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
-+
-+ /* Thes following apply to directories, files, symlinks - not hard links */
-+ __u32 yst_mode; /* protection */
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ __u32 notForWinCE[5];
-+#else
-+ __u32 yst_uid;
-+ __u32 yst_gid;
-+ __u32 yst_atime;
-+ __u32 yst_mtime;
-+ __u32 yst_ctime;
-+#endif
-+
-+ /* File size applies to files only */
-+ int fileSize;
-+
-+ /* Equivalent object id applies to hard links only. */
-+ int equivalentObjectId;
-+
-+ /* Alias is for symlinks only. */
-+ YCHAR alias[YAFFS_MAX_ALIAS_LENGTH + 1];
-+
-+ __u32 yst_rdev; /* device stuff for block and char devices (major/min) */
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ __u32 win_ctime[2];
-+ __u32 win_atime[2];
-+ __u32 win_mtime[2];
-+ __u32 roomToGrow[4];
-+#else
-+ __u32 roomToGrow[10];
-+#endif
-+
-+ int shadowsObject; /* This object header shadows the specified object if > 0 */
-+
-+ /* isShrink applies to object headers written when we shrink the file (ie resize) */
-+ __u32 isShrink;
-+
-+} yaffs_ObjectHeader;
-+
-+/*--------------------------- Tnode -------------------------- */
-+
-+union yaffs_Tnode_union {
-+#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
-+ union yaffs_Tnode_union *internal[YAFFS_NTNODES_INTERNAL + 1];
-+#else
-+ union yaffs_Tnode_union *internal[YAFFS_NTNODES_INTERNAL];
-+#endif
-+/* __u16 level0[YAFFS_NTNODES_LEVEL0]; */
-+
-+};
-+
-+typedef union yaffs_Tnode_union yaffs_Tnode;
-+
-+struct yaffs_TnodeList_struct {
-+ struct yaffs_TnodeList_struct *next;
-+ yaffs_Tnode *tnodes;
-+};
-+
-+typedef struct yaffs_TnodeList_struct yaffs_TnodeList;
-+
-+/*------------------------ Object -----------------------------*/
-+/* An object can be one of:
-+ * - a directory (no data, has children links
-+ * - a regular file (data.... not prunes :->).
-+ * - a symlink [symbolic link] (the alias).
-+ * - a hard link
-+ */
-+
-+typedef struct {
-+ __u32 fileSize;
-+ __u32 scannedFileSize;
-+ __u32 shrinkSize;
-+ int topLevel;
-+ yaffs_Tnode *top;
-+} yaffs_FileStructure;
-+
-+typedef struct {
-+ struct list_head children; /* list of child links */
-+} yaffs_DirectoryStructure;
-+
-+typedef struct {
-+ YCHAR *alias;
-+} yaffs_SymLinkStructure;
-+
-+typedef struct {
-+ struct yaffs_ObjectStruct *equivalentObject;
-+ __u32 equivalentObjectId;
-+} yaffs_HardLinkStructure;
-+
-+typedef union {
-+ yaffs_FileStructure fileVariant;
-+ yaffs_DirectoryStructure directoryVariant;
-+ yaffs_SymLinkStructure symLinkVariant;
-+ yaffs_HardLinkStructure hardLinkVariant;
-+} yaffs_ObjectVariant;
-+
-+struct yaffs_ObjectStruct {
-+ __u8 deleted:1; /* This should only apply to unlinked files. */
-+ __u8 softDeleted:1; /* it has also been soft deleted */
-+ __u8 unlinked:1; /* An unlinked file. The file should be in the unlinked directory.*/
-+ __u8 fake:1; /* A fake object has no presence on NAND. */
-+ __u8 renameAllowed:1; /* Some objects are not allowed to be renamed. */
-+ __u8 unlinkAllowed:1;
-+ __u8 dirty:1; /* the object needs to be written to flash */
-+ __u8 valid:1; /* When the file system is being loaded up, this
-+ * object might be created before the data
-+ * is available (ie. file data records appear before the header).
-+ */
-+ __u8 lazyLoaded:1; /* This object has been lazy loaded and is missing some detail */
-+
-+ __u8 deferedFree:1; /* For Linux kernel. Object is removed from NAND, but is
-+ * still in the inode cache. Free of object is defered.
-+ * until the inode is released.
-+ */
-+
-+ __u8 serial; /* serial number of chunk in NAND. Cached here */
-+ __u16 sum; /* sum of the name to speed searching */
-+
-+ struct yaffs_DeviceStruct *myDev; /* The device I'm on */
-+
-+ struct list_head hashLink; /* list of objects in this hash bucket */
-+
-+ struct list_head hardLinks; /* all the equivalent hard linked objects */
-+
-+ /* directory structure stuff */
-+ /* also used for linking up the free list */
-+ struct yaffs_ObjectStruct *parent;
-+ struct list_head siblings;
-+
-+ /* Where's my object header in NAND? */
-+ int chunkId;
-+
-+ int nDataChunks; /* Number of data chunks attached to the file. */
-+
-+ __u32 objectId; /* the object id value */
-+
-+ __u32 yst_mode;
-+
-+#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
-+ YCHAR shortName[YAFFS_SHORT_NAME_LENGTH + 1];
-+#endif
-+
-+#ifndef __KERNEL__
-+ __u32 inUse;
-+#endif
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+ __u32 win_ctime[2];
-+ __u32 win_mtime[2];
-+ __u32 win_atime[2];
-+#else
-+ __u32 yst_uid;
-+ __u32 yst_gid;
-+ __u32 yst_atime;
-+ __u32 yst_mtime;
-+ __u32 yst_ctime;
-+#endif
-+
-+ __u32 yst_rdev;
-+
-+#ifdef __KERNEL__
-+ struct inode *myInode;
-+
-+#endif
-+
-+ yaffs_ObjectType variantType;
-+
-+ yaffs_ObjectVariant variant;
-+
-+};
-+
-+typedef struct yaffs_ObjectStruct yaffs_Object;
-+
-+struct yaffs_ObjectList_struct {
-+ yaffs_Object *objects;
-+ struct yaffs_ObjectList_struct *next;
-+};
-+
-+typedef struct yaffs_ObjectList_struct yaffs_ObjectList;
-+
-+typedef struct {
-+ struct list_head list;
-+ int count;
-+} yaffs_ObjectBucket;
-+
-+
-+/* yaffs_CheckpointObject holds the definition of an object as dumped
-+ * by checkpointing.
-+ */
-+
-+typedef struct {
-+ int structType;
-+ __u32 objectId;
-+ __u32 parentId;
-+ int chunkId;
-+
-+ yaffs_ObjectType variantType:3;
-+ __u8 deleted:1;
-+ __u8 softDeleted:1;
-+ __u8 unlinked:1;
-+ __u8 fake:1;
-+ __u8 renameAllowed:1;
-+ __u8 unlinkAllowed:1;
-+ __u8 serial;
-+
-+ int nDataChunks;
-+ __u32 fileSizeOrEquivalentObjectId;
-+
-+}yaffs_CheckpointObject;
-+
-+/*--------------------- Temporary buffers ----------------
-+ *
-+ * These are chunk-sized working buffers. Each device has a few
-+ */
-+
-+typedef struct {
-+ __u8 *buffer;
-+ int line; /* track from whence this buffer was allocated */
-+ int maxLine;
-+} yaffs_TempBuffer;
-+
-+/*----------------- Device ---------------------------------*/
-+
-+struct yaffs_DeviceStruct {
-+ struct list_head devList;
-+ const char *name;
-+
-+ /* Entry parameters set up way early. Yaffs sets up the rest.*/
-+ int nDataBytesPerChunk; /* Should be a power of 2 >= 512 */
-+ int nChunksPerBlock; /* does not need to be a power of 2 */
-+ int nBytesPerSpare; /* spare area size */
-+ int startBlock; /* Start block we're allowed to use */
-+ int endBlock; /* End block we're allowed to use */
-+ int nReservedBlocks; /* We want this tuneable so that we can reduce */
-+ /* reserved blocks on NOR and RAM. */
-+
-+ /* Stuff used by the partitioned checkpointing mechanism */
-+ int checkpointStartBlock;
-+ int checkpointEndBlock;
-+
-+ /* Stuff used by the shared space checkpointing mechanism */
-+ /* If this value is zero, then this mechanism is disabled */
-+
-+ int nCheckpointReservedBlocks; /* Blocks to reserve for checkpoint data */
-+
-+
-+
-+
-+ int nShortOpCaches; /* If <= 0, then short op caching is disabled, else
-+ * the number of short op caches (don't use too many)
-+ */
-+
-+ int useHeaderFileSize; /* Flag to determine if we should use file sizes from the header */
-+
-+ int useNANDECC; /* Flag to decide whether or not to use NANDECC */
-+
-+ void *genericDevice; /* Pointer to device context
-+ * On an mtd this holds the mtd pointer.
-+ */
-+ void *superBlock;
-+
-+ /* NAND access functions (Must be set before calling YAFFS)*/
-+
-+ int (*writeChunkToNAND) (struct yaffs_DeviceStruct * dev,
-+ int chunkInNAND, const __u8 * data,
-+ const yaffs_Spare * spare);
-+ int (*readChunkFromNAND) (struct yaffs_DeviceStruct * dev,
-+ int chunkInNAND, __u8 * data,
-+ yaffs_Spare * spare);
-+ int (*eraseBlockInNAND) (struct yaffs_DeviceStruct * dev,
-+ int blockInNAND);
-+ int (*initialiseNAND) (struct yaffs_DeviceStruct * dev);
-+
-+#ifdef CONFIG_YAFFS_YAFFS2
-+ int (*writeChunkWithTagsToNAND) (struct yaffs_DeviceStruct * dev,
-+ int chunkInNAND, const __u8 * data,
-+ const yaffs_ExtendedTags * tags);
-+ int (*readChunkWithTagsFromNAND) (struct yaffs_DeviceStruct * dev,
-+ int chunkInNAND, __u8 * data,
-+ yaffs_ExtendedTags * tags);
-+ int (*markNANDBlockBad) (struct yaffs_DeviceStruct * dev, int blockNo);
-+ int (*queryNANDBlock) (struct yaffs_DeviceStruct * dev, int blockNo,
-+ yaffs_BlockState * state, int *sequenceNumber);
-+#endif
-+
-+ int isYaffs2;
-+
-+ /* The removeObjectCallback function must be supplied by OS flavours that
-+ * need it. The Linux kernel does not use this, but yaffs direct does use
-+ * it to implement the faster readdir
-+ */
-+ void (*removeObjectCallback)(struct yaffs_ObjectStruct *obj);
-+
-+ /* Callback to mark the superblock dirsty */
-+ void (*markSuperBlockDirty)(void * superblock);
-+
-+ int wideTnodesDisabled; /* Set to disable wide tnodes */
-+
-+
-+ /* End of stuff that must be set before initialisation. */
-+
-+ /* Runtime parameters. Set up by YAFFS. */
-+
-+ __u16 chunkGroupBits; /* 0 for devices <= 32MB. else log2(nchunks) - 16 */
-+ __u16 chunkGroupSize; /* == 2^^chunkGroupBits */
-+
-+ /* Stuff to support wide tnodes */
-+ __u32 tnodeWidth;
-+ __u32 tnodeMask;
-+
-+ /* Stuff to support various file offses to chunk/offset translations */
-+ /* "Crumbs" for nDataBytesPerChunk not being a power of 2 */
-+ __u32 crumbMask;
-+ __u32 crumbShift;
-+ __u32 crumbsPerChunk;
-+
-+ /* Straight shifting for nDataBytesPerChunk being a power of 2 */
-+ __u32 chunkShift;
-+ __u32 chunkMask;
-+
-+
-+#ifdef __KERNEL__
-+
-+ struct semaphore sem; /* Semaphore for waiting on erasure.*/
-+ struct semaphore grossLock; /* Gross locking semaphore */
-+ __u8 *spareBuffer; /* For mtdif2 use. Don't know the size of the buffer
-+ * at compile time so we have to allocate it.
-+ */
-+ void (*putSuperFunc) (struct super_block * sb);
-+#endif
-+
-+ int isMounted;
-+
-+ int isCheckpointed;
-+
-+
-+ /* Stuff to support block offsetting to support start block zero */
-+ int internalStartBlock;
-+ int internalEndBlock;
-+ int blockOffset;
-+ int chunkOffset;
-+
-+
-+ /* Runtime checkpointing stuff */
-+ int checkpointPageSequence; /* running sequence number of checkpoint pages */
-+ int checkpointByteCount;
-+ int checkpointByteOffset;
-+ __u8 *checkpointBuffer;
-+ int checkpointOpenForWrite;
-+ int blocksInCheckpoint;
-+ int checkpointCurrentChunk;
-+ int checkpointCurrentBlock;
-+ int checkpointNextBlock;
-+ int *checkpointBlockList;
-+ int checkpointMaxBlocks;
-+
-+ /* Block Info */
-+ yaffs_BlockInfo *blockInfo;
-+ __u8 *chunkBits; /* bitmap of chunks in use */
-+ unsigned blockInfoAlt:1; /* was allocated using alternative strategy */
-+ unsigned chunkBitsAlt:1; /* was allocated using alternative strategy */
-+ int chunkBitmapStride; /* Number of bytes of chunkBits per block.
-+ * Must be consistent with nChunksPerBlock.
-+ */
-+
-+ int nErasedBlocks;
-+ int allocationBlock; /* Current block being allocated off */
-+ __u32 allocationPage;
-+ int allocationBlockFinder; /* Used to search for next allocation block */
-+
-+ /* Runtime state */
-+ int nTnodesCreated;
-+ yaffs_Tnode *freeTnodes;
-+ int nFreeTnodes;
-+ yaffs_TnodeList *allocatedTnodeList;
-+
-+ int isDoingGC;
-+
-+ int nObjectsCreated;
-+ yaffs_Object *freeObjects;
-+ int nFreeObjects;
-+
-+ yaffs_ObjectList *allocatedObjectList;
-+
-+ yaffs_ObjectBucket objectBucket[YAFFS_NOBJECT_BUCKETS];
-+
-+ int nFreeChunks;
-+
-+ int currentDirtyChecker; /* Used to find current dirtiest block */
-+
-+ __u32 *gcCleanupList; /* objects to delete at the end of a GC. */
-+
-+ /* Statistcs */
-+ int nPageWrites;
-+ int nPageReads;
-+ int nBlockErasures;
-+ int nErasureFailures;
-+ int nGCCopies;
-+ int garbageCollections;
-+ int passiveGarbageCollections;
-+ int nRetriedWrites;
-+ int nRetiredBlocks;
-+ int eccFixed;
-+ int eccUnfixed;
-+ int tagsEccFixed;
-+ int tagsEccUnfixed;
-+ int nDeletions;
-+ int nUnmarkedDeletions;
-+
-+ int hasPendingPrioritisedGCs; /* We think this device might have pending prioritised gcs */
-+
-+ /* Special directories */
-+ yaffs_Object *rootDir;
-+ yaffs_Object *lostNFoundDir;
-+
-+ /* Buffer areas for storing data to recover from write failures TODO
-+ * __u8 bufferedData[YAFFS_CHUNKS_PER_BLOCK][YAFFS_BYTES_PER_CHUNK];
-+ * yaffs_Spare bufferedSpare[YAFFS_CHUNKS_PER_BLOCK];
-+ */
-+
-+ int bufferedBlock; /* Which block is buffered here? */
-+ int doingBufferedBlockRewrite;
-+
-+ yaffs_ChunkCache *srCache;
-+ int srLastUse;
-+
-+ int cacheHits;
-+
-+ /* Stuff for background deletion and unlinked files.*/
-+ yaffs_Object *unlinkedDir; /* Directory where unlinked and deleted files live. */
-+ yaffs_Object *deletedDir; /* Directory where deleted objects are sent to disappear. */
-+ yaffs_Object *unlinkedDeletion; /* Current file being background deleted.*/
-+ int nDeletedFiles; /* Count of files awaiting deletion;*/
-+ int nUnlinkedFiles; /* Count of unlinked files. */
-+ int nBackgroundDeletions; /* Count of background deletions. */
-+
-+
-+ yaffs_TempBuffer tempBuffer[YAFFS_N_TEMP_BUFFERS];
-+ int maxTemp;
-+ int unmanagedTempAllocations;
-+ int unmanagedTempDeallocations;
-+
-+ /* yaffs2 runtime stuff */
-+ unsigned sequenceNumber; /* Sequence number of currently allocating block */
-+ unsigned oldestDirtySequence;
-+
-+};
-+
-+typedef struct yaffs_DeviceStruct yaffs_Device;
-+
-+/* The static layout of bllock usage etc is stored in the super block header */
-+typedef struct {
-+ int StructType;
-+ int version;
-+ int checkpointStartBlock;
-+ int checkpointEndBlock;
-+ int startBlock;
-+ int endBlock;
-+ int rfu[100];
-+} yaffs_SuperBlockHeader;
-+
-+/* The CheckpointDevice structure holds the device information that changes at runtime and
-+ * must be preserved over unmount/mount cycles.
-+ */
-+typedef struct {
-+ int structType;
-+ int nErasedBlocks;
-+ int allocationBlock; /* Current block being allocated off */
-+ __u32 allocationPage;
-+ int nFreeChunks;
-+
-+ int nDeletedFiles; /* Count of files awaiting deletion;*/
-+ int nUnlinkedFiles; /* Count of unlinked files. */
-+ int nBackgroundDeletions; /* Count of background deletions. */
-+
-+ /* yaffs2 runtime stuff */
-+ unsigned sequenceNumber; /* Sequence number of currently allocating block */
-+ unsigned oldestDirtySequence;
-+
-+} yaffs_CheckpointDevice;
-+
-+
-+typedef struct {
-+ int structType;
-+ __u32 magic;
-+ __u32 version;
-+ __u32 head;
-+} yaffs_CheckpointValidity;
-+
-+/* Function to manipulate block info */
-+static Y_INLINE yaffs_BlockInfo *yaffs_GetBlockInfo(yaffs_Device * dev, int blk)
-+{
-+ if (blk < dev->internalStartBlock || blk > dev->internalEndBlock) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>> yaffs: getBlockInfo block %d is not valid" TENDSTR),
-+ blk));
-+ YBUG();
-+ }
-+ return &dev->blockInfo[blk - dev->internalStartBlock];
-+}
-+
-+/*----------------------- YAFFS Functions -----------------------*/
-+
-+int yaffs_GutsInitialise(yaffs_Device * dev);
-+void yaffs_Deinitialise(yaffs_Device * dev);
-+
-+int yaffs_GetNumberOfFreeChunks(yaffs_Device * dev);
-+
-+int yaffs_RenameObject(yaffs_Object * oldDir, const YCHAR * oldName,
-+ yaffs_Object * newDir, const YCHAR * newName);
-+
-+int yaffs_Unlink(yaffs_Object * dir, const YCHAR * name);
-+int yaffs_DeleteFile(yaffs_Object * obj);
-+
-+int yaffs_GetObjectName(yaffs_Object * obj, YCHAR * name, int buffSize);
-+int yaffs_GetObjectFileLength(yaffs_Object * obj);
-+int yaffs_GetObjectInode(yaffs_Object * obj);
-+unsigned yaffs_GetObjectType(yaffs_Object * obj);
-+int yaffs_GetObjectLinkCount(yaffs_Object * obj);
-+
-+int yaffs_SetAttributes(yaffs_Object * obj, struct iattr *attr);
-+int yaffs_GetAttributes(yaffs_Object * obj, struct iattr *attr);
-+
-+/* File operations */
-+int yaffs_ReadDataFromFile(yaffs_Object * obj, __u8 * buffer, loff_t offset,
-+ int nBytes);
-+int yaffs_WriteDataToFile(yaffs_Object * obj, const __u8 * buffer, loff_t offset,
-+ int nBytes, int writeThrough);
-+int yaffs_ResizeFile(yaffs_Object * obj, loff_t newSize);
-+
-+yaffs_Object *yaffs_MknodFile(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid);
-+int yaffs_FlushFile(yaffs_Object * obj, int updateTime);
-+
-+/* Flushing and checkpointing */
-+void yaffs_FlushEntireDeviceCache(yaffs_Device *dev);
-+
-+int yaffs_CheckpointSave(yaffs_Device *dev);
-+int yaffs_CheckpointRestore(yaffs_Device *dev);
-+
-+/* Directory operations */
-+yaffs_Object *yaffs_MknodDirectory(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid);
-+yaffs_Object *yaffs_FindObjectByName(yaffs_Object * theDir, const YCHAR * name);
-+int yaffs_ApplyToDirectoryChildren(yaffs_Object * theDir,
-+ int (*fn) (yaffs_Object *));
-+
-+yaffs_Object *yaffs_FindObjectByNumber(yaffs_Device * dev, __u32 number);
-+
-+/* Link operations */
-+yaffs_Object *yaffs_Link(yaffs_Object * parent, const YCHAR * name,
-+ yaffs_Object * equivalentObject);
-+
-+yaffs_Object *yaffs_GetEquivalentObject(yaffs_Object * obj);
-+
-+/* Symlink operations */
-+yaffs_Object *yaffs_MknodSymLink(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid,
-+ const YCHAR * alias);
-+YCHAR *yaffs_GetSymlinkAlias(yaffs_Object * obj);
-+
-+/* Special inodes (fifos, sockets and devices) */
-+yaffs_Object *yaffs_MknodSpecial(yaffs_Object * parent, const YCHAR * name,
-+ __u32 mode, __u32 uid, __u32 gid, __u32 rdev);
-+
-+/* Special directories */
-+yaffs_Object *yaffs_Root(yaffs_Device * dev);
-+yaffs_Object *yaffs_LostNFound(yaffs_Device * dev);
-+
-+#ifdef CONFIG_YAFFS_WINCE
-+/* CONFIG_YAFFS_WINCE special stuff */
-+void yfsd_WinFileTimeNow(__u32 target[2]);
-+#endif
-+
-+#ifdef __KERNEL__
-+
-+void yaffs_HandleDeferedFree(yaffs_Object * obj);
-+#endif
-+
-+/* Debug dump */
-+int yaffs_DumpObject(yaffs_Object * obj);
-+
-+void yaffs_GutsTest(yaffs_Device * dev);
-+
-+/* A few useful functions */
-+void yaffs_InitialiseTags(yaffs_ExtendedTags * tags);
-+void yaffs_DeleteChunk(yaffs_Device * dev, int chunkId, int markNAND, int lyn);
-+int yaffs_CheckFF(__u8 * buffer, int nBytes);
-+void yaffs_HandleChunkError(yaffs_Device *dev, yaffs_BlockInfo *bi);
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffsinterface.h linux.dev/fs/yaffs2/yaffsinterface.h
---- linux.old/fs/yaffs2/yaffsinterface.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffsinterface.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,23 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffsinterface.h: Interface to the guts of yaffs.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ */
-+
-+#ifndef __YAFFSINTERFACE_H__
-+#define __YAFFSINTERFACE_H__
-+
-+int yaffs_Initialise(unsigned nBlocks);
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_mtdif2.c linux.dev/fs/yaffs2/yaffs_mtdif2.c
---- linux.old/fs/yaffs2/yaffs_mtdif2.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_mtdif2.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,234 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_mtdif.c NAND mtd wrapper functions.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+/* mtd interface for YAFFS2 */
-+
-+const char *yaffs_mtdif2_c_version =
-+ "$Id: yaffs_mtdif2.c,v 1.15 2006/11/08 06:24:34 charles Exp $";
-+
-+#include "yportenv.h"
-+
-+
-+#include "yaffs_mtdif2.h"
-+
-+#include "linux/mtd/mtd.h"
-+#include "linux/types.h"
-+#include "linux/time.h"
-+
-+#include "yaffs_packedtags2.h"
-+
-+int nandmtd2_WriteChunkWithTagsToNAND(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags * tags)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ struct mtd_oob_ops ops;
-+#else
-+ size_t dummy;
-+#endif
-+ int retval = 0;
-+
-+ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
-+
-+ yaffs_PackedTags2 pt;
-+
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR
-+ ("nandmtd2_WriteChunkWithTagsToNAND chunk %d data %p tags %p"
-+ TENDSTR), chunkInNAND, data, tags));
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ if (tags)
-+ yaffs_PackTags2(&pt, tags);
-+ else
-+ BUG(); /* both tags and data should always be present */
-+
-+ if (data) {
-+ ops.mode = MTD_OOB_AUTO;
-+ ops.ooblen = sizeof(pt);
-+ ops.len = dev->nDataBytesPerChunk;
-+ ops.ooboffs = 0;
-+ ops.datbuf = (__u8 *)data;
-+ ops.oobbuf = (void *)&pt;
-+ retval = mtd->write_oob(mtd, addr, &ops);
-+ } else
-+ BUG(); /* both tags and data should always be present */
-+#else
-+ if (tags) {
-+ yaffs_PackTags2(&pt, tags);
-+ }
-+
-+ if (data && tags) {
-+ if (dev->useNANDECC)
-+ retval =
-+ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, (__u8 *) & pt, NULL);
-+ else
-+ retval =
-+ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, (__u8 *) & pt, NULL);
-+ } else {
-+ if (data)
-+ retval =
-+ mtd->write(mtd, addr, dev->nDataBytesPerChunk, &dummy,
-+ data);
-+ if (tags)
-+ retval =
-+ mtd->write_oob(mtd, addr, mtd->oobsize, &dummy,
-+ (__u8 *) & pt);
-+
-+ }
-+#endif
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-+int nandmtd2_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
-+ __u8 * data, yaffs_ExtendedTags * tags)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ struct mtd_oob_ops ops;
-+#endif
-+ size_t dummy;
-+ int retval = 0;
-+
-+ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
-+
-+ yaffs_PackedTags2 pt;
-+
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR
-+ ("nandmtd2_ReadChunkWithTagsFromNAND chunk %d data %p tags %p"
-+ TENDSTR), chunkInNAND, data, tags));
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ if (data && !tags)
-+ retval = mtd->read(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data);
-+ else if (tags) {
-+ ops.mode = MTD_OOB_AUTO;
-+ ops.ooblen = sizeof(pt);
-+ ops.len = data ? dev->nDataBytesPerChunk : sizeof(pt);
-+ ops.ooboffs = 0;
-+ ops.datbuf = data;
-+ ops.oobbuf = dev->spareBuffer;
-+ retval = mtd->read_oob(mtd, addr, &ops);
-+ }
-+#else
-+ if (data && tags) {
-+ if (dev->useNANDECC) {
-+ retval =
-+ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, dev->spareBuffer,
-+ NULL);
-+ } else {
-+ retval =
-+ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, dev->spareBuffer,
-+ NULL);
-+ }
-+ } else {
-+ if (data)
-+ retval =
-+ mtd->read(mtd, addr, dev->nDataBytesPerChunk, &dummy,
-+ data);
-+ if (tags)
-+ retval =
-+ mtd->read_oob(mtd, addr, mtd->oobsize, &dummy,
-+ dev->spareBuffer);
-+ }
-+#endif
-+
-+ memcpy(&pt, dev->spareBuffer, sizeof(pt));
-+
-+ if (tags)
-+ yaffs_UnpackTags2(tags, &pt);
-+
-+ if(tags && retval == -EBADMSG && tags->eccResult == YAFFS_ECC_RESULT_NO_ERROR)
-+ tags->eccResult = YAFFS_ECC_RESULT_UNFIXED;
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-+int nandmtd2_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+ int retval;
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR("nandmtd2_MarkNANDBlockBad %d" TENDSTR), blockNo));
-+
-+ retval =
-+ mtd->block_markbad(mtd,
-+ blockNo * dev->nChunksPerBlock *
-+ dev->nDataBytesPerChunk);
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+
-+}
-+
-+int nandmtd2_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
-+ yaffs_BlockState * state, int *sequenceNumber)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+ int retval;
-+
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR("nandmtd2_QueryNANDBlock %d" TENDSTR), blockNo));
-+ retval =
-+ mtd->block_isbad(mtd,
-+ blockNo * dev->nChunksPerBlock *
-+ dev->nDataBytesPerChunk);
-+
-+ if (retval) {
-+ T(YAFFS_TRACE_MTD, (TSTR("block is bad" TENDSTR)));
-+
-+ *state = YAFFS_BLOCK_STATE_DEAD;
-+ *sequenceNumber = 0;
-+ } else {
-+ yaffs_ExtendedTags t;
-+ nandmtd2_ReadChunkWithTagsFromNAND(dev,
-+ blockNo *
-+ dev->nChunksPerBlock, NULL,
-+ &t);
-+
-+ if (t.chunkUsed) {
-+ *sequenceNumber = t.sequenceNumber;
-+ *state = YAFFS_BLOCK_STATE_NEEDS_SCANNING;
-+ } else {
-+ *sequenceNumber = 0;
-+ *state = YAFFS_BLOCK_STATE_EMPTY;
-+ }
-+ }
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR("block is bad seq %d state %d" TENDSTR), *sequenceNumber,
-+ *state));
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-diff -urN linux.old/fs/yaffs2/yaffs_mtdif2.h linux.dev/fs/yaffs2/yaffs_mtdif2.h
---- linux.old/fs/yaffs2/yaffs_mtdif2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_mtdif2.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,29 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_mtdif.c NAND mtd wrapper functions.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#ifndef __YAFFS_MTDIF2_H__
-+#define __YAFFS_MTDIF2_H__
-+
-+#include "yaffs_guts.h"
-+int nandmtd2_WriteChunkWithTagsToNAND(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags * tags);
-+int nandmtd2_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
-+ __u8 * data, yaffs_ExtendedTags * tags);
-+int nandmtd2_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo);
-+int nandmtd2_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
-+ yaffs_BlockState * state, int *sequenceNumber);
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_mtdif.c linux.dev/fs/yaffs2/yaffs_mtdif.c
---- linux.old/fs/yaffs2/yaffs_mtdif.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_mtdif.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,243 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_mtdif.c NAND mtd wrapper functions.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+const char *yaffs_mtdif_c_version =
-+ "$Id: yaffs_mtdif.c,v 1.17 2006/11/29 20:21:12 charles Exp $";
-+
-+#include "yportenv.h"
-+
-+
-+#include "yaffs_mtdif.h"
-+
-+#include "linux/mtd/mtd.h"
-+#include "linux/types.h"
-+#include "linux/time.h"
-+#include "linux/mtd/nand.h"
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
-+static struct nand_oobinfo yaffs_oobinfo = {
-+ .useecc = 1,
-+ .eccbytes = 6,
-+ .eccpos = {8, 9, 10, 13, 14, 15}
-+};
-+
-+static struct nand_oobinfo yaffs_noeccinfo = {
-+ .useecc = 0,
-+};
-+#endif
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+static inline void translate_spare2oob(const yaffs_Spare *spare, __u8 *oob)
-+{
-+ oob[0] = spare->tagByte0;
-+ oob[1] = spare->tagByte1;
-+ oob[2] = spare->tagByte2;
-+ oob[3] = spare->tagByte3;
-+ oob[4] = spare->tagByte4;
-+ oob[5] = spare->tagByte5 & 0x3f;
-+ oob[5] |= spare->blockStatus == 'Y' ? 0: 0x80;
-+ oob[5] |= spare->pageStatus == 0 ? 0: 0x40;
-+ oob[6] = spare->tagByte6;
-+ oob[7] = spare->tagByte7;
-+}
-+
-+static inline void translate_oob2spare(yaffs_Spare *spare, __u8 *oob)
-+{
-+ struct yaffs_NANDSpare *nspare = (struct yaffs_NANDSpare *)spare;
-+ spare->tagByte0 = oob[0];
-+ spare->tagByte1 = oob[1];
-+ spare->tagByte2 = oob[2];
-+ spare->tagByte3 = oob[3];
-+ spare->tagByte4 = oob[4];
-+ spare->tagByte5 = oob[5] == 0xff ? 0xff : oob[5] & 0x3f;
-+ spare->blockStatus = oob[5] & 0x80 ? 0xff : 'Y';
-+ spare->pageStatus = oob[5] & 0x40 ? 0xff : 0;
-+ spare->ecc1[0] = spare->ecc1[1] = spare->ecc1[2] = 0xff;
-+ spare->tagByte6 = oob[6];
-+ spare->tagByte7 = oob[7];
-+ spare->ecc2[0] = spare->ecc2[1] = spare->ecc2[2] = 0xff;
-+
-+ nspare->eccres1 = nspare->eccres2 = 0; /* FIXME */
-+}
-+#endif
-+
-+int nandmtd_WriteChunkToNAND(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data, const yaffs_Spare * spare)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ struct mtd_oob_ops ops;
-+#endif
-+ size_t dummy;
-+ int retval = 0;
-+
-+ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ __u8 spareAsBytes[8]; /* OOB */
-+
-+ if (data && !spare)
-+ retval = mtd->write(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data);
-+ else if (spare) {
-+ if (dev->useNANDECC) {
-+ translate_spare2oob(spare, spareAsBytes);
-+ ops.mode = MTD_OOB_AUTO;
-+ ops.ooblen = 8; /* temp hack */
-+ } else {
-+ ops.mode = MTD_OOB_RAW;
-+ ops.ooblen = YAFFS_BYTES_PER_SPARE;
-+ }
-+ ops.len = data ? dev->nDataBytesPerChunk : ops.ooblen;
-+ ops.datbuf = (u8 *)data;
-+ ops.ooboffs = 0;
-+ ops.oobbuf = spareAsBytes;
-+ retval = mtd->write_oob(mtd, addr, &ops);
-+ }
-+#else
-+ __u8 *spareAsBytes = (__u8 *) spare;
-+
-+ if (data && spare) {
-+ if (dev->useNANDECC)
-+ retval =
-+ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, spareAsBytes,
-+ &yaffs_oobinfo);
-+ else
-+ retval =
-+ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, spareAsBytes,
-+ &yaffs_noeccinfo);
-+ } else {
-+ if (data)
-+ retval =
-+ mtd->write(mtd, addr, dev->nDataBytesPerChunk, &dummy,
-+ data);
-+ if (spare)
-+ retval =
-+ mtd->write_oob(mtd, addr, YAFFS_BYTES_PER_SPARE,
-+ &dummy, spareAsBytes);
-+ }
-+#endif
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-+int nandmtd_ReadChunkFromNAND(yaffs_Device * dev, int chunkInNAND, __u8 * data,
-+ yaffs_Spare * spare)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ struct mtd_oob_ops ops;
-+#endif
-+ size_t dummy;
-+ int retval = 0;
-+
-+ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
-+ __u8 spareAsBytes[8]; /* OOB */
-+
-+ if (data && !spare)
-+ retval = mtd->read(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data);
-+ else if (spare) {
-+ if (dev->useNANDECC) {
-+ ops.mode = MTD_OOB_AUTO;
-+ ops.ooblen = 8; /* temp hack */
-+ } else {
-+ ops.mode = MTD_OOB_RAW;
-+ ops.ooblen = YAFFS_BYTES_PER_SPARE;
-+ }
-+ ops.len = data ? dev->nDataBytesPerChunk : ops.ooblen;
-+ ops.datbuf = data;
-+ ops.ooboffs = 0;
-+ ops.oobbuf = spareAsBytes;
-+ retval = mtd->read_oob(mtd, addr, &ops);
-+ if (dev->useNANDECC)
-+ translate_oob2spare(spare, spareAsBytes);
-+ }
-+#else
-+ __u8 *spareAsBytes = (__u8 *) spare;
-+
-+ if (data && spare) {
-+ if (dev->useNANDECC) {
-+ /* Careful, this call adds 2 ints */
-+ /* to the end of the spare data. Calling function */
-+ /* should allocate enough memory for spare, */
-+ /* i.e. [YAFFS_BYTES_PER_SPARE+2*sizeof(int)]. */
-+ retval =
-+ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, spareAsBytes,
-+ &yaffs_oobinfo);
-+ } else {
-+ retval =
-+ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
-+ &dummy, data, spareAsBytes,
-+ &yaffs_noeccinfo);
-+ }
-+ } else {
-+ if (data)
-+ retval =
-+ mtd->read(mtd, addr, dev->nDataBytesPerChunk, &dummy,
-+ data);
-+ if (spare)
-+ retval =
-+ mtd->read_oob(mtd, addr, YAFFS_BYTES_PER_SPARE,
-+ &dummy, spareAsBytes);
-+ }
-+#endif
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-+int nandmtd_EraseBlockInNAND(yaffs_Device * dev, int blockNumber)
-+{
-+ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
-+ __u32 addr =
-+ ((loff_t) blockNumber) * dev->nDataBytesPerChunk
-+ * dev->nChunksPerBlock;
-+ struct erase_info ei;
-+ int retval = 0;
-+
-+ ei.mtd = mtd;
-+ ei.addr = addr;
-+ ei.len = dev->nDataBytesPerChunk * dev->nChunksPerBlock;
-+ ei.time = 1000;
-+ ei.retries = 2;
-+ ei.callback = NULL;
-+ ei.priv = (u_long) dev;
-+
-+ /* Todo finish off the ei if required */
-+
-+ sema_init(&dev->sem, 0);
-+
-+ retval = mtd->erase(mtd, &ei);
-+
-+ if (retval == 0)
-+ return YAFFS_OK;
-+ else
-+ return YAFFS_FAIL;
-+}
-+
-+int nandmtd_InitialiseNAND(yaffs_Device * dev)
-+{
-+ return YAFFS_OK;
-+}
-+
-diff -urN linux.old/fs/yaffs2/yaffs_mtdif.h linux.dev/fs/yaffs2/yaffs_mtdif.h
---- linux.old/fs/yaffs2/yaffs_mtdif.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_mtdif.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,31 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_mtdif.h NAND mtd interface wrappers
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ * $Id: yaffs_mtdif.h,v 1.3 2005/08/11 01:07:43 marty Exp $
-+ */
-+
-+#ifndef __YAFFS_MTDIF_H__
-+#define __YAFFS_MTDIF_H__
-+
-+#include "yaffs_guts.h"
-+
-+int nandmtd_WriteChunkToNAND(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data, const yaffs_Spare * spare);
-+int nandmtd_ReadChunkFromNAND(yaffs_Device * dev, int chunkInNAND, __u8 * data,
-+ yaffs_Spare * spare);
-+int nandmtd_EraseBlockInNAND(yaffs_Device * dev, int blockNumber);
-+int nandmtd_InitialiseNAND(yaffs_Device * dev);
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_nand.c linux.dev/fs/yaffs2/yaffs_nand.c
---- linux.old/fs/yaffs2/yaffs_nand.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_nand.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,135 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+const char *yaffs_nand_c_version =
-+ "$Id: yaffs_nand.c,v 1.5 2006/11/08 09:52:12 charles Exp $";
-+
-+#include "yaffs_nand.h"
-+#include "yaffs_tagscompat.h"
-+#include "yaffs_tagsvalidity.h"
-+
-+
-+int yaffs_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
-+ __u8 * buffer,
-+ yaffs_ExtendedTags * tags)
-+{
-+ int result;
-+ yaffs_ExtendedTags localTags;
-+
-+ int realignedChunkInNAND = chunkInNAND - dev->chunkOffset;
-+
-+ /* If there are no tags provided, use local tags to get prioritised gc working */
-+ if(!tags)
-+ tags = &localTags;
-+
-+ if (dev->readChunkWithTagsFromNAND)
-+ result = dev->readChunkWithTagsFromNAND(dev, realignedChunkInNAND, buffer,
-+ tags);
-+ else
-+ result = yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(dev,
-+ realignedChunkInNAND,
-+ buffer,
-+ tags);
-+ if(tags &&
-+ tags->eccResult > YAFFS_ECC_RESULT_NO_ERROR){
-+
-+ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, chunkInNAND/dev->nChunksPerBlock);
-+ yaffs_HandleChunkError(dev,bi);
-+ }
-+
-+ return result;
-+}
-+
-+int yaffs_WriteChunkWithTagsToNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ const __u8 * buffer,
-+ yaffs_ExtendedTags * tags)
-+{
-+ chunkInNAND -= dev->chunkOffset;
-+
-+
-+ if (tags) {
-+ tags->sequenceNumber = dev->sequenceNumber;
-+ tags->chunkUsed = 1;
-+ if (!yaffs_ValidateTags(tags)) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("Writing uninitialised tags" TENDSTR)));
-+ YBUG();
-+ }
-+ T(YAFFS_TRACE_WRITE,
-+ (TSTR("Writing chunk %d tags %d %d" TENDSTR), chunkInNAND,
-+ tags->objectId, tags->chunkId));
-+ } else {
-+ T(YAFFS_TRACE_ERROR, (TSTR("Writing with no tags" TENDSTR)));
-+ YBUG();
-+ }
-+
-+ if (dev->writeChunkWithTagsToNAND)
-+ return dev->writeChunkWithTagsToNAND(dev, chunkInNAND, buffer,
-+ tags);
-+ else
-+ return yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(dev,
-+ chunkInNAND,
-+ buffer,
-+ tags);
-+}
-+
-+int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo)
-+{
-+ blockNo -= dev->blockOffset;
-+
-+;
-+ if (dev->markNANDBlockBad)
-+ return dev->markNANDBlockBad(dev, blockNo);
-+ else
-+ return yaffs_TagsCompatabilityMarkNANDBlockBad(dev, blockNo);
-+}
-+
-+int yaffs_QueryInitialBlockState(yaffs_Device * dev,
-+ int blockNo,
-+ yaffs_BlockState * state,
-+ unsigned *sequenceNumber)
-+{
-+ blockNo -= dev->blockOffset;
-+
-+ if (dev->queryNANDBlock)
-+ return dev->queryNANDBlock(dev, blockNo, state, sequenceNumber);
-+ else
-+ return yaffs_TagsCompatabilityQueryNANDBlock(dev, blockNo,
-+ state,
-+ sequenceNumber);
-+}
-+
-+
-+int yaffs_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
-+ int blockInNAND)
-+{
-+ int result;
-+
-+ blockInNAND -= dev->blockOffset;
-+
-+
-+ dev->nBlockErasures++;
-+ result = dev->eraseBlockInNAND(dev, blockInNAND);
-+
-+ return result;
-+}
-+
-+int yaffs_InitialiseNAND(struct yaffs_DeviceStruct *dev)
-+{
-+ return dev->initialiseNAND(dev);
-+}
-+
-+
-+
-diff -urN linux.old/fs/yaffs2/yaffs_nandemul2k.h linux.dev/fs/yaffs2/yaffs_nandemul2k.h
---- linux.old/fs/yaffs2/yaffs_nandemul2k.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_nandemul2k.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,42 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ * yaffs_nandemul2k.h: Interface to emulated NAND functions (2k page size)
-+ *
-+ * $Id: yaffs_nandemul2k.h,v 1.2 2005/08/11 02:37:49 marty Exp $
-+ */
-+
-+#ifndef __YAFFS_NANDEMUL2K_H__
-+#define __YAFFS_NANDEMUL2K_H__
-+
-+#include "yaffs_guts.h"
-+
-+int nandemul2k_WriteChunkWithTagsToNAND(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND, const __u8 * data,
-+ yaffs_ExtendedTags * tags);
-+int nandemul2k_ReadChunkWithTagsFromNAND(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND, __u8 * data,
-+ yaffs_ExtendedTags * tags);
-+int nandemul2k_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo);
-+int nandemul2k_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
-+ yaffs_BlockState * state, int *sequenceNumber);
-+int nandemul2k_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
-+ int blockInNAND);
-+int nandemul2k_InitialiseNAND(struct yaffs_DeviceStruct *dev);
-+int nandemul2k_GetBytesPerChunk(void);
-+int nandemul2k_GetChunksPerBlock(void);
-+int nandemul2k_GetNumberOfBlocks(void);
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_nand.h linux.dev/fs/yaffs2/yaffs_nand.h
---- linux.old/fs/yaffs2/yaffs_nand.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_nand.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,43 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#ifndef __YAFFS_NAND_H__
-+#define __YAFFS_NAND_H__
-+#include "yaffs_guts.h"
-+
-+
-+
-+int yaffs_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
-+ __u8 * buffer,
-+ yaffs_ExtendedTags * tags);
-+
-+int yaffs_WriteChunkWithTagsToNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ const __u8 * buffer,
-+ yaffs_ExtendedTags * tags);
-+
-+int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo);
-+
-+int yaffs_QueryInitialBlockState(yaffs_Device * dev,
-+ int blockNo,
-+ yaffs_BlockState * state,
-+ unsigned *sequenceNumber);
-+
-+int yaffs_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
-+ int blockInNAND);
-+
-+int yaffs_InitialiseNAND(struct yaffs_DeviceStruct *dev);
-+
-+#endif
-+
-diff -urN linux.old/fs/yaffs2/yaffs_packedtags1.c linux.dev/fs/yaffs2/yaffs_packedtags1.c
---- linux.old/fs/yaffs2/yaffs_packedtags1.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_packedtags1.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,39 @@
-+#include "yaffs_packedtags1.h"
-+#include "yportenv.h"
-+
-+void yaffs_PackTags1(yaffs_PackedTags1 * pt, const yaffs_ExtendedTags * t)
-+{
-+ pt->chunkId = t->chunkId;
-+ pt->serialNumber = t->serialNumber;
-+ pt->byteCount = t->byteCount;
-+ pt->objectId = t->objectId;
-+ pt->ecc = 0;
-+ pt->deleted = (t->chunkDeleted) ? 0 : 1;
-+ pt->unusedStuff = 0;
-+ pt->shouldBeFF = 0xFFFFFFFF;
-+
-+}
-+
-+void yaffs_UnpackTags1(yaffs_ExtendedTags * t, const yaffs_PackedTags1 * pt)
-+{
-+ static const __u8 allFF[] =
-+ { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-+0xff };
-+
-+ if (memcmp(allFF, pt, sizeof(yaffs_PackedTags1))) {
-+ t->blockBad = 0;
-+ if (pt->shouldBeFF != 0xFFFFFFFF) {
-+ t->blockBad = 1;
-+ }
-+ t->chunkUsed = 1;
-+ t->objectId = pt->objectId;
-+ t->chunkId = pt->chunkId;
-+ t->byteCount = pt->byteCount;
-+ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
-+ t->chunkDeleted = (pt->deleted) ? 0 : 1;
-+ t->serialNumber = pt->serialNumber;
-+ } else {
-+ memset(t, 0, sizeof(yaffs_ExtendedTags));
-+
-+ }
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_packedtags1.h linux.dev/fs/yaffs2/yaffs_packedtags1.h
---- linux.old/fs/yaffs2/yaffs_packedtags1.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_packedtags1.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,22 @@
-+// This is used to pack YAFFS1 tags, not YAFFS2 tags.
-+
-+#ifndef __YAFFS_PACKEDTAGS1_H__
-+#define __YAFFS_PACKEDTAGS1_H__
-+
-+#include "yaffs_guts.h"
-+
-+typedef struct {
-+ unsigned chunkId:20;
-+ unsigned serialNumber:2;
-+ unsigned byteCount:10;
-+ unsigned objectId:18;
-+ unsigned ecc:12;
-+ unsigned deleted:1;
-+ unsigned unusedStuff:1;
-+ unsigned shouldBeFF;
-+
-+} yaffs_PackedTags1;
-+
-+void yaffs_PackTags1(yaffs_PackedTags1 * pt, const yaffs_ExtendedTags * t);
-+void yaffs_UnpackTags1(yaffs_ExtendedTags * t, const yaffs_PackedTags1 * pt);
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_packedtags2.c linux.dev/fs/yaffs2/yaffs_packedtags2.c
---- linux.old/fs/yaffs2/yaffs_packedtags2.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_packedtags2.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,184 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * yaffs_packedtags2.c: Tags packing for YAFFS2
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU Lesser General Public License
-+ * version 2.1 as published by the Free Software Foundation.
-+ */
-+
-+#include "yaffs_packedtags2.h"
-+#include "yportenv.h"
-+#include "yaffs_tagsvalidity.h"
-+
-+/* This code packs a set of extended tags into a binary structure for
-+ * NAND storage
-+ */
-+
-+/* Some of the information is "extra" struff which can be packed in to
-+ * speed scanning
-+ * This is defined by having the EXTRA_HEADER_INFO_FLAG set.
-+ */
-+
-+/* Extra flags applied to chunkId */
-+
-+#define EXTRA_HEADER_INFO_FLAG 0x80000000
-+#define EXTRA_SHRINK_FLAG 0x40000000
-+#define EXTRA_SHADOWS_FLAG 0x20000000
-+#define EXTRA_SPARE_FLAGS 0x10000000
-+
-+#define ALL_EXTRA_FLAGS 0xF0000000
-+
-+/* Also, the top 4 bits of the object Id are set to the object type. */
-+#define EXTRA_OBJECT_TYPE_SHIFT (28)
-+#define EXTRA_OBJECT_TYPE_MASK ((0x0F) << EXTRA_OBJECT_TYPE_SHIFT)
-+
-+static void yaffs_DumpPackedTags2(const yaffs_PackedTags2 * pt)
-+{
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR("packed tags obj %d chunk %d byte %d seq %d" TENDSTR),
-+ pt->t.objectId, pt->t.chunkId, pt->t.byteCount,
-+ pt->t.sequenceNumber));
-+}
-+
-+static void yaffs_DumpTags2(const yaffs_ExtendedTags * t)
-+{
-+ T(YAFFS_TRACE_MTD,
-+ (TSTR
-+ ("ext.tags eccres %d blkbad %d chused %d obj %d chunk%d byte "
-+ "%d del %d ser %d seq %d"
-+ TENDSTR), t->eccResult, t->blockBad, t->chunkUsed, t->objectId,
-+ t->chunkId, t->byteCount, t->chunkDeleted, t->serialNumber,
-+ t->sequenceNumber));
-+
-+}
-+
-+void yaffs_PackTags2(yaffs_PackedTags2 * pt, const yaffs_ExtendedTags * t)
-+{
-+ pt->t.chunkId = t->chunkId;
-+ pt->t.sequenceNumber = t->sequenceNumber;
-+ pt->t.byteCount = t->byteCount;
-+ pt->t.objectId = t->objectId;
-+
-+ if (t->chunkId == 0 && t->extraHeaderInfoAvailable) {
-+ /* Store the extra header info instead */
-+ /* We save the parent object in the chunkId */
-+ pt->t.chunkId = EXTRA_HEADER_INFO_FLAG
-+ | t->extraParentObjectId;
-+ if (t->extraIsShrinkHeader) {
-+ pt->t.chunkId |= EXTRA_SHRINK_FLAG;
-+ }
-+ if (t->extraShadows) {
-+ pt->t.chunkId |= EXTRA_SHADOWS_FLAG;
-+ }
-+
-+ pt->t.objectId &= ~EXTRA_OBJECT_TYPE_MASK;
-+ pt->t.objectId |=
-+ (t->extraObjectType << EXTRA_OBJECT_TYPE_SHIFT);
-+
-+ if (t->extraObjectType == YAFFS_OBJECT_TYPE_HARDLINK) {
-+ pt->t.byteCount = t->extraEquivalentObjectId;
-+ } else if (t->extraObjectType == YAFFS_OBJECT_TYPE_FILE) {
-+ pt->t.byteCount = t->extraFileLength;
-+ } else {
-+ pt->t.byteCount = 0;
-+ }
-+ }
-+
-+ yaffs_DumpPackedTags2(pt);
-+ yaffs_DumpTags2(t);
-+
-+#ifndef YAFFS_IGNORE_TAGS_ECC
-+ {
-+ yaffs_ECCCalculateOther((unsigned char *)&pt->t,
-+ sizeof(yaffs_PackedTags2TagsPart),
-+ &pt->ecc);
-+ }
-+#endif
-+}
-+
-+void yaffs_UnpackTags2(yaffs_ExtendedTags * t, yaffs_PackedTags2 * pt)
-+{
-+
-+ memset(t, 0, sizeof(yaffs_ExtendedTags));
-+
-+ yaffs_InitialiseTags(t);
-+
-+ if (pt->t.sequenceNumber != 0xFFFFFFFF) {
-+ /* Page is in use */
-+#ifdef YAFFS_IGNORE_TAGS_ECC
-+ {
-+ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
-+ }
-+#else
-+ {
-+ yaffs_ECCOther ecc;
-+ int result;
-+ yaffs_ECCCalculateOther((unsigned char *)&pt->t,
-+ sizeof
-+ (yaffs_PackedTags2TagsPart),
-+ &ecc);
-+ result =
-+ yaffs_ECCCorrectOther((unsigned char *)&pt->t,
-+ sizeof
-+ (yaffs_PackedTags2TagsPart),
-+ &pt->ecc, &ecc);
-+ switch(result){
-+ case 0:
-+ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
-+ break;
-+ case 1:
-+ t->eccResult = YAFFS_ECC_RESULT_FIXED;
-+ break;
-+ case -1:
-+ t->eccResult = YAFFS_ECC_RESULT_UNFIXED;
-+ break;
-+ default:
-+ t->eccResult = YAFFS_ECC_RESULT_UNKNOWN;
-+ }
-+ }
-+#endif
-+ t->blockBad = 0;
-+ t->chunkUsed = 1;
-+ t->objectId = pt->t.objectId;
-+ t->chunkId = pt->t.chunkId;
-+ t->byteCount = pt->t.byteCount;
-+ t->chunkDeleted = 0;
-+ t->serialNumber = 0;
-+ t->sequenceNumber = pt->t.sequenceNumber;
-+
-+ /* Do extra header info stuff */
-+
-+ if (pt->t.chunkId & EXTRA_HEADER_INFO_FLAG) {
-+ t->chunkId = 0;
-+ t->byteCount = 0;
-+
-+ t->extraHeaderInfoAvailable = 1;
-+ t->extraParentObjectId =
-+ pt->t.chunkId & (~(ALL_EXTRA_FLAGS));
-+ t->extraIsShrinkHeader =
-+ (pt->t.chunkId & EXTRA_SHRINK_FLAG) ? 1 : 0;
-+ t->extraShadows =
-+ (pt->t.chunkId & EXTRA_SHADOWS_FLAG) ? 1 : 0;
-+ t->extraObjectType =
-+ pt->t.objectId >> EXTRA_OBJECT_TYPE_SHIFT;
-+ t->objectId &= ~EXTRA_OBJECT_TYPE_MASK;
-+
-+ if (t->extraObjectType == YAFFS_OBJECT_TYPE_HARDLINK) {
-+ t->extraEquivalentObjectId = pt->t.byteCount;
-+ } else {
-+ t->extraFileLength = pt->t.byteCount;
-+ }
-+ }
-+ }
-+
-+ yaffs_DumpPackedTags2(pt);
-+ yaffs_DumpTags2(t);
-+
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_packedtags2.h linux.dev/fs/yaffs2/yaffs_packedtags2.h
---- linux.old/fs/yaffs2/yaffs_packedtags2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_packedtags2.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,23 @@
-+/* This is used to pack YAFFS2 tags, not YAFFS1tags. */
-+
-+#ifndef __YAFFS_PACKEDTAGS2_H__
-+#define __YAFFS_PACKEDTAGS2_H__
-+
-+#include "yaffs_guts.h"
-+#include "yaffs_ecc.h"
-+
-+typedef struct {
-+ unsigned sequenceNumber;
-+ unsigned objectId;
-+ unsigned chunkId;
-+ unsigned byteCount;
-+} yaffs_PackedTags2TagsPart;
-+
-+typedef struct {
-+ yaffs_PackedTags2TagsPart t;
-+ yaffs_ECCOther ecc;
-+} yaffs_PackedTags2;
-+
-+void yaffs_PackTags2(yaffs_PackedTags2 * pt, const yaffs_ExtendedTags * t);
-+void yaffs_UnpackTags2(yaffs_ExtendedTags * t, yaffs_PackedTags2 * pt);
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_qsort.c linux.dev/fs/yaffs2/yaffs_qsort.c
---- linux.old/fs/yaffs2/yaffs_qsort.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_qsort.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,156 @@
-+/*
-+ * Copyright (c) 1992, 1993
-+ * The Regents of the University of California. All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions
-+ * are met:
-+ * 1. Redistributions of source code must retain the above copyright
-+ * notice, this list of conditions and the following disclaimer.
-+ * 2. Redistributions in binary form must reproduce the above copyright
-+ * notice, this list of conditions and the following disclaimer in the
-+ * documentation and/or other materials provided with the distribution.
-+ * 3. Neither the name of the University nor the names of its contributors
-+ * may be used to endorse or promote products derived from this software
-+ * without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
-+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ * SUCH DAMAGE.
-+ */
-+
-+#include "yportenv.h"
-+//#include <linux/string.h>
-+
-+/*
-+ * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
-+ */
-+#define swapcode(TYPE, parmi, parmj, n) { \
-+ long i = (n) / sizeof (TYPE); \
-+ register TYPE *pi = (TYPE *) (parmi); \
-+ register TYPE *pj = (TYPE *) (parmj); \
-+ do { \
-+ register TYPE t = *pi; \
-+ *pi++ = *pj; \
-+ *pj++ = t; \
-+ } while (--i > 0); \
-+}
-+
-+#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \
-+ es % sizeof(long) ? 2 : es == sizeof(long)? 0 : 1;
-+
-+static __inline void
-+swapfunc(char *a, char *b, int n, int swaptype)
-+{
-+ if (swaptype <= 1)
-+ swapcode(long, a, b, n)
-+ else
-+ swapcode(char, a, b, n)
-+}
-+
-+#define swap(a, b) \
-+ if (swaptype == 0) { \
-+ long t = *(long *)(a); \
-+ *(long *)(a) = *(long *)(b); \
-+ *(long *)(b) = t; \
-+ } else \
-+ swapfunc(a, b, es, swaptype)
-+
-+#define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n, swaptype)
-+
-+static __inline char *
-+med3(char *a, char *b, char *c, int (*cmp)(const void *, const void *))
-+{
-+ return cmp(a, b) < 0 ?
-+ (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a ))
-+ :(cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c ));
-+}
-+
-+#define min(a,b) (((a) < (b)) ? (a) : (b))
-+void
-+qsort(void *aa, size_t n, size_t es, int (*cmp)(const void *, const void *))
-+{
-+ char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
-+ int d, r, swaptype, swap_cnt;
-+ register char *a = aa;
-+
-+loop: SWAPINIT(a, es);
-+ swap_cnt = 0;
-+ if (n < 7) {
-+ for (pm = (char *)a + es; pm < (char *) a + n * es; pm += es)
-+ for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0;
-+ pl -= es)
-+ swap(pl, pl - es);
-+ return;
-+ }
-+ pm = (char *)a + (n / 2) * es;
-+ if (n > 7) {
-+ pl = (char *)a;
-+ pn = (char *)a + (n - 1) * es;
-+ if (n > 40) {
-+ d = (n / 8) * es;
-+ pl = med3(pl, pl + d, pl + 2 * d, cmp);
-+ pm = med3(pm - d, pm, pm + d, cmp);
-+ pn = med3(pn - 2 * d, pn - d, pn, cmp);
-+ }
-+ pm = med3(pl, pm, pn, cmp);
-+ }
-+ swap(a, pm);
-+ pa = pb = (char *)a + es;
-+
-+ pc = pd = (char *)a + (n - 1) * es;
-+ for (;;) {
-+ while (pb <= pc && (r = cmp(pb, a)) <= 0) {
-+ if (r == 0) {
-+ swap_cnt = 1;
-+ swap(pa, pb);
-+ pa += es;
-+ }
-+ pb += es;
-+ }
-+ while (pb <= pc && (r = cmp(pc, a)) >= 0) {
-+ if (r == 0) {
-+ swap_cnt = 1;
-+ swap(pc, pd);
-+ pd -= es;
-+ }
-+ pc -= es;
-+ }
-+ if (pb > pc)
-+ break;
-+ swap(pb, pc);
-+ swap_cnt = 1;
-+ pb += es;
-+ pc -= es;
-+ }
-+ if (swap_cnt == 0) { /* Switch to insertion sort */
-+ for (pm = (char *) a + es; pm < (char *) a + n * es; pm += es)
-+ for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0;
-+ pl -= es)
-+ swap(pl, pl - es);
-+ return;
-+ }
-+
-+ pn = (char *)a + n * es;
-+ r = min(pa - (char *)a, pb - pa);
-+ vecswap(a, pb - r, r);
-+ r = min((long)(pd - pc), (long)(pn - pd - es));
-+ vecswap(pb, pn - r, r);
-+ if ((r = pb - pa) > es)
-+ qsort(a, r / es, es, cmp);
-+ if ((r = pd - pc) > es) {
-+ /* Iterate rather than recurse to save stack space */
-+ a = pn - r;
-+ n = r / es;
-+ goto loop;
-+ }
-+/* qsort(pn - r, r / es, es, cmp);*/
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_qsort.h linux.dev/fs/yaffs2/yaffs_qsort.h
---- linux.old/fs/yaffs2/yaffs_qsort.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_qsort.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,23 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_qsort.h: Interface to BSD-licensed qsort routine.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ * $Id: yaffs_qsort.h,v 1.2 2006/11/07 23:20:09 charles Exp $
-+ */
-+
-+#ifndef __YAFFS_QSORT_H__
-+#define __YAFFS_QSORT_H__
-+
-+extern void qsort (void *const base, size_t total_elems, size_t size,
-+ int (*cmp)(const void *, const void *));
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_tagscompat.c linux.dev/fs/yaffs2/yaffs_tagscompat.c
---- linux.old/fs/yaffs2/yaffs_tagscompat.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_tagscompat.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,532 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_tagscompat.h: Tags compatability layer to use YAFFS1 formatted NAND.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * $Id: yaffs_tagscompat.c,v 1.8 2005/11/29 20:54:32 marty Exp $
-+ */
-+
-+#include "yaffs_guts.h"
-+#include "yaffs_tagscompat.h"
-+#include "yaffs_ecc.h"
-+
-+static void yaffs_HandleReadDataError(yaffs_Device * dev, int chunkInNAND);
-+#ifdef NOTYET
-+static void yaffs_CheckWrittenBlock(yaffs_Device * dev, int chunkInNAND);
-+static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_Spare * spare);
-+static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
-+ const yaffs_Spare * spare);
-+static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND);
-+#endif
-+
-+static const char yaffs_countBitsTable[256] = {
-+ 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4,
-+ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
-+ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
-+ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
-+ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-+ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
-+ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
-+ 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6, 7, 7, 8
-+};
-+
-+static int yaffs_CountBits(__u8 x)
-+{
-+ int retVal;
-+ retVal = yaffs_countBitsTable[x];
-+ return retVal;
-+}
-+
-+/********** Tags ECC calculations *********/
-+
-+void yaffs_CalcECC(const __u8 * data, yaffs_Spare * spare)
-+{
-+ yaffs_ECCCalculate(data, spare->ecc1);
-+ yaffs_ECCCalculate(&data[256], spare->ecc2);
-+}
-+
-+void yaffs_CalcTagsECC(yaffs_Tags * tags)
-+{
-+ /* Calculate an ecc */
-+
-+ unsigned char *b = ((yaffs_TagsUnion *) tags)->asBytes;
-+ unsigned i, j;
-+ unsigned ecc = 0;
-+ unsigned bit = 0;
-+
-+ tags->ecc = 0;
-+
-+ for (i = 0; i < 8; i++) {
-+ for (j = 1; j & 0xff; j <<= 1) {
-+ bit++;
-+ if (b[i] & j) {
-+ ecc ^= bit;
-+ }
-+ }
-+ }
-+
-+ tags->ecc = ecc;
-+
-+}
-+
-+int yaffs_CheckECCOnTags(yaffs_Tags * tags)
-+{
-+ unsigned ecc = tags->ecc;
-+
-+ yaffs_CalcTagsECC(tags);
-+
-+ ecc ^= tags->ecc;
-+
-+ if (ecc && ecc <= 64) {
-+ /* TODO: Handle the failure better. Retire? */
-+ unsigned char *b = ((yaffs_TagsUnion *) tags)->asBytes;
-+
-+ ecc--;
-+
-+ b[ecc / 8] ^= (1 << (ecc & 7));
-+
-+ /* Now recvalc the ecc */
-+ yaffs_CalcTagsECC(tags);
-+
-+ return 1; /* recovered error */
-+ } else if (ecc) {
-+ /* Wierd ecc failure value */
-+ /* TODO Need to do somethiong here */
-+ return -1; /* unrecovered error */
-+ }
-+
-+ return 0;
-+}
-+
-+/********** Tags **********/
-+
-+static void yaffs_LoadTagsIntoSpare(yaffs_Spare * sparePtr,
-+ yaffs_Tags * tagsPtr)
-+{
-+ yaffs_TagsUnion *tu = (yaffs_TagsUnion *) tagsPtr;
-+
-+ yaffs_CalcTagsECC(tagsPtr);
-+
-+ sparePtr->tagByte0 = tu->asBytes[0];
-+ sparePtr->tagByte1 = tu->asBytes[1];
-+ sparePtr->tagByte2 = tu->asBytes[2];
-+ sparePtr->tagByte3 = tu->asBytes[3];
-+ sparePtr->tagByte4 = tu->asBytes[4];
-+ sparePtr->tagByte5 = tu->asBytes[5];
-+ sparePtr->tagByte6 = tu->asBytes[6];
-+ sparePtr->tagByte7 = tu->asBytes[7];
-+}
-+
-+static void yaffs_GetTagsFromSpare(yaffs_Device * dev, yaffs_Spare * sparePtr,
-+ yaffs_Tags * tagsPtr)
-+{
-+ yaffs_TagsUnion *tu = (yaffs_TagsUnion *) tagsPtr;
-+ int result;
-+
-+ tu->asBytes[0] = sparePtr->tagByte0;
-+ tu->asBytes[1] = sparePtr->tagByte1;
-+ tu->asBytes[2] = sparePtr->tagByte2;
-+ tu->asBytes[3] = sparePtr->tagByte3;
-+ tu->asBytes[4] = sparePtr->tagByte4;
-+ tu->asBytes[5] = sparePtr->tagByte5;
-+ tu->asBytes[6] = sparePtr->tagByte6;
-+ tu->asBytes[7] = sparePtr->tagByte7;
-+
-+ result = yaffs_CheckECCOnTags(tagsPtr);
-+ if (result > 0) {
-+ dev->tagsEccFixed++;
-+ } else if (result < 0) {
-+ dev->tagsEccUnfixed++;
-+ }
-+}
-+
-+static void yaffs_SpareInitialise(yaffs_Spare * spare)
-+{
-+ memset(spare, 0xFF, sizeof(yaffs_Spare));
-+}
-+
-+static int yaffs_WriteChunkToNAND(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND, const __u8 * data,
-+ yaffs_Spare * spare)
-+{
-+ if (chunkInNAND < dev->startBlock * dev->nChunksPerBlock) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR("**>> yaffs chunk %d is not valid" TENDSTR),
-+ chunkInNAND));
-+ return YAFFS_FAIL;
-+ }
-+
-+ dev->nPageWrites++;
-+ return dev->writeChunkToNAND(dev, chunkInNAND, data, spare);
-+}
-+
-+static int yaffs_ReadChunkFromNAND(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND,
-+ __u8 * data,
-+ yaffs_Spare * spare,
-+ yaffs_ECCResult * eccResult,
-+ int doErrorCorrection)
-+{
-+ int retVal;
-+ yaffs_Spare localSpare;
-+
-+ dev->nPageReads++;
-+
-+ if (!spare && data) {
-+ /* If we don't have a real spare, then we use a local one. */
-+ /* Need this for the calculation of the ecc */
-+ spare = &localSpare;
-+ }
-+
-+ if (!dev->useNANDECC) {
-+ retVal = dev->readChunkFromNAND(dev, chunkInNAND, data, spare);
-+ if (data && doErrorCorrection) {
-+ /* Do ECC correction */
-+ /* Todo handle any errors */
-+ int eccResult1, eccResult2;
-+ __u8 calcEcc[3];
-+
-+ yaffs_ECCCalculate(data, calcEcc);
-+ eccResult1 =
-+ yaffs_ECCCorrect(data, spare->ecc1, calcEcc);
-+ yaffs_ECCCalculate(&data[256], calcEcc);
-+ eccResult2 =
-+ yaffs_ECCCorrect(&data[256], spare->ecc2, calcEcc);
-+
-+ if (eccResult1 > 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>yaffs ecc error fix performed on chunk %d:0"
-+ TENDSTR), chunkInNAND));
-+ dev->eccFixed++;
-+ } else if (eccResult1 < 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>yaffs ecc error unfixed on chunk %d:0"
-+ TENDSTR), chunkInNAND));
-+ dev->eccUnfixed++;
-+ }
-+
-+ if (eccResult2 > 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>yaffs ecc error fix performed on chunk %d:1"
-+ TENDSTR), chunkInNAND));
-+ dev->eccFixed++;
-+ } else if (eccResult2 < 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>yaffs ecc error unfixed on chunk %d:1"
-+ TENDSTR), chunkInNAND));
-+ dev->eccUnfixed++;
-+ }
-+
-+ if (eccResult1 || eccResult2) {
-+ /* We had a data problem on this page */
-+ yaffs_HandleReadDataError(dev, chunkInNAND);
-+ }
-+
-+ if (eccResult1 < 0 || eccResult2 < 0)
-+ *eccResult = YAFFS_ECC_RESULT_UNFIXED;
-+ else if (eccResult1 > 0 || eccResult2 > 0)
-+ *eccResult = YAFFS_ECC_RESULT_FIXED;
-+ else
-+ *eccResult = YAFFS_ECC_RESULT_NO_ERROR;
-+ }
-+ } else {
-+ /* Must allocate enough memory for spare+2*sizeof(int) */
-+ /* for ecc results from device. */
-+ struct yaffs_NANDSpare nspare;
-+ retVal =
-+ dev->readChunkFromNAND(dev, chunkInNAND, data,
-+ (yaffs_Spare *) & nspare);
-+ memcpy(spare, &nspare, sizeof(yaffs_Spare));
-+ if (data && doErrorCorrection) {
-+ if (nspare.eccres1 > 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>mtd ecc error fix performed on chunk %d:0"
-+ TENDSTR), chunkInNAND));
-+ } else if (nspare.eccres1 < 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>mtd ecc error unfixed on chunk %d:0"
-+ TENDSTR), chunkInNAND));
-+ }
-+
-+ if (nspare.eccres2 > 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>mtd ecc error fix performed on chunk %d:1"
-+ TENDSTR), chunkInNAND));
-+ } else if (nspare.eccres2 < 0) {
-+ T(YAFFS_TRACE_ERROR,
-+ (TSTR
-+ ("**>>mtd ecc error unfixed on chunk %d:1"
-+ TENDSTR), chunkInNAND));
-+ }
-+
-+ if (nspare.eccres1 || nspare.eccres2) {
-+ /* We had a data problem on this page */
-+ yaffs_HandleReadDataError(dev, chunkInNAND);
-+ }
-+
-+ if (nspare.eccres1 < 0 || nspare.eccres2 < 0)
-+ *eccResult = YAFFS_ECC_RESULT_UNFIXED;
-+ else if (nspare.eccres1 > 0 || nspare.eccres2 > 0)
-+ *eccResult = YAFFS_ECC_RESULT_FIXED;
-+ else
-+ *eccResult = YAFFS_ECC_RESULT_NO_ERROR;
-+
-+ }
-+ }
-+ return retVal;
-+}
-+
-+#ifdef NOTYET
-+static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
-+ int chunkInNAND)
-+{
-+
-+ static int init = 0;
-+ static __u8 cmpbuf[YAFFS_BYTES_PER_CHUNK];
-+ static __u8 data[YAFFS_BYTES_PER_CHUNK];
-+ /* Might as well always allocate the larger size for */
-+ /* dev->useNANDECC == true; */
-+ static __u8 spare[sizeof(struct yaffs_NANDSpare)];
-+
-+ dev->readChunkFromNAND(dev, chunkInNAND, data, (yaffs_Spare *) spare);
-+
-+ if (!init) {
-+ memset(cmpbuf, 0xff, YAFFS_BYTES_PER_CHUNK);
-+ init = 1;
-+ }
-+
-+ if (memcmp(cmpbuf, data, YAFFS_BYTES_PER_CHUNK))
-+ return YAFFS_FAIL;
-+ if (memcmp(cmpbuf, spare, 16))
-+ return YAFFS_FAIL;
-+
-+ return YAFFS_OK;
-+
-+}
-+#endif
-+
-+/*
-+ * Functions for robustisizing
-+ */
-+
-+static void yaffs_HandleReadDataError(yaffs_Device * dev, int chunkInNAND)
-+{
-+ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
-+
-+ /* Mark the block for retirement */
-+ yaffs_GetBlockInfo(dev, blockInNAND)->needsRetiring = 1;
-+ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
-+ (TSTR("**>>Block %d marked for retirement" TENDSTR), blockInNAND));
-+
-+ /* TODO:
-+ * Just do a garbage collection on the affected block
-+ * then retire the block
-+ * NB recursion
-+ */
-+}
-+
-+#ifdef NOTYET
-+static void yaffs_CheckWrittenBlock(yaffs_Device * dev, int chunkInNAND)
-+{
-+}
-+
-+static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_Spare * spare)
-+{
-+}
-+
-+static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
-+ const yaffs_Spare * spare)
-+{
-+}
-+
-+static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND)
-+{
-+ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
-+
-+ /* Mark the block for retirement */
-+ yaffs_GetBlockInfo(dev, blockInNAND)->needsRetiring = 1;
-+ /* Delete the chunk */
-+ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
-+}
-+
-+static int yaffs_VerifyCompare(const __u8 * d0, const __u8 * d1,
-+ const yaffs_Spare * s0, const yaffs_Spare * s1)
-+{
-+
-+ if (memcmp(d0, d1, YAFFS_BYTES_PER_CHUNK) != 0 ||
-+ s0->tagByte0 != s1->tagByte0 ||
-+ s0->tagByte1 != s1->tagByte1 ||
-+ s0->tagByte2 != s1->tagByte2 ||
-+ s0->tagByte3 != s1->tagByte3 ||
-+ s0->tagByte4 != s1->tagByte4 ||
-+ s0->tagByte5 != s1->tagByte5 ||
-+ s0->tagByte6 != s1->tagByte6 ||
-+ s0->tagByte7 != s1->tagByte7 ||
-+ s0->ecc1[0] != s1->ecc1[0] ||
-+ s0->ecc1[1] != s1->ecc1[1] ||
-+ s0->ecc1[2] != s1->ecc1[2] ||
-+ s0->ecc2[0] != s1->ecc2[0] ||
-+ s0->ecc2[1] != s1->ecc2[1] || s0->ecc2[2] != s1->ecc2[2]) {
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+#endif /* NOTYET */
-+
-+int yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags *
-+ eTags)
-+{
-+ yaffs_Spare spare;
-+ yaffs_Tags tags;
-+
-+ yaffs_SpareInitialise(&spare);
-+
-+ if (eTags->chunkDeleted) {
-+ spare.pageStatus = 0;
-+ } else {
-+ tags.objectId = eTags->objectId;
-+ tags.chunkId = eTags->chunkId;
-+ tags.byteCount = eTags->byteCount;
-+ tags.serialNumber = eTags->serialNumber;
-+
-+ if (!dev->useNANDECC && data) {
-+ yaffs_CalcECC(data, &spare);
-+ }
-+ yaffs_LoadTagsIntoSpare(&spare, &tags);
-+
-+ }
-+
-+ return yaffs_WriteChunkToNAND(dev, chunkInNAND, data, &spare);
-+}
-+
-+int yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ __u8 * data,
-+ yaffs_ExtendedTags * eTags)
-+{
-+
-+ yaffs_Spare spare;
-+ yaffs_Tags tags;
-+ yaffs_ECCResult eccResult;
-+
-+ static yaffs_Spare spareFF;
-+ static int init;
-+
-+ if (!init) {
-+ memset(&spareFF, 0xFF, sizeof(spareFF));
-+ init = 1;
-+ }
-+
-+ if (yaffs_ReadChunkFromNAND
-+ (dev, chunkInNAND, data, &spare, &eccResult, 1)) {
-+ /* eTags may be NULL */
-+ if (eTags) {
-+
-+ int deleted =
-+ (yaffs_CountBits(spare.pageStatus) < 7) ? 1 : 0;
-+
-+ eTags->chunkDeleted = deleted;
-+ eTags->eccResult = eccResult;
-+ eTags->blockBad = 0; /* We're reading it */
-+ /* therefore it is not a bad block */
-+ eTags->chunkUsed =
-+ (memcmp(&spareFF, &spare, sizeof(spareFF)) !=
-+ 0) ? 1 : 0;
-+
-+ if (eTags->chunkUsed) {
-+ yaffs_GetTagsFromSpare(dev, &spare, &tags);
-+
-+ eTags->objectId = tags.objectId;
-+ eTags->chunkId = tags.chunkId;
-+ eTags->byteCount = tags.byteCount;
-+ eTags->serialNumber = tags.serialNumber;
-+ }
-+ }
-+
-+ return YAFFS_OK;
-+ } else {
-+ return YAFFS_FAIL;
-+ }
-+}
-+
-+int yaffs_TagsCompatabilityMarkNANDBlockBad(struct yaffs_DeviceStruct *dev,
-+ int blockInNAND)
-+{
-+
-+ yaffs_Spare spare;
-+
-+ memset(&spare, 0xff, sizeof(yaffs_Spare));
-+
-+ spare.blockStatus = 'Y';
-+
-+ yaffs_WriteChunkToNAND(dev, blockInNAND * dev->nChunksPerBlock, NULL,
-+ &spare);
-+ yaffs_WriteChunkToNAND(dev, blockInNAND * dev->nChunksPerBlock + 1,
-+ NULL, &spare);
-+
-+ return YAFFS_OK;
-+
-+}
-+
-+int yaffs_TagsCompatabilityQueryNANDBlock(struct yaffs_DeviceStruct *dev,
-+ int blockNo, yaffs_BlockState *
-+ state,
-+ int *sequenceNumber)
-+{
-+
-+ yaffs_Spare spare0, spare1;
-+ static yaffs_Spare spareFF;
-+ static int init;
-+ yaffs_ECCResult dummy;
-+
-+ if (!init) {
-+ memset(&spareFF, 0xFF, sizeof(spareFF));
-+ init = 1;
-+ }
-+
-+ *sequenceNumber = 0;
-+
-+ yaffs_ReadChunkFromNAND(dev, blockNo * dev->nChunksPerBlock, NULL,
-+ &spare0, &dummy, 1);
-+ yaffs_ReadChunkFromNAND(dev, blockNo * dev->nChunksPerBlock + 1, NULL,
-+ &spare1, &dummy, 1);
-+
-+ if (yaffs_CountBits(spare0.blockStatus & spare1.blockStatus) < 7)
-+ *state = YAFFS_BLOCK_STATE_DEAD;
-+ else if (memcmp(&spareFF, &spare0, sizeof(spareFF)) == 0)
-+ *state = YAFFS_BLOCK_STATE_EMPTY;
-+ else
-+ *state = YAFFS_BLOCK_STATE_NEEDS_SCANNING;
-+
-+ return YAFFS_OK;
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_tagscompat.h linux.dev/fs/yaffs2/yaffs_tagscompat.h
---- linux.old/fs/yaffs2/yaffs_tagscompat.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_tagscompat.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,40 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yaffs_ramdisk.h: yaffs ram disk component
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * $Id: yaffs_tagscompat.h,v 1.2 2005/08/11 02:33:03 marty Exp $
-+ */
-+
-+/* This provides a ram disk under yaffs.
-+ * NB this is not intended for NAND emulation.
-+ * Use this with dev->useNANDECC enabled, then ECC overheads are not required.
-+ */
-+#ifndef __YAFFS_TAGSCOMPAT_H__
-+#define __YAFFS_TAGSCOMPAT_H__
-+
-+#include "yaffs_guts.h"
-+int yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ const __u8 * data,
-+ const yaffs_ExtendedTags *
-+ tags);
-+int yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(yaffs_Device * dev,
-+ int chunkInNAND,
-+ __u8 * data,
-+ yaffs_ExtendedTags *
-+ tags);
-+int yaffs_TagsCompatabilityMarkNANDBlockBad(struct yaffs_DeviceStruct *dev,
-+ int blockNo);
-+int yaffs_TagsCompatabilityQueryNANDBlock(struct yaffs_DeviceStruct *dev,
-+ int blockNo, yaffs_BlockState *
-+ state, int *sequenceNumber);
-+
-+#endif
-diff -urN linux.old/fs/yaffs2/yaffs_tagsvalidity.c linux.dev/fs/yaffs2/yaffs_tagsvalidity.c
---- linux.old/fs/yaffs2/yaffs_tagsvalidity.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_tagsvalidity.c 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,31 @@
-+
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * $Id: yaffs_tagsvalidity.c,v 1.2 2005/08/11 02:33:03 marty Exp $
-+ */
-+
-+#include "yaffs_tagsvalidity.h"
-+
-+void yaffs_InitialiseTags(yaffs_ExtendedTags * tags)
-+{
-+ memset(tags, 0, sizeof(yaffs_ExtendedTags));
-+ tags->validMarker0 = 0xAAAAAAAA;
-+ tags->validMarker1 = 0x55555555;
-+}
-+
-+int yaffs_ValidateTags(yaffs_ExtendedTags * tags)
-+{
-+ return (tags->validMarker0 == 0xAAAAAAAA &&
-+ tags->validMarker1 == 0x55555555);
-+
-+}
-diff -urN linux.old/fs/yaffs2/yaffs_tagsvalidity.h linux.dev/fs/yaffs2/yaffs_tagsvalidity.h
---- linux.old/fs/yaffs2/yaffs_tagsvalidity.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yaffs_tagsvalidity.h 2006-12-14 04:21:47.000000000 +0100
-@@ -0,0 +1,25 @@
-+
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * $Id: yaffs_tagsvalidity.h,v 1.2 2005/08/11 02:33:03 marty Exp $
-+ */
-+//yaffs_tagsvalidity.h
-+
-+#ifndef __YAFFS_TAGS_VALIDITY_H__
-+#define __YAFFS_TAGS_VALIDITY_H__
-+
-+#include "yaffs_guts.h"
-+
-+void yaffs_InitialiseTags(yaffs_ExtendedTags * tags);
-+int yaffs_ValidateTags(yaffs_ExtendedTags * tags);
-+#endif
-diff -urN linux.old/fs/yaffs2/yportenv.h linux.dev/fs/yaffs2/yportenv.h
---- linux.old/fs/yaffs2/yportenv.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/fs/yaffs2/yportenv.h 2006-12-14 04:26:06.000000000 +0100
-@@ -0,0 +1,165 @@
-+/*
-+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
-+ * yportenv.h: Portable services used by yaffs. This is done to allow
-+ * simple migration from kernel space into app space for testing.
-+ *
-+ * Copyright (C) 2002 Aleph One Ltd.
-+ * for Toby Churchill Ltd and Brightstar Engineering
-+ *
-+ * Created by Charles Manning <charles@aleph1.co.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU Lesser General Public License version 2.1 as
-+ * published by the Free Software Foundation.
-+ *
-+ *
-+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
-+ *
-+ * $Id: yportenv.h,v 1.11 2006/05/21 09:39:12 charles Exp $
-+ *
-+ */
-+
-+#ifndef __YPORTENV_H__
-+#define __YPORTENV_H__
-+
-+#if defined CONFIG_YAFFS_WINCE
-+
-+#include "ywinceenv.h"
-+
-+#elif defined __KERNEL__
-+
-+#include "moduleconfig.h"
-+
-+/* Linux kernel */
-+#include <linux/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/version.h>
-+#include <linux/mm.h>
-+#include <linux/string.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+
-+#define YCHAR char
-+#define YUCHAR unsigned char
-+#define _Y(x) x
-+#define yaffs_strcpy(a,b) strcpy(a,b)
-+#define yaffs_strncpy(a,b,c) strncpy(a,b,c)
-+#define yaffs_strlen(s) strlen(s)
-+#define yaffs_sprintf sprintf
-+#define yaffs_toupper(a) toupper(a)
-+
-+#define Y_INLINE inline
-+
-+#define YAFFS_LOSTNFOUND_NAME "lost+found"
-+#define YAFFS_LOSTNFOUND_PREFIX "obj"
-+
-+/* #define YPRINTF(x) printk x */
-+#define YMALLOC(x) kmalloc(x,GFP_KERNEL)
-+#define YFREE(x) kfree(x)
-+#define YMALLOC_ALT(x) vmalloc(x)
-+#define YFREE_ALT(x) vfree(x)
-+#define YMALLOC_DMA(x) YMALLOC(x)
-+
-+// KR - added for use in scan so processes aren't blocked indefinitely.
-+#define YYIELD() schedule()
-+
-+#define YAFFS_ROOT_MODE 0666
-+#define YAFFS_LOSTNFOUND_MODE 0666
-+
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
-+#define Y_CURRENT_TIME CURRENT_TIME.tv_sec
-+#define Y_TIME_CONVERT(x) (x).tv_sec
-+#else
-+#define Y_CURRENT_TIME CURRENT_TIME
-+#define Y_TIME_CONVERT(x) (x)
-+#endif
-+
-+#define yaffs_SumCompare(x,y) ((x) == (y))
-+#define yaffs_strcmp(a,b) strcmp(a,b)
-+
-+#define TENDSTR "\n"
-+#define TSTR(x) KERN_WARNING x
-+#define TOUT(p) printk p
-+
-+#elif defined CONFIG_YAFFS_DIRECT
-+
-+/* Direct interface */
-+#include "ydirectenv.h"
-+
-+#elif defined CONFIG_YAFFS_UTIL
-+
-+/* Stuff for YAFFS utilities */
-+
-+#include "stdlib.h"
-+#include "stdio.h"
-+#include "string.h"
-+
-+#include "devextras.h"
-+
-+#define YMALLOC(x) malloc(x)
-+#define YFREE(x) free(x)
-+#define YMALLOC_ALT(x) malloc(x)
-+#define YFREE_ALT(x) free(x)
-+
-+#define YCHAR char
-+#define YUCHAR unsigned char
-+#define _Y(x) x
-+#define yaffs_strcpy(a,b) strcpy(a,b)
-+#define yaffs_strncpy(a,b,c) strncpy(a,b,c)
-+#define yaffs_strlen(s) strlen(s)
-+#define yaffs_sprintf sprintf
-+#define yaffs_toupper(a) toupper(a)
-+
-+#define Y_INLINE inline
-+
-+/* #define YINFO(s) YPRINTF(( __FILE__ " %d %s\n",__LINE__,s)) */
-+/* #define YALERT(s) YINFO(s) */
-+
-+#define TENDSTR "\n"
-+#define TSTR(x) x
-+#define TOUT(p) printf p
-+
-+#define YAFFS_LOSTNFOUND_NAME "lost+found"
-+#define YAFFS_LOSTNFOUND_PREFIX "obj"
-+/* #define YPRINTF(x) printf x */
-+
-+#define YAFFS_ROOT_MODE 0666
-+#define YAFFS_LOSTNFOUND_MODE 0666
-+
-+#define yaffs_SumCompare(x,y) ((x) == (y))
-+#define yaffs_strcmp(a,b) strcmp(a,b)
-+
-+#else
-+/* Should have specified a configuration type */
-+#error Unknown configuration
-+
-+#endif
-+
-+extern unsigned yaffs_traceMask;
-+
-+#define YAFFS_TRACE_ERROR 0x00000001
-+#define YAFFS_TRACE_OS 0x00000002
-+#define YAFFS_TRACE_ALLOCATE 0x00000004
-+#define YAFFS_TRACE_SCAN 0x00000008
-+#define YAFFS_TRACE_BAD_BLOCKS 0x00000010
-+#define YAFFS_TRACE_ERASE 0x00000020
-+#define YAFFS_TRACE_GC 0x00000040
-+#define YAFFS_TRACE_WRITE 0x00000080
-+#define YAFFS_TRACE_TRACING 0x00000100
-+#define YAFFS_TRACE_DELETION 0x00000200
-+#define YAFFS_TRACE_BUFFERS 0x00000400
-+#define YAFFS_TRACE_NANDACCESS 0x00000800
-+#define YAFFS_TRACE_GC_DETAIL 0x00001000
-+#define YAFFS_TRACE_SCAN_DEBUG 0x00002000
-+#define YAFFS_TRACE_MTD 0x00004000
-+#define YAFFS_TRACE_CHECKPOINT 0x00008000
-+#define YAFFS_TRACE_ALWAYS 0x40000000
-+#define YAFFS_TRACE_BUG 0x80000000
-+
-+#define T(mask,p) do{ if((mask) & (yaffs_traceMask | YAFFS_TRACE_ERROR)) TOUT(p);} while(0)
-+
-+#ifndef CONFIG_YAFFS_WINCE
-+#define YBUG() T(YAFFS_TRACE_BUG,(TSTR("==>> yaffs bug: " __FILE__ " %d" TENDSTR),__LINE__))
-+#endif
-+
-+#endif
+++ /dev/null
-diff -urN linux-2.6.19.2-old/drivers/usb/serial/airprime.c linux-2.6.19.2-dev/drivers/usb/serial/airprime.c
---- linux-2.6.19.2-old/drivers/usb/serial/airprime.c 2007-05-01 14:11:28.000000000 -0700
-+++ linux-2.6.19.2-dev/drivers/usb/serial/airprime.c 2007-05-01 14:12:03.000000000 -0700
-@@ -20,6 +20,8 @@
- { USB_DEVICE(0x0c88, 0x17da) }, /* Kyocera Wireless KPC650/Passport */
- { USB_DEVICE(0x1410, 0x1110) }, /* Novatel Wireless Merlin CDMA */
- { USB_DEVICE(0x1410, 0x1100) }, /* ExpressCard34 Qualcomm 3G CDMA */
-+ { USB_DEVICE(0x1410, 0x1130) }, /* Novatel Wireless S720 CDMA/EV-DO */
-+ { USB_DEVICE(0x1410, 0x2110) }, /* Novatel Wireless U720 CDMA/EV-DO */
- { },
- };
- MODULE_DEVICE_TABLE(usb, id_table);
+++ /dev/null
-diff -urN linux-2.6.19.old/include/linux/time.h linux-2.6.19.dev/include/linux/time.h
---- linux-2.6.19.old/include/linux/time.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/time.h 2006-12-14 03:14:05.000000000 +0100
-@@ -1,6 +1,10 @@
- #ifndef _LINUX_TIME_H
- #define _LINUX_TIME_H
-
-+#ifndef __KERNEL__
-+#include <time.h>
-+#else
-+
- #include <linux/types.h>
-
- #ifdef __KERNEL__
-@@ -223,4 +227,6 @@
- */
- #define TIMER_ABSTIME 0x01
-
-+#endif /* __KERNEL__ DEBIAN */
-+
- #endif
-diff -urN linux-2.6.19.old/include/linux/types.h linux-2.6.19.dev/include/linux/types.h
---- linux-2.6.19.old/include/linux/types.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/linux/types.h 2006-12-14 03:14:05.000000000 +0100
-@@ -1,6 +1,14 @@
- #ifndef _LINUX_TYPES_H
- #define _LINUX_TYPES_H
-
-+/* Debian: Use userland types instead. */
-+#ifndef __KERNEL__
-+# include <sys/types.h>
-+/* For other kernel headers. */
-+# include <linux/posix_types.h>
-+# include <asm/types.h>
-+#else
-+
- #ifdef __KERNEL__
-
- #define BITS_TO_LONGS(bits) \
-@@ -156,6 +164,8 @@
-
- #endif /* __KERNEL_STRICT_NAMES */
-
-+#endif /* __KERNEL__ DEBIAN */
-+
- /*
- * Below are truly Linux-specific types that should never collide with
- * any application/library that wants linux/types.h.
+++ /dev/null
-diff -urN linux-2.6.19.old/include/asm-mips/bitops.h linux-2.6.19.dev/include/asm-mips/bitops.h
---- linux-2.6.19.old/include/asm-mips/bitops.h 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.dev/include/asm-mips/bitops.h 2006-12-14 03:14:07.000000000 +0100
-@@ -11,6 +11,7 @@
-
- #include <linux/compiler.h>
- #include <linux/types.h>
-+#include <asm/war.h>
- #include <asm/bug.h>
- #include <asm/byteorder.h> /* sigh ... */
- #include <asm/cpu-features.h>
+++ /dev/null
-diff -urN linux-2.6.19.1/scripts/mod/file2alias.c linux-2.6.19.1.new/scripts/mod/file2alias.c
---- linux-2.6.19.1/scripts/mod/file2alias.c 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/mod/file2alias.c 2007-01-02 15:28:47.000000000 +0100
-@@ -37,7 +37,21 @@
- * even potentially has different endianness and word sizes, since
- * we handle those differences explicitly below */
- #include "../../include/linux/mod_devicetable.h"
-+#ifndef __APPLE__
- #include "../../include/linux/input.h"
-+#else
-+#define EV_MAX 0x1f
-+#define KEY_MUTE 113
-+#define KEY_MIN_INTERESTING KEY_MUTE
-+#define KEY_MAX 0x1ff
-+#define REL_MAX 0x0f
-+#define ABS_MAX 0x3f
-+#define MSC_MAX 0x07
-+#define LED_MAX 0x0f
-+#define SND_MAX 0x07
-+#define FF_MAX 0x7f
-+#define SW_MAX 0x0f
-+#endif
-
- #define ADD(str, sep, cond, field) \
- do { \
-diff -urN linux-2.6.19.1/scripts/mod/mk_elfconfig.c linux-2.6.19.1.new/scripts/mod/mk_elfconfig.c
---- linux-2.6.19.1/scripts/mod/mk_elfconfig.c 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/mod/mk_elfconfig.c 2007-01-02 15:43:57.000000000 +0100
-@@ -1,7 +1,11 @@
- #include <stdio.h>
- #include <stdlib.h>
- #include <string.h>
-+#ifndef __APPLE__
- #include <elf.h>
-+#else
-+#include "../../../../../tools/sstrip/include/elf.h"
-+#endif
-
- int
- main(int argc, char **argv)
-diff -urN linux-2.6.19.1/scripts/mod/modpost.h linux-2.6.19.1.new/scripts/mod/modpost.h
---- linux-2.6.19.1/scripts/mod/modpost.h 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/mod/modpost.h 2007-01-02 15:40:55.000000000 +0100
-@@ -7,7 +7,11 @@
- #include <sys/mman.h>
- #include <fcntl.h>
- #include <unistd.h>
-+#ifndef __APPLE__
- #include <elf.h>
-+#else
-+#include "../../../../../tools/sstrip/include/elf.h"
-+#endif
-
- #include "elfconfig.h"
-
-diff -urN linux-2.6.19.1/scripts/mod/sumversion.c linux-2.6.19.1.new/scripts/mod/sumversion.c
---- linux-2.6.19.1/scripts/mod/sumversion.c 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/mod/sumversion.c 2007-01-02 15:30:23.000000000 +0100
-@@ -8,6 +8,9 @@
- #include <errno.h>
- #include <string.h>
- #include "modpost.h"
-+#ifdef __APPLE__
-+#include <limits.h>
-+#endif
-
- /*
- * Stolen form Cryptographic API.
-diff -urN linux-2.6.19.1/scripts/kconfig linux-2.6.19.1.new/scripts/kconfig/Makefile
---- linux-2.6.19.1/scripts/kconfig/Makefile 2007-01-04 17:49:35.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/kconfig/Makefile 2007-01-04 17:50:37.000000000 +0100
-@@ -87,6 +87,9 @@
- # we really need to do so. (Do not call gcc as part of make mrproper)
- HOST_EXTRACFLAGS = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags)
- HOST_LOADLIBES = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
-+ifeq ($(shell uname -s),Darwin)
-+HOST_LOADLIBES += -lncurses
-+endif
-
- HOST_EXTRACFLAGS += -DLOCALE
-
-diff -urN linux-2.6.19.1/scripts/genksyms/parse.y linux-2.6.19.1.new/scripts/genksyms/parse.y
---- linux-2.6.19.1/scripts/genksyms/parse.y 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/genksyms/parse.y 2007-01-04 19:20:55.000000000 +0100
-@@ -24,7 +24,9 @@
- %{
-
- #include <assert.h>
-+#ifndef __APPLE__
- #include <malloc.h>
-+#endif
- #include "genksyms.h"
-
- static int is_typedef;
-diff -urN linux-2.6.19.1/scripts/genksyms/parse.c_shipped linux-2.6.19.1.new/scripts/genksyms/parse.c_shipped
---- linux-2.6.19.1/scripts/genksyms/parse.c_shipped 2007-01-04 19:34:09.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/genksyms/parse.c_shipped 2007-01-04 19:34:02.000000000 +0100
-@@ -144,7 +144,9 @@
-
-
- #include <assert.h>
-+#ifndef __APPLE__
- #include <malloc.h>
-+#endif
- #include "genksyms.h"
-
- static int is_typedef;
---- linux-2.6.19.1/scripts/kallsyms.c 2006-12-11 20:32:53.000000000 +0100
-+++ linux-2.6.19.1.new/scripts/kallsyms.c 2007-01-04 19:46:38.000000000 +0100
-@@ -30,6 +30,35 @@
- #include <stdlib.h>
- #include <string.h>
- #include <ctype.h>
-+#ifdef __APPLE__
-+/* Darwin has no memmem implementation, this one is ripped of the uClibc-0.9.28 source */
-+void *memmem (const void *haystack, size_t haystack_len,
-+ const void *needle, size_t needle_len)
-+{
-+ const char *begin;
-+ const char *const last_possible
-+ = (const char *) haystack + haystack_len - needle_len;
-+
-+ if (needle_len == 0)
-+ /* The first occurrence of the empty string is deemed to occur at
-+ the beginning of the string. */
-+ return (void *) haystack;
-+
-+ /* Sanity check, otherwise the loop might search through the whole
-+ memory. */
-+ if (__builtin_expect (haystack_len < needle_len, 0))
-+ return NULL;
-+
-+ for (begin = (const char *) haystack; begin <= last_possible; ++begin)
-+ if (begin[0] == ((const char *) needle)[0] &&
-+ !memcmp ((const void *) &begin[1],
-+ (const void *) ((const char *) needle + 1),
-+ needle_len - 1))
-+ return (void *) begin;
-+
-+ return NULL;
-+}
-+#endif
-
- #define KSYM_NAME_LEN 127
-
+++ /dev/null
---- linux-2.6.19.2/include/linux/stddef.h.old 2007-02-14 03:34:54.861805424 +0100
-+++ linux-2.6.19.2/include/linux/stddef.h 2007-02-14 03:35:06.331061832 +0100
-@@ -16,6 +16,7 @@
- false = 0,
- true = 1
- };
-+#endif /* __KERNEL__ */
-
- #undef offsetof
- #ifdef __compiler_offsetof
-@@ -23,6 +24,5 @@
- #else
- #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
- #endif
--#endif /* __KERNEL__ */
-
- #endif
+++ /dev/null
-diff -urN linux-2.6.19.2/scripts/gen_initramfs_list.sh linux-2.6.19.2.new/scripts/gen_initramfs_list.sh
---- linux-2.6.19.2/scripts/gen_initramfs_list.sh 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.new/scripts/gen_initramfs_list.sh 2007-05-03 16:25:06.000000000 +0200
-@@ -120,9 +120,9 @@
- ;;
- "nod")
- local dev_type=
-- local maj=$(LC_ALL=C ls -l "${location}" | \
-+ local maj=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
- gawk '{sub(/,/, "", $5); print $5}')
-- local min=$(LC_ALL=C ls -l "${location}" | \
-+ local min=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
- gawk '{print $6}')
-
- if [ -b "${location}" ]; then
-@@ -133,7 +133,7 @@
- str="${ftype} ${name} ${str} ${dev_type} ${maj} ${min}"
- ;;
- "slink")
-- local target=$(LC_ALL=C ls -l "${location}" | \
-+ local target=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
- gawk '{print $11}')
- str="${ftype} ${name} ${target} ${str}"
- ;;
+++ /dev/null
-diff -urN linux-2.6.19.2.orig/drivers/net/wireless/zd1211rw/zd_usb.c linux-2.6.19.2/drivers/net/wireless/zd1211rw/zd_usb.c
---- linux-2.6.19.2.orig/drivers/net/wireless/zd1211rw/zd_usb.c 2007-06-13 23:14:44.000000000 +0200
-+++ linux-2.6.19.2/drivers/net/wireless/zd1211rw/zd_usb.c 2007-06-13 23:19:51.000000000 +0200
-@@ -47,11 +47,13 @@
- { USB_DEVICE(0x0586, 0x3402), .driver_info = DEVICE_ZD1211 },
- { USB_DEVICE(0x0b3b, 0x5630), .driver_info = DEVICE_ZD1211 },
- { USB_DEVICE(0x0b05, 0x170c), .driver_info = DEVICE_ZD1211 },
-+ { USB_DEVICE(0x0586, 0x3401), .driver_info = DEVICE_ZD1211 },
- /* ZD1211B */
- { USB_DEVICE(0x0ace, 0x1215), .driver_info = DEVICE_ZD1211B },
- { USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B },
- { USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B },
- { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B },
-+
- /* "Driverless" devices that need ejecting */
- { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER },
- {}
-Binary files linux-2.6.19.2.orig/drivers/net/wireless/zd1211rw/.zd_usb.c.swp and linux-2.6.19.2/drivers/net/wireless/zd1211rw/.zd_usb.c.swp differ
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/default
- NAME:=Normal (default)
-endef
-
-define Profile/default/Description
- Normal Foxboard setup (no vhdl)
-endef
-$(eval $(call Profile,default))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/vhdl_no_fb
- NAME:=FOXVHDL no fb
-# PACKAGES:=kmod-madwifi
-endef
-
-define Profile/vhdl_no_fb/Description
- Setup the Foxboard for FOXVHDL support with no framebuffer
-endef
-$(eval $(call Profile,vhdl_no_fb))
-
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=arm
-BOARD:=iop32x
-BOARDNAME:=Intel XScale IOP32x
-FEATURES:=squashfs jffs2
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-# Network configuration file
-
-config interface loopback
- option ifname lo
- option proto static
- option ipaddr 127.0.0.1
- option netmask 255.0.0.0
-
-config interface lan
- option ifname eth0
- option proto dhcp
+++ /dev/null
-# CONFIG_8139TOO is not set
-# CONFIG_AEABI is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_APM is not set
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP13XX is not set
-CONFIG_ARCH_IOP32X=y
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IQ80321 is not set
-# CONFIG_ARCH_IQ31244 is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_PNX4008 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARM=y
-# CONFIG_ARM_THUMB is not set
-# CONFIG_ARPD is not set
-# CONFIG_ARTHUR is not set
-CONFIG_ATA=m
-# CONFIG_ATA_GENERIC is not set
-# CONFIG_ATA_PIIX is not set
-# CONFIG_ATM is not set
-# CONFIG_ATMEL is not set
-# CONFIG_B44 is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BONDING is not set
-# CONFIG_BRIDGE_NF_EBTABLES is not set
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_BT is not set
-# CONFIG_CIFS_STATS is not set
-CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200 init=/etc/preinit"
-# CONFIG_CONFIGFS_FS is not set
-CONFIG_CPU_32=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-# CONFIG_CPU_DCACHE_DISABLE is not set
-CONFIG_CPU_TLB_V4WBI=y
-CONFIG_CPU_XSCALE=y
-CONFIG_CRC16=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-CONFIG_CRYPTO_BLKCIPHER=m
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-CONFIG_CRYPTO_CBC=m
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HMAC=y
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=m
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_USER is not set
-CONFIG_DEFAULT_TCP_CONG="westwood"
-# CONFIG_DEFAULT_VEGAS is not set
-CONFIG_DEFAULT_WESTWOOD=y
-CONFIG_DLCI=m
-CONFIG_DLCI_COUNT=24
-CONFIG_DLCI_MAX=8
-# CONFIG_DM9000 is not set
-CONFIG_DNOTIFY=y
-# CONFIG_DSCC4 is not set
-# CONFIG_E100 is not set
-CONFIG_E1000=y
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
-CONFIG_E1000_NAPI=y
-# CONFIG_FARSYNC is not set
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-CONFIG_FRAME_POINTER=y
-# CONFIG_HAMRADIO is not set
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HDLC=m
-CONFIG_HDLC_CISCO=m
-CONFIG_HDLC_FR=m
-CONFIG_HDLC_PPP=m
-CONFIG_HDLC_RAW=m
-# CONFIG_HDLC_RAW_ETH is not set
-# CONFIG_HERMES is not set
-CONFIG_HWMON=y
-# CONFIG_HWMON_DEBUG_CHIP is not set
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=100
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ALGOPCA is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_IOP3XX is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PCA_ISA is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_IDE is not set
-# CONFIG_IEEE80211_SOFTMAC is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOP3XX_ATU=y
-# CONFIG_IP6_NF_MANGLE is not set
-# CONFIG_IP6_NF_MATCH_EUI64 is not set
-# CONFIG_IP6_NF_MATCH_FRAG is not set
-# CONFIG_IP6_NF_MATCH_HL is not set
-# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-# CONFIG_IP6_NF_MATCH_OPTS is not set
-# CONFIG_IP6_NF_MATCH_OWNER is not set
-# CONFIG_IP6_NF_MATCH_RT is not set
-# CONFIG_IP6_NF_TARGET_LOG is not set
-# CONFIG_IPV6_ROUTER_PREF is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_DCCP is not set
-CONFIG_IP_MROUTE=y
-# CONFIG_IP_NF_AMANDA is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_CT_PROTO_SCTP is not set
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-# CONFIG_IP_NF_MATCH_ECN is not set
-# CONFIG_IP_NF_MATCH_HASHLIMIT is not set
-# CONFIG_IP_NF_MATCH_RECENT is not set
-# CONFIG_IP_NF_MATCH_TIME is not set
-# CONFIG_IP_NF_PPTP is not set
-# CONFIG_IP_NF_SET is not set
-# CONFIG_IP_NF_TARGET_ECN is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-CONFIG_IP_NF_TARGET_REDIRECT=m
-# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_NF_TARGET_TTL is not set
-# CONFIG_IP_NF_TARGET_ULOG is not set
-# CONFIG_IP_NF_TFTP is not set
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_IWMMXT is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFS_FS is not set
-# CONFIG_LANMEDIA is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_LIBCRC32C is not set
-# CONFIG_LLC2 is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MACH_GLANTANK is not set
-CONFIG_MACH_N2100=y
-# CONFIG_MINIX_FS is not set
-CONFIG_MINI_FO=y
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_AFS_PARTS is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-# CONFIG_MTD_CFI_AMDSTD is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_NET_CLS_ACT is not set
-# CONFIG_NET_CLS_IND is not set
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_SCH_NETEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NO_IDLE_HZ is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NVRAM is not set
-# CONFIG_PATA_ALI is not set
-# CONFIG_PATA_AMD is not set
-CONFIG_PATA_ARTOP=m
-# CONFIG_PATA_ATIIXP is not set
-# CONFIG_PATA_CMD64X is not set
-# CONFIG_PATA_CS5520 is not set
-# CONFIG_PATA_CS5530 is not set
-# CONFIG_PATA_CYPRESS is not set
-# CONFIG_PATA_EFAR is not set
-# CONFIG_PATA_HPT366 is not set
-# CONFIG_PATA_HPT37X is not set
-# CONFIG_PATA_HPT3X2N is not set
-# CONFIG_PATA_HPT3X3 is not set
-# CONFIG_PATA_IT821X is not set
-# CONFIG_PATA_JMICRON is not set
-# CONFIG_PATA_MPIIX is not set
-# CONFIG_PATA_NETCELL is not set
-# CONFIG_PATA_NS87410 is not set
-# CONFIG_PATA_OLDPIIX is not set
-# CONFIG_PATA_OPTI is not set
-# CONFIG_PATA_OPTIDMA is not set
-# CONFIG_PATA_PDC2027X is not set
-# CONFIG_PATA_PDC_OLD is not set
-# CONFIG_PATA_RADISYS is not set
-# CONFIG_PATA_RZ1000 is not set
-# CONFIG_PATA_SC1200 is not set
-# CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_SIL680 is not set
-# CONFIG_PATA_SIS is not set
-# CONFIG_PATA_TRIFLEX is not set
-# CONFIG_PATA_VIA is not set
-# CONFIG_PATA_WINBOND is not set
-# CONFIG_PC300 is not set
-# CONFIG_PCCARD is not set
-# CONFIG_PCI200SYN is not set
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_PDC_ADMA is not set
-CONFIG_PLAT_IOP=y
-# CONFIG_PM is not set
-# CONFIG_PPP is not set
-# CONFIG_PRISM54 is not set
-CONFIG_R8169=y
-CONFIG_R8169_NAPI=y
-CONFIG_R8169_VLAN=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DEBUG is not set
-# CONFIG_RTC_DRV_DS1307 is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_ISL1208 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-CONFIG_RTC_DRV_PCF8563=y
-# CONFIG_RTC_DRV_PCF8583 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-# CONFIG_RTC_DRV_TEST is not set
-# CONFIG_RTC_DRV_V3020 is not set
-CONFIG_RTC_DRV_X1205=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_LIB=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_SATA_AHCI is not set
-# CONFIG_SATA_MV is not set
-# CONFIG_SATA_NV is not set
-# CONFIG_SATA_PROMISE is not set
-# CONFIG_SATA_QSTOR is not set
-# CONFIG_SATA_SIL is not set
-# CONFIG_SATA_SIL24 is not set
-# CONFIG_SATA_SIS is not set
-# CONFIG_SATA_SVW is not set
-# CONFIG_SATA_SX4 is not set
-# CONFIG_SATA_ULI is not set
-# CONFIG_SATA_VIA is not set
-# CONFIG_SATA_VITESSE is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SENSORS_ABITUGURU is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1029 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_SIS5595 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47M192 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_VT8231 is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83791D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83793 is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SHMEM is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_SMC91X is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_SWAP is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_LP is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
-CONFIG_TCP_CONG_VEGAS=m
-# CONFIG_TCP_CONG_VENO is not set
-CONFIG_TCP_CONG_WESTWOOD=y
-CONFIG_TINY_SHMEM=y
-# CONFIG_TUN is not set
-CONFIG_UID16=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USBPCWATCHDOG is not set
-# CONFIG_USB_ACM is not set
-CONFIG_USB_BANDWIDTH=y
-# CONFIG_USB_CATC is not set
-CONFIG_USB_EHCI_HCD=m
-# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-# CONFIG_USB_EHCI_SPLIT_ISO is not set
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-# CONFIG_USB_KAWETH is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_STORAGE_ALAUDA is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_USBAT is not set
-CONFIG_USB_UHCI_HCD=m
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USBNET_MII is not set
-# CONFIG_USB_ZD1201 is not set
-CONFIG_VECTORS_BASE=0xffff0000
-# CONFIG_VIA_RHINE is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WAN=y
-# CONFIG_WANXL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_XIP_KERNEL is not set
-CONFIG_XSCALE_PMU=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Image/Prepare
- cp $(LINUX_DIR)/arch/arm/boot/zImage $(KDIR)/zImage
-endef
-
-define Image/BuildKernel
- cp $(KDIR)/zImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-zImage
-#
-# XXX - FIXME
-#
-# BIN_DIR=$(BIN_DIR) $(TOPDIR)/scripts/arm-magic.sh
-endef
-
-define Image/Build
- $(call Image/Build/$(1),$(1))
-endef
-
-define Image/Build/jffs2-64k
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=65536 conv=sync
-endef
-
-define Image/Build/jffs2-128k
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=131072 conv=sync
- $(call Image/Build/slug,$(1))
-endef
-
-define Image/Build/squashfs
- $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=131072 conv=sync
- $(call Image/Build/slug,$(1))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=arm
-BOARD:=pxa
-BOARDNAME:=PXA
-FEATURES:=jffs2 broken
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Stub for boards based on intel PXA
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-# CONFIG_AEABI is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_APM is not set
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_AT91RM9200 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_LH7A40X is not set
-CONFIG_ARCH_LUBBOCK=y
-CONFIG_ARCH_MTD_XIP=y
-# CONFIG_ARCH_OMAP is not set
-CONFIG_ARCH_PXA=y
-# CONFIG_ARCH_PXA_IDP is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARM=y
-# CONFIG_ARM_THUMB is not set
-# CONFIG_ARPD is not set
-# CONFIG_ARTHUR is not set
-# CONFIG_ATM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_BONDING is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_BT is not set
-# CONFIG_CIFS is not set
-# CONFIG_CLS_U32_MARK is not set
-# CONFIG_CLS_U32_PERF is not set
-CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=jffs2 console=tty0 console=ttyS2,115200 mem=16M"
-# CONFIG_CONFIGFS_FS is not set
-CONFIG_CONNECTOR=m
-CONFIG_CPU_32=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_FREQ=y
-# CONFIG_CPU_FREQ_DEBUG is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_PXA=y
-# CONFIG_CPU_FREQ_STAT is not set
-CONFIG_CPU_FREQ_TABLE=y
-CONFIG_CPU_TLB_V4WBI=y
-CONFIG_CPU_XSCALE=y
-CONFIG_CRAMFS=y
-# CONFIG_CRC16 is not set
-CONFIG_CRC_CCITT=y
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_USER is not set
-CONFIG_DMABOUNCE=y
-CONFIG_DNOTIFY=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-CONFIG_FB=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_FIRMWARE_EDID=y
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_MODE_HELPERS is not set
-CONFIG_FB_PXA=y
-# CONFIG_FB_PXA_PARAMETERS is not set
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_TILEBLITTING=y
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FONTS=y
-# CONFIG_FONT_10x18 is not set
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_7x14 is not set
-# CONFIG_FONT_8x16 is not set
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_ACORN_8x8 is not set
-# CONFIG_FONT_MINI_4x6 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_SUN8x16 is not set
-CONFIG_FORCE_MAX_ZONEORDER=9
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FRAME_POINTER=y
-CONFIG_GTEK_LCD=y
-# CONFIG_HAMRADIO is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HOSTAP is not set
-CONFIG_HW_CONSOLE=y
-CONFIG_HZ=100
-CONFIG_I2C=y
-# CONFIG_I2C_ALGOBIT is not set
-CONFIG_I2C_ALGOPCA=y
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_PXA=y
-# CONFIG_I2C_PXA_SLAVE is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_IDE is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_IKCONFIG is not set
-# CONFIG_INET6_AH is not set
-# CONFIG_INET6_ESP is not set
-# CONFIG_INET6_IPCOMP is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_INOTIFY is not set
-CONFIG_INPUT=y
-# CONFIG_INPUT_EVDEV is not set
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_IP6_NF_MATCH_FRAG is not set
-# CONFIG_IP6_NF_MATCH_HL is not set
-# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-# CONFIG_IP6_NF_MATCH_OPTS is not set
-# CONFIG_IP6_NF_MATCH_RT is not set
-# CONFIG_IP6_NF_RAW is not set
-# CONFIG_IP6_NF_TARGET_HL is not set
-# CONFIG_IP6_NF_TARGET_LOG is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_CT_PROTO_SCTP is not set
-CONFIG_IP_NF_FTP=y
-CONFIG_IP_NF_IRC=y
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-CONFIG_IP_NF_MATCH_DSCP=m
-# CONFIG_IP_NF_MATCH_HASHLIMIT is not set
-CONFIG_IP_NF_NAT_FTP=y
-CONFIG_IP_NF_NAT_IRC=y
-CONFIG_IP_NF_TARGET_DSCP=m
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_ROUTE_VERBOSE is not set
-# CONFIG_ISO9660_FS is not set
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFS_FS is not set
-CONFIG_KEYBOARD_ATKBD=y
-CONFIG_KEYBOARD_GTEK=y
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-CONFIG_KMOD=y
-# CONFIG_LEDS is not set
-# CONFIG_LIBCRC32C is not set
-# CONFIG_LLC2 is not set
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_CLUT224=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_MACH_GTEK=y
-# CONFIG_MACH_LOGICPD_PXA270 is not set
-# CONFIG_MACH_MAINSTONE is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_MSDOS_FS is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_AFS_PARTS is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-# CONFIG_MTD_CFI_AMDSTD is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_CONCAT=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_LUBBOCK=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SHARP_SL is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_XIP is not set
-CONFIG_NET_DIVERT=y
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_ETHERNET is not set
-# CONFIG_NET_IPGRE_BROADCAST is not set
-# CONFIG_NET_KEY is not set
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NET_SCH_NETEM is not set
-# CONFIG_NET_WIRELESS_RTNETLINK is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_NLS is not set
-# CONFIG_NO_IDLE_HZ is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NVRAM is not set
-CONFIG_OBSOLETE_INTERMODULE=y
-# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCMCIA is not set
-# CONFIG_PCCARD is not set
-CONFIG_PM=y
-# CONFIG_PM_DEBUG is not set
-CONFIG_PM_LEGACY=y
-CONFIG_PPP=y
-# CONFIG_PPPOE is not set
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_DEFLATE=y
-# CONFIG_PPP_MPPE is not set
-CONFIG_PPP_SYNC_TTY=y
-CONFIG_PXA25x=y
-# CONFIG_PXA_SHARPSL is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-CONFIG_RTC_DRV_SA1100=y
-# CONFIG_RTC_DRV_TEST is not set
-# CONFIG_RTC_DRV_X1205 is not set
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_LIB=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SA1111=y
-# CONFIG_SCSI is not set
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_SERIO=y
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_SERIO_SA1111 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SMB_FS is not set
-CONFIG_SND=y
-CONFIG_SND_AC97_BUS=y
-CONFIG_SND_AC97_CODEC=y
-CONFIG_SND_DUMMY=m
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM=y
-CONFIG_SND_PCM_OSS=y
-CONFIG_SND_PXA2XX_AC97=y
-CONFIG_SND_PXA2XX_PCM=y
-CONFIG_SND_SEQUENCER=y
-# CONFIG_SND_SEQUENCER_OSS is not set
-# CONFIG_SND_SEQ_DUMMY is not set
-CONFIG_SND_SUPPORT_OLD_API=y
-CONFIG_SND_TIMER=y
-# CONFIG_SND_VIRMIDI is not set
-CONFIG_SOUND=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_SQUASHFS is not set
-# CONFIG_TELCLOCK is not set
-# CONFIG_TUN is not set
-# CONFIG_UDF_FS is not set
-CONFIG_UID16=y
-# CONFIG_UNWIND_INFO is not set
-# CONFIG_USB is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_RNDIS=y
-# CONFIG_USB_FILE_STORAGE is not set
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGETFS=m
-# CONFIG_USB_GADGET_AT91 is not set
-CONFIG_USB_GADGET_DEBUG_FILES=y
-# CONFIG_USB_GADGET_DUALSPEED is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_OMAP is not set
-CONFIG_USB_GADGET_PXA2XX=y
-CONFIG_USB_GADGET_SELECTED=y
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_PXA2XX=m
-# CONFIG_USB_PXA2XX_SMALL is not set
-# CONFIG_USB_ZERO is not set
-CONFIG_VECTORS_BASE=0xffff0000
-# CONFIG_VFAT_FS is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_VLAN_8021Q is not set
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-# CONFIG_WATCHDOG is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_XIP_KERNEL is not set
-CONFIG_XSCALE_PMU=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
+++ /dev/null
-../generic-2.6/image/
\ No newline at end of file
+++ /dev/null
-diff -Nurbw linux-2.6.17/arch/arm/Kconfig linux-2.6.17-patched/arch/arm/Kconfig
---- linux-2.6.17/arch/arm/Kconfig 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/Kconfig 2006-09-21 14:57:02.000000000 -0700
-@@ -656,7 +656,7 @@
-
- endmenu
-
--if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
-+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
-
- menu "CPU Frequency scaling"
-
-@@ -685,6 +685,13 @@
-
- endmenu
-
-+config CPU_FREQ_PXA
-+ bool
-+ depends on CPU_FREQ && ARCH_PXA
-+ default y
-+ select CPU_FREQ_DEFAULT_GOV_USERSPACE
-+ select CPU_FREQ_TABLE
-+
- endif
-
- menu "Floating point emulation"
-diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c
---- linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c 1969-12-31 16:00:00.000000000 -0800
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c 2006-09-21 14:57:02.000000000 -0700
-@@ -0,0 +1,324 @@
-+/*
-+ * linux/arch/arm/mach-pxa/cpu-pxa.c
-+ *
-+ * Copyright (C) 2002,2003 Intrinsyc Software
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ *
-+ * History:
-+ * 31-Jul-2002 : Initial version [FB]
-+ * 29-Jan-2003 : added PXA255 support [FB]
-+ * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
-+ *
-+ * Note:
-+ * This driver may change the memory bus clock rate, but will not do any
-+ * platform specific access timing changes... for example if you have flash
-+ * memory connected to CS0, you will need to register a platform specific
-+ * notifier which will adjust the memory access strobes to maintain a
-+ * minimum strobe width.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/sched.h>
-+#include <linux/init.h>
-+#include <linux/cpufreq.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/arch/pxa-regs.h>
-+
-+#undef DEBUG
-+
-+#ifdef DEBUG
-+ static unsigned int freq_debug = DEBUG;
-+ module_param(freq_debug, int, 0);
-+ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
-+#else
-+ #define freq_debug 0
-+#endif
-+
-+typedef struct
-+{
-+ unsigned int khz;
-+ unsigned int membus;
-+ unsigned int cccr;
-+ unsigned int div2;
-+} pxa_freqs_t;
-+
-+/* Define the refresh period in mSec for the SDRAM and the number of rows */
-+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
-+#define SDRAM_ROWS 2048 /* 64MB=8192 32MB=4096 */
-+#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
-+
-+#define CCLKCFG_TURBO 0x1
-+#define CCLKCFG_FCS 0x2
-+#define PXA25x_MIN_FREQ 99533
-+#define PXA25x_MAX_FREQ 530842
-+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
-+#define MDREFR_DRI_MASK 0xFFF
-+
-+
-+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
-+static pxa_freqs_t pxa255_run_freqs[] =
-+{
-+ /* CPU MEMBUS CCCR DIV2*/
-+ { 99533, 99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
-+ {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
-+ {199066, 99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
-+ {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
-+ {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
-+ {398131, 99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99, SDRAM=99 */
-+ {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
-+ {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
-+ {0,}
-+};
-+#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
-+
-+static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
-+
-+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
-+static pxa_freqs_t pxa255_turbo_freqs[] =
-+{
-+ /* CPU MEMBUS CCCR DIV2*/
-+ { 99533, 99533, 0x121, 1}, /* run=99, turbo= 99, PXbus=99, SDRAM=50 */
-+ {149299, 99533, 0x1a1, 0}, /* run=99, turbo=149, PXbus=99, SDRAM=99 */
-+ {199066, 99533, 0x221, 0}, /* run=99, turbo=199, PXbus=99, SDRAM=99 */
-+ {298598, 99533, 0x321, 0}, /* run=99, turbo=299, PXbus=99, SDRAM=99 */
-+ {398131, 99533, 0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
-+ {0,}
-+};
-+#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
-+
-+static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
-+
-+extern unsigned get_clk_frequency_khz(int info);
-+
-+/* find a valid frequency point */
-+static int pxa_verify_policy(struct cpufreq_policy *policy)
-+{
-+ int ret;
-+ struct cpufreq_frequency_table *pxa_freqs_table;
-+
-+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-+ pxa_freqs_table = pxa255_run_freq_table;
-+ } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-+ pxa_freqs_table = pxa255_turbo_freq_table;
-+ } else {
-+ printk("CPU PXA: Unknown policy found. "
-+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
-+ pxa_freqs_table = pxa255_run_freq_table;
-+ }
-+ ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
-+
-+ if(freq_debug) {
-+ printk("Verified CPU policy: %dKhz min to %dKhz max\n",
-+ policy->min, policy->max);
-+ }
-+
-+ return ret;
-+}
-+
-+static int pxa_set_target(struct cpufreq_policy *policy,
-+ unsigned int target_freq,
-+ unsigned int relation)
-+{
-+ int idx;
-+ cpumask_t cpus_allowed;
-+ int cpu = policy->cpu;
-+ struct cpufreq_freqs freqs;
-+ pxa_freqs_t *pxa_freq_settings;
-+ struct cpufreq_frequency_table *pxa_freqs_table;
-+ unsigned long flags;
-+ unsigned int unused;
-+ unsigned int preset_mdrefr, postset_mdrefr;
-+ void *ramstart;
-+
-+ /*
-+ * Save this threads cpus_allowed mask.
-+ */
-+ cpus_allowed = current->cpus_allowed;
-+
-+ /*
-+ * Bind to the specified CPU. When this call returns,
-+ * we should be running on the right CPU.
-+ */
-+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
-+ BUG_ON(cpu != smp_processor_id());
-+
-+ /* Get the current policy */
-+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-+ pxa_freq_settings = pxa255_run_freqs;
-+ pxa_freqs_table = pxa255_run_freq_table;
-+ }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-+ pxa_freq_settings = pxa255_turbo_freqs;
-+ pxa_freqs_table = pxa255_turbo_freq_table;
-+ }else {
-+ printk("CPU PXA: Unknown policy found. "
-+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
-+ pxa_freq_settings = pxa255_run_freqs;
-+ pxa_freqs_table = pxa255_run_freq_table;
-+ }
-+
-+ /* Lookup the next frequency */
-+ if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
-+ target_freq, relation, &idx)) {
-+ return -EINVAL;
-+ }
-+
-+ freqs.old = policy->cur;
-+ freqs.new = pxa_freq_settings[idx].khz;
-+ freqs.cpu = policy->cpu;
-+ if(freq_debug) {
-+ printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
-+ freqs.new/1000, (pxa_freq_settings[idx].div2) ?
-+ (pxa_freq_settings[idx].membus/2000) :
-+ (pxa_freq_settings[idx].membus/1000));
-+ }
-+
-+ ramstart = phys_to_virt(0xa0000000);
-+
-+ /*
-+ * Tell everyone what we're about to do...
-+ * you should add a notify client with any platform specific
-+ * Vcc changing capability
-+ */
-+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-+
-+ /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
-+ * we need to preset the smaller DRI before the change. If we're speeding
-+ * up we need to set the larger DRI value after the change.
-+ */
-+ preset_mdrefr = postset_mdrefr = MDREFR;
-+ if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
-+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
-+ MDREFR_DRI(pxa_freq_settings[idx].membus);
-+ }
-+ postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
-+ MDREFR_DRI(pxa_freq_settings[idx].membus);
-+
-+ /* If we're dividing the memory clock by two for the SDRAM clock, this
-+ * must be set prior to the change. Clearing the divide must be done
-+ * after the change.
-+ */
-+ if(pxa_freq_settings[idx].div2) {
-+ preset_mdrefr |= MDREFR_DB2_MASK;
-+ postset_mdrefr |= MDREFR_DB2_MASK;
-+ } else {
-+ postset_mdrefr &= ~MDREFR_DB2_MASK;
-+ }
-+
-+ local_irq_save(flags);
-+
-+ /* Set new the CCCR */
-+ CCCR = pxa_freq_settings[idx].cccr;
-+
-+ __asm__ __volatile__(" \
-+ ldr r4, [%1] ; /* load MDREFR */ \
-+ b 2f ; \
-+ .align 5 ; \
-+1: \
-+ str %4, [%1] ; /* preset the MDREFR */ \
-+ mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
-+ str %5, [%1] ; /* postset the MDREFR */ \
-+ \
-+ b 3f ; \
-+2: b 1b ; \
-+3: nop ; \
-+ "
-+ : "=&r" (unused)
-+ : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
-+ "r" (preset_mdrefr), "r" (postset_mdrefr)
-+ : "r4", "r5");
-+ local_irq_restore(flags);
-+
-+ /*
-+ * Restore the CPUs allowed mask.
-+ */
-+ set_cpus_allowed(current, cpus_allowed);
-+
-+ /*
-+ * Tell everyone what we've just done...
-+ * you should add a notify client with any platform specific
-+ * SDRAM refresh timer adjustments
-+ */
-+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-+
-+ return 0;
-+}
-+
-+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
-+{
-+ cpumask_t cpus_allowed;
-+ unsigned int cpu = policy->cpu;
-+ int i;
-+
-+ cpus_allowed = current->cpus_allowed;
-+
-+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
-+ BUG_ON(cpu != smp_processor_id());
-+
-+ /* set default policy and cpuinfo */
-+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
-+ policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
-+ policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
-+ policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
-+ policy->cur = get_clk_frequency_khz(0); /* current freq */
-+ policy->min = policy->max = policy->cur;
-+
-+ /* Generate the run cpufreq_frequency_table struct */
-+ for(i=0;i<NUM_RUN_FREQS;i++) {
-+ pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
-+ pxa255_run_freq_table[i].index = i;
-+ }
-+ pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
-+ /* Generate the turbo cpufreq_frequency_table struct */
-+ for(i=0;i<NUM_TURBO_FREQS;i++) {
-+ pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
-+ pxa255_turbo_freq_table[i].index = i;
-+ }
-+ pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
-+
-+ set_cpus_allowed(current, cpus_allowed);
-+ printk(KERN_INFO "PXA CPU frequency change support initialized\n");
-+
-+ return 0;
-+}
-+
-+static struct cpufreq_driver pxa_cpufreq_driver = {
-+ .verify = pxa_verify_policy,
-+ .target = pxa_set_target,
-+ .init = pxa_cpufreq_init,
-+ .name = "PXA25x",
-+};
-+
-+static int __init pxa_cpu_init(void)
-+{
-+ return cpufreq_register_driver(&pxa_cpufreq_driver);
-+}
-+
-+static void __exit pxa_cpu_exit(void)
-+{
-+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
-+}
-+
-+
-+MODULE_AUTHOR ("Intrinsyc Software Inc.");
-+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
-+MODULE_LICENSE("GPL");
-+module_init(pxa_cpu_init);
-+module_exit(pxa_cpu_exit);
-+
-diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/Makefile linux-2.6.17-patched/arch/arm/mach-pxa/Makefile
---- linux-2.6.17/arch/arm/mach-pxa/Makefile 2006-09-21 15:11:33.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/Makefile 2006-09-21 14:57:02.000000000 -0700
-@@ -30,5 +30,6 @@
- obj-$(CONFIG_PM) += pm.o sleep.o
- obj-$(CONFIG_PXA_SSP) += ssp.o
-+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
-
- ifeq ($(CONFIG_PXA27x),y)
- obj-$(CONFIG_PM) += standby.o
-diff -Nurbw linux-2.6.17/Documentation/cpu-freq/user-guide.txt linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt
---- linux-2.6.17/Documentation/cpu-freq/user-guide.txt 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt 2006-09-21 14:57:02.000000000 -0700
-@@ -18,7 +18,7 @@
- Contents:
- ---------
- 1. Supported Architectures and Processors
--1.1 ARM
-+1.1 ARM, PXA
- 1.2 x86
- 1.3 sparc64
- 1.4 ppc
-@@ -37,14 +37,15 @@
- 1. Supported Architectures and Processors
- =========================================
-
--1.1 ARM
---------
-+1.1 ARM, PXA
-+------------
-
- The following ARM processors are supported by cpufreq:
-
- ARM Integrator
- ARM-SA1100
- ARM-SA1110
-+Intel PXA
-
-
- 1.2 x86
-diff -Nurbw linux-2.6.17/drivers/cpufreq/Kconfig linux-2.6.17-patched/drivers/cpufreq/Kconfig
---- linux-2.6.17/drivers/cpufreq/Kconfig 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/Kconfig 2006-09-21 15:06:12.000000000 -0700
-@@ -46,13 +46,9 @@
- This will show detail CPU frequency translation table in sysfs file
- system
-
--# Note that it is not currently possible to set the other governors (such as ondemand)
--# as the default, since if they fail to initialise, cpufreq will be
--# left in an undefined state.
--
- choice
- prompt "Default CPUFreq governor"
-- default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
-+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
- default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
- help
- This option sets which CPUFreq governor shall be loaded at
-@@ -66,6 +62,14 @@
- the frequency statically to the highest frequency supported by
- the CPU.
-
-+config CPU_FREQ_DEFAULT_GOV_POWERSAVE
-+ bool "powersave"
-+ select CPU_FREQ_GOV_POWERSAVE
-+ help
-+ Use the CPUFreq governor 'powersave' as default. This sets
-+ the frequency statically to the lowest frequency supported by
-+ the CPU.
-+
- config CPU_FREQ_DEFAULT_GOV_USERSPACE
- bool "userspace"
- select CPU_FREQ_GOV_USERSPACE
-@@ -75,6 +79,23 @@
- program shall be able to set the CPU dynamically without having
- to enable the userspace governor manually.
-
-+config CPU_FREQ_DEFAULT_GOV_ONDEMAND
-+ bool "ondemand"
-+ select CPU_FREQ_GOV_ONDEMAND
-+ help
-+ Use the CPUFreq governor 'ondemand' as default. This sets
-+ the frequency dynamically based on CPU load, throttling up
-+ and down as necessary.
-+
-+config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
-+ bool "conservative"
-+ select CPU_FREQ_GOV_CONSERVATIVE
-+ help
-+ Use the CPUFreq governor 'conservative' as default. This sets
-+ the frequency dynamically based on CPU load, throttling up
-+ and down as necessary. The frequency is gracefully increased
-+ and decreased rather than jumping to 100% when speed is required.
-+
- endchoice
-
- config CPU_FREQ_GOV_PERFORMANCE
-diff -Nurbw linux-2.6.17/include/linux/cpufreq.h linux-2.6.17-patched/include/linux/cpufreq.h
---- linux-2.6.17/include/linux/cpufreq.h 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/include/linux/cpufreq.h 2006-09-21 15:08:35.000000000 -0700
-@@ -276,9 +276,18 @@
- #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
- extern struct cpufreq_governor cpufreq_gov_performance;
- #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_performance
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE)
-+extern struct cpufreq_governor cpufreq_gov_powersave;
-+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_powersave
- #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
- extern struct cpufreq_governor cpufreq_gov_userspace;
- #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
-+extern struct cpufreq_governor cpufreq_gov_ondemand;
-+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_ondemand;
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
-+extern struct cpufreq_governor cpufreq_gov_conservative;
-+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_conservative;
- #endif
-
-
-diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c
---- linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c 2006-09-21 15:26:46.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c 2006-06-17 18:49:35.000000000 -0700
-@@ -529,7 +529,7 @@
- return 0;
- }
-
--static struct cpufreq_governor cpufreq_gov_dbs = {
-+struct cpufreq_governor cpufreq_gov_conservative = {
- .name = "conservative",
- .governor = cpufreq_governor_dbs,
- .owner = THIS_MODULE,
-@@ -537,7 +537,7 @@
-
- static int __init cpufreq_gov_dbs_init(void)
- {
-- return cpufreq_register_governor(&cpufreq_gov_dbs);
-+ return cpufreq_register_governor(&cpufreq_gov_conservative);
- }
-
- static void __exit cpufreq_gov_dbs_exit(void)
-@@ -545,7 +545,7 @@
- /* Make sure that the scheduled work is indeed not running */
- flush_scheduled_work();
-
-- cpufreq_unregister_governor(&cpufreq_gov_dbs);
-+ cpufreq_unregister_governor(&cpufreq_gov_conservative);
- }
-
-
-diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c
---- linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c 2006-09-27 14:00:15.000000000 -0700
-@@ -484,7 +484,7 @@
- return 0;
- }
-
--static struct cpufreq_governor cpufreq_gov_dbs = {
-+struct cpufreq_governor cpufreq_gov_ondemand = {
- .name = "ondemand",
- .governor = cpufreq_governor_dbs,
- .owner = THIS_MODULE,
-@@ -492,7 +492,7 @@
-
- static int __init cpufreq_gov_dbs_init(void)
- {
-- return cpufreq_register_governor(&cpufreq_gov_dbs);
-+ return cpufreq_register_governor(&cpufreq_gov_ondemand);
- }
-
- static void __exit cpufreq_gov_dbs_exit(void)
-@@ -504,7 +504,7 @@
- destroy_workqueue(dbs_workq);
- }
-
-- cpufreq_unregister_governor(&cpufreq_gov_dbs);
-+ cpufreq_unregister_governor(&cpufreq_gov_ondemand);
- }
-
-
+++ /dev/null
-diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/pm.c linux-2.6.17-patched/arch/arm/mach-pxa/pm.c
---- linux-2.6.17/arch/arm/mach-pxa/pm.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/pm.c 2006-09-11 10:58:41.000000000 -0700
-@@ -10,35 +10,50 @@
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License.
- */
-+
- #include <linux/config.h>
- #include <linux/init.h>
--#include <linux/module.h>
--#include <linux/suspend.h>
-+#include <linux/pm.h>
-+#include <linux/slab.h>
-+#include <linux/sched.h>
-+#include <linux/interrupt.h>
-+#include <linux/sysctl.h>
- #include <linux/errno.h>
--#include <linux/time.h>
-
- #include <asm/hardware.h>
- #include <asm/memory.h>
- #include <asm/system.h>
--#include <asm/arch/pm.h>
-+#include <asm/leds.h>
-+#include <asm/uaccess.h>
- #include <asm/arch/pxa-regs.h>
- #include <asm/arch/lubbock.h>
- #include <asm/mach/time.h>
-
-+/**/
-+#include <linux/module.h>
-+/**/
-+//kirti
-+#include <linux/delay.h>
-+//kirti~
-
- /*
- * Debug macros
- */
--#undef DEBUG
-+#define DEBUG
-+
-+extern void pxa_cpu_suspend(void);
-+extern void pxa_cpu_resume(void);
-+
-+int pm_pwronoff;
-+/*Angelia Additions */
-+int pm_pedr=0;
-+EXPORT_SYMBOL(pm_pwronoff);
-+EXPORT_SYMBOL(pm_pedr);
-+
-
- #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
- #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
-
--#define RESTORE_GPLEVEL(n) do { \
-- GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
-- GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
--} while (0)
--
- /*
- * List of global PXA peripheral registers to preserve.
- * More ones like CP and general purpose register values are preserved
-@@ -46,97 +61,405 @@
- */
- enum { SLEEP_SAVE_START = 0,
-
-- SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
-- SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
-- SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
-- SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
-- SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
--
-- SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
-- SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
-- SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
-- SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
-+ SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
-+ SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
-
-- SLEEP_SAVE_PSTR,
-+ SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
-+ SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
-+ SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
-+ SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR2_L,
-+ SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_U, SLEEP_SAVE_GAFR2_U,
-+
-+ SLEEP_SAVE_FFIER, SLEEP_SAVE_FFLCR, SLEEP_SAVE_FFMCR,
-+ SLEEP_SAVE_FFSPR, SLEEP_SAVE_FFISR,
-+ SLEEP_SAVE_FFDLL, SLEEP_SAVE_FFDLH,SLEEP_SAVE_FFFCR,
-+
-+ SLEEP_SAVE_STIER, SLEEP_SAVE_STLCR, SLEEP_SAVE_STMCR,
-+ SLEEP_SAVE_STSPR, SLEEP_SAVE_STISR,
-+ SLEEP_SAVE_STDLL, SLEEP_SAVE_STDLH,
-+
-+ SLEEP_SAVE_BTIER, SLEEP_SAVE_BTLCR, SLEEP_SAVE_BTMCR,
-+ SLEEP_SAVE_BTSPR, SLEEP_SAVE_BTISR,
-+ SLEEP_SAVE_BTDLL, SLEEP_SAVE_BTDLH,
-
- SLEEP_SAVE_ICMR,
- SLEEP_SAVE_CKEN,
-
--#ifdef CONFIG_PXA27x
-- SLEEP_SAVE_MDREFR,
-- SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
-- SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
--#endif
-+ SLEEP_SAVE_LCCR0, SLEEP_SAVE_LCCR1, SLEEP_SAVE_LCCR2,SLEEP_SAVE_LCCR3,
-+ SLEEP_SAVE_TMEDCR, SLEEP_SAVE_FDADR0, SLEEP_SAVE_FSADR0,SLEEP_SAVE_FIDR0,SLEEP_SAVE_FDADR1,
-+ SLEEP_SAVE_LDCMD0,
-+
-+ SLEEP_SAVE_NSSCR0,SLEEP_SAVE_NSSCR1,SLEEP_SAVE_NSSSR,SLEEP_SAVE_NSSITR,SLEEP_SAVE_NSSDR,
-+ SLEEP_SAVE_NSSTO,SLEEP_SAVE_NSSPSP,
-
-- SLEEP_SAVE_CKSUM,
-
-+ SLEEP_SAVE_CKSUM,
- SLEEP_SAVE_SIZE
- };
-
-+/**/
-+#define UART_DTR 1
-+#define UART_RTS 2
-+
-+/**/
-
--int pxa_pm_enter(suspend_state_t state)
-+int pm_do_suspend(void)
- {
- unsigned long sleep_save[SLEEP_SAVE_SIZE];
- unsigned long checksum = 0;
-- struct timespec delta, rtc;
- int i;
-+ int valbefore,valafter,valafter1;
-+ int gpsr0,gpsr1,gpsr2;
- extern void pxa_cpu_pm_enter(suspend_state_t state);
-
--#ifdef CONFIG_IWMMXT
-- /* force any iWMMXt context to ram **/
-- iwmmxt_task_disable(NULL);
--#endif
-+ // YoKu 16Feb06 GPIO Changed ----->
-+
-+ PGSR2 |= GPIO_bit(78);
-+/* if(GPLR2 & GPIO_bit(78)) // LCD Reset Pin
-+ PGSR2 |= GPIO_bit(78);
-+ else
-+ PGSR2 &= ~GPIO_bit(78); */
-+ GPDR0 &= ~GPIO_bit(0);
-+ GPDR0 &= ~GPIO_bit(1);
-+ GPDR0 &= ~GPIO_bit(3); //Tushar: 20 apr GPIO3 configured as input
-+ GPDR0 &= ~GPIO_bit(2);
-+// GPDR0 &= ~GPIO_bit(5);
-+// GPDR0 &= ~GPIO_bit(6);
-+// GPDR0 &= ~GPIO_bit(7);
-+// GPDR0 &= ~GPIO_bit(8);
-+
-+
-+// KeyCol pin Status in sleep mode
-+ PGSR0 &= ~GPIO_bit(9); //19
-+ PGSR0 &= ~GPIO_bit(10); //20
-+ PGSR0 &= ~GPIO_bit(11); //21
-+ PGSR0 &= ~GPIO_bit(12); //22
-+ PGSR0 &= ~GPIO_bit(13); //23
-+ PGSR0 &= ~GPIO_bit(14); //24
-+
-+ printk("KER_PM: Setting up wakeup sources 26May06\n");
-+
-+ // KeyPad
-+ //printk("KER_PM: Uncommented key pad wakeup sources\n");
-+ PWER |= GPIO_bit(5); //11
-+ PWER |= GPIO_bit(6); //12
-+ PWER |= GPIO_bit(7); //13
-+ PWER |= GPIO_bit(8); //14
-+ PFER |= GPIO_bit(5); //11
-+ PFER |= GPIO_bit(6); //12
-+ PFER |= GPIO_bit(7); //13
-+ PFER |= GPIO_bit(8); //14
-+ PRER |= GPIO_bit(5); //11
-+ PRER |= GPIO_bit(6); //12
-+ PRER |= GPIO_bit(7); //13
-+ PRER |= GPIO_bit(8); //14
-+
-+ // USB
-+ PWER |= GPIO_bit(3); //6
-+ PFER |= GPIO_bit(3); //6
-+ PRER |= GPIO_bit(3); //6
-+
-+ // PMU
-+ PWER |= GPIO_bit(2); //4
-+ PFER |= GPIO_bit(2); //4
-+ PRER |= GPIO_bit(2); //4
-+
-+ // Anup : GSM RI
-+ PWER |= GPIO_bit(0); //0
-+ PFER |= GPIO_bit(0); //0
-+ PRER |= GPIO_bit(0); //0
-+ // anup prashant : for gsm reset problem 19 may 2006
-+ //GPDR0 |= GPIO_bit(18); YoKu Commented this line, GPIO18 should be i/p pin to avoid GSM Reset pulse
-+ PGSR0 |= GPIO_bit(18); // GSM reset pin
-+ PGSR0 |= GPIO_bit(0); //
-+ PGSR1 |= GPIO_bit(38); // commneted .18 apr
-+ // <----- YoKu
-+
-+ // YoKu ----->
-+ // When exiting from sleep mode, 10us Low pulse comes on GSM Reset and Pwr pin
-+ // to avoid this configure GPIO 18,80 as input pins before going to sleep mode
-+ GPDR0 &= ~GPIO_bit(18);
-+ //GPDR2 &= ~GPIO_bit(80);
-+ // <----- YoKu
-+
-+ //kirti for RTC
-+ PWER |= PWER_RTC;
-+ //kirti cli();
-+ local_irq_disable();
-+ //kirti clf();
-+ local_fiq_disable();
-+ leds_event(led_stop);
-+
-+ /* Put Current time into RCNR */
-+ RCNR = xtime.tv_sec;
-
-- /* preserve current time */
-- rtc.tv_sec = RCNR;
-- rtc.tv_nsec = 0;
-- save_time_delta(&delta, &rtc);
-+ printk("11May2006 KERR: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
-+ printk("KER_PM_DELAY: SSCR Going to Sleep at RCNR =%d\n\n\n\n\n\n",RCNR);
-+
-+ /*
-+ * Temporary solution. This won't be necessary once
-+ * we move pxa support into the serial driver
-+ * Save the FF UART
-+ */
-+
-+ // Anup : commented for power saving mode problem
-+ printk("\nPM: Why doesnt it prnt?? 26May06\n");
-+ printk("\nPM : GSM Sleep Mode enabled");
-+
-+
-+ FFMCR &= ~UART_RTS;
-+ udelay(2000);
-+ udelay(2000);
-+ FFMCR &= ~UART_DTR ;
-+ udelay(2000);
-+
-+ udelay(2000);
-+ // rupali
-+ // Anup : Do not check here
-+/* if(!pm_pwronoff)
-+ {
-+ printk("\nPM : Modem Control Register = %x " , FFMCR);
-+ while( FFMSR & 0x00000020)
-+ {
-+ printk("\nPM : FFFSR = %x " , FFMSR);
-+ }
-+ } */
-+ udelay(2000);
-+
-+//Tushar: 19 apr
-+// NSSCR0 &= 0xFFFFFF7F;
-+// printk("\nPM: NSSCR0 = %x" ,NSSCR0 );
-+
-+ SAVE(FFIER);
-+ SAVE(FFLCR);
-+ SAVE(FFMCR);
-+ SAVE(FFSPR);
-+ SAVE(FFISR);
-+ FFLCR |= 0x80;
-+ SAVE(FFDLL);
-+ SAVE(FFDLH);
-+ SAVE(FFFCR);
-+ FFLCR &= 0xef;
-+
-+ SAVE(STIER);
-+ SAVE(STLCR);
-+ SAVE(STMCR);
-+ SAVE(STSPR);
-+ SAVE(STISR);
-+ STLCR |= 0x80;
-+ SAVE(STDLL);
-+ SAVE(STDLH);
-+ STLCR &= 0xef;
-+
-+ SAVE(BTIER);
-+ SAVE(BTLCR);
-+ SAVE(BTMCR);
-+ SAVE(BTSPR);
-+ SAVE(BTISR);
-+ BTLCR |= 0x80;
-+ SAVE(BTDLL);
-+ SAVE(BTDLH);
-+ BTLCR &= 0xef;
-+
-+ /* save vital registers */
-+ SAVE(OSCR);
-+ SAVE(OSMR0);
-+ SAVE(OSMR1);
-+ SAVE(OSMR2);
-+ SAVE(OSMR3);
-+ SAVE(OIER);
-
-- SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
- SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
- SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
- SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
-- SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
--
- SAVE(GAFR0_L); SAVE(GAFR0_U);
- SAVE(GAFR1_L); SAVE(GAFR1_U);
- SAVE(GAFR2_L); SAVE(GAFR2_U);
-
--#ifdef CONFIG_PXA27x
-- SAVE(MDREFR);
-- SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
-- SAVE(GAFR3_L); SAVE(GAFR3_U);
-- SAVE(PWER); SAVE(PCFR); SAVE(PRER);
-- SAVE(PFER); SAVE(PKWR);
--#endif
-+ // YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
-+ SAVE(LCCR0); SAVE(LCCR1); SAVE(LCCR2); SAVE(LCCR3);
-+ SAVE(FDADR0);
-+ SAVE(FDADR1);
-+ LCSR = 0xffffffff; /* Clear LCD Status Register */
-+
-+// LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
-+// LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
-+
-+ SAVE(LDCMD0);
-+ // <----- YoKu
-+
-+// LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
-+// LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
-+
-
- SAVE(ICMR);
- ICMR = 0;
-
- SAVE(CKEN);
-- SAVE(PSTR);
-+ CKEN = 0;
-+
-+ // Anup : For Wifi power saving mode 2 May 2006
-+ SAVE(NSSCR0);SAVE(NSSCR1);SAVE(NSSSR);SAVE(NSSITR);SAVE(NSSDR);SAVE(NSSTO);
-+ SAVE(NSSPSP);
-+ printk("\nMY favourite mode in life.......sleep.....\n");
-+
-
- /* Note: wake up source are set up in each machine specific files */
-
-+ /*Changes to keep the right sim selected */
-+ gpsr0 = GPLR0;
-+ gpsr1 = GPLR1;
-+ gpsr2 = GPLR2;
-+
-+ /*Sim 1 selected */
-+ // YoKu GPIOs Changed ----->
-+ if( (GPLR0 & GPIO_bit(21)) && !(GPLR0 & GPIO_bit(22)) ) // 62,63
-+ {
-+ PGSR0 |= GPIO_bit(21) ; //62
-+ PGSR0 &= ~GPIO_bit(22) ; //63
-+ }
-+ else if (!(GPLR0 & GPIO_bit(21)) && (GPLR0 & GPIO_bit(22)) ) // 62,63
-+ {
-+ PGSR0 |= GPIO_bit(22) ; //63
-+ PGSR0 &= ~GPIO_bit(21) ; //62
-+ } /* sim 2*/
-+ // <----- YoKu
-+
- /* clear GPIO transition detect bits */
- GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
--#ifdef CONFIG_PXA27x
-- GEDR3 = GEDR3;
--#endif
-
- /* Clear sleep reset status */
- RCSR = RCSR_SMR;
-
-+ /* set resume return address */
-+ PSPR = virt_to_phys(pxa_cpu_resume);
-+
- /* before sleeping, calculate and save a checksum */
- for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
- checksum += sleep_save[i];
- sleep_save[SLEEP_SAVE_CKSUM] = checksum;
-
-- /* *** go zzz *** */
-- pxa_cpu_pm_enter(state);
-+ PGSR0 |= GPIO_bit(15); //sidd for wake from Sleep 15, YoKu Comented ?? GPIO15 was ChipSelect
-+ PGSR2 |= GPIO_bit(80); //sidd for GSM Engine 69, YoKu GPIO Changed Anup :commented
-+
-+ PGSR1 &= ~GPIO_bit(33); //Tushar: BT Codec Power Down
-+
-+ PGSR0 &= ~GPIO_bit(23); //Tushar: BGW200 Regulator OFF
-+
-+// GPDR1 |= GPIO_bit(49); //Tushar: LCD Serial Data in changed to O/P
-+
-+// PGSR1 &= ~GPIO_bit(48);//Tushar: LCD Serial Pins
-+
-+// PGSR1 &= ~GPIO_bit(49);
-+
-+// PGSR1 &= ~GPIO_bit(50);
-+
-+// PGSR1 |= GPIO_bit(51);
-+
-+// PGSR1 &= 0x03FFFFFF;//Tushar: 24apr LCD datalines
-+// PGSR2 &= 0xFFFFFC00;
-+
-+ PGSR0 &= ~GPIO_bit(24); //Tushar: Mux Control Signals
-+
-+ PGSR0 &= ~GPIO_bit(25);
-+
-+ PGSR0 &= ~GPIO_bit(26);
-+
-+ PGSR0 &= ~GPIO_bit(27);
-+
-+ // GPDR0 |= GPIO_bit(17); //Tushar: unused GPIOs 19apr
-+ // GPCR0 |= GPIO_bit(17);
-+ PGSR0 &= ~GPIO_bit(17);
-+
-+// GPDR1 |= GPIO_bit(56); //Tushar: unused GPIOs 19apr
-+ // GPCR1 |= GPIO_bit(56);
-+ PGSR1 &= ~GPIO_bit(56);
-+
-+// GPDR2 |= GPIO_bit(79);//Tushar: unused GPIOs 19apr
-+// GPCR2 |= GPIO_bit(79);
-+ PGSR2 &= ~GPIO_bit(79);
-+
-+// GPDR1 |= 0x03F00000;//Tushar: unused GPIOs 19apr
-+// GPCR1 |= 0x03F00000;
-+ PGSR1 &= 0xFC0FFFFF;
-+
-+
-+ GPDR0 |= GPIO_bit(19);//Tushar: SIM Present Inputs configured as outputs
-+ GPDR0 |= GPIO_bit(20);
-+ PGSR0 &= ~GPIO_bit(19);
-+ PGSR0 &= ~GPIO_bit(20);
-+
-+
-+//Tushar: 25apr FFRTS FFDTR & FFTXD
-+
-+ PGSR1 |= GPIO_bit(39);
-+ PGSR1 |= GPIO_bit(40);
-+ PGSR1 |= GPIO_bit(41);
-+/*
-+ PGSR2 &= GPIO_bit(81); //Tushar: 24apr NSSP pins
-+ PGSR2 &= GPIO_bit(82);
-+ PGSR2 &= GPIO_bit(83);
-+
-+ PGSR2 |= GPIO_bit(74);
-+ PGSR2 |= GPIO_bit(75);
-+ PGSR2 |= GPIO_bit(76);
-+ PGSR2 |= GPIO_bit(77);
-+*/
-+ if(pm_pwronoff)
-+ {
-+ /* We are here bcos of pressing of on off switch
-+ We wake up now only on pwr switch */
-+ printk("Anup: Before sleeping \n");
-+ pm_pwronoff = 0;
-+ PGSR0 &= ~GPIO_bit(23); //7 YoKu GPIO Changed
-+ //PGSR2 &= ~GPIO_bit(64); //64 YoKu Commented in PWG500 64,7 was WifiReg, IN PWG600 it is 23
-+
-+ PGSR2 &= ~GPIO_bit(80); //69 YoKu GPIO Changed Anup : commnented
-+ PWER = 0x0004; // YoKu Changed from 0x10 to 0x04 (i.e GPIO 4 -> 2)
-+ PFER = 0x0004;
-+ PRER = 0x0004;
-+
-+// YoKu ---->
-+// 11May2006 To reduce Power Off current from 7mA to 4mA
-+ GPDR0 |= GPIO_bit(16); // BTReset o/p Low
-+ PGSR0 &= ~GPIO_bit(16);
-+
-+ GPDR1 |= GPIO_bit(33); // nMEC/nPDI o/p Low
-+ PGSR1 &= ~GPIO_bit(33);
-+
-+ GPDR1 |= GPIO_bit(45); // BTRTS o/p High
-+ PGSR1 |= GPIO_bit(45);
-+
-+
-+ GPDR1 |= GPIO_bit(43); // BTTXD o/p High
-+ PGSR1 |= GPIO_bit(43);
-+
-+ GPDR1 &= ~GPIO_bit(42); // BTRXD i/p
-+ GPDR1 &= ~GPIO_bit(44); // BTCTS i/p
-+// <---- YoKu
-+
-+ PSPR = virt_to_phys(pxa_cpu_resume); // YoKu 29July05 to Resume from where u left, Original PSPR = 0
-+ }
-+
-+ valbefore = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; // 62,63 YoKu GPIO Changed
-+
-+ //printk("Anup: Before sleeping gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);
-+ //kirti pxa_cpu_suspend();
-+ //printk("KER_PM: Going to sleep zzzzzzzzz\n");
-+
-+// OSCC |= OSCC_OON; //Tushar: 18 apr. enable 32.768KHz Oscillator
-+
-+// PCFR |= PCFR_OPDE; //Tushar: 18 apr. disable 3.6864MHz oscillator
-+
-+ pxa_cpu_pm_enter(PM_SUSPEND_MEM);
-
- cpu_init();
-
-+ //kirti~
-+ /**/
-+ //FFMCR |= UART_DTR ;
-+ /**/
-+
- /* after sleeping, validate the checksum */
- checksum = 0;
- for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
-@@ -141,39 +464,63 @@
- checksum = 0;
- for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
- checksum += sleep_save[i];
--
- /* if invalid, display message and wait for a hardware reset */
-- if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
-+ if (checksum != sleep_save[SLEEP_SAVE_CKSUM])
-+ {
- #ifdef CONFIG_ARCH_LUBBOCK
- LUB_HEXLED = 0xbadbadc5;
- #endif
- while (1)
-- pxa_cpu_pm_enter(state);
-+ {
-+ printk("\n\n\nKERN_PM: CRC Error!!! after wakeup\n\n\n"); // YoKu 25May06
-+
- }
-
-+ }
-+ valafter = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; //62,63 YoKu GPIO Changed
-+ pm_pedr = PEDR ;
-+
- /* ensure not to come back here if it wasn't intended */
- PSPR = 0;
-
-+ /*printk("YoKu: gafr0_L=0x%08x gafr0_U=0x%08x\n",GAFR0_L,GAFR0_U);
-+ printk(" gafr1_L= 0x%08x gafr1_U= 0x%08x\n",GAFR1_L,GAFR1_U);
-+ printk(" gafr2_L= 0x%08x gafr2_U= 0x%08x\n",GAFR2_L,GAFR2_U); */
- /* restore registers */
-- RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
- RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
-+ RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
-+ RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
- RESTORE(GAFR0_L); RESTORE(GAFR0_U);
- RESTORE(GAFR1_L); RESTORE(GAFR1_U);
- RESTORE(GAFR2_L); RESTORE(GAFR2_U);
-- RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
-- RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
-- RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
-
--#ifdef CONFIG_PXA27x
-- RESTORE(MDREFR);
-- RESTORE_GPLEVEL(3); RESTORE(GPDR3);
-- RESTORE(GAFR3_L); RESTORE(GAFR3_U);
-- RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
-- RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
-- RESTORE(PFER); RESTORE(PKWR);
--#endif
-
-- PSSR = PSSR_RDH | PSSR_PH;
-+ // Anup : For Wifi power saving mode 2 May 2006
-+ RESTORE(NSSCR0);RESTORE(NSSCR1);RESTORE(NSSSR);RESTORE(NSSITR);RESTORE(NSSDR);RESTORE(NSSTO);
-+ RESTORE(NSSPSP);
-+
-+ // PSSR = PSSR_PH;
-+ GPSR0 = gpsr0;
-+ GPSR1 = gpsr1;
-+ GPSR2 = gpsr2;
-+
-+ // Anup : check values of these registers
-+// printk("YoKu: gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);
-+ //sidd
-+
-+ GPCR0 |= ~gpsr0;
-+ GPCR1 |= ~gpsr1;
-+ GPCR2 |= ~gpsr2;
-+
-+
-+ PSSR = ~PSSR_PH;
-+
-+ RESTORE(OSMR0);
-+ RESTORE(OSMR1);
-+ RESTORE(OSMR2);
-+ RESTORE(OSMR3);
-+ RESTORE(OSCR);
-+ RESTORE(OIER);
-
- RESTORE(CKEN);
-
-@@ -181,62 +528,181 @@
- ICCR = 1;
- RESTORE(ICMR);
-
-- RESTORE(PSTR);
-+ /*
-+ * Temporary solution. This won't be necessary once
-+ * we move pxa support into the serial driver.
-+ * Restore the FF UART.
-+ */
-+ RESTORE(BTMCR);
-+ RESTORE(BTSPR);
-+ RESTORE(BTLCR);
-+ BTLCR |= 0x80;
-+ RESTORE(BTDLH);
-+ RESTORE(BTDLL);
-+ RESTORE(BTLCR);
-+ RESTORE(BTISR);
-+ BTFCR = 0xc7;
-+ RESTORE(BTIER);
-+
-+ RESTORE(STMCR);
-+ RESTORE(STSPR);
-+ RESTORE(STLCR);
-+ STLCR |= 0x80;
-+ RESTORE(STDLH);
-+ RESTORE(STDLL);
-+ RESTORE(STLCR);
-+ RESTORE(STISR);
-+ STFCR = 0xc7;
-+ RESTORE(STIER);
-+
-+ RESTORE(FFMCR);
-+ RESTORE(FFSPR);
-+ RESTORE(FFLCR);
-+ FFLCR |= 0x80;
-+ RESTORE(FFDLH);
-+ RESTORE(FFDLL);
-+ RESTORE(FFLCR);
-+ RESTORE(FFISR);
-+ RESTORE(FFFCR);
-+ FFFCR = 0xc7;
-+ RESTORE(FFIER);
-+
-+ // YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
-+ RESTORE(LCCR3); RESTORE(LCCR2); RESTORE(LCCR1);
-+ LCCR0=RESTORE(LCCR0) & ~LCCR0_ENB;
-+ RESTORE(FDADR0); RESTORE(FDADR1);
-+ LCCR0 |= LCCR0_ENB;
-+
-+ // <----- YoKu
-
- /* restore current time */
-- rtc.tv_sec = RCNR;
-- restore_time_delta(&delta, &rtc);
-+ xtime.tv_sec = RCNR;
-+
-+ valafter1 = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; //62,63 YoKu GPIO Changed
-+
-+// SSCR0 &=0xFFFFFFFF;
-+// printk("\nPM : val of SSCR0 = %x " , SSCR0);
-+
-+ printk("KER_PM: Resumed at RCNR = %d RTSR= %x\n",RCNR,RTSR);
-+
-+ printk("YoKu: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
-+
-+ OSMR0 = 0; /* set initial match at 0 */
-+ OSSR = 0xf; /* clear status on all timers */
-+ OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
-+ OSCR = 0; /* initialize free-running timer, force first match */
-+
-+ leds_event(led_start);
-+ //kirti sti();
-+ // call i2c reset here---->
-+ ICR = ICR_UR;
-+ ISR = 0x7FF; //I2C_ISR_INIT;
-+ ICR &= ~ICR_UR;
-+
-+ ISAR = 0x32;//i2c->slave_addr;
-+
-+ /* set control register values */
-+ ICR = (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE);//I2C_ICR_INIT;
-+
-+ /* enable unit */
-+ ICR |= ICR_IUE;
-+ udelay(100);
-+ //<-----
-+
-+ local_irq_enable();
-
--#ifdef DEBUG
-- printk(KERN_DEBUG "*** made it back from resume\n");
--#endif
-
- return 0;
- }
-
--EXPORT_SYMBOL_GPL(pxa_pm_enter);
--
- unsigned long sleep_phys_sp(void *sp)
- {
- return virt_to_phys(sp);
- }
-
-+#ifdef CONFIG_SYSCTL
- /*
-- * Called after processes are frozen, but before we shut down devices.
-+ * ARGH! ACPI people defined CTL_ACPI in linux/acpi.h rather than
-+ * linux/sysctl.h.
-+ *
-+ * This means our interface here won't survive long - it needs a new
-+ * interface. Quick hack to get this working - use sysctl id 9999.
- */
--int pxa_pm_prepare(suspend_state_t state)
--{
-- extern int pxa_cpu_pm_prepare(suspend_state_t state);
-+#warning ACPI broke the kernel, this interface needs to be fixed up.
-+#define CTL_ACPI 9999
-+#define ACPI_S1_SLP_TYP 19
-
-- return pxa_cpu_pm_prepare(state);
-+/*
-+ * Send us to sleep.
-+ */
-+static int sysctl_pm_do_suspend(ctl_table *ctl, int write, struct file *filp,
-+ void *buffer, size_t *lenp)
-+{
-+ int retval=0;
-+ unsigned i , clock ;
-+ if (write)
-+ {
-+ char buf[16], *p;
-+ unsigned int sleepsec;
-+ int len,left = *lenp;
-+
-+ len = left;
-+ if (left > sizeof(buf))
-+ left = sizeof(buf);
-+ if (!copy_from_user(buf, buffer, left))
-+ {
-+ buf[sizeof(buf) - 1] = '\0';
-+ sleepsec = simple_strtoul(buf, &p, 0);
-+ printk("\nSleeping %d Pwronoff=%x RCNR=%d\n",sleepsec,pm_pwronoff,RCNR);
-+ printk("\nPWER %x PFER=%x PRER=%x\n",PWER,PFER,PRER);
-+ RTAR = xtime.tv_sec + sleepsec;
-+ printk("\nRTAR=%d \n",RTAR);
-+ }
-+ }
-+ retval = pm_do_suspend();
-+ clock = get_memclk_frequency_10khz();
-+ return retval;
- }
--
--EXPORT_SYMBOL_GPL(pxa_pm_prepare);
-
- /*
-- * Called after devices are re-setup, but before processes are thawed.
-+static struct ctl_table pm_table[] =
-+{
-+ {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend},
-+ {0}
-+};
- */
--int pxa_pm_finish(suspend_state_t state)
-+static struct ctl_table pm_table[] =
- {
-- return 0;
-+ {
-+ ctl_name: ACPI_S1_SLP_TYP,
-+ procname: "suspend",
-+ mode: 0600,
-+ proc_handler: (proc_handler *)&sysctl_pm_do_suspend,
-+ },
-+ {
-+ ctl_name: 0
- }
-+};
-
--EXPORT_SYMBOL_GPL(pxa_pm_finish);
-+static struct ctl_table pm_dir_table[] =
-+{
-+ {CTL_ACPI, "pm", NULL, 0, 0555, pm_table},
-+ {0}
-+};
-
- /*
-- * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
-+ * Initialize power interface
- */
--static struct pm_ops pxa_pm_ops = {
-- .pm_disk_mode = PM_DISK_FIRMWARE,
-- .prepare = pxa_pm_prepare,
-- .enter = pxa_pm_enter,
-- .finish = pxa_pm_finish,
--};
--
--static int __init pxa_pm_init(void)
-+static int __init pm_init(void)
- {
-- pm_set_ops(&pxa_pm_ops);
-+ register_sysctl_table(pm_dir_table, 1);
-+ /*Adi: Adjust for clock value to RTC
-+ RTTR = RTC clk - 1*/
-+ RTTR = 32913;
-+
- return 0;
- }
-
--device_initcall(pxa_pm_init);
-+__initcall(pm_init);
-+
-+#endif
-diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/sleep.S linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S
---- linux-2.6.17/arch/arm/mach-pxa/sleep.S 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S 2006-09-11 13:07:05.000000000 -0700
-@@ -79,7 +79,7 @@
- ldr r5, [r4]
-
- @ enable SDRAM self-refresh mode
-- orr r5, r5, #MDREFR_SLFRSH
-+ orr r5, r5, #(MDREFR_SLFRSH | MDREFR_APD)
-
- #ifdef CONFIG_PXA27x
- @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
-diff -NurbwB linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h
---- linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h 2006-09-11 11:04:36.000000000 -0700
-@@ -1748,6 +1748,15 @@
- #define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL))
- #define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL))
-
-+#define NSSCR0 __REG(0x41400000) /* SSP Port 1 Control Register 0 */
-+#define NSSCR1 __REG(0x41400004) /* SSP Port 1 Control Register 1 */
-+#define NSSSR __REG(0x41400008) /* SSP Port 1 Status Register */
-+#define NSSITR __REG(0x4140000C) /* SSP Port 1 Interrupt Test Register */
-+#define NSSDR __REG(0x41400010) /* (Write / Read) SSP Port 1 Data Write Register/SSP Data Read Register */
-+#define NSSTO __REG(0x41400028) /* SSP Port 1 Time Out Register */
-+#define NSSPSP __REG(0x4140002C) /* SSP Port 1 Programmable Serial Port Register */
-+
-+
- /*
- * MultiMediaCard (MMC) controller
- */
-diff -NurbwB linux-2.6.17/kernel/power/main.c linux-2.6.17-patched/kernel/power/main.c
---- linux-2.6.17/kernel/power/main.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/kernel/power/main.c 2006-09-11 12:59:20.000000000 -0700
-@@ -66,10 +66,12 @@
- goto Enable_cpu;
- }
-
-+ /*
- if (freeze_processes()) {
- error = -EAGAIN;
- goto Thaw;
- }
-+ */
-
- if ((free_pages = nr_free_pages()) < FREE_PAGE_NUMBER) {
- pr_debug("PM: free some memory\n");
-@@ -110,12 +112,15 @@
-
- local_irq_save(flags);
-
-+ /*
- if ((error = device_power_down(PMSG_SUSPEND))) {
- printk(KERN_ERR "Some devices failed to power down\n");
- goto Done;
- }
-+ */
-+
- error = pm_ops->enter(state);
-- device_power_up();
-+ //device_power_up();
- Done:
- local_irq_restore(flags);
- return error;
+++ /dev/null
-diff -NurbwB linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c
---- linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c 2006-09-11 13:02:39.000000000 -0700
-@@ -87,8 +87,8 @@
- static const char ep0name [] = "ep0";
-
-
--// #define USE_DMA
--// #define USE_OUT_DMA
-+#define USE_DMA
-+#define USE_OUT_DMA
- // #define DISABLE_TEST_MODE
-
- #ifdef CONFIG_ARCH_IXP4XX
-@@ -1513,7 +1513,7 @@
- #endif
-
- /* try to clear these bits before we enable the udc */
-- udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
-+ udc_ack_int_UDCCR(UDCCR_SUSIR|UDCCR_RSTIR|UDCCR_RESIR);
-
- ep0_idle(dev);
- dev->gadget.speed = USB_SPEED_UNKNOWN;
-@@ -2043,6 +2043,9 @@
- struct pxa2xx_udc *dev = _dev;
- int handled;
-
-+
-+ udc_set_mask_UDCCR( UDCCR_REM | UDCCR_SRM);
-+
- dev->stats.irqs++;
- HEX_DISPLAY(dev->stats.irqs);
- do {
-@@ -2137,6 +2139,8 @@
- /* we could also ask for 1 msec SOF (SIR) interrupts */
-
- } while (handled);
-+
-+ udc_clear_mask_UDCCR( UDCCR_SRM | UDCCR_REM);
- return IRQ_HANDLED;
- }
-
-@@ -2437,6 +2441,7 @@
- int retval, out_dma = 1;
- u32 chiprev;
-
-+ local_irq_disable();
- /* insist on Intel/ARM/XScale */
- asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
- if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
-@@ -2553,6 +2558,7 @@
- #endif
- }
- #endif
-+ local_irq_enable();
- create_proc_files();
-
- return 0;
+++ /dev/null
---- linux-2.6.17/include/linux/skbuff.h 2006-09-20 16:13:42.000000000 -0700
-+++ linux-2.6.17-patched/include/linux/skbuff.h 2006-09-20 16:14:29.000000000 -0700
-@@ -239,6 +239,7 @@
- } nh;
-
- union {
-+ struct ethhdr *ethernet;
- unsigned char *raw;
- } mac;
-
+++ /dev/null
-diff -Nurb linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c
---- linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c 2006-09-25 11:27:06.000000000 -0700
-@@ -40,7 +40,7 @@
- /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
-
- // debugging, turns off buffer write mode if set to 1
--#define FORCE_WORD_WRITE 0
-+#define FORCE_WORD_WRITE 1
-
- #define MANUFACTURER_INTEL 0x0089
- #define I82802AB 0x00ad
-diff -Nurb linux-2.6.17/drivers/mtd/maps/lubbock-flash.c linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c
---- linux-2.6.17/drivers/mtd/maps/lubbock-flash.c 2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c 2006-09-25 10:50:08.000000000 -0700
-@@ -26,6 +26,7 @@
- #include <asm/hardware.h>
- #include <asm/arch/pxa-regs.h>
- #include <asm/arch/lubbock.h>
-+#include <linux/mtd/concat.h>
-
-
- #define ROM_ADDR 0x00000000
-@@ -48,24 +49,27 @@
- .inval_cache = lubbock_map_inval_cache,
- } };
-
--static struct mtd_partition lubbock_partitions[] = {
-+static struct mtd_partition lubbock_partitions[] =
-+{
- {
-- .name = "Bootloader",
-- .size = 0x00040000,
-- .offset = 0,
-- .mask_flags = MTD_WRITEABLE /* force read-only */
-- },{
-- .name = "Kernel",
-- .size = 0x00100000,
-- .offset = 0x00040000,
-- },{
-- .name = "Filesystem",
-- .size = MTDPART_SIZ_FULL,
-- .offset = 0x00140000
-- }
-+ .name = "root",
-+ .offset = 0x00410000
-+ },
-+ {
-+ .name = "kernel",
-+ .size = 0x00150000,
-+ .offset = 0x000B0000
-+ },
-+ {
-+ .name = "bootloader",
-+ .size = 0x000B0000,
-+ .offset = 0x00000000
-+ },
- };
-
-+
- static struct mtd_info *mymtds[2];
-+static struct mtd_info *merged_mtd;
- static struct mtd_partition *parsed_parts[2];
- static int nr_parsed_parts[2];
-
-@@ -83,8 +87,8 @@
- printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
- flashboot?"Flash":"ROM", flashboot);
-
-- lubbock_maps[flashboot^1].name = "Lubbock Application Flash";
-- lubbock_maps[flashboot].name = "Lubbock Boot ROM";
-+ lubbock_maps[flashboot^1].name = "Flash-1";
-+ lubbock_maps[flashboot].name = "Flash-0";
-
- for (i = 0; i < 2; i++) {
- lubbock_maps[i].virt = ioremap(lubbock_maps[i].phys, WINDOW_SIZE);
-@@ -125,25 +129,23 @@
- if (!mymtds[0] && !mymtds[1])
- return ret;
-
-- for (i = 0; i < 2; i++) {
-- if (!mymtds[i]) {
-- printk(KERN_WARNING "%s is absent. Skipping\n", lubbock_maps[i].name);
-- } else if (nr_parsed_parts[i]) {
-- add_mtd_partitions(mymtds[i], parsed_parts[i], nr_parsed_parts[i]);
-- } else if (!i) {
-- printk("Using static partitions on %s\n", lubbock_maps[i].name);
-- add_mtd_partitions(mymtds[i], lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
-- } else {
-- printk("Registering %s as whole device\n", lubbock_maps[i].name);
-- add_mtd_device(mymtds[i]);
-- }
-- }
-+ if (mymtds[0] && mymtds[1]) {
-+ merged_mtd = mtd_concat_create(mymtds, 2, "Concated Flash #1 and #2");
-+ if(merged_mtd)
-+ add_mtd_partitions(merged_mtd, lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
-+ else
-+ printk("YoKu: Failed to concate\n");
- return 0;
-+ }
- }
-
- static void __exit cleanup_lubbock(void)
- {
- int i;
-+
-+ del_mtd_partitions(merged_mtd);
-+ map_destroy(merged_mtd);
-+
- for (i = 0; i < 2; i++) {
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=i386
-BOARD:=rdc
-BOARDNAME:=RDC x86
-FEATURES:=squashfs jffs2 pci broken
-
-LINUX_VERSION:=2.6.21.5
-
-define Target/Description
- Build firmware images for RDC3211 based routers
- (e.g. Airlink101 AR525W, Linksys WRT54R)
-endef
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
- define Kernel/SetInitramfs
- rm -f $(BUILD_DIR)/root/sbin/init
- ln -s /etc/preinit $(BUILD_DIR)/root/sbin/init
- $(CP) $(PLATFORM_DIR)/image/preinit.arch $(BUILD_DIR)/root/etc/
- endef
-endif
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-# CONFIG_60XX_WDT is not set
-# CONFIG_8139TOO is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_AGP is not set
-# CONFIG_ALIM1535_WDT is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-# CONFIG_ATM_DRIVERS is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_BITREVERSE=y
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BONDING is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_BT_CMTP=m
-CONFIG_CIFS_XATTR=y
-CONFIG_CLOCKSOURCE_WATCHDOG=y
-# CONFIG_COMPAT_VDSO is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_CRYPTO_AES_586=m
-CONFIG_CRYPTO_ALGAPI=m
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_DEV_GEODE=m
-# CONFIG_CRYPTO_DEV_PADLOCK is not set
-CONFIG_CRYPTO_MANAGER=m
-CONFIG_CRYPTO_MD5=m
-CONFIG_CRYPTO_TWOFISH_586=m
-# CONFIG_CS5535_GPIO is not set
-# CONFIG_DCDBAS is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-# CONFIG_DELL_RBU is not set
-CONFIG_DMI=y
-# CONFIG_DOUBLEFAULT is not set
-# CONFIG_E100 is not set
-CONFIG_EARLY_PRINTK=y
-# CONFIG_EDAC is not set
-# CONFIG_EDD is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_EUROTECH_WDT is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_FW_LOADER=m
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_IOMAP=y
-CONFIG_GENERIC_ISA_DMA=y
-# CONFIG_GEN_RTC is not set
-# CONFIG_HANGCHECK_TIMER is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_HIGHMEM4G is not set
-# CONFIG_HIGHMEM64G is not set
-# CONFIG_HIGH_RES_TIMERS is not set
-# CONFIG_HPET_TIMER is not set
-CONFIG_HUGETLBFS=y
-CONFIG_HUGETLB_PAGE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HW_RANDOM_AMD is not set
-# CONFIG_HW_RANDOM_GEODE is not set
-# CONFIG_HW_RANDOM_INTEL is not set
-# CONFIG_HW_RANDOM_VIA is not set
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-# CONFIG_I6300ESB_WDT is not set
-# CONFIG_I8K is not set
-# CONFIG_I8XX_TCO is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_IBMASR is not set
-# CONFIG_IBM_ASM is not set
-# CONFIG_IDE is not set
-# CONFIG_IEEE80211_CRYPT_TKIP is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_TUNNEL=m
-# CONFIG_ISA is not set
-CONFIG_ISA_DMA_API=y
-# CONFIG_ITCO_WDT is not set
-# CONFIG_JFFS2_CMODE_PRIORITY is not set
-CONFIG_JFFS2_CMODE_SIZE=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_RUBIN=y
-CONFIG_KTIME_SCALAR=y
-# CONFIG_KVM is not set
-CONFIG_LEDS_RDC3211=m
-CONFIG_LIBCRC32C=y
-# CONFIG_M386 is not set
-CONFIG_M486=y
-# CONFIG_M586 is not set
-# CONFIG_M586MMX is not set
-# CONFIG_M586TSC is not set
-# CONFIG_M686 is not set
-# CONFIG_MACHZ_WDT is not set
-# CONFIG_MACINTOSH_DRIVERS is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_MCA is not set
-# CONFIG_MCORE2 is not set
-# CONFIG_MCRUSOE is not set
-# CONFIG_MCYRIXIII is not set
-# CONFIG_MEFFICEON is not set
-# CONFIG_MGEODEGX1 is not set
-# CONFIG_MGEODE_LX is not set
-# CONFIG_MICROCODE is not set
-# CONFIG_MK6 is not set
-# CONFIG_MK7 is not set
-# CONFIG_MK8 is not set
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MPENTIUM4 is not set
-# CONFIG_MPENTIUMII is not set
-# CONFIG_MPENTIUMIII is not set
-# CONFIG_MPENTIUMM is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_CONCAT=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NETSC520 is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RAM is not set
-CONFIG_MTD_RDC3210=y
-CONFIG_MTD_RDC3210_ALLOW_JFFS2=y
-CONFIG_MTD_RDC3210_BUSWIDTH=2
-# CONFIG_MTD_RDC3210_FACTORY_PRESENT is not set
-CONFIG_MTD_RDC3210_SIZE=0x400000
-# CONFIG_MTD_RDC3210_STATIC_MAP is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_SPLIT_ROOTFS is not set
-# CONFIG_MTD_TS5500 is not set
-# CONFIG_MTRR is not set
-# CONFIG_MVIAC3_2 is not set
-# CONFIG_MVIAC7 is not set
-# CONFIG_MWAVE is not set
-# CONFIG_MWINCHIP2 is not set
-# CONFIG_MWINCHIP3D is not set
-# CONFIG_MWINCHIPC6 is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NET_SCH_FIFO=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NOHIGHMEM=y
-CONFIG_NO_HZ=y
-# CONFIG_NSC_GPIO is not set
-CONFIG_NVRAM=y
-CONFIG_PAGE_OFFSET=0xC0000000
-# CONFIG_PARAVIRT is not set
-# CONFIG_PC8736x_GPIO is not set
-# CONFIG_PC87413_WDT is not set
-# CONFIG_PCIEPORTBUS is not set
-# CONFIG_PCIPCWATCHDOG is not set
-CONFIG_PCI_BIOS=y
-CONFIG_PCI_DIRECT=y
-CONFIG_PCI_GOANY=y
-# CONFIG_PCI_GOBIOS is not set
-# CONFIG_PCI_GODIRECT is not set
-# CONFIG_PCI_GOMMCONFIG is not set
-CONFIG_PHYSICAL_ALIGN=0x100000
-CONFIG_PHYSICAL_START=0x100000
-# CONFIG_PNPACPI is not set
-CONFIG_R6040=y
-# CONFIG_RELOCATABLE is not set
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-# CONFIG_SBC8360_WDT is not set
-# CONFIG_SBC_EPX_C3_WATCHDOG is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_SC520_WDT is not set
-# CONFIG_SCx200 is not set
-# CONFIG_SECCOMP is not set
-CONFIG_SEMAPHORE_SLEEPERS=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SMP is not set
-# CONFIG_SMSC37B787_WDT is not set
-CONFIG_SOFT_WATCHDOG=m
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SYSVIPC is not set
-# CONFIG_TELCLOCK is not set
-CONFIG_TICK_ONESHOT=y
-# CONFIG_TOSHIBA is not set
-CONFIG_UID16=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USBPCWATCHDOG is not set
-CONFIG_USB_CXACRU=m
-# CONFIG_USB_DEVICEFS is not set
-# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_EHCI_HCD=m
-# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-# CONFIG_USB_EHCI_SPLIT_ISO is not set
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-CONFIG_USB_MON=y
-# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_UHCI_HCD is not set
-CONFIG_USB_XUSBATM=m
-# CONFIG_VIA_RHINE is not set
-# CONFIG_VM86 is not set
-# CONFIG_VMSPLIT_1G is not set
-# CONFIG_VMSPLIT_2G is not set
-# CONFIG_VMSPLIT_2G_OPT is not set
-CONFIG_VMSPLIT_3G=y
-# CONFIG_VMSPLIT_3G_OPT is not set
-CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_W83627HF_WDT is not set
-# CONFIG_W83697HF_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_W83977F_WDT is not set
-# CONFIG_WAFER_WDT is not set
-CONFIG_X86=y
-CONFIG_X86_32=y
-CONFIG_X86_ALIGNMENT_16=y
-# CONFIG_X86_BIGSMP is not set
-CONFIG_X86_BIOS_REBOOT=y
-CONFIG_X86_BSWAP=y
-CONFIG_X86_CMPXCHG=y
-CONFIG_X86_CPUID=y
-# CONFIG_X86_ELAN is not set
-# CONFIG_X86_ES7000 is not set
-CONFIG_X86_F00F_BUG=y
-CONFIG_X86_GENERIC=y
-# CONFIG_X86_GENERICARCH is not set
-CONFIG_X86_INTEL_USERCOPY=y
-CONFIG_X86_INVLPG=y
-CONFIG_X86_L1_CACHE_SHIFT=7
-CONFIG_X86_MCE=y
-# CONFIG_X86_MCE_NONFATAL is not set
-CONFIG_X86_MSR=y
-# CONFIG_X86_NUMAQ is not set
-# CONFIG_X86_PC is not set
-CONFIG_X86_POPAD_OK=y
-CONFIG_X86_PPRO_FENCE=y
-CONFIG_X86_RDC=y
-# CONFIG_X86_REBOOTFIXUPS is not set
-# CONFIG_X86_SUMMIT is not set
-# CONFIG_X86_UP_APIC is not set
-# CONFIG_X86_VISWS is not set
-# CONFIG_X86_VOYAGER is not set
-CONFIG_X86_WP_WORKS_OK=y
+++ /dev/null
-/*
- * LED driver for RDC3211 boards
- *
- * Copyright 2007 Florian Fainelli <florian@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-#include <linux/err.h>
-
-#include <asm/io.h>
-
-#define LED_VAL 0x8000384C // the data ofset of gpio 0~30
-
-static struct platform_device *pdev;
-
-static void rdc3211_led_set(struct led_classdev *led_cdev, enum led_brightness brightness)
-{
- unsigned long ul_ledstat = 0xffffffff;
- unsigned long led_bit = 1 << (led_cdev->flags);
-
- if (brightness)
- ul_ledstat &= ~led_bit;
- else
- ul_ledstat|= led_bit;
-
- outl(LED_VAL, 0xcf8);
- outl(ul_ledstat, 0xcfc);
-}
-
-static struct led_classdev rdc3211_power_led = {
- .name = "rdc3211:power",
- .flags = 15,
- .brightness_set = rdc3211_led_set,
-};
-
-static struct led_classdev rdc3211_dmz_led = {
- .name = "rdc3211:dmz",
- .flags = 16,
- .brightness_set = rdc3211_led_set,
-};
-
-static int rdc3211_leds_probe(struct platform_device *pdev)
-{
- int ret;
-
- ret = led_classdev_register(&pdev->dev, &rdc3211_power_led);
- if (ret < 0)
- return ret;
-
- ret = led_classdev_register(&pdev->dev, &rdc3211_dmz_led);
- if (ret < 0)
- led_classdev_unregister(&rdc3211_power_led);
-
- return ret;
-}
-
-static int rdc3211_leds_remove(struct platform_device *pdev)
-{
- led_classdev_unregister(&rdc3211_power_led);
- led_classdev_unregister(&rdc3211_dmz_led);
- return 0;
-}
-
-static struct platform_driver rdc3211_leds_driver = {
- .probe = rdc3211_leds_probe,
- .remove = rdc3211_leds_remove,
- .driver = {
- .name = "rdc3211-leds",
- }
-};
-
-static int __init rdc3211_leds_init(void)
-{
- int ret;
-
- ret = platform_driver_register(&rdc3211_leds_driver);
- if (ret < 0)
- goto out;
-
- pdev = platform_device_register_simple("rdc3211-leds", -1, NULL, 0);
- if (IS_ERR(pdev)) {
- ret = PTR_ERR(pdev);
- platform_driver_unregister(&rdc3211_leds_driver);
- goto out;
- }
-
-out:
- return ret;
-}
-
-static void __exit rdc3211_leds_exit(void)
-{
- platform_driver_unregister(&rdc3211_leds_driver);
-}
-
-module_init(rdc3211_leds_init);
-module_exit(rdc3211_leds_exit);
-
-MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
-MODULE_DESCRIPTION("RDC3211 LED driver");
-MODULE_LICENSE("GPL");
+++ /dev/null
-#ifndef GT_IMGHDR_H
-#define GT_IMGHDR_H
-
-#define GTIMG_MAGIC "GMTK"
-
-/* Product ID */
-#define PID_RTL_AIRGO 1
-#define PID_RTL_RALINK 2
-#define PID_RDC_AIRGO 3
-#define PID_RDC_RALINK 5 /* White Lable */
-
-/* Gemtek */
-typedef struct
-{
- u8 magic[4]; /* ASICII: GMTK */
- u32 checksum; /* CRC32 */
- u32 version; /* x.x.x.x */
- u32 kernelsz; /* The size of the kernel image */
- u32 imagesz; /* The length of this image file ( kernel + romfs + this header) */
- u32 pid; /* Product ID */
- u32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */
- u32 reserved;
-}gt_imghdr_t;
-
-#endif
+++ /dev/null
-/*******************************************************************
- * Simple Flash mapping for RDC3210 *
- * *
- * 2005.03.23 *
- * Dante Su (dante_su@gemtek.com.tw) *
- * Copyright (C) 2005 Gemtek Corporation *
- *******************************************************************/
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <asm/io.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#include <linux/autoconf.h>
-#include <linux/squashfs_fs.h>
-
-static struct mtd_info *rdc3210_mtd;
-
-struct map_info rdc3210_map =
-{
- .name = "RDC3210 Flash",
- .size = CONFIG_MTD_RDC3210_SIZE,
- .bankwidth = CONFIG_MTD_RDC3210_BUSWIDTH,
-};
-
-/* Dante: This is the default static mapping, however this is nothing but a hint. (Say dynamic mapping) */
-static struct mtd_partition rdc3210_parts[] =
-{
- { name: "linux", offset: 0, size: 0x003C0000 }, /* 3840 KB = (Kernel + ROMFS) = (768 KB + 3072 KB) */
- { name: "romfs", offset: 0x000C0000, size: 0x00300000 }, /* 3072 KB */
- { name: "nvram", offset: 0x003C0000, size: 0x00010000 }, /* 64 KB */
-#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
- { name: "factory", offset: 0x003D0000, size: 0x00010000 }, /* 64 KB */
-#endif
- { name: "bootldr", offset: 0x003E0000, size: 0x00020000 }, /* 128 KB */
-};
-
-static __u32 crctab[257] = {
- 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
- 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
- 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
- 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
- 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
- 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
- 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
- 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
- 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
- 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
- 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
- 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
- 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
- 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
- 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
- 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
- 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
- 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
- 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
- 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
- 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
- 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
- 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
- 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
- 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
- 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
- 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
- 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
- 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
- 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
- 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
- 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
- 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
- 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
- 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
- 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
- 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
- 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
- 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
- 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
- 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
- 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
- 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
- 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
- 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
- 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
- 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
- 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
- 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
- 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
- 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
- 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
- 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
- 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
- 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
- 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
- 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
- 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
- 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
- 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
- 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
- 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
- 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
- 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
- 0
-};
-
-static __u32 crc32(__u8 * buf, __u32 len)
-{
- register int i;
- __u32 sum;
- register __u32 s0;
- s0 = ~0;
- for (i = 0; i < len; i++) {
- s0 = (s0 >> 8) ^ crctab[(__u8) (s0 & 0xFF) ^ buf[i]];
- }
- sum = ~s0;
- return sum;
-}
-
-static void erase_callback(struct erase_info *done)
-{
- wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
- wake_up(wait_q);
-}
-
-static int erase_write (struct mtd_info *mtd, unsigned long pos,
- int len, const char *buf)
-{
- struct erase_info erase;
- DECLARE_WAITQUEUE(wait, current);
- wait_queue_head_t wait_q;
- size_t retlen;
- int ret;
-
- /*
- * First, let's erase the flash block.
- */
-
- init_waitqueue_head(&wait_q);
- erase.mtd = mtd;
- erase.callback = erase_callback;
- erase.addr = pos;
- erase.len = len;
- erase.priv = (u_long)&wait_q;
-
- set_current_state(TASK_INTERRUPTIBLE);
- add_wait_queue(&wait_q, &wait);
-
- ret = mtd->erase(mtd, &erase);
- if (ret) {
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&wait_q, &wait);
- printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
- "on \"%s\" failed\n",
- pos, len, mtd->name);
- return ret;
- }
-
- schedule(); /* Wait for erase to finish. */
- remove_wait_queue(&wait_q, &wait);
-
- /*
- * Next, writhe data to flash.
- */
-
- ret = mtd->write (mtd, pos, len, &retlen, buf);
- if (ret)
- return ret;
- if (retlen != len)
- return -EIO;
- return 0;
-}
-
-static int __init init_rdc3210_map(void)
-{
- rdc3210_map.phys = -rdc3210_map.size;
- printk(KERN_NOTICE "flash device: %x at %x\n", rdc3210_map.size, rdc3210_map.phys);
-
- rdc3210_map.map_priv_1 = (unsigned long)(rdc3210_map.virt = ioremap_nocache(rdc3210_map.phys, rdc3210_map.size));
-
- if (!rdc3210_map.map_priv_1)
- {
- printk("Failed to ioremap\n");
- return -EIO;
- }
- rdc3210_mtd = do_map_probe("cfi_probe", &rdc3210_map);
-#ifdef CONFIG_MTD_RDC3210_STATIC_MAP /* Dante: This is for fixed map */
- if (rdc3210_mtd)
- {
- rdc3210_mtd->module = THIS_MODULE;
- add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
- return 0;
- }
-#else /* Dante: This is for dynamic mapping */
-
-#include "imghdr.h"
-
- if (rdc3210_mtd)
- { // Dante
- gt_imghdr_t *hdr = (gt_imghdr_t *)(rdc3210_map.map_priv_1)
-#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
- , *ptmp
-#endif
- ;
- unsigned int tmp = hdr->kernelsz + sizeof(gt_imghdr_t), tmp2 = rdc3210_mtd->erasesize;
- unsigned int tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32;
- unsigned int tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2;
- int len;
-
- if(memcmp(hdr->magic, GTIMG_MAGIC, 4))
- {
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- printk("Invalid MAGIC for Firmware Image!!!\n");
- return -EIO;
- }
-#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
- tmp = (tmp3 == tmp4) ? tmp4 + tmp2 : tmp4;
- if ((ptmp = (gt_imghdr_t *)vmalloc(tmp)) == NULL)
- {
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- printk("Can't allocate 0x%08x for flash-reading buffer!\n", tmp);
- return -ENOMEM;
- }
- if (rdc3210_mtd->read(rdc3210_mtd, 0, tmp, &len, (__u8 *)ptmp) || len != tmp)
- {
- vfree(ptmp);
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- printk("Can't read that much flash! Read 0x%08x of it.\n", len);
- return -EIO;
- }
-#endif
-#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
- /* 1. Adjust Redboot */
- tmp = rdc3210_mtd->size - rdc3210_parts[4].size;
- rdc3210_parts[4].offset = tmp - (tmp % tmp2);
- rdc3210_parts[4].size = rdc3210_mtd->size - rdc3210_parts[4].offset;
-
- /* 2. Adjust Factory Default */
- tmp -= rdc3210_parts[3].size;
- rdc3210_parts[3].offset = tmp - (tmp % tmp2);
- rdc3210_parts[3].size = rdc3210_parts[4].offset - rdc3210_parts[3].offset;
-#else
- /* 1. Adjust Redboot */
- tmp = rdc3210_mtd->size - rdc3210_parts[3].size;
- rdc3210_parts[3].offset = tmp - (tmp % tmp2);
- rdc3210_parts[3].size = rdc3210_mtd->size - rdc3210_parts[3].offset;
-#endif
- /* 3. Adjust NVRAM */
-#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
- if (*(__u32 *)(((unsigned char *)ptmp)+tmp3) == SQUASHFS_MAGIC)
- {
- len = 1;
- tmp4 = tmp3;
- tmp = hdr->imagesz;
- rdc3210_parts[2].name = "rootfs_data";
- rdc3210_parts[2].offset = rdc3210_parts[0].offset + (((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2);
- }
- else
-#else
- tmp4 = tmp3;
-#endif
- {
- len = 0;
- tmp -= rdc3210_parts[2].size;
- rdc3210_parts[2].offset = tmp - (tmp % tmp2);
- }
- rdc3210_parts[2].size = rdc3210_parts[3].offset - rdc3210_parts[2].offset;
-
- /* 4. Adjust Linux (Kernel + ROMFS) */
- rdc3210_parts[0].size = rdc3210_parts[len + 2].offset - rdc3210_parts[0].offset;
-
- /* 5. Adjust ROMFS */
- rdc3210_parts[1].offset = rdc3210_parts[0].offset + tmp4;
- rdc3210_parts[1].size = rdc3210_parts[2].offset - rdc3210_parts[1].offset;
-#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
- if (!(hdr->reserved || len))
- {
- __u8 buf[1024];
- ptmp->reserved = hdr->imagesz;
- ptmp->imagesz = tmp4;
- ptmp->checksum = ptmp->fastcksum = 0;
- memcpy(buf, ptmp, 0x100);
- memcpy(buf + 0x100, ((__u8 *)ptmp) + ((tmp4 >> 1) - ((tmp4 & 0x6) >> 1)), 0x100);
- memcpy(buf + 0x200, ((__u8 *)ptmp) + (tmp4 - 0x200), 0x200);
- ptmp->fastcksum = crc32(buf, sizeof(buf));
- ptmp->checksum = crc32((__u8 *)ptmp, tmp4);
- if (rdc3210_mtd->unlock) rdc3210_mtd->unlock(rdc3210_mtd, 0, tmp2);
- if ((len = erase_write(rdc3210_mtd, 0, tmp2, (char *)ptmp)))
- {
- vfree(ptmp);
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- printk("Couldn't erase! Got %d.\n", len);
- return len;
- }
- if (rdc3210_mtd->sync) rdc3210_mtd->sync(rdc3210_mtd);
- }
- vfree(ptmp);
-#endif
- rdc3210_mtd->owner = THIS_MODULE;
- add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
- return 0;
- }
-#endif
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- return -ENXIO;
-}
-
-static void __exit cleanup_rdc3210_map(void)
-{
- if (rdc3210_mtd)
- {
- del_mtd_partitions(rdc3210_mtd);
- map_destroy(rdc3210_mtd);
- }
-
- if (rdc3210_map.map_priv_1)
- {
- iounmap((void *)rdc3210_map.map_priv_1);
- rdc3210_map.map_priv_1 = 0L;
- rdc3210_map.virt = NULL;
- }
-}
-
-module_init(init_rdc3210_map);
-module_exit(cleanup_rdc3210_map);
+++ /dev/null
-/* r6040.c: A RDC R6040 FastEthernet driver for linux. */
-/*
- Re-written 2004 by Sten Wang.
-
- Copyright 1994-2000 by Donald Becker.
- Copyright 1993 United States Government as represented by the
- Director, National Security Agency. This software may be used and
- distributed according to the terms of the GNU General Public License,
- incorporated herein by reference.
-
- This driver is for RDC R6040 FastEthernet MAC series.
- For kernel version after 2.4.22
-
- Modification List
- ---------- ------------------------------------------------
- 08-24-2006 Support at linux 2.6.10 above
- 03-24-2006 Support NAPI
- 03-21-2006 By Charies,change spin_lock_irqsave(lp->lock, flags) to
- spin_lock_irqsave(&lp->lock, flags) in set_multicast_list
- 03-15-2006 Modify the set_multicast_list ,due to when re-plug the ethernet,
- it will forget the previous setting
- 07-12-2005 Tim, modify the set_multicast_list
- 03-28-2005 Tim, modify some error mac register offset in
- function set_multicast_list
- 03-27-2005 Tim, Add the internal state machine reset
- Sten, If multicast address more than 4, enter PROM mode
- Changed rdc to r6040
- 12-22-2004 Sten Init MAC MBCR register=0x012A
- PHY_CAP = 0x01E1
-
- Need to Do LIst:
- 1. If multicast address more than 4, use the multicast address hash
-*/
-
-#define DRV_NAME "r6040"
-#define DRV_VERSION "0.13"
-#define DRV_RELDATE "24Aug2006"
-
-/* PHY CHIP Address */
-#define PHY1_ADDR 1 /* For MAC1 */
-#define PHY2_ADDR 2 /* For MAC2 */
-#define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
-#define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
-
-/* Time in jiffies before concluding the transmitter is hung. */
-#define TX_TIMEOUT (6000 * HZ / 1000)
-#define TIMER_WUT (jiffies + HZ * 1)/* timer wakeup time : 1 second */
-
-/* RDC MAC ID */
-#define RDC_MAC_ID 0x6040
-
-/* RDC MAC I/O Size */
-#define R6040_IO_SIZE 256
-
-/* RDC Chip PCI Command */
-#define R6040_PCI_CMD 0x0005 /* IO, Master */
-
-/* MAX RDC MAC */
-#define MAX_MAC 2
-
-/* MAC setting */
-#define TX_DCNT 0x80 /* TX descriptor count */
-#define RX_DCNT 0x80 /* RX descriptor count */
-#define MAX_BUF_SIZE 0x600
-#define ALLOC_DESC_SIZE ((TX_DCNT+RX_DCNT)*sizeof(struct r6040_descriptor)+0x10)
-#define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */
-
-/* Debug enable or not */
-#define RDC_DEBUG 0
-
-#if RDC_DEBUG > 1
-#define RDC_DBUG(msg, value) printk("%s %x\n", msg, value);
-#else
-#define RDC_DBUG(msg, value)
-#endif
-
-
-#include <linux/module.h>
-#include <linux/version.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
-#include <linux/moduleparam.h>
-#endif
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/timer.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/init.h>
-#include <linux/delay.h> /* for udelay() */
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/crc32.h>
-#include <linux/spinlock.h>
-
-#include <asm/processor.h>
-#include <asm/bitops.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-
-MODULE_AUTHOR("Sten Wang <sten.wang@rdc.com.tw>");
-MODULE_LICENSE("GPL");
-#ifdef CONFIG_R6040_NAPI
-MODULE_DESCRIPTION("RDC R6040 NAPI PCI FastEthernet Driver");
-#else
-MODULE_DESCRIPTION("RDC R6040 PCI FastEthernet Driver");
-#endif
-
-#define R6040_INT_MASK 0x0011
-
-struct r6040_descriptor {
- u16 status, len; /* 0-3 */
- u32 buf; /* 4-7 */
- u32 ndesc; /* 8-B */
- u32 rev1; /* C-F */
- char *vbufp; /* 10-13 */
- struct r6040_descriptor *vndescp; /* 14-17 */
- struct sk_buff *skb_ptr; /* 18-1B */
- u32 rev2; /* 1C-1F */
-} __attribute__(( aligned(32) ));
-
-struct r6040_private {
- struct net_device_stats stats;
- spinlock_t lock;
- struct timer_list timer;
- struct pci_dev *pdev;
-
- struct r6040_descriptor *rx_insert_ptr;
- struct r6040_descriptor *rx_remove_ptr;
- struct r6040_descriptor *tx_insert_ptr;
- struct r6040_descriptor *tx_remove_ptr;
- u16 tx_free_desc, rx_free_desc, phy_addr, phy_mode;
- u16 mcr0, mcr1;
- dma_addr_t desc_dma;
- char *desc_pool;
-};
-
-struct r6040_chip_info {
- const char *name;
- u16 pci_flags;
- int io_size;
- int drv_flags;
-};
-
-#ifdef CONFIG_R6040_NAPI
-static int NAPI_status;
-#endif
-
-static int __devinitdata printed_version;
-#ifdef CONFIG_R6040_NAPI
-static char version[] __devinitdata =
- KERN_INFO DRV_NAME ": RDC R6040 NAPI net driver, version "DRV_VERSION " (" DRV_RELDATE ")\n";
-#else
-static char version[] __devinitdata =
- KERN_INFO DRV_NAME ": RDC R6040 net driver, version "DRV_VERSION " (" DRV_RELDATE ")\n";
-#endif
-static struct r6040_chip_info r6040_chip_info[] __devinitdata =
-{
- { "RDC R6040 Knight", R6040_PCI_CMD, R6040_IO_SIZE, 0}
-};
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
-static int NUM_MAC_TABLE = 2 ;
-#endif
-
-static int phy_table[] = { 0x1, 0x2};
-static u8 adr_table[2][8] = {{0x00, 0x00, 0x60, 0x00, 0x00, 0x01}, {0x00, 0x00, 0x60, 0x00, 0x00, 0x02}};
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10)
- module_param_array(adr_table, int, &NUM_MAC_TABLE, 0644);
-#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
- module_param_array(adr_table, int, NUM_MAC_TABLE, 0644);
-#else
- MODULE_PARM(adr_table, "2-4i");
-#endif
-MODULE_PARM_DESC(adr_table, "MAC Address (assigned)");
-
-static int r6040_open(struct net_device *dev);
-static int r6040_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static irqreturn_t r6040_interrupt(int irq, void *dev_id);
-static struct net_device_stats *r6040_get_stats(struct net_device *dev);
-static int r6040_close(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-static struct ethtool_ops netdev_ethtool_ops;
-static void r6040_down(struct net_device *dev);
-static void r6040_up(struct net_device *dev);
-static void r6040_tx_timeout (struct net_device *dev);
-static void r6040_timer(unsigned long);
-
-static int phy_mode_chk(struct net_device *dev);
-static int phy_read(int ioaddr, int phy_adr, int reg_idx);
-static void phy_write(int ioaddr, int phy_adr, int reg_idx, int dat);
-static void rx_buf_alloc(struct r6040_private *lp,struct net_device *dev);
-#ifdef CONFIG_R6040_NAPI
-static int r6040_poll(struct net_device *netdev, int *budget);
-#endif
-
-
-static int __devinit r6040_init_one (struct pci_dev *pdev,
- const struct pci_device_id *ent)
-{
- struct net_device *dev;
- struct r6040_private *lp;
- int ioaddr, io_size, err;
- static int card_idx = -1;
- int chip_id = (int)ent->driver_data;
-
- RDC_DBUG("r6040_init_one()", 0);
-
- if (printed_version++)
- printk(version);
-
- if ((err = pci_enable_device (pdev)))
- return err;
-
- /* this should always be supported */
- if (pci_set_dma_mask(pdev, 0xffffffff)) {
- printk(KERN_ERR DRV_NAME "32-bit PCI DMA addresses not supported by the card!?\n");
- return -ENODEV;
- }
-
- /* IO Size check */
- io_size = r6040_chip_info[chip_id].io_size;
- if (pci_resource_len (pdev, 0) < io_size) {
- return -ENODEV;
- }
-
- ioaddr = pci_resource_start (pdev, 0); /* IO map base address */
- pci_set_master(pdev);
-
- dev = alloc_etherdev(sizeof(struct r6040_private));
- if (dev == NULL)
- return -ENOMEM;
- SET_MODULE_OWNER(dev);
-
- if (pci_request_regions(pdev, DRV_NAME)) {
- printk(KERN_ERR DRV_NAME ": Failed to request PCI regions\n");
- err = -ENODEV;
- goto err_out_disable;
- }
-
- /* Init system & device */
- lp = dev->priv;
- dev->base_addr = ioaddr;
- dev->irq = pdev->irq;
-
- spin_lock_init(&lp->lock);
- pci_set_drvdata(pdev, dev);
-
- /* Set MAC address */
- card_idx++;
- memcpy(dev->dev_addr, (u8 *)&adr_table[card_idx][0], 6);
-
- /* Link new device into r6040_root_dev */
- lp->pdev = pdev;
-
- /* Init RDC private data */
- lp->mcr0 = 0x1002;
- lp->phy_addr = phy_table[card_idx];
-
- /* The RDC-specific entries in the device structure. */
- dev->open = &r6040_open;
- dev->hard_start_xmit = &r6040_start_xmit;
- dev->stop = &r6040_close;
- dev->get_stats = &r6040_get_stats;
- dev->set_multicast_list = &set_multicast_list;
- dev->ethtool_ops = &netdev_ethtool_ops;
- dev->tx_timeout = &r6040_tx_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
-#ifdef CONFIG_R6040_NAPI
- dev->poll = &r6040_poll;
- dev->weight = 64;
-#endif
-
- /* Register net device. After this dev->name assign */
- if ((err = register_netdev(dev))) {
- printk(KERN_ERR DRV_NAME ": Failed to register net device\n");
- goto err_out_res;
- }
-
- netif_carrier_on(dev);
- return 0;
-
-err_out_res:
- pci_release_regions(pdev);
-err_out_disable:
- pci_disable_device(pdev);
- pci_set_drvdata(pdev, NULL);
- kfree(dev);
-
- return err;
-}
-
-static void __devexit r6040_remove_one (struct pci_dev *pdev)
-{
- struct net_device *dev = pci_get_drvdata(pdev);
-
- unregister_netdev(dev);
- pci_release_regions(pdev);
- kfree(dev);
- pci_disable_device(pdev);
- pci_set_drvdata(pdev, NULL);
-}
-
-static int
-r6040_open(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- int i;
-
- RDC_DBUG("r6040_open()", 0);
-
- /* Request IRQ and Register interrupt handler */
- i = request_irq(dev->irq, &r6040_interrupt, SA_SHIRQ, dev->name, dev);
- if (i) return i;
-
- /* Allocate Descriptor memory */
- lp->desc_pool = pci_alloc_consistent(lp->pdev, ALLOC_DESC_SIZE, &lp->desc_dma);
- if (!lp->desc_pool) return -ENOMEM;
-
- r6040_up(dev);
-
- netif_start_queue(dev);
-
- /* set and active a timer process */
- init_timer(&lp->timer);
- lp->timer.expires = TIMER_WUT;
- lp->timer.data = (unsigned long)dev;
- lp->timer.function = &r6040_timer;
- add_timer(&lp->timer);
-
- return 0;
-}
-
-static void
-r6040_tx_timeout (struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- //int ioaddr = dev->base_addr;
- //struct r6040_descriptor *descptr = lp->tx_remove_ptr;
-
- RDC_DBUG("r6040_tx_timeout()", 0);
-
- /* Transmitter timeout, serious problems. */
- /* Sten: Nothing need to do so far. */
- printk(KERN_ERR DRV_NAME ": Big Trobule, transmit timeout/n");
- lp->stats.tx_errors++;
- netif_stop_queue(dev);
-
-//printk("<RDC> XMT timedout: CR0 %x, CR40 %x, CR3C %x, CR2C %x, CR30 %x, CR34 %x, CR38 %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c), inw(ioaddr+0x2c), inw(ioaddr+0x30), inw(ioaddr+0x34), inw(ioaddr+0x38));
-
-//printk("<RDC> XMT_TO: %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
-}
-
-
-static int
-r6040_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- struct r6040_descriptor *descptr;
- int ioaddr = dev->base_addr;
- unsigned long flags;
-
- RDC_DBUG("r6040_start_xmit()", 0);
-
- if (skb == NULL) /* NULL skb directly return */
- return 0;
- if (skb->len >= MAX_BUF_SIZE) { /* Packet too long, drop it */
- dev_kfree_skb(skb);
- return 0;
- }
-
- /* Critical Section */
- spin_lock_irqsave(&lp->lock, flags);
-
- /* TX resource check */
- if (!lp->tx_free_desc) {
- spin_unlock_irqrestore(&lp->lock, flags);
- printk(KERN_ERR DRV_NAME ": NO TX DESC ");
- return 1;
- }
-
- /* Statistic Counter */
- lp->stats.tx_packets++;
- lp->stats.tx_bytes += skb->len;
-
- /* Set TX descriptor & Transmit it */
- lp->tx_free_desc--;
- descptr = lp->tx_insert_ptr;
- if (skb->len < 0x3c) descptr->len = 0x3c;
- else descptr->len = skb->len;
- descptr->skb_ptr = skb;
- descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
- descptr->status = 0x8000;
- outw(0x01, ioaddr + 0x14);
- lp->tx_insert_ptr = descptr->vndescp;
-
-#if RDC_DEBUG
- printk("Xmit(): %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
-#endif
-
- /* If no tx resource, stop */
- if (!lp->tx_free_desc)
- netif_stop_queue(dev);
-
- dev->trans_start = jiffies;
- spin_unlock_irqrestore(&lp->lock, flags);
- return 0;
-}
-
-/* The RDC interrupt handler. */
-static irqreturn_t
-r6040_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- struct r6040_private *lp;
- struct r6040_descriptor *descptr;
- struct sk_buff *skb_ptr;
- int ioaddr, status;
- unsigned long flags;
-#ifdef CONFIG_R6040_NAPI
- int handled = 1;
-#else
- int handled = 0;
-#endif
-
- RDC_DBUG("r6040_interrupt()", 0);
- if (dev == NULL) {
- printk (KERN_ERR DRV_NAME ": INT() unknown device.\n");
- return IRQ_RETVAL(handled);
- }
-
- lp = (struct r6040_private *)dev->priv;
- spin_lock_irqsave(&lp->lock, flags);
-
- /* Check MAC Interrupt status */
- ioaddr = dev->base_addr;
- outw(0x0, ioaddr + 0x40); /* Mask Off RDC MAC interrupt */
- status = inw(ioaddr + 0x3c); /* Read INTR status and clear */
-
-
-#ifdef CONFIG_R6040_NAPI
-
- if(netif_rx_schedule_prep(dev))
- {
- NAPI_status = status ;
- __netif_rx_schedule(dev);
- }
-
- spin_unlock_irqrestore(&lp->lock, flags);
- return IRQ_RETVAL(handled);
-#else
- /* TX interrupt request */
- if (status & 0x10) {
- handled = 1;
- descptr = lp->tx_remove_ptr;
- while(lp->tx_free_desc < TX_DCNT) {
- if (descptr->status & 0x8000) break; /* Not complte */
- skb_ptr = descptr->skb_ptr;
- pci_unmap_single(lp->pdev, descptr->buf, skb_ptr->len, PCI_DMA_TODEVICE);
- dev_kfree_skb_irq(skb_ptr); /* Free buffer */
- descptr->skb_ptr = 0;
- descptr = descptr->vndescp; /* To next descriptor */
- lp->tx_free_desc++;
- }
- lp->tx_remove_ptr = descptr;
- if (lp->tx_free_desc) netif_wake_queue(dev);
- }
-
- /* RX interrupt request */
- if (status & 0x01) {
- handled = 1;
- descptr = lp->rx_remove_ptr;
- while(lp->rx_free_desc) {
- if (descptr->status & 0x8000) break; /* No Rx packet */
- skb_ptr = descptr->skb_ptr;
- descptr->skb_ptr = 0;
- skb_ptr->dev = dev;
- skb_put(skb_ptr, descptr->len - 4);
- pci_unmap_single(lp->pdev, descptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
- skb_ptr->protocol = eth_type_trans(skb_ptr, dev);
- netif_rx(skb_ptr); /* Send to upper layer */
- lp->stats.rx_packets++;
- lp->stats.rx_bytes += descptr->len;
- descptr = descptr->vndescp; /* To next descriptor */
- lp->rx_free_desc--;
- }
- lp->rx_remove_ptr = descptr;
- }
-
- /* Allocate new RX buffer */
- if (lp->rx_free_desc < RX_DCNT) rx_buf_alloc(lp,dev);
-
- outw(R6040_INT_MASK, ioaddr + 0x40); /* TX/RX interrupt enable */
- spin_unlock_irqrestore(&lp->lock, flags);
-#endif
- return IRQ_RETVAL(handled);
-}
-
-
-static struct net_device_stats *
-r6040_get_stats(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
-
- RDC_DBUG("r6040_get_stats()", 0);
- return &lp->stats;
-}
-
-/*
- * Set or clear the multicast filter for this adaptor.
- */
-static void
-set_multicast_list(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- struct dev_mc_list *mcptr;
- int ioaddr = dev->base_addr;
- u16 *adrp, i;
- unsigned long flags;
-
- RDC_DBUG("set_multicast_list()", 0);
-
- /* MAC Address */
- adrp = (u16 *) dev->dev_addr;
- outw(adrp[0], ioaddr + 0x68);
- outw(adrp[1], ioaddr + 0x6A);
- outw(adrp[2], ioaddr + 0x6C);
-
-
-#if RDC_DEBUG
- printk("MAC ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
-#endif
-
- /* Promiscous Mode */
- spin_lock_irqsave(&lp->lock, flags);
- i = inw(ioaddr) & ~0x0120; /* Clear AMCP & PROM */
- if (dev->flags & IFF_PROMISC)
- {
- i |= 0x0020;
- lp->mcr0 |= 0x0020 ;
- }
- if (dev->mc_count > 4) i |= 0x0020; /* Too many multicast address */
- outw(i, ioaddr);
- spin_unlock_irqrestore(&lp->lock, flags);
-
- /* Multicast Address */
- if (dev->mc_count > 4) /* Wait to do: Hash Table for multicast */
- return;
-
- /* Multicast Address 1~4 case */
- for (i = 0, mcptr = dev->mc_list; (i<dev->mc_count) && (i<4); i++) {
- adrp = (u16 *)mcptr->dmi_addr;
- outw(adrp[0], ioaddr + 0x70 + 8*i);
- outw(adrp[1], ioaddr + 0x72 + 8*i);
- outw(adrp[2], ioaddr + 0x74 + 8*i);
- mcptr = mcptr->next;
-#if RDC_DEBUG
- printk("M_ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
-#endif
- }
- for (i = dev->mc_count; i < 4; i++) {
- outw(0xffff, ioaddr + 0x68 + 8*i);
- outw(0xffff, ioaddr + 0x6A + 8*i);
- outw(0xffff, ioaddr + 0x6C + 8*i);
- }
-}
-
-static void netdev_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
-{
- struct r6040_private *rp = dev->priv;
-
- strcpy (info->driver, DRV_NAME);
- strcpy (info->version, DRV_VERSION);
- strcpy (info->bus_info, pci_name(rp->pdev));
-}
-
-static struct ethtool_ops netdev_ethtool_ops = {
- .get_drvinfo = netdev_get_drvinfo,
-};
-
-static int
-r6040_close(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
-
- RDC_DBUG("r6040_close()", 0);
-
- /* deleted timer */
- del_timer_sync(&lp->timer);
-
- spin_lock_irq(&lp->lock);
-
- netif_stop_queue(dev);
-
- r6040_down(dev);
-
- spin_unlock_irq(&lp->lock);
-
- return 0;
-}
-
-/**
- Stop RDC MAC and Free the allocated resource
- */
-static void r6040_down(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- int i;
- int ioaddr = dev->base_addr;
-
- RDC_DBUG("r6040_down()", 0);
-
- /* Stop MAC */
- outw(0x0000, ioaddr + 0x40); /* Mask Off Interrupt */
- outw(0x0001, ioaddr + 0x04); /* Reset RDC MAC */
- i = 0;
- do{}while((i++ < 2048) && (inw(ioaddr + 0x04) & 0x1));
-
- free_irq(dev->irq, dev);
-
- /* Free RX buffer */
- for (i = 0; i < RX_DCNT; i++) {
- if (lp->rx_insert_ptr->skb_ptr) {
- pci_unmap_single(lp->pdev, lp->rx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
- dev_kfree_skb(lp->rx_insert_ptr->skb_ptr);
- lp->rx_insert_ptr->skb_ptr = 0;
- }
- lp->rx_insert_ptr = lp->rx_insert_ptr->vndescp;
- }
-
- /* Free TX buffer */
- for (i = 0; i < TX_DCNT; i++) {
- if (lp->tx_insert_ptr->skb_ptr) {
- pci_unmap_single(lp->pdev, lp->tx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_TODEVICE);
- dev_kfree_skb(lp->tx_insert_ptr->skb_ptr);
- lp->rx_insert_ptr->skb_ptr = 0;
- }
- lp->tx_insert_ptr = lp->tx_insert_ptr->vndescp;
- }
-
- /* Free Descriptor memory */
- pci_free_consistent(lp->pdev, ALLOC_DESC_SIZE, lp->desc_pool, lp->desc_dma);
-}
-
-
-
-#ifdef CONFIG_R6040_NAPI
-static int r6040_poll(struct net_device *dev, int *budget)
-{
- struct r6040_private *lp;
- struct r6040_descriptor *descptr;
- struct sk_buff *skb_ptr;
- int ioaddr, status;
- unsigned long flags;
-
-
- ioaddr = dev->base_addr;
- lp = (struct r6040_private *)dev->priv;
- unsigned long rx_work = dev->quota ;
- unsigned long rx ;
-
-
-#if 1
- /* TX interrupt request */
- if (NAPI_status & 0x10) {
-
- descptr = lp->tx_remove_ptr;
- while(lp->tx_free_desc < TX_DCNT) {
- if (descptr->status & 0x8000) break; /* Not complte */
- skb_ptr = descptr->skb_ptr;
- pci_unmap_single(lp->pdev, descptr->buf, skb_ptr->len, PCI_DMA_TODEVICE);
- dev_kfree_skb_irq(skb_ptr); /* Free buffer */
- descptr->skb_ptr = 0;
- descptr = descptr->vndescp; /* To next descriptor */
- lp->tx_free_desc++;
- }
- lp->tx_remove_ptr = descptr;
- if (lp->tx_free_desc) netif_wake_queue(dev);
- }
-#endif
-#if 1
- /* RX interrupt request */
- if (NAPI_status & 0x01) {
-
- descptr = lp->rx_remove_ptr;
- while(lp->rx_free_desc) {
- if (descptr->status & 0x8000) break; /* No Rx packet */
- skb_ptr = descptr->skb_ptr;
- descptr->skb_ptr = 0;
- skb_ptr->dev = dev;
- skb_put(skb_ptr, descptr->len - 4);
- pci_unmap_single(lp->pdev, descptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
- skb_ptr->protocol = eth_type_trans(skb_ptr, dev);
- netif_receive_skb(skb_ptr); /* Send to upper layer */
- lp->stats.rx_packets++;
- lp->stats.rx_bytes += descptr->len;
- descptr = descptr->vndescp; /* To next descriptor */
- lp->rx_free_desc--;
- }
- lp->rx_remove_ptr = descptr;
-
- }
- /* Allocate new RX buffer */
- if (lp->rx_free_desc < RX_DCNT) rx_buf_alloc(lp,dev);
-
- local_irq_disable();
- netif_rx_complete(dev);
- outw(R6040_INT_MASK,ioaddr + 0x40);
- local_irq_enable();
- return 0;
-#endif
-}
-#endif
-
-/* Init RDC MAC */
-static void r6040_up(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- struct r6040_descriptor *descptr;
- int i;
- int ioaddr = dev->base_addr;
- u32 tmp_addr;
- dma_addr_t desc_dma, start_dma;
-
- RDC_DBUG("r6040_up()", 0);
-
- /* Initilize */
- lp->tx_free_desc = TX_DCNT;
- lp->rx_free_desc = 0;
-
- /* Init descriptor */
- memset(lp->desc_pool, 0, ALLOC_DESC_SIZE); /* Let all descriptor = 0 */
- lp->tx_insert_ptr = (struct r6040_descriptor *)lp->desc_pool;
- lp->tx_remove_ptr = lp->tx_insert_ptr;
- lp->rx_insert_ptr = (struct r6040_descriptor *)lp->tx_insert_ptr+TX_DCNT;
- lp->rx_remove_ptr = lp->rx_insert_ptr;
-
- /* Init TX descriptor */
- descptr = lp->tx_insert_ptr;
- desc_dma = lp->desc_dma;
- start_dma = desc_dma;
- for (i = 0; i < TX_DCNT; i++) {
- descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct r6040_descriptor));
- descptr->vndescp = (descptr + 1);
- descptr = (descptr + 1);
- desc_dma += sizeof(struct r6040_descriptor);
- }
- (descptr - 1)->ndesc = cpu_to_le32(start_dma);
- (descptr - 1)->vndescp = lp->tx_insert_ptr;
-
- /* Init RX descriptor */
- start_dma = desc_dma;
- descptr = lp->rx_insert_ptr;
- for (i = 0; i < RX_DCNT; i++) {
- descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct r6040_descriptor));
- descptr->vndescp = (descptr + 1);
- descptr = (descptr + 1);
- desc_dma += sizeof(struct r6040_descriptor);
- }
- (descptr - 1)->ndesc = cpu_to_le32(start_dma);
- (descptr - 1)->vndescp = lp->rx_insert_ptr;
-
- /* Allocate buffer for RX descriptor */
- rx_buf_alloc(lp,dev);
-
-#if RDC_DEBUG
-descptr = lp->tx_insert_ptr;
-for (i = 0; i < TX_DCNT; i++) {
- printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
- descptr = descptr->vndescp;
-}
-descptr = lp->rx_insert_ptr;
-for (i = 0; i < RX_DCNT; i++) {
- printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
- descptr = descptr->vndescp;
-}
-#endif
-
- /* MAC operation register */
- outw(0x01, ioaddr+0x04); /* Reset MAC */
- outw(2 , ioaddr+0xAC); /* Reset internal state machine */
- outw(0 , ioaddr+0xAC);
- udelay(5000);
-
- /* TX and RX descriptor start Register */
- tmp_addr = cpu_to_le32(lp->tx_insert_ptr);
- tmp_addr = virt_to_bus((volatile void *)tmp_addr);
- outw((u16) tmp_addr, ioaddr+0x2c);
- outw(tmp_addr >> 16, ioaddr+0x30);
- tmp_addr = cpu_to_le32(lp->rx_insert_ptr);
- tmp_addr = virt_to_bus((volatile void *)tmp_addr);
- outw((u16) tmp_addr, ioaddr+0x34);
- outw(tmp_addr >> 16, ioaddr+0x38);
-
- /* Buffer Size Register */
- outw(MAX_BUF_SIZE, ioaddr+0x18);
-
- /* PHY Mode Check */
- phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
- phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
-
- if (PHY_MODE == 0x3100)
- lp->phy_mode = phy_mode_chk(dev);
- else lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
-
- /* MAC Bus Control Register */
- outw(MBCR_DEFAULT, ioaddr+0x8);
-
- /* MAC TX/RX Enable */
- lp->mcr0 |= lp->phy_mode;
- outw(lp->mcr0, ioaddr);
-
- /* Interrupt Mask Register */
- outw(R6040_INT_MASK, ioaddr + 0x40);
-}
-
-/*
- A periodic timer routine
- Polling PHY Chip Link Status
-*/
-static void r6040_timer(unsigned long data)
-{
- struct net_device *dev=(struct net_device *)data;
- struct r6040_private *lp = dev->priv;
- u16 ioaddr = dev->base_addr, phy_mode;
-
- RDC_DBUG("r6040_timer()", 0);
-
- /* Polling PHY Chip Status */
- if (PHY_MODE == 0x3100)
- phy_mode = phy_mode_chk(dev);
- else phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
-
- if (phy_mode != lp->phy_mode) {
- lp->phy_mode = phy_mode;
- lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode;
- outw(lp->mcr0, ioaddr);
- printk("<RDC> Link Change %x \n", inw(ioaddr));
- }
-
- /* Debug */
-// printk("<RDC> Timer: CR0 %x CR40 %x CR3C %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c));
-
- /* Timer active again */
- lp->timer.expires = TIMER_WUT;
- add_timer(&lp->timer);
-}
-
-/* Allocate skb buffer for rx descriptor */
-static void rx_buf_alloc(struct r6040_private *lp,struct net_device *dev)
-{
- struct r6040_descriptor *descptr;
- int ioaddr = dev->base_addr ;
-
- RDC_DBUG("rx_buf_alloc()", 0);
- descptr = lp->rx_insert_ptr;
- while(lp->rx_free_desc < RX_DCNT){
- descptr->skb_ptr = dev_alloc_skb(MAX_BUF_SIZE);
- if (!descptr->skb_ptr) break;
- descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, descptr->skb_ptr->tail, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE));
- descptr->status = 0x8000;
- descptr = descptr->vndescp;
- lp->rx_free_desc++;
- outw(lp->mcr0 | 0x0002, ioaddr); //Trigger Rx DMA
- }
- lp->rx_insert_ptr = descptr;
-}
-
-/* Status of PHY CHIP */
-static int phy_mode_chk(struct net_device *dev)
-{
- struct r6040_private *lp = dev->priv;
- int ioaddr = dev->base_addr, phy_dat;
-
- RDC_DBUG("phy_mode_chk()", 0);
-
- /* PHY Link Status Check */
- phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
- if (!(phy_dat & 0x4)) return 0x8000; /* Link Failed, full duplex */
-
- /* PHY Chip Auto-Negotiation Status */
- phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
- if (phy_dat & 0x0020) {
- /* Auto Negotiation Mode */
- phy_dat = phy_read(ioaddr, lp->phy_addr, 5);
- phy_dat &= phy_read(ioaddr, lp->phy_addr, 4);
- if (phy_dat & 0x140) phy_dat = 0x8000;
- else phy_dat = 0;
- } else {
- /* Force Mode */
- phy_dat = phy_read(ioaddr, lp->phy_addr, 0);
- if (phy_dat & 0x100) phy_dat = 0x8000;
- else phy_dat = 0x0000;
- }
-
- return phy_dat;
-};
-
-/* Read a word data from PHY Chip */
-static int phy_read(int ioaddr, int phy_addr, int reg_idx)
-{
- int i = 0;
-
- RDC_DBUG("phy_read()", 0);
- outw(0x2000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
- do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x2000) );
-
- return inw(ioaddr + 0x24);
-}
-
-/* Write a word data from PHY Chip */
-static void phy_write(int ioaddr, int phy_addr, int reg_idx, int dat)
-{
- int i = 0;
-
- RDC_DBUG("phy_write()", 0);
- outw(dat, ioaddr + 0x28);
- outw(0x4000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
- do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x4000) );
-}
-
-enum {
- RDC_6040 = 0
-};
-
-static struct pci_device_id r6040_pci_tbl[] = {
- {0x17F3, 0x6040, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
- //{0x1106, 0x3065, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
- {0,} /* terminate list */
-};
-MODULE_DEVICE_TABLE(pci, r6040_pci_tbl);
-
-static struct pci_driver r6040_driver = {
- .name = "r6040",
- .id_table = r6040_pci_tbl,
- .probe = r6040_init_one,
- .remove = __devexit_p(r6040_remove_one),
-};
-
-
-static int __init r6040_init (void)
-{
- RDC_DBUG("r6040_init()", 0);
-
- printk(version);
- printed_version = 1;
-
- return pci_module_init (&r6040_driver);
-}
-
-
-static void __exit r6040_cleanup (void)
-{
- RDC_DBUG("r6040_cleanup()", 0);
- pci_unregister_driver (&r6040_driver);
-}
-
-module_init(r6040_init);
-module_exit(r6040_cleanup);
-
-
-/*
- * Local variables:
- * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c r6040.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
- * c-indent-level: 4
- * c-basic-offset: 4
- * tab-width: 4
- * End:
- */
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Image/Prepare
- $(CP) $(LINUX_DIR)/arch/i386/boot/bzImage $(KDIR)/bzImage
-endef
-
-define trxalign/jffs2-128k
-bs=128k
-endef
-define trxalign/jffs2-64k
-bs=64k
-endef
-define trxalign/squashfs
-bs=1024
-endef
-
-define Image/Build/Airlink
- touch $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-$(2).img
- mv $(KDIR)/root.$(1) $(KDIR)/root.tmp
- dd of=$(KDIR)/root.$(1) if=$(KDIR)/root.tmp $(call trxalign/$(1)) conv=sync
- rm -f $(KDIR)/root.tmp
- $(STAGING_DIR)/bin/airlink -b 1 -j $(shell bash -c 'echo $$[$(3)]') $(KDIR)/bzImage $(KDIR)/root.$(1) $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-$(2).img
-endef
-
-define Image/Build
- $(CP) $(KDIR)/bzImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL).bzImage
- $(call Image/Build/Airlink,$(1),ar525w,$(patsubst jffs2-%k,%,$(1)))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-mount_root ${FAILSAFE:+failsafe}
-exec /bin/busybox init
+++ /dev/null
-diff -urN linux-2.6.19/arch/i386/Kconfig linux-2.6.19.new/arch/i386/Kconfig
---- linux-2.6.19/arch/i386/Kconfig 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/Kconfig 2006-12-17 17:13:33.000000000 +0100
-@@ -180,6 +180,14 @@
- Only choose this option if you have such a system, otherwise you
- should say N here.
-
-+config X86_RDC
-+ bool "Support for RDC 3211 boards"
-+ help
-+ Support for RDC 3211 systems. Say 'Y' here if the kernel is
-+ supposed to run on an IA-32 RDC R3211 system.
-+ Only choose this option if you have such as system, otherwise you
-+ should say N here.
-+
- endchoice
-
- config ACPI_SRAT
-diff -urN linux-2.6.19/arch/i386/Makefile linux-2.6.19.new/arch/i386/Makefile
---- linux-2.6.19/arch/i386/Makefile 2006-11-29 22:57:37.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/Makefile 2006-12-17 17:13:33.000000000 +0100
-@@ -92,6 +92,10 @@
- mflags-$(CONFIG_X86_ES7000) := -Iinclude/asm-i386/mach-es7000
- mcore-$(CONFIG_X86_ES7000) := mach-default
- core-$(CONFIG_X86_ES7000) := arch/i386/mach-es7000/
-+# RDC subarch support
-+mflags-$(CONFIG_X86_RDC) := -Iinclude/asm-i386/mach-generic
-+mcore-$(CONFIG_X86_RDC) := mach-default
-+core-$(CONFIG_X86_RDC) += arch/i386/mach-rdc/
-
- # default subarch .h files
- mflags-y += -Iinclude/asm-i386/mach-default
-diff -urN linux-2.6.19/arch/i386/mach-rdc/Makefile linux-2.6.19.new/arch/i386/mach-rdc/Makefile
---- linux-2.6.19/arch/i386/mach-rdc/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/mach-rdc/Makefile 2006-12-17 17:13:33.000000000 +0100
-@@ -0,0 +1,5 @@
-+#
-+# Makefile for the linux kernel.
-+#
-+
-+obj-$(CONFIG_X86_RDC) := led.o
-diff -urN linux-2.6.19/arch/i386/mach-rdc/led.c linux-2.6.19.new/arch/i386/mach-rdc/led.c
---- linux-2.6.19/arch/i386/mach-rdc/led.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/mach-rdc/led.c 2006-12-17 17:13:33.000000000 +0100
-@@ -0,0 +1,743 @@
-+/*
-+ * LED interface for WP3200
-+ *
-+ * Copyright (C) 2002, by Allen Hung
-+ *
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/fcntl.h>
-+#include <linux/sched.h>
-+#include <linux/module.h>
-+#include <linux/proc_fs.h>
-+#include <linux/init.h>
-+#include <linux/timer.h>
-+#include <asm/io.h>
-+#include <asm/uaccess.h>
-+#include <asm/system.h>
-+#include <linux/reboot.h>
-+
-+#include "led.h"
-+
-+#define BUF_LEN 30
-+
-+struct LED_DATA {
-+ char sts_buf[BUF_LEN+1];
-+ unsigned long sts;
-+};
-+
-+struct LED_DATA led_data[LED_DEV_NUM];
-+// sam
-+unsigned long ul_ledstat = 0xffffffff;
-+
-+
-+static struct timer_list blink_timer[LED_DEV_NUM];
-+// sam 01-30-2004 for watchdog
-+static struct timer_list watchdog;
-+// end sam
-+static char cmd_buf[BUF_LEN+1];
-+
-+//------------------------------------------------------------
-+static long atoh(char *p)
-+{
-+ long v = 0, c;
-+ while ( (c = *p++) ) {
-+ if ( c >= '0' && c <= '9' ) v = (v << 4) + c - '0';
-+ else if ( c >= 'a' && c <= 'f' ) v = (v << 4) + c - 'a' + 0xA;
-+ else if ( c >= 'A' && c <= 'F' ) v = (v << 4) + c - 'A' + 0xA;
-+ else break;
-+ }
-+ return v;
-+}
-+
-+static int reset_flash_default(void *data)
-+{
-+ char *argv[3], *envp[1] = {NULL};
-+ int i = 0;
-+
-+ int reset_default=(int) data;
-+
-+ argv[i++] = "/bin/flash";
-+ argv[i++] = "default";
-+ argv[i] = NULL;
-+ if(reset_default)
-+ if (call_usermodehelper(argv[0], argv, envp, 1))
-+ printk("failed to Reset to default\n");
-+ machine_restart(0);
-+ return 0;
-+}
-+
-+// sam for ps 3205U -- using CSx1 (0xb0e00000)
-+// bit map as following
-+// BIT 1 2 3 4 5
-+// POWER WLEN PORT1 PORT2 PORT3
-+//
-+// value 0 --> led on
-+// value 1 --> led off
-+
-+#define _ROUTER_
-+
-+#ifdef _ROUTER_
-+ #define LED_VAL 0x8000384C // the data ofset of gpio 0~30
-+#else
-+ #define LED_VAL 0x80003888 // the ofset of gpio 31~58
-+#endif
-+#define GPIO_VAL 0x8000384C // the offset of gpio 0-30
-+
-+
-+
-+// sam 1-30-2004 LED status
-+// bit map as following
-+// BIT 4:0 Link status -->PHY Link ->1 = up, 0 = down
-+#define LINK_STATUS (*(unsigned long *)0xb2000014)
-+#define WATCHDOG_VAL (*(unsigned long *)0xb20000c0)
-+#define WATCHDOG_PERIOD 500 // unit ms
-+#define EXPIRE_TIME 300 // unit 10 ms
-+#define CLEAR_TIMEER 0xffffa000l // bit 14:0 -> count up timer, write 0 to clear
-+#define ENABLE_WATCHDOG 0x80000000l // bit 31 -> 1 enable , 0 disable watchdog
-+#define WATCHDOG_SET_TMR_SHIFT 16 // bit 16:30 -> watchdog timer set
-+// end sam
-+
-+
-+//------------------------------------------------------------
-+static void turn_led(int id, int on)
-+{
-+ unsigned long led_bit = 1 << (id);
-+ unsigned long led_bit_val;
-+
-+ // since we define we have 8 led devices and use gpio 53, 55, 57, 58
-+ // which locate at bit21~26, so we rotate left 20bit
-+
-+#ifdef _ROUTER_
-+ led_bit_val = led_bit;
-+#else
-+ led_bit_val = led_bit << 20;
-+#endif
-+
-+ switch ( on ) {
-+ case 0:
-+ ul_ledstat|= led_bit_val;
-+ outl(LED_VAL, 0xcf8);
-+ outl(ul_ledstat, 0xcfc);
-+ break; // LED OFF
-+ case 1:
-+ ul_ledstat &= ~led_bit_val;
-+ outl(LED_VAL, 0xcf8);
-+ outl(ul_ledstat, 0xcfc);
-+ break; // LED ON
-+ case 2:
-+ ul_ledstat ^= led_bit_val;
-+ outl(LED_VAL, 0xcf8);
-+ outl(ul_ledstat, 0xcfc);
-+ break; // LED inverse
-+ }
-+}
-+
-+
-+static int led_flash[30]={20,10,100,5,5,150,100,5,5,50,20,50,50,20,60,5,20,10,30,10,5,10,50,2,5,5,5,70,10,50};//Erwin
-+static unsigned int wlan_counter; //Erwin
-+static void blink_wrapper(u_long id)
-+{
-+ u_long sts = led_data[id].sts;
-+
-+ if ( (sts & LED_BLINK_CMD) == LED_BLINK_CMD ) {
-+ unsigned long period = sts & LED_BLINK_PERIOD;
-+ if(period == 0xffff) // BLINK random
-+ {
-+ blink_timer[id].expires = jiffies + 3*led_flash[wlan_counter%30]*HZ/1000;
-+ wlan_counter++;
-+ }
-+ else
-+ blink_timer[id].expires = jiffies + (period * HZ / 1000);
-+ turn_led(id, 2);
-+ add_timer(&blink_timer[id]);
-+ }
-+ else if ( sts == LED_ON || sts == LED_OFF )
-+ turn_led(id, sts==LED_ON ? 1 : 0);
-+}
-+//------------------------------------------------------------
-+static void get_token_str(char *str, char token[][21], int token_num)
-+{
-+ int t, i;
-+
-+ for ( t = 0 ; t < token_num ; t++ ) {
-+ memset(token[t], 0, 21);
-+ while ( *str == ' ' ) str++;
-+ for ( i = 0 ; str[i] ; i++ ) {
-+ if ( str[i] == '\t' || str[i] == ' ' || str[i] == '\n' ) break;
-+ if ( i < 20 ) token[t][i] = str[i];
-+ }
-+ str += i;
-+ }
-+}
-+
-+//------------------------------------------------------------
-+static void set_led_status_by_str(int id)
-+{
-+ char token[3][21], *p;
-+
-+
-+ get_token_str(led_data[id].sts_buf, token, 3);
-+
-+ if ( strcmp(token[0], "LED") )
-+ {
-+ goto set_led_off;
-+ }
-+ if ( !strcmp(token[1], "ON") )
-+ {
-+
-+ turn_led(id, 1);
-+ led_data[id].sts = LED_ON;
-+ }
-+ else if ( !strcmp(token[1], "OFF") )
-+ {
-+
-+ goto set_led_off;
-+ }
-+ else if ( !strcmp(token[1], "BLINK") )
-+ {
-+ unsigned int period = 0;
-+ p = token[2];
-+ if ( !strcmp(p, "FAST") )
-+ period = LED_BLINK_FAST & LED_BLINK_PERIOD;
-+ else if ( !strcmp(p, "SLOW") )
-+ period = LED_BLINK_SLOW & LED_BLINK_PERIOD;
-+ else if ( !strcmp(p, "EXTRA_SLOW") )
-+ period = LED_BLINK_EXTRA_SLOW & LED_BLINK_PERIOD;
-+ else if ( !strcmp(p, "RANDOM") )
-+ period = LED_BLINK_RANDOM & LED_BLINK_PERIOD;
-+ else if ( !strcmp(p, "OFF") )
-+ goto set_led_off;
-+ else if ( *p >= '0' && *p <= '9' )
-+ {
-+ while ( *p >= '0' && *p <= '9' )
-+ period = period * 10 + (*p++) - '0';
-+// if ( period > 10000 )
-+// period = 10000;
-+ }
-+ else
-+ period = LED_BLINK & LED_BLINK_PERIOD;
-+
-+ if ( period == 0 )
-+ goto set_led_off;
-+
-+ sprintf(led_data[id].sts_buf, "LED BLINK %d\n", period);
-+ led_data[id].sts = LED_BLINK_CMD + period;
-+ turn_led(id, 2);
-+ // Set timer for next blink
-+ del_timer(&blink_timer[id]);
-+ blink_timer[id].function = blink_wrapper;
-+ blink_timer[id].data = id;
-+ init_timer(&blink_timer[id]);
-+
-+ blink_timer[id].expires = jiffies + (1000 * HZ / 1000);
-+
-+ add_timer(&blink_timer[id]);
-+ }
-+ else
-+ {
-+ goto set_led_off;
-+ }
-+ return;
-+ set_led_off:
-+ strcpy(led_data[id].sts_buf, "LED OFF\n");
-+ led_data[id].sts = LED_OFF;
-+ turn_led(id, 0);
-+}
-+
-+//----------------------------------------------------------------------
-+static int led_read_proc(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
-+{
-+ int len, dev;
-+
-+ for ( len = dev = 0 ; dev < LED_DEV_NUM ; dev++ ) {
-+ len += sprintf(buf+len, "%d: %s", dev, led_data[dev].sts_buf);
-+ }
-+ len = strlen(buf) - fpos;
-+ if ( len <= 0 ) {
-+ *start = buf;
-+ *eof = 1;
-+ return 0;
-+ }
-+ *start = buf + fpos;
-+ if ( len <= length ) *eof = 1;
-+ return len < length ? len : length;
-+}
-+
-+//----------------------------------------------------------------------
-+static int led_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+ int id = (int)file->private_data;
-+
-+ switch ( cmd ) {
-+ case LED_ON:
-+ strcpy(led_data[id].sts_buf, "LED ON\n");
-+ set_led_status_by_str(id);
-+ break;
-+ case LED_OFF:
-+ strcpy(led_data[id].sts_buf, "LED OFF\n");
-+ set_led_status_by_str(id);
-+ break;
-+ default:
-+ if ( (cmd & LED_BLINK_CMD) != LED_BLINK_CMD )
-+ {
-+ break;
-+ }
-+ case LED_BLINK:
-+ case LED_BLINK_FAST:
-+ case LED_BLINK_SLOW:
-+ case LED_BLINK_EXTRA_SLOW:
-+ case LED_BLINK_RANDOM:
-+ sprintf(led_data[id].sts_buf, "LED BLINK %d\n", (int)(cmd & LED_BLINK_PERIOD));
-+ set_led_status_by_str(id);
-+ break;
-+ }
-+ return 0;
-+}
-+
-+static int led_open(struct inode *inode, struct file *file)
-+{
-+ int led_id = MINOR(inode->i_rdev);
-+// unsigned long led_bit = 1 << (led_id);
-+
-+ if ( led_id >= LED_DEV_NUM )
-+ return -ENODEV;
-+/* sam 12/02/2003
-+ GPIO_SEL_I_O &= ~led_bit; // 0 to GPIO
-+ GPIO_O_EN |= (led_bit << 16); // 0 to Output
-+*/
-+
-+ file->private_data = (void*)led_id;
-+ return 0;
-+}
-+
-+static long led_read(struct file *file, char *buf, size_t count, loff_t *fpos)
-+{
-+ int rem, len;
-+ int id = (int)file->private_data;
-+ char *p = led_data[id].sts_buf;
-+
-+ len = strlen(p);
-+ rem = len - *fpos;
-+ if ( rem <= 0 ) {
-+ *fpos = len;
-+ return 0;
-+ }
-+ if ( rem > count ) rem = count;
-+ memcpy(buf, p+(*fpos), rem);
-+ *fpos += rem;
-+ return rem;
-+}
-+
-+static long led_write(struct file *file, char *buf, size_t count, loff_t *fpos)
-+{
-+ int len;
-+ int id = (int)file->private_data;
-+ char *p = id == REG_MINOR ? cmd_buf : led_data[id].sts_buf;
-+ memset(p, 0, BUF_LEN);
-+
-+ p += *fpos;
-+ len = 0;
-+
-+
-+ while ( count > 0 )
-+ {
-+
-+ if ( *fpos < BUF_LEN )
-+ {
-+ int c = *buf++;
-+ p[len] = c>='a' && c<='z' ? c-'a'+'A' : c;
-+ }
-+ (*fpos)++;
-+ len++;
-+ count--;
-+ }
-+ // sam
-+ set_led_status_by_str(id);
-+ (*fpos) = 0;
-+ //
-+
-+ return len;
-+}
-+
-+static int led_flush(struct file *file)
-+{
-+ int id = (int)file->private_data;
-+
-+ if ( file->f_mode & FMODE_WRITE )
-+ {
-+ set_led_status_by_str(id);
-+ }
-+ return 0;
-+}
-+
-+static struct file_operations led_fops = {
-+ read: led_read,
-+ write: led_write,
-+ flush: led_flush,
-+ ioctl: led_ioctl,
-+ open: led_open,
-+};
-+
-+//----------------------------------------------
-+static unsigned long *reg_addr;
-+static int dump_len;
-+
-+static int dump_content(char *buf)
-+{
-+ return 0;
-+}
-+
-+static long gpio_read(struct file *file, char *buf, size_t count, loff_t *fpos)
-+{
-+ int rem, len;
-+ int id = (int)file->private_data;
-+ char temp[80*10];
-+ unsigned long gpio_regval =0;
-+
-+ outl(GPIO_VAL, 0xcf8);
-+ gpio_regval = inl(0xcfc);
-+ gpio_regval |= 0x40;
-+ outl(gpio_regval, 0xcfc); // each in, need out 1 first
-+ gpio_regval = inl(0xcfc);
-+
-+
-+ // sam debug
-+ //printk(KERN_ERR "gpio_id:%d, gpio_regval:%08X\n", id, gpio_regval);
-+ //end sam
-+
-+ if ( id < GPIO_DEV_NUM ) {
-+ int gpio_bit = 1 << id;
-+
-+ len = sprintf(temp, "%d\n", (gpio_regval & gpio_bit) ? 1 : 0);
-+ }
-+ else // REG device
-+ len = dump_content(temp);
-+ rem = len - *fpos;
-+ if ( rem <= 0 ) {
-+ *fpos = len;
-+ return 0;
-+ }
-+ if ( rem > count ) rem = count;
-+ memcpy(buf, temp+(*fpos), rem);
-+ *fpos += rem;
-+ return rem;
-+}
-+
-+static int gpio_flush(struct file *file)
-+{
-+ return 0;
-+}
-+
-+static int gpio_open(struct inode *inode, struct file *file)
-+{
-+ int id = MINOR(inode->i_rdev);
-+ if ( id >= GPIO_DEV_NUM && id != REG_MINOR )
-+ return -ENODEV;
-+ file->private_data = (void*)id;
-+ return 0;
-+}
-+
-+static struct file_operations gpio_fops = {
-+ read: gpio_read,
-+ open: gpio_open,
-+ flush: gpio_flush,
-+ write: led_write,
-+};
-+
-+// ---------------------------------------------
-+// sam 1-30-2004 LAN_STATUS Device
-+
-+//static unsigned long *reg_addr;
-+//static int dump_len;
-+
-+//static int lanSt_content(char *buf)
-+//{
-+// int i, j, len;
-+// unsigned long *p = (unsigned long *)0xb2000014; // PHY_ST
-+// // j = dump_len/4 + ((dump_len&3) ? 1 : 0);
-+// len = sprintf(buf, "Reg Addr = %08lX, Value = \n", (unsigned long)p);
-+// // for ( i = 0 ; i < j ; i++, p++ )
-+// len += sprintf(buf+len,"%08lX\n", *p);
-+
-+// return len;
-+//}
-+
-+#define MAC_IOBASE 0xe800 // Eth0
-+#define PHY_ADDR 1 // For Eth0
-+#define MII_STATUS_ADDR 1
-+// where "id" value means which bit of PHY reg 1 we want to check
-+static long lanSt_read(struct file *file, char *buf, size_t count, loff_t *fpos)
-+{
-+ int rem, len;
-+// unsigned long *p = (unsigned long *)0xb2000014; // PHY_ST
-+ unsigned short status;
-+ unsigned int i = 0;
-+ int id = (int)file->private_data;
-+ char temp[80*10];
-+
-+ outw(0x2000 + MII_STATUS_ADDR + (PHY_ADDR << 8), MAC_IOBASE + 0x20);
-+ do{}while( (i++ < 2048) && (inw(MAC_IOBASE+0x20) & 0x2000) );
-+
-+ status = inw(MAC_IOBASE + 0x24);
-+
-+ // sam debug
-+ //printk(KERN_ERR "PHY REG1 Status:%04x\n", status );
-+ // end sam
-+
-+ if ( id < LAN_DEV_NUM ) {
-+ unsigned long lanSt_bit = 1 << id;
-+// len = lanSt_content(temp);
-+ len = sprintf(temp, "%d\n",(status & lanSt_bit) ? 1 : 0);
-+ }
-+ else // REG device
-+ {
-+ len = sprintf(temp, "-1\n");
-+ }
-+ rem = len - *fpos;
-+ if ( rem <= 0 ) {
-+ *fpos = len;
-+ return 0;
-+ }
-+ if ( rem > count ) rem = count;
-+ memcpy(buf, temp+(*fpos), rem);
-+ *fpos += rem;
-+ return rem;
-+}
-+
-+static int lanSt_flush(struct file *file)
-+{
-+ return 0;
-+}
-+
-+static int lanSt_open(struct inode *inode, struct file *file)
-+{
-+ int id = MINOR(inode->i_rdev);
-+ if ( id >= LAN_DEV_NUM && id != REG_MINOR )
-+ return -ENODEV;
-+ file->private_data = (void*)id;
-+ return 0;
-+}
-+
-+static struct file_operations lanSt_fops = {
-+ read: lanSt_read,
-+ open: lanSt_open,
-+ flush: lanSt_flush,
-+ write: led_write,
-+};
-+
-+//----------------------------------------------
-+static int SwResetPress = 0;
-+static int SwResetCounter = 0;
-+static int RebootFlag = 0;
-+static void watchdog_wrapper(unsigned int period)
-+{
-+ // { RexHua add for restore default, by press SwReset 5 second, 2 sec to restart
-+#if 0 //
-+ u_long reg;
-+
-+ outl(GPIO_VAL, 0xcf8);
-+ reg = inl(0xcfc);
-+ reg |= 0x40;
-+ outl(reg, 0xcfc); // each in, need out 1 first
-+ reg = inl(0xcfc);
-+
-+ if( (reg & 0x40) == 0)
-+ {
-+ if(SwResetPress == 0)
-+ {
-+ SwResetCounter=0;
-+ strcpy(led_data[15].sts_buf, "LED BLINK 500\n" );
-+ set_led_status_by_str(15);
-+ }
-+ SwResetPress=1;
-+ printk("SwReset press!\n");
-+
-+ }
-+ else
-+ {
-+ if(SwResetPress=1)
-+ {
-+ strcpy(led_data[15].sts_buf, "LED ON\n" );
-+ set_led_status_by_str(15);
-+ }
-+
-+ SwResetPress=0;
-+ if(RebootFlag == 1)
-+ machine_restart(0);
-+ }
-+
-+ if(SwResetPress == 1)
-+ {
-+ if(SwResetCounter > 10)
-+ {
-+ turn_led(15, 0);
-+// kernel_thread(reset_flash_default, 1, SIGCHLD);
-+ reset_flash_default(1);
-+ turn_led(15, 1);
-+ }
-+ else if(SwResetCounter == 3)
-+ {
-+ RebootFlag=1;
-+ strcpy(led_data[15].sts_buf, "LED BLINK 100\n" );
-+ set_led_status_by_str(15);
-+ }
-+ }
-+
-+ SwResetCounter++;
-+#endif
-+
-+ // clear timer count
-+ outl(0x80003844, 0xcf8);
-+ outl(0x00800080, 0xcfc); // enable watchdog and set the timeout = 1.34s
-+ //printk(KERN_ERR "wdt\n" );
-+ watchdog.expires = jiffies + (period * HZ / 1000);
-+ add_timer(&watchdog);
-+}
-+
-+//----------------------------------------------
-+static int init_status;
-+
-+#define INIT_REGION 0x01
-+#define INIT_LED_REGISTER 0x02
-+#define INIT_LED_PROC_READ 0x04
-+#define INIT_GPIO_REGISTER 0x08
-+// sam 1-30-2004 LAN_STATUS
-+#define INIT_LAN_STATUS_REGISTER 0x10
-+#define INIT_WATCHDOG_REGISTER 0x20
-+
-+static void led_exit(void)
-+{
-+ int id;
-+ for ( id = 0 ; id < LED_DEV_NUM ; id++ ) {
-+ del_timer(&blink_timer[id]);
-+ turn_led(id, 0);
-+ }
-+ if ( init_status & INIT_LED_PROC_READ )
-+ remove_proc_entry("driver/led", NULL);
-+
-+ if ( init_status & INIT_LED_REGISTER )
-+ unregister_chrdev(LED_MAJOR, "led");
-+
-+ if ( init_status & INIT_GPIO_REGISTER )
-+ unregister_chrdev(GPIO_MAJOR, "gpio");
-+ // sam 1-30-2004
-+
-+ if( init_status & INIT_LAN_STATUS_REGISTER )
-+ unregister_chrdev(LAN_STATUS_MAJOR, "lanSt");
-+
-+ if( init_status & INIT_WATCHDOG_REGISTER)
-+ del_timer(&watchdog);
-+
-+
-+ // end sam
-+
-+}
-+
-+static int __init led_init(void)
-+{
-+ int result, id, i, j;
-+ unsigned long reg;
-+ init_status = 0;
-+
-+ //----- register device (LED)-------------------------
-+
-+
-+ result = register_chrdev(LED_MAJOR, "led", &led_fops);
-+ if ( result < 0 ) {
-+ printk(KERN_ERR "led: can't register char device\n" );
-+ led_exit();
-+ return result;
-+ }
-+ init_status |= INIT_LED_REGISTER;
-+ //----- register device (GPIO)-------------------------
-+ result = register_chrdev(GPIO_MAJOR, "gpio", &gpio_fops);
-+ if ( result < 0 ) {
-+ printk(KERN_ERR "gpio: can't register char device\n" );
-+ led_exit();
-+ return result;
-+ }
-+ init_status |= INIT_GPIO_REGISTER;
-+
-+ // sam 1-30-2004 LAN Status
-+ // ----- register device (LAN_STATUS)-------------------
-+
-+ //--> sam 5-1802995
-+
-+ result = register_chrdev(LAN_STATUS_MAJOR, "lanSt", &lanSt_fops);
-+ if ( result < 0 ) {
-+ printk(KERN_ERR "lanSt: can't register char device\n" );
-+ led_exit();
-+ return result;
-+ }
-+ init_status |= INIT_LAN_STATUS_REGISTER;
-+
-+ // <-- end sam
-+
-+ // -----------init watchdog timer-------------------------
-+ //del_timer(&blink_timer[id]);
-+
-+ outl(0x80003840, 0xcf8);
-+ reg = inl(0xcfc);
-+ reg |= 0x1600; // ensable SRC bit
-+ outl(reg, 0xcfc);
-+#ifdef _ROUTER_
-+ outl(0x80003848, 0xcf8);
-+ reg = inl(0xcfc);
-+ reg |= 0x18040; // enable GPIO, PowerLED:15, WLAN_LED0:16, SwReset:6
-+ outl(reg, 0xcfc);
-+
-+ outl(0x8000384c, 0xcf8);
-+ reg = inl(0xcfc);
-+ reg |= 0x40; // output SwReset:6 1, Set SwReset as Input
-+ outl(reg, 0xcfc);
-+#endif
-+ // sam debug
-+ //reg = inl(0xcfc);
-+ //printk(KERN_ERR "REG40:%08X\n", reg);
-+ // end sam
-+ outl(0x80003844, 0xcf8);
-+ outl(0x00800080, 0xcfc); // enable watchdog and set the timeout = 1.34s
-+
-+ watchdog.function = watchdog_wrapper;
-+ watchdog.data = WATCHDOG_PERIOD;
-+ init_timer(&watchdog);
-+ watchdog.expires = jiffies + (WATCHDOG_PERIOD * HZ / 1000);
-+ add_timer(&watchdog);
-+ init_status |= INIT_WATCHDOG_REGISTER;
-+
-+ // end sam
-+ //------ read proc -------------------
-+ if ( !create_proc_read_entry("driver/led", 0, 0, led_read_proc, NULL) ) {
-+ printk(KERN_ERR "led: can't create /proc/driver/led\n");
-+ led_exit();
-+ return -ENOMEM;
-+ }
-+ init_status |= INIT_LED_PROC_READ;
-+ //------------------------------
-+// reg_addr = (unsigned long *)0xB4000000;
-+// dump_len = 4;
-+
-+ for ( id = 0 ; id < LED_DEV_NUM ; id++ ) {
-+ strcpy(led_data[id].sts_buf, "LED ON\n" );
-+ set_led_status_by_str(id);
-+ }
-+
-+// for (i = 0; i < 0xffff; i++)
-+// for (j = 0; j < 0x6000; j++);
-+
-+/* sam 5-18-2005 remark
-+ for ( id = 0 ; id < LED_DEV_NUM ; id++ ) {
-+ strcpy(led_data[id].sts_buf, "LED ON\n" );
-+ set_led_status_by_str(id);
-+ }
-+*/
-+ printk(KERN_INFO "LED & GPIO & LAN Status Driver LED_VERSION \n");
-+ return 0;
-+}
-+
-+module_init(led_init);
-+module_exit(led_exit);
-+EXPORT_NO_SYMBOLS;
-diff -urN linux-2.6.19/arch/i386/mach-rdc/led.h linux-2.6.19.new/arch/i386/mach-rdc/led.h
---- linux-2.6.19/arch/i386/mach-rdc/led.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/mach-rdc/led.h 2006-12-17 17:13:33.000000000 +0100
-@@ -0,0 +1,32 @@
-+#ifndef _LED_H_INCLUDED
-+#define _LED_H_INCLUDED
-+
-+#include <linux/autoconf.h>
-+
-+#define LED_VERSION "v1.0"
-+#define LED_MAJOR 166
-+#define LED_DEV_NUM 32
-+#define LED_GPIO_START 1
-+#define GPIO_MAJOR 167
-+#define GPIO_DEV_NUM 32
-+#define REG_MINOR 128
-+// sam 1-30-2004 for LAN_STATUS
-+#define LAN_STATUS_MAJOR 168
-+#define LAN_DEV_NUM 5
-+// end sam
-+
-+//#define GPIO_IO_BASE 0xB4002480
-+//#define GPIO_IO_BASE ((unsigned long)0xb20000b8)
-+//#define GPIO_IO_EXTENT 0x40
-+
-+#define LED_ON 0x010000
-+#define LED_OFF 0x020000
-+#define LED_BLINK_CMD 0x030000
-+#define LED_BLINK_PERIOD 0x00FFFF
-+#define LED_BLINK (LED_BLINK_CMD|1000)
-+#define LED_BLINK_FAST (LED_BLINK_CMD|250)
-+#define LED_BLINK_SLOW (LED_BLINK_CMD|500)
-+#define LED_BLINK_EXTRA_SLOW (LED_BLINK_CMD|2000)
-+#define LED_BLINK_RANDOM (LED_BLINK_CMD|0xffff)
-+
-+#endif
-diff -urN linux-2.6.21.1/arch/i386/kernel/time.c linux-2.6.21.1.new/arch/i386/kernel/time.c
---- linux-2.6.21.1/arch/i386/kernel/time.c 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1.new/arch/i386/kernel/time.c 2007-05-31 13:43:31.000000000 +0200
-@@ -264,8 +264,16 @@
- /* Duplicate of time_init() below, with hpet_enable part added */
- void __init hpet_time_init(void)
- {
-+#ifndef CONFIG_X86_RDC
- if (!hpet_enable())
- setup_pit_timer();
-+#else
-+ struct timespec ts;
-+
-+ /* RDC devices do not have CMOS */
-+ ts.tv_sec = 0;
-+ ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
-+#endif
- time_init_hook();
- }
-
-@@ -279,6 +287,18 @@
- */
- void __init time_init(void)
- {
-+#ifndef CONFIG_X86_RDC
- tsc_init();
- late_time_init = choose_time_init();
-+#else
-+ struct timespec ts;
-+
-+ /* RDC devices do not have CMOS */
-+ ts.tv_sec = 0;
-+ ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
-+
-+ do_settimeofday(&ts);
-+
-+ time_init_hook();
-+#endif
- }
+++ /dev/null
-diff -urN linux-2.6.17/drivers/mtd/maps/Kconfig linux-2.6.17.new/drivers/mtd/maps/Kconfig
---- linux-2.6.17/drivers/mtd/maps/Kconfig 2006-06-18 03:49:35.000000000 +0200
-+++ linux-2.6.17.new/drivers/mtd/maps/Kconfig 2006-09-24 20:28:11.000000000 +0200
-@@ -76,6 +76,50 @@
- PNC-2000 is the name of Network Camera product from PHOTRON
- Ltd. in Japan. It uses CFI-compliant flash.
-
-+config MTD_RDC3210
-+ tristate "CFI Flash device mapped on RDC3210"
-+ depends on X86 && MTD_CFI && MTD_PARTITIONS
-+ help
-+ RDC-3210 is the flash device we find on Ralink reference board.
-+
-+config MTD_RDC3210_STATIC_MAP
-+ bool "Partitions on RDC3210 mapped statically" if MTD_RDC3210
-+ select MTD_RDC3210_FACTORY_PRESENT
-+ help
-+ The mapping driver will use the static partition map for the
-+ RDC-3210 flash device.
-+
-+config MTD_RDC3210_FACTORY_PRESENT
-+ bool "Reserve a partition on RDC3210 for factory presets"
-+ depends on MTD_RDC3210
-+ default y
-+ help
-+ The mapping driver will reserve a partition on the RDC-3210 flash
-+ device for resetting flash contents to factory defaults.
-+
-+config MTD_RDC3210_ALLOW_JFFS2
-+ bool "JFFS2 filesystem usable in a partition on RDC3210"
-+ depends on MTD_RDC3210 && !MTD_RDC3210_STATIC_MAP
-+ help
-+ The mapping driver will align a partition on the RDC-3210 flash
-+ device to an erase-block boundary so that a JFFS2 filesystem may
-+ reside on it.
-+
-+config MTD_RDC3210_SIZE
-+ hex "Amount of flash memory on RDC3210"
-+ depends on MTD_RDC3210
-+ default "0x400000"
-+ help
-+ Total size in bytes of the RDC-3210 flash device
-+
-+config MTD_RDC3210_BUSWIDTH
-+ int "Width of CFI Flash device mapped on RDC3210"
-+ depends on MTD_RDC3210
-+ default "2"
-+ help
-+ Number of bytes addressed on the RDC-3210 flash device before
-+ addressing the same chip again
-+
- config MTD_SC520CDP
- tristate "CFI Flash device mapped on AMD SC520 CDP"
- depends on X86 && MTD_CFI && MTD_CONCAT
-diff -urN linux-2.6.17/drivers/mtd/maps/Makefile linux-2.6.17.new/drivers/mtd/maps/Makefile
---- linux-2.6.17/drivers/mtd/maps/Makefile 2006-06-18 03:49:35.000000000 +0200
-+++ linux-2.6.17.new/drivers/mtd/maps/Makefile 2006-09-24 20:26:10.000000000 +0200
-@@ -28,6 +28,7 @@
- obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
- obj-$(CONFIG_MTD_PNC2000) += pnc2000.o
- obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
-+obj-$(CONFIG_MTD_RDC3210) += rdc3210.o
- obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
- obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o
- obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
+++ /dev/null
-diff -urN linux-2.6.17/drivers/net/Kconfig linux-2.6.17.new/drivers/net/Kconfig
---- linux-2.6.17/drivers/net/Kconfig 2006-06-18 03:49:35.000000000 +0200
-+++ linux-2.6.17.new/drivers/net/Kconfig 2006-09-25 13:14:27.000000000 +0200
-@@ -1358,6 +1358,19 @@
- <file:Documentation/networking/net-modules.txt>. The module will be
- called apricot.
-
-+config R6040
-+ tristate "RDC Fast-Ethernet support (EXPERIMENTAL)"
-+ depends on NET_PCI && EXPERIMENTAL
-+ select MII
-+ help
-+ If you have a network (Ethernet) controller of this type, say Y and
-+ read the Ethernet-HOWTO, available from
-+ <http://www.tldp.org/docs.html#howto>.
-+
-+ To compile this driver as a module, choose M here and read
-+ <file:Documentation/networking/net-modules.txt>. The module will be
-+ called r6040.
-+
- config B44
- tristate "Broadcom 4400 ethernet support (EXPERIMENTAL)"
- depends on NET_PCI && PCI && EXPERIMENTAL
-diff -urN linux-2.6.17/drivers/net/Makefile linux-2.6.17.new/drivers/net/Makefile
---- linux-2.6.17/drivers/net/Makefile 2006-06-18 03:49:35.000000000 +0200
-+++ linux-2.6.17.new/drivers/net/Makefile 2006-09-25 13:14:45.000000000 +0200
-@@ -106,6 +106,7 @@
- obj-$(CONFIG_NE3210) += ne3210.o 8390.o
- obj-$(CONFIG_NET_SB1250_MAC) += sb1250-mac.o
- obj-$(CONFIG_B44) += b44.o
-+obj-$(CONFIG_R6040) += r6040.o
- obj-$(CONFIG_FORCEDETH) += forcedeth.o
- obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o
-
+++ /dev/null
---- linux-2.6.19.2/init/do_mounts.c 2007-01-10 11:10:37.000000000 -0800
-+++ foo/init/do_mounts.c 2007-04-05 13:15:37.000000000 -0700
-@@ -243,6 +243,8 @@
- {
- char *s = page;
-
-+ if (!root_fs_names)
-+ root_fs_names = "squashfs,jffs2";
- if (root_fs_names) {
- strcpy(page, root_fs_names);
- while (*s++) {
+++ /dev/null
-diff -urN linux-2.6.19.2/drivers/leds/Kconfig linux-2.6.19.2.new/drivers/leds/Kconfig
---- linux-2.6.19.2/drivers/leds/Kconfig 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.new/drivers/leds/Kconfig 2007-04-16 22:09:40.000000000 +0200
-@@ -76,6 +76,12 @@
- This option enables support for the Soekris net4801 and net4826 error
- LED.
-
-+config LEDS_RDC3211
-+ tristate "LED Support for RDC3211 boards"
-+ depends on LEDS_CLASS && X86_RDC
-+ help
-+ This option enables support for the RDC3211 various LEDs.
-+
- comment "LED Triggers"
-
- config LEDS_TRIGGERS
-diff -urN linux-2.6.21.1/drivers/leds/Makefile linux-2.6.21.1.new/drivers/leds/Makefile
---- linux-2.6.21.1/drivers/leds/Makefile 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1.new/drivers/leds/Makefile 2007-05-25 12:19:13.000000000 +0200
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
- obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
- obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o
-+obj-$(CONFIG_LEDS_RDC3211) += leds-rdc3211.o
-
- # LED Triggers
- obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
+++ /dev/null
-diff -Naur linux-old/arch/i386/boot/compressed/LzmaDecode.c linux-lzma/arch/i386/boot/compressed/LzmaDecode.c
---- linux-old/arch/i386/boot/compressed/LzmaDecode.c 1969-12-31 19:00:00.000000000 -0500
-+++ linux-lzma/arch/i386/boot/compressed/LzmaDecode.c 2005-06-05 00:07:38.000000000 -0400
-@@ -0,0 +1,586 @@
-+/*
-+ LzmaDecode.c
-+ LZMA Decoder (optimized for Speed version)
-+
-+ LZMA SDK 4.17 Copyright (c) 1999-2005 Igor Pavlov (2005-04-05)
-+ http://www.7-zip.org/
-+
-+ LZMA SDK is licensed under two licenses:
-+ 1) GNU Lesser General Public License (GNU LGPL)
-+ 2) Common Public License (CPL)
-+ It means that you can select one of these two licenses and
-+ follow rules of that license.
-+
-+ SPECIAL EXCEPTION:
-+ Igor Pavlov, as the author of this Code, expressly permits you to
-+ statically or dynamically link your Code (or bind by name) to the
-+ interfaces of this file without subjecting your linked Code to the
-+ terms of the CPL or GNU LGPL. Any modifications or additions
-+ to this file, however, are subject to the LGPL or CPL terms.
-+*/
-+
-+#include "LzmaDecode.h"
-+
-+#ifndef Byte
-+#define Byte unsigned char
-+#endif
-+
-+#define kNumTopBits 24
-+#define kTopValue ((UInt32)1 << kNumTopBits)
-+
-+#define kNumBitModelTotalBits 11
-+#define kBitModelTotal (1 << kNumBitModelTotalBits)
-+#define kNumMoveBits 5
-+
-+#define RC_READ_BYTE (*Buffer++)
-+
-+#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
-+ { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }}
-+
-+#ifdef _LZMA_IN_CB
-+
-+#define RC_TEST { if (Buffer == BufferLim) \
-+ { UInt32 size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \
-+ BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }}
-+
-+#define RC_INIT Buffer = BufferLim = 0; RC_INIT2
-+
-+#else
-+
-+#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
-+
-+#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
-+
-+#endif
-+
-+#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
-+
-+#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound)
-+#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits;
-+#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits;
-+
-+#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
-+ { UpdateBit0(p); mi <<= 1; A0; } else \
-+ { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
-+
-+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
-+
-+#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
-+ { int i = numLevels; res = 1; \
-+ do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \
-+ res -= (1 << numLevels); }
-+
-+
-+#define kNumPosBitsMax 4
-+#define kNumPosStatesMax (1 << kNumPosBitsMax)
-+
-+#define kLenNumLowBits 3
-+#define kLenNumLowSymbols (1 << kLenNumLowBits)
-+#define kLenNumMidBits 3
-+#define kLenNumMidSymbols (1 << kLenNumMidBits)
-+#define kLenNumHighBits 8
-+#define kLenNumHighSymbols (1 << kLenNumHighBits)
-+
-+#define LenChoice 0
-+#define LenChoice2 (LenChoice + 1)
-+#define LenLow (LenChoice2 + 1)
-+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-+
-+
-+#define kNumStates 12
-+#define kNumLitStates 7
-+
-+#define kStartPosModelIndex 4
-+#define kEndPosModelIndex 14
-+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-+
-+#define kNumPosSlotBits 6
-+#define kNumLenToPosStates 4
-+
-+#define kNumAlignBits 4
-+#define kAlignTableSize (1 << kNumAlignBits)
-+
-+#define kMatchMinLen 2
-+
-+#define IsMatch 0
-+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-+#define IsRepG0 (IsRep + kNumStates)
-+#define IsRepG1 (IsRepG0 + kNumStates)
-+#define IsRepG2 (IsRepG1 + kNumStates)
-+#define IsRep0Long (IsRepG2 + kNumStates)
-+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-+#define LenCoder (Align + kAlignTableSize)
-+#define RepLenCoder (LenCoder + kNumLenProbs)
-+#define Literal (RepLenCoder + kNumLenProbs)
-+
-+#if Literal != LZMA_BASE_SIZE
-+StopCompilingDueBUG
-+#endif
-+
-+#ifdef _LZMA_OUT_READ
-+
-+typedef struct _LzmaVarState
-+{
-+ Byte *Buffer;
-+ Byte *BufferLim;
-+ UInt32 Range;
-+ UInt32 Code;
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *InCallback;
-+ #endif
-+ Byte *Dictionary;
-+ UInt32 DictionarySize;
-+ UInt32 DictionaryPos;
-+ UInt32 GlobalPos;
-+ UInt32 Reps[4];
-+ int lc;
-+ int lp;
-+ int pb;
-+ int State;
-+ int RemainLen;
-+ Byte TempDictionary[4];
-+} LzmaVarState;
-+
-+int LzmaDecoderInit(
-+ unsigned char *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ unsigned char *dictionary, UInt32 dictionarySize,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *InCallback
-+ #else
-+ unsigned char *inStream, UInt32 inSize
-+ #endif
-+ )
-+{
-+ Byte *Buffer;
-+ Byte *BufferLim;
-+ UInt32 Range;
-+ UInt32 Code;
-+ LzmaVarState *vs = (LzmaVarState *)buffer;
-+ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
-+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
-+ UInt32 i;
-+ if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState))
-+ return LZMA_RESULT_NOT_ENOUGH_MEM;
-+ vs->Dictionary = dictionary;
-+ vs->DictionarySize = dictionarySize;
-+ vs->DictionaryPos = 0;
-+ vs->GlobalPos = 0;
-+ vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
-+ vs->lc = lc;
-+ vs->lp = lp;
-+ vs->pb = pb;
-+ vs->State = 0;
-+ vs->RemainLen = 0;
-+ dictionary[dictionarySize - 1] = 0;
-+ for (i = 0; i < numProbs; i++)
-+ p[i] = kBitModelTotal >> 1;
-+
-+ #ifdef _LZMA_IN_CB
-+ RC_INIT;
-+ #else
-+ RC_INIT(inStream, inSize);
-+ #endif
-+ vs->Buffer = Buffer;
-+ vs->BufferLim = BufferLim;
-+ vs->Range = Range;
-+ vs->Code = Code;
-+ #ifdef _LZMA_IN_CB
-+ vs->InCallback = InCallback;
-+ #endif
-+
-+ return LZMA_RESULT_OK;
-+}
-+
-+int LzmaDecode(unsigned char *buffer,
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed)
-+{
-+ LzmaVarState *vs = (LzmaVarState *)buffer;
-+ Byte *Buffer = vs->Buffer;
-+ Byte *BufferLim = vs->BufferLim;
-+ UInt32 Range = vs->Range;
-+ UInt32 Code = vs->Code;
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *InCallback = vs->InCallback;
-+ #endif
-+ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
-+ int state = vs->State;
-+ Byte previousByte;
-+ UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
-+ UInt32 nowPos = 0;
-+ UInt32 posStateMask = (1 << (vs->pb)) - 1;
-+ UInt32 literalPosMask = (1 << (vs->lp)) - 1;
-+ int lc = vs->lc;
-+ int len = vs->RemainLen;
-+ UInt32 globalPos = vs->GlobalPos;
-+
-+ Byte *dictionary = vs->Dictionary;
-+ UInt32 dictionarySize = vs->DictionarySize;
-+ UInt32 dictionaryPos = vs->DictionaryPos;
-+
-+ Byte tempDictionary[4];
-+ if (dictionarySize == 0)
-+ {
-+ dictionary = tempDictionary;
-+ dictionarySize = 1;
-+ tempDictionary[0] = vs->TempDictionary[0];
-+ }
-+
-+ if (len == -1)
-+ {
-+ *outSizeProcessed = 0;
-+ return LZMA_RESULT_OK;
-+ }
-+
-+ while(len != 0 && nowPos < outSize)
-+ {
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ len--;
-+ }
-+ if (dictionaryPos == 0)
-+ previousByte = dictionary[dictionarySize - 1];
-+ else
-+ previousByte = dictionary[dictionaryPos - 1];
-+#else
-+
-+int LzmaDecode(
-+ Byte *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *InCallback,
-+ #else
-+ unsigned char *inStream, UInt32 inSize,
-+ #endif
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed)
-+{
-+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
-+ CProb *p = (CProb *)buffer;
-+
-+ UInt32 i;
-+ int state = 0;
-+ Byte previousByte = 0;
-+ UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
-+ UInt32 nowPos = 0;
-+ UInt32 posStateMask = (1 << pb) - 1;
-+ UInt32 literalPosMask = (1 << lp) - 1;
-+ int len = 0;
-+
-+ Byte *Buffer;
-+ Byte *BufferLim;
-+ UInt32 Range;
-+ UInt32 Code;
-+
-+ if (bufferSize < numProbs * sizeof(CProb))
-+ return LZMA_RESULT_NOT_ENOUGH_MEM;
-+ for (i = 0; i < numProbs; i++)
-+ p[i] = kBitModelTotal >> 1;
-+
-+
-+ #ifdef _LZMA_IN_CB
-+ RC_INIT;
-+ #else
-+ RC_INIT(inStream, inSize);
-+ #endif
-+#endif
-+
-+ *outSizeProcessed = 0;
-+ while(nowPos < outSize)
-+ {
-+ CProb *prob;
-+ UInt32 bound;
-+ int posState = (int)(
-+ (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ & posStateMask);
-+
-+ prob = p + IsMatch + (state << kNumPosBitsMax) + posState;
-+ IfBit0(prob)
-+ {
-+ int symbol = 1;
-+ UpdateBit0(prob)
-+ prob = p + Literal + (LZMA_LIT_SIZE *
-+ (((
-+ (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ )
-+ & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-+
-+ if (state >= kNumLitStates)
-+ {
-+ int matchByte;
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ matchByte = dictionary[pos];
-+ #else
-+ matchByte = outStream[nowPos - rep0];
-+ #endif
-+ do
-+ {
-+ int bit;
-+ CProb *probLit;
-+ matchByte <<= 1;
-+ bit = (matchByte & 0x100);
-+ probLit = prob + 0x100 + bit + symbol;
-+ RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break)
-+ }
-+ while (symbol < 0x100);
-+ }
-+ while (symbol < 0x100)
-+ {
-+ CProb *probLit = prob + symbol;
-+ RC_GET_BIT(probLit, symbol)
-+ }
-+ previousByte = (Byte)symbol;
-+
-+ outStream[nowPos++] = previousByte;
-+ #ifdef _LZMA_OUT_READ
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #endif
-+ if (state < 4) state = 0;
-+ else if (state < 10) state -= 3;
-+ else state -= 6;
-+ }
-+ else
-+ {
-+ UpdateBit1(prob);
-+ prob = p + IsRep + state;
-+ IfBit0(prob)
-+ {
-+ UpdateBit0(prob);
-+ rep3 = rep2;
-+ rep2 = rep1;
-+ rep1 = rep0;
-+ state = state < kNumLitStates ? 0 : 3;
-+ prob = p + LenCoder;
-+ }
-+ else
-+ {
-+ UpdateBit1(prob);
-+ prob = p + IsRepG0 + state;
-+ IfBit0(prob)
-+ {
-+ UpdateBit0(prob);
-+ prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState;
-+ IfBit0(prob)
-+ {
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos;
-+ #endif
-+ UpdateBit0(prob);
-+ if (nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos
-+ #endif
-+ == 0)
-+ return LZMA_RESULT_DATA_ERROR;
-+ state = state < kNumLitStates ? 9 : 11;
-+ #ifdef _LZMA_OUT_READ
-+ pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ previousByte = dictionary[pos];
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #else
-+ previousByte = outStream[nowPos - rep0];
-+ #endif
-+ outStream[nowPos++] = previousByte;
-+ continue;
-+ }
-+ else
-+ {
-+ UpdateBit1(prob);
-+ }
-+ }
-+ else
-+ {
-+ UInt32 distance;
-+ UpdateBit1(prob);
-+ prob = p + IsRepG1 + state;
-+ IfBit0(prob)
-+ {
-+ UpdateBit0(prob);
-+ distance = rep1;
-+ }
-+ else
-+ {
-+ UpdateBit1(prob);
-+ prob = p + IsRepG2 + state;
-+ IfBit0(prob)
-+ {
-+ UpdateBit0(prob);
-+ distance = rep2;
-+ }
-+ else
-+ {
-+ UpdateBit1(prob);
-+ distance = rep3;
-+ rep3 = rep2;
-+ }
-+ rep2 = rep1;
-+ }
-+ rep1 = rep0;
-+ rep0 = distance;
-+ }
-+ state = state < kNumLitStates ? 8 : 11;
-+ prob = p + RepLenCoder;
-+ }
-+ {
-+ int numBits, offset;
-+ CProb *probLen = prob + LenChoice;
-+ IfBit0(probLen)
-+ {
-+ UpdateBit0(probLen);
-+ probLen = prob + LenLow + (posState << kLenNumLowBits);
-+ offset = 0;
-+ numBits = kLenNumLowBits;
-+ }
-+ else
-+ {
-+ UpdateBit1(probLen);
-+ probLen = prob + LenChoice2;
-+ IfBit0(probLen)
-+ {
-+ UpdateBit0(probLen);
-+ probLen = prob + LenMid + (posState << kLenNumMidBits);
-+ offset = kLenNumLowSymbols;
-+ numBits = kLenNumMidBits;
-+ }
-+ else
-+ {
-+ UpdateBit1(probLen);
-+ probLen = prob + LenHigh;
-+ offset = kLenNumLowSymbols + kLenNumMidSymbols;
-+ numBits = kLenNumHighBits;
-+ }
-+ }
-+ RangeDecoderBitTreeDecode(probLen, numBits, len);
-+ len += offset;
-+ }
-+
-+ if (state < 4)
-+ {
-+ int posSlot;
-+ state += kNumLitStates;
-+ prob = p + PosSlot +
-+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
-+ kNumPosSlotBits);
-+ RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
-+ if (posSlot >= kStartPosModelIndex)
-+ {
-+ int numDirectBits = ((posSlot >> 1) - 1);
-+ rep0 = (2 | ((UInt32)posSlot & 1));
-+ if (posSlot < kEndPosModelIndex)
-+ {
-+ rep0 <<= numDirectBits;
-+ prob = p + SpecPos + rep0 - posSlot - 1;
-+ }
-+ else
-+ {
-+ numDirectBits -= kNumAlignBits;
-+ do
-+ {
-+ RC_NORMALIZE
-+ Range >>= 1;
-+ rep0 <<= 1;
-+ if (Code >= Range)
-+ {
-+ Code -= Range;
-+ rep0 |= 1;
-+ }
-+ }
-+ while (--numDirectBits != 0);
-+ prob = p + Align;
-+ rep0 <<= kNumAlignBits;
-+ numDirectBits = kNumAlignBits;
-+ }
-+ {
-+ int i = 1;
-+ int mi = 1;
-+ do
-+ {
-+ CProb *prob3 = prob + mi;
-+ RC_GET_BIT2(prob3, mi, ; , rep0 |= i);
-+ i <<= 1;
-+ }
-+ while(--numDirectBits != 0);
-+ }
-+ }
-+ else
-+ rep0 = posSlot;
-+ if (++rep0 == (UInt32)(0))
-+ {
-+ /* it's for stream version */
-+ len = -1;
-+ break;
-+ }
-+ }
-+
-+ len += kMatchMinLen;
-+ if (rep0 > nowPos
-+ #ifdef _LZMA_OUT_READ
-+ + globalPos || rep0 > dictionarySize
-+ #endif
-+ )
-+ return LZMA_RESULT_DATA_ERROR;
-+ do
-+ {
-+ #ifdef _LZMA_OUT_READ
-+ UInt32 pos = dictionaryPos - rep0;
-+ if (pos >= dictionarySize)
-+ pos += dictionarySize;
-+ previousByte = dictionary[pos];
-+ dictionary[dictionaryPos] = previousByte;
-+ if (++dictionaryPos == dictionarySize)
-+ dictionaryPos = 0;
-+ #else
-+ previousByte = outStream[nowPos - rep0];
-+ #endif
-+ len--;
-+ outStream[nowPos++] = previousByte;
-+ }
-+ while(len != 0 && nowPos < outSize);
-+ }
-+ }
-+ RC_NORMALIZE;
-+
-+ #ifdef _LZMA_OUT_READ
-+ vs->Buffer = Buffer;
-+ vs->BufferLim = BufferLim;
-+ vs->Range = Range;
-+ vs->Code = Code;
-+ vs->DictionaryPos = dictionaryPos;
-+ vs->GlobalPos = globalPos + nowPos;
-+ vs->Reps[0] = rep0;
-+ vs->Reps[1] = rep1;
-+ vs->Reps[2] = rep2;
-+ vs->Reps[3] = rep3;
-+ vs->State = state;
-+ vs->RemainLen = len;
-+ vs->TempDictionary[0] = tempDictionary[0];
-+ #endif
-+
-+ *outSizeProcessed = nowPos;
-+ return LZMA_RESULT_OK;
-+}
-diff -Naur linux-old/arch/i386/boot/compressed/LzmaDecode.h linux-lzma/arch/i386/boot/compressed/LzmaDecode.h
---- linux-old/arch/i386/boot/compressed/LzmaDecode.h 1969-12-31 19:00:00.000000000 -0500
-+++ linux-lzma/arch/i386/boot/compressed/LzmaDecode.h 2005-06-05 00:07:39.000000000 -0400
-@@ -0,0 +1,100 @@
-+/*
-+ LzmaDecode.h
-+ LZMA Decoder interface
-+
-+ LZMA SDK 4.16 Copyright (c) 1999-2005 Igor Pavlov (2005-03-18)
-+ http://www.7-zip.org/
-+
-+ LZMA SDK is licensed under two licenses:
-+ 1) GNU Lesser General Public License (GNU LGPL)
-+ 2) Common Public License (CPL)
-+ It means that you can select one of these two licenses and
-+ follow rules of that license.
-+
-+ SPECIAL EXCEPTION:
-+ Igor Pavlov, as the author of this code, expressly permits you to
-+ statically or dynamically link your code (or bind by name) to the
-+ interfaces of this file without subjecting your linked code to the
-+ terms of the CPL or GNU LGPL. Any modifications or additions
-+ to this file, however, are subject to the LGPL or CPL terms.
-+*/
-+
-+#ifndef __LZMADECODE_H
-+#define __LZMADECODE_H
-+
-+/* #define _LZMA_IN_CB */
-+/* Use callback for input data */
-+
-+/* #define _LZMA_OUT_READ */
-+/* Use read function for output data */
-+
-+/* #define _LZMA_PROB32 */
-+/* It can increase speed on some 32-bit CPUs,
-+ but memory usage will be doubled in that case */
-+
-+/* #define _LZMA_LOC_OPT */
-+/* Enable local speed optimizations inside code */
-+
-+#ifndef UInt32
-+#ifdef _LZMA_UINT32_IS_ULONG
-+#define UInt32 unsigned long
-+#else
-+#define UInt32 unsigned int
-+#endif
-+#endif
-+
-+#ifdef _LZMA_PROB32
-+#define CProb UInt32
-+#else
-+#define CProb unsigned short
-+#endif
-+
-+#define LZMA_RESULT_OK 0
-+#define LZMA_RESULT_DATA_ERROR 1
-+#define LZMA_RESULT_NOT_ENOUGH_MEM 2
-+
-+#ifdef _LZMA_IN_CB
-+typedef struct _ILzmaInCallback
-+{
-+ int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize);
-+} ILzmaInCallback;
-+#endif
-+
-+#define LZMA_BASE_SIZE 1846
-+#define LZMA_LIT_SIZE 768
-+
-+/*
-+bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb)
-+bufferSize += 100 in case of _LZMA_OUT_READ
-+by default CProb is unsigned short,
-+but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int)
-+*/
-+
-+#ifdef _LZMA_OUT_READ
-+int LzmaDecoderInit(
-+ unsigned char *buffer, UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ unsigned char *dictionary, UInt32 dictionarySize,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback
-+ #else
-+ unsigned char *inStream, UInt32 inSize
-+ #endif
-+);
-+#endif
-+
-+int LzmaDecode(
-+ unsigned char *buffer,
-+ #ifndef _LZMA_OUT_READ
-+ UInt32 bufferSize,
-+ int lc, int lp, int pb,
-+ #ifdef _LZMA_IN_CB
-+ ILzmaInCallback *inCallback,
-+ #else
-+ unsigned char *inStream, UInt32 inSize,
-+ #endif
-+ #endif
-+ unsigned char *outStream, UInt32 outSize,
-+ UInt32 *outSizeProcessed);
-+
-+#endif
-diff -Naur linux-old/arch/i386/boot/compressed/lzma_misc.c linux-lzma/arch/i386/boot/compressed/lzma_misc.c
---- linux-old/arch/i386/boot/compressed/lzma_misc.c 1969-12-31 19:00:00.000000000 -0500
-+++ linux-lzma/arch/i386/boot/compressed/lzma_misc.c 2005-06-04 21:33:48.000000000 -0400
-@@ -0,0 +1,281 @@
-+/*
-+ * lzma_misc.c
-+ *
-+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
-+ * puts by Nick Holloway 1993, better puts by Martin Mares 1995
-+ * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
-+ *
-+ * Decompress LZMA compressed vmlinuz
-+ * Version 0.9 Copyright (c) Ming-Ching Tiew mctiew@yahoo.com
-+ * Program adapted from misc.c for 2.6 kernel
-+ * Forward ported to latest 2.6 version of misc.c by
-+ * Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#undef CONFIG_PARAVIRT
-+#include <linux/linkage.h>
-+#include <linux/vmalloc.h>
-+#include <linux/screen_info.h>
-+#include <asm/io.h>
-+#include <asm/page.h>
-+#include <asm/boot.h>
-+
-+/* WARNING!!
-+ * This code is compiled with -fPIC and it is relocated dynamically
-+ * at run time, but no relocation processing is performed.
-+ * This means that it is not safe to place pointers in static structures.
-+ */
-+
-+/*
-+ * Getting to provable safe in place decompression is hard.
-+ * Worst case behaviours need to be analized.
-+ * Background information:
-+ *
-+ * The file layout is:
-+ * magic[2]
-+ * method[1]
-+ * flags[1]
-+ * timestamp[4]
-+ * extraflags[1]
-+ * os[1]
-+ * compressed data blocks[N]
-+ * crc[4] orig_len[4]
-+ *
-+ * resulting in 18 bytes of non compressed data overhead.
-+ *
-+ * Files divided into blocks
-+ * 1 bit (last block flag)
-+ * 2 bits (block type)
-+ *
-+ * 1 block occurs every 32K -1 bytes or when there 50% compression has been achieved.
-+ * The smallest block type encoding is always used.
-+ *
-+ * stored:
-+ * 32 bits length in bytes.
-+ *
-+ * fixed:
-+ * magic fixed tree.
-+ * symbols.
-+ *
-+ * dynamic:
-+ * dynamic tree encoding.
-+ * symbols.
-+ *
-+ *
-+ * The buffer for decompression in place is the length of the
-+ * uncompressed data, plus a small amount extra to keep the algorithm safe.
-+ * The compressed data is placed at the end of the buffer. The output
-+ * pointer is placed at the start of the buffer and the input pointer
-+ * is placed where the compressed data starts. Problems will occur
-+ * when the output pointer overruns the input pointer.
-+ *
-+ * The output pointer can only overrun the input pointer if the input
-+ * pointer is moving faster than the output pointer. A condition only
-+ * triggered by data whose compressed form is larger than the uncompressed
-+ * form.
-+ *
-+ * The worst case at the block level is a growth of the compressed data
-+ * of 5 bytes per 32767 bytes.
-+ *
-+ * The worst case internal to a compressed block is very hard to figure.
-+ * The worst case can at least be boundined by having one bit that represents
-+ * 32764 bytes and then all of the rest of the bytes representing the very
-+ * very last byte.
-+ *
-+ * All of which is enough to compute an amount of extra data that is required
-+ * to be safe. To avoid problems at the block level allocating 5 extra bytes
-+ * per 32767 bytes of data is sufficient. To avoind problems internal to a block
-+ * adding an extra 32767 bytes (the worst case uncompressed block size) is
-+ * sufficient, to ensure that in the worst case the decompressed data for
-+ * block will stop the byte before the compressed data for a block begins.
-+ * To avoid problems with the compressed data's meta information an extra 18
-+ * bytes are needed. Leading to the formula:
-+ *
-+ * extra_bytes = (uncompressed_size >> 12) + 32768 + 18 + decompressor_size.
-+ *
-+ * Adding 8 bytes per 32K is a bit excessive but much easier to calculate.
-+ * Adding 32768 instead of 32767 just makes for round numbers.
-+ * Adding the decompressor_size is necessary as it musht live after all
-+ * of the data as well. Last I measured the decompressor is about 14K.
-+ * 10K of actuall data and 4K of bss.
-+ *
-+ */
-+
-+/*
-+ * gzip declarations
-+ */
-+
-+#define OF(args) args
-+#define STATIC static
-+
-+#undef memcpy
-+
-+typedef unsigned char uch;
-+typedef unsigned short ush;
-+typedef unsigned long ulg;
-+
-+#define WSIZE 0x80000000 /* Window size must be at least 32k,
-+ * and a power of two
-+ * We don't actually have a window just
-+ * a huge output buffer so I report
-+ * a 2G windows size, as that should
-+ * always be larger than our output buffer.
-+ */
-+
-+static uch *inbuf; /* input buffer */
-+static uch *window; /* Sliding window buffer, (and final output buffer) */
-+
-+static unsigned insize; /* valid bytes in inbuf */
-+static unsigned inptr; /* index of next byte to be processed in inbuf */
-+
-+#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-+
-+/* Diagnostic functions */
-+#ifdef DEBUG
-+# define Assert(cond,msg) {if(!(cond)) error(msg);}
-+# define Trace(x) fprintf x
-+# define Tracev(x) {if (verbose) fprintf x ;}
-+# define Tracevv(x) {if (verbose>1) fprintf x ;}
-+# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-+# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-+#else
-+# define Assert(cond,msg)
-+# define Trace(x)
-+# define Tracev(x)
-+# define Tracevv(x)
-+# define Tracec(c,x)
-+# define Tracecv(c,x)
-+#endif
-+
-+static int fill_inbuf(void);
-+
-+/*
-+ * This is set up by the setup-routine at boot-time
-+ */
-+static unsigned char *real_mode; /* Pointer to real-mode data */
-+extern unsigned char input_data[];
-+extern int input_len;
-+
-+static void error(char *x);
-+static void *memcpy(void *dest, const void *src, unsigned n);
-+
-+#ifdef CONFIG_X86_NUMAQ
-+void *xquad_portio;
-+#endif
-+
-+static void* memcpy(void* dest, const void* src, unsigned n)
-+{
-+ int i;
-+ char *d = (char *)dest, *s = (char *)src;
-+
-+ for (i=0;i<n;i++) d[i] = s[i];
-+ return dest;
-+}
-+
-+/* ===========================================================================
-+ * Fill the input buffer. This is called only when the buffer is empty
-+ * and at least one byte is really needed.
-+ */
-+static int fill_inbuf(void)
-+{
-+ error("ran out of input data");
-+ return 0;
-+}
-+
-+
-+// When using LZMA in callback, the compressed length is not needed.
-+// Otherwise you need a special version of lzma compression program
-+// which will pad the compressed length in the header.
-+#define _LZMA_IN_CB
-+#include "LzmaDecode.h"
-+#include "LzmaDecode.c"
-+
-+static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize);
-+
-+
-+/*
-+ * Do the lzma decompression
-+ * When using LZMA in callback, the end of input stream is automatically determined
-+ */
-+static int lzma_unzip(void)
-+{
-+
-+ unsigned int i; /* temp value */
-+ unsigned int lc; /* literal context bits */
-+ unsigned int lp; /* literal pos state bits */
-+ unsigned int pb; /* pos state bits */
-+ unsigned char* workspace;
-+ unsigned int uncompressedSize = 0;
-+ unsigned char* p;
-+
-+ ILzmaInCallback callback;
-+ callback.Read = read_byte;
-+
-+ /* lzma args */
-+ i = get_byte();
-+ lc = i % 9, i = i / 9;
-+ lp = i % 5, pb = i / 5;
-+
-+ /* skip dictionary size */
-+ for (i = 0; i < 4; i++)
-+ get_byte();
-+ // get uncompressedSize
-+ p= (char*)&uncompressedSize;
-+ for (i = 0; i < 4; i++)
-+ *p++ = get_byte();
-+
-+ //get compressedSize
-+ for (i = 0; i < 4; i++)
-+ get_byte();
-+
-+ // point it beyond uncompresedSize
-+ workspace = window + uncompressedSize;
-+
-+ /* decompress kernel */
-+ if (LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
-+ (unsigned char*)window, uncompressedSize, &i) == LZMA_RESULT_OK)
-+ return 0;
-+ else
-+ return 1;
-+}
-+
-+
-+#ifdef _LZMA_IN_CB
-+static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
-+{
-+ static unsigned int i = 0;
-+ static unsigned char val;
-+ *bufferSize = 1;
-+ val = get_byte();
-+ *buffer = &val;
-+ return LZMA_RESULT_OK;
-+}
-+#endif
-+
-+static void error(char *x)
-+{
-+ while(1); /* Halt */
-+}
-+
-+asmlinkage void decompress_kernel(void *rmode, unsigned long end,
-+ uch *input_data, unsigned long input_len, uch *output)
-+{
-+ real_mode = rmode;
-+
-+ window = output;
-+ inbuf = input_data; /* Input buffer */
-+ insize = input_len;
-+ inptr = 0;
-+
-+ if ((u32)output & (CONFIG_PHYSICAL_ALIGN -1))
-+ error("Destination address not CONFIG_PHYSICAL_ALIGN aligned");
-+ if (end > ((-__PAGE_OFFSET-(512 <<20)-1) & 0x7fffffff))
-+ error("Destination address too large");
-+#ifndef CONFIG_RELOCATABLE
-+ if ((u32)output != LOAD_PHYSICAL_ADDR)
-+ error("Wrong destination address");
-+#endif
-+
-+ lzma_unzip();
-+ return;
-+}
-diff -Naur linux-old/arch/i386/boot/compressed/Makefile linux-lzma/arch/i386/boot/compressed/Makefile
---- linux-old/arch/i386/boot/compressed/Makefile 2005-06-04 21:53:40.000000000 -0400
-+++ linux-lzma/arch/i386/boot/compressed/Makefile 2005-06-05 00:25:23.000000000 -0400
-@@ -4,15 +4,15 @@
- # create a compressed vmlinux image from the original vmlinux
- #
-
--targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o \
-+targets := vmlinux vmlinux.bin vmlinux.bin.lzma head.o lzma_misc.o piggy.o \
- vmlinux.bin.all vmlinux.relocs
- EXTRA_AFLAGS := -traditional
-
- LDFLAGS_vmlinux := -T
--CFLAGS_misc.o += -fPIC
-+CFLAGS_lzma_misc.o += -fPIC
- hostprogs-y := relocs
-
--$(obj)/vmlinux: $(src)/vmlinux.lds $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
-+$(obj)/vmlinux: $(src)/vmlinux.lds $(obj)/head.o $(obj)/lzma_misc.o $(obj)/piggy.o FORCE
- $(call if_changed,ld)
- @:
-
-@@ -32,14 +32,14 @@
- $(call if_changed,relocbin)
-
- ifdef CONFIG_RELOCATABLE
--$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
-- $(call if_changed,gzip)
-+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE
-+ $(call if_changed,lzma)
- else
--$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
-- $(call if_changed,gzip)
-+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
-+ $(call if_changed,lzma)
- endif
-
- LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
-
--$(obj)/piggy.o: $(src)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
-+$(obj)/piggy.o: $(src)/vmlinux.scr $(obj)/vmlinux.bin.lzma FORCE
- $(call if_changed,ld)
-diff -urN linux-2.6.19.2/scripts/Makefile.lib linux-2.6.19.2.new/scripts/Makefile.lib
---- linux-2.6.19.2/scripts/Makefile.lib 2007-01-10 20:10:37.000000000 +0100
-+++ linux-2.6.19.2.new/scripts/Makefile.lib 2007-04-15 23:51:54.000000000 +0200
-@@ -162,4 +162,9 @@
- quiet_cmd_gzip = GZIP $@
- cmd_gzip = gzip -f -9 < $< > $@
-
--
-+# LZMA
-+#
-+quiet_cmd_lzma = LZMA $@
-+cmd_lzma = lzma e $< $@ -lc7 -lp0 -pb0
-+# to use lzmacomp,
-+# cmd_lzma = lzmacomp $< 700 > $@
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Ralink
- NAME:=Ralink WiFi
- PACKAGES:=kmod-rt61
-endef
-$(eval $(call Profile,Ralink))
-
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mips
-BOARD:=sibyte
-BOARDNAME:=SiByte MIPS
-FEATURES:=broken
-
-LINUX_VERSION:=2.6.21.5
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-$(eval $(call BuildKernel))
+++ /dev/null
-# Copyright (C) 2006 OpenWrt.org
-
-config interface loopback
- option ifname lo
- option proto static
- option ipaddr 127.0.0.1
- option netmask 255.0.0.0
-
-config interface lan
- option type bridge
- option ifname "eth0 ath0"
- option proto static
- option ipaddr 192.168.1.1
- option netmask 255.255.255.0
+++ /dev/null
-# Copyright (C) 2006 OpenWrt.org
-
-::sysinit:/etc/init.d/rcS
-duart/0::askfirst:/bin/ash --login
-#tts/1::askfirst:/bin/ash --login
+++ /dev/null
-# CONFIG_32BIT is not set
-CONFIG_64BIT=y
-# CONFIG_ARPD is not set
-# CONFIG_ATM is not set
-# CONFIG_ATMEL is not set
-# CONFIG_AU1000_UART is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BINFMT_ELF32=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-# CONFIG_BONDING is not set
-CONFIG_BOOT_ELF32=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_BT is not set
-CONFIG_BUILD_ELF64=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_JUMPS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-# CONFIG_CIFS_STATS is not set
-# CONFIG_CLS_U32_MARK is not set
-# CONFIG_CLS_U32_PERF is not set
-CONFIG_COMPAT=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_CONFIGFS_FS is not set
-CONFIG_CONNECTOR=m
-CONFIG_CPUSETS=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-# CONFIG_CPU_MIPS32_R1 is not set
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-CONFIG_CPU_SB1=y
-# CONFIG_CPU_SB1_PASS_1 is not set
-# CONFIG_CPU_SB1_PASS_2_112x is not set
-# CONFIG_CPU_SB1_PASS_2_1250 is not set
-# CONFIG_CPU_SB1_PASS_2_2 is not set
-# CONFIG_CPU_SB1_PASS_3 is not set
-CONFIG_CPU_SB1_PASS_4=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_HMAC=y
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=m
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DM9000 is not set
-CONFIG_DMA_COHERENT=y
-CONFIG_FW_LOADER=m
-# CONFIG_GEN_RTC is not set
-# CONFIG_HERMES is not set
-# CONFIG_HID is not set
-# CONFIG_HOSTAP_PCI is not set
-# CONFIG_HOSTAP_PLX is not set
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=m
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_48 is not set
-# CONFIG_I2C is not set
-# CONFIG_IDE is not set
-# CONFIG_IKCONFIG is not set
-# CONFIG_INET6_TUNNEL is not set
-CONFIG_INITRAMFS_ROOT_GID=0
-CONFIG_INITRAMFS_ROOT_UID=0
-CONFIG_INITRAMFS_SOURCE="../root"
-CONFIG_INPUT=m
-# CONFIG_IOSCHED_NOOP is not set
-# CONFIG_IP6_NF_MATCH_AHESP is not set
-# CONFIG_IP6_NF_MATCH_FRAG is not set
-# CONFIG_IP6_NF_MATCH_HL is not set
-# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-CONFIG_IP6_NF_MATCH_MULTIPORT=m
-# CONFIG_IP6_NF_MATCH_OPTS is not set
-# CONFIG_IP6_NF_MATCH_POLICY is not set
-# CONFIG_IP6_NF_MATCH_RT is not set
-# CONFIG_IP6_NF_TARGET_HL is not set
-# CONFIG_IP6_NF_TARGET_LOG is not set
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_CT_PROTO_SCTP is not set
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-CONFIG_IP_NF_MATCH_AH_ESP=m
-CONFIG_IP_NF_MATCH_DSCP=m
-# CONFIG_IP_NF_MATCH_HASHLIMIT is not set
-CONFIG_IP_NF_MATCH_MULTIPORT=m
-# CONFIG_IP_NF_MATCH_POLICY is not set
-CONFIG_IP_NF_TARGET_DSCP=m
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
-# CONFIG_IP_ROUTE_VERBOSE is not set
-# CONFIG_ISI is not set
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_LIBCRC32C is not set
-# CONFIG_LLC2 is not set
-CONFIG_LOCK_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-CONFIG_MINI_FO=m
-CONFIG_MIPS=y
-CONFIG_MIPS32_COMPAT=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_IVR is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_MIPS_MT is not set
-# CONFIG_MIPS_MTX1 is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_MOXA_SMARTIO_NEW is not set
-CONFIG_MTD=y
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_BLKMTD is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_BLOCK2MTD is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_AMDSTD_RETRY=0
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_IPGRE_BROADCAST is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NET_SB1250_MAC=y
-# CONFIG_NET_SCH_NETEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-CONFIG_NETDEV_1000=y
-CONFIG_NR_CPUS=2
-# CONFIG_NTFS_FS is not set
-# CONFIG_N_HDLC is not set
-CONFIG_OBSOLETE_INTERMODULE=y
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_PAGE_SIZE_16KB is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PCMCIA is not set
-# CONFIG_PCCARD is not set
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_SYNC_TTY is not set
-# CONFIG_PREEMPT_BKL is not set
-# CONFIG_PRISM54 is not set
-# CONFIG_PROC_KCORE is not set
-# CONFIG_RELAYFS_FS is not set
-# CONFIG_RIO is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_RTC is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_SB1XXX_CORELIS is not set
-# CONFIG_SB1_CERR_STALL is not set
-# CONFIG_SB1_CEX_ALWAYS_FATAL is not set
-# CONFIG_SCSI is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_BUS_WATCHER is not set
-# CONFIG_SIBYTE_CARMEL is not set
-CONFIG_SIBYTE_CFE=y
-CONFIG_SIBYTE_CFE_CONSOLE=y
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_DMA_PAGEOPS is not set
-CONFIG_SIBYTE_HAS_LDT=y
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_PTSWARM is not set
-# CONFIG_SIBYTE_RHONE is not set
-CONFIG_SIBYTE_SB1250=y
-CONFIG_SIBYTE_SB1250_DUART=y
-CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
-# CONFIG_SIBYTE_SB1250_PROF is not set
-CONFIG_SIBYTE_SB1xxx_SOC=y
-# CONFIG_SIBYTE_SENTOSA is not set
-CONFIG_SIBYTE_SWARM=y
-# CONFIG_SIBYTE_TBPROF is not set
-# CONFIG_SIMULATION is not set
-CONFIG_SMP=y
-# CONFIG_SOUND is not set
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_STALDRV is not set
-CONFIG_STOP_MACHINE=y
-CONFIG_SWAP_IO_SPACE=y
-# CONFIG_SX is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_SYNCLINK_GT is not set
-CONFIG_SYS_HAS_CPU_SB1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_HIGHMEM=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-# CONFIG_TELCLOCK is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_USB is not set
-# CONFIG_WATCHDOG is not set
+++ /dev/null
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-#define Image/Prepare
-# cp $(LINUX_DIR)/arch/arm/boot/zImage $(KDIR)/zImage
-#endef
-
-define Image/BuildKernel
- cp $(KDIR)/vmlinux $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-vmlinux
-endef
-
-define Image/Build
- $(call Image/Build/$(1),$(1))
-endef
-
-define Image/Build/jffs2-64k
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=65536 conv=sync
-endef
-
-define Image/Build/jffs2-128k
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=131072 conv=sync
- $(call Image/Build/slug,$(1))
-endef
-
-define Image/Build/squashfs
- $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
- dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img bs=131072 conv=sync
- $(call Image/Build/slug,$(1))
-endef
-
-$(eval $(call BuildImage))
+++ /dev/null
-diff -Nur linux-2.6.21.1/drivers/char/Kconfig linux-2.6.21.1-owrt/drivers/char/Kconfig
---- linux-2.6.21.1/drivers/char/Kconfig 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1-owrt/drivers/char/Kconfig 2007-05-24 22:28:54.000000000 +0200
-@@ -386,6 +386,14 @@
- If you have an Alchemy AU1000 processor (MIPS based) and you want
- to use a console on a serial port, say Y. Otherwise, say N.
-
-+config SIBYTE_SB1250_DUART
-+ bool "Support for BCM1xxx onchip DUART"
-+ depends on MIPS && SIBYTE_SB1xxx_SOC=y
-+
-+config SIBYTE_SB1250_DUART_CONSOLE
-+ bool "Console on BCM1xxx DUART"
-+ depends on SIBYTE_SB1250_DUART
-+
- config SERIAL_DEC
- bool "DECstation serial support"
- depends on MACH_DECSTATION
-diff -Nur linux-2.6.21.1/drivers/char/Makefile linux-2.6.21.1-owrt/drivers/char/Makefile
---- linux-2.6.21.1/drivers/char/Makefile 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1-owrt/drivers/char/Makefile 2007-05-24 22:32:31.000000000 +0200
-@@ -32,6 +32,7 @@
- obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o
- obj-$(CONFIG_MOXA_SMARTIO) += mxser.o
- obj-$(CONFIG_MOXA_SMARTIO_NEW) += mxser_new.o
-+obj-$(CONFIG_SIBYTE_SB1250_DUART) += sb1250_duart.o
- obj-$(CONFIG_COMPUTONE) += ip2/
- obj-$(CONFIG_RISCOM8) += riscom8.o
- obj-$(CONFIG_ISI) += isicom.o
-diff -Nur linux-2.6.21.1/drivers/char/sb1250_duart.c linux-2.6.21.1-owrt/drivers/char/sb1250_duart.c
---- linux-2.6.21.1/drivers/char/sb1250_duart.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.21.1-owrt/drivers/char/sb1250_duart.c 2007-05-24 22:10:12.000000000 +0200
-@@ -0,0 +1,979 @@
-+/*
-+ * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+ */
-+
-+/*
-+ * Driver support for the on-chip sb1250 dual-channel serial port,
-+ * running in asynchronous mode. Also, support for doing a serial console
-+ * on one of those ports
-+ */
-+#include <linux/types.h>
-+#include <linux/kernel.h>
-+#include <linux/serial.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/console.h>
-+#include <linux/kdev_t.h>
-+#include <linux/major.h>
-+#include <linux/termios.h>
-+#include <linux/spinlock.h>
-+#include <linux/irq.h>
-+#include <linux/errno.h>
-+#include <linux/tty.h>
-+#include <linux/sched.h>
-+#include <linux/tty_flip.h>
-+#include <linux/timer.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <asm/delay.h>
-+#include <asm/io.h>
-+#include <asm/uaccess.h>
-+#include <asm/sibyte/swarm.h>
-+#include <asm/sibyte/sb1250.h>
-+#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
-+#include <asm/sibyte/bcm1480_regs.h>
-+#include <asm/sibyte/bcm1480_int.h>
-+#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
-+#include <asm/sibyte/sb1250_regs.h>
-+#include <asm/sibyte/sb1250_int.h>
-+#else
-+#error invalid SiByte UART configuation
-+#endif
-+#include <asm/sibyte/sb1250_uart.h>
-+#include <asm/war.h>
-+
-+#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
-+#define UNIT_CHANREG(n,reg) A_BCM1480_DUART_CHANREG((n),(reg))
-+#define UNIT_IMRREG(n) A_BCM1480_DUART_IMRREG(n)
-+#define UNIT_INT(n) (K_BCM1480_INT_UART_0 + (n))
-+#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
-+#define UNIT_CHANREG(n,reg) A_DUART_CHANREG((n),(reg))
-+#define UNIT_IMRREG(n) A_DUART_IMRREG(n)
-+#define UNIT_INT(n) (K_INT_UART_0 + (n))
-+#else
-+#error invalid SiByte UART configuation
-+#endif
-+
-+/* Toggle spewing of debugging output */
-+#undef DEBUG
-+
-+#define DEFAULT_CFLAGS (CS8 | B115200)
-+
-+#define TX_INTEN 1
-+#define DUART_INITIALIZED 2
-+
-+#define DUART_MAX_LINE 4
-+char sb1250_duart_present[DUART_MAX_LINE];
-+EXPORT_SYMBOL(sb1250_duart_present);
-+
-+/*
-+ * In bug 1956, we get glitches that can mess up uart registers. This
-+ * "read-mode-reg after any register access" is an accepted workaround.
-+ */
-+#if SIBYTE_1956_WAR
-+# define SB1_SER1956_WAR { \
-+ u32 ignore; \
-+ ignore = csr_in32(uart_states[line].mode_1); \
-+ ignore = csr_in32(uart_states[line].mode_2); \
-+ }
-+#else
-+# define SB1_SER1956_WAR
-+#endif
-+
-+/*
-+ * Still not sure what the termios structures set up here are for,
-+ * but we have to supply pointers to them to register the tty driver
-+ */
-+static struct tty_driver *sb1250_duart_driver; //, sb1250_duart_callout_driver;
-+
-+/*
-+ * This lock protects both the open flags for all the uart states as
-+ * well as the reference count for the module
-+ */
-+static DEFINE_SPINLOCK(open_lock);
-+
-+typedef struct {
-+ unsigned char outp_buf[SERIAL_XMIT_SIZE];
-+ unsigned int outp_head;
-+ unsigned int outp_tail;
-+ unsigned int outp_count;
-+ spinlock_t outp_lock;
-+ unsigned int open;
-+ unsigned int line;
-+ unsigned int last_cflags;
-+ unsigned long flags;
-+ struct tty_struct *tty;
-+
-+ /* CSR addresses */
-+ unsigned int *status;
-+ unsigned int *imr;
-+ unsigned int *tx_hold;
-+ unsigned int *rx_hold;
-+ unsigned int *mode_1;
-+ unsigned int *mode_2;
-+ unsigned int *clk_sel;
-+ unsigned int *cmd;
-+} uart_state_t;
-+
-+static uart_state_t uart_states[DUART_MAX_LINE];
-+
-+/*
-+ * Inline functions local to this module
-+ */
-+
-+static inline u32 READ_SERCSR(volatile u32 *addr, int line)
-+{
-+ u32 val = csr_in32(addr);
-+ SB1_SER1956_WAR;
-+ return val;
-+}
-+
-+static inline void WRITE_SERCSR(u32 val, volatile u32 *addr, int line)
-+{
-+ csr_out32(val, addr);
-+ SB1_SER1956_WAR;
-+}
-+
-+static void init_duart_port(uart_state_t *port, int line)
-+{
-+ if (!(port->flags & DUART_INITIALIZED)) {
-+ port->line = line;
-+ port->status = IOADDR(UNIT_CHANREG(line, R_DUART_STATUS));
-+ port->imr = IOADDR(UNIT_IMRREG(line));
-+ port->tx_hold = IOADDR(UNIT_CHANREG(line, R_DUART_TX_HOLD));
-+ port->rx_hold = IOADDR(UNIT_CHANREG(line, R_DUART_RX_HOLD));
-+ port->mode_1 = IOADDR(UNIT_CHANREG(line, R_DUART_MODE_REG_1));
-+ port->mode_2 = IOADDR(UNIT_CHANREG(line, R_DUART_MODE_REG_2));
-+ port->clk_sel = IOADDR(UNIT_CHANREG(line, R_DUART_CLK_SEL));
-+ port->cmd = IOADDR(UNIT_CHANREG(line, R_DUART_CMD));
-+ port->last_cflags = DEFAULT_CFLAGS;
-+ spin_lock_init(&port->outp_lock);
-+ port->flags |= DUART_INITIALIZED;
-+ }
-+}
-+
-+/*
-+ * Mask out the passed interrupt lines at the duart level. This should be
-+ * called while holding the associated outp_lock.
-+ */
-+static inline void duart_mask_ints(unsigned int line, unsigned int mask)
-+{
-+ uart_state_t *port = uart_states + line;
-+ u64 tmp = READ_SERCSR(port->imr, line);
-+ WRITE_SERCSR(tmp & ~mask, port->imr, line);
-+}
-+
-+
-+/* Unmask the passed interrupt lines at the duart level */
-+static inline void duart_unmask_ints(unsigned int line, unsigned int mask)
-+{
-+ uart_state_t *port = uart_states + line;
-+ u64 tmp = READ_SERCSR(port->imr, line);
-+ WRITE_SERCSR(tmp | mask, port->imr, line);
-+}
-+
-+static inline void transmit_char_pio(uart_state_t *us)
-+{
-+ struct tty_struct *tty = us->tty;
-+ int blocked = 0;
-+
-+ if (spin_trylock(&us->outp_lock)) {
-+ for (;;) {
-+ if (!(READ_SERCSR(us->status, us->line) & M_DUART_TX_RDY))
-+ break;
-+ if (us->outp_count <= 0 || tty->stopped || tty->hw_stopped) {
-+ break;
-+ } else {
-+ WRITE_SERCSR(us->outp_buf[us->outp_head],
-+ us->tx_hold, us->line);
-+ us->outp_head = (us->outp_head + 1) & (SERIAL_XMIT_SIZE-1);
-+ if (--us->outp_count <= 0)
-+ break;
-+ }
-+ udelay(10);
-+ }
-+ spin_unlock(&us->outp_lock);
-+ } else {
-+ blocked = 1;
-+ }
-+
-+ if (!us->outp_count || tty->stopped ||
-+ tty->hw_stopped || blocked) {
-+ us->flags &= ~TX_INTEN;
-+ duart_mask_ints(us->line, M_DUART_IMR_TX);
-+ }
-+
-+ if (us->open &&
-+ (us->outp_count < (SERIAL_XMIT_SIZE/2))) {
-+ /*
-+ * We told the discipline at one point that we had no
-+ * space, so it went to sleep. Wake it up when we hit
-+ * half empty
-+ */
-+ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
-+ tty->ldisc.write_wakeup)
-+ tty->ldisc.write_wakeup(tty);
-+ wake_up_interruptible(&tty->write_wait);
-+ }
-+}
-+
-+/*
-+ * Generic interrupt handler for both channels. dev_id is a pointer
-+ * to the proper uart_states structure, so from that we can derive
-+ * which port interrupted
-+ */
-+
-+static irqreturn_t duart_int(int irq, void *dev_id)
-+{
-+ uart_state_t *us = (uart_state_t *)dev_id;
-+ struct tty_struct *tty = us->tty;
-+ unsigned int status = READ_SERCSR(us->status, us->line);
-+
-+ pr_debug("DUART INT\n");
-+
-+ if (status & M_DUART_RX_RDY) {
-+ int counter = 2048;
-+ unsigned int ch;
-+
-+ if (status & M_DUART_OVRUN_ERR)
-+ tty_insert_flip_char(tty, 0, TTY_OVERRUN);
-+ if (status & M_DUART_PARITY_ERR) {
-+ printk("Parity error!\n");
-+ } else if (status & M_DUART_FRM_ERR) {
-+ printk("Frame error!\n");
-+ }
-+
-+ while (counter > 0) {
-+ if (!(READ_SERCSR(us->status, us->line) & M_DUART_RX_RDY))
-+ break;
-+ ch = READ_SERCSR(us->rx_hold, us->line);
-+ tty_insert_flip_char(tty, ch, 0);
-+ udelay(1);
-+ counter--;
-+ }
-+ tty_flip_buffer_push(tty);
-+ }
-+
-+ if (status & M_DUART_TX_RDY) {
-+ transmit_char_pio(us);
-+ }
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/*
-+ * Actual driver functions
-+ */
-+
-+/* Return the number of characters we can accomodate in a write at this instant */
-+static int duart_write_room(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ int retval;
-+
-+ retval = SERIAL_XMIT_SIZE - us->outp_count;
-+
-+ pr_debug("duart_write_room called, returning %i\n", retval);
-+
-+ return retval;
-+}
-+
-+/* memcpy the data from src to destination, but take extra care if the
-+ data is coming from user space */
-+static inline int copy_buf(char *dest, const char *src, int size, int from_user)
-+{
-+ if (from_user) {
-+ (void) copy_from_user(dest, src, size);
-+ } else {
-+ memcpy(dest, src, size);
-+ }
-+ return size;
-+}
-+
-+/*
-+ * Buffer up to count characters from buf to be written. If we don't have
-+ * other characters buffered, enable the tx interrupt to start sending
-+ */
-+static int duart_write(struct tty_struct *tty, const unsigned char *buf,
-+ int count)
-+{
-+ uart_state_t *us;
-+ int c, t, total = 0;
-+ unsigned long flags;
-+
-+ if (!tty) return 0;
-+
-+ us = tty->driver_data;
-+ if (!us) return 0;
-+
-+ pr_debug("duart_write called for %i chars by %i (%s)\n", count,
-+ current->pid, current->comm);
-+
-+ spin_lock_irqsave(&us->outp_lock, flags);
-+
-+ for (;;) {
-+ c = count;
-+
-+ t = SERIAL_XMIT_SIZE - us->outp_tail;
-+ if (t < c) c = t;
-+
-+ t = SERIAL_XMIT_SIZE - 1 - us->outp_count;
-+ if (t < c) c = t;
-+
-+ if (c <= 0) break;
-+
-+ memcpy(us->outp_buf + us->outp_tail, buf, c);
-+
-+ us->outp_count += c;
-+ us->outp_tail = (us->outp_tail + c) & (SERIAL_XMIT_SIZE - 1);
-+ buf += c;
-+ count -= c;
-+ total += c;
-+ }
-+
-+ spin_unlock_irqrestore(&us->outp_lock, flags);
-+
-+ if (us->outp_count && !tty->stopped &&
-+ !tty->hw_stopped && !(us->flags & TX_INTEN)) {
-+ us->flags |= TX_INTEN;
-+ duart_unmask_ints(us->line, M_DUART_IMR_TX);
-+ }
-+
-+ return total;
-+}
-+
-+
-+/* Buffer one character to be written. If there's not room for it, just drop
-+ it on the floor. This is used for echo, among other things */
-+static void duart_put_char(struct tty_struct *tty, u_char ch)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ unsigned long flags;
-+
-+ pr_debug("duart_put_char called. Char is %x (%c)\n", (int)ch, ch);
-+
-+ spin_lock_irqsave(&us->outp_lock, flags);
-+
-+ if (us->outp_count == SERIAL_XMIT_SIZE) {
-+ spin_unlock_irqrestore(&us->outp_lock, flags);
-+ return;
-+ }
-+
-+ us->outp_buf[us->outp_tail] = ch;
-+ us->outp_tail = (us->outp_tail + 1) &(SERIAL_XMIT_SIZE-1);
-+ us->outp_count++;
-+
-+ spin_unlock_irqrestore(&us->outp_lock, flags);
-+}
-+
-+static void duart_flush_chars(struct tty_struct * tty)
-+{
-+ uart_state_t *port;
-+
-+ if (!tty)
-+ return;
-+
-+ port = tty->driver_data;
-+
-+ if (!port)
-+ return;
-+
-+ if (port->outp_count <= 0 || tty->stopped || tty->hw_stopped) {
-+ return;
-+ }
-+
-+ port->flags |= TX_INTEN;
-+ duart_unmask_ints(port->line, M_DUART_IMR_TX);
-+}
-+
-+/* Return the number of characters in the output buffer that have yet to be
-+ written */
-+static int duart_chars_in_buffer(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ int retval;
-+
-+ retval = us->outp_count;
-+
-+ pr_debug("duart_chars_in_buffer returning %i\n", retval);
-+
-+ return retval;
-+}
-+
-+/* Kill everything we haven't yet shoved into the FIFO. Turn off the
-+ transmit interrupt since we've nothing more to transmit */
-+static void duart_flush_buffer(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ unsigned long flags;
-+
-+ pr_debug("duart_flush_buffer called\n");
-+ spin_lock_irqsave(&us->outp_lock, flags);
-+ us->outp_head = us->outp_tail = us->outp_count = 0;
-+ spin_unlock_irqrestore(&us->outp_lock, flags);
-+
-+ wake_up_interruptible(&us->tty->write_wait);
-+ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
-+ tty->ldisc.write_wakeup)
-+ tty->ldisc.write_wakeup(tty);
-+}
-+
-+
-+/* See sb1250 user manual for details on these registers */
-+static inline void duart_set_cflag(unsigned int line, unsigned int cflag)
-+{
-+ unsigned int mode_reg1 = 0, mode_reg2 = 0;
-+ unsigned int clk_divisor;
-+ uart_state_t *port = uart_states + line;
-+
-+ switch (cflag & CSIZE) {
-+ case CS7:
-+ mode_reg1 |= V_DUART_BITS_PER_CHAR_7;
-+
-+ default:
-+ /* We don't handle CS5 or CS6...is there a way we're supposed to
-+ * flag this? right now we just force them to CS8 */
-+ mode_reg1 |= 0x0;
-+ break;
-+ }
-+ if (cflag & CSTOPB) {
-+ mode_reg2 |= M_DUART_STOP_BIT_LEN_2;
-+ }
-+ if (!(cflag & PARENB)) {
-+ mode_reg1 |= V_DUART_PARITY_MODE_NONE;
-+ }
-+ if (cflag & PARODD) {
-+ mode_reg1 |= M_DUART_PARITY_TYPE_ODD;
-+ }
-+
-+ /* Formula for this is (5000000/baud)-1, but we saturate
-+ at 12 bits, which means we can't actually do anything less
-+ that 1200 baud */
-+ switch (cflag & CBAUD) {
-+ case B200:
-+ case B300:
-+ case B1200: clk_divisor = 4095; break;
-+ case B1800: clk_divisor = 2776; break;
-+ case B2400: clk_divisor = 2082; break;
-+ case B4800: clk_divisor = 1040; break;
-+ case B9600: clk_divisor = 519; break;
-+ case B19200: clk_divisor = 259; break;
-+ case B38400: clk_divisor = 129; break;
-+ default:
-+ case B57600: clk_divisor = 85; break;
-+ case B115200: clk_divisor = 42; break;
-+ }
-+ WRITE_SERCSR(mode_reg1, port->mode_1, port->line);
-+ WRITE_SERCSR(mode_reg2, port->mode_2, port->line);
-+ WRITE_SERCSR(clk_divisor, port->clk_sel, port->line);
-+ port->last_cflags = cflag;
-+}
-+
-+
-+/* Handle notification of a termios change. */
-+static void duart_set_termios(struct tty_struct *tty, struct termios *old)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+
-+ pr_debug("duart_set_termios called by %i (%s)\n", current->pid,
-+ current->comm);
-+ if (old && tty->termios->c_cflag == old->c_cflag)
-+ return;
-+ duart_set_cflag(us->line, tty->termios->c_cflag);
-+}
-+
-+static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo)
-+{
-+ struct serial_struct tmp;
-+
-+ memset(&tmp, 0, sizeof(tmp));
-+
-+ tmp.type = PORT_SB1250;
-+ tmp.line = us->line;
-+ tmp.port = UNIT_CHANREG(tmp.line,0);
-+ tmp.irq = UNIT_INT(tmp.line);
-+ tmp.xmit_fifo_size = 16; /* fixed by hw */
-+ tmp.baud_base = 5000000;
-+ tmp.io_type = SERIAL_IO_MEM;
-+
-+ if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
-+ return -EFAULT;
-+
-+ return 0;
-+}
-+
-+static int duart_ioctl(struct tty_struct *tty, struct file * file,
-+ unsigned int cmd, unsigned long arg)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+
-+/* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
-+ return -ENODEV;*/
-+ switch (cmd) {
-+ case TIOCMGET:
-+ printk("Ignoring TIOCMGET\n");
-+ break;
-+ case TIOCMBIS:
-+ printk("Ignoring TIOCMBIS\n");
-+ break;
-+ case TIOCMBIC:
-+ printk("Ignoring TIOCMBIC\n");
-+ break;
-+ case TIOCMSET:
-+ printk("Ignoring TIOCMSET\n");
-+ break;
-+ case TIOCGSERIAL:
-+ return get_serial_info(us,(struct serial_struct *) arg);
-+ case TIOCSSERIAL:
-+ printk("Ignoring TIOCSSERIAL\n");
-+ break;
-+ case TIOCSERCONFIG:
-+ printk("Ignoring TIOCSERCONFIG\n");
-+ break;
-+ case TIOCSERGETLSR: /* Get line status register */
-+ printk("Ignoring TIOCSERGETLSR\n");
-+ break;
-+ case TIOCSERGSTRUCT:
-+ printk("Ignoring TIOCSERGSTRUCT\n");
-+ break;
-+ case TIOCMIWAIT:
-+ printk("Ignoring TIOCMIWAIT\n");
-+ break;
-+ case TIOCGICOUNT:
-+ printk("Ignoring TIOCGICOUNT\n");
-+ break;
-+ case TIOCSERGWILD:
-+ printk("Ignoring TIOCSERGWILD\n");
-+ break;
-+ case TIOCSERSWILD:
-+ printk("Ignoring TIOCSERSWILD\n");
-+ break;
-+ default:
-+ break;
-+ }
-+// printk("Ignoring IOCTL %x from pid %i (%s)\n", cmd, current->pid, current->comm);
-+ return -ENOIOCTLCMD;
-+}
-+
-+/* XXXKW locking? */
-+static void duart_start(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+
-+ pr_debug("duart_start called\n");
-+
-+ if (us->outp_count && !(us->flags & TX_INTEN)) {
-+ us->flags |= TX_INTEN;
-+ duart_unmask_ints(us->line, M_DUART_IMR_TX);
-+ }
-+}
-+
-+/* XXXKW locking? */
-+static void duart_stop(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+
-+ pr_debug("duart_stop called\n");
-+
-+ if (us->outp_count && (us->flags & TX_INTEN)) {
-+ us->flags &= ~TX_INTEN;
-+ duart_mask_ints(us->line, M_DUART_IMR_TX);
-+ }
-+}
-+
-+/* Not sure on the semantics of this; are we supposed to wait until the stuff
-+ * already in the hardware FIFO drains, or are we supposed to wait until
-+ * we've drained the output buffer, too? I'm assuming the former, 'cause thats
-+ * what the other drivers seem to assume
-+ */
-+
-+static void duart_wait_until_sent(struct tty_struct *tty, int timeout)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ unsigned long orig_jiffies;
-+
-+ orig_jiffies = jiffies;
-+ pr_debug("duart_wait_until_sent(%d)+\n", timeout);
-+ while (!(READ_SERCSR(us->status, us->line) & M_DUART_TX_EMT)) {
-+ set_current_state(TASK_INTERRUPTIBLE);
-+ schedule_timeout(1);
-+ if (signal_pending(current))
-+ break;
-+ if (timeout && time_after(jiffies, orig_jiffies + timeout))
-+ break;
-+ }
-+ pr_debug("duart_wait_until_sent()-\n");
-+}
-+
-+/*
-+ * duart_hangup() --- called by tty_hangup() when a hangup is signaled.
-+ */
-+static void duart_hangup(struct tty_struct *tty)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+
-+ duart_flush_buffer(tty);
-+ us->open = 0;
-+ us->tty = 0;
-+}
-+
-+/*
-+ * Open a tty line. Note that this can be called multiple times, so ->open can
-+ * be >1. Only set up the tty struct if this is a "new" open, e.g. ->open was
-+ * zero
-+ */
-+static int duart_open(struct tty_struct *tty, struct file *filp)
-+{
-+ uart_state_t *us;
-+ unsigned int line = tty->index;
-+ unsigned long flags;
-+
-+ if ((line >= tty->driver->num) || !sb1250_duart_present[line])
-+ return -ENODEV;
-+
-+ pr_debug("duart_open called by %i (%s), tty is %p, rw is %p, ww is %p\n",
-+ current->pid, current->comm, tty, (void *)&tty->read_wait,
-+ (void *)&tty->write_wait);
-+
-+ us = uart_states + line;
-+ tty->driver_data = us;
-+
-+ spin_lock_irqsave(&open_lock, flags);
-+ if (!us->open) {
-+ us->tty = tty;
-+ us->tty->termios->c_cflag = us->last_cflags;
-+ }
-+ us->open++;
-+ us->flags &= ~TX_INTEN;
-+ duart_unmask_ints(line, M_DUART_IMR_RX);
-+ spin_unlock_irqrestore(&open_lock, flags);
-+
-+ return 0;
-+}
-+
-+
-+/*
-+ * Close a reference count out. If reference count hits zero, null the
-+ * tty, kill the interrupts. The tty_io driver is responsible for making
-+ * sure we've cleared out our internal buffers before calling close()
-+ */
-+static void duart_close(struct tty_struct *tty, struct file *filp)
-+{
-+ uart_state_t *us = (uart_state_t *) tty->driver_data;
-+ unsigned long flags;
-+
-+ pr_debug("duart_close called by %i (%s)\n", current->pid, current->comm);
-+
-+ if (!us || !us->open)
-+ return;
-+
-+ spin_lock_irqsave(&open_lock, flags);
-+ if (tty_hung_up_p(filp)) {
-+ spin_unlock_irqrestore(&open_lock, flags);
-+ return;
-+ }
-+
-+ if (--us->open < 0) {
-+ us->open = 0;
-+ printk(KERN_ERR "duart: bad open count: %d\n", us->open);
-+ }
-+ if (us->open) {
-+ spin_unlock_irqrestore(&open_lock, flags);
-+ return;
-+ }
-+
-+ spin_unlock_irqrestore(&open_lock, flags);
-+
-+ tty->closing = 1;
-+
-+ /* Stop accepting input */
-+ duart_mask_ints(us->line, M_DUART_IMR_RX);
-+ /* Wait for FIFO to drain */
-+ while (!(READ_SERCSR(us->status, us->line) & M_DUART_TX_EMT))
-+ ;
-+
-+ if (tty->driver->flush_buffer)
-+ tty->driver->flush_buffer(tty);
-+ if (tty->ldisc.flush_buffer)
-+ tty->ldisc.flush_buffer(tty);
-+ tty->closing = 0;
-+}
-+
-+
-+static struct tty_operations duart_ops = {
-+ .open = duart_open,
-+ .close = duart_close,
-+ .write = duart_write,
-+ .put_char = duart_put_char,
-+ .flush_chars = duart_flush_chars,
-+ .write_room = duart_write_room,
-+ .chars_in_buffer = duart_chars_in_buffer,
-+ .flush_buffer = duart_flush_buffer,
-+ .ioctl = duart_ioctl,
-+// .throttle = duart_throttle,
-+// .unthrottle = duart_unthrottle,
-+ .set_termios = duart_set_termios,
-+ .stop = duart_stop,
-+ .start = duart_start,
-+ .hangup = duart_hangup,
-+ .wait_until_sent = duart_wait_until_sent,
-+};
-+
-+/* Initialize the sb1250_duart_present array based on SOC type. */
-+static void __init sb1250_duart_init_present_lines(void)
-+{
-+ int i, max_lines;
-+
-+ /* Set the number of available units based on the SOC type. */
-+ switch (soc_type) {
-+ case K_SYS_SOC_TYPE_BCM1x55:
-+ case K_SYS_SOC_TYPE_BCM1x80:
-+ max_lines = 4;
-+ break;
-+ default:
-+ /* Assume at least two serial ports at the normal address. */
-+ max_lines = 2;
-+ break;
-+ }
-+ if (max_lines > DUART_MAX_LINE)
-+ max_lines = DUART_MAX_LINE;
-+
-+ for (i = 0; i < max_lines; i++)
-+ sb1250_duart_present[i] = 1;
-+}
-+
-+/* Set up the driver and register it, register the UART interrupts. This
-+ is called from tty_init, or as a part of the module init */
-+static int __init sb1250_duart_init(void)
-+{
-+ int i;
-+
-+ sb1250_duart_init_present_lines();
-+
-+ sb1250_duart_driver = alloc_tty_driver(DUART_MAX_LINE);
-+ if (!sb1250_duart_driver)
-+ return -ENOMEM;
-+
-+ sb1250_duart_driver->owner = THIS_MODULE;
-+ sb1250_duart_driver->name = "duart";
-+ sb1250_duart_driver->major = TTY_MAJOR;
-+ sb1250_duart_driver->minor_start = SB1250_DUART_MINOR_BASE;
-+ sb1250_duart_driver->type = TTY_DRIVER_TYPE_SERIAL;
-+ sb1250_duart_driver->subtype = SERIAL_TYPE_NORMAL;
-+ sb1250_duart_driver->init_termios = tty_std_termios;
-+ sb1250_duart_driver->flags = TTY_DRIVER_REAL_RAW;
-+ tty_set_operations(sb1250_duart_driver, &duart_ops);
-+
-+ for (i = 0; i < DUART_MAX_LINE; i++) {
-+ uart_state_t *port = uart_states + i;
-+
-+ if (!sb1250_duart_present[i])
-+ continue;
-+
-+ init_duart_port(port, i);
-+ duart_mask_ints(i, M_DUART_IMR_ALL);
-+ if (request_irq(UNIT_INT(i), duart_int, 0, "uart", port)) {
-+ panic("Couldn't get uart0 interrupt line");
-+ }
-+ /*
-+ * this generic write to a register does not implement the 1956
-+ * WAR and sometimes output gets corrupted afterwards,
-+ * especially if the port was in use as a console.
-+ */
-+ __raw_writel(M_DUART_RX_EN|M_DUART_TX_EN, port->cmd);
-+
-+ /*
-+ * we should really check to see if it's registered as a console
-+ * before trashing those settings
-+ */
-+ duart_set_cflag(i, port->last_cflags);
-+ }
-+
-+ /* Interrupts are now active, our ISR can be called. */
-+
-+ if (tty_register_driver(sb1250_duart_driver)) {
-+ printk(KERN_ERR "Couldn't register sb1250 duart serial driver\n");
-+ put_tty_driver(sb1250_duart_driver);
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+/* Unload the driver. Unregister stuff, get ready to go away */
-+static void __exit sb1250_duart_fini(void)
-+{
-+ unsigned long flags;
-+ int i;
-+
-+ local_irq_save(flags);
-+ tty_unregister_driver(sb1250_duart_driver);
-+ put_tty_driver(sb1250_duart_driver);
-+
-+ for (i = 0; i < DUART_MAX_LINE; i++) {
-+ if (!sb1250_duart_present[i])
-+ continue;
-+ free_irq(UNIT_INT(i), &uart_states[i]);
-+ disable_irq(UNIT_INT(i));
-+ }
-+ local_irq_restore(flags);
-+}
-+
-+module_init(sb1250_duart_init);
-+module_exit(sb1250_duart_fini);
-+MODULE_DESCRIPTION("SB1250 Duart serial driver");
-+MODULE_AUTHOR("Broadcom Corp.");
-+
-+#ifdef CONFIG_SIBYTE_SB1250_DUART_CONSOLE
-+
-+/*
-+ * Serial console stuff. Very basic, polling driver for doing serial
-+ * console output. The console_sem is held by the caller, so we
-+ * shouldn't be interrupted for more console activity.
-+ * XXXKW What about getting interrupted by uart driver activity?
-+ */
-+
-+void serial_outc(unsigned char c, int line)
-+{
-+ uart_state_t *port = uart_states + line;
-+ while (!(READ_SERCSR(port->status, line) & M_DUART_TX_RDY)) ;
-+ WRITE_SERCSR(c, port->tx_hold, line);
-+ while (!(READ_SERCSR(port->status, port->line) & M_DUART_TX_EMT)) ;
-+}
-+
-+static void ser_console_write(struct console *cons, const char *s,
-+ unsigned int count)
-+{
-+ int line = cons->index;
-+ uart_state_t *port = uart_states + line;
-+ u32 imr;
-+
-+ imr = READ_SERCSR(port->imr, line);
-+ WRITE_SERCSR(0, port->imr, line);
-+ while (count--) {
-+ if (*s == '\n')
-+ serial_outc('\r', line);
-+ serial_outc(*s++, line);
-+ }
-+ WRITE_SERCSR(imr, port->imr, line);
-+}
-+
-+static struct tty_driver *ser_console_device(struct console *c, int *index)
-+{
-+ *index = c->index;
-+ return sb1250_duart_driver;
-+}
-+
-+static int ser_console_setup(struct console *cons, char *str)
-+{
-+ int i;
-+
-+ sb1250_duart_init_present_lines();
-+
-+ for (i = 0; i < DUART_MAX_LINE; i++) {
-+ uart_state_t *port = uart_states + i;
-+ u32 cflags = DEFAULT_CFLAGS;
-+
-+ if (!sb1250_duart_present[i])
-+ continue;
-+
-+ init_duart_port(port, i);
-+ if (str) {
-+ int speed;
-+ char par = 'n';
-+ int cbits = 8;
-+
-+ cflags = 0;
-+
-+ /*
-+ * format is in Documentation/serial_console.txt
-+ */
-+ sscanf(str, "%d%c%d", &speed, &par, &cbits);
-+
-+ switch (speed) {
-+ case 200:
-+ case 300:
-+ case 1200:
-+ cflags |= B1200;
-+ break;
-+ case 1800:
-+ cflags |= B1800;
-+ break;
-+ case 2400:
-+ cflags |= B2400;
-+ break;
-+ case 4800:
-+ cflags |= B4800;
-+ break;
-+ default:
-+ case 9600:
-+ cflags |= B9600;
-+ break;
-+ case 19200:
-+ cflags |= B19200;
-+ break;
-+ case 38400:
-+ cflags |= B38400;
-+ break;
-+ case 57600:
-+ cflags |= B57600;
-+ break;
-+ case 115200:
-+ cflags |= B115200;
-+ break;
-+ }
-+ switch (par) {
-+ case 'o':
-+ cflags |= PARODD;
-+ case 'e':
-+ cflags |= PARENB;
-+ }
-+ switch (cbits) {
-+ default: // we only do 7 or 8
-+ case 8:
-+ cflags |= CS8;
-+ break;
-+ case 7:
-+ cflags |= CS7;
-+ break;
-+ }
-+ }
-+ duart_set_cflag(i, cflags);
-+ WRITE_SERCSR(M_DUART_RX_EN | M_DUART_TX_EN, port->cmd, i);
-+ }
-+
-+ return 0;
-+}
-+
-+static struct console sb1250_ser_cons = {
-+ .name = "duart",
-+ .write = ser_console_write,
-+ .device = ser_console_device,
-+ .setup = ser_console_setup,
-+ .flags = CON_PRINTBUFFER,
-+ .index = -1,
-+};
-+
-+static int __init sb1250_serial_console_init(void)
-+{
-+ //add_preferred_console("duart", 0, "57600n8");
-+ register_console(&sb1250_ser_cons);
-+ return 0;
-+}
-+
-+console_initcall(sb1250_serial_console_init);
-+
-+#endif /* CONFIG_SIBYTE_SB1250_DUART_CONSOLE */
-diff -Nur linux-2.6.21.1/include/linux/serial.h linux-2.6.21.1-owrt/include/linux/serial.h
---- linux-2.6.21.1/include/linux/serial.h 2007-04-27 23:49:26.000000000 +0200
-+++ linux-2.6.21.1-owrt/include/linux/serial.h 2007-05-24 22:10:29.000000000 +0200
-@@ -76,7 +76,8 @@
- #define PORT_16654 11
- #define PORT_16850 12
- #define PORT_RSA 13 /* RSA-DV II/S card */
--#define PORT_MAX 13
-+#define PORT_SB1250 14
-+#define PORT_MAX 14
-
- #define SERIAL_IO_PORT 0
- #define SERIAL_IO_HUB6 1
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/host.mk
-
-# UML only makes sense on linux
-ifeq ($(HOST_OS),Linux)
-
-ARCH:=$(shell uname -m | sed \
- -e 's/i[3-9]86/i386/' \
- -e 's/mipsel/mips/' \
- -e 's/mipseb/mips/' \
- -e 's/powerpc/ppc/' \
- -e 's/sh[234]/sh/' \
- -e 's/armeb/arm/' \
-)
-BOARD:=uml
-BOARDNAME:=User Mode Linux
-FEATURES:=broken
-LINUX_CONFIG:=$(CURDIR)/config/$(ARCH)
-
-LINUX_VERSION:=2.6.21.5
-
-include $(INCLUDE_DIR)/kernel-build.mk
-
-# include the profiles
--include profiles/*.mk
-
-endif
-
-$(eval $(call BuildKernel))
+++ /dev/null
-Openwrt inside a user mode linux. Why would we even want this many ask?
-
-There are potentially a lot of reasons, one obvious one to me, it allows
-folks to 'kick the tires' without actually flashing up any hardware. It's
-also a great environment for porting over packages, you can get a package
-fully functional in the uclibc root environment inside a uml without actually
-disturbing your 'real router', and then rebuild for a specific target once
-it's fully tested.
-
-This is a first stab at a build that 'just works' and there will be more
-cleanup to come. The simple directions are:-
-
-Configure for uml target
-Configure with an ext2 root file system
-build it all
-
-In your bin directory you will find a kernel and an ext2 root file system
-when it's finished. Just run it like this:-
-
-bin/openwrt-uml-2.6-vmlinux ubd0=bin/openwrt-uml-2.6-ext2.img con=null ssl=null ssl0=fd:0,fd:1 con0=null,fd:1 init=/etc/preinit
-
-The uml will start, and eventually the serial console of the uml will be at your
-console prompt. If you would like it in xterms, substitute con=xterm and con0=xterm.
-No networking is configured, but, it's a starting point. The resulting file system
-has just enough free space to start kicking the tires and playing in the world of
-'embedded routers' along with all the resource restrictions that come with that
-world.
-
-To configure networking and more, refer to the user mode linux documentation online.
-A quick start goes along this line. install the uml-utilities packages so you have
-the uml switch in and running, then add a command param to your uml start like this
-
-eth0=daemon,00:01:01:01:01:01,unix,/<your uml switch control socket here>
-
-With that in, and uml networking actually functional (can be a challenge at times),
-you should be able to ifconfig the interface and talk to the host side, or, if you
-bridged the uml switch to your host network, you should be able to run udhcp and be
-away with networking off to the world. Again, if you are unfamiliar with uml and
-uml networking, please read the docs and how-to stuff available on the net. It does
-take some fiddling to get it started and working right the first time, but after that,
-it opens up a whole new world of virtual machines.
-
-
-
-http://user-mode-linux.sourceforge.net/
+++ /dev/null
-# CONFIG_3_LEVEL_PGTABLES is not set
-# CONFIG_64BIT is not set
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_ARCH_HAS_SC_SIGNALS=y
-CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA=y
-# CONFIG_ATM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BITREVERSE=y
-CONFIG_BLK_DEV_COW_COMMON=y
-CONFIG_BLK_DEV_UBD=y
-CONFIG_BLK_DEV_UBD_SYNC=y
-# CONFIG_BT is not set
-CONFIG_CON_CHAN="xterm"
-CONFIG_CON_ZERO_CHAN="fd:0,fd:1"
-CONFIG_CRAMFS=y
-# CONFIG_CRYPTO_AES_586 is not set
-# CONFIG_CRYPTO_TWOFISH_586 is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_DEFCONFIG_LIST="arch/$ARCH/defconfig"
-CONFIG_DNOTIFY=y
-CONFIG_ELF_CORE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_FW_LOADER is not set
-CONFIG_GENERIC_BUG=y
-# CONFIG_HAMRADIO is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_HOSTAUDIO=m
-CONFIG_HOSTFS=y
-# CONFIG_HOST_VMSPLIT_1G is not set
-# CONFIG_HOST_VMSPLIT_2G is not set
-CONFIG_HOST_VMSPLIT_3G=y
-# CONFIG_HOST_VMSPLIT_3G_OPT is not set
-# CONFIG_HPPFS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_IFB is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INIT_ENV_ARG_LIMIT=128
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_IRQ_RELEASE_METHOD=y
-CONFIG_ISO9660_FS=y
-CONFIG_JBD=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_KERNEL_STACK_ORDER=2
-CONFIG_LBD=y
-CONFIG_LD_SCRIPT_STATIC=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_M386 is not set
-# CONFIG_M486 is not set
-# CONFIG_M586 is not set
-# CONFIG_M586MMX is not set
-# CONFIG_M586TSC is not set
-# CONFIG_M686 is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MCONSOLE=y
-# CONFIG_MCORE2 is not set
-# CONFIG_MCRUSOE is not set
-# CONFIG_MCYRIXIII is not set
-# CONFIG_MEFFICEON is not set
-# CONFIG_MGEODEGX1 is not set
-# CONFIG_MGEODE_LX is not set
-# CONFIG_MINI_FO is not set
-# CONFIG_MK6 is not set
-# CONFIG_MK7 is not set
-# CONFIG_MK8 is not set
-# CONFIG_MMAPPER is not set
-CONFIG_MODE_SKAS=y
-# CONFIG_MPENTIUM4 is not set
-CONFIG_MPENTIUMII=y
-# CONFIG_MPENTIUMIII is not set
-# CONFIG_MPENTIUMM is not set
-# CONFIG_MVIAC3_2 is not set
-# CONFIG_MVIAC7 is not set
-# CONFIG_MWINCHIP2 is not set
-# CONFIG_MWINCHIP3D is not set
-# CONFIG_MWINCHIPC6 is not set
-CONFIG_NEST_LEVEL=0
-# CONFIG_NET_RADIO is not set
-CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
-# CONFIG_NET_SCH_CLK_JIFFIES is not set
-CONFIG_NET_SCH_FIFO=y
-CONFIG_NFSD_V2_ACL=y
-CONFIG_NFSD_V3_ACL=y
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFS_ACL_SUPPORT=m
-CONFIG_NFS_V3_ACL=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NLS=y
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NOCONFIG_CHAN is not set
-CONFIG_NO_IOMEM=y
-CONFIG_NULL_CHAN=y
-CONFIG_PORT_CHAN=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_PTY_CHAN=y
-CONFIG_QFMT_V1=y
-CONFIG_QFMT_V2=y
-CONFIG_QUOTA=y
-CONFIG_QUOTACTL=y
-CONFIG_RELAY=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SEMAPHORE_SLEEPERS=y
-CONFIG_SOFT_WATCHDOG=m
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SSL=y
-CONFIG_SSL_CHAN="pty"
-# CONFIG_STACKTRACE_SUPPORT is not set
-CONFIG_STATIC_LINK=y
-CONFIG_STDERR_CONSOLE=y
-CONFIG_STDIO_CONSOLE=y
-CONFIG_STUB_CODE=0xbfffe000
-CONFIG_STUB_DATA=0xbffff000
-CONFIG_STUB_START=0xbfffe000
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_TOP_ADDR=0xC0000000
-# CONFIG_TRACE_IRQFLAGS_SUPPORT is not set
-CONFIG_TTY_CHAN=y
-CONFIG_UID16=y
-CONFIG_UML=y
-CONFIG_UML_NET=y
-CONFIG_UML_NET_DAEMON=y
-CONFIG_UML_NET_ETHERTAP=y
-CONFIG_UML_NET_MCAST=y
-# CONFIG_UML_NET_PCAP is not set
-CONFIG_UML_NET_SLIP=y
-CONFIG_UML_NET_SLIRP=y
-CONFIG_UML_NET_TUNTAP=y
-CONFIG_UML_RANDOM=y
-CONFIG_UML_REAL_TIME_CLOCK=y
-CONFIG_UML_SOUND=m
-CONFIG_UML_WATCHDOG=m
-CONFIG_UML_X86=y
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_X86_BSWAP=y
-CONFIG_X86_CMPXCHG=y
-CONFIG_X86_CMPXCHG64=y
-CONFIG_X86_GENERIC=y
-CONFIG_X86_GOOD_APIC=y
-CONFIG_X86_INTEL_USERCOPY=y
-CONFIG_X86_INVLPG=y
-CONFIG_X86_L1_CACHE_SHIFT=7
-CONFIG_X86_POPAD_OK=y
-CONFIG_X86_TSC=y
-CONFIG_X86_USE_PPRO_CHECKSUM=y
-CONFIG_X86_WP_WORKS_OK=y
-CONFIG_XTERM_CHAN=y
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_ZONE_DMA_FLAG=0
+++ /dev/null
-CONFIG_3_LEVEL_PGTABLES=y
-CONFIG_64BIT=y
-# CONFIG_ARCH_HAS_SC_SIGNALS is not set
-# CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA is not set
-# CONFIG_ATM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_BINFMT_MISC=m
-CONFIG_BITREVERSE=y
-CONFIG_BLK_DEV_COW_COMMON=y
-CONFIG_BLK_DEV_UBD=y
-CONFIG_BLK_DEV_UBD_SYNC=y
-# CONFIG_BT is not set
-CONFIG_CON_CHAN="xterm"
-CONFIG_CON_ZERO_CHAN="fd:0,fd:1"
-CONFIG_CRAMFS=y
-# CONFIG_CRYPTO_AES_X86_64 is not set
-# CONFIG_CRYPTO_TWOFISH_X86_64 is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_DEFCONFIG_LIST="arch/$ARCH/defconfig"
-CONFIG_DNOTIFY=y
-CONFIG_ELF_CORE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_FW_LOADER is not set
-CONFIG_GENERIC_BUG=y
-# CONFIG_HAMRADIO is not set
-CONFIG_HOSTAUDIO=m
-CONFIG_HOSTFS=y
-# CONFIG_HPPFS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_IFB is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INIT_ENV_ARG_LIMIT=128
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_IRQ_RELEASE_METHOD=y
-CONFIG_ISO9660_FS=y
-CONFIG_JBD=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_KERNEL_STACK_ORDER=2
-CONFIG_LD_SCRIPT_STATIC=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MCONSOLE=y
-# CONFIG_MINI_FO is not set
-# CONFIG_MMAPPER is not set
-CONFIG_MODE_SKAS=y
-CONFIG_NEST_LEVEL=0
-# CONFIG_NET_RADIO is not set
-CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
-# CONFIG_NET_SCH_CLK_JIFFIES is not set
-CONFIG_NET_SCH_FIFO=y
-CONFIG_NFSD_V2_ACL=y
-CONFIG_NFSD_V3_ACL=y
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFS_ACL_SUPPORT=m
-CONFIG_NFS_V3_ACL=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NLS=y
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NOCONFIG_CHAN is not set
-CONFIG_NO_IOMEM=y
-CONFIG_NULL_CHAN=y
-CONFIG_PORT_CHAN=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_PTY_CHAN=y
-CONFIG_QFMT_V1=y
-CONFIG_QFMT_V2=y
-CONFIG_QUOTA=y
-CONFIG_QUOTACTL=y
-CONFIG_RELAY=y
-CONFIG_RESOURCES_64BIT=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_SEMAPHORE_SLEEPERS=y
-CONFIG_SMP_BROKEN=y
-CONFIG_SOFT_WATCHDOG=m
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SSL=y
-CONFIG_SSL_CHAN="pty"
-# CONFIG_STACKTRACE_SUPPORT is not set
-CONFIG_STATIC_LINK=y
-CONFIG_STDERR_CONSOLE=y
-CONFIG_STDIO_CONSOLE=y
-CONFIG_STUB_CODE=0x7fbfffe000
-CONFIG_STUB_DATA=0x7fbffff000
-CONFIG_STUB_START=0x7fbfffe000
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_TOP_ADDR=0x80000000
-# CONFIG_TRACE_IRQFLAGS_SUPPORT is not set
-CONFIG_TTY_CHAN=y
-CONFIG_UID16=y
-CONFIG_UML=y
-CONFIG_UML_NET=y
-CONFIG_UML_NET_DAEMON=y
-CONFIG_UML_NET_ETHERTAP=y
-CONFIG_UML_NET_MCAST=y
-# CONFIG_UML_NET_PCAP is not set
-CONFIG_UML_NET_SLIP=y
-CONFIG_UML_NET_SLIRP=y
-CONFIG_UML_NET_TUNTAP=y
-CONFIG_UML_RANDOM=y
-CONFIG_UML_REAL_TIME_CLOCK=y
-CONFIG_UML_SOUND=m
-CONFIG_UML_WATCHDOG=m
-CONFIG_UML_X86=y
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_XTERM_CHAN=y
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_ZONE_DMA_FLAG=0
+++ /dev/null
-#
-# Copyright (C) 2006 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-define Image/Prepare
- cp $(LINUX_DIR)/linux $(KDIR)/vmlinux.elf
-endef
-
-define Image/Build
- cp $(KDIR)/root.$(1) $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1).img
- cp $(KDIR)/vmlinux.elf $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-vmlinux
-endef
-
-$(eval $(call BuildImage))
projects / openwrt / svn-archive / archive.git / commitdiff