brcm63xx: update irq affinity code to latest version
authorJonas Gorski <jogo@openwrt.org>
Sat, 12 Jul 2014 12:31:47 +0000 (12:31 +0000)
committerJonas Gorski <jogo@openwrt.org>
Sat, 12 Jul 2014 12:31:47 +0000 (12:31 +0000)
Reduces code size a bit and sets affinity to boot cpu by default.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41591

26 files changed:
target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch [deleted file]
target/linux/brcm63xx/patches-3.10/319-MIPS-BCM63XX-move-bcm63xx_init_irq-down.patch
target/linux/brcm63xx/patches-3.10/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch
target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch [deleted file]
target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.10/322-MIPS-BCM63XX-populate-irq_-stat-mask-_addr-for-secon.patch
target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch [deleted file]
target/linux/brcm63xx/patches-3.10/324-MIPS-BCM63XX-protect-irq-register-accesses.patch
target/linux/brcm63xx/patches-3.10/325-MIPS-BCM63XX-wire-up-the-second-cpu-s-irq-line.patch
target/linux/brcm63xx/patches-3.10/326-MIPS-BCM63XX-use-irq_desc-as-argument-for-un-mask.patch
target/linux/brcm63xx/patches-3.10/327-MIPS-BCM63XX-allow-setting-affinity-for-IPIC.patch
target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch [deleted file]
target/linux/brcm63xx/patches-3.14/319-MIPS-BCM63XX-move-bcm63xx_init_irq-down.patch
target/linux/brcm63xx/patches-3.14/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch
target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch [deleted file]
target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.14/322-MIPS-BCM63XX-populate-irq_-stat-mask-_addr-for-secon.patch
target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch [deleted file]
target/linux/brcm63xx/patches-3.14/324-MIPS-BCM63XX-protect-irq-register-accesses.patch
target/linux/brcm63xx/patches-3.14/325-MIPS-BCM63XX-wire-up-the-second-cpu-s-irq-line.patch
target/linux/brcm63xx/patches-3.14/326-MIPS-BCM63XX-use-irq_desc-as-argument-for-un-mask.patch
target/linux/brcm63xx/patches-3.14/327-MIPS-BCM63XX-allow-setting-affinity-for-IPIC.patch

diff --git a/target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch b/target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch
new file mode 100644 (file)
index 0000000..dc8f8b3
--- /dev/null
@@ -0,0 +1,41 @@
+From a2015bfad293a7eb79519beb60381cb996c6e298 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 21 Mar 2013 17:05:15 +0100
+Subject: [PATCH 01/10] MIPS: BCM63XX: add width to __dispatch_internal
+
+Make it follow the same naming convention as the other functions.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,7 +19,7 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+-static void __dispatch_internal(void) __maybe_unused;
++static void __dispatch_internal_32(void) __maybe_unused;
+ static void __dispatch_internal_64(void) __maybe_unused;
+ static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
+ static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
+@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
+       }
+       if (irq_bits == 32) {
+-              dispatch_internal = __dispatch_internal;
++              dispatch_internal = __dispatch_internal_32;
+               internal_irq_mask = __internal_irq_mask_32;
+               internal_irq_unmask = __internal_irq_unmask_32;
+       } else {
+@@ -149,7 +149,7 @@ static inline void handle_internal(int i
+  * will resume the loop where it ended the last time we left this
+  * function.
+  */
+-static void __dispatch_internal(void)
++static void __dispatch_internal_32(void)
+ {
+       u32 pending;
+       static int i;
diff --git a/target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch b/target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch
deleted file mode 100644 (file)
index f4d98c3..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From 653dcc09407a695efb203337c6f72515d4c4ee43 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 21 Mar 2013 17:05:15 +0100
-Subject: [PATCH 29/53] MIPS: BCM63XX: rename __dispatch_internal to
- __dispatch_internal_32
-
-Make it follow the same naming convention as the other functions.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,7 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
--static void __dispatch_internal(void) __maybe_unused;
-+static void __dispatch_internal_32(void) __maybe_unused;
- static void __dispatch_internal_64(void) __maybe_unused;
- static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
- static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
-@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
-       }
-       if (irq_bits == 32) {
--              dispatch_internal = __dispatch_internal;
-+              dispatch_internal = __dispatch_internal_32;
-               internal_irq_mask = __internal_irq_mask_32;
-               internal_irq_unmask = __internal_irq_unmask_32;
-       } else {
-@@ -149,7 +149,7 @@ static inline void handle_internal(int i
-  * will resume the loop where it ended the last time we left this
-  * function.
-  */
--static void __dispatch_internal(void)
-+static void __dispatch_internal_32(void)
- {
-       u32 pending;
-       static int i;
index fb57939..c9dc4ce 100644 (file)
@@ -1,9 +1,11 @@
-From c28c639b031385ecf965eecf3bfb532e88044c89 Mon Sep 17 00:00:00 2001
+From 6e79c6dd02aa56e37eb071797f0eb5e3fb588cba Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 15 Dec 2013 20:52:53 +0100
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 15 Dec 2013 20:52:53 +0100
-Subject: [PATCH 30/53] MIPS: BCM63XX: move bcm63xx_init_irq down
+Subject: [PATCH 02/10] MIPS: BCM63XX: move bcm63xx_init_irq down
 
 Allows up to drop the prototypes from the top.
 
 Allows up to drop the prototypes from the top.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
  1 file changed, 92 insertions(+), 98 deletions(-)
 ---
  arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
  1 file changed, 92 insertions(+), 98 deletions(-)
index f0311ce..021d0d9 100644 (file)
@@ -1,15 +1,22 @@
-From 01bf26c51b427e24ac69f604d33f7d9360a9e470 Mon Sep 17 00:00:00 2001
+From 39b46ed1c9fe71890566e129d9ac5feb8421b3b4 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 18 Apr 2013 21:14:49 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 18 Apr 2013 21:14:49 +0200
-Subject: [PATCH 31/53] MIPS: BCM63XX: replace irq dispatch code with a generic
+Subject: [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic
  version
 
  version
 
-The generic version uses a variable length of u32 registers of u32/u64.
-This allows easier support for longer registers without having to rewrite
-verything.
+The generic version uses a variable length of u32 registers instead of u32/u64.
+This allows easier support for "wider" registers without having to rewrite
+everything.
 
 
-This "generic" version is not slower than the old version in the best case
-(= i == next set bit), and twice as fast in the worst case in 64 bits.
+This "generic" version is as fast as the old version in the best case
+(i == next set bit), and twice as fast in the worst case in 64 bits.
+
+Using a macro was chosen over a (forced) inline version because gcc generated
+more compact code with the macro.
+
+The change from (signed) int to unsigned int for i and to_call was intentional
+as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
+optimise the code a bit further.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
@@ -47,7 +54,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +      u32 pending[width / 32];                                        \
 +      unsigned int src, tgt;                                          \
 +      bool irqs_pending = false;                                      \
 +      u32 pending[width / 32];                                        \
 +      unsigned int src, tgt;                                          \
 +      bool irqs_pending = false;                                      \
-+      static int i;                                                   \
++      static unsigned int i;                                          \
 +                                                                      \
 +      /* read registers in reverse order */                           \
 +      for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
 +                                                                      \
 +      /* read registers in reverse order */                           \
 +      for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
@@ -65,7 +72,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +              return;                                                 \
 +                                                                      \
 +      while (1) {                                                     \
 +              return;                                                 \
 +                                                                      \
 +      while (1) {                                                     \
-+              int to_call = i;                                        \
++              unsigned int to_call = i;                               \
 +                                                                      \
 +              i = (i + 1) & (width - 1);                              \
 +              if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
 +                                                                      \
 +              i = (i + 1) & (width - 1);                              \
 +              if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
@@ -87,13 +94,13 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +}                                                                     \
 +                                                                      \
 +static void __internal_irq_unmask_##width(unsigned int irq)           \
 +}                                                                     \
 +                                                                      \
 +static void __internal_irq_unmask_##width(unsigned int irq)           \
-+{                                                                     \
++{                                                                     \
 +      u32 val;                                                        \
 +      unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
 +      u32 val;                                                        \
 +      unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-+      unsigned bit = irq & 0x1f;                                      \
++      unsigned bit = irq & 0x1f;                                      \
 +                                                                      \
 +      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
 +                                                                      \
 +      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val |= (1 << bit);                                              \
++      val |= (1 << bit);                                              \
 +      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
  }
  
 +      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
  }
  
diff --git a/target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch b/target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch
deleted file mode 100644 (file)
index e53f230..0000000
+++ /dev/null
@@ -1,183 +0,0 @@
-From 1003fb4a5ee9fcff518f20eefdee1a9bf500af7e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 25 Apr 2013 00:24:06 +0200
-Subject: [PATCH 32/53] MIPS: BCM63XX: append irq line number to
- irq_{stat,mask}*
-
-The SMP capable irq controllers have two interupt output pins which are
-controlled through separate registers, so make the variables arrays.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c                           | 51 ++++++++++++-----------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
- 2 files changed, 34 insertions(+), 33 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,8 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
--static u32 irq_stat_addr, irq_mask_addr;
-+static u32 irq_stat_addr[2];
-+static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(void);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
-@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
-       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
-               u32 val;                                                \
-                                                                       \
--              val = bcm_readl(irq_stat_addr + src * sizeof(u32));     \
--              val &= bcm_readl(irq_mask_addr + src * sizeof(u32));    \
-+              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
-+              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
-               pending[--tgt] = val;                                   \
-                                                                       \
-               if (val)                                                \
-@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
-       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
-                                                                       \
--      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val &= ~(1 << bit);                                             \
--      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
-+      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
- }                                                                     \
-                                                                       \
- static void __internal_irq_unmask_##width(unsigned int irq)           \
-@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
-       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
-                                                                       \
--      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val |= (1 << bit);                                              \
--      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
-+      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
- }
- BUILD_IPIC_INTERNAL(32);
-@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
- {
-       int irq_bits;
--      irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
--      irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
-+      irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-+      irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-       switch (bcm63xx_get_cpu_id()) {
-       case BCM3368_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_3368_REG;
--              irq_mask_addr += PERF_IRQMASK_3368_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-               break;
-       case BCM6328_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6328_REG;
--              irq_mask_addr += PERF_IRQMASK_6328_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-               break;
-       case BCM6338_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6338_REG;
--              irq_mask_addr += PERF_IRQMASK_6338_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-               break;
-       case BCM6345_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6345_REG;
--              irq_mask_addr += PERF_IRQMASK_6345_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-               break;
-       case BCM6348_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6348_REG;
--              irq_mask_addr += PERF_IRQMASK_6348_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-               break;
-       case BCM6358_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6358_REG;
--              irq_mask_addr += PERF_IRQMASK_6358_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-               irq_bits = 32;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-               break;
-       case BCM6362_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6362_REG;
--              irq_mask_addr += PERF_IRQMASK_6362_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-               break;
-       case BCM6368_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6368_REG;
--              irq_mask_addr += PERF_IRQMASK_6368_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 6;
-               is_ext_irq_cascaded = 1;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -215,23 +215,23 @@
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG         0xc
--#define PERF_IRQMASK_6328_REG         0x20
-+#define PERF_IRQMASK_6328_REG(x)      (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG         0xc
- #define PERF_IRQMASK_6345_REG         0xc
- #define PERF_IRQMASK_6348_REG         0xc
--#define PERF_IRQMASK_6358_REG         0xc
--#define PERF_IRQMASK_6362_REG         0x20
--#define PERF_IRQMASK_6368_REG         0x20
-+#define PERF_IRQMASK_6358_REG(x)      (0xc + (x) * 0x2c)
-+#define PERF_IRQMASK_6362_REG(x)      (0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_6368_REG(x)      (0x20 + (x) * 0x10)
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG         0x10
--#define PERF_IRQSTAT_6328_REG         0x28
-+#define PERF_IRQSTAT_6328_REG(x)      (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG         0x10
- #define PERF_IRQSTAT_6345_REG         0x10
- #define PERF_IRQSTAT_6348_REG         0x10
--#define PERF_IRQSTAT_6358_REG         0x10
--#define PERF_IRQSTAT_6362_REG         0x28
--#define PERF_IRQSTAT_6368_REG         0x28
-+#define PERF_IRQSTAT_6358_REG(x)      (0x10 + (x) * 0x2c)
-+#define PERF_IRQSTAT_6362_REG(x)      (0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_6368_REG(x)      (0x28 + (x) * 0x10)
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368      0x14
diff --git a/target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch b/target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch
new file mode 100644 (file)
index 0000000..5b63488
--- /dev/null
@@ -0,0 +1,182 @@
+From 96ce0a9d195b2781d6f8d919dea8056b1c409703 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 25 Apr 2013 00:24:06 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: append irq line to irq_{stat,mask}*
+
+The SMP capable irq controllers have two interrupt output pins which are
+controlled through separate registers, so make the variables arrays.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c                           | 51 ++++++++++++-----------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
+ 2 files changed, 34 insertions(+), 33 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,7 +19,8 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+-static u32 irq_stat_addr, irq_mask_addr;
++static u32 irq_stat_addr[2];
++static u32 irq_mask_addr[2];
+ static void (*dispatch_internal)(void);
+ static int is_ext_irq_cascaded;
+ static unsigned int ext_irq_count;
+@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
+       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
+               u32 val;                                                \
+                                                                       \
+-              val = bcm_readl(irq_stat_addr + src * sizeof(u32));     \
+-              val &= bcm_readl(irq_mask_addr + src * sizeof(u32));    \
++              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
++              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
+               pending[--tgt] = val;                                   \
+                                                                       \
+               if (val)                                                \
+@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
+       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
+       unsigned bit = irq & 0x1f;                                      \
+                                                                       \
+-      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
++      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
+       val &= ~(1 << bit);                                             \
+-      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
++      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
+ }                                                                     \
+                                                                       \
+ static void __internal_irq_unmask_##width(unsigned int irq)           \
+@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
+       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
+       unsigned bit = irq & 0x1f;                                      \
+                                                                       \
+-      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
++      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
+       val |= (1 << bit);                                              \
+-      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
++      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
+ }
+ BUILD_IPIC_INTERNAL(32);
+@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
+ {
+       int irq_bits;
+-      irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
+-      irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
++      irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
++      irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+       switch (bcm63xx_get_cpu_id()) {
+       case BCM3368_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_3368_REG;
+-              irq_mask_addr += PERF_IRQMASK_3368_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
+               break;
+       case BCM6328_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6328_REG;
+-              irq_mask_addr += PERF_IRQMASK_6328_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
+               break;
+       case BCM6338_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6338_REG;
+-              irq_mask_addr += PERF_IRQMASK_6338_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
+               break;
+       case BCM6345_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6345_REG;
+-              irq_mask_addr += PERF_IRQMASK_6345_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
+               break;
+       case BCM6348_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6348_REG;
+-              irq_mask_addr += PERF_IRQMASK_6348_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
+               break;
+       case BCM6358_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6358_REG;
+-              irq_mask_addr += PERF_IRQMASK_6358_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+               irq_bits = 32;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
+               break;
+       case BCM6362_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6362_REG;
+-              irq_mask_addr += PERF_IRQMASK_6362_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
+               break;
+       case BCM6368_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6368_REG;
+-              irq_mask_addr += PERF_IRQMASK_6368_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 6;
+               is_ext_irq_cascaded = 1;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -215,23 +215,23 @@
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG         0xc
+-#define PERF_IRQMASK_6328_REG         0x20
++#define PERF_IRQMASK_6328_REG(x)      (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG         0xc
+ #define PERF_IRQMASK_6345_REG         0xc
+ #define PERF_IRQMASK_6348_REG         0xc
+-#define PERF_IRQMASK_6358_REG         0xc
+-#define PERF_IRQMASK_6362_REG         0x20
+-#define PERF_IRQMASK_6368_REG         0x20
++#define PERF_IRQMASK_6358_REG(x)      (0xc + (x) * 0x2c)
++#define PERF_IRQMASK_6362_REG(x)      (0x20 + (x) * 0x10)
++#define PERF_IRQMASK_6368_REG(x)      (0x20 + (x) * 0x10)
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG         0x10
+-#define PERF_IRQSTAT_6328_REG         0x28
++#define PERF_IRQSTAT_6328_REG(x)      (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG         0x10
+ #define PERF_IRQSTAT_6345_REG         0x10
+ #define PERF_IRQSTAT_6348_REG         0x10
+-#define PERF_IRQSTAT_6358_REG         0x10
+-#define PERF_IRQSTAT_6362_REG         0x28
+-#define PERF_IRQSTAT_6368_REG         0x28
++#define PERF_IRQSTAT_6358_REG(x)      (0x10 + (x) * 0x2c)
++#define PERF_IRQSTAT_6362_REG(x)      (0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_6368_REG(x)      (0x28 + (x) * 0x10)
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368      0x14
index a21137f..5f94583 100644 (file)
@@ -1,8 +1,10 @@
-From 842f213228e6fc9fd6cca01ab5128623112aa7a9 Mon Sep 17 00:00:00 2001
+From ff61c72a7a260ab4c4abbddb72c3cd2aea5e0687 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 25 Apr 2013 00:31:29 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 25 Apr 2013 00:31:29 +0200
-Subject: [PATCH 33/53] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
- pin
+Subject: [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
+ cpu
+
+Set it to zero if there is no second set.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
diff --git a/target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch
new file mode 100644 (file)
index 0000000..395dc13
--- /dev/null
@@ -0,0 +1,70 @@
+From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 26 Apr 2013 11:21:16 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,9 +19,10 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
++
+ static u32 irq_stat_addr[2];
+ static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(void);
++static void (*dispatch_internal)(int cpu);
+ static int is_ext_irq_cascaded;
+ static unsigned int ext_irq_count;
+ static unsigned int ext_irq_start, ext_irq_end;
+@@ -54,19 +55,20 @@ static inline void handle_internal(int i
+  */
+ #define BUILD_IPIC_INTERNAL(width)                                    \
+-void __dispatch_internal_##width(void)                                        \
++void __dispatch_internal_##width(int cpu)                             \
+ {                                                                     \
+       u32 pending[width / 32];                                        \
+       unsigned int src, tgt;                                          \
+       bool irqs_pending = false;                                      \
+-      static unsigned int i;                                          \
++      static unsigned int i[2];                                       \
++      unsigned int *next = &i[cpu];                                   \
+                                                                       \
+       /* read registers in reverse order */                           \
+       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
+               u32 val;                                                \
+                                                                       \
+-              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
+-              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
++              val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
++              val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+               pending[--tgt] = val;                                   \
+                                                                       \
+               if (val)                                                \
+@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
+               return;                                                 \
+                                                                       \
+       while (1) {                                                     \
+-              unsigned int to_call = i;                               \
++              unsigned int to_call = *next;                           \
+                                                                       \
+-              i = (i + 1) & (width - 1);                              \
++              *next = (*next + 1) & (width - 1);                      \
+               if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
+                       handle_internal(to_call);                       \
+                       break;                                          \
+@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
+               if (cause & CAUSEF_IP1)
+                       do_IRQ(1);
+               if (cause & CAUSEF_IP2)
+-                      dispatch_internal();
++                      dispatch_internal(0);
+               if (!is_ext_irq_cascaded) {
+                       if (cause & CAUSEF_IP3)
+                               do_IRQ(IRQ_EXT_0);
diff --git a/target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch
deleted file mode 100644 (file)
index 1b8921c..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From a33bb660c712447ba8b561109cda6734954a6efa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 26 Apr 2013 11:21:16 +0200
-Subject: [PATCH 34/53] MIPS: BCM63XX: add pin argument to dispatch internal
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,9 +19,10 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-+
- static u32 irq_stat_addr[2];
- static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(void);
-+static void (*dispatch_internal)(int pin);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
- static unsigned int ext_irq_start, ext_irq_end;
-@@ -54,19 +55,20 @@ static inline void handle_internal(int i
-  */
- #define BUILD_IPIC_INTERNAL(width)                                    \
--void __dispatch_internal_##width(void)                                        \
-+void __dispatch_internal_##width(int pin)                             \
- {                                                                     \
-       u32 pending[width / 32];                                        \
-       unsigned int src, tgt;                                          \
-       bool irqs_pending = false;                                      \
--      static int i;                                                   \
-+      static int i[2];                                                \
-+      int *next = &i[pin];                                            \
-                                                                       \
-       /* read registers in reverse order */                           \
-       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
-               u32 val;                                                \
-                                                                       \
--              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
--              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
-+              val = bcm_readl(irq_stat_addr[pin] + src * sizeof(u32)); \
-+              val &= bcm_readl(irq_mask_addr[pin] + src * sizeof(u32)); \
-               pending[--tgt] = val;                                   \
-                                                                       \
-               if (val)                                                \
-@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
-               return;                                                 \
-                                                                       \
-       while (1) {                                                     \
--              int to_call = i;                                        \
-+              int to_call = *next;                                    \
-                                                                       \
--              i = (i + 1) & (width - 1);                              \
-+              *next = (*next + 1) & (width - 1);                      \
-               if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
-                       handle_internal(to_call);                       \
-                       break;                                          \
-@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
-               if (cause & CAUSEF_IP1)
-                       do_IRQ(1);
-               if (cause & CAUSEF_IP2)
--                      dispatch_internal();
-+                      dispatch_internal(0);
-               if (!is_ext_irq_cascaded) {
-                       if (cause & CAUSEF_IP3)
-                               do_IRQ(IRQ_EXT_0);
index c38137d..18669a1 100644 (file)
@@ -1,8 +1,12 @@
-From 85257b702e1d4c6dcc839c737833c42ca53bae93 Mon Sep 17 00:00:00 2001
+From 5e86f3988854c62c0788e4820caf722fec7c791b Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 21 Apr 2013 15:38:56 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 21 Apr 2013 15:38:56 +0200
-Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
+Subject: [PATCH 07/10] MIPS: BCM63XX: protect irq register accesses
 
 
+Since we will have the chance of accessing the registers concurrently,
+protect any accesses through a spinlock.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
  1 file changed, 26 insertions(+)
 ---
  arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
  1 file changed, 26 insertions(+)
@@ -26,11 +30,11 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
 +
  static u32 irq_stat_addr[2];
  static u32 irq_mask_addr[2];
 +
  static u32 irq_stat_addr[2];
  static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(int pin);
-@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int pin
+ static void (*dispatch_internal)(int cpu);
+@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int cpu
        bool irqs_pending = false;                                      \
        bool irqs_pending = false;                                      \
-       static int i[2];                                                \
-       int *next = &i[pin];                                            \
+       static unsigned int i[2];                                       \
+       unsigned int *next = &i[cpu];                                   \
 +      unsigned long flags;                                            \
                                                                        \
        /* read registers in reverse order */                           \
 +      unsigned long flags;                                            \
                                                                        \
        /* read registers in reverse order */                           \
@@ -38,7 +42,7 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
        for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
                u32 val;                                                \
                                                                        \
        for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
                u32 val;                                                \
                                                                        \
-@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int pin
+@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int cpu
                if (val)                                                \
                        irqs_pending = true;                            \
        }                                                               \
                if (val)                                                \
                        irqs_pending = true;                            \
        }                                                               \
@@ -63,12 +67,12 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
 @@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
 @@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
 +      unsigned long flags;                                            \
                                                                        \
 +      spin_lock_irqsave(&ipic_lock, flags);                           \
        val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
 +      unsigned long flags;                                            \
                                                                        \
 +      spin_lock_irqsave(&ipic_lock, flags);                           \
        val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val |= (1 << bit);                                              \
+       val |= (1 << bit);                                              \
        bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      spin_unlock_irqrestore(&ipic_lock, flags);                      \
  }
        bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      spin_unlock_irqrestore(&ipic_lock, flags);                      \
  }
index 189965a..6e84890 100644 (file)
@@ -1,8 +1,9 @@
-From df6661d1b5c001eb91ce07f364fd5b6468fd6f99 Mon Sep 17 00:00:00 2001
+From 6e74b82aca08a5ecc4d2f0780254468659427e82 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:03:15 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:03:15 +0200
-Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
+Subject: [PATCH 08/10] MIPS: BCM63XX: wire up the second cpu's irq line
 
 
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
  1 file changed, 37 insertions(+), 7 deletions(-)
 ---
  arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
  1 file changed, 37 insertions(+), 7 deletions(-)
@@ -32,13 +33,13 @@ Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
                                                                        \
 @@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
                                                                        \
 @@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
        unsigned long flags;                                            \
 +      int cpu;                                                        \
                                                                        \
        spin_lock_irqsave(&ipic_lock, flags);                           \
 -      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
        unsigned long flags;                                            \
 +      int cpu;                                                        \
                                                                        \
        spin_lock_irqsave(&ipic_lock, flags);                           \
 -      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
--      val |= (1 << bit);                                              \
+-      val |= (1 << bit);                                              \
 -      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      for_each_present_cpu(cpu) {                                     \
 +              if (!irq_mask_addr[cpu])                                \
 -      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      for_each_present_cpu(cpu) {                                     \
 +              if (!irq_mask_addr[cpu])                                \
@@ -46,7 +47,7 @@ Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
 +                                                                      \
 +              val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              if (cpu_online(cpu))                                    \
 +                                                                      \
 +              val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              if (cpu_online(cpu))                                    \
-+                      val |= (1 << bit);                              \
++                      val |= (1 << bit);                              \
 +              else                                                    \
 +                      val &= ~(1 << bit);                             \
 +              bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              else                                                    \
 +                      val &= ~(1 << bit);                             \
 +              bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
index 468cbc3..fc07b4b 100644 (file)
@@ -1,7 +1,7 @@
-From b665117faa0dfde70689502fc420d72bbf8e6bd4 Mon Sep 17 00:00:00 2001
+From e23dc903cd69d32d407ea1b7310bc9a71e00d359 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Tue, 30 Apr 2013 11:26:53 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Tue, 30 Apr 2013 11:26:53 +0200
-Subject: [PATCH 37/53] MIPS: BCM63XX: use irq_desc as argument for (un)mask
+Subject: [PATCH 09/10] MIPS: BCM63XX: use irq_desc as argument for (un)mask
 
 In preparation for applying affinity, use the irq descriptor as the
 argument for (un)mask.
 
 In preparation for applying affinity, use the irq descriptor as the
 argument for (un)mask.
@@ -24,7 +24,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  
  
  static inline u32 get_ext_irq_perf_reg(int irq)
  
  
  static inline u32 get_ext_irq_perf_reg(int irq)
-@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int pin
+@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int cpu
        }                                                               \
  }                                                                     \
                                                                        \
        }                                                               \
  }                                                                     \
                                                                        \
@@ -42,11 +42,11 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                                                                        \
 -static void __internal_irq_unmask_##width(unsigned int irq)           \
 +static void __internal_irq_unmask_##width(struct irq_data *d)         \
                                                                        \
 -static void __internal_irq_unmask_##width(unsigned int irq)           \
 +static void __internal_irq_unmask_##width(struct irq_data *d)         \
- {                                                                     \
+ {                                                                     \
        u32 val;                                                        \
 +      unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
        u32 val;                                                        \
 +      unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
        unsigned long flags;                                            \
 @@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
   */
        unsigned long flags;                                            \
 @@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
   */
index 9394e23..a625b2e 100644 (file)
@@ -1,12 +1,16 @@
-From 9249f2f6a309e3f45c35d16decdcc5b2cadcadb8 Mon Sep 17 00:00:00 2001
+From 23493b47d8caaa59b18627a01bf443c3b50bb530 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:06:03 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:06:03 +0200
-Subject: [PATCH 38/53] MIPS: BCM63XX: allow setting affinity for IPIC
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting affinity for IPIC
+
+Wire up the set_affinity call for the internal PIC if booting on
+a cpu supporting it.
+Affinity is kept to boot cpu as default.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
- arch/mips/bcm63xx/irq.c | 4+++++++++++++++++++++++++++++++++++++------
- 1 file changed, 37 insertions(+), 6 deletions(-)
+ arch/mips/bcm63xx/irq.c | 46 ++++++++++++++++++++++++++++++++++++++++------
+ 1 file changed, 40 insertions(+), 6 deletions(-)
 
 --- a/arch/mips/bcm63xx/irq.c
 +++ b/arch/mips/bcm63xx/irq.c
 
 --- a/arch/mips/bcm63xx/irq.c
 +++ b/arch/mips/bcm63xx/irq.c
@@ -27,8 +31,8 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +                                   const struct cpumask *m)
 +{
 +      bool enable = cpu_online(cpu);
 +                                   const struct cpumask *m)
 +{
 +      bool enable = cpu_online(cpu);
-+#ifdef CONFIG_SMP
 +
 +
++#ifdef CONFIG_SMP
 +      if (m)
 +              enable &= cpu_isset(cpu, *m);
 +      else if (irqd_affinity_was_set(d))
 +      if (m)
 +              enable &= cpu_isset(cpu, *m);
 +      else if (irqd_affinity_was_set(d))
@@ -47,7 +51,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 -static void __internal_irq_unmask_##width(struct irq_data *d)         \
 +static void __internal_irq_unmask_##width(struct irq_data *d,         \
 +                                        const struct cpumask *m)      \
 -static void __internal_irq_unmask_##width(struct irq_data *d)         \
 +static void __internal_irq_unmask_##width(struct irq_data *d,         \
 +                                        const struct cpumask *m)      \
- {                                                                     \
+ {                                                                     \
        u32 val;                                                        \
        unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
 @@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
 @@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
@@ -56,7 +60,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 -              if (cpu_online(cpu))                                    \
 +              if (enable_irq_for_cpu(cpu, d, m))                      \
                val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 -              if (cpu_online(cpu))                                    \
 +              if (enable_irq_for_cpu(cpu, d, m))                      \
-                       val |= (1 << bit);                              \
+                       val |= (1 << bit);                              \
                else                                                    \
                        val &= ~(1 << bit);                             \
 @@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
                else                                                    \
                        val &= ~(1 << bit);                             \
 @@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
@@ -97,7 +101,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  static struct irq_chip bcm63xx_internal_irq_chip = {
        .name           = "bcm63xx_ipic",
        .irq_mask       = bcm63xx_internal_irq_mask,
  static struct irq_chip bcm63xx_internal_irq_chip = {
        .name           = "bcm63xx_ipic",
        .irq_mask       = bcm63xx_internal_irq_mask,
-@@ -523,7 +551,10 @@ void __init arch_init_irq(void)
+@@ -523,7 +551,13 @@ void __init arch_init_irq(void)
  
        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
  #ifdef CONFIG_SMP
  
        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
  #ifdef CONFIG_SMP
@@ -106,6 +110,9 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
 +              bcm63xx_internal_irq_chip.irq_set_affinity =
 +                      bcm63xx_internal_set_affinity;
                setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
 +              bcm63xx_internal_irq_chip.irq_set_affinity =
 +                      bcm63xx_internal_set_affinity;
++
++              cpumask_clear(irq_default_affinity);
++              cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
 +      }
  #endif
  }
 +      }
  #endif
  }
diff --git a/target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch b/target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch
new file mode 100644 (file)
index 0000000..dc8f8b3
--- /dev/null
@@ -0,0 +1,41 @@
+From a2015bfad293a7eb79519beb60381cb996c6e298 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 21 Mar 2013 17:05:15 +0100
+Subject: [PATCH 01/10] MIPS: BCM63XX: add width to __dispatch_internal
+
+Make it follow the same naming convention as the other functions.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,7 +19,7 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+-static void __dispatch_internal(void) __maybe_unused;
++static void __dispatch_internal_32(void) __maybe_unused;
+ static void __dispatch_internal_64(void) __maybe_unused;
+ static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
+ static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
+@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
+       }
+       if (irq_bits == 32) {
+-              dispatch_internal = __dispatch_internal;
++              dispatch_internal = __dispatch_internal_32;
+               internal_irq_mask = __internal_irq_mask_32;
+               internal_irq_unmask = __internal_irq_unmask_32;
+       } else {
+@@ -149,7 +149,7 @@ static inline void handle_internal(int i
+  * will resume the loop where it ended the last time we left this
+  * function.
+  */
+-static void __dispatch_internal(void)
++static void __dispatch_internal_32(void)
+ {
+       u32 pending;
+       static int i;
diff --git a/target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch b/target/linux/brcm63xx/patches-3.14/318-MIPS-BCM63XX-rename-__dispatch_internal-to-__dispatc.patch
deleted file mode 100644 (file)
index f4d98c3..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From 653dcc09407a695efb203337c6f72515d4c4ee43 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 21 Mar 2013 17:05:15 +0100
-Subject: [PATCH 29/53] MIPS: BCM63XX: rename __dispatch_internal to
- __dispatch_internal_32
-
-Make it follow the same naming convention as the other functions.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,7 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
--static void __dispatch_internal(void) __maybe_unused;
-+static void __dispatch_internal_32(void) __maybe_unused;
- static void __dispatch_internal_64(void) __maybe_unused;
- static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
- static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
-@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
-       }
-       if (irq_bits == 32) {
--              dispatch_internal = __dispatch_internal;
-+              dispatch_internal = __dispatch_internal_32;
-               internal_irq_mask = __internal_irq_mask_32;
-               internal_irq_unmask = __internal_irq_unmask_32;
-       } else {
-@@ -149,7 +149,7 @@ static inline void handle_internal(int i
-  * will resume the loop where it ended the last time we left this
-  * function.
-  */
--static void __dispatch_internal(void)
-+static void __dispatch_internal_32(void)
- {
-       u32 pending;
-       static int i;
index fb57939..c9dc4ce 100644 (file)
@@ -1,9 +1,11 @@
-From c28c639b031385ecf965eecf3bfb532e88044c89 Mon Sep 17 00:00:00 2001
+From 6e79c6dd02aa56e37eb071797f0eb5e3fb588cba Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 15 Dec 2013 20:52:53 +0100
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 15 Dec 2013 20:52:53 +0100
-Subject: [PATCH 30/53] MIPS: BCM63XX: move bcm63xx_init_irq down
+Subject: [PATCH 02/10] MIPS: BCM63XX: move bcm63xx_init_irq down
 
 Allows up to drop the prototypes from the top.
 
 Allows up to drop the prototypes from the top.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
  1 file changed, 92 insertions(+), 98 deletions(-)
 ---
  arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
  1 file changed, 92 insertions(+), 98 deletions(-)
index f0311ce..021d0d9 100644 (file)
@@ -1,15 +1,22 @@
-From 01bf26c51b427e24ac69f604d33f7d9360a9e470 Mon Sep 17 00:00:00 2001
+From 39b46ed1c9fe71890566e129d9ac5feb8421b3b4 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 18 Apr 2013 21:14:49 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 18 Apr 2013 21:14:49 +0200
-Subject: [PATCH 31/53] MIPS: BCM63XX: replace irq dispatch code with a generic
+Subject: [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic
  version
 
  version
 
-The generic version uses a variable length of u32 registers of u32/u64.
-This allows easier support for longer registers without having to rewrite
-verything.
+The generic version uses a variable length of u32 registers instead of u32/u64.
+This allows easier support for "wider" registers without having to rewrite
+everything.
 
 
-This "generic" version is not slower than the old version in the best case
-(= i == next set bit), and twice as fast in the worst case in 64 bits.
+This "generic" version is as fast as the old version in the best case
+(i == next set bit), and twice as fast in the worst case in 64 bits.
+
+Using a macro was chosen over a (forced) inline version because gcc generated
+more compact code with the macro.
+
+The change from (signed) int to unsigned int for i and to_call was intentional
+as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
+optimise the code a bit further.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
@@ -47,7 +54,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +      u32 pending[width / 32];                                        \
 +      unsigned int src, tgt;                                          \
 +      bool irqs_pending = false;                                      \
 +      u32 pending[width / 32];                                        \
 +      unsigned int src, tgt;                                          \
 +      bool irqs_pending = false;                                      \
-+      static int i;                                                   \
++      static unsigned int i;                                          \
 +                                                                      \
 +      /* read registers in reverse order */                           \
 +      for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
 +                                                                      \
 +      /* read registers in reverse order */                           \
 +      for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
@@ -65,7 +72,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +              return;                                                 \
 +                                                                      \
 +      while (1) {                                                     \
 +              return;                                                 \
 +                                                                      \
 +      while (1) {                                                     \
-+              int to_call = i;                                        \
++              unsigned int to_call = i;                               \
 +                                                                      \
 +              i = (i + 1) & (width - 1);                              \
 +              if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
 +                                                                      \
 +              i = (i + 1) & (width - 1);                              \
 +              if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
@@ -87,13 +94,13 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +}                                                                     \
 +                                                                      \
 +static void __internal_irq_unmask_##width(unsigned int irq)           \
 +}                                                                     \
 +                                                                      \
 +static void __internal_irq_unmask_##width(unsigned int irq)           \
-+{                                                                     \
++{                                                                     \
 +      u32 val;                                                        \
 +      unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
 +      u32 val;                                                        \
 +      unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-+      unsigned bit = irq & 0x1f;                                      \
++      unsigned bit = irq & 0x1f;                                      \
 +                                                                      \
 +      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
 +                                                                      \
 +      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val |= (1 << bit);                                              \
++      val |= (1 << bit);                                              \
 +      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
  }
  
 +      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
  }
  
diff --git a/target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch b/target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-number-to-irq_-stat-mas.patch
deleted file mode 100644 (file)
index e53f230..0000000
+++ /dev/null
@@ -1,183 +0,0 @@
-From 1003fb4a5ee9fcff518f20eefdee1a9bf500af7e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 25 Apr 2013 00:24:06 +0200
-Subject: [PATCH 32/53] MIPS: BCM63XX: append irq line number to
- irq_{stat,mask}*
-
-The SMP capable irq controllers have two interupt output pins which are
-controlled through separate registers, so make the variables arrays.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c                           | 51 ++++++++++++-----------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
- 2 files changed, 34 insertions(+), 33 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,8 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
--static u32 irq_stat_addr, irq_mask_addr;
-+static u32 irq_stat_addr[2];
-+static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(void);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
-@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
-       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
-               u32 val;                                                \
-                                                                       \
--              val = bcm_readl(irq_stat_addr + src * sizeof(u32));     \
--              val &= bcm_readl(irq_mask_addr + src * sizeof(u32));    \
-+              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
-+              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
-               pending[--tgt] = val;                                   \
-                                                                       \
-               if (val)                                                \
-@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
-       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
-                                                                       \
--      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val &= ~(1 << bit);                                             \
--      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
-+      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
- }                                                                     \
-                                                                       \
- static void __internal_irq_unmask_##width(unsigned int irq)           \
-@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
-       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
-                                                                       \
--      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
-+      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val |= (1 << bit);                                              \
--      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
-+      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
- }
- BUILD_IPIC_INTERNAL(32);
-@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
- {
-       int irq_bits;
--      irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
--      irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
-+      irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-+      irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-       switch (bcm63xx_get_cpu_id()) {
-       case BCM3368_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_3368_REG;
--              irq_mask_addr += PERF_IRQMASK_3368_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-               break;
-       case BCM6328_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6328_REG;
--              irq_mask_addr += PERF_IRQMASK_6328_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-               break;
-       case BCM6338_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6338_REG;
--              irq_mask_addr += PERF_IRQMASK_6338_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-               break;
-       case BCM6345_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6345_REG;
--              irq_mask_addr += PERF_IRQMASK_6345_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-               break;
-       case BCM6348_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6348_REG;
--              irq_mask_addr += PERF_IRQMASK_6348_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-+              irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-               irq_bits = 32;
-               ext_irq_count = 4;
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-               break;
-       case BCM6358_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6358_REG;
--              irq_mask_addr += PERF_IRQMASK_6358_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-               irq_bits = 32;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-               break;
-       case BCM6362_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6362_REG;
--              irq_mask_addr += PERF_IRQMASK_6362_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 4;
-               is_ext_irq_cascaded = 1;
-@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
-               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-               break;
-       case BCM6368_CPU_ID:
--              irq_stat_addr += PERF_IRQSTAT_6368_REG;
--              irq_mask_addr += PERF_IRQMASK_6368_REG;
-+              irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-+              irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-               irq_bits = 64;
-               ext_irq_count = 6;
-               is_ext_irq_cascaded = 1;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -215,23 +215,23 @@
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG         0xc
--#define PERF_IRQMASK_6328_REG         0x20
-+#define PERF_IRQMASK_6328_REG(x)      (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG         0xc
- #define PERF_IRQMASK_6345_REG         0xc
- #define PERF_IRQMASK_6348_REG         0xc
--#define PERF_IRQMASK_6358_REG         0xc
--#define PERF_IRQMASK_6362_REG         0x20
--#define PERF_IRQMASK_6368_REG         0x20
-+#define PERF_IRQMASK_6358_REG(x)      (0xc + (x) * 0x2c)
-+#define PERF_IRQMASK_6362_REG(x)      (0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_6368_REG(x)      (0x20 + (x) * 0x10)
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG         0x10
--#define PERF_IRQSTAT_6328_REG         0x28
-+#define PERF_IRQSTAT_6328_REG(x)      (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG         0x10
- #define PERF_IRQSTAT_6345_REG         0x10
- #define PERF_IRQSTAT_6348_REG         0x10
--#define PERF_IRQSTAT_6358_REG         0x10
--#define PERF_IRQSTAT_6362_REG         0x28
--#define PERF_IRQSTAT_6368_REG         0x28
-+#define PERF_IRQSTAT_6358_REG(x)      (0x10 + (x) * 0x2c)
-+#define PERF_IRQSTAT_6362_REG(x)      (0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_6368_REG(x)      (0x28 + (x) * 0x10)
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368      0x14
diff --git a/target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch b/target/linux/brcm63xx/patches-3.14/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch
new file mode 100644 (file)
index 0000000..5b63488
--- /dev/null
@@ -0,0 +1,182 @@
+From 96ce0a9d195b2781d6f8d919dea8056b1c409703 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 25 Apr 2013 00:24:06 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: append irq line to irq_{stat,mask}*
+
+The SMP capable irq controllers have two interrupt output pins which are
+controlled through separate registers, so make the variables arrays.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c                           | 51 ++++++++++++-----------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
+ 2 files changed, 34 insertions(+), 33 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,7 +19,8 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+-static u32 irq_stat_addr, irq_mask_addr;
++static u32 irq_stat_addr[2];
++static u32 irq_mask_addr[2];
+ static void (*dispatch_internal)(void);
+ static int is_ext_irq_cascaded;
+ static unsigned int ext_irq_count;
+@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
+       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
+               u32 val;                                                \
+                                                                       \
+-              val = bcm_readl(irq_stat_addr + src * sizeof(u32));     \
+-              val &= bcm_readl(irq_mask_addr + src * sizeof(u32));    \
++              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
++              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
+               pending[--tgt] = val;                                   \
+                                                                       \
+               if (val)                                                \
+@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
+       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
+       unsigned bit = irq & 0x1f;                                      \
+                                                                       \
+-      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
++      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
+       val &= ~(1 << bit);                                             \
+-      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
++      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
+ }                                                                     \
+                                                                       \
+ static void __internal_irq_unmask_##width(unsigned int irq)           \
+@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
+       unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
+       unsigned bit = irq & 0x1f;                                      \
+                                                                       \
+-      val = bcm_readl(irq_mask_addr + reg * sizeof(u32));             \
++      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
+       val |= (1 << bit);                                              \
+-      bcm_writel(val, irq_mask_addr + reg * sizeof(u32));             \
++      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
+ }
+ BUILD_IPIC_INTERNAL(32);
+@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
+ {
+       int irq_bits;
+-      irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
+-      irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
++      irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
++      irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+       switch (bcm63xx_get_cpu_id()) {
+       case BCM3368_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_3368_REG;
+-              irq_mask_addr += PERF_IRQMASK_3368_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
+               break;
+       case BCM6328_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6328_REG;
+-              irq_mask_addr += PERF_IRQMASK_6328_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
+               break;
+       case BCM6338_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6338_REG;
+-              irq_mask_addr += PERF_IRQMASK_6338_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
+               break;
+       case BCM6345_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6345_REG;
+-              irq_mask_addr += PERF_IRQMASK_6345_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
+               break;
+       case BCM6348_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6348_REG;
+-              irq_mask_addr += PERF_IRQMASK_6348_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
++              irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+               irq_bits = 32;
+               ext_irq_count = 4;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
+               break;
+       case BCM6358_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6358_REG;
+-              irq_mask_addr += PERF_IRQMASK_6358_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+               irq_bits = 32;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
+               break;
+       case BCM6362_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6362_REG;
+-              irq_mask_addr += PERF_IRQMASK_6362_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 4;
+               is_ext_irq_cascaded = 1;
+@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
+               break;
+       case BCM6368_CPU_ID:
+-              irq_stat_addr += PERF_IRQSTAT_6368_REG;
+-              irq_mask_addr += PERF_IRQMASK_6368_REG;
++              irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
++              irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+               irq_bits = 64;
+               ext_irq_count = 6;
+               is_ext_irq_cascaded = 1;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -215,23 +215,23 @@
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG         0xc
+-#define PERF_IRQMASK_6328_REG         0x20
++#define PERF_IRQMASK_6328_REG(x)      (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG         0xc
+ #define PERF_IRQMASK_6345_REG         0xc
+ #define PERF_IRQMASK_6348_REG         0xc
+-#define PERF_IRQMASK_6358_REG         0xc
+-#define PERF_IRQMASK_6362_REG         0x20
+-#define PERF_IRQMASK_6368_REG         0x20
++#define PERF_IRQMASK_6358_REG(x)      (0xc + (x) * 0x2c)
++#define PERF_IRQMASK_6362_REG(x)      (0x20 + (x) * 0x10)
++#define PERF_IRQMASK_6368_REG(x)      (0x20 + (x) * 0x10)
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG         0x10
+-#define PERF_IRQSTAT_6328_REG         0x28
++#define PERF_IRQSTAT_6328_REG(x)      (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG         0x10
+ #define PERF_IRQSTAT_6345_REG         0x10
+ #define PERF_IRQSTAT_6348_REG         0x10
+-#define PERF_IRQSTAT_6358_REG         0x10
+-#define PERF_IRQSTAT_6362_REG         0x28
+-#define PERF_IRQSTAT_6368_REG         0x28
++#define PERF_IRQSTAT_6358_REG(x)      (0x10 + (x) * 0x2c)
++#define PERF_IRQSTAT_6362_REG(x)      (0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_6368_REG(x)      (0x28 + (x) * 0x10)
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368      0x14
index a21137f..5f94583 100644 (file)
@@ -1,8 +1,10 @@
-From 842f213228e6fc9fd6cca01ab5128623112aa7a9 Mon Sep 17 00:00:00 2001
+From ff61c72a7a260ab4c4abbddb72c3cd2aea5e0687 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 25 Apr 2013 00:31:29 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 25 Apr 2013 00:31:29 +0200
-Subject: [PATCH 33/53] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
- pin
+Subject: [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
+ cpu
+
+Set it to zero if there is no second set.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
diff --git a/target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch
new file mode 100644 (file)
index 0000000..395dc13
--- /dev/null
@@ -0,0 +1,70 @@
+From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 26 Apr 2013 11:21:16 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,9 +19,10 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
++
+ static u32 irq_stat_addr[2];
+ static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(void);
++static void (*dispatch_internal)(int cpu);
+ static int is_ext_irq_cascaded;
+ static unsigned int ext_irq_count;
+ static unsigned int ext_irq_start, ext_irq_end;
+@@ -54,19 +55,20 @@ static inline void handle_internal(int i
+  */
+ #define BUILD_IPIC_INTERNAL(width)                                    \
+-void __dispatch_internal_##width(void)                                        \
++void __dispatch_internal_##width(int cpu)                             \
+ {                                                                     \
+       u32 pending[width / 32];                                        \
+       unsigned int src, tgt;                                          \
+       bool irqs_pending = false;                                      \
+-      static unsigned int i;                                          \
++      static unsigned int i[2];                                       \
++      unsigned int *next = &i[cpu];                                   \
+                                                                       \
+       /* read registers in reverse order */                           \
+       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
+               u32 val;                                                \
+                                                                       \
+-              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
+-              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
++              val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
++              val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+               pending[--tgt] = val;                                   \
+                                                                       \
+               if (val)                                                \
+@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
+               return;                                                 \
+                                                                       \
+       while (1) {                                                     \
+-              unsigned int to_call = i;                               \
++              unsigned int to_call = *next;                           \
+                                                                       \
+-              i = (i + 1) & (width - 1);                              \
++              *next = (*next + 1) & (width - 1);                      \
+               if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
+                       handle_internal(to_call);                       \
+                       break;                                          \
+@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
+               if (cause & CAUSEF_IP1)
+                       do_IRQ(1);
+               if (cause & CAUSEF_IP2)
+-                      dispatch_internal();
++                      dispatch_internal(0);
+               if (!is_ext_irq_cascaded) {
+                       if (cause & CAUSEF_IP3)
+                               do_IRQ(IRQ_EXT_0);
diff --git a/target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.14/323-MIPS-BCM63XX-add-pin-argument-to-dispatch-internal.patch
deleted file mode 100644 (file)
index 1b8921c..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From a33bb660c712447ba8b561109cda6734954a6efa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 26 Apr 2013 11:21:16 +0200
-Subject: [PATCH 34/53] MIPS: BCM63XX: add pin argument to dispatch internal
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,9 +19,10 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-+
- static u32 irq_stat_addr[2];
- static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(void);
-+static void (*dispatch_internal)(int pin);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
- static unsigned int ext_irq_start, ext_irq_end;
-@@ -54,19 +55,20 @@ static inline void handle_internal(int i
-  */
- #define BUILD_IPIC_INTERNAL(width)                                    \
--void __dispatch_internal_##width(void)                                        \
-+void __dispatch_internal_##width(int pin)                             \
- {                                                                     \
-       u32 pending[width / 32];                                        \
-       unsigned int src, tgt;                                          \
-       bool irqs_pending = false;                                      \
--      static int i;                                                   \
-+      static int i[2];                                                \
-+      int *next = &i[pin];                                            \
-                                                                       \
-       /* read registers in reverse order */                           \
-       for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
-               u32 val;                                                \
-                                                                       \
--              val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
--              val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
-+              val = bcm_readl(irq_stat_addr[pin] + src * sizeof(u32)); \
-+              val &= bcm_readl(irq_mask_addr[pin] + src * sizeof(u32)); \
-               pending[--tgt] = val;                                   \
-                                                                       \
-               if (val)                                                \
-@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
-               return;                                                 \
-                                                                       \
-       while (1) {                                                     \
--              int to_call = i;                                        \
-+              int to_call = *next;                                    \
-                                                                       \
--              i = (i + 1) & (width - 1);                              \
-+              *next = (*next + 1) & (width - 1);                      \
-               if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
-                       handle_internal(to_call);                       \
-                       break;                                          \
-@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
-               if (cause & CAUSEF_IP1)
-                       do_IRQ(1);
-               if (cause & CAUSEF_IP2)
--                      dispatch_internal();
-+                      dispatch_internal(0);
-               if (!is_ext_irq_cascaded) {
-                       if (cause & CAUSEF_IP3)
-                               do_IRQ(IRQ_EXT_0);
index c38137d..18669a1 100644 (file)
@@ -1,8 +1,12 @@
-From 85257b702e1d4c6dcc839c737833c42ca53bae93 Mon Sep 17 00:00:00 2001
+From 5e86f3988854c62c0788e4820caf722fec7c791b Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 21 Apr 2013 15:38:56 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 21 Apr 2013 15:38:56 +0200
-Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
+Subject: [PATCH 07/10] MIPS: BCM63XX: protect irq register accesses
 
 
+Since we will have the chance of accessing the registers concurrently,
+protect any accesses through a spinlock.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
  1 file changed, 26 insertions(+)
 ---
  arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
  1 file changed, 26 insertions(+)
@@ -26,11 +30,11 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
 +
  static u32 irq_stat_addr[2];
  static u32 irq_mask_addr[2];
 +
  static u32 irq_stat_addr[2];
  static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(int pin);
-@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int pin
+ static void (*dispatch_internal)(int cpu);
+@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int cpu
        bool irqs_pending = false;                                      \
        bool irqs_pending = false;                                      \
-       static int i[2];                                                \
-       int *next = &i[pin];                                            \
+       static unsigned int i[2];                                       \
+       unsigned int *next = &i[cpu];                                   \
 +      unsigned long flags;                                            \
                                                                        \
        /* read registers in reverse order */                           \
 +      unsigned long flags;                                            \
                                                                        \
        /* read registers in reverse order */                           \
@@ -38,7 +42,7 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
        for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
                u32 val;                                                \
                                                                        \
        for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
                u32 val;                                                \
                                                                        \
-@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int pin
+@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int cpu
                if (val)                                                \
                        irqs_pending = true;                            \
        }                                                               \
                if (val)                                                \
                        irqs_pending = true;                            \
        }                                                               \
@@ -63,12 +67,12 @@ Subject: [PATCH 35/53] MIPS: BCM63XX: protect irq register accesses
 @@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
 @@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
 +      unsigned long flags;                                            \
                                                                        \
 +      spin_lock_irqsave(&ipic_lock, flags);                           \
        val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
 +      unsigned long flags;                                            \
                                                                        \
 +      spin_lock_irqsave(&ipic_lock, flags);                           \
        val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
-       val |= (1 << bit);                                              \
+       val |= (1 << bit);                                              \
        bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      spin_unlock_irqrestore(&ipic_lock, flags);                      \
  }
        bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      spin_unlock_irqrestore(&ipic_lock, flags);                      \
  }
index 189965a..6e84890 100644 (file)
@@ -1,8 +1,9 @@
-From df6661d1b5c001eb91ce07f364fd5b6468fd6f99 Mon Sep 17 00:00:00 2001
+From 6e74b82aca08a5ecc4d2f0780254468659427e82 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:03:15 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:03:15 +0200
-Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
+Subject: [PATCH 08/10] MIPS: BCM63XX: wire up the second cpu's irq line
 
 
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
  arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
  1 file changed, 37 insertions(+), 7 deletions(-)
 ---
  arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
  1 file changed, 37 insertions(+), 7 deletions(-)
@@ -32,13 +33,13 @@ Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
                                                                        \
 @@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
                                                                        \
 @@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
        unsigned long flags;                                            \
 +      int cpu;                                                        \
                                                                        \
        spin_lock_irqsave(&ipic_lock, flags);                           \
 -      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
        unsigned long flags;                                            \
 +      int cpu;                                                        \
                                                                        \
        spin_lock_irqsave(&ipic_lock, flags);                           \
 -      val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));          \
--      val |= (1 << bit);                                              \
+-      val |= (1 << bit);                                              \
 -      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      for_each_present_cpu(cpu) {                                     \
 +              if (!irq_mask_addr[cpu])                                \
 -      bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));          \
 +      for_each_present_cpu(cpu) {                                     \
 +              if (!irq_mask_addr[cpu])                                \
@@ -46,7 +47,7 @@ Subject: [PATCH 36/53] MIPS: BCM63XX: wire up the second cpu's irq line
 +                                                                      \
 +              val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              if (cpu_online(cpu))                                    \
 +                                                                      \
 +              val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              if (cpu_online(cpu))                                    \
-+                      val |= (1 << bit);                              \
++                      val |= (1 << bit);                              \
 +              else                                                    \
 +                      val &= ~(1 << bit);                             \
 +              bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
 +              else                                                    \
 +                      val &= ~(1 << bit);                             \
 +              bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
index 468cbc3..fc07b4b 100644 (file)
@@ -1,7 +1,7 @@
-From b665117faa0dfde70689502fc420d72bbf8e6bd4 Mon Sep 17 00:00:00 2001
+From e23dc903cd69d32d407ea1b7310bc9a71e00d359 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Tue, 30 Apr 2013 11:26:53 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Tue, 30 Apr 2013 11:26:53 +0200
-Subject: [PATCH 37/53] MIPS: BCM63XX: use irq_desc as argument for (un)mask
+Subject: [PATCH 09/10] MIPS: BCM63XX: use irq_desc as argument for (un)mask
 
 In preparation for applying affinity, use the irq descriptor as the
 argument for (un)mask.
 
 In preparation for applying affinity, use the irq descriptor as the
 argument for (un)mask.
@@ -24,7 +24,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  
  
  static inline u32 get_ext_irq_perf_reg(int irq)
  
  
  static inline u32 get_ext_irq_perf_reg(int irq)
-@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int pin
+@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int cpu
        }                                                               \
  }                                                                     \
                                                                        \
        }                                                               \
  }                                                                     \
                                                                        \
@@ -42,11 +42,11 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                                                                        \
 -static void __internal_irq_unmask_##width(unsigned int irq)           \
 +static void __internal_irq_unmask_##width(struct irq_data *d)         \
                                                                        \
 -static void __internal_irq_unmask_##width(unsigned int irq)           \
 +static void __internal_irq_unmask_##width(struct irq_data *d)         \
- {                                                                     \
+ {                                                                     \
        u32 val;                                                        \
 +      unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
        u32 val;                                                        \
 +      unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
        unsigned reg = (irq / 32) ^ (width/32 - 1);                     \
-       unsigned bit = irq & 0x1f;                                      \
+       unsigned bit = irq & 0x1f;                                      \
        unsigned long flags;                                            \
 @@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
   */
        unsigned long flags;                                            \
 @@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
   */
index 9394e23..a625b2e 100644 (file)
@@ -1,12 +1,16 @@
-From 9249f2f6a309e3f45c35d16decdcc5b2cadcadb8 Mon Sep 17 00:00:00 2001
+From 23493b47d8caaa59b18627a01bf443c3b50bb530 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:06:03 +0200
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Fri, 26 Apr 2013 12:06:03 +0200
-Subject: [PATCH 38/53] MIPS: BCM63XX: allow setting affinity for IPIC
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting affinity for IPIC
+
+Wire up the set_affinity call for the internal PIC if booting on
+a cpu supporting it.
+Affinity is kept to boot cpu as default.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
- arch/mips/bcm63xx/irq.c | 4+++++++++++++++++++++++++++++++++++++------
- 1 file changed, 37 insertions(+), 6 deletions(-)
+ arch/mips/bcm63xx/irq.c | 46 ++++++++++++++++++++++++++++++++++++++++------
+ 1 file changed, 40 insertions(+), 6 deletions(-)
 
 --- a/arch/mips/bcm63xx/irq.c
 +++ b/arch/mips/bcm63xx/irq.c
 
 --- a/arch/mips/bcm63xx/irq.c
 +++ b/arch/mips/bcm63xx/irq.c
@@ -27,8 +31,8 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +                                   const struct cpumask *m)
 +{
 +      bool enable = cpu_online(cpu);
 +                                   const struct cpumask *m)
 +{
 +      bool enable = cpu_online(cpu);
-+#ifdef CONFIG_SMP
 +
 +
++#ifdef CONFIG_SMP
 +      if (m)
 +              enable &= cpu_isset(cpu, *m);
 +      else if (irqd_affinity_was_set(d))
 +      if (m)
 +              enable &= cpu_isset(cpu, *m);
 +      else if (irqd_affinity_was_set(d))
@@ -47,7 +51,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 -static void __internal_irq_unmask_##width(struct irq_data *d)         \
 +static void __internal_irq_unmask_##width(struct irq_data *d,         \
 +                                        const struct cpumask *m)      \
 -static void __internal_irq_unmask_##width(struct irq_data *d)         \
 +static void __internal_irq_unmask_##width(struct irq_data *d,         \
 +                                        const struct cpumask *m)      \
- {                                                                     \
+ {                                                                     \
        u32 val;                                                        \
        unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
 @@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
        u32 val;                                                        \
        unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
 @@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
@@ -56,7 +60,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 -              if (cpu_online(cpu))                                    \
 +              if (enable_irq_for_cpu(cpu, d, m))                      \
                val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
 -              if (cpu_online(cpu))                                    \
 +              if (enable_irq_for_cpu(cpu, d, m))                      \
-                       val |= (1 << bit);                              \
+                       val |= (1 << bit);                              \
                else                                                    \
                        val &= ~(1 << bit);                             \
 @@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
                else                                                    \
                        val &= ~(1 << bit);                             \
 @@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
@@ -97,7 +101,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  static struct irq_chip bcm63xx_internal_irq_chip = {
        .name           = "bcm63xx_ipic",
        .irq_mask       = bcm63xx_internal_irq_mask,
  static struct irq_chip bcm63xx_internal_irq_chip = {
        .name           = "bcm63xx_ipic",
        .irq_mask       = bcm63xx_internal_irq_mask,
-@@ -523,7 +551,10 @@ void __init arch_init_irq(void)
+@@ -523,7 +551,13 @@ void __init arch_init_irq(void)
  
        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
  #ifdef CONFIG_SMP
  
        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
  #ifdef CONFIG_SMP
@@ -106,6 +110,9 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
 +              bcm63xx_internal_irq_chip.irq_set_affinity =
 +                      bcm63xx_internal_set_affinity;
                setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
 +              bcm63xx_internal_irq_chip.irq_set_affinity =
 +                      bcm63xx_internal_set_affinity;
++
++              cpumask_clear(irq_default_affinity);
++              cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
 +      }
  #endif
  }
 +      }
  #endif
  }