ar71xx: nuke 3.3 support
authorGabor Juhos <juhosg@openwrt.org>
Mon, 17 Dec 2012 22:28:09 +0000 (22:28 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Mon, 17 Dec 2012 22:28:09 +0000 (22:28 +0000)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34743

149 files changed:
target/linux/ar71xx/config-3.3 [deleted file]
target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch [deleted file]
target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch [deleted file]
target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch [deleted file]
target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch [deleted file]
target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch [deleted file]
target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch [deleted file]
target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch [deleted file]
target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch [deleted file]
target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch [deleted file]
target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch [deleted file]
target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch [deleted file]
target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch [deleted file]
target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch [deleted file]
target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch [deleted file]
target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch [deleted file]
target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch [deleted file]
target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch [deleted file]
target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch [deleted file]
target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch [deleted file]
target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch [deleted file]
target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch [deleted file]
target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch [deleted file]
target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch [deleted file]
target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch [deleted file]
target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch [deleted file]
target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch [deleted file]
target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch [deleted file]
target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch [deleted file]
target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch [deleted file]
target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch [deleted file]
target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch [deleted file]
target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch [deleted file]
target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch [deleted file]
target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch [deleted file]
target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch [deleted file]
target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch [deleted file]
target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch [deleted file]
target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch [deleted file]
target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch [deleted file]
target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch [deleted file]
target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch [deleted file]
target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch [deleted file]
target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch [deleted file]
target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch [deleted file]
target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch [deleted file]
target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch [deleted file]
target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch [deleted file]
target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch [deleted file]
target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch [deleted file]
target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch [deleted file]
target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch [deleted file]
target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch [deleted file]
target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch [deleted file]
target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch [deleted file]
target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch [deleted file]
target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch [deleted file]
target/linux/ar71xx/patches-3.3/171-MIPS-ath79-add-support-for-the-Qualcomm-Atheros-AP13.patch [deleted file]
target/linux/ar71xx/patches-3.3/200-spi-ath79-add-delay-between-SCK-changes.patch [deleted file]
target/linux/ar71xx/patches-3.3/201-spi-ath79-add-missing-HIGH-LOW-SCK-transition.patch [deleted file]
target/linux/ar71xx/patches-3.3/202-spi-ath79-remove-superfluous-chip-select-code.patch [deleted file]
target/linux/ar71xx/patches-3.3/203-spi-ath79-use-gpio_request_one.patch [deleted file]
target/linux/ar71xx/patches-3.3/204-spi-ath79-avoid-multiple-initialization-of-the-SPI-c.patch [deleted file]
target/linux/ar71xx/patches-3.3/205-spi-ath79-add-shutdown-handler.patch [deleted file]
target/linux/ar71xx/patches-3.3/206-spi-ath79-make-chipselect-logic-more-flexible.patch [deleted file]
target/linux/ar71xx/patches-3.3/210-MIPS-ath79-simplify-misc-irq-handling.patch [deleted file]
target/linux/ar71xx/patches-3.3/211-ar933x_uart-improve-serial-clock-calculation.patch [deleted file]
target/linux/ar71xx/patches-3.3/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch [deleted file]
target/linux/ar71xx/patches-3.3/310-lib-add-rle-decompression.patch [deleted file]
target/linux/ar71xx/patches-3.3/401-mtd-physmap-add-lock-unlock.patch [deleted file]
target/linux/ar71xx/patches-3.3/402-mtd-SST39VF6401B-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/403-mtd_fix_cfi_cmdset_0002_status_check.patch [deleted file]
target/linux/ar71xx/patches-3.3/404-mtd-wrt160nl-trx-parser.patch [deleted file]
target/linux/ar71xx/patches-3.3/405-mtd-tp-link-partition-parser.patch [deleted file]
target/linux/ar71xx/patches-3.3/406-mtd-m25p80-allow-to-specify-max-read-size.patch [deleted file]
target/linux/ar71xx/patches-3.3/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch [deleted file]
target/linux/ar71xx/patches-3.3/408-mtd-redboot_partition_scan.patch [deleted file]
target/linux/ar71xx/patches-3.3/409-mtd-rb4xx_nand_driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/410-mtd-rb750-nand-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/411-mtd-cfi_cmdset_0002-force-word-write.patch [deleted file]
target/linux/ar71xx/patches-3.3/412-mtd-m25p80-zero-partition-parser-data.patch [deleted file]
target/linux/ar71xx/patches-3.3/413-mtd-ar934x-nand-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/420-net-ar71xx_mac_driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/422-dsa-trailer-tag-validation-fix.patch [deleted file]
target/linux/ar71xx/patches-3.3/423-dsa-add-88e6063-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/430-drivers-link-spi-before-mtd.patch [deleted file]
target/linux/ar71xx/patches-3.3/431-spi-add-various-flags.patch [deleted file]
target/linux/ar71xx/patches-3.3/432-spi-rb4xx-spi-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/433-spi-rb4xx-cpld-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/434-spi-ap83_spi_controller.patch [deleted file]
target/linux/ar71xx/patches-3.3/435-spi-vsc7385_driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/440-leds-wndr3700-usb-led-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/441-leds-rb750-led-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/450-gpio-nxp-74hc153-gpio-chip-driver.patch [deleted file]
target/linux/ar71xx/patches-3.3/460-spi-bitbang-export-spi_bitbang_bufs.patch [deleted file]
target/linux/ar71xx/patches-3.3/461-spi-add-type-field-to-spi_transfer.patch [deleted file]
target/linux/ar71xx/patches-3.3/462-mtd-m25p80-set-spi-transfer-type.patch [deleted file]
target/linux/ar71xx/patches-3.3/463-spi-ath79-add-fast-flash-read.patch [deleted file]
target/linux/ar71xx/patches-3.3/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch [deleted file]
target/linux/ar71xx/patches-3.3/500-MIPS-fw-myloader.patch [deleted file]
target/linux/ar71xx/patches-3.3/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch [deleted file]
target/linux/ar71xx/patches-3.3/502-MIPS-ath79-export-ath79_gpio_base.patch [deleted file]
target/linux/ar71xx/patches-3.3/503-MIPS-ath79-add-flash-acquire-release.patch [deleted file]
target/linux/ar71xx/patches-3.3/504-MIPS-ath79-add-ath79_device_reset_get.patch [deleted file]
target/linux/ar71xx/patches-3.3/505-MIPS-ath79-add-ath79_gpio_function_select.patch [deleted file]
target/linux/ar71xx/patches-3.3/506-MIPS-ath79-prom-parse-redboot-args.patch [deleted file]
target/linux/ar71xx/patches-3.3/507-MIPS-ath79-prom-add-myloader-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/508-MIPS-ath79-prom-image-command-line-hack.patch [deleted file]
target/linux/ar71xx/patches-3.3/509-MIPS-ath79-process-board-kernel-option.patch [deleted file]
target/linux/ar71xx/patches-3.3/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch [deleted file]
target/linux/ar71xx/patches-3.3/520-MIPS-ath79-enable-UART-function.patch [deleted file]
target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch [deleted file]
target/linux/ar71xx/patches-3.3/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch [deleted file]
target/linux/ar71xx/patches-3.3/523-MIPS-ath79-OTP-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch [deleted file]
target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch [deleted file]
target/linux/ar71xx/patches-3.3/602-MIPS-ath79-add-openwrt-stuff.patch [deleted file]
target/linux/ar71xx/patches-3.3/603-MIPS-ath79-ap121-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/604-MIPS-ath79-ap81-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/605-MIPS-ath79-db120-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/606-MIPS-ath79-pb44-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/607-MIPS-ath79-ubnt-xm-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/608-MIPS-ath79-ubnt-xm-add-more-boards.patch [deleted file]
target/linux/ar71xx/patches-3.3/609-MIPS-ath79-ap136-fixes.patch [deleted file]
target/linux/ar71xx/patches-3.3/610-MIPS-ath79-openwrt-machines.patch [deleted file]
target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/612-MIPS-ath79-TL-WA7510N-v1-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/614-MIPS-ath79-MR600-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/615-MIPS-ath79-RB435G-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/616-MIPS-ath79-WNDR4300-support.patch [deleted file]
target/linux/ar71xx/patches-3.3/630-MIPS-ath79-enable-dsp.patch [deleted file]
target/linux/ar71xx/patches-3.3/650-MIPS-ath79-fix-ar933x-reset.patch [deleted file]
target/linux/ar71xx/patches-3.3/901-mdio_bitbang_ignore_ta_value.patch [deleted file]
target/linux/ar71xx/patches-3.3/902-unaligned_access_hacks.patch [deleted file]
target/linux/ar71xx/patches-3.3/a01-ag71xx-build_skb-compat.patch [deleted file]
target/linux/ar71xx/patches-3.3/a02-ar934x_nfc-add-NO_AUTOINCR-flag.patch [deleted file]
target/linux/ar71xx/patches-3.3/a03-rb4xx_nand-add-NO_AUTOINCR-flag.patch [deleted file]
target/linux/ar71xx/patches-3.3/a04-rb750_nand-add-NO_AUTOINCR-flag.patch [deleted file]
target/linux/ar71xx/patches-3.3/a05-ar934x_nfc-add-buffer-verification.patch [deleted file]
target/linux/ar71xx/patches-3.3/a06-rb750_nand-add-buffer-verification.patch [deleted file]

diff --git a/target/linux/ar71xx/config-3.3 b/target/linux/ar71xx/config-3.3
deleted file mode 100644 (file)
index d1dd0b8..0000000
+++ /dev/null
@@ -1,234 +0,0 @@
-CONFIG_AG71XX=y
-CONFIG_AG71XX_AR8216_SUPPORT=y
-# CONFIG_AG71XX_DEBUG is not set
-# CONFIG_AG71XX_DEBUG_FS is not set
-CONFIG_AR8216_PHY=y
-CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ATH79=y
-CONFIG_ATH79_DEV_AP9X_PCI=y
-CONFIG_ATH79_DEV_DSA=y
-CONFIG_ATH79_DEV_ETH=y
-CONFIG_ATH79_DEV_GPIO_BUTTONS=y
-CONFIG_ATH79_DEV_LEDS_GPIO=y
-CONFIG_ATH79_DEV_M25P80=y
-CONFIG_ATH79_DEV_NFC=y
-CONFIG_ATH79_DEV_SPI=y
-CONFIG_ATH79_DEV_USB=y
-CONFIG_ATH79_DEV_WMAC=y
-CONFIG_ATH79_MACH_ALFA_AP96=y
-CONFIG_ATH79_MACH_ALFA_NX=y
-CONFIG_ATH79_MACH_ALL0258N=y
-CONFIG_ATH79_MACH_ALL0315N=y
-CONFIG_ATH79_MACH_AP113=y
-CONFIG_ATH79_MACH_AP121=y
-CONFIG_ATH79_MACH_AP136=y
-CONFIG_ATH79_MACH_AP81=y
-CONFIG_ATH79_MACH_AP83=y
-CONFIG_ATH79_MACH_AP96=y
-CONFIG_ATH79_MACH_AW_NR580=y
-CONFIG_ATH79_MACH_CAP4200AG=y
-CONFIG_ATH79_MACH_DB120=y
-CONFIG_ATH79_MACH_DIR_600_A1=y
-CONFIG_ATH79_MACH_DIR_615_C1=y
-CONFIG_ATH79_MACH_DIR_825_B1=y
-CONFIG_ATH79_MACH_EAP7660D=y
-CONFIG_ATH79_MACH_EW_DORIN=y
-CONFIG_ATH79_MACH_HORNET_UB=y
-CONFIG_ATH79_MACH_JA76PF=y
-CONFIG_ATH79_MACH_JWAP003=y
-CONFIG_ATH79_MACH_MR600=y
-CONFIG_ATH79_MACH_MZK_W04NU=y
-CONFIG_ATH79_MACH_MZK_W300NH=y
-CONFIG_ATH79_MACH_NBG460N=y
-CONFIG_ATH79_MACH_OM2P=y
-CONFIG_ATH79_MACH_PB42=y
-CONFIG_ATH79_MACH_PB44=y
-CONFIG_ATH79_MACH_PB92=y
-CONFIG_ATH79_MACH_RB2011=y
-CONFIG_ATH79_MACH_RB4XX=y
-CONFIG_ATH79_MACH_RB750=y
-CONFIG_ATH79_MACH_RW2458N=y
-CONFIG_ATH79_MACH_TEW_632BRP=y
-CONFIG_ATH79_MACH_TEW_673GRU=y
-CONFIG_ATH79_MACH_TEW_712BR=y
-CONFIG_ATH79_MACH_TL_MR11U=y
-CONFIG_ATH79_MACH_TL_MR3020=y
-CONFIG_ATH79_MACH_TL_MR3X20=y
-CONFIG_ATH79_MACH_TL_WA901ND=y
-CONFIG_ATH79_MACH_TL_WA901ND_V2=y
-CONFIG_ATH79_MACH_TL_WDR4300=y
-CONFIG_ATH79_MACH_TL_WR1041N_V2=y
-CONFIG_ATH79_MACH_TL_WR1043ND=y
-CONFIG_ATH79_MACH_TL_WR2543N=y
-CONFIG_ATH79_MACH_TL_WR703N=y
-CONFIG_ATH79_MACH_TL_WR741ND=y
-CONFIG_ATH79_MACH_TL_WR741ND_V4=y
-CONFIG_ATH79_MACH_TL_WR841N_V1=y
-CONFIG_ATH79_MACH_TL_WR841N_V8=y
-CONFIG_ATH79_MACH_TL_WR941ND=y
-CONFIG_ATH79_MACH_UBNT=y
-CONFIG_ATH79_MACH_UBNT_XM=y
-CONFIG_ATH79_MACH_WHR_HP_G300N=y
-CONFIG_ATH79_MACH_WLAE_AG300N=y
-CONFIG_ATH79_MACH_WNDR3700=y
-CONFIG_ATH79_MACH_WNDR4300=y
-CONFIG_ATH79_MACH_WNR2000=y
-CONFIG_ATH79_MACH_WP543=y
-CONFIG_ATH79_MACH_WPE72=y
-CONFIG_ATH79_MACH_WRT160NL=y
-CONFIG_ATH79_MACH_WRT400N=y
-CONFIG_ATH79_MACH_WZR_HP_AG300H=y
-CONFIG_ATH79_MACH_WZR_HP_G300NH=y
-CONFIG_ATH79_MACH_WZR_HP_G300NH2=y
-CONFIG_ATH79_MACH_WZR_HP_G450H=y
-CONFIG_ATH79_MACH_ZCN_1523H=y
-CONFIG_ATH79_NVRAM=y
-CONFIG_ATH79_PCI_ATH9K_FIXUP=y
-CONFIG_ATH79_ROUTERBOOT=y
-# CONFIG_ATH79_WDT is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CEVT_R4K=y
-CONFIG_CEVT_R4K_LIB=y
-CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd"
-CONFIG_CMDLINE_BOOL=y
-# CONFIG_CMDLINE_OVERRIDE is not set
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPS32_R2=y
-CONFIG_CPU_MIPSR2=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CSRC_R4K=y
-CONFIG_CSRC_R4K_LIB=y
-CONFIG_DECOMPRESS_LZMA=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_ETHERNET_PACKET_MANGLE=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_NXP_74HC153=y
-CONFIG_GPIO_PCF857X=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HARDWARE_WATCHPOINTS=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_GENERIC_HARDIRQS=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_WORK=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HW_HAS_PCI=y
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_GPIO=y
-CONFIG_IMAGE_CMDLINE_HACK=y
-CONFIG_INITRAMFS_ROOT_GID=0
-CONFIG_INITRAMFS_ROOT_UID=0
-CONFIG_INITRAMFS_SOURCE="../../root"
-CONFIG_IP17XX_PHY=y
-CONFIG_IRQ_CPU=y
-CONFIG_IRQ_FORCED_THREADING=y
-# CONFIG_LEDS_RB750 is not set
-# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
-# CONFIG_LEDS_TRIGGER_NETDEV is not set
-# CONFIG_LEDS_TRIGGER_TIMER is not set
-# CONFIG_LEDS_WNDR3700_USB is not set
-# CONFIG_M25PXX_USE_FAST_READ is not set
-CONFIG_MARVELL_PHY=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MICREL_PHY=y
-CONFIG_MIPS=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_MIPS_MACHINE=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_MYLOADER_PARTS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_TPLINK_PARTS=y
-CONFIG_MTD_WRT160NL_PARTS=y
-CONFIG_MYLOADER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6060=y
-CONFIG_NET_DSA_MV88E6063=y
-CONFIG_NET_DSA_TAG_TRAILER=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PCI=y
-CONFIG_PCI_AR724X=y
-CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PHYLIB=y
-# CONFIG_PREEMPT_RCU is not set
-CONFIG_RLE_DECOMPRESS=y
-CONFIG_RTL8306_PHY=y
-CONFIG_RTL8366RB_PHY=y
-CONFIG_RTL8366S_PHY=y
-CONFIG_RTL8366_SMI=y
-CONFIG_RTL8367_PHY=y
-# CONFIG_SCSI_DMA is not set
-CONFIG_SERIAL_8250_NR_UARTS=1
-CONFIG_SERIAL_8250_RUNTIME_UARTS=1
-CONFIG_SERIAL_AR933X=y
-CONFIG_SERIAL_AR933X_CONSOLE=y
-CONFIG_SERIAL_AR933X_NR_UARTS=2
-# CONFIG_SLAB is not set
-CONFIG_SLUB=y
-CONFIG_SOC_AR71XX=y
-CONFIG_SOC_AR724X=y
-CONFIG_SOC_AR913X=y
-CONFIG_SOC_AR933X=y
-CONFIG_SOC_AR934X=y
-CONFIG_SOC_QCA955X=y
-CONFIG_SPI=y
-CONFIG_SPI_AP83=y
-CONFIG_SPI_ATH79=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_MASTER=y
-# CONFIG_SPI_RB4XX is not set
-# CONFIG_SPI_RB4XX_CPLD is not set
-# CONFIG_SPI_VSC7385 is not set
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_LEDS=y
-CONFIG_SYS_HAS_CPU_MIPS32_R2=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_USB_ARCH_HAS_XHCI=y
-CONFIG_USB_SUPPORT=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch b/target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch
deleted file mode 100644 (file)
index d3a3b71..0000000
+++ /dev/null
@@ -1,544 +0,0 @@
-From dbcbcdd001c5943adbb18db3b8f0dafc405559eb Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Tue, 13 Mar 2012 01:04:53 +0100
-Subject: [PATCH 03/47] USB: use generic platform driver on ath79
-
-The ath79 usb driver doesn't do anything special and is now converted
-to the generic ehci and ohci driver.
-This was tested on a TP-Link TL-WR1043ND (AR9132)
-
-Acked-by: Gabor Juhos <juhosg@openwrt.org>
-CC: Imre Kaloz <kaloz@openwrt.org>
-CC: linux-mips@linux-mips.org
-CC: Ralf Baechle <ralf@linux-mips.org>
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/mips/ath79/dev-usb.c     |   31 +++++-
- drivers/usb/host/Kconfig      |   12 ++-
- drivers/usb/host/ehci-ath79.c |  208 -----------------------------------------
- drivers/usb/host/ehci-hcd.c   |    5 -
- drivers/usb/host/ohci-ath79.c |  151 -----------------------------
- drivers/usb/host/ohci-hcd.c   |    5 -
- 6 files changed, 35 insertions(+), 377 deletions(-)
- delete mode 100644 drivers/usb/host/ehci-ath79.c
- delete mode 100644 drivers/usb/host/ohci-ath79.c
-
---- a/arch/mips/ath79/dev-usb.c
-+++ b/arch/mips/ath79/dev-usb.c
-@@ -17,6 +17,8 @@
- #include <linux/irq.h>
- #include <linux/dma-mapping.h>
- #include <linux/platform_device.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/usb/ohci_pdriver.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
-@@ -36,14 +38,19 @@ static struct resource ath79_ohci_resour
- };
- static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct usb_ohci_pdata ath79_ohci_pdata = {
-+};
-+
- static struct platform_device ath79_ohci_device = {
--      .name           = "ath79-ohci",
-+      .name           = "ohci-platform",
-       .id             = -1,
-       .resource       = ath79_ohci_resources,
-       .num_resources  = ARRAY_SIZE(ath79_ohci_resources),
-       .dev = {
-               .dma_mask               = &ath79_ohci_dmamask,
-               .coherent_dma_mask      = DMA_BIT_MASK(32),
-+              .platform_data          = &ath79_ohci_pdata,
-       },
- };
-@@ -60,8 +67,20 @@ static struct resource ath79_ehci_resour
- };
- static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
-+      .has_synopsys_hc_bug    = 1,
-+      .port_power_off         = 1,
-+};
-+
-+static struct usb_ehci_pdata ath79_ehci_pdata_v2 = {
-+      .caps_offset            = 0x100,
-+      .has_tt                 = 1,
-+      .port_power_off         = 1,
-+};
-+
- static struct platform_device ath79_ehci_device = {
--      .name           = "ath79-ehci",
-+      .name           = "ehci-platform",
-       .id             = -1,
-       .resource       = ath79_ehci_resources,
-       .num_resources  = ARRAY_SIZE(ath79_ehci_resources),
-@@ -101,7 +120,7 @@ static void __init ath79_usb_setup(void)
-       ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
-       ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
--      ath79_ehci_device.name = "ar71xx-ehci";
-+      ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -142,7 +161,7 @@ static void __init ar724x_usb_setup(void
-       ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
-       ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
--      ath79_ehci_device.name = "ar724x-ehci";
-+      ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -159,7 +178,7 @@ static void __init ar913x_usb_setup(void
-       ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
-       ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
--      ath79_ehci_device.name = "ar913x-ehci";
-+      ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -176,7 +195,7 @@ static void __init ar933x_usb_setup(void
-       ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
-       ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
--      ath79_ehci_device.name = "ar933x-ehci";
-+      ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
---- a/drivers/usb/host/Kconfig
-+++ b/drivers/usb/host/Kconfig
-@@ -218,11 +218,15 @@ config USB_CNS3XXX_EHCI
-         support.
- config USB_EHCI_ATH79
--      bool "EHCI support for AR7XXX/AR9XXX SoCs"
-+      bool "EHCI support for AR7XXX/AR9XXX SoCs (DEPRECATED)"
-       depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X)
-       select USB_EHCI_ROOT_HUB_TT
-+      select USB_EHCI_HCD_PLATFORM
-       default y
-       ---help---
-+        This option is deprecated now and the driver was removed, use
-+        USB_EHCI_HCD_PLATFORM instead.
-+
-         Enables support for the built-in EHCI controller present
-         on the Atheros AR7XXX/AR9XXX SoCs.
-@@ -312,10 +316,14 @@ config USB_OHCI_HCD_OMAP3
-         OMAP3 and later chips.
- config USB_OHCI_ATH79
--      bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs"
-+      bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs (DEPRECATED)"
-       depends on USB_OHCI_HCD && (SOC_AR71XX || SOC_AR724X)
-+      select USB_OHCI_HCD_PLATFORM
-       default y
-       help
-+        This option is deprecated now and the driver was removed, use
-+        USB_OHCI_HCD_PLATFORM instead.
-+
-         Enables support for the built-in OHCI controller present on the
-         Atheros AR71XX/AR7240 SoCs.
---- a/drivers/usb/host/ehci-ath79.c
-+++ /dev/null
-@@ -1,208 +0,0 @@
--/*
-- *  Bus Glue for Atheros AR7XXX/AR9XXX built-in EHCI controller.
-- *
-- *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-- *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-- *
-- *  Parts of this file are based on Atheros' 2.6.15 BSP
-- *    Copyright (C) 2007 Atheros Communications, Inc.
-- *
-- *  This program is free software; you can redistribute it and/or modify it
-- *  under the terms of the GNU General Public License version 2 as published
-- *  by the Free Software Foundation.
-- */
--
--#include <linux/platform_device.h>
--
--enum {
--      EHCI_ATH79_IP_V1 = 0,
--      EHCI_ATH79_IP_V2,
--};
--
--static const struct platform_device_id ehci_ath79_id_table[] = {
--      {
--              .name           = "ar71xx-ehci",
--              .driver_data    = EHCI_ATH79_IP_V1,
--      },
--      {
--              .name           = "ar724x-ehci",
--              .driver_data    = EHCI_ATH79_IP_V2,
--      },
--      {
--              .name           = "ar913x-ehci",
--              .driver_data    = EHCI_ATH79_IP_V2,
--      },
--      {
--              .name           = "ar933x-ehci",
--              .driver_data    = EHCI_ATH79_IP_V2,
--      },
--      {
--              /* terminating entry */
--      },
--};
--
--MODULE_DEVICE_TABLE(platform, ehci_ath79_id_table);
--
--static int ehci_ath79_init(struct usb_hcd *hcd)
--{
--      struct ehci_hcd *ehci = hcd_to_ehci(hcd);
--      struct platform_device *pdev = to_platform_device(hcd->self.controller);
--      const struct platform_device_id *id;
--      int ret;
--
--      id = platform_get_device_id(pdev);
--      if (!id) {
--              dev_err(hcd->self.controller, "missing device id\n");
--              return -EINVAL;
--      }
--
--      switch (id->driver_data) {
--      case EHCI_ATH79_IP_V1:
--              ehci->has_synopsys_hc_bug = 1;
--
--              ehci->caps = hcd->regs;
--              ehci->regs = hcd->regs +
--                      HC_LENGTH(ehci,
--                                ehci_readl(ehci, &ehci->caps->hc_capbase));
--              break;
--
--      case EHCI_ATH79_IP_V2:
--              hcd->has_tt = 1;
--
--              ehci->caps = hcd->regs + 0x100;
--              ehci->regs = hcd->regs + 0x100 +
--                      HC_LENGTH(ehci,
--                                ehci_readl(ehci, &ehci->caps->hc_capbase));
--              break;
--
--      default:
--              BUG();
--      }
--
--      dbg_hcs_params(ehci, "reset");
--      dbg_hcc_params(ehci, "reset");
--      ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
--      ehci->sbrn = 0x20;
--
--      ehci_reset(ehci);
--
--      ret = ehci_init(hcd);
--      if (ret)
--              return ret;
--
--      ehci_port_power(ehci, 0);
--
--      return 0;
--}
--
--static const struct hc_driver ehci_ath79_hc_driver = {
--      .description            = hcd_name,
--      .product_desc           = "Atheros built-in EHCI controller",
--      .hcd_priv_size          = sizeof(struct ehci_hcd),
--      .irq                    = ehci_irq,
--      .flags                  = HCD_MEMORY | HCD_USB2,
--
--      .reset                  = ehci_ath79_init,
--      .start                  = ehci_run,
--      .stop                   = ehci_stop,
--      .shutdown               = ehci_shutdown,
--
--      .urb_enqueue            = ehci_urb_enqueue,
--      .urb_dequeue            = ehci_urb_dequeue,
--      .endpoint_disable       = ehci_endpoint_disable,
--      .endpoint_reset         = ehci_endpoint_reset,
--
--      .get_frame_number       = ehci_get_frame,
--
--      .hub_status_data        = ehci_hub_status_data,
--      .hub_control            = ehci_hub_control,
--
--      .relinquish_port        = ehci_relinquish_port,
--      .port_handed_over       = ehci_port_handed_over,
--
--      .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
--};
--
--static int ehci_ath79_probe(struct platform_device *pdev)
--{
--      struct usb_hcd *hcd;
--      struct resource *res;
--      int irq;
--      int ret;
--
--      if (usb_disabled())
--              return -ENODEV;
--
--      res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
--      if (!res) {
--              dev_dbg(&pdev->dev, "no IRQ specified\n");
--              return -ENODEV;
--      }
--      irq = res->start;
--
--      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--      if (!res) {
--              dev_dbg(&pdev->dev, "no base address specified\n");
--              return -ENODEV;
--      }
--
--      hcd = usb_create_hcd(&ehci_ath79_hc_driver, &pdev->dev,
--                           dev_name(&pdev->dev));
--      if (!hcd)
--              return -ENOMEM;
--
--      hcd->rsrc_start = res->start;
--      hcd->rsrc_len   = resource_size(res);
--
--      if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
--              dev_dbg(&pdev->dev, "controller already in use\n");
--              ret = -EBUSY;
--              goto err_put_hcd;
--      }
--
--      hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
--      if (!hcd->regs) {
--              dev_dbg(&pdev->dev, "error mapping memory\n");
--              ret = -EFAULT;
--              goto err_release_region;
--      }
--
--      ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
--      if (ret)
--              goto err_iounmap;
--
--      return 0;
--
--err_iounmap:
--      iounmap(hcd->regs);
--
--err_release_region:
--      release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
--err_put_hcd:
--      usb_put_hcd(hcd);
--      return ret;
--}
--
--static int ehci_ath79_remove(struct platform_device *pdev)
--{
--      struct usb_hcd *hcd = platform_get_drvdata(pdev);
--
--      usb_remove_hcd(hcd);
--      iounmap(hcd->regs);
--      release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
--      usb_put_hcd(hcd);
--
--      return 0;
--}
--
--static struct platform_driver ehci_ath79_driver = {
--      .probe          = ehci_ath79_probe,
--      .remove         = ehci_ath79_remove,
--      .id_table       = ehci_ath79_id_table,
--      .driver = {
--              .owner  = THIS_MODULE,
--              .name   = "ath79-ehci",
--      }
--};
--
--MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ehci");
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -1356,11 +1356,6 @@ MODULE_LICENSE ("GPL");
- #define PLATFORM_DRIVER               s5p_ehci_driver
- #endif
--#ifdef CONFIG_USB_EHCI_ATH79
--#include "ehci-ath79.c"
--#define PLATFORM_DRIVER               ehci_ath79_driver
--#endif
--
- #ifdef CONFIG_SPARC_LEON
- #include "ehci-grlib.c"
- #define PLATFORM_DRIVER               ehci_grlib_driver
---- a/drivers/usb/host/ohci-ath79.c
-+++ /dev/null
-@@ -1,151 +0,0 @@
--/*
-- *  OHCI HCD (Host Controller Driver) for USB.
-- *
-- *  Bus Glue for Atheros AR71XX/AR724X built-in OHCI controller.
-- *
-- *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-- *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-- *
-- *  Parts of this file are based on Atheros' 2.6.15 BSP
-- *    Copyright (C) 2007 Atheros Communications, Inc.
-- *
-- *  This program is free software; you can redistribute it and/or modify it
-- *  under the terms of the GNU General Public License version 2 as published
-- *  by the Free Software Foundation.
-- */
--
--#include <linux/platform_device.h>
--
--static int __devinit ohci_ath79_start(struct usb_hcd *hcd)
--{
--      struct ohci_hcd *ohci = hcd_to_ohci(hcd);
--      int ret;
--
--      ret = ohci_init(ohci);
--      if (ret < 0)
--              return ret;
--
--      ret = ohci_run(ohci);
--      if (ret < 0)
--              goto err;
--
--      return 0;
--
--err:
--      ohci_stop(hcd);
--      return ret;
--}
--
--static const struct hc_driver ohci_ath79_hc_driver = {
--      .description            = hcd_name,
--      .product_desc           = "Atheros built-in OHCI controller",
--      .hcd_priv_size          = sizeof(struct ohci_hcd),
--
--      .irq                    = ohci_irq,
--      .flags                  = HCD_USB11 | HCD_MEMORY,
--
--      .start                  = ohci_ath79_start,
--      .stop                   = ohci_stop,
--      .shutdown               = ohci_shutdown,
--
--      .urb_enqueue            = ohci_urb_enqueue,
--      .urb_dequeue            = ohci_urb_dequeue,
--      .endpoint_disable       = ohci_endpoint_disable,
--
--      /*
--       * scheduling support
--       */
--      .get_frame_number       = ohci_get_frame,
--
--      /*
--       * root hub support
--       */
--      .hub_status_data        = ohci_hub_status_data,
--      .hub_control            = ohci_hub_control,
--      .start_port_reset       = ohci_start_port_reset,
--};
--
--static int ohci_ath79_probe(struct platform_device *pdev)
--{
--      struct usb_hcd *hcd;
--      struct resource *res;
--      int irq;
--      int ret;
--
--      if (usb_disabled())
--              return -ENODEV;
--
--      res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
--      if (!res) {
--              dev_dbg(&pdev->dev, "no IRQ specified\n");
--              return -ENODEV;
--      }
--      irq = res->start;
--
--      hcd = usb_create_hcd(&ohci_ath79_hc_driver, &pdev->dev,
--                           dev_name(&pdev->dev));
--      if (!hcd)
--              return -ENOMEM;
--
--      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--      if (!res) {
--              dev_dbg(&pdev->dev, "no base address specified\n");
--              ret = -ENODEV;
--              goto err_put_hcd;
--      }
--      hcd->rsrc_start = res->start;
--      hcd->rsrc_len = resource_size(res);
--
--      if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
--              dev_dbg(&pdev->dev, "controller already in use\n");
--              ret = -EBUSY;
--              goto err_put_hcd;
--      }
--
--      hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
--      if (!hcd->regs) {
--              dev_dbg(&pdev->dev, "error mapping memory\n");
--              ret = -EFAULT;
--              goto err_release_region;
--      }
--
--      ohci_hcd_init(hcd_to_ohci(hcd));
--
--      ret = usb_add_hcd(hcd, irq, 0);
--      if (ret)
--              goto err_stop_hcd;
--
--      return 0;
--
--err_stop_hcd:
--      iounmap(hcd->regs);
--err_release_region:
--      release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
--err_put_hcd:
--      usb_put_hcd(hcd);
--      return ret;
--}
--
--static int ohci_ath79_remove(struct platform_device *pdev)
--{
--      struct usb_hcd *hcd = platform_get_drvdata(pdev);
--
--      usb_remove_hcd(hcd);
--      iounmap(hcd->regs);
--      release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
--      usb_put_hcd(hcd);
--
--      return 0;
--}
--
--static struct platform_driver ohci_hcd_ath79_driver = {
--      .probe          = ohci_ath79_probe,
--      .remove         = ohci_ath79_remove,
--      .shutdown       = usb_hcd_platform_shutdown,
--      .driver         = {
--              .name   = "ath79-ohci",
--              .owner  = THIS_MODULE,
--      },
--};
--
--MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ohci");
---- a/drivers/usb/host/ohci-hcd.c
-+++ b/drivers/usb/host/ohci-hcd.c
-@@ -1111,11 +1111,6 @@ MODULE_LICENSE ("GPL");
- #define PLATFORM_DRIVER               ohci_hcd_cns3xxx_driver
- #endif
--#ifdef CONFIG_USB_OHCI_ATH79
--#include "ohci-ath79.c"
--#define PLATFORM_DRIVER               ohci_hcd_ath79_driver
--#endif
--
- #ifdef CONFIG_CPU_XLR
- #include "ohci-xls.c"
- #define PLATFORM_DRIVER               ohci_xls_driver
diff --git a/target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch b/target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch
deleted file mode 100644 (file)
index 6062c89..0000000
+++ /dev/null
@@ -1,150 +0,0 @@
-From 9d9c0d49315520754660c8df3f42d93ecf7dba7a Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:21 +0100
-Subject: [PATCH 05/47] MIPS: ath79: separate common PCI code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
-are common functions and only instance one of them
-can be present in a single kernel.
-
-Currently these functions can be built only if the
-CONFIG_SOC_AR724X option is selected. However the
-ath79 platform contain support for the AR71XX SoCs,.
-The AR71XX SoCs have a differnet PCI controller,
-and those will require a different code.
-
-Move the common PCI code into a separeate file in
-order to be able to use that with other SoCs as
-well.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: René Bolldorf <xsecute@googlemail.com>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3485/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Makefile    |    1 +
- arch/mips/ath79/pci.c       |   46 +++++++++++++++++++++++++++++++++++++++++++
- arch/mips/pci/pci-ath724x.c |   34 -------------------------------
- 3 files changed, 47 insertions(+), 34 deletions(-)
- create mode 100644 arch/mips/ath79/pci.c
-
---- a/arch/mips/ath79/Makefile
-+++ b/arch/mips/ath79/Makefile
-@@ -11,6 +11,7 @@
- obj-y := prom.o setup.o irq.o common.o clock.o gpio.o
- obj-$(CONFIG_EARLY_PRINTK)            += early_printk.o
-+obj-$(CONFIG_PCI)                     += pci.o
- #
- # Devices
---- /dev/null
-+++ b/arch/mips/ath79/pci.c
-@@ -0,0 +1,46 @@
-+/*
-+ *  Atheros AR71XX/AR724X specific PCI setup code
-+ *
-+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/pci.h>
-+#include <asm/mach-ath79/pci-ath724x.h>
-+
-+static struct ath724x_pci_data *pci_data;
-+static int pci_data_size;
-+
-+void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
-+{
-+      pci_data        = data;
-+      pci_data_size   = size;
-+}
-+
-+int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
-+{
-+      unsigned int devfn = dev->devfn;
-+      int irq = -1;
-+
-+      if (devfn > pci_data_size - 1)
-+              return irq;
-+
-+      irq = pci_data[devfn].irq;
-+
-+      return irq;
-+}
-+
-+int pcibios_plat_dev_init(struct pci_dev *dev)
-+{
-+      unsigned int devfn = dev->devfn;
-+
-+      if (devfn > pci_data_size - 1)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+      dev->dev.platform_data = pci_data[devfn].pdata;
-+
-+      return PCIBIOS_SUCCESSFUL;
-+}
---- a/arch/mips/pci/pci-ath724x.c
-+++ b/arch/mips/pci/pci-ath724x.c
-@@ -9,7 +9,6 @@
-  */
- #include <linux/pci.h>
--#include <asm/mach-ath79/pci-ath724x.h>
- #define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
- #define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
-@@ -19,8 +18,6 @@
- #define ATH724X_PCI_MEM_SIZE  0x08000000
- static DEFINE_SPINLOCK(ath724x_pci_lock);
--static struct ath724x_pci_data *pci_data;
--static int pci_data_size;
- static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
-@@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci
-       .mem_resource   = &ath724x_mem_resource,
- };
--void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
--{
--      pci_data        = data;
--      pci_data_size   = size;
--}
--
--int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
--{
--      unsigned int devfn = dev->devfn;
--      int irq = -1;
--
--      if (devfn > pci_data_size - 1)
--              return irq;
--
--      irq = pci_data[devfn].irq;
--
--      return irq;
--}
--
--int pcibios_plat_dev_init(struct pci_dev *dev)
--{
--      unsigned int devfn = dev->devfn;
--
--      if (devfn > pci_data_size - 1)
--              return PCIBIOS_DEVICE_NOT_FOUND;
--
--      dev->dev.platform_data = pci_data[devfn].pdata;
--
--      return PCIBIOS_SUCCESSFUL;
--}
--
- static int __init ath724x_pcibios_init(void)
- {
-       register_pci_controller(&ath724x_pci_controller);
diff --git a/target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch b/target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch
deleted file mode 100644 (file)
index f28f20c..0000000
+++ /dev/null
@@ -1,102 +0,0 @@
-From 293dcf4142717d8059540bd69d1517c442617569 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:22 +0100
-Subject: [PATCH 06/47] MIPS: ath79: rename pci-ath724x.h
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The declared function in this header file is used by the
-ath79 platform code only. Move the header to the platform
-directory.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: René Bolldorf <xsecute@googlemail.com>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3486/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c                 |    2 +-
- arch/mips/ath79/pci.c                          |    2 +-
- arch/mips/ath79/pci.h                          |   21 +++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/pci-ath724x.h |   21 ---------------------
- 4 files changed, 23 insertions(+), 23 deletions(-)
- create mode 100644 arch/mips/ath79/pci.h
- delete mode 100644 arch/mips/include/asm/mach-ath79/pci-ath724x.h
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -15,13 +15,13 @@
- #ifdef CONFIG_PCI
- #include <linux/ath9k_platform.h>
--#include <asm/mach-ath79/pci-ath724x.h>
- #endif /* CONFIG_PCI */
- #include "machtypes.h"
- #include "dev-gpio-buttons.h"
- #include "dev-leds-gpio.h"
- #include "dev-spi.h"
-+#include "pci.h"
- #define UBNT_XM_GPIO_LED_L1           0
- #define UBNT_XM_GPIO_LED_L2           1
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -9,7 +9,7 @@
-  */
- #include <linux/pci.h>
--#include <asm/mach-ath79/pci-ath724x.h>
-+#include "pci.h"
- static struct ath724x_pci_data *pci_data;
- static int pci_data_size;
---- /dev/null
-+++ b/arch/mips/ath79/pci.h
-@@ -0,0 +1,21 @@
-+/*
-+ *  Atheros 724x PCI support
-+ *
-+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
-+#define __ASM_MACH_ATH79_PCI_ATH724X_H
-+
-+struct ath724x_pci_data {
-+      int irq;
-+      void *pdata;
-+};
-+
-+void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
-+
-+#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
---- a/arch/mips/include/asm/mach-ath79/pci-ath724x.h
-+++ /dev/null
-@@ -1,21 +0,0 @@
--/*
-- *  Atheros 724x PCI support
-- *
-- *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-- *
-- *  This program is free software; you can redistribute it and/or modify it
-- *  under the terms of the GNU General Public License version 2 as published
-- *  by the Free Software Foundation.
-- */
--
--#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
--#define __ASM_MACH_ATH79_PCI_ATH724X_H
--
--struct ath724x_pci_data {
--      int irq;
--      void *pdata;
--};
--
--void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
--
--#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
diff --git a/target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch b/target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch
deleted file mode 100644 (file)
index 9696a75..0000000
+++ /dev/null
@@ -1,61 +0,0 @@
-From a9e38566ebe755219db10fa155fa8f0f4efc20d9 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:23 +0100
-Subject: [PATCH 07/47] MIPS: ath79: make ath724x_pcibios_init visible for external code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: René Bolldorf <xsecute@googlemail.com>
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3487/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/include/asm/mach-ath79/pci.h |   20 ++++++++++++++++++++
- arch/mips/pci/pci-ath724x.c            |    3 ++-
- 2 files changed, 22 insertions(+), 1 deletions(-)
- create mode 100644 arch/mips/include/asm/mach-ath79/pci.h
-
---- /dev/null
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -0,0 +1,20 @@
-+/*
-+ *  Atheros 724x PCI support
-+ *
-+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef __ASM_MACH_ATH79_PCI_H
-+#define __ASM_MACH_ATH79_PCI_H
-+
-+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
-+int ath724x_pcibios_init(void);
-+#else
-+static inline int ath724x_pcibios_init(void) { return 0; }
-+#endif
-+
-+#endif /* __ASM_MACH_ATH79_PCI_H */
---- a/arch/mips/pci/pci-ath724x.c
-+++ b/arch/mips/pci/pci-ath724x.c
-@@ -9,6 +9,7 @@
-  */
- #include <linux/pci.h>
-+#include <asm/mach-ath79/pci.h>
- #define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
- #define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
-@@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci
-       .mem_resource   = &ath724x_mem_resource,
- };
--static int __init ath724x_pcibios_init(void)
-+int __init ath724x_pcibios_init(void)
- {
-       register_pci_controller(&ath724x_pci_controller);
diff --git a/target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch b/target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch
deleted file mode 100644 (file)
index 34587b6..0000000
+++ /dev/null
@@ -1,78 +0,0 @@
-From e3edaac2e967f07ae3b726e64e1c290233361bc7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:24 +0100
-Subject: [PATCH 08/47] MIPS: ath79: add a common PCI registration function
-
-The current code unconditionally registers the AR724X
-specific PCI controller, even if the kernel is running
-on a different SoC.
-
-Add a common function for PCI controller registration,
-and only register the AR724X PCI controller if the kernel
-is running on an AR724X SoC.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3488/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c |    1 +
- arch/mips/ath79/pci.c          |   10 ++++++++++
- arch/mips/ath79/pci.h          |    6 ++++++
- arch/mips/pci/pci-ath724x.c    |    2 --
- 4 files changed, 17 insertions(+), 2 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -111,6 +111,7 @@ static void __init ubnt_xm_init(void)
-       ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
- #endif /* CONFIG_PCI */
-+      ath79_register_pci();
- }
- MIPS_MACHINE(ATH79_MACH_UBNT_XM,
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -9,6 +9,8 @@
-  */
- #include <linux/pci.h>
-+#include <asm/mach-ath79/ath79.h>
-+#include <asm/mach-ath79/pci.h>
- #include "pci.h"
- static struct ath724x_pci_data *pci_data;
-@@ -44,3 +46,11 @@ int pcibios_plat_dev_init(struct pci_dev
-       return PCIBIOS_SUCCESSFUL;
- }
-+
-+int __init ath79_register_pci(void)
-+{
-+      if (soc_is_ar724x())
-+              return ath724x_pcibios_init();
-+
-+      return -ENODEV;
-+}
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -18,4 +18,10 @@ struct ath724x_pci_data {
- void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
-+#ifdef CONFIG_PCI
-+int ath79_register_pci(void);
-+#else
-+static inline int ath79_register_pci(void) { return 0; }
-+#endif
-+
- #endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
---- a/arch/mips/pci/pci-ath724x.c
-+++ b/arch/mips/pci/pci-ath724x.c
-@@ -137,5 +137,3 @@ int __init ath724x_pcibios_init(void)
-       return PCIBIOS_SUCCESSFUL;
- }
--
--arch_initcall(ath724x_pcibios_init);
diff --git a/target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch b/target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch
deleted file mode 100644 (file)
index e718928..0000000
+++ /dev/null
@@ -1,316 +0,0 @@
-From 36dfdaa097ee1b12139187dc89cfa23fbb92b53b Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:25 +0100
-Subject: [PATCH 09/47] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: René Bolldorf <xsecute@googlemail.com>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3489/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/pci/Makefile      |    2 +-
- arch/mips/pci/pci-ar724x.c  |  139 +++++++++++++++++++++++++++++++++++++++++++
- arch/mips/pci/pci-ath724x.c |  139 -------------------------------------------
- 3 files changed, 140 insertions(+), 140 deletions(-)
- create mode 100644 arch/mips/pci/pci-ar724x.c
- delete mode 100644 arch/mips/pci/pci-ath724x.c
-
---- a/arch/mips/pci/Makefile
-+++ b/arch/mips/pci/Makefile
-@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM47XX)                += pci-bcm47xx.o
- obj-$(CONFIG_BCM63XX)         += pci-bcm63xx.o fixup-bcm63xx.o \
-                                       ops-bcm63xx.o
- obj-$(CONFIG_MIPS_ALCHEMY)    += pci-alchemy.o
--obj-$(CONFIG_SOC_AR724X)      += pci-ath724x.o
-+obj-$(CONFIG_SOC_AR724X)      += pci-ar724x.o
- #
- # These are still pretty much in the old state, watch, go blind.
---- /dev/null
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -0,0 +1,139 @@
-+/*
-+ *  Atheros 724x PCI support
-+ *
-+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/pci.h>
-+#include <asm/mach-ath79/pci.h>
-+
-+#define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
-+#define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
-+
-+#define ATH724X_PCI_DEV_BASE  0x14000000
-+#define ATH724X_PCI_MEM_BASE  0x10000000
-+#define ATH724X_PCI_MEM_SIZE  0x08000000
-+
-+static DEFINE_SPINLOCK(ath724x_pci_lock);
-+
-+static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-+                          int size, uint32_t *value)
-+{
-+      unsigned long flags, addr, tval, mask;
-+
-+      if (devfn)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+      if (where & (size - 1))
-+              return PCIBIOS_BAD_REGISTER_NUMBER;
-+
-+      spin_lock_irqsave(&ath724x_pci_lock, flags);
-+
-+      switch (size) {
-+      case 1:
-+              addr = where & ~3;
-+              mask = 0xff000000 >> ((where % 4) * 8);
-+              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
-+              tval = tval & ~mask;
-+              *value = (tval >> ((4 - (where % 4))*8));
-+              break;
-+      case 2:
-+              addr = where & ~3;
-+              mask = 0xffff0000 >> ((where % 4)*8);
-+              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
-+              tval = tval & ~mask;
-+              *value = (tval >> ((4 - (where % 4))*8));
-+              break;
-+      case 4:
-+              *value = reg_read(ATH724X_PCI_DEV_BASE + where);
-+              break;
-+      default:
-+              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+
-+              return PCIBIOS_BAD_REGISTER_NUMBER;
-+      }
-+
-+      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+
-+      return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
-+                           int size, uint32_t value)
-+{
-+      unsigned long flags, tval, addr, mask;
-+
-+      if (devfn)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+      if (where & (size - 1))
-+              return PCIBIOS_BAD_REGISTER_NUMBER;
-+
-+      spin_lock_irqsave(&ath724x_pci_lock, flags);
-+
-+      switch (size) {
-+      case 1:
-+              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
-+              mask = 0xff000000 >> ((where % 4)*8);
-+              tval = reg_read(addr);
-+              tval = tval & ~mask;
-+              tval |= (value << ((4 - (where % 4))*8)) & mask;
-+              reg_write(addr, tval);
-+              break;
-+      case 2:
-+              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
-+              mask = 0xffff0000 >> ((where % 4)*8);
-+              tval = reg_read(addr);
-+              tval = tval & ~mask;
-+              tval |= (value << ((4 - (where % 4))*8)) & mask;
-+              reg_write(addr, tval);
-+              break;
-+      case 4:
-+              reg_write((ATH724X_PCI_DEV_BASE + where), value);
-+              break;
-+      default:
-+              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+
-+              return PCIBIOS_BAD_REGISTER_NUMBER;
-+      }
-+
-+      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+
-+      return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static struct pci_ops ath724x_pci_ops = {
-+      .read   = ath724x_pci_read,
-+      .write  = ath724x_pci_write,
-+};
-+
-+static struct resource ath724x_io_resource = {
-+      .name   = "PCI IO space",
-+      .start  = 0,
-+      .end    = 0,
-+      .flags  = IORESOURCE_IO,
-+};
-+
-+static struct resource ath724x_mem_resource = {
-+      .name   = "PCI memory space",
-+      .start  = ATH724X_PCI_MEM_BASE,
-+      .end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
-+      .flags  = IORESOURCE_MEM,
-+};
-+
-+static struct pci_controller ath724x_pci_controller = {
-+      .pci_ops        = &ath724x_pci_ops,
-+      .io_resource    = &ath724x_io_resource,
-+      .mem_resource   = &ath724x_mem_resource,
-+};
-+
-+int __init ath724x_pcibios_init(void)
-+{
-+      register_pci_controller(&ath724x_pci_controller);
-+
-+      return PCIBIOS_SUCCESSFUL;
-+}
---- a/arch/mips/pci/pci-ath724x.c
-+++ /dev/null
-@@ -1,139 +0,0 @@
--/*
-- *  Atheros 724x PCI support
-- *
-- *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-- *
-- *  This program is free software; you can redistribute it and/or modify it
-- *  under the terms of the GNU General Public License version 2 as published
-- *  by the Free Software Foundation.
-- */
--
--#include <linux/pci.h>
--#include <asm/mach-ath79/pci.h>
--
--#define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
--#define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
--
--#define ATH724X_PCI_DEV_BASE  0x14000000
--#define ATH724X_PCI_MEM_BASE  0x10000000
--#define ATH724X_PCI_MEM_SIZE  0x08000000
--
--static DEFINE_SPINLOCK(ath724x_pci_lock);
--
--static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
--                          int size, uint32_t *value)
--{
--      unsigned long flags, addr, tval, mask;
--
--      if (devfn)
--              return PCIBIOS_DEVICE_NOT_FOUND;
--
--      if (where & (size - 1))
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--
--      spin_lock_irqsave(&ath724x_pci_lock, flags);
--
--      switch (size) {
--      case 1:
--              addr = where & ~3;
--              mask = 0xff000000 >> ((where % 4) * 8);
--              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
--              tval = tval & ~mask;
--              *value = (tval >> ((4 - (where % 4))*8));
--              break;
--      case 2:
--              addr = where & ~3;
--              mask = 0xffff0000 >> ((where % 4)*8);
--              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
--              tval = tval & ~mask;
--              *value = (tval >> ((4 - (where % 4))*8));
--              break;
--      case 4:
--              *value = reg_read(ATH724X_PCI_DEV_BASE + where);
--              break;
--      default:
--              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
--
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--      }
--
--      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
--
--      return PCIBIOS_SUCCESSFUL;
--}
--
--static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
--                           int size, uint32_t value)
--{
--      unsigned long flags, tval, addr, mask;
--
--      if (devfn)
--              return PCIBIOS_DEVICE_NOT_FOUND;
--
--      if (where & (size - 1))
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--
--      spin_lock_irqsave(&ath724x_pci_lock, flags);
--
--      switch (size) {
--      case 1:
--              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
--              mask = 0xff000000 >> ((where % 4)*8);
--              tval = reg_read(addr);
--              tval = tval & ~mask;
--              tval |= (value << ((4 - (where % 4))*8)) & mask;
--              reg_write(addr, tval);
--              break;
--      case 2:
--              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
--              mask = 0xffff0000 >> ((where % 4)*8);
--              tval = reg_read(addr);
--              tval = tval & ~mask;
--              tval |= (value << ((4 - (where % 4))*8)) & mask;
--              reg_write(addr, tval);
--              break;
--      case 4:
--              reg_write((ATH724X_PCI_DEV_BASE + where), value);
--              break;
--      default:
--              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
--
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--      }
--
--      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
--
--      return PCIBIOS_SUCCESSFUL;
--}
--
--static struct pci_ops ath724x_pci_ops = {
--      .read   = ath724x_pci_read,
--      .write  = ath724x_pci_write,
--};
--
--static struct resource ath724x_io_resource = {
--      .name   = "PCI IO space",
--      .start  = 0,
--      .end    = 0,
--      .flags  = IORESOURCE_IO,
--};
--
--static struct resource ath724x_mem_resource = {
--      .name   = "PCI memory space",
--      .start  = ATH724X_PCI_MEM_BASE,
--      .end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
--      .flags  = IORESOURCE_MEM,
--};
--
--static struct pci_controller ath724x_pci_controller = {
--      .pci_ops        = &ath724x_pci_ops,
--      .io_resource    = &ath724x_io_resource,
--      .mem_resource   = &ath724x_mem_resource,
--};
--
--int __init ath724x_pcibios_init(void)
--{
--      register_pci_controller(&ath724x_pci_controller);
--
--      return PCIBIOS_SUCCESSFUL;
--}
diff --git a/target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch b/target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch
deleted file mode 100644 (file)
index 0a224ed..0000000
+++ /dev/null
@@ -1,264 +0,0 @@
-From 9f0c37b1d071355d4c027958f370823c8f891480 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:26 +0100
-Subject: [PATCH 10/47] MIPS: ath79: replace ath724x to ar724x
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Replace the 'ath724x' to 'ar724x' in function, variable and
-structure names to reflect the name of the real SoC.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: René Bolldorf <xsecute@googlemail.com>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3490/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c         |    4 +-
- arch/mips/ath79/pci.c                  |    6 ++--
- arch/mips/ath79/pci.h                  |   10 +++---
- arch/mips/include/asm/mach-ath79/pci.h |    4 +-
- arch/mips/pci/pci-ar724x.c             |   62 ++++++++++++++++----------------
- 5 files changed, 43 insertions(+), 43 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ub
- #ifdef CONFIG_PCI
- static struct ath9k_platform_data ubnt_xm_eeprom_data;
--static struct ath724x_pci_data ubnt_xm_pci_data[] = {
-+static struct ar724x_pci_data ubnt_xm_pci_data[] = {
-       {
-               .irq    = UBNT_XM_PCI_IRQ,
-               .pdata  = &ubnt_xm_eeprom_data,
-@@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
-       memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
-              sizeof(ubnt_xm_eeprom_data.eeprom_data));
--      ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
-+      ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
- #endif /* CONFIG_PCI */
-       ath79_register_pci();
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -13,10 +13,10 @@
- #include <asm/mach-ath79/pci.h>
- #include "pci.h"
--static struct ath724x_pci_data *pci_data;
-+static struct ar724x_pci_data *pci_data;
- static int pci_data_size;
--void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
-+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
- {
-       pci_data        = data;
-       pci_data_size   = size;
-@@ -50,7 +50,7 @@ int pcibios_plat_dev_init(struct pci_dev
- int __init ath79_register_pci(void)
- {
-       if (soc_is_ar724x())
--              return ath724x_pcibios_init();
-+              return ar724x_pcibios_init();
-       return -ENODEV;
- }
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -8,15 +8,15 @@
-  *  by the Free Software Foundation.
-  */
--#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
--#define __ASM_MACH_ATH79_PCI_ATH724X_H
-+#ifndef _ATH79_PCI_H
-+#define _ATH79_PCI_H
--struct ath724x_pci_data {
-+struct ar724x_pci_data {
-       int irq;
-       void *pdata;
- };
--void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
-+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
- #ifdef CONFIG_PCI
- int ath79_register_pci(void);
-@@ -24,4 +24,4 @@ int ath79_register_pci(void);
- static inline int ath79_register_pci(void) { return 0; }
- #endif
--#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
-+#endif /* _ATH79_PCI_H */
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -12,9 +12,9 @@
- #define __ASM_MACH_ATH79_PCI_H
- #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
--int ath724x_pcibios_init(void);
-+int ar724x_pcibios_init(void);
- #else
--static inline int ath724x_pcibios_init(void) { return 0; }
-+static inline int ar724x_pcibios_init(void) { return 0; }
- #endif
- #endif /* __ASM_MACH_ATH79_PCI_H */
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -14,13 +14,13 @@
- #define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
- #define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
--#define ATH724X_PCI_DEV_BASE  0x14000000
--#define ATH724X_PCI_MEM_BASE  0x10000000
--#define ATH724X_PCI_MEM_SIZE  0x08000000
-+#define AR724X_PCI_DEV_BASE   0x14000000
-+#define AR724X_PCI_MEM_BASE   0x10000000
-+#define AR724X_PCI_MEM_SIZE   0x08000000
--static DEFINE_SPINLOCK(ath724x_pci_lock);
-+static DEFINE_SPINLOCK(ar724x_pci_lock);
--static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
-       unsigned long flags, addr, tval, mask;
-@@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_b
-       if (where & (size - 1))
-               return PCIBIOS_BAD_REGISTER_NUMBER;
--      spin_lock_irqsave(&ath724x_pci_lock, flags);
-+      spin_lock_irqsave(&ar724x_pci_lock, flags);
-       switch (size) {
-       case 1:
-               addr = where & ~3;
-               mask = 0xff000000 >> ((where % 4) * 8);
--              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
-+              tval = reg_read(AR724X_PCI_DEV_BASE + addr);
-               tval = tval & ~mask;
-               *value = (tval >> ((4 - (where % 4))*8));
-               break;
-       case 2:
-               addr = where & ~3;
-               mask = 0xffff0000 >> ((where % 4)*8);
--              tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
-+              tval = reg_read(AR724X_PCI_DEV_BASE + addr);
-               tval = tval & ~mask;
-               *value = (tval >> ((4 - (where % 4))*8));
-               break;
-       case 4:
--              *value = reg_read(ATH724X_PCI_DEV_BASE + where);
-+              *value = reg_read(AR724X_PCI_DEV_BASE + where);
-               break;
-       default:
--              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+              spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-       }
--      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+      spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-       return PCIBIOS_SUCCESSFUL;
- }
--static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
-+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
-                            int size, uint32_t value)
- {
-       unsigned long flags, tval, addr, mask;
-@@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_
-       if (where & (size - 1))
-               return PCIBIOS_BAD_REGISTER_NUMBER;
--      spin_lock_irqsave(&ath724x_pci_lock, flags);
-+      spin_lock_irqsave(&ar724x_pci_lock, flags);
-       switch (size) {
-       case 1:
--              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
-+              addr = (AR724X_PCI_DEV_BASE + where) & ~3;
-               mask = 0xff000000 >> ((where % 4)*8);
-               tval = reg_read(addr);
-               tval = tval & ~mask;
-@@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_
-               reg_write(addr, tval);
-               break;
-       case 2:
--              addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
-+              addr = (AR724X_PCI_DEV_BASE + where) & ~3;
-               mask = 0xffff0000 >> ((where % 4)*8);
-               tval = reg_read(addr);
-               tval = tval & ~mask;
-@@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_
-               reg_write(addr, tval);
-               break;
-       case 4:
--              reg_write((ATH724X_PCI_DEV_BASE + where), value);
-+              reg_write((AR724X_PCI_DEV_BASE + where), value);
-               break;
-       default:
--              spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+              spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-       }
--      spin_unlock_irqrestore(&ath724x_pci_lock, flags);
-+      spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-       return PCIBIOS_SUCCESSFUL;
- }
--static struct pci_ops ath724x_pci_ops = {
--      .read   = ath724x_pci_read,
--      .write  = ath724x_pci_write,
-+static struct pci_ops ar724x_pci_ops = {
-+      .read   = ar724x_pci_read,
-+      .write  = ar724x_pci_write,
- };
--static struct resource ath724x_io_resource = {
-+static struct resource ar724x_io_resource = {
-       .name   = "PCI IO space",
-       .start  = 0,
-       .end    = 0,
-       .flags  = IORESOURCE_IO,
- };
--static struct resource ath724x_mem_resource = {
-+static struct resource ar724x_mem_resource = {
-       .name   = "PCI memory space",
--      .start  = ATH724X_PCI_MEM_BASE,
--      .end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
-+      .start  = AR724X_PCI_MEM_BASE,
-+      .end    = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
-       .flags  = IORESOURCE_MEM,
- };
--static struct pci_controller ath724x_pci_controller = {
--      .pci_ops        = &ath724x_pci_ops,
--      .io_resource    = &ath724x_io_resource,
--      .mem_resource   = &ath724x_mem_resource,
-+static struct pci_controller ar724x_pci_controller = {
-+      .pci_ops        = &ar724x_pci_ops,
-+      .io_resource    = &ar724x_io_resource,
-+      .mem_resource   = &ar724x_mem_resource,
- };
--int __init ath724x_pcibios_init(void)
-+int __init ar724x_pcibios_init(void)
- {
--      register_pci_controller(&ath724x_pci_controller);
-+      register_pci_controller(&ar724x_pci_controller);
-       return PCIBIOS_SUCCESSFUL;
- }
diff --git a/target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch b/target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch
deleted file mode 100644 (file)
index 108ac10..0000000
+++ /dev/null
@@ -1,131 +0,0 @@
-From 0f5728e7e6fa7f0969ec79bd623261d3d830e5e7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:29:27 +0100
-Subject: [PATCH 11/47] MIPS: ath79: use io-accessor macros in pci-ar724x.c
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: René Bolldorf <xsecute@googlemail.com>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3491/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/pci/pci-ar724x.c |   38 ++++++++++++++++++++++++--------------
- 1 files changed, 24 insertions(+), 14 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -11,19 +11,19 @@
- #include <linux/pci.h>
- #include <asm/mach-ath79/pci.h>
--#define reg_read(_phys)               (*(unsigned int *) KSEG1ADDR(_phys))
--#define reg_write(_phys, _val)        ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
--
--#define AR724X_PCI_DEV_BASE   0x14000000
-+#define AR724X_PCI_CFG_BASE   0x14000000
-+#define AR724X_PCI_CFG_SIZE   0x1000
- #define AR724X_PCI_MEM_BASE   0x10000000
- #define AR724X_PCI_MEM_SIZE   0x08000000
- static DEFINE_SPINLOCK(ar724x_pci_lock);
-+static void __iomem *ar724x_pci_devcfg_base;
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
-       unsigned long flags, addr, tval, mask;
-+      void __iomem *base;
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bu
-       if (where & (size - 1))
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-+      base = ar724x_pci_devcfg_base;
-+
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
-       switch (size) {
-       case 1:
-               addr = where & ~3;
-               mask = 0xff000000 >> ((where % 4) * 8);
--              tval = reg_read(AR724X_PCI_DEV_BASE + addr);
-+              tval = __raw_readl(base + addr);
-               tval = tval & ~mask;
-               *value = (tval >> ((4 - (where % 4))*8));
-               break;
-       case 2:
-               addr = where & ~3;
-               mask = 0xffff0000 >> ((where % 4)*8);
--              tval = reg_read(AR724X_PCI_DEV_BASE + addr);
-+              tval = __raw_readl(base + addr);
-               tval = tval & ~mask;
-               *value = (tval >> ((4 - (where % 4))*8));
-               break;
-       case 4:
--              *value = reg_read(AR724X_PCI_DEV_BASE + where);
-+              *value = __raw_readl(base + where);
-               break;
-       default:
-               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_b
-                            int size, uint32_t value)
- {
-       unsigned long flags, tval, addr, mask;
-+      void __iomem *base;
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_b
-       if (where & (size - 1))
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-+      base = ar724x_pci_devcfg_base;
-+
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
-       switch (size) {
-       case 1:
--              addr = (AR724X_PCI_DEV_BASE + where) & ~3;
-+              addr = where & ~3;
-               mask = 0xff000000 >> ((where % 4)*8);
--              tval = reg_read(addr);
-+              tval = __raw_readl(base + addr);
-               tval = tval & ~mask;
-               tval |= (value << ((4 - (where % 4))*8)) & mask;
--              reg_write(addr, tval);
-+              __raw_writel(tval, base + addr);
-               break;
-       case 2:
--              addr = (AR724X_PCI_DEV_BASE + where) & ~3;
-+              addr = where & ~3;
-               mask = 0xffff0000 >> ((where % 4)*8);
--              tval = reg_read(addr);
-+              tval = __raw_readl(base + addr);
-               tval = tval & ~mask;
-               tval |= (value << ((4 - (where % 4))*8)) & mask;
--              reg_write(addr, tval);
-+              __raw_writel(tval, base + addr);
-               break;
-       case 4:
--              reg_write((AR724X_PCI_DEV_BASE + where), value);
-+              __raw_writel(value, (base + where));
-               break;
-       default:
-               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_
- int __init ar724x_pcibios_init(void)
- {
-+      ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
-+                                       AR724X_PCI_CFG_SIZE);
-+      if (ar724x_pci_devcfg_base == NULL)
-+              return -ENOMEM;
-+
-       register_pci_controller(&ar724x_pci_controller);
-       return PCIBIOS_SUCCESSFUL;
diff --git a/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch b/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch
deleted file mode 100644 (file)
index 9ce1c39..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-From e9889bee75d03338daf7ed422661ae28f3aa7063 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:03 +0100
-Subject: [PATCH 12/47] MIPS: ath79: remove superfluous alignment checks from pci-ar724x.c
-
-The alignment of the 'where' parameters are checked
-in the core PCI code already.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3492/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/pci/pci-ar724x.c |    6 ------
- 1 files changed, 0 insertions(+), 6 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -28,9 +28,6 @@ static int ar724x_pci_read(struct pci_bu
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
--      if (where & (size - 1))
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--
-       base = ar724x_pci_devcfg_base;
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
-@@ -73,9 +70,6 @@ static int ar724x_pci_write(struct pci_b
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
--      if (where & (size - 1))
--              return PCIBIOS_BAD_REGISTER_NUMBER;
--
-       base = ar724x_pci_devcfg_base;
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
diff --git a/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch b/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch
deleted file mode 100644 (file)
index 97db6de..0000000
+++ /dev/null
@@ -1,134 +0,0 @@
-From 39f3275077a5b143616fcb3e7a6457a5c42739ee Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:04 +0100
-Subject: [PATCH 13/47] MIPS: ath79: fix broken ar724x_pci_{read,write} functions
-
-The current ar724x_pci_{read,write} functions are
-broken. Due to that, pci_read_config_byte returns
-with bogus values, and pci_write_config_{byte,word}
-unconditionally clears the accessed PCI configuration
-registers instead of changing the value of them.
-
-The patch fixes the broken functions, thus the PCI
-configuration space can be accessed correctly.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3493/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/pci/pci-ar724x.c |   52 ++++++++++++++++++++++----------------------
- 1 files changed, 26 insertions(+), 26 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -22,8 +22,9 @@ static void __iomem *ar724x_pci_devcfg_b
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
--      unsigned long flags, addr, tval, mask;
-+      unsigned long flags;
-       void __iomem *base;
-+      u32 data;
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -31,24 +32,22 @@ static int ar724x_pci_read(struct pci_bu
-       base = ar724x_pci_devcfg_base;
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
-+      data = __raw_readl(base + (where & ~3));
-       switch (size) {
-       case 1:
--              addr = where & ~3;
--              mask = 0xff000000 >> ((where % 4) * 8);
--              tval = __raw_readl(base + addr);
--              tval = tval & ~mask;
--              *value = (tval >> ((4 - (where % 4))*8));
-+              if (where & 1)
-+                      data >>= 8;
-+              if (where & 2)
-+                      data >>= 16;
-+              data &= 0xff;
-               break;
-       case 2:
--              addr = where & ~3;
--              mask = 0xffff0000 >> ((where % 4)*8);
--              tval = __raw_readl(base + addr);
--              tval = tval & ~mask;
--              *value = (tval >> ((4 - (where % 4))*8));
-+              if (where & 2)
-+                      data >>= 16;
-+              data &= 0xffff;
-               break;
-       case 4:
--              *value = __raw_readl(base + where);
-               break;
-       default:
-               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-@@ -57,6 +56,7 @@ static int ar724x_pci_read(struct pci_bu
-       }
-       spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-+      *value = data;
-       return PCIBIOS_SUCCESSFUL;
- }
-@@ -64,8 +64,10 @@ static int ar724x_pci_read(struct pci_bu
- static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
-                            int size, uint32_t value)
- {
--      unsigned long flags, tval, addr, mask;
-+      unsigned long flags;
-       void __iomem *base;
-+      u32 data;
-+      int s;
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -73,26 +75,21 @@ static int ar724x_pci_write(struct pci_b
-       base = ar724x_pci_devcfg_base;
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
-+      data = __raw_readl(base + (where & ~3));
-       switch (size) {
-       case 1:
--              addr = where & ~3;
--              mask = 0xff000000 >> ((where % 4)*8);
--              tval = __raw_readl(base + addr);
--              tval = tval & ~mask;
--              tval |= (value << ((4 - (where % 4))*8)) & mask;
--              __raw_writel(tval, base + addr);
-+              s = ((where & 3) * 8);
-+              data &= ~(0xff << s);
-+              data |= ((value & 0xff) << s);
-               break;
-       case 2:
--              addr = where & ~3;
--              mask = 0xffff0000 >> ((where % 4)*8);
--              tval = __raw_readl(base + addr);
--              tval = tval & ~mask;
--              tval |= (value << ((4 - (where % 4))*8)) & mask;
--              __raw_writel(tval, base + addr);
-+              s = ((where & 2) * 8);
-+              data &= ~(0xffff << s);
-+              data |= ((value & 0xffff) << s);
-               break;
-       case 4:
--              __raw_writel(value, (base + where));
-+              data = value;
-               break;
-       default:
-               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-@@ -100,6 +97,9 @@ static int ar724x_pci_write(struct pci_b
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-       }
-+      __raw_writel(data, base + (where & ~3));
-+      /* flush write */
-+      __raw_readl(base + (where & ~3));
-       spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-       return PCIBIOS_SUCCESSFUL;
diff --git a/target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch b/target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch
deleted file mode 100644 (file)
index 8ed823b..0000000
+++ /dev/null
@@ -1,134 +0,0 @@
-From 14eaf9b1cda516b4182e56f61c21fa2eaa9ade6b Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:05 +0100
-Subject: [PATCH 14/47] MIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs
-
-The PCI controller of the AR724X SoCs has a hardware
-bag. If the BAR0 register of the PCI device is set to
-the proper base address, the memory address space of
-the device is not accessible.
-
-When the device driver tries to access the memory
-address space of the PCI device, it leads to data
-bus error, similiar to this:
-
-Data bus error, epc == 801f69a0, ra == 801f698c
-Oops[#1]:
-Cpu 0
-$ 0   : 00000000 00000061 deadbeef 000000ff
-$ 4   : 00000000 000000ff 00000014 00000000
-$ 8   : ff000000 fffffffc 00000000 00000000
-$12   : 000001f5 00000006 00000000 6e637920
-$16   : 81ca4000 81ca0260 81ca4000 804d70f0
-$20   : fffffff4 0000002b 803ad4c4 00000000
-$24   : 00000003 00000000
-$28   : 81c20000 81c21c60 00000000 801f698c
-Hi    : 00000000
-Lo    : 00000000
-epc   : 801f69a0 ath9k_hw_init+0xd0/0xa70
-    Not tainted
-ra    : 801f698c ath9k_hw_init+0xbc/0xa70
-Status: 1000c103    KERNEL EXL IE
-Cause : 1080001c
-PrId  : 00019374 (MIPS 24Kc)
-Modules linked in:
-Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
-Stack : 00000000 00000000 00000000 00000000 81c21c78 81ca0260 00000000 804d70f0
-        81ca0260 81c21cc0 81ca0e80 81ca0260 81ca4000 804d70f0 fffffff4 0000002b
-        803ad4c4 00000000 00000000 801e3ae8 81c9d080 81ca0e80 b0000000 800b9b9c
-        00000008 81c9d000 8031aeb0 802d38a0 00000000 81c14c00 81c14c60 00000000
-        81ca0e80 81ca0260 b0000000 801f08a4 81c9c820 81c21d48 81c9c820 80144320
-        ...
-Call Trace:
-[<801f69a0>] ath9k_hw_init+0xd0/0xa70
-[<801e3ae8>] ath9k_init_device+0x174/0x680
-[<801f08a4>] ath_pci_probe+0x27c/0x380
-[<8019e490>] pci_device_probe+0x74/0x9c
-[<801bfadc>] driver_probe_device+0x9c/0x1b4
-[<801bfcb0>] __driver_attach+0xbc/0xc4
-[<801bea0c>] bus_for_each_dev+0x5c/0x98
-[<801bf394>] bus_add_driver+0x1d0/0x2a4
-[<801c0364>] driver_register+0x8c/0x16c
-[<8019e72c>] __pci_register_driver+0x4c/0xe4
-[<803d3d40>] ath9k_init+0x3c/0x88
-[<80060930>] do_one_initcall+0x3c/0x1cc
-[<803c297c>] kernel_init+0xa4/0x138
-[<80063c04>] kernel_thread_helper+0x10/0x18
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3494/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/pci/pci-ar724x.c |   36 +++++++++++++++++++++++++++++++++++-
- 1 files changed, 35 insertions(+), 1 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -9,6 +9,7 @@
-  */
- #include <linux/pci.h>
-+#include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/pci.h>
- #define AR724X_PCI_CFG_BASE   0x14000000
-@@ -16,9 +17,14 @@
- #define AR724X_PCI_MEM_BASE   0x10000000
- #define AR724X_PCI_MEM_SIZE   0x08000000
-+#define AR7240_BAR0_WAR_VALUE 0xffff
-+
- static DEFINE_SPINLOCK(ar724x_pci_lock);
- static void __iomem *ar724x_pci_devcfg_base;
-+static u32 ar724x_pci_bar0_value;
-+static bool ar724x_pci_bar0_is_cached;
-+
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
-@@ -56,7 +62,14 @@ static int ar724x_pci_read(struct pci_bu
-       }
-       spin_unlock_irqrestore(&ar724x_pci_lock, flags);
--      *value = data;
-+
-+      if (where == PCI_BASE_ADDRESS_0 && size == 4 &&
-+          ar724x_pci_bar0_is_cached) {
-+              /* use the cached value */
-+              *value = ar724x_pci_bar0_value;
-+      } else {
-+              *value = data;
-+      }
-       return PCIBIOS_SUCCESSFUL;
- }
-@@ -72,6 +85,27 @@ static int ar724x_pci_write(struct pci_b
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-+      if (soc_is_ar7240() && where == PCI_BASE_ADDRESS_0 && size == 4) {
-+              if (value != 0xffffffff) {
-+                      /*
-+                       * WAR for a hw issue. If the BAR0 register of the
-+                       * device is set to the proper base address, the
-+                       * memory space of the device is not accessible.
-+                       *
-+                       * Cache the intended value so it can be read back,
-+                       * and write a SoC specific constant value to the
-+                       * BAR0 register in order to make the device memory
-+                       * accessible.
-+                       */
-+                      ar724x_pci_bar0_is_cached = true;
-+                      ar724x_pci_bar0_value = value;
-+
-+                      value = AR7240_BAR0_WAR_VALUE;
-+              } else {
-+                      ar724x_pci_bar0_is_cached = false;
-+              }
-+      }
-+
-       base = ar724x_pci_devcfg_base;
-       spin_lock_irqsave(&ar724x_pci_lock, flags);
diff --git a/target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch b/target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch
deleted file mode 100644 (file)
index 8702e65..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-From d710990df726cceffb62488e597ecfc4a9e13aa5 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:06 +0100
-Subject: [PATCH 15/47] MIPS: ath79: fix a wrong IRQ number
-
-The Ubiquiti XM board setup code uses an invalid
-IRQ number, because it if above of NR_IRQS. This
-leads to failed 'request_irq' calls:
-
-  ath9k 0000:00:00.0: request_irq failed
-  ath9k: probe of 0000:00:00.0 failed with error -22
-
-Preserve some IRQ numbers for the built-in IRQ
-controller of PCI host controllers in the
-AR71XX/AR724X SoCs, and use the correct IRQ
-number in the board setup code.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3495/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c         |    5 +++--
- arch/mips/include/asm/mach-ath79/irq.h |    6 +++++-
- 2 files changed, 8 insertions(+), 3 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -17,6 +17,8 @@
- #include <linux/ath9k_platform.h>
- #endif /* CONFIG_PCI */
-+#include <asm/mach-ath79/irq.h>
-+
- #include "machtypes.h"
- #include "dev-gpio-buttons.h"
- #include "dev-leds-gpio.h"
-@@ -33,7 +35,6 @@
- #define UBNT_XM_KEYS_POLL_INTERVAL    20
- #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL        (3 * UBNT_XM_KEYS_POLL_INTERVAL)
--#define UBNT_XM_PCI_IRQ                       48
- #define UBNT_XM_EEPROM_ADDR           (u8 *) KSEG1ADDR(0x1fff1000)
- static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
-@@ -86,7 +87,7 @@ static struct ath9k_platform_data ubnt_x
- static struct ar724x_pci_data ubnt_xm_pci_data[] = {
-       {
--              .irq    = UBNT_XM_PCI_IRQ,
-+              .irq    = ATH79_PCI_IRQ(0),
-               .pdata  = &ubnt_xm_eeprom_data,
-       },
- };
---- a/arch/mips/include/asm/mach-ath79/irq.h
-+++ b/arch/mips/include/asm/mach-ath79/irq.h
-@@ -10,11 +10,15 @@
- #define __ASM_MACH_ATH79_IRQ_H
- #define MIPS_CPU_IRQ_BASE     0
--#define NR_IRQS                       40
-+#define NR_IRQS                       46
- #define ATH79_MISC_IRQ_BASE   8
- #define ATH79_MISC_IRQ_COUNT  32
-+#define ATH79_PCI_IRQ_BASE    (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
-+#define ATH79_PCI_IRQ_COUNT   6
-+#define ATH79_PCI_IRQ(_x)     (ATH79_PCI_IRQ_BASE + (_x))
-+
- #define ATH79_CPU_IRQ_IP2     (MIPS_CPU_IRQ_BASE + 2)
- #define ATH79_CPU_IRQ_USB     (MIPS_CPU_IRQ_BASE + 3)
- #define ATH79_CPU_IRQ_GE0     (MIPS_CPU_IRQ_BASE + 4)
diff --git a/target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch b/target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch
deleted file mode 100644 (file)
index 0c15a54..0000000
+++ /dev/null
@@ -1,213 +0,0 @@
-From 1fd24b552708544ca6233ff7ba60342e9f7e5582 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:07 +0100
-Subject: [PATCH 16/47] MIPS: ath79: add PCI IRQ handling code for AR724X SoCs
-
-The PCI Host Controller of the AR724x SoC has a
-built-in IRQ controller. The current code does
-not supports that, so the IRQ lines wired to this
-controller are not usable. This leads to failed
-'request_irq' calls:
-
-  ath9k 0000:00:00.0: request_irq failed
-  ath9k: probe of 0000:00:00.0 failed with error -89
-
-This patch adds support for the IRQ controller
-in order to make PCI IRQs work.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc:  linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3496/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/pci.c                  |    3 +-
- arch/mips/include/asm/mach-ath79/pci.h |    4 +-
- arch/mips/pci/pci-ar724x.c             |  118 +++++++++++++++++++++++++++++++-
- 3 files changed, 120 insertions(+), 5 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -10,6 +10,7 @@
- #include <linux/pci.h>
- #include <asm/mach-ath79/ath79.h>
-+#include <asm/mach-ath79/irq.h>
- #include <asm/mach-ath79/pci.h>
- #include "pci.h"
-@@ -50,7 +51,7 @@ int pcibios_plat_dev_init(struct pci_dev
- int __init ath79_register_pci(void)
- {
-       if (soc_is_ar724x())
--              return ar724x_pcibios_init();
-+              return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);
-       return -ENODEV;
- }
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -12,9 +12,9 @@
- #define __ASM_MACH_ATH79_PCI_H
- #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
--int ar724x_pcibios_init(void);
-+int ar724x_pcibios_init(int irq);
- #else
--static inline int ar724x_pcibios_init(void) { return 0; }
-+static inline int ar724x_pcibios_init(int irq) { return 0; }
- #endif
- #endif /* __ASM_MACH_ATH79_PCI_H */
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -8,19 +8,32 @@
-  *  by the Free Software Foundation.
-  */
-+#include <linux/irq.h>
- #include <linux/pci.h>
- #include <asm/mach-ath79/ath79.h>
-+#include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/pci.h>
- #define AR724X_PCI_CFG_BASE   0x14000000
- #define AR724X_PCI_CFG_SIZE   0x1000
-+#define AR724X_PCI_CTRL_BASE  (AR71XX_APB_BASE + 0x000f0000)
-+#define AR724X_PCI_CTRL_SIZE  0x100
-+
- #define AR724X_PCI_MEM_BASE   0x10000000
- #define AR724X_PCI_MEM_SIZE   0x08000000
-+#define AR724X_PCI_REG_INT_STATUS     0x4c
-+#define AR724X_PCI_REG_INT_MASK               0x50
-+
-+#define AR724X_PCI_INT_DEV0           BIT(14)
-+
-+#define AR724X_PCI_IRQ_COUNT          1
-+
- #define AR7240_BAR0_WAR_VALUE 0xffff
- static DEFINE_SPINLOCK(ar724x_pci_lock);
- static void __iomem *ar724x_pci_devcfg_base;
-+static void __iomem *ar724x_pci_ctrl_base;
- static u32 ar724x_pci_bar0_value;
- static bool ar724x_pci_bar0_is_cached;
-@@ -164,14 +177,115 @@ static struct pci_controller ar724x_pci_
-       .mem_resource   = &ar724x_mem_resource,
- };
--int __init ar724x_pcibios_init(void)
-+static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
-+{
-+      void __iomem *base;
-+      u32 pending;
-+
-+      base = ar724x_pci_ctrl_base;
-+
-+      pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
-+                __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-+
-+      if (pending & AR724X_PCI_INT_DEV0)
-+              generic_handle_irq(ATH79_PCI_IRQ(0));
-+
-+      else
-+              spurious_interrupt();
-+}
-+
-+static void ar724x_pci_irq_unmask(struct irq_data *d)
-+{
-+      void __iomem *base;
-+      u32 t;
-+
-+      base = ar724x_pci_ctrl_base;
-+
-+      switch (d->irq) {
-+      case ATH79_PCI_IRQ(0):
-+              t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-+              __raw_writel(t | AR724X_PCI_INT_DEV0,
-+                           base + AR724X_PCI_REG_INT_MASK);
-+              /* flush write */
-+              __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-+      }
-+}
-+
-+static void ar724x_pci_irq_mask(struct irq_data *d)
-+{
-+      void __iomem *base;
-+      u32 t;
-+
-+      base = ar724x_pci_ctrl_base;
-+
-+      switch (d->irq) {
-+      case ATH79_PCI_IRQ(0):
-+              t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-+              __raw_writel(t & ~AR724X_PCI_INT_DEV0,
-+                           base + AR724X_PCI_REG_INT_MASK);
-+
-+              /* flush write */
-+              __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-+
-+              t = __raw_readl(base + AR724X_PCI_REG_INT_STATUS);
-+              __raw_writel(t | AR724X_PCI_INT_DEV0,
-+                           base + AR724X_PCI_REG_INT_STATUS);
-+
-+              /* flush write */
-+              __raw_readl(base + AR724X_PCI_REG_INT_STATUS);
-+      }
-+}
-+
-+static struct irq_chip ar724x_pci_irq_chip = {
-+      .name           = "AR724X PCI ",
-+      .irq_mask       = ar724x_pci_irq_mask,
-+      .irq_unmask     = ar724x_pci_irq_unmask,
-+      .irq_mask_ack   = ar724x_pci_irq_mask,
-+};
-+
-+static void __init ar724x_pci_irq_init(int irq)
-+{
-+      void __iomem *base;
-+      int i;
-+
-+      base = ar724x_pci_ctrl_base;
-+
-+      __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
-+      __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
-+
-+      BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT);
-+
-+      for (i = ATH79_PCI_IRQ_BASE;
-+           i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++)
-+              irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
-+                                       handle_level_irq);
-+
-+      irq_set_chained_handler(irq, ar724x_pci_irq_handler);
-+}
-+
-+int __init ar724x_pcibios_init(int irq)
- {
-+      int ret;
-+
-+      ret = -ENOMEM;
-+
-       ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
-                                        AR724X_PCI_CFG_SIZE);
-       if (ar724x_pci_devcfg_base == NULL)
--              return -ENOMEM;
-+              goto err;
-+      ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE,
-+                                     AR724X_PCI_CTRL_SIZE);
-+      if (ar724x_pci_ctrl_base == NULL)
-+              goto err_unmap_devcfg;
-+
-+      ar724x_pci_irq_init(irq);
-       register_pci_controller(&ar724x_pci_controller);
-       return PCIBIOS_SUCCESSFUL;
-+
-+err_unmap_devcfg:
-+      iounmap(ar724x_pci_devcfg_base);
-+err:
-+      return ret;
- }
diff --git a/target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch b/target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch
deleted file mode 100644 (file)
index 4ef0805..0000000
+++ /dev/null
@@ -1,64 +0,0 @@
-From b2ab491ed634a4c0b7af5f11940e0ca42b1a87c8 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:08 +0100
-Subject: [PATCH 17/47] MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c
-
-Remove a superfluous ifdef around an include. Also
-reorganize the board setup code a bit, so another
-ifdef can be removed.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3497/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c |   23 ++++++++++++-----------
- 1 files changed, 12 insertions(+), 11 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -12,10 +12,7 @@
- #include <linux/init.h>
- #include <linux/pci.h>
--
--#ifdef CONFIG_PCI
- #include <linux/ath9k_platform.h>
--#endif /* CONFIG_PCI */
- #include <asm/mach-ath79/irq.h>
-@@ -91,6 +88,17 @@ static struct ar724x_pci_data ubnt_xm_pc
-               .pdata  = &ubnt_xm_eeprom_data,
-       },
- };
-+
-+static void __init ubnt_xm_pci_init(void)
-+{
-+      memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
-+             sizeof(ubnt_xm_eeprom_data.eeprom_data));
-+
-+      ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
-+      ath79_register_pci();
-+}
-+#else
-+static inline void ubnt_xm_pci_init(void) {}
- #endif /* CONFIG_PCI */
- static void __init ubnt_xm_init(void)
-@@ -105,14 +113,7 @@ static void __init ubnt_xm_init(void)
-       ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info,
-                          ARRAY_SIZE(ubnt_xm_spi_info));
--#ifdef CONFIG_PCI
--      memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
--             sizeof(ubnt_xm_eeprom_data.eeprom_data));
--
--      ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
--#endif /* CONFIG_PCI */
--
--      ath79_register_pci();
-+      ubnt_xm_pci_init();
- }
- MIPS_MACHINE(ATH79_MACH_UBNT_XM,
diff --git a/target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch b/target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch
deleted file mode 100644 (file)
index 38765b0..0000000
+++ /dev/null
@@ -1,141 +0,0 @@
-From 2b62c9d685d9bb048a006b695683b2a812c0a847 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:09 +0100
-Subject: [PATCH 18/47] MIPS: ath79: allow to use board specific pci_plat_dev_init functions
-
-Th current implementation causes NULL pointer dereference
-if 'pci_data' is not set:
-
-pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit]
-pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI
-address [0x10000000-0x1000ffff])
-CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4
-Oops[#1]:
-Cpu 0
-$ 0   : 00000000 80420000 00000000 00000000
-$ 4   : 00000000 00000000 00000001 00000001
-$ 8   : 00000001 0000032c 81c54700 00000001
-$12   : 0000032d 0000000f 00000000 ffffffff
-$16   : 81c14c00 00000001 802dac74 80195f98
-$20   : 802ea050 00000000 00000000 00000000
-$24   : 00000003 800617f0
-$28   : 81c20000 81c21e70 00000000 802e78a4
-Hi    : 00000000
-Lo    : 4190ab00
-epc   : 802daca0 0x802daca0
-    Not tainted
-ra    : 802e78a4 0x802e78a4
-Status: 1000c003    KERNEL EXL IE
-Cause : 00800008
-BadVA : 00000000
-PrId  : 00019374 (MIPS 24Kc)
-Modules linked in:
-Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
-Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000
-        802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290
-        80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000
-        00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000
-        00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000
-
-This can be avoided by calling the 'ar724x_pci_add_data'
-function from the board specific setup code. However it
-makes no sense to use that function for every board,
-especially when the board does not needs to set the
-platform_data field of any PCI device.
-
-The patch allows the board setup code to specify a board
-specific function if that is required.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3499/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c |   13 ++++++++++++-
- arch/mips/ath79/pci.c          |   14 ++++++++------
- arch/mips/ath79/pci.h          |    4 +++-
- 3 files changed, 23 insertions(+), 8 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -85,16 +85,27 @@ static struct ath9k_platform_data ubnt_x
- static struct ar724x_pci_data ubnt_xm_pci_data[] = {
-       {
-               .irq    = ATH79_PCI_IRQ(0),
--              .pdata  = &ubnt_xm_eeprom_data,
-       },
- };
-+static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)
-+{
-+      switch (PCI_SLOT(dev->devfn)) {
-+      case 0:
-+              dev->dev.platform_data = &ubnt_xm_eeprom_data;
-+              break;
-+      }
-+
-+      return 0;
-+}
-+
- static void __init ubnt_xm_pci_init(void)
- {
-       memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
-              sizeof(ubnt_xm_eeprom_data.eeprom_data));
-       ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
-+      ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);
-       ath79_register_pci();
- }
- #else
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -14,6 +14,7 @@
- #include <asm/mach-ath79/pci.h>
- #include "pci.h"
-+static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
- static struct ar724x_pci_data *pci_data;
- static int pci_data_size;
-@@ -38,14 +39,15 @@ int __init pcibios_map_irq(const struct
- int pcibios_plat_dev_init(struct pci_dev *dev)
- {
--      unsigned int devfn = dev->devfn;
--
--      if (devfn > pci_data_size - 1)
--              return PCIBIOS_DEVICE_NOT_FOUND;
-+      if (ath79_pci_plat_dev_init)
-+              return ath79_pci_plat_dev_init(dev);
--      dev->dev.platform_data = pci_data[devfn].pdata;
-+      return 0;
-+}
--      return PCIBIOS_SUCCESSFUL;
-+void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))
-+{
-+      ath79_pci_plat_dev_init = func;
- }
- int __init ath79_register_pci(void)
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -13,14 +13,16 @@
- struct ar724x_pci_data {
-       int irq;
--      void *pdata;
- };
- void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
- #ifdef CONFIG_PCI
-+void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev));
- int ath79_register_pci(void);
- #else
-+static inline void
-+ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {}
- static inline int ath79_register_pci(void) { return 0; }
- #endif
diff --git a/target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch b/target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch
deleted file mode 100644 (file)
index 4021af2..0000000
+++ /dev/null
@@ -1,436 +0,0 @@
-From 4201b6aeb059b481571c241a2fc96fd3f41032e9 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:10 +0100
-Subject: [PATCH 19/47] MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs
-
-The Atheros AR71XX SoCs have a built-in PCI Host Controller.
-This patch adds a driver for that, and modifies the relevant
-files in order to allow to register the PCI controller from
-board specific setup.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3498/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig                |    1 +
- arch/mips/include/asm/mach-ath79/pci.h |    6 +
- arch/mips/pci/Makefile                 |    1 +
- arch/mips/pci/pci-ar71xx.c             |  375 ++++++++++++++++++++++++++++++++
- 4 files changed, 383 insertions(+), 0 deletions(-)
- create mode 100644 arch/mips/pci/pci-ar71xx.c
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -52,6 +52,7 @@ endmenu
- config SOC_AR71XX
-       select USB_ARCH_HAS_EHCI
-       select USB_ARCH_HAS_OHCI
-+      select HW_HAS_PCI
-       def_bool n
- config SOC_AR724X
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -11,6 +11,12 @@
- #ifndef __ASM_MACH_ATH79_PCI_H
- #define __ASM_MACH_ATH79_PCI_H
-+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
-+int ar71xx_pcibios_init(void);
-+#else
-+static inline int ar71xx_pcibios_init(void) { return 0; }
-+#endif
-+
- #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
- int ar724x_pcibios_init(int irq);
- #else
---- a/arch/mips/pci/Makefile
-+++ b/arch/mips/pci/Makefile
-@@ -19,6 +19,7 @@ obj-$(CONFIG_BCM47XX)                += pci-bcm47xx.o
- obj-$(CONFIG_BCM63XX)         += pci-bcm63xx.o fixup-bcm63xx.o \
-                                       ops-bcm63xx.o
- obj-$(CONFIG_MIPS_ALCHEMY)    += pci-alchemy.o
-+obj-$(CONFIG_SOC_AR71XX)      += pci-ar71xx.o
- obj-$(CONFIG_SOC_AR724X)      += pci-ar724x.o
- #
---- /dev/null
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -0,0 +1,375 @@
-+/*
-+ *  Atheros AR71xx PCI host controller driver
-+ *
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/resource.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/bitops.h>
-+#include <linux/pci.h>
-+#include <linux/pci_regs.h>
-+#include <linux/interrupt.h>
-+
-+#include <asm/mach-ath79/ar71xx_regs.h>
-+#include <asm/mach-ath79/ath79.h>
-+#include <asm/mach-ath79/pci.h>
-+
-+#define AR71XX_PCI_MEM_BASE   0x10000000
-+#define AR71XX_PCI_MEM_SIZE   0x08000000
-+
-+#define AR71XX_PCI_WIN0_OFFS          0x10000000
-+#define AR71XX_PCI_WIN1_OFFS          0x11000000
-+#define AR71XX_PCI_WIN2_OFFS          0x12000000
-+#define AR71XX_PCI_WIN3_OFFS          0x13000000
-+#define AR71XX_PCI_WIN4_OFFS          0x14000000
-+#define AR71XX_PCI_WIN5_OFFS          0x15000000
-+#define AR71XX_PCI_WIN6_OFFS          0x16000000
-+#define AR71XX_PCI_WIN7_OFFS          0x07000000
-+
-+#define AR71XX_PCI_CFG_BASE           \
-+      (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
-+#define AR71XX_PCI_CFG_SIZE           0x100
-+
-+#define AR71XX_PCI_REG_CRP_AD_CBE     0x00
-+#define AR71XX_PCI_REG_CRP_WRDATA     0x04
-+#define AR71XX_PCI_REG_CRP_RDDATA     0x08
-+#define AR71XX_PCI_REG_CFG_AD         0x0c
-+#define AR71XX_PCI_REG_CFG_CBE                0x10
-+#define AR71XX_PCI_REG_CFG_WRDATA     0x14
-+#define AR71XX_PCI_REG_CFG_RDDATA     0x18
-+#define AR71XX_PCI_REG_PCI_ERR                0x1c
-+#define AR71XX_PCI_REG_PCI_ERR_ADDR   0x20
-+#define AR71XX_PCI_REG_AHB_ERR                0x24
-+#define AR71XX_PCI_REG_AHB_ERR_ADDR   0x28
-+
-+#define AR71XX_PCI_CRP_CMD_WRITE      0x00010000
-+#define AR71XX_PCI_CRP_CMD_READ               0x00000000
-+#define AR71XX_PCI_CFG_CMD_READ               0x0000000a
-+#define AR71XX_PCI_CFG_CMD_WRITE      0x0000000b
-+
-+#define AR71XX_PCI_INT_CORE           BIT(4)
-+#define AR71XX_PCI_INT_DEV2           BIT(2)
-+#define AR71XX_PCI_INT_DEV1           BIT(1)
-+#define AR71XX_PCI_INT_DEV0           BIT(0)
-+
-+#define AR71XX_PCI_IRQ_COUNT          5
-+
-+static DEFINE_SPINLOCK(ar71xx_pci_lock);
-+static void __iomem *ar71xx_pcicfg_base;
-+
-+/* Byte lane enable bits */
-+static const u8 ar71xx_pci_ble_table[4][4] = {
-+      {0x0, 0xf, 0xf, 0xf},
-+      {0xe, 0xd, 0xb, 0x7},
-+      {0xc, 0xf, 0x3, 0xf},
-+      {0xf, 0xf, 0xf, 0xf},
-+};
-+
-+static const u32 ar71xx_pci_read_mask[8] = {
-+      0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0
-+};
-+
-+static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
-+{
-+      u32 t;
-+
-+      t = ar71xx_pci_ble_table[size & 3][where & 3];
-+      BUG_ON(t == 0xf);
-+      t <<= (local) ? 20 : 4;
-+
-+      return t;
-+}
-+
-+static inline u32 ar71xx_pci_bus_addr(struct pci_bus *bus, unsigned int devfn,
-+                                    int where)
-+{
-+      u32 ret;
-+
-+      if (!bus->number) {
-+              /* type 0 */
-+              ret = (1 << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) |
-+                    (where & ~3);
-+      } else {
-+              /* type 1 */
-+              ret = (bus->number << 16) | (PCI_SLOT(devfn) << 11) |
-+                    (PCI_FUNC(devfn) << 8) | (where & ~3) | 1;
-+      }
-+
-+      return ret;
-+}
-+
-+static int ar71xx_pci_check_error(int quiet)
-+{
-+      void __iomem *base = ar71xx_pcicfg_base;
-+      u32 pci_err;
-+      u32 ahb_err;
-+
-+      pci_err = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR) & 3;
-+      if (pci_err) {
-+              if (!quiet) {
-+                      u32 addr;
-+
-+                      addr = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR_ADDR);
-+                      pr_crit("ar71xx: %s bus error %d at addr 0x%x\n",
-+                              "PCI", pci_err, addr);
-+              }
-+
-+              /* clear PCI error status */
-+              __raw_writel(pci_err, base + AR71XX_PCI_REG_PCI_ERR);
-+      }
-+
-+      ahb_err = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR) & 1;
-+      if (ahb_err) {
-+              if (!quiet) {
-+                      u32 addr;
-+
-+                      addr = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR_ADDR);
-+                      pr_crit("ar71xx: %s bus error %d at addr 0x%x\n",
-+                              "AHB", ahb_err, addr);
-+              }
-+
-+              /* clear AHB error status */
-+              __raw_writel(ahb_err, base + AR71XX_PCI_REG_AHB_ERR);
-+      }
-+
-+      return !!(ahb_err | pci_err);
-+}
-+
-+static inline void ar71xx_pci_local_write(int where, int size, u32 value)
-+{
-+      void __iomem *base = ar71xx_pcicfg_base;
-+      u32 ad_cbe;
-+
-+      value = value << (8 * (where & 3));
-+
-+      ad_cbe = AR71XX_PCI_CRP_CMD_WRITE | (where & ~3);
-+      ad_cbe |= ar71xx_pci_get_ble(where, size, 1);
-+
-+      __raw_writel(ad_cbe, base + AR71XX_PCI_REG_CRP_AD_CBE);
-+      __raw_writel(value, base + AR71XX_PCI_REG_CRP_WRDATA);
-+}
-+
-+static inline int ar71xx_pci_set_cfgaddr(struct pci_bus *bus,
-+                                       unsigned int devfn,
-+                                       int where, int size, u32 cmd)
-+{
-+      void __iomem *base = ar71xx_pcicfg_base;
-+      u32 addr;
-+
-+      addr = ar71xx_pci_bus_addr(bus, devfn, where);
-+
-+      __raw_writel(addr, base + AR71XX_PCI_REG_CFG_AD);
-+      __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0),
-+                   base + AR71XX_PCI_REG_CFG_CBE);
-+
-+      return ar71xx_pci_check_error(1);
-+}
-+
-+static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
-+                                int where, int size, u32 *value)
-+{
-+      void __iomem *base = ar71xx_pcicfg_base;
-+      unsigned long flags;
-+      u32 data;
-+      int err;
-+      int ret;
-+
-+      ret = PCIBIOS_SUCCESSFUL;
-+      data = ~0;
-+
-+      spin_lock_irqsave(&ar71xx_pci_lock, flags);
-+
-+      err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
-+                                   AR71XX_PCI_CFG_CMD_READ);
-+      if (err)
-+              ret = PCIBIOS_DEVICE_NOT_FOUND;
-+      else
-+              data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
-+
-+      spin_unlock_irqrestore(&ar71xx_pci_lock, flags);
-+
-+      *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7];
-+
-+      return ret;
-+}
-+
-+static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
-+                                 int where, int size, u32 value)
-+{
-+      void __iomem *base = ar71xx_pcicfg_base;
-+      unsigned long flags;
-+      int err;
-+      int ret;
-+
-+      value = value << (8 * (where & 3));
-+      ret = PCIBIOS_SUCCESSFUL;
-+
-+      spin_lock_irqsave(&ar71xx_pci_lock, flags);
-+
-+      err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
-+                                   AR71XX_PCI_CFG_CMD_WRITE);
-+      if (err)
-+              ret = PCIBIOS_DEVICE_NOT_FOUND;
-+      else
-+              __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);
-+
-+      spin_unlock_irqrestore(&ar71xx_pci_lock, flags);
-+
-+      return ret;
-+}
-+
-+static struct pci_ops ar71xx_pci_ops = {
-+      .read   = ar71xx_pci_read_config,
-+      .write  = ar71xx_pci_write_config,
-+};
-+
-+static struct resource ar71xx_pci_io_resource = {
-+      .name           = "PCI IO space",
-+      .start          = 0,
-+      .end            = 0,
-+      .flags          = IORESOURCE_IO,
-+};
-+
-+static struct resource ar71xx_pci_mem_resource = {
-+      .name           = "PCI memory space",
-+      .start          = AR71XX_PCI_MEM_BASE,
-+      .end            = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
-+      .flags          = IORESOURCE_MEM
-+};
-+
-+static struct pci_controller ar71xx_pci_controller = {
-+      .pci_ops        = &ar71xx_pci_ops,
-+      .mem_resource   = &ar71xx_pci_mem_resource,
-+      .io_resource    = &ar71xx_pci_io_resource,
-+};
-+
-+static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
-+{
-+      void __iomem *base = ath79_reset_base;
-+      u32 pending;
-+
-+      pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
-+                __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+
-+      if (pending & AR71XX_PCI_INT_DEV0)
-+              generic_handle_irq(ATH79_PCI_IRQ(0));
-+
-+      else if (pending & AR71XX_PCI_INT_DEV1)
-+              generic_handle_irq(ATH79_PCI_IRQ(1));
-+
-+      else if (pending & AR71XX_PCI_INT_DEV2)
-+              generic_handle_irq(ATH79_PCI_IRQ(2));
-+
-+      else if (pending & AR71XX_PCI_INT_CORE)
-+              generic_handle_irq(ATH79_PCI_IRQ(4));
-+
-+      else
-+              spurious_interrupt();
-+}
-+
-+static void ar71xx_pci_irq_unmask(struct irq_data *d)
-+{
-+      unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
-+      void __iomem *base = ath79_reset_base;
-+      u32 t;
-+
-+      t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+      __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+
-+      /* flush write */
-+      __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+}
-+
-+static void ar71xx_pci_irq_mask(struct irq_data *d)
-+{
-+      unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
-+      void __iomem *base = ath79_reset_base;
-+      u32 t;
-+
-+      t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+      __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+
-+      /* flush write */
-+      __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+}
-+
-+static struct irq_chip ar71xx_pci_irq_chip = {
-+      .name           = "AR71XX PCI",
-+      .irq_mask       = ar71xx_pci_irq_mask,
-+      .irq_unmask     = ar71xx_pci_irq_unmask,
-+      .irq_mask_ack   = ar71xx_pci_irq_mask,
-+};
-+
-+static __init void ar71xx_pci_irq_init(void)
-+{
-+      void __iomem *base = ath79_reset_base;
-+      int i;
-+
-+      __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+      __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
-+
-+      BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
-+
-+      for (i = ATH79_PCI_IRQ_BASE;
-+           i < ATH79_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
-+              irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
-+                                       handle_level_irq);
-+
-+      irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
-+}
-+
-+static __init void ar71xx_pci_reset(void)
-+{
-+      void __iomem *ddr_base = ath79_ddr_base;
-+
-+      ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
-+      mdelay(100);
-+
-+      ath79_device_reset_clear(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
-+      mdelay(100);
-+
-+      __raw_writel(AR71XX_PCI_WIN0_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN0);
-+      __raw_writel(AR71XX_PCI_WIN1_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN1);
-+      __raw_writel(AR71XX_PCI_WIN2_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN2);
-+      __raw_writel(AR71XX_PCI_WIN3_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN3);
-+      __raw_writel(AR71XX_PCI_WIN4_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN4);
-+      __raw_writel(AR71XX_PCI_WIN5_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN5);
-+      __raw_writel(AR71XX_PCI_WIN6_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN6);
-+      __raw_writel(AR71XX_PCI_WIN7_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN7);
-+
-+      mdelay(100);
-+}
-+
-+__init int ar71xx_pcibios_init(void)
-+{
-+      u32 t;
-+
-+      ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE);
-+      if (ar71xx_pcicfg_base == NULL)
-+              return -ENOMEM;
-+
-+      ar71xx_pci_reset();
-+
-+      /* setup COMMAND register */
-+      t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
-+        | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
-+      ar71xx_pci_local_write(PCI_COMMAND, 4, t);
-+
-+      /* clear bus errors */
-+      ar71xx_pci_check_error(1);
-+
-+      ar71xx_pci_irq_init();
-+
-+      register_pci_controller(&ar71xx_pci_controller);
-+
-+      return 0;
-+}
diff --git a/target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch b/target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch
deleted file mode 100644 (file)
index 7daaf19..0000000
+++ /dev/null
@@ -1,165 +0,0 @@
-From fd1dd2f2c317bc0fc2c30fba440d911654bf592e Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:11 +0100
-Subject: [PATCH 20/47] MIPS: ath79: allow to use SoC specific PCI IRQ maps
-
-The PCI controllers in the AR71XX and in the
-AR724X SoCs are different, and both of them
-uses different IRQ wiring.
-
-The patch modifies the 'pcibios_map_irq' function
-in order to allow to use different IRQ maps for
-the different SoCs. The patch also adds a function,
-which lets the board setup code to override the
-default IRQ map.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3500/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/pci.c |   72 ++++++++++++++++++++++++++++++++++++++++++++++---
- arch/mips/ath79/pci.h |    9 ++++++
- 2 files changed, 77 insertions(+), 4 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -8,6 +8,7 @@
-  *  by the Free Software Foundation.
-  */
-+#include <linux/init.h>
- #include <linux/pci.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/irq.h>
-@@ -15,9 +16,35 @@
- #include "pci.h"
- static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
-+static const struct ath79_pci_irq *ath79_pci_irq_map __initdata;
-+static unsigned ath79_pci_nr_irqs __initdata;
- static struct ar724x_pci_data *pci_data;
- static int pci_data_size;
-+static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {
-+      {
-+              .slot   = 17,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(0),
-+      }, {
-+              .slot   = 18,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(1),
-+      }, {
-+              .slot   = 19,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(2),
-+      }
-+};
-+
-+static const struct ath79_pci_irq ar724x_pci_irq_map[] __initconst = {
-+      {
-+              .slot   = 0,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(0),
-+      }
-+};
-+
- void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
- {
-       pci_data        = data;
-@@ -26,13 +53,40 @@ void ar724x_pci_add_data(struct ar724x_p
- int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
- {
--      unsigned int devfn = dev->devfn;
-       int irq = -1;
-+      int i;
--      if (devfn > pci_data_size - 1)
--              return irq;
--
--      irq = pci_data[devfn].irq;
-+      if (ath79_pci_nr_irqs == 0 ||
-+          ath79_pci_irq_map == NULL) {
-+              if (soc_is_ar71xx()) {
-+                      ath79_pci_irq_map = ar71xx_pci_irq_map;
-+                      ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
-+              } else if (soc_is_ar724x()) {
-+                      ath79_pci_irq_map = ar724x_pci_irq_map;
-+                      ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
-+              } else {
-+                      pr_crit("pci %s: invalid irq map\n",
-+                              pci_name((struct pci_dev *) dev));
-+                      return irq;
-+              }
-+      }
-+
-+      for (i = 0; i < ath79_pci_nr_irqs; i++) {
-+              const struct ath79_pci_irq *entry;
-+
-+              entry = &ath79_pci_irq_map[i];
-+              if (entry->slot == slot && entry->pin == pin) {
-+                      irq = entry->irq;
-+                      break;
-+              }
-+      }
-+
-+      if (irq < 0)
-+              pr_crit("pci %s: no irq found for pin %u\n",
-+                      pci_name((struct pci_dev *) dev), pin);
-+      else
-+              pr_info("pci %s: using irq %d for pin %u\n",
-+                      pci_name((struct pci_dev *) dev), irq, pin);
-       return irq;
- }
-@@ -45,6 +99,13 @@ int pcibios_plat_dev_init(struct pci_dev
-       return 0;
- }
-+void __init ath79_pci_set_irq_map(unsigned nr_irqs,
-+                                const struct ath79_pci_irq *map)
-+{
-+      ath79_pci_nr_irqs = nr_irqs;
-+      ath79_pci_irq_map = map;
-+}
-+
- void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))
- {
-       ath79_pci_plat_dev_init = func;
-@@ -52,6 +113,9 @@ void __init ath79_pci_set_plat_dev_init(
- int __init ath79_register_pci(void)
- {
-+      if (soc_is_ar71xx())
-+              return ar71xx_pcibios_init();
-+
-       if (soc_is_ar724x())
-               return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -15,13 +15,22 @@ struct ar724x_pci_data {
-       int irq;
- };
-+struct ath79_pci_irq {
-+      u8      slot;
-+      u8      pin;
-+      int     irq;
-+};
-+
- void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
- #ifdef CONFIG_PCI
-+void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map);
- void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev));
- int ath79_register_pci(void);
- #else
- static inline void
-+ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map) {}
-+static inline void
- ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {}
- static inline int ath79_register_pci(void) { return 0; }
- #endif
diff --git a/target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch b/target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch
deleted file mode 100644 (file)
index 70013c8..0000000
+++ /dev/null
@@ -1,86 +0,0 @@
-From 29398cf1212afc9a6474127259cbb3a48d0751e5 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:12 +0100
-Subject: [PATCH 21/47] MIPS: ath79: remove ar724x_pci_add_data function
-
-The variables set by this function are not used anymore.
-Remove the function and the relevant variables as well.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3501/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-ubnt-xm.c |    7 -------
- arch/mips/ath79/pci.c          |    8 --------
- arch/mips/ath79/pci.h          |    6 ------
- 3 files changed, 0 insertions(+), 21 deletions(-)
-
---- a/arch/mips/ath79/mach-ubnt-xm.c
-+++ b/arch/mips/ath79/mach-ubnt-xm.c
-@@ -82,12 +82,6 @@ static struct ath79_spi_platform_data ub
- #ifdef CONFIG_PCI
- static struct ath9k_platform_data ubnt_xm_eeprom_data;
--static struct ar724x_pci_data ubnt_xm_pci_data[] = {
--      {
--              .irq    = ATH79_PCI_IRQ(0),
--      },
--};
--
- static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)
- {
-       switch (PCI_SLOT(dev->devfn)) {
-@@ -104,7 +98,6 @@ static void __init ubnt_xm_pci_init(void
-       memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
-              sizeof(ubnt_xm_eeprom_data.eeprom_data));
--      ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
-       ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);
-       ath79_register_pci();
- }
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -18,8 +18,6 @@
- static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
- static const struct ath79_pci_irq *ath79_pci_irq_map __initdata;
- static unsigned ath79_pci_nr_irqs __initdata;
--static struct ar724x_pci_data *pci_data;
--static int pci_data_size;
- static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {
-       {
-@@ -45,12 +43,6 @@ static const struct ath79_pci_irq ar724x
-       }
- };
--void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
--{
--      pci_data        = data;
--      pci_data_size   = size;
--}
--
- int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
- {
-       int irq = -1;
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -11,18 +11,12 @@
- #ifndef _ATH79_PCI_H
- #define _ATH79_PCI_H
--struct ar724x_pci_data {
--      int irq;
--};
--
- struct ath79_pci_irq {
-       u8      slot;
-       u8      pin;
-       int     irq;
- };
--void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
--
- #ifdef CONFIG_PCI
- void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map);
- void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev));
diff --git a/target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch b/target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch
deleted file mode 100644 (file)
index 969b79d..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-From 12db6a98b438a50799873bfd2b736a3b02a4bd57 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:13 +0100
-Subject: [PATCH 22/47] MIPS: ath79: register PCI controller on the PB44 board
-
-The PB44 reference board has two miniPCI slots. Register
-the PCI controller to make those usable.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3502/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/mach-pb44.c |    2 ++
- 1 files changed, 2 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/mach-pb44.c
-+++ b/arch/mips/ath79/mach-pb44.c
-@@ -19,6 +19,7 @@
- #include "dev-leds-gpio.h"
- #include "dev-spi.h"
- #include "dev-usb.h"
-+#include "pci.h"
- #define PB44_GPIO_I2C_SCL     0
- #define PB44_GPIO_I2C_SDA     1
-@@ -114,6 +115,7 @@ static void __init pb44_init(void)
-       ath79_register_spi(&pb44_spi_data, pb44_spi_info,
-                          ARRAY_SIZE(pb44_spi_info));
-       ath79_register_usb();
-+      ath79_register_pci();
- }
- MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
diff --git a/target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch b/target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch
deleted file mode 100644 (file)
index da173a5..0000000
+++ /dev/null
@@ -1,71 +0,0 @@
-From d3b5329b89d1bc733c56e4d609a89b429bf6cd4e Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:36:14 +0100
-Subject: [PATCH 23/47] MIPS: ath79: update copyright headers of PCI related files
-
-Add copyright records according to the recent changes in
-the PCI code. Also fix up the descriptions.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-Cc: linux-mips@linux-mips.org
-Patchwork: https://patchwork.linux-mips.org/patch/3503/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/pci.c                  |    4 ++++
- arch/mips/ath79/pci.h                  |    4 +++-
- arch/mips/include/asm/mach-ath79/pci.h |    4 +++-
- arch/mips/pci/pci-ar724x.c             |    3 ++-
- 4 files changed, 12 insertions(+), 3 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -2,6 +2,10 @@
-  *  Atheros AR71XX/AR724X specific PCI setup code
-  *
-  *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -1,7 +1,9 @@
- /*
-- *  Atheros 724x PCI support
-+ *  Atheros AR71XX/AR724X PCI support
-  *
-  *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -1,7 +1,9 @@
- /*
-- *  Atheros 724x PCI support
-+ *  Atheros AR71XX/AR724X PCI support
-  *
-  *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -1,7 +1,8 @@
- /*
-- *  Atheros 724x PCI support
-+ *  Atheros AR724X PCI host controller driver
-  *
-  *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-+ *  Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
diff --git a/target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch
deleted file mode 100644 (file)
index 512f2da..0000000
+++ /dev/null
@@ -1,56 +0,0 @@
-From 5c1f1041309ede56d48eb3c665025e87c9824a64 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:19 +0100
-Subject: [PATCH 24/47] MIPS: ath79: add early_printk support for AR934X
-
-The patch allows to see kernel messages on AR934X SoCs in
-early boot stage.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3504/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/early_printk.c                 |    3 +++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    6 +++++-
- 2 files changed, 8 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/early_printk.c
-+++ b/arch/mips/ath79/early_printk.c
-@@ -71,6 +71,9 @@ static void prom_putchar_init(void)
-       case REV_ID_MAJOR_AR7241:
-       case REV_ID_MAJOR_AR7242:
-       case REV_ID_MAJOR_AR913X:
-+      case REV_ID_MAJOR_AR9341:
-+      case REV_ID_MAJOR_AR9342:
-+      case REV_ID_MAJOR_AR9344:
-               _prom_putchar = prom_putchar_ar71xx;
-               break;
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -1,10 +1,11 @@
- /*
-  *  Atheros AR71XX/AR724X/AR913X SoC register definitions
-  *
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-  *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-- *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-@@ -249,6 +250,9 @@
- #define REV_ID_MAJOR_AR7242           0x1100
- #define REV_ID_MAJOR_AR9330           0x0110
- #define REV_ID_MAJOR_AR9331           0x1110
-+#define REV_ID_MAJOR_AR9341           0x0120
-+#define REV_ID_MAJOR_AR9342           0x1120
-+#define REV_ID_MAJOR_AR9344           0x2120
- #define AR71XX_REV_ID_MINOR_MASK      0x3
- #define AR71XX_REV_ID_MINOR_AR7130    0x0
diff --git a/target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch b/target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch
deleted file mode 100644 (file)
index afbb04e..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-From ccb089bbbe49949063cc348743605b3d813ca1c0 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:20 +0100
-Subject: [PATCH 25/47] MIPS: ath79: sort case statements in ath79_detect_sys_type
-
-Sort the case statements alphabetically in order to improve
-readability.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3505/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/setup.c |   24 ++++++++++++------------
- 1 files changed, 12 insertions(+), 12 deletions(-)
-
---- a/arch/mips/ath79/setup.c
-+++ b/arch/mips/ath79/setup.c
-@@ -116,18 +116,6 @@ static void __init ath79_detect_sys_type
-               rev = id & AR724X_REV_ID_REVISION_MASK;
-               break;
--      case REV_ID_MAJOR_AR9330:
--              ath79_soc = ATH79_SOC_AR9330;
--              chip = "9330";
--              rev = id & AR933X_REV_ID_REVISION_MASK;
--              break;
--
--      case REV_ID_MAJOR_AR9331:
--              ath79_soc = ATH79_SOC_AR9331;
--              chip = "9331";
--              rev = id & AR933X_REV_ID_REVISION_MASK;
--              break;
--
-       case REV_ID_MAJOR_AR913X:
-               minor = id & AR913X_REV_ID_MINOR_MASK;
-               rev = id >> AR913X_REV_ID_REVISION_SHIFT;
-@@ -145,6 +133,18 @@ static void __init ath79_detect_sys_type
-               }
-               break;
-+      case REV_ID_MAJOR_AR9330:
-+              ath79_soc = ATH79_SOC_AR9330;
-+              chip = "9330";
-+              rev = id & AR933X_REV_ID_REVISION_MASK;
-+              break;
-+
-+      case REV_ID_MAJOR_AR9331:
-+              ath79_soc = ATH79_SOC_AR9331;
-+              chip = "9331";
-+              rev = id & AR933X_REV_ID_REVISION_MASK;
-+              break;
-+
-       default:
-               panic("ath79: unknown SoC, id:0x%08x", id);
-       }
diff --git a/target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch
deleted file mode 100644 (file)
index 59bb3d8..0000000
+++ /dev/null
@@ -1,124 +0,0 @@
-From bf5cb424312f28e51803286a53cb8613bedc5bc8 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:21 +0100
-Subject: [PATCH 26/47] MIPS: ath79: add SoC detection code for AR934X
-
-Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
-symbol for the AR934X SoCs.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3506/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig                        |    4 ++++
- arch/mips/ath79/setup.c                        |   21 ++++++++++++++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 ++
- arch/mips/include/asm/mach-ath79/ath79.h       |   23 +++++++++++++++++++++++
- 4 files changed, 49 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -69,6 +69,10 @@ config SOC_AR933X
-       select USB_ARCH_HAS_EHCI
-       def_bool n
-+config SOC_AR934X
-+      select USB_ARCH_HAS_EHCI
-+      def_bool n
-+
- config ATH79_DEV_GPIO_BUTTONS
-       def_bool n
---- a/arch/mips/ath79/setup.c
-+++ b/arch/mips/ath79/setup.c
-@@ -1,10 +1,11 @@
- /*
-  *  Atheros AR71XX/AR724X/AR913X specific setup
-  *
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-- *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-@@ -145,6 +146,24 @@ static void __init ath79_detect_sys_type
-               rev = id & AR933X_REV_ID_REVISION_MASK;
-               break;
-+      case REV_ID_MAJOR_AR9341:
-+              ath79_soc = ATH79_SOC_AR9341;
-+              chip = "9341";
-+              rev = id & AR934X_REV_ID_REVISION_MASK;
-+              break;
-+
-+      case REV_ID_MAJOR_AR9342:
-+              ath79_soc = ATH79_SOC_AR9342;
-+              chip = "9342";
-+              rev = id & AR934X_REV_ID_REVISION_MASK;
-+              break;
-+
-+      case REV_ID_MAJOR_AR9344:
-+              ath79_soc = ATH79_SOC_AR9344;
-+              chip = "9344";
-+              rev = id & AR934X_REV_ID_REVISION_MASK;
-+              break;
-+
-       default:
-               panic("ath79: unknown SoC, id:0x%08x", id);
-       }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -271,6 +271,8 @@
- #define AR724X_REV_ID_REVISION_MASK   0x3
-+#define AR934X_REV_ID_REVISION_MASK     0xf
-+
- /*
-  * SPI block
-  */
---- a/arch/mips/include/asm/mach-ath79/ath79.h
-+++ b/arch/mips/include/asm/mach-ath79/ath79.h
-@@ -29,6 +29,9 @@ enum ath79_soc_type {
-       ATH79_SOC_AR9132,
-       ATH79_SOC_AR9330,
-       ATH79_SOC_AR9331,
-+      ATH79_SOC_AR9341,
-+      ATH79_SOC_AR9342,
-+      ATH79_SOC_AR9344,
- };
- extern enum ath79_soc_type ath79_soc;
-@@ -75,6 +78,26 @@ static inline int soc_is_ar933x(void)
-               ath79_soc == ATH79_SOC_AR9331);
- }
-+static inline int soc_is_ar9341(void)
-+{
-+      return (ath79_soc == ATH79_SOC_AR9341);
-+}
-+
-+static inline int soc_is_ar9342(void)
-+{
-+      return (ath79_soc == ATH79_SOC_AR9342);
-+}
-+
-+static inline int soc_is_ar9344(void)
-+{
-+      return (ath79_soc == ATH79_SOC_AR9344);
-+}
-+
-+static inline int soc_is_ar934x(void)
-+{
-+      return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
-+}
-+
- extern void __iomem *ath79_ddr_base;
- extern void __iomem *ath79_pll_base;
- extern void __iomem *ath79_reset_base;
diff --git a/target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch
deleted file mode 100644 (file)
index 39e161c..0000000
+++ /dev/null
@@ -1,198 +0,0 @@
-From e9706fc0a97feb7992a98806b69a1fc1fcb910c7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:22 +0100
-Subject: [PATCH 27/47] MIPS: ath79: add clock initialization code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3507/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/clock.c                        |   81 ++++++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   53 +++++++++++++++
- 2 files changed, 134 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/clock.c
-+++ b/arch/mips/ath79/clock.c
-@@ -1,8 +1,11 @@
- /*
-  *  Atheros AR71XX/AR724X/AR913X common routines
-  *
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-  *
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-+ *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-  *  by the Free Software Foundation.
-@@ -163,6 +166,82 @@ static void __init ar933x_clocks_init(vo
-       ath79_uart_clk.rate = ath79_ref_clk.rate;
- }
-+static void __init ar934x_clocks_init(void)
-+{
-+      u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
-+      u32 cpu_pll, ddr_pll;
-+      u32 bootstrap;
-+
-+      bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
-+      if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40)
-+              ath79_ref_clk.rate = 40 * 1000 * 1000;
-+      else
-+              ath79_ref_clk.rate = 25 * 1000 * 1000;
-+
-+      pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
-+      out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-+                AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
-+      ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-+                AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
-+      nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
-+             AR934X_PLL_CPU_CONFIG_NINT_MASK;
-+      frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-+             AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
-+
-+      cpu_pll = nint * ath79_ref_clk.rate / ref_div;
-+      cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6));
-+      cpu_pll /= (1 << out_div);
-+
-+      pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
-+      out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-+                AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
-+      ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-+                AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
-+      nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
-+             AR934X_PLL_DDR_CONFIG_NINT_MASK;
-+      frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-+             AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
-+
-+      ddr_pll = nint * ath79_ref_clk.rate / ref_div;
-+      ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10));
-+      ddr_pll /= (1 << out_div);
-+
-+      clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
-+
-+      postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &
-+                AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK;
-+
-+      if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS)
-+              ath79_cpu_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL)
-+              ath79_cpu_clk.rate = cpu_pll / (postdiv + 1);
-+      else
-+              ath79_cpu_clk.rate = ddr_pll / (postdiv + 1);
-+
-+      postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &
-+                AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK;
-+
-+      if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS)
-+              ath79_ddr_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL)
-+              ath79_ddr_clk.rate = ddr_pll / (postdiv + 1);
-+      else
-+              ath79_ddr_clk.rate = cpu_pll / (postdiv + 1);
-+
-+      postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &
-+                AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK;
-+
-+      if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS)
-+              ath79_ahb_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL)
-+              ath79_ahb_clk.rate = ddr_pll / (postdiv + 1);
-+      else
-+              ath79_ahb_clk.rate = cpu_pll / (postdiv + 1);
-+
-+      ath79_wdt_clk.rate = ath79_ref_clk.rate;
-+      ath79_uart_clk.rate = ath79_ref_clk.rate;
-+}
-+
- void __init ath79_clocks_init(void)
- {
-       if (soc_is_ar71xx())
-@@ -173,6 +252,8 @@ void __init ath79_clocks_init(void)
-               ar913x_clocks_init();
-       else if (soc_is_ar933x())
-               ar933x_clocks_init();
-+      else if (soc_is_ar934x())
-+              ar934x_clocks_init();
-       else
-               BUG();
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -151,6 +151,41 @@
- #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT   15
- #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK    0x7
-+#define AR934X_PLL_CPU_CONFIG_REG             0x00
-+#define AR934X_PLL_DDR_CONFIG_REG             0x04
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG               0x08
-+
-+#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT     0
-+#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK      0x3f
-+#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT      6
-+#define AR934X_PLL_CPU_CONFIG_NINT_MASK               0x3f
-+#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT    12
-+#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK     0x1f
-+#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT    19
-+#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK     0x3
-+
-+#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT     0
-+#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK      0x3ff
-+#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT      10
-+#define AR934X_PLL_DDR_CONFIG_NINT_MASK               0x3f
-+#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT    16
-+#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK     0x1f
-+#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT    23
-+#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK     0x7
-+
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS    BIT(2)
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS    BIT(3)
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS    BIT(4)
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT        5
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT        10
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT        15
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL        BIT(20)
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL        BIT(21)
-+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL        BIT(24)
-+
- /*
-  * USB_CONFIG block
-  */
-@@ -186,6 +221,8 @@
- #define AR933X_RESET_REG_RESET_MODULE         0x1c
- #define AR933X_RESET_REG_BOOTSTRAP            0xac
-+#define AR934X_RESET_REG_BOOTSTRAP            0xb0
-+
- #define MISC_INT_ETHSW                        BIT(12)
- #define MISC_INT_TIMER4                       BIT(10)
- #define MISC_INT_TIMER3                       BIT(9)
-@@ -242,6 +279,22 @@
- #define AR933X_BOOTSTRAP_REF_CLK_40   BIT(0)
-+#define AR934X_BOOTSTRAP_SW_OPTION8   BIT(23)
-+#define AR934X_BOOTSTRAP_SW_OPTION7   BIT(22)
-+#define AR934X_BOOTSTRAP_SW_OPTION6   BIT(21)
-+#define AR934X_BOOTSTRAP_SW_OPTION5   BIT(20)
-+#define AR934X_BOOTSTRAP_SW_OPTION4   BIT(19)
-+#define AR934X_BOOTSTRAP_SW_OPTION3   BIT(18)
-+#define AR934X_BOOTSTRAP_SW_OPTION2   BIT(17)
-+#define AR934X_BOOTSTRAP_SW_OPTION1   BIT(16)
-+#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7)
-+#define AR934X_BOOTSTRAP_PCIE_RC      BIT(6)
-+#define AR934X_BOOTSTRAP_EJTAG_MODE   BIT(5)
-+#define AR934X_BOOTSTRAP_REF_CLK_40   BIT(4)
-+#define AR934X_BOOTSTRAP_BOOT_FROM_SPI        BIT(2)
-+#define AR934X_BOOTSTRAP_SDRAM_DISABLED       BIT(1)
-+#define AR934X_BOOTSTRAP_DDR1         BIT(0)
-+
- #define REV_ID_MAJOR_MASK             0xfff0
- #define REV_ID_MAJOR_AR71XX           0x00a0
- #define REV_ID_MAJOR_AR913X           0x00b0
diff --git a/target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch
deleted file mode 100644 (file)
index 77c8d5a..0000000
+++ /dev/null
@@ -1,102 +0,0 @@
-From 77bb01d1919bcb6787d5cde9056936420288ab34 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:23 +0100
-Subject: [PATCH 28/47] MIPS: ath79: add GPIO support code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3508/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/gpio.c                         |   47 +++++++++++++++++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    1 +
- 2 files changed, 47 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/gpio.c
-+++ b/arch/mips/ath79/gpio.c
-@@ -1,9 +1,12 @@
- /*
-  *  Atheros AR71XX/AR724X/AR913X GPIO API support
-  *
-- *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-+ *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-  *  by the Free Software Foundation.
-@@ -89,6 +92,42 @@ static int ath79_gpio_direction_output(s
-       return 0;
- }
-+static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-+{
-+      void __iomem *base = ath79_gpio_base;
-+      unsigned long flags;
-+
-+      spin_lock_irqsave(&ath79_gpio_lock, flags);
-+
-+      __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
-+                   base + AR71XX_GPIO_REG_OE);
-+
-+      spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-+
-+      return 0;
-+}
-+
-+static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
-+                                      int value)
-+{
-+      void __iomem *base = ath79_gpio_base;
-+      unsigned long flags;
-+
-+      spin_lock_irqsave(&ath79_gpio_lock, flags);
-+
-+      if (value)
-+              __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
-+      else
-+              __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
-+
-+      __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
-+                   base + AR71XX_GPIO_REG_OE);
-+
-+      spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-+
-+      return 0;
-+}
-+
- static struct gpio_chip ath79_gpio_chip = {
-       .label                  = "ath79",
-       .get                    = ath79_gpio_get_value,
-@@ -155,11 +194,17 @@ void __init ath79_gpio_init(void)
-               ath79_gpio_count = AR913X_GPIO_COUNT;
-       else if (soc_is_ar933x())
-               ath79_gpio_count = AR933X_GPIO_COUNT;
-+      else if (soc_is_ar934x())
-+              ath79_gpio_count = AR934X_GPIO_COUNT;
-       else
-               BUG();
-       ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
-       ath79_gpio_chip.ngpio = ath79_gpio_count;
-+      if (soc_is_ar934x()) {
-+              ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
-+              ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
-+      }
-       err = gpiochip_add(&ath79_gpio_chip);
-       if (err)
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -367,5 +367,6 @@
- #define AR724X_GPIO_COUNT             18
- #define AR913X_GPIO_COUNT             22
- #define AR933X_GPIO_COUNT             30
-+#define AR934X_GPIO_COUNT             23
- #endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch b/target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch
deleted file mode 100644 (file)
index 0f30d38..0000000
+++ /dev/null
@@ -1,158 +0,0 @@
-From f44c70eb5368c0742a8f401ccf39f2ba7252f5a7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:24 +0100
-Subject: [PATCH 29/47] MIPS: ath79: rework IP2/IP3 interrupt handling
-
-The current implementation assumes that flushing the
-DDR writeback buffer is required for IP2/IP3 interrupts,
-however this is not true for all SoCs.
-
-Use SoC specific IP2/IP3 handlers instead of flushing
-the buffers in the dispatcher code.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3509/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/irq.c |   92 ++++++++++++++++++++++++++++++++++++++-----------
- 1 files changed, 72 insertions(+), 20 deletions(-)
-
---- a/arch/mips/ath79/irq.c
-+++ b/arch/mips/ath79/irq.c
-@@ -1,7 +1,7 @@
- /*
-  *  Atheros AR71xx/AR724x/AR913x specific interrupt handling
-  *
-- *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-  *  Parts of this file are based on Atheros' 2.6.15 BSP
-@@ -23,8 +23,8 @@
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include "common.h"
--static unsigned int ath79_ip2_flush_reg;
--static unsigned int ath79_ip3_flush_reg;
-+static void (*ath79_ip2_handler)(void);
-+static void (*ath79_ip3_handler)(void);
- static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
-@@ -152,10 +152,8 @@ asmlinkage void plat_irq_dispatch(void)
-       if (pending & STATUSF_IP7)
-               do_IRQ(ATH79_CPU_IRQ_TIMER);
--      else if (pending & STATUSF_IP2) {
--              ath79_ddr_wb_flush(ath79_ip2_flush_reg);
--              do_IRQ(ATH79_CPU_IRQ_IP2);
--      }
-+      else if (pending & STATUSF_IP2)
-+              ath79_ip2_handler();
-       else if (pending & STATUSF_IP4)
-               do_IRQ(ATH79_CPU_IRQ_GE0);
-@@ -163,10 +161,8 @@ asmlinkage void plat_irq_dispatch(void)
-       else if (pending & STATUSF_IP5)
-               do_IRQ(ATH79_CPU_IRQ_GE1);
--      else if (pending & STATUSF_IP3) {
--              ath79_ddr_wb_flush(ath79_ip3_flush_reg);
--              do_IRQ(ATH79_CPU_IRQ_USB);
--      }
-+      else if (pending & STATUSF_IP3)
-+              ath79_ip3_handler();
-       else if (pending & STATUSF_IP6)
-               do_IRQ(ATH79_CPU_IRQ_MISC);
-@@ -175,22 +171,78 @@ asmlinkage void plat_irq_dispatch(void)
-               spurious_interrupt();
- }
-+/*
-+ * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for
-+ * these devices typically allocate coherent DMA memory, however the
-+ * DMA controller may still have some unsynchronized data in the FIFO.
-+ * Issue a flush in the handlers to ensure that the driver sees
-+ * the update.
-+ */
-+static void ar71xx_ip2_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
-+static void ar724x_ip2_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE);
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
-+static void ar913x_ip2_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC);
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
-+static void ar933x_ip2_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC);
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
-+static void ar71xx_ip3_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
-+static void ar724x_ip3_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB);
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
-+static void ar913x_ip3_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB);
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
-+static void ar933x_ip3_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB);
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
- void __init arch_init_irq(void)
- {
-       if (soc_is_ar71xx()) {
--              ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
--              ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;
-+              ath79_ip2_handler = ar71xx_ip2_handler;
-+              ath79_ip3_handler = ar71xx_ip3_handler;
-       } else if (soc_is_ar724x()) {
--              ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
--              ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;
-+              ath79_ip2_handler = ar724x_ip2_handler;
-+              ath79_ip3_handler = ar724x_ip3_handler;
-       } else if (soc_is_ar913x()) {
--              ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
--              ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
-+              ath79_ip2_handler = ar913x_ip2_handler;
-+              ath79_ip3_handler = ar913x_ip3_handler;
-       } else if (soc_is_ar933x()) {
--              ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC;
--              ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB;
--      } else
-+              ath79_ip2_handler = ar933x_ip2_handler;
-+              ath79_ip3_handler = ar933x_ip3_handler;
-+      } else {
-               BUG();
-+      }
-       cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
-       mips_cpu_irq_init();
diff --git a/target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch
deleted file mode 100644 (file)
index 1268077..0000000
+++ /dev/null
@@ -1,194 +0,0 @@
-From b16fdecf14d24fe213c81409c0c2dca66d5b7bc9 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:25 +0100
-Subject: [PATCH 30/47] MIPS: ath79: add IRQ handling code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3510/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/irq.c                          |   55 +++++++++++++++++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   25 +++++++++++
- arch/mips/include/asm/mach-ath79/irq.h         |    6 ++-
- 3 files changed, 83 insertions(+), 3 deletions(-)
-
---- a/arch/mips/ath79/irq.c
-+++ b/arch/mips/ath79/irq.c
-@@ -1,10 +1,11 @@
- /*
-  *  Atheros AR71xx/AR724x/AR913x specific interrupt handling
-  *
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-- *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-@@ -129,7 +130,7 @@ static void __init ath79_misc_irq_init(v
-       if (soc_is_ar71xx() || soc_is_ar913x())
-               ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
--      else if (soc_is_ar724x() || soc_is_ar933x())
-+      else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x())
-               ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
-       else
-               BUG();
-@@ -143,6 +144,39 @@ static void __init ath79_misc_irq_init(v
-       irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
- }
-+static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
-+{
-+      u32 status;
-+
-+      disable_irq_nosync(irq);
-+
-+      status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
-+
-+      if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
-+              ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE);
-+              generic_handle_irq(ATH79_IP2_IRQ(0));
-+      } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) {
-+              ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC);
-+              generic_handle_irq(ATH79_IP2_IRQ(1));
-+      } else {
-+              spurious_interrupt();
-+      }
-+
-+      enable_irq(irq);
-+}
-+
-+static void ar934x_ip2_irq_init(void)
-+{
-+      int i;
-+
-+      for (i = ATH79_IP2_IRQ_BASE;
-+           i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
-+              irq_set_chip_and_handler(i, &dummy_irq_chip,
-+                                       handle_level_irq);
-+
-+      irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);
-+}
-+
- asmlinkage void plat_irq_dispatch(void)
- {
-       unsigned long pending;
-@@ -202,6 +236,11 @@ static void ar933x_ip2_handler(void)
-       do_IRQ(ATH79_CPU_IRQ_IP2);
- }
-+static void ar934x_ip2_handler(void)
-+{
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
- static void ar71xx_ip3_handler(void)
- {
-       ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);
-@@ -226,6 +265,12 @@ static void ar933x_ip3_handler(void)
-       do_IRQ(ATH79_CPU_IRQ_USB);
- }
-+static void ar934x_ip3_handler(void)
-+{
-+      ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB);
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
- void __init arch_init_irq(void)
- {
-       if (soc_is_ar71xx()) {
-@@ -240,6 +285,9 @@ void __init arch_init_irq(void)
-       } else if (soc_is_ar933x()) {
-               ath79_ip2_handler = ar933x_ip2_handler;
-               ath79_ip3_handler = ar933x_ip3_handler;
-+      } else if (soc_is_ar934x()) {
-+              ath79_ip2_handler = ar934x_ip2_handler;
-+              ath79_ip3_handler = ar934x_ip3_handler;
-       } else {
-               BUG();
-       }
-@@ -247,4 +295,7 @@ void __init arch_init_irq(void)
-       cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
-       mips_cpu_irq_init();
-       ath79_misc_irq_init();
-+
-+      if (soc_is_ar934x())
-+              ar934x_ip2_irq_init();
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -92,6 +92,12 @@
- #define AR933X_DDR_REG_FLUSH_USB      0x84
- #define AR933X_DDR_REG_FLUSH_WMAC     0x88
-+#define AR934X_DDR_REG_FLUSH_GE0      0x9c
-+#define AR934X_DDR_REG_FLUSH_GE1      0xa0
-+#define AR934X_DDR_REG_FLUSH_USB      0xa4
-+#define AR934X_DDR_REG_FLUSH_PCIE     0xa8
-+#define AR934X_DDR_REG_FLUSH_WMAC     0xac
-+
- /*
-  * PLL block
-  */
-@@ -222,6 +228,7 @@
- #define AR933X_RESET_REG_BOOTSTRAP            0xac
- #define AR934X_RESET_REG_BOOTSTRAP            0xb0
-+#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
- #define MISC_INT_ETHSW                        BIT(12)
- #define MISC_INT_TIMER4                       BIT(10)
-@@ -295,6 +302,24 @@
- #define AR934X_BOOTSTRAP_SDRAM_DISABLED       BIT(1)
- #define AR934X_BOOTSTRAP_DDR1         BIT(0)
-+#define AR934X_PCIE_WMAC_INT_WMAC_MISC                BIT(0)
-+#define AR934X_PCIE_WMAC_INT_WMAC_TX          BIT(1)
-+#define AR934X_PCIE_WMAC_INT_WMAC_RXLP                BIT(2)
-+#define AR934X_PCIE_WMAC_INT_WMAC_RXHP                BIT(3)
-+#define AR934X_PCIE_WMAC_INT_PCIE_RC          BIT(4)
-+#define AR934X_PCIE_WMAC_INT_PCIE_RC0         BIT(5)
-+#define AR934X_PCIE_WMAC_INT_PCIE_RC1         BIT(6)
-+#define AR934X_PCIE_WMAC_INT_PCIE_RC2         BIT(7)
-+#define AR934X_PCIE_WMAC_INT_PCIE_RC3         BIT(8)
-+#define AR934X_PCIE_WMAC_INT_WMAC_ALL \
-+      (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \
-+       AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP)
-+
-+#define AR934X_PCIE_WMAC_INT_PCIE_ALL \
-+      (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \
-+       AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
-+       AR934X_PCIE_WMAC_INT_PCIE_RC3)
-+
- #define REV_ID_MAJOR_MASK             0xfff0
- #define REV_ID_MAJOR_AR71XX           0x00a0
- #define REV_ID_MAJOR_AR913X           0x00b0
---- a/arch/mips/include/asm/mach-ath79/irq.h
-+++ b/arch/mips/include/asm/mach-ath79/irq.h
-@@ -10,7 +10,7 @@
- #define __ASM_MACH_ATH79_IRQ_H
- #define MIPS_CPU_IRQ_BASE     0
--#define NR_IRQS                       46
-+#define NR_IRQS                       48
- #define ATH79_MISC_IRQ_BASE   8
- #define ATH79_MISC_IRQ_COUNT  32
-@@ -19,6 +19,10 @@
- #define ATH79_PCI_IRQ_COUNT   6
- #define ATH79_PCI_IRQ(_x)     (ATH79_PCI_IRQ_BASE + (_x))
-+#define ATH79_IP2_IRQ_BASE    (ATH79_PCI_IRQ_BASE + ATH79_PCI_IRQ_COUNT)
-+#define ATH79_IP2_IRQ_COUNT   2
-+#define ATH79_IP2_IRQ(_x)     (ATH79_IP2_IRQ_BASE + (_x))
-+
- #define ATH79_CPU_IRQ_IP2     (MIPS_CPU_IRQ_BASE + 2)
- #define ATH79_CPU_IRQ_USB     (MIPS_CPU_IRQ_BASE + 3)
- #define ATH79_CPU_IRQ_GE0     (MIPS_CPU_IRQ_BASE + 4)
diff --git a/target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch b/target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch
deleted file mode 100644 (file)
index 14d4a27..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-From 98bfbb0b3f126d93076377fcd9553a493e45e304 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:26 +0100
-Subject: [PATCH 31/47] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3511/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/common.c                       |    9 ++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    1 +
- 2 files changed, 9 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/common.c
-+++ b/arch/mips/ath79/common.c
-@@ -1,9 +1,12 @@
- /*
-  *  Atheros AR71XX/AR724X/AR913X common routines
-  *
-- *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
-+ *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-  *  by the Free Software Foundation.
-@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask)
-               reg = AR913X_RESET_REG_RESET_MODULE;
-       else if (soc_is_ar933x())
-               reg = AR933X_RESET_REG_RESET_MODULE;
-+      else if (soc_is_ar934x())
-+              reg = AR934X_RESET_REG_RESET_MODULE;
-       else
-               BUG();
-@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask)
-               reg = AR913X_RESET_REG_RESET_MODULE;
-       else if (soc_is_ar933x())
-               reg = AR933X_RESET_REG_RESET_MODULE;
-+      else if (soc_is_ar934x())
-+              reg = AR934X_RESET_REG_RESET_MODULE;
-       else
-               BUG();
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -227,6 +227,7 @@
- #define AR933X_RESET_REG_RESET_MODULE         0x1c
- #define AR933X_RESET_REG_BOOTSTRAP            0xac
-+#define AR934X_RESET_REG_RESET_MODULE         0x1c
- #define AR934X_RESET_REG_BOOTSTRAP            0xb0
- #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
diff --git a/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch b/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch
deleted file mode 100644 (file)
index 2c7eeca..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From 2d4ed1c7405d05da812b67830eaac15f43b862b7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:27 +0100
-Subject: [PATCH 32/47] MIPS: ath79: register UART device for AR934X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3512/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/dev-common.c |    3 ++-
- 1 files changed, 2 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/dev-common.c
-+++ b/arch/mips/ath79/dev-common.c
-@@ -89,7 +89,8 @@ void __init ath79_register_uart(void)
-       if (soc_is_ar71xx() ||
-           soc_is_ar724x() ||
--          soc_is_ar913x()) {
-+          soc_is_ar913x() ||
-+          soc_is_ar934x()) {
-               ath79_uart_data[0].uartclk = clk_get_rate(clk);
-               platform_device_register(&ath79_uart_device);
-       } else if (soc_is_ar933x()) {
diff --git a/target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch
deleted file mode 100644 (file)
index adbe3e4..0000000
+++ /dev/null
@@ -1,116 +0,0 @@
-From d677877e2688813e5e0c12d0228a631021ed70c4 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:28 +0100
-Subject: [PATCH 33/47] MIPS: ath79: add WMAC registration code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3513/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig                        |    2 +-
- arch/mips/ath79/dev-wmac.c                     |   30 ++++++++++++++++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    3 ++
- 3 files changed, 32 insertions(+), 3 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -86,7 +86,7 @@ config ATH79_DEV_USB
-       def_bool n
- config ATH79_DEV_WMAC
--      depends on (SOC_AR913X || SOC_AR933X)
-+      depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
-       def_bool n
- endif
---- a/arch/mips/ath79/dev-wmac.c
-+++ b/arch/mips/ath79/dev-wmac.c
-@@ -1,9 +1,12 @@
- /*
-  *  Atheros AR913X/AR933X SoC built-in WMAC device support
-  *
-+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
-  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-  *
-+ *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
-+ *
-  *  This program is free software; you can redistribute it and/or modify it
-  *  under the terms of the GNU General Public License version 2 as published
-  *  by the Free Software Foundation.
-@@ -26,8 +29,7 @@ static struct resource ath79_wmac_resour
-               /* .start and .end fields are filled dynamically */
-               .flags  = IORESOURCE_MEM,
-       }, {
--              .start  = ATH79_CPU_IRQ_IP2,
--              .end    = ATH79_CPU_IRQ_IP2,
-+              /* .start and .end fields are filled dynamically */
-               .flags  = IORESOURCE_IRQ,
-       },
- };
-@@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(voi
-       ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
-       ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
-+      ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
-+      ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
- }
-@@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(voi
-       ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
-       ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
-+      ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
-+      ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
-       t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
-       if (t & AR933X_BOOTSTRAP_REF_CLK_40)
-@@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(voi
-       ath79_wmac_data.external_reset = ar933x_wmac_reset;
- }
-+static void ar934x_wmac_setup(void)
-+{
-+      u32 t;
-+
-+      ath79_wmac_device.name = "ar934x_wmac";
-+
-+      ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
-+      ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
-+      ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
-+      ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
-+
-+      t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
-+      if (t & AR934X_BOOTSTRAP_REF_CLK_40)
-+              ath79_wmac_data.is_clk_25mhz = false;
-+      else
-+              ath79_wmac_data.is_clk_25mhz = true;
-+}
-+
- void __init ath79_register_wmac(u8 *cal_data)
- {
-       if (soc_is_ar913x())
-               ar913x_wmac_setup();
-       else if (soc_is_ar933x())
-               ar933x_wmac_setup();
-+      else if (soc_is_ar934x())
-+              ar934x_wmac_setup();
-       else
-               BUG();
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -61,6 +61,9 @@
- #define AR933X_EHCI_BASE      0x1b000000
- #define AR933X_EHCI_SIZE      0x1000
-+#define AR934X_WMAC_BASE      (AR71XX_APB_BASE + 0x00100000)
-+#define AR934X_WMAC_SIZE      0x20000
-+
- /*
-  * DDR_CTRL block
-  */
diff --git a/target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch b/target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch
deleted file mode 100644 (file)
index 27a46e6..0000000
+++ /dev/null
@@ -1,66 +0,0 @@
-From 27a5b2948831f4fd8e66e2e1a98b4c23902728cc Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:29 +0100
-Subject: [PATCH 34/47] MIPS: ath79: add PCI_AR724X Kconfig symbol
-
-The AR724X specific PCI code can be used for the
-AR934X SoCs, however it can be selected only if
-SOC_AR724X is set.
-
-Introduce a new Kconfig symbol in order to be able
-to use the code for AR934X as well.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3514/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig                |    4 ++++
- arch/mips/include/asm/mach-ath79/pci.h |    2 +-
- arch/mips/pci/Makefile                 |    2 +-
- 3 files changed, 6 insertions(+), 2 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -59,6 +59,7 @@ config SOC_AR724X
-       select USB_ARCH_HAS_EHCI
-       select USB_ARCH_HAS_OHCI
-       select HW_HAS_PCI
-+      select PCI_AR724X if PCI
-       def_bool n
- config SOC_AR913X
-@@ -73,6 +74,9 @@ config SOC_AR934X
-       select USB_ARCH_HAS_EHCI
-       def_bool n
-+config PCI_AR724X
-+      def_bool n
-+
- config ATH79_DEV_GPIO_BUTTONS
-       def_bool n
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ b/arch/mips/include/asm/mach-ath79/pci.h
-@@ -19,7 +19,7 @@ int ar71xx_pcibios_init(void);
- static inline int ar71xx_pcibios_init(void) { return 0; }
- #endif
--#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
-+#if defined(CONFIG_PCI_AR724X)
- int ar724x_pcibios_init(int irq);
- #else
- static inline int ar724x_pcibios_init(int irq) { return 0; }
---- a/arch/mips/pci/Makefile
-+++ b/arch/mips/pci/Makefile
-@@ -20,7 +20,7 @@ obj-$(CONFIG_BCM63XX)                += pci-bcm63xx.o
-                                       ops-bcm63xx.o
- obj-$(CONFIG_MIPS_ALCHEMY)    += pci-alchemy.o
- obj-$(CONFIG_SOC_AR71XX)      += pci-ar71xx.o
--obj-$(CONFIG_SOC_AR724X)      += pci-ar724x.o
-+obj-$(CONFIG_PCI_AR724X)      += pci-ar724x.o
- #
- # These are still pretty much in the old state, watch, go blind.
diff --git a/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch
deleted file mode 100644 (file)
index bd9386d..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-From 902b348cdddd4c858993e02aced615aa6caf04d0 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 10:45:30 +0100
-Subject: [PATCH 35/47] MIPS: ath79: add PCI registration code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3516/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig |    2 ++
- arch/mips/ath79/pci.c   |   13 ++++++++++++-
- 2 files changed, 14 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -72,6 +72,8 @@ config SOC_AR933X
- config SOC_AR934X
-       select USB_ARCH_HAS_EHCI
-+      select HW_HAS_PCI
-+      select PCI_AR724X if PCI
-       def_bool n
- config PCI_AR724X
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -14,6 +14,7 @@
- #include <linux/init.h>
- #include <linux/pci.h>
-+#include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/irq.h>
- #include <asm/mach-ath79/pci.h>
-@@ -57,7 +58,9 @@ int __init pcibios_map_irq(const struct
-               if (soc_is_ar71xx()) {
-                       ath79_pci_irq_map = ar71xx_pci_irq_map;
-                       ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
--              } else if (soc_is_ar724x()) {
-+              } else if (soc_is_ar724x() ||
-+                         soc_is_ar9342() ||
-+                         soc_is_ar9344()) {
-                       ath79_pci_irq_map = ar724x_pci_irq_map;
-                       ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
-               } else {
-@@ -115,5 +118,13 @@ int __init ath79_register_pci(void)
-       if (soc_is_ar724x())
-               return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);
-+      if (soc_is_ar9342() || soc_is_ar9344()) {
-+              u32 bootstrap;
-+
-+              bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
-+              if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC)
-+                      return ar724x_pcibios_init(ATH79_IP2_IRQ(0));
-+      }
-+
-       return -ENODEV;
- }
diff --git a/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch b/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch
deleted file mode 100644 (file)
index 30c2c1b..0000000
+++ /dev/null
@@ -1,196 +0,0 @@
-From 4921cb7d9f6997b6f7aefd37c7cfd50324e8fd75 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Mar 2012 20:39:35 +0100
-Subject: [PATCH 36/47] MIPS: ath79: add initial support for the Atheros DB120 board
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
-Cc: linux-mips@linux-mips.org
-Cc: mcgrof@infradead.org
-Patchwork: https://patchwork.linux-mips.org/patch/3517/
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
----
- arch/mips/ath79/Kconfig      |   12 ++++
- arch/mips/ath79/Makefile     |    1 +
- arch/mips/ath79/mach-db120.c |  134 ++++++++++++++++++++++++++++++++++++++++++
- arch/mips/ath79/machtypes.h  |    1 +
- 4 files changed, 148 insertions(+), 0 deletions(-)
- create mode 100644 arch/mips/ath79/mach-db120.c
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -26,6 +26,18 @@ config ATH79_MACH_AP81
-         Say 'Y' here if you want your kernel to support the
-         Atheros AP81 reference board.
-+config ATH79_MACH_DB120
-+      bool "Atheros DB120 reference board"
-+      select SOC_AR934X
-+      select ATH79_DEV_GPIO_BUTTONS
-+      select ATH79_DEV_LEDS_GPIO
-+      select ATH79_DEV_SPI
-+      select ATH79_DEV_USB
-+      select ATH79_DEV_WMAC
-+      help
-+        Say 'Y' here if you want your kernel to support the
-+        Atheros DB120 reference board.
-+
- config ATH79_MACH_PB44
-       bool "Atheros PB44 reference board"
-       select SOC_AR71XX
---- a/arch/mips/ath79/Makefile
-+++ b/arch/mips/ath79/Makefile
-@@ -28,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC)         += dev-wma
- #
- obj-$(CONFIG_ATH79_MACH_AP121)                += mach-ap121.o
- obj-$(CONFIG_ATH79_MACH_AP81)         += mach-ap81.o
-+obj-$(CONFIG_ATH79_MACH_DB120)                += mach-db120.o
- obj-$(CONFIG_ATH79_MACH_PB44)         += mach-pb44.o
- obj-$(CONFIG_ATH79_MACH_UBNT_XM)      += mach-ubnt-xm.o
---- /dev/null
-+++ b/arch/mips/ath79/mach-db120.c
-@@ -0,0 +1,134 @@
-+/*
-+ * Atheros DB120 reference board support
-+ *
-+ * Copyright (c) 2011 Qualcomm Atheros
-+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include <linux/pci.h>
-+#include <linux/ath9k_platform.h>
-+
-+#include "machtypes.h"
-+#include "dev-gpio-buttons.h"
-+#include "dev-leds-gpio.h"
-+#include "dev-spi.h"
-+#include "dev-wmac.h"
-+#include "pci.h"
-+
-+#define DB120_GPIO_LED_WLAN_5G                12
-+#define DB120_GPIO_LED_WLAN_2G                13
-+#define DB120_GPIO_LED_STATUS         14
-+#define DB120_GPIO_LED_WPS            15
-+
-+#define DB120_GPIO_BTN_WPS            16
-+
-+#define DB120_KEYS_POLL_INTERVAL      20      /* msecs */
-+#define DB120_KEYS_DEBOUNCE_INTERVAL  (3 * DB120_KEYS_POLL_INTERVAL)
-+
-+#define DB120_WMAC_CALDATA_OFFSET 0x1000
-+#define DB120_PCIE_CALDATA_OFFSET 0x5000
-+
-+static struct gpio_led db120_leds_gpio[] __initdata = {
-+      {
-+              .name           = "db120:green:status",
-+              .gpio           = DB120_GPIO_LED_STATUS,
-+              .active_low     = 1,
-+      },
-+      {
-+              .name           = "db120:green:wps",
-+              .gpio           = DB120_GPIO_LED_WPS,
-+              .active_low     = 1,
-+      },
-+      {
-+              .name           = "db120:green:wlan-5g",
-+              .gpio           = DB120_GPIO_LED_WLAN_5G,
-+              .active_low     = 1,
-+      },
-+      {
-+              .name           = "db120:green:wlan-2g",
-+              .gpio           = DB120_GPIO_LED_WLAN_2G,
-+              .active_low     = 1,
-+      },
-+};
-+
-+static struct gpio_keys_button db120_gpio_keys[] __initdata = {
-+      {
-+              .desc           = "WPS button",
-+              .type           = EV_KEY,
-+              .code           = KEY_WPS_BUTTON,
-+              .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
-+              .gpio           = DB120_GPIO_BTN_WPS,
-+              .active_low     = 1,
-+      },
-+};
-+
-+static struct spi_board_info db120_spi_info[] = {
-+      {
-+              .bus_num        = 0,
-+              .chip_select    = 0,
-+              .max_speed_hz   = 25000000,
-+              .modalias       = "s25sl064a",
-+      }
-+};
-+
-+static struct ath79_spi_platform_data db120_spi_data = {
-+      .bus_num        = 0,
-+      .num_chipselect = 1,
-+};
-+
-+#ifdef CONFIG_PCI
-+static struct ath9k_platform_data db120_ath9k_data;
-+
-+static int db120_pci_plat_dev_init(struct pci_dev *dev)
-+{
-+      switch (PCI_SLOT(dev->devfn)) {
-+      case 0:
-+              dev->dev.platform_data = &db120_ath9k_data;
-+              break;
-+      }
-+
-+      return 0;
-+}
-+
-+static void __init db120_pci_init(u8 *eeprom)
-+{
-+      memcpy(db120_ath9k_data.eeprom_data, eeprom,
-+             sizeof(db120_ath9k_data.eeprom_data));
-+
-+      ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
-+      ath79_register_pci();
-+}
-+#else
-+static inline void db120_pci_init(void) {}
-+#endif /* CONFIG_PCI */
-+
-+static void __init db120_setup(void)
-+{
-+      u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
-+
-+      ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
-+                               db120_leds_gpio);
-+      ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
-+                                      ARRAY_SIZE(db120_gpio_keys),
-+                                      db120_gpio_keys);
-+      ath79_register_spi(&db120_spi_data, db120_spi_info,
-+                         ARRAY_SIZE(db120_spi_info));
-+      ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
-+      db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
-+}
-+
-+MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
-+           db120_setup);
---- a/arch/mips/ath79/machtypes.h
-+++ b/arch/mips/ath79/machtypes.h
-@@ -18,6 +18,7 @@ enum ath79_mach_type {
-       ATH79_MACH_GENERIC = 0,
-       ATH79_MACH_AP121,               /* Atheros AP121 reference board */
-       ATH79_MACH_AP81,                /* Atheros AP81 reference board */
-+      ATH79_MACH_DB120,               /* Atheros DB120 reference board */
-       ATH79_MACH_PB44,                /* Atheros PB44 reference board */
-       ATH79_MACH_UBNT_XM,             /* Ubiquiti Networks XM board rev 1.0 */
- };
diff --git a/target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch b/target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch
deleted file mode 100644 (file)
index 07ddb51..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-From fe0cc1327ddfb69b171102019a8148a9c8b352b8 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 28 Mar 2012 11:00:19 +0200
-Subject: [PATCH 37/47] MIPS: ath79: use correct IRQ number for the OHCI controller on AR7240
-
-The currently assigned IRQ number to the OHCI
-controller is incorrect for the AR7240 SoC, and
-that leads to the following error message from
-the OHCI driver:
-
-ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
-ath79-ohci ath79-ohci: Atheros built-in OHCI controller
-ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1
-ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000
-hub 1-0:1.0: USB hub found
-hub 1-0:1.0: 1 port detected
-usb 1-1: new full-speed USB device number 2 using ath79-ohci
-ath79-ohci ath79-ohci: Unlink after no-IRQ?  Controller is probably using the wrong IRQ.
-
-Fix this by using the correct IRQ number.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/dev-usb.c |    2 ++
- 1 files changed, 2 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/dev-usb.c
-+++ b/arch/mips/ath79/dev-usb.c
-@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void
-       ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
-       ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
-+      ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
-+      ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
-       platform_device_register(&ath79_ohci_device);
- }
diff --git a/target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch b/target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch
deleted file mode 100644 (file)
index 0def09f..0000000
+++ /dev/null
@@ -1,140 +0,0 @@
-From 30b15d9a4b05e38ae19e340b63e1a2bca917d557 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 28 Mar 2012 14:15:23 +0200
-Subject: [PATCH 38/47] MIPS: ath79: use a helper function for USB resource initialization
-
-This improves code readability, and ensures that
-all resource fields will be initialized correctly.
-Additionally, it helps to reduce the size of the
-kernel image by using uninitialized resource
-variables.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/dev-usb.c |   64 +++++++++++++++++++-------------------------
- 1 files changed, 28 insertions(+), 36 deletions(-)
-
---- a/arch/mips/ath79/dev-usb.c
-+++ b/arch/mips/ath79/dev-usb.c
-@@ -25,17 +25,7 @@
- #include "common.h"
- #include "dev-usb.h"
--static struct resource ath79_ohci_resources[] = {
--      [0] = {
--              /* .start and .end fields are filled dynamically */
--              .flags  = IORESOURCE_MEM,
--      },
--      [1] = {
--              .start  = ATH79_MISC_IRQ_OHCI,
--              .end    = ATH79_MISC_IRQ_OHCI,
--              .flags  = IORESOURCE_IRQ,
--      },
--};
-+static struct resource ath79_ohci_resources[2];
- static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
-@@ -54,17 +44,7 @@ static struct platform_device ath79_ohci
-       },
- };
--static struct resource ath79_ehci_resources[] = {
--      [0] = {
--              /* .start and .end fields are filled dynamically */
--              .flags  = IORESOURCE_MEM,
--      },
--      [1] = {
--              .start  = ATH79_CPU_IRQ_USB,
--              .end    = ATH79_CPU_IRQ_USB,
--              .flags  = IORESOURCE_IRQ,
--      },
--};
-+static struct resource ath79_ehci_resources[2];
- static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
-@@ -90,6 +70,20 @@ static struct platform_device ath79_ehci
-       },
- };
-+static void __init ath79_usb_init_resource(struct resource res[2],
-+                                         unsigned long base,
-+                                         unsigned long size,
-+                                         int irq)
-+{
-+      res[0].flags = IORESOURCE_MEM;
-+      res[0].start = base;
-+      res[0].end = base + size - 1;
-+
-+      res[1].flags = IORESOURCE_IRQ;
-+      res[1].start = irq;
-+      res[1].end = irq;
-+}
-+
- #define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \
-                                AR71XX_RESET_USB_PHY | \
-                                AR71XX_RESET_USB_OHCI_DLL)
-@@ -114,12 +108,12 @@ static void __init ath79_usb_setup(void)
-       mdelay(900);
--      ath79_ohci_resources[0].start = AR71XX_OHCI_BASE;
--      ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1;
-+      ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
-+                              AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI);
-       platform_device_register(&ath79_ohci_device);
--      ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
--      ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
-+      ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
-+                              AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
-       ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -143,10 +137,8 @@ static void __init ar7240_usb_setup(void
-       iounmap(usb_ctrl_base);
--      ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
--      ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
--      ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
--      ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
-+      ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
-+                              AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
-       platform_device_register(&ath79_ohci_device);
- }
-@@ -161,8 +153,8 @@ static void __init ar724x_usb_setup(void
-       ath79_device_reset_clear(AR724X_RESET_USB_PHY);
-       mdelay(10);
--      ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
--      ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
-+      ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
-+                              AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
-       ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -178,8 +170,8 @@ static void __init ar913x_usb_setup(void
-       ath79_device_reset_clear(AR913X_RESET_USB_PHY);
-       mdelay(10);
--      ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
--      ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
-+      ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
-+                              AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
-       ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
-@@ -195,8 +187,8 @@ static void __init ar933x_usb_setup(void
-       ath79_device_reset_clear(AR933X_RESET_USB_PHY);
-       mdelay(10);
--      ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
--      ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
-+      ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
-+                              AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
-       ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-       platform_device_register(&ath79_ehci_device);
- }
diff --git a/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch
deleted file mode 100644 (file)
index c77de28..0000000
+++ /dev/null
@@ -1,78 +0,0 @@
-From 635d5a2ac8aa483c3a0635c60bff8ea8978ff6a7 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 11 Dec 2011 18:34:13 +0100
-Subject: [PATCH 39/47] MIPS: ath79: add USB platform setup code for AR934X
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/dev-usb.c                      |   28 ++++++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    7 ++++++
- 2 files changed, 35 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/dev-usb.c
-+++ b/arch/mips/ath79/dev-usb.c
-@@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void
-       platform_device_register(&ath79_ehci_device);
- }
-+static void __init ar934x_usb_setup(void)
-+{
-+      u32 bootstrap;
-+
-+      bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
-+      if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
-+              return;
-+
-+      ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
-+      udelay(1000);
-+
-+      ath79_device_reset_clear(AR934X_RESET_USB_PHY);
-+      udelay(1000);
-+
-+      ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
-+      udelay(1000);
-+
-+      ath79_device_reset_clear(AR934X_RESET_USB_HOST);
-+      udelay(1000);
-+
-+      ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
-+                              AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
-+      ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
-+      platform_device_register(&ath79_ehci_device);
-+}
-+
- void __init ath79_register_usb(void)
- {
-       if (soc_is_ar71xx())
-@@ -205,6 +231,8 @@ void __init ath79_register_usb(void)
-               ar913x_usb_setup();
-       else if (soc_is_ar933x())
-               ar933x_usb_setup();
-+      else if (soc_is_ar934x())
-+              ar934x_usb_setup();
-       else
-               BUG();
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -63,6 +63,8 @@
- #define AR934X_WMAC_BASE      (AR71XX_APB_BASE + 0x00100000)
- #define AR934X_WMAC_SIZE      0x20000
-+#define AR934X_EHCI_BASE      0x1b000000
-+#define AR934X_EHCI_SIZE      0x200
- /*
-  * DDR_CTRL block
-@@ -288,6 +290,11 @@
- #define AR933X_RESET_USB_PHY          BIT(4)
- #define AR933X_RESET_USBSUS_OVERRIDE  BIT(3)
-+#define AR934X_RESET_USB_PHY_ANALOG   BIT(11)
-+#define AR934X_RESET_USB_HOST         BIT(5)
-+#define AR934X_RESET_USB_PHY          BIT(4)
-+#define AR934X_RESET_USBSUS_OVERRIDE  BIT(3)
-+
- #define AR933X_BOOTSTRAP_REF_CLK_40   BIT(0)
- #define AR934X_BOOTSTRAP_SW_OPTION8   BIT(23)
diff --git a/target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch b/target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch
deleted file mode 100644 (file)
index e82da3d..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-From 932c1688e960bff170f1fc8072b3d3e958407a60 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 13 Mar 2012 13:51:09 +0100
-Subject: [PATCH 40/47] MIPS: ath79: register USB host controller on the DB120 board
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/mach-db120.c |    2 ++
- 1 files changed, 2 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/mach-db120.c
-+++ b/arch/mips/ath79/mach-db120.c
-@@ -25,6 +25,7 @@
- #include "dev-gpio-buttons.h"
- #include "dev-leds-gpio.h"
- #include "dev-spi.h"
-+#include "dev-usb.h"
- #include "dev-wmac.h"
- #include "pci.h"
-@@ -126,6 +127,7 @@ static void __init db120_setup(void)
-                                       db120_gpio_keys);
-       ath79_register_spi(&db120_spi_data, db120_spi_info,
-                          ARRAY_SIZE(db120_spi_info));
-+      ath79_register_usb();
-       ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
-       db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
- }
diff --git a/target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch b/target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch
deleted file mode 100644 (file)
index cb6aa32..0000000
+++ /dev/null
@@ -1,49 +0,0 @@
-From 7328ff547389ee0b455cbf98bdfc819731d9f7b9 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Fri, 31 Aug 2012 14:22:35 +0200
-Subject: [PATCH] MIPS: ath79: use correct fractional dividers for
- {CPU,DDR}_PLL on AR934x
-
-The current dividers in the code are wrong and this
-leads to broken CPU frequency calculation on boards
-where the fractional part is used.
-
-For example, if the SoC is running from a 40MHz
-reference clock, refdiv=1, nint=14, outdiv=0 and
-nfrac=31 the real frequency is 579.375MHz but the
-current code calculates 569.687MHz instead.
-
-Because the system time is indirectly related to
-the CPU frequency the broken computation causes
-drift in the system time.
-
-The correct divider is 2^6 for the CPU PLL and 2^10
-for the DDR PLL. Use the correct values to fix the
-issue.
-
-Cc: <stable@vger.kernel.org>  [3.5+]
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/clock.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/mips/ath79/clock.c
-+++ b/arch/mips/ath79/clock.c
-@@ -189,7 +189,7 @@ static void __init ar934x_clocks_init(vo
-              AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
-       cpu_pll = nint * ath79_ref_clk.rate / ref_div;
--      cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6));
-+      cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6));
-       cpu_pll /= (1 << out_div);
-       pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
-@@ -203,7 +203,7 @@ static void __init ar934x_clocks_init(vo
-              AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
-       ddr_pll = nint * ath79_ref_clk.rate / ref_div;
--      ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10));
-+      ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10));
-       ddr_pll /= (1 << out_div);
-       clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
diff --git a/target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch b/target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch
deleted file mode 100644 (file)
index a2fa4db..0000000
+++ /dev/null
@@ -1,205 +0,0 @@
-From 3f735e202d5099a5b7c621443bea365b87b0e3bb Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sat, 8 Sep 2012 12:12:50 +0200
-Subject: [PATCH] MIPS: ath79: fix CPU/DDR frequency calculation for SRIF PLLs
-
-Besides the CPU and DDR PLLs, the CPU and DDR frequencies
-can be derived from other PLLs in the SRIF block on the
-AR934x SoCs. The current code does not checks if the SRIF
-PLLs are used and this can lead to incorrectly calculated
-CPU/DDR frequencies.
-
-Fix it by calculating the frequencies from SRIF PLLs if
-those are used on a given board.
-
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
-This depends on the following patch:
-'MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x'
-https://patchwork.linux-mips.org/patch/4305/
-
- arch/mips/ath79/clock.c                        |  109 ++++++++++++++++++------
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   23 +++++
- 2 files changed, 104 insertions(+), 28 deletions(-)
-
---- a/arch/mips/ath79/clock.c
-+++ b/arch/mips/ath79/clock.c
-@@ -17,6 +17,8 @@
- #include <linux/err.h>
- #include <linux/clk.h>
-+#include <asm/div64.h>
-+
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include "common.h"
-@@ -166,11 +168,34 @@ static void __init ar933x_clocks_init(vo
-       ath79_uart_clk.rate = ath79_ref_clk.rate;
- }
-+static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,
-+                                    u32 frac, u32 out_div)
-+{
-+      u64 t;
-+      u32 ret;
-+
-+      t = ath79_ref_clk.rate;
-+      t *= nint;
-+      do_div(t, ref_div);
-+      ret = t;
-+
-+      t = ath79_ref_clk.rate;
-+      t *= nfrac;
-+      do_div(t, ref_div * frac);
-+      ret += t;
-+
-+      ret /= (1 << out_div);
-+      return ret;
-+}
-+
- static void __init ar934x_clocks_init(void)
- {
--      u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
-+      u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;
-       u32 cpu_pll, ddr_pll;
-       u32 bootstrap;
-+      void __iomem *dpll_base;
-+
-+      dpll_base = ioremap(AR934X_SRIF_BASE, AR934X_SRIF_SIZE);
-       bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
-       if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40)
-@@ -178,33 +203,59 @@ static void __init ar934x_clocks_init(vo
-       else
-               ath79_ref_clk.rate = 25 * 1000 * 1000;
--      pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
--      out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
--                AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
--      ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
--                AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
--      nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
--             AR934X_PLL_CPU_CONFIG_NINT_MASK;
--      frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
--             AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
--
--      cpu_pll = nint * ath79_ref_clk.rate / ref_div;
--      cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6));
--      cpu_pll /= (1 << out_div);
--
--      pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
--      out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
--                AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
--      ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
--                AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
--      nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
--             AR934X_PLL_DDR_CONFIG_NINT_MASK;
--      frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
--             AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
--
--      ddr_pll = nint * ath79_ref_clk.rate / ref_div;
--      ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10));
--      ddr_pll /= (1 << out_div);
-+      pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG);
-+      if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
-+              out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
-+                        AR934X_SRIF_DPLL2_OUTDIV_MASK;
-+              pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL1_REG);
-+              nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
-+                     AR934X_SRIF_DPLL1_NINT_MASK;
-+              nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
-+              ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
-+                        AR934X_SRIF_DPLL1_REFDIV_MASK;
-+              frac = 1 << 18;
-+      } else {
-+              pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
-+              out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-+                      AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
-+              ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-+                        AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
-+              nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
-+                     AR934X_PLL_CPU_CONFIG_NINT_MASK;
-+              nfrac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-+                      AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
-+              frac = 1 << 6;
-+      }
-+
-+      cpu_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint,
-+                                    nfrac, frac, out_div);
-+
-+      pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG);
-+      if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
-+              out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
-+                        AR934X_SRIF_DPLL2_OUTDIV_MASK;
-+              pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG);
-+              nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
-+                     AR934X_SRIF_DPLL1_NINT_MASK;
-+              nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
-+              ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
-+                        AR934X_SRIF_DPLL1_REFDIV_MASK;
-+              frac = 1 << 18;
-+      } else {
-+              pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
-+              out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-+                        AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
-+              ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-+                         AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
-+              nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
-+                     AR934X_PLL_DDR_CONFIG_NINT_MASK;
-+              nfrac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-+                      AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
-+              frac = 1 << 10;
-+      }
-+
-+      ddr_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint,
-+                                    nfrac, frac, out_div);
-       clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
-@@ -240,6 +291,8 @@ static void __init ar934x_clocks_init(vo
-       ath79_wdt_clk.rate = ath79_ref_clk.rate;
-       ath79_uart_clk.rate = ath79_ref_clk.rate;
-+
-+      iounmap(dpll_base);
- }
- void __init ath79_clocks_init(void)
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -65,6 +65,8 @@
- #define AR934X_WMAC_SIZE      0x20000
- #define AR934X_EHCI_BASE      0x1b000000
- #define AR934X_EHCI_SIZE      0x200
-+#define AR934X_SRIF_BASE      (AR71XX_APB_BASE + 0x00116000)
-+#define AR934X_SRIF_SIZE      0x1000
- /*
-  * DDR_CTRL block
-@@ -405,4 +407,25 @@
- #define AR933X_GPIO_COUNT             30
- #define AR934X_GPIO_COUNT             23
-+/*
-+ * SRIF block
-+ */
-+#define AR934X_SRIF_CPU_DPLL1_REG     0x1c0
-+#define AR934X_SRIF_CPU_DPLL2_REG     0x1c4
-+#define AR934X_SRIF_CPU_DPLL3_REG     0x1c8
-+
-+#define AR934X_SRIF_DDR_DPLL1_REG     0x240
-+#define AR934X_SRIF_DDR_DPLL2_REG     0x244
-+#define AR934X_SRIF_DDR_DPLL3_REG     0x248
-+
-+#define AR934X_SRIF_DPLL1_REFDIV_SHIFT        27
-+#define AR934X_SRIF_DPLL1_REFDIV_MASK 0x1f
-+#define AR934X_SRIF_DPLL1_NINT_SHIFT  18
-+#define AR934X_SRIF_DPLL1_NINT_MASK   0x1ff
-+#define AR934X_SRIF_DPLL1_NFRAC_MASK  0x0003ffff
-+
-+#define AR934X_SRIF_DPLL2_LOCAL_PLL   BIT(30)
-+#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT        13
-+#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
-+
- #endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch b/target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch
deleted file mode 100644 (file)
index a05b1e7..0000000
+++ /dev/null
@@ -1,78 +0,0 @@
-From 9cfa64ddaba49975b420ce5e5020efc3301061ac Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 26 Jun 2012 10:19:46 +0200
-Subject: [PATCH 01/34] MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module
-
-If the controller has no PCIe module attached,
-accessing of the device configuration space
-causes a data bus error. Avoid this by checking
-the status of the PCIe link in advance, and
-indicate an error if the link is down.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar724x.c |   22 ++++++++++++++++++++++
- 1 files changed, 22 insertions(+), 0 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -23,9 +23,12 @@
- #define AR724X_PCI_MEM_BASE   0x10000000
- #define AR724X_PCI_MEM_SIZE   0x08000000
-+#define AR724X_PCI_REG_RESET          0x18
- #define AR724X_PCI_REG_INT_STATUS     0x4c
- #define AR724X_PCI_REG_INT_MASK               0x50
-+#define AR724X_PCI_RESET_LINK_UP      BIT(0)
-+
- #define AR724X_PCI_INT_DEV0           BIT(14)
- #define AR724X_PCI_IRQ_COUNT          1
-@@ -38,6 +41,15 @@ static void __iomem *ar724x_pci_ctrl_bas
- static u32 ar724x_pci_bar0_value;
- static bool ar724x_pci_bar0_is_cached;
-+static bool ar724x_pci_link_up;
-+
-+static inline bool ar724x_pci_check_link(void)
-+{
-+      u32 reset;
-+
-+      reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET);
-+      return reset & AR724X_PCI_RESET_LINK_UP;
-+}
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
-@@ -46,6 +58,9 @@ static int ar724x_pci_read(struct pci_bu
-       void __iomem *base;
-       u32 data;
-+      if (!ar724x_pci_link_up)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -96,6 +111,9 @@ static int ar724x_pci_write(struct pci_b
-       u32 data;
-       int s;
-+      if (!ar724x_pci_link_up)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-@@ -280,6 +298,10 @@ int __init ar724x_pcibios_init(int irq)
-       if (ar724x_pci_ctrl_base == NULL)
-               goto err_unmap_devcfg;
-+      ar724x_pci_link_up = ar724x_pci_check_link();
-+      if (!ar724x_pci_link_up)
-+              pr_warn("ar724x: PCIe link is down\n");
-+
-       ar724x_pci_irq_init(irq);
-       register_pci_controller(&ar724x_pci_controller);
diff --git a/target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch b/target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch
deleted file mode 100644 (file)
index d409a7a..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-From 4b0f8aaea1f9e2f931c4de785d9ce46ff7164627 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 17 Jun 2012 12:55:24 +0200
-Subject: [PATCH 02/34] MIPS: pci-ar724x: use correct value for AR724X_PCI_MEM_SIZE
-
-The current definiton is wrong, it is conflicting
-with AR724X_PCI_CFG_BASE.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar724x.c |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -21,7 +21,7 @@
- #define AR724X_PCI_CTRL_SIZE  0x100
- #define AR724X_PCI_MEM_BASE   0x10000000
--#define AR724X_PCI_MEM_SIZE   0x08000000
-+#define AR724X_PCI_MEM_SIZE   0x04000000
- #define AR724X_PCI_REG_RESET          0x18
- #define AR724X_PCI_REG_INT_STATUS     0x4c
diff --git a/target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch b/target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch
deleted file mode 100644 (file)
index 7fb56f8..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-From 01dbfe17b8ff628b6e2b3c75e1fc8c11d4cca644 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Thu, 28 Jun 2012 19:19:58 +0200
-Subject: [PATCH 03/34] MIPS: pci-ar71xx: fix AR71XX_PCI_MEM_SIZE
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar71xx.c |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -24,7 +24,7 @@
- #include <asm/mach-ath79/pci.h>
- #define AR71XX_PCI_MEM_BASE   0x10000000
--#define AR71XX_PCI_MEM_SIZE   0x08000000
-+#define AR71XX_PCI_MEM_SIZE   0x07000000
- #define AR71XX_PCI_WIN0_OFFS          0x10000000
- #define AR71XX_PCI_WIN1_OFFS          0x11000000
diff --git a/target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch b/target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch
deleted file mode 100644 (file)
index fd98689..0000000
+++ /dev/null
@@ -1,94 +0,0 @@
-From f2d2d928c3900b67a5f95e53b86de5b61a3ab12c Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 11 Jun 2012 13:19:44 +0200
-Subject: [PATCH 04/34] MIPS: pci-ar724x: convert to a platform driver
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar724x.c |   57 ++++++++++++++++++++++++++++++++++++++++++-
- 1 files changed, 55 insertions(+), 2 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -11,6 +11,8 @@
- #include <linux/irq.h>
- #include <linux/pci.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/pci.h>
-@@ -262,7 +264,7 @@ static struct irq_chip ar724x_pci_irq_ch
-       .irq_mask_ack   = ar724x_pci_irq_mask,
- };
--static void __init ar724x_pci_irq_init(int irq)
-+static void __devinit ar724x_pci_irq_init(int irq)
- {
-       void __iomem *base;
-       int i;
-@@ -282,7 +284,7 @@ static void __init ar724x_pci_irq_init(i
-       irq_set_chained_handler(irq, ar724x_pci_irq_handler);
- }
--int __init ar724x_pcibios_init(int irq)
-+int __devinit ar724x_pcibios_init(int irq)
- {
-       int ret;
-@@ -312,3 +314,54 @@ err_unmap_devcfg:
- err:
-       return ret;
- }
-+
-+static int __devinit ar724x_pci_probe(struct platform_device *pdev)
-+{
-+      struct resource *res;
-+      int irq;
-+
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      ar724x_pci_ctrl_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (ar724x_pci_ctrl_base == NULL)
-+              return -EBUSY;
-+
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      ar724x_pci_devcfg_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (!ar724x_pci_devcfg_base)
-+              return -EBUSY;
-+
-+      irq = platform_get_irq(pdev, 0);
-+      if (irq < 0)
-+              return -EINVAL;
-+
-+      ar724x_pci_link_up = ar724x_pci_check_link();
-+      if (!ar724x_pci_link_up)
-+              dev_warn(&pdev->dev, "PCIe link is down\n");
-+
-+      ar724x_pci_irq_init(irq);
-+
-+      register_pci_controller(&ar724x_pci_controller);
-+
-+      return 0;
-+}
-+
-+static struct platform_driver ar724x_pci_driver = {
-+      .probe = ar724x_pci_probe,
-+      .driver = {
-+              .name = "ar724x-pci",
-+              .owner = THIS_MODULE,
-+      },
-+};
-+
-+static int __init ar724x_pci_init(void)
-+{
-+      return platform_driver_register(&ar724x_pci_driver);
-+}
-+
-+postcore_initcall(ar724x_pci_init);
diff --git a/target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch b/target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch
deleted file mode 100644 (file)
index a78469b..0000000
+++ /dev/null
@@ -1,104 +0,0 @@
-From d1a22e73f991145a4abd7d0c37bcf318703c89ed Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 11 Jun 2012 13:24:55 +0200
-Subject: [PATCH 05/34] MIPS: pci-ar71xx: convert to a platform driver
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar71xx.c |   60 +++++++++++++++++++++++++++++++++++++++++---
- 1 files changed, 56 insertions(+), 4 deletions(-)
-
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -18,6 +18,8 @@
- #include <linux/pci.h>
- #include <linux/pci_regs.h>
- #include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
-@@ -309,7 +311,7 @@ static struct irq_chip ar71xx_pci_irq_ch
-       .irq_mask_ack   = ar71xx_pci_irq_mask,
- };
--static __init void ar71xx_pci_irq_init(void)
-+static __devinit void ar71xx_pci_irq_init(int irq)
- {
-       void __iomem *base = ath79_reset_base;
-       int i;
-@@ -324,10 +326,10 @@ static __init void ar71xx_pci_irq_init(v
-               irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
-                                        handle_level_irq);
--      irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
-+      irq_set_chained_handler(irq, ar71xx_pci_irq_handler);
- }
--static __init void ar71xx_pci_reset(void)
-+static __devinit void ar71xx_pci_reset(void)
- {
-       void __iomem *ddr_base = ath79_ddr_base;
-@@ -367,9 +369,59 @@ __init int ar71xx_pcibios_init(void)
-       /* clear bus errors */
-       ar71xx_pci_check_error(1);
--      ar71xx_pci_irq_init();
-+      ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
-       register_pci_controller(&ar71xx_pci_controller);
-       return 0;
- }
-+
-+static int __devinit ar71xx_pci_probe(struct platform_device *pdev)
-+{
-+      struct resource *res;
-+      int irq;
-+      u32 t;
-+
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (!ar71xx_pcicfg_base)
-+              return -ENOMEM;
-+
-+      irq = platform_get_irq(pdev, 0);
-+      if (irq < 0)
-+              return -EINVAL;
-+
-+      ar71xx_pci_reset();
-+
-+      /* setup COMMAND register */
-+      t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
-+        | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
-+      ar71xx_pci_local_write(PCI_COMMAND, 4, t);
-+
-+      /* clear bus errors */
-+      ar71xx_pci_check_error(1);
-+
-+      ar71xx_pci_irq_init(irq);
-+
-+      register_pci_controller(&ar71xx_pci_controller);
-+
-+      return 0;
-+}
-+
-+static struct platform_driver ar71xx_pci_driver = {
-+      .probe = ar71xx_pci_probe,
-+      .driver = {
-+              .name = "ar71xx-pci",
-+              .owner = THIS_MODULE,
-+      },
-+};
-+
-+static int __init ar71xx_pci_init(void)
-+{
-+      return platform_driver_register(&ar71xx_pci_driver);
-+}
-+
-+postcore_initcall(ar71xx_pci_init);
diff --git a/target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch b/target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch
deleted file mode 100644 (file)
index 4861db0..0000000
+++ /dev/null
@@ -1,94 +0,0 @@
-From c3a8b5fa196cedc4b940c1e5ec482dd875aa3180 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 11 Jun 2012 13:38:06 +0200
-Subject: [PATCH 06/34] MIPS: ath79: move global PCI defines into a common header
-
-The constants will be used by a subsequent patch.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   24 ++++++++++++++++++++++++
- arch/mips/pci/pci-ar71xx.c                     |   16 ----------------
- arch/mips/pci/pci-ar724x.c                     |    8 --------
- 3 files changed, 24 insertions(+), 24 deletions(-)
-
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -41,11 +41,35 @@
- #define AR71XX_RESET_BASE     (AR71XX_APB_BASE + 0x00060000)
- #define AR71XX_RESET_SIZE     0x100
-+#define AR71XX_PCI_MEM_BASE   0x10000000
-+#define AR71XX_PCI_MEM_SIZE   0x07000000
-+
-+#define AR71XX_PCI_WIN0_OFFS  0x10000000
-+#define AR71XX_PCI_WIN1_OFFS  0x11000000
-+#define AR71XX_PCI_WIN2_OFFS  0x12000000
-+#define AR71XX_PCI_WIN3_OFFS  0x13000000
-+#define AR71XX_PCI_WIN4_OFFS  0x14000000
-+#define AR71XX_PCI_WIN5_OFFS  0x15000000
-+#define AR71XX_PCI_WIN6_OFFS  0x16000000
-+#define AR71XX_PCI_WIN7_OFFS  0x07000000
-+
-+#define AR71XX_PCI_CFG_BASE   \
-+      (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
-+#define AR71XX_PCI_CFG_SIZE   0x100
-+
- #define AR7240_USB_CTRL_BASE  (AR71XX_APB_BASE + 0x00030000)
- #define AR7240_USB_CTRL_SIZE  0x100
- #define AR7240_OHCI_BASE      0x1b000000
- #define AR7240_OHCI_SIZE      0x1000
-+#define AR724X_PCI_MEM_BASE   0x10000000
-+#define AR724X_PCI_MEM_SIZE   0x04000000
-+
-+#define AR724X_PCI_CFG_BASE   0x14000000
-+#define AR724X_PCI_CFG_SIZE   0x1000
-+#define AR724X_PCI_CTRL_BASE  (AR71XX_APB_BASE + 0x000f0000)
-+#define AR724X_PCI_CTRL_SIZE  0x100
-+
- #define AR724X_EHCI_BASE      0x1b000000
- #define AR724X_EHCI_SIZE      0x1000
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -25,22 +25,6 @@
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/pci.h>
--#define AR71XX_PCI_MEM_BASE   0x10000000
--#define AR71XX_PCI_MEM_SIZE   0x07000000
--
--#define AR71XX_PCI_WIN0_OFFS          0x10000000
--#define AR71XX_PCI_WIN1_OFFS          0x11000000
--#define AR71XX_PCI_WIN2_OFFS          0x12000000
--#define AR71XX_PCI_WIN3_OFFS          0x13000000
--#define AR71XX_PCI_WIN4_OFFS          0x14000000
--#define AR71XX_PCI_WIN5_OFFS          0x15000000
--#define AR71XX_PCI_WIN6_OFFS          0x16000000
--#define AR71XX_PCI_WIN7_OFFS          0x07000000
--
--#define AR71XX_PCI_CFG_BASE           \
--      (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
--#define AR71XX_PCI_CFG_SIZE           0x100
--
- #define AR71XX_PCI_REG_CRP_AD_CBE     0x00
- #define AR71XX_PCI_REG_CRP_WRDATA     0x04
- #define AR71XX_PCI_REG_CRP_RDDATA     0x08
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -17,14 +17,6 @@
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/pci.h>
--#define AR724X_PCI_CFG_BASE   0x14000000
--#define AR724X_PCI_CFG_SIZE   0x1000
--#define AR724X_PCI_CTRL_BASE  (AR71XX_APB_BASE + 0x000f0000)
--#define AR724X_PCI_CTRL_SIZE  0x100
--
--#define AR724X_PCI_MEM_BASE   0x10000000
--#define AR724X_PCI_MEM_SIZE   0x04000000
--
- #define AR724X_PCI_REG_RESET          0x18
- #define AR724X_PCI_REG_INT_STATUS     0x4c
- #define AR724X_PCI_REG_INT_MASK               0x50
diff --git a/target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch b/target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch
deleted file mode 100644 (file)
index cc2572f..0000000
+++ /dev/null
@@ -1,119 +0,0 @@
-From 2fdf8dcff3ffaa806e9f9d7f1c1bd876222cff4d Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 11 Jun 2012 13:39:32 +0200
-Subject: [PATCH 07/34] MIPS: ath79: register platform devices for the PCI controllers
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/pci.c |   87 +++++++++++++++++++++++++++++++++++++++++++-----
- 1 files changed, 78 insertions(+), 9 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -14,6 +14,8 @@
- #include <linux/init.h>
- #include <linux/pci.h>
-+#include <linux/resource.h>
-+#include <linux/platform_device.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/irq.h>
-@@ -110,21 +112,88 @@ void __init ath79_pci_set_plat_dev_init(
-       ath79_pci_plat_dev_init = func;
- }
--int __init ath79_register_pci(void)
-+static struct platform_device *
-+ath79_register_pci_ar71xx(void)
- {
--      if (soc_is_ar71xx())
--              return ar71xx_pcibios_init();
-+      struct platform_device *pdev;
-+      struct resource res[2];
-+
-+      memset(res, 0, sizeof(res));
--      if (soc_is_ar724x())
--              return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);
-+      res[0].name = "cfg_base";
-+      res[0].flags = IORESOURCE_MEM;
-+      res[0].start = AR71XX_PCI_CFG_BASE;
-+      res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;
-+
-+      res[1].flags = IORESOURCE_IRQ;
-+      res[1].start = ATH79_CPU_IRQ_IP2;
-+      res[1].end = ATH79_CPU_IRQ_IP2;
-+
-+      pdev = platform_device_register_simple("ar71xx-pci", -1,
-+                                             res, ARRAY_SIZE(res));
-+      return pdev;
-+}
--      if (soc_is_ar9342() || soc_is_ar9344()) {
-+static struct platform_device *
-+ath79_register_pci_ar724x(int id,
-+                        unsigned long cfg_base,
-+                        unsigned long ctrl_base,
-+                        int irq)
-+{
-+      struct platform_device *pdev;
-+      struct resource res[3];
-+
-+      memset(res, 0, sizeof(res));
-+
-+      res[0].name = "cfg_base";
-+      res[0].flags = IORESOURCE_MEM;
-+      res[0].start = cfg_base;
-+      res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1;
-+
-+      res[1].name = "ctrl_base";
-+      res[1].flags = IORESOURCE_MEM;
-+      res[1].start = ctrl_base;
-+      res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1;
-+
-+      res[2].flags = IORESOURCE_IRQ;
-+      res[2].start = irq;
-+      res[2].end = irq;
-+
-+      pdev = platform_device_register_simple("ar724x-pci", id,
-+                                             res, ARRAY_SIZE(res));
-+      return pdev;
-+}
-+
-+int __init ath79_register_pci(void)
-+{
-+      struct platform_device *pdev = NULL;
-+
-+      if (soc_is_ar71xx()) {
-+              pdev = ath79_register_pci_ar71xx();
-+      } else if (soc_is_ar724x()) {
-+              pdev = ath79_register_pci_ar724x(-1,
-+                                               AR724X_PCI_CFG_BASE,
-+                                               AR724X_PCI_CTRL_BASE,
-+                                               ATH79_CPU_IRQ_IP2);
-+      } else if (soc_is_ar9342() ||
-+                 soc_is_ar9344()) {
-               u32 bootstrap;
-               bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
--              if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC)
--                      return ar724x_pcibios_init(ATH79_IP2_IRQ(0));
-+              if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0)
-+                      return -ENODEV;
-+
-+              pdev = ath79_register_pci_ar724x(-1,
-+                                               AR724X_PCI_CFG_BASE,
-+                                               AR724X_PCI_CTRL_BASE,
-+                                               ATH79_IP2_IRQ(0));
-+      } else {
-+              /* No PCI support */
-+              return -ENODEV;
-       }
--      return -ENODEV;
-+      if (!pdev)
-+              pr_err("unable to register PCI controller device\n");
-+
-+      return pdev ? 0 : -ENODEV;
- }
diff --git a/target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch b/target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch
deleted file mode 100644 (file)
index 0157e34..0000000
+++ /dev/null
@@ -1,147 +0,0 @@
-From 07224e2fa5f889162ee0560c6ab1eb8cd16a8dd2 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 11 Jun 2012 14:59:39 +0200
-Subject: [PATCH 08/34] MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
-
-The functions are unused now, so remove them.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/pci.c                  |    1 -
- arch/mips/include/asm/mach-ath79/pci.h |   28 ----------------------------
- arch/mips/pci/pci-ar71xx.c             |   26 --------------------------
- arch/mips/pci/pci-ar724x.c             |   32 --------------------------------
- 4 files changed, 0 insertions(+), 87 deletions(-)
- delete mode 100644 arch/mips/include/asm/mach-ath79/pci.h
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -19,7 +19,6 @@
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/irq.h>
--#include <asm/mach-ath79/pci.h>
- #include "pci.h"
- static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
---- a/arch/mips/include/asm/mach-ath79/pci.h
-+++ /dev/null
-@@ -1,28 +0,0 @@
--/*
-- *  Atheros AR71XX/AR724X PCI support
-- *
-- *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
-- *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
-- *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-- *
-- *  This program is free software; you can redistribute it and/or modify it
-- *  under the terms of the GNU General Public License version 2 as published
-- *  by the Free Software Foundation.
-- */
--
--#ifndef __ASM_MACH_ATH79_PCI_H
--#define __ASM_MACH_ATH79_PCI_H
--
--#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
--int ar71xx_pcibios_init(void);
--#else
--static inline int ar71xx_pcibios_init(void) { return 0; }
--#endif
--
--#if defined(CONFIG_PCI_AR724X)
--int ar724x_pcibios_init(int irq);
--#else
--static inline int ar724x_pcibios_init(int irq) { return 0; }
--#endif
--
--#endif /* __ASM_MACH_ATH79_PCI_H */
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -23,7 +23,6 @@
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
--#include <asm/mach-ath79/pci.h>
- #define AR71XX_PCI_REG_CRP_AD_CBE     0x00
- #define AR71XX_PCI_REG_CRP_WRDATA     0x04
-@@ -335,31 +334,6 @@ static __devinit void ar71xx_pci_reset(v
-       mdelay(100);
- }
--__init int ar71xx_pcibios_init(void)
--{
--      u32 t;
--
--      ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE);
--      if (ar71xx_pcicfg_base == NULL)
--              return -ENOMEM;
--
--      ar71xx_pci_reset();
--
--      /* setup COMMAND register */
--      t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
--        | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
--      ar71xx_pci_local_write(PCI_COMMAND, 4, t);
--
--      /* clear bus errors */
--      ar71xx_pci_check_error(1);
--
--      ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
--
--      register_pci_controller(&ar71xx_pci_controller);
--
--      return 0;
--}
--
- static int __devinit ar71xx_pci_probe(struct platform_device *pdev)
- {
-       struct resource *res;
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -15,7 +15,6 @@
- #include <linux/platform_device.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
--#include <asm/mach-ath79/pci.h>
- #define AR724X_PCI_REG_RESET          0x18
- #define AR724X_PCI_REG_INT_STATUS     0x4c
-@@ -276,37 +275,6 @@ static void __devinit ar724x_pci_irq_ini
-       irq_set_chained_handler(irq, ar724x_pci_irq_handler);
- }
--int __devinit ar724x_pcibios_init(int irq)
--{
--      int ret;
--
--      ret = -ENOMEM;
--
--      ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
--                                       AR724X_PCI_CFG_SIZE);
--      if (ar724x_pci_devcfg_base == NULL)
--              goto err;
--
--      ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE,
--                                     AR724X_PCI_CTRL_SIZE);
--      if (ar724x_pci_ctrl_base == NULL)
--              goto err_unmap_devcfg;
--
--      ar724x_pci_link_up = ar724x_pci_check_link();
--      if (!ar724x_pci_link_up)
--              pr_warn("ar724x: PCIe link is down\n");
--
--      ar724x_pci_irq_init(irq);
--      register_pci_controller(&ar724x_pci_controller);
--
--      return PCIBIOS_SUCCESSFUL;
--
--err_unmap_devcfg:
--      iounmap(ar724x_pci_devcfg_base);
--err:
--      return ret;
--}
--
- static int __devinit ar724x_pci_probe(struct platform_device *pdev)
- {
-       struct resource *res;
diff --git a/target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch b/target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch
deleted file mode 100644 (file)
index fc1385f..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-From a018b28d3953a32008de839d997a992a724ae314 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 17:40:45 +0200
-Subject: [PATCH 09/34] MIPS: avoid possible resource conflict in register_pci_controller
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci.c |   15 +++++++++++++--
- 1 files changed, 13 insertions(+), 2 deletions(-)
-
---- a/arch/mips/pci/pci.c
-+++ b/arch/mips/pci/pci.c
-@@ -127,9 +127,20 @@ static DEFINE_MUTEX(pci_scan_mutex);
- void __devinit register_pci_controller(struct pci_controller *hose)
- {
--      if (request_resource(&iomem_resource, hose->mem_resource) < 0)
-+      struct resource *parent;
-+
-+      parent = hose->mem_resource->parent;
-+      if (!parent)
-+              parent = &iomem_resource;
-+
-+      if (request_resource(parent, hose->mem_resource) < 0)
-               goto out;
--      if (request_resource(&ioport_resource, hose->io_resource) < 0) {
-+
-+      parent = hose->io_resource->parent;
-+      if (!parent)
-+              parent = &ioport_resource;
-+
-+      if (request_resource(parent, hose->io_resource) < 0) {
-               release_resource(hose->mem_resource);
-               goto out;
-       }
diff --git a/target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch b/target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch
deleted file mode 100644 (file)
index 3a67cae..0000000
+++ /dev/null
@@ -1,307 +0,0 @@
-From 242aedf3246dc5085271aca56134ac455bfb64b5 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 11:51:34 +0200
-Subject: [PATCH 10/34] MIPS: pci-ar724x: use dynamically allocated PCI controller structure
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar724x.c |  129 ++++++++++++++++++++++++++++----------------
- 1 files changed, 82 insertions(+), 47 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -9,6 +9,7 @@
-  *  by the Free Software Foundation.
-  */
-+#include <linux/spinlock.h>
- #include <linux/irq.h>
- #include <linux/pci.h>
- #include <linux/module.h>
-@@ -28,38 +29,56 @@
- #define AR7240_BAR0_WAR_VALUE 0xffff
--static DEFINE_SPINLOCK(ar724x_pci_lock);
--static void __iomem *ar724x_pci_devcfg_base;
--static void __iomem *ar724x_pci_ctrl_base;
--
--static u32 ar724x_pci_bar0_value;
--static bool ar724x_pci_bar0_is_cached;
--static bool ar724x_pci_link_up;
-+struct ar724x_pci_controller {
-+      void __iomem *devcfg_base;
-+      void __iomem *ctrl_base;
--static inline bool ar724x_pci_check_link(void)
-+      int irq;
-+
-+      bool link_up;
-+      bool bar0_is_cached;
-+      u32  bar0_value;
-+
-+      spinlock_t lock;
-+
-+      struct pci_controller pci_controller;
-+};
-+
-+static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
- {
-       u32 reset;
--      reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET);
-+      reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
-       return reset & AR724X_PCI_RESET_LINK_UP;
- }
-+static inline struct ar724x_pci_controller *
-+pci_bus_to_ar724x_controller(struct pci_bus *bus)
-+{
-+      struct pci_controller *hose;
-+
-+      hose = (struct pci_controller *) bus->sysdata;
-+      return container_of(hose, struct ar724x_pci_controller, pci_controller);
-+}
-+
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
-+      struct ar724x_pci_controller *apc;
-       unsigned long flags;
-       void __iomem *base;
-       u32 data;
--      if (!ar724x_pci_link_up)
-+      apc = pci_bus_to_ar724x_controller(bus);
-+      if (!apc->link_up)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-       if (devfn)
-               return PCIBIOS_DEVICE_NOT_FOUND;
--      base = ar724x_pci_devcfg_base;
-+      base = apc->devcfg_base;
--      spin_lock_irqsave(&ar724x_pci_lock, flags);
-+      spin_lock_irqsave(&apc->lock, flags);
-       data = __raw_readl(base + (where & ~3));
-       switch (size) {
-@@ -78,17 +97,17 @@ static int ar724x_pci_read(struct pci_bu
-       case 4:
-               break;
-       default:
--              spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-+              spin_unlock_irqrestore(&apc->lock, flags);
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-       }
--      spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-+      spin_unlock_irqrestore(&apc->lock, flags);
-       if (where == PCI_BASE_ADDRESS_0 && size == 4 &&
--          ar724x_pci_bar0_is_cached) {
-+          apc->bar0_is_cached) {
-               /* use the cached value */
--              *value = ar724x_pci_bar0_value;
-+              *value = apc->bar0_value;
-       } else {
-               *value = data;
-       }
-@@ -99,12 +118,14 @@ static int ar724x_pci_read(struct pci_bu
- static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
-                            int size, uint32_t value)
- {
-+      struct ar724x_pci_controller *apc;
-       unsigned long flags;
-       void __iomem *base;
-       u32 data;
-       int s;
--      if (!ar724x_pci_link_up)
-+      apc = pci_bus_to_ar724x_controller(bus);
-+      if (!apc->link_up)
-               return PCIBIOS_DEVICE_NOT_FOUND;
-       if (devfn)
-@@ -122,18 +143,18 @@ static int ar724x_pci_write(struct pci_b
-                        * BAR0 register in order to make the device memory
-                        * accessible.
-                        */
--                      ar724x_pci_bar0_is_cached = true;
--                      ar724x_pci_bar0_value = value;
-+                      apc->bar0_is_cached = true;
-+                      apc->bar0_value = value;
-                       value = AR7240_BAR0_WAR_VALUE;
-               } else {
--                      ar724x_pci_bar0_is_cached = false;
-+                      apc->bar0_is_cached = false;
-               }
-       }
--      base = ar724x_pci_devcfg_base;
-+      base = apc->devcfg_base;
--      spin_lock_irqsave(&ar724x_pci_lock, flags);
-+      spin_lock_irqsave(&apc->lock, flags);
-       data = __raw_readl(base + (where & ~3));
-       switch (size) {
-@@ -151,7 +172,7 @@ static int ar724x_pci_write(struct pci_b
-               data = value;
-               break;
-       default:
--              spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-+              spin_unlock_irqrestore(&apc->lock, flags);
-               return PCIBIOS_BAD_REGISTER_NUMBER;
-       }
-@@ -159,7 +180,7 @@ static int ar724x_pci_write(struct pci_b
-       __raw_writel(data, base + (where & ~3));
-       /* flush write */
-       __raw_readl(base + (where & ~3));
--      spin_unlock_irqrestore(&ar724x_pci_lock, flags);
-+      spin_unlock_irqrestore(&apc->lock, flags);
-       return PCIBIOS_SUCCESSFUL;
- }
-@@ -183,18 +204,14 @@ static struct resource ar724x_mem_resour
-       .flags  = IORESOURCE_MEM,
- };
--static struct pci_controller ar724x_pci_controller = {
--      .pci_ops        = &ar724x_pci_ops,
--      .io_resource    = &ar724x_io_resource,
--      .mem_resource   = &ar724x_mem_resource,
--};
--
- static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
-+      struct ar724x_pci_controller *apc;
-       void __iomem *base;
-       u32 pending;
--      base = ar724x_pci_ctrl_base;
-+      apc = irq_get_handler_data(irq);
-+      base = apc->ctrl_base;
-       pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
-                 __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-@@ -208,10 +225,12 @@ static void ar724x_pci_irq_handler(unsig
- static void ar724x_pci_irq_unmask(struct irq_data *d)
- {
-+      struct ar724x_pci_controller *apc;
-       void __iomem *base;
-       u32 t;
--      base = ar724x_pci_ctrl_base;
-+      apc = irq_data_get_irq_chip_data(d);
-+      base = apc->ctrl_base;
-       switch (d->irq) {
-       case ATH79_PCI_IRQ(0):
-@@ -225,10 +244,12 @@ static void ar724x_pci_irq_unmask(struct
- static void ar724x_pci_irq_mask(struct irq_data *d)
- {
-+      struct ar724x_pci_controller *apc;
-       void __iomem *base;
-       u32 t;
--      base = ar724x_pci_ctrl_base;
-+      apc = irq_data_get_irq_chip_data(d);
-+      base = apc->ctrl_base;
-       switch (d->irq) {
-       case ATH79_PCI_IRQ(0):
-@@ -255,12 +276,12 @@ static struct irq_chip ar724x_pci_irq_ch
-       .irq_mask_ack   = ar724x_pci_irq_mask,
- };
--static void __devinit ar724x_pci_irq_init(int irq)
-+static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
- {
-       void __iomem *base;
-       int i;
--      base = ar724x_pci_ctrl_base;
-+      base = apc->ctrl_base;
-       __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
-       __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
-@@ -268,45 +289,59 @@ static void __devinit ar724x_pci_irq_ini
-       BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT);
-       for (i = ATH79_PCI_IRQ_BASE;
--           i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++)
-+           i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) {
-               irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
-                                        handle_level_irq);
-+              irq_set_chip_data(i, apc);
-+      }
--      irq_set_chained_handler(irq, ar724x_pci_irq_handler);
-+      irq_set_handler_data(apc->irq, apc);
-+      irq_set_chained_handler(apc->irq, ar724x_pci_irq_handler);
- }
- static int __devinit ar724x_pci_probe(struct platform_device *pdev)
- {
-+      struct ar724x_pci_controller *apc;
-       struct resource *res;
--      int irq;
-+
-+      apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
-+                          GFP_KERNEL);
-+      if (!apc)
-+              return -ENOMEM;
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl_base");
-       if (!res)
-               return -EINVAL;
--      ar724x_pci_ctrl_base = devm_request_and_ioremap(&pdev->dev, res);
--      if (ar724x_pci_ctrl_base == NULL)
-+      apc->ctrl_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (apc->ctrl_base == NULL)
-               return -EBUSY;
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
-       if (!res)
-               return -EINVAL;
--      ar724x_pci_devcfg_base = devm_request_and_ioremap(&pdev->dev, res);
--      if (!ar724x_pci_devcfg_base)
-+      apc->devcfg_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (!apc->devcfg_base)
-               return -EBUSY;
--      irq = platform_get_irq(pdev, 0);
--      if (irq < 0)
-+      apc->irq = platform_get_irq(pdev, 0);
-+      if (apc->irq < 0)
-               return -EINVAL;
--      ar724x_pci_link_up = ar724x_pci_check_link();
--      if (!ar724x_pci_link_up)
-+      spin_lock_init(&apc->lock);
-+
-+      apc->pci_controller.pci_ops = &ar724x_pci_ops;
-+      apc->pci_controller.io_resource = &ar724x_io_resource;
-+      apc->pci_controller.mem_resource = &ar724x_mem_resource;
-+
-+      apc->link_up = ar724x_pci_check_link(apc);
-+      if (!apc->link_up)
-               dev_warn(&pdev->dev, "PCIe link is down\n");
--      ar724x_pci_irq_init(irq);
-+      ar724x_pci_irq_init(apc);
--      register_pci_controller(&ar724x_pci_controller);
-+      register_pci_controller(&apc->pci_controller);
-       return 0;
- }
diff --git a/target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch b/target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch
deleted file mode 100644 (file)
index 698b2ae..0000000
+++ /dev/null
@@ -1,131 +0,0 @@
-From f1c3a7dadf7b77809cda7f77df4b1ba3b24fbfa3 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 27 Jun 2012 10:12:50 +0200
-Subject: [PATCH 11/34] MIPS: pci-ar724x: remove static PCI resources
-
-Get those from the platform device instead.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/pci.c      |   21 ++++++++++++++++++++-
- arch/mips/pci/pci-ar724x.c |   40 ++++++++++++++++++++++++----------------
- 2 files changed, 44 insertions(+), 17 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -137,10 +137,13 @@ static struct platform_device *
- ath79_register_pci_ar724x(int id,
-                         unsigned long cfg_base,
-                         unsigned long ctrl_base,
-+                        unsigned long mem_base,
-+                        unsigned long mem_size,
-+                        unsigned long io_base,
-                         int irq)
- {
-       struct platform_device *pdev;
--      struct resource res[3];
-+      struct resource res[5];
-       memset(res, 0, sizeof(res));
-@@ -158,6 +161,16 @@ ath79_register_pci_ar724x(int id,
-       res[2].start = irq;
-       res[2].end = irq;
-+      res[3].name = "mem_base";
-+      res[3].flags = IORESOURCE_MEM;
-+      res[3].start = mem_base;
-+      res[3].end = mem_base + mem_size - 1;
-+
-+      res[4].name = "io_base";
-+      res[4].flags = IORESOURCE_IO;
-+      res[4].start = io_base;
-+      res[4].end = io_base;
-+
-       pdev = platform_device_register_simple("ar724x-pci", id,
-                                              res, ARRAY_SIZE(res));
-       return pdev;
-@@ -173,6 +186,9 @@ int __init ath79_register_pci(void)
-               pdev = ath79_register_pci_ar724x(-1,
-                                                AR724X_PCI_CFG_BASE,
-                                                AR724X_PCI_CTRL_BASE,
-+                                               AR724X_PCI_MEM_BASE,
-+                                               AR724X_PCI_MEM_SIZE,
-+                                               0,
-                                                ATH79_CPU_IRQ_IP2);
-       } else if (soc_is_ar9342() ||
-                  soc_is_ar9344()) {
-@@ -185,6 +201,9 @@ int __init ath79_register_pci(void)
-               pdev = ath79_register_pci_ar724x(-1,
-                                                AR724X_PCI_CFG_BASE,
-                                                AR724X_PCI_CTRL_BASE,
-+                                               AR724X_PCI_MEM_BASE,
-+                                               AR724X_PCI_MEM_SIZE,
-+                                               0,
-                                                ATH79_IP2_IRQ(0));
-       } else {
-               /* No PCI support */
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -42,6 +42,8 @@ struct ar724x_pci_controller {
-       spinlock_t lock;
-       struct pci_controller pci_controller;
-+      struct resource io_res;
-+      struct resource mem_res;
- };
- static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
-@@ -190,20 +192,6 @@ static struct pci_ops ar724x_pci_ops = {
-       .write  = ar724x_pci_write,
- };
--static struct resource ar724x_io_resource = {
--      .name   = "PCI IO space",
--      .start  = 0,
--      .end    = 0,
--      .flags  = IORESOURCE_IO,
--};
--
--static struct resource ar724x_mem_resource = {
--      .name   = "PCI memory space",
--      .start  = AR724X_PCI_MEM_BASE,
--      .end    = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
--      .flags  = IORESOURCE_MEM,
--};
--
- static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
-       struct ar724x_pci_controller *apc;
-@@ -331,9 +319,29 @@ static int __devinit ar724x_pci_probe(st
-       spin_lock_init(&apc->lock);
-+      res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      apc->io_res.parent = res;
-+      apc->io_res.name = "PCI IO space";
-+      apc->io_res.start = res->start;
-+      apc->io_res.end = res->end;
-+      apc->io_res.flags = IORESOURCE_IO;
-+
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      apc->mem_res.parent = res;
-+      apc->mem_res.name = "PCI memory space";
-+      apc->mem_res.start = res->start;
-+      apc->mem_res.end = res->end;
-+      apc->mem_res.flags = IORESOURCE_MEM;
-+
-       apc->pci_controller.pci_ops = &ar724x_pci_ops;
--      apc->pci_controller.io_resource = &ar724x_io_resource;
--      apc->pci_controller.mem_resource = &ar724x_mem_resource;
-+      apc->pci_controller.io_resource = &apc->io_res;
-+      apc->pci_controller.mem_resource = &apc->mem_res;
-       apc->link_up = ar724x_pci_check_link(apc);
-       if (!apc->link_up)
diff --git a/target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch b/target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch
deleted file mode 100644 (file)
index 5b690ab..0000000
+++ /dev/null
@@ -1,110 +0,0 @@
-From d258929cd4c8c495f619f0e66d9d1c23f3f9246f Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 26 Jun 2012 11:59:45 +0200
-Subject: [PATCH 12/34] MIPS: pci-ar724x: use per-controller IRQ base
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar724x.c |   31 +++++++++++++++++++++----------
- 1 files changed, 21 insertions(+), 10 deletions(-)
-
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -34,6 +34,7 @@ struct ar724x_pci_controller {
-       void __iomem *ctrl_base;
-       int irq;
-+      int irq_base;
-       bool link_up;
-       bool bar0_is_cached;
-@@ -205,7 +206,7 @@ static void ar724x_pci_irq_handler(unsig
-                 __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-       if (pending & AR724X_PCI_INT_DEV0)
--              generic_handle_irq(ATH79_PCI_IRQ(0));
-+              generic_handle_irq(apc->irq_base + 0);
-       else
-               spurious_interrupt();
-@@ -215,13 +216,15 @@ static void ar724x_pci_irq_unmask(struct
- {
-       struct ar724x_pci_controller *apc;
-       void __iomem *base;
-+      int offset;
-       u32 t;
-       apc = irq_data_get_irq_chip_data(d);
-       base = apc->ctrl_base;
-+      offset = apc->irq_base - d->irq;
--      switch (d->irq) {
--      case ATH79_PCI_IRQ(0):
-+      switch (offset) {
-+      case 0:
-               t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-               __raw_writel(t | AR724X_PCI_INT_DEV0,
-                            base + AR724X_PCI_REG_INT_MASK);
-@@ -234,13 +237,15 @@ static void ar724x_pci_irq_mask(struct i
- {
-       struct ar724x_pci_controller *apc;
-       void __iomem *base;
-+      int offset;
-       u32 t;
-       apc = irq_data_get_irq_chip_data(d);
-       base = apc->ctrl_base;
-+      offset = apc->irq_base - d->irq;
--      switch (d->irq) {
--      case ATH79_PCI_IRQ(0):
-+      switch (offset) {
-+      case 0:
-               t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
-               __raw_writel(t & ~AR724X_PCI_INT_DEV0,
-                            base + AR724X_PCI_REG_INT_MASK);
-@@ -264,7 +269,8 @@ static struct irq_chip ar724x_pci_irq_ch
-       .irq_mask_ack   = ar724x_pci_irq_mask,
- };
--static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
-+static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
-+                                        int id)
- {
-       void __iomem *base;
-       int i;
-@@ -274,10 +280,10 @@ static void __devinit ar724x_pci_irq_ini
-       __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
-       __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
--      BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT);
-+      apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
--      for (i = ATH79_PCI_IRQ_BASE;
--           i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) {
-+      for (i = apc->irq_base;
-+           i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
-               irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
-                                        handle_level_irq);
-               irq_set_chip_data(i, apc);
-@@ -291,6 +297,11 @@ static int __devinit ar724x_pci_probe(st
- {
-       struct ar724x_pci_controller *apc;
-       struct resource *res;
-+      int id;
-+
-+      id = pdev->id;
-+      if (id == -1)
-+              id = 0;
-       apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
-                           GFP_KERNEL);
-@@ -347,7 +358,7 @@ static int __devinit ar724x_pci_probe(st
-       if (!apc->link_up)
-               dev_warn(&pdev->dev, "PCIe link is down\n");
--      ar724x_pci_irq_init(apc);
-+      ar724x_pci_irq_init(apc, id);
-       register_pci_controller(&apc->pci_controller);
diff --git a/target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch b/target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch
deleted file mode 100644 (file)
index 38c43bc..0000000
+++ /dev/null
@@ -1,165 +0,0 @@
-From 93824983ceb36d4ce1f4a644031ec6fb5f332f1d Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 26 Jun 2012 15:14:47 +0200
-Subject: [PATCH 13/34] MIPS: pci-ar724x: setup command register of the PCI controller
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/pci.c                          |   10 +++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 +
- arch/mips/pci/pci-ar724x.c                     |   63 ++++++++++++++++++++++++
- 3 files changed, 74 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -137,13 +137,14 @@ static struct platform_device *
- ath79_register_pci_ar724x(int id,
-                         unsigned long cfg_base,
-                         unsigned long ctrl_base,
-+                        unsigned long crp_base,
-                         unsigned long mem_base,
-                         unsigned long mem_size,
-                         unsigned long io_base,
-                         int irq)
- {
-       struct platform_device *pdev;
--      struct resource res[5];
-+      struct resource res[6];
-       memset(res, 0, sizeof(res));
-@@ -171,6 +172,11 @@ ath79_register_pci_ar724x(int id,
-       res[4].start = io_base;
-       res[4].end = io_base;
-+      res[5].name = "crp_base";
-+      res[5].flags = IORESOURCE_MEM;
-+      res[5].start = crp_base;
-+      res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;
-+
-       pdev = platform_device_register_simple("ar724x-pci", id,
-                                              res, ARRAY_SIZE(res));
-       return pdev;
-@@ -186,6 +192,7 @@ int __init ath79_register_pci(void)
-               pdev = ath79_register_pci_ar724x(-1,
-                                                AR724X_PCI_CFG_BASE,
-                                                AR724X_PCI_CTRL_BASE,
-+                                               AR724X_PCI_CRP_BASE,
-                                                AR724X_PCI_MEM_BASE,
-                                                AR724X_PCI_MEM_SIZE,
-                                                0,
-@@ -201,6 +208,7 @@ int __init ath79_register_pci(void)
-               pdev = ath79_register_pci_ar724x(-1,
-                                                AR724X_PCI_CFG_BASE,
-                                                AR724X_PCI_CTRL_BASE,
-+                                               AR724X_PCI_CRP_BASE,
-                                                AR724X_PCI_MEM_BASE,
-                                                AR724X_PCI_MEM_SIZE,
-                                                0,
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -67,6 +67,8 @@
- #define AR724X_PCI_CFG_BASE   0x14000000
- #define AR724X_PCI_CFG_SIZE   0x1000
-+#define AR724X_PCI_CRP_BASE   (AR71XX_APB_BASE + 0x000c0000)
-+#define AR724X_PCI_CRP_SIZE   0x1000
- #define AR724X_PCI_CTRL_BASE  (AR71XX_APB_BASE + 0x000f0000)
- #define AR724X_PCI_CTRL_SIZE  0x100
---- a/arch/mips/pci/pci-ar724x.c
-+++ b/arch/mips/pci/pci-ar724x.c
-@@ -29,9 +29,17 @@
- #define AR7240_BAR0_WAR_VALUE 0xffff
-+#define AR724X_PCI_CMD_INIT   (PCI_COMMAND_MEMORY |           \
-+                               PCI_COMMAND_MASTER |           \
-+                               PCI_COMMAND_INVALIDATE |       \
-+                               PCI_COMMAND_PARITY |           \
-+                               PCI_COMMAND_SERR |             \
-+                               PCI_COMMAND_FAST_BACK)
-+
- struct ar724x_pci_controller {
-       void __iomem *devcfg_base;
-       void __iomem *ctrl_base;
-+      void __iomem *crp_base;
-       int irq;
-       int irq_base;
-@@ -64,6 +72,51 @@ pci_bus_to_ar724x_controller(struct pci_
-       return container_of(hose, struct ar724x_pci_controller, pci_controller);
- }
-+static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
-+                                int where, int size, u32 value)
-+{
-+      unsigned long flags;
-+      void __iomem *base;
-+      u32 data;
-+      int s;
-+
-+      WARN_ON(where & (size - 1));
-+
-+      if (!apc->link_up)
-+              return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+      base = apc->crp_base;
-+
-+      spin_lock_irqsave(&apc->lock, flags);
-+      data = __raw_readl(base + (where & ~3));
-+
-+      switch (size) {
-+      case 1:
-+              s = ((where & 3) * 8);
-+              data &= ~(0xff << s);
-+              data |= ((value & 0xff) << s);
-+              break;
-+      case 2:
-+              s = ((where & 2) * 8);
-+              data &= ~(0xffff << s);
-+              data |= ((value & 0xffff) << s);
-+              break;
-+      case 4:
-+              data = value;
-+              break;
-+      default:
-+              spin_unlock_irqrestore(&apc->lock, flags);
-+              return PCIBIOS_BAD_REGISTER_NUMBER;
-+      }
-+
-+      __raw_writel(data, base + (where & ~3));
-+      /* flush write */
-+      __raw_readl(base + (where & ~3));
-+      spin_unlock_irqrestore(&apc->lock, flags);
-+
-+      return PCIBIOS_SUCCESSFUL;
-+}
-+
- static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
-                           int size, uint32_t *value)
- {
-@@ -324,6 +377,14 @@ static int __devinit ar724x_pci_probe(st
-       if (!apc->devcfg_base)
-               return -EBUSY;
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "crp_base");
-+      if (!res)
-+              return -EINVAL;
-+
-+      apc->crp_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (apc->crp_base == NULL)
-+              return -EBUSY;
-+
-       apc->irq = platform_get_irq(pdev, 0);
-       if (apc->irq < 0)
-               return -EINVAL;
-@@ -360,6 +421,8 @@ static int __devinit ar724x_pci_probe(st
-       ar724x_pci_irq_init(apc, id);
-+      ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT);
-+
-       register_pci_controller(&apc->pci_controller);
-       return 0;
diff --git a/target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch b/target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch
deleted file mode 100644 (file)
index 4db1fd9..0000000
+++ /dev/null
@@ -1,228 +0,0 @@
-From 6c3ef689e4364dca74eaaecd72384be09e5a6bc8 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 25 Jun 2012 09:19:08 +0200
-Subject: [PATCH 14/34] MIPS: pci-ar71xx: use dynamically allocated PCI controller structure
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar71xx.c |   84 +++++++++++++++++++++++++++----------------
- 1 files changed, 53 insertions(+), 31 deletions(-)
-
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -20,6 +20,7 @@
- #include <linux/interrupt.h>
- #include <linux/module.h>
- #include <linux/platform_device.h>
-+#include <linux/slab.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include <asm/mach-ath79/ath79.h>
-@@ -48,8 +49,12 @@
- #define AR71XX_PCI_IRQ_COUNT          5
--static DEFINE_SPINLOCK(ar71xx_pci_lock);
--static void __iomem *ar71xx_pcicfg_base;
-+struct ar71xx_pci_controller {
-+      void __iomem *cfg_base;
-+      spinlock_t lock;
-+      int irq;
-+      struct pci_controller pci_ctrl;
-+};
- /* Byte lane enable bits */
- static const u8 ar71xx_pci_ble_table[4][4] = {
-@@ -92,9 +97,18 @@ static inline u32 ar71xx_pci_bus_addr(st
-       return ret;
- }
--static int ar71xx_pci_check_error(int quiet)
-+static inline struct ar71xx_pci_controller *
-+pci_bus_to_ar71xx_controller(struct pci_bus *bus)
- {
--      void __iomem *base = ar71xx_pcicfg_base;
-+      struct pci_controller *hose;
-+
-+      hose = (struct pci_controller *) bus->sysdata;
-+      return container_of(hose, struct ar71xx_pci_controller, pci_ctrl);
-+}
-+
-+static int ar71xx_pci_check_error(struct ar71xx_pci_controller *apc, int quiet)
-+{
-+      void __iomem *base = apc->cfg_base;
-       u32 pci_err;
-       u32 ahb_err;
-@@ -129,9 +143,10 @@ static int ar71xx_pci_check_error(int qu
-       return !!(ahb_err | pci_err);
- }
--static inline void ar71xx_pci_local_write(int where, int size, u32 value)
-+static inline void ar71xx_pci_local_write(struct ar71xx_pci_controller *apc,
-+                                        int where, int size, u32 value)
- {
--      void __iomem *base = ar71xx_pcicfg_base;
-+      void __iomem *base = apc->cfg_base;
-       u32 ad_cbe;
-       value = value << (8 * (where & 3));
-@@ -147,7 +162,8 @@ static inline int ar71xx_pci_set_cfgaddr
-                                        unsigned int devfn,
-                                        int where, int size, u32 cmd)
- {
--      void __iomem *base = ar71xx_pcicfg_base;
-+      struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
-+      void __iomem *base = apc->cfg_base;
-       u32 addr;
-       addr = ar71xx_pci_bus_addr(bus, devfn, where);
-@@ -156,13 +172,14 @@ static inline int ar71xx_pci_set_cfgaddr
-       __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0),
-                    base + AR71XX_PCI_REG_CFG_CBE);
--      return ar71xx_pci_check_error(1);
-+      return ar71xx_pci_check_error(apc, 1);
- }
- static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
-                                 int where, int size, u32 *value)
- {
--      void __iomem *base = ar71xx_pcicfg_base;
-+      struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
-+      void __iomem *base = apc->cfg_base;
-       unsigned long flags;
-       u32 data;
-       int err;
-@@ -171,7 +188,7 @@ static int ar71xx_pci_read_config(struct
-       ret = PCIBIOS_SUCCESSFUL;
-       data = ~0;
--      spin_lock_irqsave(&ar71xx_pci_lock, flags);
-+      spin_lock_irqsave(&apc->lock, flags);
-       err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
-                                    AR71XX_PCI_CFG_CMD_READ);
-@@ -180,7 +197,7 @@ static int ar71xx_pci_read_config(struct
-       else
-               data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
--      spin_unlock_irqrestore(&ar71xx_pci_lock, flags);
-+      spin_unlock_irqrestore(&apc->lock, flags);
-       *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7];
-@@ -190,7 +207,8 @@ static int ar71xx_pci_read_config(struct
- static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
-                                  int where, int size, u32 value)
- {
--      void __iomem *base = ar71xx_pcicfg_base;
-+      struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
-+      void __iomem *base = apc->cfg_base;
-       unsigned long flags;
-       int err;
-       int ret;
-@@ -198,7 +216,7 @@ static int ar71xx_pci_write_config(struc
-       value = value << (8 * (where & 3));
-       ret = PCIBIOS_SUCCESSFUL;
--      spin_lock_irqsave(&ar71xx_pci_lock, flags);
-+      spin_lock_irqsave(&apc->lock, flags);
-       err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
-                                    AR71XX_PCI_CFG_CMD_WRITE);
-@@ -207,7 +225,7 @@ static int ar71xx_pci_write_config(struc
-       else
-               __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);
--      spin_unlock_irqrestore(&ar71xx_pci_lock, flags);
-+      spin_unlock_irqrestore(&apc->lock, flags);
-       return ret;
- }
-@@ -231,12 +249,6 @@ static struct resource ar71xx_pci_mem_re
-       .flags          = IORESOURCE_MEM
- };
--static struct pci_controller ar71xx_pci_controller = {
--      .pci_ops        = &ar71xx_pci_ops,
--      .mem_resource   = &ar71xx_pci_mem_resource,
--      .io_resource    = &ar71xx_pci_io_resource,
--};
--
- static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
-       void __iomem *base = ath79_reset_base;
-@@ -294,7 +306,7 @@ static struct irq_chip ar71xx_pci_irq_ch
-       .irq_mask_ack   = ar71xx_pci_irq_mask,
- };
--static __devinit void ar71xx_pci_irq_init(int irq)
-+static __devinit void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
- {
-       void __iomem *base = ath79_reset_base;
-       int i;
-@@ -309,7 +321,7 @@ static __devinit void ar71xx_pci_irq_ini
-               irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
-                                        handle_level_irq);
--      irq_set_chained_handler(irq, ar71xx_pci_irq_handler);
-+      irq_set_chained_handler(apc->irq, ar71xx_pci_irq_handler);
- }
- static __devinit void ar71xx_pci_reset(void)
-@@ -336,20 +348,26 @@ static __devinit void ar71xx_pci_reset(v
- static int __devinit ar71xx_pci_probe(struct platform_device *pdev)
- {
-+      struct ar71xx_pci_controller *apc;
-       struct resource *res;
--      int irq;
-       u32 t;
-+      apc = kzalloc(sizeof(struct ar71xx_pci_controller), GFP_KERNEL);
-+      if (!apc)
-+              return -ENOMEM;
-+
-+      spin_lock_init(&apc->lock);
-+
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
-       if (!res)
-               return -EINVAL;
--      ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res);
--      if (!ar71xx_pcicfg_base)
-+      apc->cfg_base = devm_request_and_ioremap(&pdev->dev, res);
-+      if (!apc->cfg_base)
-               return -ENOMEM;
--      irq = platform_get_irq(pdev, 0);
--      if (irq < 0)
-+      apc->irq = platform_get_irq(pdev, 0);
-+      if (apc->irq < 0)
-               return -EINVAL;
-       ar71xx_pci_reset();
-@@ -357,14 +375,18 @@ static int __devinit ar71xx_pci_probe(st
-       /* setup COMMAND register */
-       t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
-         | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
--      ar71xx_pci_local_write(PCI_COMMAND, 4, t);
-+      ar71xx_pci_local_write(apc, PCI_COMMAND, 4, t);
-       /* clear bus errors */
--      ar71xx_pci_check_error(1);
-+      ar71xx_pci_check_error(apc, 1);
-+
-+      ar71xx_pci_irq_init(apc);
--      ar71xx_pci_irq_init(irq);
-+      apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
-+      apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
-+      apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
--      register_pci_controller(&ar71xx_pci_controller);
-+      register_pci_controller(&apc->pci_ctrl);
-       return 0;
- }
diff --git a/target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch b/target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch
deleted file mode 100644 (file)
index d31ba26..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From 7dc3ccb5dc972b06c41b309653d132beaaedeb37 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Mon, 25 Jun 2012 09:52:23 +0200
-Subject: [PATCH 15/34] MIPS: pci-ar71xx: remove static PCI controller resources
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/pci/pci-ar71xx.c |   30 ++++++++++++++----------------
- 1 files changed, 14 insertions(+), 16 deletions(-)
-
---- a/arch/mips/pci/pci-ar71xx.c
-+++ b/arch/mips/pci/pci-ar71xx.c
-@@ -54,6 +54,8 @@ struct ar71xx_pci_controller {
-       spinlock_t lock;
-       int irq;
-       struct pci_controller pci_ctrl;
-+      struct resource io_res;
-+      struct resource mem_res;
- };
- /* Byte lane enable bits */
-@@ -235,20 +237,6 @@ static struct pci_ops ar71xx_pci_ops = {
-       .write  = ar71xx_pci_write_config,
- };
--static struct resource ar71xx_pci_io_resource = {
--      .name           = "PCI IO space",
--      .start          = 0,
--      .end            = 0,
--      .flags          = IORESOURCE_IO,
--};
--
--static struct resource ar71xx_pci_mem_resource = {
--      .name           = "PCI memory space",
--      .start          = AR71XX_PCI_MEM_BASE,
--      .end            = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
--      .flags          = IORESOURCE_MEM
--};
--
- static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
-       void __iomem *base = ath79_reset_base;
-@@ -370,6 +358,16 @@ static int __devinit ar71xx_pci_probe(st
-       if (apc->irq < 0)
-               return -EINVAL;
-+      apc->io_res.name = "PCI IO space";
-+      apc->io_res.start = 0;
-+      apc->io_res.end = 0;
-+      apc->io_res.flags = IORESOURCE_IO;
-+
-+      apc->mem_res.name = "PCI memory space";
-+      apc->mem_res.start = AR71XX_PCI_MEM_BASE;
-+      apc->mem_res.end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
-+      apc->mem_res.flags = IORESOURCE_MEM;
-+
-       ar71xx_pci_reset();
-       /* setup COMMAND register */
-@@ -383,8 +381,8 @@ static int __devinit ar71xx_pci_probe(st
-       ar71xx_pci_irq_init(apc);
-       apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
--      apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
--      apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
-+      apc->pci_ctrl.mem_resource = &apc->mem_res;
-+      apc->pci_ctrl.io_resource = &apc->io_res;
-       register_pci_controller(&apc->pci_ctrl);
diff --git a/target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch b/target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch
deleted file mode 100644 (file)
index 7f1f230..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 114df1e368b8503de1fe63e97d6eea521eecfbe4 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:40:38 +0200
-Subject: [PATCH 16/34] MIPS: ath79: add early printk support for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/early_printk.c                 |    1 +
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    1 +
- 2 files changed, 2 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/early_printk.c
-+++ b/arch/mips/ath79/early_printk.c
-@@ -74,6 +74,7 @@ static void prom_putchar_init(void)
-       case REV_ID_MAJOR_AR9341:
-       case REV_ID_MAJOR_AR9342:
-       case REV_ID_MAJOR_AR9344:
-+      case REV_ID_MAJOR_QCA9558:
-               _prom_putchar = prom_putchar_ar71xx;
-               break;
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -370,6 +370,7 @@
- #define REV_ID_MAJOR_AR9341           0x0120
- #define REV_ID_MAJOR_AR9342           0x1120
- #define REV_ID_MAJOR_AR9344           0x2120
-+#define REV_ID_MAJOR_QCA9558          0x1130
- #define AR71XX_REV_ID_MINOR_MASK      0x3
- #define AR71XX_REV_ID_MINOR_AR7130    0x0
diff --git a/target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch b/target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch
deleted file mode 100644 (file)
index 1d9dd4b..0000000
+++ /dev/null
@@ -1,91 +0,0 @@
-From 3c3c0eccf63b12fea98fd0eb65d0ccf69a7c5a57 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:42:16 +0200
-Subject: [PATCH 17/34] MIPS: ath79: add SoC detection code for the QCA9558 SoC
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/Kconfig                        |    4 ++++
- arch/mips/ath79/setup.c                        |   12 +++++++++++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 ++
- arch/mips/include/asm/mach-ath79/ath79.h       |   11 +++++++++++
- 4 files changed, 28 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -88,6 +88,10 @@ config SOC_AR934X
-       select PCI_AR724X if PCI
-       def_bool n
-+config SOC_QCA955X
-+      select USB_ARCH_HAS_EHCI
-+      def_bool n
-+
- config PCI_AR724X
-       def_bool n
---- a/arch/mips/ath79/setup.c
-+++ b/arch/mips/ath79/setup.c
-@@ -164,13 +164,23 @@ static void __init ath79_detect_sys_type
-               rev = id & AR934X_REV_ID_REVISION_MASK;
-               break;
-+      case REV_ID_MAJOR_QCA9558:
-+              ath79_soc = ATH79_SOC_QCA9558;
-+              chip = "9558";
-+              rev = id & AR944X_REV_ID_REVISION_MASK;
-+              break;
-+
-       default:
-               panic("ath79: unknown SoC, id:0x%08x", id);
-       }
-       ath79_soc_rev = rev;
--      sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
-+      if (soc_is_qca955x())
-+              sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
-+                      chip, rev);
-+      else
-+              sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
-       pr_info("SoC: %s\n", ath79_sys_type);
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -391,6 +391,8 @@
- #define AR934X_REV_ID_REVISION_MASK     0xf
-+#define AR944X_REV_ID_REVISION_MASK   0xf
-+
- /*
-  * SPI block
-  */
---- a/arch/mips/include/asm/mach-ath79/ath79.h
-+++ b/arch/mips/include/asm/mach-ath79/ath79.h
-@@ -32,6 +32,7 @@ enum ath79_soc_type {
-       ATH79_SOC_AR9341,
-       ATH79_SOC_AR9342,
-       ATH79_SOC_AR9344,
-+      ATH79_SOC_QCA9558,
- };
- extern enum ath79_soc_type ath79_soc;
-@@ -98,6 +99,16 @@ static inline int soc_is_ar934x(void)
-       return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
- }
-+static inline int soc_is_qca9558(void)
-+{
-+      return ath79_soc == ATH79_SOC_QCA9558;
-+}
-+
-+static inline int soc_is_qca955x(void)
-+{
-+      return soc_is_qca9558();
-+}
-+
- extern void __iomem *ath79_ddr_base;
- extern void __iomem *ath79_pll_base;
- extern void __iomem *ath79_reset_base;
diff --git a/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch
deleted file mode 100644 (file)
index bb0924c..0000000
+++ /dev/null
@@ -1,167 +0,0 @@
-From f465a16766a015a31d4e83af1ad62cc718d64f5a Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:43:08 +0200
-Subject: [PATCH 18/34] MIPS: ath79: add clock setup for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/clock.c                        |   78 ++++++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   39 ++++++++++++
- 2 files changed, 117 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/clock.c
-+++ b/arch/mips/ath79/clock.c
-@@ -295,6 +295,82 @@ static void __init ar934x_clocks_init(vo
-       iounmap(dpll_base);
- }
-+static void __init qca955x_clocks_init(void)
-+{
-+      u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
-+      u32 cpu_pll, ddr_pll;
-+      u32 bootstrap;
-+
-+      bootstrap = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
-+      if (bootstrap & QCA955X_BOOTSTRAP_REF_CLK_40)
-+              ath79_ref_clk.rate = 40 * 1000 * 1000;
-+      else
-+              ath79_ref_clk.rate = 25 * 1000 * 1000;
-+
-+      pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG);
-+      out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-+                QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK;
-+      ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-+                QCA955X_PLL_CPU_CONFIG_REFDIV_MASK;
-+      nint = (pll >> QCA955X_PLL_CPU_CONFIG_NINT_SHIFT) &
-+             QCA955X_PLL_CPU_CONFIG_NINT_MASK;
-+      frac = (pll >> QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-+             QCA955X_PLL_CPU_CONFIG_NFRAC_MASK;
-+
-+      cpu_pll = nint * ath79_ref_clk.rate / ref_div;
-+      cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6));
-+      cpu_pll /= (1 << out_div);
-+
-+      pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG);
-+      out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-+                QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK;
-+      ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-+                QCA955X_PLL_DDR_CONFIG_REFDIV_MASK;
-+      nint = (pll >> QCA955X_PLL_DDR_CONFIG_NINT_SHIFT) &
-+             QCA955X_PLL_DDR_CONFIG_NINT_MASK;
-+      frac = (pll >> QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-+             QCA955X_PLL_DDR_CONFIG_NFRAC_MASK;
-+
-+      ddr_pll = nint * ath79_ref_clk.rate / ref_div;
-+      ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10));
-+      ddr_pll /= (1 << out_div);
-+
-+      clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG);
-+
-+      postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
-+                QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
-+
-+      if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
-+              ath79_cpu_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
-+              ath79_cpu_clk.rate = ddr_pll / (postdiv + 1);
-+      else
-+              ath79_cpu_clk.rate = cpu_pll / (postdiv + 1);
-+
-+      postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
-+                QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK;
-+
-+      if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
-+              ath79_ddr_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
-+              ath79_ddr_clk.rate = cpu_pll / (postdiv + 1);
-+      else
-+              ath79_ddr_clk.rate = ddr_pll / (postdiv + 1);
-+
-+      postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
-+                QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK;
-+
-+      if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS)
-+              ath79_ahb_clk.rate = ath79_ref_clk.rate;
-+      else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL)
-+              ath79_ahb_clk.rate = ddr_pll / (postdiv + 1);
-+      else
-+              ath79_ahb_clk.rate = cpu_pll / (postdiv + 1);
-+
-+      ath79_wdt_clk.rate = ath79_ref_clk.rate;
-+      ath79_uart_clk.rate = ath79_ref_clk.rate;
-+}
-+
- void __init ath79_clocks_init(void)
- {
-       if (soc_is_ar71xx())
-@@ -307,6 +383,8 @@ void __init ath79_clocks_init(void)
-               ar933x_clocks_init();
-       else if (soc_is_ar934x())
-               ar934x_clocks_init();
-+      else if (soc_is_qca955x())
-+              qca955x_clocks_init();
-       else
-               BUG();
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -225,6 +225,41 @@
- #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL        BIT(21)
- #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL        BIT(24)
-+#define QCA955X_PLL_CPU_CONFIG_REG            0x00
-+#define QCA955X_PLL_DDR_CONFIG_REG            0x04
-+#define QCA955X_PLL_CLK_CTRL_REG              0x08
-+
-+#define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT    0
-+#define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK     0x3f
-+#define QCA955X_PLL_CPU_CONFIG_NINT_SHIFT     6
-+#define QCA955X_PLL_CPU_CONFIG_NINT_MASK      0x3f
-+#define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT   12
-+#define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK    0x1f
-+#define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT   19
-+#define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK    0x3
-+
-+#define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT    0
-+#define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK     0x3ff
-+#define QCA955X_PLL_DDR_CONFIG_NINT_SHIFT     10
-+#define QCA955X_PLL_DDR_CONFIG_NINT_MASK      0x3f
-+#define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT   16
-+#define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK    0x1f
-+#define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT   23
-+#define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK    0x7
-+
-+#define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS           BIT(2)
-+#define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS           BIT(3)
-+#define QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS           BIT(4)
-+#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT               5
-+#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK                0x1f
-+#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT               10
-+#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK                0x1f
-+#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT               15
-+#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK                0x1f
-+#define QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL               BIT(20)
-+#define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL               BIT(21)
-+#define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL               BIT(24)
-+
- /*
-  * USB_CONFIG block
-  */
-@@ -264,6 +299,8 @@
- #define AR934X_RESET_REG_BOOTSTRAP            0xb0
- #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
-+#define QCA955X_RESET_REG_BOOTSTRAP           0xb0
-+
- #define MISC_INT_ETHSW                        BIT(12)
- #define MISC_INT_TIMER4                       BIT(10)
- #define MISC_INT_TIMER3                       BIT(9)
-@@ -341,6 +378,8 @@
- #define AR934X_BOOTSTRAP_SDRAM_DISABLED       BIT(1)
- #define AR934X_BOOTSTRAP_DDR1         BIT(0)
-+#define QCA955X_BOOTSTRAP_REF_CLK_40  BIT(4)
-+
- #define AR934X_PCIE_WMAC_INT_WMAC_MISC                BIT(0)
- #define AR934X_PCIE_WMAC_INT_WMAC_TX          BIT(1)
- #define AR934X_PCIE_WMAC_INT_WMAC_RXLP                BIT(2)
diff --git a/target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch b/target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch
deleted file mode 100644 (file)
index 8d24c74..0000000
+++ /dev/null
@@ -1,239 +0,0 @@
-From 5d0de52f8e36916485a61b820916b71b5d918e6f Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:44:23 +0200
-Subject: [PATCH 19/34] MIPS: ath79: add IRQ handling code for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/irq.c                          |  110 ++++++++++++++++++++++--
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   32 +++++++
- arch/mips/include/asm/mach-ath79/irq.h         |    9 ++-
- 3 files changed, 142 insertions(+), 9 deletions(-)
-
---- a/arch/mips/ath79/irq.c
-+++ b/arch/mips/ath79/irq.c
-@@ -130,7 +130,10 @@ static void __init ath79_misc_irq_init(v
-       if (soc_is_ar71xx() || soc_is_ar913x())
-               ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
--      else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x())
-+      else if (soc_is_ar724x() ||
-+               soc_is_ar933x() ||
-+               soc_is_ar934x() ||
-+               soc_is_qca955x())
-               ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
-       else
-               BUG();
-@@ -177,6 +180,88 @@ static void ar934x_ip2_irq_init(void)
-       irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);
- }
-+static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
-+{
-+      u32 status;
-+
-+      disable_irq_nosync(irq);
-+
-+      status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
-+      status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;
-+
-+      if (status == 0) {
-+              spurious_interrupt();
-+              goto enable;
-+      }
-+
-+      if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
-+              /* TODO: flush DDR? */
-+              generic_handle_irq(ATH79_IP2_IRQ(0));
-+      }
-+
-+      if (status & QCA955X_EXT_INT_WMAC_ALL) {
-+              /* TODO: flsuh DDR? */
-+              generic_handle_irq(ATH79_IP2_IRQ(1));
-+      }
-+
-+enable:
-+      enable_irq(irq);
-+}
-+
-+static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
-+{
-+      u32 status;
-+
-+      disable_irq_nosync(irq);
-+
-+      status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
-+      status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
-+                QCA955X_EXT_INT_USB1 |
-+                QCA955X_EXT_INT_USB2;
-+
-+      if (status == 0) {
-+              spurious_interrupt();
-+              goto enable;
-+      }
-+
-+      if (status & QCA955X_EXT_INT_USB1) {
-+              /* TODO: flush DDR? */
-+              generic_handle_irq(ATH79_IP3_IRQ(0));
-+      }
-+
-+      if (status & QCA955X_EXT_INT_USB2) {
-+              /* TODO: flsuh DDR? */
-+              generic_handle_irq(ATH79_IP3_IRQ(1));
-+      }
-+
-+      if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) {
-+              /* TODO: flush DDR? */
-+              generic_handle_irq(ATH79_IP3_IRQ(2));
-+      }
-+
-+enable:
-+      enable_irq(irq);
-+}
-+
-+static void qca955x_irq_init(void)
-+{
-+      int i;
-+
-+      for (i = ATH79_IP2_IRQ_BASE;
-+           i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
-+              irq_set_chip_and_handler(i, &dummy_irq_chip,
-+                                       handle_level_irq);
-+
-+      irq_set_chained_handler(ATH79_CPU_IRQ_IP2, qca955x_ip2_irq_dispatch);
-+
-+      for (i = ATH79_IP3_IRQ_BASE;
-+           i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
-+              irq_set_chip_and_handler(i, &dummy_irq_chip,
-+                                       handle_level_irq);
-+
-+      irq_set_chained_handler(ATH79_CPU_IRQ_IP3, qca955x_ip3_irq_dispatch);
-+}
-+
- asmlinkage void plat_irq_dispatch(void)
- {
-       unsigned long pending;
-@@ -212,6 +297,17 @@ asmlinkage void plat_irq_dispatch(void)
-  * Issue a flush in the handlers to ensure that the driver sees
-  * the update.
-  */
-+
-+static void ath79_default_ip2_handler(void)
-+{
-+      do_IRQ(ATH79_CPU_IRQ_IP2);
-+}
-+
-+static void ath79_default_ip3_handler(void)
-+{
-+      do_IRQ(ATH79_CPU_IRQ_USB);
-+}
-+
- static void ar71xx_ip2_handler(void)
- {
-       ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);
-@@ -236,11 +332,6 @@ static void ar933x_ip2_handler(void)
-       do_IRQ(ATH79_CPU_IRQ_IP2);
- }
--static void ar934x_ip2_handler(void)
--{
--      do_IRQ(ATH79_CPU_IRQ_IP2);
--}
--
- static void ar71xx_ip3_handler(void)
- {
-       ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);
-@@ -286,8 +377,11 @@ void __init arch_init_irq(void)
-               ath79_ip2_handler = ar933x_ip2_handler;
-               ath79_ip3_handler = ar933x_ip3_handler;
-       } else if (soc_is_ar934x()) {
--              ath79_ip2_handler = ar934x_ip2_handler;
-+              ath79_ip2_handler = ath79_default_ip2_handler;
-               ath79_ip3_handler = ar934x_ip3_handler;
-+      } else if (soc_is_qca955x()) {
-+              ath79_ip2_handler = ath79_default_ip2_handler;
-+              ath79_ip3_handler = ath79_default_ip3_handler;
-       } else {
-               BUG();
-       }
-@@ -298,4 +392,6 @@ void __init arch_init_irq(void)
-       if (soc_is_ar934x())
-               ar934x_ip2_irq_init();
-+      else if (soc_is_qca955x())
-+              qca955x_irq_init();
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -300,6 +300,7 @@
- #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
- #define QCA955X_RESET_REG_BOOTSTRAP           0xb0
-+#define QCA955X_RESET_REG_EXT_INT_STATUS      0xac
- #define MISC_INT_ETHSW                        BIT(12)
- #define MISC_INT_TIMER4                       BIT(10)
-@@ -398,6 +399,37 @@
-        AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
-        AR934X_PCIE_WMAC_INT_PCIE_RC3)
-+#define QCA955X_EXT_INT_WMAC_MISC             BIT(0)
-+#define QCA955X_EXT_INT_WMAC_TX                       BIT(1)
-+#define QCA955X_EXT_INT_WMAC_RXLP             BIT(2)
-+#define QCA955X_EXT_INT_WMAC_RXHP             BIT(3)
-+#define QCA955X_EXT_INT_PCIE_RC1              BIT(4)
-+#define QCA955X_EXT_INT_PCIE_RC1_INT0         BIT(5)
-+#define QCA955X_EXT_INT_PCIE_RC1_INT1         BIT(6)
-+#define QCA955X_EXT_INT_PCIE_RC1_INT2         BIT(7)
-+#define QCA955X_EXT_INT_PCIE_RC1_INT3         BIT(8)
-+#define QCA955X_EXT_INT_PCIE_RC2              BIT(12)
-+#define QCA955X_EXT_INT_PCIE_RC2_INT0         BIT(13)
-+#define QCA955X_EXT_INT_PCIE_RC2_INT1         BIT(14)
-+#define QCA955X_EXT_INT_PCIE_RC2_INT2         BIT(15)
-+#define QCA955X_EXT_INT_PCIE_RC2_INT3         BIT(16)
-+#define QCA955X_EXT_INT_USB1                  BIT(24)
-+#define QCA955X_EXT_INT_USB2                  BIT(28)
-+
-+#define QCA955X_EXT_INT_WMAC_ALL \
-+      (QCA955X_EXT_INT_WMAC_MISC | QCA955X_EXT_INT_WMAC_TX | \
-+       QCA955X_EXT_INT_WMAC_RXLP | QCA955X_EXT_INT_WMAC_RXHP)
-+
-+#define QCA955X_EXT_INT_PCIE_RC1_ALL \
-+      (QCA955X_EXT_INT_PCIE_RC1 | QCA955X_EXT_INT_PCIE_RC1_INT0 | \
-+       QCA955X_EXT_INT_PCIE_RC1_INT1 | QCA955X_EXT_INT_PCIE_RC1_INT2 | \
-+       QCA955X_EXT_INT_PCIE_RC1_INT3)
-+
-+#define QCA955X_EXT_INT_PCIE_RC2_ALL \
-+      (QCA955X_EXT_INT_PCIE_RC2 | QCA955X_EXT_INT_PCIE_RC2_INT0 | \
-+       QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \
-+       QCA955X_EXT_INT_PCIE_RC2_INT3)
-+
- #define REV_ID_MAJOR_MASK             0xfff0
- #define REV_ID_MAJOR_AR71XX           0x00a0
- #define REV_ID_MAJOR_AR913X           0x00b0
---- a/arch/mips/include/asm/mach-ath79/irq.h
-+++ b/arch/mips/include/asm/mach-ath79/irq.h
-@@ -10,7 +10,7 @@
- #define __ASM_MACH_ATH79_IRQ_H
- #define MIPS_CPU_IRQ_BASE     0
--#define NR_IRQS                       48
-+#define NR_IRQS                       51
- #define ATH79_MISC_IRQ_BASE   8
- #define ATH79_MISC_IRQ_COUNT  32
-@@ -23,8 +23,13 @@
- #define ATH79_IP2_IRQ_COUNT   2
- #define ATH79_IP2_IRQ(_x)     (ATH79_IP2_IRQ_BASE + (_x))
-+#define ATH79_IP3_IRQ_BASE    (ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT)
-+#define ATH79_IP3_IRQ_COUNT     3
-+#define ATH79_IP3_IRQ(_x)       (ATH79_IP3_IRQ_BASE + (_x))
-+
- #define ATH79_CPU_IRQ_IP2     (MIPS_CPU_IRQ_BASE + 2)
--#define ATH79_CPU_IRQ_USB     (MIPS_CPU_IRQ_BASE + 3)
-+#define ATH79_CPU_IRQ_IP3     (MIPS_CPU_IRQ_BASE + 3)
-+#define ATH79_CPU_IRQ_USB     ATH79_CPU_IRQ_IP3
- #define ATH79_CPU_IRQ_GE0     (MIPS_CPU_IRQ_BASE + 4)
- #define ATH79_CPU_IRQ_GE1     (MIPS_CPU_IRQ_BASE + 5)
- #define ATH79_CPU_IRQ_MISC    (MIPS_CPU_IRQ_BASE + 6)
diff --git a/target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
deleted file mode 100644 (file)
index dc4251b..0000000
+++ /dev/null
@@ -1,39 +0,0 @@
-From c9a552f3007f0621b2440ae17bad816578299e52 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:45:27 +0200
-Subject: [PATCH 20/34] MIPS: ath79: add GPIO setup code for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/gpio.c                         |    4 +++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    1 +
- 2 files changed, 4 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/gpio.c
-+++ b/arch/mips/ath79/gpio.c
-@@ -196,12 +196,14 @@ void __init ath79_gpio_init(void)
-               ath79_gpio_count = AR933X_GPIO_COUNT;
-       else if (soc_is_ar934x())
-               ath79_gpio_count = AR934X_GPIO_COUNT;
-+      else if (soc_is_qca955x())
-+              ath79_gpio_count = QCA955X_GPIO_COUNT;
-       else
-               BUG();
-       ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
-       ath79_gpio_chip.ngpio = ath79_gpio_count;
--      if (soc_is_ar934x()) {
-+      if (soc_is_ar934x() || soc_is_qca955x()) {
-               ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
-               ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
-       }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -506,6 +506,7 @@
- #define AR913X_GPIO_COUNT             22
- #define AR933X_GPIO_COUNT             30
- #define AR934X_GPIO_COUNT             23
-+#define QCA955X_GPIO_COUNT            24
- /*
-  * SRIF block
diff --git a/target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch b/target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch
deleted file mode 100644 (file)
index f3e3b6e..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 68368e80b4db83afe39664a7d43c8b5c7b8ac3b4 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:49:33 +0200
-Subject: [PATCH 21/34] MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set,clear}
-
----
- arch/mips/ath79/common.c |    6 ++++--
- 1 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/mips/ath79/common.c
-+++ b/arch/mips/ath79/common.c
-@@ -70,7 +70,8 @@ void ath79_device_reset_set(u32 mask)
-               reg = AR913X_RESET_REG_RESET_MODULE;
-       else if (soc_is_ar933x())
-               reg = AR933X_RESET_REG_RESET_MODULE;
--      else if (soc_is_ar934x())
-+      else if (soc_is_ar934x() ||
-+               soc_is_qca955x())
-               reg = AR934X_RESET_REG_RESET_MODULE;
-       else
-               BUG();
-@@ -96,7 +97,8 @@ void ath79_device_reset_clear(u32 mask)
-               reg = AR913X_RESET_REG_RESET_MODULE;
-       else if (soc_is_ar933x())
-               reg = AR933X_RESET_REG_RESET_MODULE;
--      else if (soc_is_ar934x())
-+      else if (soc_is_ar934x() ||
-+               soc_is_qca955x())
-               reg = AR934X_RESET_REG_RESET_MODULE;
-       else
-               BUG();
diff --git a/target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch
deleted file mode 100644 (file)
index aacb8bb..0000000
+++ /dev/null
@@ -1,22 +0,0 @@
-From f7d7b362b51c51c1ae80bb7ade2039d6f74d4070 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:46:26 +0200
-Subject: [PATCH 22/34] MIPS: ath79: register UART for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/dev-common.c |    3 ++-
- 1 files changed, 2 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/dev-common.c
-+++ b/arch/mips/ath79/dev-common.c
-@@ -90,7 +90,8 @@ void __init ath79_register_uart(void)
-       if (soc_is_ar71xx() ||
-           soc_is_ar724x() ||
-           soc_is_ar913x() ||
--          soc_is_ar934x()) {
-+          soc_is_ar934x() ||
-+          soc_is_qca955x()) {
-               ath79_uart_data[0].uartclk = clk_get_rate(clk);
-               platform_device_register(&ath79_uart_device);
-       } else if (soc_is_ar933x()) {
diff --git a/target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch b/target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch
deleted file mode 100644 (file)
index 5a27a9b..0000000
+++ /dev/null
@@ -1,93 +0,0 @@
-From e4ba5e2bffd1f373f57dd692233aa6b7b46ae76c Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 13:47:35 +0200
-Subject: [PATCH 23/34] MIPS: ath79: add USB controller registration code for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/dev-usb.c                      |   46 ++++++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    4 ++
- 2 files changed, 50 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/dev-usb.c
-+++ b/arch/mips/ath79/dev-usb.c
-@@ -75,6 +75,8 @@ static void __init ath79_usb_init_resour
-                                          unsigned long size,
-                                          int irq)
- {
-+      memset(res, 0, sizeof(res));
-+
-       res[0].flags = IORESOURCE_MEM;
-       res[0].start = base;
-       res[0].end = base + size - 1;
-@@ -219,6 +221,48 @@ static void __init ar934x_usb_setup(void
-       platform_device_register(&ath79_ehci_device);
- }
-+static void __init qca955x_usb_setup(void)
-+{
-+      struct platform_device *pdev;
-+
-+      ath79_usb_init_resource(ath79_ehci_resources,
-+                              QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
-+                              ATH79_IP3_IRQ(0));
-+
-+      pdev = platform_device_register_resndata(NULL, "ehci-platform", 0,
-+                                               ath79_ehci_resources,
-+                                               ARRAY_SIZE(ath79_ehci_resources),
-+                                               &ath79_ehci_pdata_v2,
-+                                               sizeof(ath79_ehci_pdata_v2));
-+      if (IS_ERR(pdev)) {
-+              pr_err("Unable to register USB %d device, err=%d\n", 0,
-+                      (int) PTR_ERR(pdev));
-+              return;
-+      }
-+
-+      pdev->dev.dma_mask = &ath79_ehci_dmamask;
-+      pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-+
-+      ath79_usb_init_resource(ath79_ehci_resources,
-+                              QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
-+                              ATH79_IP3_IRQ(1));
-+
-+      pdev = platform_device_register_resndata(NULL, "ehci-platform", 1,
-+                                               ath79_ehci_resources,
-+                                               ARRAY_SIZE(ath79_ehci_resources),
-+                                               &ath79_ehci_pdata_v2,
-+                                               sizeof(ath79_ehci_pdata_v2));
-+
-+      if (IS_ERR(pdev)) {
-+              pr_err("Unable to register USB %d device, err=%d\n", 1,
-+                      (int) PTR_ERR(pdev));
-+              return;
-+      }
-+
-+      pdev->dev.dma_mask = &ath79_ehci_dmamask;
-+      pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-+}
-+
- void __init ath79_register_usb(void)
- {
-       if (soc_is_ar71xx())
-@@ -233,6 +277,8 @@ void __init ath79_register_usb(void)
-               ar933x_usb_setup();
-       else if (soc_is_ar934x())
-               ar934x_usb_setup();
-+      else if (soc_is_qca955x())
-+              qca955x_usb_setup();
-       else
-               BUG();
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -94,6 +94,10 @@
- #define AR934X_SRIF_BASE      (AR71XX_APB_BASE + 0x00116000)
- #define AR934X_SRIF_SIZE      0x1000
-+#define QCA955X_EHCI0_BASE    0x1b000000
-+#define QCA955X_EHCI1_BASE    0x1b400000
-+#define QCA955X_EHCI_SIZE     0x200
-+
- /*
-  * DDR_CTRL block
-  */
diff --git a/target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch b/target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
deleted file mode 100644 (file)
index efc354e..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From 0568e7f92ecf2bfd2af0a5c59b1249fef002c89f Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 3 Jul 2012 10:24:43 +0200
-Subject: [PATCH 24/34] MIPS: ath79: add WMAC registration code for the QCA955X SoCs
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/Kconfig                        |    2 +-
- arch/mips/ath79/dev-wmac.c                     |   20 ++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 ++
- 3 files changed, 23 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -108,7 +108,7 @@ config ATH79_DEV_USB
-       def_bool n
- config ATH79_DEV_WMAC
--      depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
-+      depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
-       def_bool n
- endif
---- a/arch/mips/ath79/dev-wmac.c
-+++ b/arch/mips/ath79/dev-wmac.c
-@@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
-               ath79_wmac_data.is_clk_25mhz = true;
- }
-+static void qca955x_wmac_setup(void)
-+{
-+      u32 t;
-+
-+      ath79_wmac_device.name = "qca955x_wmac";
-+
-+      ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
-+      ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
-+      ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
-+      ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
-+
-+      t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
-+      if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
-+              ath79_wmac_data.is_clk_25mhz = false;
-+      else
-+              ath79_wmac_data.is_clk_25mhz = true;
-+}
-+
- void __init ath79_register_wmac(u8 *cal_data)
- {
-       if (soc_is_ar913x())
-@@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_
-               ar933x_wmac_setup();
-       else if (soc_is_ar934x())
-               ar934x_wmac_setup();
-+      else if (soc_is_qca955x())
-+              qca955x_wmac_setup();
-       else
-               BUG();
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -94,6 +94,8 @@
- #define AR934X_SRIF_BASE      (AR71XX_APB_BASE + 0x00116000)
- #define AR934X_SRIF_SIZE      0x1000
-+#define QCA955X_WMAC_BASE     (AR71XX_APB_BASE + 0x00100000)
-+#define QCA955X_WMAC_SIZE     0x20000
- #define QCA955X_EHCI0_BASE    0x1b000000
- #define QCA955X_EHCI1_BASE    0x1b400000
- #define QCA955X_EHCI_SIZE     0x200
diff --git a/target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch b/target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch
deleted file mode 100644 (file)
index bd95d71..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-From 12c68e4fccadc22a0470177141a57892a76e4a2b Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 15:33:16 +0200
-Subject: [PATCH 25/34] MIPS: ath79: allow to specify bus number in PCI IRQ maps
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
----
- arch/mips/ath79/pci.c |    4 +++-
- arch/mips/ath79/pci.h |    1 +
- 2 files changed, 4 insertions(+), 1 deletions(-)
-
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -75,7 +75,9 @@ int __init pcibios_map_irq(const struct
-               const struct ath79_pci_irq *entry;
-               entry = &ath79_pci_irq_map[i];
--              if (entry->slot == slot && entry->pin == pin) {
-+              if (entry->bus == dev->bus->number &&
-+                  entry->slot == slot &&
-+                  entry->pin == pin) {
-                       irq = entry->irq;
-                       break;
-               }
---- a/arch/mips/ath79/pci.h
-+++ b/arch/mips/ath79/pci.h
-@@ -14,6 +14,7 @@
- #define _ATH79_PCI_H
- struct ath79_pci_irq {
-+      int     bus;
-       u8      slot;
-       u8      pin;
-       int     irq;
diff --git a/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch b/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch
deleted file mode 100644 (file)
index 0c3889f..0000000
+++ /dev/null
@@ -1,103 +0,0 @@
-From 8bb54348722216a1dd6905d9d031ebdaa3a544a4 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Sun, 24 Jun 2012 23:05:20 +0200
-Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the QCA9558 SoC
-
----
- arch/mips/ath79/Kconfig                        |    2 +
- arch/mips/ath79/pci.c                          |   36 ++++++++++++++++++++++++
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   13 ++++++++
- 3 files changed, 51 insertions(+), 0 deletions(-)
-
---- a/arch/mips/ath79/Kconfig
-+++ b/arch/mips/ath79/Kconfig
-@@ -90,6 +90,8 @@ config SOC_AR934X
- config SOC_QCA955X
-       select USB_ARCH_HAS_EHCI
-+      select HW_HAS_PCI
-+      select PCI_AR724X if PCI
-       def_bool n
- config PCI_AR724X
---- a/arch/mips/ath79/pci.c
-+++ b/arch/mips/ath79/pci.c
-@@ -49,6 +49,21 @@ static const struct ath79_pci_irq ar724x
-       }
- };
-+static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = {
-+      {
-+              .bus    = 0,
-+              .slot   = 0,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(0),
-+      },
-+      {
-+              .bus    = 1,
-+              .slot   = 0,
-+              .pin    = 1,
-+              .irq    = ATH79_PCI_IRQ(1),
-+      },
-+};
-+
- int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
- {
-       int irq = -1;
-@@ -64,6 +79,9 @@ int __init pcibios_map_irq(const struct
-                          soc_is_ar9344()) {
-                       ath79_pci_irq_map = ar724x_pci_irq_map;
-                       ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
-+              } else if (soc_is_qca955x()) {
-+      &nb