#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1661,6 +1661,17 @@
+@@ -1662,6 +1662,17 @@
* _REG relative to RSET_PCIE
*************************************************************************/
#define PCIE_CONFIG2_REG 0x408
#define CONFIG2_BAR1_SIZE_EN 1
#define CONFIG2_BAR1_SIZE_MASK 0xf
-@@ -1706,7 +1717,54 @@
+@@ -1707,7 +1718,54 @@
#define PCIE_RC_INT_C (1 << 2)
#define PCIE_RC_INT_D (1 << 3)
--- /dev/null
+From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 12:26:57 +0100
+Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
+ result
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
+ arch/mips/bcm63xx/prom.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 3 files changed, 13 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -22,6 +22,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
++static int flash_type;
++
+ static struct mtd_partition mtd_partitions[] = {
+ {
+ .name = "cfe",
+@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++void __init bcm63xx_flash_detect(void)
++{
++ flash_type = bcm63xx_detect_flash_type();
++}
++
+ int __init bcm63xx_flash_register(void)
+ {
+- int flash_type;
+ u32 val;
+
+- flash_type = bcm63xx_detect_flash_type();
+-
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+ /* read base address of boot chip select (0) */
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -18,6 +18,7 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_gpio.h>
++#include <bcm63xx_dev_flash.h>
+
+ void __init prom_init(void)
+ {
+@@ -56,6 +57,9 @@ void __init prom_init(void)
+ /* register gpiochip */
+ bcm63xx_gpio_init();
+
++ /* detect and setup flash access */
++ bcm63xx_flash_detect();
++
+ /* do low level board init */
+ board_prom_init();
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -7,6 +7,8 @@ enum {
+ BCM63XX_FLASH_TYPE_NAND,
+ };
+
++void bcm63xx_flash_detect(void);
++
+ int __init bcm63xx_flash_register(void);
+
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 13:25:25 +0100
+Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
+
+Some bootloaders leave the flash access in an invalid state with dual
+read enabled; fix it by disabling it and falling back to simple fast
+reads.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 36 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -110,9 +110,46 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++#define HSSPI_FLASH_CTRL_REG 0x14
++#define FLASH_CTRL_READ_OPCODE_MASK 0xff
++#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
++#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
++#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
++#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
++#define FLASH_CTRL_MB_EN (1 << 23)
++
+ void __init bcm63xx_flash_detect(void)
+ {
+ flash_type = bcm63xx_detect_flash_type();
++
++ /* reduce flash mapping to single i/o reads for safety */
++ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
++ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++ BCMCPU_IS_63268())) {
++ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
++
++ if (!(val & FLASH_CTRL_MB_EN))
++ return;
++
++ val &= ~FLASH_CTRL_MB_EN;
++ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
++
++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
++ case FLASH_CTRL_ADDR_BYTES_3:
++ val |= 0x0b; /* OPCODE_FAST_READ */
++ break;
++ case FLASH_CTRL_ADDR_BYTES_4:
++ val |= 0x0c; /* OPCODE_FAST_READ_4B */
++ break;
++ case FLASH_CTRL_ADDR_BYTES_2:
++ default:
++ pr_warn("unsupported address byte mode (%x), not fixing up\n",
++ val & FLASH_CTRL_ADDR_BYTES_MASK);
++ return;
++ }
++
++ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
++ }
+ }
+
+ int __init bcm63xx_flash_register(void)
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -30,7 +30,7 @@ static struct mtd_partition mtd_partitio
+@@ -32,7 +32,7 @@ static struct mtd_partition mtd_partitio
}
};
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
-@@ -55,6 +58,21 @@ static struct platform_device mtd_dev =
+@@ -57,6 +60,21 @@ static struct platform_device mtd_dev =
},
};
static int __init bcm63xx_detect_flash_type(void)
{
u32 val;
-@@ -62,9 +80,15 @@ static int __init bcm63xx_detect_flash_t
+@@ -64,9 +82,15 @@ static int __init bcm63xx_detect_flash_t
switch (bcm63xx_get_cpu_id()) {
case BCM6318_CPU_ID:
/* only support serial flash */
if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
return BCM63XX_FLASH_TYPE_SERIAL;
else
-@@ -83,12 +107,20 @@ static int __init bcm63xx_detect_flash_t
+@@ -85,12 +109,20 @@ static int __init bcm63xx_detect_flash_t
return BCM63XX_FLASH_TYPE_SERIAL;
case BCM6362_CPU_ID:
val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
case STRAPBUS_6368_BOOT_SEL_NAND:
return BCM63XX_FLASH_TYPE_NAND;
-@@ -99,6 +131,11 @@ static int __init bcm63xx_detect_flash_t
+@@ -101,6 +133,11 @@ static int __init bcm63xx_detect_flash_t
}
case BCM63268_CPU_ID:
val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
return BCM63XX_FLASH_TYPE_SERIAL;
else
-@@ -126,8 +163,15 @@ int __init bcm63xx_flash_register(void)
+@@ -167,8 +204,15 @@ int __init bcm63xx_flash_register(void)
return platform_device_register(&mtd_dev);
case BCM63XX_FLASH_TYPE_SERIAL:
#define STRAPBUS_6368_BOOT_SEL_MASK 0x3
#define STRAPBUS_6368_BOOT_SEL_NAND 0
#define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1667,6 +1668,7 @@
+@@ -1668,6 +1669,7 @@
#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
#define MISC_STRAPBUS_6328_REG 0x240
--- /dev/null
+From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 13 Jan 2014 12:12:30 +0100
+Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 5 +++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -222,3 +222,8 @@ int __init bcm63xx_flash_register(void)
+ return -ENODEV;
+ }
+ }
++
++int bcm63xx_flash_get_type(void)
++{
++ return flash_type;
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -11,4 +11,6 @@ void bcm63xx_flash_detect(void);
+
+ int __init bcm63xx_flash_register(void);
+
++int bcm63xx_flash_get_type(void);
++
+ #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From f888824d352df894ab721a5ca067b0313500efe7 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 12:17:54 +0200
-Subject: [PATCH 38/59] MIPS: BCM63XX: store the flash type in global variable
-
----
- arch/mips/bcm63xx/dev-flash.c | 36 +++++++++++++------
- .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +
- 2 files changed, 26 insertions(+), 12 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -25,6 +25,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+int bcm63xx_attached_flash = -1;
-+
- static struct mtd_partition mtd_partitions[] = {
- {
- .name = "cfe",
-@@ -81,7 +83,8 @@ static int __init bcm63xx_detect_flash_t
- case BCM6318_CPU_ID:
- /* only support serial flash */
- bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
-+ break;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
- if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
-@@ -90,21 +93,24 @@ static int __init bcm63xx_detect_flash_t
- bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
-
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
- else
-- return BCM63XX_FLASH_TYPE_NAND;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_NAND;
-+ break;
- case BCM6338_CPU_ID:
- case BCM6345_CPU_ID:
- case BCM6348_CPU_ID:
- /* no way to auto detect so assume parallel */
-- return BCM63XX_FLASH_TYPE_PARALLEL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_PARALLEL;
-+ break;
- case BCM3368_CPU_ID:
- case BCM6358_CPU_ID:
- val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
- if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
-- return BCM63XX_FLASH_TYPE_PARALLEL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_PARALLEL;
- else
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
-+ break;
- case BCM6362_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
- if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
-@@ -113,9 +119,10 @@ static int __init bcm63xx_detect_flash_t
- bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-
- if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
- else
-- return BCM63XX_FLASH_TYPE_NAND;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_NAND;
-+ break;
- case BCM6368_CPU_ID:
- val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
- if (val & STRAPBUS_6368_SPI_CLK_FAST)
-@@ -123,11 +130,16 @@ static int __init bcm63xx_detect_flash_t
-
- switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
- case STRAPBUS_6368_BOOT_SEL_NAND:
-- return BCM63XX_FLASH_TYPE_NAND;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_NAND;
-+ break;
- case STRAPBUS_6368_BOOT_SEL_SERIAL:
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
-+ break;
- case STRAPBUS_6368_BOOT_SEL_PARALLEL:
-- return BCM63XX_FLASH_TYPE_PARALLEL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_PARALLEL;
-+ break;
-+ default:
-+ return -EINVAL;
- }
- case BCM63268_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-@@ -137,22 +149,24 @@ static int __init bcm63xx_detect_flash_t
- bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-
- if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
-- return BCM63XX_FLASH_TYPE_SERIAL;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_SERIAL;
- else
-- return BCM63XX_FLASH_TYPE_NAND;
-+ bcm63xx_attached_flash = BCM63XX_FLASH_TYPE_NAND;
- default:
- return -EINVAL;
- }
-+
-+ return 0;
- }
-
- int __init bcm63xx_flash_register(void)
- {
-- int flash_type;
- u32 val;
-
-- flash_type = bcm63xx_detect_flash_type();
-
-- switch (flash_type) {
-+ bcm63xx_detect_flash_type();
-+
-+ switch (bcm63xx_attached_flash) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
- /* read base address of boot chip select (0) */
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-@@ -177,7 +191,7 @@ int __init bcm63xx_flash_register(void)
- return -ENODEV;
- default:
- pr_err("flash detection failed for BCM%x: %d\n",
-- bcm63xx_get_cpu_id(), flash_type);
-+ bcm63xx_get_cpu_id(), bcm63xx_attached_flash);
- return -ENODEV;
- }
- }
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -7,6 +7,8 @@ enum {
- BCM63XX_FLASH_TYPE_NAND,
- };
-
-+extern int bcm63xx_attached_flash;
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+ addr &= MPI_CSBASE_BASE_MASK;
+ }
+
-+ switch (bcm63xx_attached_flash) {
++ switch (bcm63xx_flash_get_type()) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
+ return eeprom;
};
static struct spi_board_info bcm63xx_spi_flash_info[] = {
-@@ -159,10 +163,13 @@ static int __init bcm63xx_detect_flash_t
- return 0;
+@@ -189,9 +193,13 @@ void __init bcm63xx_flash_detect(void)
+ }
}
-int __init bcm63xx_flash_register(void)
{
u32 val;
+ unsigned int i;
-
++
+ for (i = 0; i < num_caldata; i++)
+ bcm63xx_parser_data.caldata[i] = caldata[i].caldata_offset;
- bcm63xx_detect_flash_type();
-
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
@@ -1,6 +1,8 @@
enum {
BCM63XX_FLASH_TYPE_PARALLEL,
BCM63XX_FLASH_TYPE_SERIAL,
-@@ -9,6 +11,6 @@ enum {
+@@ -9,7 +11,7 @@ enum {
- extern int bcm63xx_attached_flash;
+ void bcm63xx_flash_detect(void);
-int __init bcm63xx_flash_register(void);
+int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
- #endif /* __BCM63XX_FLASH_H */
+ int bcm63xx_flash_get_type(void);
+
}
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -163,7 +163,7 @@ static int __init bcm63xx_detect_flash_t
- return 0;
+@@ -193,7 +193,7 @@ void __init bcm63xx_flash_detect(void)
+ }
}
-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
+
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -11,6 +11,6 @@ enum {
+@@ -11,7 +11,7 @@ enum {
- extern int bcm63xx_attached_flash;
+ void bcm63xx_flash_detect(void);
-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
+int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata);
- #endif /* __BCM63XX_FLASH_H */
+ int bcm63xx_flash_get_type(void);
+
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -9,6 +9,7 @@
#include <bcm63xx_cpu.h>
#include <bcm63xx_dev_flash.h>
#include <bcm63xx_dev_hsspi.h>
-@@ -179,6 +180,13 @@ int __init bcm63xx_flash_register(int nu
+@@ -207,6 +208,13 @@ int __init bcm63xx_flash_register(int nu
val = bcm_mpi_readl(MPI_CSBASE_REG(0));
val &= MPI_CSBASE_BASE_MASK;
projects / openwrt / svn-archive / archive.git / commitdiff