brcm47xx: add initial support for kernel 3.10
authorHauke Mehrtens <hauke@hauke-m.de>
Sun, 14 Jul 2013 13:44:45 +0000 (13:44 +0000)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 14 Jul 2013 13:44:45 +0000 (13:44 +0000)
SVN-Revision: 37287

35 files changed:
package/kernel/broadcom-wl/Makefile
package/kernel/switch/Makefile
target/linux/brcm47xx/config-3.10 [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/026-mtd-bcm47xxpart-find-boot-partition-by-CFE-magic.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/027-mtd-bcm47xxpart-get-nvram.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/028-mtd-bcm47xxpart-use-old-part-names.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/050-mtd_bcm47xxsflash_implement_ChipCommon_RW_ops.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/051-mtd_bcm47xxsflash_implement_polling_chip_status.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/052-mtd_bcm47xxsflash_implement_erasing_support.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/053-mtd_bcm47xxsflash_writing_support.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/054-mtd_bcm47xxsflash_convert_kzalloc_to_avoid_invalid_access.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/055-mtd_bcm47xxsflash_convert_to_module_platform_driver.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/114-MIPS-BCM47xx-Setup-and-register-serial-early.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/116-MIPS-BCM47xx-Remove-CFE-console.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/150-cpu_fixes.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/160-kmap_coherent.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/170-fix-74k-cpu.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/210-b44_phy_fix.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/211-b44_timeout_spam.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/241-bcma-broadcom-2011-sdk-updates.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/260-MIPS-BCM47XX-add-board-detection.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/261-MIPS-BCM47XX-print-board-name-in-proc-cpuinfo.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/280-activate_ssb_support_in_usb.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/300-fork_cacheflush.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/310-no_highpage.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/400-arch-bcm47xx.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-time-for-WL520G-and-other-200-MHz-C.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/610-pci_ide_fix.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/812-disable_wgt634u_crap.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/820-wgt634u-nvram-fix.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/920-cache-wround.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/940-bcm47xx-yenta.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/976-ssb_increase_pci_delay.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/980-wnr834b_no_cardbus_invariant.patch [new file with mode: 0644]
target/linux/brcm47xx/patches-3.10/999-wl_exports.patch [new file with mode: 0644]

index 1a7da0f..8171014 100644 (file)
@@ -24,7 +24,7 @@ include $(INCLUDE_DIR)/package.mk
 define Package/broadcom-wl/Default
   SECTION:=kernel
   CATEGORY:=Kernel modules
-  DEPENDS:=@PACKAGE_kmod-brcm-wl||PACKAGE_kmod-brcm-wl-mini
+  DEPENDS:=@PACKAGE_kmod-brcm-wl||PACKAGE_kmod-brcm-wl-mini @!LINUX_3_10
   SUBMENU:=Proprietary BCM43xx WiFi driver
   SUBMENUDEP:=@TARGET_brcm47xx||TARGET_brcm63xx
 endef
@@ -32,7 +32,7 @@ endef
 define KernelPackage/brcm-wl/Default
   $(call Package/broadcom-wl/Default)
   SECTION:=kernel
-  DEPENDS:=@TARGET_brcm47xx||TARGET_brcm63xx +wireless-tools
+  DEPENDS:=@TARGET_brcm47xx||TARGET_brcm63xx +wireless-tools @!LINUX_3_10
   TITLE:=Kernel driver for BCM43xx chipsets
   FILES:=$(PKG_BUILD_DIR)/driver$(1)/wl.ko $(PKG_BUILD_DIR)/glue/wl_glue.ko
   AUTOLOAD:=$(call AutoLoad,30,wl_glue wl)
index fd1504e..95d7750 100644 (file)
@@ -15,7 +15,7 @@ include $(INCLUDE_DIR)/package.mk
 
 define KernelPackage/switch
   SUBMENU:=Other modules
-  DEPENDS:=@TARGET_brcm47xx
+  DEPENDS:=@TARGET_brcm47xx @!LINUX_3_10
   TITLE:=Switch drivers
   FILES:= \
        $(PKG_BUILD_DIR)/switch-core.ko \
diff --git a/target/linux/brcm47xx/config-3.10 b/target/linux/brcm47xx/config-3.10
new file mode 100644 (file)
index 0000000..0f7e12e
--- /dev/null
@@ -0,0 +1,152 @@
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_ARPD is not set
+CONFIG_BCM47XX=y
+CONFIG_BCM47XX_BCMA=y
+CONFIG_BCM47XX_SSB=y
+CONFIG_BCM47XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+CONFIG_BCMA_DEBUG=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_DRIVER_GPIO=y
+CONFIG_BCMA_DRIVER_MIPS=y
+CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+CONFIG_BCMA_HOST_SOC=y
+CONFIG_BCMA_NFLASH=y
+CONFIG_BCMA_SFLASH=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="noinitrd console=ttyS0,115200"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPS32_R1=y
+# CONFIG_CPU_MIPS32_R2 is not set
+CONFIG_CPU_MIPSR1=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_FW_CFE=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIPS=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_MIPS_MACHINE is not set
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MTD_BCM47XXSFLASH=y
+CONFIG_MTD_BCM47XX_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_BCM47XXNFLASH=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_SM_COMMON is not set
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_NET_IP_TUNNEL is not set
+CONFIG_NO_EXCEPT_FILL=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_STALL_COMMON is not set
+# CONFIG_SCSI_DMA is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+CONFIG_SSB_DEBUG=y
+CONFIG_SSB_DRIVER_EXTIF=y
+CONFIG_SSB_DRIVER_GIGE=y
+CONFIG_SSB_DRIVER_GPIO=y
+CONFIG_SSB_DRIVER_MIPS=y
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_EMBEDDED=y
+CONFIG_SSB_PCICORE_HOSTMODE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SERIAL=y
+CONFIG_SSB_SPROM=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_UIDGID_CONVERTED=y
+CONFIG_USB_ARCH_HAS_XHCI=y
+CONFIG_USB_SUPPORT=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/brcm47xx/patches-3.10/026-mtd-bcm47xxpart-find-boot-partition-by-CFE-magic.patch b/target/linux/brcm47xx/patches-3.10/026-mtd-bcm47xxpart-find-boot-partition-by-CFE-magic.patch
new file mode 100644 (file)
index 0000000..d3fb9d3
--- /dev/null
@@ -0,0 +1,26 @@
+--- a/drivers/mtd/bcm47xxpart.c
++++ b/drivers/mtd/bcm47xxpart.c
+@@ -23,9 +23,10 @@
+  * Amount of bytes we read when analyzing each block of flash memory.
+  * Set it big enough to allow detecting partition and reading important data.
+  */
+-#define BCM47XXPART_BYTES_TO_READ     0x404
++#define BCM47XXPART_BYTES_TO_READ     0x4e8
+ /* Magics */
++#define CFE_MAGIC                     0x43464531      /* 1EFC */
+ #define BOARD_DATA_MAGIC              0x5246504D      /* MPFR */
+ #define POT_MAGIC1                    0x54544f50      /* POTT */
+ #define POT_MAGIC2                    0x504f          /* OP */
+@@ -93,8 +94,9 @@ static int bcm47xxpart_parse(struct mtd_
+                       continue;
+               }
+-              /* CFE has small NVRAM at 0x400 */
+-              if (buf[0x400 / 4] == NVRAM_HEADER) {
++              /* Magic or small NVRAM at 0x400 */
++              if (buf[0x4e0 / 4] == CFE_MAGIC ||
++                  buf[0x400 / 4] == NVRAM_HEADER) {
+                       bcm47xxpart_add_part(&parts[curr_part++], "boot",
+                                            offset, MTD_WRITEABLE);
+                       continue;
diff --git a/target/linux/brcm47xx/patches-3.10/027-mtd-bcm47xxpart-get-nvram.patch b/target/linux/brcm47xx/patches-3.10/027-mtd-bcm47xxpart-get-nvram.patch
new file mode 100644 (file)
index 0000000..4cd78c2
--- /dev/null
@@ -0,0 +1,34 @@
+--- a/drivers/mtd/bcm47xxpart.c
++++ b/drivers/mtd/bcm47xxpart.c
+@@ -65,6 +65,7 @@ static int bcm47xxpart_parse(struct mtd_
+       int trx_part = -1;
+       int last_trx_part = -1;
+       int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
++      bool found_nvram = false;
+       if (blocksize <= 0x10000)
+               blocksize = 0x10000;
+@@ -190,12 +191,23 @@ static int bcm47xxpart_parse(struct mtd_
+               if (buf[0] == NVRAM_HEADER) {
+                       bcm47xxpart_add_part(&parts[curr_part++], "nvram",
+                                            master->size - blocksize, 0);
++                      found_nvram = true;
+                       break;
+               }
+       }
+       kfree(buf);
++      if (!found_nvram) {
++              pr_err("can not find a nvram partition reserve last block\n");
++              bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess",
++                                   master->size - blocksize * 2, MTD_WRITEABLE);
++              for (i = 0; i < curr_part; i++) {
++                      if (parts[i].size + parts[i].offset == master->size)
++                              parts[i].offset -= blocksize * 2;
++              }
++      }
++
+       /*
+        * Assume that partitions end at the beginning of the one they are
+        * followed by.
diff --git a/target/linux/brcm47xx/patches-3.10/028-mtd-bcm47xxpart-use-old-part-names.patch b/target/linux/brcm47xx/patches-3.10/028-mtd-bcm47xxpart-use-old-part-names.patch
new file mode 100644 (file)
index 0000000..e43bb87
--- /dev/null
@@ -0,0 +1,20 @@
+--- a/drivers/mtd/bcm47xxpart.c
++++ b/drivers/mtd/bcm47xxpart.c
+@@ -134,7 +134,7 @@ static int bcm47xxpart_parse(struct mtd_
+                       trx = (struct trx_header *)buf;
+                       trx_part = curr_part;
+-                      bcm47xxpart_add_part(&parts[curr_part++], "firmware",
++                      bcm47xxpart_add_part(&parts[curr_part++], "linux",
+                                            offset, 0);
+                       i = 0;
+@@ -147,7 +147,7 @@ static int bcm47xxpart_parse(struct mtd_
+                               i++;
+                       }
+-                      bcm47xxpart_add_part(&parts[curr_part++], "linux",
++                      bcm47xxpart_add_part(&parts[curr_part++], "kernel",
+                                            offset + trx->offset[i], 0);
+                       i++;
diff --git a/target/linux/brcm47xx/patches-3.10/050-mtd_bcm47xxsflash_implement_ChipCommon_RW_ops.patch b/target/linux/brcm47xx/patches-3.10/050-mtd_bcm47xxsflash_implement_ChipCommon_RW_ops.patch
new file mode 100644 (file)
index 0000000..8f43ebb
--- /dev/null
@@ -0,0 +1,53 @@
+commit c8a1de474f49bd928f84e7a99b6f3d23a65b5637
+Author: Rafał Miłecki <zajec5@gmail.com>
+Date:   Sun Mar 24 21:53:24 2013 +0100
+
+    mtd: bcm47xxsflash: implement ChipCommon R/W ops
+    
+    They are needed for erasing/writing. Use a magic pointers and small
+    functions to preapre code for adding other buses support in the future
+    (like SSB).
+    
+    Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+    Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -48,6 +48,17 @@ static void bcm47xxsflash_fill_mtd(struc
+  * BCMA
+  **************************************************/
++static int bcm47xxsflash_bcma_cc_read(struct bcm47xxsflash *b47s, u16 offset)
++{
++      return bcma_cc_read32(b47s->bcma_cc, offset);
++}
++
++static void bcm47xxsflash_bcma_cc_write(struct bcm47xxsflash *b47s, u16 offset,
++                                      u32 value)
++{
++      bcma_cc_write32(b47s->bcma_cc, offset, value);
++}
++
+ static int bcm47xxsflash_bcma_probe(struct platform_device *pdev)
+ {
+       struct bcma_sflash *sflash = dev_get_platdata(&pdev->dev);
+@@ -62,6 +73,8 @@ static int bcm47xxsflash_bcma_probe(stru
+       sflash->priv = b47s;
+       b47s->bcma_cc = container_of(sflash, struct bcma_drv_cc, sflash);
++      b47s->cc_read = bcm47xxsflash_bcma_cc_read;
++      b47s->cc_write = bcm47xxsflash_bcma_cc_write;
+       switch (b47s->bcma_cc->capabilities & BCMA_CC_CAP_FLASHT) {
+       case BCMA_CC_FLASHT_STSER:
+--- a/drivers/mtd/devices/bcm47xxsflash.h
++++ b/drivers/mtd/devices/bcm47xxsflash.h
+@@ -60,6 +60,8 @@ enum bcm47xxsflash_type {
+ struct bcm47xxsflash {
+       struct bcma_drv_cc *bcma_cc;
++      int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
++      void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
+       enum bcm47xxsflash_type type;
diff --git a/target/linux/brcm47xx/patches-3.10/051-mtd_bcm47xxsflash_implement_polling_chip_status.patch b/target/linux/brcm47xx/patches-3.10/051-mtd_bcm47xxsflash_implement_polling_chip_status.patch
new file mode 100644 (file)
index 0000000..3b45234
--- /dev/null
@@ -0,0 +1,87 @@
+commit 7026e9844112fa33e5ffcd562daf0c919b16a9d1
+Author: Rafał Miłecki <zajec5@gmail.com>
+Date:   Sun Mar 24 21:51:31 2013 +0100
+
+    mtd: bcm47xxsflash: implement polling chip status
+    
+    Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+    Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -1,6 +1,7 @@
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/slab.h>
++#include <linux/delay.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/platform_device.h>
+ #include <linux/bcma/bcma.h>
+@@ -12,6 +13,57 @@ MODULE_DESCRIPTION("Serial flash driver
+ static const char * const probes[] = { "bcm47xxpart", NULL };
++/**************************************************
++ * Various helpers
++ **************************************************/
++
++static void bcm47xxsflash_cmd(struct bcm47xxsflash *b47s, u32 opcode)
++{
++      int i;
++
++      b47s->cc_write(b47s, BCMA_CC_FLASHCTL, BCMA_CC_FLASHCTL_START | opcode);
++      for (i = 0; i < 1000; i++) {
++              if (!(b47s->cc_read(b47s, BCMA_CC_FLASHCTL) &
++                    BCMA_CC_FLASHCTL_BUSY))
++                      return;
++              cpu_relax();
++      }
++      pr_err("Control command failed (timeout)!\n");
++}
++
++static int bcm47xxsflash_poll(struct bcm47xxsflash *b47s, int timeout)
++{
++      unsigned long deadline = jiffies + timeout;
++
++      do {
++              switch (b47s->type) {
++              case BCM47XXSFLASH_TYPE_ST:
++                      bcm47xxsflash_cmd(b47s, OPCODE_ST_RDSR);
++                      if (!(b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
++                            SR_ST_WIP))
++                              return 0;
++                      break;
++              case BCM47XXSFLASH_TYPE_ATMEL:
++                      bcm47xxsflash_cmd(b47s, OPCODE_AT_STATUS);
++                      if (b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
++                          SR_AT_READY)
++                              return 0;
++                      break;
++              }
++
++              cpu_relax();
++              udelay(1);
++      } while (!time_after_eq(jiffies, deadline));
++
++      pr_err("Timeout waiting for flash to be ready!\n");
++
++      return -EBUSY;
++}
++
++/**************************************************
++ * MTD ops
++ **************************************************/
++
+ static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len,
+                             size_t *retlen, u_char *buf)
+ {
+@@ -97,6 +149,9 @@ static int bcm47xxsflash_bcma_probe(stru
+               goto err_dev_reg;
+       }
++      if (bcm47xxsflash_poll(b47s, HZ / 10))
++              pr_warn("Serial flash busy\n");
++
+       return 0;
+ err_dev_reg:
diff --git a/target/linux/brcm47xx/patches-3.10/052-mtd_bcm47xxsflash_implement_erasing_support.patch b/target/linux/brcm47xx/patches-3.10/052-mtd_bcm47xxsflash_implement_erasing_support.patch
new file mode 100644 (file)
index 0000000..3446a9f
--- /dev/null
@@ -0,0 +1,74 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Subject: [PATCH] mtd: bcm47xxsflash: implement erasing support
+Date: Tue, 21 May 2013 21:03:46 +0200
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+This has been succesfully tested on BCM4706.
+---
+ drivers/mtd/devices/bcm47xxsflash.c |   43 +++++++++++++++++++++++++++++++++--
+ 1 file changed, 41 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -64,6 +64,42 @@ static int bcm47xxsflash_poll(struct bcm
+  * MTD ops
+  **************************************************/
++static int bcm47xxsflash_erase(struct mtd_info *mtd, struct erase_info *erase)
++{
++      struct bcm47xxsflash *b47s = mtd->priv;
++      int err;
++
++      switch (b47s->type) {
++      case BCM47XXSFLASH_TYPE_ST:
++              bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
++              b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr);
++              /* Newer flashes have "sub-sectors" which can be erased
++               * independently with a new command: ST_SSE. The ST_SE command
++               * erases 64KB just as before.
++               */
++              if (b47s->blocksize < (64 * 1024))
++                      bcm47xxsflash_cmd(b47s, OPCODE_ST_SSE);
++              else
++                      bcm47xxsflash_cmd(b47s, OPCODE_ST_SE);
++              break;
++      case BCM47XXSFLASH_TYPE_ATMEL:
++              b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr << 1);
++              bcm47xxsflash_cmd(b47s, OPCODE_AT_PAGE_ERASE);
++              break;
++      }
++
++      err = bcm47xxsflash_poll(b47s, HZ);
++      if (err)
++              erase->state = MTD_ERASE_FAILED;
++      else
++              erase->state = MTD_ERASE_DONE;
++
++      if (erase->callback)
++              erase->callback(erase);
++
++      return err;
++}
++
+ static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len,
+                             size_t *retlen, u_char *buf)
+ {
+@@ -88,12 +124,15 @@ static void bcm47xxsflash_fill_mtd(struc
+       mtd->name = "bcm47xxsflash";
+       mtd->owner = THIS_MODULE;
+       mtd->type = MTD_ROM;
+-      mtd->size = b47s->size;
+-      mtd->_read = bcm47xxsflash_read;
+       /* TODO: implement writing support and verify/change following code */
+       mtd->flags = MTD_CAP_ROM;
++      mtd->size = b47s->size;
++      mtd->erasesize = b47s->blocksize;
+       mtd->writebufsize = mtd->writesize = 1;
++
++      mtd->_erase = bcm47xxsflash_erase;
++      mtd->_read = bcm47xxsflash_read;
+ }
+ /**************************************************
diff --git a/target/linux/brcm47xx/patches-3.10/053-mtd_bcm47xxsflash_writing_support.patch b/target/linux/brcm47xx/patches-3.10/053-mtd_bcm47xxsflash_writing_support.patch
new file mode 100644 (file)
index 0000000..1938a41
--- /dev/null
@@ -0,0 +1,160 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Subject: [RFC][PATCH] mtd: bcm47xxsflash: writing support
+Date: Wed, 22 May 2013 14:39:02 +0200
+
+---
+ drivers/mtd/devices/bcm47xxsflash.c |  130 +++++++++++++++++++++++++++++++++--
+ 1 file changed, 126 insertions(+), 4 deletions(-)
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -116,6 +116,127 @@ static int bcm47xxsflash_read(struct mtd
+       return len;
+ }
++static int bcm47xxsflash_write_st(struct mtd_info *mtd, u32 offset, size_t len,
++                                const u_char *buf)
++{
++      struct bcm47xxsflash *b47s = mtd->priv;
++      int written = 0;
++
++      /* Enable writes */
++      bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
++
++      /* Write first byte */
++      b47s->cc_write(b47s, BCMA_CC_FLASHADDR, offset);
++      b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
++
++      /* Program page */
++      if (b47s->bcma_cc->core->id.rev < 20) {
++              bcm47xxsflash_cmd(b47s, OPCODE_ST_PP);
++              return 1; /* 1B written */
++      }
++
++      /* Program page and set CSA (on newer chips we can continue writing) */
++      bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | OPCODE_ST_PP);
++      offset++;
++      len--;
++      written++;
++
++      while (len > 0) {
++              /* Page boundary, another function call is needed */
++              if ((offset & 0xFF) == 0)
++                      break;
++
++              bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | *buf++);
++              offset++;
++              len--;
++              written++;
++      }
++
++      /* All done, drop CSA & poll */
++      b47s->cc_write(b47s, BCMA_CC_FLASHCTL, 0);
++      udelay(1);
++      if (bcm47xxsflash_poll(b47s, HZ / 10))
++              pr_err("Flash rejected dropping CSA\n");
++
++      return written;
++}
++
++static int bcm47xxsflash_write_at(struct mtd_info *mtd, u32 offset, size_t len,
++                                const u_char *buf)
++{
++      struct bcm47xxsflash *b47s = mtd->priv;
++      u32 mask = b47s->blocksize - 1;
++      u32 page = (offset & ~mask) << 1;
++      u32 byte = offset & mask;
++      int written = 0;
++
++      /* If we don't overwrite whole page, read it to the buffer first */
++      if (byte || (len < b47s->blocksize)) {
++              int err;
++
++              b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
++              bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_LOAD);
++              /* 250 us for AT45DB321B */
++              err = bcm47xxsflash_poll(b47s, HZ / 1000);
++              if (err) {
++                      pr_err("Timeout reading page 0x%X info buffer\n", page);
++                      return err;
++              }
++      }
++
++      /* Change buffer content with our data */
++      while (len > 0) {
++              /* Page boundary, another function call is needed */
++              if (byte == b47s->blocksize)
++                      break;
++
++              b47s->cc_write(b47s, BCMA_CC_FLASHADDR, byte++);
++              b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
++              bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_WRITE);
++              len--;
++              written++;
++      }
++
++      /* Program page with the buffer content */
++      b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
++      bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_PROGRAM);
++
++      return written;
++}
++
++static int bcm47xxsflash_write(struct mtd_info *mtd, loff_t to, size_t len,
++                             size_t *retlen, const u_char *buf)
++{
++      struct bcm47xxsflash *b47s = mtd->priv;
++      int written;
++
++      /* Writing functions can return without writing all passed data, for
++       * example when the hardware is too old or when we git page boundary.
++       */
++      while (len > 0) {
++              switch (b47s->type) {
++              case BCM47XXSFLASH_TYPE_ST:
++                      written = bcm47xxsflash_write_st(mtd, to, len, buf);
++                      break;
++              case BCM47XXSFLASH_TYPE_ATMEL:
++                      written = bcm47xxsflash_write_at(mtd, to, len, buf);
++                      break;
++              default:
++                      BUG_ON(1);
++              }
++              if (written < 0) {
++                      pr_err("Error writing at offset 0x%llX\n", to);
++                      return written;
++              }
++              to += (loff_t)written;
++              len -= written;
++              *retlen += written;
++              buf += written;
++      }
++
++      return 0;
++}
++
+ static void bcm47xxsflash_fill_mtd(struct bcm47xxsflash *b47s)
+ {
+       struct mtd_info *mtd = &b47s->mtd;
+@@ -123,16 +244,17 @@ static void bcm47xxsflash_fill_mtd(struc
+       mtd->priv = b47s;
+       mtd->name = "bcm47xxsflash";
+       mtd->owner = THIS_MODULE;
+-      mtd->type = MTD_ROM;
+-      /* TODO: implement writing support and verify/change following code */
+-      mtd->flags = MTD_CAP_ROM;
++      mtd->type = MTD_NORFLASH;
++      mtd->flags = MTD_CAP_NORFLASH;
+       mtd->size = b47s->size;
+       mtd->erasesize = b47s->blocksize;
+-      mtd->writebufsize = mtd->writesize = 1;
++      mtd->writesize = 1;
++      mtd->writebufsize = 1;
+       mtd->_erase = bcm47xxsflash_erase;
+       mtd->_read = bcm47xxsflash_read;
++      mtd->_write = bcm47xxsflash_write;
+ }
+ /**************************************************
diff --git a/target/linux/brcm47xx/patches-3.10/054-mtd_bcm47xxsflash_convert_kzalloc_to_avoid_invalid_access.patch b/target/linux/brcm47xx/patches-3.10/054-mtd_bcm47xxsflash_convert_kzalloc_to_avoid_invalid_access.patch
new file mode 100644 (file)
index 0000000..3e8a44c
--- /dev/null
@@ -0,0 +1,62 @@
+Date: Thu, 30 May 2013 10:22:12 +0800
+From: Libo Chen <clbchenlibo.chen@huawei.com>
+Subject: [PATCH RESEND 1/2] mtd: bcm47: convert kzalloc to avoid invalid access
+
+
+mtd is just member of bcm47xxsflash, so we should free bcm47xxsflash not its member.
+So I use devm_kazlloc instead of kazlloc to avoid it.
+
+* Changelog:
+   convert to devm_kzalloc
+
+Signed-off-by: Libo chen <libo.chen@huawei.com>
+Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+---
+ drivers/mtd/devices/bcm47xxsflash.c |   16 ++++------------
+ 1 files changed, 4 insertions(+), 12 deletions(-)
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -278,11 +278,9 @@ static int bcm47xxsflash_bcma_probe(stru
+       struct bcm47xxsflash *b47s;
+       int err;
+-      b47s = kzalloc(sizeof(*b47s), GFP_KERNEL);
+-      if (!b47s) {
+-              err = -ENOMEM;
+-              goto out;
+-      }
++      b47s = devm_kzalloc(&pdev->dev, sizeof(*b47s), GFP_KERNEL);
++      if (!b47s)
++              return -ENOMEM;
+       sflash->priv = b47s;
+       b47s->bcma_cc = container_of(sflash, struct bcma_drv_cc, sflash);
+@@ -307,18 +305,13 @@ static int bcm47xxsflash_bcma_probe(stru
+       err = mtd_device_parse_register(&b47s->mtd, probes, NULL, NULL, 0);
+       if (err) {
+               pr_err("Failed to register MTD device: %d\n", err);
+-              goto err_dev_reg;
++              return err;
+       }
+       if (bcm47xxsflash_poll(b47s, HZ / 10))
+               pr_warn("Serial flash busy\n");
+       return 0;
+-
+-err_dev_reg:
+-      kfree(&b47s->mtd);
+-out:
+-      return err;
+ }
+ static int bcm47xxsflash_bcma_remove(struct platform_device *pdev)
+@@ -327,7 +320,6 @@ static int bcm47xxsflash_bcma_remove(str
+       struct bcm47xxsflash *b47s = sflash->priv;
+       mtd_device_unregister(&b47s->mtd);
+-      kfree(b47s);
+       return 0;
+ }
diff --git a/target/linux/brcm47xx/patches-3.10/055-mtd_bcm47xxsflash_convert_to_module_platform_driver.patch b/target/linux/brcm47xx/patches-3.10/055-mtd_bcm47xxsflash_convert_to_module_platform_driver.patch
new file mode 100644 (file)
index 0000000..5ef087b
--- /dev/null
@@ -0,0 +1,39 @@
+Date: Thu, 30 May 2013 10:22:16 +0800
+From: Libo Chen <clbchenlibo.chen@huawei.com>
+Subject: [PATCH RESEND 2/2] mtd: bcm47: convert to module_platform_driver
+ instead of init/exit
+
+convert to module_platform_driver instead of init/exit
+
+Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Signed-off-by: Libo chen <libo.chen@huawei.com>
+---
+ drivers/mtd/devices/bcm47xxsflash.c |   20 +-------------------
+ 1 files changed, 1 insertions(+), 19 deletions(-)
+
+--- a/drivers/mtd/devices/bcm47xxsflash.c
++++ b/drivers/mtd/devices/bcm47xxsflash.c
+@@ -337,22 +337,4 @@ static struct platform_driver bcma_sflas
+  * Init
+  **************************************************/
+-static int __init bcm47xxsflash_init(void)
+-{
+-      int err;
+-
+-      err = platform_driver_register(&bcma_sflash_driver);
+-      if (err)
+-              pr_err("Failed to register BCMA serial flash driver: %d\n",
+-                     err);
+-
+-      return err;
+-}
+-
+-static void __exit bcm47xxsflash_exit(void)
+-{
+-      platform_driver_unregister(&bcma_sflash_driver);
+-}
+-
+-module_init(bcm47xxsflash_init);
+-module_exit(bcm47xxsflash_exit);
++module_platform_driver(bcma_sflash_driver);
diff --git a/target/linux/brcm47xx/patches-3.10/114-MIPS-BCM47xx-Setup-and-register-serial-early.patch b/target/linux/brcm47xx/patches-3.10/114-MIPS-BCM47xx-Setup-and-register-serial-early.patch
new file mode 100644 (file)
index 0000000..5e324e4
--- /dev/null
@@ -0,0 +1,69 @@
+From 9be402f069cc259ad5795b77567d66c4e7f6bef6 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sun, 18 Jul 2010 14:59:24 +0200
+Subject: [PATCH 4/6] MIPS: BCM47xx: Setup and register serial early
+
+Swap the first and second serial if console=ttyS1 was set.
+Set it up and register it for early serial support.
+
+This patch has been in OpenWRT for a long time.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/mips/bcm47xx/setup.c |   39 ++++++++++++++++++++++++++++++++++++++-
+ 1 files changed, 38 insertions(+), 1 deletions(-)
+
+--- a/arch/mips/bcm47xx/setup.c
++++ b/arch/mips/bcm47xx/setup.c
+@@ -31,6 +31,8 @@
+ #include <linux/ssb/ssb.h>
+ #include <linux/ssb/ssb_embedded.h>
+ #include <linux/bcma/bcma_soc.h>
++#include <linux/serial.h>
++#include <linux/serial_8250.h>
+ #include <asm/bootinfo.h>
+ #include <asm/reboot.h>
+ #include <asm/time.h>
+@@ -121,6 +123,31 @@ static int bcm47xx_get_invariants(struct
+       return 0;
+ }
++#ifdef CONFIG_SERIAL_8250
++static void __init bcm47xx_early_serial_setup(struct ssb_mipscore *mcore)
++{
++      int i;
++
++      for (i = 0; i < mcore->nr_serial_ports; i++) {
++              struct ssb_serial_port *port = &(mcore->serial_ports[i]);
++              struct uart_port s;
++
++              memset(&s, 0, sizeof(s));
++              s.line = i;
++              s.mapbase = (unsigned int) port->regs;
++              s.membase = port->regs;
++              s.irq = port->irq + 2;
++              s.uartclk = port->baud_base;
++              s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
++              s.iotype = SERIAL_IO_MEM;
++              s.regshift = port->reg_shift;
++
++              early_serial_setup(&s);
++      }
++      printk(KERN_DEBUG "Serial init done.\n");
++}
++#endif
++
+ static void __init bcm47xx_register_ssb(void)
+ {
+       int err;
+@@ -150,6 +177,10 @@ static void __init bcm47xx_register_ssb(
+                       memcpy(&mcore->serial_ports[1], &port, sizeof(port));
+               }
+       }
++
++#ifdef CONFIG_SERIAL_8250
++      bcm47xx_early_serial_setup(mcore);
++#endif
+ }
+ #endif
diff --git a/target/linux/brcm47xx/patches-3.10/116-MIPS-BCM47xx-Remove-CFE-console.patch b/target/linux/brcm47xx/patches-3.10/116-MIPS-BCM47xx-Remove-CFE-console.patch
new file mode 100644 (file)
index 0000000..0e0f8a3
--- /dev/null
@@ -0,0 +1,141 @@
+From 5219981646071abb6731634bf47781a53e248764 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sun, 18 Jul 2010 15:11:26 +0200
+Subject: [PATCH 6/6] MIPS: BCM47xx: Remove CFE console
+
+Do not use the CFE console. It causes hangs on some devices like the
+Buffalo WHR-HP-G54.
+This was reported in https://dev.openwrt.org/ticket/4061 and
+https://forum.openwrt.org/viewtopic.php?id=17063
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/mips/Kconfig        |    1 -
+ arch/mips/bcm47xx/prom.c |   82 +++------------------------------------------
+ 2 files changed, 6 insertions(+), 77 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -117,7 +117,6 @@ config BCM47XX
+       select NO_EXCEPT_FILL
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_LITTLE_ENDIAN
+-      select SYS_HAS_EARLY_PRINTK
+       help
+        Support for BCM47XX based boards
+--- a/arch/mips/bcm47xx/prom.c
++++ b/arch/mips/bcm47xx/prom.c
+@@ -33,96 +33,28 @@
+ #include <asm/fw/cfe/cfe_api.h>
+ #include <asm/fw/cfe/cfe_error.h>
+-static int cfe_cons_handle;
+-
+ const char *get_system_type(void)
+ {
+       return "Broadcom BCM47XX";
+ }
+-void prom_putchar(char c)
+-{
+-      while (cfe_write(cfe_cons_handle, &c, 1) == 0)
+-              ;
+-}
+-
+-static __init void prom_init_cfe(void)
++static __init int prom_init_cfe(void)
+ {
+       uint32_t cfe_ept;
+       uint32_t cfe_handle;
+       uint32_t cfe_eptseal;
+-      int argc = fw_arg0;
+-      char **envp = (char **) fw_arg2;
+-      int *prom_vec = (int *) fw_arg3;
+-
+-      /*
+-       * Check if a loader was used; if NOT, the 4 arguments are
+-       * what CFE gives us (handle, 0, EPT and EPTSEAL)
+-       */
+-      if (argc < 0) {
+-              cfe_handle = (uint32_t)argc;
+-              cfe_ept = (uint32_t)envp;
+-              cfe_eptseal = (uint32_t)prom_vec;
+-      } else {
+-              if ((int)prom_vec < 0) {
+-                      /*
+-                       * Old loader; all it gives us is the handle,
+-                       * so use the "known" entrypoint and assume
+-                       * the seal.
+-                       */
+-                      cfe_handle = (uint32_t)prom_vec;
+-                      cfe_ept = 0xBFC00500;
+-                      cfe_eptseal = CFE_EPTSEAL;
+-              } else {
+-                      /*
+-                       * Newer loaders bundle the handle/ept/eptseal
+-                       * Note: prom_vec is in the loader's useg
+-                       * which is still alive in the TLB.
+-                       */
+-                      cfe_handle = prom_vec[0];
+-                      cfe_ept = prom_vec[2];
+-                      cfe_eptseal = prom_vec[3];
+-              }
+-      }
++
++      cfe_eptseal = (uint32_t) fw_arg3;
++      cfe_handle = (uint32_t) fw_arg0;
++      cfe_ept = (uint32_t) fw_arg2;
+       if (cfe_eptseal != CFE_EPTSEAL) {
+-              /* too early for panic to do any good */
+               printk(KERN_ERR "CFE's entrypoint seal doesn't match.");
+-              while (1) ;
++              return -1;
+       }
+       cfe_init(cfe_handle, cfe_ept);
+-}
+-
+-static __init void prom_init_console(void)
+-{
+-      /* Initialize CFE console */
+-      cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
+-}
+-
+-static __init void prom_init_cmdline(void)
+-{
+-      static char buf[COMMAND_LINE_SIZE] __initdata;
+-
+-      /* Get the kernel command line from CFE */
+-      if (cfe_getenv("LINUX_CMDLINE", buf, COMMAND_LINE_SIZE) >= 0) {
+-              buf[COMMAND_LINE_SIZE - 1] = 0;
+-              strcpy(arcs_cmdline, buf);
+-      }
+-
+-      /* Force a console handover by adding a console= argument if needed,
+-       * as CFE is not available anymore later in the boot process. */
+-      if ((strstr(arcs_cmdline, "console=")) == NULL) {
+-              /* Try to read the default serial port used by CFE */
+-              if ((cfe_getenv("BOOT_CONSOLE", buf, COMMAND_LINE_SIZE) < 0)
+-                  || (strncmp("uart", buf, 4)))
+-                      /* Default to uart0 */
+-                      strcpy(buf, "uart0");
+-
+-              /* Compute the new command line */
+-              snprintf(arcs_cmdline, COMMAND_LINE_SIZE, "%s console=ttyS%c,115200",
+-                       arcs_cmdline, buf[4]);
+-      }
++      return 0;
+ }
+ static __init void prom_init_mem(void)
+@@ -173,8 +105,6 @@ static __init void prom_init_mem(void)
+ void __init prom_init(void)
+ {
+       prom_init_cfe();
+-      prom_init_console();
+-      prom_init_cmdline();
+       prom_init_mem();
+ }
diff --git a/target/linux/brcm47xx/patches-3.10/150-cpu_fixes.patch b/target/linux/brcm47xx/patches-3.10/150-cpu_fixes.patch
new file mode 100644 (file)
index 0000000..984624a
--- /dev/null
@@ -0,0 +1,368 @@
+--- a/arch/mips/include/asm/r4kcache.h
++++ b/arch/mips/include/asm/r4kcache.h
+@@ -17,6 +17,20 @@
+ #include <asm/cpu-features.h>
+ #include <asm/mipsmtregs.h>
++#ifdef CONFIG_BCM47XX
++#include <asm/paccess.h>
++#include <linux/ssb/ssb.h>
++#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
++
++#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
++#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
++#else
++#define BCM4710_DUMMY_RREG()
++
++#define BCM4710_FILL_TLB(addr)
++#define BCM4710_PROTECTED_FILL_TLB(addr)
++#endif
++
+ /*
+  * This macro return a properly sign-extended address suitable as base address
+  * for indexed cache operations.  Two issues here:
+@@ -150,6 +164,7 @@ static inline void flush_icache_line_ind
+ static inline void flush_dcache_line_indexed(unsigned long addr)
+ {
+       __dflush_prologue
++      BCM4710_DUMMY_RREG();
+       cache_op(Index_Writeback_Inv_D, addr);
+       __dflush_epilogue
+ }
+@@ -169,6 +184,7 @@ static inline void flush_icache_line(uns
+ static inline void flush_dcache_line(unsigned long addr)
+ {
+       __dflush_prologue
++      BCM4710_DUMMY_RREG();
+       cache_op(Hit_Writeback_Inv_D, addr);
+       __dflush_epilogue
+ }
+@@ -176,6 +192,7 @@ static inline void flush_dcache_line(uns
+ static inline void invalidate_dcache_line(unsigned long addr)
+ {
+       __dflush_prologue
++      BCM4710_DUMMY_RREG();
+       cache_op(Hit_Invalidate_D, addr);
+       __dflush_epilogue
+ }
+@@ -208,6 +225,7 @@ static inline void flush_scache_line(uns
+  */
+ static inline void protected_flush_icache_line(unsigned long addr)
+ {
++      BCM4710_DUMMY_RREG();
+       protected_cache_op(Hit_Invalidate_I, addr);
+ }
+@@ -219,6 +237,7 @@ static inline void protected_flush_icach
+  */
+ static inline void protected_writeback_dcache_line(unsigned long addr)
+ {
++      BCM4710_DUMMY_RREG();
+       protected_cache_op(Hit_Writeback_Inv_D, addr);
+ }
+@@ -339,8 +358,52 @@ static inline void invalidate_tcache_pag
+               : "r" (base),                                           \
+                 "i" (op));
++static inline void blast_dcache(void)
++{
++      unsigned long start = KSEG0;
++      unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
++      unsigned long end = (start + dcache_size);
++
++      do {
++              BCM4710_DUMMY_RREG();
++              cache_op(Index_Writeback_Inv_D, start);
++              start += current_cpu_data.dcache.linesz;
++      } while(start < end);
++}
++
++static inline void blast_dcache_page(unsigned long page)
++{
++      unsigned long start = page;
++      unsigned long end = start + PAGE_SIZE;
++
++      BCM4710_FILL_TLB(start);
++      do {
++              BCM4710_DUMMY_RREG();
++              cache_op(Hit_Writeback_Inv_D, start);
++              start += current_cpu_data.dcache.linesz;
++      } while(start < end);
++}
++
++static inline void blast_dcache_page_indexed(unsigned long page)
++{
++      unsigned long start = page;
++      unsigned long end = start + PAGE_SIZE;
++      unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
++      unsigned long ws_end = current_cpu_data.dcache.ways <<
++                             current_cpu_data.dcache.waybit;
++      unsigned long ws, addr;
++      for (ws = 0; ws < ws_end; ws += ws_inc) {
++              start = page + ws;
++              for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
++                      BCM4710_DUMMY_RREG();
++                      cache_op(Index_Writeback_Inv_D, addr);
++              }
++      }
++}
++
++
+ /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
+-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \
++#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, war) \
+ static inline void blast_##pfx##cache##lsize(void)                    \
+ {                                                                     \
+       unsigned long start = INDEX_BASE;                               \
+@@ -352,6 +415,7 @@ static inline void blast_##pfx##cache##l
+                                                                       \
+       __##pfx##flush_prologue                                         \
+                                                                       \
++      war                                                             \
+       for (ws = 0; ws < ws_end; ws += ws_inc)                         \
+               for (addr = start; addr < end; addr += lsize * 32)      \
+                       cache##lsize##_unroll32(addr|ws, indexop);      \
+@@ -366,6 +430,7 @@ static inline void blast_##pfx##cache##l
+                                                                       \
+       __##pfx##flush_prologue                                         \
+                                                                       \
++      war                                                             \
+       do {                                                            \
+               cache##lsize##_unroll32(start, hitop);                  \
+               start += lsize * 32;                                    \
+@@ -384,6 +449,8 @@ static inline void blast_##pfx##cache##l
+                              current_cpu_data.desc.waybit;            \
+       unsigned long ws, addr;                                         \
+                                                                       \
++      war                                                             \
++                                                                      \
+       __##pfx##flush_prologue                                         \
+                                                                       \
+       for (ws = 0; ws < ws_end; ws += ws_inc)                         \
+@@ -393,36 +460,38 @@ static inline void blast_##pfx##cache##l
+       __##pfx##flush_epilogue                                         \
+ }
+-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16)
+-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
+-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
+-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32)
+-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
+-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
+-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64)
+-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
+-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
+-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
+-
+-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16)
+-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
+-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16)
+-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32)
+-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64)
+-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128)
++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, BCM4710_FILL_TLB(start);)
++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, BCM4710_FILL_TLB(start);)
++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, BCM4710_FILL_TLB(start);)
++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
++
++__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
++__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
+ /* build blast_xxx_range, protected_blast_xxx_range */
+-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
++#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, war, war2) \
+ static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
+                                                   unsigned long end)  \
+ {                                                                     \
+       unsigned long lsize = cpu_##desc##_line_size();                 \
+       unsigned long addr = start & ~(lsize - 1);                      \
+       unsigned long aend = (end - 1) & ~(lsize - 1);                  \
++      war                                                             \
+                                                                       \
+       __##pfx##flush_prologue                                         \
+                                                                       \
+       while (1) {                                                     \
++              war2                                            \
+               prot##cache_op(hitop, addr);                            \
+               if (addr == aend)                                       \
+                       break;                                          \
+@@ -432,13 +501,13 @@ static inline void prot##blast_##pfx##ca
+       __##pfx##flush_epilogue                                         \
+ }
+-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_)
+-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_)
+-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_)
+-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
+-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
++__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
++__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_,, )
++__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_,, )
++__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D,, BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
++__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD,,, )
+ /* blast_inv_dcache_range */
+-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
+-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, )
++__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D,,,BCM4710_DUMMY_RREG();)
++__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, )
+ #endif /* _ASM_R4KCACHE_H */
+--- a/arch/mips/include/asm/stackframe.h
++++ b/arch/mips/include/asm/stackframe.h
+@@ -449,6 +449,10 @@
+               .macro  RESTORE_SP_AND_RET
+               LONG_L  sp, PT_R29(sp)
+               .set    mips3
++#ifdef CONFIG_BCM47XX
++              nop
++              nop
++#endif
+               eret
+               .set    mips0
+               .endm
+--- a/arch/mips/kernel/genex.S
++++ b/arch/mips/kernel/genex.S
+@@ -46,6 +46,10 @@
+ NESTED(except_vec3_generic, 0, sp)
+       .set    push
+       .set    noat
++#ifdef CONFIG_BCM47XX
++      nop
++      nop
++#endif
+ #if R5432_CP0_INTERRUPT_WAR
+       mfc0    k0, CP0_INDEX
+ #endif
+--- a/arch/mips/mm/c-r4k.c
++++ b/arch/mips/mm/c-r4k.c
+@@ -35,6 +35,9 @@
+ #include <asm/traps.h>
+ #include <asm/dma-coherence.h>
++/* For enabling BCM4710 cache workarounds */
++int bcm4710 = 0;
++
+ /*
+  * Special Variant of smp_call_function for use by cache functions:
+  *
+@@ -111,6 +114,9 @@ static void __cpuinit r4k_blast_dcache_p
+ {
+       unsigned long  dc_lsize = cpu_dcache_line_size();
++      if (bcm4710)
++              r4k_blast_dcache_page = blast_dcache_page;
++      else
+       if (dc_lsize == 0)
+               r4k_blast_dcache_page = (void *)cache_noop;
+       else if (dc_lsize == 16)
+@@ -127,6 +133,9 @@ static void __cpuinit r4k_blast_dcache_p
+ {
+       unsigned long dc_lsize = cpu_dcache_line_size();
++      if (bcm4710)
++              r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
++      else
+       if (dc_lsize == 0)
+               r4k_blast_dcache_page_indexed = (void *)cache_noop;
+       else if (dc_lsize == 16)
+@@ -144,6 +153,9 @@ static void __cpuinit r4k_blast_dcache_s
+ {
+       unsigned long dc_lsize = cpu_dcache_line_size();
++      if (bcm4710)
++              r4k_blast_dcache = blast_dcache;
++      else
+       if (dc_lsize == 0)
+               r4k_blast_dcache = (void *)cache_noop;
+       else if (dc_lsize == 16)
+@@ -674,6 +686,8 @@ static void local_r4k_flush_cache_sigtra
+       unsigned long addr = (unsigned long) arg;
+       R4600_HIT_CACHEOP_WAR_IMPL;
++      BCM4710_PROTECTED_FILL_TLB(addr);
++      BCM4710_PROTECTED_FILL_TLB(addr + 4);
+       if (dc_lsize)
+               protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+       if (!cpu_icache_snoops_remote_store && scache_size)
+@@ -1357,6 +1371,17 @@ static void __cpuinit coherency_setup(vo
+        * silly idea of putting something else there ...
+        */
+       switch (current_cpu_type()) {
++      case CPU_BMIPS3300:
++              {
++                      u32 cm;
++                      cm = read_c0_diag();
++                      /* Enable icache */
++                      cm |= (1 << 31);
++                      /* Enable dcache */
++                      cm |= (1 << 30);
++                      write_c0_diag(cm);
++              }
++              break;
+       case CPU_R4000PC:
+       case CPU_R4000SC:
+       case CPU_R4000MC:
+@@ -1404,6 +1429,15 @@ void __cpuinit r4k_cache_init(void)
+       extern void build_copy_page(void);
+       struct cpuinfo_mips *c = &current_cpu_data;
++      /* Check if special workarounds are required */
++#ifdef CONFIG_BCM47XX
++      if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
++              printk("Enabling BCM4710A0 cache workarounds.\n");
++              bcm4710 = 1;
++      } else
++#endif
++              bcm4710 = 0;
++
+       probe_pcache();
+       setup_scache();
+@@ -1469,6 +1503,14 @@ void __cpuinit r4k_cache_init(void)
+        */
+       local_r4k___flush_cache_all(NULL);
++#ifdef CONFIG_BCM47XX
++      {
++              static void (*_coherency_setup)(void);
++              _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
++              _coherency_setup();
++      }
++#else
+       coherency_setup();
++#endif
+       board_cache_error_setup = r4k_cache_error_setup;
+ }
+--- a/arch/mips/mm/tlbex.c
++++ b/arch/mips/mm/tlbex.c
+@@ -1311,6 +1311,9 @@ static void __cpuinit build_r4000_tlb_re
+                       /* No need for uasm_i_nop */
+               }
++#ifdef CONFIG_BCM47XX
++              uasm_i_nop(&p);
++#endif
+ #ifdef CONFIG_64BIT
+               build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
+ #else
+@@ -1842,6 +1845,9 @@ build_r4000_tlbchange_handler_head(u32 *
+ {
+       struct work_registers wr = build_get_work_registers(p);
++#ifdef CONFIG_BCM47XX
++      uasm_i_nop(p);
++#endif
+ #ifdef CONFIG_64BIT
+       build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
+ #else
diff --git a/target/linux/brcm47xx/patches-3.10/160-kmap_coherent.patch b/target/linux/brcm47xx/patches-3.10/160-kmap_coherent.patch
new file mode 100644 (file)
index 0000000..6317f5c
--- /dev/null
@@ -0,0 +1,77 @@
+--- a/arch/mips/include/asm/cpu-features.h
++++ b/arch/mips/include/asm/cpu-features.h
+@@ -116,6 +116,9 @@
+ #ifndef cpu_has_local_ebase
+ #define cpu_has_local_ebase   1
+ #endif
++#ifndef cpu_use_kmap_coherent
++#define cpu_use_kmap_coherent 1
++#endif
+ /*
+  * I-Cache snoops remote store.        This only matters on SMP.  Some multiprocessors
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
+@@ -0,0 +1,13 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
++ */
++#ifndef __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
++#define __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_use_kmap_coherent 0
++
++#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */
+--- a/arch/mips/mm/c-r4k.c
++++ b/arch/mips/mm/c-r4k.c
+@@ -509,7 +509,7 @@ static inline void local_r4k_flush_cache
+                */
+               map_coherent = (cpu_has_dc_aliases &&
+                               page_mapped(page) && !Page_dcache_dirty(page));
+-              if (map_coherent)
++              if (map_coherent && cpu_use_kmap_coherent)
+                       vaddr = kmap_coherent(page, addr);
+               else
+                       vaddr = kmap_atomic(page);
+@@ -532,7 +532,7 @@ static inline void local_r4k_flush_cache
+       }
+       if (vaddr) {
+-              if (map_coherent)
++              if (map_coherent && cpu_use_kmap_coherent)
+                       kunmap_coherent();
+               else
+                       kunmap_atomic(vaddr);
+--- a/arch/mips/mm/init.c
++++ b/arch/mips/mm/init.c
+@@ -203,7 +203,7 @@ void copy_user_highpage(struct page *to,
+       void *vfrom, *vto;
+       vto = kmap_atomic(to);
+-      if (cpu_has_dc_aliases &&
++      if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
+           page_mapped(from) && !Page_dcache_dirty(from)) {
+               vfrom = kmap_coherent(from, vaddr);
+               copy_page(vto, vfrom);
+@@ -225,7 +225,7 @@ void copy_to_user_page(struct vm_area_st
+       struct page *page, unsigned long vaddr, void *dst, const void *src,
+       unsigned long len)
+ {
+-      if (cpu_has_dc_aliases &&
++      if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
+           page_mapped(page) && !Page_dcache_dirty(page)) {
+               void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+               memcpy(vto, src, len);
+@@ -243,7 +243,7 @@ void copy_from_user_page(struct vm_area_
+       struct page *page, unsigned long vaddr, void *dst, const void *src,
+       unsigned long len)
+ {
+-      if (cpu_has_dc_aliases &&
++      if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
+           page_mapped(page) && !Page_dcache_dirty(page)) {
+               void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+               memcpy(dst, vfrom, len);
diff --git a/target/linux/brcm47xx/patches-3.10/170-fix-74k-cpu.patch b/target/linux/brcm47xx/patches-3.10/170-fix-74k-cpu.patch
new file mode 100644 (file)
index 0000000..7715cf2
--- /dev/null
@@ -0,0 +1,12 @@
+--- a/arch/mips/kernel/idle.c
++++ b/arch/mips/kernel/idle.c
+@@ -188,9 +188,6 @@ void __init check_wait(void)
+               break;
+       case CPU_74K:
+-              cpu_wait = r4k_wait;
+-              if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0))
+-                      cpu_wait = r4k_wait_irqoff;
+               break;
+       case CPU_TX49XX:
diff --git a/target/linux/brcm47xx/patches-3.10/210-b44_phy_fix.patch b/target/linux/brcm47xx/patches-3.10/210-b44_phy_fix.patch
new file mode 100644 (file)
index 0000000..8cf4b0f
--- /dev/null
@@ -0,0 +1,54 @@
+--- a/drivers/net/ethernet/broadcom/b44.c
++++ b/drivers/net/ethernet/broadcom/b44.c
+@@ -410,10 +410,34 @@ static void b44_wap54g10_workaround(stru
+ error:
+       pr_warning("PHY: cannot reset MII transceiver isolate bit\n");
+ }
++
++static void b44_bcm47xx_workarounds(struct b44 *bp)
++{
++      char buf[20];
++      struct ssb_device *sdev = bp->sdev;
++
++      /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */
++      if (sdev->bus->sprom.board_num == 100) {
++              bp->phy_addr = B44_PHY_ADDR_NO_PHY;
++      } else {
++              /* WL-HDD */
++              if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 &&
++                  !strncmp(buf, "WL300-", strlen("WL300-"))) {
++                      if (sdev->bus->sprom.et0phyaddr == 0 &&
++                          sdev->bus->sprom.et1phyaddr == 1)
++                              bp->phy_addr = B44_PHY_ADDR_NO_PHY;
++              }
++      }
++      return;
++}
+ #else
+ static inline void b44_wap54g10_workaround(struct b44 *bp)
+ {
+ }
++
++static inline void b44_bcm47xx_workarounds(struct b44 *bp)
++{
++}
+ #endif
+ static int b44_setup_phy(struct b44 *bp)
+@@ -422,6 +446,7 @@ static int b44_setup_phy(struct b44 *bp)
+       int err;
+       b44_wap54g10_workaround(bp);
++      b44_bcm47xx_workarounds(bp);
+       if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
+               return 0;
+@@ -2101,6 +2126,8 @@ static int b44_get_invariants(struct b44
+        * valid PHY address. */
+       bp->phy_addr &= 0x1F;
++      b44_bcm47xx_workarounds(bp);
++
+       memcpy(bp->dev->dev_addr, addr, 6);
+       if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
diff --git a/target/linux/brcm47xx/patches-3.10/211-b44_timeout_spam.patch b/target/linux/brcm47xx/patches-3.10/211-b44_timeout_spam.patch
new file mode 100644 (file)
index 0000000..c2eb3ad
--- /dev/null
@@ -0,0 +1,15 @@
+--- a/drivers/net/ethernet/broadcom/b44.c
++++ b/drivers/net/ethernet/broadcom/b44.c
+@@ -187,10 +187,11 @@ static int b44_wait_bit(struct b44 *bp,
+               udelay(10);
+       }
+       if (i == timeout) {
++#if 0
+               if (net_ratelimit())
+                       netdev_err(bp->dev, "BUG!  Timeout waiting for bit %08x of register %lx to %s\n",
+                                  bit, reg, clear ? "clear" : "set");
+-
++#endif
+               return -ENODEV;
+       }
+       return 0;
diff --git a/target/linux/brcm47xx/patches-3.10/241-bcma-broadcom-2011-sdk-updates.patch b/target/linux/brcm47xx/patches-3.10/241-bcma-broadcom-2011-sdk-updates.patch
new file mode 100644 (file)
index 0000000..72b0208
--- /dev/null
@@ -0,0 +1,10 @@
+--- a/drivers/bcma/core.c
++++ b/drivers/bcma/core.c
+@@ -43,6 +43,7 @@ int bcma_core_enable(struct bcma_device
+       bcma_aread32(core, BCMA_IOCTL);
+       bcma_awrite32(core, BCMA_RESET_CTL, 0);
++      bcma_aread32(core, BCMA_RESET_CTL);
+       udelay(1);
+       bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
diff --git a/target/linux/brcm47xx/patches-3.10/260-MIPS-BCM47XX-add-board-detection.patch b/target/linux/brcm47xx/patches-3.10/260-MIPS-BCM47XX-add-board-detection.patch
new file mode 100644 (file)
index 0000000..cef3d52
--- /dev/null
@@ -0,0 +1,328 @@
+--- a/arch/mips/bcm47xx/Makefile
++++ b/arch/mips/bcm47xx/Makefile
+@@ -4,4 +4,5 @@
+ #
+ obj-y                         += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
++obj-y                         += board.o
+ obj-$(CONFIG_BCM47XX_SSB)     += wgt634u.o
+--- /dev/null
++++ b/arch/mips/bcm47xx/board.c
+@@ -0,0 +1,223 @@
++#include <linux/export.h>
++#include <linux/string.h>
++#include <bcm47xx_board.h>
++#include <bcm47xx_nvram.h>
++
++struct bcm47xx_board_type {
++      const enum bcm47xx_board board;
++      const char *name;
++};
++
++struct bcm47xx_board_type_list {
++      struct bcm47xx_board_type board;
++      const char *value1;
++      const char *value2;
++};
++
++static const struct bcm47xx_board_type *bcm47xx_board = NULL;
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_model_name[] = {
++      {{BCM47XX_BOARD_DLINK_DIR130, "D-Link DIR-130"}, "DIR-130",},
++      {{BCM47XX_BOARD_DLINK_DIR330, "D-Link DIR-330"}, "DIR-330",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_model_no[] = {
++      {{BCM47XX_BOARD_ASUS_WL700GE, "Asus WL700"}, "WL700",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_hardware_version[] = {
++      {{BCM47XX_BOARD_ASUS_RTN16, "Asus RT-N16"}, "RT-N16-",},
++      {{BCM47XX_BOARD_ASUS_WL330GE, "Asus WL330GE"}, "WL330GE-",},
++      {{BCM47XX_BOARD_ASUS_WL500GPV1, "Asus WL500GP V1"}, "WL500gp-",},
++      {{BCM47XX_BOARD_ASUS_WL500GPV2, "Asus WL500GP V2"}, "WL500GPV2-",},
++      {{BCM47XX_BOARD_ASUS_WL520GC, "Asus WL520GC"}, "WL520GC-",},
++      {{BCM47XX_BOARD_ASUS_WL520GU, "Asus WL520GU"}, "WL520GU-",},
++      {{BCM47XX_BOARD_BELKIN_F7D4301, "Belkin F7D4301"}, "F7D4301",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_productid[] = {
++      {{BCM47XX_BOARD_ASUS_RTAC66U, "Asus RT-AC66U"}, "RT-AC66U",},
++      {{BCM47XX_BOARD_ASUS_RTN10D, "Asus RT-N10D"}, "RT-N10D",},
++      {{BCM47XX_BOARD_ASUS_RTN10U, "Asus RT-N10U"}, "RT-N10U",},
++      {{BCM47XX_BOARD_ASUS_RTN12, "Asus RT-N12"}, "RT-N12",},
++      {{BCM47XX_BOARD_ASUS_RTN12B1, "Asus RT-N12B1"}, "RT-N12B1",},
++      {{BCM47XX_BOARD_ASUS_RTN12C1, "Asus RT-N12C1"}, "RT-N12C1",},
++      {{BCM47XX_BOARD_ASUS_RTN12D1, "Asus RT-N12D1"}, "RT-N12D1",},
++      {{BCM47XX_BOARD_ASUS_RTN12HP, "Asus RT-N12HP"}, "RT-N12HP",},
++      {{BCM47XX_BOARD_ASUS_RTN15U, "Asus RT-N15U"}, "RT-N15U",},
++      {{BCM47XX_BOARD_ASUS_RTN16, "Asus RT-N16"}, "RT-N16",},
++      {{BCM47XX_BOARD_ASUS_RTN53, "Asus RT-N53"}, "RT-N53",},
++      {{BCM47XX_BOARD_ASUS_RTN66U, "Asus RT-N66U"}, "RT-N66U",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_ModelId[] = {
++      {{BCM47XX_BOARD_DELL_TM2300, "Dell WX-5565"}, "WX-5565",},
++      {{BCM47XX_BOARD_MOTOROLA_WE800G, "Motorola WE800G"}, "WE800G",},
++      {{BCM47XX_BOARD_MOTOROLA_WR850GP, "Motorola WR850GP"}, "WR850GP",},
++      {{BCM47XX_BOARD_MOTOROLA_WR850GV2V3, "Motorola WR850G"}, "WR850G",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_melco_id[] = {
++      {{BCM47XX_BOARD_BUFFALO_WBR2_G54, "Buffalo WBR2-G54"}, "29bb0332",},
++      {{BCM47XX_BOARD_BUFFALO_WHR2_A54G54, "Buffalo WHR2-A54G54"}, "290441dd",},
++      {{BCM47XX_BOARD_BUFFALO_WHR_G125, "Buffalo WHR-G125"}, "32093",},
++      {{BCM47XX_BOARD_BUFFALO_WHR_G54S, "Buffalo WHR-G54S"}, "30182",},
++      {{BCM47XX_BOARD_BUFFALO_WHR_HP_G54, "Buffalo WHR-HP-G54"}, "30189",},
++      {{BCM47XX_BOARD_BUFFALO_WLA2_G54L, "Buffalo WLA2-G54L"}, "29129",},
++      {{BCM47XX_BOARD_BUFFALO_WZR_G300N, "Buffalo WZR-G300N"}, "31120",},
++      {{BCM47XX_BOARD_BUFFALO_WZR_RS_G54, "Buffalo WZR-RS-G54"}, "30083",},
++      {{BCM47XX_BOARD_BUFFALO_WZR_RS_G54HP, "Buffalo WZR-RS-G54HP"}, "30103",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_boot_hw[] = {
++      {{BCM47XX_BOARD_CISCO_M10V1, "Cisco M10"}, "M10", "1.0"}, /* like WRT160N v3.0 */
++      {{BCM47XX_BOARD_CISCO_M20V1, "Cisco M20"}, "M20", "1.0"}, /* like WRT310N v2.0 */
++      {{BCM47XX_BOARD_LINKSYS_E1000V1, "Linksys E1000 V1"}, "E100", "1.0"},  /* like WRT160N v3.0 */
++      {{BCM47XX_BOARD_LINKSYS_E1000V2, "Linksys E1000 V2"}, "E1000", "2.0"},
++      {{BCM47XX_BOARD_LINKSYS_E2000V1, "Linksys E2000 V1"}, "Linksys E2000", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_E3000V1, "Linksys E3000 V1"}, "E300", "1.0"}, /* like WRT610N v2.0 */
++      {{BCM47XX_BOARD_LINKSYS_E3200V1, "Linksys E3200 V1"}, "E3200", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_E4200V1, "Linksys E4200 V1"}, "E4200", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT150NV11, "Linksys WRT150N V1.1"}, "WRT150N", "1.1"},
++      {{BCM47XX_BOARD_LINKSYS_WRT150NV1, "Linksys WRT150N V1"}, "WRT150N", "1"},
++      {{BCM47XX_BOARD_LINKSYS_WRT160NV1, "Linksys WRT160N V1"}, "WRT160N", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT160NV3, "Linksys WRT160N V3"}, "WRT160N", "3.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"},
++      {{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"},
++      {{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type_list bcm47xx_board_list_board_id[] = {
++      {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR3400VCNA, "Netgear WNDR3400 Vcna"}, "U12H155T01_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR3700V3, "Netgear WNDR3700 V3"}, "U12H194T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR3500V2, "Netgear WNR3500 V2"}, "U12H127T00_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR3500V2VC, "Netgear WNR3500 V2vc"}, "U12H127T70_NETGEAR",},
++      {{BCM47XX_BOARD_NETGEAR_WNR834BV2, "Netgear WNR834B V2"}, "U12H081T00_NETGEAR",},
++      { {0}, 0},
++};
++
++static const struct bcm47xx_board_type bcm47xx_board_unknown[] = {
++      {BCM47XX_BOARD_UNKNOWN, "Unknown Board"},
++};
++
++static inline int startswith(char *source, char *cmp)
++{
++      return !strncmp(source, cmp, strlen(cmp));
++}
++
++static const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void)
++{
++      char buf1[30];
++      char buf2[30];
++      const struct bcm47xx_board_type_list *e;
++
++      if (bcm47xx_nvram_getenv("model_name", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_model_name; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("model_no", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_model_no; e->value1; e++) {
++                      if (strstarts(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_hardware_version; e->value1; e++) {
++                      if (strstarts(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("productid", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_productid; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("ModelId", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_ModelId; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("melco_id", buf1, sizeof(buf1)) >= 0 ||
++          bcm47xx_nvram_getenv("buf1falo_id", buf1, sizeof(buf1)) >= 0) {
++              /* buffalo hardware, check id for specific hardware matches */
++              for (e = bcm47xx_board_list_melco_id; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("boot_hw_model", buf1, sizeof(buf1)) >= 0 &&
++          bcm47xx_nvram_getenv("boot_hw_ver", buf2, sizeof(buf2)) >= 0) {
++              for (e = bcm47xx_board_list_boot_hw; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1) && !strcmp(buf2, e->value2))
++                              return &e->board;
++              }
++      }
++
++      if (bcm47xx_nvram_getenv("board_id", buf1, sizeof(buf1)) >= 0) {
++              for (e = bcm47xx_board_list_board_id; e->value1; e++) {
++                      if (!strcmp(buf1, e->value1))
++                              return &e->board;
++              }
++      }
++      return bcm47xx_board_unknown;
++}
++
++static void bcm47xx_board_detect(void)
++{
++      char buf[15];
++
++      if (bcm47xx_board != NULL)
++              return;
++      /* check if the nvram is available */
++      if (bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf)) == -ENXIO) {
++              bcm47xx_board = bcm47xx_board_unknown;
++              return;
++      }
++
++      bcm47xx_board = bcm47xx_board_get_nvram();
++      pr_info("Found board: \"%s\"\n", bcm47xx_board->name);
++}
++
++enum bcm47xx_board bcm47xx_board_get(void)
++{
++      bcm47xx_board_detect();
++      return bcm47xx_board->board;
++}
++EXPORT_SYMBOL(bcm47xx_board_get);
++
++const char *bcm47xx_board_get_name(void)
++{
++      bcm47xx_board_detect();
++      return bcm47xx_board->name;
++}
++EXPORT_SYMBOL(bcm47xx_board_get_name);
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
+@@ -0,0 +1,91 @@
++#ifndef __BCM47XX_BOARD_H
++#define __BCM47XX_BOARD_H
++
++enum bcm47xx_board {
++      BCM47XX_BOARD_ASUS_RTAC66U,
++      BCM47XX_BOARD_ASUS_RTN10D,
++      BCM47XX_BOARD_ASUS_RTN10U,
++      BCM47XX_BOARD_ASUS_RTN12,
++      BCM47XX_BOARD_ASUS_RTN12B1,
++      BCM47XX_BOARD_ASUS_RTN12C1,
++      BCM47XX_BOARD_ASUS_RTN12D1,
++      BCM47XX_BOARD_ASUS_RTN12HP,
++      BCM47XX_BOARD_ASUS_RTN15U,
++      BCM47XX_BOARD_ASUS_RTN16,
++      BCM47XX_BOARD_ASUS_RTN53,
++      BCM47XX_BOARD_ASUS_RTN66U,
++      BCM47XX_BOARD_ASUS_WL330GE,
++      BCM47XX_BOARD_ASUS_WL500GPV1,
++      BCM47XX_BOARD_ASUS_WL500GPV2,
++      BCM47XX_BOARD_ASUS_WL520GC,
++      BCM47XX_BOARD_ASUS_WL520GU,
++      BCM47XX_BOARD_ASUS_WL700GE,
++
++      BCM47XX_BOARD_BELKIN_F7D4301,
++
++      BCM47XX_BOARD_BUFFALO_WBR2_G54,
++      BCM47XX_BOARD_BUFFALO_WHR2_A54G54,
++      BCM47XX_BOARD_BUFFALO_WHR_G125,
++      BCM47XX_BOARD_BUFFALO_WHR_G54S,
++      BCM47XX_BOARD_BUFFALO_WHR_HP_G54,
++      BCM47XX_BOARD_BUFFALO_WLA2_G54L,
++      BCM47XX_BOARD_BUFFALO_WZR_G300N,
++      BCM47XX_BOARD_BUFFALO_WZR_RS_G54,
++      BCM47XX_BOARD_BUFFALO_WZR_RS_G54HP,
++
++      BCM47XX_BOARD_CISCO_M10V1,
++      BCM47XX_BOARD_CISCO_M20V1,
++
++      BCM47XX_BOARD_DELL_TM2300,
++
++      BCM47XX_BOARD_DLINK_DIR130,
++      BCM47XX_BOARD_DLINK_DIR330,
++
++      BCM47XX_BOARD_LINKSYS_E1000V1,
++      BCM47XX_BOARD_LINKSYS_E1000V2,
++      BCM47XX_BOARD_LINKSYS_E2000V1,
++      BCM47XX_BOARD_LINKSYS_E3000V1,
++      BCM47XX_BOARD_LINKSYS_E3200V1,
++      BCM47XX_BOARD_LINKSYS_E4200V1,
++      BCM47XX_BOARD_LINKSYS_WRT150NV1,
++      BCM47XX_BOARD_LINKSYS_WRT150NV11,
++      BCM47XX_BOARD_LINKSYS_WRT160NV1,
++      BCM47XX_BOARD_LINKSYS_WRT160NV3,
++      BCM47XX_BOARD_LINKSYS_WRT300NV11,
++      BCM47XX_BOARD_LINKSYS_WRT310NV2,
++      BCM47XX_BOARD_LINKSYS_WRT54G3GV2,
++      BCM47XX_BOARD_LINKSYS_WRT610NV1,
++      BCM47XX_BOARD_LINKSYS_WRT610NV2,
++
++      BCM47XX_BOARD_MOTOROLA_WE800G,
++      BCM47XX_BOARD_MOTOROLA_WR850GP,
++      BCM47XX_BOARD_MOTOROLA_WR850GV2V3,
++
++      BCM47XX_BOARD_NETGEAR_WGR614V8,
++      BCM47XX_BOARD_NETGEAR_WGR614V9,
++      BCM47XX_BOARD_NETGEAR_WNDR3300,
++      BCM47XX_BOARD_NETGEAR_WNDR3400V1,
++      BCM47XX_BOARD_NETGEAR_WNDR3400V2,
++      BCM47XX_BOARD_NETGEAR_WNDR3400VCNA,
++      BCM47XX_BOARD_NETGEAR_WNDR3700V3,
++      BCM47XX_BOARD_NETGEAR_WNDR4000,
++      BCM47XX_BOARD_NETGEAR_WNDR4500V1,
++      BCM47XX_BOARD_NETGEAR_WNDR4500V2,
++      BCM47XX_BOARD_NETGEAR_WNR2000,
++      BCM47XX_BOARD_NETGEAR_WNR3500L,
++      BCM47XX_BOARD_NETGEAR_WNR3500U,
++      BCM47XX_BOARD_NETGEAR_WNR3500V2,
++      BCM47XX_BOARD_NETGEAR_WNR3500V2VC,
++      BCM47XX_BOARD_NETGEAR_WNR834BV2,
++
++      /* TODO */
++      BCM47XX_BOARD_SIMPLETECH_SIMPLESHARE,
++
++      BCM47XX_BOARD_UNKNOWN,
++      BCM47XX_BOARD_NON,
++};
++
++extern enum bcm47xx_board bcm47xx_board_get(void);
++extern const char *bcm47xx_board_get_name(void);
++
++#endif /* __BCM47XX_BOARD_H */
diff --git a/target/linux/brcm47xx/patches-3.10/261-MIPS-BCM47XX-print-board-name-in-proc-cpuinfo.patch b/target/linux/brcm47xx/patches-3.10/261-MIPS-BCM47XX-print-board-name-in-proc-cpuinfo.patch
new file mode 100644 (file)
index 0000000..abfa400
--- /dev/null
@@ -0,0 +1,39 @@
+--- a/arch/mips/bcm47xx/prom.c
++++ b/arch/mips/bcm47xx/prom.c
+@@ -32,10 +32,35 @@
+ #include <asm/bootinfo.h>
+ #include <asm/fw/cfe/cfe_api.h>
+ #include <asm/fw/cfe/cfe_error.h>
++#include <bcm47xx.h>
++#include <bcm47xx_board.h>
++
++static u16 get_chip_id(void)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return bcm47xx_bus.ssb.chip_id;
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcm47xx_bus.bcma.bus.chipinfo.id;
++#endif
++      }
++      return 0;
++}
+ const char *get_system_type(void)
+ {
+-      return "Broadcom BCM47XX";
++      static char buf[128];
++      u16 chip_id = get_chip_id();
++
++      snprintf(buf, sizeof(buf),
++               (chip_id > 0x9999) ? "Broadcom BCM%d (%s)" :
++                                    "Broadcom BCM%04X (%s)",
++               chip_id, bcm47xx_board_get_name());
++
++      return buf;
+ }
+ static __init int prom_init_cfe(void)
diff --git a/target/linux/brcm47xx/patches-3.10/280-activate_ssb_support_in_usb.patch b/target/linux/brcm47xx/patches-3.10/280-activate_ssb_support_in_usb.patch
new file mode 100644 (file)
index 0000000..c4382ed
--- /dev/null
@@ -0,0 +1,25 @@
+This prevents the options from being delete with make kernel_oldconfig.
+---
+ drivers/ssb/Kconfig |    2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/bcma/Kconfig
++++ b/drivers/bcma/Kconfig
+@@ -37,6 +37,7 @@ config BCMA_DRIVER_PCI_HOSTMODE
+ config BCMA_HOST_SOC
+       bool
+       depends on BCMA_DRIVER_MIPS
++      select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
+ config BCMA_DRIVER_MIPS
+       bool "BCMA Broadcom MIPS core driver"
+--- a/drivers/ssb/Kconfig
++++ b/drivers/ssb/Kconfig
+@@ -146,6 +146,7 @@ config SSB_SFLASH
+ config SSB_EMBEDDED
+       bool
+       depends on SSB_DRIVER_MIPS
++      select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
+       default y
+ config SSB_DRIVER_EXTIF
diff --git a/target/linux/brcm47xx/patches-3.10/300-fork_cacheflush.patch b/target/linux/brcm47xx/patches-3.10/300-fork_cacheflush.patch
new file mode 100644 (file)
index 0000000..686fb1b
--- /dev/null
@@ -0,0 +1,11 @@
+--- a/arch/mips/include/asm/cacheflush.h
++++ b/arch/mips/include/asm/cacheflush.h
+@@ -32,7 +32,7 @@
+ extern void (*flush_cache_all)(void);
+ extern void (*__flush_cache_all)(void);
+ extern void (*flush_cache_mm)(struct mm_struct *mm);
+-#define flush_cache_dup_mm(mm)        do { (void) (mm); } while (0)
++#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+ extern void (*flush_cache_range)(struct vm_area_struct *vma,
+       unsigned long start, unsigned long end);
+ extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
diff --git a/target/linux/brcm47xx/patches-3.10/310-no_highpage.patch b/target/linux/brcm47xx/patches-3.10/310-no_highpage.patch
new file mode 100644 (file)
index 0000000..bdf5672
--- /dev/null
@@ -0,0 +1,66 @@
+--- a/arch/mips/include/asm/page.h
++++ b/arch/mips/include/asm/page.h
+@@ -46,6 +46,7 @@
+ #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
+ #include <linux/pfn.h>
++#include <asm/cpu-features.h>
+ extern void build_clear_page(void);
+ extern void build_copy_page(void);
+@@ -80,13 +81,16 @@ static inline void clear_user_page(void
+               flush_data_cache_page((unsigned long)addr);
+ }
+-extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
+-      struct page *to);
+-struct vm_area_struct;
+-extern void copy_user_highpage(struct page *to, struct page *from,
+-      unsigned long vaddr, struct vm_area_struct *vma);
++static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
++      struct page *to)
++{
++      extern void (*flush_data_cache_page)(unsigned long addr);
+-#define __HAVE_ARCH_COPY_USER_HIGHPAGE
++      copy_page(vto, vfrom);
++      if (!cpu_has_ic_fills_f_dc ||
++          pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
++              flush_data_cache_page((unsigned long)vto);
++}
+ /*
+  * These are used to make use of C type-checking..
+--- a/arch/mips/mm/init.c
++++ b/arch/mips/mm/init.c
+@@ -197,30 +197,6 @@ void kunmap_coherent(void)
+       preempt_check_resched();
+ }
+-void copy_user_highpage(struct page *to, struct page *from,
+-      unsigned long vaddr, struct vm_area_struct *vma)
+-{
+-      void *vfrom, *vto;
+-
+-      vto = kmap_atomic(to);
+-      if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
+-          page_mapped(from) && !Page_dcache_dirty(from)) {
+-              vfrom = kmap_coherent(from, vaddr);
+-              copy_page(vto, vfrom);
+-              kunmap_coherent();
+-      } else {
+-              vfrom = kmap_atomic(from);
+-              copy_page(vto, vfrom);
+-              kunmap_atomic(vfrom);
+-      }
+-      if ((!cpu_has_ic_fills_f_dc) ||
+-          pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+-              flush_data_cache_page((unsigned long)vto);
+-      kunmap_atomic(vto);
+-      /* Make sure this page is cleared on other CPU's too before using it */
+-      smp_wmb();
+-}
+-
+ void copy_to_user_page(struct vm_area_struct *vma,
+       struct page *page, unsigned long vaddr, void *dst, const void *src,
+       unsigned long len)
diff --git a/target/linux/brcm47xx/patches-3.10/400-arch-bcm47xx.patch b/target/linux/brcm47xx/patches-3.10/400-arch-bcm47xx.patch
new file mode 100644 (file)
index 0000000..9d7c9bb
--- /dev/null
@@ -0,0 +1,177 @@
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -190,3 +190,30 @@ int bcm47xx_nvram_getenv(char *name, cha
+       return -ENOENT;
+ }
+ EXPORT_SYMBOL(bcm47xx_nvram_getenv);
++
++char *nvram_get(const char *name)
++{
++      char *var, *value, *end, *eq;
++
++      if (!name)
++              return NULL;
++
++      if (!nvram_buf[0])
++              nvram_init();
++
++      /* Look for name=value and return value */
++      var = &nvram_buf[sizeof(struct nvram_header)];
++      end = nvram_buf + sizeof(nvram_buf) - 2;
++      end[0] = end[1] = '\0';
++      for (; *var; var = value + strlen(value) + 1) {
++              eq = strchr(var, '=');
++              if (!eq)
++                      break;
++              value = eq + 1;
++              if ((eq - var) == strlen(name) && strncmp(var, name, (eq - var)) == 0)
++                      return value;
++      }
++
++      return NULL;
++}
++EXPORT_SYMBOL(nvram_get);
+--- a/arch/mips/bcm47xx/Makefile
++++ b/arch/mips/bcm47xx/Makefile
+@@ -5,4 +5,5 @@
+ obj-y                         += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
+ obj-y                         += board.o
++obj-y                         += gpio.o
+ obj-$(CONFIG_BCM47XX_SSB)     += wgt634u.o
+--- /dev/null
++++ b/arch/mips/bcm47xx/gpio.c
+@@ -0,0 +1,119 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
++ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Parts of this file are based on Atheros AR71XX/AR724X/AR913X GPIO
++ */
++
++#include <linux/export.h>
++#include <linux/gpio.h>
++#include <linux/ssb/ssb_embedded.h>
++#include <linux/bcma/bcma.h>
++
++#include <bcm47xx.h>
++
++/* low level BCM47xx gpio api */
++u32 bcm47xx_gpio_in(u32 mask)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_in(&bcm47xx_bus.ssb, mask);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, mask);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_in);
++
++u32 bcm47xx_gpio_out(u32 mask, u32 value)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_out(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask,
++                                          value);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_out);
++
++u32 bcm47xx_gpio_outen(u32 mask, u32 value)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_outen(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc,
++                                            mask, value);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_outen);
++
++u32 bcm47xx_gpio_control(u32 mask, u32 value)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_control(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc,
++                                              mask, value);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_control);
++
++u32 bcm47xx_gpio_intmask(u32 mask, u32 value)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_intmask(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
++                                              mask, value);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_intmask);
++
++u32 bcm47xx_gpio_polarity(u32 mask, u32 value)
++{
++      switch (bcm47xx_bus_type) {
++#ifdef CONFIG_BCM47XX_SSB
++      case BCM47XX_BUS_TYPE_SSB:
++              return ssb_gpio_polarity(&bcm47xx_bus.ssb, mask, value);
++#endif
++#ifdef CONFIG_BCM47XX_BCMA
++      case BCM47XX_BUS_TYPE_BCMA:
++              return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
++                                               mask, value);
++#endif
++      }
++      return -EINVAL;
++}
++EXPORT_SYMBOL(bcm47xx_gpio_polarity);
+--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
++++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
+@@ -14,4 +14,11 @@ static inline int irq_to_gpio(unsigned i
+       return -EINVAL;
+ }
++u32 bcm47xx_gpio_in(u32 mask);
++u32 bcm47xx_gpio_out(u32 mask, u32 value);
++u32 bcm47xx_gpio_outen(u32 mask, u32 value);
++u32 bcm47xx_gpio_control(u32 mask, u32 value);
++u32 bcm47xx_gpio_intmask(u32 mask, u32 value);
++u32 bcm47xx_gpio_polarity(u32 mask, u32 value);
++
+ #endif
diff --git a/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-time-for-WL520G-and-other-200-MHz-C.patch b/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-time-for-WL520G-and-other-200-MHz-C.patch
new file mode 100644 (file)
index 0000000..ff670e8
--- /dev/null
@@ -0,0 +1,44 @@
+--- a/arch/mips/bcm47xx/time.c
++++ b/arch/mips/bcm47xx/time.c
+@@ -27,10 +27,14 @@
+ #include <linux/ssb/ssb.h>
+ #include <asm/time.h>
+ #include <bcm47xx.h>
++#include <bcm47xx_nvram.h>
+ void __init plat_time_init(void)
+ {
+       unsigned long hz = 0;
++      u16 chip_id = 0;
++      char buf[10];
++      int len;
+       /*
+        * Use deterministic values for initial counter interrupt
+@@ -43,15 +47,26 @@ void __init plat_time_init(void)
+ #ifdef CONFIG_BCM47XX_SSB
+       case BCM47XX_BUS_TYPE_SSB:
+               hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
++              chip_id = bcm47xx_bus.ssb.chip_id;
+               break;
+ #endif
+ #ifdef CONFIG_BCM47XX_BCMA
+       case BCM47XX_BUS_TYPE_BCMA:
+               hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
++              chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
+               break;
+ #endif
+       }
++      if (chip_id == 0x5354) {
++              len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf));
++              if (len >= 0 && !strncmp(buf, "200", 4))
++                      hz = 100000000;
++              len = bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf));
++              if (len >= 0 && !strncmp(buf, "WL520G", 6))
++                      hz = 100000000;
++
++      }
+       if (!hz)
+               hz = 100000000;
diff --git a/target/linux/brcm47xx/patches-3.10/610-pci_ide_fix.patch b/target/linux/brcm47xx/patches-3.10/610-pci_ide_fix.patch
new file mode 100644 (file)
index 0000000..f254b20
--- /dev/null
@@ -0,0 +1,14 @@
+--- a/include/linux/ide.h
++++ b/include/linux/ide.h
+@@ -195,7 +195,11 @@ static inline void ide_std_init_ports(st
+       hw->io_ports.ctl_addr = ctl_addr;
+ }
++#if defined CONFIG_BCM47XX
++# define MAX_HWIFS    2
++#else
+ #define MAX_HWIFS     10
++#endif
+ /*
+  * Now for the data we need to maintain per-drive:  ide_drive_t
diff --git a/target/linux/brcm47xx/patches-3.10/812-disable_wgt634u_crap.patch b/target/linux/brcm47xx/patches-3.10/812-disable_wgt634u_crap.patch
new file mode 100644 (file)
index 0000000..f2950c9
--- /dev/null
@@ -0,0 +1,184 @@
+--- a/arch/mips/bcm47xx/Makefile
++++ b/arch/mips/bcm47xx/Makefile
+@@ -6,4 +6,3 @@
+ obj-y                         += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
+ obj-y                         += board.o
+ obj-y                         += gpio.o
+-obj-$(CONFIG_BCM47XX_SSB)     += wgt634u.o
+--- a/arch/mips/bcm47xx/wgt634u.c
++++ /dev/null
+@@ -1,174 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License.  See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
+- */
+-
+-#include <linux/platform_device.h>
+-#include <linux/module.h>
+-#include <linux/leds.h>
+-#include <linux/mtd/physmap.h>
+-#include <linux/ssb/ssb.h>
+-#include <linux/ssb/ssb_embedded.h>
+-#include <linux/interrupt.h>
+-#include <linux/reboot.h>
+-#include <linux/gpio.h>
+-#include <asm/mach-bcm47xx/bcm47xx.h>
+-
+-/* GPIO definitions for the WGT634U */
+-#define WGT634U_GPIO_LED      3
+-#define WGT634U_GPIO_RESET    2
+-#define WGT634U_GPIO_TP1      7
+-#define WGT634U_GPIO_TP2      6
+-#define WGT634U_GPIO_TP3      5
+-#define WGT634U_GPIO_TP4      4
+-#define WGT634U_GPIO_TP5      1
+-
+-static struct gpio_led wgt634u_leds[] = {
+-      {
+-              .name = "power",
+-              .gpio = WGT634U_GPIO_LED,
+-              .active_low = 1,
+-              .default_trigger = "heartbeat",
+-      },
+-};
+-
+-static struct gpio_led_platform_data wgt634u_led_data = {
+-      .num_leds =     ARRAY_SIZE(wgt634u_leds),
+-      .leds =         wgt634u_leds,
+-};
+-
+-static struct platform_device wgt634u_gpio_leds = {
+-      .name =         "leds-gpio",
+-      .id =           -1,
+-      .dev = {
+-              .platform_data = &wgt634u_led_data,
+-      }
+-};
+-
+-
+-/* 8MiB flash. The struct mtd_partition matches original Netgear WGT634U
+-   firmware. */
+-static struct mtd_partition wgt634u_partitions[] = {
+-      {
+-              .name       = "cfe",
+-              .offset     = 0,
+-              .size       = 0x60000,          /* 384k */
+-              .mask_flags = MTD_WRITEABLE     /* force read-only */
+-      },
+-      {
+-              .name   = "config",
+-              .offset = 0x60000,
+-              .size   = 0x20000               /* 128k */
+-      },
+-      {
+-              .name   = "linux",
+-              .offset = 0x80000,
+-              .size   = 0x140000              /* 1280k */
+-      },
+-      {
+-              .name   = "jffs",
+-              .offset = 0x1c0000,
+-              .size   = 0x620000              /* 6272k */
+-      },
+-      {
+-              .name   = "nvram",
+-              .offset = 0x7e0000,
+-              .size   = 0x20000               /* 128k */
+-      },
+-};
+-
+-static struct physmap_flash_data wgt634u_flash_data = {
+-      .parts    = wgt634u_partitions,
+-      .nr_parts = ARRAY_SIZE(wgt634u_partitions)
+-};
+-
+-static struct resource wgt634u_flash_resource = {
+-      .flags = IORESOURCE_MEM,
+-};
+-
+-static struct platform_device wgt634u_flash = {
+-      .name          = "physmap-flash",
+-      .id            = 0,
+-      .dev           = { .platform_data = &wgt634u_flash_data, },
+-      .resource      = &wgt634u_flash_resource,
+-      .num_resources = 1,
+-};
+-
+-/* Platform devices */
+-static struct platform_device *wgt634u_devices[] __initdata = {
+-      &wgt634u_flash,
+-      &wgt634u_gpio_leds,
+-};
+-
+-static irqreturn_t gpio_interrupt(int irq, void *ignored)
+-{
+-      int state;
+-
+-      /* Interrupts are shared, check if the current one is
+-         a GPIO interrupt. */
+-      if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
+-                                 SSB_CHIPCO_IRQ_GPIO))
+-              return IRQ_NONE;
+-
+-      state = gpio_get_value(WGT634U_GPIO_RESET);
+-
+-      /* Interrupt are level triggered, revert the interrupt polarity
+-         to clear the interrupt. */
+-      ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << WGT634U_GPIO_RESET,
+-                        state ? 1 << WGT634U_GPIO_RESET : 0);
+-
+-      if (!state) {
+-              printk(KERN_INFO "Reset button pressed");
+-              ctrl_alt_del();
+-      }
+-
+-      return IRQ_HANDLED;
+-}
+-
+-static int __init wgt634u_init(void)
+-{
+-      /* There is no easy way to detect that we are running on a WGT634U
+-       * machine. Use the MAC address as an heuristic. Netgear Inc. has
+-       * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
+-       */
+-      u8 *et0mac;
+-
+-      if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
+-              return -ENODEV;
+-
+-      et0mac = bcm47xx_bus.ssb.sprom.et0mac;
+-
+-      if (et0mac[0] == 0x00 &&
+-          ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
+-           (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
+-              struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
+-
+-              printk(KERN_INFO "WGT634U machine detected.\n");
+-
+-              if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
+-                               gpio_interrupt, IRQF_SHARED,
+-                               "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
+-                      gpio_direction_input(WGT634U_GPIO_RESET);
+-                      ssb_gpio_intmask(&bcm47xx_bus.ssb,
+-                                       1 << WGT634U_GPIO_RESET,
+-                                       1 << WGT634U_GPIO_RESET);
+-                      ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
+-                                          SSB_CHIPCO_IRQ_GPIO,
+-                                          SSB_CHIPCO_IRQ_GPIO);
+-              }
+-
+-              wgt634u_flash_data.width = mcore->pflash.buswidth;
+-              wgt634u_flash_resource.start = mcore->pflash.window;
+-              wgt634u_flash_resource.end = mcore->pflash.window
+-                                         + mcore->pflash.window_size
+-                                         - 1;
+-              return platform_add_devices(wgt634u_devices,
+-                                          ARRAY_SIZE(wgt634u_devices));
+-      } else
+-              return -ENODEV;
+-}
+-
+-module_init(wgt634u_init);
diff --git a/target/linux/brcm47xx/patches-3.10/820-wgt634u-nvram-fix.patch b/target/linux/brcm47xx/patches-3.10/820-wgt634u-nvram-fix.patch
new file mode 100644 (file)
index 0000000..cf21550
--- /dev/null
@@ -0,0 +1,306 @@
+The Netgear wgt634u uses a different format for storing the 
+configuration. This patch is needed to read out the correct 
+configuration. The cfe_env.c file uses a different method way to read 
+out the configuration than the in kernel cfe config reader.
+
+--- a/arch/mips/bcm47xx/Makefile
++++ b/arch/mips/bcm47xx/Makefile
+@@ -6,3 +6,4 @@
+ obj-y                         += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
+ obj-y                         += board.o
+ obj-y                         += gpio.o
++obj-y                         += cfe_env.o
+--- /dev/null
++++ b/arch/mips/bcm47xx/cfe_env.c
+@@ -0,0 +1,229 @@
++/*
++ * CFE environment variable access
++ *
++ * Copyright 2001-2003, Broadcom Corporation
++ * Copyright 2006, Felix Fietkau <nbd@openwrt.org>
++ * 
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++#define NVRAM_SIZE       (0x1ff0)
++static char _nvdata[NVRAM_SIZE];
++static char _valuestr[256];
++
++/*
++ * TLV types.  These codes are used in the "type-length-value"
++ * encoding of the items stored in the NVRAM device (flash or EEPROM)
++ *
++ * The layout of the flash/nvram is as follows:
++ *
++ * <type> <length> <data ...> <type> <length> <data ...> <type_end>
++ *
++ * The type code of "ENV_TLV_TYPE_END" marks the end of the list.
++ * The "length" field marks the length of the data section, not
++ * including the type and length fields.
++ *
++ * Environment variables are stored as follows:
++ *
++ * <type_env> <length> <flags> <name> = <value>
++ *
++ * If bit 0 (low bit) is set, the length is an 8-bit value.
++ * If bit 0 (low bit) is clear, the length is a 16-bit value
++ * 
++ * Bit 7 set indicates "user" TLVs.  In this case, bit 0 still
++ * indicates the size of the length field.  
++ *
++ * Flags are from the constants below:
++ *
++ */
++#define ENV_LENGTH_16BITS     0x00    /* for low bit */
++#define ENV_LENGTH_8BITS      0x01
++
++#define ENV_TYPE_USER         0x80
++
++#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
++#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
++
++/*
++ * The actual TLV types we support
++ */
++
++#define ENV_TLV_TYPE_END      0x00    
++#define ENV_TLV_TYPE_ENV      ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
++
++/*
++ * Environment variable flags 
++ */
++
++#define ENV_FLG_NORMAL                0x00    /* normal read/write */
++#define ENV_FLG_BUILTIN               0x01    /* builtin - not stored in flash */
++#define ENV_FLG_READONLY      0x02    /* read-only - cannot be changed */
++
++#define ENV_FLG_MASK          0xFF    /* mask of attributes we keep */
++#define ENV_FLG_ADMIN         0x100   /* lets us internally override permissions */
++
++
++/*  *********************************************************************
++    *  _nvram_read(buffer,offset,length)
++    *  
++    *  Read data from the NVRAM device
++    *  
++    *  Input parameters: 
++    *            buffer - destination buffer
++    *            offset - offset of data to read
++    *            length - number of bytes to read
++    *            
++    *  Return value:
++    *            number of bytes read, or <0 if error occured
++    ********************************************************************* */
++static int
++_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
++{
++    int i;
++    if (offset > NVRAM_SIZE)
++      return -1; 
++
++    for ( i = 0; i < length; i++) {
++      buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
++    }
++    return length;
++}
++
++
++static char*
++_strnchr(const char *dest,int c,size_t cnt)
++{
++      while (*dest && (cnt > 0)) {
++      if (*dest == c) return (char *) dest;
++      dest++;
++      cnt--;
++      }
++      return NULL;
++}
++
++
++
++/*
++ * Core support API: Externally visible.
++ */
++
++/*
++ * Get the value of an NVRAM variable
++ * @param     name    name of variable to get
++ * @return    value of variable or NULL if undefined
++ */
++
++char* 
++cfe_env_get(unsigned char *nv_buf, char* name)
++{
++    int size;
++    unsigned char *buffer;
++    unsigned char *ptr;
++    unsigned char *envval;
++    unsigned int reclen;
++    unsigned int rectype;
++    int offset;
++    int flg;
++    
++      if (!strcmp(name, "nvram_type"))
++              return "cfe";
++      
++    size = NVRAM_SIZE;
++    buffer = &_nvdata[0];
++
++    ptr = buffer;
++    offset = 0;
++
++    /* Read the record type and length */
++    if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
++      goto error;
++    }
++    
++    while ((*ptr != ENV_TLV_TYPE_END)  && (size > 1)) {
++
++      /* Adjust pointer for TLV type */
++      rectype = *(ptr);
++      offset++;
++      size--;
++
++      /* 
++       * Read the length.  It can be either 1 or 2 bytes
++       * depending on the code 
++       */
++      if (rectype & ENV_LENGTH_8BITS) {
++          /* Read the record type and length - 8 bits */
++          if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
++              goto error;
++          }
++          reclen = *(ptr);
++          size--;
++          offset++;
++      }
++      else {
++          /* Read the record type and length - 16 bits, MSB first */
++          if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
++              goto error;
++          }
++          reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
++          size -= 2;
++          offset += 2;
++      }
++
++      if (reclen > size)
++          break;      /* should not happen, bad NVRAM */
++
++      switch (rectype) {
++          case ENV_TLV_TYPE_ENV:
++              /* Read the TLV data */
++              if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
++                  goto error;
++              flg = *ptr++;
++              envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
++              if (envval) {
++                  *envval++ = '\0';
++                  memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
++                  _valuestr[(reclen-1)-(envval-ptr)] = '\0';
++#if 0                 
++                  printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
++#endif
++                  if(!strcmp(ptr, name)){
++                      return _valuestr;
++                  }
++                  if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
++                      return _valuestr;
++              }
++              break;
++              
++          default: 
++              /* Unknown TLV type, skip it. */
++              break;
++          }
++
++      /*
++       * Advance to next TLV 
++       */
++              
++      size -= (int)reclen;
++      offset += reclen;
++
++      /* Read the next record type */
++      ptr = buffer;
++      if (_nvram_read(nv_buf, ptr,offset,1) != 1)
++          goto error;
++      }
++
++error:
++    return NULL;
++
++}
++
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -22,6 +22,8 @@
+ #include <asm/mach-bcm47xx/bcm47xx.h>
+ static char nvram_buf[NVRAM_SPACE];
++static int cfe_env;
++extern char *cfe_env_get(char *nv_buf, const char *name);
+ static u32 find_nvram_size(u32 end)
+ {
+@@ -47,6 +49,26 @@ static int nvram_find_and_copy(u32 base,
+       u32 *src, *dst;
+       u32 size;
++      cfe_env = 0;
++
++      /* XXX: hack for supporting the CFE environment stuff on WGT634U */
++      if (lim >= 8 * 1024 * 1024) {
++              src = (u32 *) KSEG1ADDR(base + 8 * 1024 * 1024 - 0x2000);
++              dst = (u32 *) nvram_buf;
++
++              if ((*src & 0xff00ff) == 0x000001) {
++                      printk("early_nvram_init: WGT634U NVRAM found.\n");
++
++                      for (i = 0; i < 0x1ff0; i++) {
++                              if (*src == 0xFFFFFFFF)
++                                      break;
++                              *dst++ = *src++;
++                      }
++                      cfe_env = 1;
++                      return 0;
++              }
++      }
++
+       /* TODO: when nvram is on nand flash check for bad blocks first. */
+       off = FLASH_MIN;
+       while (off <= lim) {
+@@ -173,6 +195,13 @@ int bcm47xx_nvram_getenv(char *name, cha
+                       return err;
+       }
++      if (cfe_env) {
++              value = cfe_env_get(nvram_buf, name);
++              if (!value)
++                      return -ENOENT;
++              return snprintf(val, val_len, "%s", value);
++      }
++
+       /* Look for name=value and return value */
+       var = &nvram_buf[sizeof(struct nvram_header)];
+       end = nvram_buf + sizeof(nvram_buf) - 2;
+@@ -201,6 +230,9 @@ char *nvram_get(const char *name)
+       if (!nvram_buf[0])
+               nvram_init();
++      if (cfe_env)
++              return cfe_env_get(nvram_buf, name);
++
+       /* Look for name=value and return value */
+       var = &nvram_buf[sizeof(struct nvram_header)];
+       end = nvram_buf + sizeof(nvram_buf) - 2;
diff --git a/target/linux/brcm47xx/patches-3.10/920-cache-wround.patch b/target/linux/brcm47xx/patches-3.10/920-cache-wround.patch
new file mode 100644 (file)
index 0000000..bac6899
--- /dev/null
@@ -0,0 +1,138 @@
+--- a/arch/mips/include/asm/r4kcache.h
++++ b/arch/mips/include/asm/r4kcache.h
+@@ -20,10 +20,28 @@
+ #ifdef CONFIG_BCM47XX
+ #include <asm/paccess.h>
+ #include <linux/ssb/ssb.h>
+-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
++#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
++
++static inline unsigned long bcm4710_dummy_rreg(void)
++{
++      return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
++}
++
++#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
++
++static inline unsigned long bcm4710_fill_tlb(void *addr)
++{
++      return *(unsigned long *)addr;
++}
++
++#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
++
++static inline void bcm4710_protected_fill_tlb(void *addr)
++{
++      unsigned long x;
++      get_dbe(x, (unsigned long *)addr);;
++}
+-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
+-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
+ #else
+ #define BCM4710_DUMMY_RREG()
+--- a/arch/mips/mm/tlbex.c
++++ b/arch/mips/mm/tlbex.c
+@@ -969,6 +969,9 @@ build_get_pgde32(u32 **p, unsigned int t
+ #endif
+       uasm_i_addu(p, ptr, tmp, ptr);
+ #else
++#ifdef CONFIG_BCM47XX
++      uasm_i_nop(p);
++#endif
+       UASM_i_LA_mostly(p, ptr, pgdc);
+ #endif
+       uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
+@@ -1311,12 +1314,12 @@ static void __cpuinit build_r4000_tlb_re
+                       /* No need for uasm_i_nop */
+               }
+-#ifdef CONFIG_BCM47XX
+-              uasm_i_nop(&p);
+-#endif
+ #ifdef CONFIG_64BIT
+               build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
+ #else
++# ifdef CONFIG_BCM47XX
++              uasm_i_nop(&p);
++# endif
+               build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
+ #endif
+@@ -1328,6 +1331,9 @@ static void __cpuinit build_r4000_tlb_re
+               build_update_entries(&p, K0, K1);
+               build_tlb_write_entry(&p, &l, &r, tlb_random);
+               uasm_l_leave(&l, p);
++#ifdef CONFIG_BCM47XX
++              uasm_i_nop(&p);
++#endif
+               uasm_i_eret(&p); /* return from trap */
+       }
+ #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
+@@ -1845,12 +1851,12 @@ build_r4000_tlbchange_handler_head(u32 *
+ {
+       struct work_registers wr = build_get_work_registers(p);
+-#ifdef CONFIG_BCM47XX
+-      uasm_i_nop(p);
+-#endif
+ #ifdef CONFIG_64BIT
+       build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
+ #else
++# ifdef CONFIG_BCM47XX
++      uasm_i_nop(p);
++# endif
+       build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
+ #endif
+@@ -1889,6 +1895,9 @@ build_r4000_tlbchange_handler_tail(u32 *
+       build_tlb_write_entry(p, l, r, tlb_indexed);
+       uasm_l_leave(l, *p);
+       build_restore_work_registers(p);
++#ifdef CONFIG_BCM47XX
++      uasm_i_nop(p);
++#endif
+       uasm_i_eret(p); /* return from trap */
+ #ifdef CONFIG_64BIT
+--- a/arch/mips/kernel/genex.S
++++ b/arch/mips/kernel/genex.S
+@@ -21,6 +21,19 @@
+ #include <asm/war.h>
+ #include <asm/thread_info.h>
++#ifdef CONFIG_BCM47XX
++# ifdef eret
++#  undef eret
++# endif
++# define eret                                         \
++      .set push;                              \
++      .set noreorder;                         \
++       nop;                                   \
++       nop;                                   \
++       eret;                                  \
++      .set pop;
++#endif
++
+ #ifdef CONFIG_MIPS_MT_SMTC
+ #define PANIC_PIC(msg)                                        \
+               .set    push;                           \
+@@ -48,7 +61,6 @@ NESTED(except_vec3_generic, 0, sp)
+       .set    noat
+ #ifdef CONFIG_BCM47XX
+       nop
+-      nop
+ #endif
+ #if R5432_CP0_INTERRUPT_WAR
+       mfc0    k0, CP0_INDEX
+@@ -73,6 +85,9 @@ NESTED(except_vec3_r4000, 0, sp)
+       .set    push
+       .set    mips3
+       .set    noat
++#ifdef CONFIG_BCM47XX
++      nop
++#endif
+       mfc0    k1, CP0_CAUSE
+       li      k0, 31<<2
+       andi    k1, k1, 0x7c
diff --git a/target/linux/brcm47xx/patches-3.10/940-bcm47xx-yenta.patch b/target/linux/brcm47xx/patches-3.10/940-bcm47xx-yenta.patch
new file mode 100644 (file)
index 0000000..1739ff7
--- /dev/null
@@ -0,0 +1,46 @@
+--- a/drivers/pcmcia/yenta_socket.c
++++ b/drivers/pcmcia/yenta_socket.c
+@@ -920,6 +920,8 @@ static unsigned int yenta_probe_irq(stru
+        * Probe for usable interrupts using the force
+        * register to generate bogus card status events.
+        */
++#ifndef CONFIG_BCM47XX
++      /* WRT54G3G does not like this */
+       cb_writel(socket, CB_SOCKET_EVENT, -1);
+       cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
+       reg = exca_readb(socket, I365_CSCINT);
+@@ -935,6 +937,7 @@ static unsigned int yenta_probe_irq(stru
+       }
+       cb_writel(socket, CB_SOCKET_MASK, 0);
+       exca_writeb(socket, I365_CSCINT, reg);
++#endif
+       mask = probe_irq_mask(val) & 0xffff;
+@@ -1019,6 +1022,10 @@ static void yenta_get_socket_capabilitie
+       else
+               socket->socket.irq_mask = 0;
++      /* irq mask probing is broken for the WRT54G3G */
++      if (socket->socket.irq_mask == 0)
++              socket->socket.irq_mask = 0x6f8;
++
+       dev_printk(KERN_INFO, &socket->dev->dev,
+                  "ISA IRQ mask 0x%04x, PCI irq %d\n",
+                  socket->socket.irq_mask, socket->cb_irq);
+@@ -1257,6 +1264,15 @@ static int yenta_probe(struct pci_dev *d
+       dev_printk(KERN_INFO, &dev->dev,
+                  "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
++      /* Generate an interrupt on card insert/remove */
++      config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
++
++      /* Set up Multifunction Routing Status Register */
++      config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
++
++      /* Switch interrupts to parallelized */
++      config_writeb(socket, 0x92, 0x64);
++
+       yenta_fixup_parent_bridge(dev->subordinate);
+       /* Register it with the pcmcia layer.. */
diff --git a/target/linux/brcm47xx/patches-3.10/976-ssb_increase_pci_delay.patch b/target/linux/brcm47xx/patches-3.10/976-ssb_increase_pci_delay.patch
new file mode 100644 (file)
index 0000000..b56f1d5
--- /dev/null
@@ -0,0 +1,11 @@
+--- a/drivers/ssb/driver_pcicore.c
++++ b/drivers/ssb/driver_pcicore.c
+@@ -375,7 +375,7 @@ static void ssb_pcicore_init_hostmode(st
+       set_io_port_base(ssb_pcicore_controller.io_map_base);
+       /* Give some time to the PCI controller to configure itself with the new
+        * values. Not waiting at this point causes crashes of the machine. */
+-      mdelay(10);
++      mdelay(300);
+       register_pci_controller(&ssb_pcicore_controller);
+ }
diff --git a/target/linux/brcm47xx/patches-3.10/980-wnr834b_no_cardbus_invariant.patch b/target/linux/brcm47xx/patches-3.10/980-wnr834b_no_cardbus_invariant.patch
new file mode 100644 (file)
index 0000000..4550676
--- /dev/null
@@ -0,0 +1,13 @@
+--- a/arch/mips/bcm47xx/setup.c
++++ b/arch/mips/bcm47xx/setup.c
+@@ -120,6 +120,10 @@ static int bcm47xx_get_invariants(struct
+       if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
+               iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
++      /* Do not indicate cardbus for Netgear WNR834B V1 and V2 */
++      if (iv->boardinfo.type == 0x0472 && iv->has_cardbus_slot)
++              iv->has_cardbus_slot = 0;
++
+       return 0;
+ }
diff --git a/target/linux/brcm47xx/patches-3.10/999-wl_exports.patch b/target/linux/brcm47xx/patches-3.10/999-wl_exports.patch
new file mode 100644 (file)
index 0000000..2c464bd
--- /dev/null
@@ -0,0 +1,22 @@
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -21,7 +21,8 @@
+ #include <bcm47xx_nvram.h>
+ #include <asm/mach-bcm47xx/bcm47xx.h>
+-static char nvram_buf[NVRAM_SPACE];
++char nvram_buf[NVRAM_SPACE];
++EXPORT_SYMBOL(nvram_buf);
+ static int cfe_env;
+ extern char *cfe_env_get(char *nv_buf, const char *name);
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+ #endif /* CONFIG_DMA_NONCOHERENT */