ar71xx: ag71xx: allow to use port 5 of the AR934x built-in switch
authorGabor Juhos <juhosg@openwrt.org>
Tue, 13 Mar 2012 17:29:34 +0000 (17:29 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 13 Mar 2012 17:29:34 +0000 (17:29 +0000)
SVN-Revision: 30923

target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c

index 8a497b0..25ee7d4 100644 (file)
@@ -1017,6 +1017,7 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
 
        if (sw_is_ar7240(as)) {
                swdev->name = "AR7240/AR9330 built-in switch";
 
        if (sw_is_ar7240(as)) {
                swdev->name = "AR7240/AR9330 built-in switch";
+               swdev->ports = AR7240_NUM_PORTS - 1;
        } else if (sw_is_ar934x(as)) {
                swdev->name = "AR934X built-in switch";
 
        } else if (sw_is_ar934x(as)) {
                swdev->name = "AR934X built-in switch";
 
@@ -1032,16 +1033,19 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
                        goto err_free;
                }
 
                        goto err_free;
                }
 
-               if (as->swdata->phy4_mii_en)
+               if (as->swdata->phy4_mii_en) {
                        ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1,
                                         AR934X_REG_OPER_MODE1_PHY4_MII_EN);
                        ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1,
                                         AR934X_REG_OPER_MODE1_PHY4_MII_EN);
+                       swdev->ports = AR7240_NUM_PORTS - 1;
+               } else {
+                       swdev->ports = AR7240_NUM_PORTS;
+               }
        } else {
                pr_err("%s: unsupported chip, ctrl=%08x\n",
                        ag->dev->name, ctrl);
                goto err_free;
        }
 
        } else {
                pr_err("%s: unsupported chip, ctrl=%08x\n",
                        ag->dev->name, ctrl);
                goto err_free;
        }
 
-       swdev->ports = AR7240_NUM_PORTS - 1;
        swdev->cpu_port = AR7240_PORT_CPU;
        swdev->vlans = AR7240_MAX_VLANS;
        swdev->ops = &ar7240_ops;
        swdev->cpu_port = AR7240_PORT_CPU;
        swdev->vlans = AR7240_MAX_VLANS;
        swdev->ops = &ar7240_ops;