[ramips] cache_line_size is 16 on rt288x
authorGabor Juhos <juhosg@openwrt.org>
Tue, 1 Sep 2009 19:34:24 +0000 (19:34 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 1 Sep 2009 19:34:24 +0000 (19:34 +0000)
SVN-Revision: 17462

target/linux/ramips/files/arch/mips/include/asm/mach-ralink/cpu-feature-overrides.h [deleted file]
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h [new file with mode: 0644]
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h [new file with mode: 0644]
target/linux/ramips/patches-2.6.30/100-mips-ralink-core.patch

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/cpu-feature-overrides.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/cpu-feature-overrides.h
deleted file mode 100644 (file)
index 6c41da8..0000000
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Ralink RT288x/RT305x specific CPU feature overrides
- *
- * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
- *
- * This file was derived from: include/asm-mips/cpu-features.h
- *     Copyright (C) 2003, 2004 Ralf Baechle
- *     Copyright (C) 2004 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-#ifndef __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_has_tlb            1
-#define cpu_has_4kex           1
-#define cpu_has_3k_cache       0
-#define cpu_has_4k_cache       1
-#define cpu_has_tx39_cache     0
-#define cpu_has_sb1_cache      0
-#define cpu_has_fpu            0
-#define cpu_has_32fpr          0
-#define cpu_has_counter                1
-#define cpu_has_watch          1
-#define cpu_has_divec          1
-
-#define cpu_has_prefetch       1
-#define cpu_has_ejtag          1
-#define cpu_has_llsc           1
-
-#define cpu_has_mips16         1
-#define cpu_has_mdmx           0
-#define cpu_has_mips3d         0
-#define cpu_has_smartmips      0
-
-#define cpu_has_mips32r1       1
-#define cpu_has_mips32r2       1
-#define cpu_has_mips64r1       0
-#define cpu_has_mips64r2       0
-
-#define cpu_has_dsp            0
-#define cpu_has_mipsmt         0
-
-#define cpu_has_64bits         0
-#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
-
-#define cpu_dcache_line_size() 32
-#define cpu_icache_line_size() 32
-
-#endif /* __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H */
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
new file mode 100644 (file)
index 0000000..5e27363
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Ralink RT288x specific CPU feature overrides
+ *
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This file was derived from: include/asm-mips/cpu-features.h
+ *     Copyright (C) 2003, 2004 Ralf Baechle
+ *     Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb            1
+#define cpu_has_4kex           1
+#define cpu_has_3k_cache       0
+#define cpu_has_4k_cache       1
+#define cpu_has_tx39_cache     0
+#define cpu_has_sb1_cache      0
+#define cpu_has_fpu            0
+#define cpu_has_32fpr          0
+#define cpu_has_counter                1
+#define cpu_has_watch          1
+#define cpu_has_divec          1
+
+#define cpu_has_prefetch       1
+#define cpu_has_ejtag          1
+#define cpu_has_llsc           1
+
+#define cpu_has_mips16         1
+#define cpu_has_mdmx           0
+#define cpu_has_mips3d         0
+#define cpu_has_smartmips      0
+
+#define cpu_has_mips32r1       1
+#define cpu_has_mips32r2       1
+#define cpu_has_mips64r1       0
+#define cpu_has_mips64r2       0
+
+#define cpu_has_dsp            0
+#define cpu_has_mipsmt         0
+
+#define cpu_has_64bits         0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses        0
+
+#define cpu_dcache_line_size() 16
+#define cpu_icache_line_size() 16
+
+#endif /* __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H */
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
new file mode 100644 (file)
index 0000000..3295d1a
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Ralink RT305x specific CPU feature overrides
+ *
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This file was derived from: include/asm-mips/cpu-features.h
+ *     Copyright (C) 2003, 2004 Ralf Baechle
+ *     Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb            1
+#define cpu_has_4kex           1
+#define cpu_has_3k_cache       0
+#define cpu_has_4k_cache       1
+#define cpu_has_tx39_cache     0
+#define cpu_has_sb1_cache      0
+#define cpu_has_fpu            0
+#define cpu_has_32fpr          0
+#define cpu_has_counter                1
+#define cpu_has_watch          1
+#define cpu_has_divec          1
+
+#define cpu_has_prefetch       1
+#define cpu_has_ejtag          1
+#define cpu_has_llsc           1
+
+#define cpu_has_mips16         1
+#define cpu_has_mdmx           0
+#define cpu_has_mips3d         0
+#define cpu_has_smartmips      0
+
+#define cpu_has_mips32r1       1
+#define cpu_has_mips32r2       1
+#define cpu_has_mips64r1       0
+#define cpu_has_mips64r2       0
+
+#define cpu_has_dsp            0
+#define cpu_has_mipsmt         0
+
+#define cpu_has_64bits         0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses        0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_RALINK_CPU_FEATURE_OVERRIDES_H */
index 42fd6ec..1613cf4 100644 (file)
  source "arch/mips/sgi-ip27/Kconfig"
  source "arch/mips/sibyte/Kconfig"
  source "arch/mips/txx9/Kconfig"
+@@ -988,7 +992,7 @@
+ config MIPS_L1_CACHE_SHIFT
+       int
+-      default "4" if MACH_DECSTATION || MIKROTIK_RB532
++      default "4" if MACH_DECSTATION || MIKROTIK_RB532 || RALINK_RT288X
+       default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
+       default "4" if PMC_MSP4200_EVAL
+       default "5"