ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x

Some u-boot versions for QCA955x change the delays based on the link speed
during boot. This usually breaks the support of other linkspeeds when
OpenWrt is booted. It also conflicts with the
at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own
values in QCA955X_GMAC_REG_ETH_CFG.

The default RGMII values from the Atheros u-boot are currently used to
preset the existing mach files. These may have to be adjusted for boards
using different values but which are not currently set them explicitely in
OpenWrt.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Christian Beier <cb@shoutrlabs.com>
Cc: Chris R Blake <chrisrblake93@gmail.com>
Cc: Benjamin Berg <benjamin@sipsolutions.net>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
Cc: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Dirk Neukirchen <dirkneukirchen@web.de>
Cc: Christian Mehlis <christian@m3hlis.de>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 49029

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 2f2825f94507f450834355517ffdacf26e7e0f3b..6445023ec45d402b48a41566125d14aca16e7d58 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -830,7 +830,9 @@ void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd,
        iounmap(base);
 }
 
-void __init ath79_setup_qca955x_eth_cfg(u32 mask)
+void __init ath79_setup_qca955x_eth_cfg(u32 mask,
+                                       unsigned int rxd, unsigned int rxdv,
+                                       unsigned int txd, unsigned int txe)
 {
        void __iomem *base;
        u32 t, m;
@@ -845,6 +847,10 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask)
            QCA955X_ETH_CFG_RMII_GE0 |
            QCA955X_ETH_CFG_MII_CNTL_SPEED |
            QCA955X_ETH_CFG_RMII_GE0_MASTER;
+       m |= QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
+       m |= QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
+       m |= QCA955X_ETH_CFG_TXD_DELAY_MASK << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
+       m |= QCA955X_ETH_CFG_TXE_DELAY_MASK << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
 
        base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
 
@@ -852,6 +858,10 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask)
 
        t &= ~m;
        t |= mask;
+       t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
+       t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
+       t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
+       t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
 
        __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h
index 5a226e40284b6853b59812ffc791e0612c91fa9b..3908750318a0562471dfa27139b154795d5ff887 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h
@@ -48,6 +48,7 @@ void ath79_register_mdio(unsigned int id, u32 phy_mask);
 void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio);
 void ath79_setup_ar934x_eth_cfg(u32 mask);
 void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv);
-void ath79_setup_qca955x_eth_cfg(u32 mask);
+void ath79_setup_qca955x_eth_cfg(u32 mask, unsigned int rxd, unsigned int rxdv,
+                                unsigned int txd, unsigned int txe);
 
 #endif /* _ATH79_DEV_ETH_H */

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
index fc1251303e3d202bf3c5d9d8ea58b9c178e5dd57..ca882cd8309ddc58c8d01971ae2f525d10c9b042 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
@@ -211,7 +211,7 @@ static void __init common_setup(bool pcie_slot)
                                    ARRAY_SIZE(archer_c7_mdio0_info));
        ath79_register_mdio(0, 0x0);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        /* GMAC0 is connected to the RMGII interface */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
index 3d60afc4083acc7c74a1102fb9346af4f43b0378..d89d4c474655ab512fcd53eac35df03f93417b46 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
@@ -149,7 +149,7 @@ static void __init epg5000_setup(void)
 
        ath79_register_usb();
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
index 2a34b3a2e9ee966a0170aaa04f08e6bc971e2416..ef8abb8da0e0c615d96752551a6b8e86eb3cc5b4 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
@@ -148,7 +148,7 @@ static void __init esr1750_setup(void)
 
        ath79_register_usb();
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c
index aa2e7f7f4e9e96bfbabc8e288f0189d5a8bb738c..dd07248f386aa0621bf222d99fab5bcabd32aafa 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c
@@ -170,7 +170,7 @@ static void __init esr900_setup(void)
 
        ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
index 69d005d795a43ae18a1bb68736f84c7898d51b1e..c1f56790b92f730c6d3ff5d7e9886d3cfa25ac0b 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
@@ -152,7 +152,7 @@ static void __init f9k1115v2_setup(void)
        mdiobus_register_board_info(f9k1115v2_mdio0_info,
                                    ARRAY_SIZE(f9k1115v2_mdio0_info));
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_init_mac(ath79_eth0_data.mac_addr,
                       art + F9K1115V2_WAN_MAC_OFFSET, 0);

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
index 8ace02f9b1ae15f1a0643ee1a0d014c37d1ca71f..8db291509f0180d02300df6ca5f7838b0098175a 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
@@ -113,7 +113,7 @@ static void __init mr1750_setup(void)
        ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac);
        ath79_register_pci();
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
        ath79_register_mdio(0, 0x0);
 
        ath79_init_mac(ath79_eth0_data.mac_addr, art + MR1750_MAC0_OFFSET, 0);

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c
index a24cb3fce68e9e8242cf1bf5e205d3ee437f0b95..215dd55d39295ef99996f8ef213dd8856be157d2 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c
@@ -253,9 +253,8 @@ static void __init mr18_setup(void)
        res = mr18_extract_sgmii_res_cal();
        if (res >= 0) {
                /* Setup SoC Eth Config */
-               ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN |
-                       (3 << QCA955X_ETH_CFG_RXD_DELAY_SHIFT) |
-                       (3 << QCA955X_ETH_CFG_RDV_DELAY_SHIFT));
+               ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0,
+                                           0);
 
                /* MDIO Interface */
                ath79_register_mdio(0, 0x0);

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
index 9c3164d05e195f3743aea2c5a4dd3172c943838f..1eb33b6f34c1f62328806432fd6a9b7d9a580d08 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
@@ -123,7 +123,7 @@ static void __init mr900_setup(void)
        }
        pdata->use_eeprom = true;
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
        ath79_register_mdio(0, 0x0);
 
        ath79_init_mac(ath79_eth0_data.mac_addr, art + MR900_MAC0_OFFSET, 0);

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
index c28a8a511875a51a3bac1914f8ec39007e4e4311..3555c9b6d26adf6cb56b766c39a511209f45cc1d 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
@@ -287,7 +287,7 @@ static void __init nbg6716_common_setup(u32 leds_num, struct gpio_led* leds,
 
        ath79_register_wmac(art + NBG6716_WMAC_CALDATA_OFFSET, tmpmac);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
index c88c522b802d2cc0e8776e2b87a3c6dc76665c6e..986bfd274efeb0935a64a2bf28bb973114f2a4ad 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
@@ -203,7 +203,7 @@ static void __init rb922gs_setup(void)
 
        rb922gs_nand_init();
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c
index cf863ac66668507d1a31e43ba874699283eebefd..05a344f23e8187197ee173aff75b555affa549a8 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c
@@ -155,7 +155,7 @@ static void __init tew_823dru_setup(void)
                        ARRAY_SIZE(tew_823dru_mdio0_info));
        ath79_register_mdio(0, 0x0);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        /* GMAC0 is connected to the RMGII interface */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c
index abdbde08d29576e41d4f71e2184053efef9f77bb..73808aba2b0b2863a203ec90d72e20577b09027d 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c
@@ -183,7 +183,7 @@ static void __init tl_wr1043nd_v2_setup(void)
                                    ARRAY_SIZE(wr1043nd_v2_mdio0_info));
        ath79_register_mdio(0, 0x0);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        /* GMAC0 is connected to the RMGII interface */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
index 88022e7533f12e89c05d0db0f4cafef78a700947..a4e4872e5c710093867dd36be583a3f0b742f3c4 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
@@ -152,7 +152,7 @@ static void __init wlr8100_common_setup(void)
 
        ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        ath79_register_mdio(0, 0x0);
 

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c
index c7b120dc2e1d44dbe6ae67722009e6f066c534a4..954976e23eba3841f9271da615a674112e72f4e3 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c
@@ -156,7 +156,7 @@ static void __init wpj558_setup(void)
        ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ558_MAC_OFFSET, 0);
        ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ558_MAC_OFFSET, 0);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        /* GMAC0 is connected to an AR8327 switch */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c
index 428876fccb0ace63f3af105bdb7fddc01e5f5970..77c7cecae63ca8936bf6dd796e8ce904230f56f6 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c
@@ -193,7 +193,7 @@ static void __init wzr_450hp2_setup(void)
                                    ARRAY_SIZE(wzr_450hp2_mdio0_info));
        ath79_register_mdio(0, 0x0);
 
-       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 
        /* GMAC0 is connected to the RMGII interface */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

diff --git a/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch
index 4d7902e166648dd1c3c90fc8c77fd1206e49f631..f13cd9eb47a6fb1cb0de6322397b531acbbe0804 100644 (file)
--- a/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch
+++ b/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch
@@ -149,7 +149,7 @@
 +
 +      ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL);
 +
-+      ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
++      ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
  
 -static int ap136_pci_plat_dev_init(struct pci_dev *dev)
 +      ath79_register_mdio(0, 0x0);

diff --git a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch
index 4d7902e166648dd1c3c90fc8c77fd1206e49f631..f13cd9eb47a6fb1cb0de6322397b531acbbe0804 100644 (file)
--- a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch
+++ b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch
@@ -149,7 +149,7 @@
 +
 +      ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL);
 +
-+      ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
++      ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
  
 -static int ap136_pci_plat_dev_init(struct pci_dev *dev)
 +      ath79_register_mdio(0, 0x0);