PKG_FWCUTTER_SOURCE_URL:=http://bu3sch.de/b43/fwcutter/
PKG_FWCUTTER_MD5SUM:=3db2f4de85a459451f5b391cf67a8d44
+PKG_SRC_NAME:=b43-src
+PKG_SRC_VERSION:=2008-08-06
+
+PKG_SRC_SOURCE:=compat-wireless-$(PKG_SRC_VERSION).tar.bz2
+PKG_SRC_SOURCE_URL:=http://www.orbit-lab.org/kernel/compat-wireless-2.6/2008/08/
+PKG_SRC_MD5SUM:=9563ceeed86bca0859ad5f010623277c
+
define KernelPackage/b43
SUBMENU:=Wireless Drivers
TITLE:=Broadcom 43xx wireless support
define Build/Prepare
mkdir -p $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
tar xjf "$(DL_DIR)/$(PKG_FWV4_SOURCE)" -C "$(PKG_BUILD_DIR)"
tar xjf "$(DL_DIR)/$(PKG_FWCUTTER_SOURCE)" -C "$(PKG_BUILD_DIR)"
+ tar xjf "$(DL_DIR)/$(PKG_SRC_SOURCE)" -C "$(PKG_BUILD_DIR)"
+ $(CP) $(PKG_BUILD_DIR)/compat-wireless-$(PKG_SRC_VERSION)/drivers/net/wireless/b43/* $(PKG_BUILD_DIR)/
$(Build/Patch)
$(if $(QUILT),touch $(PKG_BUILD_DIR)/.quilt_used)
endef
-Index: b43/main.c
-===================================================================
---- b43.orig/main.c 2008-02-15 22:39:48.000000000 +0100
-+++ b43/main.c 2008-02-15 22:45:38.000000000 +0100
-@@ -2939,7 +2942,7 @@ static int b43_op_set_key(struct ieee802
- u8 algorithm;
- u8 index;
- int err;
-- DECLARE_MAC_BUF(mac);
-+// DECLARE_MAC_BUF(mac);
-
- if (modparam_nohwcrypt)
- return -ENOSPC; /* User disabled HW-crypto */
-@@ -3019,10 +3022,12 @@ out_unlock:
- spin_unlock_irqrestore(&wl->irq_lock, flags);
- mutex_unlock(&wl->mutex);
- if (!err) {
-+#if 0
- b43dbg(wl, "%s hardware based encryption for keyidx: %d, "
- "mac: %s\n",
- cmd == SET_KEY ? "Using" : "Disabling", key->keyidx,
- print_mac(mac, addr));
-+#endif
- }
- return err;
- }
--- /dev/null
+Index: b43/dma.c
+===================================================================
+--- b43.orig/dma.c 2008-07-27 13:56:25.000000000 +0200
++++ b43/dma.c 2008-07-27 14:02:26.000000000 +0200
+@@ -328,11 +328,11 @@ static inline
+ dma_addr_t dmaaddr;
+
+ if (tx) {
+- dmaaddr = ssb_dma_map_single(ring->dev->dev,
+- buf, len, DMA_TO_DEVICE);
++ dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
++ buf, len, DMA_TO_DEVICE);
+ } else {
+- dmaaddr = ssb_dma_map_single(ring->dev->dev,
+- buf, len, DMA_FROM_DEVICE);
++ dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
++ buf, len, DMA_FROM_DEVICE);
+ }
+
+ return dmaaddr;
+@@ -343,11 +343,11 @@ static inline
+ dma_addr_t addr, size_t len, int tx)
+ {
+ if (tx) {
+- ssb_dma_unmap_single(ring->dev->dev,
+- addr, len, DMA_TO_DEVICE);
++ dma_unmap_single(ring->dev->dev->dma_dev,
++ addr, len, DMA_TO_DEVICE);
+ } else {
+- ssb_dma_unmap_single(ring->dev->dev,
+- addr, len, DMA_FROM_DEVICE);
++ dma_unmap_single(ring->dev->dev->dma_dev,
++ addr, len, DMA_FROM_DEVICE);
+ }
+ }
+
+@@ -356,8 +356,8 @@ static inline
+ dma_addr_t addr, size_t len)
+ {
+ B43_WARN_ON(ring->tx);
+- ssb_dma_sync_single_for_cpu(ring->dev->dev,
+- addr, len, DMA_FROM_DEVICE);
++ dma_sync_single_for_cpu(ring->dev->dev->dma_dev,
++ addr, len, DMA_FROM_DEVICE);
+ }
+
+ static inline
+@@ -365,8 +365,8 @@ static inline
+ dma_addr_t addr, size_t len)
+ {
+ B43_WARN_ON(ring->tx);
+- ssb_dma_sync_single_for_device(ring->dev->dev,
+- addr, len, DMA_FROM_DEVICE);
++ dma_sync_single_for_device(ring->dev->dev->dma_dev,
++ addr, len, DMA_FROM_DEVICE);
+ }
+
+ static inline
+@@ -381,6 +381,7 @@ static inline
+
+ static int alloc_ringmemory(struct b43_dmaring *ring)
+ {
++ struct device *dma_dev = ring->dev->dev->dma_dev;
+ gfp_t flags = GFP_KERNEL;
+
+ /* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
+@@ -391,14 +392,11 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
+ * For unknown reasons - possibly a hardware error - the BCM4311 rev
+ * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
+ * which accounts for the GFP_DMA flag below.
+- *
+- * The flags here must match the flags in free_ringmemory below!
+ */
+ if (ring->type == B43_DMA_64BIT)
+ flags |= GFP_DMA;
+- ring->descbase = ssb_dma_alloc_consistent(ring->dev->dev,
+- B43_DMA_RINGMEMSIZE,
+- &(ring->dmabase), flags);
++ ring->descbase = dma_alloc_coherent(dma_dev, B43_DMA_RINGMEMSIZE,
++ &(ring->dmabase), flags);
+ if (!ring->descbase) {
+ b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
+ return -ENOMEM;
+@@ -410,13 +408,10 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
+
+ static void free_ringmemory(struct b43_dmaring *ring)
+ {
+- gfp_t flags = GFP_KERNEL;
+-
+- if (ring->type == B43_DMA_64BIT)
+- flags |= GFP_DMA;
++ struct device *dma_dev = ring->dev->dev->dma_dev;
+
+- ssb_dma_free_consistent(ring->dev->dev, B43_DMA_RINGMEMSIZE,
+- ring->descbase, ring->dmabase, flags);
++ dma_free_coherent(dma_dev, B43_DMA_RINGMEMSIZE,
++ ring->descbase, ring->dmabase);
+ }
+
+ /* Reset the RX DMA channel */
+@@ -523,7 +518,7 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring,
+ dma_addr_t addr,
+ size_t buffersize, bool dma_to_device)
+ {
+- if (unlikely(ssb_dma_mapping_error(ring->dev->dev, addr)))
++ if (unlikely(dma_mapping_error(addr)))
+ return 1;
+
+ switch (ring->type) {
+@@ -849,10 +844,10 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
+ goto err_kfree_meta;
+
+ /* test for ability to dma to txhdr_cache */
+- dma_test = ssb_dma_map_single(dev->dev,
+- ring->txhdr_cache,
+- b43_txhdr_size(dev),
+- DMA_TO_DEVICE);
++ dma_test = dma_map_single(dev->dev->dma_dev,
++ ring->txhdr_cache,
++ b43_txhdr_size(dev),
++ DMA_TO_DEVICE);
+
+ if (b43_dma_mapping_error(ring, dma_test,
+ b43_txhdr_size(dev), 1)) {
+@@ -864,10 +859,10 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
+ if (!ring->txhdr_cache)
+ goto err_kfree_meta;
+
+- dma_test = ssb_dma_map_single(dev->dev,
+- ring->txhdr_cache,
+- b43_txhdr_size(dev),
+- DMA_TO_DEVICE);
++ dma_test = dma_map_single(dev->dev->dma_dev,
++ ring->txhdr_cache,
++ b43_txhdr_size(dev),
++ DMA_TO_DEVICE);
+
+ if (b43_dma_mapping_error(ring, dma_test,
+ b43_txhdr_size(dev), 1)) {
+@@ -878,9 +873,9 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
+ }
+ }
+
+- ssb_dma_unmap_single(dev->dev,
+- dma_test, b43_txhdr_size(dev),
+- DMA_TO_DEVICE);
++ dma_unmap_single(dev->dev->dma_dev,
++ dma_test, b43_txhdr_size(dev),
++ DMA_TO_DEVICE);
+ }
+
+ err = alloc_ringmemory(ring);
-config B43
- tristate "Broadcom 43xx wireless support (mac80211 stack)"
- depends on SSB_POSSIBLE && MAC80211 && WLAN_80211
- select SSB
- select FW_LOADER
- select HW_RANDOM
- ---help---
- b43 is a driver for the Broadcom 43xx series wireless devices.
-
- Check "lspci" for something like
- "Broadcom Corporation BCM43XX 802.11 Wireless LAN Controller"
- to determine whether you own such a device.
-
- This driver supports the new BCM43xx IEEE 802.11G devices, but not
- the old IEEE 802.11B devices. Old devices are supported by
- the b43legacy driver.
- Note that this has nothing to do with the standard that your AccessPoint
- supports (A, B, G or a combination).
- IEEE 802.11G devices can talk to IEEE 802.11B AccessPoints.
-
- It is safe to include both b43 and b43legacy as the underlying glue
- layer will automatically load the correct version for your device.
-
- This driver uses V4 firmware, which must be installed separately using
- b43-fwcutter.
-
- This driver can be built as a module (recommended) that will be called "b43".
- If unsure, say M.
-
-# Auto-select SSB PCI-HOST support, if possible
-config B43_PCI_AUTOSELECT
- bool
- depends on B43 && SSB_PCIHOST_POSSIBLE
- select SSB_PCIHOST
- default y
-
-# Auto-select SSB PCICORE driver, if possible
-config B43_PCICORE_AUTOSELECT
- bool
- depends on B43 && SSB_DRIVER_PCICORE_POSSIBLE
- select SSB_DRIVER_PCICORE
- default y
-
-config B43_PCMCIA
- bool "Broadcom 43xx PCMCIA device support (EXPERIMENTAL)"
- depends on B43 && SSB_PCMCIAHOST_POSSIBLE && EXPERIMENTAL
- select SSB_PCMCIAHOST
- ---help---
- Broadcom 43xx PCMCIA device support.
-
- Support for 16bit PCMCIA devices.
- Please note that most PC-CARD devices are _NOT_ 16bit PCMCIA
- devices, but 32bit CardBUS devices. CardBUS devices are supported
- out of the box by b43.
-
- With this config option you can drive b43 cards in
- CompactFlash formfactor in a PCMCIA adaptor.
- CF b43 cards can sometimes be found in handheld PCs.
-
- It's safe to select Y here, even if you don't have a B43 PCMCIA device.
-
- If unsure, say N.
-
-config B43_NPHY
- bool "Pre IEEE 802.11n support (BROKEN)"
- depends on B43 && EXPERIMENTAL
- ---help---
- Support for the IEEE 802.11n draft.
-
- THIS IS BROKEN AND DOES NOT WORK YET.
-
- SAY N.
-
-# This config option automatically enables b43 LEDS support,
-# if it's possible.
-config B43_LEDS
- bool
- depends on B43 && MAC80211_LEDS && (LEDS_CLASS = y || LEDS_CLASS = B43)
- default y
-
-# This config option automatically enables b43 RFKILL support,
-# if it's possible.
-config B43_RFKILL
- bool
- depends on B43 && (RFKILL = y || RFKILL = B43) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43)
- default y
-
-config B43_DEBUG
- bool "Broadcom 43xx debugging"
- depends on B43
- ---help---
- Broadcom 43xx debugging messages.
-
- Say Y, if you want to find out why the driver does not
- work for you.
-b43-y += main.o
-b43-y += tables.o
-b43-$(CONFIG_B43_NPHY) += tables_nphy.o
-b43-y += phy.o
-b43-$(CONFIG_B43_NPHY) += nphy.o
-b43-y += sysfs.o
-b43-y += xmit.o
-b43-y += lo.o
-b43-y += wa.o
-b43-y += dma.o
-b43-$(CONFIG_B43_PIO) += pio.o
-b43-$(CONFIG_B43_RFKILL) += rfkill.o
-b43-$(CONFIG_B43_LEDS) += leds.o
-b43-$(CONFIG_B43_PCMCIA) += pcmcia.o
-b43-$(CONFIG_B43_DEBUG) += debugfs.o
-
-obj-$(CONFIG_B43) += b43.o
-#ifndef B43_H_
-#define B43_H_
-
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/hw_random.h>
-#include <linux/ssb/ssb.h>
-#include <net/mac80211.h>
-
-#include "debugfs.h"
-#include "leds.h"
-#include "rfkill.h"
-#include "lo.h"
-#include "phy.h"
-
-
-/* The unique identifier of the firmware that's officially supported by
- * this driver version. */
-#define B43_SUPPORTED_FIRMWARE_ID "FW13"
-
-
-#ifdef CONFIG_B43_DEBUG
-# define B43_DEBUG 1
-#else
-# define B43_DEBUG 0
-#endif
-
-#define B43_RX_MAX_SSI 60
-
-/* MMIO offsets */
-#define B43_MMIO_DMA0_REASON 0x20
-#define B43_MMIO_DMA0_IRQ_MASK 0x24
-#define B43_MMIO_DMA1_REASON 0x28
-#define B43_MMIO_DMA1_IRQ_MASK 0x2C
-#define B43_MMIO_DMA2_REASON 0x30
-#define B43_MMIO_DMA2_IRQ_MASK 0x34
-#define B43_MMIO_DMA3_REASON 0x38
-#define B43_MMIO_DMA3_IRQ_MASK 0x3C
-#define B43_MMIO_DMA4_REASON 0x40
-#define B43_MMIO_DMA4_IRQ_MASK 0x44
-#define B43_MMIO_DMA5_REASON 0x48
-#define B43_MMIO_DMA5_IRQ_MASK 0x4C
-#define B43_MMIO_MACCTL 0x120 /* MAC control */
-#define B43_MMIO_MACCMD 0x124 /* MAC command */
-#define B43_MMIO_GEN_IRQ_REASON 0x128
-#define B43_MMIO_GEN_IRQ_MASK 0x12C
-#define B43_MMIO_RAM_CONTROL 0x130
-#define B43_MMIO_RAM_DATA 0x134
-#define B43_MMIO_PS_STATUS 0x140
-#define B43_MMIO_RADIO_HWENABLED_HI 0x158
-#define B43_MMIO_SHM_CONTROL 0x160
-#define B43_MMIO_SHM_DATA 0x164
-#define B43_MMIO_SHM_DATA_UNALIGNED 0x166
-#define B43_MMIO_XMITSTAT_0 0x170
-#define B43_MMIO_XMITSTAT_1 0x174
-#define B43_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
-#define B43_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
-#define B43_MMIO_TSF_CFP_REP 0x188
-#define B43_MMIO_TSF_CFP_START 0x18C
-#define B43_MMIO_TSF_CFP_MAXDUR 0x190
-
-/* 32-bit DMA */
-#define B43_MMIO_DMA32_BASE0 0x200
-#define B43_MMIO_DMA32_BASE1 0x220
-#define B43_MMIO_DMA32_BASE2 0x240
-#define B43_MMIO_DMA32_BASE3 0x260
-#define B43_MMIO_DMA32_BASE4 0x280
-#define B43_MMIO_DMA32_BASE5 0x2A0
-/* 64-bit DMA */
-#define B43_MMIO_DMA64_BASE0 0x200
-#define B43_MMIO_DMA64_BASE1 0x240
-#define B43_MMIO_DMA64_BASE2 0x280
-#define B43_MMIO_DMA64_BASE3 0x2C0
-#define B43_MMIO_DMA64_BASE4 0x300
-#define B43_MMIO_DMA64_BASE5 0x340
-
-/* PIO on core rev < 11 */
-#define B43_MMIO_PIO_BASE0 0x300
-#define B43_MMIO_PIO_BASE1 0x310
-#define B43_MMIO_PIO_BASE2 0x320
-#define B43_MMIO_PIO_BASE3 0x330
-#define B43_MMIO_PIO_BASE4 0x340
-#define B43_MMIO_PIO_BASE5 0x350
-#define B43_MMIO_PIO_BASE6 0x360
-#define B43_MMIO_PIO_BASE7 0x370
-/* PIO on core rev >= 11 */
-#define B43_MMIO_PIO11_BASE0 0x200
-#define B43_MMIO_PIO11_BASE1 0x240
-#define B43_MMIO_PIO11_BASE2 0x280
-#define B43_MMIO_PIO11_BASE3 0x2C0
-#define B43_MMIO_PIO11_BASE4 0x300
-#define B43_MMIO_PIO11_BASE5 0x340
-
-#define B43_MMIO_PHY_VER 0x3E0
-#define B43_MMIO_PHY_RADIO 0x3E2
-#define B43_MMIO_PHY0 0x3E6
-#define B43_MMIO_ANTENNA 0x3E8
-#define B43_MMIO_CHANNEL 0x3F0
-#define B43_MMIO_CHANNEL_EXT 0x3F4
-#define B43_MMIO_RADIO_CONTROL 0x3F6
-#define B43_MMIO_RADIO_DATA_HIGH 0x3F8
-#define B43_MMIO_RADIO_DATA_LOW 0x3FA
-#define B43_MMIO_PHY_CONTROL 0x3FC
-#define B43_MMIO_PHY_DATA 0x3FE
-#define B43_MMIO_MACFILTER_CONTROL 0x420
-#define B43_MMIO_MACFILTER_DATA 0x422
-#define B43_MMIO_RCMTA_COUNT 0x43C
-#define B43_MMIO_RADIO_HWENABLED_LO 0x49A
-#define B43_MMIO_GPIO_CONTROL 0x49C
-#define B43_MMIO_GPIO_MASK 0x49E
-#define B43_MMIO_TSF_CFP_START_LOW 0x604
-#define B43_MMIO_TSF_CFP_START_HIGH 0x606
-#define B43_MMIO_TSF_CFP_PRETBTT 0x612
-#define B43_MMIO_TSF_0 0x632 /* core rev < 3 only */
-#define B43_MMIO_TSF_1 0x634 /* core rev < 3 only */
-#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
-#define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */
-#define B43_MMIO_RNG 0x65A
-#define B43_MMIO_IFSCTL 0x688 /* Interframe space control */
-#define B43_MMIO_IFSCTL_USE_EDCF 0x0004
-#define B43_MMIO_POWERUP_DELAY 0x6A8
-
-/* SPROM boardflags_lo values */
-#define B43_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
-#define B43_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
-#define B43_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
-#define B43_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
-#define B43_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
-#define B43_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
-#define B43_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
-#define B43_BFL_ENETADM 0x0080 /* has ADMtek switch */
-#define B43_BFL_ENETVLAN 0x0100 /* can do vlan */
-#define B43_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
-#define B43_BFL_NOPCI 0x0400 /* leaves PCI floating */
-#define B43_BFL_FEM 0x0800 /* supports the Front End Module */
-#define B43_BFL_EXTLNA 0x1000 /* has an external LNA */
-#define B43_BFL_HGPA 0x2000 /* had high gain PA */
-#define B43_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
-#define B43_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
-
-/* GPIO register offset, in both ChipCommon and PCI core. */
-#define B43_GPIO_CONTROL 0x6c
-
-/* SHM Routing */
-enum {
- B43_SHM_UCODE, /* Microcode memory */
- B43_SHM_SHARED, /* Shared memory */
- B43_SHM_SCRATCH, /* Scratch memory */
- B43_SHM_HW, /* Internal hardware register */
- B43_SHM_RCMTA, /* Receive match transmitter address (rev >= 5 only) */
-};
-/* SHM Routing modifiers */
-#define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */
-#define B43_SHM_AUTOINC_W 0x0100 /* Auto-increment address on write */
-#define B43_SHM_AUTOINC_RW (B43_SHM_AUTOINC_R | \
- B43_SHM_AUTOINC_W)
-
-/* Misc SHM_SHARED offsets */
-#define B43_SHM_SH_WLCOREREV 0x0016 /* 802.11 core revision */
-#define B43_SHM_SH_PCTLWDPOS 0x0008
-#define B43_SHM_SH_RXPADOFF 0x0034 /* RX Padding data offset (PIO only) */
-#define B43_SHM_SH_PHYVER 0x0050 /* PHY version */
-#define B43_SHM_SH_PHYTYPE 0x0052 /* PHY type */
-#define B43_SHM_SH_ANTSWAP 0x005C /* Antenna swap threshold */
-#define B43_SHM_SH_HOSTFLO 0x005E /* Hostflags for ucode options (low) */
-#define B43_SHM_SH_HOSTFMI 0x0060 /* Hostflags for ucode options (middle) */
-#define B43_SHM_SH_HOSTFHI 0x0062 /* Hostflags for ucode options (high) */
-#define B43_SHM_SH_RFATT 0x0064 /* Current radio attenuation value */
-#define B43_SHM_SH_RADAR 0x0066 /* Radar register */
-#define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */
-#define B43_SHM_SH_RFRXSP1 0x0072 /* RF RX SP Register 1 */
-#define B43_SHM_SH_CHAN 0x00A0 /* Current channel (low 8bit only) */
-#define B43_SHM_SH_CHAN_5GHZ 0x0100 /* Bit set, if 5Ghz channel */
-#define B43_SHM_SH_BCMCFIFOID 0x0108 /* Last posted cookie to the bcast/mcast FIFO */
-/* SHM_SHARED TX FIFO variables */
-#define B43_SHM_SH_SIZE01 0x0098 /* TX FIFO size for FIFO 0 (low) and 1 (high) */
-#define B43_SHM_SH_SIZE23 0x009A /* TX FIFO size for FIFO 2 and 3 */
-#define B43_SHM_SH_SIZE45 0x009C /* TX FIFO size for FIFO 4 and 5 */
-#define B43_SHM_SH_SIZE67 0x009E /* TX FIFO size for FIFO 6 and 7 */
-/* SHM_SHARED background noise */
-#define B43_SHM_SH_JSSI0 0x0088 /* Measure JSSI 0 */
-#define B43_SHM_SH_JSSI1 0x008A /* Measure JSSI 1 */
-#define B43_SHM_SH_JSSIAUX 0x008C /* Measure JSSI AUX */
-/* SHM_SHARED crypto engine */
-#define B43_SHM_SH_DEFAULTIV 0x003C /* Default IV location */
-#define B43_SHM_SH_NRRXTRANS 0x003E /* # of soft RX transmitter addresses (max 8) */
-#define B43_SHM_SH_KTP 0x0056 /* Key table pointer */
-#define B43_SHM_SH_TKIPTSCTTAK 0x0318
-#define B43_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block (v4 firmware) */
-#define B43_SHM_SH_PSM 0x05F4 /* PSM transmitter address match block (rev < 5) */
-/* SHM_SHARED WME variables */
-#define B43_SHM_SH_EDCFSTAT 0x000E /* EDCF status */
-#define B43_SHM_SH_TXFCUR 0x0030 /* TXF current index */
-#define B43_SHM_SH_EDCFQ 0x0240 /* EDCF Q info */
-/* SHM_SHARED powersave mode related */
-#define B43_SHM_SH_SLOTT 0x0010 /* Slot time */
-#define B43_SHM_SH_DTIMPER 0x0012 /* DTIM period */
-#define B43_SHM_SH_NOSLPZNATDTIM 0x004C /* NOSLPZNAT DTIM */
-/* SHM_SHARED beacon/AP variables */
-#define B43_SHM_SH_BTL0 0x0018 /* Beacon template length 0 */
-#define B43_SHM_SH_BTL1 0x001A /* Beacon template length 1 */
-#define B43_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */
-#define B43_SHM_SH_TIMBPOS 0x001E /* TIM B position in beacon */
-#define B43_SHM_SH_DTIMP 0x0012 /* DTIP period */
-#define B43_SHM_SH_MCASTCOOKIE 0x00A8 /* Last bcast/mcast frame ID */
-#define B43_SHM_SH_SFFBLIM 0x0044 /* Short frame fallback retry limit */
-#define B43_SHM_SH_LFFBLIM 0x0046 /* Long frame fallback retry limit */
-#define B43_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word (see PHY TX control) */
-#define B43_SHM_SH_EXTNPHYCTL 0x00B0 /* Extended bytes for beacon PHY control (N) */
-/* SHM_SHARED ACK/CTS control */
-#define B43_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word (see PHY TX control) */
-/* SHM_SHARED probe response variables */
-#define B43_SHM_SH_PRSSID 0x0160 /* Probe Response SSID */
-#define B43_SHM_SH_PRSSIDLEN 0x0048 /* Probe Response SSID length */
-#define B43_SHM_SH_PRTLEN 0x004A /* Probe Response template length */
-#define B43_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */
-#define B43_SHM_SH_PRPHYCTL 0x0188 /* Probe Response PHY TX control word */
-/* SHM_SHARED rate tables */
-#define B43_SHM_SH_OFDMDIRECT 0x01C0 /* Pointer to OFDM direct map */
-#define B43_SHM_SH_OFDMBASIC 0x01E0 /* Pointer to OFDM basic rate map */
-#define B43_SHM_SH_CCKDIRECT 0x0200 /* Pointer to CCK direct map */
-#define B43_SHM_SH_CCKBASIC 0x0220 /* Pointer to CCK basic rate map */
-/* SHM_SHARED microcode soft registers */
-#define B43_SHM_SH_UCODEREV 0x0000 /* Microcode revision */
-#define B43_SHM_SH_UCODEPATCH 0x0002 /* Microcode patchlevel */
-#define B43_SHM_SH_UCODEDATE 0x0004 /* Microcode date */
-#define B43_SHM_SH_UCODETIME 0x0006 /* Microcode time */
-#define B43_SHM_SH_UCODESTAT 0x0040 /* Microcode debug status code */
-#define B43_SHM_SH_UCODESTAT_INVALID 0
-#define B43_SHM_SH_UCODESTAT_INIT 1
-#define B43_SHM_SH_UCODESTAT_ACTIVE 2
-#define B43_SHM_SH_UCODESTAT_SUSP 3 /* suspended */
-#define B43_SHM_SH_UCODESTAT_SLEEP 4 /* asleep (PS) */
-#define B43_SHM_SH_MAXBFRAMES 0x0080 /* Maximum number of frames in a burst */
-#define B43_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */
-#define B43_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */
-
-/* SHM_SCRATCH offsets */
-#define B43_SHM_SC_MINCONT 0x0003 /* Minimum contention window */
-#define B43_SHM_SC_MAXCONT 0x0004 /* Maximum contention window */
-#define B43_SHM_SC_CURCONT 0x0005 /* Current contention window */
-#define B43_SHM_SC_SRLIMIT 0x0006 /* Short retry count limit */
-#define B43_SHM_SC_LRLIMIT 0x0007 /* Long retry count limit */
-#define B43_SHM_SC_DTIMC 0x0008 /* Current DTIM count */
-#define B43_SHM_SC_BTL0LEN 0x0015 /* Beacon 0 template length */
-#define B43_SHM_SC_BTL1LEN 0x0016 /* Beacon 1 template length */
-#define B43_SHM_SC_SCFB 0x0017 /* Short frame transmit count threshold for rate fallback */
-#define B43_SHM_SC_LCFB 0x0018 /* Long frame transmit count threshold for rate fallback */
-
-/* Hardware Radio Enable masks */
-#define B43_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16)
-#define B43_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)
-
-/* HostFlags. See b43_hf_read/write() */
-#define B43_HF_ANTDIVHELP 0x000000000001ULL /* ucode antenna div helper */
-#define B43_HF_SYMW 0x000000000002ULL /* G-PHY SYM workaround */
-#define B43_HF_RXPULLW 0x000000000004ULL /* RX pullup workaround */
-#define B43_HF_CCKBOOST 0x000000000008ULL /* 4dB CCK power boost (exclusive with OFDM boost) */
-#define B43_HF_BTCOEX 0x000000000010ULL /* Bluetooth coexistance */
-#define B43_HF_GDCW 0x000000000020ULL /* G-PHY DC canceller filter bw workaround */
-#define B43_HF_OFDMPABOOST 0x000000000040ULL /* Enable PA gain boost for OFDM */
-#define B43_HF_ACPR 0x000000000080ULL /* Disable for Japan, channel 14 */
-#define B43_HF_EDCF 0x000000000100ULL /* on if WME and MAC suspended */
-#define B43_HF_TSSIRPSMW 0x000000000200ULL /* TSSI reset PSM ucode workaround */
-#define B43_HF_20IN40IQW 0x000000000200ULL /* 20 in 40 MHz I/Q workaround (rev >= 13 only) */
-#define B43_HF_DSCRQ 0x000000000400ULL /* Disable slow clock request in ucode */
-#define B43_HF_ACIW 0x000000000800ULL /* ACI workaround: shift bits by 2 on PHY CRS */
-#define B43_HF_2060W 0x000000001000ULL /* 2060 radio workaround */
-#define B43_HF_RADARW 0x000000002000ULL /* Radar workaround */
-#define B43_HF_USEDEFKEYS 0x000000004000ULL /* Enable use of default keys */
-#define B43_HF_AFTERBURNER 0x000000008000ULL /* Afterburner enabled */
-#define B43_HF_BT4PRIOCOEX 0x000000010000ULL /* Bluetooth 4-priority coexistance */
-#define B43_HF_FWKUP 0x000000020000ULL /* Fast wake-up ucode */
-#define B43_HF_VCORECALC 0x000000040000ULL /* Force VCO recalculation when powering up synthpu */
-#define B43_HF_PCISCW 0x000000080000ULL /* PCI slow clock workaround */
-#define B43_HF_4318TSSI 0x000000200000ULL /* 4318 TSSI */
-#define B43_HF_FBCMCFIFO 0x000000400000ULL /* Flush bcast/mcast FIFO immediately */
-#define B43_HF_HWPCTL 0x000000800000ULL /* Enable hardwarre power control */
-#define B43_HF_BTCOEXALT 0x000001000000ULL /* Bluetooth coexistance in alternate pins */
-#define B43_HF_TXBTCHECK 0x000002000000ULL /* Bluetooth check during transmission */
-#define B43_HF_SKCFPUP 0x000004000000ULL /* Skip CFP update */
-#define B43_HF_N40W 0x000008000000ULL /* N PHY 40 MHz workaround (rev >= 13 only) */
-#define B43_HF_ANTSEL 0x000020000000ULL /* Antenna selection (for testing antenna div.) */
-#define B43_HF_BT3COEXT 0x000020000000ULL /* Bluetooth 3-wire coexistence (rev >= 13 only) */
-#define B43_HF_BTCANT 0x000040000000ULL /* Bluetooth coexistence (antenna mode) (rev >= 13 only) */
-#define B43_HF_ANTSELEN 0x000100000000ULL /* Antenna selection enabled (rev >= 13 only) */
-#define B43_HF_ANTSELMODE 0x000200000000ULL /* Antenna selection mode (rev >= 13 only) */
-#define B43_HF_MLADVW 0x001000000000ULL /* N PHY ML ADV workaround (rev >= 13 only) */
-#define B43_HF_PR45960W 0x080000000000ULL /* PR 45960 workaround (rev >= 13 only) */
-
-/* MacFilter offsets. */
-#define B43_MACFILTER_SELF 0x0000
-#define B43_MACFILTER_BSSID 0x0003
-
-/* PowerControl */
-#define B43_PCTL_IN 0xB0
-#define B43_PCTL_OUT 0xB4
-#define B43_PCTL_OUTENABLE 0xB8
-#define B43_PCTL_XTAL_POWERUP 0x40
-#define B43_PCTL_PLL_POWERDOWN 0x80
-
-/* PowerControl Clock Modes */
-#define B43_PCTL_CLK_FAST 0x00
-#define B43_PCTL_CLK_SLOW 0x01
-#define B43_PCTL_CLK_DYNAMIC 0x02
-
-#define B43_PCTL_FORCE_SLOW 0x0800
-#define B43_PCTL_FORCE_PLL 0x1000
-#define B43_PCTL_DYN_XTAL 0x2000
-
-/* PHYVersioning */
-#define B43_PHYTYPE_A 0x00
-#define B43_PHYTYPE_B 0x01
-#define B43_PHYTYPE_G 0x02
-#define B43_PHYTYPE_N 0x04
-#define B43_PHYTYPE_LP 0x05
-
-/* PHYRegisters */
-#define B43_PHY_ILT_A_CTRL 0x0072
-#define B43_PHY_ILT_A_DATA1 0x0073
-#define B43_PHY_ILT_A_DATA2 0x0074
-#define B43_PHY_G_LO_CONTROL 0x0810
-#define B43_PHY_ILT_G_CTRL 0x0472
-#define B43_PHY_ILT_G_DATA1 0x0473
-#define B43_PHY_ILT_G_DATA2 0x0474
-#define B43_PHY_A_PCTL 0x007B
-#define B43_PHY_G_PCTL 0x0029
-#define B43_PHY_A_CRS 0x0029
-#define B43_PHY_RADIO_BITFIELD 0x0401
-#define B43_PHY_G_CRS 0x0429
-#define B43_PHY_NRSSILT_CTRL 0x0803
-#define B43_PHY_NRSSILT_DATA 0x0804
-
-/* RadioRegisters */
-#define B43_RADIOCTL_ID 0x01
-
-/* MAC Control bitfield */
-#define B43_MACCTL_ENABLED 0x00000001 /* MAC Enabled */
-#define B43_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */
-#define B43_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */
-#define B43_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */
-#define B43_MACCTL_SHM_UPPER 0x00000200 /* SHM Upper */
-#define B43_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */
-#define B43_MACCTL_PSM_DBG 0x00002000 /* Microcode debugging enabled */
-#define B43_MACCTL_GPOUTSMSK 0x0000C000 /* GPOUT Select Mask */
-#define B43_MACCTL_BE 0x00010000 /* Big Endian mode */
-#define B43_MACCTL_INFRA 0x00020000 /* Infrastructure mode */
-#define B43_MACCTL_AP 0x00040000 /* AccessPoint mode */
-#define B43_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */
-#define B43_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */
-#define B43_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep frames with bad PLCP */
-#define B43_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */
-#define B43_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */
-#define B43_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */
-#define B43_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */
-#define B43_MACCTL_AWAKE 0x04000000 /* Device is awake */
-#define B43_MACCTL_CLOSEDNET 0x08000000 /* Closed net (no SSID bcast) */
-#define B43_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */
-#define B43_MACCTL_DISCTXSTAT 0x20000000 /* Discard TX status */
-#define B43_MACCTL_DISCPMQ 0x40000000 /* Discard Power Management Queue */
-#define B43_MACCTL_GMODE 0x80000000 /* G Mode */
-
-/* MAC Command bitfield */
-#define B43_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */
-#define B43_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */
-#define B43_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */
-#define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */
-#define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */
-
-/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
-#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
-#define B43_TMSLOW_PHYCLKSPEED 0x00C00000 /* PHY clock speed mask (N-PHY only) */
-#define B43_TMSLOW_PHYCLKSPEED_40MHZ 0x00000000 /* 40 MHz PHY */
-#define B43_TMSLOW_PHYCLKSPEED_80MHZ 0x00400000 /* 80 MHz PHY */
-#define B43_TMSLOW_PHYCLKSPEED_160MHZ 0x00800000 /* 160 MHz PHY */
-#define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */
-#define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */
-#define B43_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */
-#define B43_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */
-
-/* 802.11 core specific TM State High (SSB_TMSHIGH) flags */
-#define B43_TMSHIGH_DUALBAND_PHY 0x00080000 /* Dualband PHY available */
-#define B43_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available (rev >= 5) */
-#define B43_TMSHIGH_HAVE_5GHZ_PHY 0x00020000 /* 5 GHz PHY available (rev >= 5) */
-#define B43_TMSHIGH_HAVE_2GHZ_PHY 0x00010000 /* 2.4 GHz PHY available (rev >= 5) */
-
-/* Generic-Interrupt reasons. */
-#define B43_IRQ_MAC_SUSPENDED 0x00000001
-#define B43_IRQ_BEACON 0x00000002
-#define B43_IRQ_TBTT_INDI 0x00000004
-#define B43_IRQ_BEACON_TX_OK 0x00000008
-#define B43_IRQ_BEACON_CANCEL 0x00000010
-#define B43_IRQ_ATIM_END 0x00000020
-#define B43_IRQ_PMQ 0x00000040
-#define B43_IRQ_PIO_WORKAROUND 0x00000100
-#define B43_IRQ_MAC_TXERR 0x00000200
-#define B43_IRQ_PHY_TXERR 0x00000800
-#define B43_IRQ_PMEVENT 0x00001000
-#define B43_IRQ_TIMER0 0x00002000
-#define B43_IRQ_TIMER1 0x00004000
-#define B43_IRQ_DMA 0x00008000
-#define B43_IRQ_TXFIFO_FLUSH_OK 0x00010000
-#define B43_IRQ_CCA_MEASURE_OK 0x00020000
-#define B43_IRQ_NOISESAMPLE_OK 0x00040000
-#define B43_IRQ_UCODE_DEBUG 0x08000000
-#define B43_IRQ_RFKILL 0x10000000
-#define B43_IRQ_TX_OK 0x20000000
-#define B43_IRQ_PHY_G_CHANGED 0x40000000
-#define B43_IRQ_TIMEOUT 0x80000000
-
-#define B43_IRQ_ALL 0xFFFFFFFF
-#define B43_IRQ_MASKTEMPLATE (B43_IRQ_TBTT_INDI | \
- B43_IRQ_ATIM_END | \
- B43_IRQ_PMQ | \
- B43_IRQ_MAC_TXERR | \
- B43_IRQ_PHY_TXERR | \
- B43_IRQ_DMA | \
- B43_IRQ_TXFIFO_FLUSH_OK | \
- B43_IRQ_NOISESAMPLE_OK | \
- B43_IRQ_UCODE_DEBUG | \
- B43_IRQ_RFKILL | \
- B43_IRQ_TX_OK)
-
-/* The firmware register to fetch the debug-IRQ reason from. */
-#define B43_DEBUGIRQ_REASON_REG 63
-/* Debug-IRQ reasons. */
-#define B43_DEBUGIRQ_PANIC 0 /* The firmware panic'ed */
-#define B43_DEBUGIRQ_DUMP_SHM 1 /* Dump shared SHM */
-#define B43_DEBUGIRQ_DUMP_REGS 2 /* Dump the microcode registers */
-#define B43_DEBUGIRQ_MARKER 3 /* A "marker" was thrown by the firmware. */
-#define B43_DEBUGIRQ_ACK 0xFFFF /* The host writes that to ACK the IRQ */
-
-/* The firmware register that contains the "marker" line. */
-#define B43_MARKER_ID_REG 2
-#define B43_MARKER_LINE_REG 3
-
-/* The firmware register to fetch the panic reason from. */
-#define B43_FWPANIC_REASON_REG 3
-/* Firmware panic reason codes */
-#define B43_FWPANIC_DIE 0 /* Firmware died. Don't auto-restart it. */
-#define B43_FWPANIC_RESTART 1 /* Firmware died. Schedule a controller reset. */
-
-
-/* Device specific rate values.
- * The actual values defined here are (rate_in_mbps * 2).
- * Some code depends on this. Don't change it. */
-#define B43_CCK_RATE_1MB 0x02
-#define B43_CCK_RATE_2MB 0x04
-#define B43_CCK_RATE_5MB 0x0B
-#define B43_CCK_RATE_11MB 0x16
-#define B43_OFDM_RATE_6MB 0x0C
-#define B43_OFDM_RATE_9MB 0x12
-#define B43_OFDM_RATE_12MB 0x18
-#define B43_OFDM_RATE_18MB 0x24
-#define B43_OFDM_RATE_24MB 0x30
-#define B43_OFDM_RATE_36MB 0x48
-#define B43_OFDM_RATE_48MB 0x60
-#define B43_OFDM_RATE_54MB 0x6C
-/* Convert a b43 rate value to a rate in 100kbps */
-#define B43_RATE_TO_BASE100KBPS(rate) (((rate) * 10) / 2)
-
-#define B43_DEFAULT_SHORT_RETRY_LIMIT 7
-#define B43_DEFAULT_LONG_RETRY_LIMIT 4
-
-#define B43_PHY_TX_BADNESS_LIMIT 1000
-
-/* Max size of a security key */
-#define B43_SEC_KEYSIZE 16
-/* Security algorithms. */
-enum {
- B43_SEC_ALGO_NONE = 0, /* unencrypted, as of TX header. */
- B43_SEC_ALGO_WEP40,
- B43_SEC_ALGO_TKIP,
- B43_SEC_ALGO_AES,
- B43_SEC_ALGO_WEP104,
- B43_SEC_ALGO_AES_LEGACY,
-};
-
-struct b43_dmaring;
-
-/* The firmware file header */
-#define B43_FW_TYPE_UCODE 'u'
-#define B43_FW_TYPE_PCM 'p'
-#define B43_FW_TYPE_IV 'i'
-struct b43_fw_header {
- /* File type */
- u8 type;
- /* File format version */
- u8 ver;
- u8 __padding[2];
- /* Size of the data. For ucode and PCM this is in bytes.
- * For IV this is number-of-ivs. */
- __be32 size;
-} __attribute__((__packed__));
-
-/* Initial Value file format */
-#define B43_IV_OFFSET_MASK 0x7FFF
-#define B43_IV_32BIT 0x8000
-struct b43_iv {
- __be16 offset_size;
- union {
- __be16 d16;
- __be32 d32;
- } data __attribute__((__packed__));
-} __attribute__((__packed__));
-
-
-struct b43_phy {
- /* Band support flags. */
- bool supports_2ghz;
- bool supports_5ghz;
-
- /* GMODE bit enabled? */
- bool gmode;
-
- /* Analog Type */
- u8 analog;
- /* B43_PHYTYPE_ */
- u8 type;
- /* PHY revision number. */
- u8 rev;
-
- /* Radio versioning */
- u16 radio_manuf; /* Radio manufacturer */
- u16 radio_ver; /* Radio version */
- u8 radio_rev; /* Radio revision */
-
- bool dyn_tssi_tbl; /* tssi2dbm is kmalloc()ed. */
-
- /* ACI (adjacent channel interference) flags. */
- bool aci_enable;
- bool aci_wlan_automatic;
- bool aci_hw_rssi;
-
- /* Radio switched on/off */
- bool radio_on;
- struct {
- /* Values saved when turning the radio off.
- * They are needed when turning it on again. */
- bool valid;
- u16 rfover;
- u16 rfoverval;
- } radio_off_context;
-
- u16 minlowsig[2];
- u16 minlowsigpos[2];
-
- /* TSSI to dBm table in use */
- const s8 *tssi2dbm;
- /* Target idle TSSI */
- int tgt_idle_tssi;
- /* Current idle TSSI */
- int cur_idle_tssi;
-
- /* LocalOscillator control values. */
- struct b43_txpower_lo_control *lo_control;
- /* Values from b43_calc_loopback_gain() */
- s16 max_lb_gain; /* Maximum Loopback gain in hdB */
- s16 trsw_rx_gain; /* TRSW RX gain in hdB */
- s16 lna_lod_gain; /* LNA lod */
- s16 lna_gain; /* LNA */
- s16 pga_gain; /* PGA */
-
- /* Desired TX power level (in dBm).
- * This is set by the user and adjusted in b43_phy_xmitpower(). */
- u8 power_level;
- /* A-PHY TX Power control value. */
- u16 txpwr_offset;
-
- /* Current TX power level attenuation control values */
- struct b43_bbatt bbatt;
- struct b43_rfatt rfatt;
- u8 tx_control; /* B43_TXCTL_XXX */
-
- /* Hardware Power Control enabled? */
- bool hardware_power_control;
-
- /* Current Interference Mitigation mode */
- int interfmode;
- /* Stack of saved values from the Interference Mitigation code.
- * Each value in the stack is layed out as follows:
- * bit 0-11: offset
- * bit 12-15: register ID
- * bit 16-32: value
- * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
- */
-#define B43_INTERFSTACK_SIZE 26
- u32 interfstack[B43_INTERFSTACK_SIZE]; //FIXME: use a data structure
-
- /* Saved values from the NRSSI Slope calculation */
- s16 nrssi[2];
- s32 nrssislope;
- /* In memory nrssi lookup table. */
- s8 nrssi_lt[64];
-
- /* current channel */
- u8 channel;
-
- u16 lofcal;
-
- u16 initval; //FIXME rename?
-
- /* PHY TX errors counter. */
- atomic_t txerr_cnt;
-
- /* The device does address auto increment for the OFDM tables.
- * We cache the previously used address here and omit the address
- * write on the next table access, if possible. */
- u16 ofdmtab_addr; /* The address currently set in hardware. */
- enum { /* The last data flow direction. */
- B43_OFDMTAB_DIRECTION_UNKNOWN = 0,
- B43_OFDMTAB_DIRECTION_READ,
- B43_OFDMTAB_DIRECTION_WRITE,
- } ofdmtab_addr_direction;
-
-#if B43_DEBUG
- /* Manual TX-power control enabled? */
- bool manual_txpower_control;
- /* PHY registers locked by b43_phy_lock()? */
- bool phy_locked;
-#endif /* B43_DEBUG */
-};
-
-/* Data structures for DMA transmission, per 80211 core. */
-struct b43_dma {
- struct b43_dmaring *tx_ring_AC_BK; /* Background */
- struct b43_dmaring *tx_ring_AC_BE; /* Best Effort */
- struct b43_dmaring *tx_ring_AC_VI; /* Video */
- struct b43_dmaring *tx_ring_AC_VO; /* Voice */
- struct b43_dmaring *tx_ring_mcast; /* Multicast */
-
- struct b43_dmaring *rx_ring;
-};
-
-struct b43_pio_txqueue;
-struct b43_pio_rxqueue;
-
-/* Data structures for PIO transmission, per 80211 core. */
-struct b43_pio {
- struct b43_pio_txqueue *tx_queue_AC_BK; /* Background */
- struct b43_pio_txqueue *tx_queue_AC_BE; /* Best Effort */
- struct b43_pio_txqueue *tx_queue_AC_VI; /* Video */
- struct b43_pio_txqueue *tx_queue_AC_VO; /* Voice */
- struct b43_pio_txqueue *tx_queue_mcast; /* Multicast */
-
- struct b43_pio_rxqueue *rx_queue;
-};
-
-/* Context information for a noise calculation (Link Quality). */
-struct b43_noise_calculation {
- u8 channel_at_start;
- bool calculation_running;
- u8 nr_samples;
- s8 samples[8][4];
-};
-
-struct b43_stats {
- u8 link_noise;
- /* Store the last TX/RX times here for updating the leds. */
- unsigned long last_tx;
- unsigned long last_rx;
-};
-
-struct b43_key {
- /* If keyconf is NULL, this key is disabled.
- * keyconf is a cookie. Don't derefenrence it outside of the set_key
- * path, because b43 doesn't own it. */
- struct ieee80211_key_conf *keyconf;
- u8 algorithm;
-};
-
-/* SHM offsets to the QOS data structures for the 4 different queues. */
-#define B43_QOS_PARAMS(queue) (B43_SHM_SH_EDCFQ + \
- (B43_NR_QOSPARAMS * sizeof(u16) * (queue)))
-#define B43_QOS_BACKGROUND B43_QOS_PARAMS(0)
-#define B43_QOS_BESTEFFORT B43_QOS_PARAMS(1)
-#define B43_QOS_VIDEO B43_QOS_PARAMS(2)
-#define B43_QOS_VOICE B43_QOS_PARAMS(3)
-
-/* QOS parameter hardware data structure offsets. */
-#define B43_NR_QOSPARAMS 22
-enum {
- B43_QOSPARAM_TXOP = 0,
- B43_QOSPARAM_CWMIN,
- B43_QOSPARAM_CWMAX,
- B43_QOSPARAM_CWCUR,
- B43_QOSPARAM_AIFS,
- B43_QOSPARAM_BSLOTS,
- B43_QOSPARAM_REGGAP,
- B43_QOSPARAM_STATUS,
-};
-
-/* QOS parameters for a queue. */
-struct b43_qos_params {
- /* The QOS parameters */
- struct ieee80211_tx_queue_params p;
- /* Does this need to get uploaded to hardware? */
- bool need_hw_update;
-};
-
-struct b43_wldev;
-
-/* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */
-struct b43_wl {
- /* Pointer to the active wireless device on this chip */
- struct b43_wldev *current_dev;
- /* Pointer to the ieee80211 hardware data structure */
- struct ieee80211_hw *hw;
-
- struct mutex mutex;
- spinlock_t irq_lock;
- /* R/W lock for data transmission.
- * Transmissions on 2+ queues can run concurrently, but somebody else
- * might sync with TX by write_lock_irqsave()'ing. */
- rwlock_t tx_lock;
- /* Lock for LEDs access. */
- spinlock_t leds_lock;
- /* Lock for SHM access. */
- spinlock_t shm_lock;
-
- /* We can only have one operating interface (802.11 core)
- * at a time. General information about this interface follows.
- */
-
- struct ieee80211_vif *vif;
- /* The MAC address of the operating interface. */
- u8 mac_addr[ETH_ALEN];
- /* Current BSSID */
- u8 bssid[ETH_ALEN];
- /* Interface type. (IEEE80211_IF_TYPE_XXX) */
- int if_type;
- /* Is the card operating in AP, STA or IBSS mode? */
- bool operating;
- /* filter flags */
- unsigned int filter_flags;
- /* Stats about the wireless interface */
- struct ieee80211_low_level_stats ieee_stats;
-
- struct hwrng rng;
- u8 rng_initialized;
- char rng_name[30 + 1];
-
- /* The RF-kill button */
- struct b43_rfkill rfkill;
-
- /* List of all wireless devices on this chip */
- struct list_head devlist;
- u8 nr_devs;
-
- bool radiotap_enabled;
-
- /* The beacon we are currently using (AP or IBSS mode).
- * This beacon stuff is protected by the irq_lock. */
- struct sk_buff *current_beacon;
- bool beacon0_uploaded;
- bool beacon1_uploaded;
- struct work_struct beacon_update_trigger;
-
- /* The current QOS parameters for the 4 queues.
- * This is protected by the irq_lock. */
- struct b43_qos_params qos_params[4];
- /* Workqueue for updating QOS parameters in hardware. */
- struct work_struct qos_update_work;
-};
-
-/* In-memory representation of a cached microcode file. */
-struct b43_firmware_file {
- const char *filename;
- const struct firmware *data;
-};
-
-/* Pointers to the firmware data and meta information about it. */
-struct b43_firmware {
- /* Microcode */
- struct b43_firmware_file ucode;
- /* PCM code */
- struct b43_firmware_file pcm;
- /* Initial MMIO values for the firmware */
- struct b43_firmware_file initvals;
- /* Initial MMIO values for the firmware, band-specific */
- struct b43_firmware_file initvals_band;
-
- /* Firmware revision */
- u16 rev;
- /* Firmware patchlevel */
- u16 patch;
-
- /* Set to true, if we are using an opensource firmware. */
- bool opensource;
- /* Set to true, if the core needs a PCM firmware, but
- * we failed to load one. This is always false for
- * core rev > 10, as these don't need PCM firmware. */
- bool pcm_request_failed;
-};
-
-/* Device (802.11 core) initialization status. */
-enum {
- B43_STAT_UNINIT = 0, /* Uninitialized. */
- B43_STAT_INITIALIZED = 1, /* Initialized, but not started, yet. */
- B43_STAT_STARTED = 2, /* Up and running. */
-};
-#define b43_status(wldev) atomic_read(&(wldev)->__init_status)
-#define b43_set_status(wldev, stat) do { \
- atomic_set(&(wldev)->__init_status, (stat)); \
- smp_wmb(); \
- } while (0)
-
-/* XXX--- HOW LOCKING WORKS IN B43 ---XXX
- *
- * You should always acquire both, wl->mutex and wl->irq_lock unless:
- * - You don't need to acquire wl->irq_lock, if the interface is stopped.
- * - You don't need to acquire wl->mutex in the IRQ handler, IRQ tasklet
- * and packet TX path (and _ONLY_ there.)
- */
-
-/* Data structure for one wireless device (802.11 core) */
-struct b43_wldev {
- struct ssb_device *dev;
- struct b43_wl *wl;
-
- /* The device initialization status.
- * Use b43_status() to query. */
- atomic_t __init_status;
- /* Saved init status for handling suspend. */
- int suspend_init_status;
-
- bool bad_frames_preempt; /* Use "Bad Frames Preemption" (default off) */
- bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM) */
- bool short_slot; /* TRUE, if short slot timing is enabled. */
- bool radio_hw_enable; /* saved state of radio hardware enabled state */
- bool suspend_in_progress; /* TRUE, if we are in a suspend/resume cycle */
-
- /* PHY/Radio device. */
- struct b43_phy phy;
-
- union {
- /* DMA engines. */
- struct b43_dma dma;
- /* PIO engines. */
- struct b43_pio pio;
- };
- /* Use b43_using_pio_transfers() to check whether we are using
- * DMA or PIO data transfers. */
- bool __using_pio_transfers;
-
- /* Various statistics about the physical device. */
- struct b43_stats stats;
-
- /* The device LEDs. */
- struct b43_led led_tx;
- struct b43_led led_rx;
- struct b43_led led_assoc;
- struct b43_led led_radio;
-
- /* Reason code of the last interrupt. */
- u32 irq_reason;
- u32 dma_reason[6];
- /* saved irq enable/disable state bitfield. */
- u32 irq_savedstate;
- /* Link Quality calculation context. */
- struct b43_noise_calculation noisecalc;
- /* if > 0 MAC is suspended. if == 0 MAC is enabled. */
- int mac_suspended;
-
- /* Interrupt Service Routine tasklet (bottom-half) */
- struct tasklet_struct isr_tasklet;
-
- /* Periodic tasks */
- struct delayed_work periodic_work;
- unsigned int periodic_state;
-
- struct work_struct restart_work;
-
- /* encryption/decryption */
- u16 ktp; /* Key table pointer */
- u8 max_nr_keys;
- struct b43_key key[58];
-
- /* Firmware data */
- struct b43_firmware fw;
-
- /* Devicelist in struct b43_wl (all 802.11 cores) */
- struct list_head list;
-
- /* Debugging stuff follows. */
-#ifdef CONFIG_B43_DEBUG
- struct b43_dfsentry *dfsentry;
-#endif
-};
-
-static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw)
-{
- return hw->priv;
-}
-
-static inline struct b43_wldev *dev_to_b43_wldev(struct device *dev)
-{
- struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
- return ssb_get_drvdata(ssb_dev);
-}
-
-/* Is the device operating in a specified mode (IEEE80211_IF_TYPE_XXX). */
-static inline int b43_is_mode(struct b43_wl *wl, int type)
-{
- return (wl->operating && wl->if_type == type);
-}
-
-static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
-{
- return ssb_read16(dev->dev, offset);
-}
-
-static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
-{
- ssb_write16(dev->dev, offset, value);
-}
-
-static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
-{
- return ssb_read32(dev->dev, offset);
-}
-
-static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
-{
- ssb_write32(dev->dev, offset, value);
-}
-
-static inline bool b43_using_pio_transfers(struct b43_wldev *dev)
-{
-#ifdef CONFIG_B43_PIO
- return dev->__using_pio_transfers;
-#else
- return 0;
-#endif
-}
-
-#ifdef CONFIG_B43_FORCE_PIO
-# define B43_FORCE_PIO 1
-#else
-# define B43_FORCE_PIO 0
-#endif
-
-
-/* Message printing */
-void b43info(struct b43_wl *wl, const char *fmt, ...)
- __attribute__ ((format(printf, 2, 3)));
-void b43err(struct b43_wl *wl, const char *fmt, ...)
- __attribute__ ((format(printf, 2, 3)));
-void b43warn(struct b43_wl *wl, const char *fmt, ...)
- __attribute__ ((format(printf, 2, 3)));
-#if B43_DEBUG
-void b43dbg(struct b43_wl *wl, const char *fmt, ...)
- __attribute__ ((format(printf, 2, 3)));
-#else /* DEBUG */
-# define b43dbg(wl, fmt...) do { /* nothing */ } while (0)
-#endif /* DEBUG */
-
-/* A WARN_ON variant that vanishes when b43 debugging is disabled.
- * This _also_ evaluates the arg with debugging disabled. */
-#if B43_DEBUG
-# define B43_WARN_ON(x) WARN_ON(x)
-#else
-static inline bool __b43_warn_on_dummy(bool x) { return x; }
-# define B43_WARN_ON(x) __b43_warn_on_dummy(unlikely(!!(x)))
-#endif
-
-/* Convert an integer to a Q5.2 value */
-#define INT_TO_Q52(i) ((i) << 2)
-/* Convert a Q5.2 value to an integer (precision loss!) */
-#define Q52_TO_INT(q52) ((q52) >> 2)
-/* Macros for printing a value in Q5.2 format */
-#define Q52_FMT "%u.%u"
-#define Q52_ARG(q52) Q52_TO_INT(q52), ((((q52) & 0x3) * 100) / 4)
-
-#endif /* B43_H_ */
-/*
-
- Broadcom B43 wireless driver
-
- debugfs driver debugging code
-
- Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING. If not, write to
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
- Boston, MA 02110-1301, USA.
-
-*/
-
-#include <linux/fs.h>
-#include <linux/debugfs.h>
-#include <linux/slab.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/mutex.h>
-
-#include "b43.h"
-#include "main.h"
-#include "debugfs.h"
-#include "dma.h"
-#include "xmit.h"
-
-
-/* The root directory. */
-static struct dentry *rootdir;
-
-struct b43_debugfs_fops {
- ssize_t (*read)(struct b43_wldev *dev, char *buf, size_t bufsize);
- int (*write)(struct b43_wldev *dev, const char *buf, size_t count);
- struct file_operations fops;
- /* Offset of struct b43_dfs_file in struct b43_dfsentry */
- size_t file_struct_offset;
- /* Take wl->irq_lock before calling read/write? */
- bool take_irqlock;
-};
-
-static inline
-struct b43_dfs_file * fops_to_dfs_file(struct b43_wldev *dev,
- const struct b43_debugfs_fops *dfops)
-{
- void *p;
-
- p = dev->dfsentry;
- p += dfops->file_struct_offset;
-
- return p;
-}
-
-
-#define fappend(fmt, x...) \
- do { \
- if (bufsize - count) \
- count += snprintf(buf + count, \
- bufsize - count, \
- fmt , ##x); \
- else \
- printk(KERN_ERR "b43: fappend overflow\n"); \
- } while (0)
-
-
-/* wl->irq_lock is locked */
-static ssize_t tsf_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- ssize_t count = 0;
- u64 tsf;
-
- b43_tsf_read(dev, &tsf);
- fappend("0x%08x%08x\n",
- (unsigned int)((tsf & 0xFFFFFFFF00000000ULL) >> 32),
- (unsigned int)(tsf & 0xFFFFFFFFULL));
-
- return count;
-}
-
-/* wl->irq_lock is locked */
-static int tsf_write_file(struct b43_wldev *dev,
- const char *buf, size_t count)
-{
- u64 tsf;
-
- if (sscanf(buf, "%llu", (unsigned long long *)(&tsf)) != 1)
- return -EINVAL;
- b43_tsf_write(dev, tsf);
-
- return 0;
-}
-
-/* wl->irq_lock is locked */
-static ssize_t ucode_regs_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- ssize_t count = 0;
- int i;
-
- for (i = 0; i < 64; i++) {
- fappend("r%d = 0x%04x\n", i,
- b43_shm_read16(dev, B43_SHM_SCRATCH, i));
- }
-
- return count;
-}
-
-/* wl->irq_lock is locked */
-static ssize_t shm_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- ssize_t count = 0;
- int i;
- u16 tmp;
- __le16 *le16buf = (__le16 *)buf;
-
- for (i = 0; i < 0x1000; i++) {
- if (bufsize < sizeof(tmp))
- break;
- tmp = b43_shm_read16(dev, B43_SHM_SHARED, 2 * i);
- le16buf[i] = cpu_to_le16(tmp);
- count += sizeof(tmp);
- bufsize -= sizeof(tmp);
- }
-
- return count;
-}
-
-static ssize_t txstat_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- struct b43_txstatus_log *log = &dev->dfsentry->txstatlog;
- ssize_t count = 0;
- unsigned long flags;
- int i, idx;
- struct b43_txstatus *stat;
-
- spin_lock_irqsave(&log->lock, flags);
- if (log->end < 0) {
- fappend("Nothing transmitted, yet\n");
- goto out_unlock;
- }
- fappend("b43 TX status reports:\n\n"
- "index | cookie | seq | phy_stat | frame_count | "
- "rts_count | supp_reason | pm_indicated | "
- "intermediate | for_ampdu | acked\n" "---\n");
- i = log->end + 1;
- idx = 0;
- while (1) {
- if (i == B43_NR_LOGGED_TXSTATUS)
- i = 0;
- stat = &(log->log[i]);
- if (stat->cookie) {
- fappend("%03d | "
- "0x%04X | 0x%04X | 0x%02X | "
- "0x%X | 0x%X | "
- "%u | %u | "
- "%u | %u | %u\n",
- idx,
- stat->cookie, stat->seq, stat->phy_stat,
- stat->frame_count, stat->rts_count,
- stat->supp_reason, stat->pm_indicated,
- stat->intermediate, stat->for_ampdu,
- stat->acked);
- idx++;
- }
- if (i == log->end)
- break;
- i++;
- }
-out_unlock:
- spin_unlock_irqrestore(&log->lock, flags);
-
- return count;
-}
-
-static ssize_t txpower_g_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- ssize_t count = 0;
-
- if (dev->phy.type != B43_PHYTYPE_G) {
- fappend("Device is not a G-PHY\n");
- goto out;
- }
- fappend("Control: %s\n", dev->phy.manual_txpower_control ?
- "MANUAL" : "AUTOMATIC");
- fappend("Baseband attenuation: %u\n", dev->phy.bbatt.att);
- fappend("Radio attenuation: %u\n", dev->phy.rfatt.att);
- fappend("TX Mixer Gain: %s\n",
- (dev->phy.tx_control & B43_TXCTL_TXMIX) ? "ON" : "OFF");
- fappend("PA Gain 2dB: %s\n",
- (dev->phy.tx_control & B43_TXCTL_PA2DB) ? "ON" : "OFF");
- fappend("PA Gain 3dB: %s\n",
- (dev->phy.tx_control & B43_TXCTL_PA3DB) ? "ON" : "OFF");
- fappend("\n\n");
- fappend("You can write to this file:\n");
- fappend("Writing \"auto\" enables automatic txpower control.\n");
- fappend
- ("Writing the attenuation values as \"bbatt rfatt txmix pa2db pa3db\" "
- "enables manual txpower control.\n");
- fappend("Example: 5 4 0 0 1\n");
- fappend("Enables manual control with Baseband attenuation 5, "
- "Radio attenuation 4, No TX Mixer Gain, "
- "No PA Gain 2dB, With PA Gain 3dB.\n");
-out:
- return count;
-}
-
-static int txpower_g_write_file(struct b43_wldev *dev,
- const char *buf, size_t count)
-{
- if (dev->phy.type != B43_PHYTYPE_G)
- return -ENODEV;
- if ((count >= 4) && (memcmp(buf, "auto", 4) == 0)) {
- /* Automatic control */
- dev->phy.manual_txpower_control = 0;
- b43_phy_xmitpower(dev);
- } else {
- int bbatt = 0, rfatt = 0, txmix = 0, pa2db = 0, pa3db = 0;
- /* Manual control */
- if (sscanf(buf, "%d %d %d %d %d", &bbatt, &rfatt,
- &txmix, &pa2db, &pa3db) != 5)
- return -EINVAL;
- b43_put_attenuation_into_ranges(dev, &bbatt, &rfatt);
- dev->phy.manual_txpower_control = 1;
- dev->phy.bbatt.att = bbatt;
- dev->phy.rfatt.att = rfatt;
- dev->phy.tx_control = 0;
- if (txmix)
- dev->phy.tx_control |= B43_TXCTL_TXMIX;
- if (pa2db)
- dev->phy.tx_control |= B43_TXCTL_PA2DB;
- if (pa3db)
- dev->phy.tx_control |= B43_TXCTL_PA3DB;
- b43_phy_lock(dev);
- b43_radio_lock(dev);
- b43_set_txpower_g(dev, &dev->phy.bbatt,
- &dev->phy.rfatt, dev->phy.tx_control);
- b43_radio_unlock(dev);
- b43_phy_unlock(dev);
- }
-
- return 0;
-}
-
-/* wl->irq_lock is locked */
-static int restart_write_file(struct b43_wldev *dev,
- const char *buf, size_t count)
-{
- int err = 0;
-
- if (count > 0 && buf[0] == '1') {
- b43_controller_restart(dev, "manually restarted");
- } else
- err = -EINVAL;
-
- return err;
-}
-
-static unsigned long calc_expire_secs(unsigned long now,
- unsigned long time,
- unsigned long expire)
-{
- expire = time + expire;
-
- if (time_after(now, expire))
- return 0; /* expired */
- if (expire < now) {
- /* jiffies wrapped */
- expire -= MAX_JIFFY_OFFSET;
- now -= MAX_JIFFY_OFFSET;
- }
- B43_WARN_ON(expire < now);
-
- return (expire - now) / HZ;
-}
-
-static ssize_t loctls_read_file(struct b43_wldev *dev,
- char *buf, size_t bufsize)
-{
- ssize_t count = 0;
- struct b43_txpower_lo_control *lo;
- int i, err = 0;
- struct b43_lo_calib *cal;
- unsigned long now = jiffies;
- struct b43_phy *phy = &dev->phy;
-
- if (phy->type != B43_PHYTYPE_G) {
- fappend("Device is not a G-PHY\n");
- err = -ENODEV;
- goto out;
- }
- lo = phy->lo_control;
- fappend("-- Local Oscillator calibration data --\n\n");
- fappend("HW-power-control enabled: %d\n",
- dev->phy.hardware_power_control);
- fappend("TX Bias: 0x%02X, TX Magn: 0x%02X (expire in %lu sec)\n",
- lo->tx_bias, lo->tx_magn,
- calc_expire_secs(now, lo->txctl_measured_time,
- B43_LO_TXCTL_EXPIRE));
- fappend("Power Vector: 0x%08X%08X (expires in %lu sec)\n",
- (unsigned int)((lo->power_vector & 0xFFFFFFFF00000000ULL) >> 32),
- (unsigned int)(lo->power_vector & 0x00000000FFFFFFFFULL),
- calc_expire_secs(now, lo->pwr_vec_read_time,
- B43_LO_PWRVEC_EXPIRE));
-
- fappend("\nCalibrated settings:\n");
- list_for_each_entry(cal, &lo->calib_list, list) {
- bool active;
-
- active = (b43_compare_bbatt(&cal->bbatt, &phy->bbatt) &&
- b43_compare_rfatt(&cal->rfatt, &phy->rfatt));
- fappend("BB(%d), RF(%d,%d) -> I=%d, Q=%d "
- "(expires in %lu sec)%s\n",
- cal->bbatt.att,
- cal->rfatt.att, cal->rfatt.with_padmix,
- cal->ctl.i, cal->ctl.q,
- calc_expire_secs(now, cal->calib_time,
- B43_LO_CALIB_EXPIRE),
- active ? " ACTIVE" : "");
- }
-
- fappend("\nUsed RF attenuation values: Value(WithPadmix flag)\n");
- for (i = 0; i < lo->rfatt_list.len; i++) {
- fappend("%u(%d), ",
- lo->rfatt_list.list[i].att,
- lo->rfatt_list.list[i].with_padmix);
- }
- fappend("\n");
- fappend("\nUsed Baseband attenuation values:\n");
- for (i = 0; i < lo->bbatt_list.len; i++) {
- fappend("%u, ",
- lo->bbatt_list.list[i].att);
- }
- fappend("\n");
-
-out:
- return err ? err : count;
-}
-
-#undef fappend
-
-static int b43_debugfs_open(struct inode *inode, struct file *file)
-{
- file->private_data = inode->i_private;
- return 0;
-}
-
-static ssize_t b43_debugfs_read(struct file *file, char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- struct b43_wldev *dev;
- struct b43_debugfs_fops *dfops;
- struct b43_dfs_file *dfile;
- ssize_t uninitialized_var(ret);
- char *buf;
- const size_t bufsize = 1024 * 16; /* 16 kiB buffer */
- const size_t buforder = get_order(bufsize);
- int err = 0;
-
- if (!count)
- return 0;
- dev = file->private_data;
- if (!dev)
- return -ENODEV;
-
- mutex_lock(&dev->wl->mutex);
- if (b43_status(dev) < B43_STAT_INITIALIZED) {
- err = -ENODEV;
- goto out_unlock;
- }
-
- dfops = container_of(file->f_op, struct b43_debugfs_fops, fops);
- if (!dfops->read) {
- err = -ENOSYS;
- goto out_unlock;
- }
- dfile = fops_to_dfs_file(dev, dfops);
-
- if (!dfile->buffer) {
- buf = (char *)__get_free_pages(GFP_KERNEL, buforder);
- if (!buf) {
- err = -ENOMEM;
- goto out_unlock;
- }
- memset(buf, 0, bufsize);
- if (dfops->take_irqlock) {
- spin_lock_irq(&dev->wl->irq_lock);
- ret = dfops->read(dev, buf, bufsize);
- spin_unlock_irq(&dev->wl->irq_lock);
- } else
- ret = dfops->read(dev, buf, bufsize);
- if (ret <= 0) {
- free_pages((unsigned long)buf, buforder);
- err = ret;
- goto out_unlock;
- }
- dfile->data_len = ret;
- dfile->buffer = buf;
- }
-
- ret = simple_read_from_buffer(userbuf, count, ppos,
- dfile->buffer,
- dfile->data_len);
- if (*ppos >= dfile->data_len) {
- free_pages((unsigned long)dfile->buffer, buforder);
- dfile->buffer = NULL;
- dfile->data_len = 0;
- }
-out_unlock:
- mutex_unlock(&dev->wl->mutex);
-
- return err ? err : ret;
-}
-
-static ssize_t b43_debugfs_write(struct file *file,
- const char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- struct b43_wldev *dev;
- struct b43_debugfs_fops *dfops;
- char *buf;
- int err = 0;
-
- if (!count)
- return 0;
- if (count > PAGE_SIZE)
- return -E2BIG;
- dev = file->private_data;
- if (!dev)
- return -ENODEV;
-
- mutex_lock(&dev->wl->mutex);
- if (b43_status(dev) < B43_STAT_INITIALIZED) {
- err = -ENODEV;
- goto out_unlock;
- }
-
- dfops = container_of(file->f_op, struct b43_debugfs_fops, fops);
- if (!dfops->write) {
- err = -ENOSYS;
- goto out_unlock;
- }
-
- buf = (char *)get_zeroed_page(GFP_KERNEL);
- if (!buf) {
- err = -ENOMEM;
- goto out_unlock;
- }
- if (copy_from_user(buf, userbuf, count)) {
- err = -EFAULT;
- goto out_freepage;
- }
- if (dfops->take_irqlock) {
- spin_lock_irq(&dev->wl->irq_lock);
- err = dfops->write(dev, buf, count);
- spin_unlock_irq(&dev->wl->irq_lock);
- } else
- err = dfops->write(dev, buf, count);
- if (err)
- goto out_freepage;
-
-out_freepage:
- free_page((unsigned long)buf);
-out_unlock:
- mutex_unlock(&dev->wl->mutex);
-
- return err ? err : count;
-}
-
-
-#define B43_DEBUGFS_FOPS(name, _read, _write, _take_irqlock) \
- static struct b43_debugfs_fops fops_##name = { \
- .read = _read, \
- .write = _write, \
- .fops = { \
- .open = b43_debugfs_open, \
- .read = b43_debugfs_read, \
- .write = b43_debugfs_write, \
- }, \
- .file_struct_offset = offsetof(struct b43_dfsentry, \
- file_##name), \
- .take_irqlock = _take_irqlock, \
- }
-
-B43_DEBUGFS_FOPS(tsf, tsf_read_file, tsf_write_file, 1);
-B43_DEBUGFS_FOPS(ucode_regs, ucode_regs_read_file, NULL, 1);
-B43_DEBUGFS_FOPS(shm, shm_read_file, NULL, 1);
-B43_DEBUGFS_FOPS(txstat, txstat_read_file, NULL, 0);
-B43_DEBUGFS_FOPS(txpower_g, txpower_g_read_file, txpower_g_write_file, 0);
-B43_DEBUGFS_FOPS(restart, NULL, restart_write_file, 1);
-B43_DEBUGFS_FOPS(loctls, loctls_read_file, NULL, 0);
-
-
-int b43_debug(struct b43_wldev *dev, enum b43_dyndbg feature)
-{
- return !!(dev->dfsentry && dev->dfsentry->dyn_debug[feature]);
-}
-
-static void b43_remove_dynamic_debug(struct b43_wldev *dev)
-{
- struct b43_dfsentry *e = dev->dfsentry;
- int i;
-
- for (i = 0; i < __B43_NR_DYNDBG; i++)
- debugfs_remove(e->dyn_debug_dentries[i]);
-}
-
-static void b43_add_dynamic_debug(struct b43_wldev *dev)
-{
- struct b43_dfsentry *e = dev->dfsentry;
- struct dentry *d;
-
-#define add_dyn_dbg(name, id, initstate) do { \
- e->dyn_debug[id] = (initstate); \
- d = debugfs_create_bool(name, 0600, e->subdir, \
- &(e->dyn_debug[id])); \
- if (!IS_ERR(d)) \
- e->dyn_debug_dentries[id] = d; \
- } while (0)
-
- add_dyn_dbg("debug_xmitpower", B43_DBG_XMITPOWER, 0);
- add_dyn_dbg("debug_dmaoverflow", B43_DBG_DMAOVERFLOW, 0);
- add_dyn_dbg("debug_dmaverbose", B43_DBG_DMAVERBOSE, 0);
- add_dyn_dbg("debug_pwork_fast", B43_DBG_PWORK_FAST, 0);
- add_dyn_dbg("debug_pwork_stop", B43_DBG_PWORK_STOP, 0);
- add_dyn_dbg("debug_lo", B43_DBG_LO, 0);
-
-#undef add_dyn_dbg
-}
-
-void b43_debugfs_add_device(struct b43_wldev *dev)
-{
- struct b43_dfsentry *e;
- struct b43_txstatus_log *log;
- char devdir[16];
-
- B43_WARN_ON(!dev);
- e = kzalloc(sizeof(*e), GFP_KERNEL);
- if (!e) {
- b43err(dev->wl, "debugfs: add device OOM\n");
- return;
- }
- e->dev = dev;
- log = &e->txstatlog;
- log->log = kcalloc(B43_NR_LOGGED_TXSTATUS,
- sizeof(struct b43_txstatus), GFP_KERNEL);
- if (!log->log) {
- b43err(dev->wl, "debugfs: add device txstatus OOM\n");
- kfree(e);
- return;
- }
- log->end = -1;
- spin_lock_init(&log->lock);
-
- dev->dfsentry = e;
-
- snprintf(devdir, sizeof(devdir), "%s", wiphy_name(dev->wl->hw->wiphy));
- e->subdir = debugfs_create_dir(devdir, rootdir);
- if (!e->subdir || IS_ERR(e->subdir)) {
- if (e->subdir == ERR_PTR(-ENODEV)) {
- b43dbg(dev->wl, "DebugFS (CONFIG_DEBUG_FS) not "
- "enabled in kernel config\n");
- } else {
- b43err(dev->wl, "debugfs: cannot create %s directory\n",
- devdir);
- }
- dev->dfsentry = NULL;
- kfree(log->log);
- kfree(e);
- return;
- }
-
-#define ADD_FILE(name, mode) \
- do { \
- struct dentry *d; \
- d = debugfs_create_file(__stringify(name), \
- mode, e->subdir, dev, \
- &fops_##name.fops); \
- e->file_##name.dentry = NULL; \
- if (!IS_ERR(d)) \
- e->file_##name.dentry = d; \
- } while (0)
-
-
- ADD_FILE(tsf, 0600);
- ADD_FILE(ucode_regs, 0400);
- ADD_FILE(shm, 0400);
- ADD_FILE(txstat, 0400);
- ADD_FILE(txpower_g, 0600);
- ADD_FILE(restart, 0200);
- ADD_FILE(loctls, 0400);
-
-#undef ADD_FILE
-
- b43_add_dynamic_debug(dev);
-}
-
-void b43_debugfs_remove_device(struct b43_wldev *dev)
-{
- struct b43_dfsentry *e;
-
- if (!dev)
- return;
- e = dev->dfsentry;
- if (!e)
- return;
- b43_remove_dynamic_debug(dev);
-
- debugfs_remove(e->file_tsf.dentry);
- debugfs_remove(e->file_ucode_regs.dentry);
- debugfs_remove(e->file_shm.dentry);
- debugfs_remove(e->file_txstat.dentry);
- debugfs_remove(e->file_txpower_g.dentry);
- debugfs_remove(e->file_restart.dentry);
- debugfs_remove(e->file_loctls.dentry);
-
- debugfs_remove(e->subdir);
- kfree(e->txstatlog.log);
- kfree(e);
-}
-
-/* Called with IRQs disabled. */
-void b43_debugfs_log_txstat(struct b43_wldev *dev,
- const struct b43_txstatus *status)
-{
- struct b43_dfsentry *e = dev->dfsentry;
- struct b43_txstatus_log *log;
- struct b43_txstatus *cur;
- int i;
-
- if (!e)
- return;
- log = &e->txstatlog;
- spin_lock(&log->lock); /* IRQs are already disabled. */
- i = log->end + 1;
- if (i == B43_NR_LOGGED_TXSTATUS)
- i = 0;
- log->end = i;
- cur = &(log->log[i]);
- memcpy(cur, status, sizeof(*cur));
- spin_unlock(&log->lock);
-}
-
-void b43_debugfs_init(void)
-{
- rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
- if (IS_ERR(rootdir))
- rootdir = NULL;
-}
-
-void b43_debugfs_exit(void)
-{
- debugfs_remove(rootdir);
-}
-#ifndef B43_DEBUGFS_H_
-#define B43_DEBUGFS_H_
-
-struct b43_wldev;
-struct b43_txstatus;
-
-enum b43_dyndbg { /* Dynamic debugging features */
- B43_DBG_XMITPOWER,
- B43_DBG_DMAOVERFLOW,
- B43_DBG_DMAVERBOSE,
- B43_DBG_PWORK_FAST,
- B43_DBG_PWORK_STOP,
- B43_DBG_LO,
- __B43_NR_DYNDBG,
-};
-
-#ifdef CONFIG_B43_DEBUG
-
-struct dentry;
-
-#define B43_NR_LOGGED_TXSTATUS 100
-
-struct b43_txstatus_log {
- struct b43_txstatus *log;
- int end;
- spinlock_t lock;
-};
-
-struct b43_dfs_file {
- struct dentry *dentry;
- char *buffer;
- size_t data_len;
-};
-
-struct b43_dfsentry {
- struct b43_wldev *dev;
- struct dentry *subdir;
-
- struct b43_dfs_file file_tsf;
- struct b43_dfs_file file_ucode_regs;
- struct b43_dfs_file file_shm;
- struct b43_dfs_file file_txstat;
- struct b43_dfs_file file_txpower_g;
- struct b43_dfs_file file_restart;
- struct b43_dfs_file file_loctls;
-
- struct b43_txstatus_log txstatlog;
-
- /* Enabled/Disabled list for the dynamic debugging features. */
- u32 dyn_debug[__B43_NR_DYNDBG];
- /* Dentries for the dynamic debugging entries. */
- struct dentry *dyn_debug_dentries[__B43_NR_DYNDBG];
-};
-
-int b43_debug(struct b43_wldev *dev, enum b43_dyndbg feature);
-
-void b43_debugfs_init(void);
-void b43_debugfs_exit(void);
-void b43_debugfs_add_device(struct b43_wldev *dev);
-void b43_debugfs_remove_device(struct b43_wldev *dev);
-void b43_debugfs_log_txstat(struct b43_wldev *dev,
- const struct b43_txstatus *status);
-
-#else /* CONFIG_B43_DEBUG */
-
-static inline int b43_debug(struct b43_wldev *dev, enum b43_dyndbg feature)
-{
- return 0;
-}
-
-static inline void b43_debugfs_init(void)
-{
-}
-static inline void b43_debugfs_exit(void)
-{
-}
-static inline void b43_debugfs_add_device(struct b43_wldev *dev)
-{
-}
-static inline void b43_debugfs_remove_device(struct b43_wldev *dev)
-{
-}
-static inline void b43_debugfs_log_txstat(struct b43_wldev *dev,
- const struct b43_txstatus *status)
-{
-}
-
-#endif /* CONFIG_B43_DEBUG */
-
-#endif /* B43_DEBUGFS_H_ */
-/*
-
- Broadcom B43 wireless driver
-
- DMA ringbuffer and descriptor allocation/management
-
- Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
-
- Some code in this file is derived from the b44.c driver
- Copyright (C) 2002 David S. Miller
- Copyright (C) Pekka Pietikainen
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING. If not, write to
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
- Boston, MA 02110-1301, USA.
-
-*/
-
-#include "b43.h"
-#include "dma.h"
-#include "main.h"
-#include "debugfs.h"
-#include "xmit.h"
-
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/skbuff.h>
-#include <linux/etherdevice.h>
-#include <asm/div64.h>
-
-
-/* 32bit DMA ops. */
-static
-struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring,
- int slot,
- struct b43_dmadesc_meta **meta)
-{
- struct b43_dmadesc32 *desc;
-
- *meta = &(ring->meta[slot]);
- desc = ring->descbase;
- desc = &(desc[slot]);
-
- return (struct b43_dmadesc_generic *)desc;
-}
-
-static void op32_fill_descriptor(struct b43_dmaring *ring,
- struct b43_dmadesc_generic *desc,
- dma_addr_t dmaaddr, u16 bufsize,
- int start, int end, int irq)
-{
- struct b43_dmadesc32 *descbase = ring->descbase;
- int slot;
- u32 ctl;
- u32 addr;
- u32 addrext;
-
- slot = (int)(&(desc->dma32) - descbase);
- B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots));
-
- addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK);
- addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- addr |= ssb_dma_translation(ring->dev->dev);
- ctl = (bufsize - ring->frameoffset)
- & B43_DMA32_DCTL_BYTECNT;
- if (slot == ring->nr_slots - 1)
- ctl |= B43_DMA32_DCTL_DTABLEEND;
- if (start)
- ctl |= B43_DMA32_DCTL_FRAMESTART;
- if (end)
- ctl |= B43_DMA32_DCTL_FRAMEEND;
- if (irq)
- ctl |= B43_DMA32_DCTL_IRQ;
- ctl |= (addrext << B43_DMA32_DCTL_ADDREXT_SHIFT)
- & B43_DMA32_DCTL_ADDREXT_MASK;
-
- desc->dma32.control = cpu_to_le32(ctl);
- desc->dma32.address = cpu_to_le32(addr);
-}
-
-static void op32_poke_tx(struct b43_dmaring *ring, int slot)
-{
- b43_dma_write(ring, B43_DMA32_TXINDEX,
- (u32) (slot * sizeof(struct b43_dmadesc32)));
-}
-
-static void op32_tx_suspend(struct b43_dmaring *ring)
-{
- b43_dma_write(ring, B43_DMA32_TXCTL, b43_dma_read(ring, B43_DMA32_TXCTL)
- | B43_DMA32_TXSUSPEND);
-}
-
-static void op32_tx_resume(struct b43_dmaring *ring)
-{
- b43_dma_write(ring, B43_DMA32_TXCTL, b43_dma_read(ring, B43_DMA32_TXCTL)
- & ~B43_DMA32_TXSUSPEND);
-}
-
-static int op32_get_current_rxslot(struct b43_dmaring *ring)
-{
- u32 val;
-
- val = b43_dma_read(ring, B43_DMA32_RXSTATUS);
- val &= B43_DMA32_RXDPTR;
-
- return (val / sizeof(struct b43_dmadesc32));
-}
-
-static void op32_set_current_rxslot(struct b43_dmaring *ring, int slot)
-{
- b43_dma_write(ring, B43_DMA32_RXINDEX,
- (u32) (slot * sizeof(struct b43_dmadesc32)));
-}
-
-static const struct b43_dma_ops dma32_ops = {
- .idx2desc = op32_idx2desc,
- .fill_descriptor = op32_fill_descriptor,
- .poke_tx = op32_poke_tx,
- .tx_suspend = op32_tx_suspend,
- .tx_resume = op32_tx_resume,
- .get_current_rxslot = op32_get_current_rxslot,
- .set_current_rxslot = op32_set_current_rxslot,
-};
-
-/* 64bit DMA ops. */
-static
-struct b43_dmadesc_generic *op64_idx2desc(struct b43_dmaring *ring,
- int slot,
- struct b43_dmadesc_meta **meta)
-{
- struct b43_dmadesc64 *desc;
-
- *meta = &(ring->meta[slot]);
- desc = ring->descbase;
- desc = &(desc[slot]);
-
- return (struct b43_dmadesc_generic *)desc;
-}
-
-static void op64_fill_descriptor(struct b43_dmaring *ring,
- struct b43_dmadesc_generic *desc,
- dma_addr_t dmaaddr, u16 bufsize,
- int start, int end, int irq)
-{
- struct b43_dmadesc64 *descbase = ring->descbase;
- int slot;
- u32 ctl0 = 0, ctl1 = 0;
- u32 addrlo, addrhi;
- u32 addrext;
-
- slot = (int)(&(desc->dma64) - descbase);
- B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots));
-
- addrlo = (u32) (dmaaddr & 0xFFFFFFFF);
- addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
- addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- addrhi |= (ssb_dma_translation(ring->dev->dev) << 1);
- if (slot == ring->nr_slots - 1)
- ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
- if (start)
- ctl0 |= B43_DMA64_DCTL0_FRAMESTART;
- if (end)
- ctl0 |= B43_DMA64_DCTL0_FRAMEEND;
- if (irq)
- ctl0 |= B43_DMA64_DCTL0_IRQ;
- ctl1 |= (bufsize - ring->frameoffset)
- & B43_DMA64_DCTL1_BYTECNT;
- ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT)
- & B43_DMA64_DCTL1_ADDREXT_MASK;
-
- desc->dma64.control0 = cpu_to_le32(ctl0);
- desc->dma64.control1 = cpu_to_le32(ctl1);
- desc->dma64.address_low = cpu_to_le32(addrlo);
- desc->dma64.address_high = cpu_to_le32(addrhi);
-}
-
-static void op64_poke_tx(struct b43_dmaring *ring, int slot)
-{
- b43_dma_write(ring, B43_DMA64_TXINDEX,
- (u32) (slot * sizeof(struct b43_dmadesc64)));
-}
-
-static void op64_tx_suspend(struct b43_dmaring *ring)
-{
- b43_dma_write(ring, B43_DMA64_TXCTL, b43_dma_read(ring, B43_DMA64_TXCTL)
- | B43_DMA64_TXSUSPEND);
-}
-
-static void op64_tx_resume(struct b43_dmaring *ring)
-{
- b43_dma_write(ring, B43_DMA64_TXCTL, b43_dma_read(ring, B43_DMA64_TXCTL)
- & ~B43_DMA64_TXSUSPEND);
-}
-
-static int op64_get_current_rxslot(struct b43_dmaring *ring)
-{
- u32 val;
-
- val = b43_dma_read(ring, B43_DMA64_RXSTATUS);
- val &= B43_DMA64_RXSTATDPTR;
-
- return (val / sizeof(struct b43_dmadesc64));
-}
-
-static void op64_set_current_rxslot(struct b43_dmaring *ring, int slot)
-{
- b43_dma_write(ring, B43_DMA64_RXINDEX,
- (u32) (slot * sizeof(struct b43_dmadesc64)));
-}
-
-static const struct b43_dma_ops dma64_ops = {
- .idx2desc = op64_idx2desc,
- .fill_descriptor = op64_fill_descriptor,
- .poke_tx = op64_poke_tx,
- .tx_suspend = op64_tx_suspend,
- .tx_resume = op64_tx_resume,
- .get_current_rxslot = op64_get_current_rxslot,
- .set_current_rxslot = op64_set_current_rxslot,
-};
-
-static inline int free_slots(struct b43_dmaring *ring)
-{
- return (ring->nr_slots - ring->used_slots);
-}
-
-static inline int next_slot(struct b43_dmaring *ring, int slot)
-{
- B43_WARN_ON(!(slot >= -1 && slot <= ring->nr_slots - 1));
- if (slot == ring->nr_slots - 1)
- return 0;
- return slot + 1;
-}
-
-static inline int prev_slot(struct b43_dmaring *ring, int slot)
-{
- B43_WARN_ON(!(slot >= 0 && slot <= ring->nr_slots - 1));
- if (slot == 0)
- return ring->nr_slots - 1;
- return slot - 1;
-}
-
-#ifdef CONFIG_B43_DEBUG
-static void update_max_used_slots(struct b43_dmaring *ring,
- int current_used_slots)
-{
- if (current_used_slots <= ring->max_used_slots)
- return;
- ring->max_used_slots = current_used_slots;
- if (b43_debug(ring->dev, B43_DBG_DMAVERBOSE)) {
- b43dbg(ring->dev->wl,
- "max_used_slots increased to %d on %s ring %d\n",
- ring->max_used_slots,
- ring->tx ? "TX" : "RX", ring->index);
- }
-}
-#else
-static inline
- void update_max_used_slots(struct b43_dmaring *ring, int current_used_slots)
-{
-}
-#endif /* DEBUG */
-
-/* Request a slot for usage. */
-static inline int request_slot(struct b43_dmaring *ring)
-{
- int slot;
-
- B43_WARN_ON(!ring->tx);
- B43_WARN_ON(ring->stopped);
- B43_WARN_ON(free_slots(ring) == 0);
-
- slot = next_slot(ring, ring->current_slot);
- ring->current_slot = slot;
- ring->used_slots++;
-
- update_max_used_slots(ring, ring->used_slots);
-
- return slot;
-}
-
-static u16 b43_dmacontroller_base(enum b43_dmatype type, int controller_idx)
-{
- static const u16 map64[] = {
- B43_MMIO_DMA64_BASE0,
- B43_MMIO_DMA64_BASE1,
- B43_MMIO_DMA64_BASE2,
- B43_MMIO_DMA64_BASE3,
- B43_MMIO_DMA64_BASE4,
- B43_MMIO_DMA64_BASE5,
- };
- static const u16 map32[] = {
- B43_MMIO_DMA32_BASE0,
- B43_MMIO_DMA32_BASE1,
- B43_MMIO_DMA32_BASE2,
- B43_MMIO_DMA32_BASE3,
- B43_MMIO_DMA32_BASE4,
- B43_MMIO_DMA32_BASE5,
- };
-
- if (type == B43_DMA_64BIT) {
- B43_WARN_ON(!(controller_idx >= 0 &&
- controller_idx < ARRAY_SIZE(map64)));
- return map64[controller_idx];
- }
- B43_WARN_ON(!(controller_idx >= 0 &&
- controller_idx < ARRAY_SIZE(map32)));
- return map32[controller_idx];
-}
-
-static inline
- dma_addr_t map_descbuffer(struct b43_dmaring *ring,
- unsigned char *buf, size_t len, int tx)
-{
- dma_addr_t dmaaddr;
-
- if (tx) {
- dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
- buf, len, DMA_TO_DEVICE);
- } else {
- dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
- buf, len, DMA_FROM_DEVICE);
- }
-
- return dmaaddr;
-}
-
-static inline
- void unmap_descbuffer(struct b43_dmaring *ring,
- dma_addr_t addr, size_t len, int tx)
-{
- if (tx) {
- dma_unmap_single(ring->dev->dev->dma_dev,
- addr, len, DMA_TO_DEVICE);
- } else {
- dma_unmap_single(ring->dev->dev->dma_dev,
- addr, len, DMA_FROM_DEVICE);
- }
-}
-
-static inline
- void sync_descbuffer_for_cpu(struct b43_dmaring *ring,
- dma_addr_t addr, size_t len)
-{
- B43_WARN_ON(ring->tx);
- dma_sync_single_for_cpu(ring->dev->dev->dma_dev,
- addr, len, DMA_FROM_DEVICE);
-}
-
-static inline
- void sync_descbuffer_for_device(struct b43_dmaring *ring,
- dma_addr_t addr, size_t len)
-{
- B43_WARN_ON(ring->tx);
- dma_sync_single_for_device(ring->dev->dev->dma_dev,
- addr, len, DMA_FROM_DEVICE);
-}
-
-static inline
- void free_descriptor_buffer(struct b43_dmaring *ring,
- struct b43_dmadesc_meta *meta)
-{
- if (meta->skb) {
- dev_kfree_skb_any(meta->skb);
- meta->skb = NULL;
- }
-}
-
-static int alloc_ringmemory(struct b43_dmaring *ring)
-{
- struct device *dma_dev = ring->dev->dev->dma_dev;
- gfp_t flags = GFP_KERNEL;
-
- /* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
- * alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
- * has shown that 4K is sufficient for the latter as long as the buffer
- * does not cross an 8K boundary.
- *
- * For unknown reasons - possibly a hardware error - the BCM4311 rev
- * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
- * which accounts for the GFP_DMA flag below.
- */
- if (ring->type == B43_DMA_64BIT)
- flags |= GFP_DMA;
- ring->descbase = dma_alloc_coherent(dma_dev, B43_DMA_RINGMEMSIZE,
- &(ring->dmabase), flags);
- if (!ring->descbase) {
- b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
- return -ENOMEM;
- }
- memset(ring->descbase, 0, B43_DMA_RINGMEMSIZE);
-
- return 0;
-}
-
-static void free_ringmemory(struct b43_dmaring *ring)
-{
- struct device *dma_dev = ring->dev->dev->dma_dev;
-
- dma_free_coherent(dma_dev, B43_DMA_RINGMEMSIZE,
- ring->descbase, ring->dmabase);
-}
-
-/* Reset the RX DMA channel */
-static int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base,
- enum b43_dmatype type)
-{
- int i;
- u32 value;
- u16 offset;
-
- might_sleep();
-
- offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXCTL : B43_DMA32_RXCTL;
- b43_write32(dev, mmio_base + offset, 0);
- for (i = 0; i < 10; i++) {
- offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXSTATUS :
- B43_DMA32_RXSTATUS;
- value = b43_read32(dev, mmio_base + offset);
- if (type == B43_DMA_64BIT) {
- value &= B43_DMA64_RXSTAT;
- if (value == B43_DMA64_RXSTAT_DISABLED) {
- i = -1;
- break;
- }
- } else {
- value &= B43_DMA32_RXSTATE;
- if (value == B43_DMA32_RXSTAT_DISABLED) {
- i = -1;
- break;
- }
- }
- msleep(1);
- }
- if (i != -1) {
- b43err(dev->wl, "DMA RX reset timed out\n");
- return -ENODEV;
- }
-
- return 0;
-}
-
-/* Reset the TX DMA channel */
-static int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base,
- enum b43_dmatype type)
-{
- int i;
- u32 value;
- u16 offset;
-
- might_sleep();
-
- for (i = 0; i < 10; i++) {
- offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
- B43_DMA32_TXSTATUS;
- value = b43_read32(dev, mmio_base + offset);
- if (type == B43_DMA_64BIT) {
- value &= B43_DMA64_TXSTAT;
- if (value == B43_DMA64_TXSTAT_DISABLED ||
- value == B43_DMA64_TXSTAT_IDLEWAIT ||
- value == B43_DMA64_TXSTAT_STOPPED)
- break;
- } else {
- value &= B43_DMA32_TXSTATE;
- if (value == B43_DMA32_TXSTAT_DISABLED ||
- value == B43_DMA32_TXSTAT_IDLEWAIT ||
- value == B43_DMA32_TXSTAT_STOPPED)
- break;
- }
- msleep(1);
- }
- offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXCTL : B43_DMA32_TXCTL;
- b43_write32(dev, mmio_base + offset, 0);
- for (i = 0; i < 10; i++) {
- offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
- B43_DMA32_TXSTATUS;
- value = b43_read32(dev, mmio_base + offset);
- if (type == B43_DMA_64BIT) {
- value &= B43_DMA64_TXSTAT;
- if (value == B43_DMA64_TXSTAT_DISABLED) {
- i = -1;
- break;
- }
- } else {
- value &= B43_DMA32_TXSTATE;
- if (value == B43_DMA32_TXSTAT_DISABLED) {
- i = -1;
- break;
- }
- }
- msleep(1);
- }
- if (i != -1) {
- b43err(dev->wl, "DMA TX reset timed out\n");
- return -ENODEV;
- }
- /* ensure the reset is completed. */
- msleep(1);
-
- return 0;
-}
-
-/* Check if a DMA mapping address is invalid. */
-static bool b43_dma_mapping_error(struct b43_dmaring *ring,
- dma_addr_t addr,
- size_t buffersize, bool dma_to_device)
-{
- if (unlikely(dma_mapping_error(addr)))
- return 1;
-
- switch (ring->type) {
- case B43_DMA_30BIT:
- if ((u64)addr + buffersize > (1ULL << 30))
- goto address_error;
- break;
- case B43_DMA_32BIT:
- if ((u64)addr + buffersize > (1ULL << 32))
- goto address_error;
- break;
- case B43_DMA_64BIT:
- /* Currently we can't have addresses beyond
- * 64bit in the kernel. */
- break;
- }
-
- /* The address is OK. */
- return 0;
-
-address_error:
- /* We can't support this address. Unmap it again. */
- unmap_descbuffer(ring, addr, buffersize, dma_to_device);
-
- return 1;
-}
-
-static int setup_rx_descbuffer(struct b43_dmaring *ring,
- struct b43_dmadesc_generic *desc,
- struct b43_dmadesc_meta *meta, gfp_t gfp_flags)
-{
- struct b43_rxhdr_fw4 *rxhdr;
- dma_addr_t dmaaddr;
- struct sk_buff *skb;
-
- B43_WARN_ON(ring->tx);
-
- skb = __dev_alloc_skb(ring->rx_buffersize, gfp_flags);
- if (unlikely(!skb))
- return -ENOMEM;
- dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
- if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
- /* ugh. try to realloc in zone_dma */
- gfp_flags |= GFP_DMA;
-
- dev_kfree_skb_any(skb);
-
- skb = __dev_alloc_skb(ring->rx_buffersize, gfp_flags);
- if (unlikely(!skb))
- return -ENOMEM;
- dmaaddr = map_descbuffer(ring, skb->data,
- ring->rx_buffersize, 0);
- }
-
- if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
- b43err(ring->dev->wl, "RX DMA buffer allocation failed\n");
- dev_kfree_skb_any(skb);
- return -EIO;
- }
-
- meta->skb = skb;
- meta->dmaaddr = dmaaddr;
- ring->ops->fill_descriptor(ring, desc, dmaaddr,
- ring->rx_buffersize, 0, 0, 0);
-
- rxhdr = (struct b43_rxhdr_fw4 *)(skb->data);
- rxhdr->frame_len = 0;
-
- return 0;
-}
-
-/* Allocate the initial descbuffers.
- * This is used for an RX ring only.
- */
-static int alloc_initial_descbuffers(struct b43_dmaring *ring)
-{
- int i, err = -ENOMEM;
- struct b43_dmadesc_generic *desc;
- struct b43_dmadesc_meta *meta;
-
- for (i = 0; i < ring->nr_slots; i++) {
- desc = ring->ops->idx2desc(ring, i, &meta);
-
- err = setup_rx_descbuffer(ring, desc, meta, GFP_KERNEL);
- if (err) {
- b43err(ring->dev->wl,
- "Failed to allocate initial descbuffers\n");
- goto err_unwind;
- }
- }
- mb();
- ring->used_slots = ring->nr_slots;
- err = 0;
- out:
- return err;
-
- err_unwind:
- for (i--; i >= 0; i--) {
- desc = ring->ops->idx2desc(ring, i, &meta);
-
- unmap_descbuffer(ring, meta->dmaaddr, ring->rx_buffersize, 0);
- dev_kfree_skb(meta->skb);
- }
- goto out;
-}
-
-/* Do initial setup of the DMA controller.
- * Reset the controller, write the ring busaddress
- * and switch the "enable" bit on.
- */
-static int dmacontroller_setup(struct b43_dmaring *ring)
-{
- int err = 0;
- u32 value;
- u32 addrext;
- u32 trans = ssb_dma_translation(ring->dev->dev);
-
- if (ring->tx) {
- if (ring->type == B43_DMA_64BIT) {
- u64 ringbase = (u64) (ring->dmabase);
-
- addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- value = B43_DMA64_TXENABLE;
- value |= (addrext << B43_DMA64_TXADDREXT_SHIFT)
- & B43_DMA64_TXADDREXT_MASK;
- b43_dma_write(ring, B43_DMA64_TXCTL, value);
- b43_dma_write(ring, B43_DMA64_TXRINGLO,
- (ringbase & 0xFFFFFFFF));
- b43_dma_write(ring, B43_DMA64_TXRINGHI,
- ((ringbase >> 32) &
- ~SSB_DMA_TRANSLATION_MASK)
- | (trans << 1));
- } else {
- u32 ringbase = (u32) (ring->dmabase);
-
- addrext = (ringbase & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- value = B43_DMA32_TXENABLE;
- value |= (addrext << B43_DMA32_TXADDREXT_SHIFT)
- & B43_DMA32_TXADDREXT_MASK;
- b43_dma_write(ring, B43_DMA32_TXCTL, value);
- b43_dma_write(ring, B43_DMA32_TXRING,
- (ringbase & ~SSB_DMA_TRANSLATION_MASK)
- | trans);
- }
- } else {
- err = alloc_initial_descbuffers(ring);
- if (err)
- goto out;
- if (ring->type == B43_DMA_64BIT) {
- u64 ringbase = (u64) (ring->dmabase);
-
- addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- value = (ring->frameoffset << B43_DMA64_RXFROFF_SHIFT);
- value |= B43_DMA64_RXENABLE;
- value |= (addrext << B43_DMA64_RXADDREXT_SHIFT)
- & B43_DMA64_RXADDREXT_MASK;
- b43_dma_write(ring, B43_DMA64_RXCTL, value);
- b43_dma_write(ring, B43_DMA64_RXRINGLO,
- (ringbase & 0xFFFFFFFF));
- b43_dma_write(ring, B43_DMA64_RXRINGHI,
- ((ringbase >> 32) &
- ~SSB_DMA_TRANSLATION_MASK)
- | (trans << 1));
- b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
- sizeof(struct b43_dmadesc64));
- } else {
- u32 ringbase = (u32) (ring->dmabase);
-
- addrext = (ringbase & SSB_DMA_TRANSLATION_MASK)
- >> SSB_DMA_TRANSLATION_SHIFT;
- value = (ring->frameoffset << B43_DMA32_RXFROFF_SHIFT);
- value |= B43_DMA32_RXENABLE;
- value |= (addrext << B43_DMA32_RXADDREXT_SHIFT)
- & B43_DMA32_RXADDREXT_MASK;
- b43_dma_write(ring, B43_DMA32_RXCTL, value);
- b43_dma_write(ring, B43_DMA32_RXRING,
- (ringbase & ~SSB_DMA_TRANSLATION_MASK)
- | trans);
- b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
- sizeof(struct b43_dmadesc32));
- }
- }
-
-out:
- return err;
-}
-
-/* Shutdown the DMA controller. */
-static void dmacontroller_cleanup(struct b43_dmaring *ring)
-{
- if (ring->tx) {
- b43_dmacontroller_tx_reset(ring->dev, ring->mmio_base,
- ring->type);
- if (ring->type == B43_DMA_64BIT) {
- b43_dma_write(ring, B43_DMA64_TXRINGLO, 0);
- b43_dma_write(ring, B43_DMA64_TXRINGHI, 0);
- } else
- b43_dma_write(ring, B43_DMA32_TXRING, 0);
- } else {
- b43_dmacontroller_rx_reset(ring->dev, ring->mmio_base,
- ring->type);
- if (ring->type == B43_DMA_64BIT) {
- b43_dma_write(ring, B43_DMA64_RXRINGLO, 0);
- b43_dma_write(ring, B43_DMA64_RXRINGHI, 0);
- } else
- b43_dma_write(ring, B43_DMA32_RXRING, 0);
- }
-}
-
-static void free_all_descbuffers(struct b43_dmaring *ring)
-{
- struct b43_dmadesc_generic *desc;
- struct b43_dmadesc_meta *meta;
- int i;
-
- if (!ring->used_slots)
- return;
- for (i = 0; i < ring->nr_slots; i++) {
- desc = ring->ops->idx2desc(ring, i, &meta);
-
- if (!meta->skb) {
- B43_WARN_ON(!ring->tx);
- continue;
- }
- if (ring->tx) {
- unmap_descbuffer(ring, meta->dmaaddr,
- meta->skb->len, 1);
- } else {
- unmap_descbuffer(ring, meta->dmaaddr,
- ring->rx_buffersize, 0);
- }
- free_descriptor_buffer(ring, meta);
- }
-}
-
-static u64 supported_dma_mask(struct b43_wldev *dev)
-{
- u32 tmp;
- u16 mmio_base;
-
- tmp = b43_read32(dev, SSB_TMSHIGH);
- if (tmp & SSB_TMSHIGH_DMA64)
- return DMA_64BIT_MASK;
- mmio_base = b43_dmacontroller_base(0, 0);
- b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK);
- tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL);
- if (tmp & B43_DMA32_TXADDREXT_MASK)
- return DMA_32BIT_MASK;
-
- return DMA_30BIT_MASK;
-}
-
-static enum b43_dmatype dma_mask_to_engine_type(u64 dmamask)
-{
- if (dmamask == DMA_30BIT_MASK)
- return B43_DMA_30BIT;
- if (dmamask == DMA_32BIT_MASK)
- return B43_DMA_32BIT;
- if (dmamask == DMA_64BIT_MASK)
- return B43_DMA_64BIT;
- B43_WARN_ON(1);
- return B43_DMA_30BIT;
-}
-
-/* Main initialization function. */
-static
-struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
- int controller_index,
- int for_tx,
- enum b43_dmatype type)
-{
- struct b43_dmaring *ring;
- int err;
- int nr_slots;
- dma_addr_t dma_test;
-
- ring = kzalloc(sizeof(*ring), GFP_KERNEL);
- if (!ring)
- goto out;
- ring->type = type;
-
- nr_slots = B43_RXRING_SLOTS;
- if (for_tx)
- nr_slots = B43_TXRING_SLOTS;
-
- ring->meta = kcalloc(nr_slots, sizeof(struct b43_dmadesc_meta),
- GFP_KERNEL);
- if (!ring->meta)
- goto err_kfree_ring;
- if (for_tx) {
- ring->txhdr_cache = kcalloc(nr_slots,
- b43_txhdr_size(dev),
- GFP_KERNEL);
- if (!ring->txhdr_cache)
- goto err_kfree_meta;
-
- /* test for ability to dma to txhdr_cache */
- dma_test = dma_map_single(dev->dev->dma_dev,
- ring->txhdr_cache,
- b43_txhdr_size(dev),
- DMA_TO_DEVICE);
-
- if (b43_dma_mapping_error(ring, dma_test,
- b43_txhdr_size(dev), 1)) {
- /* ugh realloc */
- kfree(ring->txhdr_cache);
- ring->txhdr_cache = kcalloc(nr_slots,
- b43_txhdr_size(dev),
- GFP_KERNEL | GFP_DMA);
- if (!ring->txhdr_cache)
- goto err_kfree_meta;
-
- dma_test = dma_map_single(dev->dev->dma_dev,
- ring->txhdr_cache,
- b43_txhdr_size(dev),
- DMA_TO_DEVICE);
-
- if (b43_dma_mapping_error(ring, dma_test,
- b43_txhdr_size(dev), 1)) {
-
- b43err(dev->wl,
- "TXHDR DMA allocation failed\n");
- goto err_kfree_txhdr_cache;
- }
- }
-
- dma_unmap_single(dev->dev->dma_dev,
- dma_test, b43_txhdr_size(dev),
- DMA_TO_DEVICE);
- }
-
- ring->dev = dev;
- ring->nr_slots = nr_slots;
- ring->mmio_base = b43_dmacontroller_base(type, controller_index);
- ring->index = controller_index;
- if (type == B43_DMA_64BIT)
- ring->ops = &dma64_ops;
- else
- ring->ops = &dma32_ops;
- if (for_tx) {
- ring->tx = 1;
- ring->current_slot = -1;
- } else {
- if (ring->index == 0) {
- ring->rx_buffersize = B43_DMA0_RX_BUFFERSIZE;
- ring->frameoffset = B43_DMA0_RX_FRAMEOFFSET;
- } else if (ring->index == 3) {
- ring->rx_buffersize = B43_DMA3_RX_BUFFERSIZE;
- ring->frameoffset = B43_DMA3_RX_FRAMEOFFSET;
- } else
- B43_WARN_ON(1);
- }
- spin_lock_init(&ring->lock);
-#ifdef CONFIG_B43_DEBUG
- ring->last_injected_overflow = jiffies;
-#endif
-
- err = alloc_ringmemory(ring);
- if (err)
- goto err_kfree_txhdr_cache;
- err = dmacontroller_setup(ring);
- if (err)
- goto err_free_ringmemory;
-
- out:
- return ring;
-
- err_free_ringmemory:
- free_ringmemory(ring);
- err_kfree_txhdr_cache:
- kfree(ring->txhdr_cache);
- err_kfree_meta:
- kfree(ring->meta);
- err_kfree_ring:
- kfree(ring);
- ring = NULL;
- goto out;
-}
-
-#define divide(a, b) ({ \
- typeof(a) __a = a; \
- do_div(__a, b); \
- __a; \
- })
-
-#define modulo(a, b) ({ \
- typeof(a) __a = a; \
- do_div(__a, b); \
- })
-
-/* Main cleanup function. */
-static void b43_destroy_dmaring(struct b43_dmaring *ring,
- const char *ringname)
-{
- if (!ring)
- return;
-
-#ifdef CONFIG_B43_DEBUG
- {
- /* Print some statistics. */
- u64 failed_packets = ring->nr_failed_tx_packets;
- u64 succeed_packets = ring->nr_succeed_tx_packets;
- u64 nr_packets = failed_packets + succeed_packets;
- u64 permille_failed = 0, average_tries = 0;
-
- if (nr_packets)
- permille_failed = divide(failed_packets * 1000, nr_packets);
- if (nr_packets)
- average_tries = divide(ring->nr_total_packet_tries * 100, nr_packets);
-
- b43dbg(ring->dev->wl, "DMA-%u %s: "
- "Used slots %d/%d, Failed frames %llu/%llu = %llu.%01llu%%, "
- "Average tries %llu.%02llu\n",
- (unsigned int)(ring->type), ringname,
- ring->max_used_slots,
- ring->nr_slots,
- (unsigned long long)failed_packets,
- (unsigned long long)nr_packets,
- (unsigned long long)divide(permille_failed, 10),
- (unsigned long long)modulo(permille_failed, 10),
- (unsigned long long)divide(average_tries, 100),
- (unsigned long long)modulo(average_tries, 100));
- }
-#endif /* DEBUG */
-
- /* Device IRQs are disabled prior entering this function,
- * so no need to take care of concurrency with rx handler stuff.
- */
- dmacontroller_cleanup(ring);
- free_all_descbuffers(ring);
- free_ringmemory(ring);
-
- kfree(ring->txhdr_cache);
- kfree(ring->meta);
- kfree(ring);
-}
-
-#define destroy_ring(dma, ring) do { \
- b43_destroy_dmaring((dma)->ring, __stringify(ring)); \
- (dma)->ring = NULL; \
- } while (0)
-
-void b43_dma_free(struct b43_wldev *dev)
-{
- struct b43_dma *dma;
-
- if (b43_using_pio_transfers(dev))
- return;
- dma = &dev->dma;
-
- destroy_ring(dma, rx_ring);
- destroy_ring(dma, tx_ring_AC_BK);
- destroy_ring(dma, tx_ring_AC_BE);
- destroy_ring(dma, tx_ring_AC_VI);
- destroy_ring(dma, tx_ring_AC_VO);
- destroy_ring(dma, tx_ring_mcast);
-}
-
-static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
-{
- u64 orig_mask = mask;
- bool fallback = 0;
- int err;
-
- /* Try to set the DMA mask. If it fails, try falling back to a
- * lower mask, as we can always also support a lower one. */
- while (1) {
- err = ssb_dma_set_mask(dev->dev, mask);
- if (!err)
- break;
- if (mask == DMA_64BIT_MASK) {
- mask = DMA_32BIT_MASK;
- fallback = 1;
- continue;
- }
- if (mask == DMA_32BIT_MASK) {
- mask = DMA_30BIT_MASK;
- fallback = 1;
- continue;
- }
- b43err(dev->wl, "The machine/kernel does not support "
- "the required %u-bit DMA mask\n",
- (unsigned int)dma_mask_to_engine_type(orig_mask));
- return -EOPNOTSUPP;
- }
- if (fallback) {
- b43info(dev->wl, "DMA mask fallback from %u-bit to %u-bit\n",
- (unsigned int)dma_mask_to_engine_type(orig_mask),
- (unsigned int)dma_mask_to_engine_type(mask));
- }
-
- return 0;
-}
-
-int b43_dma_init(struct b43_wldev *dev)
-{
- struct b43_dma *dma = &dev->dma;
- int err;
- u64 dmamask;
- enum b43_dmatype type;
-
- dmamask = supported_dma_mask(dev);
- type = dma_mask_to_engine_type(dmamask);
- err = b43_dma_set_mask(dev, dmamask);
- if (err)
- return err;
-
- err = -ENOMEM;
- /* setup TX DMA channels. */
- dma->tx_ring_AC_BK = b43_setup_dmaring(dev, 0, 1, type);
- if (!dma->tx_ring_AC_BK)
- goto out;
-
- dma->tx_ring_AC_BE = b43_setup_dmaring(dev, 1, 1, type);
- if (!dma->tx_ring_AC_BE)
- goto err_destroy_bk;
-
- dma->tx_ring_AC_VI = b43_setup_dmaring(dev, 2, 1, type);
- if (!dma->tx_ring_AC_VI)
- goto err_destroy_be;
-
- dma->tx_ring_AC_VO = b43_setup_dmaring(dev, 3, 1, type);
- if (!dma->tx_ring_AC_VO)
- goto err_destroy_vi;
-
- dma->tx_ring_mcast = b43_setup_dmaring(dev, 4, 1, type);
- if (!dma->tx_ring_mcast)
- goto err_destroy_vo;
-
- /* setup RX DMA channel. */
- dma->rx_ring = b43_setup_dmaring(dev, 0, 0, type);
- if (!dma->rx_ring)
- goto err_destroy_mcast;
-
- /* No support for the TX status DMA ring. */
- B43_WARN_ON(dev->dev->id.revision < 5);
-
- b43dbg(dev->wl, "%u-bit DMA initialized\n",
- (unsigned int)type);
- err = 0;
-out:
- return err;
-
-err_destroy_mcast:
- destroy_ring(dma, tx_ring_mcast);
-err_destroy_vo:
- destroy_ring(dma, tx_ring_AC_VO);
-err_destroy_vi:
- destroy_ring(dma, tx_ring_AC_VI);
-err_destroy_be:
- destroy_ring(dma, tx_ring_AC_BE);
-err_destroy_bk:
- destroy_ring(dma, tx_ring_AC_BK);
- return err;
-}
-
-/* Generate a cookie for the TX header. */
-static u16 generate_cookie(struct b43_dmaring *ring, int slot)
-{
- u16 cookie;
-
- /* Use the upper 4 bits of the cookie as
- * DMA controller ID and store the slot number
- * in the lower 12 bits.
- * Note that the cookie must never be 0, as this
- * is a special value used in RX path.
- * It can also not be 0xFFFF because that is special
- * for multicast frames.
- */
- cookie = (((u16)ring->index + 1) << 12);
- B43_WARN_ON(slot & ~0x0FFF);
- cookie |= (u16)slot;
-
- return cookie;
-}
-
-/* Inspect a cookie and find out to which controller/slot it belongs. */
-static
-struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot)
-{
- struct b43_dma *dma = &dev->dma;
- struct b43_dmaring *ring = NULL;
-
- switch (cookie & 0xF000) {
- case 0x1000:
- ring = dma->tx_ring_AC_BK;
- break;
- case 0x2000:
- ring = dma->tx_ring_AC_BE;
- break;
- case 0x3000:
- ring = dma->tx_ring_AC_VI;
- break;
- case 0x4000:
- ring = dma->tx_ring_AC_VO;
- break;
- case 0x5000:
- ring = dma->tx_ring_mcast;
- break;
- default:
- B43_WARN_ON(1);
- }
- *slot = (cookie & 0x0FFF);
- B43_WARN_ON(!(ring && *slot >= 0 && *slot < ring->nr_slots));
-
- return ring;
-}
-
-static int dma_tx_fragment(struct b43_dmaring *ring,
- struct sk_buff *skb)
-{
- const struct b43_dma_ops *ops = ring->ops;
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
- u8 *header;
- int slot, old_top_slot, old_used_slots;
- int err;
- struct b43_dmadesc_generic *desc;
- struct b43_dmadesc_meta *meta;
- struct b43_dmadesc_meta *meta_hdr;
- struct sk_buff *bounce_skb;
- u16 cookie;
- size_t hdrsize = b43_txhdr_size(ring->dev);
-
-#define SLOTS_PER_PACKET 2
-
- old_top_slot = ring->current_slot;
- old_used_slots = ring->used_slots;
-
- /* Get a slot for the header. */
- slot = request_slot(ring);
- desc = ops->idx2desc(ring, slot, &meta_hdr);
- memset(meta_hdr, 0, sizeof(*meta_hdr));
-
- header = &(ring->txhdr_cache[slot * hdrsize]);
- cookie = generate_cookie(ring, slot);
- err = b43_generate_txhdr(ring->dev, header,
- skb->data, skb->len, info, cookie);
- if (unlikely(err)) {
- ring->current_slot = old_top_slot;
- ring->used_slots = old_used_slots;
- return err;
- }
-
- meta_hdr->dmaaddr = map_descbuffer(ring, (unsigned char *)header,
- hdrsize, 1);
- if (b43_dma_mapping_error(ring, meta_hdr->dmaaddr, hdrsize, 1)) {
- ring->current_slot = old_top_slot;
- ring->used_slots = old_used_slots;
- return -EIO;
- }
- ops->fill_descriptor(ring, desc, meta_hdr->dmaaddr,
- hdrsize, 1, 0, 0);
-
- /* Get a slot for the payload. */
- slot = request_slot(ring);
- desc = ops->idx2desc(ring, slot, &meta);
- memset(meta, 0, sizeof(*meta));
-
- meta->skb = skb;
- meta->is_last_fragment = 1;
-
- meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
- /* create a bounce buffer in zone_dma on mapping failure. */
- if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
- bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA);
- if (!bounce_skb) {
- ring->current_slot = old_top_slot;
- ring->used_slots = old_used_slots;
- err = -ENOMEM;
- goto out_unmap_hdr;
- }
-
- memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len);
- dev_kfree_skb_any(skb);
- skb = bounce_skb;
- meta->skb = skb;
- meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
- if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
- ring->current_slot = old_top_slot;
- ring->used_slots = old_used_slots;
- err = -EIO;
- goto out_free_bounce;
- }
- }
-
- ops->fill_descriptor(ring, desc, meta->dmaaddr, skb->len, 0, 1, 1);
-
- if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
- /* Tell the firmware about the cookie of the last
- * mcast frame, so it can clear the more-data bit in it. */
- b43_shm_write16(ring->dev, B43_SHM_SHARED,
- B43_SHM_SH_MCASTCOOKIE, cookie);
- }
- /* Now transfer the whole frame. */
- wmb();
- ops->poke_tx(ring, next_slot(ring, slot));
- return 0;
-
-out_free_bounce:
- dev_kfree_skb_any(skb);
-out_unmap_hdr:
- unmap_descbuffer(ring, meta_hdr->dmaaddr,
- hdrsize, 1);
- return err;
-}
-
-static inline int should_inject_overflow(struct b43_dmaring *ring)
-{
-#ifdef CONFIG_B43_DEBUG
- if (unlikely(b43_debug(ring->dev, B43_DBG_DMAOVERFLOW))) {
- /* Check if we should inject another ringbuffer overflow
- * to test handling of this situation in the stack. */
- unsigned long next_overflow;
-
- next_overflow = ring->last_injected_overflow + HZ;
- if (time_after(jiffies, next_overflow)) {
- ring->last_injected_overflow = jiffies;
- b43dbg(ring->dev->wl,
- "Injecting TX ring overflow on "
- "DMA controller %d\n", ring->index);
- return 1;
- }
- }
-#endif /* CONFIG_B43_DEBUG */
- return 0;
-}
-
-/* Static mapping of mac80211's queues (priorities) to b43 DMA rings. */
-static struct b43_dmaring * select_ring_by_priority(struct b43_wldev *dev,
- u8 queue_prio)
-{
- struct b43_dmaring *ring;
-
- if (b43_modparam_qos) {
- /* 0 = highest priority */
- switch (queue_prio) {
- default:
- B43_WARN_ON(1);
- /* fallthrough */
- case 0:
- ring = dev->dma.tx_ring_AC_VO;
- break;
- case 1:
- ring = dev->dma.tx_ring_AC_VI;
- break;
- case 2:
- ring = dev->dma.tx_ring_AC_BE;
- break;
- case 3:
- ring = dev->dma.tx_ring_AC_BK;
- break;
- }
- } else
- ring = dev->dma.tx_ring_AC_BE;
-
- return ring;
-}
-
-int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
-{
- struct b43_dmaring *ring;
- struct ieee80211_hdr *hdr;
- int err = 0;
- unsigned long flags;
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
-
- hdr = (struct ieee80211_hdr *)skb->data;
- if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
- /* The multicast ring will be sent after the DTIM */
- ring = dev->dma.tx_ring_mcast;
- /* Set the more-data bit. Ucode will clear it on
- * the last frame for us. */
- hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
- } else {
- /* Decide by priority where to put this frame. */
- ring = select_ring_by_priority(
- dev, skb_get_queue_mapping(skb));
- }
-
- spin_lock_irqsave(&ring->lock, flags);
- B43_WARN_ON(!ring->tx);
- if (unlikely(free_slots(ring) < SLOTS_PER_PACKET)) {
- b43warn(dev->wl, "DMA queue overflow\n");
- err = -ENOSPC;
- goto out_unlock;
- }
- /* Check if the queue was stopped in mac80211,
- * but we got called nevertheless.
- * That would be a mac80211 bug. */
- B43_WARN_ON(ring->stopped);
-
- /* Assign the queue number to the ring (if not already done before)
- * so TX status handling can use it. The queue to ring mapping is
- * static, so we don't need to store it per frame. */
- ring->queue_prio = skb_get_queue_mapping(skb);
-
- err = dma_tx_fragment(ring, skb);
- if (unlikely(err == -ENOKEY)) {
- /* Drop this packet, as we don't have the encryption key
- * anymore and must not transmit it unencrypted. */
- dev_kfree_skb_any(skb);
- err = 0;
- goto out_unlock;
- }
- if (unlikely(err)) {
- b43err(dev->wl, "DMA tx mapping failure\n");
- goto out_unlock;
- }
- ring->nr_tx_packets++;
- if ((free_slots(ring) < SLOTS_PER_PACKET) ||
- should_inject_overflow(ring)) {
- /* This TX ring is full. */
- ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
- ring->stopped = 1;
- if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
- b43dbg(dev->wl, "Stopped TX ring %d\n", ring->index);
- }
- }
-out_unlock:
- spin_unlock_irqrestore(&ring->lock, flags);
-
- return err;
-}
-
-/* Called with IRQs disabled. */
-void b43_dma_handle_txstatus(struct b43_wldev *dev,
- const struct b43_txstatus *status)
-{
- const struct b43_dma_ops *ops;
- struct b43_dmaring *ring;
- struct b43_dmadesc_generic *desc;
- struct b43_dmadesc_meta *meta;
- int slot;
- bool frame_succeed;
-
- ring = parse_cookie(dev, status->cookie, &slot);
- if (unlikely(!ring))
- return;
-
- spin_lock(&ring->lock); /* IRQs are already disabled. */
-
- B43_WARN_ON(!ring->tx);
- ops = ring->ops;
- while (1) {
- B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots));
- desc = ops->idx2desc(ring, slot, &meta);
-
- if (meta->skb)
- unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len,
- 1);
- else
- unmap_descbuffer(ring, meta->dmaaddr,
- b43_txhdr_size(dev), 1);
-
- if (meta->is_last_fragment) {
- struct ieee80211_tx_info *info;
-
- BUG_ON(!meta->skb);
-
- info = IEEE80211_SKB_CB(meta->skb);
-
- memset(&info->status, 0, sizeof(info->status));
-
- /*
- * Call back to inform the ieee80211 subsystem about
- * the status of the transmission.
- */
- frame_succeed = b43_fill_txstatus_report(info, status);
-#ifdef CONFIG_B43_DEBUG
- if (frame_succeed)
- ring->nr_succeed_tx_packets++;
- else
- ring->nr_failed_tx_packets++;
- ring->nr_total_packet_tries += status->frame_count;
-#endif /* DEBUG */
- ieee80211_tx_status_irqsafe(dev->wl->hw, meta->skb);
-
- /* skb is freed by ieee80211_tx_status_irqsafe() */
- meta->skb = NULL;
- } else {
- /* No need to call free_descriptor_buffer here, as
- * this is only the txhdr, which is not allocated.
- */
- B43_WARN_ON(meta->skb);
- }
-
- /* Everything unmapped and free'd. So it's not used anymore. */
- ring->used_slots--;
-
- if (meta->is_last_fragment)
- break;
- slot = next_slot(ring, slot);
- }
- dev->stats.last_tx = jiffies;
- if (ring->stopped) {
- B43_WARN_ON(free_slots(ring) < SLOTS_PER_PACKET);
- ieee80211_wake_queue(dev->wl->hw, ring->queue_prio);
- ring->stopped = 0;
- if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
- b43dbg(dev->wl, "Woke up TX ring %d\n", ring->index);
- }
- }
-
- spin_unlock(&ring->lock);
-}
-
-void b43_dma_get_tx_stats(struct b43_wldev *dev,
- struct ieee80211_tx_queue_stats *stats)
-{
- const int nr_queues = dev->wl->hw->queues;
- struct b43_dmaring *ring;
- unsigned long flags;
- int i;
-
- for (i = 0; i < nr_queues; i++) {
- ring = select_ring_by_priority(dev, i);
-
- spin_lock_irqsave(&ring->lock, flags);
- stats[i].len = ring->used_slots / SLOTS_PER_PACKET;
- stats[i].limit = ring->nr_slots / SLOTS_PER_PACKET;
- stats[i].count = ring->nr_tx_packets;
- spin_unlock_irqrestore(&ring->lock, flags);
- }
-}
-
-static void dma_rx(struct b43_dmaring *ring, int *slot)
-{
- const struct b43_dma_ops *ops = ring->ops;
- struct b43_dmadesc_generic *desc;
- struct b43_dmadesc_meta *meta;
- struct b43_rxhdr_fw4 *rxhdr;
- struct sk_buff *skb;
- u16 len;
- int err;
- dma_addr_t dmaaddr;
-
- desc = ops->idx2desc(ring, *slot, &meta);
-
- sync_descbuffer_for_cpu(ring, meta->dmaaddr, ring->rx_buffersize);
- skb = meta->skb;
-
- rxhdr = (struct b43_rxhdr_fw4 *)skb->data;
- len = le16_to_cpu(rxhdr->frame_len);
- if (len == 0) {
- int i = 0;
-
- do {
- udelay(2);
- barrier();
- len = le16_to_cpu(rxhdr->frame_len);
- } while (len == 0 && i++ < 5);
- if (unlikely(len == 0)) {
- /* recycle the descriptor buffer. */
- sync_descbuffer_for_device(ring, meta->dmaaddr,
- ring->rx_buffersize);
- goto drop;
- }
- }
- if (unlikely(len > ring->rx_buffersize)) {
- /* The data did not fit into one descriptor buffer
- * and is split over multiple buffers.
- * This should never happen, as we try to allocate buffers
- * big enough. So simply ignore this packet.
- */
- int cnt = 0;
- s32 tmp = len;
-
- while (1) {
- desc = ops->idx2desc(ring, *slot, &meta);
- /* recycle the descriptor buffer. */
- sync_descbuffer_for_device(ring, meta->dmaaddr,
- ring->rx_buffersize);
- *slot = next_slot(ring, *slot);
- cnt++;
- tmp -= ring->rx_buffersize;
- if (tmp <= 0)
- break;
- }
- b43err(ring->dev->wl, "DMA RX buffer too small "
- "(len: %u, buffer: %u, nr-dropped: %d)\n",
- len, ring->rx_buffersize, cnt);
- goto drop;
- }
-
- dmaaddr = meta->dmaaddr;
- err = setup_rx_descbuffer(ring, desc, meta, GFP_ATOMIC);
- if (unlikely(err)) {
- b43dbg(ring->dev->wl, "DMA RX: setup_rx_descbuffer() failed\n");
- sync_descbuffer_for_device(ring, dmaaddr, ring->rx_buffersize);
- goto drop;
- }
-
- unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
- skb_put(skb, len + ring->frameoffset);
- skb_pull(skb, ring->frameoffset);
-
- b43_rx(ring->dev, skb, rxhdr);
-drop:
- return;
-}
-
-void b43_dma_rx(struct b43_dmaring *ring)
-{
- const struct b43_dma_ops *ops = ring->ops;
- int slot, current_slot;
- int used_slots = 0;
-
- B43_WARN_ON(ring->tx);
- current_slot = ops->get_current_rxslot(ring);
- B43_WARN_ON(!(current_slot >= 0 && current_slot < ring->nr_slots));
-
- slot = ring->current_slot;
- for (; slot != current_slot; slot = next_slot(ring, slot)) {
- dma_rx(ring, &slot);
- update_max_used_slots(ring, ++used_slots);
- }
- ops->set_current_rxslot(ring, slot);
- ring->current_slot = slot;
-}
-
-static void b43_dma_tx_suspend_ring(struct b43_dmaring *ring)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&ring->lock, flags);
- B43_WARN_ON(!ring->tx);
- ring->ops->tx_suspend(ring);
- spin_unlock_irqrestore(&ring->lock, flags);
-}
-
-static void b43_dma_tx_resume_ring(struct b43_dmaring *ring)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&ring->lock, flags);
- B43_WARN_ON(!ring->tx);
- ring->ops->tx_resume(ring);
- spin_unlock_irqrestore(&ring->lock, flags);
-}
-
-void b43_dma_tx_suspend(struct b43_wldev *dev)
-{
- b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
- b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_BK);
- b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_BE);
- b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_VI);
- b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_VO);
- b43_dma_tx_suspend_ring(dev->dma.tx_ring_mcast);
-}
-
-void b43_dma_tx_resume(struct b43_wldev *dev)
-{
- b43_dma_tx_resume_ring(dev->dma.tx_ring_mcast);
- b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_VO);
- b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_VI);
- b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_BE);
- b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_BK);
- b43_power_saving_ctl_bits(dev, 0);
-}
-
-#ifdef CONFIG_B43_PIO
-static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type,
- u16 mmio_base, bool enable)
-{
- u32 ctl;
-
- if (type == B43_DMA_64BIT) {
- ctl = b43_read32(dev, mmio_base + B43_DMA64_RXCTL);
- ctl &= ~B43_DMA64_RXDIRECTFIFO;
- if (enable)
- ctl |= B43_DMA64_RXDIRECTFIFO;
- b43_write32(dev, mmio_base + B43_DMA64_RXCTL, ctl);
- } else {
- ctl = b43_read32(dev, mmio_base + B43_DMA32_RXCTL);
- ctl &= ~B43_DMA32_RXDIRECTFIFO;
- if (enable)
- ctl |= B43_DMA32_RXDIRECTFIFO;
- b43_write32(dev, mmio_base + B43_DMA32_RXCTL, ctl);
- }
-}
-
-/* Enable/Disable Direct FIFO Receive Mode (PIO) on a RX engine.
- * This is called from PIO code, so DMA structures are not available. */
-void b43_dma_direct_fifo_rx(struct b43_wldev *dev,
- unsigned int engine_index, bool enable)
-{
- enum b43_dmatype type;
- u16 mmio_base;
-
- type = dma_mask_to_engine_type(supported_dma_mask(dev));
-
- mmio_base = b43_dmacontroller_base(type, engine_index);
- direct_fifo_rx(dev, type, mmio_base, enable);
-}
-#endif /* CONFIG_B43_PIO */
-#ifndef B43_DMA_H_
-#define B43_DMA_H_
-
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <linux/workqueue.h>
-#include <linux/linkage.h>
-#include <asm/atomic.h>
-
-#include "b43.h"
-
-/* DMA-Interrupt reasons. */
-#define B43_DMAIRQ_FATALMASK ((1 << 10) | (1 << 11) | (1 << 12) \
- | (1 << 14) | (1 << 15))
-#define B43_DMAIRQ_NONFATALMASK (1 << 13)
-#define B43_DMAIRQ_RX_DONE (1 << 16)
-
-/*** 32-bit DMA Engine. ***/
-
-/* 32-bit DMA controller registers. */
-#define B43_DMA32_TXCTL 0x00
-#define B43_DMA32_TXENABLE 0x00000001
-#define B43_DMA32_TXSUSPEND 0x00000002
-#define B43_DMA32_TXLOOPBACK 0x00000004
-#define B43_DMA32_TXFLUSH 0x00000010
-#define B43_DMA32_TXADDREXT_MASK 0x00030000
-#define B43_DMA32_TXADDREXT_SHIFT 16
-#define B43_DMA32_TXRING 0x04
-#define B43_DMA32_TXINDEX 0x08
-#define B43_DMA32_TXSTATUS 0x0C
-#define B43_DMA32_TXDPTR 0x00000FFF
-#define B43_DMA32_TXSTATE 0x0000F000
-#define B43_DMA32_TXSTAT_DISABLED 0x00000000
-#define B43_DMA32_TXSTAT_ACTIVE 0x00001000
-#define B43_DMA32_TXSTAT_IDLEWAIT 0x00002000
-#define B43_DMA32_TXSTAT_STOPPED 0x00003000
-#define B43_DMA32_TXSTAT_SUSP 0x00004000
-#define B43_DMA32_TXERROR 0x000F0000
-#define B43_DMA32_TXERR_NOERR 0x00000000
-#define B43_DMA32_TXERR_PROT 0x00010000
-#define B43_DMA32_TXERR_UNDERRUN 0x00020000
-#define B43_DMA32_TXERR_BUFREAD 0x00030000
-#define B43_DMA32_TXERR_DESCREAD 0x00040000
-#define B43_DMA32_TXACTIVE 0xFFF00000
-#define B43_DMA32_RXCTL 0x10
-#define B43_DMA32_RXENABLE 0x00000001
-#define B43_DMA32_RXFROFF_MASK 0x000000FE
-#define B43_DMA32_RXFROFF_SHIFT 1
-#define B43_DMA32_RXDIRECTFIFO 0x00000100
-#define B43_DMA32_RXADDREXT_MASK 0x00030000
-#define B43_DMA32_RXADDREXT_SHIFT 16
-#define B43_DMA32_RXRING 0x14
-#define B43_DMA32_RXINDEX 0x18
-#define B43_DMA32_RXSTATUS 0x1C
-#define B43_DMA32_RXDPTR 0x00000FFF
-#define B43_DMA32_RXSTATE 0x0000F000
-#define B43_DMA32_RXSTAT_DISABLED 0x00000000
-#define B43_DMA32_RXSTAT_ACTIVE 0x00001000
-#define B43_DMA32_RXSTAT_IDLEWAIT 0x00002000
-#define B43_DMA32_RXSTAT_STOPPED 0x00003000
-#define B43_DMA32_RXERROR 0x000F0000
-#define B43_DMA32_RXERR_NOERR 0x00000000
-#define B43_DMA32_RXERR_PROT 0x00010000
-#define B43_DMA32_RXERR_OVERFLOW 0x00020000
-#define B43_DMA32_RXERR_BUFWRITE 0x00030000
-#define B43_DMA32_RXERR_DESCREAD 0x00040000
-#define B43_DMA32_RXACTIVE 0xFFF00000
-
-/* 32-bit DMA descriptor. */
-struct b43_dmadesc32 {
- __le32 control;
- __le32 address;
-} __attribute__ ((__packed__));
-#define B43_DMA32_DCTL_BYTECNT 0x00001FFF
-#define B43_DMA32_DCTL_ADDREXT_MASK 0x00030000
-#define B43_DMA32_DCTL_ADDREXT_SHIFT 16
-#define B43_DMA32_DCTL_DTABLEEND 0x10000000
-#define B43_DMA32_DCTL_IRQ 0x20000000
-#define B43_DMA32_DCTL_FRAMEEND 0x40000000
-#define B43_DMA32_DCTL_FRAMESTART 0x80000000
-
-/*** 64-bit DMA Engine. ***/
-
-/* 64-bit DMA controller registers. */
-#define B43_DMA64_TXCTL 0x00
-#define B43_DMA64_TXENABLE 0x00000001
-#define B43_DMA64_TXSUSPEND 0x00000002
-#define B43_DMA64_TXLOOPBACK 0x00000004
-#define B43_DMA64_TXFLUSH 0x00000010
-#define B43_DMA64_TXADDREXT_MASK 0x00030000
-#define B43_DMA64_TXADDREXT_SHIFT 16
-#define B43_DMA64_TXINDEX 0x04
-#define B43_DMA64_TXRINGLO 0x08
-#define B43_DMA64_TXRINGHI 0x0C
-#define B43_DMA64_TXSTATUS 0x10
-#define B43_DMA64_TXSTATDPTR 0x00001FFF
-#define B43_DMA64_TXSTAT 0xF0000000
-#define B43_DMA64_TXSTAT_DISABLED 0x00000000
-#define B43_DMA64_TXSTAT_ACTIVE 0x10000000
-#define B43_DMA64_TXSTAT_IDLEWAIT 0x20000000
-#define B43_DMA64_TXSTAT_STOPPED 0x30000000
-#define B43_DMA64_TXSTAT_SUSP 0x40000000
-#define B43_DMA64_TXERROR 0x14
-#define B43_DMA64_TXERRDPTR 0x0001FFFF
-#define B43_DMA64_TXERR 0xF0000000
-#define B43_DMA64_TXERR_NOERR 0x00000000
-#define B43_DMA64_TXERR_PROT 0x10000000
-#define B43_DMA64_TXERR_UNDERRUN 0x20000000
-#define B43_DMA64_TXERR_TRANSFER 0x30000000
-#define B43_DMA64_TXERR_DESCREAD 0x40000000
-#define B43_DMA64_TXERR_CORE 0x50000000
-#define B43_DMA64_RXCTL 0x20
-#define B43_DMA64_RXENABLE 0x00000001
-#define B43_DMA64_RXFROFF_MASK 0x000000FE
-#define B43_DMA64_RXFROFF_SHIFT 1
-#define B43_DMA64_RXDIRECTFIFO 0x00000100
-#define B43_DMA64_RXADDREXT_MASK 0x00030000
-#define B43_DMA64_RXADDREXT_SHIFT 16
-#define B43_DMA64_RXINDEX 0x24
-#define B43_DMA64_RXRINGLO 0x28
-#define B43_DMA64_RXRINGHI 0x2C
-#define B43_DMA64_RXSTATUS 0x30
-#define B43_DMA64_RXSTATDPTR 0x00001FFF
-#define B43_DMA64_RXSTAT 0xF0000000
-#define B43_DMA64_RXSTAT_DISABLED 0x00000000
-#define B43_DMA64_RXSTAT_ACTIVE 0x10000000
-#define B43_DMA64_RXSTAT_IDLEWAIT 0x20000000
-#define B43_DMA64_RXSTAT_STOPPED 0x30000000
-#define B43_DMA64_RXSTAT_SUSP 0x40000000
-#define B43_DMA64_RXERROR 0x34
-#define B43_DMA64_RXERRDPTR 0x0001FFFF
-#define B43_DMA64_RXERR 0xF0000000
-#define B43_DMA64_RXERR_NOERR 0x00000000
-#define B43_DMA64_RXERR_PROT 0x10000000
-#define B43_DMA64_RXERR_UNDERRUN 0x20000000
-#define B43_DMA64_RXERR_TRANSFER 0x30000000
-#define B43_DMA64_RXERR_DESCREAD 0x40000000
-#define B43_DMA64_RXERR_CORE 0x50000000
-
-/* 64-bit DMA descriptor. */
-struct b43_dmadesc64 {
- __le32 control0;
- __le32 control1;
- __le32 address_low;
- __le32 address_high;
-} __attribute__ ((__packed__));
-#define B43_DMA64_DCTL0_DTABLEEND 0x10000000
-#define B43_DMA64_DCTL0_IRQ 0x20000000
-#define B43_DMA64_DCTL0_FRAMEEND 0x40000000
-#define B43_DMA64_DCTL0_FRAMESTART 0x80000000
-#define B43_DMA64_DCTL1_BYTECNT 0x00001FFF
-#define B43_DMA64_DCTL1_ADDREXT_MASK 0x00030000
-#define B43_DMA64_DCTL1_ADDREXT_SHIFT 16
-
-struct b43_dmadesc_generic {
- union {
- struct b43_dmadesc32 dma32;
- struct b43_dmadesc64 dma64;
- } __attribute__ ((__packed__));
-} __attribute__ ((__packed__));
-
-/* Misc DMA constants */
-#define B43_DMA_RINGMEMSIZE PAGE_SIZE
-#define B43_DMA0_RX_FRAMEOFFSET 30
-#define B43_DMA3_RX_FRAMEOFFSET 0
-
-/* DMA engine tuning knobs */
-#define B43_TXRING_SLOTS 128
-#define B43_RXRING_SLOTS 64
-#define B43_DMA0_RX_BUFFERSIZE (2304 + 100)
-#define B43_DMA3_RX_BUFFERSIZE 16
-
-struct sk_buff;
-struct b43_private;
-struct b43_txstatus;
-
-struct b43_dmadesc_meta {
- /* The kernel DMA-able buffer. */
- struct sk_buff *skb;
- /* DMA base bus-address of the descriptor buffer. */
- dma_addr_t dmaaddr;
- /* ieee80211 TX status. Only used once per 802.11 frag. */
- bool is_last_fragment;
-};
-
-struct b43_dmaring;
-
-/* Lowlevel DMA operations that differ between 32bit and 64bit DMA. */
-struct b43_dma_ops {
- struct b43_dmadesc_generic *(*idx2desc) (struct b43_dmaring * ring,
- int slot,
- struct b43_dmadesc_meta **
- meta);
- void (*fill_descriptor) (struct b43_dmaring * ring,
- struct b43_dmadesc_generic * desc,
- dma_addr_t dmaaddr, u16 bufsize, int start,
- int end, int irq);
- void (*poke_tx) (struct b43_dmaring * ring, int slot);
- void (*tx_suspend) (struct b43_dmaring * ring);
- void (*tx_resume) (struct b43_dmaring * ring);
- int (*get_current_rxslot) (struct b43_dmaring * ring);
- void (*set_current_rxslot) (struct b43_dmaring * ring, int slot);
-};
-
-enum b43_dmatype {
- B43_DMA_30BIT = 30,
- B43_DMA_32BIT = 32,
- B43_DMA_64BIT = 64,
-};
-
-struct b43_dmaring {
- /* Lowlevel DMA ops. */
- const struct b43_dma_ops *ops;
- /* Kernel virtual base address of the ring memory. */
- void *descbase;
- /* Meta data about all descriptors. */
- struct b43_dmadesc_meta *meta;
- /* Cache of TX headers for each slot.
- * This is to avoid an allocation on each TX.
- * This is NULL for an RX ring.
- */
- u8 *txhdr_cache;
- /* (Unadjusted) DMA base bus-address of the ring memory. */
- dma_addr_t dmabase;
- /* Number of descriptor slots in the ring. */
- int nr_slots;
- /* Number of used descriptor slots. */
- int used_slots;
- /* Currently used slot in the ring. */
- int current_slot;
- /* Total number of packets sent. Statistics only. */
- unsigned int nr_tx_packets;
- /* Frameoffset in octets. */
- u32 frameoffset;
- /* Descriptor buffer size. */
- u16 rx_buffersize;
- /* The MMIO base register of the DMA controller. */
- u16 mmio_base;
- /* DMA controller index number (0-5). */
- int index;
- /* Boolean. Is this a TX ring? */
- bool tx;
- /* The type of DMA engine used. */
- enum b43_dmatype type;
- /* Boolean. Is this ring stopped at ieee80211 level? */
- bool stopped;
- /* The QOS priority assigned to this ring. Only used for TX rings.
- * This is the mac80211 "queue" value. */
- u8 queue_prio;
- /* Lock, only used for TX. */
- spinlock_t lock;
- struct b43_wldev *dev;
-#ifdef CONFIG_B43_DEBUG
- /* Maximum number of used slots. */
- int max_used_slots;
- /* Last time we injected a ring overflow. */
- unsigned long last_injected_overflow;
- /* Statistics: Number of successfully transmitted packets */
- u64 nr_succeed_tx_packets;
- /* Statistics: Number of failed TX packets */
- u64 nr_failed_tx_packets;
- /* Statistics: Total number of TX plus all retries. */
- u64 nr_total_packet_tries;
-#endif /* CONFIG_B43_DEBUG */
-};
-
-static inline u32 b43_dma_read(struct b43_dmaring *ring, u16 offset)
-{
- return b43_read32(ring->dev, ring->mmio_base + offset);
-}
-
-static inline void b43_dma_write(struct b43_dmaring *ring, u16 offset, u32 value)
-{
- b43_write32(ring->dev, ring->mmio_base + offset, value);
-}
-
-int b43_dma_init(struct b43_wldev *dev);
-void b43_dma_free(struct b43_wldev *dev);
-
-void b43_dma_tx_suspend(struct b43_wldev *dev);
-void b43_dma_tx_resume(struct b43_wldev *dev);
-
-void b43_dma_get_tx_stats(struct b43_wldev *dev,
- struct ieee80211_tx_queue_stats *stats);
-
-int b43_dma_tx(struct b43_wldev *dev,
- struct sk_buff *skb);
-void b43_dma_handle_txstatus(struct b43_wldev *dev,
- const struct b43_txstatus *status);
-
-void b43_dma_rx(struct b43_dmaring *ring);
-
-void b43_dma_direct_fifo_rx(struct b43_wldev *dev,
- unsigned int engine_index, bool enable);
-
-#endif /* B43_DMA_H_ */
-/*
-
- Broadcom B43 wireless driver
- LED control
-
- Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
- Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
- Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
- Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
- Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING. If not, write to
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
- Boston, MA 02110-1301, USA.
-
-*/
-
-#include "b43.h"
-#include "leds.h"
-
-
-static void b43_led_turn_on(struct b43_wldev *dev, u8 led_index,
- bool activelow)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
- u16 ctl;
-
- spin_lock_irqsave(&wl->leds_lock, flags);
- ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
- if (activelow)
- ctl &= ~(1 << led_index);
- else
- ctl |= (1 << led_index);
- b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
- spin_unlock_irqrestore(&wl->leds_lock, flags);
-}
-
-static void b43_led_turn_off(struct b43_wldev *dev, u8 led_index,
- bool activelow)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
- u16 ctl;
-
- spin_lock_irqsave(&wl->leds_lock, flags);
- ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
- if (activelow)
- ctl |= (1 << led_index);
- else
- ctl &= ~(1 << led_index);
- b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
- spin_unlock_irqrestore(&wl->leds_lock, flags);
-}
-
-/* Callback from the LED subsystem. */
-static void b43_led_brightness_set(struct led_classdev *led_dev,
- enum led_brightness brightness)
-{
- struct b43_led *led = container_of(led_dev, struct b43_led, led_dev);
- struct b43_wldev *dev = led->dev;
- bool radio_enabled;
-
- /* Checking the radio-enabled status here is slightly racy,
- * but we want to avoid the locking overhead and we don't care
- * whether the LED has the wrong state for a second. */
- radio_enabled = (dev->phy.radio_on && dev->radio_hw_enable);
-
- if (brightness == LED_OFF || !radio_enabled)
- b43_led_turn_off(dev, led->index, led->activelow);
- else
- b43_led_turn_on(dev, led->index, led->activelow);
-}
-
-static int b43_register_led(struct b43_wldev *dev, struct b43_led *led,
- const char *name, char *default_trigger,
- u8 led_index, bool activelow)
-{
- int err;
-
- b43_led_turn_off(dev, led_index, activelow);
- if (led->dev)
- return -EEXIST;
- if (!default_trigger)
- return -EINVAL;
- led->dev = dev;
- led->index = led_index;
- led->activelow = activelow;
- strncpy(led->name, name, sizeof(led->name));
-
- led->led_dev.name = led->name;
- led->led_dev.default_trigger = default_trigger;
- led->led_dev.brightness_set = b43_led_brightness_set;
-
- err = led_classdev_register(dev->dev->dev, &led->led_dev);
- if (err) {
- b43warn(dev->wl, "LEDs: Failed to register %s\n", name);
- led->dev = NULL;
- return err;
- }
- return 0;
-}
-
-static void b43_unregister_led(struct b43_led *led)
-{
- if (!led->dev)
- return;
- led_classdev_unregister(&led->led_dev);
- b43_led_turn_off(led->dev, led->index, led->activelow);
- led->dev = NULL;
-}
-
-static void b43_map_led(struct b43_wldev *dev,
- u8 led_index,
- enum b43_led_behaviour behaviour,
- bool activelow)
-{
- struct ieee80211_hw *hw = dev->wl->hw;
- char name[B43_LED_MAX_NAME_LEN + 1];
-
- /* Map the b43 specific LED behaviour value to the
- * generic LED triggers. */
- switch (behaviour) {
- case B43_LED_INACTIVE:
- break;
- case B43_LED_OFF:
- b43_led_turn_off(dev, led_index, activelow);
- break;
- case B43_LED_ON:
- b43_led_turn_on(dev, led_index, activelow);
- break;
- case B43_LED_ACTIVITY:
- case B43_LED_TRANSFER:
- case B43_LED_APTRANSFER:
- snprintf(name, sizeof(name),
- "b43-%s::tx", wiphy_name(hw->wiphy));
- b43_register_led(dev, &dev->led_tx, name,
- ieee80211_get_tx_led_name(hw),
- led_index, activelow);
- snprintf(name, sizeof(name),
- "b43-%s::rx", wiphy_name(hw->wiphy));
- b43_register_led(dev, &dev->led_rx, name,
- ieee80211_get_rx_led_name(hw),
- led_index, activelow);
- break;
- case B43_LED_RADIO_ALL:
- case B43_LED_RADIO_A:
- case B43_LED_RADIO_B:
- case B43_LED_MODE_BG:
- snprintf(name, sizeof(name),
- "b43-%s::radio", wiphy_name(hw->wiphy));
- b43_register_led(dev, &dev->led_radio, name,
- b43_rfkill_led_name(dev),
- led_index, activelow);
- /* Sync the RF-kill LED state with the switch state. */
- if (dev->radio_hw_enable)
- b43_led_turn_on(dev, led_index, activelow);
- break;
- case B43_LED_WEIRD:
- case B43_LED_ASSOC:
- snprintf(name, sizeof(name),
- "b43-%s::assoc", wiphy_name(hw->wiphy));
- b43_register_led(dev, &dev->led_assoc, name,
- ieee80211_get_assoc_led_name(hw),
- led_index, activelow);
- break;
- default:
- b43warn(dev->wl, "LEDs: Unknown behaviour 0x%02X\n",
- behaviour);
- break;
- }
-}
-
-void b43_leds_init(struct b43_wldev *dev)
-{
- struct ssb_bus *bus = dev->dev->bus;
- u8 sprom[4];
- int i;
- enum b43_led_behaviour behaviour;
- bool activelow;
-
- sprom[0] = bus->sprom.gpio0;
- sprom[1] = bus->sprom.gpio1;
- sprom[2] = bus->sprom.gpio2;
- sprom[3] = bus->sprom.gpio3;
-
- for (i = 0; i < 4; i++) {
- if (sprom[i] == 0xFF) {
- /* There is no LED information in the SPROM
- * for this LED. Hardcode it here. */
- activelow = 0;
- switch (i) {
- case 0:
- behaviour = B43_LED_ACTIVITY;
- activelow = 1;
- if (bus->boardinfo.vendor == PCI_VENDOR_ID_COMPAQ)
- behaviour = B43_LED_RADIO_ALL;
- break;
- case 1:
- behaviour = B43_LED_RADIO_B;
- if (bus->boardinfo.vendor == PCI_VENDOR_ID_ASUSTEK)
- behaviour = B43_LED_ASSOC;
- break;
- case 2:
- behaviour = B43_LED_RADIO_A;
- break;
- case 3:
- behaviour = B43_LED_OFF;
- break;
- default:
- B43_WARN_ON(1);
- return;
- }
- } else {
- behaviour = sprom[i] & B43_LED_BEHAVIOUR;
- activelow = !!(sprom[i] & B43_LED_ACTIVELOW);
- }
- b43_map_led(dev, i, behaviour, activelow);
- }
-}
-
-void b43_leds_exit(struct b43_wldev *dev)
-{
- b43_unregister_led(&dev->led_tx);
- b43_unregister_led(&dev->led_rx);
- b43_unregister_led(&dev->led_assoc);
- b43_unregister_led(&dev->led_radio);
-}
-#ifndef B43_LEDS_H_
-#define B43_LEDS_H_
-
-struct b43_wldev;
-
-#ifdef CONFIG_B43_LEDS
-
-#include <linux/types.h>
-#include <linux/leds.h>
-
-
-#define B43_LED_MAX_NAME_LEN 31
-
-struct b43_led {
- struct b43_wldev *dev;
- /* The LED class device */
- struct led_classdev led_dev;
- /* The index number of the LED. */
- u8 index;
- /* If activelow is true, the LED is ON if the
- * bit is switched off. */
- bool activelow;
- /* The unique name string for this LED device. */
- char name[B43_LED_MAX_NAME_LEN + 1];
-};
-
-#define B43_LED_BEHAVIOUR 0x7F
-#define B43_LED_ACTIVELOW 0x80
-/* LED behaviour values */
-enum b43_led_behaviour {
- B43_LED_OFF,
- B43_LED_ON,
- B43_LED_ACTIVITY,
- B43_LED_RADIO_ALL,
- B43_LED_RADIO_A,
- B43_LED_RADIO_B,
- B43_LED_MODE_BG,
- B43_LED_TRANSFER,
- B43_LED_APTRANSFER,
- B43_LED_WEIRD, //FIXME
- B43_LED_ASSOC,
- B43_LED_INACTIVE,
-};
-
-void b43_leds_init(struct b43_wldev *dev);
-void b43_leds_exit(struct b43_wldev *dev);
-
-
-#else /* CONFIG_B43_LEDS */
-/* LED support disabled */
-
-struct b43_led {
- /* empty */
-};
-
-static inline void b43_leds_init(struct b43_wldev *dev)
-{
-}
-static inline void b43_leds_exit(struct b43_wldev *dev)
-{
-}
-#endif /* CONFIG_B43_LEDS */
-
-#endif /* B43_LEDS_H_ */
-/*
-
- Broadcom B43 wireless driver
-
- G PHY LO (LocalOscillator) Measuring and Control routines
-
- Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
- Copyright (c) 2005, 2006 Stefano Brivio <stefano.brivio@polimi.it>
- Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
- Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
- Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING. If not, write to
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
- Boston, MA 02110-1301, USA.
-
-*/
-
-#include "b43.h"
-#include "lo.h"
-#include "phy.h"
-#include "main.h"
-
-#include <linux/delay.h>
-#include <linux/sched.h>
-
-
-static struct b43_lo_calib * b43_find_lo_calib(struct b43_txpower_lo_control *lo,
- const struct b43_bbatt *bbatt,
- const struct b43_rfatt *rfatt)
-{
- struct b43_lo_calib *c;
-
- list_for_each_entry(c, &lo->calib_list, list) {
- if (!b43_compare_bbatt(&c->bbatt, bbatt))
- continue;
- if (!b43_compare_rfatt(&c->rfatt, rfatt))
- continue;
- return c;
- }
-
- return NULL;
-}
-
-/* Write the LocalOscillator Control (adjust) value-pair. */
-static void b43_lo_write(struct b43_wldev *dev, struct b43_loctl *control)
-{
- struct b43_phy *phy = &dev->phy;
- u16 value;
-
- if (B43_DEBUG) {
- if (unlikely(abs(control->i) > 16 || abs(control->q) > 16)) {
- b43dbg(dev->wl, "Invalid LO control pair "
- "(I: %d, Q: %d)\n", control->i, control->q);
- dump_stack();
- return;
- }
- }
- B43_WARN_ON(phy->type != B43_PHYTYPE_G);
-
- value = (u8) (control->q);
- value |= ((u8) (control->i)) << 8;
- b43_phy_write(dev, B43_PHY_LO_CTL, value);
-}
-
-static u16 lo_measure_feedthrough(struct b43_wldev *dev,
- u16 lna, u16 pga, u16 trsw_rx)
-{
- struct b43_phy *phy = &dev->phy;
- u16 rfover;
- u16 feedthrough;
-
- if (phy->gmode) {
- lna <<= B43_PHY_RFOVERVAL_LNA_SHIFT;
- pga <<= B43_PHY_RFOVERVAL_PGA_SHIFT;
-
- B43_WARN_ON(lna & ~B43_PHY_RFOVERVAL_LNA);
- B43_WARN_ON(pga & ~B43_PHY_RFOVERVAL_PGA);
-/*FIXME This assertion fails B43_WARN_ON(trsw_rx & ~(B43_PHY_RFOVERVAL_TRSWRX |
- B43_PHY_RFOVERVAL_BW));
-*/
- trsw_rx &= (B43_PHY_RFOVERVAL_TRSWRX | B43_PHY_RFOVERVAL_BW);
-
- /* Construct the RF Override Value */
- rfover = B43_PHY_RFOVERVAL_UNK;
- rfover |= pga;
- rfover |= lna;
- rfover |= trsw_rx;
- if ((dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
- && phy->rev > 6)
- rfover |= B43_PHY_RFOVERVAL_EXTLNA;
-
- b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);
- b43_phy_write(dev, B43_PHY_RFOVERVAL, rfover);
- udelay(10);
- rfover |= B43_PHY_RFOVERVAL_BW_LBW;
- b43_phy_write(dev, B43_PHY_RFOVERVAL, rfover);
- udelay(10);
- rfover |= B43_PHY_RFOVERVAL_BW_LPF;
- b43_phy_write(dev, B43_PHY_RFOVERVAL, rfover);
- udelay(10);
- b43_phy_write(dev, B43_PHY_PGACTL, 0xF300);
- } else {
- pga |= B43_PHY_PGACTL_UNKNOWN;
- b43_phy_write(dev, B43_PHY_PGACTL, pga);
- udelay(10);
- pga |= B43_PHY_PGACTL_LOWBANDW;
- b43_phy_write(dev, B43_PHY_PGACTL, pga);
- udelay(10);
- pga |= B43_PHY_PGACTL_LPF;
- b43_phy_write(dev, B43_PHY_PGACTL, pga);
- }
- udelay(21);
- feedthrough = b43_phy_read(dev, B43_PHY_LO_LEAKAGE);
-
- /* This is a good place to check if we need to relax a bit,
- * as this is the main function called regularly
- * in the LO calibration. */
- cond_resched();
-
- return feedthrough;
-}
-
-/* TXCTL Register and Value Table.
- * Returns the "TXCTL Register".
- * "value" is the "TXCTL Value".
- * "pad_mix_gain" is the PAD Mixer Gain.
- */
-static u16 lo_txctl_register_table(struct b43_wldev *dev,
- u16 * value, u16 * pad_mix_gain)
-{
- struct b43_phy *phy = &dev->phy;
- u16 reg, v, padmix;
-
- if (phy->type == B43_PHYTYPE_B) {
- v = 0x30;
- if (phy->radio_rev <= 5) {
- reg = 0x43;
- padmix = 0;
- } else {
- reg = 0x52;
- padmix = 5;
- }
- } else {
- if (phy->rev >= 2 && phy->radio_rev == 8) {
- reg = 0x43;
- v = 0x10;
- padmix = 2;
- } else {
- reg = 0x52;
- v = 0x30;
- padmix = 5;
- }
- }
- if (value)
- *value = v;
- if (pad_mix_gain)
- *pad_mix_gain = padmix;
-
- return reg;
-}
-
-static void lo_measure_txctl_values(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_txpower_lo_control *lo = phy->lo_control;
- u16 reg, mask;
- u16 trsw_rx, pga;
- u16 radio_pctl_reg;
-
- static const u8 tx_bias_values[] = {
- 0x09, 0x08, 0x0A, 0x01, 0x00,
- 0x02, 0x05, 0x04, 0x06,
- };
- static const u8 tx_magn_values[] = {
- 0x70, 0x40,
- };
-
- if (!has_loopback_gain(phy)) {
- radio_pctl_reg = 6;
- trsw_rx = 2;
- pga = 0;
- } else {
- int lb_gain; /* Loopback gain (in dB) */
-
- trsw_rx = 0;
- lb_gain = phy->max_lb_gain / 2;
- if (lb_gain > 10) {
- radio_pctl_reg = 0;
- pga = abs(10 - lb_gain) / 6;
- pga = clamp_val(pga, 0, 15);
- } else {
- int cmp_val;
- int tmp;
-
- pga = 0;
- cmp_val = 0x24;
- if ((phy->rev >= 2) &&
- (phy->radio_ver == 0x2050) && (phy->radio_rev == 8))
- cmp_val = 0x3C;
- tmp = lb_gain;
- if ((10 - lb_gain) < cmp_val)
- tmp = (10 - lb_gain);
- if (tmp < 0)
- tmp += 6;
- else
- tmp += 3;
- cmp_val /= 4;
- tmp /= 4;
- if (tmp >= cmp_val)
- radio_pctl_reg = cmp_val;
- else
- radio_pctl_reg = tmp;
- }
- }
- b43_radio_write16(dev, 0x43, (b43_radio_read16(dev, 0x43)
- & 0xFFF0) | radio_pctl_reg);
- b43_phy_set_baseband_attenuation(dev, 2);
-
- reg = lo_txctl_register_table(dev, &mask, NULL);
- mask = ~mask;
- b43_radio_write16(dev, reg, b43_radio_read16(dev, reg)
- & mask);
-
- if (has_tx_magnification(phy)) {
- int i, j;
- int feedthrough;
- int min_feedth = 0xFFFF;
- u8 tx_magn, tx_bias;
-
- for (i = 0; i < ARRAY_SIZE(tx_magn_values); i++) {
- tx_magn = tx_magn_values[i];
- b43_radio_write16(dev, 0x52,
- (b43_radio_read16(dev, 0x52)
- & 0xFF0F) | tx_magn);
- for (j = 0; j < ARRAY_SIZE(tx_bias_values); j++) {
- tx_bias = tx_bias_values[j];
- b43_radio_write16(dev, 0x52,
- (b43_radio_read16(dev, 0x52)
- & 0xFFF0) | tx_bias);
- feedthrough =
- lo_measure_feedthrough(dev, 0, pga,
- trsw_rx);
- if (feedthrough < min_feedth) {
- lo->tx_bias = tx_bias;
- lo->tx_magn = tx_magn;
- min_feedth = feedthrough;
- }
- if (lo->tx_bias == 0)
- break;
- }
- b43_radio_write16(dev, 0x52,
- (b43_radio_read16(dev, 0x52)
- & 0xFF00) | lo->tx_bias | lo->
- tx_magn);
- }
- } else {
- lo->tx_magn = 0;
- lo->tx_bias = 0;
- b43_radio_write16(dev, 0x52, b43_radio_read16(dev, 0x52)
- & 0xFFF0); /* TX bias == 0 */
- }
- lo->txctl_measured_time = jiffies;
-}
-
-static void lo_read_power_vector(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_txpower_lo_control *lo = phy->lo_control;
- int i;
- u64 tmp;
- u64 power_vector = 0;
-
- for (i = 0; i < 8; i += 2) {
- tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x310 + i);
- power_vector |= (tmp << (i * 8));
- /* Clear the vector on the device. */
- b43_shm_write16(dev, B43_SHM_SHARED, 0x310 + i, 0);
- }
- if (power_vector)
- lo->power_vector = power_vector;
- lo->pwr_vec_read_time = jiffies;
-}
-
-/* 802.11/LO/GPHY/MeasuringGains */
-static void lo_measure_gain_values(struct b43_wldev *dev,
- s16 max_rx_gain, int use_trsw_rx)
-{
- struct b43_phy *phy = &dev->phy;
- u16 tmp;
-
- if (max_rx_gain < 0)
- max_rx_gain = 0;
-
- if (has_loopback_gain(phy)) {
- int trsw_rx = 0;
- int trsw_rx_gain;
-
- if (use_trsw_rx) {
- trsw_rx_gain = phy->trsw_rx_gain / 2;
- if (max_rx_gain >= trsw_rx_gain) {
- trsw_rx_gain = max_rx_gain - trsw_rx_gain;
- trsw_rx = 0x20;
- }
- } else
- trsw_rx_gain = max_rx_gain;
- if (trsw_rx_gain < 9) {
- phy->lna_lod_gain = 0;
- } else {
- phy->lna_lod_gain = 1;
- trsw_rx_gain -= 8;
- }
- trsw_rx_gain = clamp_val(trsw_rx_gain, 0, 0x2D);
- phy->pga_gain = trsw_rx_gain / 3;
- if (phy->pga_gain >= 5) {
- phy->pga_gain -= 5;
- phy->lna_gain = 2;
- } else
- phy->lna_gain = 0;
- } else {
- phy->lna_gain = 0;
- phy->trsw_rx_gain = 0x20;
- if (max_rx_gain >= 0x14) {
- phy->lna_lod_gain = 1;
- phy->pga_gain = 2;
- } else if (max_rx_gain >= 0x12) {
- phy->lna_lod_gain = 1;
- phy->pga_gain = 1;
- } else if (max_rx_gain >= 0xF) {
- phy->lna_lod_gain = 1;
- phy->pga_gain = 0;
- } else {
- phy->lna_lod_gain = 0;
- phy->pga_gain = 0;
- }
- }
-
- tmp = b43_radio_read16(dev, 0x7A);
- if (phy->lna_lod_gain == 0)
- tmp &= ~0x0008;
- else
- tmp |= 0x0008;
- b43_radio_write16(dev, 0x7A, tmp);
-}
-
-struct lo_g_saved_values {
- u8 old_channel;
-
- /* Core registers */
- u16 reg_3F4;
- u16 reg_3E2;
-
- /* PHY registers */
- u16 phy_lo_mask;
- u16 phy_extg_01;
- u16 phy_dacctl_hwpctl;
- u16 phy_dacctl;
- u16 phy_cck_14;
- u16 phy_hpwr_tssictl;
- u16 phy_analogover;
- u16 phy_analogoverval;
- u16 phy_rfover;
- u16 phy_rfoverval;
- u16 phy_classctl;
- u16 phy_cck_3E;
- u16 phy_crs0;
- u16 phy_pgactl;
- u16 phy_cck_2A;
- u16 phy_syncctl;
- u16 phy_cck_30;
- u16 phy_cck_06;
-
- /* Radio registers */
- u16 radio_43;
- u16 radio_7A;
- u16 radio_52;
-};
-
-static void lo_measure_setup(struct b43_wldev *dev,
- struct lo_g_saved_values *sav)
-{
- struct ssb_sprom *sprom = &dev->dev->bus->sprom;
- struct b43_phy *phy = &dev->phy;
- struct b43_txpower_lo_control *lo = phy->lo_control;
- u16 tmp;
-
- if (b43_has_hardware_pctl(phy)) {
- sav->phy_lo_mask = b43_phy_read(dev, B43_PHY_LO_MASK);
- sav->phy_extg_01 = b43_phy_read(dev, B43_PHY_EXTG(0x01));
- sav->phy_dacctl_hwpctl = b43_phy_read(dev, B43_PHY_DACCTL);
- sav->phy_cck_14 = b43_phy_read(dev, B43_PHY_CCK(0x14));
- sav->phy_hpwr_tssictl = b43_phy_read(dev, B43_PHY_HPWR_TSSICTL);
-
- b43_phy_write(dev, B43_PHY_HPWR_TSSICTL,
- b43_phy_read(dev, B43_PHY_HPWR_TSSICTL)
- | 0x100);
- b43_phy_write(dev, B43_PHY_EXTG(0x01),
- b43_phy_read(dev, B43_PHY_EXTG(0x01))
- | 0x40);
- b43_phy_write(dev, B43_PHY_DACCTL,
- b43_phy_read(dev, B43_PHY_DACCTL)
- | 0x40);
- b43_phy_write(dev, B43_PHY_CCK(0x14),
- b43_phy_read(dev, B43_PHY_CCK(0x14))
- | 0x200);
- }
- if (phy->type == B43_PHYTYPE_B &&
- phy->radio_ver == 0x2050 && phy->radio_rev < 6) {
- b43_phy_write(dev, B43_PHY_CCK(0x16), 0x410);
- b43_phy_write(dev, B43_PHY_CCK(0x17), 0x820);
- }
- if (phy->rev >= 2) {
- sav->phy_analogover = b43_phy_read(dev, B43_PHY_ANALOGOVER);
- sav->phy_analogoverval =
- b43_phy_read(dev, B43_PHY_ANALOGOVERVAL);
- sav->phy_rfover = b43_phy_read(dev, B43_PHY_RFOVER);
- sav->phy_rfoverval = b43_phy_read(dev, B43_PHY_RFOVERVAL);
- sav->phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL);
- sav->phy_cck_3E = b43_phy_read(dev, B43_PHY_CCK(0x3E));
- sav->phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0);
-
- b43_phy_write(dev, B43_PHY_CLASSCTL,
- b43_phy_read(dev, B43_PHY_CLASSCTL)
- & 0xFFFC);
- b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0)
- & 0x7FFF);
- b43_phy_write(dev, B43_PHY_ANALOGOVER,
- b43_phy_read(dev, B43_PHY_ANALOGOVER)
- | 0x0003);
- b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
- b43_phy_read(dev, B43_PHY_ANALOGOVERVAL)
- & 0xFFFC);
- if (phy->type == B43_PHYTYPE_G) {
- if ((phy->rev >= 7) &&
- (sprom->boardflags_lo & B43_BFL_EXTLNA)) {
- b43_phy_write(dev, B43_PHY_RFOVER, 0x933);
- } else {
- b43_phy_write(dev, B43_PHY_RFOVER, 0x133);
- }
- } else {
- b43_phy_write(dev, B43_PHY_RFOVER, 0);
- }
- b43_phy_write(dev, B43_PHY_CCK(0x3E), 0);
- }
- sav->reg_3F4 = b43_read16(dev, 0x3F4);
- sav->reg_3E2 = b43_read16(dev, 0x3E2);
- sav->radio_43 = b43_radio_read16(dev, 0x43);
- sav->radio_7A = b43_radio_read16(dev, 0x7A);
- sav->phy_pgactl = b43_phy_read(dev, B43_PHY_PGACTL);
- sav->phy_cck_2A = b43_phy_read(dev, B43_PHY_CCK(0x2A));
- sav->phy_syncctl = b43_phy_read(dev, B43_PHY_SYNCCTL);
- sav->phy_dacctl = b43_phy_read(dev, B43_PHY_DACCTL);
-
- if (!has_tx_magnification(phy)) {
- sav->radio_52 = b43_radio_read16(dev, 0x52);
- sav->radio_52 &= 0x00F0;
- }
- if (phy->type == B43_PHYTYPE_B) {
- sav->phy_cck_30 = b43_phy_read(dev, B43_PHY_CCK(0x30));
- sav->phy_cck_06 = b43_phy_read(dev, B43_PHY_CCK(0x06));
- b43_phy_write(dev, B43_PHY_CCK(0x30), 0x00FF);
- b43_phy_write(dev, B43_PHY_CCK(0x06), 0x3F3F);
- } else {
- b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2)
- | 0x8000);
- }
- b43_write16(dev, 0x3F4, b43_read16(dev, 0x3F4)
- & 0xF000);
-
- tmp =
- (phy->type == B43_PHYTYPE_G) ? B43_PHY_LO_MASK : B43_PHY_CCK(0x2E);
- b43_phy_write(dev, tmp, 0x007F);
-
- tmp = sav->phy_syncctl;
- b43_phy_write(dev, B43_PHY_SYNCCTL, tmp & 0xFF7F);
- tmp = sav->radio_7A;
- b43_radio_write16(dev, 0x007A, tmp & 0xFFF0);
-
- b43_phy_write(dev, B43_PHY_CCK(0x2A), 0x8A3);
- if (phy->type == B43_PHYTYPE_G ||
- (phy->type == B43_PHYTYPE_B &&
- phy->radio_ver == 0x2050 && phy->radio_rev >= 6)) {
- b43_phy_write(dev, B43_PHY_CCK(0x2B), 0x1003);
- } else
- b43_phy_write(dev, B43_PHY_CCK(0x2B), 0x0802);
- if (phy->rev >= 2)
- b43_dummy_transmission(dev);
- b43_radio_selectchannel(dev, 6, 0);
- b43_radio_read16(dev, 0x51); /* dummy read */
- if (phy->type == B43_PHYTYPE_G)
- b43_phy_write(dev, B43_PHY_CCK(0x2F), 0);
-
- /* Re-measure the txctl values, if needed. */
- if (time_before(lo->txctl_measured_time,
- jiffies - B43_LO_TXCTL_EXPIRE))
- lo_measure_txctl_values(dev);
-
- if (phy->type == B43_PHYTYPE_G && phy->rev >= 3) {
- b43_phy_write(dev, B43_PHY_LO_MASK, 0xC078);
- } else {
- if (phy->type == B43_PHYTYPE_B)
- b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8078);
- else
- b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
- }
-}
-
-static void lo_measure_restore(struct b43_wldev *dev,
- struct lo_g_saved_values *sav)
-{
- struct b43_phy *phy = &dev->phy;
- u16 tmp;
-
- if (phy->rev >= 2) {
- b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);
- tmp = (phy->pga_gain << 8);
- b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA0);
- udelay(5);
- b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA2);
- udelay(2);
- b43_phy_write(dev, B43_PHY_RFOVERVAL, tmp | 0xA3);
- } else {
- tmp = (phy->pga_gain | 0xEFA0);
- b43_phy_write(dev, B43_PHY_PGACTL, tmp);
- }
- if (phy->type == B43_PHYTYPE_G) {
- if (phy->rev >= 3)
- b43_phy_write(dev, B43_PHY_CCK(0x2E), 0xC078);
- else
- b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8078);
- if (phy->rev >= 2)
- b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x0202);
- else
- b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x0101);
- }
- b43_write16(dev, 0x3F4, sav->reg_3F4);
- b43_phy_write(dev, B43_PHY_PGACTL, sav->phy_pgactl);
- b43_phy_write(dev, B43_PHY_CCK(0x2A), sav->phy_cck_2A);
- b43_phy_write(dev, B43_PHY_SYNCCTL, sav->phy_syncctl);
- b43_phy_write(dev, B43_PHY_DACCTL, sav->phy_dacctl);
- b43_radio_write16(dev, 0x43, sav->radio_43);
- b43_radio_write16(dev, 0x7A, sav->radio_7A);
- if (!has_tx_magnification(phy)) {
- tmp = sav->radio_52;
- b43_radio_write16(dev, 0x52, (b43_radio_read16(dev, 0x52)
- & 0xFF0F) | tmp);
- }
- b43_write16(dev, 0x3E2, sav->reg_3E2);
- if (phy->type == B43_PHYTYPE_B &&
- phy->radio_ver == 0x2050 && phy->radio_rev <= 5) {
- b43_phy_write(dev, B43_PHY_CCK(0x30), sav->phy_cck_30);
- b43_phy_write(dev, B43_PHY_CCK(0x06), sav->phy_cck_06);
- }
- if (phy->rev >= 2) {
- b43_phy_write(dev, B43_PHY_ANALOGOVER, sav->phy_analogover);
- b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
- sav->phy_analogoverval);
- b43_phy_write(dev, B43_PHY_CLASSCTL, sav->phy_classctl);
- b43_phy_write(dev, B43_PHY_RFOVER, sav->phy_rfover);
- b43_phy_write(dev, B43_PHY_RFOVERVAL, sav->phy_rfoverval);
- b43_phy_write(dev, B43_PHY_CCK(0x3E), sav->phy_cck_3E);
- b43_phy_write(dev, B43_PHY_CRS0, sav->phy_crs0);
- }
- if (b43_has_hardware_pctl(phy)) {
- tmp = (sav->phy_lo_mask & 0xBFFF);
- b43_phy_write(dev, B43_PHY_LO_MASK, tmp);
- b43_phy_write(dev, B43_PHY_EXTG(0x01), sav->phy_extg_01);
- b43_phy_write(dev, B43_PHY_DACCTL, sav->phy_dacctl_hwpctl);
- b43_phy_write(dev, B43_PHY_CCK(0x14), sav->phy_cck_14);
- b43_phy_write(dev, B43_PHY_HPWR_TSSICTL, sav->phy_hpwr_tssictl);
- }
- b43_radio_selectchannel(dev, sav->old_channel, 1);
-}
-
-struct b43_lo_g_statemachine {
- int current_state;
- int nr_measured;
- int state_val_multiplier;
- u16 lowest_feedth;
- struct b43_loctl min_loctl;
-};
-
-/* Loop over each possible value in this state. */
-static int lo_probe_possible_loctls(struct b43_wldev *dev,
- struct b43_loctl *probe_loctl,
- struct b43_lo_g_statemachine *d)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_loctl test_loctl;
- struct b43_loctl orig_loctl;
- struct b43_loctl prev_loctl = {
- .i = -100,
- .q = -100,
- };
- int i;
- int begin, end;
- int found_lower = 0;
- u16 feedth;
-
- static const struct b43_loctl modifiers[] = {
- {.i = 1,.q = 1,},
- {.i = 1,.q = 0,},
- {.i = 1,.q = -1,},
- {.i = 0,.q = -1,},
- {.i = -1,.q = -1,},
- {.i = -1,.q = 0,},
- {.i = -1,.q = 1,},
- {.i = 0,.q = 1,},
- };
-
- if (d->current_state == 0) {
- begin = 1;
- end = 8;
- } else if (d->current_state % 2 == 0) {
- begin = d->current_state - 1;
- end = d->current_state + 1;
- } else {
- begin = d->current_state - 2;
- end = d->current_state + 2;
- }
- if (begin < 1)
- begin += 8;
- if (end > 8)
- end -= 8;
-
- memcpy(&orig_loctl, probe_loctl, sizeof(struct b43_loctl));
- i = begin;
- d->current_state = i;
- while (1) {
- B43_WARN_ON(!(i >= 1 && i <= 8));
- memcpy(&test_loctl, &orig_loctl, sizeof(struct b43_loctl));
- test_loctl.i += modifiers[i - 1].i * d->state_val_multiplier;
- test_loctl.q += modifiers[i - 1].q * d->state_val_multiplier;
- if ((test_loctl.i != prev_loctl.i ||
- test_loctl.q != prev_loctl.q) &&
- (abs(test_loctl.i) <= 16 && abs(test_loctl.q) <= 16)) {
- b43_lo_write(dev, &test_loctl);
- feedth = lo_measure_feedthrough(dev, phy->lna_gain,
- phy->pga_gain,
- phy->trsw_rx_gain);
- if (feedth < d->lowest_feedth) {
- memcpy(probe_loctl, &test_loctl,
- sizeof(struct b43_loctl));
- found_lower = 1;
- d->lowest_feedth = feedth;
- if ((d->nr_measured < 2) &&
- !has_loopback_gain(phy))
- break;
- }
- }
- memcpy(&prev_loctl, &test_loctl, sizeof(prev_loctl));
- if (i == end)
- break;
- if (i == 8)
- i = 1;
- else
- i++;
- d->current_state = i;
- }
-
- return found_lower;
-}
-
-static void lo_probe_loctls_statemachine(struct b43_wldev *dev,
- struct b43_loctl *loctl,
- int *max_rx_gain)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_lo_g_statemachine d;
- u16 feedth;
- int found_lower;
- struct b43_loctl probe_loctl;
- int max_repeat = 1, repeat_cnt = 0;
-
- d.nr_measured = 0;
- d.state_val_multiplier = 1;
- if (has_loopback_gain(phy))
- d.state_val_multiplier = 3;
-
- memcpy(&d.min_loctl, loctl, sizeof(struct b43_loctl));
- if (has_loopback_gain(phy))
- max_repeat = 4;
- do {
- b43_lo_write(dev, &d.min_loctl);
- feedth = lo_measure_feedthrough(dev, phy->lna_gain,
- phy->pga_gain,
- phy->trsw_rx_gain);
- if (feedth < 0x258) {
- if (feedth >= 0x12C)
- *max_rx_gain += 6;
- else
- *max_rx_gain += 3;
- feedth = lo_measure_feedthrough(dev, phy->lna_gain,
- phy->pga_gain,
- phy->trsw_rx_gain);
- }
- d.lowest_feedth = feedth;
-
- d.current_state = 0;
- do {
- B43_WARN_ON(!
- (d.current_state >= 0
- && d.current_state <= 8));
- memcpy(&probe_loctl, &d.min_loctl,
- sizeof(struct b43_loctl));
- found_lower =
- lo_probe_possible_loctls(dev, &probe_loctl, &d);
- if (!found_lower)
- break;
- if ((probe_loctl.i == d.min_loctl.i) &&
- (probe_loctl.q == d.min_loctl.q))
- break;
- memcpy(&d.min_loctl, &probe_loctl,
- sizeof(struct b43_loctl));
- d.nr_measured++;
- } while (d.nr_measured < 24);
- memcpy(loctl, &d.min_loctl, sizeof(struct b43_loctl));
-
- if (has_loopback_gain(phy)) {
- if (d.lowest_feedth > 0x1194)
- *max_rx_gain -= 6;
- else if (d.lowest_feedth < 0x5DC)
- *max_rx_gain += 3;
- if (repeat_cnt == 0) {
- if (d.lowest_feedth <= 0x5DC) {
- d.state_val_multiplier = 1;
- repeat_cnt++;
- } else
- d.state_val_multiplier = 2;
- } else if (repeat_cnt == 2)
- d.state_val_multiplier = 1;
- }
- lo_measure_gain_values(dev, *max_rx_gain,
- has_loopback_gain(phy));
- } while (++repeat_cnt < max_repeat);
-}
-
-static
-struct b43_lo_calib * b43_calibrate_lo_setting(struct b43_wldev *dev,
- const struct b43_bbatt *bbatt,
- const struct b43_rfatt *rfatt)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_loctl loctl = {
- .i = 0,
- .q = 0,
- };
- int max_rx_gain;
- struct b43_lo_calib *cal;
- struct lo_g_saved_values uninitialized_var(saved_regs);
- /* Values from the "TXCTL Register and Value Table" */
- u16 txctl_reg;
- u16 txctl_value;
- u16 pad_mix_gain;
-
- saved_regs.old_channel = phy->channel;
- b43_mac_suspend(dev);
- lo_measure_setup(dev, &saved_regs);
-
- txctl_reg = lo_txctl_register_table(dev, &txctl_value, &pad_mix_gain);
-
- b43_radio_write16(dev, 0x43,
- (b43_radio_read16(dev, 0x43) & 0xFFF0)
- | rfatt->att);
- b43_radio_write16(dev, txctl_reg,
- (b43_radio_read16(dev, txctl_reg) & ~txctl_value)
- | (rfatt->with_padmix) ? txctl_value : 0);
-
- max_rx_gain = rfatt->att * 2;
- max_rx_gain += bbatt->att / 2;
- if (rfatt->with_padmix)
- max_rx_gain -= pad_mix_gain;
- if (has_loopback_gain(phy))
- max_rx_gain += phy->max_lb_gain;
- lo_measure_gain_values(dev, max_rx_gain,
- has_loopback_gain(phy));
-
- b43_phy_set_baseband_attenuation(dev, bbatt->att);
- lo_probe_loctls_statemachine(dev, &loctl, &max_rx_gain);
-
- lo_measure_restore(dev, &saved_regs);
- b43_mac_enable(dev);
-
- if (b43_debug(dev, B43_DBG_LO)) {
- b43dbg(dev->wl, "LO: Calibrated for BB(%u), RF(%u,%u) "
- "=> I=%d Q=%d\n",
- bbatt->att, rfatt->att, rfatt->with_padmix,
- loctl.i, loctl.q);
- }
-
- cal = kmalloc(sizeof(*cal), GFP_KERNEL);
- if (!cal) {
- b43warn(dev->wl, "LO calib: out of memory\n");
- return NULL;
- }
- memcpy(&cal->bbatt, bbatt, sizeof(*bbatt));
- memcpy(&cal->rfatt, rfatt, sizeof(*rfatt));
- memcpy(&cal->ctl, &loctl, sizeof(loctl));
- cal->calib_time = jiffies;
- INIT_LIST_HEAD(&cal->list);
-
- return cal;
-}
-
-/* Get a calibrated LO setting for the given attenuation values.
- * Might return a NULL pointer under OOM! */
-static
-struct b43_lo_calib * b43_get_calib_lo_settings(struct b43_wldev *dev,
- const struct b43_bbatt *bbatt,
- const struct b43_rfatt *rfatt)
-{
- struct b43_txpower_lo_control *lo = dev->phy.lo_control;
- struct b43_lo_calib *c;
-
- c = b43_find_lo_calib(lo, bbatt, rfatt);
- if (c)
- return c;
- /* Not in the list of calibrated LO settings.
- * Calibrate it now. */
- c = b43_calibrate_lo_setting(dev, bbatt, rfatt);
- if (!c)
- return NULL;
- list_add(&c->list, &lo->calib_list);
-
- return c;
-}
-
-void b43_gphy_dc_lt_init(struct b43_wldev *dev, bool update_all)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_txpower_lo_control *lo = phy->lo_control;
- int i;
- int rf_offset, bb_offset;
- const struct b43_rfatt *rfatt;
- const struct b43_bbatt *bbatt;
- u64 power_vector;
- bool table_changed = 0;
-
- BUILD_BUG_ON(B43_DC_LT_SIZE != 32);
- B43_WARN_ON(lo->rfatt_list.len * lo->bbatt_list.len > 64);
-
- power_vector = lo->power_vector;
- if (!update_all && !power_vector)
- return; /* Nothing to do. */
-
- /* Suspend the MAC now to avoid continuous suspend/enable
- * cycles in the loop. */
- b43_mac_suspend(dev);
-
- for (i = 0; i < B43_DC_LT_SIZE * 2; i++) {
- struct b43_lo_calib *cal;
- int idx;
- u16 val;
-
- if (!update_all && !(power_vector & (((u64)1ULL) << i)))
- continue;
- /* Update the table entry for this power_vector bit.
- * The table rows are RFatt entries and columns are BBatt. */
- bb_offset = i / lo->rfatt_list.len;
- rf_offset = i % lo->rfatt_list.len;
- bbatt = &(lo->bbatt_list.list[bb_offset]);
- rfatt = &(lo->rfatt_list.list[rf_offset]);
-
- cal = b43_calibrate_lo_setting(dev, bbatt, rfatt);
- if (!cal) {
- b43warn(dev->wl, "LO: Could not "
- "calibrate DC table entry\n");
- continue;
- }
- /*FIXME: Is Q really in the low nibble? */
- val = (u8)(cal->ctl.q);
- val |= ((u8)(cal->ctl.i)) << 4;
- kfree(cal);
-
- /* Get the index into the hardware DC LT. */
- idx = i / 2;
- /* Change the table in memory. */
- if (i % 2) {
- /* Change the high byte. */
- lo->dc_lt[idx] = (lo->dc_lt[idx] & 0x00FF)
- | ((val & 0x00FF) << 8);
- } else {
- /* Change the low byte. */
- lo->dc_lt[idx] = (lo->dc_lt[idx] & 0xFF00)
- | (val & 0x00FF);
- }
- table_changed = 1;
- }
- if (table_changed) {
- /* The table changed in memory. Update the hardware table. */
- for (i = 0; i < B43_DC_LT_SIZE; i++)
- b43_phy_write(dev, 0x3A0 + i, lo->dc_lt[i]);
- }
- b43_mac_enable(dev);
-}
-
-/* Fixup the RF attenuation value for the case where we are
- * using the PAD mixer. */
-static inline void b43_lo_fixup_rfatt(struct b43_rfatt *rf)
-{
- if (!rf->with_padmix)
- return;
- if ((rf->att != 1) && (rf->att != 2) && (rf->att != 3))
- rf->att = 4;
-}
-
-void b43_lo_g_adjust(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_lo_calib *cal;
- struct b43_rfatt rf;
-
- memcpy(&rf, &phy->rfatt, sizeof(rf));
- b43_lo_fixup_rfatt(&rf);
-
- cal = b43_get_calib_lo_settings(dev, &phy->bbatt, &rf);
- if (!cal)
- return;
- b43_lo_write(dev, &cal->ctl);
-}
-
-void b43_lo_g_adjust_to(struct b43_wldev *dev,
- u16 rfatt, u16 bbatt, u16 tx_control)
-{
- struct b43_rfatt rf;
- struct b43_bbatt bb;
- struct b43_lo_calib *cal;
-
- memset(&rf, 0, sizeof(rf));
- memset(&bb, 0, sizeof(bb));
- rf.att = rfatt;
- bb.att = bbatt;
- b43_lo_fixup_rfatt(&rf);
- cal = b43_get_calib_lo_settings(dev, &bb, &rf);
- if (!cal)
- return;
- b43_lo_write(dev, &cal->ctl);
-}
-
-/* Periodic LO maintanance work */
-void b43_lo_g_maintanance_work(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
- struct b43_txpower_lo_control *lo = phy->lo_control;
- unsigned long now;
- unsigned long expire;
- struct b43_lo_calib *cal, *tmp;
- bool current_item_expired = 0;
- bool hwpctl;
-
- if (!lo)
- return;
- now = jiffies;
- hwpctl = b43_has_hardware_pctl(phy);
-
- if (hwpctl) {
- /* Read the power vector and update it, if needed. */
- expire = now - B43_LO_PWRVEC_EXPIRE;
- if (time_before(lo->pwr_vec_read_time, expire)) {
- lo_read_power_vector(dev);
- b43_gphy_dc_lt_init(dev, 0);
- }
- //FIXME Recalc the whole DC table from time to time?
- }
-
- if (hwpctl)
- return;
- /* Search for expired LO settings. Remove them.
- * Recalibrate the current setting, if expired. */
- expire = now - B43_LO_CALIB_EXPIRE;
- list_for_each_entry_safe(cal, tmp, &lo->calib_list, list) {
- if (!time_before(cal->calib_time, expire))
- continue;
- /* This item expired. */
- if (b43_compare_bbatt(&cal->bbatt, &phy->bbatt) &&
- b43_compare_rfatt(&cal->rfatt, &phy->rfatt)) {
- B43_WARN_ON(current_item_expired);
- current_item_expired = 1;
- }
- if (b43_debug(dev, B43_DBG_LO)) {
- b43dbg(dev->wl, "LO: Item BB(%u), RF(%u,%u), "
- "I=%d, Q=%d expired\n",
- cal->bbatt.att, cal->rfatt.att,
- cal->rfatt.with_padmix,
- cal->ctl.i, cal->ctl.q);
- }
- list_del(&cal->list);
- kfree(cal);
- }
- if (current_item_expired || unlikely(list_empty(&lo->calib_list))) {
- /* Recalibrate currently used LO setting. */
- if (b43_debug(dev, B43_DBG_LO))
- b43dbg(dev->wl, "LO: Recalibrating current LO setting\n");
- cal = b43_calibrate_lo_setting(dev, &phy->bbatt, &phy->rfatt);
- if (cal) {
- list_add(&cal->list, &lo->calib_list);
- b43_lo_write(dev, &cal->ctl);
- } else
- b43warn(dev->wl, "Failed to recalibrate current LO setting\n");
- }
-}
-
-void b43_lo_g_cleanup(struct b43_wldev *dev)
-{
- struct b43_txpower_lo_control *lo = dev->phy.lo_control;
- struct b43_lo_calib *cal, *tmp;
-
- if (!lo)
- return;
- list_for_each_entry_safe(cal, tmp, &lo->calib_list, list) {
- list_del(&cal->list);
- kfree(cal);
- }
-}
-
-/* LO Initialization */
-void b43_lo_g_init(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
-
- if (b43_has_hardware_pctl(phy)) {
- lo_read_power_vector(dev);
- b43_gphy_dc_lt_init(dev, 1);
- }
-}
-#ifndef B43_LO_H_
-#define B43_LO_H_
-
-#include "phy.h"
-
-struct b43_wldev;
-
-/* Local Oscillator control value-pair. */
-struct b43_loctl {
- /* Control values. */
- s8 i;
- s8 q;
-};
-/* Debugging: Poison value for i and q values. */
-#define B43_LOCTL_POISON 111
-
-/* This struct holds calibrated LO settings for a set of
- * Baseband and RF attenuation settings. */
-struct b43_lo_calib {
- /* The set of attenuation values this set of LO
- * control values is calibrated for. */
- struct b43_bbatt bbatt;
- struct b43_rfatt rfatt;
- /* The set of control values for the LO. */
- struct b43_loctl ctl;
- /* The time when these settings were calibrated (in jiffies) */
- unsigned long calib_time;
- /* List. */
- struct list_head list;
-};
-
-/* Size of the DC Lookup Table in 16bit words. */
-#define B43_DC_LT_SIZE 32
-
-/* Local Oscillator calibration information */
-struct b43_txpower_lo_control {
- /* Lists of RF and BB attenuation values for this device.
- * Used for building hardware power control tables. */
- struct b43_rfatt_list rfatt_list;
- struct b43_bbatt_list bbatt_list;
-
- /* The DC Lookup Table is cached in memory here.
- * Note that this is only used for Hardware Power Control. */
- u16 dc_lt[B43_DC_LT_SIZE];
-
- /* List of calibrated control values (struct b43_lo_calib). */
- struct list_head calib_list;
- /* Last time the power vector was read (jiffies). */
- unsigned long pwr_vec_read_time;
- /* Last time the txctl values were measured (jiffies). */
- unsigned long txctl_measured_time;
-
- /* Current TX Bias value */
- u8 tx_bias;
- /* Current TX Magnification Value (if used by the device) */
- u8 tx_magn;
-
- /* Saved device PowerVector */
- u64 power_vector;
-};
-
-/* Calibration expire timeouts.
- * Timeouts must be multiple of 15 seconds. To make sure
- * the item really expired when the 15 second timer hits, we
- * subtract two additional seconds from the timeout. */
-#define B43_LO_CALIB_EXPIRE (HZ * (30 - 2))
-#define B43_LO_PWRVEC_EXPIRE (HZ * (30 - 2))
-#define B43_LO_TXCTL_EXPIRE (HZ * (180 - 4))
-
-
-/* Adjust the Local Oscillator to the saved attenuation
- * and txctl values.
- */
-void b43_lo_g_adjust(struct b43_wldev *dev);
-/* Adjust to specific values. */
-void b43_lo_g_adjust_to(struct b43_wldev *dev,
- u16 rfatt, u16 bbatt, u16 tx_control);
-
-void b43_gphy_dc_lt_init(struct b43_wldev *dev, bool update_all);
-
-void b43_lo_g_maintanance_work(struct b43_wldev *dev);
-void b43_lo_g_cleanup(struct b43_wldev *dev);
-void b43_lo_g_init(struct b43_wldev *dev);
-
-#endif /* B43_LO_H_ */
-/*
-
- Broadcom B43 wireless driver
-
- Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
- Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
- Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
- Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
- Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
-
- Some parts of the code in this file are derived from the ipw2200
- driver Copyright(c) 2003 - 2004 Intel Corporation.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING. If not, write to
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
- Boston, MA 02110-1301, USA.
-
-*/
-
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/moduleparam.h>
-#include <linux/if_arp.h>
-#include <linux/etherdevice.h>
-#include <linux/version.h>
-#include <linux/firmware.h>
-#include <linux/wireless.h>
-#include <linux/workqueue.h>
-#include <linux/skbuff.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-#include <asm/unaligned.h>
-
-#include "b43.h"
-#include "main.h"
-#include "debugfs.h"
-#include "phy.h"
-#include "nphy.h"
-#include "dma.h"
-#include "pio.h"
-#include "sysfs.h"
-#include "xmit.h"
-#include "lo.h"
-#include "pcmcia.h"
-
-MODULE_DESCRIPTION("Broadcom B43 wireless driver");
-MODULE_AUTHOR("Martin Langer");
-MODULE_AUTHOR("Stefano Brivio");
-MODULE_AUTHOR("Michael Buesch");
-MODULE_LICENSE("GPL");
-
-MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID);
-
-
-static int modparam_bad_frames_preempt;
-module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
-MODULE_PARM_DESC(bad_frames_preempt,
- "enable(1) / disable(0) Bad Frames Preemption");
-
-static char modparam_fwpostfix[16];
-module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
-MODULE_PARM_DESC(fwpostfix, "Postfix for the .fw files to load.");
-
-static int modparam_hwpctl;
-module_param_named(hwpctl, modparam_hwpctl, int, 0444);
-MODULE_PARM_DESC(hwpctl, "Enable hardware-side power control (default off)");
-
-static int modparam_nohwcrypt;
-module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
-MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
-
-int b43_modparam_qos = 1;
-module_param_named(qos, b43_modparam_qos, int, 0444);
-MODULE_PARM_DESC(qos, "Enable QOS support (default on)");
-
-static int modparam_btcoex = 1;
-module_param_named(btcoex, modparam_btcoex, int, 0444);
-MODULE_PARM_DESC(btcoex, "Enable Bluetooth coexistance (default on)");
-
-
-static const struct ssb_device_id b43_ssb_tbl[] = {
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 6),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 11),
- SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
- SSB_DEVTABLE_END
-};
-
-MODULE_DEVICE_TABLE(ssb, b43_ssb_tbl);
-
-/* Channel and ratetables are shared for all devices.
- * They can't be const, because ieee80211 puts some precalculated
- * data in there. This data is the same for all devices, so we don't
- * get concurrency issues */
-#define RATETAB_ENT(_rateid, _flags) \
- { \
- .bitrate = B43_RATE_TO_BASE100KBPS(_rateid), \
- .hw_value = (_rateid), \
- .flags = (_flags), \
- }
-
-/*
- * NOTE: When changing this, sync with xmit.c's
- * b43_plcp_get_bitrate_idx_* functions!
- */
-static struct ieee80211_rate __b43_ratetable[] = {
- RATETAB_ENT(B43_CCK_RATE_1MB, 0),
- RATETAB_ENT(B43_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
- RATETAB_ENT(B43_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
- RATETAB_ENT(B43_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
- RATETAB_ENT(B43_OFDM_RATE_6MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_9MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_12MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_18MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_24MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_36MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_48MB, 0),
- RATETAB_ENT(B43_OFDM_RATE_54MB, 0),
-};
-
-#define b43_a_ratetable (__b43_ratetable + 4)
-#define b43_a_ratetable_size 8
-#define b43_b_ratetable (__b43_ratetable + 0)
-#define b43_b_ratetable_size 4
-#define b43_g_ratetable (__b43_ratetable + 0)
-#define b43_g_ratetable_size 12
-
-#define CHAN4G(_channel, _freq, _flags) { \
- .band = IEEE80211_BAND_2GHZ, \
- .center_freq = (_freq), \
- .hw_value = (_channel), \
- .flags = (_flags), \
- .max_antenna_gain = 0, \
- .max_power = 30, \
-}
-static struct ieee80211_channel b43_2ghz_chantable[] = {
- CHAN4G(1, 2412, 0),
- CHAN4G(2, 2417, 0),
- CHAN4G(3, 2422, 0),
- CHAN4G(4, 2427, 0),
- CHAN4G(5, 2432, 0),
- CHAN4G(6, 2437, 0),
- CHAN4G(7, 2442, 0),
- CHAN4G(8, 2447, 0),
- CHAN4G(9, 2452, 0),
- CHAN4G(10, 2457, 0),
- CHAN4G(11, 2462, 0),
- CHAN4G(12, 2467, 0),
- CHAN4G(13, 2472, 0),
- CHAN4G(14, 2484, 0),
-};
-#undef CHAN4G
-
-#define CHAN5G(_channel, _flags) { \
- .band = IEEE80211_BAND_5GHZ, \
- .center_freq = 5000 + (5 * (_channel)), \
- .hw_value = (_channel), \
- .flags = (_flags), \
- .max_antenna_gain = 0, \
- .max_power = 30, \
-}
-static struct ieee80211_channel b43_5ghz_nphy_chantable[] = {
- CHAN5G(32, 0), CHAN5G(34, 0),
- CHAN5G(36, 0), CHAN5G(38, 0),
- CHAN5G(40, 0), CHAN5G(42, 0),
- CHAN5G(44, 0), CHAN5G(46, 0),
- CHAN5G(48, 0), CHAN5G(50, 0),
- CHAN5G(52, 0), CHAN5G(54, 0),
- CHAN5G(56, 0), CHAN5G(58, 0),
- CHAN5G(60, 0), CHAN5G(62, 0),
- CHAN5G(64, 0), CHAN5G(66, 0),
- CHAN5G(68, 0), CHAN5G(70, 0),
- CHAN5G(72, 0), CHAN5G(74, 0),
- CHAN5G(76, 0), CHAN5G(78, 0),
- CHAN5G(80, 0), CHAN5G(82, 0),
- CHAN5G(84, 0), CHAN5G(86, 0),
- CHAN5G(88, 0), CHAN5G(90, 0),
- CHAN5G(92, 0), CHAN5G(94, 0),
- CHAN5G(96, 0), CHAN5G(98, 0),
- CHAN5G(100, 0), CHAN5G(102, 0),
- CHAN5G(104, 0), CHAN5G(106, 0),
- CHAN5G(108, 0), CHAN5G(110, 0),
- CHAN5G(112, 0), CHAN5G(114, 0),
- CHAN5G(116, 0), CHAN5G(118, 0),
- CHAN5G(120, 0), CHAN5G(122, 0),
- CHAN5G(124, 0), CHAN5G(126, 0),
- CHAN5G(128, 0), CHAN5G(130, 0),
- CHAN5G(132, 0), CHAN5G(134, 0),
- CHAN5G(136, 0), CHAN5G(138, 0),
- CHAN5G(140, 0), CHAN5G(142, 0),
- CHAN5G(144, 0), CHAN5G(145, 0),
- CHAN5G(146, 0), CHAN5G(147, 0),
- CHAN5G(148, 0), CHAN5G(149, 0),
- CHAN5G(150, 0), CHAN5G(151, 0),
- CHAN5G(152, 0), CHAN5G(153, 0),
- CHAN5G(154, 0), CHAN5G(155, 0),
- CHAN5G(156, 0), CHAN5G(157, 0),
- CHAN5G(158, 0), CHAN5G(159, 0),
- CHAN5G(160, 0), CHAN5G(161, 0),
- CHAN5G(162, 0), CHAN5G(163, 0),
- CHAN5G(164, 0), CHAN5G(165, 0),
- CHAN5G(166, 0), CHAN5G(168, 0),
- CHAN5G(170, 0), CHAN5G(172, 0),
- CHAN5G(174, 0), CHAN5G(176, 0),
- CHAN5G(178, 0), CHAN5G(180, 0),
- CHAN5G(182, 0), CHAN5G(184, 0),
- CHAN5G(186, 0), CHAN5G(188, 0),
- CHAN5G(190, 0), CHAN5G(192, 0),
- CHAN5G(194, 0), CHAN5G(196, 0),
- CHAN5G(198, 0), CHAN5G(200, 0),
- CHAN5G(202, 0), CHAN5G(204, 0),
- CHAN5G(206, 0), CHAN5G(208, 0),
- CHAN5G(210, 0), CHAN5G(212, 0),
- CHAN5G(214, 0), CHAN5G(216, 0),
- CHAN5G(218, 0), CHAN5G(220, 0),
- CHAN5G(222, 0), CHAN5G(224, 0),
- CHAN5G(226, 0), CHAN5G(228, 0),
-};
-
-static struct ieee80211_channel b43_5ghz_aphy_chantable[] = {
- CHAN5G(34, 0), CHAN5G(36, 0),
- CHAN5G(38, 0), CHAN5G(40, 0),
- CHAN5G(42, 0), CHAN5G(44, 0),
- CHAN5G(46, 0), CHAN5G(48, 0),
- CHAN5G(52, 0), CHAN5G(56, 0),
- CHAN5G(60, 0), CHAN5G(64, 0),
- CHAN5G(100, 0), CHAN5G(104, 0),
- CHAN5G(108, 0), CHAN5G(112, 0),
- CHAN5G(116, 0), CHAN5G(120, 0),
- CHAN5G(124, 0), CHAN5G(128, 0),
- CHAN5G(132, 0), CHAN5G(136, 0),
- CHAN5G(140, 0), CHAN5G(149, 0),
- CHAN5G(153, 0), CHAN5G(157, 0),
- CHAN5G(161, 0), CHAN5G(165, 0),
- CHAN5G(184, 0), CHAN5G(188, 0),
- CHAN5G(192, 0), CHAN5G(196, 0),
- CHAN5G(200, 0), CHAN5G(204, 0),
- CHAN5G(208, 0), CHAN5G(212, 0),
- CHAN5G(216, 0),
-};
-#undef CHAN5G
-
-static struct ieee80211_supported_band b43_band_5GHz_nphy = {
- .band = IEEE80211_BAND_5GHZ,
- .channels = b43_5ghz_nphy_chantable,
- .n_channels = ARRAY_SIZE(b43_5ghz_nphy_chantable),
- .bitrates = b43_a_ratetable,
- .n_bitrates = b43_a_ratetable_size,
-};
-
-static struct ieee80211_supported_band b43_band_5GHz_aphy = {
- .band = IEEE80211_BAND_5GHZ,
- .channels = b43_5ghz_aphy_chantable,
- .n_channels = ARRAY_SIZE(b43_5ghz_aphy_chantable),
- .bitrates = b43_a_ratetable,
- .n_bitrates = b43_a_ratetable_size,
-};
-
-static struct ieee80211_supported_band b43_band_2GHz = {
- .band = IEEE80211_BAND_2GHZ,
- .channels = b43_2ghz_chantable,
- .n_channels = ARRAY_SIZE(b43_2ghz_chantable),
- .bitrates = b43_g_ratetable,
- .n_bitrates = b43_g_ratetable_size,
-};
-
-static void b43_wireless_core_exit(struct b43_wldev *dev);
-static int b43_wireless_core_init(struct b43_wldev *dev);
-static void b43_wireless_core_stop(struct b43_wldev *dev);
-static int b43_wireless_core_start(struct b43_wldev *dev);
-
-static int b43_ratelimit(struct b43_wl *wl)
-{
- if (!wl || !wl->current_dev)
- return 1;
- if (b43_status(wl->current_dev) < B43_STAT_STARTED)
- return 1;
- /* We are up and running.
- * Ratelimit the messages to avoid DoS over the net. */
- return net_ratelimit();
-}
-
-void b43info(struct b43_wl *wl, const char *fmt, ...)
-{
- va_list args;
-
- if (!b43_ratelimit(wl))
- return;
- va_start(args, fmt);
- printk(KERN_INFO "b43-%s: ",
- (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
- vprintk(fmt, args);
- va_end(args);
-}
-
-void b43err(struct b43_wl *wl, const char *fmt, ...)
-{
- va_list args;
-
- if (!b43_ratelimit(wl))
- return;
- va_start(args, fmt);
- printk(KERN_ERR "b43-%s ERROR: ",
- (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
- vprintk(fmt, args);
- va_end(args);
-}
-
-void b43warn(struct b43_wl *wl, const char *fmt, ...)
-{
- va_list args;
-
- if (!b43_ratelimit(wl))
- return;
- va_start(args, fmt);
- printk(KERN_WARNING "b43-%s warning: ",
- (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
- vprintk(fmt, args);
- va_end(args);
-}
-
-#if B43_DEBUG
-void b43dbg(struct b43_wl *wl, const char *fmt, ...)
-{
- va_list args;
-
- va_start(args, fmt);
- printk(KERN_DEBUG "b43-%s debug: ",
- (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
- vprintk(fmt, args);
- va_end(args);
-}
-#endif /* DEBUG */
-
-static void b43_ram_write(struct b43_wldev *dev, u16 offset, u32 val)
-{
- u32 macctl;
-
- B43_WARN_ON(offset % 4 != 0);
-
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- if (macctl & B43_MACCTL_BE)
- val = swab32(val);
-
- b43_write32(dev, B43_MMIO_RAM_CONTROL, offset);
- mmiowb();
- b43_write32(dev, B43_MMIO_RAM_DATA, val);
-}
-
-static inline void b43_shm_control_word(struct b43_wldev *dev,
- u16 routing, u16 offset)
-{
- u32 control;
-
- /* "offset" is the WORD offset. */
- control = routing;
- control <<= 16;
- control |= offset;
- b43_write32(dev, B43_MMIO_SHM_CONTROL, control);
-}
-
-u32 b43_shm_read32(struct b43_wldev *dev, u16 routing, u16 offset)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
- u32 ret;
-
- spin_lock_irqsave(&wl->shm_lock, flags);
- if (routing == B43_SHM_SHARED) {
- B43_WARN_ON(offset & 0x0001);
- if (offset & 0x0003) {
- /* Unaligned access */
- b43_shm_control_word(dev, routing, offset >> 2);
- ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED);
- ret <<= 16;
- b43_shm_control_word(dev, routing, (offset >> 2) + 1);
- ret |= b43_read16(dev, B43_MMIO_SHM_DATA);
-
- goto out;
- }
- offset >>= 2;
- }
- b43_shm_control_word(dev, routing, offset);
- ret = b43_read32(dev, B43_MMIO_SHM_DATA);
-out:
- spin_unlock_irqrestore(&wl->shm_lock, flags);
-
- return ret;
-}
-
-u16 b43_shm_read16(struct b43_wldev * dev, u16 routing, u16 offset)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
- u16 ret;
-
- spin_lock_irqsave(&wl->shm_lock, flags);
- if (routing == B43_SHM_SHARED) {
- B43_WARN_ON(offset & 0x0001);
- if (offset & 0x0003) {
- /* Unaligned access */
- b43_shm_control_word(dev, routing, offset >> 2);
- ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED);
-
- goto out;
- }
- offset >>= 2;
- }
- b43_shm_control_word(dev, routing, offset);
- ret = b43_read16(dev, B43_MMIO_SHM_DATA);
-out:
- spin_unlock_irqrestore(&wl->shm_lock, flags);
-
- return ret;
-}
-
-void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
-
- spin_lock_irqsave(&wl->shm_lock, flags);
- if (routing == B43_SHM_SHARED) {
- B43_WARN_ON(offset & 0x0001);
- if (offset & 0x0003) {
- /* Unaligned access */
- b43_shm_control_word(dev, routing, offset >> 2);
- b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED,
- (value >> 16) & 0xffff);
- b43_shm_control_word(dev, routing, (offset >> 2) + 1);
- b43_write16(dev, B43_MMIO_SHM_DATA, value & 0xffff);
- goto out;
- }
- offset >>= 2;
- }
- b43_shm_control_word(dev, routing, offset);
- b43_write32(dev, B43_MMIO_SHM_DATA, value);
-out:
- spin_unlock_irqrestore(&wl->shm_lock, flags);
-}
-
-void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value)
-{
- struct b43_wl *wl = dev->wl;
- unsigned long flags;
-
- spin_lock_irqsave(&wl->shm_lock, flags);
- if (routing == B43_SHM_SHARED) {
- B43_WARN_ON(offset & 0x0001);
- if (offset & 0x0003) {
- /* Unaligned access */
- b43_shm_control_word(dev, routing, offset >> 2);
- b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, value);
- goto out;
- }
- offset >>= 2;
- }
- b43_shm_control_word(dev, routing, offset);
- b43_write16(dev, B43_MMIO_SHM_DATA, value);
-out:
- spin_unlock_irqrestore(&wl->shm_lock, flags);
-}
-
-/* Read HostFlags */
-u64 b43_hf_read(struct b43_wldev * dev)
-{
- u64 ret;
-
- ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI);
- ret <<= 16;
- ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI);
- ret <<= 16;
- ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO);
-
- return ret;
-}
-
-/* Write HostFlags */
-void b43_hf_write(struct b43_wldev *dev, u64 value)
-{
- u16 lo, mi, hi;
-
- lo = (value & 0x00000000FFFFULL);
- mi = (value & 0x0000FFFF0000ULL) >> 16;
- hi = (value & 0xFFFF00000000ULL) >> 32;
- b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO, lo);
- b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI, mi);
- b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI, hi);
-}
-
-void b43_tsf_read(struct b43_wldev *dev, u64 * tsf)
-{
- /* We need to be careful. As we read the TSF from multiple
- * registers, we should take care of register overflows.
- * In theory, the whole tsf read process should be atomic.
- * We try to be atomic here, by restaring the read process,
- * if any of the high registers changed (overflew).
- */
- if (dev->dev->id.revision >= 3) {
- u32 low, high, high2;
-
- do {
- high = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_HIGH);
- low = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_LOW);
- high2 = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_HIGH);
- } while (unlikely(high != high2));
-
- *tsf = high;
- *tsf <<= 32;
- *tsf |= low;
- } else {
- u64 tmp;
- u16 v0, v1, v2, v3;
- u16 test1, test2, test3;
-
- do {
- v3 = b43_read16(dev, B43_MMIO_TSF_3);
- v2 = b43_read16(dev, B43_MMIO_TSF_2);
- v1 = b43_read16(dev, B43_MMIO_TSF_1);
- v0 = b43_read16(dev, B43_MMIO_TSF_0);
-
- test3 = b43_read16(dev, B43_MMIO_TSF_3);
- test2 = b43_read16(dev, B43_MMIO_TSF_2);
- test1 = b43_read16(dev, B43_MMIO_TSF_1);
- } while (v3 != test3 || v2 != test2 || v1 != test1);
-
- *tsf = v3;
- *tsf <<= 48;
- tmp = v2;
- tmp <<= 32;
- *tsf |= tmp;
- tmp = v1;
- tmp <<= 16;
- *tsf |= tmp;
- *tsf |= v0;
- }
-}
-
-static void b43_time_lock(struct b43_wldev *dev)
-{
- u32 macctl;
-
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- macctl |= B43_MACCTL_TBTTHOLD;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
- /* Commit the write */
- b43_read32(dev, B43_MMIO_MACCTL);
-}
-
-static void b43_time_unlock(struct b43_wldev *dev)
-{
- u32 macctl;
-
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- macctl &= ~B43_MACCTL_TBTTHOLD;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
- /* Commit the write */
- b43_read32(dev, B43_MMIO_MACCTL);
-}
-
-static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
-{
- /* Be careful with the in-progress timer.
- * First zero out the low register, so we have a full
- * register-overflow duration to complete the operation.
- */
- if (dev->dev->id.revision >= 3) {
- u32 lo = (tsf & 0x00000000FFFFFFFFULL);
- u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
-
- b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, 0);
- mmiowb();
- b43_write32(dev, B43_MMIO_REV3PLUS_TSF_HIGH, hi);
- mmiowb();
- b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, lo);
- } else {
- u16 v0 = (tsf & 0x000000000000FFFFULL);
- u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
- u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
- u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
-
- b43_write16(dev, B43_MMIO_TSF_0, 0);
- mmiowb();
- b43_write16(dev, B43_MMIO_TSF_3, v3);
- mmiowb();
- b43_write16(dev, B43_MMIO_TSF_2, v2);
- mmiowb();
- b43_write16(dev, B43_MMIO_TSF_1, v1);
- mmiowb();
- b43_write16(dev, B43_MMIO_TSF_0, v0);
- }
-}
-
-void b43_tsf_write(struct b43_wldev *dev, u64 tsf)
-{
- b43_time_lock(dev);
- b43_tsf_write_locked(dev, tsf);
- b43_time_unlock(dev);
-}
-
-static
-void b43_macfilter_set(struct b43_wldev *dev, u16 offset, const u8 * mac)
-{
- static const u8 zero_addr[ETH_ALEN] = { 0 };
- u16 data;
-
- if (!mac)
- mac = zero_addr;
-
- offset |= 0x0020;
- b43_write16(dev, B43_MMIO_MACFILTER_CONTROL, offset);
-
- data = mac[0];
- data |= mac[1] << 8;
- b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
- data = mac[2];
- data |= mac[3] << 8;
- b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
- data = mac[4];
- data |= mac[5] << 8;
- b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
-}
-
-static void b43_write_mac_bssid_templates(struct b43_wldev *dev)
-{
- const u8 *mac;
- const u8 *bssid;
- u8 mac_bssid[ETH_ALEN * 2];
- int i;
- u32 tmp;
-
- bssid = dev->wl->bssid;
- mac = dev->wl->mac_addr;
-
- b43_macfilter_set(dev, B43_MACFILTER_BSSID, bssid);
-
- memcpy(mac_bssid, mac, ETH_ALEN);
- memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
-
- /* Write our MAC address and BSSID to template ram */
- for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
- tmp = (u32) (mac_bssid[i + 0]);
- tmp |= (u32) (mac_bssid[i + 1]) << 8;
- tmp |= (u32) (mac_bssid[i + 2]) << 16;
- tmp |= (u32) (mac_bssid[i + 3]) << 24;
- b43_ram_write(dev, 0x20 + i, tmp);
- }
-}
-
-static void b43_upload_card_macaddress(struct b43_wldev *dev)
-{
- b43_write_mac_bssid_templates(dev);
- b43_macfilter_set(dev, B43_MACFILTER_SELF, dev->wl->mac_addr);
-}
-
-static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time)
-{
- /* slot_time is in usec. */
- if (dev->phy.type != B43_PHYTYPE_G)
- return;
- b43_write16(dev, 0x684, 510 + slot_time);
- b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
-}
-
-static void b43_short_slot_timing_enable(struct b43_wldev *dev)
-{
- b43_set_slot_time(dev, 9);
- dev->short_slot = 1;
-}
-
-static void b43_short_slot_timing_disable(struct b43_wldev *dev)
-{
- b43_set_slot_time(dev, 20);
- dev->short_slot = 0;
-}
-
-/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
- * Returns the _previously_ enabled IRQ mask.
- */
-static inline u32 b43_interrupt_enable(struct b43_wldev *dev, u32 mask)
-{
- u32 old_mask;
-
- old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
- b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask | mask);
-
- return old_mask;
-}
-
-/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
- * Returns the _previously_ enabled IRQ mask.
- */
-static inline u32 b43_interrupt_disable(struct b43_wldev *dev, u32 mask)
-{
- u32 old_mask;
-
- old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
- b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
-
- return old_mask;
-}
-
-/* Synchronize IRQ top- and bottom-half.
- * IRQs must be masked before calling this.
- * This must not be called with the irq_lock held.
- */
-static void b43_synchronize_irq(struct b43_wldev *dev)
-{
- synchronize_irq(dev->dev->irq);
- tasklet_kill(&dev->isr_tasklet);
-}
-
-/* DummyTransmission function, as documented on
- * http://bcm-specs.sipsolutions.net/DummyTransmission
- */
-void b43_dummy_transmission(struct b43_wldev *dev)
-{
- struct b43_wl *wl = dev->wl;
- struct b43_phy *phy = &dev->phy;
- unsigned int i, max_loop;
- u16 value;
- u32 buffer[5] = {
- 0x00000000,
- 0x00D40000,
- 0x00000000,
- 0x01000000,
- 0x00000000,
- };
-
- switch (phy->type) {
- case B43_PHYTYPE_A:
- max_loop = 0x1E;
- buffer[0] = 0x000201CC;
- break;
- case B43_PHYTYPE_B:
- case B43_PHYTYPE_G:
- max_loop = 0xFA;
- buffer[0] = 0x000B846E;
- break;
- default:
- B43_WARN_ON(1);
- return;
- }
-
- spin_lock_irq(&wl->irq_lock);
- write_lock(&wl->tx_lock);
-
- for (i = 0; i < 5; i++)
- b43_ram_write(dev, i * 4, buffer[i]);
-
- /* Commit writes */
- b43_read32(dev, B43_MMIO_MACCTL);
-
- b43_write16(dev, 0x0568, 0x0000);
- b43_write16(dev, 0x07C0, 0x0000);
- value = ((phy->type == B43_PHYTYPE_A) ? 1 : 0);
- b43_write16(dev, 0x050C, value);
- b43_write16(dev, 0x0508, 0x0000);
- b43_write16(dev, 0x050A, 0x0000);
- b43_write16(dev, 0x054C, 0x0000);
- b43_write16(dev, 0x056A, 0x0014);
- b43_write16(dev, 0x0568, 0x0826);
- b43_write16(dev, 0x0500, 0x0000);
- b43_write16(dev, 0x0502, 0x0030);
-
- if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
- b43_radio_write16(dev, 0x0051, 0x0017);
- for (i = 0x00; i < max_loop; i++) {
- value = b43_read16(dev, 0x050E);
- if (value & 0x0080)
- break;
- udelay(10);
- }
- for (i = 0x00; i < 0x0A; i++) {
- value = b43_read16(dev, 0x050E);
- if (value & 0x0400)
- break;
- udelay(10);
- }
- for (i = 0x00; i < 0x0A; i++) {
- value = b43_read16(dev, 0x0690);
- if (!(value & 0x0100))
- break;
- udelay(10);
- }
- if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
- b43_radio_write16(dev, 0x0051, 0x0037);
-
- write_unlock(&wl->tx_lock);
- spin_unlock_irq(&wl->irq_lock);
-}
-
-static void key_write(struct b43_wldev *dev,
- u8 index, u8 algorithm, const u8 * key)
-{
- unsigned int i;
- u32 offset;
- u16 value;
- u16 kidx;
-
- /* Key index/algo block */
- kidx = b43_kidx_to_fw(dev, index);
- value = ((kidx << 4) | algorithm);
- b43_shm_write16(dev, B43_SHM_SHARED,
- B43_SHM_SH_KEYIDXBLOCK + (kidx * 2), value);
-
- /* Write the key to the Key Table Pointer offset */
- offset = dev->ktp + (index * B43_SEC_KEYSIZE);
- for (i = 0; i < B43_SEC_KEYSIZE; i += 2) {
- value = key[i];
- value |= (u16) (key[i + 1]) << 8;
- b43_shm_write16(dev, B43_SHM_SHARED, offset + i, value);
- }
-}
-
-static void keymac_write(struct b43_wldev *dev, u8 index, const u8 * addr)
-{
- u32 addrtmp[2] = { 0, 0, };
- u8 per_sta_keys_start = 8;
-
- if (b43_new_kidx_api(dev))
- per_sta_keys_start = 4;
-
- B43_WARN_ON(index < per_sta_keys_start);
- /* We have two default TX keys and possibly two default RX keys.
- * Physical mac 0 is mapped to physical key 4 or 8, depending
- * on the firmware version.
- * So we must adjust the index here.
- */
- index -= per_sta_keys_start;
-
- if (addr) {
- addrtmp[0] = addr[0];
- addrtmp[0] |= ((u32) (addr[1]) << 8);
- addrtmp[0] |= ((u32) (addr[2]) << 16);
- addrtmp[0] |= ((u32) (addr[3]) << 24);
- addrtmp[1] = addr[4];
- addrtmp[1] |= ((u32) (addr[5]) << 8);
- }
-
- if (dev->dev->id.revision >= 5) {
- /* Receive match transmitter address mechanism */
- b43_shm_write32(dev, B43_SHM_RCMTA,
- (index * 2) + 0, addrtmp[0]);
- b43_shm_write16(dev, B43_SHM_RCMTA,
- (index * 2) + 1, addrtmp[1]);
- } else {
- /* RXE (Receive Engine) and
- * PSM (Programmable State Machine) mechanism
- */
- if (index < 8) {
- /* TODO write to RCM 16, 19, 22 and 25 */
- } else {
- b43_shm_write32(dev, B43_SHM_SHARED,
- B43_SHM_SH_PSM + (index * 6) + 0,
- addrtmp[0]);
- b43_shm_write16(dev, B43_SHM_SHARED,
- B43_SHM_SH_PSM + (index * 6) + 4,
- addrtmp[1]);
- }
- }
-}
-
-static void do_key_write(struct b43_wldev *dev,
- u8 index, u8 algorithm,
- const u8 * key, size_t key_len, const u8 * mac_addr)
-{
- u8 buf[B43_SEC_KEYSIZE] = { 0, };
- u8 per_sta_keys_start = 8;
-
- if (b43_new_kidx_api(dev))
- per_sta_keys_start = 4;
-
- B43_WARN_ON(index >= dev->max_nr_keys);
- B43_WARN_ON(key_len > B43_SEC_KEYSIZE);
-
- if (index >= per_sta_keys_start)
- keymac_write(dev, index, NULL); /* First zero out mac. */
- if (key)
- memcpy(buf, key, key_len);
- key_write(dev, index, algorithm, buf);
- if (index >= per_sta_keys_start)
- keymac_write(dev, index, mac_addr);
-
- dev->key[index].algorithm = algorithm;
-}
-
-static int b43_key_write(struct b43_wldev *dev,
- int index, u8 algorithm,
- const u8 * key, size_t key_len,
- const u8 * mac_addr,
- struct ieee80211_key_conf *keyconf)
-{
- int i;
- int sta_keys_start;
-
- if (key_len > B43_SEC_KEYSIZE)
- return -EINVAL;
- for (i = 0; i < dev->max_nr_keys; i++) {
- /* Check that we don't already have this key. */
- B43_WARN_ON(dev->key[i].keyconf == keyconf);
- }
- if (index < 0) {
- /* Either pairwise key or address is 00:00:00:00:00:00
- * for transmit-only keys. Search the index. */
- if (b43_new_kidx_api(dev))
- sta_keys_start = 4;
- else
- sta_keys_start = 8;
- for (i = sta_keys_start; i < dev->max_nr_keys; i++) {
- if (!dev->key[i].keyconf) {
- /* found empty */
- index = i;
- break;
- }
- }
- if (index < 0) {
- b43err(dev->wl, "Out of hardware key memory\n");
- return -ENOSPC;
- }
- } else
- B43_WARN_ON(index > 3);
-
- do_key_write(dev, index, algorithm, key, key_len, mac_addr);
- if ((index <= 3) && !b43_new_kidx_api(dev)) {
- /* Default RX key */
- B43_WARN_ON(mac_addr);
- do_key_write(dev, index + 4, algorithm, key, key_len, NULL);
- }
- keyconf->hw_key_idx = index;
- dev->key[index].keyconf = keyconf;
-
- return 0;
-}
-
-static int b43_key_clear(struct b43_wldev *dev, int index)
-{
- if (B43_WARN_ON((index < 0) || (index >= dev->max_nr_keys)))
- return -EINVAL;
- do_key_write(dev, index, B43_SEC_ALGO_NONE,
- NULL, B43_SEC_KEYSIZE, NULL);
- if ((index <= 3) && !b43_new_kidx_api(dev)) {
- do_key_write(dev, index + 4, B43_SEC_ALGO_NONE,
- NULL, B43_SEC_KEYSIZE, NULL);
- }
- dev->key[index].keyconf = NULL;
-
- return 0;
-}
-
-static void b43_clear_keys(struct b43_wldev *dev)
-{
- int i;
-
- for (i = 0; i < dev->max_nr_keys; i++)
- b43_key_clear(dev, i);
-}
-
-void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
-{
- u32 macctl;
- u16 ucstat;
- bool hwps;
- bool awake;
- int i;
-
- B43_WARN_ON((ps_flags & B43_PS_ENABLED) &&
- (ps_flags & B43_PS_DISABLED));
- B43_WARN_ON((ps_flags & B43_PS_AWAKE) && (ps_flags & B43_PS_ASLEEP));
-
- if (ps_flags & B43_PS_ENABLED) {
- hwps = 1;
- } else if (ps_flags & B43_PS_DISABLED) {
- hwps = 0;
- } else {
- //TODO: If powersave is not off and FIXME is not set and we are not in adhoc
- // and thus is not an AP and we are associated, set bit 25
- }
- if (ps_flags & B43_PS_AWAKE) {
- awake = 1;
- } else if (ps_flags & B43_PS_ASLEEP) {
- awake = 0;
- } else {
- //TODO: If the device is awake or this is an AP, or we are scanning, or FIXME,
- // or we are associated, or FIXME, or the latest PS-Poll packet sent was
- // successful, set bit26
- }
-
-/* FIXME: For now we force awake-on and hwps-off */
- hwps = 0;
- awake = 1;
-
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- if (hwps)
- macctl |= B43_MACCTL_HWPS;
- else
- macctl &= ~B43_MACCTL_HWPS;
- if (awake)
- macctl |= B43_MACCTL_AWAKE;
- else
- macctl &= ~B43_MACCTL_AWAKE;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
- /* Commit write */
- b43_read32(dev, B43_MMIO_MACCTL);
- if (awake && dev->dev->id.revision >= 5) {
- /* Wait for the microcode to wake up. */
- for (i = 0; i < 100; i++) {
- ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
- B43_SHM_SH_UCODESTAT);
- if (ucstat != B43_SHM_SH_UCODESTAT_SLEEP)
- break;
- udelay(10);
- }
- }
-}
-
-/* Turn the Analog ON/OFF */
-static void b43_switch_analog(struct b43_wldev *dev, int on)
-{
- switch (dev->phy.type) {
- case B43_PHYTYPE_A:
- case B43_PHYTYPE_G:
- b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4);
- break;
- case B43_PHYTYPE_N:
- b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
- on ? 0 : 0x7FFF);
- break;
- default:
- B43_WARN_ON(1);
- }
-}
-
-void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
-{
- u32 tmslow;
- u32 macctl;
-
- flags |= B43_TMSLOW_PHYCLKEN;
- flags |= B43_TMSLOW_PHYRESET;
- ssb_device_enable(dev->dev, flags);
- msleep(2); /* Wait for the PLL to turn on. */
-
- /* Now take the PHY out of Reset again */
- tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
- tmslow |= SSB_TMSLOW_FGC;
- tmslow &= ~B43_TMSLOW_PHYRESET;
- ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
- ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
- msleep(1);
- tmslow &= ~SSB_TMSLOW_FGC;
- ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
- ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
- msleep(1);
-
- /* Turn Analog ON */
- b43_switch_analog(dev, 1);
-
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- macctl &= ~B43_MACCTL_GMODE;
- if (flags & B43_TMSLOW_GMODE)
- macctl |= B43_MACCTL_GMODE;
- macctl |= B43_MACCTL_IHR_ENABLED;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
-}
-
-static void handle_irq_transmit_status(struct b43_wldev *dev)
-{
- u32 v0, v1;
- u16 tmp;
- struct b43_txstatus stat;
-
- while (1) {
- v0 = b43_read32(dev, B43_MMIO_XMITSTAT_0);
- if (!(v0 & 0x00000001))
- break;
- v1 = b43_read32(dev, B43_MMIO_XMITSTAT_1);
-
- stat.cookie = (v0 >> 16);
- stat.seq = (v1 & 0x0000FFFF);
- stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
- tmp = (v0 & 0x0000FFFF);
- stat.frame_count = ((tmp & 0xF000) >> 12);
- stat.rts_count = ((tmp & 0x0F00) >> 8);
- stat.supp_reason = ((tmp & 0x001C) >> 2);
- stat.pm_indicated = !!(tmp & 0x0080);
- stat.intermediate = !!(tmp & 0x0040);
- stat.for_ampdu = !!(tmp & 0x0020);
- stat.acked = !!(tmp & 0x0002);
-
- b43_handle_txstatus(dev, &stat);
- }
-}
-
-static void drain_txstatus_queue(struct b43_wldev *dev)
-{
- u32 dummy;
-
- if (dev->dev->id.revision < 5)
- return;
- /* Read all entries from the microcode TXstatus FIFO
- * and throw them away.
- */
- while (1) {
- dummy = b43_read32(dev, B43_MMIO_XMITSTAT_0);
- if (!(dummy & 0x00000001))
- break;
- dummy = b43_read32(dev, B43_MMIO_XMITSTAT_1);
- }
-}
-
-static u32 b43_jssi_read(struct b43_wldev *dev)
-{
- u32 val = 0;
-
- val = b43_shm_read16(dev, B43_SHM_SHARED, 0x08A);
- val <<= 16;
- val |= b43_shm_read16(dev, B43_SHM_SHARED, 0x088);
-
- return val;
-}
-
-static void b43_jssi_write(struct b43_wldev *dev, u32 jssi)
-{
- b43_shm_write16(dev, B43_SHM_SHARED, 0x088, (jssi & 0x0000FFFF));
- b43_shm_write16(dev, B43_SHM_SHARED, 0x08A, (jssi & 0xFFFF0000) >> 16);
-}
-
-static void b43_generate_noise_sample(struct b43_wldev *dev)
-{
- b43_jssi_write(dev, 0x7F7F7F7F);
- b43_write32(dev, B43_MMIO_MACCMD,
- b43_read32(dev, B43_MMIO_MACCMD) | B43_MACCMD_BGNOISE);
- B43_WARN_ON(dev->noisecalc.channel_at_start != dev->phy.channel);
-}
-
-static void b43_calculate_link_quality(struct b43_wldev *dev)
-{
- /* Top half of Link Quality calculation. */
-
- if (dev->noisecalc.calculation_running)
- return;
- dev->noisecalc.channel_at_start = dev->phy.channel;
- dev->noisecalc.calculation_running = 1;
- dev->noisecalc.nr_samples = 0;
-
- b43_generate_noise_sample(dev);
-}
-
-static void handle_irq_noise(struct b43_wldev *dev)
-{
- struct b43_phy *phy = &dev->phy;
- u16 tmp;
- u8 noise[4];
- u8 i, j;
- s32 average;
-
- /* Bottom half of Link Quality calculation. */
-
- B43_WARN_ON(!dev->noisecalc.calculation_running);
- if (dev->noisecalc.channel_at_start != phy->channel)
- goto drop_calculation;
- *((__le32 *)noise) = cpu_to_le32(b43_jssi_read(dev));
- if (noise[0] == 0x7F || noise[1] == 0x7F ||
- noise[2] == 0x7F || noise[3] == 0x7F)
- goto generate_new;
-
- /* Get the noise samples. */
- B43_WARN_ON(dev->noisecalc.nr_samples >= 8);
- i = dev->noisecalc.nr_samples;
- noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
- noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
- noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
- noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
- dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
- dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
- dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
- dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
- dev->noisecalc.nr_samples++;
- if (dev->noisecalc.nr_samples == 8) {
- /* Calculate the Link Quality by the noise samples. */
- average = 0;
- for (i = 0; i < 8; i++) {
- for (j = 0; j < 4; j++)
- average += dev->noisecalc.samples[i][j];
- }
- average /= (8 * 4);
- average *= 125;
- average += 64;
- average /= 128;
- tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C);
- tmp = (tmp / 128) & 0x1F;
- if (tmp >= 8)
- average += 2;
- else
- average -= 25;
- if (tmp == 8)
- average -= 72;
- else
- average -= 48;
-
- dev->stats.link_noise = average;
- drop_calculation:
- dev->noisecalc.calculation_running = 0;
- return;
- }
- generate_new:
- b43_generate_noise_sample(dev);
-}
-
-static void handle_irq_tbtt_indication(struct b43_wldev *dev)
-{
- if (b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
- ///TODO: PS TBTT
- } else {
- if (1 /*FIXME: the last PSpoll frame was sent successfully */ )
- b43_power_saving_ctl_bits(dev, 0);
- }
- if (b43_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
- dev->dfq_valid = 1;
-}
-
-static void handle_irq_atim_end(struct b43_wldev *dev)
-{
- if (dev->dfq_valid) {
- b43_write32(dev, B43_MMIO_MACCMD,
- b43_read32(dev, B43_MMIO_MACCMD)
- | B43_MACCMD_DFQ_VALID);
- dev->dfq_valid = 0;
- }
-}
-
-static void handle_irq_pmq(struct b43_wldev *dev)
-{
- u32 tmp;
-
- //TODO: AP mode.
-
- while (1) {
- tmp = b43_read32(dev, B43_MMIO_PS_STATUS);
- if (!(tmp & 0x00000008))
- break;
- }
- /* 16bit write is odd, but correct. */
- b43_write16(dev, B43_MMIO_PS_STATUS, 0x0002);
-}
-
-static void b43_write_template_common(struct b43_wldev *dev,
- const u8 * data, u16 size,
- u16 ram_offset,
- u16 shm_size_offset, u8 rate)
-{
- u32 i, tmp;
- struct b43_plcp_hdr4 plcp;
-
- plcp.data = 0;
- b43_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
- b43_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
- ram_offset += sizeof(u32);
- /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
- * So leave the first two bytes of the next write blank.
- */
- tmp = (u32) (data[0]) << 16;
- tmp |= (u32) (data[1]) << 24;
- b43_ram_write(dev, ram_offset, tmp);
- ram_offset += sizeof(u32);
- for (i = 2; i < size; i += sizeof(u32)) {
- tmp = (u32) (data[i + 0]);
- if (i + 1 < size)
- tmp |= (u32) (data[i + 1]) << 8;
- if (i + 2 < size)
- tmp |= (u32) (data[i + 2]) << 16;
- if (i + 3 < size)
- tmp |= (u32) (data[i + 3]) << 24;
- b43_ram_write(dev, ram_offset + i - 2, tmp);
- }
- b43_shm_write16(dev, B43_SHM_SHARED, shm_size_offset,
- size + sizeof(struct b43_plcp_hdr6));
-}
-
-/* Check if the use of the antenna that ieee80211 told us to
- * use is possible. This will fall back to DEFAULT.
- * "antenna_nr" is the antenna identifier we got from ieee80211. */
-u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev,
- u8 antenna_nr)
-{
- u8 antenna_mask;
-
- if (antenna_nr == 0) {
- /* Zero means "use default antenna". That's always OK. */
- return 0;
- }
-
- /* Get the mask of available antennas. */
- if (dev->phy.gmode)
- antenna_mask = dev->dev->bus->sprom.ant_available_bg;
- else
- antenna_mask = dev->dev->bus->sprom.ant_available_a;
-
- if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
- /* This antenna is not available. Fall back to default. */
- return 0;
- }
-
- return antenna_nr;
-}
-
-static int b43_antenna_from_ieee80211(struct b43_wldev *dev, u8 antenna)
-{
- antenna = b43_ieee80211_antenna_sanitize(dev, antenna);
- switch (antenna) {
- case 0: /* default/diversity */
- return B43_ANTENNA_DEFAULT;
- case 1: /* Antenna 0 */
- return B43_ANTENNA0;
- case 2: /* Antenna 1 */
- return B43_ANTENNA1;
- case 3: /* Antenna 2 */
- return B43_ANTENNA2;
- case 4: /* Antenna 3 */
- return B43_ANTENNA3;
- default:
- return B43_ANTENNA_DEFAULT;
- }
-}
-
-/* Convert a b43 antenna number value to the PHY TX control value. */
-static u16 b43_antenna_to_phyctl(int antenna)
-{
- switch (antenna) {
- case B43_ANTENNA0:
- return B43_TXH_PHY_ANT0;
- case B43_ANTENNA1:
- return B43_TXH_PHY_ANT1;
- case B43_ANTENNA2:
- return B43_TXH_PHY_ANT2;
- case B43_ANTENNA3:
- return B43_TXH_PHY_ANT3;
- case B43_ANTENNA_AUTO:
- return B43_TXH_PHY_ANT01AUTO;
- }
- B43_WARN_ON(1);
- return 0;
-}
-
-static void b43_write_beacon_template(struct b43_wldev *dev,
- u16 ram_offset,
- u16 shm_size_offset)
-{
- unsigned int i, len, variable_len;
- const struct ieee80211_mgmt *bcn;
- const u8 *ie;
- bool tim_found = 0;
- unsigned int rate;
- u16 ctl;
- int antenna;
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
-
- bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
- len = min((size_t) dev->wl->current_beacon->len,
- 0x200 - sizeof(struct b43_plcp_hdr6));
- rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
-
- b43_write_template_common(dev, (const u8 *)bcn,
- len, ram_offset, shm_size_offset, rate);
-
- /* Write the PHY TX control parameters. */
- antenna = b43_antenna_from_ieee80211(dev, info->antenna_sel_tx);
- antenna = b43_antenna_to_phyctl(antenna);
- ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);
- /* We can't send beacons with short preamble. Would get PHY errors. */
- ctl &= ~B43_TXH_PHY_SHORTPRMBL;
- ctl &= ~B43_TXH_PHY_ANT;
- ctl &= ~B43_TXH_PHY_ENC;
- ctl |= antenna;
- if (b43_is_cck_rate(rate))
- ctl |= B43_TXH_PHY_ENC_CCK;
- else
- ctl |= B43_TXH_PHY_ENC_OFDM;
- b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl);
-
- /* Find the position of the TIM and the DTIM_period value
- * and write them to SHM. */
- ie = bcn->u.beacon.variable;
- variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
- for (i = 0; i < variable_len - 2; ) {
- uint8_t ie_id, ie_len;
-
- ie_id = ie[i];
- ie_len = ie[i + 1];
- if (ie_id == 5) {
- u16 tim_position;
- u16 dtim_period;
- /* This is the TIM Information Element */
-
- /* Check whether the ie_len is in the beacon data range. */
- if (variable_len < ie_len + 2 + i)
- break;
- /* A valid TIM is at least 4 bytes long. */
- if (ie_len < 4)
- break;
- tim_found = 1;
-
- tim_position = sizeof(struct b43_plcp_hdr6);
- tim_position += offsetof(struct ieee80211_mgmt, u.beacon.variable);
- tim_position += i;
-
- dtim_period = ie[i + 3];
-
- b43_shm_write16(dev, B43_SHM_SHARED,
- B43_SHM_SH_TIMBPOS, tim_position);
- b43_shm_write16(dev, B43_SHM_SHARED,
- B43_SHM_SH_DTIMPER, dtim_period);
- break;
- }
- i += ie_len + 2;
- }
- if (!tim_found) {
- b43warn(dev->wl, "Did not find a valid TIM IE in "
- "the beacon template packet. AP or IBSS operation "
- "may be broken.\n");
- } else
- b43dbg(dev->wl, "Updated beacon template\n");
-}
-
-static void b43_write_probe_resp_plcp(struct b43_wldev *dev,
- u16 shm_offset, u16 size,
- struct ieee80211_rate *rate)
-{
- struct b43_plcp_hdr4 plcp;
- u32 tmp;
- __le16 dur;
-
- plcp.data = 0;
- b43_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
- dur = ieee80211_generic_frame_duration(dev->wl->hw,
- dev->wl->vif, size,
- rate);
- /* Write PLCP in two parts and timing for packet transfer */
- tmp = le32_to_cpu(plcp.data);
- b43_shm_write16(dev, B43_SHM_SHARED, shm_offset, tmp & 0xFFFF);
- b43_shm_write16(dev, B43_SHM_SHARED, shm_offset + 2, tmp >> 16);
- b43_shm_write16(dev, B43_SHM_SHARED, shm_offset + 6, le16_to_cpu(dur));
-}
-
-/* Instead of using custom probe response template, this function
- * just patches custom beacon template by:
- * 1) Changing packet type
- * 2) Patching duration field
- * 3) Stripping TIM
- */
-static const u8 * b43_generate_probe_resp(struct b43_wldev *dev,
- u16 *dest_size,
- struct ieee80211_rate *rate)
-{
- const u8 *src_data;
- u8 *dest_data;
- u16 src_size, elem_size, src_pos, dest_pos;
- __le16 dur;
- struct ieee80211_hdr *hdr;
- size_t ie_start;
-
- src_size = dev->wl->current_beacon->len;
- src_data = (const u8 *)dev->wl->current_beacon->data;
-
- /* Get the start offset of the variable IEs in the packet. */
- ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
- B43_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt, u.beacon.variable));
-
- if (B43_WARN_ON(src_size < ie_start))
- return NULL;
-
- dest_data = kmalloc(src_size, GFP_ATOMIC);
- if (unlikely(!dest_data))
- return NULL;
-
- /* Copy the static data and all Information Elements, except the TIM. */
- memcpy(dest_data, src_data, ie_start);
- src_pos = ie_start;
- dest_pos = ie_start;
- for ( ; src_pos < src_size - 2; src_pos += elem_size) {
- elem_size = src_data[src_pos + 1] + 2;
- if (src_data[src_pos] == 5) {
- /* This is the TIM. */
- continue;
- }
- memcpy(dest_data + dest_pos, src_data + src_pos,
- elem_size);
- dest_pos += elem_size;
- }
- *dest_size = dest_pos;
- hdr = (struct ieee80211_hdr *)dest_data;
-
- /* Set the frame control. */
- hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_PROBE_RESP);
- dur = ieee80211_generic_frame_duration(dev->wl->hw,
- dev->wl->vif, *dest_size,
- rate);
- hdr->duration_id = dur;
-
- return dest_data;
-}
-
-static void b43_write_probe_resp_template(struct b43_wldev *dev,
- u16 ram_offset,
- u16 shm_size_offset,
- struct ieee80211_rate *rate)
-{
- const u8 *probe_resp_data;
- u16 size;
-
- size = dev->wl->current_beacon->len;
- probe_resp_data = b43_generate_probe_resp(dev, &size, rate);
- if (unlikely(!probe_resp_data))
- return;
-
- /* Looks like PLCP headers plus packet timings are stored for
- * all possible basic rates
- */
- b43_write_probe_resp_plcp(dev, 0x31A, size, &b43_b_ratetable[0]);
- b43_write_probe_resp_plcp(dev, 0x32C, size, &b43_b_ratetable[1]);
- b43_write_probe_resp_plcp(dev, 0x33E, size, &b43_b_ratetable[2]);
- b43_write_probe_resp_plcp(dev, 0x350, size, &b43_b_ratetable[3]);
-
- size = min((size_t) size, 0x200 - sizeof(struct b43_plcp_hdr6));
- b43_write_template_common(dev, probe_resp_data,
- size, ram_offset, shm_size_offset,
- rate->hw_value);
- kfree(probe_resp_data);
-}
-
-static void handle_irq_beacon(struct b43_wldev *dev)
-{
- struct b43_wl *wl = dev->wl;
- u32 cmd, beacon0_valid, beacon1_valid;
-
- if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
- return;
-
- /* This is the bottom half of the asynchronous beacon update. */
-
- /* Ignore interrupt in the future. */
- dev->irq_savedstate &= ~B43_IRQ_BEACON;
-
- cmd = b43_read32(dev, B43_MMIO_MACCMD);
- beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
- beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
-
- /* Schedule interrupt manually, if busy. */
- if (beacon0_valid && beacon1_valid) {
- b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
- dev->irq_savedstate |= B43_IRQ_BEACON;
- return;
- }
-
- if (!beacon0_valid) {
- if (!wl->beacon0_uploaded) {
- b43_write_beacon_template(dev, 0x68, 0x18);
- b43_write_probe_resp_template(dev, 0x268, 0x4A,
- &__b43_ratetable[3]);
- wl->beacon0_uploaded = 1;
- }
- cmd = b43_read32(dev, B43_MMIO_MACCMD);
- cmd |= B43_MACCMD_BEACON0_VALID;
- b43_write32(dev, B43_MMIO_MACCMD, cmd);
- } else if (!beacon1_valid) {
- if (!wl->beacon1_uploaded) {
- b43_write_beacon_template(dev, 0x468, 0x1A);
- wl->beacon1_uploaded = 1;
- }
- cmd = b43_read32(dev, B43_MMIO_MACCMD);
- cmd |= B43_MACCMD_BEACON1_VALID;
- b43_write32(dev, B43_MMIO_MACCMD, cmd);
- }
-}
-
-static void b43_beacon_update_trigger_work(struct work_struct *work)
-{
- struct b43_wl *wl = container_of(work, struct b43_wl,
- beacon_update_trigger);
- struct b43_wldev *dev;
-
- mutex_lock(&wl->mutex);
- dev = wl->current_dev;
- if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
- spin_lock_irq(&wl->irq_lock);
- /* update beacon right away or defer to irq */
- dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
- handle_irq_beacon(dev);
- /* The handler might have updated the IRQ mask. */
- b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
- dev->irq_savedstate);
- mmiowb();
- spin_unlock_irq(&wl->irq_lock);
- }
- mutex_unlock(&wl->mutex);
-}
-
-/* Asynchronously update the packet templates in template RAM.
- * Locking: Requires wl->irq_lock to be locked. */
-static void b43_update_templates(struct b43_wl *wl, struct sk_buff *beacon)
-{
- /* This is the top half of the ansynchronous beacon update.
- * The bottom half is the beacon IRQ.
- * Beacon update must be asynchronous to avoid sending an
- * invalid beacon. This can happen for example, if the firmware
- * transmits a beacon while we are updating it. */
-
- if (wl->current_beacon)
- dev_kfree_skb_any(wl->current_beacon);
- wl->current_beacon = beacon;
- wl->beacon0_uploaded = 0;
- wl->beacon1_uploaded = 0;
- queue_work(wl->hw->workqueue, &wl->beacon_update_trigger);
-}
-
-static void b43_set_ssid(struct b43_wldev *dev, const u8 * ssid, u8 ssid_len)
-{
- u32 tmp;
- u16 i, len;
-
- len = min((u16) ssid_len, (u16) 0x100);
- for (i = 0; i < len; i += sizeof(u32)) {
- tmp = (u32) (ssid[i + 0]);
- if (i + 1 < len)
- tmp |= (u32) (ssid[i + 1]) << 8;
- if (i + 2 < len)
- tmp |= (u32) (ssid[i + 2]) << 16;
- if (i + 3 < len)
- tmp |= (u32) (ssid[i + 3]) << 24;
- b43_shm_write32(dev, B43_SHM_SHARED, 0x380 + i, tmp);
- }
- b43_shm_write16(dev, B43_SHM_SHARED, 0x48, len);
-}
-
-static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
-{
- b43_time_lock(dev);
- if (dev->dev->id.revision >= 3) {
- b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
- b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
- } else {
- b43_write16(dev, 0x606, (beacon_int >> 6));
- b43_write16(dev, 0x610, beacon_int);
- }
- b43_time_unlock(dev);
- b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
-}
-
-static void b43_handle_firmware_panic(struct b43_wldev *dev)
-{
- u16 reason;
-
- /* Read the register that contains the reason code for the panic. */
- reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_FWPANIC_REASON_REG);
- b43err(dev->wl, "Whoopsy, firmware panic! Reason: %u\n", reason);
-
- switch (reason) {
- default:
- b43dbg(dev->wl, "The panic reason is unknown.\n");
- /* fallthrough */
- case B43_FWPANIC_DIE:
- /* Do not restart the controller or firmware.
- * The device is nonfunctional from now on.
- * Restarting would result in this panic to trigger again,
- * so we avoid that recursion. */
- break;
- case B43_FWPANIC_RESTART:
- b43_controller_restart(dev, "Microcode panic");
- break;
- }
-}
-
-static void handle_irq_ucode_debug(struct b43_wldev *dev)
-{
- unsigned int i, cnt;
- u16 reason, marker_id, marker_line;
- __le16 *buf;
-
- /* The proprietary firmware doesn't have this IRQ. */
- if (!dev->fw.opensource)
- return;
-
- /* Read the register that contains the reason code for this IRQ. */
- reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_DEBUGIRQ_REASON_REG);
-
- switch (reason) {
- case B43_DEBUGIRQ_PANIC:
- b43_handle_firmware_panic(dev);
- break;
- case B43_DEBUGIRQ_DUMP_SHM:
- if (!B43_DEBUG)
- break; /* Only with driver debugging enabled. */
- buf = kmalloc(4096, GFP_ATOMIC);
- if (!buf) {
- b43dbg(dev->wl, "SHM-dump: Failed to allocate memory\n");
- goto out;
- }
- for (i = 0; i < 4096; i += 2) {
- u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i);
- buf[i / 2] = cpu_to_le16(tmp);
- }
- b43info(dev->wl, "Shared memory dump:\n");
- print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET,
- 16, 2, buf, 4096, 1);
- kfree(buf);
- break;
- case B43_DEBUGIRQ_DUMP_REGS:
- if (!B43_DEBUG)
- break; /* Only with driver debugging enabled. */
- b43info(dev->wl, "Microcode register dump:\n");
- for (i = 0, cnt = 0; i < 64; i++) {
- u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i);
- if (cnt == 0)
- printk(KERN_INFO);
- printk("r%02u: 0x%04X ", i, tmp);
- cnt++;
- if (cnt == 6) {
- printk("\n");
- cnt = 0;
- }
- }
- printk("\n");
- break;
- case B43_DEBUGIRQ_MARKER:
- if (!B43_DEBUG)
- break; /* Only with driver debugging enabled. */
- marker_id = b43_shm_read16(dev, B43_SHM_SCRATCH,
- B43_MARKER_ID_REG);
- marker_line = b43_shm_read16(dev, B43_SHM_SCRATCH,
- B43_MARKER_LINE_REG);
- b43info(dev->wl, "The firmware just executed the MARKER(%u) "
- "at line number %u\n",
- marker_id, marker_line);
- break;
- default:
- b43dbg(dev->wl, "Debug-IRQ triggered for unknown reason: %u\n",
- reason);
- }
-out:
- /* Acknowledge the debug-IRQ, so the firmware can continue. */
- b43_shm_write16(dev, B43_SHM_SCRATCH,
- B43_DEBUGIRQ_REASON_REG, B43_DEBUGIRQ_ACK);
-}
-
-/* Interrupt handler bottom-half */
-static void b43_interrupt_tasklet(struct b43_wldev *dev)
-{
- u32 reason;
- u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
- u32 merged_dma_reason = 0;
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->wl->irq_lock, flags);
-
- B43_WARN_ON(b43_status(dev) != B43_STAT_STARTED);
-
- reason = dev->irq_reason;
- for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
- dma_reason[i] = dev->dma_reason[i];
- merged_dma_reason |= dma_reason[i];
- }
-
- if (unlikely(reason & B43_IRQ_MAC_TXERR))
- b43err(dev->wl, "MAC transmission error\n");
-
- if (unlikely(reason & B43_IRQ_PHY_TXERR)) {
- b43err(dev->wl, "PHY transmission error\n");
- rmb();
- if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
- atomic_set(&dev->phy.txerr_cnt,
- B43_PHY_TX_BADNESS_LIMIT);
- b43err(dev->wl, "Too many PHY TX errors, "
- "restarting the controller\n");
- b43_controller_restart(dev, "PHY TX errors");
- }
- }
-
- if (unlikely(merged_dma_reason & (B43_DMAIRQ_FATALMASK |
- B43_DMAIRQ_NONFATALMASK))) {
- if (merged_dma_reason & B43_DMAIRQ_FATALMASK) {
- b43err(dev->wl, "Fatal DMA error: "
- "0x%08X, 0x%08X, 0x%08X, "
- "0x%08X, 0x%08X, 0x%08X\n",
- dma_reason[0], dma_reason[1],
- dma_reason[2], dma_reason[3],
- dma_reason[4], dma_reason[5]);
- b43_controller_restart(dev, "DMA error");
- mmiowb();
- spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
- return;
- }
- if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) {
- b43err(dev->wl, "DMA error: "
- "0x%08X, 0x%08X, 0x%08X, "
- "0x%08X, 0x%08X, 0x%08X\n",
- dma_reason[0], dma_reason[1],
- dma_reason[2], dma_reason[3],
- dma_reason[4], dma_reason[5]);
- }
- }
-
- if (unlikely(reason & B43_IRQ_UCODE_DEBUG))
- handle_irq_ucode_debug(dev);
- if (reason & B43_IRQ_TBTT_INDI)
- handle_irq_tbtt_indication(dev);
- if (reason & B43_IRQ_ATIM_END)
- handle_irq_atim_end(dev);
- if (reason & B43_IRQ_BEACON)
- handle_irq_beacon(dev);
- if (reason & B43_IRQ_PMQ)
- handle_irq_pmq(dev);
- if (reason & B43_IRQ_TXFIFO_FLUSH_OK)
- ;/* TODO */
- if (reason & B43_IRQ_NOISESAMPLE_OK)
- handle_irq_noise(dev);
-
- /* Check the DMA reason registers for received data. */
- if (dma_reason[0] & B43_DMAIRQ_RX_DONE) {
- if (b43_using_pio_transfers(dev))
- b43_pio_rx(dev->pio.rx_queue);
- else
- b43_dma_rx(dev->dma.rx_ring);
- }
- B43_WARN_ON(dma_reason[1] & B43_DMAIRQ_RX_DONE);
- B43_WARN_ON(dma_reason[2] & B43_DMAIRQ_RX_DONE);
- B43_WARN_ON(dma_reason[3] & B43_DMAIRQ_RX_DONE);
- B43_WARN_ON(dma_reason[4] & B43_DMAIRQ_RX_DONE);
- B43_WARN_ON(dma_reason[5] & B43_DMAIRQ_RX_DONE);
-
- if (reason & B43_IRQ_TX_OK)
- handle_irq_transmit_status(dev);
-
- b43_interrupt_enable(dev, dev->irq_savedstate);
- mmiowb();
- spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
-}
-
-static void b43_interrupt_ack(struct b43_wldev *dev, u32 reason)
-{
- b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, reason);
-
- b43_write32(dev, B43_MMIO_DMA0_REASON, dev->dma_reason[0]);
- b43_write32(dev, B43_MMIO_DMA1_REASON, dev->dma_reason[1]);
- b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);
- b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);
- b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);
- b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]);
-}
-
-/* Interrupt handler top-half */
-static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
-{
- irqreturn_t ret = IRQ_NONE;
- struct b43_wldev *dev = dev_id;
- u32 reason;
-
- if (!dev)
- return IRQ_NONE;
-
- spin_lock(&dev->wl->irq_lock);
-
- if (b43_status(dev) < B43_STAT_STARTED)
- goto out;
- reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
- if (reason == 0xffffffff) /* shared IRQ */
- goto out;
- ret = IRQ_HANDLED;
- reason &= b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
- if (!reason)
- goto out;
-
- dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON)
- & 0x0001DC00;
- dev->dma_reason[1] = b43_read32(dev, B43_MMIO_DMA1_REASON)
- & 0x0000DC00;
- dev->dma_reason[2] = b43_read32(dev, B43_MMIO_DMA2_REASON)
- & 0x0000DC00;
- dev->dma_reason[3] = b43_read32(dev, B43_MMIO_DMA3_REASON)
- & 0x0001DC00;
- dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON)
- & 0x0000DC00;
- dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON)
- & 0x0000DC00;
-
- b43_interrupt_ack(dev, reason);
- /* disable all IRQs. They are enabled again in the bottom half. */
- dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL);
- /* save the reason code and call our bottom half. */
- dev->irq_reason = reason;
- tasklet_schedule(&dev->isr_tasklet);
- out:
- mmiowb();
- spin_unlock(&dev->wl->irq_lock);
-
- return ret;
-}
-
-static void do_release_fw(struct b43_firmware_file *fw)
-{
- release_firmware(fw->data);
- fw->data = NULL;
- fw->filename = NULL;
-}
-
-static void b43_release_firmware(struct b43_wldev *dev)
-{
- do_release_fw(&dev->fw.ucode);
- do_release_fw(&dev->fw.pcm);
- do_release_fw(&dev->fw.initvals);
- do_release_fw(&dev->fw.initvals_band);
-}
-
-static void b43_print_fw_helptext(struct b43_wl *wl, bool error)
-{
- const char *text;
-
- text = "You must go to "
- "http://linuxwireless.org/en/users/Drivers/b43#devicefirmware "
- "and download the latest firmware (version 4).\n";
- if (error)
- b43err(wl, text);
- else
- b43warn(wl, text);
-}
-
-static int do_request_fw(struct b43_wldev *dev,
- const char *name,
- struct b43_firmware_file *fw,
- bool silent)
-{
- char path[sizeof(modparam_fwpostfix) + 32];
- const struct firmware *blob;
- struct b43_fw_header *hdr;
- u32 size;
- int err;
-
- if (!name) {
- /* Don't fetch anything. Free possibly cached firmware. */
- do_release_fw(fw);
- return 0;
- }
- if (fw->filename) {
- if (strcmp(fw->filename, name) == 0)
- return 0; /* Already have this fw. */
- /* Free the cached firmware first. */
- do_release_fw(fw);
- }
-
- snprintf(path, ARRAY_SIZE(path),
- "b43%s/%s.fw",
- modparam_fwpostfix, name);
- err = request_firmware(&blob, path, dev->dev->dev);
- if (err == -ENOENT) {
- if (!silent) {
- b43err(dev->wl, "Firmware file \"%s\" not found\n",
- path);
- }
- return err;
- } else if (err) {
- b43err(dev->wl, "Firmware file \"%s\" request failed (err=%d)\n",
- path, err);
- return err;
- }
- if (blob->size < sizeof(struct b43_fw_header))
- goto err_format;
- hdr = (struct b43_fw_header *)(blob->data);
- switch (hdr->type) {
- case B43_FW_TYPE_UCODE:
- case B43_FW_TYPE_PCM:
- size = be32_to_cpu(hdr->size);
- if (size != blob->size - sizeof(struct b43_fw_header))
- goto err_format;
- /* fallthrough */
- case B43_FW_TYPE_IV:
- if (hdr->ver != 1)
- goto err_format;
- break;
- default:
- goto err_format;
- }
-
- fw->data = blob;
- fw->filename = name;
-
- return 0;
-
-err_format:
- b43err(dev->wl, "Firmware file \"%s\" format error.\n", path);
- release_firmware(blob);
-
- return -EPROTO;
-}
-
-static int b43_request_firmware(struct b43_wldev *dev)
-{
- struct b43_firmware *fw = &dev->fw;
- const u8 rev = dev->dev->id.revision;
- const char *filename;
- u32 tmshigh;
- int err;
-
- /* Get microcode */
- tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
- if ((rev >= 5) && (rev <= 10))
- filename = "ucode5";
- else if ((rev >= 11) && (rev <= 12))
- filename = "ucode11";
- else if (rev >= 13)
- filename = "ucode13";
- else
- goto err_no_ucode;
- err = do_request_fw(dev, filename, &fw->ucode, 0);
- if (err)
- goto err_load;
-
- /* Get PCM code */
- if ((rev >= 5) && (rev <= 10))
- filename = "pcm5";
- else if (rev >= 11)
- filename = NULL;
- else
- goto err_no_pcm;
- fw->pcm_request_failed = 0;
- err = do_request_fw(dev, filename, &fw->pcm, 1);
- if (err == -ENOENT) {
- /* We did not find a PCM file? Not fatal, but
- * core rev <= 10 must do without hwcrypto then. */
- fw->pcm_request_failed = 1;
- } else if (err)
- goto err_load;
-
- /* Get initvals */
- switch (dev->phy.type) {
- case B43_PHYTYPE_A:
- if ((rev >= 5) && (rev <= 10)) {
- if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
- filename = "a0g1initvals5";
- else
- filename = "a0g0initvals5";
- } else
- goto err_no_initvals;
- break;
- case B43_PHYTYPE_G:
- if ((rev >= 5) && (rev <= 10))
- filename = "b0g0initvals5";
- else if (rev >= 13)
- filename = "b0g0initvals13";
- else
- goto err_no_initvals;
- break;
- case B43_PHYTYPE_N:
- if ((rev >= 11) && (rev <= 12))
- filename = "n0initvals11";
- else
- goto err_no_initvals;
- break;
- default:
- goto err_no_initvals;
- }
- err = do_request_fw(dev, filename, &fw->initvals, 0);
- if (err)
- goto err_load;
-
- /* Get bandswitch initvals */
- switch (dev->phy.type) {
- case B43_PHYTYPE_A:
- if ((rev >= 5) && (rev <= 10)) {
- if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
- filename = "a0g1bsinitvals5";
- else
- filename = "a0g0bsinitvals5";
- } else if (rev >= 11)
- filename = NULL;
- else
- goto err_no_initvals;
- break;
- case B43_PHYTYPE_G:
- if ((rev >= 5) && (rev <= 10))
- filename = "b0g0bsinitvals5";
- else if (rev >= 11)
- filename = NULL;
- else
- goto err_no_initvals;
- break;
- case B43_PHYTYPE_N:
- if ((rev >= 11) && (rev <= 12))
- filename = "n0bsinitvals11";
- else
- goto err_no_initvals;
- break;
- default:
- goto err_no_initvals;
- }
- err = do_request_fw(dev, filename, &fw->initvals_band, 0);
- if (err)
- goto err_load;
-
- return 0;
-
-err_load:
- b43_print_fw_helptext(dev->wl, 1);
- goto error;
-
-err_no_ucode:
- err = -ENODEV;
- b43err(dev->wl, "No microcode available for core rev %u\n", rev);
- goto error;
-
-err_no_pcm:
- err = -ENODEV;
- b43err(dev->wl, "No PCM available for core rev %u\n", rev);
- goto error;
-
-err_no_initvals:
- err = -ENODEV;
- b43err(dev->wl, "No Initial Values firmware file for PHY %u, "
- "core rev %u\n", dev->phy.type, rev);
- goto error;
-
-error:
- b43_release_firmware(dev);
- return err;
-}
-
-static int b43_upload_microcode(struct b43_wldev *dev)
-{
- const size_t hdr_len = sizeof(struct b43_fw_header);
- const __be32 *data;
- unsigned int i, len;
- u16 fwrev, fwpatch, fwdate, fwtime;
- u32 tmp, macctl;
- int err = 0;
-
- /* Jump the microcode PSM to offset 0 */
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- B43_WARN_ON(macctl & B43_MACCTL_PSM_RUN);
- macctl |= B43_MACCTL_PSM_JMP0;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
- /* Zero out all microcode PSM registers and shared memory. */
- for (i = 0; i < 64; i++)
- b43_shm_write16(dev, B43_SHM_SCRATCH, i, 0);
- for (i = 0; i < 4096; i += 2)
- b43_shm_write16(dev, B43_SHM_SHARED, i, 0);
-
- /* Upload Microcode. */
- data = (__be32 *) (dev->fw.ucode.data->data + hdr_len);
- len = (dev->fw.ucode.data->size - hdr_len) / sizeof(__be32);
- b43_shm_control_word(dev, B43_SHM_UCODE | B43_SHM_AUTOINC_W, 0x0000);
- for (i = 0; i < len; i++) {
- b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));
- udelay(10);
- }
-
- if (dev->fw.pcm.data) {
- /* Upload PCM data. */
- data = (__be32 *) (dev->fw.pcm.data->data + hdr_len);
- len = (dev->fw.pcm.data->size - hdr_len) / sizeof(__be32);
- b43_shm_control_word(dev, B43_SHM_HW, 0x01EA);
- b43_write32(dev, B43_MMIO_SHM_DATA, 0x00004000);
- /* No need for autoinc bit in SHM_HW */
- b43_shm_control_word(dev, B43_SHM_HW, 0x01EB);
- for (i = 0; i < len; i++) {
- b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));
- udelay(10);
- }
- }
-
- b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL);
-
- /* Start the microcode PSM */
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- macctl &= ~B43_MACCTL_PSM_JMP0;
- macctl |= B43_MACCTL_PSM_RUN;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
-
- /* Wait for the microcode to load and respond */
- i = 0;
- while (1) {
- tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
- if (tmp == B43_IRQ_MAC_SUSPENDED)
- break;
- i++;
- if (i >= 20) {
- b43err(dev->wl, "Microcode not responding\n");
- b43_print_fw_helptext(dev->wl, 1);
- err = -ENODEV;
- goto error;
- }
- msleep_interruptible(50);
- if (signal_pending(current)) {
- err = -EINTR;
- goto error;
- }
- }
- b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read */
-
- /* Get and check the revisions. */
- fwrev = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEREV);
- fwpatch = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEPATCH);
- fwdate = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEDATE);
- fwtime = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODETIME);
-
- if (fwrev <= 0x128) {
- b43err(dev->wl, "YOUR FIRMWARE IS TOO OLD. Firmware from "
- "binary drivers older than version 4.x is unsupported. "
- "You must upgrade your firmware files.\n");
- b43_print_fw_helptext(dev->wl, 1);
- err = -EOPNOTSUPP;
- goto error;
- }
- dev->fw.rev = fwrev;
- dev->fw.patch = fwpatch;
- dev->fw.opensource = (fwdate == 0xFFFF);
-
- if (dev->fw.opensource) {
- /* Patchlevel info is encoded in the "time" field. */
- dev->fw.patch = fwtime;
- b43info(dev->wl, "Loading OpenSource firmware version %u.%u%s\n",
- dev->fw.rev, dev->fw.patch,
- dev->fw.pcm_request_failed ? " (Hardware crypto not supported)" : "");
- } else {
- b43info(dev->wl, "Loading firmware version %u.%u "
- "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n",
- fwrev, fwpatch,
- (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
- (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
- if (dev->fw.pcm_request_failed) {
- b43warn(dev->wl, "No \"pcm5.fw\" firmware file found. "
- "Hardware accelerated cryptography is disabled.\n");
- b43_print_fw_helptext(dev->wl, 0);
- }
- }
-
- if (b43_is_old_txhdr_format(dev)) {
- b43warn(dev->wl, "You are using an old firmware image. "
- "Support for old firmware will be removed in July 2008.\n");
- b43_print_fw_helptext(dev->wl, 0);
- }
-
- return 0;
-
-error:
- macctl = b43_read32(dev, B43_MMIO_MACCTL);
- macctl &= ~B43_MACCTL_PSM_RUN;
- macctl |= B43_MACCTL_PSM_JMP0;
- b43_write32(dev, B43_MMIO_MACCTL, macctl);
-
- return err;
-}
-
-static int b43_write_initvals(struct b43_wldev *dev,
- const struct b43_iv *ivals,
- size_t count,
- size_t array_size)
-{
- const struct b43_iv *iv;
- u16 offset;
- size_t i;
- bool bit32;
-
- BUILD_BUG_ON(sizeof(struct b43_iv) != 6);
- iv = ivals;
- for (i = 0; i < count; i++) {
- if (array_size < sizeof(iv->offset_size))
- goto err_format;
- array_size -= sizeof(iv->offset_size);
- offset = be16_to_cpu(iv->offset_size);
- bit32 = !!(offset & B43_IV_32BIT);
- offset &= B43_IV_OFFSET_MASK;
- if (offset >= 0x1000)
- goto err_format;
- if (bit32) {
- u32 value;
-
- if (array_size < sizeof(iv->data.d32))
- goto err_format;
- array_size -= sizeof(iv->data.d32);
-
- value = get_unaligned_be32(&iv->data.d32);
- b43_write32(dev, offset, value);
-
- iv = (const struct b43_iv *)((const uint8_t *)iv +
- sizeof(__be16) +
- sizeof(__be32));
- } else {
- u16 value;
-
- if (array_size < sizeof(iv->data.d16))
- goto err_format;
- array_size -= sizeof(iv->data.d16);
-
- value = be16_to_cpu(iv->data.d16);
- b43_write16(dev, offset, value);
-
- iv = (const struct b43_iv *)((const uint8_t *)iv +
- sizeof(__be16) +
- sizeof(__be16));
- }
- }
- if (array_size)
- goto err_format;
-
- return 0;
-
-err_format:
- b43err(dev->wl, "Initial Values Firmware file-format error.\n");
- b43_print_fw_helptext(dev->wl, 1);
-
- return -EPROTO;
-}
-
-static int b43_upload_initvals(struct b43_wldev *dev)
-{
- const size_t hdr_len = sizeof(struct b43_fw_header);
- const struct b43_fw_header *hdr;
- struct b43_firmware *fw = &dev->fw;
- const struct b43_iv *ivals;
- size_t count;
- int err;
-
- hdr = (const struct b43_fw_header *)(fw->initvals.data->data);
- ivals = (const struct b43_iv *)(fw->initvals.data->data + hdr_len);
- count = be32_to_cpu(hdr->size);
- err = b43_write_initvals(dev, ivals, count,
- fw->initvals.data->size - hdr_len);
- if (err)
- goto out;
- if (fw->initvals_band.data) {
- hdr = (const struct b43_fw_header *)(fw->initvals_band.data->data);
- ivals = (const struct b43_iv *)(fw->initvals_band.data->data + hdr_len);
- count = be32_to_cpu(hdr->size);
- err = b43_write_initvals(dev, ivals, count,
- fw->initvals_band.data->size - hdr_len);
- if (err)
- goto out;
- }
-out:
-
- return err;
-}
-
-/* Initialize the GPIOs
- * http://bcm-specs.sipsolutions.net/GPIO
- */
-static int b43_gpio_init(struct b43_wldev *dev)
-{
- struct ssb_bus *bus = dev->dev->bus;
- struct ssb_device *gpiodev, *pcidev = NULL;
- u32 mask, set;
-
- b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
- & ~B43_MACCTL_GPOUTSMSK);
-
- b43_write16(dev, B43_MMIO_GPIO_MASK, b43_read16(dev, B43_MMIO_GPIO_MASK)
- | 0x000F);
-
- mask = 0x0000001F;
- set = 0x0000000F;
- if (dev->dev->bus->chip_id == 0x4301) {
- mask |= 0x0060;
- set |= 0x0060;
- }
- if (0 /* FIXME: conditional unknown */ ) {
- b43_write16(dev, B43_MMIO_GPIO_MASK,
- b43_read16(dev, B43_MMIO_GPIO_MASK)
- | 0x0100);
- &nb
projects / openwrt / svn-archive / archive.git / commitdiff