ar71xx: work around a PCI controller bug which causes reads to the PCI_COMMAND regist...
authorFelix Fietkau <nbd@openwrt.org>
Sat, 4 Dec 2010 01:32:15 +0000 (01:32 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Sat, 4 Dec 2010 01:32:15 +0000 (01:32 +0000)
SVN-Revision: 24236

package/mac80211/patches/520-ath9k_pci_error_fix.patch [deleted file]
target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c

diff --git a/package/mac80211/patches/520-ath9k_pci_error_fix.patch b/package/mac80211/patches/520-ath9k_pci_error_fix.patch
deleted file mode 100644 (file)
index b8fcc99..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -255,6 +255,10 @@ static void ath_pci_remove(struct pci_de
-       struct ath_wiphy *aphy = hw->priv;
-       struct ath_softc *sc = aphy->sc;
-       void __iomem *mem = sc->mem;
-+      u16 val;
-+
-+      /* Do a config read to clear pre-existing pci error status */
-+      pci_read_config_word(pdev, PCI_COMMAND, &val);
-       ath9k_deinit_device(sc);
-       free_irq(sc->irq, sc);
index c6c6e55..5f10d6a 100644 (file)
@@ -136,6 +136,7 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
        static u32 mask[8] = {0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0};
        unsigned long flags;
        u32 data;
+       int retry = 0;
        int ret;
 
        ret = PCIBIOS_SUCCESSFUL;
@@ -143,6 +144,7 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
        DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d\n", bus->number,
                        PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
 
+retry:
        spin_lock_irqsave(&ar71xx_pci_lock, flags);
 
        if (bus->number == 0 && devfn == 0) {
@@ -176,6 +178,14 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 
        *value = (data >> (8 * (where & 3))) & mask[size & 7];
 
+       /*
+        * PCI controller bug: sometimes reads to the PCI_COMMAND register
+        * return 0xffff, even though the PCI trace shows the correct value.
+        * Work around this by retrying reads to this register
+        */
+       if (where == PCI_COMMAND && (*value & 0xffff) == 0xffff && retry++ < 2)
+               goto retry;
+
        return ret;
 }