mac80211: update to wireless-testing 2010-04-09, add work-in-progress ar9300 patches
authorFelix Fietkau <nbd@openwrt.org>
Sat, 10 Apr 2010 16:50:15 +0000 (16:50 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Sat, 10 Apr 2010 16:50:15 +0000 (16:50 +0000)
SVN-Revision: 20777

27 files changed:
package/mac80211/Makefile
package/mac80211/patches/001-disable_b44.patch
package/mac80211/patches/002-disable_rfkill.patch
package/mac80211/patches/007-remove_misc_drivers.patch
package/mac80211/patches/010-no_pcmcia.patch
package/mac80211/patches/011-no_sdio.patch
package/mac80211/patches/013-disable_b43_nphy.patch
package/mac80211/patches/014-add_iw_handler.patch [deleted file]
package/mac80211/patches/015-remove-rt2x00-options.patch
package/mac80211/patches/120-compat_rcu_dereference.patch [new file with mode: 0644]
package/mac80211/patches/300-ar9300_support.patch [new file with mode: 0644]
package/mac80211/patches/300-fix-mesh.patch [deleted file]
package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
package/mac80211/patches/404-ath_regd_optional.patch
package/mac80211/patches/405-ath9k-read-eeprom-data-from-platform-data-on-pci-bus.patch
package/mac80211/patches/406-ath9k-set-AH_USE_EEPROM-only-if-no-platform-data-present.patch
package/mac80211/patches/407-ath9k-override-mac-address-from-platform-data.patch
package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch
package/mac80211/patches/409-ath9k-add-wndr3700-antenna-initialization.patch
package/mac80211/patches/410-ath9k-wndr3700-led-pin-fix.patch
package/mac80211/patches/500-ath9k_debugfs_chainmask.patch
package/mac80211/patches/510-ath9k_debugfs_regaccess.patch
package/mac80211/patches/520-cfg80211_get_freq.patch
package/mac80211/patches/540-ath9k_use_minstrel.patch
package/mac80211/patches/550-ath9k_bb_fix.patch
package/mac80211/patches/560-ath9k_tx_buf_return_cleanup.patch [new file with mode: 0644]
package/mac80211/patches/602-rt2x00-remove-mcu-requests-for-soc.patch

index f44c12a..c39eaf0 100644 (file)
@@ -10,12 +10,12 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=2010-03-24
-PKG_RELEASE:=6
+PKG_VERSION:=2010-04-09
+PKG_RELEASE:=1
 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
 #      http://www.orbit-lab.org/kernel/compat-wireless-2.6/2010/11 \
 #      http://wireless.kernel.org/download/compat-wireless-2.6
-PKG_MD5SUM:=73357c52b5d6888ea3228b2ca8aa5eca
+PKG_MD5SUM:=4ae40fcb5552cd8d45e0b4368c548363
 
 PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)
index ce10e71..1869a59 100644 (file)
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -269,8 +269,8 @@ endif
+@@ -256,8 +256,8 @@ endif
  
  CONFIG_P54_PCI=m
  
index 2599dbb..9c6338a 100644 (file)
@@ -9,7 +9,7 @@
  
  ifeq ($(CONFIG_MAC80211),y)
  $(error "ERROR: you have MAC80211 compiled into the kernel, CONFIG_MAC80211=y, as such you cannot replace its mac80211 driver. You need this set to CONFIG_MAC80211=m. If you are using Fedora upgrade your kernel as later version should this set as modular. For further information on Fedora see https://bugzilla.redhat.com/show_bug.cgi?id=470143. If you are using your own kernel recompile it and make mac80211 modular")
-@@ -492,8 +492,8 @@ endif
+@@ -481,8 +481,8 @@ endif
  # We need the backported rfkill module on kernel < 2.6.31.
  # In more recent kernel versions use the in kernel rfkill module.
  ifdef CONFIG_COMPAT_KERNEL_31
index a51a4b3..e0b007f 100644 (file)
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -299,10 +299,10 @@ endif
+@@ -286,10 +286,10 @@ endif
  CONFIG_MWL8K=m
  
  # Ethernet drivers go here
@@ -15,7 +15,7 @@
  
  CONFIG_HERMES=m
  CONFIG_HERMES_CACHE_FW_ON_INIT=y
-@@ -355,10 +355,10 @@ CONFIG_USB_NET_COMPAT_RNDIS_HOST=n
+@@ -342,10 +342,10 @@ CONFIG_USB_NET_COMPAT_RNDIS_HOST=n
  CONFIG_USB_NET_COMPAT_RNDIS_WLAN=n
  CONFIG_USB_NET_COMPAT_CDCETHER=n
  else
index a9437ce..0826df4 100644 (file)
@@ -9,7 +9,7 @@
   CONFIG_SSB=m
  else
  include $(KLIB_BUILD)/.config
-@@ -194,7 +194,7 @@ CONFIG_B43=m
+@@ -181,7 +181,7 @@ CONFIG_B43=m
  CONFIG_B43_HWRNG=y
  CONFIG_B43_PCI_AUTOSELECT=y
  ifneq ($(CONFIG_PCMCIA),)
@@ -18,7 +18,7 @@
  endif
  CONFIG_B43_LEDS=y
  CONFIG_B43_PHY_LP=y
-@@ -246,7 +246,7 @@ CONFIG_SSB_BLOCKIO=y
+@@ -233,7 +233,7 @@ CONFIG_SSB_BLOCKIO=y
  CONFIG_SSB_PCIHOST=y
  CONFIG_SSB_B43_PCI_BRIDGE=y
  ifneq ($(CONFIG_PCMCIA),)
index bd6bdfe..04a8029 100644 (file)
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -407,8 +407,8 @@ endif # end of SPI driver list
+@@ -396,8 +396,8 @@ endif # end of SPI driver list
  
  ifneq ($(CONFIG_MMC),)
  
index 747c52a..efdfb14 100644 (file)
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -198,7 +198,7 @@ ifneq ($(CONFIG_PCMCIA),)
+@@ -185,7 +185,7 @@ ifneq ($(CONFIG_PCMCIA),)
  endif
  CONFIG_B43_LEDS=y
  CONFIG_B43_PHY_LP=y
diff --git a/package/mac80211/patches/014-add_iw_handler.patch b/package/mac80211/patches/014-add_iw_handler.patch
deleted file mode 100644 (file)
index 5119b35..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-commit b7d48ccc687c44213121b1b565dccdc4488f5d9a
-Author: Pavel Roskin <proski@gnu.org>
-Date:   Wed Mar 24 17:23:37 2010 -0400
-
-    compat: add compat-2.6.35.h and IW_HANDLER
-    
-    Signed-off-by: Pavel Roskin <proski@gnu.org>
-
---- /dev/null
-+++ b/include/linux/compat-2.6.35.h
-@@ -0,0 +1,13 @@
-+#ifndef LINUX_26_35_COMPAT_H
-+#define LINUX_26_35_COMPAT_H
-+
-+#include <linux/version.h>
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
-+
-+#define IW_HANDLER(id, func)                  \
-+      [IW_IOCTL_IDX(id)] = func
-+
-+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)) */
-+
-+#endif /* LINUX_26_35_COMPAT_H */
---- a/include/linux/compat-2.6.h
-+++ b/include/linux/compat-2.6.h
-@@ -27,5 +27,6 @@
- #include <linux/compat-2.6.32.h>
- #include <linux/compat-2.6.33.h>
- #include <linux/compat-2.6.34.h>
-+#include <linux/compat-2.6.35.h>
- #endif /* LINUX_26_COMPAT_H */
index f980979..e62192b 100644 (file)
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -276,12 +276,12 @@ CONFIG_RTL8180=m
+@@ -248,12 +248,12 @@ CONFIG_RTL8180=m
  
  CONFIG_ADM8211=m
  
@@ -15,7 +15,7 @@
  # CONFIG_RT2800PCI_RT30XX=y
  # CONFIG_RT2800PCI_RT35XX=y
  # CONFIG_RT2800PCI_SOC=y
-@@ -381,7 +381,7 @@ CONFIG_RT2800USB=m
+@@ -355,7 +355,7 @@ CONFIG_RT2800USB=m
  # CONFIG_RT2800USB_RT35XX=y
  # CONFIG_RT2800USB_UNKNOWN=y
  endif
diff --git a/package/mac80211/patches/120-compat_rcu_dereference.patch b/package/mac80211/patches/120-compat_rcu_dereference.patch
new file mode 100644 (file)
index 0000000..3c90a28
--- /dev/null
@@ -0,0 +1,11 @@
+--- a/include/linux/compat-2.6.34.h
++++ b/include/linux/compat-2.6.34.h
+@@ -162,6 +162,8 @@ static inline void device_unlock(struct 
+       .prod_id_hash = { 0, 0, (vh3), 0 }, }
+ #endif
++#define rcu_dereference_check(p, c) rcu_dereference(p)
++
+ #endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) */
+ #endif /* LINUX_26_34_COMPAT_H */
diff --git a/package/mac80211/patches/300-ar9300_support.patch b/package/mac80211/patches/300-ar9300_support.patch
new file mode 100644 (file)
index 0000000..edeaaf4
--- /dev/null
@@ -0,0 +1,38068 @@
+diff --git a/drivers/net/wireless/ath/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile
+index 97133be..dd112be 100644
+--- a/drivers/net/wireless/ath/ath9k/Makefile
++++ b/drivers/net/wireless/ath/ath9k/Makefile
+@@ -13,16 +13,26 @@ ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o
+ obj-$(CONFIG_ATH9K) += ath9k.o
+-ath9k_hw-y:=  hw.o \
++ath9k_hw-y:=  \
++              ar9002_hw.o \
++              ar9003_hw.o \
++              hw.o \
++              ar9003_phy.o \
++              ar9002_phy.o \
++              ar5008_phy.o \
++              ar9002_calib.o \
++              ar9003_calib.o \
++              calib.o \
+               eeprom.o \
+               eeprom_def.o \
+               eeprom_4k.o \
+               eeprom_9287.o \
+-              calib.o \
+               ani.o \
+-              phy.o \
+               btcoex.o \
+               mac.o \
++              ar9002_mac.o \
++              ar9003_mac.o \
++              ar9003_eeprom.o
+ obj-$(CONFIG_ATH9K_HW) += ath9k_hw.o
+diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
+index 2a0cd64..5a2d867 100644
+--- a/drivers/net/wireless/ath/ath9k/ani.c
++++ b/drivers/net/wireless/ath/ath9k/ani.c
+@@ -15,6 +15,7 @@
+  */
+ #include "hw.h"
++#include "hw-ops.h"
+ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
+                                       struct ath9k_channel *chan)
+@@ -37,190 +38,6 @@ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
+       return 0;
+ }
+-static bool ath9k_hw_ani_control(struct ath_hw *ah,
+-                               enum ath9k_ani_cmd cmd, int param)
+-{
+-      struct ar5416AniState *aniState = ah->curani;
+-      struct ath_common *common = ath9k_hw_common(ah);
+-
+-      switch (cmd & ah->ani_function) {
+-      case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{
+-              u32 level = param;
+-
+-              if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
+-                      ath_print(common, ATH_DBG_ANI,
+-                                "level out of range (%u > %u)\n",
+-                                level,
+-                                (unsigned)ARRAY_SIZE(ah->totalSizeDesired));
+-                      return false;
+-              }
+-
+-              REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
+-                            AR_PHY_DESIRED_SZ_TOT_DES,
+-                            ah->totalSizeDesired[level]);
+-              REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
+-                            AR_PHY_AGC_CTL1_COARSE_LOW,
+-                            ah->coarse_low[level]);
+-              REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
+-                            AR_PHY_AGC_CTL1_COARSE_HIGH,
+-                            ah->coarse_high[level]);
+-              REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
+-                            AR_PHY_FIND_SIG_FIRPWR,
+-                            ah->firpwr[level]);
+-
+-              if (level > aniState->noiseImmunityLevel)
+-                      ah->stats.ast_ani_niup++;
+-              else if (level < aniState->noiseImmunityLevel)
+-                      ah->stats.ast_ani_nidown++;
+-              aniState->noiseImmunityLevel = level;
+-              break;
+-      }
+-      case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
+-              const int m1ThreshLow[] = { 127, 50 };
+-              const int m2ThreshLow[] = { 127, 40 };
+-              const int m1Thresh[] = { 127, 0x4d };
+-              const int m2Thresh[] = { 127, 0x40 };
+-              const int m2CountThr[] = { 31, 16 };
+-              const int m2CountThrLow[] = { 63, 48 };
+-              u32 on = param ? 1 : 0;
+-
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+-                            AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
+-                            m1ThreshLow[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+-                            AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
+-                            m2ThreshLow[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+-                            AR_PHY_SFCORR_M1_THRESH,
+-                            m1Thresh[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+-                            AR_PHY_SFCORR_M2_THRESH,
+-                            m2Thresh[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+-                            AR_PHY_SFCORR_M2COUNT_THR,
+-                            m2CountThr[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+-                            AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
+-                            m2CountThrLow[on]);
+-
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+-                            AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
+-                            m1ThreshLow[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+-                            AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
+-                            m2ThreshLow[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+-                            AR_PHY_SFCORR_EXT_M1_THRESH,
+-                            m1Thresh[on]);
+-              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+-                            AR_PHY_SFCORR_EXT_M2_THRESH,
+-                            m2Thresh[on]);
+-
+-              if (on)
+-                      REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
+-                                  AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+-              else
+-                      REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
+-                                  AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+-
+-              if (!on != aniState->ofdmWeakSigDetectOff) {
+-                      if (on)
+-                              ah->stats.ast_ani_ofdmon++;
+-                      else
+-                              ah->stats.ast_ani_ofdmoff++;
+-                      aniState->ofdmWeakSigDetectOff = !on;
+-              }
+-              break;
+-      }
+-      case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
+-              const int weakSigThrCck[] = { 8, 6 };
+-              u32 high = param ? 1 : 0;
+-
+-              REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
+-                            AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK,
+-                            weakSigThrCck[high]);
+-              if (high != aniState->cckWeakSigThreshold) {
+-                      if (high)
+-                              ah->stats.ast_ani_cckhigh++;
+-                      else
+-                              ah->stats.ast_ani_ccklow++;
+-                      aniState->cckWeakSigThreshold = high;
+-              }
+-              break;
+-      }
+-      case ATH9K_ANI_FIRSTEP_LEVEL:{
+-              const int firstep[] = { 0, 4, 8 };
+-              u32 level = param;
+-
+-              if (level >= ARRAY_SIZE(firstep)) {
+-                      ath_print(common, ATH_DBG_ANI,
+-                                "level out of range (%u > %u)\n",
+-                                level,
+-                                (unsigned) ARRAY_SIZE(firstep));
+-                      return false;
+-              }
+-              REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
+-                            AR_PHY_FIND_SIG_FIRSTEP,
+-                            firstep[level]);
+-              if (level > aniState->firstepLevel)
+-                      ah->stats.ast_ani_stepup++;
+-              else if (level < aniState->firstepLevel)
+-                      ah->stats.ast_ani_stepdown++;
+-              aniState->firstepLevel = level;
+-              break;
+-      }
+-      case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
+-              const int cycpwrThr1[] =
+-                      { 2, 4, 6, 8, 10, 12, 14, 16 };
+-              u32 level = param;
+-
+-              if (level >= ARRAY_SIZE(cycpwrThr1)) {
+-                      ath_print(common, ATH_DBG_ANI,
+-                                "level out of range (%u > %u)\n",
+-                                level,
+-                                (unsigned) ARRAY_SIZE(cycpwrThr1));
+-                      return false;
+-              }
+-              REG_RMW_FIELD(ah, AR_PHY_TIMING5,
+-                            AR_PHY_TIMING5_CYCPWR_THR1,
+-                            cycpwrThr1[level]);
+-              if (level > aniState->spurImmunityLevel)
+-                      ah->stats.ast_ani_spurup++;
+-              else if (level < aniState->spurImmunityLevel)
+-                      ah->stats.ast_ani_spurdown++;
+-              aniState->spurImmunityLevel = level;
+-              break;
+-      }
+-      case ATH9K_ANI_PRESENT:
+-              break;
+-      default:
+-              ath_print(common, ATH_DBG_ANI,
+-                        "invalid cmd %u\n", cmd);
+-              return false;
+-      }
+-
+-      ath_print(common, ATH_DBG_ANI, "ANI parameters:\n");
+-      ath_print(common, ATH_DBG_ANI,
+-                "noiseImmunityLevel=%d, spurImmunityLevel=%d, "
+-                "ofdmWeakSigDetectOff=%d\n",
+-                aniState->noiseImmunityLevel,
+-                aniState->spurImmunityLevel,
+-                !aniState->ofdmWeakSigDetectOff);
+-      ath_print(common, ATH_DBG_ANI,
+-                "cckWeakSigThreshold=%d, "
+-                "firstepLevel=%d, listenTime=%d\n",
+-                aniState->cckWeakSigThreshold,
+-                aniState->firstepLevel,
+-                aniState->listenTime);
+-      ath_print(common, ATH_DBG_ANI,
+-              "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
+-              aniState->cycleCount,
+-              aniState->ofdmPhyErrCount,
+-              aniState->cckPhyErrCount);
+-
+-      return true;
+-}
+-
+ static void ath9k_hw_update_mibstats(struct ath_hw *ah,
+                                    struct ath9k_mib_stats *stats)
+ {
+diff --git a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
+new file mode 100644
+index 0000000..ba899f9
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
+@@ -0,0 +1,873 @@
++/*
++ * Copyright (c) 2008-2009 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_AR5008_H
++#define INITVALS_AR5008_H
++
++static const u32 ar5416Modes[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000,
++       0x00014008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00,
++       0x06e006e0},
++      {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab,
++       0x098813cf},
++      {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810,
++       0x08f04810},
++      {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a,
++       0x0000320a},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0,
++       0x137216a0},
++      {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x00009850, 0x6c48b4e0, 0x6d48b4e0, 0x6d48b0de, 0x6c48b0de,
++       0x6c48b0de},
++      {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e,
++       0x7ec82d2e},
++      {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e,
++       0x31395d5e},
++      {0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18,
++       0x00049d18},
++      {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190,
++       0x409a4190},
++      {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081,
++       0x050cb081},
++      {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x000001b8, 0x00000370, 0x00000268, 0x00000134,
++       0x00000134},
++      {0x00009924, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b,
++       0xd0058a0b},
++      {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020,
++       0xffb81020},
++      {0x00009960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80,
++       0x00012d80},
++      {0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80,
++       0x00012d80},
++      {0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80,
++       0x00012d80},
++      {0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120,
++       0x00001120},
++      {0x000099bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00,
++       0x001a0a00},
++      {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be,
++       0x038919be},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c,
++       0x6af6532c},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880,
++       0x00000880},
++      {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788,
++       0xd03e4788},
++      {0x0000a20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000b20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000c20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa,
++       0x0a1a7caa},
++      {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000,
++       0x18010000},
++      {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402,
++       0x2e032402},
++      {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06,
++       0x4a0a3c06},
++      {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b,
++       0x621a540b},
++      {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b,
++       0x764f6c1b},
++      {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a,
++       0x845b7a5a},
++      {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf,
++       0x950f8ccf},
++      {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f,
++       0xa5cf9b4f},
++      {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f,
++       0xbddfaf1f},
++      {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f,
++       0xd1ffc93f},
++      {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++};
++
++static const u32 ar5416Common[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020015},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00004030, 0x00000002},
++      {0x0000403c, 0x00000002},
++      {0x00007010, 0x00000000},
++      {0x00007038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x40000000},
++      {0x00008054, 0x00000000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x000080c0, 0x2a82301a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0xffffffff},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c4, 0x00000000},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008264, 0xa8000010},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x00008300, 0x00000000},
++      {0x00008304, 0x00000000},
++      {0x00008308, 0x00000000},
++      {0x0000830c, 0x00000000},
++      {0x00008310, 0x00000000},
++      {0x00008314, 0x00000000},
++      {0x00008318, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000007},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00070000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x000107ff},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xad848e19},
++      {0x00009810, 0x7d14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x00009840, 0x206a002e},
++      {0x0000984c, 0x1284233c},
++      {0x00009854, 0x00000859},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x05100000},
++      {0x0000a920, 0x05100000},
++      {0x0000b920, 0x05100000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009948, 0x9280b212},
++      {0x0000994c, 0x00020028},
++      {0x00009954, 0x5d50e188},
++      {0x00009958, 0x00081fff},
++      {0x0000c95c, 0x004b6a8e},
++      {0x0000c968, 0x000003ce},
++      {0x00009970, 0x190fb515},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x001fff00},
++      {0x000099ac, 0x00000000},
++      {0x000099b0, 0x03051000},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000200},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x000000aa},
++      {0x000099fc, 0x00001042},
++      {0x00009b00, 0x00000000},
++      {0x00009b04, 0x00000001},
++      {0x00009b08, 0x00000002},
++      {0x00009b0c, 0x00000003},
++      {0x00009b10, 0x00000004},
++      {0x00009b14, 0x00000005},
++      {0x00009b18, 0x00000008},
++      {0x00009b1c, 0x00000009},
++      {0x00009b20, 0x0000000a},
++      {0x00009b24, 0x0000000b},
++      {0x00009b28, 0x0000000c},
++      {0x00009b2c, 0x0000000d},
++      {0x00009b30, 0x00000010},
++      {0x00009b34, 0x00000011},
++      {0x00009b38, 0x00000012},
++      {0x00009b3c, 0x00000013},
++      {0x00009b40, 0x00000014},
++      {0x00009b44, 0x00000015},
++      {0x00009b48, 0x00000018},
++      {0x00009b4c, 0x00000019},
++      {0x00009b50, 0x0000001a},
++      {0x00009b54, 0x0000001b},
++      {0x00009b58, 0x0000001c},
++      {0x00009b5c, 0x0000001d},
++      {0x00009b60, 0x00000020},
++      {0x00009b64, 0x00000021},
++      {0x00009b68, 0x00000022},
++      {0x00009b6c, 0x00000023},
++      {0x00009b70, 0x00000024},
++      {0x00009b74, 0x00000025},
++      {0x00009b78, 0x00000028},
++      {0x00009b7c, 0x00000029},
++      {0x00009b80, 0x0000002a},
++      {0x00009b84, 0x0000002b},
++      {0x00009b88, 0x0000002c},
++      {0x00009b8c, 0x0000002d},
++      {0x00009b90, 0x00000030},
++      {0x00009b94, 0x00000031},
++      {0x00009b98, 0x00000032},
++      {0x00009b9c, 0x00000033},
++      {0x00009ba0, 0x00000034},
++      {0x00009ba4, 0x00000035},
++      {0x00009ba8, 0x00000035},
++      {0x00009bac, 0x00000035},
++      {0x00009bb0, 0x00000035},
++      {0x00009bb4, 0x00000035},
++      {0x00009bb8, 0x00000035},
++      {0x00009bbc, 0x00000035},
++      {0x00009bc0, 0x00000035},
++      {0x00009bc4, 0x00000035},
++      {0x00009bc8, 0x00000035},
++      {0x00009bcc, 0x00000035},
++      {0x00009bd0, 0x00000035},
++      {0x00009bd4, 0x00000035},
++      {0x00009bd8, 0x00000035},
++      {0x00009bdc, 0x00000035},
++      {0x00009be0, 0x00000035},
++      {0x00009be4, 0x00000035},
++      {0x00009be8, 0x00000035},
++      {0x00009bec, 0x00000035},
++      {0x00009bf0, 0x00000035},
++      {0x00009bf4, 0x00000035},
++      {0x00009bf8, 0x00000010},
++      {0x00009bfc, 0x0000001a},
++      {0x0000a210, 0x40806333},
++      {0x0000a214, 0x00106c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x018830c6},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x00000bb5},
++      {0x0000a22c, 0x00000011},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a23c, 0x13c889af},
++      {0x0000a240, 0x38490a20},
++      {0x0000a244, 0x00007bb6},
++      {0x0000a248, 0x0fff3ffc},
++      {0x0000a24c, 0x00000001},
++      {0x0000a250, 0x0000a000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0cc75380},
++      {0x0000a25c, 0x0f0f0f01},
++      {0x0000a260, 0xdfa91f01},
++      {0x0000a268, 0x00000000},
++      {0x0000a26c, 0x0e79e5c6},
++      {0x0000b26c, 0x0e79e5c6},
++      {0x0000c26c, 0x0e79e5c6},
++      {0x0000d270, 0x00820820},
++      {0x0000a278, 0x1ce739ce},
++      {0x0000a27c, 0x051701ce},
++      {0x0000a338, 0x00000000},
++      {0x0000a33c, 0x00000000},
++      {0x0000a340, 0x00000000},
++      {0x0000a344, 0x00000000},
++      {0x0000a348, 0x3fffffff},
++      {0x0000a34c, 0x3fffffff},
++      {0x0000a350, 0x3fffffff},
++      {0x0000a354, 0x0003ffff},
++      {0x0000a358, 0x79a8aa1f},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a388, 0x08000000},
++      {0x0000a38c, 0x20202020},
++      {0x0000a390, 0x20202020},
++      {0x0000a394, 0x1ce739ce},
++      {0x0000a398, 0x000001ce},
++      {0x0000a39c, 0x00000001},
++      {0x0000a3a0, 0x00000000},
++      {0x0000a3a4, 0x00000000},
++      {0x0000a3a8, 0x00000000},
++      {0x0000a3ac, 0x00000000},
++      {0x0000a3b0, 0x00000000},
++      {0x0000a3b4, 0x00000000},
++      {0x0000a3b8, 0x00000000},
++      {0x0000a3bc, 0x00000000},
++      {0x0000a3c0, 0x00000000},
++      {0x0000a3c4, 0x00000000},
++      {0x0000a3c8, 0x00000246},
++      {0x0000a3cc, 0x20202020},
++      {0x0000a3d0, 0x20202020},
++      {0x0000a3d4, 0x20202020},
++      {0x0000a3dc, 0x1ce739ce},
++      {0x0000a3e0, 0x000001ce},
++};
++
++static const u32 ar5416Bank0[][2] = {
++      {0x000098b0, 0x1e5795e5},
++      {0x000098e0, 0x02008020},
++};
++
++static const u32 ar5416BB_RfGain[][3] = {
++      {0x00009a00, 0x00000000, 0x00000000},
++      {0x00009a04, 0x00000040, 0x00000040},
++      {0x00009a08, 0x00000080, 0x00000080},
++      {0x00009a0c, 0x000001a1, 0x00000141},
++      {0x00009a10, 0x000001e1, 0x00000181},
++      {0x00009a14, 0x00000021, 0x000001c1},
++      {0x00009a18, 0x00000061, 0x00000001},
++      {0x00009a1c, 0x00000168, 0x00000041},
++      {0x00009a20, 0x000001a8, 0x000001a8},
++      {0x00009a24, 0x000001e8, 0x000001e8},
++      {0x00009a28, 0x00000028, 0x00000028},
++      {0x00009a2c, 0x00000068, 0x00000068},
++      {0x00009a30, 0x00000189, 0x000000a8},
++      {0x00009a34, 0x000001c9, 0x00000169},
++      {0x00009a38, 0x00000009, 0x000001a9},
++      {0x00009a3c, 0x00000049, 0x000001e9},
++      {0x00009a40, 0x00000089, 0x00000029},
++      {0x00009a44, 0x00000170, 0x00000069},
++      {0x00009a48, 0x000001b0, 0x00000190},
++      {0x00009a4c, 0x000001f0, 0x000001d0},
++      {0x00009a50, 0x00000030, 0x00000010},
++      {0x00009a54, 0x00000070, 0x00000050},
++      {0x00009a58, 0x00000191, 0x00000090},
++      {0x00009a5c, 0x000001d1, 0x00000151},
++      {0x00009a60, 0x00000011, 0x00000191},
++      {0x00009a64, 0x00000051, 0x000001d1},
++      {0x00009a68, 0x00000091, 0x00000011},
++      {0x00009a6c, 0x000001b8, 0x00000051},
++      {0x00009a70, 0x000001f8, 0x00000198},
++      {0x00009a74, 0x00000038, 0x000001d8},
++      {0x00009a78, 0x00000078, 0x00000018},
++      {0x00009a7c, 0x00000199, 0x00000058},
++      {0x00009a80, 0x000001d9, 0x00000098},
++      {0x00009a84, 0x00000019, 0x00000159},
++      {0x00009a88, 0x00000059, 0x00000199},
++      {0x00009a8c, 0x00000099, 0x000001d9},
++      {0x00009a90, 0x000000d9, 0x00000019},
++      {0x00009a94, 0x000000f9, 0x00000059},
++      {0x00009a98, 0x000000f9, 0x00000099},
++      {0x00009a9c, 0x000000f9, 0x000000d9},
++      {0x00009aa0, 0x000000f9, 0x000000f9},
++      {0x00009aa4, 0x000000f9, 0x000000f9},
++      {0x00009aa8, 0x000000f9, 0x000000f9},
++      {0x00009aac, 0x000000f9, 0x000000f9},
++      {0x00009ab0, 0x000000f9, 0x000000f9},
++      {0x00009ab4, 0x000000f9, 0x000000f9},
++      {0x00009ab8, 0x000000f9, 0x000000f9},
++      {0x00009abc, 0x000000f9, 0x000000f9},
++      {0x00009ac0, 0x000000f9, 0x000000f9},
++      {0x00009ac4, 0x000000f9, 0x000000f9},
++      {0x00009ac8, 0x000000f9, 0x000000f9},
++      {0x00009acc, 0x000000f9, 0x000000f9},
++      {0x00009ad0, 0x000000f9, 0x000000f9},
++      {0x00009ad4, 0x000000f9, 0x000000f9},
++      {0x00009ad8, 0x000000f9, 0x000000f9},
++      {0x00009adc, 0x000000f9, 0x000000f9},
++      {0x00009ae0, 0x000000f9, 0x000000f9},
++      {0x00009ae4, 0x000000f9, 0x000000f9},
++      {0x00009ae8, 0x000000f9, 0x000000f9},
++      {0x00009aec, 0x000000f9, 0x000000f9},
++      {0x00009af0, 0x000000f9, 0x000000f9},
++      {0x00009af4, 0x000000f9, 0x000000f9},
++      {0x00009af8, 0x000000f9, 0x000000f9},
++      {0x00009afc, 0x000000f9, 0x000000f9},
++};
++
++static const u32 ar5416Bank1[][2] = {
++      {0x000098b0, 0x02108421},
++      {0x000098ec, 0x00000008},
++};
++
++static const u32 ar5416Bank2[][2] = {
++      {0x000098b0, 0x0e73ff17},
++      {0x000098e0, 0x00000420},
++};
++
++static const u32 ar5416Bank3[][3] = {
++      {0x000098f0, 0x01400018, 0x01c00018},
++};
++
++static const u32 ar5416Bank6[][3] = {
++
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x40ff0000, 0x40ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x004210a2, 0x004210a2},
++      {0x0000989c, 0x0014008f, 0x0014008f},
++      {0x0000989c, 0x00c40003, 0x00c40003},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x0001805e, 0x0001805e},
++      {0x0000989c, 0x0000c0ab, 0x0000c0ab},
++      {0x0000989c, 0x000000f1, 0x000000f1},
++      {0x0000989c, 0x00002081, 0x00002081},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank6TPC[][3] = {
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x40ff0000, 0x40ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x00423022, 0x00423022},
++      {0x0000989c, 0x201400df, 0x201400df},
++      {0x0000989c, 0x00c40002, 0x00c40002},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x0001805e, 0x0001805e},
++      {0x0000989c, 0x0000c0ab, 0x0000c0ab},
++      {0x0000989c, 0x000000e1, 0x000000e1},
++      {0x0000989c, 0x00007081, 0x00007081},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank7[][2] = {
++      {0x0000989c, 0x00000500},
++      {0x0000989c, 0x00000800},
++      {0x000098cc, 0x0000000e},
++};
++
++static const u32 ar5416Addac[][2] = {
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000003},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x0000000c},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000030},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000060},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000058},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x000098cc, 0x00000000},
++};
++
++static const u32 ar5416Modes_9100[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000,
++       0x00014008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00,
++       0x06e006e0},
++      {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab,
++       0x098813cf},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0,
++       0x037216a0},
++      {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x00009850, 0x6d48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6d48b0e2,
++       0x6d48b0e2},
++      {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec86d2e, 0x7ec84d2e,
++       0x7ec82d2e},
++      {0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e,
++       0x3139605e},
++      {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20,
++       0x00048d18},
++      {0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0,
++       0x409a40d0},
++      {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081,
++       0x050cb081},
++      {0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b,
++       0x00000016},
++      {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a11, 0xd00a8a0d,
++       0xd00a8a0d},
++      {0x00009940, 0x00754604, 0x00754604, 0xfff81204, 0xfff81204,
++       0xfff81204},
++      {0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020,
++       0xdfb81020},
++      {0x00009954, 0x5f3ca3de, 0x5f3ca3de, 0xe250a51e, 0xe250a51e,
++       0xe250a51e},
++      {0x00009958, 0x2108ecff, 0x2108ecff, 0x3388ffff, 0x3388ffff,
++       0x3388ffff},
++#ifdef TB243
++      {0x00009960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40,
++       0x00012d80},
++      {0x0000a960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40,
++       0x00012d80},
++      {0x0000b960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40,
++       0x00012d80},
++      {0x00009964, 0x00000000, 0x00000000, 0x00002210, 0x00002210,
++       0x00001120},
++#else
++      {0x00009960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0,
++       0x0001bfc0},
++      {0x0000a960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0,
++       0x0001bfc0},
++      {0x0000b960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0,
++       0x0001bfc0},
++      {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120,
++       0x00001120},
++#endif
++      {0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a1000, 0x001a0c00,
++       0x001a0c00},
++      {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be,
++       0x038919be},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329,
++       0x60f65329},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880,
++       0x00000880},
++      {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788,
++       0xd03e4788},
++      {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa,
++       0x0a1a7caa},
++      {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000,
++       0x18010000},
++      {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402,
++       0x2e032402},
++      {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06,
++       0x4a0a3c06},
++      {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b,
++       0x621a540b},
++      {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b,
++       0x764f6c1b},
++      {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a,
++       0x845b7a5a},
++      {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf,
++       0x950f8ccf},
++      {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f,
++       0xa5cf9b4f},
++      {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f,
++       0xbddfaf1f},
++      {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f,
++       0xd1ffc93f},
++      {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++};
++
++#endif /* INITVALS_AR5008_H */
+diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+new file mode 100644
+index 0000000..60fe5bb
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+@@ -0,0 +1,1278 @@
++/*
++ * Copyright (c) 2008-2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include "hw.h"
++#include "hw-ops.h"
++#include "../regd.h"
++#include "ar9002_phy.h"
++
++/* All code below is for non single-chip solutions */
++
++/**
++ * ar5008_hw_phy_modify_rx_buffer() - perform analog swizzling of parameters
++ * @rfbuf:
++ * @reg32:
++ * @numBits:
++ * @firstBit:
++ * @column:
++ *
++ * Performs analog "swizzling" of parameters into their location.
++ * Used on external AR2133/AR5133 radios.
++ */
++static void ar5008_hw_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
++                                         u32 numBits, u32 firstBit,
++                                         u32 column)
++{
++      u32 tmp32, mask, arrayEntry, lastBit;
++      int32_t bitPosition, bitsLeft;
++
++      tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
++      arrayEntry = (firstBit - 1) / 8;
++      bitPosition = (firstBit - 1) % 8;
++      bitsLeft = numBits;
++      while (bitsLeft > 0) {
++              lastBit = (bitPosition + bitsLeft > 8) ?
++                  8 : bitPosition + bitsLeft;
++              mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
++                  (column * 8);
++              rfBuf[arrayEntry] &= ~mask;
++              rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
++                                    (column * 8)) & mask;
++              bitsLeft -= 8 - bitPosition;
++              tmp32 = tmp32 >> (8 - bitPosition);
++              bitPosition = 0;
++              arrayEntry++;
++      }
++}
++
++/*
++ * Fix on 2.4 GHz band for orientation sensitivity issue by increasing
++ * rf_pwd_icsyndiv.
++ *
++ * Theoretical Rules:
++ *   if 2 GHz band
++ *      if forceBiasAuto
++ *         if synth_freq < 2412
++ *            bias = 0
++ *         else if 2412 <= synth_freq <= 2422
++ *            bias = 1
++ *         else // synth_freq > 2422
++ *            bias = 2
++ *      else if forceBias > 0
++ *         bias = forceBias & 7
++ *      else
++ *         no change, use value from ini file
++ *   else
++ *      no change, invalid band
++ *
++ *  1st Mod:
++ *    2422 also uses value of 2
++ *    <approved>
++ *
++ *  2nd Mod:
++ *    Less than 2412 uses value of 0, 2412 and above uses value of 2
++ */
++static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 tmp_reg;
++      int reg_writes = 0;
++      u32 new_bias = 0;
++
++      if (!AR_SREV_5416(ah) || synth_freq >= 3000) {
++              return;
++      }
++
++      BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
++
++      if (synth_freq < 2412)
++              new_bias = 0;
++      else if (synth_freq < 2422)
++              new_bias = 1;
++      else
++              new_bias = 2;
++
++      /* pre-reverse this field */
++      tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
++
++      ath_print(common, ATH_DBG_CONFIG,
++                "Force rf_pwd_icsyndiv to %1d on %4d\n",
++                new_bias, synth_freq);
++
++      /* swizzle rf_pwd_icsyndiv */
++      ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
++
++      /* write Bank 6 with new params */
++      REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
++}
++
++/**
++ * ar5008_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
++ * @ah: atheros hardware stucture
++ * @chan:
++ *
++ * For the external AR2133/AR5133 radios, takes the MHz channel value and set
++ * the channel value. Assumes writes enabled to analog bus and bank6 register
++ * cache in ah->analogBank6Data.
++ */
++static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 channelSel = 0;
++      u32 bModeSynth = 0;
++      u32 aModeRefSel = 0;
++      u32 reg32 = 0;
++      u16 freq;
++      struct chan_centers centers;
++
++      ath9k_hw_get_channel_centers(ah, chan, &centers);
++      freq = centers.synth_center;
++
++      if (freq < 4800) {
++              u32 txctl;
++
++              if (((freq - 2192) % 5) == 0) {
++                      channelSel = ((freq - 672) * 2 - 3040) / 10;
++                      bModeSynth = 0;
++              } else if (((freq - 2224) % 5) == 0) {
++                      channelSel = ((freq - 704) * 2 - 3040) / 10;
++                      bModeSynth = 1;
++              } else {
++                      ath_print(common, ATH_DBG_FATAL,
++                                "Invalid channel %u MHz\n", freq);
++                      return -EINVAL;
++              }
++
++              channelSel = (channelSel << 2) & 0xff;
++              channelSel = ath9k_hw_reverse_bits(channelSel, 8);
++
++              txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
++              if (freq == 2484) {
++
++                      REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
++                                txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
++              } else {
++                      REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
++                                txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
++              }
++
++      } else if ((freq % 20) == 0 && freq >= 5120) {
++              channelSel =
++                  ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
++              aModeRefSel = ath9k_hw_reverse_bits(1, 2);
++      } else if ((freq % 10) == 0) {
++              channelSel =
++                  ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
++              if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
++                      aModeRefSel = ath9k_hw_reverse_bits(2, 2);
++              else
++                      aModeRefSel = ath9k_hw_reverse_bits(1, 2);
++      } else if ((freq % 5) == 0) {
++              channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
++              aModeRefSel = ath9k_hw_reverse_bits(1, 2);
++      } else {
++              ath_print(common, ATH_DBG_FATAL,
++                        "Invalid channel %u MHz\n", freq);
++              return -EINVAL;
++      }
++
++      ar5008_hw_force_bias(ah, freq);
++
++      reg32 =
++          (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
++          (1 << 5) | 0x1;
++
++      REG_WRITE(ah, AR_PHY(0x37), reg32);
++
++      ah->curchan = chan;
++      ah->curchan_rad_index = -1;
++
++      return 0;
++}
++
++/**
++ * ar5008_hw_spur_mitigate - convert baseband spur frequency for external radios
++ * @ah: atheros hardware structure
++ * @chan:
++ *
++ * For non single-chip solutions. Converts to baseband spur frequency given the
++ * input channel frequency and compute register settings below.
++ */
++static void ar5008_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      int bb_spur = AR_NO_SPUR;
++      int bin, cur_bin;
++      int spur_freq_sd;
++      int spur_delta_phase;
++      int denominator;
++      int upper, lower, cur_vit_mask;
++      int tmp, new;
++      int i;
++      int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
++                        AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
++      };
++      int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
++                       AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
++      };
++      int inc[4] = { 0, 100, 0, 0 };
++
++      int8_t mask_m[123];
++      int8_t mask_p[123];
++      int8_t mask_amt;
++      int tmp_mask;
++      int cur_bb_spur;
++      bool is2GHz = IS_CHAN_2GHZ(chan);
++
++      memset(&mask_m, 0, sizeof(int8_t) * 123);
++      memset(&mask_p, 0, sizeof(int8_t) * 123);
++
++      for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
++              cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
++              if (AR_NO_SPUR == cur_bb_spur)
++                      break;
++              cur_bb_spur = cur_bb_spur - (chan->channel * 10);
++              if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
++                      bb_spur = cur_bb_spur;
++                      break;
++              }
++      }
++
++      if (AR_NO_SPUR == bb_spur)
++              return;
++
++      bin = bb_spur * 32;
++
++      tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
++      new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
++                   AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
++                   AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
++                   AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
++
++      REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
++
++      new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
++             AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
++             AR_PHY_SPUR_REG_MASK_RATE_SELECT |
++             AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
++             SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
++      REG_WRITE(ah, AR_PHY_SPUR_REG, new);
++
++      spur_delta_phase = ((bb_spur * 524288) / 100) &
++              AR_PHY_TIMING11_SPUR_DELTA_PHASE;
++
++      denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
++      spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
++
++      new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
++             SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
++             SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
++      REG_WRITE(ah, AR_PHY_TIMING11, new);
++
++      cur_bin = -6000;
++      upper = bin + 100;
++      lower = bin - 100;
++
++      for (i = 0; i < 4; i++) {
++              int pilot_mask = 0;
++              int chan_mask = 0;
++              int bp = 0;
++              for (bp = 0; bp < 30; bp++) {
++                      if ((cur_bin > lower) && (cur_bin < upper)) {
++                              pilot_mask = pilot_mask | 0x1 << bp;
++                              chan_mask = chan_mask | 0x1 << bp;
++                      }
++                      cur_bin += 100;
++              }
++              cur_bin += inc[i];
++              REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
++              REG_WRITE(ah, chan_mask_reg[i], chan_mask);
++      }
++
++      cur_vit_mask = 6100;
++      upper = bin + 120;
++      lower = bin - 120;
++
++      for (i = 0; i < 123; i++) {
++              if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
++
++                      /* workaround for gcc bug #37014 */
++                      volatile int tmp_v = abs(cur_vit_mask - bin);
++
++                      if (tmp_v < 75)
++                              mask_amt = 1;
++                      else
++                              mask_amt = 0;
++                      if (cur_vit_mask < 0)
++                              mask_m[abs(cur_vit_mask / 100)] = mask_amt;
++                      else
++                              mask_p[cur_vit_mask / 100] = mask_amt;
++              }
++              cur_vit_mask -= 100;
++      }
++
++      tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
++              | (mask_m[48] << 26) | (mask_m[49] << 24)
++              | (mask_m[50] << 22) | (mask_m[51] << 20)
++              | (mask_m[52] << 18) | (mask_m[53] << 16)
++              | (mask_m[54] << 14) | (mask_m[55] << 12)
++              | (mask_m[56] << 10) | (mask_m[57] << 8)
++              | (mask_m[58] << 6) | (mask_m[59] << 4)
++              | (mask_m[60] << 2) | (mask_m[61] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
++      REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
++
++      tmp_mask = (mask_m[31] << 28)
++              | (mask_m[32] << 26) | (mask_m[33] << 24)
++              | (mask_m[34] << 22) | (mask_m[35] << 20)
++              | (mask_m[36] << 18) | (mask_m[37] << 16)
++              | (mask_m[48] << 14) | (mask_m[39] << 12)
++              | (mask_m[40] << 10) | (mask_m[41] << 8)
++              | (mask_m[42] << 6) | (mask_m[43] << 4)
++              | (mask_m[44] << 2) | (mask_m[45] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
++
++      tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
++              | (mask_m[18] << 26) | (mask_m[18] << 24)
++              | (mask_m[20] << 22) | (mask_m[20] << 20)
++              | (mask_m[22] << 18) | (mask_m[22] << 16)
++              | (mask_m[24] << 14) | (mask_m[24] << 12)
++              | (mask_m[25] << 10) | (mask_m[26] << 8)
++              | (mask_m[27] << 6) | (mask_m[28] << 4)
++              | (mask_m[29] << 2) | (mask_m[30] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
++
++      tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
++              | (mask_m[2] << 26) | (mask_m[3] << 24)
++              | (mask_m[4] << 22) | (mask_m[5] << 20)
++              | (mask_m[6] << 18) | (mask_m[7] << 16)
++              | (mask_m[8] << 14) | (mask_m[9] << 12)
++              | (mask_m[10] << 10) | (mask_m[11] << 8)
++              | (mask_m[12] << 6) | (mask_m[13] << 4)
++              | (mask_m[14] << 2) | (mask_m[15] << 0);
++      REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
++
++      tmp_mask = (mask_p[15] << 28)
++              | (mask_p[14] << 26) | (mask_p[13] << 24)
++              | (mask_p[12] << 22) | (mask_p[11] << 20)
++              | (mask_p[10] << 18) | (mask_p[9] << 16)
++              | (mask_p[8] << 14) | (mask_p[7] << 12)
++              | (mask_p[6] << 10) | (mask_p[5] << 8)
++              | (mask_p[4] << 6) | (mask_p[3] << 4)
++              | (mask_p[2] << 2) | (mask_p[1] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
++
++      tmp_mask = (mask_p[30] << 28)
++              | (mask_p[29] << 26) | (mask_p[28] << 24)
++              | (mask_p[27] << 22) | (mask_p[26] << 20)
++              | (mask_p[25] << 18) | (mask_p[24] << 16)
++              | (mask_p[23] << 14) | (mask_p[22] << 12)
++              | (mask_p[21] << 10) | (mask_p[20] << 8)
++              | (mask_p[19] << 6) | (mask_p[18] << 4)
++              | (mask_p[17] << 2) | (mask_p[16] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
++
++      tmp_mask = (mask_p[45] << 28)
++              | (mask_p[44] << 26) | (mask_p[43] << 24)
++              | (mask_p[42] << 22) | (mask_p[41] << 20)
++              | (mask_p[40] << 18) | (mask_p[39] << 16)
++              | (mask_p[38] << 14) | (mask_p[37] << 12)
++              | (mask_p[36] << 10) | (mask_p[35] << 8)
++              | (mask_p[34] << 6) | (mask_p[33] << 4)
++              | (mask_p[32] << 2) | (mask_p[31] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
++
++      tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
++              | (mask_p[59] << 26) | (mask_p[58] << 24)
++              | (mask_p[57] << 22) | (mask_p[56] << 20)
++              | (mask_p[55] << 18) | (mask_p[54] << 16)
++              | (mask_p[53] << 14) | (mask_p[52] << 12)
++              | (mask_p[51] << 10) | (mask_p[50] << 8)
++              | (mask_p[49] << 6) | (mask_p[48] << 4)
++              | (mask_p[47] << 2) | (mask_p[46] << 0);
++      REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
++      REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
++}
++
++/**
++ * ar5008_hw_rf_alloc_ext_banks - allocates banks for external radio programming
++ * @ah: atheros hardware structure
++ *
++ * Only required for older devices with external AR2133/AR5133 radios.
++ */
++static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
++{
++#define ATH_ALLOC_BANK(bank, size) do { \
++              bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
++              if (!bank) { \
++                      ath_print(common, ATH_DBG_FATAL, \
++                                "Cannot allocate RF banks\n"); \
++                      return -ENOMEM; \
++              } \
++      } while (0);
++
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
++
++      ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
++      ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
++      ATH_ALLOC_BANK(ah->addac5416_21,
++                     ah->iniAddac.ia_rows * ah->iniAddac.ia_columns);
++      ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
++
++      return 0;
++#undef ATH_ALLOC_BANK
++}
++
++
++/**
++ * ar5008_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
++ * @ah: atheros hardware struture
++ * For the external AR2133/AR5133 radios banks.
++ */
++static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
++{
++#define ATH_FREE_BANK(bank) do { \
++              kfree(bank); \
++              bank = NULL; \
++      } while (0);
++
++      BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
++
++      ATH_FREE_BANK(ah->analogBank0Data);
++      ATH_FREE_BANK(ah->analogBank1Data);
++      ATH_FREE_BANK(ah->analogBank2Data);
++      ATH_FREE_BANK(ah->analogBank3Data);
++      ATH_FREE_BANK(ah->analogBank6Data);
++      ATH_FREE_BANK(ah->analogBank6TPCData);
++      ATH_FREE_BANK(ah->analogBank7Data);
++      ATH_FREE_BANK(ah->addac5416_21);
++      ATH_FREE_BANK(ah->bank6Temp);
++
++#undef ATH_FREE_BANK
++}
++
++/* *
++ * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM
++ * @ah: atheros hardware structure
++ * @chan:
++ * @modesIndex:
++ *
++ * Used for the external AR2133/AR5133 radios.
++ *
++ * Reads the EEPROM header info from the device structure and programs
++ * all rf registers. This routine requires access to the analog
++ * rf device. This is not required for single-chip devices.
++ */
++static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
++                                struct ath9k_channel *chan,
++                                u16 modesIndex)
++{
++      u32 eepMinorRev;
++      u32 ob5GHz = 0, db5GHz = 0;
++      u32 ob2GHz = 0, db2GHz = 0;
++      int regWrites = 0;
++
++      /*
++       * Software does not need to program bank data
++       * for single chip devices, that is AR9280 or anything
++       * after that.
++       */
++      if (AR_SREV_9280_10_OR_LATER(ah))
++              return true;
++
++      /* Setup rf parameters */
++      eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
++
++      /* Setup Bank 0 Write */
++      RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1);
++
++      /* Setup Bank 1 Write */
++      RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1);
++
++      /* Setup Bank 2 Write */
++      RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1);
++
++      /* Setup Bank 6 Write */
++      RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3,
++                    modesIndex);
++      {
++              int i;
++              for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
++                      ah->analogBank6Data[i] =
++                          INI_RA(&ah->iniBank6TPC, i, modesIndex);
++              }
++      }
++
++      /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
++      if (eepMinorRev >= 2) {
++              if (IS_CHAN_2GHZ(chan)) {
++                      ob2GHz = ah->eep_ops->get_eeprom(ah, EEP_OB_2);
++                      db2GHz = ah->eep_ops->get_eeprom(ah, EEP_DB_2);
++                      ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data,
++                                                     ob2GHz, 3, 197, 0);
++                      ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data,
++                                                     db2GHz, 3, 194, 0);
++              } else {
++                      ob5GHz = ah->eep_ops->get_eeprom(ah, EEP_OB_5);
++                      db5GHz = ah->eep_ops->get_eeprom(ah, EEP_DB_5);
++                      ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data,
++                                                     ob5GHz, 3, 203, 0);
++                      ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data,
++                                                     db5GHz, 3, 200, 0);
++              }
++      }
++
++      /* Setup Bank 7 Setup */
++      RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1);
++
++      /* Write Analog registers */
++      REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
++                         regWrites);
++      REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
++                         regWrites);
++      REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
++                         regWrites);
++      REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
++                         regWrites);
++      REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
++                         regWrites);
++      REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
++                         regWrites);
++
++      return true;
++}
++
++static void ar5008_hw_init_bb(struct ath_hw *ah,
++                            struct ath9k_channel *chan)
++{
++      u32 synthDelay;
++
++      synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
++      if (IS_CHAN_B(chan))
++              synthDelay = (4 * synthDelay) / 22;
++      else
++              synthDelay /= 10;
++
++      REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
++
++      udelay(synthDelay + BASE_ACTIVATE_DELAY);
++}
++
++static void ar5008_hw_init_chain_masks(struct ath_hw *ah)
++{
++      int rx_chainmask, tx_chainmask;
++
++      rx_chainmask = ah->rxchainmask;
++      tx_chainmask = ah->txchainmask;
++
++      switch (rx_chainmask) {
++      case 0x5:
++              REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
++                          AR_PHY_SWAP_ALT_CHAIN);
++      case 0x3:
++              if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
++                      REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
++                      REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7);
++                      break;
++              }
++      case 0x1:
++      case 0x2:
++      case 0x7:
++              REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
++              REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
++              break;
++      default:
++              break;
++      }
++
++      REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);
++      if (tx_chainmask == 0x5) {
++              REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
++                          AR_PHY_SWAP_ALT_CHAIN);
++      }
++      if (AR_SREV_9100(ah))
++              REG_WRITE(ah, AR_PHY_ANALOG_SWAP,
++                        REG_READ(ah, AR_PHY_ANALOG_SWAP) | 0x00000001);
++}
++
++static void ar5008_hw_override_ini(struct ath_hw *ah,
++                                 struct ath9k_channel *chan)
++{
++      u32 val;
++
++      /*
++       * Set the RX_ABORT and RX_DIS and clear if off only after
++       * RXE is set for MAC. This prevents frames with corrupted
++       * descriptor status.
++       */
++      REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
++
++      if (AR_SREV_9280_10_OR_LATER(ah)) {
++              val = REG_READ(ah, AR_PCU_MISC_MODE2);
++
++              if (!AR_SREV_9271(ah))
++                      val &= ~AR_PCU_MISC_MODE2_HWWAR1;
++
++              if (AR_SREV_9287_10_OR_LATER(ah))
++                      val = val & (~AR_PCU_MISC_MODE2_HWWAR2);
++
++              REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
++      }
++
++      if (!AR_SREV_5416_20_OR_LATER(ah) ||
++          AR_SREV_9280_10_OR_LATER(ah))
++              return;
++      /*
++       * Disable BB clock gating
++       * Necessary to avoid issues on AR5416 2.0
++       */
++      REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
++
++      /*
++       * Disable RIFS search on some chips to avoid baseband
++       * hang issues.
++       */
++      if (AR_SREV_9100(ah) || AR_SREV_9160(ah)) {
++              val = REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);
++              val &= ~AR_PHY_RIFS_INIT_DELAY;
++              REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
++      }
++}
++
++static void ar5008_hw_set_channel_regs(struct ath_hw *ah,
++                                     struct ath9k_channel *chan)
++{
++      u32 phymode;
++      u32 enableDacFifo = 0;
++
++      if (AR_SREV_9285_10_OR_LATER(ah))
++              enableDacFifo = (REG_READ(ah, AR_PHY_TURBO) &
++                                       AR_PHY_FC_ENABLE_DAC_FIFO);
++
++      phymode = AR_PHY_FC_HT_EN | AR_PHY_FC_SHORT_GI_40
++              | AR_PHY_FC_SINGLE_HT_LTF1 | AR_PHY_FC_WALSH | enableDacFifo;
++
++      if (IS_CHAN_HT40(chan)) {
++              phymode |= AR_PHY_FC_DYN2040_EN;
++
++              if ((chan->chanmode == CHANNEL_A_HT40PLUS) ||
++                  (chan->chanmode == CHANNEL_G_HT40PLUS))
++                      phymode |= AR_PHY_FC_DYN2040_PRI_CH;
++
++      }
++      REG_WRITE(ah, AR_PHY_TURBO, phymode);
++
++      ath9k_hw_set11nmac2040(ah);
++
++      REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
++      REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
++}
++
++
++static int ar5008_hw_process_ini(struct ath_hw *ah,
++                               struct ath9k_channel *chan)
++{
++      struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
++      int i, regWrites = 0;
++      struct ieee80211_channel *channel = chan->chan;
++      u32 modesIndex, freqIndex;
++
++      switch (chan->chanmode) {
++      case CHANNEL_A:
++      case CHANNEL_A_HT20:
++              modesIndex = 1;
++              freqIndex = 1;
++              break;
++      case CHANNEL_A_HT40PLUS:
++      case CHANNEL_A_HT40MINUS:
++              modesIndex = 2;
++              freqIndex = 1;
++              break;
++      case CHANNEL_G:
++      case CHANNEL_G_HT20:
++      case CHANNEL_B:
++              modesIndex = 4;
++              freqIndex = 2;
++              break;
++      case CHANNEL_G_HT40PLUS:
++      case CHANNEL_G_HT40MINUS:
++              modesIndex = 3;
++              freqIndex = 2;
++              break;
++
++      default:
++              return -EINVAL;
++      }
++
++      if (AR_SREV_9287_12_OR_LATER(ah)) {
++              /* Enable ASYNC FIFO */
++              REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3,
++                              AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL);
++              REG_SET_BIT(ah, AR_PHY_MODE, AR_PHY_MODE_ASYNCFIFO);
++              REG_CLR_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3,
++                              AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET);
++              REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3,
++                              AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET);
++      }
++
++      /* Set correct baseband to analog shift setting to access analog chips */
++      REG_WRITE(ah, AR_PHY(0), 0x00000007);
++
++      /* Write ADDAC shifts */
++      REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
++      ah->eep_ops->set_addac(ah, chan);
++
++      if (AR_SREV_5416_22_OR_LATER(ah)) {
++              REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
++      } else {
++              struct ar5416IniArray temp;
++              u32 addacSize =
++                      sizeof(u32) * ah->iniAddac.ia_rows *
++                      ah->iniAddac.ia_columns;
++
++              /* For AR5416 2.0/2.1 */
++              memcpy(ah->addac5416_21,
++                     ah->iniAddac.ia_array, addacSize);
++
++              /* override CLKDRV value at [row, column] = [31, 1] */
++              (ah->addac5416_21)[31 * ah->iniAddac.ia_columns + 1] = 0;
++
++              temp.ia_array = ah->addac5416_21;
++              temp.ia_columns = ah->iniAddac.ia_columns;
++              temp.ia_rows = ah->iniAddac.ia_rows;
++              REG_WRITE_ARRAY(&temp, 1, regWrites);
++      }
++
++      REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);
++
++      for (i = 0; i < ah->iniModes.ia_rows; i++) {
++              u32 reg = INI_RA(&ah->iniModes, i, 0);
++              u32 val = INI_RA(&ah->iniModes, i, modesIndex);
++
++              if (reg == AR_AN_TOP2 && ah->need_an_top2_fixup)
++                      val &= ~AR_AN_TOP2_PWDCLKIND;
++
++              REG_WRITE(ah, reg, val);
++
++              if (reg >= 0x7800 && reg < 0x78a0
++                  && ah->config.analog_shiftreg) {
++                      udelay(100);
++              }
++
++              DO_DELAY(regWrites);
++      }
++
++      if (AR_SREV_9280(ah) || AR_SREV_9287_10_OR_LATER(ah))
++              REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
++
++      if (AR_SREV_9280(ah) || AR_SREV_9285_12_OR_LATER(ah) ||
++          AR_SREV_9287_10_OR_LATER(ah))
++              REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
++
++      if (AR_SREV_9271_10(ah))
++              REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
++                              modesIndex, regWrites);
++
++      /* Write common array parameters */
++      for (i = 0; i < ah->iniCommon.ia_rows; i++) {
++              u32 reg = INI_RA(&ah->iniCommon, i, 0);
++              u32 val = INI_RA(&ah->iniCommon, i, 1);
++
++              REG_WRITE(ah, reg, val);
++
++              if (reg >= 0x7800 && reg < 0x78a0
++                  && ah->config.analog_shiftreg) {
++                      udelay(100);
++              }
++
++              DO_DELAY(regWrites);
++      }
++
++      if (AR_SREV_9271(ah)) {
++              if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)
++                      REG_WRITE_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
++                                      modesIndex, regWrites);
++              else
++                      REG_WRITE_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
++                                      modesIndex, regWrites);
++      }
++
++      REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);
++
++      if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
++              REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
++                              regWrites);
++      }
++
++      ar5008_hw_override_ini(ah, chan);
++      ar5008_hw_set_channel_regs(ah, chan);
++      ar5008_hw_init_chain_masks(ah);
++      ath9k_olc_init(ah);
++
++      /* Set TX power */
++      ah->eep_ops->set_txpower(ah, chan,
++                               ath9k_regd_get_ctl(regulatory, chan),
++                               channel->max_antenna_gain * 2,
++                               channel->max_power * 2,
++                               min((u32) MAX_RATE_POWER,
++                               (u32) regulatory->power_limit));
++
++      /* Write analog registers */
++      if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
++              ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
++                        "ar5416SetRfRegs failed\n");
++              return -EIO;
++      }
++
++      return 0;
++}
++
++static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      u32 rfMode = 0;
++
++      if (chan == NULL)
++              return;
++
++      rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan))
++              ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
++
++      if (!AR_SREV_9280_10_OR_LATER(ah))
++              rfMode |= (IS_CHAN_5GHZ(chan)) ?
++                      AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;
++
++      if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah))
++          && IS_CHAN_A_5MHZ_SPACED(chan))
++              rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);
++
++      REG_WRITE(ah, AR_PHY_MODE, rfMode);
++}
++
++static void ar5008_hw_mark_phy_inactive(struct ath_hw *ah)
++{
++      REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
++}
++
++static void ar5008_hw_set_delta_slope(struct ath_hw *ah,
++                                    struct ath9k_channel *chan)
++{
++      u32 coef_scaled, ds_coef_exp, ds_coef_man;
++      u32 clockMhzScaled = 0x64000000;
++      struct chan_centers centers;
++
++      if (IS_CHAN_HALF_RATE(chan))
++              clockMhzScaled = clockMhzScaled >> 1;
++      else if (IS_CHAN_QUARTER_RATE(chan))
++              clockMhzScaled = clockMhzScaled >> 2;
++
++      ath9k_hw_get_channel_centers(ah, chan, &centers);
++      coef_scaled = clockMhzScaled / centers.synth_center;
++
++      ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,
++                                    &ds_coef_exp);
++
++      REG_RMW_FIELD(ah, AR_PHY_TIMING3,
++                    AR_PHY_TIMING3_DSC_MAN, ds_coef_man);
++      REG_RMW_FIELD(ah, AR_PHY_TIMING3,
++                    AR_PHY_TIMING3_DSC_EXP, ds_coef_exp);
++
++      coef_scaled = (9 * coef_scaled) / 10;
++
++      ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,
++                                    &ds_coef_exp);
++
++      REG_RMW_FIELD(ah, AR_PHY_HALFGI,
++                    AR_PHY_HALFGI_DSC_MAN, ds_coef_man);
++      REG_RMW_FIELD(ah, AR_PHY_HALFGI,
++                    AR_PHY_HALFGI_DSC_EXP, ds_coef_exp);
++}
++
++static bool ar5008_hw_rfbus_req(struct ath_hw *ah)
++{
++      REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
++      return ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
++                         AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT);
++}
++
++static void ar5008_hw_rfbus_done(struct ath_hw *ah)
++{
++      u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
++      if (IS_CHAN_B(ah->curchan))
++              synthDelay = (4 * synthDelay) / 22;
++      else
++              synthDelay /= 10;
++
++      udelay(synthDelay + BASE_ACTIVATE_DELAY);
++
++      REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
++}
++
++static void ar5008_hw_enable_rfkill(struct ath_hw *ah)
++{
++      REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
++                  AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
++
++      REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
++                  AR_GPIO_INPUT_MUX2_RFSILENT);
++
++      ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
++      REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
++}
++
++static void ar5008_restore_chainmask(struct ath_hw *ah)
++{
++      int rx_chainmask = ah->rxchainmask;
++
++      if ((rx_chainmask == 0x5) || (rx_chainmask == 0x3)) {
++              REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
++              REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
++      }
++}
++
++static void ar5008_set_diversity(struct ath_hw *ah, bool value)
++{
++      u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
++      if (value)
++              v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
++      else
++              v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
++      REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
++}
++
++static u32 ar9100_hw_compute_pll_control(struct ath_hw *ah,
++                                       struct ath9k_channel *chan)
++{
++      if (chan && IS_CHAN_5GHZ(chan))
++              return 0x1450;
++      return 0x1458;
++}
++
++static u32 ar9160_hw_compute_pll_control(struct ath_hw *ah,
++                                       struct ath9k_channel *chan)
++{
++      u32 pll;
++
++      pll = SM(0x5, AR_RTC_9160_PLL_REFDIV);
++
++      if (chan && IS_CHAN_HALF_RATE(chan))
++              pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL);
++      else if (chan && IS_CHAN_QUARTER_RATE(chan))
++              pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
++
++      if (chan && IS_CHAN_5GHZ(chan))
++              pll |= SM(0x50, AR_RTC_9160_PLL_DIV);
++      else
++              pll |= SM(0x58, AR_RTC_9160_PLL_DIV);
++
++      return pll;
++}
++
++static u32 ar5008_hw_compute_pll_control(struct ath_hw *ah,
++                                       struct ath9k_channel *chan)
++{
++      u32 pll;
++
++      pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2;
++
++      if (chan && IS_CHAN_HALF_RATE(chan))
++              pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
++      else if (chan && IS_CHAN_QUARTER_RATE(chan))
++              pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
++
++      if (chan && IS_CHAN_5GHZ(chan))
++              pll |= SM(0xa, AR_RTC_PLL_DIV);
++      else
++              pll |= SM(0xb, AR_RTC_PLL_DIV);
++
++      return pll;
++}
++
++static bool ar5008_hw_ani_control(struct ath_hw *ah,
++                                enum ath9k_ani_cmd cmd, int param)
++{
++      struct ar5416AniState *aniState = ah->curani;
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      switch (cmd & ah->ani_function) {
++      case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{
++              u32 level = param;
++
++              if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
++                      ath_print(common, ATH_DBG_ANI,
++                                "level out of range (%u > %u)\n",
++                                level,
++                                (unsigned)ARRAY_SIZE(ah->totalSizeDesired));
++                      return false;
++              }
++
++              REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
++                            AR_PHY_DESIRED_SZ_TOT_DES,
++                            ah->totalSizeDesired[level]);
++              REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
++                            AR_PHY_AGC_CTL1_COARSE_LOW,
++                            ah->coarse_low[level]);
++              REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
++                            AR_PHY_AGC_CTL1_COARSE_HIGH,
++                            ah->coarse_high[level]);
++              REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
++                            AR_PHY_FIND_SIG_FIRPWR,
++                            ah->firpwr[level]);
++
++              if (level > aniState->noiseImmunityLevel)
++                      ah->stats.ast_ani_niup++;
++              else if (level < aniState->noiseImmunityLevel)
++                      ah->stats.ast_ani_nidown++;
++              aniState->noiseImmunityLevel = level;
++              break;
++      }
++      case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
++              const int m1ThreshLow[] = { 127, 50 };
++              const int m2ThreshLow[] = { 127, 40 };
++              const int m1Thresh[] = { 127, 0x4d };
++              const int m2Thresh[] = { 127, 0x40 };
++              const int m2CountThr[] = { 31, 16 };
++              const int m2CountThrLow[] = { 63, 48 };
++              u32 on = param ? 1 : 0;
++
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++                            AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
++                            m1ThreshLow[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++                            AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
++                            m2ThreshLow[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++                            AR_PHY_SFCORR_M1_THRESH,
++                            m1Thresh[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++                            AR_PHY_SFCORR_M2_THRESH,
++                            m2Thresh[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++                            AR_PHY_SFCORR_M2COUNT_THR,
++                            m2CountThr[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++                            AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
++                            m2CountThrLow[on]);
++
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++                            AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
++                            m1ThreshLow[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++                            AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
++                            m2ThreshLow[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++                            AR_PHY_SFCORR_EXT_M1_THRESH,
++                            m1Thresh[on]);
++              REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++                            AR_PHY_SFCORR_EXT_M2_THRESH,
++                            m2Thresh[on]);
++
++              if (on)
++                      REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
++                                  AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
++              else
++                      REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
++                                  AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
++
++              if (!on != aniState->ofdmWeakSigDetectOff) {
++                      if (on)
++                              ah->stats.ast_ani_ofdmon++;
++                      else
++                              ah->stats.ast_ani_ofdmoff++;
++                      aniState->ofdmWeakSigDetectOff = !on;
++              }
++              break;
++      }
++      case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
++              const int weakSigThrCck[] = { 8, 6 };
++              u32 high = param ? 1 : 0;
++
++              REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
++                            AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK,
++                            weakSigThrCck[high]);
++              if (high != aniState->cckWeakSigThreshold) {
++                      if (high)
++                              ah->stats.ast_ani_cckhigh++;
++                      else
++                              ah->stats.ast_ani_ccklow++;
++                      aniState->cckWeakSigThreshold = high;
++              }
++              break;
++      }
++      case ATH9K_ANI_FIRSTEP_LEVEL:{
++              const int firstep[] = { 0, 4, 8 };
++              u32 level = param;
++
++              if (level >= ARRAY_SIZE(firstep)) {
++                      ath_print(common, ATH_DBG_ANI,
++                                "level out of range (%u > %u)\n",
++                                level,
++                                (unsigned) ARRAY_SIZE(firstep));
++                      return false;
++              }
++              REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
++                            AR_PHY_FIND_SIG_FIRSTEP,
++                            firstep[level]);
++              if (level > aniState->firstepLevel)
++                      ah->stats.ast_ani_stepup++;
++              else if (level < aniState->firstepLevel)
++                      ah->stats.ast_ani_stepdown++;
++              aniState->firstepLevel = level;
++              break;
++      }
++      case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
++              const int cycpwrThr1[] =
++                      { 2, 4, 6, 8, 10, 12, 14, 16 };
++              u32 level = param;
++
++              if (level >= ARRAY_SIZE(cycpwrThr1)) {
++                      ath_print(common, ATH_DBG_ANI,
++                                "level out of range (%u > %u)\n",
++                                level,
++                                (unsigned) ARRAY_SIZE(cycpwrThr1));
++                      return false;
++              }
++              REG_RMW_FIELD(ah, AR_PHY_TIMING5,
++                            AR_PHY_TIMING5_CYCPWR_THR1,
++                            cycpwrThr1[level]);
++              if (level > aniState->spurImmunityLevel)
++                      ah->stats.ast_ani_spurup++;
++              else if (level < aniState->spurImmunityLevel)
++                      ah->stats.ast_ani_spurdown++;
++              aniState->spurImmunityLevel = level;
++              break;
++      }
++      case ATH9K_ANI_PRESENT:
++              break;
++      default:
++              ath_print(common, ATH_DBG_ANI,
++                        "invalid cmd %u\n", cmd);
++              return false;
++      }
++
++      ath_print(common, ATH_DBG_ANI, "ANI parameters:\n");
++      ath_print(common, ATH_DBG_ANI,
++                "noiseImmunityLevel=%d, spurImmunityLevel=%d, "
++                "ofdmWeakSigDetectOff=%d\n",
++                aniState->noiseImmunityLevel,
++                aniState->spurImmunityLevel,
++                !aniState->ofdmWeakSigDetectOff);
++      ath_print(common, ATH_DBG_ANI,
++                "cckWeakSigThreshold=%d, "
++                "firstepLevel=%d, listenTime=%d\n",
++                aniState->cckWeakSigThreshold,
++                aniState->firstepLevel,
++                aniState->listenTime);
++      ath_print(common, ATH_DBG_ANI,
++              "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
++              aniState->cycleCount,
++              aniState->ofdmPhyErrCount,
++              aniState->cckPhyErrCount);
++
++      return true;
++}
++
++static void ar5008_hw_do_getnf(struct ath_hw *ah,
++                            int16_t nfarray[NUM_NF_READINGS])
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      int16_t nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ctl] [chain 0] is %d\n", nf);
++      nfarray[0] = nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), AR_PHY_CH1_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ctl] [chain 1] is %d\n", nf);
++      nfarray[1] = nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ctl] [chain 2] is %d\n", nf);
++      nfarray[2] = nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ext] [chain 0] is %d\n", nf);
++      nfarray[3] = nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ext] [chain 1] is %d\n", nf);
++      nfarray[4] = nf;
++
++      nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
++      if (nf & 0x100)
++              nf = 0 - ((nf ^ 0x1ff) + 1);
++      ath_print(common, ATH_DBG_CALIBRATE,
++                "NF calibrated [ext] [chain 2] is %d\n", nf);
++      nfarray[5] = nf;
++}
++
++void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
++{
++      struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
++
++      priv_ops->rf_set_freq = ar5008_hw_set_channel;
++      priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
++
++      priv_ops->rf_alloc_ext_banks = ar5008_hw_rf_alloc_ext_banks;
++      priv_ops->rf_free_ext_banks = ar5008_hw_rf_free_ext_banks;
++      priv_ops->set_rf_regs = ar5008_hw_set_rf_regs;
++      priv_ops->set_channel_regs = ar5008_hw_set_channel_regs;
++      priv_ops->init_bb = ar5008_hw_init_bb;
++      priv_ops->process_ini = ar5008_hw_process_ini;
++      priv_ops->set_rfmode = ar5008_hw_set_rfmode;
++      priv_ops->mark_phy_inactive = ar5008_hw_mark_phy_inactive;
++      priv_ops->set_delta_slope = ar5008_hw_set_delta_slope;
++      priv_ops->rfbus_req = ar5008_hw_rfbus_req;
++      priv_ops->rfbus_done = ar5008_hw_rfbus_done;
++      priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
++      priv_ops->restore_chainmask = ar5008_restore_chainmask;
++      priv_ops->set_diversity = ar5008_set_diversity;
++      priv_ops->ani_control = ar5008_hw_ani_control;
++      priv_ops->do_getnf = ar5008_hw_do_getnf;
++
++      if (AR_SREV_9100(ah))
++              priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
++      else if (AR_SREV_9160_10_OR_LATER(ah))
++              priv_ops->compute_pll_control = ar9160_hw_compute_pll_control;
++      else
++              priv_ops->compute_pll_control = ar5008_hw_compute_pll_control;
++}
+diff --git a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
+new file mode 100644
+index 0000000..3e34dc9
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
+@@ -0,0 +1,1314 @@
++
++static const u32 ar5416Common_9100[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020015},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00020010, 0x00000003},
++      {0x00020038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x40000000},
++      {0x00008054, 0x00004000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x000080c0, 0x2a82301a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008120, 0x08f04800},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0x00000000},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c4, 0x00000000},
++      {0x000081d0, 0x00003210},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x00008300, 0x00000000},
++      {0x00008304, 0x00000000},
++      {0x00008308, 0x00000000},
++      {0x0000830c, 0x00000000},
++      {0x00008310, 0x00000000},
++      {0x00008314, 0x00000000},
++      {0x00008318, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000007},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00000000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x000107ff},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xad848e19},
++      {0x00009810, 0x7d14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x00009840, 0x206a01ae},
++      {0x0000984c, 0x1284233c},
++      {0x00009854, 0x00000859},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x05100000},
++      {0x0000a920, 0x05100000},
++      {0x0000b920, 0x05100000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009948, 0x9280b212},
++      {0x0000994c, 0x00020028},
++      {0x0000c95c, 0x004b6a8e},
++      {0x0000c968, 0x000003ce},
++      {0x00009970, 0x190fb515},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x201fff00},
++      {0x000099ac, 0x006f0000},
++      {0x000099b0, 0x03051000},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000200},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x0cc80caa},
++      {0x000099fc, 0x00001042},
++      {0x00009b00, 0x00000000},
++      {0x00009b04, 0x00000001},
++      {0x00009b08, 0x00000002},
++      {0x00009b0c, 0x00000003},
++      {0x00009b10, 0x00000004},
++      {0x00009b14, 0x00000005},
++      {0x00009b18, 0x00000008},
++      {0x00009b1c, 0x00000009},
++      {0x00009b20, 0x0000000a},
++      {0x00009b24, 0x0000000b},
++      {0x00009b28, 0x0000000c},
++      {0x00009b2c, 0x0000000d},
++      {0x00009b30, 0x00000010},
++      {0x00009b34, 0x00000011},
++      {0x00009b38, 0x00000012},
++      {0x00009b3c, 0x00000013},
++      {0x00009b40, 0x00000014},
++      {0x00009b44, 0x00000015},
++      {0x00009b48, 0x00000018},
++      {0x00009b4c, 0x00000019},
++      {0x00009b50, 0x0000001a},
++      {0x00009b54, 0x0000001b},
++      {0x00009b58, 0x0000001c},
++      {0x00009b5c, 0x0000001d},
++      {0x00009b60, 0x00000020},
++      {0x00009b64, 0x00000021},
++      {0x00009b68, 0x00000022},
++      {0x00009b6c, 0x00000023},
++      {0x00009b70, 0x00000024},
++      {0x00009b74, 0x00000025},
++      {0x00009b78, 0x00000028},
++      {0x00009b7c, 0x00000029},
++      {0x00009b80, 0x0000002a},
++      {0x00009b84, 0x0000002b},
++      {0x00009b88, 0x0000002c},
++      {0x00009b8c, 0x0000002d},
++      {0x00009b90, 0x00000030},
++      {0x00009b94, 0x00000031},
++      {0x00009b98, 0x00000032},
++      {0x00009b9c, 0x00000033},
++      {0x00009ba0, 0x00000034},
++      {0x00009ba4, 0x00000035},
++      {0x00009ba8, 0x00000035},
++      {0x00009bac, 0x00000035},
++      {0x00009bb0, 0x00000035},
++      {0x00009bb4, 0x00000035},
++      {0x00009bb8, 0x00000035},
++      {0x00009bbc, 0x00000035},
++      {0x00009bc0, 0x00000035},
++      {0x00009bc4, 0x00000035},
++      {0x00009bc8, 0x00000035},
++      {0x00009bcc, 0x00000035},
++      {0x00009bd0, 0x00000035},
++      {0x00009bd4, 0x00000035},
++      {0x00009bd8, 0x00000035},
++      {0x00009bdc, 0x00000035},
++      {0x00009be0, 0x00000035},
++      {0x00009be4, 0x00000035},
++      {0x00009be8, 0x00000035},
++      {0x00009bec, 0x00000035},
++      {0x00009bf0, 0x00000035},
++      {0x00009bf4, 0x00000035},
++      {0x00009bf8, 0x00000010},
++      {0x00009bfc, 0x0000001a},
++      {0x0000a210, 0x40806333},
++      {0x0000a214, 0x00106c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x018830c6},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x001a0bb5},
++      {0x0000a22c, 0x00000000},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a23c, 0x13c889ae},
++      {0x0000a240, 0x38490a20},
++      {0x0000a244, 0x00007bb6},
++      {0x0000a248, 0x0fff3ffc},
++      {0x0000a24c, 0x00000001},
++      {0x0000a250, 0x0000a000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0cc75380},
++      {0x0000a25c, 0x0f0f0f01},
++      {0x0000a260, 0xdfa91f01},
++      {0x0000a268, 0x00000001},
++      {0x0000a26c, 0x0ebae9c6},
++      {0x0000b26c, 0x0ebae9c6},
++      {0x0000c26c, 0x0ebae9c6},
++      {0x0000d270, 0x00820820},
++      {0x0000a278, 0x1ce739ce},
++      {0x0000a27c, 0x050701ce},
++      {0x0000a338, 0x00000000},
++      {0x0000a33c, 0x00000000},
++      {0x0000a340, 0x00000000},
++      {0x0000a344, 0x00000000},
++      {0x0000a348, 0x3fffffff},
++      {0x0000a34c, 0x3fffffff},
++      {0x0000a350, 0x3fffffff},
++      {0x0000a354, 0x0003ffff},
++      {0x0000a358, 0x79a8aa33},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a388, 0x0c000000},
++      {0x0000a38c, 0x20202020},
++      {0x0000a390, 0x20202020},
++      {0x0000a394, 0x1ce739ce},
++      {0x0000a398, 0x000001ce},
++      {0x0000a39c, 0x00000001},
++      {0x0000a3a0, 0x00000000},
++      {0x0000a3a4, 0x00000000},
++      {0x0000a3a8, 0x00000000},
++      {0x0000a3ac, 0x00000000},
++      {0x0000a3b0, 0x00000000},
++      {0x0000a3b4, 0x00000000},
++      {0x0000a3b8, 0x00000000},
++      {0x0000a3bc, 0x00000000},
++      {0x0000a3c0, 0x00000000},
++      {0x0000a3c4, 0x00000000},
++      {0x0000a3c8, 0x00000246},
++      {0x0000a3cc, 0x20202020},
++      {0x0000a3d0, 0x20202020},
++      {0x0000a3d4, 0x20202020},
++      {0x0000a3dc, 0x1ce739ce},
++      {0x0000a3e0, 0x000001ce},
++};
++
++static const u32 ar5416Bank0_9100[][2] = {
++      {0x000098b0, 0x1e5795e5},
++      {0x000098e0, 0x02008020},
++};
++
++static const u32 ar5416BB_RfGain_9100[][3] = {
++      {0x00009a00, 0x00000000, 0x00000000},
++      {0x00009a04, 0x00000040, 0x00000040},
++      {0x00009a08, 0x00000080, 0x00000080},
++      {0x00009a0c, 0x000001a1, 0x00000141},
++      {0x00009a10, 0x000001e1, 0x00000181},
++      {0x00009a14, 0x00000021, 0x000001c1},
++      {0x00009a18, 0x00000061, 0x00000001},
++      {0x00009a1c, 0x00000168, 0x00000041},
++      {0x00009a20, 0x000001a8, 0x000001a8},
++      {0x00009a24, 0x000001e8, 0x000001e8},
++      {0x00009a28, 0x00000028, 0x00000028},
++      {0x00009a2c, 0x00000068, 0x00000068},
++      {0x00009a30, 0x00000189, 0x000000a8},
++      {0x00009a34, 0x000001c9, 0x00000169},
++      {0x00009a38, 0x00000009, 0x000001a9},
++      {0x00009a3c, 0x00000049, 0x000001e9},
++      {0x00009a40, 0x00000089, 0x00000029},
++      {0x00009a44, 0x00000170, 0x00000069},
++      {0x00009a48, 0x000001b0, 0x00000190},
++      {0x00009a4c, 0x000001f0, 0x000001d0},
++      {0x00009a50, 0x00000030, 0x00000010},
++      {0x00009a54, 0x00000070, 0x00000050},
++      {0x00009a58, 0x00000191, 0x00000090},
++      {0x00009a5c, 0x000001d1, 0x00000151},
++      {0x00009a60, 0x00000011, 0x00000191},
++      {0x00009a64, 0x00000051, 0x000001d1},
++      {0x00009a68, 0x00000091, 0x00000011},
++      {0x00009a6c, 0x000001b8, 0x00000051},
++      {0x00009a70, 0x000001f8, 0x00000198},
++      {0x00009a74, 0x00000038, 0x000001d8},
++      {0x00009a78, 0x00000078, 0x00000018},
++      {0x00009a7c, 0x00000199, 0x00000058},
++      {0x00009a80, 0x000001d9, 0x00000098},
++      {0x00009a84, 0x00000019, 0x00000159},
++      {0x00009a88, 0x00000059, 0x00000199},
++      {0x00009a8c, 0x00000099, 0x000001d9},
++      {0x00009a90, 0x000000d9, 0x00000019},
++      {0x00009a94, 0x000000f9, 0x00000059},
++      {0x00009a98, 0x000000f9, 0x00000099},
++      {0x00009a9c, 0x000000f9, 0x000000d9},
++      {0x00009aa0, 0x000000f9, 0x000000f9},
++      {0x00009aa4, 0x000000f9, 0x000000f9},
++      {0x00009aa8, 0x000000f9, 0x000000f9},
++      {0x00009aac, 0x000000f9, 0x000000f9},
++      {0x00009ab0, 0x000000f9, 0x000000f9},
++      {0x00009ab4, 0x000000f9, 0x000000f9},
++      {0x00009ab8, 0x000000f9, 0x000000f9},
++      {0x00009abc, 0x000000f9, 0x000000f9},
++      {0x00009ac0, 0x000000f9, 0x000000f9},
++      {0x00009ac4, 0x000000f9, 0x000000f9},
++      {0x00009ac8, 0x000000f9, 0x000000f9},
++      {0x00009acc, 0x000000f9, 0x000000f9},
++      {0x00009ad0, 0x000000f9, 0x000000f9},
++      {0x00009ad4, 0x000000f9, 0x000000f9},
++      {0x00009ad8, 0x000000f9, 0x000000f9},
++      {0x00009adc, 0x000000f9, 0x000000f9},
++      {0x00009ae0, 0x000000f9, 0x000000f9},
++      {0x00009ae4, 0x000000f9, 0x000000f9},
++      {0x00009ae8, 0x000000f9, 0x000000f9},
++      {0x00009aec, 0x000000f9, 0x000000f9},
++      {0x00009af0, 0x000000f9, 0x000000f9},
++      {0x00009af4, 0x000000f9, 0x000000f9},
++      {0x00009af8, 0x000000f9, 0x000000f9},
++      {0x00009afc, 0x000000f9, 0x000000f9},
++};
++
++static const u32 ar5416Bank1_9100[][2] = {
++      {0x000098b0, 0x02108421},
++      {0x000098ec, 0x00000008},
++};
++
++static const u32 ar5416Bank2_9100[][2] = {
++      {0x000098b0, 0x0e73ff17},
++      {0x000098e0, 0x00000420},
++};
++
++static const u32 ar5416Bank3_9100[][3] = {
++      {0x000098f0, 0x01400018, 0x01c00018},
++};
++
++static const u32 ar5416Bank6_9100[][3] = {
++
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x004210a2, 0x004210a2},
++      {0x0000989c, 0x0014000f, 0x0014000f},
++      {0x0000989c, 0x00c40002, 0x00c40002},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x000180d6, 0x000180d6},
++      {0x0000989c, 0x0000c0aa, 0x0000c0aa},
++      {0x0000989c, 0x000000b1, 0x000000b1},
++      {0x0000989c, 0x00002000, 0x00002000},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank6TPC_9100[][3] = {
++
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x40ff0000, 0x40ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x00423022, 0x00423022},
++      {0x0000989c, 0x2014008f, 0x2014008f},
++      {0x0000989c, 0x00c40002, 0x00c40002},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x0001805e, 0x0001805e},
++      {0x0000989c, 0x0000c0ab, 0x0000c0ab},
++      {0x0000989c, 0x000000e1, 0x000000e1},
++      {0x0000989c, 0x00007080, 0x00007080},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank7_9100[][2] = {
++      {0x0000989c, 0x00000500},
++      {0x0000989c, 0x00000800},
++      {0x000098cc, 0x0000000e},
++};
++
++static const u32 ar5416Addac_9100[][2] = {
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000010},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x000000c0},
++      {0x0000989c, 0x00000015},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x000098cc, 0x00000000},
++};
++
++static const u32 ar5416Modes_9160[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000,
++       0x00014008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00,
++       0x06e006e0},
++      {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab,
++       0x098813cf},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0,
++       0x037216a0},
++      {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68,
++       0x00197a68},
++      {0x00009850, 0x6c48b4e2, 0x6c48b4e2, 0x6c48b0e2, 0x6c48b0e2,
++       0x6c48b0e2},
++      {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e,
++       0x7ec82d2e},
++      {0x0000985c, 0x31395d5e, 0x31395d5e, 0x31395d5e, 0x31395d5e,
++       0x31395d5e},
++      {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20,
++       0x00048d18},
++      {0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0,
++       0x409a40d0},
++      {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081,
++       0x050cb081},
++      {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b,
++       0x00000016},
++      {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d,
++       0xd00a8a0d},
++      {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020,
++       0xffb81020},
++      {0x00009960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40,
++       0x00009b40},
++      {0x0000a960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40,
++       0x00009b40},
++      {0x0000b960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40,
++       0x00009b40},
++      {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120,
++       0x00001120},
++      {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce,
++       0x000003ce},
++      {0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a0c00, 0x001a0c00,
++       0x001a0c00},
++      {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be,
++       0x038919be},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329,
++       0x60f65329},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880,
++       0x00000880},
++      {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788,
++       0xd03e4788},
++      {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120,
++       0x002ac120},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa,
++       0x0a1a7caa},
++      {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000,
++       0x18010000},
++      {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402,
++       0x2e032402},
++      {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06,
++       0x4a0a3c06},
++      {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b,
++       0x621a540b},
++      {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b,
++       0x764f6c1b},
++      {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a,
++       0x845b7a5a},
++      {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf,
++       0x950f8ccf},
++      {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f,
++       0xa5cf9b4f},
++      {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f,
++       0xbddfaf1f},
++      {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f,
++       0xd1ffc93f},
++      {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++};
++
++static const u32 ar5416Common_9160[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020015},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00004030, 0x00000002},
++      {0x0000403c, 0x00000002},
++      {0x00007010, 0x00000020},
++      {0x00007038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x40000000},
++      {0x00008054, 0x00000000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x000080c0, 0x2a82301a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008120, 0x08f04800},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0xffffffff},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c4, 0x00000000},
++      {0x000081d0, 0x00003210},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x00008300, 0x00000000},
++      {0x00008304, 0x00000000},
++      {0x00008308, 0x00000000},
++      {0x0000830c, 0x00000000},
++      {0x00008310, 0x00000000},
++      {0x00008314, 0x00000000},
++      {0x00008318, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000007},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00ff0000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x000107ff},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xad848e19},
++      {0x00009810, 0x7d14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x00009840, 0x206a01ae},
++      {0x0000984c, 0x1284233c},
++      {0x00009854, 0x00000859},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x05100000},
++      {0x0000a920, 0x05100000},
++      {0x0000b920, 0x05100000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009948, 0x9280b212},
++      {0x0000994c, 0x00020028},
++      {0x00009954, 0x5f3ca3de},
++      {0x00009958, 0x2108ecff},
++      {0x00009940, 0x00750604},
++      {0x0000c95c, 0x004b6a8e},
++      {0x00009970, 0x190fb515},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x201fff00},
++      {0x000099ac, 0x006f0000},
++      {0x000099b0, 0x03051000},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000200},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x0cc80caa},
++      {0x000099fc, 0x00001042},
++      {0x00009b00, 0x00000000},
++      {0x00009b04, 0x00000001},
++      {0x00009b08, 0x00000002},
++      {0x00009b0c, 0x00000003},
++      {0x00009b10, 0x00000004},
++      {0x00009b14, 0x00000005},
++      {0x00009b18, 0x00000008},
++      {0x00009b1c, 0x00000009},
++      {0x00009b20, 0x0000000a},
++      {0x00009b24, 0x0000000b},
++      {0x00009b28, 0x0000000c},
++      {0x00009b2c, 0x0000000d},
++      {0x00009b30, 0x00000010},
++      {0x00009b34, 0x00000011},
++      {0x00009b38, 0x00000012},
++      {0x00009b3c, 0x00000013},
++      {0x00009b40, 0x00000014},
++      {0x00009b44, 0x00000015},
++      {0x00009b48, 0x00000018},
++      {0x00009b4c, 0x00000019},
++      {0x00009b50, 0x0000001a},
++      {0x00009b54, 0x0000001b},
++      {0x00009b58, 0x0000001c},
++      {0x00009b5c, 0x0000001d},
++      {0x00009b60, 0x00000020},
++      {0x00009b64, 0x00000021},
++      {0x00009b68, 0x00000022},
++      {0x00009b6c, 0x00000023},
++      {0x00009b70, 0x00000024},
++      {0x00009b74, 0x00000025},
++      {0x00009b78, 0x00000028},
++      {0x00009b7c, 0x00000029},
++      {0x00009b80, 0x0000002a},
++      {0x00009b84, 0x0000002b},
++      {0x00009b88, 0x0000002c},
++      {0x00009b8c, 0x0000002d},
++      {0x00009b90, 0x00000030},
++      {0x00009b94, 0x00000031},
++      {0x00009b98, 0x00000032},
++      {0x00009b9c, 0x00000033},
++      {0x00009ba0, 0x00000034},
++      {0x00009ba4, 0x00000035},
++      {0x00009ba8, 0x00000035},
++      {0x00009bac, 0x00000035},
++      {0x00009bb0, 0x00000035},
++      {0x00009bb4, 0x00000035},
++      {0x00009bb8, 0x00000035},
++      {0x00009bbc, 0x00000035},
++      {0x00009bc0, 0x00000035},
++      {0x00009bc4, 0x00000035},
++      {0x00009bc8, 0x00000035},
++      {0x00009bcc, 0x00000035},
++      {0x00009bd0, 0x00000035},
++      {0x00009bd4, 0x00000035},
++      {0x00009bd8, 0x00000035},
++      {0x00009bdc, 0x00000035},
++      {0x00009be0, 0x00000035},
++      {0x00009be4, 0x00000035},
++      {0x00009be8, 0x00000035},
++      {0x00009bec, 0x00000035},
++      {0x00009bf0, 0x00000035},
++      {0x00009bf4, 0x00000035},
++      {0x00009bf8, 0x00000010},
++      {0x00009bfc, 0x0000001a},
++      {0x0000a210, 0x40806333},
++      {0x0000a214, 0x00106c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x018830c6},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x001a0bb5},
++      {0x0000a22c, 0x00000000},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a23c, 0x13c889af},
++      {0x0000a240, 0x38490a20},
++      {0x0000a244, 0x00007bb6},
++      {0x0000a248, 0x0fff3ffc},
++      {0x0000a24c, 0x00000001},
++      {0x0000a250, 0x0000e000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0cc75380},
++      {0x0000a25c, 0x0f0f0f01},
++      {0x0000a260, 0xdfa91f01},
++      {0x0000a268, 0x00000001},
++      {0x0000a26c, 0x0ebae9c6},
++      {0x0000b26c, 0x0ebae9c6},
++      {0x0000c26c, 0x0ebae9c6},
++      {0x0000d270, 0x00820820},
++      {0x0000a278, 0x1ce739ce},
++      {0x0000a27c, 0x050701ce},
++      {0x0000a338, 0x00000000},
++      {0x0000a33c, 0x00000000},
++      {0x0000a340, 0x00000000},
++      {0x0000a344, 0x00000000},
++      {0x0000a348, 0x3fffffff},
++      {0x0000a34c, 0x3fffffff},
++      {0x0000a350, 0x3fffffff},
++      {0x0000a354, 0x0003ffff},
++      {0x0000a358, 0x79bfaa03},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a388, 0x0c000000},
++      {0x0000a38c, 0x20202020},
++      {0x0000a390, 0x20202020},
++      {0x0000a394, 0x1ce739ce},
++      {0x0000a398, 0x000001ce},
++      {0x0000a39c, 0x00000001},
++      {0x0000a3a0, 0x00000000},
++      {0x0000a3a4, 0x00000000},
++      {0x0000a3a8, 0x00000000},
++      {0x0000a3ac, 0x00000000},
++      {0x0000a3b0, 0x00000000},
++      {0x0000a3b4, 0x00000000},
++      {0x0000a3b8, 0x00000000},
++      {0x0000a3bc, 0x00000000},
++      {0x0000a3c0, 0x00000000},
++      {0x0000a3c4, 0x00000000},
++      {0x0000a3c8, 0x00000246},
++      {0x0000a3cc, 0x20202020},
++      {0x0000a3d0, 0x20202020},
++      {0x0000a3d4, 0x20202020},
++      {0x0000a3dc, 0x1ce739ce},
++      {0x0000a3e0, 0x000001ce},
++};
++
++static const u32 ar5416Bank0_9160[][2] = {
++      {0x000098b0, 0x1e5795e5},
++      {0x000098e0, 0x02008020},
++};
++
++static const u32 ar5416BB_RfGain_9160[][3] = {
++      {0x00009a00, 0x00000000, 0x00000000},
++      {0x00009a04, 0x00000040, 0x00000040},
++      {0x00009a08, 0x00000080, 0x00000080},
++      {0x00009a0c, 0x000001a1, 0x00000141},
++      {0x00009a10, 0x000001e1, 0x00000181},
++      {0x00009a14, 0x00000021, 0x000001c1},
++      {0x00009a18, 0x00000061, 0x00000001},
++      {0x00009a1c, 0x00000168, 0x00000041},
++      {0x00009a20, 0x000001a8, 0x000001a8},
++      {0x00009a24, 0x000001e8, 0x000001e8},
++      {0x00009a28, 0x00000028, 0x00000028},
++      {0x00009a2c, 0x00000068, 0x00000068},
++      {0x00009a30, 0x00000189, 0x000000a8},
++      {0x00009a34, 0x000001c9, 0x00000169},
++      {0x00009a38, 0x00000009, 0x000001a9},
++      {0x00009a3c, 0x00000049, 0x000001e9},
++      {0x00009a40, 0x00000089, 0x00000029},
++      {0x00009a44, 0x00000170, 0x00000069},
++      {0x00009a48, 0x000001b0, 0x00000190},
++      {0x00009a4c, 0x000001f0, 0x000001d0},
++      {0x00009a50, 0x00000030, 0x00000010},
++      {0x00009a54, 0x00000070, 0x00000050},
++      {0x00009a58, 0x00000191, 0x00000090},
++      {0x00009a5c, 0x000001d1, 0x00000151},
++      {0x00009a60, 0x00000011, 0x00000191},
++      {0x00009a64, 0x00000051, 0x000001d1},
++      {0x00009a68, 0x00000091, 0x00000011},
++      {0x00009a6c, 0x000001b8, 0x00000051},
++      {0x00009a70, 0x000001f8, 0x00000198},
++      {0x00009a74, 0x00000038, 0x000001d8},
++      {0x00009a78, 0x00000078, 0x00000018},
++      {0x00009a7c, 0x00000199, 0x00000058},
++      {0x00009a80, 0x000001d9, 0x00000098},
++      {0x00009a84, 0x00000019, 0x00000159},
++      {0x00009a88, 0x00000059, 0x00000199},
++      {0x00009a8c, 0x00000099, 0x000001d9},
++      {0x00009a90, 0x000000d9, 0x00000019},
++      {0x00009a94, 0x000000f9, 0x00000059},
++      {0x00009a98, 0x000000f9, 0x00000099},
++      {0x00009a9c, 0x000000f9, 0x000000d9},
++      {0x00009aa0, 0x000000f9, 0x000000f9},
++      {0x00009aa4, 0x000000f9, 0x000000f9},
++      {0x00009aa8, 0x000000f9, 0x000000f9},
++      {0x00009aac, 0x000000f9, 0x000000f9},
++      {0x00009ab0, 0x000000f9, 0x000000f9},
++      {0x00009ab4, 0x000000f9, 0x000000f9},
++      {0x00009ab8, 0x000000f9, 0x000000f9},
++      {0x00009abc, 0x000000f9, 0x000000f9},
++      {0x00009ac0, 0x000000f9, 0x000000f9},
++      {0x00009ac4, 0x000000f9, 0x000000f9},
++      {0x00009ac8, 0x000000f9, 0x000000f9},
++      {0x00009acc, 0x000000f9, 0x000000f9},
++      {0x00009ad0, 0x000000f9, 0x000000f9},
++      {0x00009ad4, 0x000000f9, 0x000000f9},
++      {0x00009ad8, 0x000000f9, 0x000000f9},
++      {0x00009adc, 0x000000f9, 0x000000f9},
++      {0x00009ae0, 0x000000f9, 0x000000f9},
++      {0x00009ae4, 0x000000f9, 0x000000f9},
++      {0x00009ae8, 0x000000f9, 0x000000f9},
++      {0x00009aec, 0x000000f9, 0x000000f9},
++      {0x00009af0, 0x000000f9, 0x000000f9},
++      {0x00009af4, 0x000000f9, 0x000000f9},
++      {0x00009af8, 0x000000f9, 0x000000f9},
++      {0x00009afc, 0x000000f9, 0x000000f9},
++};
++
++static const u32 ar5416Bank1_9160[][2] = {
++      {0x000098b0, 0x02108421},
++      {0x000098ec, 0x00000008},
++};
++
++static const u32 ar5416Bank2_9160[][2] = {
++      {0x000098b0, 0x0e73ff17},
++      {0x000098e0, 0x00000420},
++};
++
++static const u32 ar5416Bank3_9160[][3] = {
++      {0x000098f0, 0x01400018, 0x01c00018},
++};
++
++static const u32 ar5416Bank6_9160[][3] = {
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x40ff0000, 0x40ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x004210a2, 0x004210a2},
++      {0x0000989c, 0x0014008f, 0x0014008f},
++      {0x0000989c, 0x00c40003, 0x00c40003},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x0001805e, 0x0001805e},
++      {0x0000989c, 0x0000c0ab, 0x0000c0ab},
++      {0x0000989c, 0x000000f1, 0x000000f1},
++      {0x0000989c, 0x00002081, 0x00002081},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank6TPC_9160[][3] = {
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00000000, 0x00000000},
++      {0x0000989c, 0x00e00000, 0x00e00000},
++      {0x0000989c, 0x005e0000, 0x005e0000},
++      {0x0000989c, 0x00120000, 0x00120000},
++      {0x0000989c, 0x00620000, 0x00620000},
++      {0x0000989c, 0x00020000, 0x00020000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x40ff0000, 0x40ff0000},
++      {0x0000989c, 0x005f0000, 0x005f0000},
++      {0x0000989c, 0x00870000, 0x00870000},
++      {0x0000989c, 0x00f90000, 0x00f90000},
++      {0x0000989c, 0x007b0000, 0x007b0000},
++      {0x0000989c, 0x00ff0000, 0x00ff0000},
++      {0x0000989c, 0x00f50000, 0x00f50000},
++      {0x0000989c, 0x00dc0000, 0x00dc0000},
++      {0x0000989c, 0x00110000, 0x00110000},
++      {0x0000989c, 0x006100a8, 0x006100a8},
++      {0x0000989c, 0x00423022, 0x00423022},
++      {0x0000989c, 0x2014008f, 0x2014008f},
++      {0x0000989c, 0x00c40002, 0x00c40002},
++      {0x0000989c, 0x003000f2, 0x003000f2},
++      {0x0000989c, 0x00440016, 0x00440016},
++      {0x0000989c, 0x00410040, 0x00410040},
++      {0x0000989c, 0x0001805e, 0x0001805e},
++      {0x0000989c, 0x0000c0ab, 0x0000c0ab},
++      {0x0000989c, 0x000000e1, 0x000000e1},
++      {0x0000989c, 0x00007080, 0x00007080},
++      {0x0000989c, 0x000000d4, 0x000000d4},
++      {0x000098d0, 0x0000000f, 0x0010000f},
++};
++
++static const u32 ar5416Bank7_9160[][2] = {
++      {0x0000989c, 0x00000500},
++      {0x0000989c, 0x00000800},
++      {0x000098cc, 0x0000000e},
++};
++
++static u32 ar5416Addac_9160[][2] = {
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x000000c0},
++      {0x0000989c, 0x00000018},
++      {0x0000989c, 0x00000004},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x000000c0},
++      {0x0000989c, 0x00000019},
++      {0x0000989c, 0x00000004},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000004},
++      {0x0000989c, 0x00000003},
++      {0x0000989c, 0x00000008},
++      {0x0000989c, 0x00000000},
++      {0x000098cc, 0x00000000},
++};
++
++static u32 ar5416Addac_91601_1[][2] = {
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x000000c0},
++      {0x0000989c, 0x00000018},
++      {0x0000989c, 0x00000004},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x000000c0},
++      {0x0000989c, 0x00000019},
++      {0x0000989c, 0x00000004},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x0000989c, 0x00000000},
++      {0x000098cc, 0x00000000},
++};
+diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+new file mode 100644
+index 0000000..4237269
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+@@ -0,0 +1,988 @@
++/*
++ * Copyright (c) 2008-2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include "hw.h"
++#include "hw-ops.h"
++#include "ar9002_phy.h"
++
++#define AR9285_CLCAL_REDO_THRESH    1
++
++static void ar9002_hw_setup_calibration(struct ath_hw *ah,
++                                      struct ath9k_cal_list *currCal)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
++                    AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
++                    currCal->calData->calCountMax);
++
++      switch (currCal->calData->calType) {
++      case IQ_MISMATCH_CAL:
++              REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "starting IQ Mismatch Calibration\n");
++              break;
++      case ADC_GAIN_CAL:
++              REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "starting ADC Gain Calibration\n");
++              break;
++      case ADC_DC_CAL:
++              REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "starting ADC DC Calibration\n");
++              break;
++      case ADC_DC_INIT_CAL:
++              REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "starting Init ADC DC Calibration\n");
++              break;
++      case TEMP_COMP_CAL:
++              break; /* Not supported */
++      }
++
++      REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
++                  AR_PHY_TIMING_CTRL4_DO_CAL);
++}
++
++static bool ar9002_hw_per_calibration(struct ath_hw *ah,
++                                    struct ath9k_channel *ichan,
++                                    u8 rxchainmask,
++                                    struct ath9k_cal_list *currCal)
++{
++      bool iscaldone = false;
++
++      if (currCal->calState == CAL_RUNNING) {
++              if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
++                    AR_PHY_TIMING_CTRL4_DO_CAL)) {
++
++                      currCal->calData->calCollect(ah);
++                      ah->cal_samples++;
++
++                      if (ah->cal_samples >= currCal->calData->calNumSamples) {
++                              int i, numChains = 0;
++                              for (i = 0; i < AR5416_MAX_CHAINS; i++) {
++                                      if (rxchainmask & (1 << i))
++                                              numChains++;
++                              }
++
++                              currCal->calData->calPostProc(ah, numChains);
++                              ichan->CalValid |= currCal->calData->calType;
++                              currCal->calState = CAL_DONE;
++                              iscaldone = true;
++                      } else {
++                              ar9002_hw_setup_calibration(ah, currCal);
++                      }
++              }
++      } else if (!(ichan->CalValid & currCal->calData->calType)) {
++              ath9k_hw_reset_calibration(ah, currCal);
++      }
++
++      return iscaldone;
++}
++
++/* Assumes you are talking about the currently configured channel */
++static bool ar9002_hw_iscal_supported(struct ath_hw *ah,
++                                    enum ath9k_cal_types calType)
++{
++      struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
++
++      switch (calType & ah->supp_cals) {
++      case IQ_MISMATCH_CAL: /* Both 2 GHz and 5 GHz support OFDM */
++              return true;
++      case ADC_GAIN_CAL:
++      case ADC_DC_CAL:
++              if (!(conf->channel->band == IEEE80211_BAND_2GHZ &&
++                    conf_is_ht20(conf)))
++                      return true;
++              break;
++      }
++      return false;
++}
++
++static void ar9002_hw_iqcal_collect(struct ath_hw *ah)
++{
++      int i;
++
++      for (i = 0; i < AR5416_MAX_CHAINS; i++) {
++              ah->totalPowerMeasI[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
++              ah->totalPowerMeasQ[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
++              ah->totalIqCorrMeas[i] +=
++                      (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
++              ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
++                        "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
++                        ah->cal_samples, i, ah->totalPowerMeasI[i],
++                        ah->totalPowerMeasQ[i],
++                        ah->totalIqCorrMeas[i]);
++      }
++}
++
++static void ar9002_hw_adc_gaincal_collect(struct ath_hw *ah)
++{
++      int i;
++
++      for (i = 0; i < AR5416_MAX_CHAINS; i++) {
++              ah->totalAdcIOddPhase[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
++              ah->totalAdcIEvenPhase[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
++              ah->totalAdcQOddPhase[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
++              ah->totalAdcQEvenPhase[i] +=
++                      REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
++
++              ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
++                        "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
++                        "oddq=0x%08x; evenq=0x%08x;\n",
++                        ah->cal_samples, i,
++                        ah->totalAdcIOddPhase[i],
++                        ah->totalAdcIEvenPhase[i],
++                        ah->totalAdcQOddPhase[i],
++                        ah->totalAdcQEvenPhase[i]);
++      }
++}
++
++static void ar9002_hw_adc_dccal_collect(struct ath_hw *ah)
++{
++      int i;
++
++      for (i = 0; i < AR5416_MAX_CHAINS; i++) {
++              ah->totalAdcDcOffsetIOddPhase[i] +=
++                      (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
++              ah->totalAdcDcOffsetIEvenPhase[i] +=
++                      (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
++              ah->totalAdcDcOffsetQOddPhase[i] +=
++                      (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
++              ah->totalAdcDcOffsetQEvenPhase[i] +=
++                      (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
++
++              ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
++                        "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
++                        "oddq=0x%08x; evenq=0x%08x;\n",
++                        ah->cal_samples, i,
++                        ah->totalAdcDcOffsetIOddPhase[i],
++                        ah->totalAdcDcOffsetIEvenPhase[i],
++                        ah->totalAdcDcOffsetQOddPhase[i],
++                        ah->totalAdcDcOffsetQEvenPhase[i]);
++      }
++}
++
++static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 powerMeasQ, powerMeasI, iqCorrMeas;
++      u32 qCoffDenom, iCoffDenom;
++      int32_t qCoff, iCoff;
++      int iqCorrNeg, i;
++
++      for (i = 0; i < numChains; i++) {
++              powerMeasI = ah->totalPowerMeasI[i];
++              powerMeasQ = ah->totalPowerMeasQ[i];
++              iqCorrMeas = ah->totalIqCorrMeas[i];
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Starting IQ Cal and Correction for Chain %d\n",
++                        i);
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Orignal: Chn %diq_corr_meas = 0x%08x\n",
++                        i, ah->totalIqCorrMeas[i]);
++
++              iqCorrNeg = 0;
++
++              if (iqCorrMeas > 0x80000000) {
++                      iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
++                      iqCorrNeg = 1;
++              }
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
++              ath_print(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
++                        iqCorrNeg);
++
++              iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128;
++              qCoffDenom = powerMeasQ / 64;
++
++              if ((powerMeasQ != 0) && (iCoffDenom != 0) &&
++                  (qCoffDenom != 0)) {
++                      iCoff = iqCorrMeas / iCoffDenom;
++                      qCoff = powerMeasI / qCoffDenom - 64;
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "Chn %d iCoff = 0x%08x\n", i, iCoff);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "Chn %d qCoff = 0x%08x\n", i, qCoff);
++
++                      iCoff = iCoff & 0x3f;
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "New: Chn %d iCoff = 0x%08x\n", i, iCoff);
++                      if (iqCorrNeg == 0x0)
++                              iCoff = 0x40 - iCoff;
++
++                      if (qCoff > 15)
++                              qCoff = 15;
++                      else if (qCoff <= -16)
++                              qCoff = 16;
++
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "Chn %d : iCoff = 0x%x  qCoff = 0x%x\n",
++                                i, iCoff, qCoff);
++
++                      REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
++                                    AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,
++                                    iCoff);
++                      REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
++                                    AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,
++                                    qCoff);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "IQ Cal and Correction done for Chain %d\n",
++                                i);
++              }
++      }
++
++      REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
++                  AR_PHY_TIMING_CTRL4_IQCORR_ENABLE);
++}
++
++static void ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 iOddMeasOffset, iEvenMeasOffset, qOddMeasOffset, qEvenMeasOffset;
++      u32 qGainMismatch, iGainMismatch, val, i;
++
++      for (i = 0; i < numChains; i++) {
++              iOddMeasOffset = ah->totalAdcIOddPhase[i];
++              iEvenMeasOffset = ah->totalAdcIEvenPhase[i];
++              qOddMeasOffset = ah->totalAdcQOddPhase[i];
++              qEvenMeasOffset = ah->totalAdcQEvenPhase[i];
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Starting ADC Gain Cal for Chain %d\n", i);
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_odd_i = 0x%08x\n", i,
++                        iOddMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_even_i = 0x%08x\n", i,
++                        iEvenMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_odd_q = 0x%08x\n", i,
++                        qOddMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_even_q = 0x%08x\n", i,
++                        qEvenMeasOffset);
++
++              if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) {
++                      iGainMismatch =
++                              ((iEvenMeasOffset * 32) /
++                               iOddMeasOffset) & 0x3f;
++                      qGainMismatch =
++                              ((qOddMeasOffset * 32) /
++                               qEvenMeasOffset) & 0x3f;
++
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "Chn %d gain_mismatch_i = 0x%08x\n", i,
++                                iGainMismatch);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "Chn %d gain_mismatch_q = 0x%08x\n", i,
++                                qGainMismatch);
++
++                      val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
++                      val &= 0xfffff000;
++                      val |= (qGainMismatch) | (iGainMismatch << 6);
++                      REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
++
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "ADC Gain Cal done for Chain %d\n", i);
++              }
++      }
++
++      REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
++                REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |
++                AR_PHY_NEW_ADC_GAIN_CORR_ENABLE);
++}
++
++static void ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 iOddMeasOffset, iEvenMeasOffset, val, i;
++      int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch;
++      const struct ath9k_percal_data *calData =
++              ah->cal_list_curr->calData;
++      u32 numSamples =
++              (1 << (calData->calCountMax + 5)) * calData->calNumSamples;
++
++      for (i = 0; i < numChains; i++) {
++              iOddMeasOffset = ah->totalAdcDcOffsetIOddPhase[i];
++              iEvenMeasOffset = ah->totalAdcDcOffsetIEvenPhase[i];
++              qOddMeasOffset = ah->totalAdcDcOffsetQOddPhase[i];
++              qEvenMeasOffset = ah->totalAdcDcOffsetQEvenPhase[i];
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                         "Starting ADC DC Offset Cal for Chain %d\n", i);
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_odd_i = %d\n", i,
++                        iOddMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_even_i = %d\n", i,
++                        iEvenMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_odd_q = %d\n", i,
++                        qOddMeasOffset);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d pwr_meas_even_q = %d\n", i,
++                        qEvenMeasOffset);
++
++              iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) /
++                             numSamples) & 0x1ff;
++              qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) /
++                             numSamples) & 0x1ff;
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d dc_offset_mismatch_i = 0x%08x\n", i,
++                        iDcMismatch);
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "Chn %d dc_offset_mismatch_q = 0x%08x\n", i,
++                        qDcMismatch);
++
++              val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
++              val &= 0xc0000fff;
++              val |= (qDcMismatch << 12) | (iDcMismatch << 21);
++              REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
++
++              ath_print(common, ATH_DBG_CALIBRATE,
++                        "ADC DC Offset Cal done for Chain %d\n", i);
++      }
++
++      REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
++                REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |
++                AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE);
++}
++
++static void ar9287_hw_olc_temp_compensation(struct ath_hw *ah)
++{
++      u32 rddata;
++      int32_t delta, currPDADC, slope;
++
++      rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4);
++      currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
++
++      if (ah->initPDADC == 0 || currPDADC == 0) {
++              /*
++               * Zero value indicates that no frames have been transmitted yet,
++               * can't do temperature compensation until frames are transmitted.
++               */
++              return;
++      } else {
++              slope = ah->eep_ops->get_eeprom(ah, EEP_TEMPSENSE_SLOPE);
++
++              if (slope == 0) { /* to avoid divide by zero case */
++                      delta = 0;
++              } else {
++                      delta = ((currPDADC - ah->initPDADC)*4) / slope;
++              }
++              REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11,
++                            AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
++              REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11,
++                            AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
++      }
++}
++
++static void ar9280_hw_olc_temp_compensation(struct ath_hw *ah)
++{
++      u32 rddata, i;
++      int delta, currPDADC, regval;
++
++      rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4);
++      currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
++
++      if (ah->initPDADC == 0 || currPDADC == 0)
++              return;
++
++      if (ah->eep_ops->get_eeprom(ah, EEP_DAC_HPWR_5G))
++              delta = (currPDADC - ah->initPDADC + 4) / 8;
++      else
++              delta = (currPDADC - ah->initPDADC + 5) / 10;
++
++      if (delta != ah->PDADCdelta) {
++              ah->PDADCdelta = delta;
++              for (i = 1; i < AR9280_TX_GAIN_TABLE_SIZE; i++) {
++                      regval = ah->originalGain[i] - delta;
++                      if (regval < 0)
++                              regval = 0;
++
++                      REG_RMW_FIELD(ah,
++                                    AR_PHY_TX_GAIN_TBL1 + i * 4,
++                                    AR_PHY_TX_GAIN, regval);
++              }
++      }
++}
++
++static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
++{
++      u32 regVal;
++      unsigned int i;
++      u32 regList [][2] = {
++              { 0x786c, 0 },
++              { 0x7854, 0 },
++              { 0x7820, 0 },
++              { 0x7824, 0 },
++              { 0x7868, 0 },
++              { 0x783c, 0 },
++              { 0x7838, 0 } ,
++              { 0x7828, 0 } ,
++      };
++
++      for (i = 0; i < ARRAY_SIZE(regList); i++)
++              regList[i][1] = REG_READ(ah, regList[i][0]);
++
++      regVal = REG_READ(ah, 0x7834);
++      regVal &= (~(0x1));
++      REG_WRITE(ah, 0x7834, regVal);
++      regVal = REG_READ(ah, 0x9808);
++      regVal |= (0x1 << 27);
++      REG_WRITE(ah, 0x9808, regVal);
++
++      /* 786c,b23,1, pwddac=1 */
++      REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
++      /* 7854, b5,1, pdrxtxbb=1 */
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
++      /* 7854, b7,1, pdv2i=1 */
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
++      /* 7854, b8,1, pddacinterface=1 */
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
++      /* 7824,b12,0, offcal=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
++      /* 7838, b1,0, pwddb=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
++      /* 7820,b11,0, enpacal=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
++      /* 7820,b25,1, pdpadrv1=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
++      /* 7820,b24,0, pdpadrv2=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1,AR9285_AN_RF2G1_PDPADRV2,0);
++      /* 7820,b23,0, pdpaout=0 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
++      /* 783c,b14-16,7, padrvgn2tab_0=7 */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G8,AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
++      /*
++       * 7838,b29-31,0, padrvgn1tab_0=0
++       * does not matter since we turn it off
++       */
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G7,AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
++
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff);
++
++      /* Set:
++       * localmode=1,bmode=1,bmoderxtx=1,synthon=1,
++       * txon=1,paon=1,oscon=1,synthon_force=1
++       */
++      REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0);
++      udelay(30);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0);
++
++      /* find off_6_1; */
++      for (i = 6; i > 0; i--) {
++              regVal = REG_READ(ah, 0x7834);
++              regVal |= (1 << (20 + i));
++              REG_WRITE(ah, 0x7834, regVal);
++              udelay(1);
++              //regVal = REG_READ(ah, 0x7834);
++              regVal &= (~(0x1 << (20 + i)));
++              regVal |= (MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9)
++                          << (20 + i));
++              REG_WRITE(ah, 0x7834, regVal);
++      }
++
++      regVal = (regVal >>20) & 0x7f;
++
++      /* Update PA cal info */
++      if ((!is_reset) && (ah->pacal_info.prev_offset == regVal)) {
++              if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT)
++                      ah->pacal_info.max_skipcount =
++                              2 * ah->pacal_info.max_skipcount;
++              ah->pacal_info.skipcount = ah->pacal_info.max_skipcount;
++      } else {
++              ah->pacal_info.max_skipcount = 1;
++              ah->pacal_info.skipcount = 0;
++              ah->pacal_info.prev_offset = regVal;
++      }
++
++      regVal = REG_READ(ah, 0x7834);
++      regVal |= 0x1;
++      REG_WRITE(ah, 0x7834, regVal);
++      regVal = REG_READ(ah, 0x9808);
++      regVal &= (~(0x1 << 27));
++      REG_WRITE(ah, 0x9808, regVal);
++
++      for (i = 0; i < ARRAY_SIZE(regList); i++)
++              REG_WRITE(ah, regList[i][0], regList[i][1]);
++}
++
++static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u32 regVal;
++      int i, offset, offs_6_1, offs_0;
++      u32 ccomp_org, reg_field;
++      u32 regList[][2] = {
++              { 0x786c, 0 },
++              { 0x7854, 0 },
++              { 0x7820, 0 },
++              { 0x7824, 0 },
++              { 0x7868, 0 },
++              { 0x783c, 0 },
++              { 0x7838, 0 },
++      };
++
++      ath_print(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n");
++
++      /* PA CAL is not needed for high power solution */
++      if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) ==
++          AR5416_EEP_TXGAIN_HIGH_POWER)
++              return;
++
++      if (AR_SREV_9285_11(ah)) {
++              REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14));
++              udelay(10);
++      }
++
++      for (i = 0; i < ARRAY_SIZE(regList); i++)
++              regList[i][1] = REG_READ(ah, regList[i][0]);
++
++      regVal = REG_READ(ah, 0x7834);
++      regVal &= (~(0x1));
++      REG_WRITE(ah, 0x7834, regVal);
++      regVal = REG_READ(ah, 0x9808);
++      regVal |= (0x1 << 27);
++      REG_WRITE(ah, 0x9808, regVal);
++
++      REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
++      REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
++      ccomp_org = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_CCOMP);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 0xf);
++
++      REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0);
++      udelay(30);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 0);
++
++      for (i = 6; i > 0; i--) {
++              regVal = REG_READ(ah, 0x7834);
++              regVal |= (1 << (19 + i));
++              REG_WRITE(ah, 0x7834, regVal);
++              udelay(1);
++              regVal = REG_READ(ah, 0x7834);
++              regVal &= (~(0x1 << (19 + i)));
++              reg_field = MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9);
++              regVal |= (reg_field << (19 + i));
++              REG_WRITE(ah, 0x7834, regVal);
++      }
++
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 1);
++      udelay(1);
++      reg_field = MS(REG_READ(ah, AR9285_AN_RF2G9), AR9285_AN_RXTXBB1_SPARE9);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, reg_field);
++      offs_6_1 = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_OFFS);
++      offs_0   = MS(REG_READ(ah, AR9285_AN_RF2G3), AR9285_AN_RF2G3_PDVCCOMP);
++
++      offset = (offs_6_1<<1) | offs_0;
++      offset = offset - 0;
++      offs_6_1 = offset>>1;
++      offs_0 = offset & 1;
++
++      if ((!is_reset) && (ah->pacal_info.prev_offset == offset)) {
++              if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT)
++                      ah->pacal_info.max_skipcount =
++                              2 * ah->pacal_info.max_skipcount;
++              ah->pacal_info.skipcount = ah->pacal_info.max_skipcount;
++      } else {
++              ah->pacal_info.max_skipcount = 1;
++              ah->pacal_info.skipcount = 0;
++              ah->pacal_info.prev_offset = offset;
++      }
++
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, offs_6_1);
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, offs_0);
++
++      regVal = REG_READ(ah, 0x7834);
++      regVal |= 0x1;
++      REG_WRITE(ah, 0x7834, regVal);
++      regVal = REG_READ(ah, 0x9808);
++      regVal &= (~(0x1 << 27));
++      REG_WRITE(ah, 0x9808, regVal);
++
++      for (i = 0; i < ARRAY_SIZE(regList); i++)
++              REG_WRITE(ah, regList[i][0], regList[i][1]);
++
++      REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, ccomp_org);
++
++      if (AR_SREV_9285_11(ah))
++              REG_WRITE(ah, AR9285_AN_TOP4, AR9285_AN_TOP4_DEFAULT);
++
++}
++
++static void ar9002_hw_pa_cal(struct ath_hw *ah, bool is_reset)
++{
++      if (AR_SREV_9271(ah)) {
++              if (is_reset || !ah->pacal_info.skipcount)
++                      ar9271_hw_pa_cal(ah, is_reset);
++              else
++                      ah->pacal_info.skipcount--;
++      } else if (AR_SREV_9285_11_OR_LATER(ah)) {
++              if (is_reset || !ah->pacal_info.skipcount)
++                      ar9285_hw_pa_cal(ah, is_reset);
++              else
++                      ah->pacal_info.skipcount--;
++      }
++}
++
++static void ar9002_hw_olc_temp_compensation(struct ath_hw *ah)
++{
++      if (OLC_FOR_AR9287_10_LATER)
++              ar9287_hw_olc_temp_compensation(ah);
++      else if (OLC_FOR_AR9280_20_LATER)
++              ar9280_hw_olc_temp_compensation(ah);
++}
++
++static bool ar9002_hw_calibrate(struct ath_hw *ah,
++                              struct ath9k_channel *chan,
++                              u8 rxchainmask,
++                              bool longcal)
++{
++      bool iscaldone = true;
++      struct ath9k_cal_list *currCal = ah->cal_list_curr;
++
++      if (currCal &&
++          (currCal->calState == CAL_RUNNING ||
++           currCal->calState == CAL_WAITING)) {
++              iscaldone = ar9002_hw_per_calibration(ah, chan,
++                                                    rxchainmask, currCal);
++              if (iscaldone) {
++                      ah->cal_list_curr = currCal = currCal->calNext;
++
++                      if (currCal->calState == CAL_WAITING) {
++                              iscaldone = false;
++                              ath9k_hw_reset_calibration(ah, currCal);
++                      }
++              }
++      }
++
++      /* Do NF cal only at longer intervals */
++      if (longcal) {
++              /* Do periodic PAOffset Cal */
++              ar9002_hw_pa_cal(ah, false);
++              ar9002_hw_olc_temp_compensation(ah);
++
++              /* Get the value from the previous NF cal and update history buffer */
++              ath9k_hw_getnf(ah, chan);
++
++              /*
++               * Load the NF from history buffer of the current channel.
++               * NF is slow time-variant, so it is OK to use a historical value.
++               */
++              ath9k_hw_loadnf(ah, ah->curchan);
++
++              ath9k_hw_start_nfcal(ah);
++      }
++
++      return iscaldone;
++}
++
++/* Carrier leakage Calibration fix */
++static bool ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
++      if (IS_CHAN_HT20(chan)) {
++              REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE);
++              REG_SET_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
++              REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
++                          AR_PHY_AGC_CONTROL_FLTR_CAL);
++              REG_CLR_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE);
++              REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
++              if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
++                                AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) {
++                      ath_print(common, ATH_DBG_CALIBRATE, "offset "
++                                "calibration failed to complete in "
++                                "1ms; noisy ??\n");
++                      return false;
++              }
++              REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
++              REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE);
++              REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
++      }
++      REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
++      REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
++      REG_SET_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE);
++      REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
++      if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
++                        0, AH_WAIT_TIMEOUT)) {
++              ath_print(common, ATH_DBG_CALIBRATE, "offset calibration "
++                        "failed to complete in 1ms; noisy ??\n");
++              return false;
++      }
++
++      REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
++      REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
++      REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
++
++      return true;
++}
++
++static bool ar9285_hw_clc(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      int i;
++      u_int32_t txgain_max;
++      u_int32_t clc_gain, gain_mask = 0, clc_num = 0;
++      u_int32_t reg_clc_I0, reg_clc_Q0;
++      u_int32_t i0_num = 0;
++      u_int32_t q0_num = 0;
++      u_int32_t total_num = 0;
++      u_int32_t reg_rf2g5_org;
++      bool retv = true;
++
++      if (!(ar9285_hw_cl_cal(ah, chan)))
++              return false;
++
++      txgain_max = MS(REG_READ(ah, AR_PHY_TX_PWRCTRL7),
++                      AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX);
++
++      for (i = 0; i < (txgain_max+1); i++) {
++              clc_gain = (REG_READ(ah, (AR_PHY_TX_GAIN_TBL1+(i<<2))) &
++                         AR_PHY_TX_GAIN_CLC) >> AR_PHY_TX_GAIN_CLC_S;
++              if (!(gain_mask & (1 << clc_gain))) {
++                      gain_mask |= (1 << clc_gain);
++                      clc_num++;
++              }
++      }
++
++      for (i = 0; i < clc_num; i++) {
++              reg_clc_I0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2)))
++                            & AR_PHY_CLC_I0) >> AR_PHY_CLC_I0_S;
++              reg_clc_Q0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2)))
++                            & AR_PHY_CLC_Q0) >> AR_PHY_CLC_Q0_S;
++              if (reg_clc_I0 == 0)
++                      i0_num++;
++
++              if (reg_clc_Q0 == 0)
++                      q0_num++;
++      }
++      total_num = i0_num + q0_num;
++      if (total_num > AR9285_CLCAL_REDO_THRESH) {
++              reg_rf2g5_org = REG_READ(ah, AR9285_RF2G5);
++              if (AR_SREV_9285E_20(ah)) {
++                      REG_WRITE(ah, AR9285_RF2G5,
++                                (reg_rf2g5_org & AR9285_RF2G5_IC50TX) |
++                                AR9285_RF2G5_IC50TX_XE_SET);
++              } else {
++                      REG_WRITE(ah, AR9285_RF2G5,
++                                (reg_rf2g5_org & AR9285_RF2G5_IC50TX) |
++                                AR9285_RF2G5_IC50TX_SET);
++              }
++              retv = ar9285_hw_cl_cal(ah, chan);
++              REG_WRITE(ah, AR9285_RF2G5, reg_rf2g5_org);
++      }
++      return retv;
++}
++
++static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      if (AR_SREV_9271(ah) || AR_SREV_9285_12_OR_LATER(ah)) {
++              if (!ar9285_hw_clc(ah, chan))
++                      return false;
++      } else {
++              if (AR_SREV_9280_10_OR_LATER(ah)) {
++                      if (!AR_SREV_9287_10_OR_LATER(ah))
++                              REG_CLR_BIT(ah, AR_PHY_ADC_CTL,
++                                          AR_PHY_ADC_CTL_OFF_PWDADC);
++                      REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
++                                  AR_PHY_AGC_CONTROL_FLTR_CAL);
++              }
++
++              /* Calibrate the AGC */
++              REG_WRITE(ah, AR_PHY_AGC_CONTROL,
++                        REG_READ(ah, AR_PHY_AGC_CONTROL) |
++                        AR_PHY_AGC_CONTROL_CAL);
++
++              /* Poll for offset calibration complete */
++              if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
++                                 0, AH_WAIT_TIMEOUT)) {
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "offset calibration failed to "
++                                "complete in 1ms; noisy environment?\n");
++                      return false;
++              }
++
++              if (AR_SREV_9280_10_OR_LATER(ah)) {
++                      if (!AR_SREV_9287_10_OR_LATER(ah))
++                              REG_SET_BIT(ah, AR_PHY_ADC_CTL,
++                                          AR_PHY_ADC_CTL_OFF_PWDADC);
++                      REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
++                                  AR_PHY_AGC_CONTROL_FLTR_CAL);
++              }
++      }
++
++      /* Do PA Calibration */
++      ar9002_hw_pa_cal(ah, true);
++
++      /* Do NF Calibration after DC offset and other calibrations */
++      REG_WRITE(ah, AR_PHY_AGC_CONTROL,
++                REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_NF);
++
++      ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
++
++      /* Enable IQ, ADC Gain and ADC DC offset CALs */
++      if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) {
++              if (ar9002_hw_iscal_supported(ah, ADC_GAIN_CAL)) {
++                      INIT_CAL(&ah->adcgain_caldata);
++                      INSERT_CAL(ah, &ah->adcgain_caldata);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "enabling ADC Gain Calibration.\n");
++              }
++              if (ar9002_hw_iscal_supported(ah, ADC_DC_CAL)) {
++                      INIT_CAL(&ah->adcdc_caldata);
++                      INSERT_CAL(ah, &ah->adcdc_caldata);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "enabling ADC DC Calibration.\n");
++              }
++              if (ar9002_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) {
++                      INIT_CAL(&ah->iq_caldata);
++                      INSERT_CAL(ah, &ah->iq_caldata);
++                      ath_print(common, ATH_DBG_CALIBRATE,
++                                "enabling IQ Calibration.\n");
++              }
++
++              ah->cal_list_curr = ah->cal_list;
++
++              if (ah->cal_list_curr)
++                      ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
++      }
++
++      chan->CalValid = 0;
++
++      return true;
++}
++
++static const struct ath9k_percal_data iq_cal_multi_sample = {
++      IQ_MISMATCH_CAL,
++      MAX_CAL_SAMPLES,
++      PER_MIN_LOG_COUNT,
++      ar9002_hw_iqcal_collect,
++      ar9002_hw_iqcalibrate
++};
++static const struct ath9k_percal_data iq_cal_single_sample = {
++      IQ_MISMATCH_CAL,
++      MIN_CAL_SAMPLES,
++      PER_MAX_LOG_COUNT,
++      ar9002_hw_iqcal_collect,
++      ar9002_hw_iqcalibrate
++};
++static const struct ath9k_percal_data adc_gain_cal_multi_sample = {
++      ADC_GAIN_CAL,
++      MAX_CAL_SAMPLES,
++      PER_MIN_LOG_COUNT,
++      ar9002_hw_adc_gaincal_collect,
++      ar9002_hw_adc_gaincal_calibrate
++};
++static const struct ath9k_percal_data adc_gain_cal_single_sample = {
++      ADC_GAIN_CAL,
++      MIN_CAL_SAMPLES,
++      PER_MAX_LOG_COUNT,
++      ar9002_hw_adc_gaincal_collect,
++      ar9002_hw_adc_gaincal_calibrate
++};
++static const struct ath9k_percal_data adc_dc_cal_multi_sample = {
++      ADC_DC_CAL,
++      MAX_CAL_SAMPLES,
++      PER_MIN_LOG_COUNT,
++      ar9002_hw_adc_dccal_collect,
++      ar9002_hw_adc_dccal_calibrate
++};
++static const struct ath9k_percal_data adc_dc_cal_single_sample = {
++      ADC_DC_CAL,
++      MIN_CAL_SAMPLES,
++      PER_MAX_LOG_COUNT,
++      ar9002_hw_adc_dccal_collect,
++      ar9002_hw_adc_dccal_calibrate
++};
++static const struct ath9k_percal_data adc_init_dc_cal = {
++      ADC_DC_INIT_CAL,
++      MIN_CAL_SAMPLES,
++      INIT_LOG_COUNT,
++      ar9002_hw_adc_dccal_collect,
++      ar9002_hw_adc_dccal_calibrate
++};
++
++static void ar9002_hw_init_cal_settings(struct ath_hw *ah)
++{
++      if (AR_SREV_9100(ah)) {
++              ah->iq_caldata.calData = &iq_cal_multi_sample;
++              ah->supp_cals = IQ_MISMATCH_CAL;
++              return;
++      }
++
++      if (AR_SREV_9160_10_OR_LATER(ah)) {
++              if (AR_SREV_9280_10_OR_LATER(ah)) {
++                      ah->iq_caldata.calData = &iq_cal_single_sample;
++                      ah->adcgain_caldata.calData =
++                              &adc_gain_cal_single_sample;
++                      ah->adcdc_caldata.calData =
++                              &adc_dc_cal_single_sample;
++                      ah->adcdc_calinitdata.calData =
++                              &adc_init_dc_cal;
++              } else {
++                      ah->iq_caldata.calData = &iq_cal_multi_sample;
++                      ah->adcgain_caldata.calData =
++                              &adc_gain_cal_multi_sample;
++                      ah->adcdc_caldata.calData =
++                              &adc_dc_cal_multi_sample;
++                      ah->adcdc_calinitdata.calData =
++                              &adc_init_dc_cal;
++              }
++              ah->supp_cals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
++      }
++}
++
++void ar9002_hw_attach_calib_ops(struct ath_hw *ah)
++{
++      struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
++      struct ath_hw_ops *ops = ath9k_hw_ops(ah);
++
++      priv_ops->init_cal_settings = ar9002_hw_init_cal_settings;
++      priv_ops->init_cal = ar9002_hw_init_cal;
++      priv_ops->setup_calibration = ar9002_hw_setup_calibration;
++      priv_ops->iscal_supported = ar9002_hw_iscal_supported;
++
++      ops->calibrate = ar9002_hw_calibrate;
++}
+diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+new file mode 100644
+index 0000000..c1b4f14
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+@@ -0,0 +1,601 @@
++/*
++ * Copyright (c) 2008-2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include "hw.h"
++#include "ar5008_initvals.h"
++#include "ar9001_initvals.h"
++#include "ar9002_initvals.h"
++
++/* General hardware code for the A5008/AR9001/AR9002 hadware families */
++
++static bool ar9002_hw_macversion_supported(u32 macversion)
++{
++      switch (macversion) {
++      case AR_SREV_VERSION_5416_PCI:
++      case AR_SREV_VERSION_5416_PCIE:
++      case AR_SREV_VERSION_9160:
++      case AR_SREV_VERSION_9100:
++      case AR_SREV_VERSION_9280:
++      case AR_SREV_VERSION_9285:
++      case AR_SREV_VERSION_9287:
++      case AR_SREV_VERSION_9271:
++              return true;
++      default:
++              break;
++      }
++      return false;
++}
++
++static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
++{
++      if (AR_SREV_9271(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
++                             ARRAY_SIZE(ar9271Modes_9271), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
++                             ARRAY_SIZE(ar9271Common_9271), 2);
++              INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271,
++                             ar9271Common_normal_cck_fir_coeff_9271,
++                             ARRAY_SIZE(ar9271Common_normal_cck_fir_coeff_9271), 2);
++              INIT_INI_ARRAY(&ah->iniCommon_japan_2484_cck_fir_coeff_9271,
++                             ar9271Common_japan_2484_cck_fir_coeff_9271,
++                             ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2);
++              INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
++                             ar9271Modes_9271_1_0_only,
++                             ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6);
++              INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
++                             ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 6);
++              INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
++                             ar9271Modes_high_power_tx_gain_9271,
++                             ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 6);
++              INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
++                             ar9271Modes_normal_power_tx_gain_9271,
++                             ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 6);
++              return;
++      }
++
++      if (AR_SREV_9287_11_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
++                              ARRAY_SIZE(ar9287Modes_9287_1_1), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
++                              ARRAY_SIZE(ar9287Common_9287_1_1), 2);
++              if (ah->config.pcie_clock_req)
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9287PciePhy_clkreq_off_L1_9287_1_1,
++                      ARRAY_SIZE(ar9287PciePhy_clkreq_off_L1_9287_1_1), 2);
++              else
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9287PciePhy_clkreq_always_on_L1_9287_1_1,
++                      ARRAY_SIZE(ar9287PciePhy_clkreq_always_on_L1_9287_1_1),
++                                      2);
++      } else if (AR_SREV_9287_10_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_0,
++                              ARRAY_SIZE(ar9287Modes_9287_1_0), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_0,
++                              ARRAY_SIZE(ar9287Common_9287_1_0), 2);
++
++              if (ah->config.pcie_clock_req)
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9287PciePhy_clkreq_off_L1_9287_1_0,
++                      ARRAY_SIZE(ar9287PciePhy_clkreq_off_L1_9287_1_0), 2);
++              else
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9287PciePhy_clkreq_always_on_L1_9287_1_0,
++                      ARRAY_SIZE(ar9287PciePhy_clkreq_always_on_L1_9287_1_0),
++                                2);
++      } else if (AR_SREV_9285_12_OR_LATER(ah)) {
++
++
++              INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
++                             ARRAY_SIZE(ar9285Modes_9285_1_2), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
++                             ARRAY_SIZE(ar9285Common_9285_1_2), 2);
++
++              if (ah->config.pcie_clock_req) {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9285PciePhy_clkreq_off_L1_9285_1_2,
++                      ARRAY_SIZE(ar9285PciePhy_clkreq_off_L1_9285_1_2), 2);
++              } else {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9285PciePhy_clkreq_always_on_L1_9285_1_2,
++                      ARRAY_SIZE(ar9285PciePhy_clkreq_always_on_L1_9285_1_2),
++                                2);
++              }
++      } else if (AR_SREV_9285_10_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285,
++                             ARRAY_SIZE(ar9285Modes_9285), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285,
++                             ARRAY_SIZE(ar9285Common_9285), 2);
++
++              if (ah->config.pcie_clock_req) {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9285PciePhy_clkreq_off_L1_9285,
++                      ARRAY_SIZE(ar9285PciePhy_clkreq_off_L1_9285), 2);
++              } else {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                      ar9285PciePhy_clkreq_always_on_L1_9285,
++                      ARRAY_SIZE(ar9285PciePhy_clkreq_always_on_L1_9285), 2);
++              }
++      } else if (AR_SREV_9280_20_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
++                             ARRAY_SIZE(ar9280Modes_9280_2), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
++                             ARRAY_SIZE(ar9280Common_9280_2), 2);
++
++              if (ah->config.pcie_clock_req) {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                             ar9280PciePhy_clkreq_off_L1_9280,
++                             ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280),2);
++              } else {
++                      INIT_INI_ARRAY(&ah->iniPcieSerdes,
++                             ar9280PciePhy_clkreq_always_on_L1_9280,
++                             ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
++              }
++              INIT_INI_ARRAY(&ah->iniModesAdditional,
++                             ar9280Modes_fast_clock_9280_2,
++                             ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
++      } else if (AR_SREV_9280_10_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280,
++                             ARRAY_SIZE(ar9280Modes_9280), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280,
++                             ARRAY_SIZE(ar9280Common_9280), 2);
++      } else if (AR_SREV_9160_10_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
++                             ARRAY_SIZE(ar5416Modes_9160), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
++                             ARRAY_SIZE(ar5416Common_9160), 2);
++              INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9160,
++                             ARRAY_SIZE(ar5416Bank0_9160), 2);
++              INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain_9160,
++                             ARRAY_SIZE(ar5416BB_RfGain_9160), 3);
++              INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1_9160,
++                             ARRAY_SIZE(ar5416Bank1_9160), 2);
++              INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2_9160,
++                             ARRAY_SIZE(ar5416Bank2_9160), 2);
++              INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3_9160,
++                             ARRAY_SIZE(ar5416Bank3_9160), 3);
++              INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9160,
++                             ARRAY_SIZE(ar5416Bank6_9160), 3);
++              INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9160,
++                             ARRAY_SIZE(ar5416Bank6TPC_9160), 3);
++              INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7_9160,
++                             ARRAY_SIZE(ar5416Bank7_9160), 2);
++              if (AR_SREV_9160_11(ah)) {
++                      INIT_INI_ARRAY(&ah->iniAddac,
++                                     ar5416Addac_91601_1,
++                                     ARRAY_SIZE(ar5416Addac_91601_1), 2);
++              } else {
++                      INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
++                                     ARRAY_SIZE(ar5416Addac_9160), 2);
++              }
++      } else if (AR_SREV_9100_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
++                             ARRAY_SIZE(ar5416Modes_9100), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
++                             ARRAY_SIZE(ar5416Common_9100), 2);
++              INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9100,
++                             ARRAY_SIZE(ar5416Bank0_9100), 2);
++              INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain_9100,
++                             ARRAY_SIZE(ar5416BB_RfGain_9100), 3);
++              INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1_9100,
++                             ARRAY_SIZE(ar5416Bank1_9100), 2);
++              INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2_9100,
++                             ARRAY_SIZE(ar5416Bank2_9100), 2);
++              INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3_9100,
++                             ARRAY_SIZE(ar5416Bank3_9100), 3);
++              INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
++                             ARRAY_SIZE(ar5416Bank6_9100), 3);
++              INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
++                             ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
++              INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7_9100,
++                             ARRAY_SIZE(ar5416Bank7_9100), 2);
++              INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
++                             ARRAY_SIZE(ar5416Addac_9100), 2);
++      } else {
++              INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
++                             ARRAY_SIZE(ar5416Modes), 6);
++              INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
++                             ARRAY_SIZE(ar5416Common), 2);
++              INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
++                             ARRAY_SIZE(ar5416Bank0), 2);
++              INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
++                             ARRAY_SIZE(ar5416BB_RfGain), 3);
++              INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
++                             ARRAY_SIZE(ar5416Bank1), 2);
++              INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
++                             ARRAY_SIZE(ar5416Bank2), 2);
++              INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
++                             ARRAY_SIZE(ar5416Bank3), 3);
++              INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
++                             ARRAY_SIZE(ar5416Bank6), 3);
++              INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
++                             ARRAY_SIZE(ar5416Bank6TPC), 3);
++              INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
++                             ARRAY_SIZE(ar5416Bank7), 2);
++              INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
++                             ARRAY_SIZE(ar5416Addac), 2);
++      }
++}
++
++/* Support for Japan ch.14 (2484) spread */
++void ar9002_hw_cck_chan14_spread(struct ath_hw *ah)
++{
++      if (AR_SREV_9287_11_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniCckfirNormal,
++                     ar9287Common_normal_cck_fir_coeff_92871_1,
++                     ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_92871_1), 2);
++              INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
++                     ar9287Common_japan_2484_cck_fir_coeff_92871_1,
++                     ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_92871_1), 2);
++      }
++}
++
++static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
++{
++      u32 rxgain_type;
++
++      if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_17) {
++              rxgain_type = ah->eep_ops->get_eeprom(ah, EEP_RXGAIN_TYPE);
++
++              if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
++                      INIT_INI_ARRAY(&ah->iniModesRxGain,
++                      ar9280Modes_backoff_13db_rxgain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 6);
++              else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
++                      INIT_INI_ARRAY(&ah->iniModesRxGain,
++                      ar9280Modes_backoff_23db_rxgain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 6);
++              else
++                      INIT_INI_ARRAY(&ah->iniModesRxGain,
++                      ar9280Modes_original_rxgain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6);
++      } else {
++              INIT_INI_ARRAY(&ah->iniModesRxGain,
++                      ar9280Modes_original_rxgain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6);
++      }
++}
++
++static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah)
++{
++      u32 txgain_type;
++
++      if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_19) {
++              txgain_type = ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE);
++
++              if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
++                      INIT_INI_ARRAY(&ah->iniModesTxGain,
++                      ar9280Modes_high_power_tx_gain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 6);
++              else
++                      INIT_INI_ARRAY(&ah->iniModesTxGain,
++                      ar9280Modes_original_tx_gain_9280_2,
++                      ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6);
++      } else {
++              INIT_INI_ARRAY(&ah->iniModesTxGain,
++              ar9280Modes_original_tx_gain_9280_2,
++              ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6);
++      }
++}
++
++static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
++{
++      if (AR_SREV_9287_11_OR_LATER(ah))
++              INIT_INI_ARRAY(&ah->iniModesRxGain,
++              ar9287Modes_rx_gain_9287_1_1,
++              ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 6);
++      else if (AR_SREV_9287_10(ah))
++              INIT_INI_ARRAY(&ah->iniModesRxGain,
++              ar9287Modes_rx_gain_9287_1_0,
++              ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_0), 6);
++      else if (AR_SREV_9280_20(ah))
++              ar9280_20_hw_init_rxgain_ini(ah);
++
++      if (AR_SREV_9287_11_OR_LATER(ah)) {
++              INIT_INI_ARRAY(&ah->iniModesTxGain,
++              ar9287Modes_tx_gain_9287_1_1,
++              ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 6);
++      } else if (AR_SREV_9287_10(ah)) {
++              INIT_INI_ARRAY(&ah->iniModesTxGain,
++              ar9287Modes_tx_gain_9287_1_0,
++              ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_0), 6);
++      } else if (AR_SREV_9280_20(ah)) {
++              ar9280_20_hw_init_txgain_ini(ah);
++      } else if (AR_SREV_9285_12_OR_LATER(ah)) {
++              u32 txgain_type = ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE);
++
++              /* txgain table */
++              if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
++                      if (AR_SREV_9285E_20(ah)) {
++                              INIT_INI_ARRAY(&ah->iniModesTxGain,
++                              ar9285Modes_XE2_0_high_power,
++                              ARRAY_SIZE(
++                                ar9285Modes_XE2_0_high_power), 6);
++                      } else {
++                              INIT_INI_ARRAY(&ah->iniModesTxGain,
++                              ar9285Modes_high_power_tx_gain_9285_1_2,
++                              ARRAY_SIZE(
++                                ar9285Modes_high_power_tx_gain_9285_1_2), 6);
++                      }
++              } else {
++                      if (AR_SREV_9285E_20(ah)) {
++                              INIT_INI_ARRAY(&ah->iniModesTxGain,
++                              ar9285Modes_XE2_0_normal_power,
++                              ARRAY_SIZE(
++                                ar9285Modes_XE2_0_normal_power), 6);
++                      } else {
++                              INIT_INI_ARRAY(&ah->iniModesTxGain,
++                              ar9285Modes_original_tx_gain_9285_1_2,
++                              ARRAY_SIZE(
++                                ar9285Modes_original_tx_gain_9285_1_2), 6);
++                      }
++              }
++      }
++}
++
++/*
++ * Helper for ASPM support.
++ *
++ * Disable PLL when in L0s as well as receiver clock when in L1.
++ * This power saving option must be enabled through the SerDes.
++ *
++ * Programming the SerDes must go through the same 288 bit serial shift
++ * register as the other analog registers.  Hence the 9 writes.
++ */
++static void ar9002_hw_configpcipowersave(struct ath_hw *ah,
++                                       int restore,
++                                       int power_off)
++{
++      u8 i;
++      u32 val;
++
++      if (ah->is_pciexpress != true)
++              return;
++
++      /* Do not touch SerDes registers */
++      if (ah->config.pcie_powersave_enable == 2)
++              return;
++
++      /* Nothing to do on restore for 11N */
++      if (!restore) {
++              if (AR_SREV_9280_20_OR_LATER(ah)) {
++                      /*
++                       * AR9280 2.0 or later chips use SerDes values from the
++                       * initvals.h initialized depending on chipset during
++                       * __ath9k_hw_init()
++                       */
++                      for (i = 0; i < ah->iniPcieSerdes.ia_rows; i++) {
++                              REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0),
++                                        INI_RA(&ah->iniPcieSerdes, i, 1));
++                      }
++              } else if (AR_SREV_9280(ah) &&
++                         (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) {
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
++
++                      /* RX shut off when elecidle is asserted */
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0xa8000019);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x13160820);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980560);
++
++                      /* Shut off CLKREQ active in L1 */
++                      if (ah->config.pcie_clock_req)
++                              REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffc);
++                      else
++                              REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffd);
++
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x00043007);
++
++                      /* Load the new settings */
++                      REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
++
++              } else {
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
++
++                      /* RX shut off when elecidle is asserted */
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
++
++                      /*
++                       * Ignore ah->ah_config.pcie_clock_req setting for
++                       * pre-AR9280 11n
++                       */
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
++
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
++                      REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
++
++                      /* Load the new settings */
++                      REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
++              }
++
++              udelay(1000);
++
++              /* set bit 19 to allow forcing of pcie core into L1 state */
++              REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
++
++              /* Several PCIe massages to ensure proper behaviour */
++              if (ah->config.pcie_waen) {
++                      val = ah->config.pcie_waen;
++                      if (!power_off)
++                              val &= (~AR_WA_D3_L1_DISABLE);
++              } else {
++                      if (AR_SREV_9285(ah) || AR_SREV_9271(ah) ||
++                          AR_SREV_9287(ah)) {
++                              val = AR9285_WA_DEFAULT;
++                              if (!power_off)
++                                      val &= (~AR_WA_D3_L1_DISABLE);
++                      } else if (AR_SREV_9280(ah)) {
++                              /*
++                               * On AR9280 chips bit 22 of 0x4004 needs to be
++                               * set otherwise card may disappear.
++                               */
++                              val = AR9280_WA_DEFAULT;
++                              if (!power_off)
++                                      val &= (~AR_WA_D3_L1_DISABLE);
++                      } else
++                              val = AR_WA_DEFAULT;
++              }
++
++              REG_WRITE(ah, AR_WA, val);
++      }
++
++      if (power_off) {
++              /*
++               * Set PCIe workaround bits
++               * bit 14 in WA register (disable L1) should only
++               * be set when device enters D3 and be cleared
++               * when device comes back to D0.
++               */
++              if (ah->config.pcie_waen) {
++                      if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE)
++                              REG_SET_BIT(ah, AR_WA, AR_WA_D3_L1_DISABLE);
++              } else {
++                      if (((AR_SREV_9285(ah) || AR_SREV_9271(ah) ||
++                            AR_SREV_9287(ah)) &&
++                           (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE)) ||
++                          (AR_SREV_9280(ah) &&
++                           (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE))) {
++                              REG_SET_BIT(ah, AR_WA, AR_WA_D3_L1_DISABLE);
++                      }
++              }
++      }
++}
++
++static void ar9002_hw_init_eeprom_fix(struct ath_hw *ah)
++{
++      struct base_eep_header *pBase = &(ah->eeprom.def.baseEepHeader);
++      struct ath_common *common = ath9k_hw_common(ah);
++
++      ah->need_an_top2_fixup = (ah->hw_version.devid == AR9280_DEVID_PCI) &&
++                               !AR_SREV_9285(ah) && !AR_SREV_9271(ah) &&
++                               ((pBase->version & 0xff) > 0x0a) &&
++                               (pBase->pwdclkind == 0);
++
++      if (ah->need_an_top2_fixup)
++              ath_print(common, ATH_DBG_EEPROM,
++                        "needs fixup for AR_AN_TOP2 register\n");
++}
++
++
++static int ar9002_hw_get_radiorev(struct ath_hw *ah)
++{
++      u32 val;
++      int i;
++
++      REG_WRITE(ah, AR_PHY(0x36), 0x00007058);
++
++      for (i = 0; i < 8; i++)
++              REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
++      val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
++      val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
++
++      return ath9k_hw_reverse_bits(val, 8);
++}
++
++int ar9002_hw_rf_claim(struct ath_hw *ah)
++{
++      u32 val;
++
++      REG_WRITE(ah, AR_PHY(0), 0x00000007);
++
++      val = ar9002_hw_get_radiorev(ah);
++      switch (val & AR_RADIO_SREV_MAJOR) {
++      case 0:
++              val = AR_RAD5133_SREV_MAJOR;
++              break;
++      case AR_RAD5133_SREV_MAJOR:
++      case AR_RAD5122_SREV_MAJOR:
++      case AR_RAD2133_SREV_MAJOR:
++      case AR_RAD2122_SREV_MAJOR:
++              break;
++      default:
++              ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
++                        "Radio Chip Rev 0x%02X not supported\n",
++                        val & AR_RADIO_SREV_MAJOR);
++              return -EOPNOTSUPP;
++      }
++
++      ah->hw_version.analog5GhzRev = val;
++
++      return 0;
++}
++
++/*
++ * Enable ASYNC FIFO
++ *
++ * If Async FIFO is enabled, the following counters change as MAC now runs
++ * at 117 Mhz instead of 88/44MHz when async FIFO is disabled.
++ *
++ * The values below tested for ht40 2 chain.
++ * Overwrite the delay/timeouts initialized in process ini.
++ */
++void ar9002_hw_enable_async_fifo(struct ath_hw *ah)
++{
++      if (AR_SREV_9287_12_OR_LATER(ah)) {
++              REG_WRITE(ah, AR_D_GBL_IFS_SIFS,
++                        AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR);
++              REG_WRITE(ah, AR_D_GBL_IFS_SLOT,
++                        AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR);
++              REG_WRITE(ah, AR_D_GBL_IFS_EIFS,
++                        AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR);
++
++              REG_WRITE(ah, AR_TIME_OUT, AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR);
++              REG_WRITE(ah, AR_USEC, AR_USEC_ASYNC_FIFO_DUR);
++
++              REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER,
++                          AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768);
++              REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
++                            AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL);
++      }
++}
++
++/*
++ * We don't enable WEP aggregation on mac80211 but we keep this
++ * around for HAL unification purposes.
++ */
++void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah)
++{
++      if (AR_SREV_9287_12_OR_LATER(ah)) {
++              REG_SET_BIT(ah, AR_PCU_MISC_MODE2,
++                              AR_PCU_MISC_MODE2_ENABLE_AGGWEP);
++      }
++}
++
++/* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */
++void ar9002_hw_attach_ops(struct ath_hw *ah)
++{
++      struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
++      struct ath_hw_ops *ops = ath9k_hw_ops(ah);
++
++      priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
++      priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
++      priv_ops->macversion_supported = ar9002_hw_macversion_supported;
++
++      ops->config_pci_powersave = ar9002_hw_configpcipowersave;
++
++      ar5008_hw_attach_phy_ops(ah);
++      if (AR_SREV_9280_10_OR_LATER(ah))
++              ar9002_hw_attach_phy_ops(ah);
++
++      ar9002_hw_attach_calib_ops(ah);
++      ar9002_hw_attach_mac_ops(ah);
++      ar9002_hw_init_eeprom_fix(ah);
++}
+diff --git a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
+new file mode 100644
+index 0000000..a0711c7
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
+@@ -0,0 +1,7768 @@
++/*
++ * Copyright (c) 2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9002_10_H
++#define INITVALS_9002_10_H
++
++static const u32 ar9280Modes_9280[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000,
++       0x00014008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801080, 0x08400840,
++       0x06e006e0},
++      {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b,
++       0x0988004f},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0,
++       0x137216a0},
++      {0x00009848, 0x00028566, 0x00028566, 0x00028563, 0x00028563,
++       0x00028563},
++      {0x0000a848, 0x00028566, 0x00028566, 0x00028563, 0x00028563,
++       0x00028563},
++      {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2,
++       0x6d4000e2},
++      {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e,
++       0x7ec82d2e},
++      {0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e,
++       0x3139605e},
++      {0x00009860, 0x00049d18, 0x00049d18, 0x00049d20, 0x00049d20,
++       0x00049d18},
++      {0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x5ac64190, 0x5ac64190, 0x5ac64190, 0x5ac64190,
++       0x5ac64190},
++      {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881,
++       0x06903881},
++      {0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b,
++       0x00000016},
++      {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d,
++       0xd00a8a0d},
++      {0x00009944, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010,
++       0xdfbc1010},
++      {0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010,
++       0x00000010},
++      {0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010,
++       0x00000010},
++      {0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210,
++       0x00000210},
++      {0x0000c9b8, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a,
++       0x0000001a},
++      {0x0000c9bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00,
++       0x00000c00},
++      {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4,
++       0x05eea6d4},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c,
++       0x60f6532c},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x00009a00, 0x00008184, 0x00008184, 0x00000214, 0x00000214,
++       0x00000214},
++      {0x00009a04, 0x00008188, 0x00008188, 0x00000218, 0x00000218,
++       0x00000218},
++      {0x00009a08, 0x0000818c, 0x0000818c, 0x00000224, 0x00000224,
++       0x00000224},
++      {0x00009a0c, 0x00008190, 0x00008190, 0x00000228, 0x00000228,
++       0x00000228},
++      {0x00009a10, 0x00008194, 0x00008194, 0x0000022c, 0x0000022c,
++       0x0000022c},
++      {0x00009a14, 0x00008200, 0x00008200, 0x00000230, 0x00000230,
++       0x00000230},
++      {0x00009a18, 0x00008204, 0x00008204, 0x000002a4, 0x000002a4,
++       0x000002a4},
++      {0x00009a1c, 0x00008208, 0x00008208, 0x000002a8, 0x000002a8,
++       0x000002a8},
++      {0x00009a20, 0x0000820c, 0x0000820c, 0x000002ac, 0x000002ac,
++       0x000002ac},
++      {0x00009a24, 0x00008210, 0x00008210, 0x000002b0, 0x000002b0,
++       0x000002b0},
++      {0x00009a28, 0x00008214, 0x00008214, 0x000002b4, 0x000002b4,
++       0x000002b4},
++      {0x00009a2c, 0x00008280, 0x00008280, 0x000002b8, 0x000002b8,
++       0x000002b8},
++      {0x00009a30, 0x00008284, 0x00008284, 0x00000390, 0x00000390,
++       0x00000390},
++      {0x00009a34, 0x00008288, 0x00008288, 0x00000394, 0x00000394,
++       0x00000394},
++      {0x00009a38, 0x0000828c, 0x0000828c, 0x00000398, 0x00000398,
++       0x00000398},
++      {0x00009a3c, 0x00008290, 0x00008290, 0x00000334, 0x00000334,
++       0x00000334},
++      {0x00009a40, 0x00008300, 0x00008300, 0x00000338, 0x00000338,
++       0x00000338},
++      {0x00009a44, 0x00008304, 0x00008304, 0x000003ac, 0x000003ac,
++       0x000003ac},
++      {0x00009a48, 0x00008308, 0x00008308, 0x000003b0, 0x000003b0,
++       0x000003b0},
++      {0x00009a4c, 0x0000830c, 0x0000830c, 0x000003b4, 0x000003b4,
++       0x000003b4},
++      {0x00009a50, 0x00008310, 0x00008310, 0x000003b8, 0x000003b8,
++       0x000003b8},
++      {0x00009a54, 0x00008314, 0x00008314, 0x000003a5, 0x000003a5,
++       0x000003a5},
++      {0x00009a58, 0x00008380, 0x00008380, 0x000003a9, 0x000003a9,
++       0x000003a9},
++      {0x00009a5c, 0x00008384, 0x00008384, 0x000003ad, 0x000003ad,
++       0x000003ad},
++      {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194,
++       0x00008194},
++      {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0,
++       0x000081a0},
++      {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c,
++       0x0000820c},
++      {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8,
++       0x000081a8},
++      {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284,
++       0x00008284},
++      {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288,
++       0x00008288},
++      {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224,
++       0x00008224},
++      {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290,
++       0x00008290},
++      {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300,
++       0x00008300},
++      {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304,
++       0x00008304},
++      {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308,
++       0x00008308},
++      {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c,
++       0x0000830c},
++      {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380,
++       0x00008380},
++      {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384,
++       0x00008384},
++      {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700,
++       0x00008700},
++      {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704,
++       0x00008704},
++      {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708,
++       0x00008708},
++      {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c,
++       0x0000870c},
++      {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780,
++       0x00008780},
++      {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784,
++       0x00008784},
++      {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00,
++       0x00008b00},
++      {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04,
++       0x00008b04},
++      {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08,
++       0x00008b08},
++      {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c,
++       0x00008b0c},
++      {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80,
++       0x00008b80},
++      {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84,
++       0x00008b84},
++      {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88,
++       0x00008b88},
++      {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c,
++       0x00008b8c},
++      {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90,
++       0x00008b90},
++      {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80,
++       0x00008f80},
++      {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84,
++       0x00008f84},
++      {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88,
++       0x00008f88},
++      {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c,
++       0x00008f8c},
++      {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90,
++       0x00008f90},
++      {0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c,
++       0x0000930c},
++      {0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310,
++       0x00009310},
++      {0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384,
++       0x00009384},
++      {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388,
++       0x00009388},
++      {0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324,
++       0x00009324},
++      {0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704,
++       0x00009704},
++      {0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4,
++       0x000096a4},
++      {0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8,
++       0x000096a8},
++      {0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710,
++       0x00009710},
++      {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714,
++       0x00009714},
++      {0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720,
++       0x00009720},
++      {0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724,
++       0x00009724},
++      {0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728,
++       0x00009728},
++      {0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c,
++       0x0000972c},
++      {0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0,
++       0x000097a0},
++      {0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4,
++       0x000097a4},
++      {0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8,
++       0x000097a8},
++      {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0,
++       0x000097b0},
++      {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4,
++       0x000097b4},
++      {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8,
++       0x000097b8},
++      {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5,
++       0x000097a5},
++      {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9,
++       0x000097a9},
++      {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad,
++       0x000097ad},
++      {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1,
++       0x000097b1},
++      {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5,
++       0x000097b5},
++      {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9,
++       0x000097b9},
++      {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5,
++       0x000097c5},
++      {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9,
++       0x000097c9},
++      {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1,
++       0x000097d1},
++      {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5,
++       0x000097d5},
++      {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9,
++       0x000097d9},
++      {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6,
++       0x000097c6},
++      {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca,
++       0x000097ca},
++      {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce,
++       0x000097ce},
++      {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2,
++       0x000097d2},
++      {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6,
++       0x000097d6},
++      {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3,
++       0x000097c3},
++      {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7,
++       0x000097c7},
++      {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb,
++       0x000097cb},
++      {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf,
++       0x000097cf},
++      {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7,
++       0x000097d7},
++      {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444,
++       0x00000444},
++      {0x0000a208, 0x803e4788, 0x803e4788, 0x803e4788, 0x803e4788,
++       0x803e4788},
++      {0x0000a20c, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019,
++       0x000c6019},
++      {0x0000b20c, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019,
++       0x000c6019},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652,
++       0x0a1aa652},
++      {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002,
++       0x00003002},
++      {0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009,
++       0x00008009},
++      {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b,
++       0x0000b00b},
++      {0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012,
++       0x0000e012},
++      {0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048,
++       0x00012048},
++      {0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a,
++       0x0001604a},
++      {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211,
++       0x0001a211},
++      {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213,
++       0x0001e213},
++      {0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b,
++       0x0002121b},
++      {0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412,
++       0x00024412},
++      {0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414,
++       0x00028414},
++      {0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a,
++       0x0002b44a},
++      {0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649,
++       0x00030649},
++      {0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b,
++       0x0003364b},
++      {0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49,
++       0x00038a49},
++      {0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48,
++       0x0003be48},
++      {0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a,
++       0x0003ee4a},
++      {0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88,
++       0x00042e88},
++      {0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a,
++       0x00046e8a},
++      {0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9,
++       0x00049ec9},
++      {0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42,
++       0x0004bf42},
++      {0x0000784c, 0x0e4f048c, 0x0e4f048c, 0x0e4d048c, 0x0e4d048c,
++       0x0e4d048c},
++      {0x00007854, 0x12031828, 0x12031828, 0x12035828, 0x12035828,
++       0x12035828},
++      {0x00007870, 0x807ec400, 0x807ec400, 0x807ec000, 0x807ec000,
++       0x807ec000},
++      {0x0000788c, 0x00010000, 0x00010000, 0x00110000, 0x00110000,
++       0x00110000},
++};
++
++static const u32 ar9280Common_9280[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020015},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00004030, 0x00000002},
++      {0x0000403c, 0x00000002},
++      {0x00004024, 0x0000001f},
++      {0x00007010, 0x00000033},
++      {0x00007038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x40000000},
++      {0x00008054, 0x00000000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x00008070, 0x00000000},
++      {0x000080c0, 0x2a82301a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008120, 0x08f04800},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0x00000000},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c4, 0x00000000},
++      {0x000081d0, 0x00003210},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x00008300, 0x00000000},
++      {0x00008304, 0x00000000},
++      {0x00008308, 0x00000000},
++      {0x0000830c, 0x00000000},
++      {0x00008310, 0x00000000},
++      {0x00008314, 0x00000000},
++      {0x00008318, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000007},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00000000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x000107ff},
++      {0x00008344, 0x00000000},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xaf268e30},
++      {0x00009810, 0xfd14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x00009840, 0x206a01ae},
++      {0x0000984c, 0x0040233c},
++      {0x0000a84c, 0x0040233c},
++      {0x00009854, 0x00000044},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x04900000},
++      {0x0000a920, 0x04900000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009948, 0x9280c00a},
++      {0x0000994c, 0x00020028},
++      {0x00009954, 0xe250a51e},
++      {0x00009958, 0x3388ffff},
++      {0x00009940, 0x00781204},
++      {0x0000c95c, 0x004b6a8e},
++      {0x0000c968, 0x000003ce},
++      {0x00009970, 0x190fb514},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x201fff00},
++      {0x000099ac, 0x006f00c4},
++      {0x000099b0, 0x03051000},
++      {0x000099b4, 0x00000820},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000000},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x0cc80caa},
++      {0x000099fc, 0x00001042},
++      {0x0000a210, 0x4080a333},
++      {0x0000a214, 0x40206c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x01834061},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x000003b5},
++      {0x0000a22c, 0x23277200},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a23c, 0x13c889af},
++      {0x0000a240, 0x38490a20},
++      {0x0000a244, 0x00007bb6},
++      {0x0000a248, 0x0fff3ffc},
++      {0x0000a24c, 0x00000001},
++      {0x0000a250, 0x001da000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0cdbd380},
++      {0x0000a25c, 0x0f0f0f01},
++      {0x0000a260, 0xdfa91f01},
++      {0x0000a268, 0x00000000},
++      {0x0000a26c, 0x0ebae9c6},
++      {0x0000b26c, 0x0ebae9c6},
++      {0x0000d270, 0x00820820},
++      {0x0000a278, 0x1ce739ce},
++      {0x0000a27c, 0x050701ce},
++      {0x0000a358, 0x7999aa0f},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a388, 0x0c000000},
++      {0x0000a38c, 0x20202020},
++      {0x0000a390, 0x20202020},
++      {0x0000a394, 0x1ce739ce},
++      {0x0000a398, 0x000001ce},
++      {0x0000a39c, 0x00000001},
++      {0x0000a3a0, 0x00000000},
++      {0x0000a3a4, 0x00000000},
++      {0x0000a3a8, 0x00000000},
++      {0x0000a3ac, 0x00000000},
++      {0x0000a3b0, 0x00000000},
++      {0x0000a3b4, 0x00000000},
++      {0x0000a3b8, 0x00000000},
++      {0x0000a3bc, 0x00000000},
++      {0x0000a3c0, 0x00000000},
++      {0x0000a3c4, 0x00000000},
++      {0x0000a3c8, 0x00000246},
++      {0x0000a3cc, 0x20202020},
++      {0x0000a3d0, 0x20202020},
++      {0x0000a3d4, 0x20202020},
++      {0x0000a3dc, 0x1ce739ce},
++      {0x0000a3e0, 0x000001ce},
++      {0x0000a3e4, 0x00000000},
++      {0x0000a3e8, 0x18c43433},
++      {0x0000a3ec, 0x00f38081},
++      {0x00007800, 0x00040000},
++      {0x00007804, 0xdb005012},
++      {0x00007808, 0x04924914},
++      {0x0000780c, 0x21084210},
++      {0x00007810, 0x6d801300},
++      {0x00007814, 0x0019beff},
++      {0x00007818, 0x07e40000},
++      {0x0000781c, 0x00492000},
++      {0x00007820, 0x92492480},
++      {0x00007824, 0x00040000},
++      {0x00007828, 0xdb005012},
++      {0x0000782c, 0x04924914},
++      {0x00007830, 0x21084210},
++      {0x00007834, 0x6d801300},
++      {0x00007838, 0x0019beff},
++      {0x0000783c, 0x07e40000},
++      {0x00007840, 0x00492000},
++      {0x00007844, 0x92492480},
++      {0x00007848, 0x00120000},
++      {0x00007850, 0x54214514},
++      {0x00007858, 0x92592692},
++      {0x00007860, 0x52802000},
++      {0x00007864, 0x0a8e370e},
++      {0x00007868, 0xc0102850},
++      {0x0000786c, 0x812d4000},
++      {0x00007874, 0x001b6db0},
++      {0x00007878, 0x00376b63},
++      {0x0000787c, 0x06db6db6},
++      {0x00007880, 0x006d8000},
++      {0x00007884, 0xffeffffe},
++      {0x00007888, 0xffeffffe},
++      {0x00007890, 0x00060aeb},
++      {0x00007894, 0x5a108000},
++      {0x00007898, 0x2a850160},
++};
++
++/* XXX 9280 2 */
++static const u32 ar9280Modes_9280_2[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00,
++       0x06e006e0},
++      {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b,
++       0x0988004f},
++      {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810,
++       0x08f04810},
++      {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a,
++       0x0000320a},
++      {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440,
++       0x00006880},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e,
++       0x01000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009840, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e,
++       0x206a012e},
++      {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0,
++       0x037216a0},
++      {0x00009850, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2,
++       0x6c4000e2},
++      {0x00009858, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e,
++       0x7ec84d2e},
++      {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e,
++       0x31395d5e},
++      {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20,
++       0x00048d18},
++      {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0,
++       0x5ac640d0},
++      {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881,
++       0x06903881},
++      {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x0000000a, 0x00000014, 0x00000268, 0x0000000b,
++       0x00000016},
++      {0x00009924, 0xd00a8a0b, 0xd00a8a0b, 0xd00a8a0d, 0xd00a8a0d,
++       0xd00a8a0d},
++      {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010,
++       0xffbc1010},
++      {0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010,
++       0x00000010},
++      {0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010,
++       0x00000010},
++      {0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210,
++       0x00000210},
++      {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce,
++       0x000003ce},
++      {0x000099b8, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c,
++       0x0000001c},
++      {0x000099bc, 0x00000a00, 0x00000a00, 0x00000c00, 0x00000c00,
++       0x00000c00},
++      {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4,
++       0x05eea6d4},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329,
++       0x60f65329},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444,
++       0x00000444},
++      {0x0000a20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019,
++       0x0001f019},
++      {0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019,
++       0x0001f019},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a23c, 0x13c88000, 0x13c88000, 0x13c88001, 0x13c88000,
++       0x13c88000},
++      {0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000,
++       0x0004a000},
++      {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e,
++       0x7999aa0e},
++      {0x0000a388, 0x0c000000, 0x0c000000, 0x08000000, 0x0c000000,
++       0x0c000000},
++      {0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000,
++       0x5a508000},
++};
++
++static const u32 ar9280Common_9280_2[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020015},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00004030, 0x00000002},
++      {0x0000403c, 0x00000002},
++      {0x00004024, 0x0000001f},
++      {0x00004060, 0x00000000},
++      {0x00004064, 0x00000000},
++      {0x00007010, 0x00000033},
++      {0x00007034, 0x00000002},
++      {0x00007038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x40000000},
++      {0x00008054, 0x00000000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x00008070, 0x00000000},
++      {0x000080c0, 0x2a80001a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0xffffffff},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c0, 0x00000000},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008264, 0xa8a00010},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x0000829c, 0x00000000},
++      {0x00008300, 0x00000040},
++      {0x00008314, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000007},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00ff0000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x000107ff},
++      {0x00008344, 0x00481043},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xafa68e30},
++      {0x00009810, 0xfd14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x0000984c, 0x0040233c},
++      {0x0000a84c, 0x0040233c},
++      {0x00009854, 0x00000044},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x00009910, 0x01002310},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x04900000},
++      {0x0000a920, 0x04900000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009948, 0x9280c00a},
++      {0x0000994c, 0x00020028},
++      {0x00009954, 0x5f3ca3de},
++      {0x00009958, 0x2108ecff},
++      {0x00009940, 0x14750604},
++      {0x0000c95c, 0x004b6a8e},
++      {0x00009970, 0x190fb515},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x201fff00},
++      {0x000099ac, 0x006f0000},
++      {0x000099b0, 0x03051000},
++      {0x000099b4, 0x00000820},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000000},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x0cc80caa},
++      {0x000099f0, 0x00000000},
++      {0x000099fc, 0x00001042},
++      {0x0000a208, 0x803e4788},
++      {0x0000a210, 0x4080a333},
++      {0x0000a214, 0x40206c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x01834061},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x000003b5},
++      {0x0000a22c, 0x233f7180},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a240, 0x38490a20},
++      {0x0000a244, 0x00007bb6},
++      {0x0000a248, 0x0fff3ffc},
++      {0x0000a24c, 0x00000000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0cdbd380},
++      {0x0000a25c, 0x0f0f0f01},
++      {0x0000a260, 0xdfa91f01},
++      {0x0000a268, 0x00000000},
++      {0x0000a26c, 0x0e79e5c6},
++      {0x0000b26c, 0x0e79e5c6},
++      {0x0000d270, 0x00820820},
++      {0x0000a278, 0x1ce739ce},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a38c, 0x20202020},
++      {0x0000a390, 0x20202020},
++      {0x0000a394, 0x1ce739ce},
++      {0x0000a398, 0x000001ce},
++      {0x0000a39c, 0x00000001},
++      {0x0000a3a0, 0x00000000},
++      {0x0000a3a4, 0x00000000},
++      {0x0000a3a8, 0x00000000},
++      {0x0000a3ac, 0x00000000},
++      {0x0000a3b0, 0x00000000},
++      {0x0000a3b4, 0x00000000},
++      {0x0000a3b8, 0x00000000},
++      {0x0000a3bc, 0x00000000},
++      {0x0000a3c0, 0x00000000},
++      {0x0000a3c4, 0x00000000},
++      {0x0000a3c8, 0x00000246},
++      {0x0000a3cc, 0x20202020},
++      {0x0000a3d0, 0x20202020},
++      {0x0000a3d4, 0x20202020},
++      {0x0000a3dc, 0x1ce739ce},
++      {0x0000a3e0, 0x000001ce},
++      {0x0000a3e4, 0x00000000},
++      {0x0000a3e8, 0x18c43433},
++      {0x0000a3ec, 0x00f70081},
++      {0x00007800, 0x00040000},
++      {0x00007804, 0xdb005012},
++      {0x00007808, 0x04924914},
++      {0x0000780c, 0x21084210},
++      {0x00007810, 0x6d801300},
++      {0x00007818, 0x07e41000},
++      {0x00007824, 0x00040000},
++      {0x00007828, 0xdb005012},
++      {0x0000782c, 0x04924914},
++      {0x00007830, 0x21084210},
++      {0x00007834, 0x6d801300},
++      {0x0000783c, 0x07e40000},
++      {0x00007848, 0x00100000},
++      {0x0000784c, 0x773f0567},
++      {0x00007850, 0x54214514},
++      {0x00007854, 0x12035828},
++      {0x00007858, 0x9259269a},
++      {0x00007860, 0x52802000},
++      {0x00007864, 0x0a8e370e},
++      {0x00007868, 0xc0102850},
++      {0x0000786c, 0x812d4000},
++      {0x00007870, 0x807ec400},
++      {0x00007874, 0x001b6db0},
++      {0x00007878, 0x00376b63},
++      {0x0000787c, 0x06db6db6},
++      {0x00007880, 0x006d8000},
++      {0x00007884, 0xffeffffe},
++      {0x00007888, 0xffeffffe},
++      {0x0000788c, 0x00010000},
++      {0x00007890, 0x02060aeb},
++      {0x00007898, 0x2a850160},
++};
++
++static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
++      {0x00001030, 0x00000268, 0x000004d0},
++      {0x00001070, 0x0000018c, 0x00000318},
++      {0x000010b0, 0x00000fd0, 0x00001fa0},
++      {0x00008014, 0x044c044c, 0x08980898},
++      {0x0000801c, 0x148ec02b, 0x148ec057},
++      {0x00008318, 0x000044c0, 0x00008980},
++      {0x00009820, 0x02020200, 0x02020200},
++      {0x00009824, 0x01000f0f, 0x01000f0f},
++      {0x00009828, 0x0b020001, 0x0b020001},
++      {0x00009834, 0x00000f0f, 0x00000f0f},
++      {0x00009844, 0x03721821, 0x03721821},
++      {0x00009914, 0x00000898, 0x00001130},
++      {0x00009918, 0x0000000b, 0x00000016},
++};
++
++static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][6] = {
++      {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290,
++       0x00000290},
++      {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300,
++       0x00000300},
++      {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304,
++       0x00000304},
++      {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308,
++       0x00000308},
++      {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c,
++       0x0000030c},
++      {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000,
++       0x00008000},
++      {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004,
++       0x00008004},
++      {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008,
++       0x00008008},
++      {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c,
++       0x0000800c},
++      {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080,
++       0x00008080},
++      {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084,
++       0x00008084},
++      {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088,
++       0x00008088},
++      {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c,
++       0x0000808c},
++      {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100,
++       0x00008100},
++      {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104,
++       0x00008104},
++      {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108,
++       0x00008108},
++      {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c,
++       0x0000810c},
++      {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110,
++       0x00008110},
++      {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114,
++       0x00008114},
++      {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180,
++       0x00008180},
++      {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184,
++       0x00008184},
++      {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188,
++       0x00008188},
++      {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c,
++       0x0000818c},
++      {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190,
++       0x00008190},
++      {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194,
++       0x00008194},
++      {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0,
++       0x000081a0},
++      {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c,
++       0x0000820c},
++      {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8,
++       0x000081a8},
++      {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284,
++       0x00008284},
++      {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288,
++       0x00008288},
++      {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224,
++       0x00008224},
++      {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290,
++       0x00008290},
++      {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300,
++       0x00008300},
++      {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304,
++       0x00008304},
++      {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308,
++       0x00008308},
++      {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c,
++       0x0000830c},
++      {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380,
++       0x00008380},
++      {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384,
++       0x00008384},
++      {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700,
++       0x00008700},
++      {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704,
++       0x00008704},
++      {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708,
++       0x00008708},
++      {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c,
++       0x0000870c},
++      {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780,
++       0x00008780},
++      {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784,
++       0x00008784},
++      {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00,
++       0x00008b00},
++      {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04,
++       0x00008b04},
++      {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08,
++       0x00008b08},
++      {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c,
++       0x00008b0c},
++      {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b10, 0x00008b10,
++       0x00008b10},
++      {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b14, 0x00008b14,
++       0x00008b14},
++      {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b01, 0x00008b01,
++       0x00008b01},
++      {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b05, 0x00008b05,
++       0x00008b05},
++      {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b09, 0x00008b09,
++       0x00008b09},
++      {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008b0d, 0x00008b0d,
++       0x00008b0d},
++      {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008b11, 0x00008b11,
++       0x00008b11},
++      {0x00009adc, 0x0000b390, 0x0000b390, 0x00008b15, 0x00008b15,
++       0x00008b15},
++      {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008b02, 0x00008b02,
++       0x00008b02},
++      {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008b06, 0x00008b06,
++       0x00008b06},
++      {0x00009ae8, 0x0000b780, 0x0000b780, 0x00008b0a, 0x00008b0a,
++       0x00008b0a},
++      {0x00009aec, 0x0000b784, 0x0000b784, 0x00008b0e, 0x00008b0e,
++       0x00008b0e},
++      {0x00009af0, 0x0000b788, 0x0000b788, 0x00008b12, 0x00008b12,
++       0x00008b12},
++      {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00008b16, 0x00008b16,
++       0x00008b16},
++      {0x00009af8, 0x0000b790, 0x0000b790, 0x00008b03, 0x00008b03,
++       0x00008b03},
++      {0x00009afc, 0x0000b794, 0x0000b794, 0x00008b07, 0x00008b07,
++       0x00008b07},
++      {0x00009b00, 0x0000b798, 0x0000b798, 0x00008b0b, 0x00008b0b,
++       0x00008b0b},
++      {0x00009b04, 0x0000d784, 0x0000d784, 0x00008b0f, 0x00008b0f,
++       0x00008b0f},
++      {0x00009b08, 0x0000d788, 0x0000d788, 0x00008b13, 0x00008b13,
++       0x00008b13},
++      {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00008b17, 0x00008b17,
++       0x00008b17},
++      {0x00009b10, 0x0000d790, 0x0000d790, 0x00008b23, 0x00008b23,
++       0x00008b23},
++      {0x00009b14, 0x0000f780, 0x0000f780, 0x00008b27, 0x00008b27,
++       0x00008b27},
++      {0x00009b18, 0x0000f784, 0x0000f784, 0x00008b2b, 0x00008b2b,
++       0x00008b2b},
++      {0x00009b1c, 0x0000f788, 0x0000f788, 0x00008b2f, 0x00008b2f,
++       0x00008b2f},
++      {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00008b33, 0x00008b33,
++       0x00008b33},
++      {0x00009b24, 0x0000f790, 0x0000f790, 0x00008b37, 0x00008b37,
++       0x00008b37},
++      {0x00009b28, 0x0000f794, 0x0000f794, 0x00008b43, 0x00008b43,
++       0x00008b43},
++      {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x00008b47, 0x00008b47,
++       0x00008b47},
++      {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00008b4b, 0x00008b4b,
++       0x00008b4b},
++      {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00008b4f, 0x00008b4f,
++       0x00008b4f},
++      {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00008b53, 0x00008b53,
++       0x00008b53},
++      {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00008b57, 0x00008b57,
++       0x00008b57},
++      {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b98, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bac, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009be0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009be4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009be8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bec, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x00008b5b, 0x00008b5b,
++       0x00008b5b},
++      {0x00009848, 0x00001066, 0x00001066, 0x00001050, 0x00001050,
++       0x00001050},
++      {0x0000a848, 0x00001066, 0x00001066, 0x00001050, 0x00001050,
++       0x00001050},
++};
++
++static const u32 ar9280Modes_original_rxgain_9280_2[][6] = {
++      {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290,
++       0x00000290},
++      {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300,
++       0x00000300},
++      {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304,
++       0x00000304},
++      {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308,
++       0x00000308},
++      {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c,
++       0x0000030c},
++      {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000,
++       0x00008000},
++      {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004,
++       0x00008004},
++      {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008,
++       0x00008008},
++      {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c,
++       0x0000800c},
++      {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080,
++       0x00008080},
++      {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084,
++       0x00008084},
++      {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088,
++       0x00008088},
++      {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c,
++       0x0000808c},
++      {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100,
++       0x00008100},
++      {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104,
++       0x00008104},
++      {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108,
++       0x00008108},
++      {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c,
++       0x0000810c},
++      {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110,
++       0x00008110},
++      {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114,
++       0x00008114},
++      {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180,
++       0x00008180},
++      {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184,
++       0x00008184},
++      {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188,
++       0x00008188},
++      {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c,
++       0x0000818c},
++      {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190,
++       0x00008190},
++      {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194,
++       0x00008194},
++      {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0,
++       0x000081a0},
++      {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c,
++       0x0000820c},
++      {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8,
++       0x000081a8},
++      {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284,
++       0x00008284},
++      {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288,
++       0x00008288},
++      {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224,
++       0x00008224},
++      {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290,
++       0x00008290},
++      {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300,
++       0x00008300},
++      {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304,
++       0x00008304},
++      {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308,
++       0x00008308},
++      {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c,
++       0x0000830c},
++      {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380,
++       0x00008380},
++      {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384,
++       0x00008384},
++      {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700,
++       0x00008700},
++      {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704,
++       0x00008704},
++      {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708,
++       0x00008708},
++      {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c,
++       0x0000870c},
++      {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780,
++       0x00008780},
++      {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784,
++       0x00008784},
++      {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00,
++       0x00008b00},
++      {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04,
++       0x00008b04},
++      {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08,
++       0x00008b08},
++      {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c,
++       0x00008b0c},
++      {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80,
++       0x00008b80},
++      {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84,
++       0x00008b84},
++      {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88,
++       0x00008b88},
++      {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c,
++       0x00008b8c},
++      {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90,
++       0x00008b90},
++      {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80,
++       0x00008f80},
++      {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84,
++       0x00008f84},
++      {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88,
++       0x00008f88},
++      {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c,
++       0x00008f8c},
++      {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90,
++       0x00008f90},
++      {0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c,
++       0x0000930c},
++      {0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310,
++       0x00009310},
++      {0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384,
++       0x00009384},
++      {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388,
++       0x00009388},
++      {0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324,
++       0x00009324},
++      {0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704,
++       0x00009704},
++      {0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4,
++       0x000096a4},
++      {0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8,
++       0x000096a8},
++      {0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710,
++       0x00009710},
++      {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714,
++       0x00009714},
++      {0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720,
++       0x00009720},
++      {0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724,
++       0x00009724},
++      {0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728,
++       0x00009728},
++      {0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c,
++       0x0000972c},
++      {0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0,
++       0x000097a0},
++      {0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4,
++       0x000097a4},
++      {0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8,
++       0x000097a8},
++      {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0,
++       0x000097b0},
++      {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4,
++       0x000097b4},
++      {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8,
++       0x000097b8},
++      {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5,
++       0x000097a5},
++      {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9,
++       0x000097a9},
++      {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad,
++       0x000097ad},
++      {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1,
++       0x000097b1},
++      {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5,
++       0x000097b5},
++      {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9,
++       0x000097b9},
++      {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5,
++       0x000097c5},
++      {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9,
++       0x000097c9},
++      {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1,
++       0x000097d1},
++      {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5,
++       0x000097d5},
++      {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9,
++       0x000097d9},
++      {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6,
++       0x000097c6},
++      {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca,
++       0x000097ca},
++      {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce,
++       0x000097ce},
++      {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2,
++       0x000097d2},
++      {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6,
++       0x000097d6},
++      {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3,
++       0x000097c3},
++      {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7,
++       0x000097c7},
++      {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb,
++       0x000097cb},
++      {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf,
++       0x000097cf},
++      {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7,
++       0x000097d7},
++      {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db,
++       0x000097db},
++      {0x00009848, 0x00001066, 0x00001066, 0x00001063, 0x00001063,
++       0x00001063},
++      {0x0000a848, 0x00001066, 0x00001066, 0x00001063, 0x00001063,
++       0x00001063},
++};
++
++static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = {
++      {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290,
++       0x00000290},
++      {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300,
++       0x00000300},
++      {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304,
++       0x00000304},
++      {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308,
++       0x00000308},
++      {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c,
++       0x0000030c},
++      {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000,
++       0x00008000},
++      {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004,
++       0x00008004},
++      {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008,
++       0x00008008},
++      {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c,
++       0x0000800c},
++      {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080,
++       0x00008080},
++      {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084,
++       0x00008084},
++      {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088,
++       0x00008088},
++      {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c,
++       0x0000808c},
++      {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100,
++       0x00008100},
++      {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104,
++       0x00008104},
++      {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108,
++       0x00008108},
++      {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c,
++       0x0000810c},
++      {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110,
++       0x00008110},
++      {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114,
++       0x00008114},
++      {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180,
++       0x00008180},
++      {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184,
++       0x00008184},
++      {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188,
++       0x00008188},
++      {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c,
++       0x0000818c},
++      {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190,
++       0x00008190},
++      {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194,
++       0x00008194},
++      {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0,
++       0x000081a0},
++      {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c,
++       0x0000820c},
++      {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8,
++       0x000081a8},
++      {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284,
++       0x00008284},
++      {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288,
++       0x00008288},
++      {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224,
++       0x00008224},
++      {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290,
++       0x00008290},
++      {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300,
++       0x00008300},
++      {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304,
++       0x00008304},
++      {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308,
++       0x00008308},
++      {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c,
++       0x0000830c},
++      {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380,
++       0x00008380},
++      {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384,
++       0x00008384},
++      {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700,
++       0x00008700},
++      {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704,
++       0x00008704},
++      {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708,
++       0x00008708},
++      {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c,
++       0x0000870c},
++      {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780,
++       0x00008780},
++      {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784,
++       0x00008784},
++      {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00,
++       0x00008b00},
++      {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04,
++       0x00008b04},
++      {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08,
++       0x00008b08},
++      {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c,
++       0x00008b0c},
++      {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80,
++       0x00008b80},
++      {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84,
++       0x00008b84},
++      {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88,
++       0x00008b88},
++      {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c,
++       0x00008b8c},
++      {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90,
++       0x00008b90},
++      {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80,
++       0x00008f80},
++      {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84,
++       0x00008f84},
++      {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88,
++       0x00008f88},
++      {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c,
++       0x00008f8c},
++      {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90,
++       0x00008f90},
++      {0x00009ae8, 0x0000b780, 0x0000b780, 0x00009310, 0x00009310,
++       0x00009310},
++      {0x00009aec, 0x0000b784, 0x0000b784, 0x00009314, 0x00009314,
++       0x00009314},
++      {0x00009af0, 0x0000b788, 0x0000b788, 0x00009320, 0x00009320,
++       0x00009320},
++      {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009324, 0x00009324,
++       0x00009324},
++      {0x00009af8, 0x0000b790, 0x0000b790, 0x00009328, 0x00009328,
++       0x00009328},
++      {0x00009afc, 0x0000b794, 0x0000b794, 0x0000932c, 0x0000932c,
++       0x0000932c},
++      {0x00009b00, 0x0000b798, 0x0000b798, 0x00009330, 0x00009330,
++       0x00009330},
++      {0x00009b04, 0x0000d784, 0x0000d784, 0x00009334, 0x00009334,
++       0x00009334},
++      {0x00009b08, 0x0000d788, 0x0000d788, 0x00009321, 0x00009321,
++       0x00009321},
++      {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009325, 0x00009325,
++       0x00009325},
++      {0x00009b10, 0x0000d790, 0x0000d790, 0x00009329, 0x00009329,
++       0x00009329},
++      {0x00009b14, 0x0000f780, 0x0000f780, 0x0000932d, 0x0000932d,
++       0x0000932d},
++      {0x00009b18, 0x0000f784, 0x0000f784, 0x00009331, 0x00009331,
++       0x00009331},
++      {0x00009b1c, 0x0000f788, 0x0000f788, 0x00009335, 0x00009335,
++       0x00009335},
++      {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00009322, 0x00009322,
++       0x00009322},
++      {0x00009b24, 0x0000f790, 0x0000f790, 0x00009326, 0x00009326,
++       0x00009326},
++      {0x00009b28, 0x0000f794, 0x0000f794, 0x0000932a, 0x0000932a,
++       0x0000932a},
++      {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x0000932e, 0x0000932e,
++       0x0000932e},
++      {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00009332, 0x00009332,
++       0x00009332},
++      {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00009336, 0x00009336,
++       0x00009336},
++      {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00009323, 0x00009323,
++       0x00009323},
++      {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00009327, 0x00009327,
++       0x00009327},
++      {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x0000932b, 0x0000932b,
++       0x0000932b},
++      {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x0000932f, 0x0000932f,
++       0x0000932f},
++      {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00009333, 0x00009333,
++       0x00009333},
++      {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00009337, 0x00009337,
++       0x00009337},
++      {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00009343, 0x00009343,
++       0x00009343},
++      {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00009347, 0x00009347,
++       0x00009347},
++      {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x0000934b, 0x0000934b,
++       0x0000934b},
++      {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x0000934f, 0x0000934f,
++       0x0000934f},
++      {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00009353, 0x00009353,
++       0x00009353},
++      {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00009357, 0x00009357,
++       0x00009357},
++      {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b98, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bac, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009be0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009be4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009be8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bec, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b,
++       0x0000935b},
++      {0x00009848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a,
++       0x0000105a},
++      {0x0000a848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a,
++       0x0000105a},
++};
++
++static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
++      {0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652,
++       0x0a1aa652},
++      {0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce,
++       0x050739ce},
++      {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002,
++       0x00004002},
++      {0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008,
++       0x00007008},
++      {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000c010, 0x0000c010,
++       0x0000c010},
++      {0x0000a310, 0x0000e012, 0x0000e012, 0x00010012, 0x00010012,
++       0x00010012},
++      {0x0000a314, 0x00011014, 0x00011014, 0x00013014, 0x00013014,
++       0x00013014},
++      {0x0000a318, 0x0001504a, 0x0001504a, 0x0001820a, 0x0001820a,
++       0x0001820a},
++      {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001b211, 0x0001b211,
++       0x0001b211},
++      {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213,
++       0x0001e213},
++      {0x0000a324, 0x00021092, 0x00021092, 0x00022411, 0x00022411,
++       0x00022411},
++      {0x0000a328, 0x0002510a, 0x0002510a, 0x00025413, 0x00025413,
++       0x00025413},
++      {0x0000a32c, 0x0002910c, 0x0002910c, 0x00029811, 0x00029811,
++       0x00029811},
++      {0x0000a330, 0x0002c18b, 0x0002c18b, 0x0002c813, 0x0002c813,
++       0x0002c813},
++      {0x0000a334, 0x0002f1cc, 0x0002f1cc, 0x00030a14, 0x00030a14,
++       0x00030a14},
++      {0x0000a338, 0x000321eb, 0x000321eb, 0x00035a50, 0x00035a50,
++       0x00035a50},
++      {0x0000a33c, 0x000341ec, 0x000341ec, 0x00039c4c, 0x00039c4c,
++       0x00039c4c},
++      {0x0000a340, 0x000341ec, 0x000341ec, 0x0003de8a, 0x0003de8a,
++       0x0003de8a},
++      {0x0000a344, 0x000341ec, 0x000341ec, 0x00042e92, 0x00042e92,
++       0x00042e92},
++      {0x0000a348, 0x000341ec, 0x000341ec, 0x00046ed2, 0x00046ed2,
++       0x00046ed2},
++      {0x0000a34c, 0x000341ec, 0x000341ec, 0x0004bed5, 0x0004bed5,
++       0x0004bed5},
++      {0x0000a350, 0x000341ec, 0x000341ec, 0x0004ff54, 0x0004ff54,
++       0x0004ff54},
++      {0x0000a354, 0x000341ec, 0x000341ec, 0x00055fd5, 0x00055fd5,
++       0x00055fd5},
++      {0x00007814, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff,
++       0x00198eff},
++      {0x00007838, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff,
++       0x00198eff},
++      {0x0000781c, 0x00172000, 0x00172000, 0x00172000, 0x00172000,
++       0x00172000},
++      {0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000,
++       0x00172000},
++      {0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480,
++       0xf258a480},
++      {0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480,
++       0xf258a480},
++};
++
++static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
++      {0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652,
++       0x0a1aa652},
++      {0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce,
++       0x050701ce},
++      {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002,
++       0x00003002},
++      {0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009,
++       0x00008009},
++      {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b,
++       0x0000b00b},
++      {0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012,
++       0x0000e012},
++      {0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048,
++       0x00012048},
++      {0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a,
++       0x0001604a},
++      {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211,
++       0x0001a211},
++      {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213,
++       0x0001e213},
++      {0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b,
++       0x0002121b},
++      {0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412,
++       0x00024412},
++      {0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414,
++       0x00028414},
++      {0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a,
++       0x0002b44a},
++      {0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649,
++       0x00030649},
++      {0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b,
++       0x0003364b},
++      {0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49,
++       0x00038a49},
++      {0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48,
++       0x0003be48},
++      {0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a,
++       0x0003ee4a},
++      {0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88,
++       0x00042e88},
++      {0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a,
++       0x00046e8a},
++      {0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9,
++       0x00049ec9},
++      {0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42,
++       0x0004bf42},
++      {0x00007814, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff,
++       0x0019beff},
++      {0x00007838, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff,
++       0x0019beff},
++      {0x0000781c, 0x00392000, 0x00392000, 0x00392000, 0x00392000,
++       0x00392000},
++      {0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000,
++       0x00392000},
++      {0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480,
++       0x92592480},
++      {0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480,
++       0x92592480},
++};
++
++static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
++      {0x00004040, 0x9248fd00},
++      {0x00004040, 0x24924924},
++      {0x00004040, 0xa8000019},
++      {0x00004040, 0x13160820},
++      {0x00004040, 0xe5980560},
++      {0x00004040, 0xc01dcffc},
++      {0x00004040, 0x1aaabe41},
++      {0x00004040, 0xbe105554},
++      {0x00004040, 0x00043007},
++      {0x00004044, 0x00000000},
++};
++
++static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
++      {0x00004040, 0x9248fd00},
++      {0x00004040, 0x24924924},
++      {0x00004040, 0xa8000019},
++      {0x00004040, 0x13160820},
++      {0x00004040, 0xe5980560},
++      {0x00004040, 0xc01dcffd},
++      {0x00004040, 0x1aaabe41},
++      {0x00004040, 0xbe105554},
++      {0x00004040, 0x00043007},
++      {0x00004044, 0x00000000},
++};
++
++/* AR9285 Revsion 10*/
++static const u_int32_t ar9285Modes_9285[][6] = {
++      {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
++       0x000001e0},
++      {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
++       0x000001e0},
++      {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38,
++       0x00001180},
++      {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000008},
++      {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00,
++       0x06e006e0},
++      {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b,
++       0x0988004f},
++      {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440,
++       0x00006880},
++      {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300,
++       0x00000303},
++      {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200,
++       0x02020200},
++      {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001,
++       0x0a020001},
++      {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e,
++       0x00000e0e},
++      {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007,
++       0x00000007},
++      {0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e,
++       0x206a012e},
++      {0x00009844, 0x0372161e, 0x0372161e, 0x03720020, 0x03720020,
++       0x037216a0},
++      {0x00009848, 0x00001066, 0x00001066, 0x0000004e, 0x0000004e,
++       0x00001059},
++      {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2,
++       0x6d4000e2},
++      {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e,
++       0x7ec84d2e},
++      {0x0000985c, 0x3139605e, 0x3139605e, 0x3136605e, 0x3136605e,
++       0x3139605e},
++      {0x00009860, 0x00058d18, 0x00058d18, 0x00058d20, 0x00058d20,
++       0x00058d18},
++      {0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00,
++       0x0001ce00},
++      {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0,
++       0x5ac640d0},
++      {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881,
++       0x06903881},
++      {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898,
++       0x000007d0},
++      {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b,
++       0x00000016},
++      {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d,
++       0xd00a800d},
++      {0x00009944, 0xdfbc1010, 0xdfbc1010, 0xdfbc1020, 0xdfbc1020,
++       0xdfbc1010},
++      {0x00009960, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x00009964, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099b8, 0x00cf4d1c, 0x00cf4d1c, 0x00cf4d1c, 0x00cf4d1c,
++       0x00cf4d1c},
++      {0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00,
++       0x00000c00},
++      {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4,
++       0x05eea6d4},
++      {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77,
++       0x06336f77},
++      {0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329,
++       0x60f65329},
++      {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8,
++       0x08f186c8},
++      {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384,
++       0x00046384},
++      {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x00009a00, 0x00000000, 0x00000000, 0x00068084, 0x00068084,
++       0x00000000},
++      {0x00009a04, 0x00000000, 0x00000000, 0x00068088, 0x00068088,
++       0x00000000},
++      {0x00009a08, 0x00000000, 0x00000000, 0x0006808c, 0x0006808c,
++       0x00000000},
++      {0x00009a0c, 0x00000000, 0x00000000, 0x00068100, 0x00068100,
++       0x00000000},
++      {0x00009a10, 0x00000000, 0x00000000, 0x00068104, 0x00068104,
++       0x00000000},
++      {0x00009a14, 0x00000000, 0x00000000, 0x00068108, 0x00068108,
++       0x00000000},
++      {0x00009a18, 0x00000000, 0x00000000, 0x0006810c, 0x0006810c,
++       0x00000000},
++      {0x00009a1c, 0x00000000, 0x00000000, 0x00068110, 0x00068110,
++       0x00000000},
++      {0x00009a20, 0x00000000, 0x00000000, 0x00068114, 0x00068114,
++       0x00000000},
++      {0x00009a24, 0x00000000, 0x00000000, 0x00068180, 0x00068180,
++       0x00000000},
++      {0x00009a28, 0x00000000, 0x00000000, 0x00068184, 0x00068184,
++       0x00000000},
++      {0x00009a2c, 0x00000000, 0x00000000, 0x00068188, 0x00068188,
++       0x00000000},
++      {0x00009a30, 0x00000000, 0x00000000, 0x0006818c, 0x0006818c,
++       0x00000000},
++      {0x00009a34, 0x00000000, 0x00000000, 0x00068190, 0x00068190,
++       0x00000000},
++      {0x00009a38, 0x00000000, 0x00000000, 0x00068194, 0x00068194,
++       0x00000000},
++      {0x00009a3c, 0x00000000, 0x00000000, 0x000681a0, 0x000681a0,
++       0x00000000},
++      {0x00009a40, 0x00000000, 0x00000000, 0x0006820c, 0x0006820c,
++       0x00000000},
++      {0x00009a44, 0x00000000, 0x00000000, 0x000681a8, 0x000681a8,
++       0x00000000},
++      {0x00009a48, 0x00000000, 0x00000000, 0x00068284, 0x00068284,
++       0x00000000},
++      {0x00009a4c, 0x00000000, 0x00000000, 0x00068288, 0x00068288,
++       0x00000000},
++      {0x00009a50, 0x00000000, 0x00000000, 0x00068220, 0x00068220,
++       0x00000000},
++      {0x00009a54, 0x00000000, 0x00000000, 0x00068290, 0x00068290,
++       0x00000000},
++      {0x00009a58, 0x00000000, 0x00000000, 0x00068300, 0x00068300,
++       0x00000000},
++      {0x00009a5c, 0x00000000, 0x00000000, 0x00068304, 0x00068304,
++       0x00000000},
++      {0x00009a60, 0x00000000, 0x00000000, 0x00068308, 0x00068308,
++       0x00000000},
++      {0x00009a64, 0x00000000, 0x00000000, 0x0006830c, 0x0006830c,
++       0x00000000},
++      {0x00009a68, 0x00000000, 0x00000000, 0x00068380, 0x00068380,
++       0x00000000},
++      {0x00009a6c, 0x00000000, 0x00000000, 0x00068384, 0x00068384,
++       0x00000000},
++      {0x00009a70, 0x00000000, 0x00000000, 0x00068700, 0x00068700,
++       0x00000000},
++      {0x00009a74, 0x00000000, 0x00000000, 0x00068704, 0x00068704,
++       0x00000000},
++      {0x00009a78, 0x00000000, 0x00000000, 0x00068708, 0x00068708,
++       0x00000000},
++      {0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c,
++       0x00000000},
++      {0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780,
++       0x00000000},
++      {0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784,
++       0x00000000},
++      {0x00009a88, 0x00000000, 0x00000000, 0x00068b04, 0x00068b04,
++       0x00000000},
++      {0x00009a8c, 0x00000000, 0x00000000, 0x00068b08, 0x00068b08,
++       0x00000000},
++      {0x00009a90, 0x00000000, 0x00000000, 0x00068b08, 0x00068b08,
++       0x00000000},
++      {0x00009a94, 0x00000000, 0x00000000, 0x00068b0c, 0x00068b0c,
++       0x00000000},
++      {0x00009a98, 0x00000000, 0x00000000, 0x00068b80, 0x00068b80,
++       0x00000000},
++      {0x00009a9c, 0x00000000, 0x00000000, 0x00068b84, 0x00068b84,
++       0x00000000},
++      {0x00009aa0, 0x00000000, 0x00000000, 0x00068b88, 0x00068b88,
++       0x00000000},
++      {0x00009aa4, 0x00000000, 0x00000000, 0x00068b8c, 0x00068b8c,
++       0x00000000},
++      {0x00009aa8, 0x00000000, 0x00000000, 0x000b8b90, 0x000b8b90,
++       0x00000000},
++      {0x00009aac, 0x00000000, 0x00000000, 0x000b8f80, 0x000b8f80,
++       0x00000000},
++      {0x00009ab0, 0x00000000, 0x00000000, 0x000b8f84, 0x000b8f84,
++       0x00000000},
++      {0x00009ab4, 0x00000000, 0x00000000, 0x000b8f88, 0x000b8f88,
++       0x00000000},
++      {0x00009ab8, 0x00000000, 0x00000000, 0x000b8f8c, 0x000b8f8c,
++       0x00000000},
++      {0x00009abc, 0x00000000, 0x00000000, 0x000b8f90, 0x000b8f90,
++       0x00000000},
++      {0x00009ac0, 0x00000000, 0x00000000, 0x000bb30c, 0x000bb30c,
++       0x00000000},
++      {0x00009ac4, 0x00000000, 0x00000000, 0x000bb310, 0x000bb310,
++       0x00000000},
++      {0x00009ac8, 0x00000000, 0x00000000, 0x000bb384, 0x000bb384,
++       0x00000000},
++      {0x00009acc, 0x00000000, 0x00000000, 0x000bb388, 0x000bb388,
++       0x00000000},
++      {0x00009ad0, 0x00000000, 0x00000000, 0x000bb324, 0x000bb324,
++       0x00000000},
++      {0x00009ad4, 0x00000000, 0x00000000, 0x000bb704, 0x000bb704,
++       0x00000000},
++      {0x00009ad8, 0x00000000, 0x00000000, 0x000f96a4, 0x000f96a4,
++       0x00000000},
++      {0x00009adc, 0x00000000, 0x00000000, 0x000f96a8, 0x000f96a8,
++       0x00000000},
++      {0x00009ae0, 0x00000000, 0x00000000, 0x000f9710, 0x000f9710,
++       0x00000000},
++      {0x00009ae4, 0x00000000, 0x00000000, 0x000f9714, 0x000f9714,
++       0x00000000},
++      {0x00009ae8, 0x00000000, 0x00000000, 0x000f9720, 0x000f9720,
++       0x00000000},
++      {0x00009aec, 0x00000000, 0x00000000, 0x000f9724, 0x000f9724,
++       0x00000000},
++      {0x00009af0, 0x00000000, 0x00000000, 0x000f9728, 0x000f9728,
++       0x00000000},
++      {0x00009af4, 0x00000000, 0x00000000, 0x000f972c, 0x000f972c,
++       0x00000000},
++      {0x00009af8, 0x00000000, 0x00000000, 0x000f97a0, 0x000f97a0,
++       0x00000000},
++      {0x00009afc, 0x00000000, 0x00000000, 0x000f97a4, 0x000f97a4,
++       0x00000000},
++      {0x00009b00, 0x00000000, 0x00000000, 0x000fb7a8, 0x000fb7a8,
++       0x00000000},
++      {0x00009b04, 0x00000000, 0x00000000, 0x000fb7b0, 0x000fb7b0,
++       0x00000000},
++      {0x00009b08, 0x00000000, 0x00000000, 0x000fb7b4, 0x000fb7b4,
++       0x00000000},
++      {0x00009b0c, 0x00000000, 0x00000000, 0x000fb7b8, 0x000fb7b8,
++       0x00000000},
++      {0x00009b10, 0x00000000, 0x00000000, 0x000fb7a5, 0x000fb7a5,
++       0x00000000},
++      {0x00009b14, 0x00000000, 0x00000000, 0x000fb7a9, 0x000fb7a9,
++       0x00000000},
++      {0x00009b18, 0x00000000, 0x00000000, 0x000fb7ad, 0x000fb7ad,
++       0x00000000},
++      {0x00009b1c, 0x00000000, 0x00000000, 0x000fb7b1, 0x000fb7b1,
++       0x00000000},
++      {0x00009b20, 0x00000000, 0x00000000, 0x000fb7b5, 0x000fb7b5,
++       0x00000000},
++      {0x00009b24, 0x00000000, 0x00000000, 0x000fb7b9, 0x000fb7b9,
++       0x00000000},
++      {0x00009b28, 0x00000000, 0x00000000, 0x000fb7c5, 0x000fb7c5,
++       0x00000000},
++      {0x00009b2c, 0x00000000, 0x00000000, 0x000fb7c9, 0x000fb7c9,
++       0x00000000},
++      {0x00009b30, 0x00000000, 0x00000000, 0x000fb7d1, 0x000fb7d1,
++       0x00000000},
++      {0x00009b34, 0x00000000, 0x00000000, 0x000fb7d5, 0x000fb7d5,
++       0x00000000},
++      {0x00009b38, 0x00000000, 0x00000000, 0x000fb7d9, 0x000fb7d9,
++       0x00000000},
++      {0x00009b3c, 0x00000000, 0x00000000, 0x000fb7c6, 0x000fb7c6,
++       0x00000000},
++      {0x00009b40, 0x00000000, 0x00000000, 0x000fb7ca, 0x000fb7ca,
++       0x00000000},
++      {0x00009b44, 0x00000000, 0x00000000, 0x000fb7ce, 0x000fb7ce,
++       0x00000000},
++      {0x00009b48, 0x00000000, 0x00000000, 0x000fb7d2, 0x000fb7d2,
++       0x00000000},
++      {0x00009b4c, 0x00000000, 0x00000000, 0x000fb7d6, 0x000fb7d6,
++       0x00000000},
++      {0x00009b50, 0x00000000, 0x00000000, 0x000fb7c3, 0x000fb7c3,
++       0x00000000},
++      {0x00009b54, 0x00000000, 0x00000000, 0x000fb7c7, 0x000fb7c7,
++       0x00000000},
++      {0x00009b58, 0x00000000, 0x00000000, 0x000fb7cb, 0x000fb7cb,
++       0x00000000},
++      {0x00009b5c, 0x00000000, 0x00000000, 0x000fb7cf, 0x000fb7cf,
++       0x00000000},
++      {0x00009b60, 0x00000000, 0x00000000, 0x000fb7d7, 0x000fb7d7,
++       0x00000000},
++      {0x00009b64, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b68, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b6c, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b70, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b74, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b78, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b7c, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b80, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b84, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b88, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b8c, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b90, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b94, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b98, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009b9c, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009ba0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009ba4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009ba8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bac, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bb0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bb4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bb8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bbc, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bc0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bc4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bc8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bcc, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bd0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bd4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bd8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bdc, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009be0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009be4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009be8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bec, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bf0, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bf4, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bf8, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x00009bfc, 0x00000000, 0x00000000, 0x000fb7db, 0x000fb7db,
++       0x00000000},
++      {0x0000aa00, 0x00000000, 0x00000000, 0x0006801c, 0x0006801c,
++       0x00000000},
++      {0x0000aa04, 0x00000000, 0x00000000, 0x00068080, 0x00068080,
++       0x00000000},
++      {0x0000aa08, 0x00000000, 0x00000000, 0x00068084, 0x00068084,
++       0x00000000},
++      {0x0000aa0c, 0x00000000, 0x00000000, 0x00068088, 0x00068088,
++       0x00000000},
++      {0x0000aa10, 0x00000000, 0x00000000, 0x0006808c, 0x0006808c,
++       0x00000000},
++      {0x0000aa14, 0x00000000, 0x00000000, 0x00068100, 0x00068100,
++       0x00000000},
++      {0x0000aa18, 0x00000000, 0x00000000, 0x00068104, 0x00068104,
++       0x00000000},
++      {0x0000aa1c, 0x00000000, 0x00000000, 0x00068108, 0x00068108,
++       0x00000000},
++      {0x0000aa20, 0x00000000, 0x00000000, 0x0006810c, 0x0006810c,
++       0x00000000},
++      {0x0000aa24, 0x00000000, 0x00000000, 0x00068110, 0x00068110,
++       0x00000000},
++      {0x0000aa28, 0x00000000, 0x00000000, 0x00068110, 0x00068110,
++       0x00000000},
++      {0x0000aa2c, 0x00000000, 0x00000000, 0x00068180, 0x00068180,
++       0x00000000},
++      {0x0000aa30, 0x00000000, 0x00000000, 0x00068184, 0x00068184,
++       0x00000000},
++      {0x0000aa34, 0x00000000, 0x00000000, 0x00068188, 0x00068188,
++       0x00000000},
++      {0x0000aa38, 0x00000000, 0x00000000, 0x0006818c, 0x0006818c,
++       0x00000000},
++      {0x0000aa3c, 0x00000000, 0x00000000, 0x00068190, 0x00068190,
++       0x00000000},
++      {0x0000aa40, 0x00000000, 0x00000000, 0x00068194, 0x00068194,
++       0x00000000},
++      {0x0000aa44, 0x00000000, 0x00000000, 0x000681a0, 0x000681a0,
++       0x00000000},
++      {0x0000aa48, 0x00000000, 0x00000000, 0x0006820c, 0x0006820c,
++       0x00000000},
++      {0x0000aa4c, 0x00000000, 0x00000000, 0x000681a8, 0x000681a8,
++       0x00000000},
++      {0x0000aa50, 0x00000000, 0x00000000, 0x000681ac, 0x000681ac,
++       0x00000000},
++      {0x0000aa54, 0x00000000, 0x00000000, 0x0006821c, 0x0006821c,
++       0x00000000},
++      {0x0000aa58, 0x00000000, 0x00000000, 0x00068224, 0x00068224,
++       0x00000000},
++      {0x0000aa5c, 0x00000000, 0x00000000, 0x00068290, 0x00068290,
++       0x00000000},
++      {0x0000aa60, 0x00000000, 0x00000000, 0x00068300, 0x00068300,
++       0x00000000},
++      {0x0000aa64, 0x00000000, 0x00000000, 0x00068308, 0x00068308,
++       0x00000000},
++      {0x0000aa68, 0x00000000, 0x00000000, 0x0006830c, 0x0006830c,
++       0x00000000},
++      {0x0000aa6c, 0x00000000, 0x00000000, 0x00068310, 0x00068310,
++       0x00000000},
++      {0x0000aa70, 0x00000000, 0x00000000, 0x00068788, 0x00068788,
++       0x00000000},
++      {0x0000aa74, 0x00000000, 0x00000000, 0x0006878c, 0x0006878c,
++       0x00000000},
++      {0x0000aa78, 0x00000000, 0x00000000, 0x00068790, 0x00068790,
++       0x00000000},
++      {0x0000aa7c, 0x00000000, 0x00000000, 0x00068794, 0x00068794,
++       0x00000000},
++      {0x0000aa80, 0x00000000, 0x00000000, 0x00068798, 0x00068798,
++       0x00000000},
++      {0x0000aa84, 0x00000000, 0x00000000, 0x0006879c, 0x0006879c,
++       0x00000000},
++      {0x0000aa88, 0x00000000, 0x00000000, 0x00068b89, 0x00068b89,
++       0x00000000},
++      {0x0000aa8c, 0x00000000, 0x00000000, 0x00068b8d, 0x00068b8d,
++       0x00000000},
++      {0x0000aa90, 0x00000000, 0x00000000, 0x00068b91, 0x00068b91,
++       0x00000000},
++      {0x0000aa94, 0x00000000, 0x00000000, 0x00068b95, 0x00068b95,
++       0x00000000},
++      {0x0000aa98, 0x00000000, 0x00000000, 0x00068b99, 0x00068b99,
++       0x00000000},
++      {0x0000aa9c, 0x00000000, 0x00000000, 0x00068ba5, 0x00068ba5,
++       0x00000000},
++      {0x0000aaa0, 0x00000000, 0x00000000, 0x00068ba9, 0x00068ba9,
++       0x00000000},
++      {0x0000aaa4, 0x00000000, 0x00000000, 0x00068bad, 0x00068bad,
++       0x00000000},
++      {0x0000aaa8, 0x00000000, 0x00000000, 0x000b8b0c, 0x000b8b0c,
++       0x00000000},
++      {0x0000aaac, 0x00000000, 0x00000000, 0x000b8f10, 0x000b8f10,
++       0x00000000},
++      {0x0000aab0, 0x00000000, 0x00000000, 0x000b8f14, 0x000b8f14,
++       0x00000000},
++      {0x0000aab4, 0x00000000, 0x00000000, 0x000b8f84, 0x000b8f84,
++       0x00000000},
++      {0x0000aab8, 0x00000000, 0x00000000, 0x000b8f84, 0x000b8f84,
++       0x00000000},
++      {0x0000aabc, 0x00000000, 0x00000000, 0x000b8f88, 0x000b8f88,
++       0x00000000},
++      {0x0000aac0, 0x00000000, 0x00000000, 0x000bb380, 0x000bb380,
++       0x00000000},
++      {0x0000aac4, 0x00000000, 0x00000000, 0x000bb384, 0x000bb384,
++       0x00000000},
++      {0x0000aac8, 0x00000000, 0x00000000, 0x000bb388, 0x000bb388,
++       0x00000000},
++      {0x0000aacc, 0x00000000, 0x00000000, 0x000bb38c, 0x000bb38c,
++       0x00000000},
++      {0x0000aad0, 0x00000000, 0x00000000, 0x000bb394, 0x000bb394,
++       0x00000000},
++      {0x0000aad4, 0x00000000, 0x00000000, 0x000bb798, 0x000bb798,
++       0x00000000},
++      {0x0000aad8, 0x00000000, 0x00000000, 0x000f970c, 0x000f970c,
++       0x00000000},
++      {0x0000aadc, 0x00000000, 0x00000000, 0x000f9710, 0x000f9710,
++       0x00000000},
++      {0x0000aae0, 0x00000000, 0x00000000, 0x000f9714, 0x000f9714,
++       0x00000000},
++      {0x0000aae4, 0x00000000, 0x00000000, 0x000f9718, 0x000f9718,
++       0x00000000},
++      {0x0000aae8, 0x00000000, 0x00000000, 0x000f9705, 0x000f9705,
++       0x00000000},
++      {0x0000aaec, 0x00000000, 0x00000000, 0x000f9709, 0x000f9709,
++       0x00000000},
++      {0x0000aaf0, 0x00000000, 0x00000000, 0x000f970d, 0x000f970d,
++       0x00000000},
++      {0x0000aaf4, 0x00000000, 0x00000000, 0x000f9711, 0x000f9711,
++       0x00000000},
++      {0x0000aaf8, 0x00000000, 0x00000000, 0x000f9715, 0x000f9715,
++       0x00000000},
++      {0x0000aafc, 0x00000000, 0x00000000, 0x000f9719, 0x000f9719,
++       0x00000000},
++      {0x0000ab00, 0x00000000, 0x00000000, 0x000fb7a4, 0x000fb7a4,
++       0x00000000},
++      {0x0000ab04, 0x00000000, 0x00000000, 0x000fb7a8, 0x000fb7a8,
++       0x00000000},
++      {0x0000ab08, 0x00000000, 0x00000000, 0x000fb7ac, 0x000fb7ac,
++       0x00000000},
++      {0x0000ab0c, 0x00000000, 0x00000000, 0x000fb7ac, 0x000fb7ac,
++       0x00000000},
++      {0x0000ab10, 0x00000000, 0x00000000, 0x000fb7b0, 0x000fb7b0,
++       0x00000000},
++      {0x0000ab14, 0x00000000, 0x00000000, 0x000fb7b8, 0x000fb7b8,
++       0x00000000},
++      {0x0000ab18, 0x00000000, 0x00000000, 0x000fb7bc, 0x000fb7bc,
++       0x00000000},
++      {0x0000ab1c, 0x00000000, 0x00000000, 0x000fb7a1, 0x000fb7a1,
++       0x00000000},
++      {0x0000ab20, 0x00000000, 0x00000000, 0x000fb7a5, 0x000fb7a5,
++       0x00000000},
++      {0x0000ab24, 0x00000000, 0x00000000, 0x000fb7a9, 0x000fb7a9,
++       0x00000000},
++      {0x0000ab28, 0x00000000, 0x00000000, 0x000fb7b1, 0x000fb7b1,
++       0x00000000},
++      {0x0000ab2c, 0x00000000, 0x00000000, 0x000fb7b5, 0x000fb7b5,
++       0x00000000},
++      {0x0000ab30, 0x00000000, 0x00000000, 0x000fb7bd, 0x000fb7bd,
++       0x00000000},
++      {0x0000ab34, 0x00000000, 0x00000000, 0x000fb7c9, 0x000fb7c9,
++       0x00000000},
++      {0x0000ab38, 0x00000000, 0x00000000, 0x000fb7cd, 0x000fb7cd,
++       0x00000000},
++      {0x0000ab3c, 0x00000000, 0x00000000, 0x000fb7d1, 0x000fb7d1,
++       0x00000000},
++      {0x0000ab40, 0x00000000, 0x00000000, 0x000fb7d9, 0x000fb7d9,
++       0x00000000},
++      {0x0000ab44, 0x00000000, 0x00000000, 0x000fb7c2, 0x000fb7c2,
++       0x00000000},
++      {0x0000ab48, 0x00000000, 0x00000000, 0x000fb7c6, 0x000fb7c6,
++       0x00000000},
++      {0x0000ab4c, 0x00000000, 0x00000000, 0x000fb7ca, 0x000fb7ca,
++       0x00000000},
++      {0x0000ab50, 0x00000000, 0x00000000, 0x000fb7ce, 0x000fb7ce,
++       0x00000000},
++      {0x0000ab54, 0x00000000, 0x00000000, 0x000fb7d2, 0x000fb7d2,
++       0x00000000},
++      {0x0000ab58, 0x00000000, 0x00000000, 0x000fb7d6, 0x000fb7d6,
++       0x00000000},
++      {0x0000ab5c, 0x00000000, 0x00000000, 0x000fb7c3, 0x000fb7c3,
++       0x00000000},
++      {0x0000ab60, 0x00000000, 0x00000000, 0x000fb7cb, 0x000fb7cb,
++       0x00000000},
++      {0x0000ab64, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab68, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab6c, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab70, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab74, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab78, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab7c, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab80, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab84, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab88, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab8c, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab90, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab94, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab98, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000ab9c, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000aba0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000aba4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000aba8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abac, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abb0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abb4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abb8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abbc, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abc0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abc4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abc8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abcc, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abd0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abd4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abd8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abdc, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abe0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abe4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abe8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abec, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abf0, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abf4, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abf8, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000abfc, 0x00000000, 0x00000000, 0x000fb7d3, 0x000fb7d3,
++       0x00000000},
++      {0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004,
++       0x00000004},
++      {0x0000a20c, 0x00000014, 0x00000014, 0x00000000, 0x00000000,
++       0x0001f000},
++      {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a,
++       0x1883800a},
++      {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108,
++       0x00000000},
++      {0x0000a250, 0x001ff000, 0x001ff000, 0x001ca000, 0x001ca000,
++       0x001da000},
++      {0x0000a274, 0x0a81c652, 0x0a81c652, 0x0a820652, 0x0a820652,
++       0x0a82a652},
++      {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
++       0x00000000},
++      {0x0000a304, 0x00000000, 0x00000000, 0x00007201, 0x00007201,
++       0x00000000},
++      {0x0000a308, 0x00000000, 0x00000000, 0x00010408, 0x00010408,
++       0x00000000},
++      {0x0000a30c, 0x00000000, 0x00000000, 0x0001860a, 0x0001860a,
++       0x00000000},
++      {0x0000a310, 0x00000000, 0x00000000, 0x00020818, 0x00020818,
++       0x00000000},
++      {0x0000a314, 0x00000000, 0x00000000, 0x00024858, 0x00024858,
++       0x00000000},
++      {0x0000a318, 0x00000000, 0x00000000, 0x00026859, 0x00026859,
++       0x00000000},
++      {0x0000a31c, 0x00000000, 0x00000000, 0x0002985b, 0x0002985b,
++       0x00000000},
++      {0x0000a320, 0x00000000, 0x00000000, 0x0002c89a, 0x0002c89a,
++       0x00000000},
++      {0x0000a324, 0x00000000, 0x00000000, 0x0002e89b, 0x0002e89b,
++       0x00000000},
++      {0x0000a328, 0x00000000, 0x00000000, 0x0003089c, 0x0003089c,
++       0x00000000},
++      {0x0000a32c, 0x00000000, 0x00000000, 0x0003289d, 0x0003289d,
++       0x00000000},
++      {0x0000a330, 0x00000000, 0x00000000, 0x0003489e, 0x0003489e,
++       0x00000000},
++      {0x0000a334, 0x00000000, 0x00000000, 0x000388de, 0x000388de,
++       0x00000000},
++      {0x0000a338, 0x00000000, 0x00000000, 0x0003b91e, 0x0003b91e,
++       0x00000000},
++      {0x0000a33c, 0x00000000, 0x00000000, 0x0003d95e, 0x0003d95e,
++       0x00000000},
++      {0x0000a340, 0x00000000, 0x00000000, 0x000419df, 0x000419df,
++       0x00000000},
++      {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df,
++       0x00000000},
++      {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e,
++       0x7999aa0e},
++};
++
++static const u_int32_t ar9285Common_9285[][2] = {
++      {0x0000000c, 0x00000000},
++      {0x00000030, 0x00020045},
++      {0x00000034, 0x00000005},
++      {0x00000040, 0x00000000},
++      {0x00000044, 0x00000008},
++      {0x00000048, 0x00000008},
++      {0x0000004c, 0x00000010},
++      {0x00000050, 0x00000000},
++      {0x00000054, 0x0000001f},
++      {0x00000800, 0x00000000},
++      {0x00000804, 0x00000000},
++      {0x00000808, 0x00000000},
++      {0x0000080c, 0x00000000},
++      {0x00000810, 0x00000000},
++      {0x00000814, 0x00000000},
++      {0x00000818, 0x00000000},
++      {0x0000081c, 0x00000000},
++      {0x00000820, 0x00000000},
++      {0x00000824, 0x00000000},
++      {0x00001040, 0x002ffc0f},
++      {0x00001044, 0x002ffc0f},
++      {0x00001048, 0x002ffc0f},
++      {0x0000104c, 0x002ffc0f},
++      {0x00001050, 0x002ffc0f},
++      {0x00001054, 0x002ffc0f},
++      {0x00001058, 0x002ffc0f},
++      {0x0000105c, 0x002ffc0f},
++      {0x00001060, 0x002ffc0f},
++      {0x00001064, 0x002ffc0f},
++      {0x00001230, 0x00000000},
++      {0x00001270, 0x00000000},
++      {0x00001038, 0x00000000},
++      {0x00001078, 0x00000000},
++      {0x000010b8, 0x00000000},
++      {0x000010f8, 0x00000000},
++      {0x00001138, 0x00000000},
++      {0x00001178, 0x00000000},
++      {0x000011b8, 0x00000000},
++      {0x000011f8, 0x00000000},
++      {0x00001238, 0x00000000},
++      {0x00001278, 0x00000000},
++      {0x000012b8, 0x00000000},
++      {0x000012f8, 0x00000000},
++      {0x00001338, 0x00000000},
++      {0x00001378, 0x00000000},
++      {0x000013b8, 0x00000000},
++      {0x000013f8, 0x00000000},
++      {0x00001438, 0x00000000},
++      {0x00001478, 0x00000000},
++      {0x000014b8, 0x00000000},
++      {0x000014f8, 0x00000000},
++      {0x00001538, 0x00000000},
++      {0x00001578, 0x00000000},
++      {0x000015b8, 0x00000000},
++      {0x000015f8, 0x00000000},
++      {0x00001638, 0x00000000},
++      {0x00001678, 0x00000000},
++      {0x000016b8, 0x00000000},
++      {0x000016f8, 0x00000000},
++      {0x00001738, 0x00000000},
++      {0x00001778, 0x00000000},
++      {0x000017b8, 0x00000000},
++      {0x000017f8, 0x00000000},
++      {0x0000103c, 0x00000000},
++      {0x0000107c, 0x00000000},
++      {0x000010bc, 0x00000000},
++      {0x000010fc, 0x00000000},
++      {0x0000113c, 0x00000000},
++      {0x0000117c, 0x00000000},
++      {0x000011bc, 0x00000000},
++      {0x000011fc, 0x00000000},
++      {0x0000123c, 0x00000000},
++      {0x0000127c, 0x00000000},
++      {0x000012bc, 0x00000000},
++      {0x000012fc, 0x00000000},
++      {0x0000133c, 0x00000000},
++      {0x0000137c, 0x00000000},
++      {0x000013bc, 0x00000000},
++      {0x000013fc, 0x00000000},
++      {0x0000143c, 0x00000000},
++      {0x0000147c, 0x00000000},
++      {0x00004030, 0x00000002},
++      {0x0000403c, 0x00000002},
++      {0x00004024, 0x0000001f},
++      {0x00004060, 0x00000000},
++      {0x00004064, 0x00000000},
++      {0x00007010, 0x00000031},
++      {0x00007034, 0x00000002},
++      {0x00007038, 0x000004c2},
++      {0x00008004, 0x00000000},
++      {0x00008008, 0x00000000},
++      {0x0000800c, 0x00000000},
++      {0x00008018, 0x00000700},
++      {0x00008020, 0x00000000},
++      {0x00008038, 0x00000000},
++      {0x0000803c, 0x00000000},
++      {0x00008048, 0x00000000},
++      {0x00008054, 0x00000000},
++      {0x00008058, 0x00000000},
++      {0x0000805c, 0x000fc78f},
++      {0x00008060, 0x0000000f},
++      {0x00008064, 0x00000000},
++      {0x00008070, 0x00000000},
++      {0x000080c0, 0x2a80001a},
++      {0x000080c4, 0x05dc01e0},
++      {0x000080c8, 0x1f402710},
++      {0x000080cc, 0x01f40000},
++      {0x000080d0, 0x00001e00},
++      {0x000080d4, 0x00000000},
++      {0x000080d8, 0x00400000},
++      {0x000080e0, 0xffffffff},
++      {0x000080e4, 0x0000ffff},
++      {0x000080e8, 0x003f3f3f},
++      {0x000080ec, 0x00000000},
++      {0x000080f0, 0x00000000},
++      {0x000080f4, 0x00000000},
++      {0x000080f8, 0x00000000},
++      {0x000080fc, 0x00020000},
++      {0x00008100, 0x00020000},
++      {0x00008104, 0x00000001},
++      {0x00008108, 0x00000052},
++      {0x0000810c, 0x00000000},
++      {0x00008110, 0x00000168},
++      {0x00008118, 0x000100aa},
++      {0x0000811c, 0x00003210},
++      {0x00008120, 0x08f04800},
++      {0x00008124, 0x00000000},
++      {0x00008128, 0x00000000},
++      {0x0000812c, 0x00000000},
++      {0x00008130, 0x00000000},
++      {0x00008134, 0x00000000},
++      {0x00008138, 0x00000000},
++      {0x0000813c, 0x00000000},
++      {0x00008144, 0x00000000},
++      {0x00008168, 0x00000000},
++      {0x0000816c, 0x00000000},
++      {0x00008170, 0x32143320},
++      {0x00008174, 0xfaa4fa50},
++      {0x00008178, 0x00000100},
++      {0x0000817c, 0x00000000},
++      {0x000081c0, 0x00000000},
++      {0x000081d0, 0x00003210},
++      {0x000081ec, 0x00000000},
++      {0x000081f0, 0x00000000},
++      {0x000081f4, 0x00000000},
++      {0x000081f8, 0x00000000},
++      {0x000081fc, 0x00000000},
++      {0x00008200, 0x00000000},
++      {0x00008204, 0x00000000},
++      {0x00008208, 0x00000000},
++      {0x0000820c, 0x00000000},
++      {0x00008210, 0x00000000},
++      {0x00008214, 0x00000000},
++      {0x00008218, 0x00000000},
++      {0x0000821c, 0x00000000},
++      {0x00008220, 0x00000000},
++      {0x00008224, 0x00000000},
++      {0x00008228, 0x00000000},
++      {0x0000822c, 0x00000000},
++      {0x00008230, 0x00000000},
++      {0x00008234, 0x00000000},
++      {0x00008238, 0x00000000},
++      {0x0000823c, 0x00000000},
++      {0x00008240, 0x00100000},
++      {0x00008244, 0x0010f400},
++      {0x00008248, 0x00000100},
++      {0x0000824c, 0x0001e800},
++      {0x00008250, 0x00000000},
++      {0x00008254, 0x00000000},
++      {0x00008258, 0x00000000},
++      {0x0000825c, 0x400000ff},
++      {0x00008260, 0x00080922},
++      {0x00008264, 0xa8a00010},
++      {0x00008270, 0x00000000},
++      {0x00008274, 0x40000000},
++      {0x00008278, 0x003e4180},
++      {0x0000827c, 0x00000000},
++      {0x00008284, 0x0000002c},
++      {0x00008288, 0x0000002c},
++      {0x0000828c, 0x00000000},
++      {0x00008294, 0x00000000},
++      {0x00008298, 0x00000000},
++      {0x0000829c, 0x00000000},
++      {0x00008300, 0x00000040},
++      {0x00008314, 0x00000000},
++      {0x00008328, 0x00000000},
++      {0x0000832c, 0x00000001},
++      {0x00008330, 0x00000302},
++      {0x00008334, 0x00000e00},
++      {0x00008338, 0x00000000},
++      {0x0000833c, 0x00000000},
++      {0x00008340, 0x00010380},
++      {0x00008344, 0x00481043},
++      {0x00009808, 0x00000000},
++      {0x0000980c, 0xafe68e30},
++      {0x00009810, 0xfd14e000},
++      {0x00009814, 0x9c0a9f6b},
++      {0x0000981c, 0x00000000},
++      {0x0000982c, 0x0000a000},
++      {0x00009830, 0x00000000},
++      {0x0000983c, 0x00200400},
++      {0x0000984c, 0x0040233c},
++      {0x00009854, 0x00000044},
++      {0x00009900, 0x00000000},
++      {0x00009904, 0x00000000},
++      {0x00009908, 0x00000000},
++      {0x0000990c, 0x00000000},
++      {0x00009910, 0x01002310},
++      {0x0000991c, 0x10000fff},
++      {0x00009920, 0x04900000},
++      {0x00009928, 0x00000001},
++      {0x0000992c, 0x00000004},
++      {0x00009934, 0x1e1f2022},
++      {0x00009938, 0x0a0b0c0d},
++      {0x0000993c, 0x00000000},
++      {0x00009940, 0x14750604},
++      {0x00009948, 0x9280c00a},
++      {0x0000994c, 0x00020028},
++      {0x00009954, 0x5f3ca3de},
++      {0x00009958, 0x2108ecff},
++      {0x00009968, 0x000003ce},
++      {0x00009970, 0x1927b515},
++      {0x00009974, 0x00000000},
++      {0x00009978, 0x00000001},
++      {0x0000997c, 0x00000000},
++      {0x00009980, 0x00000000},
++      {0x00009984, 0x00000000},
++      {0x00009988, 0x00000000},
++      {0x0000998c, 0x00000000},
++      {0x00009990, 0x00000000},
++      {0x00009994, 0x00000000},
++      {0x00009998, 0x00000000},
++      {0x0000999c, 0x00000000},
++      {0x000099a0, 0x00000000},
++      {0x000099a4, 0x00000001},
++      {0x000099a8, 0x201fff00},
++      {0x000099ac, 0x2def0a00},
++      {0x000099b0, 0x03051000},
++      {0x000099b4, 0x00000820},
++      {0x000099dc, 0x00000000},
++      {0x000099e0, 0x00000000},
++      {0x000099e4, 0xaaaaaaaa},
++      {0x000099e8, 0x3c466478},
++      {0x000099ec, 0x0cc80caa},
++      {0x000099f0, 0x00000000},
++      {0x0000a208, 0x803e6788},
++      {0x0000a210, 0x4080a333},
++      {0x0000a214, 0x00206c10},
++      {0x0000a218, 0x009c4060},
++      {0x0000a220, 0x01834061},
++      {0x0000a224, 0x00000400},
++      {0x0000a228, 0x000003b5},
++      {0x0000a22c, 0x00000000},
++      {0x0000a234, 0x20202020},
++      {0x0000a238, 0x20202020},
++      {0x0000a244, 0x00000000},
++      {0x0000a248, 0xfffffffc},
++      {0x0000a24c, 0x00000000},
++      {0x0000a254, 0x00000000},
++      {0x0000a258, 0x0ccb5380},
++      {0x0000a25c, 0x15151501},
++      {0x0000a260, 0xdfa90f01},
++      {0x0000a268, 0x00000000},
++      {0x0000a26c, 0x0ebae9e6},
++      {0x0000d270, 0x0d820820},
++      {0x0000a278, 0x39ce739c},
++      {0x0000a27c, 0x050e039c},
++      {0x0000d35c, 0x07ffffef},
++      {0x0000d360, 0x0fffffe7},
++      {0x0000d364, 0x17ffffe5},
++      {0x0000d368, 0x1fffffe4},
++      {0x0000d36c, 0x37ffffe3},
++      {0x0000d370, 0x3fffffe3},
++      {0x0000d374, 0x57ffffe3},
++      {0x0000d378, 0x5fffffe2},
++      {0x0000d37c, 0x7fffffe2},
++      {0x0000d380, 0x7f3c7bba},
++      {0x0000d384, 0xf3307ff0},
++      {0x0000a388, 0x0c000000},
++      {0x0000a38c, 0x20202020},
++&n