ar71xx: add support for the D-Link DIR-825 rev. B1 board (thanks to
authorGabor Juhos <juhosg@openwrt.org>
Thu, 3 Dec 2009 15:07:34 +0000 (15:07 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Thu, 3 Dec 2009 15:07:34 +0000 (15:07 +0000)
ValXdater)

SVN-Revision: 18621

13 files changed:
target/linux/ar71xx/base-files/etc/defconfig/dir825b1/network [new file with mode: 0644]
target/linux/ar71xx/base-files/etc/diag.sh
target/linux/ar71xx/base-files/lib/ar71xx.sh
target/linux/ar71xx/base-files/lib/upgrade/platform.sh
target/linux/ar71xx/config-2.6.30
target/linux/ar71xx/config-2.6.31
target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig
target/linux/ar71xx/files/arch/mips/ar71xx/Makefile
target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir825b1.c [new file with mode: 0644]
target/linux/ar71xx/files/arch/mips/ar71xx/prom.c
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
target/linux/ar71xx/image/Makefile
target/linux/ar71xx/profiles/d-link.mk

diff --git a/target/linux/ar71xx/base-files/etc/defconfig/dir825b1/network b/target/linux/ar71xx/base-files/etc/defconfig/dir825b1/network
new file mode 100644 (file)
index 0000000..2d4d8e0
--- /dev/null
@@ -0,0 +1,16 @@
+config interface loopback
+       option ifname   lo
+       option proto    static
+       option ipaddr   127.0.0.1
+       option netmask  255.0.0.0
+
+config interface lan
+       option ifname   eth0
+       option type     bridge
+       option proto    static
+       option ipaddr   192.168.1.1
+       option netmask  255.255.255.0
+
+config interface wan
+       option ifname   eth1
+       option proto    dhcp
index 1d88f43..c350f2c 100755 (executable)
@@ -42,6 +42,9 @@ get_status_led() {
        bullet-m | rocket-m | nano-m)
                status_led="ubnt:green:link4"
                ;;
+       dir825b1)
+               status_led="dir825b1:orange:power"
+               ;;
        ls-sr71)
                status_led="ubnt:green:d22"
                ;;
index c24a8b3..ba4b0a2 100755 (executable)
@@ -19,6 +19,9 @@ ar71xx_board_name() {
        *AW-NR580)
                name="aw-nr580"
                ;;
+       *DIR825B1)
+               name="dir825b1"
+               ;;
        *"Bullet M")
                name="bullet-m"
                ;;
index 97c3a41..90fa008 100755 (executable)
@@ -68,7 +68,7 @@ platform_check_image() {
        [ "$ARGC" -gt 1 ] && return 1
 
        case "$board" in
-       ap83 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m)
+       ap83 | dir825b1 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m)
                [ "$magic" != "2705" ] && {
                        echo "Invalid image type."
                        return 1
index 4a2f129..07e2492 100644 (file)
@@ -6,6 +6,7 @@ CONFIG_AG71XX=y
 CONFIG_AR71XX_MACH_AP81=y
 CONFIG_AR71XX_MACH_AP83=y
 CONFIG_AR71XX_MACH_AW_NR580=y
+CONFIG_AR71XX_MACH_DIR825B1=y
 CONFIG_AR71XX_MACH_GENERIC=y
 CONFIG_AR71XX_MACH_MZK_W04NU=y
 CONFIG_AR71XX_MACH_MZK_W300NH=y
index b92b0f6..554b002 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_AG71XX=y
 CONFIG_AR71XX_MACH_AP81=y
 CONFIG_AR71XX_MACH_AP83=y
 CONFIG_AR71XX_MACH_AW_NR580=y
+CONFIG_AR71XX_MACH_DIR825B1=y
 CONFIG_AR71XX_MACH_GENERIC=y
 CONFIG_AR71XX_MACH_MZK_W04NU=y
 CONFIG_AR71XX_MACH_MZK_W300NH=y
index 72c28b4..37a0e01 100644 (file)
@@ -10,6 +10,10 @@ config AR71XX_MACH_AP83
        bool "Atheros AP83 board support"
        default y
 
+config AR71XX_MACH_DIR825B1
+       bool "D-Link DIR-825 rev. B1 board support"
+       default y
+
 config AR71XX_MACH_PB42
        bool "Atheros PB42 board support"
        default y
index 71ba835..d77438f 100644 (file)
@@ -16,6 +16,7 @@ obj-$(CONFIG_PCI)                     += pci.o
 obj-$(CONFIG_AR71XX_MACH_AP81)         += mach-ap81.o
 obj-$(CONFIG_AR71XX_MACH_AP83)         += mach-ap83.o
 obj-$(CONFIG_AR71XX_MACH_AW_NR580)     += mach-aw-nr580.o
+obj-$(CONFIG_AR71XX_MACH_DIR825B1)     += mach-dir825b1.o
 obj-$(CONFIG_AR71XX_MACH_GENERIC)      += mach-generic.o
 obj-$(CONFIG_AR71XX_MACH_MZK_W04NU)    += mach-mzk-w04nu.o
 obj-$(CONFIG_AR71XX_MACH_MZK_W300NH)   += mach-mzk-w300nh.o
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir825b1.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir825b1.c
new file mode 100644 (file)
index 0000000..dbf244c
--- /dev/null
@@ -0,0 +1,317 @@
+/*
+ *  D-Link DIR-825 rev. B1 board support
+ *
+ *  Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
+ *
+ *  based on mach-wndr3700.c
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/input.h>
+
+#include <asm/mips_machine.h>
+#include <asm/mach-ar71xx/ar71xx.h>
+#include <asm/mach-ar71xx/pci.h>
+
+#include <linux/pci.h>
+#include <linux/ath9k_platform.h>
+#include <linux/delay.h>
+
+#include "devices.h"
+
+
+#define DIR825B1_GPIO_LED_BLUE_USB             0
+#define DIR825B1_GPIO_LED_ORANGE_POWER         1
+#define DIR825B1_GPIO_LED_BLUE_POWER           2
+#define DIR825B1_GPIO_LED_BLUE_POWERSAVE       4
+#define DIR825B1_GPIO_LED_ORANGE_PLANET                6
+#define DIR825B1_GPIO_LED_BLUE_PLANET          11
+
+#define DIR825B1_GPIO_BTN_RESET                        3
+#define DIR825B1_GPIO_BTN_POWERSAVE            8
+
+#define DIR825B1_BUTTONS_POLL_INTERVAL         20
+
+
+#define DIR825B1_CAL_LOCATION_0                        0xbf661000
+#define DIR825B1_CAL_LOCATION_1                        0xbf665000
+
+#define DIR825B1_MAC_LOCATION_0                        0x2ffa81b8
+#define DIR825B1_MAC_LOCATION_1                        0x2ffa8370
+
+
+static struct ath9k_platform_data dir825b1_wmac0_data;
+static struct ath9k_platform_data dir825b1_wmac1_data;
+static char dir825b1_wmac0_mac[6];
+static char dir825b1_wmac1_mac[6];
+
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition dir825b1_partitions[] = {
+       {
+               .name           = "uboot",
+               .offset         = 0,
+               .size           = 0x040000,
+               .mask_flags     = MTD_WRITEABLE,
+       } , {
+               .name           = "config",
+               .offset         = 0x040000,
+               .size           = 0x010000,
+               .mask_flags     = MTD_WRITEABLE,
+       } , {
+               .name           = "firmware",
+               .offset         = 0x050000,
+               .size           = 0x610000,
+       } , {
+               .name           = "caldata",
+               .offset         = 0x660000,
+               .size           = 0x010000,
+               .mask_flags     = MTD_WRITEABLE,
+       }
+};
+#endif /* CONFIG_MTD_PARTITIONS */
+
+
+static struct flash_platform_data dir825b1_flash_data = {
+#ifdef CONFIG_MTD_PARTITIONS
+        .parts          = dir825b1_partitions,
+        .nr_parts       = ARRAY_SIZE(dir825b1_partitions),
+#endif
+};
+
+
+static struct spi_board_info dir825b1_spi_info[] = {
+       {
+               .bus_num        = 0,
+               .chip_select    = 0,
+               .max_speed_hz   = 25000000,
+               .modalias       = "m25p80",
+               .platform_data  = &dir825b1_flash_data,
+       }
+};
+
+
+static struct gpio_led dir825b1_leds_gpio[] __initdata = {
+       {
+               .name           = "dir825b1:blue:usb",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_USB,
+               .active_low     = 1,
+       }, {
+               .name           = "dir825b1:orange:power",
+               .gpio           = DIR825B1_GPIO_LED_ORANGE_POWER,
+               .active_low     = 1,
+       }, {
+               .name           = "dir825b1:blue:power",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_POWER,
+               .active_low     = 1,
+       }, {
+               .name           = "dir825b1:blue:powersave",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
+               .active_low     = 1,
+       }, {
+               .name           = "dir825b1:orange:planet",
+               .gpio           = DIR825B1_GPIO_LED_ORANGE_PLANET,
+               .active_low     = 1,
+       }, {
+               .name           = "dir825b1:blue:planet",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_PLANET,
+               .active_low     = 1,
+       }
+};
+
+
+static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
+       {
+               .desc           = "reset",
+               .type           = EV_KEY,
+               .code           = BTN_0,
+               .threshold      = 5,
+               .gpio           = DIR825B1_GPIO_BTN_RESET,
+               .active_low     = 1,
+       } , {
+               .desc           = "powersave",
+               .type           = EV_KEY,
+               .code           = BTN_1,
+               .threshold      = 5,
+               .gpio           = DIR825B1_GPIO_BTN_POWERSAVE,
+               .active_low     = 1,
+       }
+};
+
+
+#ifdef CONFIG_PCI
+static struct ar71xx_pci_irq dir825b1_pci_irqs[] __initdata = {
+        {
+                .slot   = 0,
+                .pin    = 1,
+                .irq    = AR71XX_PCI_IRQ_DEV0,
+        }, {
+                .slot   = 1,
+                .pin    = 1,
+                .irq    = AR71XX_PCI_IRQ_DEV1,
+        }
+};
+
+
+static int dir825b1_pci_plat_dev_init(struct pci_dev *dev)
+{
+       switch(PCI_SLOT(dev->devfn))
+       {
+               case 17:
+                       dev->dev.platform_data = &dir825b1_wmac0_data;
+                       break;
+
+               case 18:
+                       dev->dev.platform_data = &dir825b1_wmac1_data;
+                       break;
+       }
+
+       return(0);
+}
+
+
+static void dir825b1_pci_fixup(struct pci_dev *dev)
+{
+       void __iomem *mem;
+       u16 *cal_data;
+       u16 cmd;
+       u32 bar0;
+       u32 val;
+
+       if (ar71xx_mach != AR71XX_MACH_DIR825B1) return;
+
+       dir825b1_pci_plat_dev_init(dev);
+       cal_data = dev->dev.platform_data;
+
+       if (*cal_data != 0xa55a)
+       {
+               printk(KERN_ERR "PCI: no calibration data found for %s\n",
+                      pci_name(dev));
+               return;
+       }
+
+       mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
+       if (!mem)
+       {
+               printk(KERN_ERR "PCI: ioremap error for device %s\n",
+                      pci_name(dev));
+               return;
+       }
+
+       printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
+
+       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
+
+       /* Setup the PCI device to allow access to the internal registers */
+       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
+       pci_read_config_word(dev, PCI_COMMAND, &cmd);
+       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+       pci_write_config_word(dev, PCI_COMMAND, cmd);
+
+       /* set pointer to first reg address */
+       cal_data += 3;
+       while (*cal_data != 0xffff)
+       {
+               u32 reg;
+               reg = *cal_data++;
+               val = *cal_data++;
+               val |= (*cal_data++) << 16; 
+
+               __raw_writel(val, mem + reg);
+               udelay(100);
+       }
+
+       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
+       dev->vendor = val & 0xffff;
+       dev->device = (val >> 16) & 0xffff;
+
+       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
+       dev->revision = val & 0xff;
+       dev->class = val >> 8; /* upper 3 bytes */
+
+       pci_read_config_word(dev, PCI_COMMAND, &cmd);
+       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+       pci_write_config_word(dev, PCI_COMMAND, cmd);
+
+       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
+
+       iounmap(mem);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
+                       dir825b1_pci_fixup);
+
+
+static void __init dir825b1_pci_init(void) 
+{
+       memcpy(dir825b1_wmac0_data.eeprom_data,
+              (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
+              sizeof(dir825b1_wmac0_data.eeprom_data));
+
+       memcpy(dir825b1_wmac1_data.eeprom_data,
+              (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
+              sizeof(dir825b1_wmac1_data.eeprom_data));
+
+       memcpy(dir825b1_wmac0_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_0), 6);
+       dir825b1_wmac0_data.macaddr = dir825b1_wmac0_mac;
+       memcpy(dir825b1_wmac1_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
+       dir825b1_wmac1_data.macaddr = dir825b1_wmac1_mac;
+
+       ar71xx_pci_plat_dev_init = dir825b1_pci_plat_dev_init;
+       ar71xx_pci_init(ARRAY_SIZE(dir825b1_pci_irqs), dir825b1_pci_irqs);
+}
+#else
+static void __init dir825b1_pci_init(void) { }
+#endif /* CONFIG_PCI */
+
+
+static void __init dir825b1_setup(void)
+{
+        u8 mac[6], i;
+
+       memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
+       for(i = 5; i >= 3; i--)
+               if(++mac[i] != 0x00) break;
+
+       ar71xx_set_mac_base(mac);
+
+       ar71xx_add_device_mdio(0x0);
+
+       ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ar71xx_eth0_data.phy_mask = 0x1E;
+       ar71xx_eth0_data.speed = SPEED_1000;
+       ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
+
+       ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ar71xx_eth1_data.phy_mask = 0xC0;
+       ar71xx_eth1_data.speed = SPEED_1000;
+       ar71xx_eth1_data.duplex = DUPLEX_FULL;
+       ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
+
+       ar71xx_add_device_eth(0);
+       ar71xx_add_device_eth(1);
+
+       ar71xx_add_device_spi(NULL, dir825b1_spi_info,
+                             ARRAY_SIZE(dir825b1_spi_info));
+
+       ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
+                                       dir825b1_leds_gpio);
+
+       ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
+                                       ARRAY_SIZE(dir825b1_gpio_buttons),
+                                       dir825b1_gpio_buttons);
+
+       ar71xx_add_device_usb();
+
+       dir825b1_pci_init();
+}
+
+MIPS_MACHINE(AR71XX_MACH_DIR825B1, "D-Link DIR825B1", dir825b1_setup);
index 4cc9763..ec7eed8 100644 (file)
@@ -58,6 +58,9 @@ static struct board_rec boards[] __initdata = {
        }, {
                .name           = "AW-NR580",
                .mach_type      = AR71XX_MACH_AW_NR580,
+       }, {
+               .name           = "DIR825B1",
+               .mach_type      = AR71XX_MACH_DIR825B1,
        }, {
                .name           = "TEW-632BRP",
                .mach_type      = AR71XX_MACH_TEW_632BRP,
index 4662932..f26fc85 100644 (file)
@@ -124,6 +124,7 @@ enum ar71xx_mach_type {
        AR71XX_MACH_AP81,       /* Atheros AP81 */
        AR71XX_MACH_AP83,       /* Atheros AP83 */
        AR71XX_MACH_AW_NR580,   /* AzureWave AW-NR580 */
+       AR71XX_MACH_DIR825B1,   /* D-Link DIR-825 rev. B1 */
        AR71XX_MACH_RB_411,     /* MikroTik RouterBOARD 411/411A/411AH */
        AR71XX_MACH_RB_411U,    /* MikroTik RouterBOARD 411U */
        AR71XX_MACH_RB_433,     /* MikroTik RouterBOARD 433/433AH */
index 653a8af..8a5dbe6 100644 (file)
@@ -77,6 +77,23 @@ define Image/Build/WRT400N
        fi; fi
 endef
 
+dir825b1_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,1024k(kernel),5184k(rootfs),64k(caldata)ro,6208k@0x50000(firmware)
+define Image/Build/DIR825B1
+       $(call PatchKernelLzma,$(2),$(3) $(dir825b1_mtdlayout))
+       $(call MkImageLzma,$(KDIR)/vmlinux-$(2).bin.lzma,$(call imgname,$(1),$(2)).bin)
+       if [ `stat -c%s "$(call imgname,$(1),$(2)).bin"` -gt 1048576 ]; then \
+               echo "Warning: $(KDIR)/vmlinux-$(2).bin.lzma is too big"; \
+               rm -f $(call imgname,$(1),$(2)).bin; \
+       else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 5308416 ]; then \
+               echo "Warning: $(KDIR)/root.$(1) is too big"; \
+               rm -f $(call imgname,$(1),$(2)).bin; \
+       else \
+               dd if=$(KDIR)/root.$(1) of=$(call imgname,$(1),$(2)).bin bs=1k seek=1024; \
+               cp $(call imgname,$(1),$(2)).bin $(call imgname,$(1),$(2))-backup-loader.bin; \
+               echo -n "01AP94-AR7161-RT-080619-00" >> $(call imgname,$(1),$(2))-backup-loader.bin; \
+       fi; fi
+endef
+
 cameo_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,896k(kernel),2880k(rootfs),64k(art)ro,3776k@0x30000(firmware)
 define Image/Build/Cameo
        $(call PatchKernelLzma,$(2),$(3) $(cameo_mtdlayout))
@@ -268,6 +285,18 @@ define Image/Build/Template/WRT400N/jffs2-64k
        $(call Image/Build/Template/WRT400N,jffs2-64k,$(1),$(2),$(3))
 endef
 
+define Image/Build/Template/DIR825B1
+       $(call Image/Build/DIR825B1,$(1),$(2),$(3),$(4))
+endef
+
+define Image/Build/Template/DIR825B1/squashfs
+       $(call Image/Build/Template/DIR825B1,squashfs,$(1),$(2),$(3))
+endef
+
+define Image/Build/Template/DIR825B1/jffs2-64k
+       $(call Image/Build/Template/DIR825B1,jffs2-64k,$(1),$(2),$(3))
+endef
+
 define Image/Build/Template/CyberTAN
        $(call Image/Build/CyberTAN,$(1),$(2),$(3),$(4))
 endef
@@ -453,6 +482,10 @@ define Image/Build/Profile/WRT400N
        $(call Image/Build/Template/WRT400N/$(1),wrt400n,board=WRT400N)
 endef
 
+define Image/Build/Profile/DIR825B1
+       $(call Image/Build/Template/DIR825B1/$(1),dir825b1,board=DIR825B1)
+endef
+
 define Image/Build/Profile/WRT160NL
        $(call Image/Build/Template/CyberTAN/$(1),wrt160nl,board=WRT160NL,1.00.01)
 endef
@@ -461,6 +494,7 @@ define Image/Build/Profile/Default
        $(call Image/Build/Profile/AP83,$(1))
        $(call Image/Build/Profile/A02RBW300N,$(1))
        $(call Image/Build/Profile/DIR615C1,$(1))
+       $(call Image/Build/Profile/DIR825B1,$(1))
        $(call Image/Build/Profile/MZKW04NU,$(1))
        $(call Image/Build/Profile/MZKW300NH,$(1))
        $(call Image/Build/Profile/TEW632BRP,$(1))
index 460900d..3028a49 100644 (file)
@@ -15,3 +15,15 @@ define Profile/DIR615C1/Description
 endef
 
 $(eval $(call Profile,DIR615C1))
+
+
+define Profile/DIR825B1
+       NAME:=D-Link DIR-825 rev. B1
+       PACKAGES:=kmod-ath9k hostapd-mini
+endef
+
+define Profile/DIR825B1/Description
+       Package set optimized for the D-Link DIR-825 rev. B1.
+endef
+
+$(eval $(call Profile,DIR825B1))