From: Felix Fietkau <nbd@openwrt.org>
Date: Sat, 20 Nov 2010 18:52:55 +0000 (+0000)
Subject: ath9k: fix endian issues on AR9003
X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=commitdiff_plain;h=09a3c19b5fd7a7caedf4f87bd36f56312199624f

ath9k: fix endian issues on AR9003

SVN-Revision: 24047
---

diff --git a/package/mac80211/patches/510-ath9k_ctl_bitfields.patch b/package/mac80211/patches/510-ath9k_ctl_bitfields.patch
new file mode 100644
index 0000000000..6485a1b344
--- /dev/null
+++ b/package/mac80211/patches/510-ath9k_ctl_bitfields.patch
@@ -0,0 +1,676 @@
+--- a/drivers/net/wireless/ath/ath9k/eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom.c
+@@ -240,16 +240,16 @@ u16 ath9k_hw_get_max_edge_power(u16 freq
+ 	for (i = 0; (i < num_band_edges) &&
+ 		     (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
+ 		if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
+-			twiceMaxEdgePower = pRdEdgesPower[i].tPower;
++			twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
+ 			break;
+ 		} else if ((i > 0) &&
+ 			   (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
+ 						      is2GHz))) {
+ 			if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
+ 					       is2GHz) < freq &&
+-			    pRdEdgesPower[i - 1].flag) {
++			    CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
+ 				twiceMaxEdgePower =
+-					pRdEdgesPower[i - 1].tPower;
++					CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
+ 			}
+ 			break;
+ 		}
+--- a/drivers/net/wireless/ath/ath9k/eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/eeprom.h
+@@ -233,6 +233,9 @@
+ 
+ #define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
+ 
++#define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f)
++#define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03)
++
+ enum eeprom_param {
+ 	EEP_NFTHRESH_5,
+ 	EEP_NFTHRESH_2,
+@@ -535,18 +538,10 @@ struct cal_target_power_ht {
+ 	u8 tPow2x[8];
+ } __packed;
+ 
+-
+-#ifdef __BIG_ENDIAN_BITFIELD
+-struct cal_ctl_edges {
+-	u8 bChannel;
+-	u8 flag:2, tPower:6;
+-} __packed;
+-#else
+ struct cal_ctl_edges {
+ 	u8 bChannel;
+-	u8 tPower:6, flag:2;
++	u8 ctl;
+ } __packed;
+-#endif
+ 
+ struct cal_data_op_loop_ar9287 {
+ 	u8 pwrPdg[2][5];
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -57,6 +57,8 @@
+ #define SUB_NUM_CTL_MODES_AT_5G_40 2    /* excluding HT40, EXT-OFDM */
+ #define SUB_NUM_CTL_MODES_AT_2G_40 3    /* excluding HT40, EXT-OFDM, EXT-CCK */
+ 
++#define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6))
++
+ static int ar9003_hw_power_interpolate(int32_t x,
+ 				       int32_t *px, int32_t *py, u_int16_t np);
+ static const struct ar9300_eeprom ar9300_default = {
+@@ -296,21 +298,21 @@ static const struct ar9300_eeprom ar9300
+ 		}
+ 	 },
+ 	.ctlPowerData_2G = {
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
+-
+-		 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
++
++		 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
+ 	 },
+ 	.modalHeader5G = {
+ 		/* 4 idle,t1,t2,b (4 bits per setting) */
+@@ -582,56 +584,56 @@ static const struct ar9300_eeprom ar9300
+ 	.ctlPowerData_5G = {
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 0}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 0}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
++				CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
+ 			}
+ 		},
+ 	 }
+@@ -873,21 +875,21 @@ static const struct ar9300_eeprom ar9300
+ 		}
+ 	 },
+ 	.ctlPowerData_2G = {
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
+-
+-		 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
++
++		 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
+ 	 },
+ 	.modalHeader5G = {
+ 		/* 4 idle,t1,t2,b (4 bits per setting) */
+@@ -1159,56 +1161,56 @@ static const struct ar9300_eeprom ar9300
+ 	.ctlPowerData_5G = {
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 0}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 0}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
++				CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
+ 			}
+ 		},
+ 	 }
+@@ -1451,21 +1453,21 @@ static const struct ar9300_eeprom ar9300
+ 		}
+ 	},
+ 	.ctlPowerData_2G = {
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
+-
+-		{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
++
++		{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
+ 	},
+ 	.modalHeader5G = {
+ 		/* 4 idle,t1,t2,b (4 bits per setting) */
+@@ -1737,56 +1739,56 @@ static const struct ar9300_eeprom ar9300
+ 	.ctlPowerData_5G = {
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 0}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 0}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
++				CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
+ 			}
+ 		},
+ 	}
+@@ -2029,21 +2031,21 @@ static const struct ar9300_eeprom ar9300
+ 		}
+ 	},
+ 	.ctlPowerData_2G = {
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
+-
+-		{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+-		{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
++
++		{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
++		{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
+ 	},
+ 	.modalHeader5G = {
+ 		/* 4 idle,t1,t2,b (4 bits per setting) */
+@@ -2315,56 +2317,56 @@ static const struct ar9300_eeprom ar9300
+ 	.ctlPowerData_5G = {
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 0}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 0}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
++				CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
+ 			}
+ 		},
+ 	}
+@@ -2606,21 +2608,21 @@ static const struct ar9300_eeprom ar9300
+ 		}
+ 	 },
+ 	.ctlPowerData_2G = {
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
+-
+-		 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-
+-		 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+-		 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
++
++		 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
++		 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
+ 	 },
+ 	.modalHeader5G = {
+ 		/* 4 idle,t1,t2,b (4 bits per setting) */
+@@ -2892,56 +2894,56 @@ static const struct ar9300_eeprom ar9300
+ 	.ctlPowerData_5G = {
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 0}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
+-				{60, 0}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
++				CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 0}, {60, 0}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 1},
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 1}, {60, 0},
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
+ 			}
+ 		},
+ 		{
+ 			{
+-				{60, 1}, {60, 0}, {60, 1}, {60, 1},
+-				{60, 1}, {60, 1}, {60, 0}, {60, 1},
++				CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
++				CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
+ 			}
+ 		},
+ 	 }
+@@ -4363,9 +4365,9 @@ static u16 ar9003_hw_get_direct_edge_pow
+ 	struct cal_ctl_data_5g *ctl_5g = eep->ctlPowerData_5G;
+ 
+ 	if (is2GHz)
+-		return ctl_2g[idx].ctlEdges[edge].tPower;
++		return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge]);
+ 	else
+-		return ctl_5g[idx].ctlEdges[edge].tPower;
++		return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge]);
+ }
+ 
+ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
+@@ -4383,12 +4385,12 @@ static u16 ar9003_hw_get_indirect_edge_p
+ 
+ 	if (is2GHz) {
+ 		if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 1) < freq &&
+-		    ctl_2g[idx].ctlEdges[edge - 1].flag)
+-			return ctl_2g[idx].ctlEdges[edge - 1].tPower;
++		    CTL_EDGE_FLAGS(ctl_2g[idx].ctlEdges[edge - 1]))
++			return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge - 1]);
+ 	} else {
+ 		if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 0) < freq &&
+-		    ctl_5g[idx].ctlEdges[edge - 1].flag)
+-			return ctl_5g[idx].ctlEdges[edge - 1].tPower;
++		    CTL_EDGE_FLAGS(ctl_5g[idx].ctlEdges[edge - 1]))
++			return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
+ 	}
+ 
+ 	return AR9300_MAX_RATE_POWER;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -270,17 +270,12 @@ struct cal_tgt_pow_ht {
+ 	u8 tPow2x[14];
+ } __packed;
+ 
+-struct cal_ctl_edge_pwr {
+-	u8 tPower:6,
+-	   flag:2;
+-} __packed;
+-
+ struct cal_ctl_data_2g {
+-	struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_2G];
++	u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G];
+ } __packed;
+ 
+ struct cal_ctl_data_5g {
+-	struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
++	u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
+ } __packed;
+ 
+ struct ar9300_BaseExtension_1 {