From: John Crispin <john@openwrt.org>
Date: Tue, 19 Jul 2011 18:06:42 +0000 (+0000)
Subject: fixes pci on lantiq AR9 SoC
X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=commitdiff_plain;hb=267cf938cc5dad2f440e7e0273fe3a113b132714

fixes pci on lantiq AR9 SoC

SVN-Revision: 27695
---

diff --git a/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch
new file mode 100644
index 0000000000..94a3bc7516
--- /dev/null
+++ b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch
@@ -0,0 +1,18 @@
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -171,8 +171,13 @@
+ 	u32 temp_buffer;
+ 
+ 	/* set clock to 33Mhz */
+-	ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
+-	ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++	if (ltq_is_ar9()) {
++		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0x1f00000, LTQ_CGU_IFCCR);
++		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR);
++	} else {
++		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
++		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++	}
+ 
+ 	/* external or internal clock ? */
+ 	if (conf->clock) {