From: Hauke Mehrtens Date: Mon, 19 Dec 2011 23:55:20 +0000 (+0000) Subject: brcm47xx: remove patch starting adding brcm4716 to ssb X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=commitdiff_plain;hb=3ecf427e15f66ef3fc246440282a0f7674a6cf37 brcm47xx: remove patch starting adding brcm4716 to ssb brcm4716 is supported by bcma now we do not need this patch SVN-Revision: 29576 --- diff --git a/target/linux/brcm47xx/patches-3.0/951-brcm4716-defines.patch b/target/linux/brcm47xx/patches-3.0/951-brcm4716-defines.patch deleted file mode 100644 index 18685af6eb..0000000000 --- a/target/linux/brcm47xx/patches-3.0/951-brcm4716-defines.patch +++ /dev/null @@ -1,104 +0,0 @@ ---- a/drivers/ssb/scan.c -+++ b/drivers/ssb/scan.c -@@ -90,6 +90,14 @@ const char *ssb_core_name(u16 coreid) - return "ARM 1176"; - case SSB_DEV_ARM_7TDMI: - return "ARM 7TDMI"; -+ case SSB_DEV_ETHERNET_GBIT2: -+ return "Gigabit MAC"; -+ case SSB_DEV_MIPS_74K: -+ return "MIPS 74k"; -+ case SSB_DEV_DDR_CTRLR: -+ return "DDR1/2 memory controller"; -+ case SSB_DEV_I2S: -+ return "I2S"; - } - return "UNKNOWN"; - } -@@ -148,6 +156,7 @@ static u8 chipid_to_nrcores(u16 chipid) - case 0x4710: - case 0x4610: - case 0x4704: -+ case 0x4716: - return 9; - default: - ssb_printk(KERN_ERR PFX ---- a/include/linux/ssb/ssb.h -+++ b/include/linux/ssb/ssb.h -@@ -166,9 +166,16 @@ struct ssb_bus_ops { - #define SSB_DEV_MINI_MACPHY 0x823 - #define SSB_DEV_ARM_1176 0x824 - #define SSB_DEV_ARM_7TDMI 0x825 -+#define SSB_DEV_ETHERNET_GBIT2 0x82d -+#define SSB_DEV_MIPS_74K 0x82c -+#define SSB_DEV_DDR_CTRLR 0x82e -+#define SSB_DEV_I2S 0x834 -+#define SSB_DEV_DEFAULT 0xfff - - /* Vendor-ID values */ - #define SSB_VENDOR_BROADCOM 0x4243 -+#define SSB_VENDOR_BROADCOM2 0x04BF -+#define SSB_VENDOR_ARM 0x43b - - /* Some kernel subsystems poke with dev->drvdata, so we must use the - * following ugly workaround to get from struct device to struct ssb_device */ ---- a/include/linux/ssb/ssb_regs.h -+++ b/include/linux/ssb/ssb_regs.h -@@ -11,6 +11,7 @@ - #define SSB_SDRAM_SWAPPED 0x10000000U /* Byteswapped Physical SDRAM */ - #define SSB_ENUM_BASE 0x18000000U /* Enumeration space base */ - #define SSB_ENUM_LIMIT 0x18010000U /* Enumeration space limit */ -+#define SSB_AI_BASE 0x18100000 /* base for AI registers */ - - #define SSB_FLASH2 0x1c000000U /* Flash Region 2 (region 1 shadowed here) */ - #define SSB_FLASH2_SZ 0x02000000U /* Size of Flash Region 2 */ -@@ -26,6 +27,7 @@ - #define SSB_EUART (SSB_EXTIF_BASE + 0x00800000) - #define SSB_LED (SSB_EXTIF_BASE + 0x00900000) - -+#define SSB_EROM_ASD_SZ_BASE 0x00001000 - - /* Enumeration space constants */ - #define SSB_CORE_SIZE 0x1000 /* Size of a core MMIO area */ -@@ -556,5 +558,41 @@ enum { - #define SSB_ADM_BASE2 0xFFFF0000 /* Type2 base address for the core */ - #define SSB_ADM_BASE2_SHIFT 16 - -+/***** EROM defines for AI type busses *****/ -+#define SSB_EROM_VALID 1 -+#define SSB_EROM_END 0xe -+#define SSB_EROM_TAG 0xe -+/* Adress Space Descriptor */ -+#define SSB_EROM_ASD 0x4 -+#define SSB_EROM_ASD_SP_MASK 0x00000f00 -+#define SSB_EROM_ASD_SP_SHIFT 8 -+#define SSB_EROM_ASD_ST_MASK 0x000000c0 -+#define SSB_EROM_ASD_ST_SLAVE 0x00000000 -+#define SSB_EROM_ASD_ST_BRIDGE 0x00000040 -+#define SSB_EROM_ASD_ST_MWRAP 0x000000c0 -+#define SSB_EROM_ASD_ST_SWRAP 0x00000080 -+#define SSB_EROM_ASD_ADDR_MASK 0xfffff000 -+#define SSB_EROM_ASD_AG32 0x00000008 -+#define SSB_EROM_ASD_SZ_MASK 0x00000030 -+#define SSB_EROM_ASD_SZ_SZD 0x00000030 -+#define SSB_EROM_ASD_SZ_SHIFT 4 -+#define SSB_EROM_CI 0 -+#define SSB_EROM_CIA_CID_MASK 0x000fff00 -+#define SSB_EROM_CIA_CID_SHIFT 8 -+#define SSB_EROM_CIA_MFG_MASK 0xfff00000 -+#define SSB_EROM_CIA_MFG_SHIFT 20 -+#define SSB_EROM_CIB_REV_MASK 0xff000000 -+#define SSB_EROM_CIB_REV_SHIFT 24 -+#define SSB_EROM_CIB_NMW_MASK 0x0007c000 -+#define SSB_EROM_CIB_NSW_MASK 0x00f80000 -+#define SSB_EROM_CIB_NSP_MASK 0x00003e00 -+ -+/***** Registers of AI config space *****/ -+#define SSB_AI_RESETCTRL 0x800 /* maybe 0x804 for big endian */ -+#define SSB_AI_RESETCTRL_RESET 1 -+#define SSB_AI_IOCTRL 0x408 /* maybe 0x40c for big endian */ -+#define SSB_CF_FGC 0x0002 -+#define SSB_CF_CLOCK_EN 0x001 -+#define SSB_AI_oobselouta30 0x100 - - #endif /* LINUX_SSB_REGS_H_ */