disable dsp freq use for vlynq bus clock init, disable external clocking (it locks...
[openwrt/svn-archive/archive.git] / target / linux / ar7 / files / include / asm-mips / ar7 /
drwxr-xr-x   ..
-rw-r--r-- 4167 ar7.h
-rw-r--r-- 2773 gpio.h
-rw-r--r-- 1086 mmzone.h
-rw-r--r-- 923 prom.h
-rw-r--r-- 861 spaces.h
-rw-r--r-- 2680 vlynq.h