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authorSander Vanheule2025-01-21 18:37:25 +0000
committerSander Vanheule2025-02-22 11:32:35 +0000
commitfd978c2e80b45ce2bcf45c664d2cf7e83d7f12c5 (patch)
tree3b30100331acdf6cc132fd376bbe4db09db035be
parent3d26c1cae4ad8f094f75e5fa40af7bfe37c294e2 (diff)
downloadopenwrt-fd978c2e80b45ce2bcf45c664d2cf7e83d7f12c5.tar.gz
realtek: Enable Zyxel GS1900's RTL8231 reset line
As the bootloader is reconfiguring the RTL8231 on these devices anyway, no pin state can be maintained over warm reboots. This results in for example the PoE disable pin always being asserted by the bootloader. Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem will also reset the expander on boot and ensure the line in the correct state. Signed-off-by: Sander Vanheule <sander@svanheule.net> (cherry picked from commit b2d17dbb68c232393739e6fb48245f1f4bebb698)
-rw-r--r--target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi8
1 files changed, 3 insertions, 5 deletions
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 927b9527a9..6ab3e4834a 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -45,11 +45,9 @@
&mdio_aux {
status = "okay";
- // Reset GPIO is <&gpio0 1 GPIO_ACTIVE_LOW>
- // Don't specify the reset info so the mdio subsystem doesn't reset the bus
- //reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
- //reset-delay-us = <1000>;
- //reset-post-delay-us = <10000>;
+ reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <1000>;
+ reset-post-delay-us = <10000>;
gpio1: expander@0 {
compatible = "realtek,rtl8231";