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<title>staging/blocktrron/target, branch master</title>
<subtitle>Staging tree of David Bauer</subtitle>
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<updated>2026-10-16T07:52:28Z</updated>
<entry>
<title>qualcommax: ipq50xx: add support for Xunison Exigo Hub D50 5G</title>
<updated>2026-10-16T07:52:28Z</updated>
<author>
<name>Steve Meek</name>
</author>
<published>2026-10-06T14:49:51Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=5df6ceb3d4a4783920c04d3523809ac2749e4891'/>
<id>urn:sha1:5df6ceb3d4a4783920c04d3523809ac2749e4891</id>
<content type='text'>
The Xunison Exigo Hub D50 5G is a 5G/LTE router with Wi-Fi 6. It is also
sold as the Zearts D50 5G.

Specifications:
  SoC:      Qualcomm IPQ5018, dual-core Cortex-A53 @ 1.0 GHz
  RAM:      512 MiB
  Flash:    128 MiB SPI NAND (ESMT F50D1G41LB)
  WLAN:     IPQ5018 2.4 GHz, QCN9074 5 GHz (PCIe), both 802.11ax
  Ethernet: 1x GbE WAN (IPQ5018 internal GE PHY, gmac0)
            3x GbE LAN (QCA8337 switch, SGMII to gmac1)
  WWAN:     Quectel RM500Q-AE, 5G Sub-6 / LTE Cat 16, on USB 2.0 and
            PCIe
  Buttons:  reset, WPS
  LEDs:     MESH (green/red), 5G (green/red), 4G, WiFi, Internet, WAN;
            power is hardwired
  Power:    12 V / 2 A DC
  Serial:   115200 8N1, 4-pin header JP1 next to SW4 on the main board,
            from pin 1: VCC, TX, RX, GND

Notes:
- WAN is gmac0 wired straight to the internal GE PHY, not a switch
  port; its netdev is named wan by the label property.
- The console RX line (gpio20) is pulled up. Left floating with nothing
  on the header it causes an interrupt storm and, on some units, a hang
  at boot.
- USB is 2.0 only: the controller is limited to the HS PHY and clocks
  its pipe from UTMI. The 5 V supply for the port and the modem is
  switched by gpio24 (active low).
- MACs follow the stock firmware: LAN uses 0:art 0x0, WAN 0:art 0x6.
  The label has no MAC printed, so there is no label-mac-device.
- Wi-Fi calibration data and MAC addresses come from 0:art through
  nvmem cells on the Wi-Fi nodes (calibration: IPQ5018 at 0x1000,
  QCN9074 at 0x26800). The caldata holds the Qualcomm placeholder MAC,
  so the radios take the 0:art 0x0 MAC + 2 and + 3 instead.
- Board data for both radios is submitted separately to
  firmware_qca-wireless under the calibration variant
  Xunison-Exigo-Hub-D50-5G, both taken from the stock firmware:
  bdwlan.b24-brax for the IPQ5018 and qcn9000/bdwlan.ba0 for the
  QCN9074. The brax file is the vendor's board variant; on my unit it
  outperformed the bdwlan.b24 that the stock firmware loads.
- The modem power line (gpio31) has no consumer and is kept high with a
  GPIO hog.
- The Internet LED is lit while the modem's wwan0 is up. The WiFi LED
  uses the network trigger in link mode, so it is lit while an AP is up
  on either radio; the phyNradio triggers never light it with ath11k on
  this board. The 4G and 5G LEDs have no trigger, as nothing in the
  kernel reports the modem's access technology.

Modem:
The RM500Q-AE is wired to both USB and PCIe, and its data_interface
setting selects which one carries data. The stock firmware leaves it on
PCIe (data_interface 1,0) and this port uses it there, so no AT command
is needed after installing. It is driven by mhi-pci-generic with MBIM:
data on wwan0, control on /dev/wwan0mbim0 and AT commands on
/dev/wwan0at0. No modem interface is preconfigured; add one with the
"mbim" protocol on /dev/wwan0mbim0.

Installation:
  The factory image is a raw UBI image for the U-Boot web recovery.
  1. Power the router off, hold the reset button and power it on. Keep
     holding until the Internet LED stays lit (about 10 seconds).
  2. Set a computer on a LAN port to 192.168.1.2/24 and open
     http://192.168.1.254
  3. Upload openwrt-qualcommax-ipq50xx-xunison_exigo-hub-d50-5g-squashfs-factory.img
     and wait for the router to reboot.
  Later upgrades use the sysupgrade image.

The port started from George Moussalem's device support in the 4IceG
OpenWrt tree, with the device tree reworked by Lukasz Szczur (LS3434):
USB, the modem supply and the NAND/sysupgrade layout. Thanks to Hostle
for the flashing work on this board and to Rafał Wabik (4IceG) for the
tree it was developed in.

Link: https://forum.openwrt.org/t/adding-support-for-xunison-exigo-d50-5g-zearts-d50-5g-ipq5018/247016
Co-developed-by: George Moussalem &lt;george.moussalem@outlook.com&gt;
Signed-off-by: George Moussalem &lt;george.moussalem@outlook.com&gt;
Co-developed-by: Lukasz Szczur &lt;8sdasfasfas@royaleplaysempire.com&gt;
Signed-off-by: Lukasz Szczur &lt;8sdasfasfas@royaleplaysempire.com&gt;
Co-developed-by: Rafał Wabik &lt;4rafal@gmail.com&gt;
Signed-off-by: Rafał Wabik &lt;4rafal@gmail.com&gt;
Signed-off-by: Steve Meek &lt;stevemeek82@gmail.com&gt;

Link: https://github.com/openwrt/openwrt/pull/25890
Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
</content>
</entry>
<entry>
<title>kernel: mhi: disable doorbell burst mode for RM500Q-AE</title>
<updated>2026-10-16T07:52:28Z</updated>
<author>
<name>Steve Meek</name>
</author>
<published>2026-10-13T14:17:29Z</published>
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<id>urn:sha1:73b92d95d109d9cfaaa0049f18c67f65b9815fc8</id>
<content type='text'>
Add a pending patch that gives the RM500Q-AE its own MHI channel table
with doorbell burst mode disabled on its two hardware data channels.

With burst mode on, the downlink stalls under sustained multi-stream
load when the wwan0 receive work runs on the same CPU as the modem's
interrupt, which is where the default packet steering puts it. Uplink
keeps working, the MBIM control channel later times out, and only a
reboot recovers it. Ringing the channel doorbell by hand restores the
link at once, which points at a lost doorbell-mode handshake.

Tested on a Xunison Exigo Hub D50 5G: without the patch a single
25-second 16-stream download stalled the downlink; with it, about 200
seconds of multi-stream downloads with CPU0 at up to 100% ran with no
stall and no MHI errors.

Link: https://patch.msgid.link/20261013-rm500q-db-burst-v1-1-bb850d54e2c4@gmail.com
Signed-off-by: Steve Meek &lt;stevemeek82@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/25890
Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
</content>
</entry>
<entry>
<title>kernel: backport MHI PCI support for the Quectel RM500Q-AE</title>
<updated>2026-10-16T07:52:28Z</updated>
<author>
<name>Steve Meek</name>
</author>
<published>2026-10-11T16:31:42Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=2961f341158ffc874b10fae175c9bfab91cfd920'/>
<id>urn:sha1:2961f341158ffc874b10fae175c9bfab91cfd920</id>
<content type='text'>
Backport upstream commit f6985f512f82 ("bus: mhi: host: pci_generic:
Add Quectel RM500Q-AE support"), applied to the MHI tree and now in
char-misc-next for the next merge window.

Without it the RM500Q-AE binds to the generic SDX55 entry, whose QMI
channels its firmware does not answer, so no data session can be set
up over PCIe.

Link: https://patch.msgid.link/20261011-mhi-next-v1-1-13a738637ff0@gmail.com
Signed-off-by: Steve Meek &lt;stevemeek82@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/25890
Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
</content>
</entry>
<entry>
<title>airoha: backport additional airoha_eth patches</title>
<updated>2026-10-16T07:47:56Z</updated>
<author>
<name>Yalei Zang</name>
</author>
<published>2026-10-13T05:35:59Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=059895c014bdc4ecb24487b7983c528f1e97822a'/>
<id>urn:sha1:059895c014bdc4ecb24487b7983c528f1e97822a</id>
<content type='text'>
Backport the Airoha Ethernet patches for Linux 6.18. They fix PPE flush
error handling, QDMA retry handling, BQL accounting on the shared TX ring,
DMA mapping of fragmented packets, and maximum receive size configuration.

The series also fixes MIB and ETS/QoS statistics, corrects the module
license, renames the device flags, and adds preliminary TX hardware
configuration changes.

Signed-off-by: Yalei Zang &lt;yalei.zang@airoha.com&gt;
Link: https://github.com/openwrt/openwrt/pull/25861
Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
</content>
</entry>
<entry>
<title>airoha: introduce device tree overlay support for AN7583</title>
<updated>2026-10-16T07:30:40Z</updated>
<author>
<name>Yalei Zang</name>
</author>
<published>2026-10-09T13:57:16Z</published>
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<id>urn:sha1:7287a40ccf2d0b17508c68c0c0bd5ac8ac9aa74a</id>
<content type='text'>
To reduce code duplication across different AN7583 evaluation boards,
introduce a shared multi-EVB base device tree and utilize Device Tree
Overlays (DTSO) for board-specific configurations.

Signed-off-by: Yalei Zang &lt;yalei.zang@airoha.com&gt;
Link: https://github.com/openwrt/openwrt/pull/24926
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>airoha: introduce device tree overlay support for AN7581</title>
<updated>2026-10-16T07:30:40Z</updated>
<author>
<name>Yalei Zang</name>
</author>
<published>2026-09-21T13:55:14Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=04499f8e3b37171f8b1045fe0993946ea319a502'/>
<id>urn:sha1:04499f8e3b37171f8b1045fe0993946ea319a502</id>
<content type='text'>
To reduce code duplication across different AN7581 evaluation boards,
introduce a shared multi-EVB base device tree and utilize Device Tree
Overlays (DTSO) for board-specific configurations.

Signed-off-by: Yalei Zang &lt;yalei.zang@airoha.com&gt;
Link: https://github.com/openwrt/openwrt/pull/24926
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>airoha: enable device tree overlay support</title>
<updated>2026-10-16T07:30:39Z</updated>
<author>
<name>Yalei Zang</name>
</author>
<published>2026-09-18T08:26:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=599d10585cae873d5d02ccfe00647566e3a9c371'/>
<id>urn:sha1:599d10585cae873d5d02ccfe00647566e3a9c371</id>
<content type='text'>
Add the dt-overlay feature to support building and applying
device tree overlays for Airoha NAND and RAMDISK targets.

Signed-off-by: Yalei Zang &lt;yalei.zang@airoha.com&gt;
Link: https://github.com/openwrt/openwrt/pull/24926
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>realtek: rtl931x: set the LED interface mode from realtek,led-mode</title>
<updated>2026-10-16T06:50:01Z</updated>
<author>
<name>Kaloyan Naumov</name>
</author>
<published>2026-10-13T17:30:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=89381af99844cb77517d3fbdf67c8f0ca727b9a9'/>
<id>urn:sha1:89381af99844cb77517d3fbdf67c8f0ca727b9a9</id>
<content type='text'>
The rtl931x LED setup always selects serial mode. Boards whose port LEDs
are wired for scan mode stay dark with it. The rtl930x driver already
reads the interface mode from "realtek,led-mode"; read it on rtl931x
too.

Without the property the driver selects serial mode, as before. A value
outside 1-3 is reported and also falls back to serial mode. No rtl931x
DTS sets the property yet, so other boards are unchanged.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Kaloyan Naumov &lt;knaumov@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/25576
Signed-off-by: Jonas Jelonek &lt;jonas@jonasjelonek.de&gt;
</content>
</entry>
<entry>
<title>Revert "realtek: rtl931x: set the LED interface mode from realtek,led-mode"</title>
<updated>2026-10-16T06:49:08Z</updated>
<author>
<name>Jonas Jelonek</name>
</author>
<published>2026-10-16T06:49:08Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=6821c4af6a7e05b77ac8e831bc1bd14bf470fd27'/>
<id>urn:sha1:6821c4af6a7e05b77ac8e831bc1bd14bf470fd27</id>
<content type='text'>
This reverts commit 9d27e7c62ebf98dbef92e77420f9f557c5664a60.
I missed my proper SoB in the commit.

Signed-off-by: Jonas Jelonek &lt;jonas@jonasjelonek.de&gt;
</content>
</entry>
<entry>
<title>realtek: rtl931x: set the LED interface mode from realtek,led-mode</title>
<updated>2026-10-16T06:48:14Z</updated>
<author>
<name>Kaloyan Naumov</name>
</author>
<published>2026-10-13T17:30:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/blocktrron/commit/?id=9d27e7c62ebf98dbef92e77420f9f557c5664a60'/>
<id>urn:sha1:9d27e7c62ebf98dbef92e77420f9f557c5664a60</id>
<content type='text'>
The rtl931x LED setup always selects serial mode. Boards whose port LEDs
are wired for scan mode stay dark with it. The rtl930x driver already
reads the interface mode from "realtek,led-mode"; read it on rtl931x
too.

Without the property the driver selects serial mode, as before. A value
outside 1-3 is reported and also falls back to serial mode. No rtl931x
DTS sets the property yet, so other boards are unchanged.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Kaloyan Naumov &lt;knaumov@gmail.com&gt;
</content>
</entry>
</feed>
