<feed xmlns='http://www.w3.org/2005/Atom'>
<title>staging/stintel, branch master</title>
<subtitle>Staging tree of Stijn Tintel</subtitle>
<id>https://git.openwrt.org/openwrt/staging/stintel/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/openwrt/staging/stintel/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/'/>
<updated>2026-05-27T11:32:21Z</updated>
<entry>
<title>ustp: update to Git HEAD (2026-05-27)</title>
<updated>2026-05-27T11:32:21Z</updated>
<author>
<name>Stijn Tintel</name>
</author>
<published>2026-05-27T11:32:21Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=79322d44d898e164c3fe066e8443be98df82a046'/>
<id>urn:sha1:79322d44d898e164c3fe066e8443be98df82a046</id>
<content type='text'>
f5d17dd60a89 mstp: add default Hello Time constant
17c36bebada1 mstp: use default Hello Time in recordTimes

Signed-off-by: Stijn Tintel &lt;stijn@linux-ipv6.be&gt;
</content>
</entry>
<entry>
<title>mac80211: add ieee80211_txq_aql_pending()</title>
<updated>2026-05-27T10:27:21Z</updated>
<author>
<name>Felix Fietkau</name>
</author>
<published>2026-05-27T10:24:40Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=36471ac3e46f33f821612126a5153177d0b30485'/>
<id>urn:sha1:36471ac3e46f33f821612126a5153177d0b30485</id>
<content type='text'>
Add a function to allow drivers to query the pending AQL airtime
for a given txq, for both unicast and broadcast.
This will be used for mt76 to limit buffering in AP mode for power-save
stations.

Signed-off-by: Felix Fietkau &lt;nbd@nbd.name&gt;
</content>
</entry>
<entry>
<title>airoha: Improve LRO performances</title>
<updated>2026-05-27T07:17:12Z</updated>
<author>
<name>Lorenzo Bianconi</name>
</author>
<published>2026-05-25T12:17:39Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=d22ceb8d24e87b1bd729fd75f91e5b8fccfc8bbc'/>
<id>urn:sha1:d22ceb8d24e87b1bd729fd75f91e5b8fccfc8bbc</id>
<content type='text'>
Add hardware TCP Large Receive Offload (LRO) support to the airoha_eth
driver, leveraging the EN7581/AN7583 SoC's 8 dedicated LRO hardware queues
mapped to RX queues 24–31. LRO hw offloading does not support
Scatter-Gather (SG) so it is required to increase the page_pool allocation
order to 2 for RX queues 24–31 (LRO queues).

Performance comparison between GRO and hw LRO has been carried out using
a 10Gbps NIC:

GRO: ~2.7 Gbps
LRO: ~8.1 Gbps

Tested-by: Madhur Agrawal &lt;madhur.agrawal@airoha.com&gt;
Signed-off-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Link: https://github.com/openwrt/openwrt/pull/23530
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>b43-tools: update the package to version released on 2026-05-22</title>
<updated>2026-05-26T23:44:48Z</updated>
<author>
<name>Alessio Ferri</name>
</author>
<published>2026-05-25T18:50:39Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=88300c83f34ae1517e8b6dd248fecd60a6fdc904'/>
<id>urn:sha1:88300c83f34ae1517e8b6dd248fecd60a6fdc904</id>
<content type='text'>
b43-tools introduced python 2 to python 3 conversion and added
support to extract ucode from a new blob

Signed-off-by: Alessio Ferri &lt;alessio.ferri.3012@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/23535
Signed-off-by: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
</content>
</entry>
<entry>
<title>mvebu: cortexa53: uDPU/eDPU: update active bootscript as well</title>
<updated>2026-05-26T17:35:42Z</updated>
<author>
<name>Robert Marko</name>
</author>
<published>2026-05-25T19:26:14Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=fb7787803c64fcca1ae3d0a8882c8337c788f058'/>
<id>urn:sha1:fb7787803c64fcca1ae3d0a8882c8337c788f058</id>
<content type='text'>
Currently, sysupgrade will only upgrade the unused slot, however since the
whole dual firmware logic is in the bootscript U-boot will just use the
first bootscript it finds.

So, in a case that you are running slot A it will upgrade slot B, however
that means that slot B will be still booted by the old bootscript that came
with the previous firmware version.

This is an issue if you need to change anything, so lets add a custom
function that upgrades the active bootscript as well after flashing the
slot firmware.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
</content>
</entry>
<entry>
<title>mvebu: cortexa53: uDPU/eDPU convert to dual firmware (A/B)</title>
<updated>2026-05-26T17:35:42Z</updated>
<author>
<name>Robert Marko</name>
</author>
<published>2026-02-23T16:41:18Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=ada2753d6a315b7ff75604342ef69d55b3b418ae'/>
<id>urn:sha1:ada2753d6a315b7ff75604342ef69d55b3b418ae</id>
<content type='text'>
Methode uDPU and eDPU devices are one of the rare ones with a completely
custom image format being used with custom partition table with F2FS.

Instead of converting the boards to dual firmware (A/B style) and further
expand the already convoluted custom scripts, especially considering that
dual firmware conversion is a breaking change anyway, lets convert to using
the generic eMMC sysupgrade based images.

F2FS ZSTD compression is preserved thanks to fstools now supporting its use
on overlays.

Dual firmware support is implemented via U-Boot scripts so no U-Boot
upgrade is required.

Since there is a partition table layout change, eMMC must be wiped and
reflashed with the generated GPT image from OpenWrt initramfs.

Then on each sysupgrade the firmware slot will be altered.

Instructions:
1. Boot into OpenWrt initramfs
2. Copy openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img.gz to
the device into /tmp
3. Erase eMMC:
dd if=/dev/zero of=/dev/mmcblk0 bs=1M
4. Extract image
gzip -d /tmp/openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img.gz
5. Flash image
dd if=/tmp/openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img of=/dev/mmcblk0
6. Reboot

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
</content>
</entry>
<entry>
<title>qualcommax: ipq50xx: add support for ELECOM WRC-X3000GST2</title>
<updated>2026-05-26T16:56:17Z</updated>
<author>
<name>Taiga Ogawa</name>
</author>
<published>2026-05-19T02:11:36Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=587a1a8872af09669ec1e15aee5edc7c5d3b5022'/>
<id>urn:sha1:587a1a8872af09669ec1e15aee5edc7c5d3b5022</id>
<content type='text'>
ELECOM WRC-X3000GST2 is a 2.4/5 GHz band 11ax (Wi-Fi 6) router based on
IPQ5018. The only hardware difference from the WRC-X3000GS2 is the RAM
capacity; all other peripherals are identical. This port therefore
reuses the GS2 board-2.bin (ipq-wifi-elecom_wrc-x3000gs2) and ath11k
calibration variant.

Specification:

- SoC             : Qualcomm IPQ5018
- RAM             : DDR3 512 MiB (Kingston Technology D2516ECMDXGJD)
- Flash           : SPI-NAND 128 MiB (Macronix MX35UF1G24AD-Z4I)
- WLAN            : 2.4/5 GHz 2T2R
  - 2.4 GHz       : Qualcomm IPQ5018 (SoC)
  - 5 GHz         : Qualcomm QCN6122
- Ethernet        : 5x 10/100/1000 Mbps
  - wan (phy)     : Qualcomm IPQ5018 (SoC)
  - lan (switch)  : Qualcomm Atheros QCA8337
- LEDs/Keys (GPIO): 8x / 3x (reset, WPS, router/AP slide switch)
- UART            : through-hole on PCB, 4pins near the barcode
  - assignment    : 3.3V, TX, RX, NC, GND from the barcode side
  - settings      : 115200n8
- Power           : 12 VDC, 1 A (Max. 11.5W)

Flash instruction using factory.bin image:

1. Boot WRC-X3000GST2 normally in router mode
2. Access the WebUI ("http://192.168.2.1/") and open the firmware
   update page ("ファームウェア更新")
3. Select the OpenWrt factory.bin image and click apply ("適用")
4. After the device reboots automatically, wait until the green power LED
   stops blinking and stays solid
5. When the green power LED is solid, hold the reset button until the red
   LED starts blinking to clear remaining stock firmware settings

Switching to the stock firmware:

1. Load the elecom.sh script

   . /lib/upgrade/elecom.sh

2. Check the current index of rootfs

   bootconfig_rw_index 0:bootconfig rootfs

3. Set the index to inverted value

   bootconfig_rw_index 0:bootconfig rootfs &lt;value&gt;
   bootconfig_rw_index 0:bootconfig1 rootfs &lt;value&gt;

   example:

   - step2 returned "0":

     bootconfig_rw_index 0:bootconfig rootfs 1
     bootconfig_rw_index 0:bootconfig1 rootfs 1

   - step2 returned "1":

     bootconfig_rw_index 0:bootconfig rootfs 0
     bootconfig_rw_index 0:bootconfig1 rootfs 0

4. Reboot

Partition Layout (Stock FW):

0x000000000000-0x000000080000 : "0:SBL1"
0x000000080000-0x000000100000 : "0:MIBIB"
0x000000100000-0x000000140000 : "0:BOOTCONFIG"
0x000000140000-0x000000180000 : "0:BOOTCONFIG1"
0x000000180000-0x000000280000 : "0:QSEE"
0x000000280000-0x000000380000 : "0:QSEE_1"
0x000000380000-0x0000003c0000 : "0:DEVCFG"
0x0000003c0000-0x000000400000 : "0:DEVCFG_1"
0x000000400000-0x000000440000 : "0:CDT"
0x000000440000-0x000000480000 : "0:CDT_1"
0x000000480000-0x000000500000 : "0:APPSBLENV"
0x000000500000-0x000000640000 : "0:APPSBL"
0x000000640000-0x000000780000 : "0:APPSBL_1"
0x000000780000-0x000000880000 : "0:ART"
0x000000880000-0x000000900000 : "0:TRAINING"
0x000000900000-0x000003c40000 : "rootfs"
0x000003c40000-0x000003fc0000 : "Config"
0x000003fc0000-0x000007300000 : "rootfs_1"
0x000007300000-0x000007680000 : "Config_2"
0x000007680000-0x000007b80000 : "Reserved"
0x000007b80000-0x000007c00000 : "FWHEADER"
0x000007c00000-0x000007c80000 : "Factory"

Notes:

- This device has dual-boot feature and it's managed by the index in the
  0:bootconfig and 0:bootconfig1 partitions.

- Wi-Fi BDF is shared with WRC-X3000GS2 (ipq-wifi-elecom_wrc-x3000gs2)
  as the hardware (SoC, QCN6122, antennas) is identical between the two
  models.

- GST2 stock firmware keeps its configuration even when sysupgrade is
  called with -n. When installing from the OEM WebUI, those stock
  settings can be restored into OpenWrt overlay, so settings must be
  initialized after the first OpenWrt boot.

MAC Addresses:

LAN    : 38:97:A4:xx:xx:40 (0:APPSBLENV, "eth1addr"/"ethaddr"  (text))
WAN    : 38:97:A4:xx:xx:43 (0:APPSBLENV, "eth0addr" (text))
2.4 GHz: 38:97:A4:xx:xx:41 (0:APPSBLENV, "wifi0"    (text))
5 GHz  : 38:97:A4:xx:xx:42 (0:APPSBLENV, "wifi1"    (text))

Signed-off-by: Taiga Ogawa &lt;zectaiga@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/23471
Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
</content>
</entry>
<entry>
<title>realtek: add support for Linksys LGS328MPCv2</title>
<updated>2026-05-26T14:10:07Z</updated>
<author>
<name>Jan-Henrik Bruhn</name>
</author>
<published>2026-05-19T22:30:36Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=8e724fc3b316968d426d5dc9ad312500619c3fd0'/>
<id>urn:sha1:8e724fc3b316968d426d5dc9ad312500619c3fd0</id>
<content type='text'>
Hardware specification
----------------------

* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 2MB NOR Flash
* 128MB NAND Flash
* 24 x 10/100/1000BASE-T ports with PoE+
* 4 x 10G SFP+ ports
* Power LED, Fault LED, PoE Max LED, LAN Mode LED, PoE Mode LED
* Reset button and LED Mode button on front panel
* LM63 Fan Controller
* UART (115200 8N1) via RJ45
* PSE: Nuvoton M0516LDE via I2C + 3x RTL8238B (not supported yet)

Installation using serial interface
-----------------------------------

1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Start network "rtk network on"
3. Load image "tftpboot &lt;TFTP IP&gt;:openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-initramfs-kernel.bin"
4. Boot image "bootm"
5. Switch to first bootpartition "fw_setsys bootpartition 0"
6. Download sysupgrade "scp &lt;IP&gt;:openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-squashfs-sysupgrade.bin /tmp/."
7. Install sysupgrade "sysupgrade /tmp/openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-squashfs-sysupgrade.bin"

Installation using OEM webinterface
-----------------------------------

This is not possible because the OpenWrt NAND Flash layout is different
from the vendor layout. To be precise. Vendor uses:

- 64 MB vendor UBI root_data
- 32 MB vendor kernel+root 1 (~19 MB used)
- 32 MB vendor kernel+root 2 (~19 MB used)

OpenWrt uses:

- 64 MB vendor UBI (not touched)
- 10 MB OpenWrt kernel
- 22 MB Openwrt mtd-concat UBI
- 23 MB vendor kernel 2 (space reduced, vendor data unchanged)
- 09 MB OpenWrt mtd-concat UBI

Dual-boot with stock firmware using writable u-boot-env
-------------------------------------------------------

From stock to OpenWrt / primary image 1 (CLI as admin):
   - &gt; boot system image1
   - &gt; reboot

From OpenWrt to stock / boot image 2: (shell as root)
   - # fw_setsys bootpartition 1
   - # reboot

Debrick using serial interface
------------------------------

1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Load vendor image with "upgrade runtime &lt;TFTP IP&gt;:LGS328xxxxx.imag"
3. switch to primary partition "setsys bootpartition 0"
4. safe config "savesys"

MAC Address Source
------------------

The MAC address for this device is coming from the u-boot-env ethaddr cell.

Further documentation
---------------------
See https://openwrt.org/toh/linksys/lgs352c

Signed-off-by: Jan-Henrik Bruhn &lt;git@jhbruhn.de&gt;
Link: https://github.com/openwrt/openwrt/pull/23466
Signed-off-by: Jonas Jelonek &lt;jelonek.jonas@gmail.com&gt;
</content>
</entry>
<entry>
<title>realtek: dts,build: create common Linksys LGS328x DTSI and image-recipe</title>
<updated>2026-05-26T14:10:06Z</updated>
<author>
<name>Jan-Henrik Bruhn</name>
</author>
<published>2026-05-21T21:24:37Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=455d73619c27db7dacc0ef2e32f1d8ed1849f5c0'/>
<id>urn:sha1:455d73619c27db7dacc0ef2e32f1d8ed1849f5c0</id>
<content type='text'>
This is in preparation for the addition of the LGS328MPC, which is
based on the LGS328C.

It also drops the unused UBINIZE_OPTS, as UBI is only used during runtime
of the firmware, not during build.

Signed-off-by: Jan-Henrik Bruhn &lt;git@jhbruhn.de&gt;
Link: https://github.com/openwrt/openwrt/pull/23466
Signed-off-by: Jonas Jelonek &lt;jelonek.jonas@gmail.com&gt;
</content>
</entry>
<entry>
<title>rockchip: switch to kernel 6.18</title>
<updated>2026-05-26T14:00:35Z</updated>
<author>
<name>Tianling Shen</name>
</author>
<published>2026-05-25T10:28:14Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/openwrt/staging/stintel/commit/?id=67740e311b8e5f2d420ffa8f05e506ab193b6750'/>
<id>urn:sha1:67740e311b8e5f2d420ffa8f05e506ab193b6750</id>
<content type='text'>
Switch to kernel 6.18 and remove kernel 6.12 files.

Signed-off-by: Tianling Shen &lt;cnsztl@immortalwrt.org&gt;
Link: https://github.com/openwrt/openwrt/pull/23528
Signed-off-by: Jonas Jelonek &lt;jelonek.jonas@gmail.com&gt;
</content>
</entry>
</feed>
