<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/atf/bl1/aarch64, branch master</title>
<subtitle>Broadcom-s Trusted Firmware A</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/atf/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/atf/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/'/>
<updated>2019-10-03T13:43:55Z</updated>
<entry>
<title>TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U</title>
<updated>2019-10-03T13:43:55Z</updated>
<author>
<name>Alexei Fedorov</name>
</author>
<published>2019-10-01T12:58:23Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=530ceda57288aa931d0c8ba7b3066340d587cc9b'/>
<id>urn:sha1:530ceda57288aa931d0c8ba7b3066340d587cc9b</id>
<content type='text'>
This patch adds support for ARMv8.3-PAuth in BL1 SMC calls and
BL2U image for firmware updates by programming APIAKey_EL1 registers
and enabling Pointer Authentication in EL3 and EL1 respectively.

Change-Id: I875d952aba8242caf74fb5f4f2d2af6f0c768c08
Signed-off-by: Alexei Fedorov &lt;Alexei.Fedorov@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge changes from topic "db/unsigned_long" into integration</title>
<updated>2019-09-18T14:30:09Z</updated>
<author>
<name>Sandrine Bailleux</name>
</author>
<published>2019-09-18T14:30:09Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=ea735643cb59eeaca0619c625d77c33ab156b520'/>
<id>urn:sha1:ea735643cb59eeaca0619c625d77c33ab156b520</id>
<content type='text'>
* changes:
  Unsigned long should not be used as per coding guidelines
  SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
</content>
</entry>
<entry>
<title>Unsigned long should not be used as per coding guidelines</title>
<updated>2019-09-13T20:51:02Z</updated>
<author>
<name>Deepika Bhavnani</name>
</author>
<published>2019-09-03T18:51:09Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=ee006a79f622b39a35beaaf95d7b42b7078823f8'/>
<id>urn:sha1:ee006a79f622b39a35beaaf95d7b42b7078823f8</id>
<content type='text'>
We should either change them to `unsigned int` or `unsigned long long`
when the size of the variable is the same in AArch64 and AArch32 or
to `u_register_t` if it is supposed to be 32 bit wide in AArch32
and 64 bit wide in AArch64.

Signed-off-by: Deepika Bhavnani &lt;deepika.bhavnani@arm.com&gt;
Change-Id: I80e2a6edb33248ee88be395829abbd4c36c89abe
</content>
</entry>
<entry>
<title>Refactor ARMv8.3 Pointer Authentication support code</title>
<updated>2019-09-13T13:11:59Z</updated>
<author>
<name>Alexei Fedorov</name>
</author>
<published>2019-09-13T13:11:59Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=ed108b56051de5da8024568a06781ce287e86c78'/>
<id>urn:sha1:ed108b56051de5da8024568a06781ce287e86c78</id>
<content type='text'>
This patch provides the following features and makes modifications
listed below:
- Individual APIAKey key generation for each CPU.
- New key generation on every BL31 warm boot and TSP CPU On event.
- Per-CPU storage of APIAKey added in percpu_data[]
  of cpu_data structure.
- `plat_init_apiakey()` function replaced with `plat_init_apkey()`
  which returns 128-bit value and uses Generic timer physical counter
  value to increase the randomness of the generated key.
  The new function can be used for generation of all ARMv8.3-PAuth keys
- ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
- New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
  generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
  pauth_disable_el1()` and `pauth_disable_el3()` functions disable
  PAuth for EL1 and EL3 respectively;
  `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
  cpu-data structure.
- Combined `save_gp_pauth_registers()` function replaces calls to
  `save_gp_registers()` and `pauth_context_save()`;
  `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
  and `restore_gp_registers()` calls.
- `restore_gp_registers_eret()` function removed with corresponding
  code placed in `el3_exit()`.
- Fixed the issue when `pauth_t pauth_ctx` structure allocated space
  for 12 uint64_t PAuth registers instead of 10 by removal of macro
  CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
  and assigning its value to CTX_PAUTH_REGS_END.
- Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
  in `msr	spsel`  instruction instead of hard-coded values.
- Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.

Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
Signed-off-by: Alexei Fedorov &lt;Alexei.Fedorov@arm.com&gt;
</content>
</entry>
<entry>
<title>AArch64: Disable Secure Cycle Counter</title>
<updated>2019-08-21T14:43:24Z</updated>
<author>
<name>Alexei Fedorov</name>
</author>
<published>2019-08-13T14:17:53Z</published>
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<id>urn:sha1:e290a8fcbc836d51566da1607add8a320d0f1a20</id>
<content type='text'>
This patch fixes an issue when secure world timing information
can be leaked because Secure Cycle Counter is not disabled.
For ARMv8.5 the counter gets disabled by setting MDCR_El3.SCCD
bit on CPU cold/warm boot.
For the earlier architectures PMCR_EL0 register is saved/restored
on secure world entry/exit from/to Non-secure state, and cycle
counting gets disabled by setting PMCR_EL0.DP bit.
'include\aarch64\arch.h' header file was tided up and new
ARMv8.5-PMU related definitions were added.

Change-Id: I6f56db6bc77504634a352388990ad925a69ebbfa
Signed-off-by: Alexei Fedorov &lt;Alexei.Fedorov@arm.com&gt;
</content>
</entry>
<entry>
<title>Refactor SPSR initialisation code</title>
<updated>2019-07-24T11:49:54Z</updated>
<author>
<name>John Tsichritzis</name>
</author>
<published>2019-07-01T13:27:33Z</published>
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<id>urn:sha1:d200f2306463b28fc2650939ac9bcc0d701fa2d5</id>
<content type='text'>
Change-Id: Ic3b30de13e314efca30fc71370227d3e76f1148b
Signed-off-by: John Tsichritzis &lt;john.tsichritzis@arm.com&gt;
</content>
</entry>
<entry>
<title>BL1: Enable pointer authentication support</title>
<updated>2019-02-27T11:58:09Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2019-01-30T20:29:50Z</published>
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<id>urn:sha1:cd7d6b0eb161c4b24f4ff19822cbb26c3f59a3f5</id>
<content type='text'>
The size increase after enabling options related to ARMv8.3-PAuth is:

+----------------------------+-------+-------+-------+--------+
|                            |  text |  bss  |  data | rodata |
+----------------------------+-------+-------+-------+--------+
| CTX_INCLUDE_PAUTH_REGS = 1 |  +108 |  +192 |   +0  |   +0   |
|                            |  0.5% |  0.8% |       |        |
+----------------------------+-------+-------+-------+--------+
| ENABLE_PAUTH = 1           |  +748 |  +192 |  +16  |   +0   |
|                            |  3.7% |  0.8% |  7.0% |        |
+----------------------------+-------+-------+-------+--------+

Results calculated with the following build configuration:

    make PLAT=fvp SPD=tspd DEBUG=1 \
    SDEI_SUPPORT=1                 \
    EL3_EXCEPTION_HANDLING=1       \
    TSP_NS_INTR_ASYNC_PREEMPT=1    \
    CTX_INCLUDE_PAUTH_REGS=1       \
    ENABLE_PAUTH=1

Change-Id: I3a7d02feb6a6d212be32a01432b0c7c1a261f567
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Sanitise includes across codebase</title>
<updated>2019-01-04T10:43:17Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-12-14T00:18:21Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=09d40e0e08283a249e7dce0e106c07c5141f9b7e'/>
<id>urn:sha1:09d40e0e08283a249e7dce0e106c07c5141f9b7e</id>
<content type='text'>
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>context_mgmt: Fix MISRA defects</title>
<updated>2018-11-01T14:15:39Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-10-31T15:25:35Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=a0fee7474fb946fcbcd43c4947cf113147e26301'/>
<id>urn:sha1:a0fee7474fb946fcbcd43c4947cf113147e26301</id>
<content type='text'>
The macro EL_IMPLEMENTED() has been deprecated in favour of the new
function el_implemented().

Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Add end_vector_entry assembler macro</title>
<updated>2018-07-11T08:23:00Z</updated>
<author>
<name>Roberto Vargas</name>
</author>
<published>2018-04-17T10:31:43Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=a9203edae7906490faebe0eb91825a0cf9a20783'/>
<id>urn:sha1:a9203edae7906490faebe0eb91825a0cf9a20783</id>
<content type='text'>
Check_vector_size checks if the size of the vector fits
in the size reserved for it. This check creates problems in
the Clang assembler. A new macro, end_vector_entry, is added
and check_vector_size is deprecated.

This new macro fills the current exception vector until the next
exception vector. If the size of the current vector is bigger
than 32 instructions then it gives an error.

Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671
Signed-off-by: Roberto Vargas &lt;roberto.vargas@arm.com&gt;
</content>
</entry>
</feed>
