bcm63xx/atf/fdts, branch master

fdts: stm32mp1: move FDCAN to PLL4_R

2019-10-03T09:17:40Z

LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead caches the value at probe and pretends to use it later. This change fixes the issue by moving the FDCAN to PLL4_R, leaving the LTDC alone on PLL4_Q. Signed-off-by: Antonio Borneo Signed-off-by: Yann Gautier Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58

Merge changes from topic "ld/stm32-authentication" into integration

2019-09-27T09:54:27Z

* changes: stm32mp1: add authentication support for stm32image bsec: move bsec_mode_is_closed_device() service to platform crypto: stm32_hash: Add HASH driver

a5ds: add multicore support

2019-09-23T16:08:05Z

Enable cores 1-3 using psci. On receiving the smc call from kernel, core 0 will bring the secondary cores out pen and signal an event for the cores. Currently on switching the cores is enabled i.e. it is not possible to suspend, switch cores off, etc. Change-Id: I6087e1d2ec650e1d587fd543efc1b08cbb50ae5f Signed-off-by: Usama Arif

stm32mp1: add authentication support for stm32image

2019-09-23T09:48:07Z

This commit adds authentication binary support for STM32MP1. It prints the bootrom authentication result if signed image is used and authenticates the next loaded STM32 images. It also enables the dynamic translation table support (PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services. Signed-off-by: Lionel Debieve Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51

Add Linux DTS files for 32 bit threaded FVPs

2019-09-08T17:15:35Z

RevC models have the MT bit set and the affinities shifted in the MPIDR register. To make the Linux able to boot all CPUs it needs a modified DTS file containing the shifted affinity values. Beside these values the DTS files should be the same so the common part was moved into a new file which is included in the DTS files with shifted and non-shifted affinities. The same setup already exists for 64 bit systems. Signed-off-by: Imre Kis Change-Id: I90f7b9c8d8a24c9b3f97232441dbe0a29aa8976d

plat/arm: Introduce corstone700 platform.

2019-08-20T14:14:01Z

This patch adds support for Corstone-700 foundation IP, which integrates both Cortex-M0+ and Cortex-A(Host) processors in one handy, flexible subsystem. This is an example implementation of Corstone-700 IP host firmware. Cortex-M0+ will take care of boot stages 1 and 2(BL1/BL2) as well as bringing Host out RESET. Host will start execution directly from BL32 and then will jump to Linux. It is an initial port and additional features are expected to be added later. Change-Id: I7b5c0278243d574284b777b2408375d007a7736e Signed-off-by: Manish Pandey

plat/arm: Introduce A5 DesignStart platform.

2019-07-16T14:13:12Z

This patch adds support for Cortex-A5 FVP for the DesignStart program. DesignStart aims at providing low cost and fast access to Arm IP. Currently with this patch only the primary CPU is booted and the rest of them wait for an interrupt. Signed-off-by: Usama Arif Change-Id: I3a2281ce6de2402dda4610a89939ed53aa045fab

fdts: stm32mp1: realign device tree files with internal devs

2019-06-17T12:03:51Z

Update DDR parameters to version 1.45. Remove useless sdmmc1_dir_pins_b node. Add USART3 and UART7 nodes. Correct a PMIC value for USB regulator. Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes. Update DTSI file for SDMMC compatible, but overwrite it with the former name. Move BSEC board_id node to boards DTS files, as this OTP is specific to STMicroelectronics boards. Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939 Signed-off-by: Yann Gautier

stm32mp1: add general SYSCFG management

2019-06-17T12:03:51Z

The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings. The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it. Device tree files are also updated to manage vdd-supply regulator. Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by: Nicolas Le Bayon Signed-off-by: Yann Gautier

fdts: Fix DTC warnings for STM32MP1 platform

2019-04-26T13:47:17Z

DTC issues below warnings for STM32MP1 platform for using upper case in unit address: fdts/stm32mp15-ddr.dtsi:8.20-151.5: Warning (simple_bus_reg): /soc/ddr@5A003000: simple-bus unit address format error, expected "5a003000" fdts/stm32mp157c-security.dtsi:9.25-13.5: Warning (simple_bus_reg): /soc/stgen@5C008000: simple-bus unit address format error, expected "5c008000" Fix this by using the lower case unit address for concerned nodes. Signed-off-by: Manivannan Sadhasivam Change-Id: Id3d19ac3b47ec6bcea2bd3382225e2e923dc4a70