bcm63xx/atf/lib/aarch32, branch master

Add Broadcom's code for bcm63xx support

2021-12-24T12:15:12Z

This includes all bcm63xx families (some of them don't follow that naming schema - like BCM4908). All that code has been extracted from the RAXE500_RAXE450-V1.0.8.70_GPL_release.zip . Signed-off-by: Rafał Miłecki

Fix Coverity #261967, Infinite loop

2019-08-06T12:06:03Z

Coverity has identified that the __aeabi_imod function will loop forever if the denominator is not a power of 2, which is probably not the desired behaviour. The functions in the rest of the file are compiler implementations of division if ARMv7 does not implement division which is permitted by the spec. However, while most of the functions in the file are documented and referenced in other places online, __aeabi_uimod and __aeabi_imod are not. For this reason, these functions have been removed from the code base, which also removes the Coverity error. Change-Id: I20066d72365329a8b03a5536d865c4acaa2139ae Signed-off-by: Justin Chadwell

Cortex A9:errata 794073 workaround

2019-04-12T10:10:32Z

On Cortex A9 an errata can cause the processor to violate the rules for speculative fetches when the MMU is off but branch prediction has not been disabled. The workaround for this is to execute an Invalidate Entire Branch Prediction Array (BPIALL) followed by a DSB. see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf for more details. Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93 Signed-off-by: Joel Hutton

cache_helpers.s:fix mixed tabs and spaces

2019-04-10T09:57:58Z

Change-Id: I8b7c7888d09200410e1a1c11a070c94dd8013ea7 Signed-off-by: Joel Hutton

Add note about erratum 814220 for A7

2019-04-10T09:57:58Z

On Cortex-A7 an L2 set/way cache maintenance operation can overtake an L1 set/way cache maintenance operation. The mitigation for this is to use a `DSB` instruction before changing cache. The cache cleaning code happens to already be doing this, so only a comment was added. Change-Id: Ia1ffb8ca8b6bbbba422ed6f6818671ef9fe02d90 Signed-off-by: Joel Hutton

Correct typographical errors

2019-01-15T15:16:02Z

Corrects typos in core code, documentation files, drivers, Arm platforms and services. None of the corrections affect code; changes are limited to comments and other documentation. Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d Signed-off-by: Paul Beesley

libc: armclang: Implement compiler printf symbols

2018-08-22T09:26:05Z

armclang replaces calls to printf by calls to one of the symbols __0printf, __1printf or __2printf. This patch adds new functions with these names that internally call printf so that the Trusted Firmware can be compiled with this compiler. Change-Id: I06a0e3e5001232fe5b2577615666ddd66e81eef0 Signed-off-by: Antonio Nino Diaz

ARMv7: division support for missing __aeabi_*divmod

2017-11-08T13:42:07Z

ARMv7-A architectures that do not support the Virtualization extensions do not support instructions for the 32bit division. This change provides a software implementation for 32bit division. The division implementation is dumped from the OP-TEE project http://github.com/OP-TEE/optee_os. The code was slightly modified to pass trusted firmware checkpatch requirements and copyright is given to the ARM trusted firmware initiative and its contributors. Change-Id: Idae0c7b80a0d75eac9bd41ae121921d4c5af3fa3 Signed-off-by: Etienne Carriere

Exit early if size zero for cache helpers

2017-06-21T16:46:28Z

This patch enables cache helper functions `flush_dcache_range`, `clean_dcache_range` and `invalidate_dcache_range` to exit early if the size argument specified is zero Change-Id: I0b63e8f4bd3d47ec08bf2a0b0b9a7ff8a269a9b0 Signed-off-by: Soby Mathew

Use SPDX license identifiers

2017-05-03T08:39:28Z

To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm