bcm63xx/atf/lib/extensions/amu, branch master

Add support for Branch Target Identification

2019-05-24T13:44:45Z

This patch adds the functionality needed for platforms to provide Branch Target Identification (BTI) extension, introduced to AArch64 in Armv8.5-A by adding BTI instruction used to mark valid targets for indirect branches. The patch sets new GP bit [50] to the stage 1 Translation Table Block and Page entries to denote guarded EL3 code pages which will cause processor to trap instructions in protected pages trying to perform an indirect branch to any instruction other than BTI. BTI feature is selected by BRANCH_PROTECTION option which supersedes the previous ENABLE_PAUTH used for Armv8.3-A Pointer Authentication and is disabled by default. Enabling BTI requires compiler support and was tested with GCC versions 9.0.0, 9.0.1 and 10.0.0. The assembly macros and helpers are modified to accommodate the BTI instruction. This is an experimental feature. Note. The previous ENABLE_PAUTH build option to enable PAuth in EL3 is now made as an internal flag and BRANCH_PROTECTION flag should be used instead to enable Pointer Authentication. Note. USE_LIBROM=1 option is currently not supported. Change-Id: Ifaf4438609b16647dc79468b70cd1f47a623362e Signed-off-by: Alexei Fedorov

Sanitise includes across codebase

2019-01-04T10:43:17Z

Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz

Fix MISRA defects in extension libs

2018-10-29T14:41:48Z

No functional changes. Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192 Signed-off-by: Antonio Nino Diaz

MISRA fixes for AMU/SPE and SVE

2018-02-27T12:05:59Z

Change-Id: I38470528111410cf12b187eb1397d87b812c9416 Signed-off-by: Dimitris Papastamos

aarch32: Fix multiple bugs in amu_helpers.S

2018-02-27T12:05:59Z

AArch32 uses odd-even pairs when passing 64-bit arguments to functions. For example in `amu_group0_cnt_write_internal()` the second argument is a uint64_t which is passed in r2 and r3. In `amu_group1_set_evtype_internal()` the value that needs to be written to the system register is in r1 not in r0. Change-Id: I20196268fdb1dc9ef6c4ebe61e761fba9623b3f2 Signed-off-by: Dimitris Papastamos

Assert that group0/group1 counter config is what we expect

2018-02-27T12:05:59Z

Before suspend the AMU counters should be enabled and after resume they should be disabled. Assert that to be consistent with the AArch64 implementation of `amu_context_{save,restore}()`. Change-Id: Ia46f77e4062b93afb93721a2890a9b9d2a7f300e Signed-off-by: Dimitris Papastamos

AMU: Implement context save/restore for aarch32

2018-01-31T14:08:22Z

Add amu_context_save() and amu_context_restore() functions for aarch32 Change-Id: I4df83d447adeaa9d9f203e16dc5a919ffc04d87a Signed-off-by: Joel Hutton

AMU: Add assembler helper functions for aarch32

2018-01-31T14:08:22Z

Change-Id: Id6dfe885a63561b1d2649521bd020367b96ae1af Signed-off-by: Joel Hutton

AMU: Remove unnecessary WARN()

2018-01-15T15:07:06Z

If AMU is not supported by the hardware but it is enabled in Trusted Firmware, the console will be spammed with warnings every time a CPU is brought up with a CPU ON call. Remove the warning message as this is more in line with how other extensions like SPE and SVE are handled. Change-Id: Iba6d367e4d1375ab554d23d2eaceab3ae1362c5a Signed-off-by: Dimitris Papastamos

AMU: Add hooks to save/restore AMU context

2018-01-11T14:36:45Z

On some systems, the AMU counters might reset to 0 when a CPU powerdown happens. This behaviour conflicts with the intended use-case of AMU as lower ELs are only expected to see non-decreasing counter values. Change-Id: If25519965d4e6e47e09225d0e732947986cbb5ec Signed-off-by: Dimitris Papastamos