bcm63xx/atf/plat/arm/board/a5ds/include, branch masterBroadcom-s Trusted Firmware Ahttps://git.openwrt.org/project/bcm63xx/atf/atom?h=master2019-09-23T16:08:05Za5ds: add multicore support2019-09-23T16:08:05ZUsama Arif2019-09-19T10:07:24Zurn:sha1:ec885bacb247e9a88c0e21406bdf42821eb340c7
Enable cores 1-3 using psci. On receiving the smc call from kernel,
core 0 will bring the secondary cores out pen and signal an event for
the cores. Currently on switching the cores is enabled i.e. it is not
possible to suspend, switch cores off, etc.
Change-Id: I6087e1d2ec650e1d587fd543efc1b08cbb50ae5f
Signed-off-by: Usama Arif <usama.arif@arm.com>
a5ds: Hold the secondary cpus in pen rather than panic2019-09-23T16:02:08ZUsama Arif2019-09-19T09:54:16Zurn:sha1:e231f3a5f46f3897368521e0b61fec8cad91b35e
For the secondary CPUs, hold the cpu in wfe rather then panic.
This will be needed when multicore support is added to a5ds as
the smc call will write to the hold base and signal an event to
power on the secondary CPUs.
Change-Id: I0ffc2059e9ef894c21375ca5c94def859bfa6599
Signed-off-by: Usama Arif <usama.arif@arm.com>
plat/arm: Introduce A5 DesignStart platform.2019-07-16T14:13:12ZUsama Arif2019-06-18T15:46:05Zurn:sha1:00c7d5aca36833c2d0f5394f125233254cafd388
This patch adds support for Cortex-A5 FVP for the
DesignStart program. DesignStart aims at providing
low cost and fast access to Arm IP.
Currently with this patch only the primary CPU is booted
and the rest of them wait for an interrupt.
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I3a2281ce6de2402dda4610a89939ed53aa045fab