<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/atf/plat/imx/common/include/sci/svc/timer, branch master</title>
<subtitle>Broadcom-s Trusted Firmware A</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/atf/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/atf/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/'/>
<updated>2019-01-17T02:49:48Z</updated>
<entry>
<title>Support for NXP's i.MX8 SoCs timer IPC</title>
<updated>2019-01-17T02:49:48Z</updated>
<author>
<name>Anson Huang</name>
</author>
<published>2019-01-15T02:22:06Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/atf/commit/?id=1552df5d25944b2bddf42e96acbadca18b3c7c95'/>
<id>urn:sha1:1552df5d25944b2bddf42e96acbadca18b3c7c95</id>
<content type='text'>
NXP's i.MX8 SoCs have system controller (M4 core) which takes
control of timer management, including watchdog, srtc and system
counter etc., other clusters like Cortex-A35 can send out command
via MU (Message Unit) to system controller for timer operation.

This patch adds timer IPC(inter-processor communication) support.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
</content>
</entry>
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