bcm63xx/atf/plat/ti/k3/include, branch master

ti: k3: common: Remove MSMC port definitions

2019-04-30T13:41:06Z

The MSMC port defines were added to help in the case when some ports are not connected and have no cores attached. We can get the same functionality by defined the number of cores on that port to zero. This simplifies several code paths, do this here. Signed-off-by: Andrew F. Davis Change-Id: I3247fe37af7b86c3227e647b4f617fab70c8ee8a

ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default

2019-04-19T16:56:43Z

This should be more secure and looks a bit cleaner. Signed-off-by: Andrew F. Davis Change-Id: Ie5eaf0234b211ba02631cf5eab5faa1402a34461

ti: k3: common: Remove shared RAM space

2019-04-19T16:56:38Z

We don't use this for anything right now, remove it. Signed-off-by: Andrew F. Davis Change-Id: I11505d01834f7ff1fdba46fda0acbb3b56fc9b66

ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines

2019-04-19T16:56:24Z

This makes definitions more consistent, plus helps alignment. Signed-off-by: Andrew F. Davis Change-Id: I38fcdd76207586613d9934c9dc83d7a347e9e0fc

ti: k3: common: Add support for runtime detection of GICR base address

2019-01-22T19:11:09Z

Valid addresses for GICR base are always a set calculable distance from the GICD and is based on the number of cores a given instance of GICv3 IP can support. The formula for the number of address bits is given by the ARM GIC-500 TRM section 3.2 as 2^(18+log2(cores)) with the MSB set to one for GICR instances. Holes in the GIC address space are also guaranteed to safely return 0 on reads. This allows us to support runtime detection of the GICR base address by starting from GIC base address plus BIT(18) and walking until the GICR ID register (IIDR) is detected. We stop searching after BIT(20) to prevent searching out into space if something goes wrong. This can be extended out if we ever have a device with 16 or more cores. Signed-off-by: Andrew F. Davis

ti: k3: common: Allow customizing UART baud rate using build options

2019-01-21T19:39:51Z

To accommodate scenarios where we want to use a UART baud rate other than the default 115,200 allow the associated compiler definition to be set via the K3_USART_BAUD build option by updating the platform make file. Since the platform make file now also contains the default value (still 115,200), go ahead and remove the redundant definition from the platform header file. Suggested-by: Andrew F. Davis Signed-off-by: Andreas Dannenberg

Sanitise includes across codebase

2019-01-04T10:43:17Z

Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz

Standardise header guards across codebase

2018-11-08T10:20:19Z

All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz

ti: k3: drivers: Add support for TI System Control Interface protocol

2018-08-22T15:56:32Z

Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used in Texas Instrument's System on Chip (SoC) such as those in K3 family AM654x SoCs to communicate between various compute processors with a central system controller entity. TI-SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC. Signed-off-by: Andrew F. Davis Reviewed-by: Andreas Dannenberg

ti: k3: drivers: Add Secure Proxy driver

2018-08-22T15:33:09Z

Secure Proxy module manages hardware threads that are meant for communication between the processor entities. Add support for this here. Signed-off-by: Andrew F. Davis