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<title>bcm63xx/u-boot/arch/arm/cpu/armv7m, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
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<updated>2019-05-18T12:15:35Z</updated>
<entry>
<title>CONFIG_SPL_SYS_[DI]CACHE_OFF: add</title>
<updated>2019-05-18T12:15:35Z</updated>
<author>
<name>Trevor Woerner</name>
</author>
<published>2019-05-03T13:41:00Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=1001502545ff0125c39232cf0e7f26d9213ab55f'/>
<id>urn:sha1:1001502545ff0125c39232cf0e7f26d9213ab55f</id>
<content type='text'>
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Signed-off-by: Trevor Woerner &lt;trevor@toganlabs.com&gt;
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: armv7m: Clean up some thumb / compiler flag options</title>
<updated>2018-05-23T17:03:42Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-08T00:46:52Z</published>
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<id>urn:sha1:ea37f0b3129bb21c5d4bd11a14bfcf2537e8ec29</id>
<content type='text'>
- The correct way to build with thumb mode is to select SYS_THUMB_BUILD
- We should be setting -march=armv7-m in arch/arm/Makefile not the
  sub-config.mk file.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: v7R: Add support for MPU</title>
<updated>2018-05-07T19:53:29Z</updated>
<author>
<name>Lokesh Vutla</name>
</author>
<published>2018-04-26T12:51:30Z</published>
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<id>urn:sha1:f2ef204312480bfba7700f47c8ce9fb975c26557</id>
<content type='text'>
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html

Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>armv7m: disable icache before linux booting</title>
<updated>2018-04-10T15:52:16Z</updated>
<author>
<name>Patrice Chotard</name>
</author>
<published>2018-03-30T07:22:40Z</published>
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<id>urn:sha1:d409c962169bd293e39386d0ddfa64d5222a3be4</id>
<content type='text'>
Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>mach-stm32: Use default memory map as background region</title>
<updated>2018-03-14T01:45:37Z</updated>
<author>
<name>Patrice Chotard</name>
</author>
<published>2018-02-28T16:15:00Z</published>
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<id>urn:sha1:f5bd13ed57730fd6e0de274aa52e4faef79871e9</id>
<content type='text'>
On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
uncachable regions. These regions are defined in DT.
Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
to configure MPU regions depending on DT settings.

As kernel is able to configure MPU, this allows to remove
MPU region settings in bootloader.

On Cortex M processors, MPU allows to use a default memory map.
(see B3.5.4 MPU Control Register, MPU_CTRL in
https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
Use the default memory map as background region for all STM32 SoCs
family with an additional MPU region corresponding to the SDRAM area.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>stm32: fix STMicroelectronics copyright</title>
<updated>2017-11-06T14:51:01Z</updated>
<author>
<name>Patrice Chotard</name>
</author>
<published>2017-10-23T07:53:58Z</published>
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<id>urn:sha1:3bc599c956f84999299ae277af11379df4cb8e3c</id>
<content type='text'>
Uniformize STMicroelectronics copyrights headers for STM32
related code.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>armv7m: mpu_config add missing break</title>
<updated>2017-08-13T19:17:28Z</updated>
<author>
<name>xypron.glpk@gmx.de</name>
</author>
<published>2017-07-30T18:34:20Z</published>
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<id>urn:sha1:a5981734a4412eae6ac536c8bd50d3add665352f</id>
<content type='text'>
For DEVICE_NON_SHARED the newly assigned value of attr
is overwritten due to a missing break.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
</entry>
<entry>
<title>armv7m: Fix larger builds</title>
<updated>2017-06-05T18:13:14Z</updated>
<author>
<name>Phil Edworthy</name>
</author>
<published>2017-06-01T06:33:29Z</published>
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<id>urn:sha1:71d2cf23595e6174d50950d60ff28e028a183185</id>
<content type='text'>
The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.

Signed-off-by: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
</content>
</entry>
<entry>
<title>armv7m: add MPU configuration support</title>
<updated>2017-05-12T12:37:06Z</updated>
<author>
<name>Vikas Manocha</name>
</author>
<published>2017-05-03T23:38:55Z</published>
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<id>urn:sha1:96b61ab15c3a477ee14bb7e97faa2d8e1cdf3874</id>
<content type='text'>
Cortex-M archs support option memory protection unit (MPU). MPU is used
to set the memory types, attributes, access permissions for different regions,
cache policies of the device.

e.g. using MPU it is possible to configure memory region as device memory
or strongly ordered, memory attributes like execute never, cache policies
like write-back or write-through.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
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