<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/arch/arm/include/asm/arch-rockchip, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-05-30T10:22:35Z</updated>
<entry>
<title>rockchip: pinctrl: rk3399: Add support for UART3.</title>
<updated>2019-05-30T10:22:35Z</updated>
<author>
<name>Christoph Muellner</name>
</author>
<published>2019-05-07T08:58:42Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=dee5ad5ae70310b0476288900f902be7fdc70fe3'/>
<id>urn:sha1:dee5ad5ae70310b0476288900f902be7fdc70fe3</id>
<content type='text'>
This patch adds the missing GRF bit definitions for UART3 on the RK3399.

Signed-off-by: Christoph Muellner &lt;christoph.muellner@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: boot0: update CONFIG_ROCKCHIP_SPL_RESERVE_IRAM for SPL only</title>
<updated>2019-05-08T09:34:12Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-03-29T14:48:28Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=6b780e441b807f7340e6b2f250f40c9f19e02355'/>
<id>urn:sha1:6b780e441b807f7340e6b2f250f40c9f19e02355</id>
<content type='text'>
The CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is for SPL only, add
condition to limit it not affect TPL.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: use 'arch-rockchip' as header file path</title>
<updated>2019-04-30T22:00:05Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-03-28T03:01:23Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=15f09a1a834b125ed4a6102eac96186da0641541'/>
<id>urn:sha1:15f09a1a834b125ed4a6102eac96186da0641541</id>
<content type='text'>
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: arm: remove no use macro</title>
<updated>2019-04-30T22:00:05Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-03-28T09:36:07Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9f09b9d3cc7bcc63e27d0ee00cc107c9bdfe55bd'/>
<id>urn:sha1:9f09b9d3cc7bcc63e27d0ee00cc107c9bdfe55bd</id>
<content type='text'>
TIMER7_BASE is no used by source code now, remove it.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Add support for chromebook_bob</title>
<updated>2019-02-01T15:59:13Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-01-21T21:53:36Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9e92116bc84851d7a2a05f186468e77614bf3d67'/>
<id>urn:sha1:9e92116bc84851d7a2a05f186468e77614bf3d67</id>
<content type='text'>
Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.

Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)

Not included:
- Keyboard
- Display
- Sound
- USB
- TPM

Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Implement spl_gpio in the GPIO driver</title>
<updated>2019-02-01T15:59:13Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-01-21T21:53:34Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=aa48c94ca87e9831738238128385472be41b148e'/>
<id>urn:sha1:aa48c94ca87e9831738238128385472be41b148e</id>
<content type='text'>
Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Move pull-up/down enum into a common file</title>
<updated>2019-02-01T15:59:13Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-01-21T21:53:33Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=3ec6f11c7d192856b65217317ff5ba52827f7a3c'/>
<id>urn:sha1:3ec6f11c7d192856b65217317ff5ba52827f7a3c</id>
<content type='text'>
At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.

Also adjust the enum name to lower case.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3288: Add i2s pinctrl and clock support</title>
<updated>2019-02-01T15:59:10Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2018-12-28T03:15:20Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8'/>
<id>urn:sha1:3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8</id>
<content type='text'>
Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3399: Initialize CPU B clock.</title>
<updated>2018-11-30T20:56:45Z</updated>
<author>
<name>Christoph Muellner</name>
</author>
<published>2018-11-30T19:32:48Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=af765a49baac1191da1cf272a19d650d313c3314'/>
<id>urn:sha1:af765a49baac1191da1cf272a19d650d313c3314</id>
<content type='text'>
This patch sets the PLL of CPU cluster B (BPLL) to 600 MHz.
This decreases the boot time of Linux 4.19 by about 8%.

The 600 MHz are inspired by the 600 MHz used for LPLL initialization
(came in with commit 9f636a249c1).

Tested on RK3399-Q7 on Haikou base board.

Signed-off-by: Christoph Muellner &lt;christoph.muellner@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>ARM: rockchip: rv1108: Sync clock with vendor tree</title>
<updated>2018-11-30T20:56:44Z</updated>
<author>
<name>Otavio Salvador</name>
</author>
<published>2018-11-30T13:34:12Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=5d2cb15c7737e51f669f80d82ad7286d0f573097'/>
<id>urn:sha1:5d2cb15c7737e51f669f80d82ad7286d0f573097</id>
<content type='text'>
Make adjustments to the rv1108 clock driver in order to align it
with the internal Rockchip version.

Signed-off-by: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
</feed>
