<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/arch/arm/mach-imx/mx7, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-06-11T17:41:24Z</updated>
<entry>
<title>Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx</title>
<updated>2019-06-11T17:41:24Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2019-06-11T17:41:24Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=529faf80c339b78bd361b59735664f2605322b8e'/>
<id>urn:sha1:529faf80c339b78bd361b59735664f2605322b8e</id>
<content type='text'>
u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support
</content>
</entry>
<entry>
<title>pico-imx7d: Correct uart clock root</title>
<updated>2019-06-11T08:42:48Z</updated>
<author>
<name>Jun Nie</name>
</author>
<published>2019-05-08T06:38:31Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=79fcbde8eb57a0dfc9761c4ba167186843d7a707'/>
<id>urn:sha1:79fcbde8eb57a0dfc9761c4ba167186843d7a707</id>
<content type='text'>
Correct uart clock root ID. Incorrect ID may result the
clock is gated because rate value 0 is returned in
imx_get_uartclk()

The ID can be ignored if CONFIG_SKIP_LOWLEVEL_INIT is not enabled
because init_clk_uart() will enable all uart clocks in that case.

Signed-off-by: Jun Nie &lt;jun.nie@linaro.org&gt;
</content>
</entry>
<entry>
<title>imx: mx7: Skip secure init in arch_cpu_init</title>
<updated>2019-06-11T08:42:48Z</updated>
<author>
<name>Jun Nie</name>
</author>
<published>2019-05-08T06:38:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=bc7c9ed33c685a8285e4fcf2a9f24499f14026a9'/>
<id>urn:sha1:bc7c9ed33c685a8285e4fcf2a9f24499f14026a9</id>
<content type='text'>
Skip secure related initialization in arch_cpu_init if low level
init is skipped.  Because these should be done in early stage
firmware, such as ARM trusted firmware.

Signed-off-by: Jun Nie &lt;jun.nie@linaro.org&gt;
</content>
</entry>
<entry>
<title>video: mxsfb: add DM_VIDEO support</title>
<updated>2019-06-04T21:25:54Z</updated>
<author>
<name>Igor Opaniuk</name>
</author>
<published>2019-06-03T21:05:59Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=8c1df09f070f1796730ce4eca104897093fea191'/>
<id>urn:sha1:8c1df09f070f1796730ce4eca104897093fea191</id>
<content type='text'>
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to mxsfb device.

Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
</content>
</entry>
<entry>
<title>mx7: Do not call lcdif_power_down() in the SPL case</title>
<updated>2019-01-28T11:53:21Z</updated>
<author>
<name>Fabio Estevam</name>
</author>
<published>2018-12-11T18:40:37Z</published>
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<id>urn:sha1:bab289cbe993c1ee26a6301e7019c3078b60393a</id>
<content type='text'>
Like it was done on imx6 in commit 9236269de57d ("imx: mx6: Fix
implementantion reset_misc")

Do not call lcdif_power_down() in the SPL case to fix the following
build error:

  LD      spl/u-boot-spl
  MKIMAGE u-boot.img
arch/arm/mach-imx/built-in.o: In function `reset_misc':
/home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined reference to `lcdif_power_down'
scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed

Signed-off-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Signed-off-by: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Signed-off-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Signed-off-by: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx7: avoid some initialization if low level is skipped</title>
<updated>2018-10-22T12:37:28Z</updated>
<author>
<name>Rui Miguel Silva</name>
</author>
<published>2018-09-05T10:56:05Z</published>
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<id>urn:sha1:be277c3a89fcec9f837bf4fb562c606155b0999f</id>
<content type='text'>
We can have the case where u-boot is launched after some other low level
enabler, like for example when u-boot runs after arm-trusted-firmware
and/or optee. So, because of that we may need to jump the initialization of
some IP blocks even because we may no longer have the permission for that.

So, if the config option to skip low level init is set disable also timer,
board and csu initialization.

Signed-off-by: Rui Miguel Silva &lt;rui.silva@linaro.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: u-boot@lists.denx.de
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx7: fix potential overflow in imx_ddr_size()</title>
<updated>2018-10-09T16:32:47Z</updated>
<author>
<name>Marcel Ziswiler</name>
</author>
<published>2018-09-19T11:01:55Z</published>
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<id>urn:sha1:2cea8d74dc3a80bbc06aff6b6dcaceb806d563b4</id>
<content type='text'>
The imx_ddr_size() function may overflow as it is possible to kind of
over provision the DDR controller. Fix this by capping it to 2 GB which
is the maximum allowed size as per reference manual.

Signed-off-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx7: add system suspend/resume support</title>
<updated>2018-09-04T06:47:23Z</updated>
<author>
<name>Anson Huang</name>
</author>
<published>2018-08-08T01:17:50Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=57b620255e726fae38e5e2ac5c7dec4b9011ffca'/>
<id>urn:sha1:57b620255e726fae38e5e2ac5c7dec4b9011ffca</id>
<content type='text'>
This patch adds system suspend/resume support,
when linux kernel enters deep sleep mode, SoC will go
into below mode:

 - CA7 platform goes into STOP mode;
 - SoC goes into DSM mode;
 - DDR goes into self-refresh mode;
 - CPU0/SCU will be powered down.

When wake up event arrives:

 - SoC DSM mdoe exits;
 - CA7 platform exit STOP mode, SCU/CPU0 power up;
 - Invalidate L1 cache;
 - DDR exit self-refresh mode;
 - Do secure monitor mode related initialization;
 - Jump to linux kernel resume entry.

Belwo is the log of 1 iteration of system suspend/resume:

[  338.824862] PM: suspend entry (deep)
[  338.828853] PM: Syncing filesystems ... done.
[  338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done.
[  338.842939] OOM killer disabled.
[  338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[  338.869717] PM: suspend devices took 0.010 seconds
[  338.877846] Disabling non-boot CPUs ...
[  338.960301] Retrying again to check for CPU kill
[  338.964953] CPU1 killed.
[  338.968104] Enabling non-boot CPUs ...
[  338.973598] CPU1 is up
[  339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[  339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[  339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
[  339.385065] PM: resume devices took 0.400 seconds
[  339.389836] OOM killer enabled.
[  339.392986] Restarting tasks ... done.
[  339.398990] PM: suspend exit

The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Acked-by: Stefan Agner &lt;stefan@agner.ch&gt;
Tested-by: Stefan Agner &lt;stefan@agner.ch&gt;
</content>
</entry>
<entry>
<title>imx: mx7: add gpc initialization for low power mode</title>
<updated>2018-09-04T06:47:23Z</updated>
<author>
<name>Anson Huang</name>
</author>
<published>2018-08-08T01:17:49Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=b059837850e466d033b09d279743166e352519d1'/>
<id>urn:sha1:b059837850e466d033b09d279743166e352519d1</id>
<content type='text'>
Add i.MX7D GPC initialization for low power mode
support like system suspend/resume from linux kernel:

 - Pending IOMUXC IRQ to workaround GPC state machine issue;
 - Mask all GPC interrupts for M4/C0/C1;
 - Configure SCU timing;
 - Configure time slot ack;
 - Configure C0/C1 power up/down timing;
 - Configure wakeup source mechanism;
 - Disable DSM/RBC related settings.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx7: psci: improve cpu hotplug flow</title>
<updated>2018-09-04T06:47:23Z</updated>
<author>
<name>Anson Huang</name>
</author>
<published>2018-08-08T01:17:48Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=11e52bca84e65a35d10830c306dab37dc5621a3d'/>
<id>urn:sha1:11e52bca84e65a35d10830c306dab37dc5621a3d</id>
<content type='text'>
This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.

Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
</content>
</entry>
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