bcm63xx/u-boot/arch/arm/mach-imx, branch master

mx6sl: hab: Fix pu_irom_mmu_enabled address

2019-06-27T12:10:40Z

According to hab.c code we have to notify the ROM code if the MMU is enabled or not. This is achieved by setting the "pu_irom_mmu_enabled" to 0x1. The current address in hab.c code is wrong for i.MX6SL, according to ROM map file the correct address is 0x00901c60. As we are writing in the wrong address the ROM code is not flushing the caches when needed, and the following HAB event is observed in certain scenarios: --------- HAB Event 1 ----------------- event data: 0xdb 0x00 0x14 0x41 0x33 0x18 0xc0 0x00 0xca 0x00 0x0c 0x00 0x01 0xc5 0x00 0x00 0x00 0x00 0x07 0xe4 STS = HAB_FAILURE (0x33) RSN = HAB_INV_SIGNATURE (0x18) CTX = HAB_CTX_COMMAND (0xC0) ENG = HAB_ENG_ANY (0x00) Update MX6SL_PU_IROM_MMU_EN_VAR to address this issue. Reported-by: Frank Zhang Signed-off-by: Breno Lima Reviewed-by: Ye Li Reviewed-by: Fabio Estevam

Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

2019-06-11T17:41:24Z

u-boot-imx-20190612 -------------------- - Board fixes: - imx6logic - wandboard - mx6sabre boots again - imx8qm_mek - pico-* boards - Toradex apalis / colibri - engicam imx6 (environment) - KP MX53 - opos6ul - Switch to DM: - vining2000 - dh MX6 - Toradex colibri i.MX7 - Novena - Security : fix CSF size for HAB - Other: - imx: fix building for i.mx8 without spl - pcie and switch to DM mx6sabreauto: Enable SPL SDP support

imx8: cpu: get temperature when print cpu desc

2019-06-11T08:43:00Z

Read the temperature when print cpu inforation. Signed-off-by: Peng Fan

ARM: imx: Rename VINING|2000

2019-06-11T08:42:48Z

The company Samtec was merged into Softing, migrate the board over to the new name and update copyright headers. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Silvio Fricke Cc: Stefano Babic

ARM: imx: Call imx_pcie_remove() only for non-DM PCI driver

2019-06-11T08:42:48Z

The DM iMX PCI driver has DM_FLAG_OS_PREPARE set and will call imx_pcie_remove() from the .remove callback. Do not call it from the architecture code again. Signed-off-by: Marek Vasut Cc: Bin Meng Cc: Fabio Estevam Cc: Stefano Babic Reviewed-by: Bin Meng

imx: Extend PCL063 support for phyCORE-i.MX6ULL SOM

2019-06-11T08:42:48Z

Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: Parthiban Nallathambi

board: toradex: add apalis imx8qm 4gb wb it v1.0b module support

2019-06-11T08:42:48Z

This commit adds initial support for the Toradex Apalis iMX8QM 4GB WB IT V1.0B module. Unlike the V1.0A early access samples exclusively booting from SD card, they are now strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports either booting from the on-module eMMC or may be used for recovery purpose using the universal update utility (uuu) aka mfgtools 3.0. Functionality wise the following is known to be working: - eMMC, 8-bit and 4-bit MMC/SD card slots - Gigabit Ethernet - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QM as of yet. Signed-off-by: Marcel Ziswiler Reviewed-by: Max Krummenacher

imx8qm: fix cpu frequency reporting

2019-06-11T08:42:48Z

CPU frequency reporting failed with the following error message being printed: sc_pm_get_clock_rate: resource:507 clk:2: res:3 Could not read CPU frequency: -22 CPU: NXP i.MX8QM RevB A53 at 0 MHz Fix this by differentiating between the A35 as found on the i.MX 8QXP and the A53 as found on the i.MX 8QM SoCs. Signed-off-by: Marcel Ziswiler Reviewed-by: Max Krummenacher

pico-imx7d: Correct uart clock root

2019-06-11T08:42:48Z

Correct uart clock root ID. Incorrect ID may result the clock is gated because rate value 0 is returned in imx_get_uartclk() The ID can be ignored if CONFIG_SKIP_LOWLEVEL_INIT is not enabled because init_clk_uart() will enable all uart clocks in that case. Signed-off-by: Jun Nie

imx: mx7: Skip secure init in arch_cpu_init

2019-06-11T08:42:48Z

Skip secure related initialization in arch_cpu_init if low level init is skipped. Because these should be done in early stage firmware, such as ARM trusted firmware. Signed-off-by: Jun Nie