bcm63xx/u-boot/arch/mips/mach-mscc/include, branch masterBroadcom-s U-Boothttps://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master2019-05-03T14:42:23Znet: mscc: ocelot: Update network driver for pcb1202019-05-03T14:42:23ZHoratiu Vultur2019-04-24T09:27:57Zurn:sha1:6390da4a5770e59ac220c1b0412a66d2c861a547
Update Ocelot network driver to have support also for pcb120.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
mips: mscc: serval: Fix reset2019-05-03T14:42:23ZHoratiu Vultur2019-04-15T09:56:36Zurn:sha1:72e224b864baa4905b9c5997223baa3e65725be7
In case the ddr training was failing, it couldn't reset, it was just
hanging. Therefore reimplement it, so when ddr training is failing
it would call _machine_restart, which power downs the DDR and does
a force reset.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
net: Add MSCC ServalT network driver.2019-04-12T15:32:52ZHoratiu Vultur2019-04-08T08:31:36Zurn:sha1:746f2d3e8bf4961b9f5558c21bc67a61b2b89eee
Add network driver for Microsemi Ethernet switch.
It is present on ServalT SoCs.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
MSCC: Add support for Serval SoC family.2019-01-23T17:28:09ZHoratiu Vultur2019-01-23T15:39:42Zurn:sha1:1895b87e84d75272218a7db1d3454265fcf6e791
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are
found in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
MSCC: Add support for Servalt SoC family.2019-01-23T17:27:26ZHoratiu Vultur2019-01-17T14:33:27Zurn:sha1:055125171a39aecd5814bfb0c39233699338b647
As Ocelot, Luton and Jaguar2, this family of SoCs are found
in Microsemi Switches solution.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
MSCC: Add support for Jaguar2 SOC family2019-01-16T12:56:43ZHoratiu Vultur2019-01-12T17:56:56Zurn:sha1:e7a0de2c317e75accfa53c2dd17f521462ccd830
As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
mips: spi: mscc: Add fast bitbang SPI driver2019-01-16T12:56:43ZLars Povlsen2019-01-08T09:38:33Zurn:sha1:fd6e0b05252dd20579129d420442ef017287e89d
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
mips: mscc: luton+ocelot: Remove board config options, do probing2019-01-16T12:56:43ZLars Povlsen2018-12-20T08:56:05Zurn:sha1:e9f1492bcac5127800a25a01e505e225956e2967
As we are moving to multi-dtb and board detection, remove static board
config options, and introduce board probing instead.
Luton: This add single-binary support for the two MSCC luton-based
reference boards - pcb090 and pcb091. The SoC chip ID is used to
determine the board type.
Ocelot: This add single-binary support for the two MSCC ocelot-based
reference boards - pcb120 and pcb123. The PHY ids on specific ports
are used to determine the board type.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
mips: mscc: Add generic GPIO control utility function2019-01-16T12:56:43ZLars Povlsen2018-12-20T08:56:03Zurn:sha1:e58031acdc84bbd3c2d22fab4455a0f079f936a0
The GPIO control function can be used for controlling alternate
functions associated with a GPIO.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
mips: mscc: Add generic PHY MIIM utility functions2019-01-16T12:56:43ZLars Povlsen2018-12-20T08:56:02Zurn:sha1:3098ade229af721c8b64b423e2e11f5896b45710
The PHY MIIM utility functions can/will be used for board detection
purposes.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>