bcm63xx/u-boot/arch/riscv/include/asm, branch master

riscv: Introduce CONFIG_XIP to support booting from flash

2019-05-09T08:46:46Z

When U-Boot boots from flash, during the boot process, hart_lottery and available_harts_lock variable addresses point to flash which is not writable. This causes boot failures on AE350. Introduce a config option CONFIG_XIP to support such configuration. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Lukas Auer Reviewed-by: Bin Meng

riscv: Add a SYSCON driver for Andestech's PLMT

2019-04-08T01:45:08Z

The platform-Level Machine Timer (PLMT) block holds memory-mapped mtime register associated with timer tick. This driver implements the riscv_get_time() which is required by the generic RISC-V timer driver. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: Add a SYSCON driver for Andestech's PLIC

2019-04-08T01:45:08Z

The Platform-Level Interrupt Controller (PLIC) block holds memory-mapped claim and pending registers associated with software interrupt. It is required for handling IPI. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: add support for multi-hart systems

2019-04-08T01:44:26Z

On RISC-V, all harts boot independently. To be able to run on a multi-hart system, U-Boot must be extended with the functionality to manage all harts in the system. All harts entering U-Boot are registered in the available_harts mask stored in global data. A hart lottery system as used in the Linux kernel selects the hart U-Boot runs on. All other harts are halted. U-Boot can delegate functions to them using smp_call_function(). Every hart has a valid pointer to the global data structure and a 8KiB stack by default. The stack size is set with CONFIG_STACK_SIZE_SHIFT. Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: import the supervisor binary interface header file

2019-04-08T01:44:25Z

Import the supervisor binary interface (SBI) header file from Linux (arch/riscv/include/asm/sbi.h). The last change to it was in commit 6d60b6ee0c97 ("RISC-V: Device, timer, IRQs, and the SBI"). Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Atish Patra

riscv: add infrastructure for calling functions on other harts

2019-04-08T01:44:25Z

Harts on RISC-V boot independently, U-Boot is responsible for managing them. Functions are called on other harts with smp_call_function(), which sends inter-processor interrupts (IPIs) to all other available harts. Available harts are those marked as available in the device tree and present in the available_harts mask stored in global data. The available_harts mask is used to register all harts that have entered U-Boot. Functions are specified with their address and two function arguments (argument 2 and 3). The first function argument is always the hart ID of the hart calling the function. On the other harts, the IPI interrupt handler handle_ipi() must be called on software interrupts to handle the request and call the specified function. Functions are stored in the ipi_data data structure. Every hart has its own data structure in global data. While this is not required at the moment (all harts are expected to boot Linux), this does allow future expansion, where other harts may be used for monitoring or other tasks. Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd

2019-02-27T01:12:34Z

This patch enables CONFIG_SYS_BOOT_RAMDISK_HIGH for RISC-V because bootm will update initrd location in DTB only if CONFIG_SYS_BOOT_RAMDISK_HIGH is enabled. If we don't enable this option then bootm assumes DTB already has initrd details which is not the case most of the time. Signed-off-by: Atish Patra Signed-off-by: Anup Patel Reviewed-by: Lukas Auer

riscv: Add place-holder asm/arch/clk.h for driver compilation

2019-02-27T01:12:33Z

Some of the drivers (such as Cadence MACB ethernet driver) expect asm/arch/clk.h to be provided by arch support so we add place-holder asm/arch-generic/clk.h for RISC-V generic CPU. Signed-off-by: Anup Patel Reviewed-by: Lukas Auer

riscv: Add asm/dma-mapping.h for DMA mappings

2019-02-27T01:12:33Z

This patch adds asm/dma-mapping.h for Linux-like DMA mappings APIs required by some of the drivers (such as, Cadance MACB Ethernet driver). Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Alexander Graf Reviewed-by: Lukas Auer

riscv: Save boot hart id to the global data

2018-12-18T01:56:27Z

At present the hart id passed via a0 in the U-Boot entry is saved to s0 at the beginning but does not preserve later. Save it to the global data structure so that it can be used later. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Reviewed-by: Anup Patel